diff --git a/Change_Log.txt b/Change_Log.txt new file mode 100644 index 0000000..40d405e --- /dev/null +++ b/Change_Log.txt @@ -0,0 +1,13 @@ +Dec 18 2013: +-Initial Project released + +June 16 2014: +-Changed Ia_PID_Kp to 25 and Ia_PID_Ki to 4, prior version had Kp and Ki set too agressively and caused pump current output oscillations. +-in Ia_PID() function, Ri_Mid_Error boundary checked changed +-in Ia_PID() function, Ri_Mid_Error_Sum boundary checked changed +-Removed vestigial code regarding displaying Text on LCD that made it's way in from the closed sourced firmware. +November 12 2018: +-Lambda and temp is displayed as text on first line, lambda graph at bottom of display. +-Added a heatup msg +-Vout defaults to lambda 1 during heatup. +-New PCB with nice connector. diff --git a/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd similarity index 100% rename from SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd diff --git a/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch similarity index 100% rename from SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source.app b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source.app similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source.app rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source.app diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.hex b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.hex similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.hex rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.hex diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep new file mode 100644 index 0000000..93a85ad --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt new file mode 100644 index 0000000..9126156 --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt @@ -0,0 +1,150 @@ +Starting MAKE... +creating project.mk + +lib/adcinc.asm + +lib/adcincint.asm + +lib/amux4_0.asm + +lib/amux4_1.asm + +lib/dac6_vgnd.asm + +lib/dac9_ia.asm + +lib/insamp.asm + +lib/lcd.asm + +lib/psocconfig.asm + +lib/psocconfigtbl.asm + +lib/pwm8_heater.asm + +lib/pwm8_heaterint.asm + +lib/pwm8_nb_out.asm + +lib/pwm8_nb_outint.asm + +lib/pwm8_vout.asm + +lib/pwm8_voutint.asm + +lib/sleeptimer.asm + +lib/sleeptimerint.asm + +./boot.asm + +Linking.. + +symbol ADCINC_bGetData is unused + +symbol SleepTimer_bGetTickCntr is unused + +symbol PWM8_Heater_bReadCounter is unused + +symbol ADCINC_iGetData is unused + +symbol SleepTimer_iGetTickCntr is unused + +symbol SleepTimer_lGetTickCntr is unused + +symbol PWM8_Vout_EnableInt is unused + +symbol PWM8_Vout_Stop is unused + +symbol LCD_DrawBG is unused + +symbol SleepTimer_TickWait is unused + +symbol PWM8_Vout_bReadPulseWidth is unused + +symbol PWM8_NB_Out_EnableInt is unused + +symbol SleepTimer_SetTimer is unused + +symbol SleepTimer_SyncWait is unused + +symbol LCD_DrawVBG is unused + +symbol LCD_InitVBG is unused + +symbol ADCINC_Stop is unused + +symbol PWM8_Heater_EnableInt is unused + +symbol PWM8_NB_Out_Stop is unused + +symbol ADCINC_fClearFlag is unused + +symbol INSAMP_Stop is unused + +symbol SleepTimer_bGetTimer is unused + +symbol PWM8_Heater_Stop is unused + +symbol PWM8_NB_Out_bReadPulseWidth is unused + +symbol _LCD_DrawVBG is unused + +symbol SleepTimer_Stop is unused + +symbol AMUX4_0_Stop is unused + +symbol AMUX4_1_Stop is unused + +symbol PWM8_Vout_WritePeriod is unused + +symbol DAC9_Ia_Stop is unused + +symbol ADCINC_WritePulseWidth is unused + +symbol ADCINC_fIsDataAvailable is unused + +symbol PWM8_Heater_bReadPulseWidth is unused + +symbol SleepTimer_DisableInt is unused + +symbol LCD_PrHexInt is unused + +symbol PWM8_Vout_bReadCounter is unused + +symbol DAC9_Ia_WriteBlind is unused + +symbol ADCINC_cClearFlagGetData is unused + +symbol AMUX4_0_Start is unused + +symbol AMUX4_1_Start is unused + +symbol ADCINC_StopADC is unused + +symbol PWM8_NB_Out_WritePeriod is unused + +symbol DAC6_VGND_Stop is unused + +symbol PWM8_Heater_WritePeriod is unused + +symbol PWM8_NB_Out_bReadCounter is unused + +symbol INSAMP_SetGain is unused + +symbol DAC6_VGND_WriteBlind is unused + +603 bytes unused code deleted + +no worthwhile duplicate found + + ROM 89% full. 3607 out of 4096 bytes used (does not include absolute areas). + + RAM 40% full. 101 bytes used (does not include stack usage). + +Built with ICCM8C STD V7.05.00 + + +SLC_Free_Open_Source - 0 error(s) 0 warning(s) 11:18:47 + diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc similarity index 98% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc index fc98980..19e5ae8 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc @@ -65,7 +65,8 @@ - + + @@ -79,6 +80,15 @@ + + + + + + + + +
diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a new file mode 100644 index 0000000..dcd20d6 --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a @@ -0,0 +1,2206 @@ +.start +XH +H 3 areas B global symbols +M sleeptimerint.asm +A text size 0 flags 0 +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbfile SleepTimer.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/SleepTimer.inc +dbfunc 0 ? 0 I +A InterruptRAM size 8 flags 20 +S _SleepTimer_bTimerValue Def0001 +S Sleep_Counter Def0007 +S SleepTimer_fTick Def0000 +S _SleepTimer_TickCount Def0003 +S SleepTimer_bCountDown Def0002 +S _Sleep_Counter Def0007 +S _SleepTimer_fTick Def0000 +S SleepTimer_bTimerValue Def0001 +S _SleepTimer_bCountDown Def0002 +S SleepTimer_TickCount Def0003 +A UserModules size 22 flags 0 +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbline 5F 0 +dbline 62 3 +dbline 63 6 +dbline 64 8 +dbline 67 A +dbline 68 D +dbline 69 F +dbline 6D 11 +dbline 6E 13 +dbline 70 15 +dbline 71 17 +dbline 75 19 +dbline 76 1B +dbline 79 1D +dbline 84 1F +dbline 8C 21 +S _SleepTimer_ISR Def0000 +T 00 00 2E 00 00 01 47 00 02 FF A0 03 7A 00 02 47 +R 00 00 00 02 01 03 00 01 01 07 00 01 01 0D 00 01 +T 00 0B 00 01 FF A0 03 7A 00 01 76 00 06 D0 0B 76 +R 00 00 00 02 01 02 00 01 01 08 00 01 01 0B 00 01 +T 00 16 00 05 D0 07 76 00 04 D0 03 76 00 03 76 +R 00 00 00 02 01 02 00 01 01 07 00 01 01 0C 00 01 +T 00 20 00 07 7E +R 00 00 00 02 01 02 00 01 +.end +.start +XH +H 2 areas 34 global symbols +M sleeptimer.asm +S SleepTimer_fTick Ref0000 +S SleepTimer_bCountDown Ref0000 +S SleepTimer_bTimerValue Ref0000 +S SleepTimer_TickCount Ref0000 +A text size 0 flags 0 +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbfile SleepTimer.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/SleepTimer.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A UserModules size 76 flags 0 +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbline 2 0 +dbline 87 3 +dbline 2 4 +dbline A4 7 +dbline C6 8 +dbline C7 A +dbline C8 C +dbline C9 E +dbline CA 10 +dbline CC 12 +dbline D1 14 +dbline D2 16 +dbline D7 18 +dbline F3 19 +dbline 10D 1A +dbline 10E 1C +dbline 10F 1D +dbline 2 1E +dbline 111 20 +dbline 112 22 +dbline 113 24 +dbline 114 26 +dbline 2 28 +dbline 116 2A +dbline 118 2B +dbline 13B 2C +dbline 13E 2F +dbline 13F 32 +dbline 140 34 +dbline 141 37 +dbline 142 38 +dbline 145 3A +dbline 16E 3B +dbline 16F 3C +dbline 170 3E +dbline 173 40 +dbline 174 43 +dbline 178 45 +dbline 179 46 +dbline 17C 48 +dbline 1A0 49 +dbline 1A2 4B +dbline 1C4 4C +dbline 1C6 4E +dbline 1E8 4F +dbline 1EA 51 +dbline 2 52 +dbline 211 55 +dbline 212 57 +dbline 2 59 +dbline 215 5C +dbline 2 5D +dbline 23D 60 +dbline 23E 61 +dbline 23F 63 +dbline 240 65 +dbline 241 67 +dbline 242 69 +dbline 243 6B +dbline 244 6D +dbline 245 6F +dbline 246 71 +dbline 2 72 +dbline 24B 75 +S SleepTimer_iGetTickCntr Def0052 +S SleepTimer_lGetTickCntr Def005D +S $sb$SleepTimer_bGetTickCntr Def0049 +S $sb$SleepTimer_Stop Def0019 +S $se$SleepTimer_bGetTickCntr Def004C +S $se$SleepTimer_Stop Def001A +S $sb$SleepTimer_iGetTickCntr Def0052 +S $sb$SleepTimer_lGetTickCntr Def005D +S $se$SleepTimer_iGetTickCntr Def005D +S $se$SleepTimer_lGetTickCntr Def0076 +S _SleepTimer_SetInterval Def001A +S _SleepTimer_EnableInt Def0000 +S SleepTimer_DisableInt Def0004 +S _SleepTimer_bGetTimer Def004F +S $sb$SleepTimer_DisableInt Def0004 +S $se$SleepTimer_DisableInt Def0008 +S _SleepTimer_bGetTickCntr Def0049 +S _SleepTimer_Stop Def0019 +S _SleepTimer_iGetTickCntr Def0052 +S _SleepTimer_lGetTickCntr Def005D +S SleepTimer_Start Def0008 +S SleepTimer_TickWait Def002C +S $sb$SleepTimer_Start Def0008 +S SleepTimer_SetTimer Def004C +S $se$SleepTimer_Start Def0019 +S SleepTimer_SyncWait Def003B +S $sb$SleepTimer_TickWait Def002C +S _SleepTimer_DisableInt Def0004 +S $se$SleepTimer_TickWait Def003B +S $sb$SleepTimer_SetTimer Def004C +S $se$SleepTimer_SetTimer Def004F +S $sb$SleepTimer_SyncWait Def003B +S $se$SleepTimer_SyncWait Def0049 +S _SleepTimer_Start Def0008 +S SleepTimer_SetInterval Def001A +S SleepTimer_EnableInt Def0000 +S _SleepTimer_TickWait Def002C +S SleepTimer_bGetTimer Def004F +S _SleepTimer_SetTimer Def004C +S $sb$SleepTimer_SetInterval Def001A +S $sb$SleepTimer_EnableInt Def0000 +S $se$SleepTimer_SetInterval Def002C +S _SleepTimer_SyncWait Def003B +S $se$SleepTimer_EnableInt Def0004 +S $sb$SleepTimer_bGetTimer Def004F +S $se$SleepTimer_bGetTimer Def0052 +S SleepTimer_bGetTickCntr Def0049 +S SleepTimer_Stop Def0019 +T 00 00 43 E0 40 7F 41 E0 BF 7F 50 00 53 00 00 53 +R 00 00 00 01 03 0D 00 00 +T 00 0D 00 00 53 00 00 53 00 03 53 +R 00 00 00 01 03 02 00 02 03 05 00 01 03 08 00 03 +T 00 13 00 02 53 00 01 53 00 00 7F 7F 21 18 4F 08 +R 00 00 00 01 03 02 00 03 03 05 00 03 03 08 00 03 +T 00 1E 71 10 5D E0 21 E7 2B 00 60 E0 70 EF 18 7F +R 00 00 00 01 +T 00 2C 55 00 00 00 47 00 00 FF AF FC 55 00 00 00 +R 00 00 00 01 03 03 00 00 03 07 00 00 03 0D 00 00 +T 00 37 78 BF F6 7F 4B 21 01 B0 06 47 00 00 FF BF +R 00 00 00 01 03 0C 00 01 +T 00 44 FC 4B 53 00 00 7F 51 00 03 7F 53 00 00 7F +R 00 00 00 01 03 05 00 01 03 09 00 03 03 0D 00 02 +T 00 4F 51 00 00 7F 41 E0 BF 51 00 03 58 00 02 43 +R 00 00 00 01 03 03 00 02 03 0A 00 03 03 0D 00 03 +T 00 5A E0 40 7F 41 E0 BF 08 51 00 00 54 00 51 +R 00 00 00 01 03 0A 00 03 +T 00 66 00 01 54 01 51 00 02 54 02 51 00 03 54 03 +R 00 00 00 01 03 02 00 03 03 07 00 03 03 0C 00 03 +T 00 71 18 43 E0 40 7F +R 00 00 00 01 +.end +.start +XH +H 3 areas 1 global symbols +M pwm8_voutint.asm +A text size 0 flags 0 +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbfile PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A InterruptRAM size 0 flags 20 +A UserModules size 1 flags 0 +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbline 4C 0 +S _PWM8_Vout_ISR Def0000 +T 00 00 7E +R 00 00 00 02 +.end +.start +XH +H 3 areas 24 global symbols +M pwm8_vout.asm +A text size 0 flags 0 +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbfile PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A slc_free_28_pin_feb_16_2013_RAM size 0 flags 20 +A UserModules size 42 flags 0 +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbline 2 0 +dbline 5F 3 +dbline 2 4 +dbline 7B 7 +dbline 2 8 +dbline 98 B +dbline 2 C +dbline B4 F +dbline D0 10 +dbline D2 12 +dbline EB 13 +dbline ED 15 +dbline 108 16 +dbline 10A 18 +dbline 12F 19 +dbline 130 1A +dbline 131 1C +dbline 2 1D +dbline 2 20 +dbline 134 22 +dbline 135 24 +dbline 137 25 +dbline 2 28 +dbline 13A 2A +dbline 13B 2C +dbline 13C 2E +dbline 13D 2F +dbline 13E 31 +dbline 2 33 +dbline 140 35 +dbline 141 37 +dbline 2 39 +dbline 2 3B +dbline 144 3E +dbline 145 3F +dbline 147 41 +S _PWM8_Vout_Start Def0008 +S PWM8_Vout_WritePeriod Def0010 +S PWM8_Vout_EnableInt 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Def0050 +S $sb$DAC9_Ia_WriteStall Def0050 +S $se$DAC9_Ia_WriteStall Def0090 +S $sb$DAC9_Ia_Start Def0000 +S $se$DAC9_Ia_Start Def0016 +S DAC9_Ia_SetPower Def0000 +S _DAC9_Ia_WriteBlind Def0016 +S DAC9_Ia_WriteBlind2B Def0045 +S _DAC9_Ia_WriteStall Def0050 +S _DAC9_Ia_Start Def0000 +S DAC9_Ia_WriteStall2B Def007F +T 00 00 21 03 4F 08 5D 97 21 FC 2B 00 60 97 5D 93 +R 00 00 00 01 +T 00 0E 21 FC 2B 00 60 93 18 7F 11 FF 4B 19 00 4B +R 00 00 00 01 +T 00 1C 4B 08 78 5B C0 05 73 74 80 05 73 73 80 01 +R 00 00 00 01 +T 00 2A 08 67 67 67 21 1F 4F 27 FE 20 2B FE 5C 18 +R 00 00 00 01 +T 00 38 10 64 64 21 1F 4F 2B FE 31 20 20 38 FF 29 +R 00 00 00 01 +T 00 46 80 4B 29 80 60 94 5B 60 90 7F 11 FF 4B 19 +R 00 00 00 01 +T 00 54 00 4B 4B 08 78 5B C0 05 73 74 80 05 73 73 +R 00 00 00 01 +T 00 62 80 01 08 67 67 67 21 1F 4F 27 FE 20 2B FE +R 00 00 00 01 +T 00 70 5C 18 10 64 64 21 1F 4F 2B FE 31 20 20 38 +R 00 00 00 01 +T 00 7E FF 29 80 4B 29 80 43 65 01 60 94 41 65 FE +R 00 00 00 01 +T 00 8C 5B 60 90 7F 41 97 FC 41 93 FC 7F +R 00 00 00 01 +.end +.start +XH +H 2 areas 12 global symbols +M dac6_vgnd.asm +A text size 0 flags 0 +dbfile lib/dac6_vgnd.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/dac6_vgnd.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/dac6_vgnd.asm +dbfunc 0 ? 0 I +dbfile ./lib/DAC6_VGND.inc +dbfunc 0 ? 0 I +A UserModules size 3D flags 0 +dbfile lib/dac6_vgnd.asm +dbfunc 0 ? 0 I +dbline 77 0 +dbline 78 2 +dbline 79 4 +dbline 7B 6 +dbline 9E 7 +dbline A5 9 +dbline A6 A +dbline A8 C +dbline A9 D +dbline AA E +dbline AB 10 +dbline AD 12 +dbline AE 13 +dbline AF 14 +dbline B0 15 +dbline B2 17 +dbline B7 18 +dbline B8 1A +dbline BA 1C +dbline DF 1D +dbline E6 1F +dbline E7 20 +dbline E8 22 +dbline E9 23 +dbline EA 24 +dbline EB 26 +dbline ED 28 +dbline EE 29 +dbline EF 2A +dbline F0 2B +dbline F2 2D +dbline F7 2E +dbline 2 30 +dbline F9 33 +dbline 2 35 +dbline FC 38 +dbline 117 39 +dbline 119 3C +S $sb$DAC6_VGND_WriteStall Def001D +S $se$DAC6_VGND_WriteStall Def0039 +S $sb$DAC6_VGND_Start Def0000 +S $se$DAC6_VGND_Start Def0007 +S DAC6_VGND_SetPower Def0000 +S _DAC6_VGND_WriteBlind Def0007 +S _DAC6_VGND_WriteStall Def001D +S _DAC6_VGND_Start Def0000 +S _DAC6_VGND_SetPower Def0000 +S DAC6_VGND_Stop Def0039 +S $sb$DAC6_VGND_Stop Def0039 +S $se$DAC6_VGND_Stop Def003D +S DAC6_VGND_WriteBlind Def0007 +S _DAC6_VGND_Stop Def0039 +S DAC6_VGND_WriteStall Def001D +S DAC6_VGND_Start Def0000 +S $sb$DAC6_VGND_WriteBlind Def0007 +S $se$DAC6_VGND_WriteBlind Def001D +T 00 00 21 03 29 30 60 83 7F 11 1F 64 D0 07 73 74 +R 00 00 00 01 +T 00 0E 29 40 80 06 40 40 40 80 01 67 29 80 60 80 +R 00 00 00 01 +T 00 1C 7F 11 1F 64 D0 07 73 74 29 40 80 06 40 40 +R 00 00 00 01 +T 00 2A 40 80 01 67 29 80 43 65 01 60 80 41 65 FE +R 00 00 00 01 +T 00 38 7F 41 83 FC 7F +R 00 00 00 01 +.end +.start +XH +H 2 areas C global symbols +M amux4_1.asm +A text size 0 flags 0 +dbfile lib/amux4_1.asm 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21 FC 2B 00 60 60 18 7F 7F 7F +R 00 00 00 01 +.end +.start +XH +H 2 areas C global symbols +M amux4_0.asm +A text size 0 flags 0 +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbfile ./lib/AMUX4_0.inc +dbfunc 0 ? 0 I +A UserModules size 19 flags 0 +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbline 51 0 +dbline 52 2 +dbline 54 4 +dbline 55 5 +dbline 56 7 +dbline 57 8 +dbline 58 9 +dbline 5B B +dbline 5C C +dbline 60 D +dbline 62 F +dbline 63 11 +dbline 67 13 +dbline 69 15 +dbline 6F 16 +dbline 8B 17 +dbline A7 18 +S AMUX4_0_Stop Def0018 +S $sb$AMUX4_0_Stop Def0018 +S $se$AMUX4_0_Stop Def0019 +S _AMUX4_0_InputSelect Def0000 +S _AMUX4_0_Stop Def0018 +S AMUX4_0_Start Def0017 +S $sb$AMUX4_0_Start Def0017 +S $se$AMUX4_0_Start Def0018 +S _AMUX4_0_Start Def0017 +S AMUX4_0_InputSelect Def0000 +S $sb$AMUX4_0_InputSelect Def0000 +S $se$AMUX4_0_InputSelect Def0017 +T 00 00 21 03 57 00 79 C0 05 64 64 8F FA 4F 08 5D +R 00 00 00 01 +T 00 0E 60 21 FC 2B 00 60 60 18 7F 7F 7F +R 00 00 00 01 +.end +.start +XH +H 3 areas 15 global symbols +M adcincint.asm +A text size 0 flags 0 +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/ADCINC.inc +dbfunc 0 ? 0 I +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A InterruptRAM size D flags 20 +S ADC_Counter Def0008 +S _ADC_IF Def000C +S _ip_x1 Def000B +S Ri_Min_x1 Def000A +S Ri_Max_x1 Def0009 +S _ADCINC_iResult Def0000 +S _ADCINC_fStatus Def0004 +S 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BF 5C +dbline C0 5F +dbline C1 62 +dbline C4 64 +dbline C7 67 +dbline C8 6A +dbline C9 6D +dbline CA 70 +dbline CC 73 +dbline D0 75 +dbline D1 78 +dbline D2 7B +dbline D3 7E +dbline D4 81 +dbline D8 83 +dbline D9 86 +dbline DA 89 +dbline DB 8C +dbline DC 8F +dbline EC 92 +dbline ED 93 +dbline EF 96 +dbline F0 98 +dbline F1 9B +dbline 2 9E +dbline 4 A1 +dbline F3 A4 +dbline F5 A5 +dbline F7 A7 +dbline F8 A9 +dbline F9 AC +dbline 2 AF +dbline 4 B2 +dbline FB B5 +dbline 3 B6 +dbline FF B9 +S _ADCINC_ADConversion_ISR Def0000 +T 00 00 7A 00 05 C0 02 7E 3C 00 06 00 B0 12 08 5D +R 00 00 00 02 01 03 00 01 01 09 00 01 +T 00 0C E5 53 00 03 5D E4 53 00 02 18 55 00 06 01 +R 00 00 00 02 01 04 00 01 01 09 00 01 01 0D 00 01 +T 00 17 55 00 05 03 7E 43 86 20 43 87 10 08 5D E5 +R 00 00 00 02 01 03 00 01 +T 00 24 12 00 03 53 00 03 5D E4 1A 00 02 67 6E +R 00 00 00 02 01 03 00 01 01 06 00 01 01 0B 00 01 +T 00 2E 00 03 06 00 03 80 09 00 39 01 B0 05 78 55 +R 00 00 00 02 01 02 00 01 01 05 00 01 +T 00 3A 00 03 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AB 00 55 00 05 00 41 87 EF 41 86 DF 7E 41 E1 +R 00 00 00 02 01 04 00 01 +T 00 B8 FE 7E +R 00 00 00 02 +.end +.start +XH +H 3 areas 3D global symbols +M adcinc.asm +S ADCINC_bState Ref0000 +S ADCINC_bNumSamples Ref0000 +S ADCINC_iResult Ref0000 +S ADCINC_fStatus Ref0000 +S ADCINC_fMode Ref0000 +A text size 0 flags 0 +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/ADCINC.inc +dbfunc 0 ? 0 I +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A bss size 0 flags 20 +A UserModules size 77 flags 0 +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbline 60 0 +dbline 61 3 +dbline 3 5 +dbline 5 8 +dbline 63 B +dbline 64 E +dbline 66 11 +dbline 7C 12 +dbline 7D 13 +dbline 7E 15 +dbline 7F 16 +dbline 80 18 +dbline 81 1A +dbline 82 1C +dbline 83 1E +dbline 85 1F +dbline 3 20 +dbline 9C 23 +dbline 9D 26 +dbline 9F 29 +dbline 2 2A +dbline 4 2D +dbline B7 30 +dbline B8 33 +dbline B9 36 +dbline BA 38 +dbline BB 3A +dbline BC 3C +dbline 3 3F +dbline 4 42 +dbline C0 45 +dbline 3 46 +dbline 3 49 +dbline 5 4C +dbline DB 4F +dbline 3 50 +dbline F2 52 +dbline 4 53 +dbline 5 56 +dbline 6 58 +dbline 7 5A +dbline 8 5D +dbline 10E 5F +dbline 3 60 +dbline 4 63 +dbline 128 65 +dbline 3 66 +dbline 4 68 +dbline 141 6A +dbline 3 6B +dbline 15A 6D +dbline 3 6E +dbline 4 70 +dbline 172 73 +dbline 2 74 +dbline 18B 76 +S ADCINC_iGetData Def0066 +S _ADCINC_Stop Def0020 +S ADCINC_Start Def0000 +S ADCINC_wGetData Def0066 +S $sb$ADCINC_GetSamples Def002A +S ADCINC_WritePulseWidth Def0074 +S $se$ADCINC_GetSamples Def0046 +S $sb$ADCINC_bGetData Def006B +S $se$ADCINC_bGetData Def006E +S ADCINC_fIsDataAvailable Def0050 +S $sb$ADCINC_iGetData Def0066 +S $se$ADCINC_iGetData Def006B +S _ADCINC_fClearFlag Def006E +S $sb$ADCINC_Start Def0000 +S $se$ADCINC_Start Def0012 +S $sb$ADCINC_WritePulseWidth Def0074 +S $se$ADCINC_WritePulseWidth Def0077 +S ADCINC_SetPower Def0012 +S $sb$ADCINC_fIsDataAvailable Def0050 +S $se$ADCINC_fIsDataAvailable Def0053 +S _ADCINC_GetSamples Def002A +S $sb$ADCINC_SetPower Def0012 +S $se$ADCINC_SetPower Def0020 +S _ADCINC_bGetData Def006B +S _ADCINC_cGetData Def006B +S ADCINC_bClearFlagGetData Def0060 +S ADCINC_cClearFlagGetData Def0060 +S _ADCINC_iGetData Def0066 +S ADCINC_iClearFlagGetData Def0053 +S _ADCINC_Start Def0000 +S ADCINC_StopADC Def0046 +S _ADCINC_wGetData Def0066 +S ADCINC_wClearFlagGetData Def0053 +S _ADCINC_WritePulseWidth Def0074 +S $sb$ADCINC_cClearFlagGetData Def0060 +S _ADCINC_fIsDataAvailable Def0050 +S $se$ADCINC_cClearFlagGetData Def0066 +S $sb$ADCINC_iClearFlagGetData Def0053 +S $se$ADCINC_iClearFlagGetData Def0060 +S $sb$ADCINC_StopADC Def0046 +S $se$ADCINC_StopADC Def0050 +S _ADCINC_SetPower Def0012 +S ADCINC_Stop Def0020 +S _ADCINC_bClearFlagGetData Def0060 +S _ADCINC_cClearFlagGetData Def0060 +S $sb$ADCINC_Stop Def0020 +S _ADCINC_iClearFlagGetData Def0053 +S $se$ADCINC_Stop Def002A +S ADCINC_fClearFlag Def006E +S _ADCINC_StopADC Def0046 +S _ADCINC_wClearFlagGetData Def0053 +S $sb$ADCINC_fClearFlag Def006E +S $se$ADCINC_fClearFlag Def0074 +S ADCINC_GetSamples Def002A +S ADCINC_bGetData Def006B +S ADCINC_cGetData Def006B +T 00 00 43 E7 C0 90 0D 43 86 20 43 87 10 62 21 FF +R 00 00 00 02 +T 00 0E 43 23 01 7F 4F 21 03 08 5D 87 21 FC 2B 00 +R 00 00 00 02 +T 00 1C 60 87 18 7F 41 E1 FE 41 87 FC 41 23 FE 7F +R 00 00 00 02 +T 00 2A 41 87 EF 41 86 DF 55 00 00 00 55 00 00 00 +R 00 00 00 02 03 09 00 04 03 0D 00 00 +T 00 36 53 00 00 5D 22 B0 04 62 22 01 62 DB FE 43 +R 00 00 00 02 03 03 00 01 +T 00 43 E1 01 7F 41 E1 FE 43 86 20 43 87 10 7F 51 +R 00 00 00 02 +T 00 51 00 00 7F 55 00 00 00 58 00 00 51 +R 00 00 00 02 03 02 00 03 03 06 00 03 03 0A 00 02 +T 00 59 00 01 3C 00 00 00 BF F5 7F 55 00 00 00 51 +R 00 00 00 02 03 02 00 02 03 05 00 03 03 0C 00 03 +T 00 64 00 01 7F 58 00 00 51 00 01 7F 51 +R 00 00 00 02 03 02 00 02 03 06 00 02 03 09 00 02 +T 00 6C 00 01 7F 51 00 00 55 00 00 00 7F 60 22 7F +R 00 00 00 02 03 02 00 02 03 06 00 03 03 09 00 03 +.end diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile new file mode 100644 index 0000000..75373f8 --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile @@ -0,0 +1,5 @@ +-F0x30 -g -blit:0x150.0xfff + -bdata:0.0xFF -rwh:SSCParmBlk:0x00F7.0x00FF -O -elim:UserModules + -o"output/SLC_Free_Open_Source" +obj/main.o + ./lib/libPSoc.a -LC:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/lib/SMM C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/lib/CY8C24000B/cms.a C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/lib/SMM/UASW/MAC/arith.a diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/memory.inc b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/memory.inc new file mode 100644 index 0000000..22b5bdd --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/memory.inc @@ -0,0 +1,539 @@ +;;***************************************************************************** +;;***************************************************************************** +;; +;; FILENAME: Memory.inc +;; +;; DESCRIPTION: Memory Model and Stack Parameter Definitions for +;; the CY8C24000 family of PSoC devices. +;; +;; LAST MODIFIED: June 17, 2004 +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** +; +; +; ******** Define Memory Model and Stack parameters ******** +; +SYSTEM_STACK_PAGE: equ 0 +SYSTEM_STACK_BASE_ADDR: equ 0h +SYSTEM_LARGE_MEMORY_MODEL: equ 0 +SYSTEM_SMALL_MEMORY_MODEL: equ 1 +IMAGECRAFT: equ 1 +HITECH: equ 2 +TOOLCHAIN: equ IMAGECRAFT +SYSTEM_TOOLS: equ 1 +SYSTEM_IDXPG_TRACKS_STK_PP: equ 1 +SYSTEM_IDXPG_TRACKS_IDX_PP: equ 0 +SYSTEM_MULTIPAGE_STACK: equ 0 + + +; ******* Function Class Definitions ******* +; +; These definitions are used to describe RAM access patterns. They provide +; documentation and they control prologue and epilogue macros that perform +; the necessary housekeeping functions for a large memory model device like +; the CY8C24000. + +RAM_USE_CLASS_1: equ 1 ; PUSH, POP & I/O access +RAM_USE_CLASS_2: equ 2 ; Indexed address mode on stack page +RAM_USE_CLASS_3: equ 4 ; Indexed address mode to any page +RAM_USE_CLASS_4: equ 8 ; Direct/Indirect address mode access + +; ******* Hi Tech Specific ******* +; Turn on the expansion of all macros by default +IF (TOOLCHAIN & HITECH) +OPT EXPAND +ENDIF +; ******* Page Pointer Manipulation Macros ******* +; +; Most of the following macros are conditionally compiled so they only +; produce code if the large memory model is selected. + + ;----------------------------------------------- + ; Set Stack Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify STK_PP in the large or small memory Models. + ; + ; INPUT: Constant (e.g., SYSTEM_STACK_PAGE) that specifies the RAM page on + ; which stack operations like PUSH and POP store and retrieve their + ; data + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_STK( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[STK_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set Current Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify CUR_PP in the large or small memory Models. + ; + ; INPUT: Constant value (e.g., >bFoo) for the RAM page number used in + ; calculation of effective direct-mode address operands. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_CUR( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[CUR_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set Index Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify IDX_PP in the large or small emory Models. + ; + ; INPUT: Constant value (e.g., >caFoo) for the RAM page number used in + ; calculation of effective index-mode address operands. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_IDX( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[IDX_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set MVI Read Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify MVR_PP in the large or small memory Models. + ; + ; INPUT: Constant value (e.g., >pFoo) for the RAM page number used in + ; calculation of indirect address operands used in the + ; "mvi A, [pFoo]" instructions. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_MVR( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[MVR_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set MVI Write Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify MVW_PP in the large or small memory Models. + ; + ; INPUT: Constant value (e.g., >pFoo) for the RAM page number used in + ; calculation of indirect address operands used in the + ; "mvi [pFoo], A" instructions. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_MVW( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[MVW_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Force Index Page Pointer to Stack Page + ;----------------------------------------------- + ; + ; DESC: Map index-mode operands onto the stack page by modifying IDX_PP. + ; See also RAM_LOCK_INDEX_TO_STACKPAGE. + ; + ; INPUT: None + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_IDX2STK + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + IF ( SYSTEM_MULTIPAGE_STACK ) + mov A, reg[STK_PP] + mov reg[IDX_PP], A + ELSE + RAM_SETPAGE_IDX SYSTEM_STACK_PAGE + ENDIF + ENDIF + endm + + ;----------------------------------------------- + ; Change Memory Mode + ;----------------------------------------------- + ; + ; DESC: Modify FLAG_PAGEMODE bits in the large and small memory Models. + ; + ; INPUT: Constant value for PGMODE bitfield of CPU Flag register, F. + ; See FLAG_PGMODE_{x} constants in M8C.INC. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_CHANGE_PAGE_MODE( MODE ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state + or F, FLAG_PGMODE_MASK & @MODE + ENDIF + endm + + ;----------------------------------------------- + ; Set Large Memory Model Native Paging Mode + ;----------------------------------------------- + ; + ; DESC: Changes the FLAG_PAGEMODE bits to enter the native LMM RAM + ; paging mode *IFF* a simple "OR" is guaranteed to work---for + ; example, in an ISR, when the PGMODE bits have been cleared + ; to zero. If a simple "OR" is not guaranteed to work, use + ; the slower RAM_RESTORE_NATIVE_PAGING instead. + ; + ; INPUT: none + ; + ; COST: 4 instruction cycles (in LMM only) + + macro RAM_SET_NATIVE_PAGING + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + IF ( SYSTEM_IDXPG_TRACKS_STK_PP ) + or F, FLAG_PGMODE_11b ; LMM w/ IndexPage<==>StackPage + ENDIF ; PGMODE LOCKED + IF ( SYSTEM_IDXPG_TRACKS_IDX_PP ) + or F, FLAG_PGMODE_10b ; LMM with independent IndexPage + ENDIF ; PGMODE FREE + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Restore Large Memory Model Native Paging Mode + ;----------------------------------------------- + ; + ; DESC: Changes the FLAG_PAGEMODE bits to enter the native LMM RAM + ; paging mode. Always works because it clears the PGMODE bits + ; before OR-ing in the new ones. See RAM_RESTORE_NATIVE_PAGING + ; for a faster method. + ; + ; INPUT: none + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_RESTORE_NATIVE_PAGING + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + IF ( SYSTEM_IDXPG_TRACKS_STK_PP ) + RAM_CHANGE_PAGE_MODE FLAG_PGMODE_11b ; LMM w/ IndexPage<==>StackPage + ENDIF ; PGMODE LOCKED + IF ( SYSTEM_IDXPG_TRACKS_IDX_PP ) + RAM_CHANGE_PAGE_MODE FLAG_PGMODE_10b ; LMM with independent IndexPage + ENDIF ; PGMODE FREE + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Force indexed addr mode operands to Stack Pg + ;----------------------------------------------- + ; + ; DESC: Force instructions that use indexed address mode to reference the + ; stack page (as defined by STK_PP). This macro sets the "Indexed + ; Stack Mode" bit (LSB) of the PGMODE bit field in the CPU Flag + ; register, F. (See also RAM_SETPAGE_IDX2STK, above.) + ; + ; INPUT: none + ; + ; COST: 4 instruction cycles (in LMM only) + + macro RAM_X_POINTS_TO_STACKPAGE + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + or F, FLAG_PGMODE_01b + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Force indexed addr mode operands to Index Pg + ;----------------------------------------------- + ; + ; DESC: Permit instructions that use indexed address mode to reference page + ; zero or the page pointed to by the IDX_PP register, depending on the + ; setting of the MSb (or "Direct Page Mode" bit) of the PGMODE bits + ; in the CPU Flag register, F. (This macro clears the PGMODE LSb.) + ; + ; INPUT: none + ; + ; COST: 4 instruction cycles (in LMM only) + + macro RAM_X_POINTS_TO_INDEXPAGE + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + and F, ~FLAG_PGMODE_01b + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Function Prologue + ;----------------------------------------------- + ; + ; Prologue for functions that run in the LMM and SMM. + ; + + macro RAM_PROLOGUE( ACTUAL_CLASS ) + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_1 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 ) + IF ( SYSTEM_IDXPG_TRACKS_IDX_PP ) + RAM_X_POINTS_TO_STACKPAGE ; exit native paging mode! + ENDIF + ENDIF ; RAM_USE_CLASS_2 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 ) + IF ( SYSTEM_IDXPG_TRACKS_STK_PP ) + RAM_X_POINTS_TO_INDEXPAGE ; exit native paging mode! + ENDIF + ENDIF ; RAM_USE_CLASS_3 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_4 + + endm + + ;----------------------------------------------- + ; Function Epilogue + ;----------------------------------------------- + ; + ; Prologue for functions that run in the LMM and SMM. + ; + + macro RAM_EPILOGUE( ACTUAL_CLASS ) + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_1 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 ) + RAM_RESTORE_NATIVE_PAGING + ENDIF ; RAM_USE_CLASS_2 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 ) + RAM_RESTORE_NATIVE_PAGING + ENDIF ; RAM_USE_CLASS_3 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_4 + + endm + + ;----------------------------------------------- + ; Preserve Register + ;----------------------------------------------- + ; + ; DESC: Preserve a register value on the stack + ; + ; INPUT: Name or address of register in I/O Space + ; The I/O bank is an implicit parameter. That is, this function will + ; Access the I/O bank currently specified by the CPU Flag register. + ; + ; USES: CPU 'A' register + ; + ; COST: 9 instruction cycles + + macro REG_PRESERVE( IOReg ) + mov A, reg[ @IOReg ] + push A + endm + + ;----------------------------------------------- + ; Restore Register + ;----------------------------------------------- + ; + ; DESC: Restore a register value from the stack + ; + ; INPUT: Name or address of register in I/O Space + ; The I/O bank is an implicit parameter. That is, this function will + ; Access the I/O bank currently specified by the CPU Flag register. + ; + ; USES: CPU 'A' register + ; + ; COST: 10 instruction cycles + + macro REG_RESTORE( IOReg ) + pop A + mov reg[ @IOReg ], A + endm + + ;----------------------------------------------- + ; Preserve Volatile Page Pointer Registers + ;----------------------------------------------- + ; + ; DESC: Invoked by ISRs before switching to the LMM mode and calling + ; functions that require on it. + ; + ; INPUT: none + ; + ; USES: CPU 'A' register + ; + ; COST: 45 instruction cycles (in LMM only) + + macro ISR_PRESERVE_PAGE_POINTERS + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + REG_PRESERVE CUR_PP + REG_PRESERVE IDX_PP + REG_PRESERVE MVR_PP + REG_PRESERVE MVW_PP + ENDIF + endm + + ;----------------------------------------------- + ; Restore Volatile Page Pointer Registers + ;----------------------------------------------- + ; + ; DESC: Undo for RAM_PRESERVE_PAGE_POINTERS macro. Invoked by ISRs after + ; calling functions that run in the LMM mode and before executing + ; the RETI instruction. + ; + ; INPUT: none + ; + ; USES: CPU 'A' register + ; + ; COST: 50 instruction cycles (in LMM only) + + macro ISR_RESTORE_PAGE_POINTERS + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + REG_RESTORE MVW_PP + REG_RESTORE MVR_PP + REG_RESTORE IDX_PP + REG_RESTORE CUR_PP + ENDIF + endm + +; end of file Memory.inc +; ******* Extra macros for Memory.inc ******* +; +; Most of the following macros are conditionally compiled so they +; only produce code if the large memory model is selected. + +;----------------------------------------------- +; PRESERVE_CPU_CONTEXT Macro +;----------------------------------------------- +; +; DESC: Preserves CPU context for C function calls from ISRs. +; Also sets the paging mode to the native paging mode. +; All virtual registers and A are preserved. In LMM mode +; all page pointers are preserved. X is not preserved, +; but is preserved within any ImageCraft function call +; automatically by the compiler. +; +; INPUT: N/A +; +; COST: 190 instruction cycles (in LMM+ImageCraft only) +; 20 bytes stack usage (in LMM+ImageCraft only) +; 59 bytes of flash (in LMM+ImageCraft only) +; 155 instruction cycles (in SMM+ImageCraft only) +; 16 bytes stack usage (in SMM+ImageCraft only) +; 46 bytes of flash (in SMM+ImageCraft only) + +macro PRESERVE_CPU_CONTEXT +IF ( TOOLCHAIN & IMAGECRAFT ) + PUSH A + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + ISR_PRESERVE_PAGE_POINTERS + RAM_RESTORE_NATIVE_PAGING + MOV reg[CUR_PP], >__r0 ;Set CUR_PP to same page as virtual registers + ENDIF + MOV A, [__r0] + PUSH A + MOV A, [__r1] + PUSH A + MOV A, [__r2] + PUSH A + MOV A, [__r3] + PUSH A + MOV A, [__r4] + PUSH A + MOV A, [__r5] + PUSH A + MOV A, [__r6] + PUSH A + MOV A, [__r7] + PUSH A + MOV A, [__r8] + PUSH A + MOV A, [__r9] + PUSH A + MOV A, [__r10] + PUSH A + MOV A, [__r11] + PUSH A + MOV A, [__rX] + PUSH A + MOV A, [__rY] + PUSH A + MOV A, [__rZ] + PUSH A + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + MOV REG[CUR_PP], 0 + ENDIF +ENDIF +endm + +;----------------------------------------------- +; RESTORE_CPU_CONTEXT Macro +;----------------------------------------------- +; +; DESC: Restores CPU context for C function calls from ISRs. +; Intended to be used in a pair with the PRESERVE_CPU_CONTEXT +; macro. +; +; INPUT: N/A +; +; COST: 185 instruction cycles (in LMM+ImageCraft only) +; 58 bytes of flash (in LMM+ImageCraft only) +; 155 instruction cycles (in SMM+ImageCraft only) +; 46 bytes of flash (in SMM+ImageCraft only) + +macro RESTORE_CPU_CONTEXT +IF ( TOOLCHAIN & IMAGECRAFT ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + RAM_RESTORE_NATIVE_PAGING + MOV reg[CUR_PP], >__r0 ;Set CUR_PP to same page as virtual registers + ENDIF + POP A + MOV [__rZ], A + POP A + MOV [__rY], A + POP A + MOV [__rX], A + POP A + MOV [__r11], A + POP A + MOV [__r10], A + POP A + MOV [__r9], A + POP A + MOV [__r8], A + POP A + MOV [__r7], A + POP A + MOV [__r6], A + POP A + MOV [__r5], A + POP A + MOV [__r4], A + POP A + MOV [__r3], A + POP A + MOV [__r2], A + POP A + MOV [__r1], A + POP A + MOV [__r0], A + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + ISR_RESTORE_PAGE_POINTERS + AND F, FLAG_PGMODE_0 + ENDIF + POP A +ENDIF +endm + +; end of extra macros to file Memory.inc \ No newline at end of file diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/mkdep b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/mkdep new file mode 100644 index 0000000..d6f3598 --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/mkdep @@ -0,0 +1 @@ +-a -f project.dep -p./std/obj/ -o.o -- -IC:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include -I./lib -I./std -I. -IC:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1 -- diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg similarity index 98% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg index 5b7a315..11e6edf 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg @@ -68,12 +68,12 @@ LINE 460 CF LINE 476 D1 LINE 478 D3 FILE memory.inc -DIR C:\PROGRA~1\Cypress\PSOCDE~2\5.3\Common\CY3E64~1\tools\include\CY8C24~3\ +DIR C:\PROGRA~2\Cypress\PSOCDE~1\5.4\Common\CYPRES~1\tools\include\CY8C24~1\ FILE m8ssc.inc FILE m8c.inc DIR .\lib\ FILE GlobalParams.inc -DIR C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\ +DIR C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\ FILE main.c FUNC Heater_PID 896 fV LINE 83 896 diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.hex b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.hex similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.hex rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.hex diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst similarity index 99% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst index 7c6cdad..2ab2d54 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst @@ -6150,7 +6150,7 @@ FILE: lib\adcinc.asm (0001) ;;******************************* (0396) .ENDSECTION (0397) (0398) ; End of File ADCINC.asm -FILE: C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\main.c +FILE: C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\main.c (0001) //---------------------------------------------------------------------------- (0002) // C main line (0003) //---------------------------------------------------------------------------- diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp similarity index 99% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp index ba3ab51..9006226 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp @@ -1,6 +1,6 @@ Project: output/SLC_Free_Open_Source Build Number: 0 -Date: Wed Dec 18 12:54:07 2013 +Date: Mon Nov 12 11:18:46 2018 Compiler: ICCM8C Version: 7.05.00 diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep new file mode 100644 index 0000000..e3b2c41 --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep @@ -0,0 +1,65 @@ +# DO NOT DELETE +./obj/boot.o : \ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8ssc.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\lib\GLOBAL~1.INC\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./obj/main.o : ./lib/ADCINC.h ./lib/AMUX4_0.h ./lib/AMUX4_1.h\ + ./lib/DAC6_V~1.H ./lib/DAC9_Ia.h ./lib/INSAMP.h ./lib/LCD.h\ + ./lib/PSoCAPI.h ./lib/PSOCGP~1.H ./lib/PWM8_H~1.H ./lib/PWM8_N~1.H\ + ./lib/PWM8_V~1.H ./lib/SLEEPT~1.H\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/M8C.h\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.h +./lib/obj/adcinc.o : ./lib/ADCINC.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/adcincint.o : ./lib/ADCINC.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/amux4_0.o : ./lib/AMUX4_0.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/amux4_1.o : ./lib/AMUX4_1.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/dac6_vgnd.o : ./lib/DAC6_V~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/dac9_ia.o : ./lib/DAC9_Ia.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/insamp.o : ./lib/INSAMP.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/lcd.o : ./lib/LCD.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/psocconfig.o : ./lib/GLOBAL~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/psocconfigtbl.o : \ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +./lib/obj/pwm8_heater.o : ./lib/PWM8_H~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_heaterint.o : ./lib/PWM8_H~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_nb_out.o : ./lib/PWM8_N~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_nb_outint.o : ./lib/PWM8_N~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_vout.o : ./lib/PWM8_V~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_voutint.o : ./lib/PWM8_V~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/sleeptimer.o : ./lib/SLEEPT~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/sleeptimerint.o : ./lib/SLEEPT~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\DEC_18~1\SLC_FR~2\SLC_FR~1\SLC_FR~1\memory.inc diff --git a/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk new file mode 100644 index 0000000..979d7f6 --- /dev/null +++ b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk @@ -0,0 +1,30 @@ +PROJNAME=SLC_Free_Open_Source +DEVICE=CY8C24423B +BASEDEVICE=CY8C24000B +PROJPATH=C:/Users/ELITEB~1/Dev/LAMBDA~1/SLC_FR~1/DEC_18~1/SLC_FR~2/SLC_FR~1/SLC_FR~1 +PSOCDIR=C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1 +INCLUDE_PATH=C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1 +CSRCS= main.c +LIBCSRCS= +STDCSRCS= +ASMSRCS= +LIBASMSRCS= adcinc.asm adcincint.asm amux4_0.asm amux4_1.asm dac6_vgnd.asm dac9_ia.asm insamp.asm lcd.asm psocconfig.asm psocconfigtbl.asm pwm8_heater.asm pwm8_heaterint.asm pwm8_nb_out.asm pwm8_nb_outint.asm pwm8_vout.asm pwm8_voutint.asm sleeptimer.asm sleeptimerint.asm +STDASMSRCS= +OBJECT_SOURCES= main.c +FILLVALUE=0x30 +LASTROM=0xfff +LASTRAM=0xff +CODECOMPRESSOR=-O -elim:UserModules +MORE_CFLAGS= +RELSTART=0x150 +INC_PATH= +CDEFINES= +LIBS= +UMLIBS= +LIB_PATH= +ENABLE_ALIGN_SHIFT=0 +LMM= +SYS_INC_CONTENTS:=SYSTEM_STACK_PAGE:_equ_0 SYSTEM_STACK_BASE_ADDR:_equ_0h SYSTEM_LARGE_MEMORY_MODEL:_equ_0 SYSTEM_SMALL_MEMORY_MODEL:_equ_1 IMAGECRAFT:_equ_1 HITECH:_equ_2 TOOLCHAIN:_equ_IMAGECRAFT +SYSTEM_TOOLS=1 +CSFLOW=on +CONFIG_NAMES=slc_free_28_pin_feb_16_2013 diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml b/Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml rename to Dec_18_2013/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml diff --git a/SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip b/Dec_18_2013/SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip similarity index 100% rename from SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip rename to Dec_18_2013/SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip diff --git a/June_16_2014/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd b/June_16_2014/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd new file mode 100644 index 0000000..e544b60 --- /dev/null +++ b/June_16_2014/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.brd @@ -0,0 +1,3727 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +5v +Gnd +Prog Header +Unused Pin Header +5v +Gnd +P0[4] +P1[3] +P1[7] +P2[7] +SENSOR +POWER+OUTPUT + +www.14Point7.com + +SCL +SDA + + + + +SLC_Free_PCB_v1.01 + + + +<b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0> +<tr valign="top"> + +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + -<BR> + -<BR> + 63H<BR> + 63P<BR> + -<BR> + -<BR> + 63X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P>&nbsp;<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3> + <TR> + <TD COLSPAN=7> + <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3314G<BR> + 3314J<BR> + 3364A/B<BR> + 3364C/D<BR> + 3364W/X<BR> + 3313G<BR> + 3313J<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 23B<BR> + 23A<BR> + 21X<BR> + 21W<BR> + -<BR> + 22B<BR> + 22A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST5YL/ST53YL<BR> + ST5YJ/5T53YJ<BR> + ST-23A<BR> + ST-22B<BR> + ST-22<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST-4B<BR> + ST-4A<BR> + -<BR> + -<BR> + -<BR> + ST-3B<BR> + ST-3A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVM-6YS<BR> + EVM-1E<BR> + EVM-1G<BR> + EVM-1D<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + G4B<BR> + G4A<BR> + TR04-3S1<BR> + TRG04-2S1<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + DVR-43A<BR> + CVR-42C<BR> + CVR-42A/C<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P> +<FONT SIZE=4 FACE=ARIAL><B>ALT =&nbsp;ALTERNATE</B></FONT> +<P> + +&nbsp; +<P> +</td> +</tr> +</table> + + +<b>RESISTOR</b><p> +type 0204, grid 7.5 mm + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +<b>CAPACITOR</b><p> +grid 2.5 mm, outline 2.5 x 5 mm + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +<b>ELECTROLYTIC CAPACITOR</b><p> +grid 2.032 mm, diameter 5 mm + + + + + + + + + + + + +>NAME +>VALUE + + + + + +<b>Linear Devices</b><p> +Operational amplifiers, comparators, voltage regulators, ADCs, DACs, etc.<p> +<author>Created by librarian@cadsoft.de</author> + + +<b>TO-220</b> + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + +<b>IC Packages an Sockets</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>Dual In Line Package Small</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +<b>Diodes</b><p> +Based on the following sources: +<ul> +<li>Motorola : www.onsemi.com +<li>Fairchild : www.fairchildsemi.com +<li>Philips : www.semiconductors.com +<li>Vishay : www.vishay.de +</ul> +<author>Created by librarian@cadsoft.de</author> + + +<B>DIODE</B><p> +diameter 2.54 mm, horizontal, grid 10.16 mm + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + +<b>Power Transistors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>Molded Package</b><p> +grid 2.54 mm + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE +A17,5mm + + + + + + + + + + + + + +<b>Pin Header Connectors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>PIN HEADER</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + +<b>PIN HEADER</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + +<b>PIN HEADER</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + + + + + + + + + + + +<b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<map name="nav_main"> +<area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""> +<area shape="rect" coords="0,24,140,51" href="../about.asp" title=""> +<area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""> +<area shape="rect" coords="0,78,139,103" href="../products.asp" title=""> +<area shape="rect" coords="1,102,138,128" href="../excess_inventory.asp" title=""> +<area shape="rect" coords="1,129,138,150" href="../edge.asp" title=""> +<area shape="rect" coords="1,151,139,178" href="../industry_links.asp" title=""> +<area shape="rect" coords="0,179,139,201" href="../comments.asp" title=""> +<area shape="rect" coords="1,203,138,231" href="../directory.asp" title=""> +<area shape="default" nohref> +</map> + +<html> + +<title></title> + + <LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"> + +<body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"> +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"> +<tr valign="top"> + +</td> +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 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-<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> 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SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> 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+ CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + 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REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3314G<BR> + 3314J<BR> + 3364A/B<BR> + 3364C/D<BR> + 3364W/X<BR> + 3313G<BR> + 3313J<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 23B<BR> + 23A<BR> + 21X<BR> + 21W<BR> + -<BR> + 22B<BR> + 22A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST5YL/ST53YL<BR> + ST5YJ/5T53YJ<BR> + ST-23A<BR> + ST-22B<BR> + ST-22<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST-4B<BR> + ST-4A<BR> + -<BR> + -<BR> + -<BR> + ST-3B<BR> + ST-3A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVM-6YS<BR> + EVM-1E<BR> + EVM-1G<BR> + EVM-1D<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + G4B<BR> + G4A<BR> + TR04-3S1<BR> + TRG04-2S1<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + DVR-43A<BR> + CVR-42C<BR> + CVR-42A/C<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P> +<FONT SIZE=4 FACE=ARIAL><B>ALT =&nbsp;ALTERNATE</B></FONT> +<P> + +&nbsp; +<P> +</td> +</tr> +</table> +</BODY></HTML> + + +<b>RESISTOR</b><p> +type 0309, grid 12.5 mm + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + + + + + + +<b>EAGLE Design Rules</b> +<p> +Die Standard-Design-Rules sind so gewählt, dass sie für +die meisten Anwendungen passen. Sollte ihre Platine +besondere Anforderungen haben, treffen Sie die erforderlichen +Einstellungen hier und speichern die Design Rules unter +einem neuen Namen ab. +<b>EAGLE Design Rules</b> +<p> +The default Design Rules have been set to cover +a wide range of applications. Your particular design +may have different requirements, so please make the +necessary adjustments and save your customized +design rules under a new name. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/June_16_2014/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch b/June_16_2014/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch new file mode 100644 index 0000000..b11eeac --- /dev/null +++ b/June_16_2014/SLC_Free_Eagle_Layout_PCB_Files/SLC_Free_PCB.sch @@ -0,0 +1,17516 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0> +<tr valign="top"> + +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + 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FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + -<BR> + -<BR> + 63H<BR> + 63P<BR> + -<BR> + -<BR> + 63X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P>&nbsp;<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3> + <TR> + <TD COLSPAN=7> + <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3314G<BR> + 3314J<BR> + 3364A/B<BR> + 3364C/D<BR> + 3364W/X<BR> + 3313G<BR> + 3313J<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 23B<BR> + 23A<BR> + 21X<BR> + 21W<BR> + -<BR> + 22B<BR> + 22A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST5YL/ST53YL<BR> + ST5YJ/5T53YJ<BR> + ST-23A<BR> + ST-22B<BR> + ST-22<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST-4B<BR> + ST-4A<BR> + -<BR> + -<BR> + -<BR> + ST-3B<BR> + ST-3A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVM-6YS<BR> + EVM-1E<BR> + EVM-1G<BR> + EVM-1D<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + G4B<BR> + G4A<BR> + TR04-3S1<BR> + TRG04-2S1<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + DVR-43A<BR> + CVR-42C<BR> + CVR-42A/C<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P> +<FONT SIZE=4 FACE=ARIAL><B>ALT =&nbsp;ALTERNATE</B></FONT> +<P> + +&nbsp; +<P> +</td> +</tr> +</table> +</BODY></HTML> + + +<b>RESISTOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + +<b>RESISTOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + +<b>RESISTOR</b><p> +chip + + + + + + + + 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a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep new file mode 100644 index 0000000..7030a0e --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt similarity index 94% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt rename to June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt index 181ae25..06e9875 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt @@ -69,9 +69,9 @@ symbol INSAMP_SetGain is unused symbol DAC6_VGND_WriteBlind is unused 603 bytes unused code deleted no worthwhile duplicate found - ROM 89% full. 3607 out of 4096 bytes used (does not include absolute areas). + ROM 84% full. 3436 out of 4096 bytes used (does not include absolute areas). RAM 40% full. 101 bytes used (does not include stack usage). Built with ICCM8C STD V7.05.00 -SLC_Free_Open_Source - 0 error(s) 0 warning(s) 12:54:08 +SLC_Free_Open_Source - 0 error(s) 0 warning(s) 21:45:04 diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml new file mode 100644 index 0000000..3a598b7 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml @@ -0,0 +1,657 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc new file mode 100644 index 0000000..9633b91 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc @@ -0,0 +1,112 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+ + + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.asm new file mode 100644 index 0000000..216e2ae --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.asm @@ -0,0 +1,398 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.asm +;; Version: 1.1, Updated on 2006/02/03 at 09:10:49 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler source for the ADCINC A/D Converter +;; User Module with 1st-order modulator. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API +;; function returns. Even though these registers may be preserved now, +;; there is no guarantee they will be preserved in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" + +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export ADCINC_Start +export _ADCINC_Start +export ADCINC_SetPower +export _ADCINC_SetPower +export ADCINC_Stop +export _ADCINC_Stop +export ADCINC_GetSamples +export _ADCINC_GetSamples +export ADCINC_StopADC +export _ADCINC_StopADC +export ADCINC_fIsDataAvailable +export _ADCINC_fIsDataAvailable +export ADCINC_iClearFlagGetData +export _ADCINC_iClearFlagGetData +export ADCINC_wClearFlagGetData +export _ADCINC_wClearFlagGetData +export ADCINC_cClearFlagGetData +export _ADCINC_cClearFlagGetData +export ADCINC_bClearFlagGetData +export _ADCINC_bClearFlagGetData +export ADCINC_iGetData +export _ADCINC_iGetData +export ADCINC_wGetData +export _ADCINC_wGetData +export ADCINC_bGetData +export _ADCINC_bGetData +export ADCINC_cGetData +export _ADCINC_cGetData +export ADCINC_fClearFlag +export _ADCINC_fClearFlag +export ADCINC_WritePulseWidth +export _ADCINC_WritePulseWidth + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Start +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +; and starts the PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Start: +_ADCINC_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + or reg[DEC_CR1],c0h + call ADCINC_SetPower + ADCINC_RESET_INTEGRATOR_M + mov reg[ADCINC_PWMdr1],ffh + or reg[ADCINC_PWMcr0],01h ; start PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_SetPower +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_SetPower: +_ADCINC_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Set up Stack frame + and A,03h ; Ensure value is legal + push A + mov A,reg[ADCINC_AtoDcr3] ; First SC block: + and A,~03h ; clear power bits to zero + or A,[ X ] ; establish new value + mov reg[ADCINC_AtoDcr3],A ; change the actual setting + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Stop +; +; DESCRIPTION: Removes power from the module's analog PSoc block. +; and turns off PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Stop: +_ADCINC_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + and reg[ADCINC_AtoDcr3], ~03h + and reg[ADCINC_PWMcr0], ~01h ; stop PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_GetSamples +; +; DESCRIPTION: Activates interrupts for this user module and begins sampling. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: A register contain number of samples +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_GetSamples: +_ADCINC_GetSamples: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >ADCINC_fMode + ADCINC_ENABLE_INTEGRATOR_M + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + mov [ADCINC_bNumSamples],A + mov A, reg[ADCINC_PWMdr2] + jnz .SkipPulseWrite + mov reg[ADCINC_PWMdr2], 1 +.SkipPulseWrite: + ADCINC_STARTADC_M ;enable interrupt + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_StopADC +; +; DESCRIPTION: Shuts down the A/D is an orderly manner. The interrupt +; is disabled but the PWM output is still active. +; Integrator is reset +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_StopADC: +_ADCINC_StopADC: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + ADCINC_RESET_INTEGRATOR_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fIsDataAvailable +; +; DESCRIPTION: Returns the status of the A/D Data +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall BOOL DataAvailable returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fIsDataAvailable: +_ADCINC_fIsDataAvailable: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fIsDataAvailable_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iClearFlagGetData +; ADCINC_wClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +; Flag is checked after trandfer to insure valid data. +; available. Also clears the DATA_READY flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iClearFlagGetData: +_ADCINC_iClearFlagGetData: + ADCINC_wClearFlagGetData: +_ADCINC_wClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_iClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_cClearFlagGetData +; ADCINC_bClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_cClearFlagGetData: +_ADCINC_cClearFlagGetData: + ADCINC_bClearFlagGetData: +_ADCINC_bClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_bClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iGetData +; ADCINC_wGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult is returned in the X,A registers +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iGetData: +_ADCINC_iGetData: + ADCINC_wGetData: +_ADCINC_wGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_wGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_bGetData +; ADCINC_cGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall CHAR cData returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_bGetData: +_ADCINC_bGetData: + ADCINC_cGetData: +_ADCINC_cGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_cGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fClearFlag +; +; DESCRIPTION: Clears the data ready flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The DATA_READY flag is cleared. +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fClearFlag: +_ADCINC_fClearFlag: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fClearFlag_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_WritePulseWidth +; +; DESCRIPTION: +; Write the 8-bit period value into the compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_WritePulseWidth: +_ADCINC_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_WritePulseWidth_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File ADCINC.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.h new file mode 100644 index 0000000..c25e7c9 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.h @@ -0,0 +1,91 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: ADCINC.h +// Version: 1.20, Updated on 2012/9/21 at 11:56:47 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: C declarations for the ADCINC User Module with +// a 1st-order modulator. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef ADCINC_INCLUDE +#define ADCINC_INCLUDE + +#include + +#pragma fastcall16 ADCINC_Start +#pragma fastcall16 ADCINC_SetPower +#pragma fastcall16 ADCINC_Stop +#pragma fastcall16 ADCINC_GetSamples +#pragma fastcall16 ADCINC_StopADC +#pragma fastcall16 ADCINC_fIsDataAvailable +#pragma fastcall16 ADCINC_iClearFlagGetData +#pragma fastcall16 ADCINC_wClearFlagGetData +#pragma fastcall16 ADCINC_cClearFlagGetData +#pragma fastcall16 ADCINC_bClearFlagGetData +#pragma fastcall16 ADCINC_iGetData +#pragma fastcall16 ADCINC_wGetData +#pragma fastcall16 ADCINC_cGetData +#pragma fastcall16 ADCINC_bGetData +#pragma fastcall16 ADCINC_fClearFlag +#pragma fastcall16 ADCINC_WritePulseWidth + +//------------------------------------------------- +// Prototypes of the ADCINC API. +//------------------------------------------------- +extern void ADCINC_Start(BYTE bPower); +extern void ADCINC_SetPower(BYTE bPower); +extern void ADCINC_Stop(void); +extern void ADCINC_GetSamples(BYTE bNumSamples); +extern void ADCINC_StopADC(void); +extern BYTE ADCINC_fIsDataAvailable(void); +extern INT ADCINC_iClearFlagGetData(void); +extern WORD ADCINC_wClearFlagGetData(void); +extern CHAR ADCINC_cClearFlagGetData(void); +extern BYTE ADCINC_bClearFlagGetData(void); +extern INT ADCINC_iGetData(void); +extern WORD ADCINC_wGetData(void); +extern CHAR ADCINC_cGetData(void); +extern BYTE ADCINC_bGetData(void); +extern BYTE ADCINC_fClearFlag(void); +extern void ADCINC_WritePulseWidth(BYTE bPulseWidthValue); + +//------------------------------------------------- +// Defines for ADCINC API's. +//------------------------------------------------- +#define ADCINC_OFF 0 +#define ADCINC_LOWPOWER 1 +#define ADCINC_MEDPOWER 2 +#define ADCINC_HIGHPOWER 3 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- +#pragma ioport ADCINC_PWMdr0: 0x020 //Period reg +BYTE ADCINC_PWMdr0; +#pragma ioport ADCINC_PWMdr1: 0x021 //1_ADDRh ; Down count reg +BYTE ADCINC_PWMdr1; +#pragma ioport ADCINC_PWMdr2: 0x022 //Compare reg +BYTE ADCINC_PWMdr2; +#pragma ioport ADCINC_PWMcr0: 0x023 //Control reg +BYTE ADCINC_PWMcr0; +#pragma ioport ADCINC_PWMfn: 0x120 //Function reg +BYTE ADCINC_PWMfn; +#pragma ioport ADCINC_PWMsl: 0x121 //Input select reg +BYTE ADCINC_PWMsl; +#pragma ioport ADCINC_PWMos: 0x122 //Output select reg +BYTE ADCINC_PWMos; +#pragma ioport ADCINC_AtoDcr0: 0x084 //SC Block Control Reg 0 +BYTE ADCINC_AtoDcr0; +#pragma ioport ADCINC_AtoDcr1: 0x085 //SC Block Control Reg 1 +BYTE ADCINC_AtoDcr1; +#pragma ioport ADCINC_AtoDcr2: 0x086 //SC Block Control Reg 2 +BYTE ADCINC_AtoDcr2; +#pragma ioport ADCINC_AtoDcr3: 0x087 //SC Block Control Reg 3 +BYTE ADCINC_AtoDcr3; + +#endif +// end of file ADCINC.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.inc new file mode 100644 index 0000000..6cefac2 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.inc @@ -0,0 +1,149 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.inc +;; Version: 1.20, Updated on 2012/9/21 at 11:56:47 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the ADCINC A/D Converter +;; User Module with a 1st-order modulator. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +;-------------------------------------------------- +; Constants for ADCINC API's. +;-------------------------------------------------- + +ADCINC_OFF: equ 00h +ADCINC_LOWPOWER: equ 01h +ADCINC_MEDPOWER: equ 02h +ADCINC_HIGHPOWER: equ 03h + +ADCINC_bNUMBITS: equ 08h +ADCINC_NoAZ: equ 1 +ADCINC_SIGNED_DATA: equ 0 +ADCINC_9_OR_MORE_BITS: equ ((08h - 1)& 08h) +ADCINC_8_OR_MORE_BITS: equ ((08h )& 08h) +;-------------------------------------------------- +; Register Address Constants for ADCINC +;-------------------------------------------------- +ADCINC_ISR_MASK: equ 01h +ADCINC_ISR_REG: equ 0e1h +ADCINC_CLR_REG: equ (((ADCINC_ISR_REG & 038h)/8)^0dfh) + +ADCINC_PWMdr0: equ 20h ; Period reg +ADCINC_PWMdr1: equ 21h ; Down count reg +ADCINC_PWMdr2: equ 22h ; Compare reg +ADCINC_PWMcr0: equ 23h ; Control reg +ADCINC_PWMfn: equ 20h ; Function reg +ADCINC_PWMsl: equ 21h ; Input select reg +ADCINC_PWMos: equ 22h ; Output select reg + +ADCINC_AtoDcr0: equ 84h ; SC Block Control Reg 0 +ADCINC_AtoDcr1: equ 85h ; SC Block Control Reg 1 +ADCINC_AtoDcr2: equ 86h ; SC Block Control Reg 2 +ADCINC_AtoDcr3: equ 87h ; SC Block Control Reg 3 + +HighByte: equ 0 +LowByte: equ 1 + +macro ADCINC_fIsDataAvailable_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] +endm + + +macro ADCINC_iGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_wGetData_M + ADCINC_iGetData_M +endm + + +macro ADCINC_cGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bGetData_M + ADCINC_cGetData_M +endm + + +macro ADCINC_fClearFlag_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] + mov [ADCINC_fStatus],00h +endm + + +macro ADCINC_iClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + .repeat: + mov [ADCINC_fStatus],00h + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] + cmp [ADCINC_fStatus],00h + .until: jnz .repeat +endm + + +macro ADCINC_wClearFlagGetData_M + ADCINC_iClearFlagGetData_M +endm + + +macro ADCINC_cClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov [ADCINC_fStatus],00h + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bClearFlagGetData_M + ADCINC_cClearFlagGetData_M +endm + +macro ADCINC_ENABLE_INTEGRATOR_M + and reg[ADCINC_AtoDcr3],~10h + IF ADCINC_NoAZ + and reg[ADCINC_AtoDcr2],~20h + ENDIF +endm + + +macro ADCINC_RESET_INTEGRATOR_M + IF ADCINC_NoAZ + or reg[ADCINC_AtoDcr2],20h + ENDIF + or reg[ADCINC_AtoDcr3],10h +endm + + +macro ADCINC_STARTADC_M + ;Enable PWM interrupt + mov reg[ADCINC_CLR_REG],~(ADCINC_ISR_MASK) + or reg[ADCINC_ISR_REG], (ADCINC_ISR_MASK) +endm + + +macro ADCINC_STOPADC_M + ;Disable PWM interrupt + and reg[ADCINC_ISR_REG],~(ADCINC_ISR_MASK) +endm + + +macro ADCINC_WritePulseWidth_M + mov reg[ADCINC_PWMdr2],A +endm + +; end of file ADCINC.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcincint.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcincint.asm new file mode 100644 index 0000000..4c65e05 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcincint.asm @@ -0,0 +1,256 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINCINT.asm +;; Version: 1.20, Updated on 2012/9/21 at 11:56:47 +;; +;; DESCRIPTION: Assembler interrupt service routine for the ADCINC +;; A/D Converter User Module. This code works for both the +;; first and second-order modulator topologies. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export _ADCINC_ADConversion_ISR + +export _ADCINC_iResult +export ADCINC_iResult +export _ADCINC_fStatus +export ADCINC_fStatus +export _ADCINC_bState +export ADCINC_bState +export _ADCINC_fMode +export ADCINC_fMode +export _ADCINC_bNumSamples +export ADCINC_bNumSamples + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM(RAM,REL) + ADCINC_iResult: +_ADCINC_iResult: BLK 2 ;Calculated answer + iTemp: BLK 2 ;internal temp storage + ADCINC_fStatus: +_ADCINC_fStatus: BLK 1 ;ADC Status + ADCINC_bState: +_ADCINC_bState: BLK 1 ;State value of ADC count + ADCINC_fMode: +_ADCINC_fMode: BLK 1 ;Integrate and reset mode. + ADCINC_bNumSamples: +_ADCINC_bNumSamples: BLK 1 ;Number of samples to take. + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +AREA InterruptRAM (RAM, REL, CON) +ADC_Counter:: //ADC Counter +_ADC_Counter:: BLK 1 +Ri_Max_x1:: //Peak of Nermest AC coupled signal for temperature sensing +_Ri_Max_x1:: BLK 1 +Ri_Min_x1:: //Trough of Nermest AC coupled signal for temperature sensing +_Ri_Min_x1:: BLK 1 +ip_x1:: //Voltage Across Pump Current sense Resistor, it is in +_ip_x1:: BLK 1 +ADC_IF::// Byte value used to track which ADC sample last occurred, ADC_IF[0]=1 if Ri_Min,ADC_IF[1]=1 if Ri_Max,ADC_IF[2]=1 if VR +_ADC_IF:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _ADCINC_ADConversion_ISR +; +; DESCRIPTION: Perform final filter operations to produce output samples. +; +;----------------------------------------------------------------------------- +; +; The decimation rate is established by the PWM interrupt. Four timer +; clocks elapse for each modulator output (decimator input) since the +; phi1/phi2 generator divides by 4. This means the timer period and thus +; it's interrupt must equal 4 times the actual decimation rate. The +; decimator is ru for 2^(#bits-6). +; +_ADCINC_ADConversion_ISR: + dec [ADCINC_bState] +if1: + jc endif1 ; no underflow + reti +endif1: + cmp [ADCINC_fMode],0 +if2: + jnz endif2 ;leaving reset mode + push A ;read decimator + mov A, reg[DEC_DL] + mov [iTemp + LowByte],A + mov A, reg[DEC_DH] + mov [iTemp + HighByte], A + pop A + mov [ADCINC_fMode],1 + mov [ADCINC_bState],((1<<(ADCINC_bNUMBITS- 6))-1) + reti +endif2: + ;This code runs at end of integrate + ADCINC_RESET_INTEGRATOR_M + push A + mov A, reg[DEC_DL] + sub A,[iTemp + LowByte] + mov [iTemp +LowByte],A + mov A, reg[DEC_DH] + sbb A,[iTemp + HighByte] + asr A + rrc [iTemp + LowByte] + + ;Covert to Unipolar +IF ADCINC_9_OR_MORE_BITS + add A, (1<<(ADCINC_bNUMBITS - 9)) +ELSE + add [iTemp + LowByte], (1<<(ADCINC_bNUMBITS - 1)) ;work on lower Byte + adc A,0 +ENDIF + ;check for overflow +IF ADCINC_8_OR_MORE_BITS + cmp A,(1<<(ADCINC_bNUMBITS - 8)) +if3: + jnz endif3 ;overflow + dec A + mov [iTemp + LowByte],ffh +endif3: +ELSE + cmp [iTemp + LowByte],(1<<(ADCINC_bNUMBITS)) +if4: + jnz endif4 ;overflow + dec [iTemp + LowByte] +endif4: +ENDIF +IF ADCINC_SIGNED_DATA +IF ADCINC_9_OR_MORE_BITS + sub A,(1<<(ADCINC_bNUMBITS - 9)) +ELSE + sub [iTemp +LowByte],(1<<(ADCINC_bNUMBITS - 1)) + sbb A,0 +ENDIF +ENDIF + mov [ADCINC_iResult + LowByte],[iTemp +LowByte] + mov [ADCINC_iResult + HighByte],A + mov [ADCINC_fStatus],1 +ConversionReady: + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + //14Point7 ASM Code Start + mov A,[_ADC_Counter] + sub A,0 + JZ ADC_0 + + sub A,1 + JZ ADC_1 + + sub A,1 + JZ ADC_2 + + sub A,1 + JZ ADC_3 + + ADC_0: //Ri_Max, Peak of AC coupled Temperature sense signal + //and reg[PRT2DR],127 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_Ri_Max_x1],[ADCINC_iResult + LowByte] + mov [_ADC_Counter],1 + or [_ADC_IF],2 // Set ADC_IF[1] to indicate that new Ri_Max data is available + jmp Cont + + ADC_1://Ri_Min, Trough of AC coupled Temperature sense signal + mov reg[AMX_IN],15 //setup Mux so that Next ADC sample is a differential Ip Vs Ia (voltage across pump current sense resistor, P0[7] Vs P0[6] + //mov reg[AMX_IN],9 //cal lin + //or reg[PRT2DR],128 //set Ri_Out Pin + or reg[PRT0DR],4 //set Ri_Out Pin + mov [_Ri_Min_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],1 // Set ADC_IF[0] to indicate that new Ri_Min data is available + mov [_ADC_Counter],2 + + jmp Cont + + ADC_2://Voltage Across Pump Current sense resistor + //and reg[PRT2DR],127 //clear Ri_Out Pin, Next ADC sample is not the Ri_Min, but Ri_Out is cleared so that ~1khz AC signal is mantained + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],3 + jmp Cont + + ADC_3://Voltage Across Pump Current sense resistor again, this ADC sample is need to keep timing on the ~1khz AC Temperature Sense Signal so might as well get another Sample of VR + //or reg[PRT2DR],128 //Set Ri_Out Pin so that the next ADC sample will Acquire the Peak (Ri_Max) of AC coupled Temperature sense signal + or reg[PRT0DR],4 //set Ri_Out Pin + mov reg[AMX_IN],0 // Setup Mux so that Next ADC sample is differential Ri_in Vs Vref, P0[1] Vs P0[0] + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],0 + + Cont: + //14Point7 ASM Code End + + ; Sample data is now in iResult + ; + ; NOTE: This interrupt service routine has already + ; preserved the values of the A CPU register. If + ; you need to use the X register you must preserve + ; its value and restore it before the return from + ; interrupt. + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + pop A + cmp [ADCINC_bNumSamples],0 +if5: + jnz endif5 ; Number of samples is zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif5: + dec [ADCINC_bNumSamples] +if6: + jz endif6 ; count not zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif6: + ;All samples done + ADCINC_STOPADC_M + reti +; end of file ADCINCINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.asm new file mode 100644 index 0000000..9abc07f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.asm +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_0.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_0_InputSelect +export _AMUX4_0_InputSelect + +export AMUX4_0_Start +export _AMUX4_0_Start + +export AMUX4_0_Stop +export _AMUX4_0_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_InputSelect: +_AMUX4_0_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_0_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_0_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_0_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_0_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Start: +_AMUX4_0_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Stop: +_AMUX4_0_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_0.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.h new file mode 100644 index 0000000..ae47c11 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_0.h +// Version: 1.50, Updated on 2012/9/21 at 11:56:52 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_0_INCLUDE +#define AMUX4_0_INCLUDE + +#include +//------------------------------------------------- +// Defines for AMUX4_0 API's. +//------------------------------------------------- +#define AMUX4_0_PORT0_0 0x00 +#define AMUX4_0_PORT0_2 0x01 +#define AMUX4_0_PORT0_4 0x02 +#define AMUX4_0_PORT0_6 0x03 + +#define AMUX4_0_PORT0_1 0x00 +#define AMUX4_0_PORT0_3 0x01 +#define AMUX4_0_PORT0_5 0x02 +#define AMUX4_0_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_0_InputSelect +#pragma fastcall16 AMUX4_0_Start +#pragma fastcall16 AMUX4_0_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_0 API. +//------------------------------------------------- + +extern void AMUX4_0_InputSelect(BYTE bChannel); +extern void AMUX4_0_Start(void); +extern void AMUX4_0_Stop(void); + +#endif +// end of file AMUX4_0.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.inc new file mode 100644 index 0000000..74e3045 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.inc +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_0 API's. +;-------------------------------------------------- +AMUX4_0_MUX_COL: equ (0h & 03h) +AMUX4_0_COL_COUNT: equ (0h & 80h) +AMUX4_0_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_0_PORT0_0: equ 0h +AMUX4_0_PORT0_2: equ 1h +AMUX4_0_PORT0_4: equ 2h +AMUX4_0_PORT0_6: equ 3h + +AMUX4_0_PORT0_1: equ 0h +AMUX4_0_PORT0_3: equ 1h +AMUX4_0_PORT0_5: equ 2h +AMUX4_0_PORT0_7: equ 3h + +; end of file AMUX4_0.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.asm new file mode 100644 index 0000000..f087534 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.asm +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_1.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_1_InputSelect +export _AMUX4_1_InputSelect + +export AMUX4_1_Start +export _AMUX4_1_Start + +export AMUX4_1_Stop +export _AMUX4_1_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_InputSelect: +_AMUX4_1_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_1_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_1_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_1_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_1_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Start: +_AMUX4_1_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Stop: +_AMUX4_1_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_1.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.h new file mode 100644 index 0000000..6612da6 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_1.h +// Version: 1.50, Updated on 2012/9/21 at 11:56:52 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_1_INCLUDE +#define AMUX4_1_INCLUDE + +#include +//------------------------------------------------- +// Defines for AMUX4_1 API's. +//------------------------------------------------- +#define AMUX4_1_PORT0_0 0x00 +#define AMUX4_1_PORT0_2 0x01 +#define AMUX4_1_PORT0_4 0x02 +#define AMUX4_1_PORT0_6 0x03 + +#define AMUX4_1_PORT0_1 0x00 +#define AMUX4_1_PORT0_3 0x01 +#define AMUX4_1_PORT0_5 0x02 +#define AMUX4_1_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_1_InputSelect +#pragma fastcall16 AMUX4_1_Start +#pragma fastcall16 AMUX4_1_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_1 API. +//------------------------------------------------- + +extern void AMUX4_1_InputSelect(BYTE bChannel); +extern void AMUX4_1_Start(void); +extern void AMUX4_1_Stop(void); + +#endif +// end of file AMUX4_1.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.inc new file mode 100644 index 0000000..9fd8264 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.inc +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_1 API's. +;-------------------------------------------------- +AMUX4_1_MUX_COL: equ (0h & 03h) +AMUX4_1_COL_COUNT: equ (0h & 80h) +AMUX4_1_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_1_PORT0_0: equ 0h +AMUX4_1_PORT0_2: equ 1h +AMUX4_1_PORT0_4: equ 2h +AMUX4_1_PORT0_6: equ 3h + +AMUX4_1_PORT0_1: equ 0h +AMUX4_1_PORT0_3: equ 1h +AMUX4_1_PORT0_5: equ 2h +AMUX4_1_PORT0_7: equ 3h + +; end of file AMUX4_1.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/boot.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/boot.asm new file mode 100644 index 0000000..5fc4e2d --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/boot.asm @@ -0,0 +1,516 @@ +; Generated by PSoC Designer 5.3.2710 +; +;@Id: boot.tpl#903 @ +;============================================================================= +; FILENAME: boot.asm +; Version: 4.30 +; +; DESCRIPTION: +; M8C Boot Code for CY8C24xxxB microcontroller family. +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in +; the project's root directory to create BOOT.ASM. Any changes made to +; BOOT.ASM will be overwritten every time the project is generated; therefore +; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when +; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) +; are not accidentally modified. +; +;============================================================================= + +include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) +include "m8c.inc" ;Part specific file +include "m8ssc.inc" ;Part specific file +include "memory.inc" ;File generated by PSoC Designer (Project dependent) + +;-------------------------------------- +; Export Declarations +;-------------------------------------- + +export __Start +IF (TOOLCHAIN & HITECH) +ELSE +export __bss_start +export __data_start +export __idata_start +export __func_lit_start +export __text_start +ENDIF +export _bGetPowerSetting +export bGetPowerSetting + + +;-------------------------------------- +; Optimization flags +;-------------------------------------- +; +; To change the value of these flags, modify the file boot.tpl, not +; boot.asm. See the notes in the banner comment at the beginning of +; this file. + +; Optimization for Assembly language (only) projects and C-language projects +; that do not depend on the C compiler to initialize the values of RAM variables. +; Set to 1: Support for C Run-time Environment initialization +; Set to 0: Support for C not included. Faster start up, smaller code space. +; +IF (TOOLCHAIN & HITECH) +; The C compiler will customize the startup code - it's not required here + +C_LANGUAGE_SUPPORT: equ 0 +ELSE +C_LANGUAGE_SUPPORT: equ 1 +ENDIF + + +; The following equate is required for proper operation. Reseting its value +; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is +; selected. If the designer chooses to not wait then stabilization of the ECO +; and PLL_Lock must take place within user code. See the family data sheet for +; the requirements of starting the ECO and PLL lock mode. +; +; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before +; invoking main +; Set to 0: Boot code does not wait; clock may not have stabilized by +; the time code in main starts executing. +; +WAIT_FOR_32K: equ 1 + + +; For historical reasons, by default the boot code uses an lcall instruction +; to invoke the user's _main code. If _main executes a return instruction, +; boot provides an infinite loop. By changing the following equate from zero +; to 1, boot's lcall will be replaced by a ljmp instruction, saving two +; bytes on the stack which are otherwise required for the return address. If +; this option is enabled, _main must not return. (Beginning with the 4.2 +; release, the C compiler automatically places an infinite loop at the end +; of main, rather than a return instruction.) +; +ENABLE_LJMP_TO_MAIN: equ 0 + + +;----------------------------------------------------------------------------- +; Interrupt Vector Table +;----------------------------------------------------------------------------- +; +; Interrupt vector table entries are 4 bytes long. Each one contains +; a jump instruction to an ISR (Interrupt Service Routine), although +; very short ISRs could be encoded within the table itself. Normally, +; vector jump targets are modified automatically according to the user +; modules selected. This occurs when the 'Generate Application' opera- +; tion is run causing PSoC Designer to create boot.asm and the other +; configuration files. If you need to hard code a vector, update the +; file boot.tpl, not boot.asm. See the banner comment at the beginning +; of this file. +;----------------------------------------------------------------------------- + + AREA TOP (ROM, ABS, CON) + + org 0 ;Reset Interrupt Vector +IF (TOOLCHAIN & HITECH) +; jmp __Start ;C compiler fills in this vector +ELSE + jmp __Start ;First instruction executed following a Reset +ENDIF + ;@PSoC_BOOT_ISR_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + org 04h ;Low Voltage Detect (LVD) Interrupt Vector + halt ;Stop execution if power falls too low + + org 08h ;Analog Column 0 Interrupt Vector + // call void_handler + reti + + org 0Ch ;Analog Column 1 Interrupt Vector + // call void_handler + reti + + org 18h ;VC3 Interrupt Vector + // call void_handler + reti + + org 1Ch ;GPIO Interrupt Vector + // call void_handler + reti + + org 20h ;PSoC Block DBB00 Interrupt Vector + ljmp _ADCINC_ADConversion_ISR + reti + + org 24h ;PSoC Block DBB01 Interrupt Vector + ljmp _PWM8_Heater_ISR + reti + + org 28h ;PSoC Block DCB02 Interrupt Vector + ljmp _PWM8_Vout_ISR + reti + + org 2Ch ;PSoC Block DCB03 Interrupt Vector + ljmp _PWM8_NB_Out_ISR + reti + + org 60h ;PSoC I2C Interrupt Vector + // call void_handler + reti + + org 64h ;Sleep Timer Interrupt Vector + ljmp _SleepTimer_ISR + reti + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_ISR_UserCode_END@ + +;----------------------------------------------------------------------------- +; Start of Execution. +;----------------------------------------------------------------------------- +; The Supervisory ROM SWBootReset function has already completed the +; calibrate1 process, loading trim values for 5 volt operation. +; + +IF (TOOLCHAIN & HITECH) + AREA PD_startup(CODE, REL, CON) +ELSE + org 68h +ENDIF +__Start: + + ; initialize SMP values for voltage stabilization, if required, + ; leaving power-on reset (POR) level at the default (low) level, at + ; least for now. + ; + M8C_SetBank1 + mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST + M8C_SetBank0 + +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + M8C_EnableWatchDog +ENDIF + +IF ( SELECT_32K ) + or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project +ELSE + and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled +ENDIF + +IF (TOOLCHAIN & HITECH) + global __Lstackps + mov a,low __Lstackps + swap a,sp +ELSE + ;------------------ + ; Set up the stack + ;------------------ + mov A, __ramareas_end ; Set top of stack to end of used RAM + swap SP, A ; This is only temporary if going to LMM +ENDIF + + ;----------------------------------------------- + ; Set Power-related Trim & the AGND Bypass bit. + ;----------------------------------------------- +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + IF ( AGND_BYPASS ) + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; The 5V trim has already been set, but we need to update the AGNDBYP + ; bit in the write-only BDG_TR register. Recalculate the register + ; value using the proper trim values. + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ENDIF + ENDIF +ENDIF ; 5.0 V Operation + +IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ENDIF +ENDIF ; 3.3 Volt Operation + +IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 12MHZ operation *** + +IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 6MHZ operation *** + + mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations + mov [bSSC_KEYSP], 0 + + ;--------------------------------------- + ; Initialize Crystal Oscillator and PLL + ;--------------------------------------- + +IF ( SELECT_32K & WAIT_FOR_32K ) + ; If the user has requested the External Crystal Oscillator (ECO) then turn it + ; on and wait for it to stabilize and the system to switch over to it. The PLL + ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + ; the ECO to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor1s: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor1s ; Interrupt will latch but will not dispatch + ; since interrupts are not globally enabled +ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + ; Either no ECO, or waiting for stable clock is to be done in main + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the watch dog + +ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + +IF ( PLL_MODE ) + ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + mov reg[INT_VC], 0 ; Clear all pending interrupts + +.WaitFor16ms: + tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor16ms + M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + +IF ( WAIT_FOR_32K ) +ELSE ; !( WAIT_FOR_32K ) + ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. +ENDIF ;(WAIT_FOR_32K) +ENDIF ;(PLL_MODE) + + ;------------------------------------------------------- + ; Initialize Proper Drive Mode for External Clock Pin + ;------------------------------------------------------- + + ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + +IF (SYSCLK_SOURCE) + and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register +ENDIF + ; EXTCLK pin is now in proper drive mode to input the external clock signal + + ;------------------------ + ; Close CT leakage path. + ;------------------------ + mov reg[ACB00CR0], 05h + mov reg[ACB01CR0], 05h + + ;@PSoC_BOOT_LOADCFG_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_LOADCFG_UserCode_END@ + + ;------------------------- + ; Load Base Configuration + ;------------------------- + ; Load global parameter settings and load the user modules in the + ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + ; to minimize start up time; (2) We may still need to play with the + ; Sleep Timer. + ; + lcall LoadConfigInit + + ;----------------------------------- + ; Initialize C Run-Time Environment + ;----------------------------------- +IF ( C_LANGUAGE_SUPPORT ) + mov A,0 ; clear the 'bss' segment to zero + mov [__r0],<__bss_start +BssLoop: + cmp [__r0],<__bss_end + jz BssDone + mvi [__r0],A + jmp BssLoop +BssDone: + mov A,>__idata_start ; copy idata to data segment + mov X,<__idata_start + mov [__r0],<__data_start +IDataLoop: + cmp [__r0],<__data_end + jz C_RTE_Done + push A + romx + mvi [__r0],A + pop A + inc X + adc A,0 + jmp IDataLoop + +C_RTE_Done: + +ENDIF ; C_LANGUAGE_SUPPORT + + ;------------------------------- + ; Voltage Stabilization for SMP + ;------------------------------- + +IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation +IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + ; 5V before enabling the Precision Power-On Reset (PPOR). + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + or reg[INT_MSK0],INT_MSK0_SLEEP + M8C_SetBank1 + and reg[OSC_CR0], ~OSC_CR0_SLEEP + or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Restart the sleep timer + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor2ms: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor2ms ; Branch fails when 2 msec has passed +ENDIF ; SMP is operational +ENDIF ; 5.0V Operation + + ;------------------------------- + ; Set Power-On Reset (POR) Level + ;------------------------------- + ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + ; These values should not be changed from the settings here. See Section "POR and LVD" of + ; Technical Reference Manual #001-14463 for more information. + + M8C_SetBank1 + +IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + ; Yes, lowest trip already set +ELSE ; No, must adjust POR... +IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip +ELSE +IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + ELSE ; No, fast mode + IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + ELSE ; 24HMz ; + or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + ENDIF ; 24MHz + ENDIF ; Slow Mode +ENDIF ; 5.0V Operation +ENDIF ; 3.3V Operation +ENDIF ; 2.7V Operation + + M8C_SetBank0 + + ;---------------------------- + ; Wrap up and invoke "main" + ;---------------------------- + + ; Disable the Sleep interrupt that was used for timing above. In fact, + ; no interrupts should be enabled now, so may as well clear the register. + ; + mov reg[INT_MSK0],0 + + ; Everything has started OK. Now select requested CPU & sleep frequency. + ; + M8C_SetBank1 + mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) + M8C_SetBank0 + + ; Global Interrupt are NOT enabled, this should be done in main(). + ; LVD is set but will not occur unless Global Interrupts are enabled. + ; Global Interrupts should be enabled as soon as possible in main(). + ; + mov reg[INT_VC],0 ; Clear any pending interrupts which may + ; have been set during the boot process. +IF (TOOLCHAIN & HITECH) + ljmp startup ; Jump to C compiler startup code +ELSE +IF ENABLE_LJMP_TO_MAIN + ljmp _main ; goto main (no return) +ELSE + lcall _main ; call main +.Exit: + jmp .Exit ; Wait here after return till power-off or reset +ENDIF +ENDIF ; TOOLCHAIN + + ;--------------------------------- + ; Library Access to Global Parms + ;--------------------------------- + ; + bGetPowerSetting: +_bGetPowerSetting: + ; Returns value of POWER_SETTING in the A register. + ; No inputs. No Side Effects. + ; +IF (POWER_SETTING & POWER_SET_2V7) + mov A, POWER_SETTING | POWER_SET_SLOW_IMO +ELSE + mov A, POWER_SETTING ; Supply voltage and internal main osc +ENDIF + ret + +IF (TOOLCHAIN & HITECH) +ELSE + ;--------------------------------- + ; Order Critical RAM & ROM AREAs + ;--------------------------------- + ; 'TOP' is all that has been defined so far... + + ; ROM AREAs for C CONST, static & global items + ; + AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM +__idata_start: + + AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers +__func_lit_start: + + AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + AREA UserModules (ROM, REL, CON) ; User Module APIs + + ; CODE segment for general use + ; + AREA text (ROM, REL, CON) +__text_start: + + ; RAM area usage + ; + AREA data (RAM, REL, CON) ; initialized RAM +__data_start: + + AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + AREA bss (RAM, REL, CON) ; general use +__bss_start: + +ENDIF ; TOOLCHAIN + +; end of file boot.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.asm new file mode 100644 index 0000000..2309a69 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.asm @@ -0,0 +1,284 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.asm +;; Version: 4.3, Updated on 2012/9/21 at 11:58:34 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: DAC6 User Module software implementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC6_VGND.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export DAC6_VGND_Start +export _DAC6_VGND_Start +export DAC6_VGND_SetPower +export _DAC6_VGND_SetPower + +export DAC6_VGND_WriteBlind +export _DAC6_VGND_WriteBlind +export DAC6_VGND_WriteStall +export _DAC6_VGND_WriteStall + +export DAC6_VGND_Stop +export _DAC6_VGND_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 1 Switched Cap Block configured as shown. This API depends +;; on knowing the exact personalization of CR0 and CR3 bitfields +;; for time efficiency. +;; +;; * For a Mask/Val pair, this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; BIT FIELD Mask/Val Function +;; ----------------- ----- -------------------- +;; CR0.FCap 80/1 Feedback cap size 32 +;; CR0.ClockPhase 40/0 Normal phase +;; CR0.ASign 20/* User parameter +;; CR0.ACap 1F/* User parameter +;; +;; CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; CR1.AMux E0/4 (SCB) VRef High +;; CR1.BCap 1F/0 Prune B-input branch +;; +;; CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; CR2.CmpBus 40/0 Comparator Bus Disable +;; CR2.AutoZero 20/1 Auto-Zero enabled on Phi 1 +;; CR2.CCap 1F/0 Prune C-input branch +;; +;; CR3.ARefSelect C0/0 Use AGND (to invert) +;; CR3.FSW1 20/1 Feedback Cap Used +;; CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; CR3.BSW 08/0 (SCB) Don't Care - this branch pruned +;; CR3.BMux 04/0 (SCB) Don't Care - this branch pruned +;; CR3.PWR 03/* User Parameter: Power, def=OFF +;; + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +cOFFSET: equ 31 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 ALWAYS looks + ; like this regardless of SC block type + ; or where the DAC gets mapped. + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Start +; FUNCTION NAME: DAC6_VGND_SetPower +; +; DESCRIPTION: +; Start / SetPower - Applies power setting to the module's SC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=High +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_Start: +_DAC6_VGND_Start: + DAC6_VGND_SetPower: +_DAC6_VGND_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_1 + and A, bPWRMASK + or A, bCR3 ; Set all other bits in addition to power + mov reg[DAC6_VGND_CR3], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteBlind +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks +; Lowest overhead, but output may not settle to correct value until the +; phi2 of next full cycle following the write. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_WriteBlind: +_DAC6_VGND_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc BlindPositive + ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted! + cpl A ; bit 0 is a "1" so, following 1 byte "inc" works + inc A ; (otherwise, we'd have to "add A, 2") + or A, 40h ; Make it negative by forcing sign bit + jmp BlindMagSet +BlindPositive: + nop + nop + nop + jmp BlindMagSet +BlindMagSet: + asr A ; Divide by two to finish up + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + mov reg[DAC6_VGND_CR0], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteStall +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with fast analog clocks or when the +; resulting interrupt latencies, comparable to the update period, +; can be tolerated comfortably. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_WriteStall: +_DAC6_VGND_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc StallPositive + cpl A ; "Invert" step of complement 2's complement + inc A ; "Add 1" step of complement 2's complement + or A, 40h ; Make it negative + jmp StallMagSet +StallPositive: + nop + nop + nop + jmp StallMagSet +StallMagSet: + asr A ; Divide by two to finish conversion + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + M8C_Stall + mov reg[DAC6_VGND_CR0], A + M8C_Unstall + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Stop +; +; DESCRIPTION: +; Turns off power to the SC block +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_Stop: +_DAC6_VGND_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC6_VGND_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC6_VGND.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.h new file mode 100644 index 0000000..674c40a --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.h @@ -0,0 +1,56 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC6_VGND.h +// Version: 4.3, Updated on 2012/9/21 at 11:58:34 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: DAC6 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC6_VGND_INCLUDE +#define DAC6_VGND_INCLUDE + +#include + +//------------------------------------------------- +// Defines for DAC6_VGND API's. +//------------------------------------------------- +#define DAC6_VGND_OFF 0 +#define DAC6_VGND_LOWPOWER 1 +#define DAC6_VGND_MEDPOWER 2 +#define DAC6_VGND_HIGHPOWER 3 +#define DAC6_VGND_FULLPOWER 3 + +#pragma fastcall16 DAC6_VGND_Start +#pragma fastcall16 DAC6_VGND_SetPower +#pragma fastcall16 DAC6_VGND_WriteBlind +#pragma fastcall16 DAC6_VGND_WriteStall +#pragma fastcall16 DAC6_VGND_Stop + +//------------------------------------------------- +// Prototypes of the DAC6_VGND API. +//------------------------------------------------- +extern void DAC6_VGND_Start(BYTE bPowerSetting); +extern void DAC6_VGND_SetPower(BYTE bPowerSetting); +extern void DAC6_VGND_WriteBlind(CHAR cOutputValue); +extern void DAC6_VGND_WriteStall(CHAR cOutputValue); +extern void DAC6_VGND_Stop(void); + + +//------------------------------------------------- +// Register Addresses for DAC6_VGND +//------------------------------------------------- +#pragma ioport DAC6_VGND_CR0: 0x080 +BYTE DAC6_VGND_CR0; +#pragma ioport DAC6_VGND_CR1: 0x081 +BYTE DAC6_VGND_CR1; +#pragma ioport DAC6_VGND_CR2: 0x082 +BYTE DAC6_VGND_CR2; +#pragma ioport DAC6_VGND_CR3: 0x083 +BYTE DAC6_VGND_CR3; + +#endif +// end of file DAC6_VGND.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.inc new file mode 100644 index 0000000..550fd9f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.inc @@ -0,0 +1,49 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.inc +;; Version: 4.3, Updated on 2012/9/21 at 11:58:34 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the DAC6 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for DAC6_VGND API's +;-------------------------------------------------- +DAC6_VGND_OFF: equ 00h +DAC6_VGND_LOWPOWER: equ 01h +DAC6_VGND_MEDPOWER: equ 02h +DAC6_VGND_HIGHPOWER: equ 03h + +DAC6_VGND_OffsetBinary: equ 04h +DAC6_VGND_TwosComplement: equ 02h +DAC6_VGND_SignAndMagnitude: equ 01h +DAC6_VGND_RawRegister: equ 00h + +DAC6_VGND_DATAFORMAT: equ 7h +DAC6_VGND_OFFSETBINARY: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_OffsetBinary +DAC6_VGND_TWOSCOMPLEMENT: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_TwosComplement +DAC6_VGND_SIGNANDMAGNITUDE: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_SignAndMagnitude + +DAC6_VGND_PHASE_Normal: equ 0 +DAC6_VGND_PHASE_Swapped: equ 1 +DAC6_VGND_PHASE_SWAP: equ DAC6_VGND_PHASE_Normal + +IF DAC6_VGND_PHASE_SWAP + DAC6_VGND_CR0_HIBITS: equ C0h +ELSE + DAC6_VGND_CR0_HIBITS: equ 80h +ENDIF + + +;-------------------------------------------------- +; Register Address Constants for DAC6_VGND +;-------------------------------------------------- +DAC6_VGND_CR0: equ 80h +DAC6_VGND_CR1: equ 81h +DAC6_VGND_CR2: equ 82h +DAC6_VGND_CR3: equ 83h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.asm new file mode 100644 index 0000000..33385d0 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.asm @@ -0,0 +1,401 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.asm +;; Version: 2.2, Updated on 2012/9/21 at 11:58:35 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: DAC9 User Module software inplementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC9_Ia.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export DAC9_Ia_Start +export _DAC9_Ia_Start +export DAC9_Ia_SetPower +export _DAC9_Ia_SetPower + +export DAC9_Ia_WriteBlind +export _DAC9_Ia_WriteBlind +export DAC9_Ia_WriteBlind2B +export _DAC9_Ia_WriteBlind2B + +export DAC9_Ia_WriteStall +export _DAC9_Ia_WriteStall +export DAC9_Ia_WriteStall2B +export _DAC9_Ia_WriteStall2B + +export DAC9_Ia_Stop +export _DAC9_Ia_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 2 Switched Cap Blocks, LSB and MSB, configured as shown below. +;; This API depends on knowing the exact personalization of CR0 +;; and CR3 bitfields for time efficiency. +;; +;; * For a Mask/Val pair this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; Setting for output=AGND to OBUS when LSB in ASA10 and MSB in ASB20: +;; LSB.CR0=80 MSB.CR0=80 +;; LSB.CR1=40 MSB.CR1=81 +;; LSB.CR2=20 MSB.CR2=A0 +;; LSB.CR3=33 MSB.CR3=3B +;; +;; BIT FIELD Mask/Val Function +;; ----------------- -------- -------------------- +;; LSB.CR0.FCap 80/1 Feedback cap size 32 +;; LSB.CR0.ClockPhase 40/0 Normal phase +;; LSB.CR0.ASign 20/* User parameter +;; LSB.CR0.ACap 1F/* User parameter +;; +;; LSB.CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; LSB.CR1.BCap 1F/0 Prune B-input branch +;; +;; LSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; LSB.CR2.CmpBus 40/0 Comparator Bus Disabled +;; LSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; LSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; LSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; LSB.CR3.FSW1 20/1 Feedback Cap Used +;; LSB.CR3.FSW0 10/1 Feedback Cap Grounded for AZ +;; LSB.CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; LSB.CR3.PWR 03/* User Parameter: Power; default=OFF +;; +;; MSB.CR0.FCap 80/1 Feedback cap size 32 +;; MSB.CR0.ClockPhase 40/0 Normal phase +;; MSB.CR0.ASign 20/* User parameter +;; MSB.CR0.ACap 1F/* User parameter +;; +;; MSB.CR1.AMux E0/4 (SCB) VRef High +;; MSB.CR1.BCap 1F/1 Subrange LSB block output by BCap/FCap (1/32) +;; +;; MSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; MSB.CR2.CmpBus 40/0 Comparator Bus Disable +;; MSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; MSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; MSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; MSB.CR3.FSW1 20/1 Feedback Cap Used +;; MSB.CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; MSB.CR3.BSW 08/0 (SCB) why is this cont time instead of phi2?? +;; MSB.CR3.BMux 04/? (SCB) LSB block output; determined by placement +;; MSB.CR3.PWR 03/* User Parameter: Power, default=OFF + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +iOFFSET: equ 255 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 always looks like + ; this regardless of SC block type or location. +bSMMASK: equ 3Fh ; Sign and Magnitude bits mask +bSIGNMASK: equ 20h ; Sign bit mask +bMAGMASK: equ 1Fh ; Magnitude bits mask +bHIGHBITS: equ 80h ; Setting for FCap and ClockPhase +bHBMASK: equ C0h ; Mask for FCap and ClockPhase + + +;;--------------------------- + macro Stall +;;--------------------------- + mov reg[ASY_CR], 1 + endm + +;;--------------------------- + macro UnStall +;;--------------------------- + mov reg[ASY_CR], 0 + endm + + AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Start +; FUNCTION NAME: DAC9_Ia_SetPower +; +; DESCRIPTION: +; Applies power setting to the module's analog PSoC blocks. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=Full. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Start: +_DAC9_Ia_Start: + DAC9_Ia_SetPower: +_DAC9_Ia_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, bPWRMASK ; trim input to bits of interest + mov X, SP ; Set stack frame pointer + push A + ;; read CR3 registers, modify power bits & write back + mov A, reg[DAC9_Ia_MSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in MSB register image + mov reg[DAC9_Ia_MSB_CR3], A + mov A, reg[DAC9_Ia_LSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in LSB register image + mov reg[DAC9_Ia_LSB_CR3], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteBlind +; FUNCTION NAME: DAC9_Ia_WriteBlind2B +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks. +; Lowest overhead, but may cause glitches on the output. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteBlind: +_DAC9_Ia_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced using [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc BlindAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp BlindMagSet +BlindAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp BlindMagSet +BlindMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + pop A ; LSB: 76543210 (mag) + push X ; MSB + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + + ENDIF + + DAC9_Ia_WriteBlind2B: +_DAC9_Ia_WriteBlind2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + mov reg[DAC9_Ia_MSB_CR0],A + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteStall +; FUNCTION NAME: DAC9_Ia_WriteStall2B +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with faster analog clocks or when the +; effect of prolonging interrupt latencies can be safely tolerated. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteStall: +_DAC9_Ia_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced via [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc StallAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp StallMagSet +StallAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp StallMagSet +StallMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + + pop A ; LSB: 76543210 (mag) + push X ; MSB + + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + ENDIF + + DAC9_Ia_WriteStall2B: +_DAC9_Ia_WriteStall2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + M8C_Stall + mov reg[DAC9_Ia_MSB_CR0],A + M8C_Unstall + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Stop +; +; DESCRIPTION: +; Cuts power to the user module. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Stop: +_DAC9_Ia_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC9_Ia_MSB_CR3], ~bPWRMASK + and reg[DAC9_Ia_LSB_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC9_Ia.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.h new file mode 100644 index 0000000..5c7b8b4 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.h @@ -0,0 +1,93 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC9_Ia.h +// Version: 2.2, Updated on 2012/9/21 at 11:58:35 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: DAC9 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC9_Ia_INCLUDE +#define DAC9_Ia_INCLUDE + +#include + +//------------------------------------------------- +// Defines for DAC9_Ia API's. +//------------------------------------------------- +// Power Setting Defines +#define DAC9_Ia_OFF 0 +#define DAC9_Ia_LOWPOWER 1 +#define DAC9_Ia_MEDPOWER 2 +#define DAC9_Ia_HIGHPOWER 3 +#define DAC9_Ia_FULLPOWER 3 + +// Define constants for declaring function prototypes based on DataFormat parameter +#define DAC9_Ia_OffsetBinary 0x04 +#define DAC9_Ia_TwosComplement 0x02 +#define DAC9_Ia_SignAndMagnitude 0x01 +#define DAC9_Ia_RawRegister 0x00 +#define DAC9_Ia_DATAFORMAT 0x7 +#define DAC9_Ia_OFFSETBINARY DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +#define DAC9_Ia_TWOSCOMPLEMENT DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +#define DAC9_Ia_SIGNANDMAGNITUDE DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +// Declare function fastcall16 pragmas +#pragma fastcall16 DAC9_Ia_Start +#pragma fastcall16 DAC9_Ia_SetPower +#pragma fastcall16 DAC9_Ia_Stop + +//------------------------------------------------- +// Prototypes of the DAC9_Ia API. +//------------------------------------------------- +extern void DAC9_Ia_Start(BYTE bPowerSetting); +extern void DAC9_Ia_SetPower(BYTE bPowerSetting); +extern void DAC9_Ia_Stop(void); + +// Declare overloaded functions based on DataForamt parameter selected +#if DAC9_Ia_OFFSETBINARY + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(WORD wOutputValue); + extern void DAC9_Ia_WriteStall(WORD wOutputValue); +#else + #if DAC9_Ia_TWOSCOMPLEMENT + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(INT iOutputValue); + extern void DAC9_Ia_WriteStall(INT iOutputValue); + #else //DAC9_Ia_SIGNANDMAGNITUDE + #pragma fastcall16 DAC9_Ia_WriteBlind2B + #pragma fastcall16 DAC9_Ia_WriteStall2B + extern void DAC9_Ia_WriteBlind2B(BYTE bLSB, BYTE bMSB); + extern void DAC9_Ia_WriteStall2B(BYTE bLSB, BYTE bMSB); + #endif +#endif + +//------------------------------------------------- +// Hardware Addresses for DAC9_Ia +//------------------------------------------------- + +#pragma ioport DAC9_Ia_LSB_CR0: 0x090 // LSB Analog control register 0 +BYTE DAC9_Ia_LSB_CR0; +#pragma ioport DAC9_Ia_LSB_CR1: 0x091 // LSB Analog control register 1 +BYTE DAC9_Ia_LSB_CR1; +#pragma ioport DAC9_Ia_LSB_CR2: 0x092 // LSB Analog control register 2 +BYTE DAC9_Ia_LSB_CR2; +#pragma ioport DAC9_Ia_LSB_CR3: 0x093 // LSB Analog control register 3 +BYTE DAC9_Ia_LSB_CR3; + +#pragma ioport DAC9_Ia_MSB_CR0: 0x094 // MSB Analog control register 0 +BYTE DAC9_Ia_MSB_CR0; +#pragma ioport DAC9_Ia_MSB_CR1: 0x095 // MSB Analog control register 1 +BYTE DAC9_Ia_MSB_CR1; +#pragma ioport DAC9_Ia_MSB_CR2: 0x096 // MSB Analog control register 2 +BYTE DAC9_Ia_MSB_CR2; +#pragma ioport DAC9_Ia_MSB_CR3: 0x097 // MSB Analog control register 3 +BYTE DAC9_Ia_MSB_CR3; + +#endif +// end of file DAC9_Ia.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.inc new file mode 100644 index 0000000..cfcde22 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.inc @@ -0,0 +1,68 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.inc +;; Version: 2.2, Updated on 2012/9/21 at 11:58:35 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the DAC9 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for DAC9_Ia API's +;-------------------------------------------------- +DAC9_Ia_OFF: equ 00h +DAC9_Ia_LOWPOWER: equ 01h +DAC9_Ia_MEDPOWER: equ 02h +DAC9_Ia_HIGHPOWER: equ 03h +DAC9_Ia_FULLPOWER: equ 03h + +DAC9_Ia_LSB_CR0: equ 90h +DAC9_Ia_LSB_CR1: equ 91h +DAC9_Ia_LSB_CR2: equ 92h +DAC9_Ia_LSB_CR3: equ 93h +DAC9_Ia_MSB_CR0: equ 94h +DAC9_Ia_MSB_CR1: equ 95h +DAC9_Ia_MSB_CR2: equ 96h +DAC9_Ia_MSB_CR3: equ 97h + +DAC9_Ia_OffsetBinary: equ 04h +DAC9_Ia_TwosComplement: equ 02h +DAC9_Ia_SignAndMagnitude: equ 01h +DAC9_Ia_RawRegister: equ 00h + +DAC9_Ia_DATAFORMAT: equ 7h +DAC9_Ia_OFFSETBINARY: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +DAC9_Ia_TWOSCOMPLEMENT: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +DAC9_Ia_SIGNANDMAGNITUDE: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +DAC9_Ia_PHASE_Normal: equ 0 +DAC9_Ia_PHASE_Swapped: equ 1 + +DAC9_Ia_PHASE_SWAP: equ DAC9_Ia_PHASE_Normal + +IF DAC9_Ia_PHASE_SWAP + DAC9_Ia_CR0_HIBITS: equ C0h +ELSE + DAC9_Ia_CR0_HIBITS: equ 80h +ENDIF + +;-------------------------------------------------- +; Register Address Constants for DAC9_Ia +;-------------------------------------------------- +DAC9_Ia_LSB_CR0: equ 90h ; LSB SC Block Control Register 0 +DAC9_Ia_LSB_CR1: equ 91h ; LSB SC Block Control Register 1 +DAC9_Ia_LSB_CR2: equ 92h ; LSB SC Block Control Register 2 +DAC9_Ia_LSB_CR3: equ 93h ; LSB SC Block Control Register 3 + +DAC9_Ia_MSB_CR0: equ 94h ; MSB SC Block Control Register 0 +DAC9_Ia_MSB_CR1: equ 95h ; MSB SC Block Control Register 1 +DAC9_Ia_MSB_CR2: equ 96h ; MSB SC Block Control Register 2 +DAC9_Ia_MSB_CR3: equ 97h ; MSB SC Block Control Register 3 + +; end of file DAC9_Ia.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.h new file mode 100644 index 0000000..f846d8c --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.h @@ -0,0 +1,86 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.3.2710 +******************************************************************************/ +/****************************************************************************** +* This file contains defines to support oscillator register initialization +* for CY8C24423B +******************************************************************************/ + +#define CPU_CLOCK 0x2 //CPU clock value +#define CPU_CLOCK_MASK 0x7 //CPU clock mask +#define CPU_CLOCK_JUST 0x2 //CPU clock value justified +#define SELECT_32K 0x0 //32K select value +#define SELECT_32K_MASK 0x80 //32K select mask +#define SELECT_32K_JUST 0x0 //32K select value justified +#define PLL_MODE 0x0 //PLL mode value +#define PLL_MODE_MASK 0x40 //PLL mode mask +#define PLL_MODE_JUST 0x0 //PLL mode value justified +#define SLEEP_TIMER 0x0 //Sleep Timer value +#define SLEEP_TIMER_MASK 0x18 //Sleep Timer mask +#define SLEEP_TIMER_JUST 0x0 //Sleep Timer value justified +#define SWITCH_MODE_PUMP 0x1 //Switch Mode Pump value +#define SWITCH_MODE_PUMP_MASK 0x80 //Switch Mode Pump mask +#define SWITCH_MODE_PUMP_JUST 0x80 //Switch Mode Pump value justified +#define TRIP_VOLTAGE 0x6 //Trip Voltage +#define POWER_SETTING 0x10 //Power Setting [ Vcc / SysClk freq ] 0x10 = 5.0V / 24MHz + // 0x08 = 3.3V / 24MHz + // 0x09 = 3.3V / 12MHz +#define WATCHDOG_ENABLE 0x0 //Watchdog Enable 1 = Enable +#define CLOCK_DIV_VC1 0x0 // VC1 clock divider +#define CLOCK_DIV_VC1_MASK 0xf0 // VC1 clock divider mask +#define CLOCK_DIV_VC1_JUST 0x0 // jVC1 clock divider ustified +#define CLOCK_DIV_VC2 0xb // VC2 clock divider +#define CLOCK_DIV_VC2_MASK 0xf // VC2 clock divider mask +#define CLOCK_DIV_VC2_JUST 0xb // VC2 clock divider justified +#define CLOCK_INPUT_VC3 0x0 // VC3 clock source +#define CLOCK_INPUT_VC3_MASK 0x3 // VC3 clock source mask +#define CLOCK_INPUT_VC3_JUST 0x0 // VC3 clock source justified +#define CLOCK_DIV_VC3 0x2f // VC3 clock divider +#define CLOCK_DIV_VC3_MASK 0xff // VC3 clock divider mask +#define CLOCK_DIV_VC3_JUST 0x2f // VC3 clock divider justified +#define ANALOG_BUFFER_PWR 0x1 // Analog buffer power level +#define ANALOG_BUFFER_PWR_MASK 0x1 // Analog buffer power level mask +#define ANALOG_BUFFER_PWR_JUST 0x1 // Analog buffer power level justified +#define ANALOG_POWER 0x7 // Analog power control +#define ANALOG_POWER_MASK 0x7 // Analog power control mask +#define ANALOG_POWER_JUST 0x7 // Analog power control justified +#define OP_AMP_BIAS 0x0 // Op amp bias level +#define OP_AMP_BIAS_MASK 0x40 // Op amp bias level mask +#define OP_AMP_BIAS_JUST 0x0 // Op amp bias level justified +#define REF_MUX 0x7 // Ref mux setting +#define REF_MUX_MASK 0x38 // Ref mux setting mask +#define REF_MUX_JUST 0x38 // Ref mux setting justified +#define AGND_BYPASS 0x0 // AGndBypass setting +#define AGND_BYPASS_MASK 0x40 // AGndBypass setting mask +#define AGND_BYPASS_JUST 0x0 // AGndBypass setting justified +#define SYSCLK_SOURCE (0x0 | 0x0) // SysClk Source setting +#define SYSCLK_SOURCE_MASK (0x4 | 0x2) // SysClk Source setting mask +#define SYSCLK_SOURCE_JUST (0x0 | 0x0) // SysClk Source setting justified +#define SYSCLK_2_DISABLE 0x0 // SysClk*2 Disable setting +#define SYSCLK_2_DISABLE_MASK 0x1 // SysClk*2 Disable setting mask +#define SYSCLK_2_DISABLE_JUST 0x0 // SysClk*2 Disable setting justified +// +// register initial values +// +#define ANALOG_IO_CONTROL 0x29 //Analog IO Control register (ABF_CR) +#define PORT_0_GLOBAL_SELECT 0x0 //Port 0 global select register (PRT0GS) +#define PORT_0_DRIVE_0 0x4 //Port 0 drive mode 0 register (PRT0DM0) +#define PORT_0_DRIVE_1 0xfb //Port 0 drive mode 1 register (PRT0DM1) +#define PORT_0_DRIVE_2 0xfb //Port 0 drive mode 1 register (PRT0DM2) +#define PORT_0_INTENABLE 0x0 //Port 0 interrupt enable register (PRT0IE) +#define PORT_0_INTCTRL_0 0x0 //Port 0 interrupt control 0 register (PRT0IC0) +#define PORT_0_INTCTRL_1 0x0 //Port 0 interrupt control 1 register (PRT0IC1) +#define PORT_1_GLOBAL_SELECT 0x70 //Port 1 global select register (PRT1GS) +#define PORT_1_DRIVE_0 0x70 //Port 1 drive mode 0 register (PRT1DM0) +#define PORT_1_DRIVE_1 0x8f //Port 1 drive mode 1 register (PRT1DM1) +#define PORT_1_DRIVE_2 0x8f //Port 1 drive mode 2 register (PRT1DM2) +#define PORT_1_INTENABLE 0x0 //Port 1 interrupt enable register (PRT1IE) +#define PORT_1_INTCTRL_0 0x0 //Port 1 interrupt control 0 register (PRT1IC0) +#define PORT_1_INTCTRL_1 0x0 //Port 1 interrupt control 1 register (PRT1IC1) +#define PORT_2_GLOBAL_SELECT 0x0 //Port 2 global select register (PRT2GS) +#define PORT_2_DRIVE_0 0xff //Port 2 drive mode 0 register (PRT2DM0) +#define PORT_2_DRIVE_1 0x0 //Port 2 drive mode 1 register (PRT2DM1) +#define PORT_2_DRIVE_2 0x0 //Port 2 drive mode 2 register (PRT2DM2) +#define PORT_2_INTENABLE 0x0 //Port 2 interrupt enable register (PRT2IE) +#define PORT_2_INTCTRL_0 0x0 //Port 2 interrupt control 0 register (PRT2IC0) +#define PORT_2_INTCTRL_1 0x0 //Port 2 interrupt control 1 register (PRT2IC1) diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.inc new file mode 100644 index 0000000..43be1f7 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.inc @@ -0,0 +1,118 @@ +; Generated by PSoC Designer 5.3.2710 +; +;============================================================================= +; FILENAME: GlobalParams.inc +; DATE: 2 August 2004 +; +; DESCRIPTION: +; Constants describing many of the global parameter settings. +; This file contains equates to support oscillator register initialization +; for the CY8C24423B +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +;============================================================================= +; + +CPU_CLOCK: equ 2h ;CPU clock value +CPU_CLOCK_MASK: equ 7h ;CPU clock mask +CPU_CLOCK_JUST: equ 2h ;CPU clock value justified +SELECT_32K: equ 0h ;32K select value +SELECT_32K_MASK: equ 80h ;32K select mask +SELECT_32K_JUST: equ 0h ;32K select value justified +PLL_MODE: equ 0h ;PLL mode value +PLL_MODE_MASK: equ 40h ;PLL mode mask +PLL_MODE_JUST: equ 0h ;PLL mode value justified +SLEEP_TIMER: equ 0h ;Sleep Timer value +SLEEP_TIMER_MASK: equ 18h ;Sleep Timer mask +SLEEP_TIMER_JUST: equ 0h ;Sleep Timer value justified +SWITCH_MODE_PUMP: equ 1h ;Switch Mode Pump setting +SWITCH_MODE_PUMP_MASK: equ 80h ;Switch Mode Pump mask +SWITCH_MODE_PUMP_JUST: equ 80h ;Switch Mode Pump justified +LVD_TBEN: equ 0 ; Low Voltage Throttle-back enable value +LVD_TBEN_MASK: equ 8 ; Low Voltage Throttle-back enable mask +LVD_TBEN_JUST: equ 0 ; Low Voltage Throttle-back enable justified +TRIP_VOLTAGE: equ 6h ;Trip Voltage value +TRIP_VOLTAGE_MASK: equ 7h ;Trip Voltage mask +TRIP_VOLTAGE_JUST: equ 6h ;Trip Voltage justified + +POWER_SETTING: equ 10h +POWER_SET_5V0: equ 10h ; MASK for 5.0V operation, fast and slow +POWER_SET_5V0_24MHZ: equ 10h ; Power Setting value for 5.0V fast +POWER_SET_5V0_6MHZ: equ 11h ; Power Setting value for 5.0V slow +POWER_SET_3V3: equ 08h ; MASK for 3.3V operation, fast and slow +POWER_SET_3V3_24MHZ: equ 08h ; Power Setting value for 3.3V fast +POWER_SET_3V3_6MHZ: equ 09h ; Power Setting value for 3.3V slow +POWER_SET_2V7: equ 06h ; MASK for 2.7V operation, fast and slow +POWER_SET_2V7_12MHZ: equ 04h ; MASK for 2.7V, 12MHZ operation +POWER_SET_2V7_6MHZ: equ 02h ; MASK for 2.7V, 6MHZ operation +POWER_SET_SLOW_IMO: equ 01h ; MASK for slow Internal Main Oscillator (IMO) + +COMM_RX_PRESENT: equ 0 ;1 = TRUE +WATCHDOG_ENABLE: equ 0 ;Watchdog Enable 1 = Enable + +CLOCK_DIV_VC1: equ 0h ;VC1 clock divider +CLOCK_DIV_VC1_MASK: equ f0h ;VC1 clock divider mask +CLOCK_DIV_VC1_JUST: equ 0h ;VC1 clock divider justified +CLOCK_DIV_VC2: equ bh ;VC2 clock divider +CLOCK_DIV_VC2_MASK: equ fh ;VC2 clock divider mask +CLOCK_DIV_VC2_JUST: equ bh ;VC2 clock divider justified +CLOCK_INPUT_VC3: equ 0h ;VC3 clock source +CLOCK_INPUT_VC3_MASK: equ 3h ;VC3 clock source mask +CLOCK_INPUT_VC3_JUST: equ 0h ;VC3 clock source justified +CLOCK_DIV_VC3: equ 2fh ;VC3 clock divider +CLOCK_DIV_VC3_MASK: equ ffh ;VC3 clock divider mask +CLOCK_DIV_VC3_JUST: equ 2fh ;VC3 clock divider justified +ANALOG_BUFFER_PWR: equ 1h ;Analog buffer power level +ANALOG_BUFFER_PWR_MASK: equ 1h ;Analog buffer power level mask +ANALOG_BUFFER_PWR_JUST: equ 1h ;Analog buffer power level justified +ANALOG_POWER: equ 7h ;Analog power control +ANALOG_POWER_MASK: equ 7h ;Analog power control mask +ANALOG_POWER_JUST: equ 7h ;Analog power control justified +OP_AMP_BIAS: equ 0h ;Op amp bias level +OP_AMP_BIAS_MASK: equ 40h ;Op amp bias level mask +OP_AMP_BIAS_JUST: equ 0h ;Op amp bias level justified +REF_MUX: equ 7h ;Ref mux setting +REF_MUX_MASK: equ 38h ;Ref mux setting mask +REF_MUX_JUST: equ 38h ;Ref mux setting justified +AGND_BYPASS: equ 0h ;AGndBypass setting +AGND_BYPASS_MASK: equ 40h ;AGndBypass setting mask +AGND_BYPASS_JUST: equ 0h ;AGndBypass setting justified +SYSCLK_SOURCE: equ (0h | 0h) ;SysClk Source setting +SYSCLK_SOURCE_MASK: equ (4h | 2h) ;SysClk Source setting mask +SYSCLK_SOURCE_JUST: equ (0h | 0h) ;SysClk Source setting justified +SYSCLK_2_DISABLE: equ 0h ;SysClk*2 Disable setting +SYSCLK_2_DISABLE_MASK: equ 1h ;SysClk*2 Disable setting mask +SYSCLK_2_DISABLE_JUST: equ 0h ;SysClk*2 Disable setting justified +; +; register initial values +; +ANALOG_IO_CONTROL: equ 29h ;Analog IO Control register (ABF_CR) +PORT_0_GLOBAL_SELECT: equ 0h ;Port 0 global select register (PRT0GS) +PORT_0_DRIVE_0: equ 4h ;Port 0 drive mode 0 register (PRT0DM0) +PORT_0_DRIVE_1: equ fbh ;Port 0 drive mode 1 register (PRT0DM1) +PORT_0_DRIVE_2: equ fbh ;Port 0 drive mode 2 register (PRT0DM2) +PORT_0_INTENABLE: equ 0h ;Port 0 interrupt enable register (PRT0IE) +PORT_0_INTCTRL_0: equ 0h ;Port 0 interrupt control 0 register (PRT0IC0) +PORT_0_INTCTRL_1: equ 0h ;Port 0 interrupt control 1 register (PRT0IC1) +PORT_1_GLOBAL_SELECT: equ 70h ;Port 1 global select register (PRT1GS) +PORT_1_DRIVE_0: equ 70h ;Port 1 drive mode 0 register (PRT1DM0) +PORT_1_DRIVE_1: equ 8fh ;Port 1 drive mode 1 register (PRT1DM1) +PORT_1_DRIVE_2: equ 8fh ;Port 1 drive mode 2 register (PRT1DM2) +PORT_1_INTENABLE: equ 0h ;Port 1 interrupt enable register (PRT1IE) +PORT_1_INTCTRL_0: equ 0h ;Port 1 interrupt control 0 register (PRT1IC0) +PORT_1_INTCTRL_1: equ 0h ;Port 1 interrupt control 1 register (PRT1IC1) +PORT_2_GLOBAL_SELECT: equ 0h ;Port 2 global select register (PRT2GS) +PORT_2_DRIVE_0: equ ffh ;Port 2 drive mode 0 register (PRT2DM0) +PORT_2_DRIVE_1: equ 0h ;Port 2 drive mode 1 register (PRT2DM1) +PORT_2_DRIVE_2: equ 0h ;Port 2 drive mode 2 register (PRT2DM2) +PORT_2_INTENABLE: equ 0h ;Port 2 interrupt enable register (PRT2IE) +PORT_2_INTCTRL_0: equ 0h ;Port 2 interrupt control 0 register (PRT2IC0) +PORT_2_INTCTRL_1: equ 0h ;Port 2 interrupt control 1 register (PRT2IC1) + +; end of file GlobalParams.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.asm new file mode 100644 index 0000000..42142a2 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.asm @@ -0,0 +1,184 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.asm +;; Version: 2.2, Updated on 2012/9/21 at 11:59:7 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: +;; Assembler source code for a two-OpAmp Instrumentation Amplifier +;; topology in the 25/26xxx family of PSoC devices +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "INSAMP.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export INSAMP_Start +export _INSAMP_Start +export INSAMP_SetPower +export _INSAMP_SetPower + +export INSAMP_SetGain +export _INSAMP_SetGain + +export INSAMP_Stop +export _INSAMP_Stop + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +POWERMASK: equ 0x03 ; Power field mask for CR2 +GAINMASK: equ F0h ; Gain field mask for CR0 + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Start +; FUNCTION NAME: INSAMP_Setpower +; +; DESCRIPTION: +; Sets power to the analog blocks used in this module. All three blocks +; are set to the same power setting (which should be the same as the +; analog reference power global parameter for best operation!). Constants +; for proper values are defined in asm and C interface files. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPowerSetting in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Start: +_INSAMP_Start: + INSAMP_SetPower: +_INSAMP_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + + and A, POWERMASK ; mask A to protect unchanged bits + mov X, SP ; define temp store location + + push A ; put power value in temp store + mov A, reg[INSAMP_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_INV_CR2], A + + mov A, reg[INSAMP_NON_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_NON_INV_CR2], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_SetGain +; +; DESCRIPTION: +; Applies gain set values to the module's PSoC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bGain in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; The A register contains the gain setting per values in .inc file. +; Values in range of 00h to 07h, upper 4 bits only. +; Gain value applied to NON_INV block. +; Difference (E0h-gain value) applied to _INV block. +; + INSAMP_SetGain: +_INSAMP_SetGain: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, GAINMASK ; mask A to protect unchanged bits + mov X, SP ; set base address for local variable + + push A + mov A, reg[INSAMP_NON_INV_CR0] ; read gain value + and A, ~GAINMASK ; clear gain bits in A + or A, [X] ; combine gain value with balance of reg. + mov reg[INSAMP_NON_INV_CR0], A + + mov A, E0h ; load gain complement value + sub a, [X] ; calculate gain value for -INV block + push A + mov A, reg[INSAMP_INV_CR0] ; read gain complement value + and A, ~GAINMASK ; clear gain bits in A + or A, [X+1] ; combine gain value with balance of reg. + mov reg[INSAMP_INV_CR0], A + pop A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Stop +; +; DESCRIPTION: Turns off power to the two CT blocks +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Stop: +_INSAMP_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[INSAMP_NON_INV_CR2], ~POWERMASK + and reg[INSAMP_INV_CR2], ~POWERMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +; End of File INSAMP.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.h new file mode 100644 index 0000000..7b73207 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.h @@ -0,0 +1,72 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: INSAMP.h +// Version: 2.2, Updated on 2012/9/21 at 11:59:7 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: C declarations for a two-OpAmp Instrumentation Amplifier +// topology in the 22/24/27/28xxx family of PSoC devices +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef INSAMP_INCLUDE +#define INSAMP_INCLUDE + +#include + +#pragma fastcall16 INSAMP_Start +#pragma fastcall16 INSAMP_SetPower +#pragma fastcall16 INSAMP_SetGain +#pragma fastcall16 INSAMP_Stop + +//------------------------------------------------- +// Prototypes of the INSAMP API. +//------------------------------------------------- +extern void INSAMP_Start(BYTE bPower); +extern void INSAMP_SetPower(BYTE bPower); +extern void INSAMP_SetGain(BYTE bGain); +extern void INSAMP_Stop(void); + +//------------------------------------------------- +// Defines for INSAMP API's. +//------------------------------------------------- +#define INSAMP_OFF 0 +#define INSAMP_LOWPOWER 1 +#define INSAMP_MEDPOWER 2 +#define INSAMP_HIGHPOWER 3 + +#define INSAMP_G16_0 0x00 +#define INSAMP_G8_00 0x10 +#define INSAMP_G5_33 0x20 +#define INSAMP_G4_00 0x30 +#define INSAMP_G3_20 0x40 +#define INSAMP_G2_67 0x50 +#define INSAMP_G2_27 0x60 +#define INSAMP_G2_00 0x70 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- + +#pragma ioport INSAMP_INV_CR0: 0x071 +BYTE INSAMP_INV_CR0; +#pragma ioport INSAMP_INV_CR1: 0x072 +BYTE INSAMP_INV_CR1; +#pragma ioport INSAMP_INV_CR2: 0x073 +BYTE INSAMP_INV_CR2; +#pragma ioport INSAMP_INV_CR3: 0x070 +BYTE INSAMP_INV_CR3; + +#pragma ioport INSAMP_NON_INV_CR0: 0x075 +BYTE INSAMP_NON_INV_CR0; +#pragma ioport INSAMP_NON_INV_CR1: 0x076 +BYTE INSAMP_NON_INV_CR1; +#pragma ioport INSAMP_NON_INV_CR2: 0x077 +BYTE INSAMP_NON_INV_CR2; +#pragma ioport INSAMP_NON_INV_CR3: 0x074 +BYTE INSAMP_NON_INV_CR3; + +#endif +// end of file INSAMP.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.inc new file mode 100644 index 0000000..70404e1 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.inc @@ -0,0 +1,50 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.inc +;; Version: 2.2, Updated on 2012/9/21 at 11:59:7 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: +;; Assembler declarations for a two-OpAmp Instrumentation Amplifier +;; topology in the 22/24/27/28xxx family of PSoC devices +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for INSAMP API's. +;-------------------------------------------------- + +INSAMP_OFF: equ 0 +INSAMP_LOWPOWER: equ 1 +INSAMP_MEDPOWER: equ 2 +INSAMP_HIGHPOWER: equ 3 + +INSAMP_G16_0: equ 00h +INSAMP_G8_00: equ 10h +INSAMP_G5_33: equ 20h +INSAMP_G4_00: equ 30h +INSAMP_G3_20: equ 40h +INSAMP_G2_67: equ 50h +INSAMP_G2_27: equ 60h +INSAMP_G2_00: equ 70h + +;-------------------------------------------------- +; Register Address Constants for INSAMP +;-------------------------------------------------- + +INSAMP_INV_CR0: equ 0x71 ; CT Block Control Register 0 +INSAMP_INV_CR1: equ 0x72 ; CT Block Control Register 1 +INSAMP_INV_CR2: equ 0x73 ; CT Block Control Register 2 +INSAMP_INV_CR3: equ 0x70 ; CT Block Control Register 3 + +INSAMP_NON_INV_CR0: equ 0x75 ; CT Block Control Register 0 +INSAMP_NON_INV_CR1: equ 0x76 ; CT Block Control Register 1 +INSAMP_NON_INV_CR2: equ 0x77 ; CT Block Control Register 2 +INSAMP_NON_INV_CR3: equ 0x74 ; CT Block Control Register 3 + + +; end of file INSAMP.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.asm new file mode 100644 index 0000000..fc32900 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.asm @@ -0,0 +1,1354 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.asm +;; Version: 1.60, Updated on 2012/9/21 at 11:59:10 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: LCD User Module software implementation file. +;; +;; This set of functions is written for the common 2 and 4 line +;; LCDs that use the Hitachi HD44780A controller. +;; +;; LCD connections to PSoC port +;; +;; PX.0 ==> LCD D4 +;; PX.1 ==> LCD D5 +;; PX.2 ==> LCD D6 +;; PX.3 ==> LCD D7 +;; PX.4 ==> LCD E +;; PX.5 ==> LCD RS +;; PX.6 ==> LCD R/W +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to preserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "LCD.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export LCD_Start +export _LCD_Start +export LCD_Init +export _LCD_Init + +export LCD_WriteData +export _LCD_WriteData + +export LCD_Control +export _LCD_Control + +export LCD_PrString +export _LCD_PrString + +export LCD_PrCString +export _LCD_PrCString + +export LCD_Position +export _LCD_Position + +export LCD_PrHexByte +export _LCD_PrHexByte + +export LCD_PrHexInt +export _LCD_PrHexInt + +export LCD_Delay50uTimes +export _LCD_Delay50uTimes + +export LCD_Delay50u +export _LCD_Delay50u + +;----------------------------------------------- +; If bargraph functions not required, don't +; export the function names. +;----------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) +export LCD_InitBG +export _LCD_InitBG + +export LCD_InitVBG +export _LCD_InitVBG + +; NOTE: The two functions, +; +; LCD_DrawVBG and +; LCD_DrawBG +; +; are implemented using both fastcall16 and legacy fastcall16 because they +; fall into a special and rare case where the calling sequences specified +; by the two disciplines are incompatible. The fastcall16 versions are +; provided for both C and Assembly users in all memory models. The legacy +; fastcall16 versions are provided only to support existing small memory +; model assembly language code---they do not work in the large memory +; model. +; +; ** The legacy fastcall16 versions are provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Their use is +; ** deprecated and their status is "No Further Maintenance". +; +; The fastcall16 versions of these functions are distinguished by a +; leading underscore in the name. The legacy fastcall16 names (which appear +; in this comment) do not have the leading underscore. Details on the +; calling sequence to be used for fastcall16 are given in the user module +; datasheet. +; +; Fastcall16 versions: +export _LCD_DrawVBG +export _LCD_DrawBG + +IF SYSTEM_SMALL_MEMORY_MODEL +; Legacy Fastcall versions: +export LCD_DrawVBG +export LCD_DrawBG +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +ENDIF ; BARGRAPH_ENABLE + +; +; The following functions are deprecated and will be eliminated in a future +; version of PSoC Designer. +; +export LCD_Write_Data +export _LCD_Write_Data + + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_E: equ 10h +LCD_RW: equ 40h +LCD_RS: equ 20h + +LCD_DATA_MASK: equ 0Fh +LCD_READY_BIT: equ 08h + +LCD_DATA_READ: equ ( LCD_E | LCD_RW | LCD_RS ) +LCD_CNTL_READ: equ ( LCD_E | LCD_RW ) +LCD_PORT_WRITE: equ 7Fh +LCD_PORT_MASK: equ 7Fh + +LCD_DISP_INC: equ 03h +LCD_DISP_OFF: equ 08h +LCD_DISP_ON: equ 0Ch +LCD_4BIT_2LINE: equ 2Ch + + +;----------------------------------------------- +; Bargraph definitions +;----------------------------------------------- + +LCD_BG_CHAR_WIDTH: equ 16 ; 16 characters in width +LCD_BG_SEG_WIDTH: equ 80 ; 16 * 5 = 80 +LCD_BG_COL_START: equ 0 ; Always start in the left most column + + ; Offsets for 2x16, 2x20, 4x20 + ; Change these values for a custom LCD + +LCD_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 +LCD_ROW3_OFFSET: equ 94h ; Address/command offset for row 1 +LCD_ROW4_OFFSET: equ D4h ; Address/command offset for row 2 + +LCD_BG_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_BG_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + +LCD_CG_RAM_OFFSET: equ 40h ; Offset to character RAM + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrCString +; +; DESCRIPTION: +; Print constant (ROM) string to LCD +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Pointer to String +; A contains MSB of string address +; X contains LSB of string address +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrCString: +_LCD_PrCString: + RAM_PROLOGUE RAM_USE_CLASS_1 + .Loop_PrCString: + push A ; Store ROM pointer + push X + romx ; Get character from ROM + jnz .LCD_PrCString_WR ; print character and advance pointer + pop X ; Restore the stack + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret ; Return + +.LCD_PrCString_WR: + call LCD_WriteData ; Write data to LCD + pop X ; Get ROM pointer + pop A + inc X ; Inc LSB of pointer + jnc .Loop_PrCString + inc A ; Inc MSB of pointer if LSB overflow + jmp .Loop_PrCString + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexByte +; +; DESCRIPTION: +; Print a byte in Hex (two characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => (BYTE) Data/char to be printed +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +.LITERAL +LCD_HEX_STR:: + DS "0123456789ABCDEF" +.ENDLITERAL +.SECTION + + LCD_PrHexByte: +_LCD_PrHexByte: + RAM_PROLOGUE RAM_USE_CLASS_1 + push A ; Save lower nibble + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + pop A ; Restore value + and A,0Fh ; Mask off lower nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexInt +; +; DESCRIPTION: +; Print an Int in Hex (four characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Integer value +; A contains LSB of Int +; X contains MSB of Int +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrHexInt: +_LCD_PrHexInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + swap A,X + call LCD_PrHexByte ; Print MSB + mov A,X ; Move LSB into position + call LCD_PrHexByte ; Print LSB + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrString +; +; DESCRIPTION: +; Print (RAM) ASCII string to LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X contains pointer to string +; X contains LSB of string pointer +; A contains MSB or page of string pointer (not used at this time) +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; IDX_PP +; +; + LCD_PrString: +_LCD_PrString: + RAM_PROLOGUE RAM_USE_CLASS_3 + RAM_SETPAGE_IDX A + .Loop_PrString: + mov A,[X] ; Get value pointed to by X + jz .End_LCD_PrString ; Check for end of string + ;LCD_writeData is known not to modify X so no need to preserve + call LCD_WriteData ; Write data to screen + inc X ; Advance pointer to next character + jmp .Loop_PrString ; Go get next character +.End_LCD_PrString: + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WriteData +; +; DESCRIPTION: +; Write a byte to the LCD's data register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains byte to be written to LCD data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WriteData: +_LCD_WriteData: + LCD_Write_Data: ; Do not use +_LCD_Write_Data: ; Do not use + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of character + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off high nibble + call LCD_WDATA_Nibble ; Write Upper nibble + pop A ; Retrieve copy of character + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WDATA_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Control +; +; DESCRIPTION: +; Write a byte to the LCD's control register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains data to be written to LCD control register. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_Control: +_LCD_Control: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of byte + asr A ; Shift Upper Nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off, just in case + call LCD_WCNTL_Nibble ; Write high nibble + pop A ; Restore copy of byte + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WCNTL_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WCNTL_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's command register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to command register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WCNTL_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Reset control lines + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in MSN + or A,LCD_E ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; OR in bit 7 just + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + nop + and A,(~LCD_PORT_MASK|LCD_DATA_MASK) ; Disable E signal and leave data on bus. + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WDATA_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's DATA register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +LCD_WDATA_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + or [Port_2_Data_SHADE],LCD_RS ; Raise RS to signify a Data Write + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in A[7:4] + or A,(LCD_E | LCD_RS) ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; Keep shadow in sync + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow in sync + NOP + and A,(~LCD_PORT_MASK|LCD_DATA_MASK|LCD_RS) ; Disable E signal and leave Data on bus + mov [Port_2_Data_SHADE],A ; keep shadow in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Check_Ready +; +; DESCRIPTION: +; Wait until LCD has completed last command. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD is not present, this routine may never return. +; +LCD_Check_Ready: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A ; Save Accumulator + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK ; Mask of all LCD bits + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Zero LCD port bits + + and [Port_2_DriveMode_0_SHADE],~LCD_DATA_MASK ; Clear out LCD mode bits. + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 ; Change port mode to read status + mov reg[LCD_PortMode0],A ; Setup LCD Port for reading + M8C_SetBank0 + + or [Port_2_Data_SHADE],LCD_RW ; Raise RW to signify Read operation + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + NOP + + push X ; Save 'X' register + mov X,255 ; 255 Attempts + +.LCD_RDY_LOOP: + or [Port_2_Data_SHADE], LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Wait 2 nops to make sure data is ready + nop + mov A,reg[LCD_Port] + +; The code below is used to work around the async read issue with the ICE with the +; 25/26xxx family of devices. It will help to eliminate "Invalid memory reference" +; errors. It is not required when running without the ICE or when using any other +; family besides the 25/26xxx family. If not using the ICE or with any other family +; the ICE_PORT_SYNC flag should be set to 0. +IF(ICE_PORT_SYNC) + mov reg[ 0xfa], A + mov A, reg[0xfa] +ENDIF + + push A + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Add delay for the slowest part and the + nop ; fastest PSoC + nop + ; Get the LSBs + or [Port_2_Data_SHADE],LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop + nop + + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_READY_BIT ; Check busy + + jz .UNLOCK + dec X + jnz .LCD_RDY_LOOP ; If LCD still busy, read again for 255 times +.UNLOCK: + pop X ; Restore 'X' register + + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Revert Data bit to Write mode + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_4 ; Restore Accumulator + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Start +; FUNCTION NAME: LCD_Init +; +; DESCRIPTION: +; Initialize LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; THEORY of OPERATION or PROCEDURE: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; This initialization is a bit long, but it should work for +; most 2 and 4 line LCDs. +; + LCD_Start: +_LCD_Start: + LCD_Init: +_LCD_Init: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + + and [Port_2_DriveMode_0_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Set LCD port for writing + and [Port_2_DriveMode_1_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + mov A,[Port_2_DriveMode_1_SHADE] + mov reg[LCD_PortMode1],A + M8C_SetBank0 + + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,82 ; Delay for 4.1 mSec (82 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + call LCD_Delay50u + call LCD_Delay50u + call LCD_Delay50u + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,02h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,08h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,01h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,06h + call LCD_Control + + mov A,0Eh + call LCD_Control + + mov A,LCD_4BIT_2LINE ; Setup for 4 bit interface, 2 line + call LCD_Control + + mov A,LCD_DISP_OFF + call LCD_Control + + mov A,LCD_DISP_ON + call LCD_Control + + mov A,LCD_DISP_INC + call LCD_Control + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Position +; +; DESCRIPTION: +; Position Cursor at Row and Col location +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Row 0 to 3 +; X => Col 0 to 39+ +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +.LITERAL +LCD_ROW_OFFSET:: + DB LCD_ROW1_OFFSET, LCD_ROW2_OFFSET, LCD_ROW3_OFFSET, LCD_ROW4_OFFSET +.ENDLITERAL + +.SECTION + LCD_Position: +_LCD_Position: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,03h ; Mask off 2 bits for row address 0 to 3 + push X ; Store COL + index LCD_ROW_OFFSET ; Get ROW memory offset from table + mov X,SP ; Get Stack pointer + add A,[X+(-1)] ; Add the COL to the display pointer + pop X + + call LCD_Control ; Write control byte + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50uTimes +; +; DESCRIPTION: +; Delay increments of 50uSeconds +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the delay multiplier +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; + LCD_Delay50uTimes: +_LCD_Delay50uTimes: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Delay50u + dec A + jnz LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50u +; +; DESCRIPTION: +; Delay 50uSec for any clock frequency from 1.5MHz to 24MHz +; Slower clock frequencies the delay will be; +; 1.5 +; -------------- * 50uSec +; clock_freq(MHz) +; +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; +.LITERAL + LCD_Delay50u_Table:: + DB 08h, 19h, 3Ah, 7Ch, 01h, 01h, 01h, 01h +; 3MHz, 6MHz, 12MHz, 24MHz, 1.5MHz, 750kHz, 188kHz, 94kHz +.ENDLITERAL +.SECTION + + LCD_Delay50u: + _LCD_Delay50u: ; [11] Call + RAM_PROLOGUE RAM_USE_CLASS_1 + push A + M8C_SetBank1 ; [4] + mov A, reg[OSC_CR0] ; [6] Get delay value + M8C_SetBank0 ; [4] + and A,07h ; [4] Mask off only the clock bits + cmp A,05h + jnc .Delay50u_End + index LCD_Delay50u_Table ; [13] Get delay value +.Delay50u_Loop: ; + dec A ; [4] + jnz .Delay50u_Loop ; [5] +.Delay50u_End: + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +;----------------------------------------------------------------------------- +; If bargraph is not enabled, the following functions are not required. +;----------------------------------------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a horizontal bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 39+ +; [x-1] => Length of bargraph in chars 1 to 40+ +; [X-2] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_COLX: equ 0 ; Stack position of Column +BG_CHAR_LENX: equ -1 ; Stack position of Length +BG_LENGTHX: equ -2 ; Stack position of bargraph pointer position + + +LCD_DrawBG: + push X + mov X,[X+BG_COLX] ; Row in A, Col in X + call LCD_Position ; Set cursor position + pop X ; Restore pointer + +.LCD_BG_LOOP1X: + cmp [X+BG_LENGTHX],00h ; Check for past end of BG + jnz .LCD_CHECK1X + mov A,00h ; Load empty character + jmp .LCD_BG_DOITX ; + +.LCD_CHECK1X: + cmp [X+BG_LENGTHX],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2X ; Note yet, use full character + mov A,[X+BG_LENGTHX] + sub [X+BG_LENGTHX],A + jmp .LCD_BG_DOITX + +.LCD_CHECK2X: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTHX],05h ; Subtract another 5 positions + +.LCD_BG_DOITX: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LENX] ; Dec Char count + jnz .LCD_BG_LOOP1X ; Do it all over again + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; Draw a horizontal bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 39+ +; [SP-5] => Length of bargraph in chars 1 to 40+ +; [SP-6] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_ROW: equ -3 +BG_COL: equ -4 ; Stack position of Column +BG_CHAR_LEN: equ -5 ; Stack position of Length +BG_LENGTH: equ -6 ; Stack position of bargraph pointer position + + +_LCD_DrawBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + push X + mov A,[X+BG_ROW] ; Row in A + mov X,[X+BG_COL] ; Col in X + RAM_EPILOGUE RAM_USE_CLASS_2 + call LCD_Position ; Set cursor position + RAM_PROLOGUE RAM_USE_CLASS_2 + pop X + +.LCD_BG_LOOP1: + cmp [X+BG_LENGTH],00h ; Check for past end of BG + jnz .LCD_CHECK1 + mov A,00h ; Load empty character + jmp .LCD_BG_DOIT ; + +.LCD_CHECK1: + cmp [X+BG_LENGTH],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2 ; Note yet, use full character + mov A,[X+BG_LENGTH] + sub [X+BG_LENGTH],A + jmp .LCD_BG_DOIT + +.LCD_CHECK2: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTH],05h ; Subtract another 5 positions + +.LCD_BG_DOIT: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LEN] ; Dec Char count + jnz .LCD_BG_LOOP1 ; Do it all over again + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a vertical bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 40+ +; [x-1] => Height of bargraph in chars 1 - 4 +; [X-2] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_COLX: equ 0 +VBG_CHAR_HEIGHTX: equ -1 +VBG_SEG_HEIGHTX: equ -2 + +LCD_DrawVBG: + + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOPX: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COLX] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHTX],00h ; Check for zero segs + jnz .VBG_NZ_SEGX + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHARX +.VBG_NZ_SEGX: + cmp [X+VBG_SEG_HEIGHTX],09h ; Check for full segment + jnc .VBG_FULL_SEGX + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHTX] + dec A + mov [X+VBG_SEG_HEIGHTX],00h ; Zero segment height + jmp .VBG_WRITE_CHARX + +.VBG_FULL_SEGX: ; Bargaph + sub [X+VBG_SEG_HEIGHTX],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHARX: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHTX] + jnz .VBG_LOOPX + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; Draw a vertical bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 40+ +; [SP-5] => Height of bargraph in chars 1 - 4 +; [SP-6] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_ROW: equ -3 +VBG_COL: equ -4 +VBG_CHAR_HEIGHT: equ -5 +VBG_SEG_HEIGHT: equ -6 + +_LCD_DrawVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + mov A, [X+VBG_ROW] + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOP: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COL] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHT],00h ; Check for zero segs + jnz .VBG_NZ_SEG + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHAR +.VBG_NZ_SEG: + cmp [X+VBG_SEG_HEIGHT],09h ; Check for full segment + jnc .VBG_FULL_SEG + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHT] + dec A + mov [X+VBG_SEG_HEIGHT],00h ; Zero segment height + jmp .VBG_WRITE_CHAR + +.VBG_FULL_SEG: ; Bargaph + sub [X+VBG_SEG_HEIGHT],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHAR: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHT] + jnz .VBG_LOOP + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitVBG +; +; DESCRIPTION: +; Initialize the vertical bargraph characters. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Stack offset constants +VBGDATA_CTR: equ 00h ; Char data count stack offset +VBG_BYTES: equ 01h ; Byte counter stack offset + + LCD_InitVBG: +_LCD_InitVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + push A ; Create 2 locations + push A + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+VBGDATA_CTR],01h ; Reset data counter + + .VBG_Loop1: ; loop once for each 8 characters + mov [X+VBG_BYTES],08h ; Load cycle pointer + .VBG_Loop2: ; Loop once for each line in character (8 times) + mov A,[X+VBGDATA_CTR] + cmp A,[X+VBG_BYTES] + jnc .VBG_SOLID + mov A,00h ; Empty line + jmp .VBG_Load ; Jump to load the bargraph +.VBG_SOLID: + mov A,FFh ; Load solid line +.VBG_Load: + call LCD_WriteData ; character data + dec [X+VBG_BYTES] ; Dec byte counter + jnz .VBG_Loop2 ; End Loop 2 + inc [X+VBGDATA_CTR] + cmp [X+VBGDATA_CTR],09h + jnz .VBG_Loop1 ; End Loop1 + + pop A + pop A + mov A,LCD_DISP_ON ; Turn on display, don't really + call LCD_Control ; need this. + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitBG +; +; DESCRIPTION: +; Initialize horizontal bargraph characters +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A = type 0 = full |||||||||........ +; 1 = single vertical line ..........|...... +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; THEORY of OPERATION or PROCEDURE: +; This function writes to the LCD character RAM to generate 8 custom +; characters used to generated one of two horizontal bargraphs. +; +.LITERAL + LCD_BG_TYPE1:: ; ....., |...., ||..., |||.., ||||., |||||, ||||| + DB 00h, 10h, 18h, 1Ch, 1Eh, 1Fh, 1Fh + LCD_BG_TYPE2:: ; ....., |...., .|..., ..|.., ...|., ....|, ..... + DB 00h, 10h, 08h, 04h, 02h, 01h, 00h +.ENDLITERAL + +.SECTION +; Stack offset constants +BGDATA_PTR: equ 00h ; Stack offsets +BGCHARS: equ 01h +BGTYPE: equ 02h + + LCD_InitBG: +_LCD_InitBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + add SP,3 + mov [X+BGTYPE],A ; Store the bargraph type + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+BGDATA_PTR],00h ; Reset pointer to BG data + + .BG_Loop1: + mov [X+BGCHARS],08h ; Load cycle pointer + .BG_Loop2: + mov A,[X+BGDATA_PTR] + cmp [X+BGTYPE],00h ; Check which bargraph + jnz .BG_OTHER + index LCD_BG_TYPE1 + jmp .BG_Load + .BG_OTHER: + index LCD_BG_TYPE2 + .BG_Load: + call LCD_WriteData + dec [X+BGCHARS] ; Character builder counter + jnz .BG_Loop2 + inc [X+BGDATA_PTR] ; Advance to next character + cmp [X+BGDATA_PTR],07h + jnz .BG_Loop1 + + add SP,-3 + mov A,LCD_DISP_ON + call LCD_Control + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +ENDIF + +; End of File LCD.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.h new file mode 100644 index 0000000..23e5a48 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.h @@ -0,0 +1,102 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: LCD.h +// Version: 1.60, Updated on 2012/9/21 at 11:59:10 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: LCD User Module C Language interface file. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef LCD_INCLUDE +#define LCD_INCLUDE + +#include + +#define LCD_BARGRAPH_ENABLE 1 + +/* Create pragmas to support proper argument and return value passing */ +#pragma fastcall16 LCD_Start +#pragma fastcall16 LCD_Init +#pragma fastcall16 LCD_Control +#pragma fastcall16 LCD_WriteData +#pragma fastcall16 LCD_PrString +#pragma fastcall16 LCD_PrCString +#pragma fastcall16 LCD_PrHexByte +#pragma fastcall16 LCD_PrHexInt +#pragma fastcall16 LCD_Position +#pragma fastcall16 LCD_Delay50uTimes +#pragma fastcall16 LCD_Delay50u + +#if ( LCD_BARGRAPH_ENABLE ) +#pragma fastcall16 LCD_InitBG +#pragma fastcall16 LCD_DrawBG +#pragma fastcall16 LCD_InitVBG +#pragma fastcall16 LCD_DrawVBG +#endif + +//------------------------------------------------- +// Prototypes of the LCD API. +//------------------------------------------------- + +extern void LCD_Start(void); +extern void LCD_Init(void); +extern void LCD_Control(BYTE bData); +extern void LCD_WriteData(BYTE bData); +extern void LCD_PrString(char * sRamString); +extern void LCD_PrCString(const char * sRomString); +extern void LCD_Position(BYTE bRow, BYTE bCol); +extern void LCD_PrHexByte(BYTE bValue); +extern void LCD_PrHexInt(INT iValue); + +extern void LCD_Delay50uTimes(BYTE bTimes); +extern void LCD_Delay50u(void); + +// Do not use, will be removed in future version. +extern void LCD_Write_Data(BYTE bData); +#pragma fastcall16 LCD_Write_Data +// + + +#if ( LCD_BARGRAPH_ENABLE ) +extern void LCD_InitBG(BYTE bBGType); +extern void LCD_InitVBG(void); +extern void LCD_DrawVBG(BYTE bRow, BYTE bCol, BYTE bHeight, BYTE bPixelRowEnd); +extern void LCD_DrawBG(BYTE bRow, BYTE bCol, BYTE bLen, BYTE bPixelColEnd); + + +#define LCD_SOLID_BG 0x00 +#define LCD_LINE_BG 0x01 + + +#endif + +//------------------------------------------------- +// Defines for LCD API's. +//------------------------------------------------- +#define LCD_DISP_ON 0x0C +#define LCD_DISP_OFF 0x08 +#define LCD_DISP_BLANK 0x0A +#define LCD_DISP_CLEAR_HOME 0x01 +#define LCD_CURSOR_ON 0x0E +#define LCD_CURSOR_OFF 0x0C +#define LCD_CURSOR_WINK 0x0D +#define LCD_CURSOR_BLINK 0x0F +#define LCD_CURSOR_SH_LEFT 0x10 +#define LCD_CURSOR_SH_RIGHT 0x14 +#define LCD_CURSOR_HOME 0x02 +#define LCD_CURSOR_LEFT 0x04 +#define LCD_CURSOR_RIGHT 0x06 + +#define LCD_PORT_MASK 0x7F +//------------------------------------------------------ +// Register Address Constants for LCD +//------------------------------------------------------ + +#define LCD_Port PRT2DR +#define LCD_PortMode0 PRT2DM0 +#define LCD_PortMode1 PRT2DM1 + +#endif +// end of file LCD.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.inc new file mode 100644 index 0000000..8515a23 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.inc @@ -0,0 +1,71 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.inc +;; Version: 1.60, Updated on 2012/9/21 at 11:59:10 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the LCD user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +; LCD connections to PSoC port +; +; PX.0 ==> LCD D4 +; PX.1 ==> LCD D5 +; PX.2 ==> LCD D6 +; PX.3 ==> LCD D7 +; PX.4 ==> LCD E +; PX.5 ==> LCD RS +; PX.6 ==> LCD R/W + + +include "m8c.inc" + +;------------------------------------------------------ +; Register Address Constants for LCD +;------------------------------------------------------ + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_BARGRAPH_ENABLE: equ 1 + + +;----------------------------------------------- +; Constants for LCD +;----------------------------------------------- +; LCD commands + +LCD_DISP_ON: equ 0Ch +LCD_DISP_OFF: equ 08h +LCD_CURSOR_ON: equ 0Eh +LCD_CURSOR_OFF: equ 0Ch +LCD_CURSOR_BLINK: equ 0Fh +LCD_CURSOR_WINK: equ 0Dh +LCD_CURSOR_SH_LEFT: equ 10h +LCD_CURSOR_SH_RIGHT: equ 14h +LCD_CURSOR_HOME: equ 02h +LCD_CURSOR_LEFT: equ 04h +LCD_CURSOR_RIGHT: equ 06h +LCD_DISP_CLEAR_HOME: equ 01h + +LCD_SOLID_BG: equ 00h +LCD_LINE_BG: equ 01h + +LCD_PORT_MASK: equ 7Fh + +ICE_PORT_SYNC: equ 0 ; This flag must be set to one to work around + ; the async read issue with the ICE with the + ; 25/26xxx family of devices. It will help + ; to eliminate "Invalid memory reference" errors. + ; It is not required when running without the ICE + ; or when using any other family besides the + ; 25/26xxx family. If not using the ICE, this flag + ; may be set to 0. + +; end of file LCD.inc + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfig.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfig.asm new file mode 100644 index 0000000..36bc29a --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfig.asm @@ -0,0 +1,197 @@ +; Generated by PSoC Designer 5.3.2710 +; +;========================================================================== +; PSoCConfig.asm +; @PSOC_VERSION +; +; Version: 0.85 +; Revised: June 22, 2004 +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; This file is generated by the Device Editor on Application Generation. +; It contains code which loads the configuration data table generated in +; the file PSoCConfigTBL.asm +; +; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!! +; Edits to this file will not be preserved. +;========================================================================== +; +include "m8c.inc" +include "memory.inc" +include "GlobalParams.inc" + +export LoadConfigInit +export _LoadConfigInit +export LoadConfig_slc_free_28_pin_feb_16_2013 +export _LoadConfig_slc_free_28_pin_feb_16_2013 +export Port_2_Data_SHADE +export _Port_2_Data_SHADE +export Port_2_DriveMode_0_SHADE +export _Port_2_DriveMode_0_SHADE +export Port_2_DriveMode_1_SHADE +export _Port_2_DriveMode_1_SHADE + + +export NO_SHADOW +export _NO_SHADOW + +FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask +END_CONFIG_TABLE: equ ffh ;end of config table indicator + +AREA psoc_config(rom, rel) + +;--------------------------------------------------------------------------- +; LoadConfigInit - Establish the start-up configuration (except for a few +; parameters handled by boot code, like CPU speed). This +; function can be called from user code, but typically it +; is only called from boot. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfigInit: + LoadConfigInit: + RAM_PROLOGUE RAM_USE_CLASS_4 + + mov [Port_2_Data_SHADE], 0h + mov [Port_2_DriveMode_0_SHADE], ffh + mov [Port_2_DriveMode_1_SHADE], 0h + + lcall LoadConfig_slc_free_28_pin_feb_16_2013 + lcall LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret + +;--------------------------------------------------------------------------- +; Load Configuration slc_free_28_pin_feb_16_2013 +; +; Load configuration registers for slc_free_28_pin_feb_16_2013. +; IO Bank 0 registers a loaded first,then those in IO Bank 1. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be +; modified as may the Page Pointer registers! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfig_slc_free_28_pin_feb_16_2013: + LoadConfig_slc_free_28_pin_feb_16_2013: + RAM_PROLOGUE RAM_USE_CLASS_4 + + push x + M8C_SetBank0 ; Force bank 0 + mov a, 0 ; Specify bank 0 + asr a ; Store in carry flag + ; Load bank 0 table: + mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + mov X, LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + mov X, Bank 0; Carry=1 => Bank 1) +; +; RETURNS: nothing. +; +; STACK FRAME: X-4 I/O Bank 0/1 indicator +; X-3 Temporary store for register address +; X-2 LSB of config table address +; X-1 MSB of config table address +; +LoadConfig: + RAM_PROLOGUE RAM_USE_CLASS_2 + add SP, 2 ; Set up local vars + push X ; Save config table address on stack + push A + mov X, SP + mov [X-4], 0 ; Set default Destination to Bank 0 + jnc .BankSelectSaved ; Carry says Bank 0 is OK + mov [X-4], 1 ; No Carry: default to Bank 1 +.BankSelectSaved: + pop A + pop X + +LoadConfigLp: + M8C_SetBank0 ; Switch to bank 0 + M8C_ClearWDT ; Clear the watchdog for long inits + push X ; Preserve the config table address + push A + romx ; Load register address from table + cmp A, END_CONFIG_TABLE ; End of table? + jz EndLoadConfig ; Yes, go wrap it up + mov X, SP ; + tst [X-4], 1 ; Loading IO Bank 1? + jz .IOBankNowSet ; No, Bank 0 is fine + M8C_SetBank1 ; Yes, switch to Bank 1 +.IOBankNowSet: + mov [X-3], A ; Stash the register address + pop A ; Retrieve the table address + pop X + inc X ; Advance to the data byte + adc A, 0 + push X ; Save the config table address again + push A + romx ; load config data from the table + mov X, SP ; retrieve the register address + mov X, [X-3] + mov reg[X], A ; Configure the register + pop A ; retrieve the table address + pop X + inc X ; advance to next table entry + adc A, 0 + jmp LoadConfigLp ; loop to configure another register +EndLoadConfig: + add SP, -4 + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +AREA InterruptRAM(ram, rel) + +NO_SHADOW: +_NO_SHADOW: +; write only register shadows +_Port_2_Data_SHADE: +Port_2_Data_SHADE: BLK 1 +_Port_2_DriveMode_0_SHADE: +Port_2_DriveMode_0_SHADE: BLK 1 +_Port_2_DriveMode_1_SHADE: +Port_2_DriveMode_1_SHADE: BLK 1 + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfigtbl.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfigtbl.asm new file mode 100644 index 0000000..901262a --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfigtbl.asm @@ -0,0 +1,180 @@ +; Generated by PSoC Designer 5.3.2710 +; +include "m8c.inc" +; Personalization tables +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered +AREA lit(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) + db 84h, 90h ;ADCINC_AtoDcr0(ASD11CR0) + db 85h, 00h ;ADCINC_AtoDcr1(ASD11CR1) + db 86h, 60h ;ADCINC_AtoDcr2(ASD11CR2) + db 87h, f8h ;ADCINC_AtoDcr3(ASD11CR3) +; Instance name ADCINC, Block Name PWM(DBB00) + db 23h, 00h ;ADCINC_PWMcr0(DBB00CR0) + db 21h, 00h ;ADCINC_PWMdr1(DBB00DR1) + db 22h, 01h ;ADCINC_PWMdr2(DBB00DR2) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) + db 80h, 80h ;DAC6_VGND_CR0(ASC10CR0) + db 81h, 40h ;DAC6_VGND_CR1(ASC10CR1) + db 82h, a0h ;DAC6_VGND_CR2(ASC10CR2) + db 83h, 30h ;DAC6_VGND_CR3(ASC10CR3) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) + db 90h, 80h ;DAC9_Ia_LSB_CR0(ASD20CR0) + db 91h, 80h ;DAC9_Ia_LSB_CR1(ASD20CR1) + db 92h, 20h ;DAC9_Ia_LSB_CR2(ASD20CR2) + db 93h, 30h ;DAC9_Ia_LSB_CR3(ASD20CR3) +; Instance name DAC9_Ia, Block Name MSB(ASC21) + db 94h, a0h ;DAC9_Ia_MSB_CR0(ASC21CR0) + db 95h, 41h ;DAC9_Ia_MSB_CR1(ASC21CR1) + db 96h, a0h ;DAC9_Ia_MSB_CR2(ASC21CR2) + db 97h, 34h ;DAC9_Ia_MSB_CR3(ASC21CR3) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) + db 71h, ddh ;INSAMP_INV_CR0(ACB00CR0) + db 72h, 21h ;INSAMP_INV_CR1(ACB00CR1) + db 73h, 20h ;INSAMP_INV_CR2(ACB00CR2) + db 70h, 00h ;INSAMP_INV_CR3(ACB00CR3) +; Instance name INSAMP, Block Name NON_INV(ACB01) + db 75h, 1ch ;INSAMP_NON_INV_CR0(ACB01CR0) + db 76h, 21h ;INSAMP_NON_INV_CR1(ACB01CR1) + db 77h, 20h ;INSAMP_NON_INV_CR2(ACB01CR2) + db 74h, 00h ;INSAMP_NON_INV_CR3(ACB01CR3) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 27h, 00h ;PWM8_Heater_CONTROL_REG(DBB01CR0) + db 25h, ffh ;PWM8_Heater_PERIOD_REG(DBB01DR1) + db 26h, 00h ;PWM8_Heater_COMPARE_REG(DBB01DR2) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2fh, 00h ;PWM8_NB_Out_CONTROL_REG(DCB03CR0) + db 2dh, ffh ;PWM8_NB_Out_PERIOD_REG(DCB03DR1) + db 2eh, 00h ;PWM8_NB_Out_COMPARE_REG(DCB03DR2) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 2bh, 00h ;PWM8_Vout_CONTROL_REG(DCB02CR0) + db 29h, ffh ;PWM8_Vout_PERIOD_REG(DCB02DR1) + db 2ah, 00h ;PWM8_Vout_COMPARE_REG(DCB02DR2) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 0 + db 60h, 09h ; AnalogColumnInputSelect register (AMX_IN) + db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1) + db 63h, 3fh ; AnalogReferenceControl register (ARF_CR) + db 65h, 00h ; AnalogSyncControl register (ASY_CR) + db e6h, 02h ; DecimatorControl_0 register (DEC_CR0) + db e7h, 02h ; DecimatorControl_1 register (DEC_CR1) + db d6h, 00h ; I2CConfig register (I2CCFG) + db b0h, 00h ; Row_0_InputMux register (RDI0RI) + db b1h, 00h ; Row_0_InputSync register (RDI0SYN) + db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS) + db b3h, 33h ; Row_0_LogicSelect_0 register (RDI0LT0) + db b4h, 33h ; Row_0_LogicSelect_1 register (RDI0LT1) + db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0) + db b6h, 08h ; Row_0_OutputDrive_1 register (RDI0SRO1) + db ffh +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) +; Instance name ADCINC, Block Name PWM(DBB00) + db 20h, 31h ;ADCINC_PWMfn(DBB00FN) + db 21h, 16h ;ADCINC_PWMsl(DBB00IN) + db 22h, 40h ;ADCINC_PWMos(DBB00OU) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) +; Instance name DAC9_Ia, Block Name MSB(ASC21) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) +; Instance name INSAMP, Block Name NON_INV(ACB01) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 24h, 31h ;PWM8_Heater_FUNC_REG(DBB01FN) + db 25h, 11h ;PWM8_Heater_INPUT_REG(DBB01IN) + db 26h, 44h ;PWM8_Heater_OUTPUT_REG(DBB01OU) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2ch, 31h ;PWM8_NB_Out_FUNC_REG(DCB03FN) + db 2dh, 14h ;PWM8_NB_Out_INPUT_REG(DCB03IN) + db 2eh, 06h ;PWM8_NB_Out_OUTPUT_REG(DCB03OU) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 28h, 31h ;PWM8_Vout_FUNC_REG(DCB02FN) + db 29h, 14h ;PWM8_Vout_INPUT_REG(DCB02IN) + db 2ah, 05h ;PWM8_Vout_OUTPUT_REG(DCB02OU) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 1 + db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1) + db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2) + db 60h, 05h ; AnalogColumnClockSelect register (CLK_CR0) + db 62h, 29h ; AnalogIOControl_0 register (ABF_CR0) + db 67h, 33h ; AnalogLUTControl0 register (ALT_CR0) + db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1) + db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0) + db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1) + db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN) + db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU) + db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN) + db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU) + db e1h, 0bh ; OscillatorControl_1 register (OSC_CR1) + db e2h, 00h ; OscillatorControl_2 register (OSC_CR2) + db dfh, 2fh ; OscillatorControl_3 register (OSC_CR3) + db deh, 00h ; OscillatorControl_4 register (OSC_CR4) + db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN) + db ffh +AREA psoc_config(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered: +; Ordered Global Register values + M8C_SetBank0 + mov reg[00h], 00h ; Port_0_Data register (PRT0DR) + M8C_SetBank1 + mov reg[00h], 04h ; Port_0_DriveMode_0 register (PRT0DM0) + mov reg[01h], fbh ; Port_0_DriveMode_1 register (PRT0DM1) + M8C_SetBank0 + mov reg[03h], fbh ; Port_0_DriveMode_2 register (PRT0DM2) + mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS) + M8C_SetBank1 + mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0) + mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1) + M8C_SetBank0 + mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE) + mov reg[04h], 00h ; Port_1_Data register (PRT1DR) + M8C_SetBank1 + mov reg[04h], 70h ; Port_1_DriveMode_0 register (PRT1DM0) + mov reg[05h], 8fh ; Port_1_DriveMode_1 register (PRT1DM1) + M8C_SetBank0 + mov reg[07h], 8fh ; Port_1_DriveMode_2 register (PRT1DM2) + mov reg[06h], 70h ; Port_1_GlobalSelect register (PRT1GS) + M8C_SetBank1 + mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0) + mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1) + M8C_SetBank0 + mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE) + mov reg[08h], 00h ; Port_2_Data register (PRT2DR) + M8C_SetBank1 + mov reg[08h], ffh ; Port_2_DriveMode_0 register (PRT2DM0) + mov reg[09h], 00h ; Port_2_DriveMode_1 register (PRT2DM1) + M8C_SetBank0 + mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2) + mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS) + M8C_SetBank1 + mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0) + mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1) + M8C_SetBank0 + mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE) + M8C_SetBank0 + ret + + +; PSoC Configuration file trailer PsocConfig.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.h new file mode 100644 index 0000000..3e3dd2b --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.h @@ -0,0 +1,236 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.3.2710 +******************************************************************************/ +#include +// AnalogOutBuf_0 address and mask defines +#pragma ioport AnalogOutBuf_0_Data_ADDR: 0x0 +BYTE AnalogOutBuf_0_Data_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_0_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_0_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_0_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_0_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_0_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_0_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_0_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_0_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_0_IntEn_ADDR; +#define AnalogOutBuf_0_MASK 0x8 +// AnalogOutBuf_1 address and mask defines +#pragma ioport AnalogOutBuf_1_Data_ADDR: 0x0 +BYTE AnalogOutBuf_1_Data_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_1_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_1_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_1_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_1_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_1_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_1_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_1_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_1_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_1_IntEn_ADDR; +#define AnalogOutBuf_1_MASK 0x20 +// LCDD4 address and mask defines +#pragma ioport LCDD4_Data_ADDR: 0x8 +BYTE LCDD4_Data_ADDR; +#pragma ioport LCDD4_DriveMode_0_ADDR: 0x108 +BYTE LCDD4_DriveMode_0_ADDR; +#pragma ioport LCDD4_DriveMode_1_ADDR: 0x109 +BYTE LCDD4_DriveMode_1_ADDR; +#pragma ioport LCDD4_DriveMode_2_ADDR: 0xb +BYTE LCDD4_DriveMode_2_ADDR; +#pragma ioport LCDD4_GlobalSelect_ADDR: 0xa +BYTE LCDD4_GlobalSelect_ADDR; +#pragma ioport LCDD4_IntCtrl_0_ADDR: 0x10a +BYTE LCDD4_IntCtrl_0_ADDR; +#pragma ioport LCDD4_IntCtrl_1_ADDR: 0x10b +BYTE LCDD4_IntCtrl_1_ADDR; +#pragma ioport LCDD4_IntEn_ADDR: 0x9 +BYTE LCDD4_IntEn_ADDR; +#define LCDD4_MASK 0x1 +// LCDD4 Shadow defines +// LCDD4_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD4_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD4_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD4_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD4_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD4_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD5 address and mask defines +#pragma ioport LCDD5_Data_ADDR: 0x8 +BYTE LCDD5_Data_ADDR; +#pragma ioport LCDD5_DriveMode_0_ADDR: 0x108 +BYTE LCDD5_DriveMode_0_ADDR; +#pragma ioport LCDD5_DriveMode_1_ADDR: 0x109 +BYTE LCDD5_DriveMode_1_ADDR; +#pragma ioport LCDD5_DriveMode_2_ADDR: 0xb +BYTE LCDD5_DriveMode_2_ADDR; +#pragma ioport LCDD5_GlobalSelect_ADDR: 0xa +BYTE LCDD5_GlobalSelect_ADDR; +#pragma ioport LCDD5_IntCtrl_0_ADDR: 0x10a +BYTE LCDD5_IntCtrl_0_ADDR; +#pragma ioport LCDD5_IntCtrl_1_ADDR: 0x10b +BYTE LCDD5_IntCtrl_1_ADDR; +#pragma ioport LCDD5_IntEn_ADDR: 0x9 +BYTE LCDD5_IntEn_ADDR; +#define LCDD5_MASK 0x2 +// LCDD5 Shadow defines +// LCDD5_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD5_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD5_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD5_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD5_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD5_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD6 address and mask defines +#pragma ioport LCDD6_Data_ADDR: 0x8 +BYTE LCDD6_Data_ADDR; +#pragma ioport LCDD6_DriveMode_0_ADDR: 0x108 +BYTE LCDD6_DriveMode_0_ADDR; +#pragma ioport LCDD6_DriveMode_1_ADDR: 0x109 +BYTE LCDD6_DriveMode_1_ADDR; +#pragma ioport LCDD6_DriveMode_2_ADDR: 0xb +BYTE LCDD6_DriveMode_2_ADDR; +#pragma ioport LCDD6_GlobalSelect_ADDR: 0xa +BYTE LCDD6_GlobalSelect_ADDR; +#pragma ioport LCDD6_IntCtrl_0_ADDR: 0x10a +BYTE LCDD6_IntCtrl_0_ADDR; +#pragma ioport LCDD6_IntCtrl_1_ADDR: 0x10b +BYTE LCDD6_IntCtrl_1_ADDR; +#pragma ioport LCDD6_IntEn_ADDR: 0x9 +BYTE LCDD6_IntEn_ADDR; +#define LCDD6_MASK 0x4 +// LCDD6 Shadow defines +// LCDD6_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD6_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD6_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD6_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD6_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD6_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD7 address and mask defines +#pragma ioport LCDD7_Data_ADDR: 0x8 +BYTE LCDD7_Data_ADDR; +#pragma ioport LCDD7_DriveMode_0_ADDR: 0x108 +BYTE LCDD7_DriveMode_0_ADDR; +#pragma ioport LCDD7_DriveMode_1_ADDR: 0x109 +BYTE LCDD7_DriveMode_1_ADDR; +#pragma ioport LCDD7_DriveMode_2_ADDR: 0xb +BYTE LCDD7_DriveMode_2_ADDR; +#pragma ioport LCDD7_GlobalSelect_ADDR: 0xa +BYTE LCDD7_GlobalSelect_ADDR; +#pragma ioport LCDD7_IntCtrl_0_ADDR: 0x10a +BYTE LCDD7_IntCtrl_0_ADDR; +#pragma ioport LCDD7_IntCtrl_1_ADDR: 0x10b +BYTE LCDD7_IntCtrl_1_ADDR; +#pragma ioport LCDD7_IntEn_ADDR: 0x9 +BYTE LCDD7_IntEn_ADDR; +#define LCDD7_MASK 0x8 +// LCDD7 Shadow defines +// LCDD7_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD7_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD7_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD7_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD7_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD7_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDE address and mask defines +#pragma ioport LCDE_Data_ADDR: 0x8 +BYTE LCDE_Data_ADDR; +#pragma ioport LCDE_DriveMode_0_ADDR: 0x108 +BYTE LCDE_DriveMode_0_ADDR; +#pragma ioport LCDE_DriveMode_1_ADDR: 0x109 +BYTE LCDE_DriveMode_1_ADDR; +#pragma ioport LCDE_DriveMode_2_ADDR: 0xb +BYTE LCDE_DriveMode_2_ADDR; +#pragma ioport LCDE_GlobalSelect_ADDR: 0xa +BYTE LCDE_GlobalSelect_ADDR; +#pragma ioport LCDE_IntCtrl_0_ADDR: 0x10a +BYTE LCDE_IntCtrl_0_ADDR; +#pragma ioport LCDE_IntCtrl_1_ADDR: 0x10b +BYTE LCDE_IntCtrl_1_ADDR; +#pragma ioport LCDE_IntEn_ADDR: 0x9 +BYTE LCDE_IntEn_ADDR; +#define LCDE_MASK 0x10 +// LCDE Shadow defines +// LCDE_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDE_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDE_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDE_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDE_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDE_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRS address and mask defines +#pragma ioport LCDRS_Data_ADDR: 0x8 +BYTE LCDRS_Data_ADDR; +#pragma ioport LCDRS_DriveMode_0_ADDR: 0x108 +BYTE LCDRS_DriveMode_0_ADDR; +#pragma ioport LCDRS_DriveMode_1_ADDR: 0x109 +BYTE LCDRS_DriveMode_1_ADDR; +#pragma ioport LCDRS_DriveMode_2_ADDR: 0xb +BYTE LCDRS_DriveMode_2_ADDR; +#pragma ioport LCDRS_GlobalSelect_ADDR: 0xa +BYTE LCDRS_GlobalSelect_ADDR; +#pragma ioport LCDRS_IntCtrl_0_ADDR: 0x10a +BYTE LCDRS_IntCtrl_0_ADDR; +#pragma ioport LCDRS_IntCtrl_1_ADDR: 0x10b +BYTE LCDRS_IntCtrl_1_ADDR; +#pragma ioport LCDRS_IntEn_ADDR: 0x9 +BYTE LCDRS_IntEn_ADDR; +#define LCDRS_MASK 0x20 +// LCDRS Shadow defines +// LCDRS_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRS_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRS_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRS_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRS_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRS_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRW address and mask defines +#pragma ioport LCDRW_Data_ADDR: 0x8 +BYTE LCDRW_Data_ADDR; +#pragma ioport LCDRW_DriveMode_0_ADDR: 0x108 +BYTE LCDRW_DriveMode_0_ADDR; +#pragma ioport LCDRW_DriveMode_1_ADDR: 0x109 +BYTE LCDRW_DriveMode_1_ADDR; +#pragma ioport LCDRW_DriveMode_2_ADDR: 0xb +BYTE LCDRW_DriveMode_2_ADDR; +#pragma ioport LCDRW_GlobalSelect_ADDR: 0xa +BYTE LCDRW_GlobalSelect_ADDR; +#pragma ioport LCDRW_IntCtrl_0_ADDR: 0x10a +BYTE LCDRW_IntCtrl_0_ADDR; +#pragma ioport LCDRW_IntCtrl_1_ADDR: 0x10b +BYTE LCDRW_IntCtrl_1_ADDR; +#pragma ioport LCDRW_IntEn_ADDR: 0x9 +BYTE LCDRW_IntEn_ADDR; +#define LCDRW_MASK 0x40 +// LCDRW Shadow defines +// LCDRW_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRW_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRW_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRW_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRW_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRW_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.asm new file mode 100644 index 0000000..1ec9a61 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Heater_EnableInt +export _PWM8_Heater_EnableInt +export PWM8_Heater_DisableInt +export _PWM8_Heater_DisableInt +export PWM8_Heater_Start +export _PWM8_Heater_Start +export PWM8_Heater_Stop +export _PWM8_Heater_Stop +export PWM8_Heater_WritePeriod +export _PWM8_Heater_WritePeriod +export PWM8_Heater_WritePulseWidth +export _PWM8_Heater_WritePulseWidth +export PWM8_Heater_bReadPulseWidth +export _PWM8_Heater_bReadPulseWidth +export PWM8_Heater_bReadCounter +export _PWM8_Heater_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Heater_ReadPulseWidth ; deprecated +export _bPWM8_Heater_ReadPulseWidth ; deprecated +export bPWM8_Heater_ReadCounter ; deprecated +export _bPWM8_Heater_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_EnableInt: +_PWM8_Heater_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_DisableInt: +_PWM8_Heater_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Start: +_PWM8_Heater_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Stop: +_PWM8_Heater_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePeriod: +_PWM8_Heater_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePulseWidth: +_PWM8_Heater_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadPulseWidth: +_PWM8_Heater_bReadPulseWidth: + bPWM8_Heater_ReadPulseWidth: ; this name deprecated +_bPWM8_Heater_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Heater_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadCounter: +_PWM8_Heater_bReadCounter: + bPWM8_Heater_ReadCounter: ; this name deprecated +_bPWM8_Heater_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Heater_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Heater_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Heater_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Heater_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Heater_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Heater_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Heater_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Heater_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Heater_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Heater.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.h new file mode 100644 index 0000000..de54579 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Heater.h +// Version: 2.60, Updated on 2012/9/21 at 11:59:18 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Heater_INCLUDE +#define PWM8_Heater_INCLUDE + +#include + +#pragma fastcall16 PWM8_Heater_EnableInt +#pragma fastcall16 PWM8_Heater_DisableInt +#pragma fastcall16 PWM8_Heater_Start +#pragma fastcall16 PWM8_Heater_Stop +#pragma fastcall16 PWM8_Heater_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Heater_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Heater_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Heater_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Heater_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Heater_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Heater API. +//------------------------------------------------- + +extern void PWM8_Heater_EnableInt(void); // Proxy Class 1 +extern void PWM8_Heater_DisableInt(void); // Proxy Class 1 +extern void PWM8_Heater_Start(void); // Proxy Class 1 +extern void PWM8_Heater_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Heater_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Heater_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Heater_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Heater_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Heater API's. +//-------------------------------------------------- + +#define PWM8_Heater_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Heater_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Heater_INT_MASK ( 0x02 ) + + +//-------------------------------------------------- +// Constants for PWM8_Heater user defined values +//-------------------------------------------------- + +#define PWM8_Heater_PERIOD ( 0xff ) +#define PWM8_Heater_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Heater +//------------------------------------------------- + +#pragma ioport PWM8_Heater_COUNTER_REG: 0x024 //DR0 Count register +BYTE PWM8_Heater_COUNTER_REG; +#pragma ioport PWM8_Heater_PERIOD_REG: 0x025 //DR1 Period register +BYTE PWM8_Heater_PERIOD_REG; +#pragma ioport PWM8_Heater_COMPARE_REG: 0x026 //DR2 Compare register +BYTE PWM8_Heater_COMPARE_REG; +#pragma ioport PWM8_Heater_CONTROL_REG: 0x027 //Control register +BYTE PWM8_Heater_CONTROL_REG; +#pragma ioport PWM8_Heater_FUNC_REG: 0x124 //Function register +BYTE PWM8_Heater_FUNC_REG; +#pragma ioport PWM8_Heater_INPUT_REG: 0x125 //Input register +BYTE PWM8_Heater_INPUT_REG; +#pragma ioport PWM8_Heater_OUTPUT_REG: 0x126 //Output register +BYTE PWM8_Heater_OUTPUT_REG; +#pragma ioport PWM8_Heater_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Heater_INT_REG; + + +//------------------------------------------------- +// PWM8_Heater Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Heater_Start_M \ + PWM8_Heater_CONTROL_REG |= PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_Stop_M \ + PWM8_Heater_CONTROL_REG &= ~PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_EnableInt_M \ + M8C_EnableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#define PWM8_Heater_DisableInt_M \ + M8C_DisableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#endif +// end of file PWM8_Heater.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.inc new file mode 100644 index 0000000..b37aaca --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.inc +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Heater API's. +;-------------------------------------------------- + +PWM8_Heater_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Heater_INT_REG: equ 0x0e1 +PWM8_Heater_INT_MASK: equ 0x02 + + +;-------------------------------------------------- +; Constants for PWM8_Heater user defined values +;-------------------------------------------------- + +PWM8_Heater_PERIOD: equ 0xff +PWM8_Heater_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Heater +;-------------------------------------------------- + +PWM8_Heater_COUNTER_REG: equ 0x24 ; DR0 Count register +PWM8_Heater_PERIOD_REG: equ 0x25 ; DR1 Period register +PWM8_Heater_COMPARE_REG: equ 0x26 ; DR2 Compare register +PWM8_Heater_CONTROL_REG: equ 0x27 ; Control register +PWM8_Heater_FUNC_REG: equ 0x24 ; Function register +PWM8_Heater_INPUT_REG: equ 0x25 ; Input register +PWM8_Heater_OUTPUT_REG: equ 0x26 ; Output register + + +;-------------------------------------------------- +; PWM8_Heater Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Heater_Start_M + or reg[PWM8_Heater_CONTROL_REG], PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_Stop_M + and reg[PWM8_Heater_CONTROL_REG], ~PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_EnableInt_M + M8C_EnableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + macro PWM8_Heater_DisableInt_M + M8C_DisableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + +; end of file PWM8_Heater.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heaterint.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heaterint.asm new file mode 100644 index 0000000..60be084 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heaterint.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_HeaterINT.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Heater_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Heater_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Heater_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_HeaterINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.asm new file mode 100644 index 0000000..f741dc5 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_NB_Out_EnableInt +export _PWM8_NB_Out_EnableInt +export PWM8_NB_Out_DisableInt +export _PWM8_NB_Out_DisableInt +export PWM8_NB_Out_Start +export _PWM8_NB_Out_Start +export PWM8_NB_Out_Stop +export _PWM8_NB_Out_Stop +export PWM8_NB_Out_WritePeriod +export _PWM8_NB_Out_WritePeriod +export PWM8_NB_Out_WritePulseWidth +export _PWM8_NB_Out_WritePulseWidth +export PWM8_NB_Out_bReadPulseWidth +export _PWM8_NB_Out_bReadPulseWidth +export PWM8_NB_Out_bReadCounter +export _PWM8_NB_Out_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_NB_Out_ReadPulseWidth ; deprecated +export _bPWM8_NB_Out_ReadPulseWidth ; deprecated +export bPWM8_NB_Out_ReadCounter ; deprecated +export _bPWM8_NB_Out_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_EnableInt: +_PWM8_NB_Out_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_DisableInt: +_PWM8_NB_Out_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Start: +_PWM8_NB_Out_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Stop: +_PWM8_NB_Out_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePeriod: +_PWM8_NB_Out_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePulseWidth: +_PWM8_NB_Out_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadPulseWidth: +_PWM8_NB_Out_bReadPulseWidth: + bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated +_bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_NB_Out_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadCounter: +_PWM8_NB_Out_bReadCounter: + bPWM8_NB_Out_ReadCounter: ; this name deprecated +_bPWM8_NB_Out_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_NB_Out_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_NB_Out_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_NB_Out_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_NB_Out_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_NB_Out_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_NB_Out_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_NB_Out_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_NB_Out.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.h new file mode 100644 index 0000000..6910a28 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_NB_Out.h +// Version: 2.60, Updated on 2012/9/21 at 11:59:18 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_NB_Out_INCLUDE +#define PWM8_NB_Out_INCLUDE + +#include + +#pragma fastcall16 PWM8_NB_Out_EnableInt +#pragma fastcall16 PWM8_NB_Out_DisableInt +#pragma fastcall16 PWM8_NB_Out_Start +#pragma fastcall16 PWM8_NB_Out_Stop +#pragma fastcall16 PWM8_NB_Out_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_NB_Out_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_NB_Out_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_NB_Out_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_NB_Out_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_NB_Out_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_NB_Out API. +//------------------------------------------------- + +extern void PWM8_NB_Out_EnableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_DisableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_Start(void); // Proxy Class 1 +extern void PWM8_NB_Out_Stop(void); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadCounter(void); // Proxy Class 2 +extern void PWM8_NB_Out_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_NB_Out_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_NB_Out_ReadCounter(void); // Deprecated +extern BYTE bPWM8_NB_Out_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out API's. +//-------------------------------------------------- + +#define PWM8_NB_Out_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_NB_Out_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_NB_Out_INT_MASK ( 0x08 ) + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out user defined values +//-------------------------------------------------- + +#define PWM8_NB_Out_PERIOD ( 0xff ) +#define PWM8_NB_Out_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_NB_Out +//------------------------------------------------- + +#pragma ioport PWM8_NB_Out_COUNTER_REG: 0x02c //DR0 Count register +BYTE PWM8_NB_Out_COUNTER_REG; +#pragma ioport PWM8_NB_Out_PERIOD_REG: 0x02d //DR1 Period register +BYTE PWM8_NB_Out_PERIOD_REG; +#pragma ioport PWM8_NB_Out_COMPARE_REG: 0x02e //DR2 Compare register +BYTE PWM8_NB_Out_COMPARE_REG; +#pragma ioport PWM8_NB_Out_CONTROL_REG: 0x02f //Control register +BYTE PWM8_NB_Out_CONTROL_REG; +#pragma ioport PWM8_NB_Out_FUNC_REG: 0x12c //Function register +BYTE PWM8_NB_Out_FUNC_REG; +#pragma ioport PWM8_NB_Out_INPUT_REG: 0x12d //Input register +BYTE PWM8_NB_Out_INPUT_REG; +#pragma ioport PWM8_NB_Out_OUTPUT_REG: 0x12e //Output register +BYTE PWM8_NB_Out_OUTPUT_REG; +#pragma ioport PWM8_NB_Out_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_NB_Out_INT_REG; + + +//------------------------------------------------- +// PWM8_NB_Out Macro 'Functions' +//------------------------------------------------- + +#define PWM8_NB_Out_Start_M \ + PWM8_NB_Out_CONTROL_REG |= PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_Stop_M \ + PWM8_NB_Out_CONTROL_REG &= ~PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_EnableInt_M \ + M8C_EnableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#define PWM8_NB_Out_DisableInt_M \ + M8C_DisableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#endif +// end of file PWM8_NB_Out.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.inc new file mode 100644 index 0000000..c7d6d45 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.inc +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out API's. +;-------------------------------------------------- + +PWM8_NB_Out_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_NB_Out_INT_REG: equ 0x0e1 +PWM8_NB_Out_INT_MASK: equ 0x08 + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out user defined values +;-------------------------------------------------- + +PWM8_NB_Out_PERIOD: equ 0xff +PWM8_NB_Out_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_NB_Out +;-------------------------------------------------- + +PWM8_NB_Out_COUNTER_REG: equ 0x2c ; DR0 Count register +PWM8_NB_Out_PERIOD_REG: equ 0x2d ; DR1 Period register +PWM8_NB_Out_COMPARE_REG: equ 0x2e ; DR2 Compare register +PWM8_NB_Out_CONTROL_REG: equ 0x2f ; Control register +PWM8_NB_Out_FUNC_REG: equ 0x2c ; Function register +PWM8_NB_Out_INPUT_REG: equ 0x2d ; Input register +PWM8_NB_Out_OUTPUT_REG: equ 0x2e ; Output register + + +;-------------------------------------------------- +; PWM8_NB_Out Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_NB_Out_Start_M + or reg[PWM8_NB_Out_CONTROL_REG], PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_Stop_M + and reg[PWM8_NB_Out_CONTROL_REG], ~PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_EnableInt_M + M8C_EnableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + macro PWM8_NB_Out_DisableInt_M + M8C_DisableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + +; end of file PWM8_NB_Out.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_outint.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_outint.asm new file mode 100644 index 0000000..145c01f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_outint.asm @@ -0,0 +1,93 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_OutINT.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_NB_Out_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_NB_Out_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_NB_Out_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom assembly code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom assembly code above this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert a lcall to a C function below this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + + ;PRESERVE_CPU_CONTEXT + ;lcall _My_C_Function + ;RESTORE_CPU_CONTEXT + + ;--------------------------------------------------- + ; Insert a lcall to a C function above this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_NB_OutINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.asm new file mode 100644 index 0000000..f21c84e --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Vout_EnableInt +export _PWM8_Vout_EnableInt +export PWM8_Vout_DisableInt +export _PWM8_Vout_DisableInt +export PWM8_Vout_Start +export _PWM8_Vout_Start +export PWM8_Vout_Stop +export _PWM8_Vout_Stop +export PWM8_Vout_WritePeriod +export _PWM8_Vout_WritePeriod +export PWM8_Vout_WritePulseWidth +export _PWM8_Vout_WritePulseWidth +export PWM8_Vout_bReadPulseWidth +export _PWM8_Vout_bReadPulseWidth +export PWM8_Vout_bReadCounter +export _PWM8_Vout_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Vout_ReadPulseWidth ; deprecated +export _bPWM8_Vout_ReadPulseWidth ; deprecated +export bPWM8_Vout_ReadCounter ; deprecated +export _bPWM8_Vout_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_EnableInt: +_PWM8_Vout_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_DisableInt: +_PWM8_Vout_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Start: +_PWM8_Vout_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Stop: +_PWM8_Vout_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePeriod: +_PWM8_Vout_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePulseWidth: +_PWM8_Vout_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadPulseWidth: +_PWM8_Vout_bReadPulseWidth: + bPWM8_Vout_ReadPulseWidth: ; this name deprecated +_bPWM8_Vout_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Vout_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadCounter: +_PWM8_Vout_bReadCounter: + bPWM8_Vout_ReadCounter: ; this name deprecated +_bPWM8_Vout_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Vout_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Vout_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Vout_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Vout_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Vout_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Vout_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Vout_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Vout_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Vout_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Vout.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.h new file mode 100644 index 0000000..fec7429 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Vout.h +// Version: 2.60, Updated on 2012/9/21 at 11:59:18 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Vout_INCLUDE +#define PWM8_Vout_INCLUDE + +#include + +#pragma fastcall16 PWM8_Vout_EnableInt +#pragma fastcall16 PWM8_Vout_DisableInt +#pragma fastcall16 PWM8_Vout_Start +#pragma fastcall16 PWM8_Vout_Stop +#pragma fastcall16 PWM8_Vout_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Vout_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Vout_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Vout_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Vout_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Vout_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Vout API. +//------------------------------------------------- + +extern void PWM8_Vout_EnableInt(void); // Proxy Class 1 +extern void PWM8_Vout_DisableInt(void); // Proxy Class 1 +extern void PWM8_Vout_Start(void); // Proxy Class 1 +extern void PWM8_Vout_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Vout_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Vout_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Vout_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Vout_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Vout API's. +//-------------------------------------------------- + +#define PWM8_Vout_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Vout_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Vout_INT_MASK ( 0x04 ) + + +//-------------------------------------------------- +// Constants for PWM8_Vout user defined values +//-------------------------------------------------- + +#define PWM8_Vout_PERIOD ( 0xff ) +#define PWM8_Vout_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Vout +//------------------------------------------------- + +#pragma ioport PWM8_Vout_COUNTER_REG: 0x028 //DR0 Count register +BYTE PWM8_Vout_COUNTER_REG; +#pragma ioport PWM8_Vout_PERIOD_REG: 0x029 //DR1 Period register +BYTE PWM8_Vout_PERIOD_REG; +#pragma ioport PWM8_Vout_COMPARE_REG: 0x02a //DR2 Compare register +BYTE PWM8_Vout_COMPARE_REG; +#pragma ioport PWM8_Vout_CONTROL_REG: 0x02b //Control register +BYTE PWM8_Vout_CONTROL_REG; +#pragma ioport PWM8_Vout_FUNC_REG: 0x128 //Function register +BYTE PWM8_Vout_FUNC_REG; +#pragma ioport PWM8_Vout_INPUT_REG: 0x129 //Input register +BYTE PWM8_Vout_INPUT_REG; +#pragma ioport PWM8_Vout_OUTPUT_REG: 0x12a //Output register +BYTE PWM8_Vout_OUTPUT_REG; +#pragma ioport PWM8_Vout_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Vout_INT_REG; + + +//------------------------------------------------- +// PWM8_Vout Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Vout_Start_M \ + PWM8_Vout_CONTROL_REG |= PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_Stop_M \ + PWM8_Vout_CONTROL_REG &= ~PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_EnableInt_M \ + M8C_EnableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#define PWM8_Vout_DisableInt_M \ + M8C_DisableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#endif +// end of file PWM8_Vout.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.inc new file mode 100644 index 0000000..c45e892 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.inc +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Vout API's. +;-------------------------------------------------- + +PWM8_Vout_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Vout_INT_REG: equ 0x0e1 +PWM8_Vout_INT_MASK: equ 0x04 + + +;-------------------------------------------------- +; Constants for PWM8_Vout user defined values +;-------------------------------------------------- + +PWM8_Vout_PERIOD: equ 0xff +PWM8_Vout_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Vout +;-------------------------------------------------- + +PWM8_Vout_COUNTER_REG: equ 0x28 ; DR0 Count register +PWM8_Vout_PERIOD_REG: equ 0x29 ; DR1 Period register +PWM8_Vout_COMPARE_REG: equ 0x2a ; DR2 Compare register +PWM8_Vout_CONTROL_REG: equ 0x2b ; Control register +PWM8_Vout_FUNC_REG: equ 0x28 ; Function register +PWM8_Vout_INPUT_REG: equ 0x29 ; Input register +PWM8_Vout_OUTPUT_REG: equ 0x2a ; Output register + + +;-------------------------------------------------- +; PWM8_Vout Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Vout_Start_M + or reg[PWM8_Vout_CONTROL_REG], PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_Stop_M + and reg[PWM8_Vout_CONTROL_REG], ~PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_EnableInt_M + M8C_EnableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + macro PWM8_Vout_DisableInt_M + M8C_DisableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + +; end of file PWM8_Vout.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_voutint.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_voutint.asm new file mode 100644 index 0000000..1aec444 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_voutint.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_VoutINT.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Vout_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Vout_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Vout_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_VoutINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.asm new file mode 100644 index 0000000..c6bebc3 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.asm @@ -0,0 +1,594 @@ +;;***************************************************************************** +;;***************************************************************************** +;; Filename: SleepTimer.asm +;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: SleepTimer User Module software implementation file for the +;; 22/24/27/29xxx families. +;; +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "m8c.inc" +include "memory.inc" +include "SleepTimer.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +;------------------------------------------------------------------- +; Declare the functions global for both assembler and C compiler. +; +; Note that there are two names for each API. First name is +; assembler reference. Name with underscore is name reference for +; C compiler. Calling function in C source code does not require +; the underscore. +;------------------------------------------------------------------- +export SleepTimer_EnableInt +export _SleepTimer_EnableInt +export SleepTimer_DisableInt +export _SleepTimer_DisableInt + +export SleepTimer_Start +export _SleepTimer_Start +export SleepTimer_Stop +export _SleepTimer_Stop + +export SleepTimer_TickWait +export _SleepTimer_TickWait + +export SleepTimer_SyncWait +export _SleepTimer_SyncWait + +export SleepTimer_SetInterval +export _SleepTimer_SetInterval + +export SleepTimer_bGetTickCntr +export _SleepTimer_bGetTickCntr + +export SleepTimer_SetTimer +export _SleepTimer_SetTimer + +export SleepTimer_bGetTimer +export _SleepTimer_bGetTimer + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +export SleepTimer_iGetTickCntr +export _SleepTimer_iGetTickCntr +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +export SleepTimer_lGetTickCntr +export _SleepTimer_lGetTickCntr +ENDIF + + +area text (ROM,REL) + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +; Counter LSB Offset if 4 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 4) +ST_LSB_OFFSET: equ 3 +ENDIF + +; Counter LSB Offset if 2 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 2) +ST_LSB_OFFSET: equ 1 +ENDIF + +; Counter LSB Offset if 1 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 1) +ST_LSB_OFFSET: equ 0 +ENDIF + + +area UserModules (ROM, REL, CON) + +;============================================================================= +;============================================================================= +; +; Low-Level Commands +; +;============================================================================= +;============================================================================= + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_EnableInt +; +; DESCRIPTION: +; Enables SleepTimer interrupts. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_EnableInt: +_SleepTimer_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_DisableInt +; +; DESCRIPTION: +; Disables the sleep timer. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_DisableInt: +_SleepTimer_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Start() +; +; DESCRIPTION: +; Clears all the variables. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Start: +_SleepTimer_Start: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov A,0 + mov [SleepTimer_fTick],A + mov [SleepTimer_bTimerValue],A + mov [SleepTimer_bCountDown],A + mov [SleepTimer_TickCount + ST_LSB_OFFSET],A ; Clear TickCount[0:7] +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 1],A ; Clear TickCount[8:15] +ENDIF + + +IF(SleepTimer_TICK_CNTR_SIZE & 4) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 2],A ; Clear TickCount[16:31] + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 3],A +ENDIF + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here as a place +; holder. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Stop: +_SleepTimer_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetInterval +; +; DESCRIPTION: +; Sets sleep timer interval +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Timer setting +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetInterval: +_SleepTimer_SetInterval: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,SleepTimer_CLOCK_MASK ; Mask off invalid data + mov X, SP + push A + M8C_SetBank1 + mov A, reg[OSC_CR0] ; Get current timer value + and A,~SleepTimer_CLOCK_MASK ; Zero out old timer value + or A, [X] ; Set new timer values + mov reg[OSC_CR0],A ; Write it + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_TickWait(BYTE bTicks) +; +; DESCRIPTION: +; Wait X Ticks and return +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Count down time +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_TickWait: +_SleepTimer_TickWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + +.WaitTick: + tst [SleepTimer_fTick],0xFF ; Check for tick + jz .WaitTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + dec A ; Dec the timer variable + jnz .WaitTick ; Loop until we count down to zero + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SyncWait(BYTE bCounts, BYTE fMode) +; +; DESCRIPTION: +; This function resets the SyncWait timer. If fMode = 0, the timer +; is set to the new value then exits the function immediatly. If fMode +; is set to 1, the firmware waits for the timer to expire before the +; timer is reset and and exits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= tCounts to wait +; X <= fMode fMode = 0 Just reload the value, do not wait +; fMode = 1 Wait for last value to count down to zero +; then reload. +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SyncWait: +_SleepTimer_SyncWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_bCountDown + swap A,X + AND A,SleepTimer_FORCE_RELOAD + jnz .ReloadIt + +.WaitLoop: + tst [SleepTimer_bCountDown],0xFF + jnz .WaitLoop + + +.ReloadIt: + swap A,X + mov [SleepTimer_bCountDown],A + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTickCntr +; +; DESCRIPTION: +; Returns the LSB of the tick Counter +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; LSB of lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTickCntr: +_SleepTimer_bGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetTimer +; +; DESCRIPTION: +; Set timer with parameter in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Value used to set Timer value +; +; RETURNS: +; None +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetTimer: +_SleepTimer_SetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov [SleepTimer_bTimerValue],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTimer +; +; DESCRIPTION: +; Returns timer value in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; None +; +; RETURNS: +; Return timer value in A +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTimer: +_SleepTimer_bGetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_bTimerValue] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_iGetTickCntr +; +; DESCRIPTION: +; Returns the least significant 16 bits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; (int)TickCount in A and X +; X <= MSB +; A <= LSB +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_iGetTickCntr: +_SleepTimer_iGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] ; Place LSB in A + mov X,[SleepTimer_TickCount + ST_LSB_OFFSET - 1] ; Place MSB in X + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_lGetTickCntr +; +; DESCRIPTION: +; Returns a pointer to TickCount +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; [A:X] => Pointer to 32 bit tick counter (X=LSB, A=MSB) +; +; RETURNS: +; Pointer to lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_lGetTickCntr: +_SleepTimer_lGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_PROLOGUE RAM_USE_CLASS_3 + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_SETPAGE_CUR >SleepTimer_TickCount + RAM_SETPAGE_IDX A + push A + mov A,[SleepTimer_TickCount + 0] + mov [X + 0],A + mov A,[SleepTimer_TickCount + 1] + mov [X + 1],A + mov A,[SleepTimer_TickCount + 2] + mov [X + 2],A + mov A,[SleepTimer_TickCount + 3] + mov [X + 3],A + pop A + + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION +ENDIF + + + + +; End of File SleepTimer.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.h new file mode 100644 index 0000000..1cb54b4 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.h @@ -0,0 +1,78 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: SleepTimer.h +// Version: 1.0, Updated on 2012/9/21 at 11:59:23 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: SleepTimer User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef SleepTimer_INCLUDE +#define SleepTimer_INCLUDE + +#include +#define SleepTimer_TICK_CNTR_SIZE 4 + +#pragma fastcall16 SleepTimer_EnableInt // Proxy 1 +#pragma fastcall16 SleepTimer_DisableInt // Proxy 1 +#pragma fastcall16 SleepTimer_Start // Proxy 1 +#pragma fastcall16 SleepTimer_Stop // Proxy 1 +#pragma fastcall16 SleepTimer_SetInterval // Proxy 1 +#pragma fastcall16 SleepTimer_SetTimer +#pragma fastcall16 SleepTimer_bGetTimer + +#pragma fastcall16 SleepTimer_SyncWait // Proxy 1 +#pragma fastcall16 SleepTimer_TickWait // Proxy 1 + +#pragma fastcall16 SleepTimer_bGetTickCntr // Proxy 2 + + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +#pragma fastcall16 SleepTimer_iGetTickCntr // Proxy 4 +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +#pragma fastcall16 SleepTimer_lGetTickCntr // Proxy 4 +#endif + +//------------------------------------------------- +// Prototypes of the SleepTimer API. +//------------------------------------------------- + +extern void SleepTimer_EnableInt(void); +extern void SleepTimer_DisableInt(void); +extern void SleepTimer_Start(void); +extern void SleepTimer_Stop(void); +extern void SleepTimer_SetInterval(BYTE bInterval); +extern void SleepTimer_SyncWait(BYTE bTicks, BYTE bMode); +extern void SleepTimer_TickWait(BYTE bTicks); +extern void SleepTimer_SetTimer(BYTE bNewTimerValue); +extern BYTE SleepTimer_bGetTimer( void ); + +extern BYTE SleepTimer_bGetTickCntr(void); + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +extern unsigned int SleepTimer_iGetTickCntr(void); +#define ST_INT_VALID +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +extern unsigned long * SleepTimer_lGetTickCntr(unsigned long * lptr); +#define ST_LONG_VALID +#endif + +// Frequency of sleep timer interrupts +#define SleepTimer_1_HZ 0x18 +#define SleepTimer_8_HZ 0x10 +#define SleepTimer_64_HZ 0x08 +#define SleepTimer_512_HZ 0x00 + +#define SleepTimer_FORCE_RELOAD 0x01 +#define SleepTimer_WAIT_RELOAD 0x00 +extern BYTE SleepTimer_fTick; + + +#endif +// end of file SleepTimer.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.inc new file mode 100644 index 0000000..f413650 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.inc @@ -0,0 +1,33 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimer.inc +;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the SleepTimer user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for SleepTimer API's. +;-------------------------------------------------- + +SleepTimer_INT_REG: equ 0x0e0 +SleepTimer_INT_MASK: equ 0x40 + +SleepTimer_TICK_CNTR_SIZE: equ 4h + +; Frequency of sleep timer interrupts +SleepTimer_1_HZ: equ 0x18 +SleepTimer_8_HZ: equ 0x10 +SleepTimer_64_HZ: equ 0x08 +SleepTimer_512_HZ: equ 0x00 +SleepTimer_CLOCK_MASK: equ 0x18 + +SleepTimer_FORCE_RELOAD: equ 0x01 +SleepTimer_WAIT_RELOAD: equ 0x00 diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimerint.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimerint.asm new file mode 100644 index 0000000..4a95ed9 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimerint.asm @@ -0,0 +1,143 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimerINT.asm +;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: SleepTimer Interrupt Service Routine. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "SleepTimer.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _SleepTimer_ISR + + +export SleepTimer_fTick +export _SleepTimer_fTick +export SleepTimer_bTimerValue +export _SleepTimer_bTimerValue +export SleepTimer_bCountDown +export _SleepTimer_bCountDown +export SleepTimer_TickCount +export _SleepTimer_TickCount + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM (RAM, REL, CON) + + SleepTimer_fTick: +_SleepTimer_fTick: BLK 1 + + SleepTimer_bTimerValue: +_SleepTimer_bTimerValue: BLK 1 + + SleepTimer_bCountDown: +_SleepTimer_bCountDown: BLK 1 + + SleepTimer_TickCount: +_SleepTimer_TickCount: BLK SleepTimer_TICK_CNTR_SIZE + + + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +Sleep_Counter:: // Sleep timer will trigger this ISR @ 512hz, Sleep Counter is used to count the number number of times this happens, Sleep Counter is used to figure how often certain routines should run +_Sleep_Counter:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL, CON) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _SleepTimer_ISR +; +; DESCRIPTION: +; interrupt handler for instance SleepTimer. +; +; This is a place holder function. If the user requires use of an interrupt +; handler for this function, then place code where specified. +;----------------------------------------------------------------------------- + +_SleepTimer_ISR: + + or [SleepTimer_fTick],0x01 ; Set tick flag + + ; Decrement CountDown (Sync counter) + tst [SleepTimer_bCountDown],0xFF + jz .DoTimer + dec [SleepTimer_bCountDown] + +.DoTimer: ; Decrement TimerValue, if required + tst [SleepTimer_bTimerValue],0xFF + jz .IncBigCounter + dec [SleepTimer_bTimerValue] + +.IncBigCounter: ; Increment big tick counter +IF (SleepTimer_TICK_CNTR_SIZE & 0x04) + inc [SleepTimer_TickCount+3] + jnc SleepTimer_SLEEP_ISR_END + + inc [SleepTimer_TickCount+2] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + +IF (SleepTimer_TICK_CNTR_SIZE & (0x04|0x02)) + inc [SleepTimer_TickCount+1] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + + inc [SleepTimer_TickCount+0] + +SleepTimer_SLEEP_ISR_END: + + ;@PSoC_UserCode_BODY_1@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + //14Point7 ASM Code Start + inc [Sleep_Counter] + //call LED7SEG_Update + //14Point7 ASM Code End + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + +; end of file SleepTimerINT.asm + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm new file mode 100644 index 0000000..5fc4e2d --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm @@ -0,0 +1,516 @@ +; Generated by PSoC Designer 5.3.2710 +; +;@Id: boot.tpl#903 @ +;============================================================================= +; FILENAME: boot.asm +; Version: 4.30 +; +; DESCRIPTION: +; M8C Boot Code for CY8C24xxxB microcontroller family. +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in +; the project's root directory to create BOOT.ASM. Any changes made to +; BOOT.ASM will be overwritten every time the project is generated; therefore +; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when +; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) +; are not accidentally modified. +; +;============================================================================= + +include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) +include "m8c.inc" ;Part specific file +include "m8ssc.inc" ;Part specific file +include "memory.inc" ;File generated by PSoC Designer (Project dependent) + +;-------------------------------------- +; Export Declarations +;-------------------------------------- + +export __Start +IF (TOOLCHAIN & HITECH) +ELSE +export __bss_start +export __data_start +export __idata_start +export __func_lit_start +export __text_start +ENDIF +export _bGetPowerSetting +export bGetPowerSetting + + +;-------------------------------------- +; Optimization flags +;-------------------------------------- +; +; To change the value of these flags, modify the file boot.tpl, not +; boot.asm. See the notes in the banner comment at the beginning of +; this file. + +; Optimization for Assembly language (only) projects and C-language projects +; that do not depend on the C compiler to initialize the values of RAM variables. +; Set to 1: Support for C Run-time Environment initialization +; Set to 0: Support for C not included. Faster start up, smaller code space. +; +IF (TOOLCHAIN & HITECH) +; The C compiler will customize the startup code - it's not required here + +C_LANGUAGE_SUPPORT: equ 0 +ELSE +C_LANGUAGE_SUPPORT: equ 1 +ENDIF + + +; The following equate is required for proper operation. Reseting its value +; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is +; selected. If the designer chooses to not wait then stabilization of the ECO +; and PLL_Lock must take place within user code. See the family data sheet for +; the requirements of starting the ECO and PLL lock mode. +; +; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before +; invoking main +; Set to 0: Boot code does not wait; clock may not have stabilized by +; the time code in main starts executing. +; +WAIT_FOR_32K: equ 1 + + +; For historical reasons, by default the boot code uses an lcall instruction +; to invoke the user's _main code. If _main executes a return instruction, +; boot provides an infinite loop. By changing the following equate from zero +; to 1, boot's lcall will be replaced by a ljmp instruction, saving two +; bytes on the stack which are otherwise required for the return address. If +; this option is enabled, _main must not return. (Beginning with the 4.2 +; release, the C compiler automatically places an infinite loop at the end +; of main, rather than a return instruction.) +; +ENABLE_LJMP_TO_MAIN: equ 0 + + +;----------------------------------------------------------------------------- +; Interrupt Vector Table +;----------------------------------------------------------------------------- +; +; Interrupt vector table entries are 4 bytes long. Each one contains +; a jump instruction to an ISR (Interrupt Service Routine), although +; very short ISRs could be encoded within the table itself. Normally, +; vector jump targets are modified automatically according to the user +; modules selected. This occurs when the 'Generate Application' opera- +; tion is run causing PSoC Designer to create boot.asm and the other +; configuration files. If you need to hard code a vector, update the +; file boot.tpl, not boot.asm. See the banner comment at the beginning +; of this file. +;----------------------------------------------------------------------------- + + AREA TOP (ROM, ABS, CON) + + org 0 ;Reset Interrupt Vector +IF (TOOLCHAIN & HITECH) +; jmp __Start ;C compiler fills in this vector +ELSE + jmp __Start ;First instruction executed following a Reset +ENDIF + ;@PSoC_BOOT_ISR_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + org 04h ;Low Voltage Detect (LVD) Interrupt Vector + halt ;Stop execution if power falls too low + + org 08h ;Analog Column 0 Interrupt Vector + // call void_handler + reti + + org 0Ch ;Analog Column 1 Interrupt Vector + // call void_handler + reti + + org 18h ;VC3 Interrupt Vector + // call void_handler + reti + + org 1Ch ;GPIO Interrupt Vector + // call void_handler + reti + + org 20h ;PSoC Block DBB00 Interrupt Vector + ljmp _ADCINC_ADConversion_ISR + reti + + org 24h ;PSoC Block DBB01 Interrupt Vector + ljmp _PWM8_Heater_ISR + reti + + org 28h ;PSoC Block DCB02 Interrupt Vector + ljmp _PWM8_Vout_ISR + reti + + org 2Ch ;PSoC Block DCB03 Interrupt Vector + ljmp _PWM8_NB_Out_ISR + reti + + org 60h ;PSoC I2C Interrupt Vector + // call void_handler + reti + + org 64h ;Sleep Timer Interrupt Vector + ljmp _SleepTimer_ISR + reti + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_ISR_UserCode_END@ + +;----------------------------------------------------------------------------- +; Start of Execution. +;----------------------------------------------------------------------------- +; The Supervisory ROM SWBootReset function has already completed the +; calibrate1 process, loading trim values for 5 volt operation. +; + +IF (TOOLCHAIN & HITECH) + AREA PD_startup(CODE, REL, CON) +ELSE + org 68h +ENDIF +__Start: + + ; initialize SMP values for voltage stabilization, if required, + ; leaving power-on reset (POR) level at the default (low) level, at + ; least for now. + ; + M8C_SetBank1 + mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST + M8C_SetBank0 + +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + M8C_EnableWatchDog +ENDIF + +IF ( SELECT_32K ) + or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project +ELSE + and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled +ENDIF + +IF (TOOLCHAIN & HITECH) + global __Lstackps + mov a,low __Lstackps + swap a,sp +ELSE + ;------------------ + ; Set up the stack + ;------------------ + mov A, __ramareas_end ; Set top of stack to end of used RAM + swap SP, A ; This is only temporary if going to LMM +ENDIF + + ;----------------------------------------------- + ; Set Power-related Trim & the AGND Bypass bit. + ;----------------------------------------------- +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + IF ( AGND_BYPASS ) + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; The 5V trim has already been set, but we need to update the AGNDBYP + ; bit in the write-only BDG_TR register. Recalculate the register + ; value using the proper trim values. + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ENDIF + ENDIF +ENDIF ; 5.0 V Operation + +IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ENDIF +ENDIF ; 3.3 Volt Operation + +IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 12MHZ operation *** + +IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 6MHZ operation *** + + mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations + mov [bSSC_KEYSP], 0 + + ;--------------------------------------- + ; Initialize Crystal Oscillator and PLL + ;--------------------------------------- + +IF ( SELECT_32K & WAIT_FOR_32K ) + ; If the user has requested the External Crystal Oscillator (ECO) then turn it + ; on and wait for it to stabilize and the system to switch over to it. The PLL + ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + ; the ECO to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor1s: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor1s ; Interrupt will latch but will not dispatch + ; since interrupts are not globally enabled +ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + ; Either no ECO, or waiting for stable clock is to be done in main + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the watch dog + +ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + +IF ( PLL_MODE ) + ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + mov reg[INT_VC], 0 ; Clear all pending interrupts + +.WaitFor16ms: + tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor16ms + M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + +IF ( WAIT_FOR_32K ) +ELSE ; !( WAIT_FOR_32K ) + ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. +ENDIF ;(WAIT_FOR_32K) +ENDIF ;(PLL_MODE) + + ;------------------------------------------------------- + ; Initialize Proper Drive Mode for External Clock Pin + ;------------------------------------------------------- + + ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + +IF (SYSCLK_SOURCE) + and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register +ENDIF + ; EXTCLK pin is now in proper drive mode to input the external clock signal + + ;------------------------ + ; Close CT leakage path. + ;------------------------ + mov reg[ACB00CR0], 05h + mov reg[ACB01CR0], 05h + + ;@PSoC_BOOT_LOADCFG_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_LOADCFG_UserCode_END@ + + ;------------------------- + ; Load Base Configuration + ;------------------------- + ; Load global parameter settings and load the user modules in the + ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + ; to minimize start up time; (2) We may still need to play with the + ; Sleep Timer. + ; + lcall LoadConfigInit + + ;----------------------------------- + ; Initialize C Run-Time Environment + ;----------------------------------- +IF ( C_LANGUAGE_SUPPORT ) + mov A,0 ; clear the 'bss' segment to zero + mov [__r0],<__bss_start +BssLoop: + cmp [__r0],<__bss_end + jz BssDone + mvi [__r0],A + jmp BssLoop +BssDone: + mov A,>__idata_start ; copy idata to data segment + mov X,<__idata_start + mov [__r0],<__data_start +IDataLoop: + cmp [__r0],<__data_end + jz C_RTE_Done + push A + romx + mvi [__r0],A + pop A + inc X + adc A,0 + jmp IDataLoop + +C_RTE_Done: + +ENDIF ; C_LANGUAGE_SUPPORT + + ;------------------------------- + ; Voltage Stabilization for SMP + ;------------------------------- + +IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation +IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + ; 5V before enabling the Precision Power-On Reset (PPOR). + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + or reg[INT_MSK0],INT_MSK0_SLEEP + M8C_SetBank1 + and reg[OSC_CR0], ~OSC_CR0_SLEEP + or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Restart the sleep timer + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor2ms: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor2ms ; Branch fails when 2 msec has passed +ENDIF ; SMP is operational +ENDIF ; 5.0V Operation + + ;------------------------------- + ; Set Power-On Reset (POR) Level + ;------------------------------- + ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + ; These values should not be changed from the settings here. See Section "POR and LVD" of + ; Technical Reference Manual #001-14463 for more information. + + M8C_SetBank1 + +IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + ; Yes, lowest trip already set +ELSE ; No, must adjust POR... +IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip +ELSE +IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + ELSE ; No, fast mode + IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + ELSE ; 24HMz ; + or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + ENDIF ; 24MHz + ENDIF ; Slow Mode +ENDIF ; 5.0V Operation +ENDIF ; 3.3V Operation +ENDIF ; 2.7V Operation + + M8C_SetBank0 + + ;---------------------------- + ; Wrap up and invoke "main" + ;---------------------------- + + ; Disable the Sleep interrupt that was used for timing above. In fact, + ; no interrupts should be enabled now, so may as well clear the register. + ; + mov reg[INT_MSK0],0 + + ; Everything has started OK. Now select requested CPU & sleep frequency. + ; + M8C_SetBank1 + mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) + M8C_SetBank0 + + ; Global Interrupt are NOT enabled, this should be done in main(). + ; LVD is set but will not occur unless Global Interrupts are enabled. + ; Global Interrupts should be enabled as soon as possible in main(). + ; + mov reg[INT_VC],0 ; Clear any pending interrupts which may + ; have been set during the boot process. +IF (TOOLCHAIN & HITECH) + ljmp startup ; Jump to C compiler startup code +ELSE +IF ENABLE_LJMP_TO_MAIN + ljmp _main ; goto main (no return) +ELSE + lcall _main ; call main +.Exit: + jmp .Exit ; Wait here after return till power-off or reset +ENDIF +ENDIF ; TOOLCHAIN + + ;--------------------------------- + ; Library Access to Global Parms + ;--------------------------------- + ; + bGetPowerSetting: +_bGetPowerSetting: + ; Returns value of POWER_SETTING in the A register. + ; No inputs. No Side Effects. + ; +IF (POWER_SETTING & POWER_SET_2V7) + mov A, POWER_SETTING | POWER_SET_SLOW_IMO +ELSE + mov A, POWER_SETTING ; Supply voltage and internal main osc +ENDIF + ret + +IF (TOOLCHAIN & HITECH) +ELSE + ;--------------------------------- + ; Order Critical RAM & ROM AREAs + ;--------------------------------- + ; 'TOP' is all that has been defined so far... + + ; ROM AREAs for C CONST, static & global items + ; + AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM +__idata_start: + + AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers +__func_lit_start: + + AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + AREA UserModules (ROM, REL, CON) ; User Module APIs + + ; CODE segment for general use + ; + AREA text (ROM, REL, CON) +__text_start: + + ; RAM area usage + ; + AREA data (RAM, REL, CON) ; initialized RAM +__data_start: + + AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + AREA bss (RAM, REL, CON) ; general use +__bss_start: + +ENDIF ; TOOLCHAIN + +; end of file boot.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl new file mode 100644 index 0000000..7e9dbc7 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl @@ -0,0 +1,514 @@ +;@Id: boot.tpl#903 @ +;============================================================================= +; FILENAME: boot.asm +; Version: 4.30 +; +; DESCRIPTION: +; M8C Boot Code for CY8C24xxxB microcontroller family. +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in +; the project's root directory to create BOOT.ASM. Any changes made to +; BOOT.ASM will be overwritten every time the project is generated; therefore +; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when +; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) +; are not accidentally modified. +; +;============================================================================= + +include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) +include "m8c.inc" ;Part specific file +include "m8ssc.inc" ;Part specific file +include "memory.inc" ;File generated by PSoC Designer (Project dependent) + +;-------------------------------------- +; Export Declarations +;-------------------------------------- + +export __Start +IF (TOOLCHAIN & HITECH) +ELSE +export __bss_start +export __data_start +export __idata_start +export __func_lit_start +export __text_start +ENDIF +export _bGetPowerSetting +export bGetPowerSetting + + +;-------------------------------------- +; Optimization flags +;-------------------------------------- +; +; To change the value of these flags, modify the file boot.tpl, not +; boot.asm. See the notes in the banner comment at the beginning of +; this file. + +; Optimization for Assembly language (only) projects and C-language projects +; that do not depend on the C compiler to initialize the values of RAM variables. +; Set to 1: Support for C Run-time Environment initialization +; Set to 0: Support for C not included. Faster start up, smaller code space. +; +IF (TOOLCHAIN & HITECH) +; The C compiler will customize the startup code - it's not required here + +C_LANGUAGE_SUPPORT: equ 0 +ELSE +C_LANGUAGE_SUPPORT: equ 1 +ENDIF + + +; The following equate is required for proper operation. Reseting its value +; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is +; selected. If the designer chooses to not wait then stabilization of the ECO +; and PLL_Lock must take place within user code. See the family data sheet for +; the requirements of starting the ECO and PLL lock mode. +; +; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before +; invoking main +; Set to 0: Boot code does not wait; clock may not have stabilized by +; the time code in main starts executing. +; +WAIT_FOR_32K: equ 1 + + +; For historical reasons, by default the boot code uses an lcall instruction +; to invoke the user's _main code. If _main executes a return instruction, +; boot provides an infinite loop. By changing the following equate from zero +; to 1, boot's lcall will be replaced by a ljmp instruction, saving two +; bytes on the stack which are otherwise required for the return address. If +; this option is enabled, _main must not return. (Beginning with the 4.2 +; release, the C compiler automatically places an infinite loop at the end +; of main, rather than a return instruction.) +; +ENABLE_LJMP_TO_MAIN: equ 0 + + +;----------------------------------------------------------------------------- +; Interrupt Vector Table +;----------------------------------------------------------------------------- +; +; Interrupt vector table entries are 4 bytes long. Each one contains +; a jump instruction to an ISR (Interrupt Service Routine), although +; very short ISRs could be encoded within the table itself. Normally, +; vector jump targets are modified automatically according to the user +; modules selected. This occurs when the 'Generate Application' opera- +; tion is run causing PSoC Designer to create boot.asm and the other +; configuration files. If you need to hard code a vector, update the +; file boot.tpl, not boot.asm. See the banner comment at the beginning +; of this file. +;----------------------------------------------------------------------------- + + AREA TOP (ROM, ABS, CON) + + org 0 ;Reset Interrupt Vector +IF (TOOLCHAIN & HITECH) +; jmp __Start ;C compiler fills in this vector +ELSE + jmp __Start ;First instruction executed following a Reset +ENDIF + ;@PSoC_BOOT_ISR_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + org 04h ;Low Voltage Detect (LVD) Interrupt Vector + halt ;Stop execution if power falls too low + + org 08h ;Analog Column 0 Interrupt Vector + `@INTERRUPT_2` + reti + + org 0Ch ;Analog Column 1 Interrupt Vector + `@INTERRUPT_3` + reti + + org 18h ;VC3 Interrupt Vector + `@INTERRUPT_6` + reti + + org 1Ch ;GPIO Interrupt Vector + `@INTERRUPT_7` + reti + + org 20h ;PSoC Block DBB00 Interrupt Vector + `@INTERRUPT_8` + reti + + org 24h ;PSoC Block DBB01 Interrupt Vector + `@INTERRUPT_9` + reti + + org 28h ;PSoC Block DCB02 Interrupt Vector + `@INTERRUPT_10` + reti + + org 2Ch ;PSoC Block DCB03 Interrupt Vector + `@INTERRUPT_11` + reti + + org 60h ;PSoC I2C Interrupt Vector + `@INTERRUPT_24` + reti + + org 64h ;Sleep Timer Interrupt Vector + `@INTERRUPT_25` + reti + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_ISR_UserCode_END@ + +;----------------------------------------------------------------------------- +; Start of Execution. +;----------------------------------------------------------------------------- +; The Supervisory ROM SWBootReset function has already completed the +; calibrate1 process, loading trim values for 5 volt operation. +; + +IF (TOOLCHAIN & HITECH) + AREA PD_startup(CODE, REL, CON) +ELSE + org 68h +ENDIF +__Start: + + ; initialize SMP values for voltage stabilization, if required, + ; leaving power-on reset (POR) level at the default (low) level, at + ; least for now. + ; + M8C_SetBank1 + mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST + M8C_SetBank0 + +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + M8C_EnableWatchDog +ENDIF + +IF ( SELECT_32K ) + or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project +ELSE + and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled +ENDIF + +IF (TOOLCHAIN & HITECH) + global __Lstackps + mov a,low __Lstackps + swap a,sp +ELSE + ;------------------ + ; Set up the stack + ;------------------ + mov A, __ramareas_end ; Set top of stack to end of used RAM + swap SP, A ; This is only temporary if going to LMM +ENDIF + + ;----------------------------------------------- + ; Set Power-related Trim & the AGND Bypass bit. + ;----------------------------------------------- +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + IF ( AGND_BYPASS ) + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; The 5V trim has already been set, but we need to update the AGNDBYP + ; bit in the write-only BDG_TR register. Recalculate the register + ; value using the proper trim values. + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ENDIF + ENDIF +ENDIF ; 5.0 V Operation + +IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ENDIF +ENDIF ; 3.3 Volt Operation + +IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 12MHZ operation *** + +IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 6MHZ operation *** + + mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations + mov [bSSC_KEYSP], 0 + + ;--------------------------------------- + ; Initialize Crystal Oscillator and PLL + ;--------------------------------------- + +IF ( SELECT_32K & WAIT_FOR_32K ) + ; If the user has requested the External Crystal Oscillator (ECO) then turn it + ; on and wait for it to stabilize and the system to switch over to it. The PLL + ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + ; the ECO to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor1s: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor1s ; Interrupt will latch but will not dispatch + ; since interrupts are not globally enabled +ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + ; Either no ECO, or waiting for stable clock is to be done in main + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the watch dog + +ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + +IF ( PLL_MODE ) + ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + mov reg[INT_VC], 0 ; Clear all pending interrupts + +.WaitFor16ms: + tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor16ms + M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + +IF ( WAIT_FOR_32K ) +ELSE ; !( WAIT_FOR_32K ) + ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. +ENDIF ;(WAIT_FOR_32K) +ENDIF ;(PLL_MODE) + + ;------------------------------------------------------- + ; Initialize Proper Drive Mode for External Clock Pin + ;------------------------------------------------------- + + ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + +IF (SYSCLK_SOURCE) + and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register +ENDIF + ; EXTCLK pin is now in proper drive mode to input the external clock signal + + ;------------------------ + ; Close CT leakage path. + ;------------------------ + mov reg[ACB00CR0], 05h + mov reg[ACB01CR0], 05h + + ;@PSoC_BOOT_LOADCFG_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_LOADCFG_UserCode_END@ + + ;------------------------- + ; Load Base Configuration + ;------------------------- + ; Load global parameter settings and load the user modules in the + ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + ; to minimize start up time; (2) We may still need to play with the + ; Sleep Timer. + ; + lcall LoadConfigInit + + ;----------------------------------- + ; Initialize C Run-Time Environment + ;----------------------------------- +IF ( C_LANGUAGE_SUPPORT ) + mov A,0 ; clear the 'bss' segment to zero + mov [__r0],<__bss_start +BssLoop: + cmp [__r0],<__bss_end + jz BssDone + mvi [__r0],A + jmp BssLoop +BssDone: + mov A,>__idata_start ; copy idata to data segment + mov X,<__idata_start + mov [__r0],<__data_start +IDataLoop: + cmp [__r0],<__data_end + jz C_RTE_Done + push A + romx + mvi [__r0],A + pop A + inc X + adc A,0 + jmp IDataLoop + +C_RTE_Done: + +ENDIF ; C_LANGUAGE_SUPPORT + + ;------------------------------- + ; Voltage Stabilization for SMP + ;------------------------------- + +IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation +IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + ; 5V before enabling the Precision Power-On Reset (PPOR). + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + or reg[INT_MSK0],INT_MSK0_SLEEP + M8C_SetBank1 + and reg[OSC_CR0], ~OSC_CR0_SLEEP + or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Restart the sleep timer + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor2ms: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor2ms ; Branch fails when 2 msec has passed +ENDIF ; SMP is operational +ENDIF ; 5.0V Operation + + ;------------------------------- + ; Set Power-On Reset (POR) Level + ;------------------------------- + ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + ; These values should not be changed from the settings here. See Section "POR and LVD" of + ; Technical Reference Manual #001-14463 for more information. + + M8C_SetBank1 + +IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + ; Yes, lowest trip already set +ELSE ; No, must adjust POR... +IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip +ELSE +IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + ELSE ; No, fast mode + IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + ELSE ; 24HMz ; + or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + ENDIF ; 24MHz + ENDIF ; Slow Mode +ENDIF ; 5.0V Operation +ENDIF ; 3.3V Operation +ENDIF ; 2.7V Operation + + M8C_SetBank0 + + ;---------------------------- + ; Wrap up and invoke "main" + ;---------------------------- + + ; Disable the Sleep interrupt that was used for timing above. In fact, + ; no interrupts should be enabled now, so may as well clear the register. + ; + mov reg[INT_MSK0],0 + + ; Everything has started OK. Now select requested CPU & sleep frequency. + ; + M8C_SetBank1 + mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) + M8C_SetBank0 + + ; Global Interrupt are NOT enabled, this should be done in main(). + ; LVD is set but will not occur unless Global Interrupts are enabled. + ; Global Interrupts should be enabled as soon as possible in main(). + ; + mov reg[INT_VC],0 ; Clear any pending interrupts which may + ; have been set during the boot process. +IF (TOOLCHAIN & HITECH) + ljmp startup ; Jump to C compiler startup code +ELSE +IF ENABLE_LJMP_TO_MAIN + ljmp _main ; goto main (no return) +ELSE + lcall _main ; call main +.Exit: + jmp .Exit ; Wait here after return till power-off or reset +ENDIF +ENDIF ; TOOLCHAIN + + ;--------------------------------- + ; Library Access to Global Parms + ;--------------------------------- + ; + bGetPowerSetting: +_bGetPowerSetting: + ; Returns value of POWER_SETTING in the A register. + ; No inputs. No Side Effects. + ; +IF (POWER_SETTING & POWER_SET_2V7) + mov A, POWER_SETTING | POWER_SET_SLOW_IMO +ELSE + mov A, POWER_SETTING ; Supply voltage and internal main osc +ENDIF + ret + +IF (TOOLCHAIN & HITECH) +ELSE + ;--------------------------------- + ; Order Critical RAM & ROM AREAs + ;--------------------------------- + ; 'TOP' is all that has been defined so far... + + ; ROM AREAs for C CONST, static & global items + ; + AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM +__idata_start: + + AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers +__func_lit_start: + + AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + AREA UserModules (ROM, REL, CON) ; User Module APIs + + ; CODE segment for general use + ; + AREA text (ROM, REL, CON) +__text_start: + + ; RAM area usage + ; + AREA data (RAM, REL, CON) ; initialized RAM +__data_start: + + AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + AREA bss (RAM, REL, CON) ; general use +__bss_start: + +ENDIF ; TOOLCHAIN + +; end of file boot.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt new file mode 100644 index 0000000..d18eb25 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt @@ -0,0 +1,28 @@ +; @Id: flashsecurity.txt#1 @ +; +; Edit this file to adjust the Flash security for this project. +; Flash security is provided by marking a 64 byte block with a character +; that corresponds to the type of security for that block, given: +; +; W: Full (Write protected) +; R: Field Upgrade (Read protected) +; U: Unprotected +; F: Factory + +; Note #1: Protection characters can be entered in upper or lower case. +; Note #2: Refer to the Flash Program Memory Protection section in the Data Sheet. + +; Comments may be added similar to an assembly language comment, by +; Using the semicolon (;) followed by your comment. The comment extends +; to the end of the line. + +; 0 40 80 C0 100 140 180 1C0 200 240 280 2C0 300 340 380 3C0 (+) Base Address + + W W W W W W W W W W W W W W W W ; Base Address 0 + W W W W W W W W W W W W W W W W ; Base Address 400 + W W W W W W W W W W W W W W W W ; Base Address 800 + W W W W W W W W W W W W W W W W ; Base Address C00 +; End 4K parts + + +; Copyright Cypress MicroSystems, 2002, All rights reserved. \ No newline at end of file diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm new file mode 100644 index 0000000..216e2ae --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm @@ -0,0 +1,398 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.asm +;; Version: 1.1, Updated on 2006/02/03 at 09:10:49 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler source for the ADCINC A/D Converter +;; User Module with 1st-order modulator. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API +;; function returns. Even though these registers may be preserved now, +;; there is no guarantee they will be preserved in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" + +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export ADCINC_Start +export _ADCINC_Start +export ADCINC_SetPower +export _ADCINC_SetPower +export ADCINC_Stop +export _ADCINC_Stop +export ADCINC_GetSamples +export _ADCINC_GetSamples +export ADCINC_StopADC +export _ADCINC_StopADC +export ADCINC_fIsDataAvailable +export _ADCINC_fIsDataAvailable +export ADCINC_iClearFlagGetData +export _ADCINC_iClearFlagGetData +export ADCINC_wClearFlagGetData +export _ADCINC_wClearFlagGetData +export ADCINC_cClearFlagGetData +export _ADCINC_cClearFlagGetData +export ADCINC_bClearFlagGetData +export _ADCINC_bClearFlagGetData +export ADCINC_iGetData +export _ADCINC_iGetData +export ADCINC_wGetData +export _ADCINC_wGetData +export ADCINC_bGetData +export _ADCINC_bGetData +export ADCINC_cGetData +export _ADCINC_cGetData +export ADCINC_fClearFlag +export _ADCINC_fClearFlag +export ADCINC_WritePulseWidth +export _ADCINC_WritePulseWidth + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Start +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +; and starts the PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Start: +_ADCINC_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + or reg[DEC_CR1],c0h + call ADCINC_SetPower + ADCINC_RESET_INTEGRATOR_M + mov reg[ADCINC_PWMdr1],ffh + or reg[ADCINC_PWMcr0],01h ; start PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_SetPower +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_SetPower: +_ADCINC_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Set up Stack frame + and A,03h ; Ensure value is legal + push A + mov A,reg[ADCINC_AtoDcr3] ; First SC block: + and A,~03h ; clear power bits to zero + or A,[ X ] ; establish new value + mov reg[ADCINC_AtoDcr3],A ; change the actual setting + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Stop +; +; DESCRIPTION: Removes power from the module's analog PSoc block. +; and turns off PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Stop: +_ADCINC_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + and reg[ADCINC_AtoDcr3], ~03h + and reg[ADCINC_PWMcr0], ~01h ; stop PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_GetSamples +; +; DESCRIPTION: Activates interrupts for this user module and begins sampling. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: A register contain number of samples +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_GetSamples: +_ADCINC_GetSamples: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >ADCINC_fMode + ADCINC_ENABLE_INTEGRATOR_M + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + mov [ADCINC_bNumSamples],A + mov A, reg[ADCINC_PWMdr2] + jnz .SkipPulseWrite + mov reg[ADCINC_PWMdr2], 1 +.SkipPulseWrite: + ADCINC_STARTADC_M ;enable interrupt + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_StopADC +; +; DESCRIPTION: Shuts down the A/D is an orderly manner. The interrupt +; is disabled but the PWM output is still active. +; Integrator is reset +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_StopADC: +_ADCINC_StopADC: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + ADCINC_RESET_INTEGRATOR_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fIsDataAvailable +; +; DESCRIPTION: Returns the status of the A/D Data +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall BOOL DataAvailable returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fIsDataAvailable: +_ADCINC_fIsDataAvailable: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fIsDataAvailable_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iClearFlagGetData +; ADCINC_wClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +; Flag is checked after trandfer to insure valid data. +; available. Also clears the DATA_READY flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iClearFlagGetData: +_ADCINC_iClearFlagGetData: + ADCINC_wClearFlagGetData: +_ADCINC_wClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_iClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_cClearFlagGetData +; ADCINC_bClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_cClearFlagGetData: +_ADCINC_cClearFlagGetData: + ADCINC_bClearFlagGetData: +_ADCINC_bClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_bClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iGetData +; ADCINC_wGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult is returned in the X,A registers +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iGetData: +_ADCINC_iGetData: + ADCINC_wGetData: +_ADCINC_wGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_wGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_bGetData +; ADCINC_cGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall CHAR cData returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_bGetData: +_ADCINC_bGetData: + ADCINC_cGetData: +_ADCINC_cGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_cGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fClearFlag +; +; DESCRIPTION: Clears the data ready flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The DATA_READY flag is cleared. +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fClearFlag: +_ADCINC_fClearFlag: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fClearFlag_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_WritePulseWidth +; +; DESCRIPTION: +; Write the 8-bit period value into the compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_WritePulseWidth: +_ADCINC_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_WritePulseWidth_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File ADCINC.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h new file mode 100644 index 0000000..c25e7c9 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h @@ -0,0 +1,91 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: ADCINC.h +// Version: 1.20, Updated on 2012/9/21 at 11:56:47 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: C declarations for the ADCINC User Module with +// a 1st-order modulator. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef ADCINC_INCLUDE +#define ADCINC_INCLUDE + +#include + +#pragma fastcall16 ADCINC_Start +#pragma fastcall16 ADCINC_SetPower +#pragma fastcall16 ADCINC_Stop +#pragma fastcall16 ADCINC_GetSamples +#pragma fastcall16 ADCINC_StopADC +#pragma fastcall16 ADCINC_fIsDataAvailable +#pragma fastcall16 ADCINC_iClearFlagGetData +#pragma fastcall16 ADCINC_wClearFlagGetData +#pragma fastcall16 ADCINC_cClearFlagGetData +#pragma fastcall16 ADCINC_bClearFlagGetData +#pragma fastcall16 ADCINC_iGetData +#pragma fastcall16 ADCINC_wGetData +#pragma fastcall16 ADCINC_cGetData +#pragma fastcall16 ADCINC_bGetData +#pragma fastcall16 ADCINC_fClearFlag +#pragma fastcall16 ADCINC_WritePulseWidth + +//------------------------------------------------- +// Prototypes of the ADCINC API. +//------------------------------------------------- +extern void ADCINC_Start(BYTE bPower); +extern void ADCINC_SetPower(BYTE bPower); +extern void ADCINC_Stop(void); +extern void ADCINC_GetSamples(BYTE bNumSamples); +extern void ADCINC_StopADC(void); +extern BYTE ADCINC_fIsDataAvailable(void); +extern INT ADCINC_iClearFlagGetData(void); +extern WORD ADCINC_wClearFlagGetData(void); +extern CHAR ADCINC_cClearFlagGetData(void); +extern BYTE ADCINC_bClearFlagGetData(void); +extern INT ADCINC_iGetData(void); +extern WORD ADCINC_wGetData(void); +extern CHAR ADCINC_cGetData(void); +extern BYTE ADCINC_bGetData(void); +extern BYTE ADCINC_fClearFlag(void); +extern void ADCINC_WritePulseWidth(BYTE bPulseWidthValue); + +//------------------------------------------------- +// Defines for ADCINC API's. +//------------------------------------------------- +#define ADCINC_OFF 0 +#define ADCINC_LOWPOWER 1 +#define ADCINC_MEDPOWER 2 +#define ADCINC_HIGHPOWER 3 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- +#pragma ioport ADCINC_PWMdr0: 0x020 //Period reg +BYTE ADCINC_PWMdr0; +#pragma ioport ADCINC_PWMdr1: 0x021 //1_ADDRh ; Down count reg +BYTE ADCINC_PWMdr1; +#pragma ioport ADCINC_PWMdr2: 0x022 //Compare reg +BYTE ADCINC_PWMdr2; +#pragma ioport ADCINC_PWMcr0: 0x023 //Control reg +BYTE ADCINC_PWMcr0; +#pragma ioport ADCINC_PWMfn: 0x120 //Function reg +BYTE ADCINC_PWMfn; +#pragma ioport ADCINC_PWMsl: 0x121 //Input select reg +BYTE ADCINC_PWMsl; +#pragma ioport ADCINC_PWMos: 0x122 //Output select reg +BYTE ADCINC_PWMos; +#pragma ioport ADCINC_AtoDcr0: 0x084 //SC Block Control Reg 0 +BYTE ADCINC_AtoDcr0; +#pragma ioport ADCINC_AtoDcr1: 0x085 //SC Block Control Reg 1 +BYTE ADCINC_AtoDcr1; +#pragma ioport ADCINC_AtoDcr2: 0x086 //SC Block Control Reg 2 +BYTE ADCINC_AtoDcr2; +#pragma ioport ADCINC_AtoDcr3: 0x087 //SC Block Control Reg 3 +BYTE ADCINC_AtoDcr3; + +#endif +// end of file ADCINC.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc new file mode 100644 index 0000000..6cefac2 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc @@ -0,0 +1,149 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.inc +;; Version: 1.20, Updated on 2012/9/21 at 11:56:47 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the ADCINC A/D Converter +;; User Module with a 1st-order modulator. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +;-------------------------------------------------- +; Constants for ADCINC API's. +;-------------------------------------------------- + +ADCINC_OFF: equ 00h +ADCINC_LOWPOWER: equ 01h +ADCINC_MEDPOWER: equ 02h +ADCINC_HIGHPOWER: equ 03h + +ADCINC_bNUMBITS: equ 08h +ADCINC_NoAZ: equ 1 +ADCINC_SIGNED_DATA: equ 0 +ADCINC_9_OR_MORE_BITS: equ ((08h - 1)& 08h) +ADCINC_8_OR_MORE_BITS: equ ((08h )& 08h) +;-------------------------------------------------- +; Register Address Constants for ADCINC +;-------------------------------------------------- +ADCINC_ISR_MASK: equ 01h +ADCINC_ISR_REG: equ 0e1h +ADCINC_CLR_REG: equ (((ADCINC_ISR_REG & 038h)/8)^0dfh) + +ADCINC_PWMdr0: equ 20h ; Period reg +ADCINC_PWMdr1: equ 21h ; Down count reg +ADCINC_PWMdr2: equ 22h ; Compare reg +ADCINC_PWMcr0: equ 23h ; Control reg +ADCINC_PWMfn: equ 20h ; Function reg +ADCINC_PWMsl: equ 21h ; Input select reg +ADCINC_PWMos: equ 22h ; Output select reg + +ADCINC_AtoDcr0: equ 84h ; SC Block Control Reg 0 +ADCINC_AtoDcr1: equ 85h ; SC Block Control Reg 1 +ADCINC_AtoDcr2: equ 86h ; SC Block Control Reg 2 +ADCINC_AtoDcr3: equ 87h ; SC Block Control Reg 3 + +HighByte: equ 0 +LowByte: equ 1 + +macro ADCINC_fIsDataAvailable_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] +endm + + +macro ADCINC_iGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_wGetData_M + ADCINC_iGetData_M +endm + + +macro ADCINC_cGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bGetData_M + ADCINC_cGetData_M +endm + + +macro ADCINC_fClearFlag_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] + mov [ADCINC_fStatus],00h +endm + + +macro ADCINC_iClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + .repeat: + mov [ADCINC_fStatus],00h + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] + cmp [ADCINC_fStatus],00h + .until: jnz .repeat +endm + + +macro ADCINC_wClearFlagGetData_M + ADCINC_iClearFlagGetData_M +endm + + +macro ADCINC_cClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov [ADCINC_fStatus],00h + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bClearFlagGetData_M + ADCINC_cClearFlagGetData_M +endm + +macro ADCINC_ENABLE_INTEGRATOR_M + and reg[ADCINC_AtoDcr3],~10h + IF ADCINC_NoAZ + and reg[ADCINC_AtoDcr2],~20h + ENDIF +endm + + +macro ADCINC_RESET_INTEGRATOR_M + IF ADCINC_NoAZ + or reg[ADCINC_AtoDcr2],20h + ENDIF + or reg[ADCINC_AtoDcr3],10h +endm + + +macro ADCINC_STARTADC_M + ;Enable PWM interrupt + mov reg[ADCINC_CLR_REG],~(ADCINC_ISR_MASK) + or reg[ADCINC_ISR_REG], (ADCINC_ISR_MASK) +endm + + +macro ADCINC_STOPADC_M + ;Disable PWM interrupt + and reg[ADCINC_ISR_REG],~(ADCINC_ISR_MASK) +endm + + +macro ADCINC_WritePulseWidth_M + mov reg[ADCINC_PWMdr2],A +endm + +; end of file ADCINC.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm new file mode 100644 index 0000000..4c65e05 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm @@ -0,0 +1,256 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINCINT.asm +;; Version: 1.20, Updated on 2012/9/21 at 11:56:47 +;; +;; DESCRIPTION: Assembler interrupt service routine for the ADCINC +;; A/D Converter User Module. This code works for both the +;; first and second-order modulator topologies. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export _ADCINC_ADConversion_ISR + +export _ADCINC_iResult +export ADCINC_iResult +export _ADCINC_fStatus +export ADCINC_fStatus +export _ADCINC_bState +export ADCINC_bState +export _ADCINC_fMode +export ADCINC_fMode +export _ADCINC_bNumSamples +export ADCINC_bNumSamples + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM(RAM,REL) + ADCINC_iResult: +_ADCINC_iResult: BLK 2 ;Calculated answer + iTemp: BLK 2 ;internal temp storage + ADCINC_fStatus: +_ADCINC_fStatus: BLK 1 ;ADC Status + ADCINC_bState: +_ADCINC_bState: BLK 1 ;State value of ADC count + ADCINC_fMode: +_ADCINC_fMode: BLK 1 ;Integrate and reset mode. + ADCINC_bNumSamples: +_ADCINC_bNumSamples: BLK 1 ;Number of samples to take. + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +AREA InterruptRAM (RAM, REL, CON) +ADC_Counter:: //ADC Counter +_ADC_Counter:: BLK 1 +Ri_Max_x1:: //Peak of Nermest AC coupled signal for temperature sensing +_Ri_Max_x1:: BLK 1 +Ri_Min_x1:: //Trough of Nermest AC coupled signal for temperature sensing +_Ri_Min_x1:: BLK 1 +ip_x1:: //Voltage Across Pump Current sense Resistor, it is in +_ip_x1:: BLK 1 +ADC_IF::// Byte value used to track which ADC sample last occurred, ADC_IF[0]=1 if Ri_Min,ADC_IF[1]=1 if Ri_Max,ADC_IF[2]=1 if VR +_ADC_IF:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _ADCINC_ADConversion_ISR +; +; DESCRIPTION: Perform final filter operations to produce output samples. +; +;----------------------------------------------------------------------------- +; +; The decimation rate is established by the PWM interrupt. Four timer +; clocks elapse for each modulator output (decimator input) since the +; phi1/phi2 generator divides by 4. This means the timer period and thus +; it's interrupt must equal 4 times the actual decimation rate. The +; decimator is ru for 2^(#bits-6). +; +_ADCINC_ADConversion_ISR: + dec [ADCINC_bState] +if1: + jc endif1 ; no underflow + reti +endif1: + cmp [ADCINC_fMode],0 +if2: + jnz endif2 ;leaving reset mode + push A ;read decimator + mov A, reg[DEC_DL] + mov [iTemp + LowByte],A + mov A, reg[DEC_DH] + mov [iTemp + HighByte], A + pop A + mov [ADCINC_fMode],1 + mov [ADCINC_bState],((1<<(ADCINC_bNUMBITS- 6))-1) + reti +endif2: + ;This code runs at end of integrate + ADCINC_RESET_INTEGRATOR_M + push A + mov A, reg[DEC_DL] + sub A,[iTemp + LowByte] + mov [iTemp +LowByte],A + mov A, reg[DEC_DH] + sbb A,[iTemp + HighByte] + asr A + rrc [iTemp + LowByte] + + ;Covert to Unipolar +IF ADCINC_9_OR_MORE_BITS + add A, (1<<(ADCINC_bNUMBITS - 9)) +ELSE + add [iTemp + LowByte], (1<<(ADCINC_bNUMBITS - 1)) ;work on lower Byte + adc A,0 +ENDIF + ;check for overflow +IF ADCINC_8_OR_MORE_BITS + cmp A,(1<<(ADCINC_bNUMBITS - 8)) +if3: + jnz endif3 ;overflow + dec A + mov [iTemp + LowByte],ffh +endif3: +ELSE + cmp [iTemp + LowByte],(1<<(ADCINC_bNUMBITS)) +if4: + jnz endif4 ;overflow + dec [iTemp + LowByte] +endif4: +ENDIF +IF ADCINC_SIGNED_DATA +IF ADCINC_9_OR_MORE_BITS + sub A,(1<<(ADCINC_bNUMBITS - 9)) +ELSE + sub [iTemp +LowByte],(1<<(ADCINC_bNUMBITS - 1)) + sbb A,0 +ENDIF +ENDIF + mov [ADCINC_iResult + LowByte],[iTemp +LowByte] + mov [ADCINC_iResult + HighByte],A + mov [ADCINC_fStatus],1 +ConversionReady: + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + //14Point7 ASM Code Start + mov A,[_ADC_Counter] + sub A,0 + JZ ADC_0 + + sub A,1 + JZ ADC_1 + + sub A,1 + JZ ADC_2 + + sub A,1 + JZ ADC_3 + + ADC_0: //Ri_Max, Peak of AC coupled Temperature sense signal + //and reg[PRT2DR],127 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_Ri_Max_x1],[ADCINC_iResult + LowByte] + mov [_ADC_Counter],1 + or [_ADC_IF],2 // Set ADC_IF[1] to indicate that new Ri_Max data is available + jmp Cont + + ADC_1://Ri_Min, Trough of AC coupled Temperature sense signal + mov reg[AMX_IN],15 //setup Mux so that Next ADC sample is a differential Ip Vs Ia (voltage across pump current sense resistor, P0[7] Vs P0[6] + //mov reg[AMX_IN],9 //cal lin + //or reg[PRT2DR],128 //set Ri_Out Pin + or reg[PRT0DR],4 //set Ri_Out Pin + mov [_Ri_Min_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],1 // Set ADC_IF[0] to indicate that new Ri_Min data is available + mov [_ADC_Counter],2 + + jmp Cont + + ADC_2://Voltage Across Pump Current sense resistor + //and reg[PRT2DR],127 //clear Ri_Out Pin, Next ADC sample is not the Ri_Min, but Ri_Out is cleared so that ~1khz AC signal is mantained + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],3 + jmp Cont + + ADC_3://Voltage Across Pump Current sense resistor again, this ADC sample is need to keep timing on the ~1khz AC Temperature Sense Signal so might as well get another Sample of VR + //or reg[PRT2DR],128 //Set Ri_Out Pin so that the next ADC sample will Acquire the Peak (Ri_Max) of AC coupled Temperature sense signal + or reg[PRT0DR],4 //set Ri_Out Pin + mov reg[AMX_IN],0 // Setup Mux so that Next ADC sample is differential Ri_in Vs Vref, P0[1] Vs P0[0] + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],0 + + Cont: + //14Point7 ASM Code End + + ; Sample data is now in iResult + ; + ; NOTE: This interrupt service routine has already + ; preserved the values of the A CPU register. If + ; you need to use the X register you must preserve + ; its value and restore it before the return from + ; interrupt. + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + pop A + cmp [ADCINC_bNumSamples],0 +if5: + jnz endif5 ; Number of samples is zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif5: + dec [ADCINC_bNumSamples] +if6: + jz endif6 ; count not zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif6: + ;All samples done + ADCINC_STOPADC_M + reti +; end of file ADCINCINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm new file mode 100644 index 0000000..9abc07f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.asm +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_0.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_0_InputSelect +export _AMUX4_0_InputSelect + +export AMUX4_0_Start +export _AMUX4_0_Start + +export AMUX4_0_Stop +export _AMUX4_0_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_InputSelect: +_AMUX4_0_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_0_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_0_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_0_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_0_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Start: +_AMUX4_0_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Stop: +_AMUX4_0_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_0.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h new file mode 100644 index 0000000..ae47c11 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_0.h +// Version: 1.50, Updated on 2012/9/21 at 11:56:52 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_0_INCLUDE +#define AMUX4_0_INCLUDE + +#include +//------------------------------------------------- +// Defines for AMUX4_0 API's. +//------------------------------------------------- +#define AMUX4_0_PORT0_0 0x00 +#define AMUX4_0_PORT0_2 0x01 +#define AMUX4_0_PORT0_4 0x02 +#define AMUX4_0_PORT0_6 0x03 + +#define AMUX4_0_PORT0_1 0x00 +#define AMUX4_0_PORT0_3 0x01 +#define AMUX4_0_PORT0_5 0x02 +#define AMUX4_0_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_0_InputSelect +#pragma fastcall16 AMUX4_0_Start +#pragma fastcall16 AMUX4_0_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_0 API. +//------------------------------------------------- + +extern void AMUX4_0_InputSelect(BYTE bChannel); +extern void AMUX4_0_Start(void); +extern void AMUX4_0_Stop(void); + +#endif +// end of file AMUX4_0.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc new file mode 100644 index 0000000..74e3045 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.inc +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_0 API's. +;-------------------------------------------------- +AMUX4_0_MUX_COL: equ (0h & 03h) +AMUX4_0_COL_COUNT: equ (0h & 80h) +AMUX4_0_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_0_PORT0_0: equ 0h +AMUX4_0_PORT0_2: equ 1h +AMUX4_0_PORT0_4: equ 2h +AMUX4_0_PORT0_6: equ 3h + +AMUX4_0_PORT0_1: equ 0h +AMUX4_0_PORT0_3: equ 1h +AMUX4_0_PORT0_5: equ 2h +AMUX4_0_PORT0_7: equ 3h + +; end of file AMUX4_0.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm new file mode 100644 index 0000000..f087534 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.asm +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_1.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_1_InputSelect +export _AMUX4_1_InputSelect + +export AMUX4_1_Start +export _AMUX4_1_Start + +export AMUX4_1_Stop +export _AMUX4_1_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_InputSelect: +_AMUX4_1_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_1_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_1_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_1_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_1_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Start: +_AMUX4_1_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Stop: +_AMUX4_1_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_1.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h new file mode 100644 index 0000000..6612da6 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_1.h +// Version: 1.50, Updated on 2012/9/21 at 11:56:52 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_1_INCLUDE +#define AMUX4_1_INCLUDE + +#include +//------------------------------------------------- +// Defines for AMUX4_1 API's. +//------------------------------------------------- +#define AMUX4_1_PORT0_0 0x00 +#define AMUX4_1_PORT0_2 0x01 +#define AMUX4_1_PORT0_4 0x02 +#define AMUX4_1_PORT0_6 0x03 + +#define AMUX4_1_PORT0_1 0x00 +#define AMUX4_1_PORT0_3 0x01 +#define AMUX4_1_PORT0_5 0x02 +#define AMUX4_1_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_1_InputSelect +#pragma fastcall16 AMUX4_1_Start +#pragma fastcall16 AMUX4_1_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_1 API. +//------------------------------------------------- + +extern void AMUX4_1_InputSelect(BYTE bChannel); +extern void AMUX4_1_Start(void); +extern void AMUX4_1_Stop(void); + +#endif +// end of file AMUX4_1.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc new file mode 100644 index 0000000..9fd8264 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.inc +;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_1 API's. +;-------------------------------------------------- +AMUX4_1_MUX_COL: equ (0h & 03h) +AMUX4_1_COL_COUNT: equ (0h & 80h) +AMUX4_1_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_1_PORT0_0: equ 0h +AMUX4_1_PORT0_2: equ 1h +AMUX4_1_PORT0_4: equ 2h +AMUX4_1_PORT0_6: equ 3h + +AMUX4_1_PORT0_1: equ 0h +AMUX4_1_PORT0_3: equ 1h +AMUX4_1_PORT0_5: equ 2h +AMUX4_1_PORT0_7: equ 3h + +; end of file AMUX4_1.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm new file mode 100644 index 0000000..2309a69 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm @@ -0,0 +1,284 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.asm +;; Version: 4.3, Updated on 2012/9/21 at 11:58:34 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: DAC6 User Module software implementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC6_VGND.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export DAC6_VGND_Start +export _DAC6_VGND_Start +export DAC6_VGND_SetPower +export _DAC6_VGND_SetPower + +export DAC6_VGND_WriteBlind +export _DAC6_VGND_WriteBlind +export DAC6_VGND_WriteStall +export _DAC6_VGND_WriteStall + +export DAC6_VGND_Stop +export _DAC6_VGND_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 1 Switched Cap Block configured as shown. This API depends +;; on knowing the exact personalization of CR0 and CR3 bitfields +;; for time efficiency. +;; +;; * For a Mask/Val pair, this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; BIT FIELD Mask/Val Function +;; ----------------- ----- -------------------- +;; CR0.FCap 80/1 Feedback cap size 32 +;; CR0.ClockPhase 40/0 Normal phase +;; CR0.ASign 20/* User parameter +;; CR0.ACap 1F/* User parameter +;; +;; CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; CR1.AMux E0/4 (SCB) VRef High +;; CR1.BCap 1F/0 Prune B-input branch +;; +;; CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; CR2.CmpBus 40/0 Comparator Bus Disable +;; CR2.AutoZero 20/1 Auto-Zero enabled on Phi 1 +;; CR2.CCap 1F/0 Prune C-input branch +;; +;; CR3.ARefSelect C0/0 Use AGND (to invert) +;; CR3.FSW1 20/1 Feedback Cap Used +;; CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; CR3.BSW 08/0 (SCB) Don't Care - this branch pruned +;; CR3.BMux 04/0 (SCB) Don't Care - this branch pruned +;; CR3.PWR 03/* User Parameter: Power, def=OFF +;; + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +cOFFSET: equ 31 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 ALWAYS looks + ; like this regardless of SC block type + ; or where the DAC gets mapped. + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Start +; FUNCTION NAME: DAC6_VGND_SetPower +; +; DESCRIPTION: +; Start / SetPower - Applies power setting to the module's SC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=High +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_Start: +_DAC6_VGND_Start: + DAC6_VGND_SetPower: +_DAC6_VGND_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_1 + and A, bPWRMASK + or A, bCR3 ; Set all other bits in addition to power + mov reg[DAC6_VGND_CR3], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteBlind +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks +; Lowest overhead, but output may not settle to correct value until the +; phi2 of next full cycle following the write. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_WriteBlind: +_DAC6_VGND_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc BlindPositive + ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted! + cpl A ; bit 0 is a "1" so, following 1 byte "inc" works + inc A ; (otherwise, we'd have to "add A, 2") + or A, 40h ; Make it negative by forcing sign bit + jmp BlindMagSet +BlindPositive: + nop + nop + nop + jmp BlindMagSet +BlindMagSet: + asr A ; Divide by two to finish up + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + mov reg[DAC6_VGND_CR0], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteStall +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with fast analog clocks or when the +; resulting interrupt latencies, comparable to the update period, +; can be tolerated comfortably. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_WriteStall: +_DAC6_VGND_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc StallPositive + cpl A ; "Invert" step of complement 2's complement + inc A ; "Add 1" step of complement 2's complement + or A, 40h ; Make it negative + jmp StallMagSet +StallPositive: + nop + nop + nop + jmp StallMagSet +StallMagSet: + asr A ; Divide by two to finish conversion + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + M8C_Stall + mov reg[DAC6_VGND_CR0], A + M8C_Unstall + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Stop +; +; DESCRIPTION: +; Turns off power to the SC block +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_Stop: +_DAC6_VGND_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC6_VGND_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC6_VGND.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h new file mode 100644 index 0000000..674c40a --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h @@ -0,0 +1,56 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC6_VGND.h +// Version: 4.3, Updated on 2012/9/21 at 11:58:34 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: DAC6 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC6_VGND_INCLUDE +#define DAC6_VGND_INCLUDE + +#include + +//------------------------------------------------- +// Defines for DAC6_VGND API's. +//------------------------------------------------- +#define DAC6_VGND_OFF 0 +#define DAC6_VGND_LOWPOWER 1 +#define DAC6_VGND_MEDPOWER 2 +#define DAC6_VGND_HIGHPOWER 3 +#define DAC6_VGND_FULLPOWER 3 + +#pragma fastcall16 DAC6_VGND_Start +#pragma fastcall16 DAC6_VGND_SetPower +#pragma fastcall16 DAC6_VGND_WriteBlind +#pragma fastcall16 DAC6_VGND_WriteStall +#pragma fastcall16 DAC6_VGND_Stop + +//------------------------------------------------- +// Prototypes of the DAC6_VGND API. +//------------------------------------------------- +extern void DAC6_VGND_Start(BYTE bPowerSetting); +extern void DAC6_VGND_SetPower(BYTE bPowerSetting); +extern void DAC6_VGND_WriteBlind(CHAR cOutputValue); +extern void DAC6_VGND_WriteStall(CHAR cOutputValue); +extern void DAC6_VGND_Stop(void); + + +//------------------------------------------------- +// Register Addresses for DAC6_VGND +//------------------------------------------------- +#pragma ioport DAC6_VGND_CR0: 0x080 +BYTE DAC6_VGND_CR0; +#pragma ioport DAC6_VGND_CR1: 0x081 +BYTE DAC6_VGND_CR1; +#pragma ioport DAC6_VGND_CR2: 0x082 +BYTE DAC6_VGND_CR2; +#pragma ioport DAC6_VGND_CR3: 0x083 +BYTE DAC6_VGND_CR3; + +#endif +// end of file DAC6_VGND.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc new file mode 100644 index 0000000..550fd9f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc @@ -0,0 +1,49 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.inc +;; Version: 4.3, Updated on 2012/9/21 at 11:58:34 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the DAC6 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for DAC6_VGND API's +;-------------------------------------------------- +DAC6_VGND_OFF: equ 00h +DAC6_VGND_LOWPOWER: equ 01h +DAC6_VGND_MEDPOWER: equ 02h +DAC6_VGND_HIGHPOWER: equ 03h + +DAC6_VGND_OffsetBinary: equ 04h +DAC6_VGND_TwosComplement: equ 02h +DAC6_VGND_SignAndMagnitude: equ 01h +DAC6_VGND_RawRegister: equ 00h + +DAC6_VGND_DATAFORMAT: equ 7h +DAC6_VGND_OFFSETBINARY: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_OffsetBinary +DAC6_VGND_TWOSCOMPLEMENT: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_TwosComplement +DAC6_VGND_SIGNANDMAGNITUDE: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_SignAndMagnitude + +DAC6_VGND_PHASE_Normal: equ 0 +DAC6_VGND_PHASE_Swapped: equ 1 +DAC6_VGND_PHASE_SWAP: equ DAC6_VGND_PHASE_Normal + +IF DAC6_VGND_PHASE_SWAP + DAC6_VGND_CR0_HIBITS: equ C0h +ELSE + DAC6_VGND_CR0_HIBITS: equ 80h +ENDIF + + +;-------------------------------------------------- +; Register Address Constants for DAC6_VGND +;-------------------------------------------------- +DAC6_VGND_CR0: equ 80h +DAC6_VGND_CR1: equ 81h +DAC6_VGND_CR2: equ 82h +DAC6_VGND_CR3: equ 83h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm new file mode 100644 index 0000000..33385d0 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm @@ -0,0 +1,401 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.asm +;; Version: 2.2, Updated on 2012/9/21 at 11:58:35 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: DAC9 User Module software inplementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC9_Ia.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export DAC9_Ia_Start +export _DAC9_Ia_Start +export DAC9_Ia_SetPower +export _DAC9_Ia_SetPower + +export DAC9_Ia_WriteBlind +export _DAC9_Ia_WriteBlind +export DAC9_Ia_WriteBlind2B +export _DAC9_Ia_WriteBlind2B + +export DAC9_Ia_WriteStall +export _DAC9_Ia_WriteStall +export DAC9_Ia_WriteStall2B +export _DAC9_Ia_WriteStall2B + +export DAC9_Ia_Stop +export _DAC9_Ia_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 2 Switched Cap Blocks, LSB and MSB, configured as shown below. +;; This API depends on knowing the exact personalization of CR0 +;; and CR3 bitfields for time efficiency. +;; +;; * For a Mask/Val pair this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; Setting for output=AGND to OBUS when LSB in ASA10 and MSB in ASB20: +;; LSB.CR0=80 MSB.CR0=80 +;; LSB.CR1=40 MSB.CR1=81 +;; LSB.CR2=20 MSB.CR2=A0 +;; LSB.CR3=33 MSB.CR3=3B +;; +;; BIT FIELD Mask/Val Function +;; ----------------- -------- -------------------- +;; LSB.CR0.FCap 80/1 Feedback cap size 32 +;; LSB.CR0.ClockPhase 40/0 Normal phase +;; LSB.CR0.ASign 20/* User parameter +;; LSB.CR0.ACap 1F/* User parameter +;; +;; LSB.CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; LSB.CR1.BCap 1F/0 Prune B-input branch +;; +;; LSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; LSB.CR2.CmpBus 40/0 Comparator Bus Disabled +;; LSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; LSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; LSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; LSB.CR3.FSW1 20/1 Feedback Cap Used +;; LSB.CR3.FSW0 10/1 Feedback Cap Grounded for AZ +;; LSB.CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; LSB.CR3.PWR 03/* User Parameter: Power; default=OFF +;; +;; MSB.CR0.FCap 80/1 Feedback cap size 32 +;; MSB.CR0.ClockPhase 40/0 Normal phase +;; MSB.CR0.ASign 20/* User parameter +;; MSB.CR0.ACap 1F/* User parameter +;; +;; MSB.CR1.AMux E0/4 (SCB) VRef High +;; MSB.CR1.BCap 1F/1 Subrange LSB block output by BCap/FCap (1/32) +;; +;; MSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; MSB.CR2.CmpBus 40/0 Comparator Bus Disable +;; MSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; MSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; MSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; MSB.CR3.FSW1 20/1 Feedback Cap Used +;; MSB.CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; MSB.CR3.BSW 08/0 (SCB) why is this cont time instead of phi2?? +;; MSB.CR3.BMux 04/? (SCB) LSB block output; determined by placement +;; MSB.CR3.PWR 03/* User Parameter: Power, default=OFF + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +iOFFSET: equ 255 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 always looks like + ; this regardless of SC block type or location. +bSMMASK: equ 3Fh ; Sign and Magnitude bits mask +bSIGNMASK: equ 20h ; Sign bit mask +bMAGMASK: equ 1Fh ; Magnitude bits mask +bHIGHBITS: equ 80h ; Setting for FCap and ClockPhase +bHBMASK: equ C0h ; Mask for FCap and ClockPhase + + +;;--------------------------- + macro Stall +;;--------------------------- + mov reg[ASY_CR], 1 + endm + +;;--------------------------- + macro UnStall +;;--------------------------- + mov reg[ASY_CR], 0 + endm + + AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Start +; FUNCTION NAME: DAC9_Ia_SetPower +; +; DESCRIPTION: +; Applies power setting to the module's analog PSoC blocks. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=Full. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Start: +_DAC9_Ia_Start: + DAC9_Ia_SetPower: +_DAC9_Ia_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, bPWRMASK ; trim input to bits of interest + mov X, SP ; Set stack frame pointer + push A + ;; read CR3 registers, modify power bits & write back + mov A, reg[DAC9_Ia_MSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in MSB register image + mov reg[DAC9_Ia_MSB_CR3], A + mov A, reg[DAC9_Ia_LSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in LSB register image + mov reg[DAC9_Ia_LSB_CR3], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteBlind +; FUNCTION NAME: DAC9_Ia_WriteBlind2B +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks. +; Lowest overhead, but may cause glitches on the output. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteBlind: +_DAC9_Ia_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced using [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc BlindAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp BlindMagSet +BlindAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp BlindMagSet +BlindMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + pop A ; LSB: 76543210 (mag) + push X ; MSB + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + + ENDIF + + DAC9_Ia_WriteBlind2B: +_DAC9_Ia_WriteBlind2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + mov reg[DAC9_Ia_MSB_CR0],A + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteStall +; FUNCTION NAME: DAC9_Ia_WriteStall2B +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with faster analog clocks or when the +; effect of prolonging interrupt latencies can be safely tolerated. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteStall: +_DAC9_Ia_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced via [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc StallAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp StallMagSet +StallAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp StallMagSet +StallMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + + pop A ; LSB: 76543210 (mag) + push X ; MSB + + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + ENDIF + + DAC9_Ia_WriteStall2B: +_DAC9_Ia_WriteStall2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + M8C_Stall + mov reg[DAC9_Ia_MSB_CR0],A + M8C_Unstall + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Stop +; +; DESCRIPTION: +; Cuts power to the user module. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Stop: +_DAC9_Ia_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC9_Ia_MSB_CR3], ~bPWRMASK + and reg[DAC9_Ia_LSB_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC9_Ia.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h new file mode 100644 index 0000000..5c7b8b4 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h @@ -0,0 +1,93 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC9_Ia.h +// Version: 2.2, Updated on 2012/9/21 at 11:58:35 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: DAC9 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC9_Ia_INCLUDE +#define DAC9_Ia_INCLUDE + +#include + +//------------------------------------------------- +// Defines for DAC9_Ia API's. +//------------------------------------------------- +// Power Setting Defines +#define DAC9_Ia_OFF 0 +#define DAC9_Ia_LOWPOWER 1 +#define DAC9_Ia_MEDPOWER 2 +#define DAC9_Ia_HIGHPOWER 3 +#define DAC9_Ia_FULLPOWER 3 + +// Define constants for declaring function prototypes based on DataFormat parameter +#define DAC9_Ia_OffsetBinary 0x04 +#define DAC9_Ia_TwosComplement 0x02 +#define DAC9_Ia_SignAndMagnitude 0x01 +#define DAC9_Ia_RawRegister 0x00 +#define DAC9_Ia_DATAFORMAT 0x7 +#define DAC9_Ia_OFFSETBINARY DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +#define DAC9_Ia_TWOSCOMPLEMENT DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +#define DAC9_Ia_SIGNANDMAGNITUDE DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +// Declare function fastcall16 pragmas +#pragma fastcall16 DAC9_Ia_Start +#pragma fastcall16 DAC9_Ia_SetPower +#pragma fastcall16 DAC9_Ia_Stop + +//------------------------------------------------- +// Prototypes of the DAC9_Ia API. +//------------------------------------------------- +extern void DAC9_Ia_Start(BYTE bPowerSetting); +extern void DAC9_Ia_SetPower(BYTE bPowerSetting); +extern void DAC9_Ia_Stop(void); + +// Declare overloaded functions based on DataForamt parameter selected +#if DAC9_Ia_OFFSETBINARY + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(WORD wOutputValue); + extern void DAC9_Ia_WriteStall(WORD wOutputValue); +#else + #if DAC9_Ia_TWOSCOMPLEMENT + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(INT iOutputValue); + extern void DAC9_Ia_WriteStall(INT iOutputValue); + #else //DAC9_Ia_SIGNANDMAGNITUDE + #pragma fastcall16 DAC9_Ia_WriteBlind2B + #pragma fastcall16 DAC9_Ia_WriteStall2B + extern void DAC9_Ia_WriteBlind2B(BYTE bLSB, BYTE bMSB); + extern void DAC9_Ia_WriteStall2B(BYTE bLSB, BYTE bMSB); + #endif +#endif + +//------------------------------------------------- +// Hardware Addresses for DAC9_Ia +//------------------------------------------------- + +#pragma ioport DAC9_Ia_LSB_CR0: 0x090 // LSB Analog control register 0 +BYTE DAC9_Ia_LSB_CR0; +#pragma ioport DAC9_Ia_LSB_CR1: 0x091 // LSB Analog control register 1 +BYTE DAC9_Ia_LSB_CR1; +#pragma ioport DAC9_Ia_LSB_CR2: 0x092 // LSB Analog control register 2 +BYTE DAC9_Ia_LSB_CR2; +#pragma ioport DAC9_Ia_LSB_CR3: 0x093 // LSB Analog control register 3 +BYTE DAC9_Ia_LSB_CR3; + +#pragma ioport DAC9_Ia_MSB_CR0: 0x094 // MSB Analog control register 0 +BYTE DAC9_Ia_MSB_CR0; +#pragma ioport DAC9_Ia_MSB_CR1: 0x095 // MSB Analog control register 1 +BYTE DAC9_Ia_MSB_CR1; +#pragma ioport DAC9_Ia_MSB_CR2: 0x096 // MSB Analog control register 2 +BYTE DAC9_Ia_MSB_CR2; +#pragma ioport DAC9_Ia_MSB_CR3: 0x097 // MSB Analog control register 3 +BYTE DAC9_Ia_MSB_CR3; + +#endif +// end of file DAC9_Ia.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc new file mode 100644 index 0000000..cfcde22 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc @@ -0,0 +1,68 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.inc +;; Version: 2.2, Updated on 2012/9/21 at 11:58:35 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the DAC9 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for DAC9_Ia API's +;-------------------------------------------------- +DAC9_Ia_OFF: equ 00h +DAC9_Ia_LOWPOWER: equ 01h +DAC9_Ia_MEDPOWER: equ 02h +DAC9_Ia_HIGHPOWER: equ 03h +DAC9_Ia_FULLPOWER: equ 03h + +DAC9_Ia_LSB_CR0: equ 90h +DAC9_Ia_LSB_CR1: equ 91h +DAC9_Ia_LSB_CR2: equ 92h +DAC9_Ia_LSB_CR3: equ 93h +DAC9_Ia_MSB_CR0: equ 94h +DAC9_Ia_MSB_CR1: equ 95h +DAC9_Ia_MSB_CR2: equ 96h +DAC9_Ia_MSB_CR3: equ 97h + +DAC9_Ia_OffsetBinary: equ 04h +DAC9_Ia_TwosComplement: equ 02h +DAC9_Ia_SignAndMagnitude: equ 01h +DAC9_Ia_RawRegister: equ 00h + +DAC9_Ia_DATAFORMAT: equ 7h +DAC9_Ia_OFFSETBINARY: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +DAC9_Ia_TWOSCOMPLEMENT: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +DAC9_Ia_SIGNANDMAGNITUDE: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +DAC9_Ia_PHASE_Normal: equ 0 +DAC9_Ia_PHASE_Swapped: equ 1 + +DAC9_Ia_PHASE_SWAP: equ DAC9_Ia_PHASE_Normal + +IF DAC9_Ia_PHASE_SWAP + DAC9_Ia_CR0_HIBITS: equ C0h +ELSE + DAC9_Ia_CR0_HIBITS: equ 80h +ENDIF + +;-------------------------------------------------- +; Register Address Constants for DAC9_Ia +;-------------------------------------------------- +DAC9_Ia_LSB_CR0: equ 90h ; LSB SC Block Control Register 0 +DAC9_Ia_LSB_CR1: equ 91h ; LSB SC Block Control Register 1 +DAC9_Ia_LSB_CR2: equ 92h ; LSB SC Block Control Register 2 +DAC9_Ia_LSB_CR3: equ 93h ; LSB SC Block Control Register 3 + +DAC9_Ia_MSB_CR0: equ 94h ; MSB SC Block Control Register 0 +DAC9_Ia_MSB_CR1: equ 95h ; MSB SC Block Control Register 1 +DAC9_Ia_MSB_CR2: equ 96h ; MSB SC Block Control Register 2 +DAC9_Ia_MSB_CR3: equ 97h ; MSB SC Block Control Register 3 + +; end of file DAC9_Ia.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h new file mode 100644 index 0000000..f846d8c --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h @@ -0,0 +1,86 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.3.2710 +******************************************************************************/ +/****************************************************************************** +* This file contains defines to support oscillator register initialization +* for CY8C24423B +******************************************************************************/ + +#define CPU_CLOCK 0x2 //CPU clock value +#define CPU_CLOCK_MASK 0x7 //CPU clock mask +#define CPU_CLOCK_JUST 0x2 //CPU clock value justified +#define SELECT_32K 0x0 //32K select value +#define SELECT_32K_MASK 0x80 //32K select mask +#define SELECT_32K_JUST 0x0 //32K select value justified +#define PLL_MODE 0x0 //PLL mode value +#define PLL_MODE_MASK 0x40 //PLL mode mask +#define PLL_MODE_JUST 0x0 //PLL mode value justified +#define SLEEP_TIMER 0x0 //Sleep Timer value +#define SLEEP_TIMER_MASK 0x18 //Sleep Timer mask +#define SLEEP_TIMER_JUST 0x0 //Sleep Timer value justified +#define SWITCH_MODE_PUMP 0x1 //Switch Mode Pump value +#define SWITCH_MODE_PUMP_MASK 0x80 //Switch Mode Pump mask +#define SWITCH_MODE_PUMP_JUST 0x80 //Switch Mode Pump value justified +#define TRIP_VOLTAGE 0x6 //Trip Voltage +#define POWER_SETTING 0x10 //Power Setting [ Vcc / SysClk freq ] 0x10 = 5.0V / 24MHz + // 0x08 = 3.3V / 24MHz + // 0x09 = 3.3V / 12MHz +#define WATCHDOG_ENABLE 0x0 //Watchdog Enable 1 = Enable +#define CLOCK_DIV_VC1 0x0 // VC1 clock divider +#define CLOCK_DIV_VC1_MASK 0xf0 // VC1 clock divider mask +#define CLOCK_DIV_VC1_JUST 0x0 // jVC1 clock divider ustified +#define CLOCK_DIV_VC2 0xb // VC2 clock divider +#define CLOCK_DIV_VC2_MASK 0xf // VC2 clock divider mask +#define CLOCK_DIV_VC2_JUST 0xb // VC2 clock divider justified +#define CLOCK_INPUT_VC3 0x0 // VC3 clock source +#define CLOCK_INPUT_VC3_MASK 0x3 // VC3 clock source mask +#define CLOCK_INPUT_VC3_JUST 0x0 // VC3 clock source justified +#define CLOCK_DIV_VC3 0x2f // VC3 clock divider +#define CLOCK_DIV_VC3_MASK 0xff // VC3 clock divider mask +#define CLOCK_DIV_VC3_JUST 0x2f // VC3 clock divider justified +#define ANALOG_BUFFER_PWR 0x1 // Analog buffer power level +#define ANALOG_BUFFER_PWR_MASK 0x1 // Analog buffer power level mask +#define ANALOG_BUFFER_PWR_JUST 0x1 // Analog buffer power level justified +#define ANALOG_POWER 0x7 // Analog power control +#define ANALOG_POWER_MASK 0x7 // Analog power control mask +#define ANALOG_POWER_JUST 0x7 // Analog power control justified +#define OP_AMP_BIAS 0x0 // Op amp bias level +#define OP_AMP_BIAS_MASK 0x40 // Op amp bias level mask +#define OP_AMP_BIAS_JUST 0x0 // Op amp bias level justified +#define REF_MUX 0x7 // Ref mux setting +#define REF_MUX_MASK 0x38 // Ref mux setting mask +#define REF_MUX_JUST 0x38 // Ref mux setting justified +#define AGND_BYPASS 0x0 // AGndBypass setting +#define AGND_BYPASS_MASK 0x40 // AGndBypass setting mask +#define AGND_BYPASS_JUST 0x0 // AGndBypass setting justified +#define SYSCLK_SOURCE (0x0 | 0x0) // SysClk Source setting +#define SYSCLK_SOURCE_MASK (0x4 | 0x2) // SysClk Source setting mask +#define SYSCLK_SOURCE_JUST (0x0 | 0x0) // SysClk Source setting justified +#define SYSCLK_2_DISABLE 0x0 // SysClk*2 Disable setting +#define SYSCLK_2_DISABLE_MASK 0x1 // SysClk*2 Disable setting mask +#define SYSCLK_2_DISABLE_JUST 0x0 // SysClk*2 Disable setting justified +// +// register initial values +// +#define ANALOG_IO_CONTROL 0x29 //Analog IO Control register (ABF_CR) +#define PORT_0_GLOBAL_SELECT 0x0 //Port 0 global select register (PRT0GS) +#define PORT_0_DRIVE_0 0x4 //Port 0 drive mode 0 register (PRT0DM0) +#define PORT_0_DRIVE_1 0xfb //Port 0 drive mode 1 register (PRT0DM1) +#define PORT_0_DRIVE_2 0xfb //Port 0 drive mode 1 register (PRT0DM2) +#define PORT_0_INTENABLE 0x0 //Port 0 interrupt enable register (PRT0IE) +#define PORT_0_INTCTRL_0 0x0 //Port 0 interrupt control 0 register (PRT0IC0) +#define PORT_0_INTCTRL_1 0x0 //Port 0 interrupt control 1 register (PRT0IC1) +#define PORT_1_GLOBAL_SELECT 0x70 //Port 1 global select register (PRT1GS) +#define PORT_1_DRIVE_0 0x70 //Port 1 drive mode 0 register (PRT1DM0) +#define PORT_1_DRIVE_1 0x8f //Port 1 drive mode 1 register (PRT1DM1) +#define PORT_1_DRIVE_2 0x8f //Port 1 drive mode 2 register (PRT1DM2) +#define PORT_1_INTENABLE 0x0 //Port 1 interrupt enable register (PRT1IE) +#define PORT_1_INTCTRL_0 0x0 //Port 1 interrupt control 0 register (PRT1IC0) +#define PORT_1_INTCTRL_1 0x0 //Port 1 interrupt control 1 register (PRT1IC1) +#define PORT_2_GLOBAL_SELECT 0x0 //Port 2 global select register (PRT2GS) +#define PORT_2_DRIVE_0 0xff //Port 2 drive mode 0 register (PRT2DM0) +#define PORT_2_DRIVE_1 0x0 //Port 2 drive mode 1 register (PRT2DM1) +#define PORT_2_DRIVE_2 0x0 //Port 2 drive mode 2 register (PRT2DM2) +#define PORT_2_INTENABLE 0x0 //Port 2 interrupt enable register (PRT2IE) +#define PORT_2_INTCTRL_0 0x0 //Port 2 interrupt control 0 register (PRT2IC0) +#define PORT_2_INTCTRL_1 0x0 //Port 2 interrupt control 1 register (PRT2IC1) diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc new file mode 100644 index 0000000..43be1f7 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc @@ -0,0 +1,118 @@ +; Generated by PSoC Designer 5.3.2710 +; +;============================================================================= +; FILENAME: GlobalParams.inc +; DATE: 2 August 2004 +; +; DESCRIPTION: +; Constants describing many of the global parameter settings. +; This file contains equates to support oscillator register initialization +; for the CY8C24423B +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +;============================================================================= +; + +CPU_CLOCK: equ 2h ;CPU clock value +CPU_CLOCK_MASK: equ 7h ;CPU clock mask +CPU_CLOCK_JUST: equ 2h ;CPU clock value justified +SELECT_32K: equ 0h ;32K select value +SELECT_32K_MASK: equ 80h ;32K select mask +SELECT_32K_JUST: equ 0h ;32K select value justified +PLL_MODE: equ 0h ;PLL mode value +PLL_MODE_MASK: equ 40h ;PLL mode mask +PLL_MODE_JUST: equ 0h ;PLL mode value justified +SLEEP_TIMER: equ 0h ;Sleep Timer value +SLEEP_TIMER_MASK: equ 18h ;Sleep Timer mask +SLEEP_TIMER_JUST: equ 0h ;Sleep Timer value justified +SWITCH_MODE_PUMP: equ 1h ;Switch Mode Pump setting +SWITCH_MODE_PUMP_MASK: equ 80h ;Switch Mode Pump mask +SWITCH_MODE_PUMP_JUST: equ 80h ;Switch Mode Pump justified +LVD_TBEN: equ 0 ; Low Voltage Throttle-back enable value +LVD_TBEN_MASK: equ 8 ; Low Voltage Throttle-back enable mask +LVD_TBEN_JUST: equ 0 ; Low Voltage Throttle-back enable justified +TRIP_VOLTAGE: equ 6h ;Trip Voltage value +TRIP_VOLTAGE_MASK: equ 7h ;Trip Voltage mask +TRIP_VOLTAGE_JUST: equ 6h ;Trip Voltage justified + +POWER_SETTING: equ 10h +POWER_SET_5V0: equ 10h ; MASK for 5.0V operation, fast and slow +POWER_SET_5V0_24MHZ: equ 10h ; Power Setting value for 5.0V fast +POWER_SET_5V0_6MHZ: equ 11h ; Power Setting value for 5.0V slow +POWER_SET_3V3: equ 08h ; MASK for 3.3V operation, fast and slow +POWER_SET_3V3_24MHZ: equ 08h ; Power Setting value for 3.3V fast +POWER_SET_3V3_6MHZ: equ 09h ; Power Setting value for 3.3V slow +POWER_SET_2V7: equ 06h ; MASK for 2.7V operation, fast and slow +POWER_SET_2V7_12MHZ: equ 04h ; MASK for 2.7V, 12MHZ operation +POWER_SET_2V7_6MHZ: equ 02h ; MASK for 2.7V, 6MHZ operation +POWER_SET_SLOW_IMO: equ 01h ; MASK for slow Internal Main Oscillator (IMO) + +COMM_RX_PRESENT: equ 0 ;1 = TRUE +WATCHDOG_ENABLE: equ 0 ;Watchdog Enable 1 = Enable + +CLOCK_DIV_VC1: equ 0h ;VC1 clock divider +CLOCK_DIV_VC1_MASK: equ f0h ;VC1 clock divider mask +CLOCK_DIV_VC1_JUST: equ 0h ;VC1 clock divider justified +CLOCK_DIV_VC2: equ bh ;VC2 clock divider +CLOCK_DIV_VC2_MASK: equ fh ;VC2 clock divider mask +CLOCK_DIV_VC2_JUST: equ bh ;VC2 clock divider justified +CLOCK_INPUT_VC3: equ 0h ;VC3 clock source +CLOCK_INPUT_VC3_MASK: equ 3h ;VC3 clock source mask +CLOCK_INPUT_VC3_JUST: equ 0h ;VC3 clock source justified +CLOCK_DIV_VC3: equ 2fh ;VC3 clock divider +CLOCK_DIV_VC3_MASK: equ ffh ;VC3 clock divider mask +CLOCK_DIV_VC3_JUST: equ 2fh ;VC3 clock divider justified +ANALOG_BUFFER_PWR: equ 1h ;Analog buffer power level +ANALOG_BUFFER_PWR_MASK: equ 1h ;Analog buffer power level mask +ANALOG_BUFFER_PWR_JUST: equ 1h ;Analog buffer power level justified +ANALOG_POWER: equ 7h ;Analog power control +ANALOG_POWER_MASK: equ 7h ;Analog power control mask +ANALOG_POWER_JUST: equ 7h ;Analog power control justified +OP_AMP_BIAS: equ 0h ;Op amp bias level +OP_AMP_BIAS_MASK: equ 40h ;Op amp bias level mask +OP_AMP_BIAS_JUST: equ 0h ;Op amp bias level justified +REF_MUX: equ 7h ;Ref mux setting +REF_MUX_MASK: equ 38h ;Ref mux setting mask +REF_MUX_JUST: equ 38h ;Ref mux setting justified +AGND_BYPASS: equ 0h ;AGndBypass setting +AGND_BYPASS_MASK: equ 40h ;AGndBypass setting mask +AGND_BYPASS_JUST: equ 0h ;AGndBypass setting justified +SYSCLK_SOURCE: equ (0h | 0h) ;SysClk Source setting +SYSCLK_SOURCE_MASK: equ (4h | 2h) ;SysClk Source setting mask +SYSCLK_SOURCE_JUST: equ (0h | 0h) ;SysClk Source setting justified +SYSCLK_2_DISABLE: equ 0h ;SysClk*2 Disable setting +SYSCLK_2_DISABLE_MASK: equ 1h ;SysClk*2 Disable setting mask +SYSCLK_2_DISABLE_JUST: equ 0h ;SysClk*2 Disable setting justified +; +; register initial values +; +ANALOG_IO_CONTROL: equ 29h ;Analog IO Control register (ABF_CR) +PORT_0_GLOBAL_SELECT: equ 0h ;Port 0 global select register (PRT0GS) +PORT_0_DRIVE_0: equ 4h ;Port 0 drive mode 0 register (PRT0DM0) +PORT_0_DRIVE_1: equ fbh ;Port 0 drive mode 1 register (PRT0DM1) +PORT_0_DRIVE_2: equ fbh ;Port 0 drive mode 2 register (PRT0DM2) +PORT_0_INTENABLE: equ 0h ;Port 0 interrupt enable register (PRT0IE) +PORT_0_INTCTRL_0: equ 0h ;Port 0 interrupt control 0 register (PRT0IC0) +PORT_0_INTCTRL_1: equ 0h ;Port 0 interrupt control 1 register (PRT0IC1) +PORT_1_GLOBAL_SELECT: equ 70h ;Port 1 global select register (PRT1GS) +PORT_1_DRIVE_0: equ 70h ;Port 1 drive mode 0 register (PRT1DM0) +PORT_1_DRIVE_1: equ 8fh ;Port 1 drive mode 1 register (PRT1DM1) +PORT_1_DRIVE_2: equ 8fh ;Port 1 drive mode 2 register (PRT1DM2) +PORT_1_INTENABLE: equ 0h ;Port 1 interrupt enable register (PRT1IE) +PORT_1_INTCTRL_0: equ 0h ;Port 1 interrupt control 0 register (PRT1IC0) +PORT_1_INTCTRL_1: equ 0h ;Port 1 interrupt control 1 register (PRT1IC1) +PORT_2_GLOBAL_SELECT: equ 0h ;Port 2 global select register (PRT2GS) +PORT_2_DRIVE_0: equ ffh ;Port 2 drive mode 0 register (PRT2DM0) +PORT_2_DRIVE_1: equ 0h ;Port 2 drive mode 1 register (PRT2DM1) +PORT_2_DRIVE_2: equ 0h ;Port 2 drive mode 2 register (PRT2DM2) +PORT_2_INTENABLE: equ 0h ;Port 2 interrupt enable register (PRT2IE) +PORT_2_INTCTRL_0: equ 0h ;Port 2 interrupt control 0 register (PRT2IC0) +PORT_2_INTCTRL_1: equ 0h ;Port 2 interrupt control 1 register (PRT2IC1) + +; end of file GlobalParams.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm new file mode 100644 index 0000000..42142a2 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm @@ -0,0 +1,184 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.asm +;; Version: 2.2, Updated on 2012/9/21 at 11:59:7 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: +;; Assembler source code for a two-OpAmp Instrumentation Amplifier +;; topology in the 25/26xxx family of PSoC devices +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "INSAMP.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export INSAMP_Start +export _INSAMP_Start +export INSAMP_SetPower +export _INSAMP_SetPower + +export INSAMP_SetGain +export _INSAMP_SetGain + +export INSAMP_Stop +export _INSAMP_Stop + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +POWERMASK: equ 0x03 ; Power field mask for CR2 +GAINMASK: equ F0h ; Gain field mask for CR0 + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Start +; FUNCTION NAME: INSAMP_Setpower +; +; DESCRIPTION: +; Sets power to the analog blocks used in this module. All three blocks +; are set to the same power setting (which should be the same as the +; analog reference power global parameter for best operation!). Constants +; for proper values are defined in asm and C interface files. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPowerSetting in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Start: +_INSAMP_Start: + INSAMP_SetPower: +_INSAMP_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + + and A, POWERMASK ; mask A to protect unchanged bits + mov X, SP ; define temp store location + + push A ; put power value in temp store + mov A, reg[INSAMP_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_INV_CR2], A + + mov A, reg[INSAMP_NON_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_NON_INV_CR2], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_SetGain +; +; DESCRIPTION: +; Applies gain set values to the module's PSoC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bGain in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; The A register contains the gain setting per values in .inc file. +; Values in range of 00h to 07h, upper 4 bits only. +; Gain value applied to NON_INV block. +; Difference (E0h-gain value) applied to _INV block. +; + INSAMP_SetGain: +_INSAMP_SetGain: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, GAINMASK ; mask A to protect unchanged bits + mov X, SP ; set base address for local variable + + push A + mov A, reg[INSAMP_NON_INV_CR0] ; read gain value + and A, ~GAINMASK ; clear gain bits in A + or A, [X] ; combine gain value with balance of reg. + mov reg[INSAMP_NON_INV_CR0], A + + mov A, E0h ; load gain complement value + sub a, [X] ; calculate gain value for -INV block + push A + mov A, reg[INSAMP_INV_CR0] ; read gain complement value + and A, ~GAINMASK ; clear gain bits in A + or A, [X+1] ; combine gain value with balance of reg. + mov reg[INSAMP_INV_CR0], A + pop A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Stop +; +; DESCRIPTION: Turns off power to the two CT blocks +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Stop: +_INSAMP_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[INSAMP_NON_INV_CR2], ~POWERMASK + and reg[INSAMP_INV_CR2], ~POWERMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +; End of File INSAMP.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h new file mode 100644 index 0000000..7b73207 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h @@ -0,0 +1,72 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: INSAMP.h +// Version: 2.2, Updated on 2012/9/21 at 11:59:7 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: C declarations for a two-OpAmp Instrumentation Amplifier +// topology in the 22/24/27/28xxx family of PSoC devices +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef INSAMP_INCLUDE +#define INSAMP_INCLUDE + +#include + +#pragma fastcall16 INSAMP_Start +#pragma fastcall16 INSAMP_SetPower +#pragma fastcall16 INSAMP_SetGain +#pragma fastcall16 INSAMP_Stop + +//------------------------------------------------- +// Prototypes of the INSAMP API. +//------------------------------------------------- +extern void INSAMP_Start(BYTE bPower); +extern void INSAMP_SetPower(BYTE bPower); +extern void INSAMP_SetGain(BYTE bGain); +extern void INSAMP_Stop(void); + +//------------------------------------------------- +// Defines for INSAMP API's. +//------------------------------------------------- +#define INSAMP_OFF 0 +#define INSAMP_LOWPOWER 1 +#define INSAMP_MEDPOWER 2 +#define INSAMP_HIGHPOWER 3 + +#define INSAMP_G16_0 0x00 +#define INSAMP_G8_00 0x10 +#define INSAMP_G5_33 0x20 +#define INSAMP_G4_00 0x30 +#define INSAMP_G3_20 0x40 +#define INSAMP_G2_67 0x50 +#define INSAMP_G2_27 0x60 +#define INSAMP_G2_00 0x70 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- + +#pragma ioport INSAMP_INV_CR0: 0x071 +BYTE INSAMP_INV_CR0; +#pragma ioport INSAMP_INV_CR1: 0x072 +BYTE INSAMP_INV_CR1; +#pragma ioport INSAMP_INV_CR2: 0x073 +BYTE INSAMP_INV_CR2; +#pragma ioport INSAMP_INV_CR3: 0x070 +BYTE INSAMP_INV_CR3; + +#pragma ioport INSAMP_NON_INV_CR0: 0x075 +BYTE INSAMP_NON_INV_CR0; +#pragma ioport INSAMP_NON_INV_CR1: 0x076 +BYTE INSAMP_NON_INV_CR1; +#pragma ioport INSAMP_NON_INV_CR2: 0x077 +BYTE INSAMP_NON_INV_CR2; +#pragma ioport INSAMP_NON_INV_CR3: 0x074 +BYTE INSAMP_NON_INV_CR3; + +#endif +// end of file INSAMP.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc new file mode 100644 index 0000000..70404e1 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc @@ -0,0 +1,50 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.inc +;; Version: 2.2, Updated on 2012/9/21 at 11:59:7 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: +;; Assembler declarations for a two-OpAmp Instrumentation Amplifier +;; topology in the 22/24/27/28xxx family of PSoC devices +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for INSAMP API's. +;-------------------------------------------------- + +INSAMP_OFF: equ 0 +INSAMP_LOWPOWER: equ 1 +INSAMP_MEDPOWER: equ 2 +INSAMP_HIGHPOWER: equ 3 + +INSAMP_G16_0: equ 00h +INSAMP_G8_00: equ 10h +INSAMP_G5_33: equ 20h +INSAMP_G4_00: equ 30h +INSAMP_G3_20: equ 40h +INSAMP_G2_67: equ 50h +INSAMP_G2_27: equ 60h +INSAMP_G2_00: equ 70h + +;-------------------------------------------------- +; Register Address Constants for INSAMP +;-------------------------------------------------- + +INSAMP_INV_CR0: equ 0x71 ; CT Block Control Register 0 +INSAMP_INV_CR1: equ 0x72 ; CT Block Control Register 1 +INSAMP_INV_CR2: equ 0x73 ; CT Block Control Register 2 +INSAMP_INV_CR3: equ 0x70 ; CT Block Control Register 3 + +INSAMP_NON_INV_CR0: equ 0x75 ; CT Block Control Register 0 +INSAMP_NON_INV_CR1: equ 0x76 ; CT Block Control Register 1 +INSAMP_NON_INV_CR2: equ 0x77 ; CT Block Control Register 2 +INSAMP_NON_INV_CR3: equ 0x74 ; CT Block Control Register 3 + + +; end of file INSAMP.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm new file mode 100644 index 0000000..fc32900 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm @@ -0,0 +1,1354 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.asm +;; Version: 1.60, Updated on 2012/9/21 at 11:59:10 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: LCD User Module software implementation file. +;; +;; This set of functions is written for the common 2 and 4 line +;; LCDs that use the Hitachi HD44780A controller. +;; +;; LCD connections to PSoC port +;; +;; PX.0 ==> LCD D4 +;; PX.1 ==> LCD D5 +;; PX.2 ==> LCD D6 +;; PX.3 ==> LCD D7 +;; PX.4 ==> LCD E +;; PX.5 ==> LCD RS +;; PX.6 ==> LCD R/W +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to preserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "LCD.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export LCD_Start +export _LCD_Start +export LCD_Init +export _LCD_Init + +export LCD_WriteData +export _LCD_WriteData + +export LCD_Control +export _LCD_Control + +export LCD_PrString +export _LCD_PrString + +export LCD_PrCString +export _LCD_PrCString + +export LCD_Position +export _LCD_Position + +export LCD_PrHexByte +export _LCD_PrHexByte + +export LCD_PrHexInt +export _LCD_PrHexInt + +export LCD_Delay50uTimes +export _LCD_Delay50uTimes + +export LCD_Delay50u +export _LCD_Delay50u + +;----------------------------------------------- +; If bargraph functions not required, don't +; export the function names. +;----------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) +export LCD_InitBG +export _LCD_InitBG + +export LCD_InitVBG +export _LCD_InitVBG + +; NOTE: The two functions, +; +; LCD_DrawVBG and +; LCD_DrawBG +; +; are implemented using both fastcall16 and legacy fastcall16 because they +; fall into a special and rare case where the calling sequences specified +; by the two disciplines are incompatible. The fastcall16 versions are +; provided for both C and Assembly users in all memory models. The legacy +; fastcall16 versions are provided only to support existing small memory +; model assembly language code---they do not work in the large memory +; model. +; +; ** The legacy fastcall16 versions are provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Their use is +; ** deprecated and their status is "No Further Maintenance". +; +; The fastcall16 versions of these functions are distinguished by a +; leading underscore in the name. The legacy fastcall16 names (which appear +; in this comment) do not have the leading underscore. Details on the +; calling sequence to be used for fastcall16 are given in the user module +; datasheet. +; +; Fastcall16 versions: +export _LCD_DrawVBG +export _LCD_DrawBG + +IF SYSTEM_SMALL_MEMORY_MODEL +; Legacy Fastcall versions: +export LCD_DrawVBG +export LCD_DrawBG +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +ENDIF ; BARGRAPH_ENABLE + +; +; The following functions are deprecated and will be eliminated in a future +; version of PSoC Designer. +; +export LCD_Write_Data +export _LCD_Write_Data + + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_E: equ 10h +LCD_RW: equ 40h +LCD_RS: equ 20h + +LCD_DATA_MASK: equ 0Fh +LCD_READY_BIT: equ 08h + +LCD_DATA_READ: equ ( LCD_E | LCD_RW | LCD_RS ) +LCD_CNTL_READ: equ ( LCD_E | LCD_RW ) +LCD_PORT_WRITE: equ 7Fh +LCD_PORT_MASK: equ 7Fh + +LCD_DISP_INC: equ 03h +LCD_DISP_OFF: equ 08h +LCD_DISP_ON: equ 0Ch +LCD_4BIT_2LINE: equ 2Ch + + +;----------------------------------------------- +; Bargraph definitions +;----------------------------------------------- + +LCD_BG_CHAR_WIDTH: equ 16 ; 16 characters in width +LCD_BG_SEG_WIDTH: equ 80 ; 16 * 5 = 80 +LCD_BG_COL_START: equ 0 ; Always start in the left most column + + ; Offsets for 2x16, 2x20, 4x20 + ; Change these values for a custom LCD + +LCD_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 +LCD_ROW3_OFFSET: equ 94h ; Address/command offset for row 1 +LCD_ROW4_OFFSET: equ D4h ; Address/command offset for row 2 + +LCD_BG_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_BG_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + +LCD_CG_RAM_OFFSET: equ 40h ; Offset to character RAM + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrCString +; +; DESCRIPTION: +; Print constant (ROM) string to LCD +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Pointer to String +; A contains MSB of string address +; X contains LSB of string address +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrCString: +_LCD_PrCString: + RAM_PROLOGUE RAM_USE_CLASS_1 + .Loop_PrCString: + push A ; Store ROM pointer + push X + romx ; Get character from ROM + jnz .LCD_PrCString_WR ; print character and advance pointer + pop X ; Restore the stack + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret ; Return + +.LCD_PrCString_WR: + call LCD_WriteData ; Write data to LCD + pop X ; Get ROM pointer + pop A + inc X ; Inc LSB of pointer + jnc .Loop_PrCString + inc A ; Inc MSB of pointer if LSB overflow + jmp .Loop_PrCString + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexByte +; +; DESCRIPTION: +; Print a byte in Hex (two characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => (BYTE) Data/char to be printed +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +.LITERAL +LCD_HEX_STR:: + DS "0123456789ABCDEF" +.ENDLITERAL +.SECTION + + LCD_PrHexByte: +_LCD_PrHexByte: + RAM_PROLOGUE RAM_USE_CLASS_1 + push A ; Save lower nibble + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + pop A ; Restore value + and A,0Fh ; Mask off lower nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexInt +; +; DESCRIPTION: +; Print an Int in Hex (four characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Integer value +; A contains LSB of Int +; X contains MSB of Int +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrHexInt: +_LCD_PrHexInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + swap A,X + call LCD_PrHexByte ; Print MSB + mov A,X ; Move LSB into position + call LCD_PrHexByte ; Print LSB + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrString +; +; DESCRIPTION: +; Print (RAM) ASCII string to LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X contains pointer to string +; X contains LSB of string pointer +; A contains MSB or page of string pointer (not used at this time) +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; IDX_PP +; +; + LCD_PrString: +_LCD_PrString: + RAM_PROLOGUE RAM_USE_CLASS_3 + RAM_SETPAGE_IDX A + .Loop_PrString: + mov A,[X] ; Get value pointed to by X + jz .End_LCD_PrString ; Check for end of string + ;LCD_writeData is known not to modify X so no need to preserve + call LCD_WriteData ; Write data to screen + inc X ; Advance pointer to next character + jmp .Loop_PrString ; Go get next character +.End_LCD_PrString: + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WriteData +; +; DESCRIPTION: +; Write a byte to the LCD's data register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains byte to be written to LCD data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WriteData: +_LCD_WriteData: + LCD_Write_Data: ; Do not use +_LCD_Write_Data: ; Do not use + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of character + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off high nibble + call LCD_WDATA_Nibble ; Write Upper nibble + pop A ; Retrieve copy of character + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WDATA_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Control +; +; DESCRIPTION: +; Write a byte to the LCD's control register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains data to be written to LCD control register. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_Control: +_LCD_Control: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of byte + asr A ; Shift Upper Nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off, just in case + call LCD_WCNTL_Nibble ; Write high nibble + pop A ; Restore copy of byte + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WCNTL_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WCNTL_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's command register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to command register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WCNTL_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Reset control lines + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in MSN + or A,LCD_E ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; OR in bit 7 just + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + nop + and A,(~LCD_PORT_MASK|LCD_DATA_MASK) ; Disable E signal and leave data on bus. + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WDATA_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's DATA register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +LCD_WDATA_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + or [Port_2_Data_SHADE],LCD_RS ; Raise RS to signify a Data Write + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in A[7:4] + or A,(LCD_E | LCD_RS) ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; Keep shadow in sync + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow in sync + NOP + and A,(~LCD_PORT_MASK|LCD_DATA_MASK|LCD_RS) ; Disable E signal and leave Data on bus + mov [Port_2_Data_SHADE],A ; keep shadow in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Check_Ready +; +; DESCRIPTION: +; Wait until LCD has completed last command. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD is not present, this routine may never return. +; +LCD_Check_Ready: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A ; Save Accumulator + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK ; Mask of all LCD bits + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Zero LCD port bits + + and [Port_2_DriveMode_0_SHADE],~LCD_DATA_MASK ; Clear out LCD mode bits. + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 ; Change port mode to read status + mov reg[LCD_PortMode0],A ; Setup LCD Port for reading + M8C_SetBank0 + + or [Port_2_Data_SHADE],LCD_RW ; Raise RW to signify Read operation + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + NOP + + push X ; Save 'X' register + mov X,255 ; 255 Attempts + +.LCD_RDY_LOOP: + or [Port_2_Data_SHADE], LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Wait 2 nops to make sure data is ready + nop + mov A,reg[LCD_Port] + +; The code below is used to work around the async read issue with the ICE with the +; 25/26xxx family of devices. It will help to eliminate "Invalid memory reference" +; errors. It is not required when running without the ICE or when using any other +; family besides the 25/26xxx family. If not using the ICE or with any other family +; the ICE_PORT_SYNC flag should be set to 0. +IF(ICE_PORT_SYNC) + mov reg[ 0xfa], A + mov A, reg[0xfa] +ENDIF + + push A + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Add delay for the slowest part and the + nop ; fastest PSoC + nop + ; Get the LSBs + or [Port_2_Data_SHADE],LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop + nop + + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_READY_BIT ; Check busy + + jz .UNLOCK + dec X + jnz .LCD_RDY_LOOP ; If LCD still busy, read again for 255 times +.UNLOCK: + pop X ; Restore 'X' register + + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Revert Data bit to Write mode + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_4 ; Restore Accumulator + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Start +; FUNCTION NAME: LCD_Init +; +; DESCRIPTION: +; Initialize LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; THEORY of OPERATION or PROCEDURE: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; This initialization is a bit long, but it should work for +; most 2 and 4 line LCDs. +; + LCD_Start: +_LCD_Start: + LCD_Init: +_LCD_Init: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + + and [Port_2_DriveMode_0_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Set LCD port for writing + and [Port_2_DriveMode_1_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + mov A,[Port_2_DriveMode_1_SHADE] + mov reg[LCD_PortMode1],A + M8C_SetBank0 + + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,82 ; Delay for 4.1 mSec (82 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + call LCD_Delay50u + call LCD_Delay50u + call LCD_Delay50u + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,02h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,08h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,01h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,06h + call LCD_Control + + mov A,0Eh + call LCD_Control + + mov A,LCD_4BIT_2LINE ; Setup for 4 bit interface, 2 line + call LCD_Control + + mov A,LCD_DISP_OFF + call LCD_Control + + mov A,LCD_DISP_ON + call LCD_Control + + mov A,LCD_DISP_INC + call LCD_Control + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Position +; +; DESCRIPTION: +; Position Cursor at Row and Col location +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Row 0 to 3 +; X => Col 0 to 39+ +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +.LITERAL +LCD_ROW_OFFSET:: + DB LCD_ROW1_OFFSET, LCD_ROW2_OFFSET, LCD_ROW3_OFFSET, LCD_ROW4_OFFSET +.ENDLITERAL + +.SECTION + LCD_Position: +_LCD_Position: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,03h ; Mask off 2 bits for row address 0 to 3 + push X ; Store COL + index LCD_ROW_OFFSET ; Get ROW memory offset from table + mov X,SP ; Get Stack pointer + add A,[X+(-1)] ; Add the COL to the display pointer + pop X + + call LCD_Control ; Write control byte + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50uTimes +; +; DESCRIPTION: +; Delay increments of 50uSeconds +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the delay multiplier +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; + LCD_Delay50uTimes: +_LCD_Delay50uTimes: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Delay50u + dec A + jnz LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50u +; +; DESCRIPTION: +; Delay 50uSec for any clock frequency from 1.5MHz to 24MHz +; Slower clock frequencies the delay will be; +; 1.5 +; -------------- * 50uSec +; clock_freq(MHz) +; +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; +.LITERAL + LCD_Delay50u_Table:: + DB 08h, 19h, 3Ah, 7Ch, 01h, 01h, 01h, 01h +; 3MHz, 6MHz, 12MHz, 24MHz, 1.5MHz, 750kHz, 188kHz, 94kHz +.ENDLITERAL +.SECTION + + LCD_Delay50u: + _LCD_Delay50u: ; [11] Call + RAM_PROLOGUE RAM_USE_CLASS_1 + push A + M8C_SetBank1 ; [4] + mov A, reg[OSC_CR0] ; [6] Get delay value + M8C_SetBank0 ; [4] + and A,07h ; [4] Mask off only the clock bits + cmp A,05h + jnc .Delay50u_End + index LCD_Delay50u_Table ; [13] Get delay value +.Delay50u_Loop: ; + dec A ; [4] + jnz .Delay50u_Loop ; [5] +.Delay50u_End: + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +;----------------------------------------------------------------------------- +; If bargraph is not enabled, the following functions are not required. +;----------------------------------------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a horizontal bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 39+ +; [x-1] => Length of bargraph in chars 1 to 40+ +; [X-2] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_COLX: equ 0 ; Stack position of Column +BG_CHAR_LENX: equ -1 ; Stack position of Length +BG_LENGTHX: equ -2 ; Stack position of bargraph pointer position + + +LCD_DrawBG: + push X + mov X,[X+BG_COLX] ; Row in A, Col in X + call LCD_Position ; Set cursor position + pop X ; Restore pointer + +.LCD_BG_LOOP1X: + cmp [X+BG_LENGTHX],00h ; Check for past end of BG + jnz .LCD_CHECK1X + mov A,00h ; Load empty character + jmp .LCD_BG_DOITX ; + +.LCD_CHECK1X: + cmp [X+BG_LENGTHX],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2X ; Note yet, use full character + mov A,[X+BG_LENGTHX] + sub [X+BG_LENGTHX],A + jmp .LCD_BG_DOITX + +.LCD_CHECK2X: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTHX],05h ; Subtract another 5 positions + +.LCD_BG_DOITX: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LENX] ; Dec Char count + jnz .LCD_BG_LOOP1X ; Do it all over again + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; Draw a horizontal bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 39+ +; [SP-5] => Length of bargraph in chars 1 to 40+ +; [SP-6] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_ROW: equ -3 +BG_COL: equ -4 ; Stack position of Column +BG_CHAR_LEN: equ -5 ; Stack position of Length +BG_LENGTH: equ -6 ; Stack position of bargraph pointer position + + +_LCD_DrawBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + push X + mov A,[X+BG_ROW] ; Row in A + mov X,[X+BG_COL] ; Col in X + RAM_EPILOGUE RAM_USE_CLASS_2 + call LCD_Position ; Set cursor position + RAM_PROLOGUE RAM_USE_CLASS_2 + pop X + +.LCD_BG_LOOP1: + cmp [X+BG_LENGTH],00h ; Check for past end of BG + jnz .LCD_CHECK1 + mov A,00h ; Load empty character + jmp .LCD_BG_DOIT ; + +.LCD_CHECK1: + cmp [X+BG_LENGTH],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2 ; Note yet, use full character + mov A,[X+BG_LENGTH] + sub [X+BG_LENGTH],A + jmp .LCD_BG_DOIT + +.LCD_CHECK2: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTH],05h ; Subtract another 5 positions + +.LCD_BG_DOIT: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LEN] ; Dec Char count + jnz .LCD_BG_LOOP1 ; Do it all over again + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a vertical bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 40+ +; [x-1] => Height of bargraph in chars 1 - 4 +; [X-2] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_COLX: equ 0 +VBG_CHAR_HEIGHTX: equ -1 +VBG_SEG_HEIGHTX: equ -2 + +LCD_DrawVBG: + + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOPX: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COLX] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHTX],00h ; Check for zero segs + jnz .VBG_NZ_SEGX + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHARX +.VBG_NZ_SEGX: + cmp [X+VBG_SEG_HEIGHTX],09h ; Check for full segment + jnc .VBG_FULL_SEGX + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHTX] + dec A + mov [X+VBG_SEG_HEIGHTX],00h ; Zero segment height + jmp .VBG_WRITE_CHARX + +.VBG_FULL_SEGX: ; Bargaph + sub [X+VBG_SEG_HEIGHTX],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHARX: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHTX] + jnz .VBG_LOOPX + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; Draw a vertical bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 40+ +; [SP-5] => Height of bargraph in chars 1 - 4 +; [SP-6] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_ROW: equ -3 +VBG_COL: equ -4 +VBG_CHAR_HEIGHT: equ -5 +VBG_SEG_HEIGHT: equ -6 + +_LCD_DrawVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + mov A, [X+VBG_ROW] + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOP: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COL] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHT],00h ; Check for zero segs + jnz .VBG_NZ_SEG + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHAR +.VBG_NZ_SEG: + cmp [X+VBG_SEG_HEIGHT],09h ; Check for full segment + jnc .VBG_FULL_SEG + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHT] + dec A + mov [X+VBG_SEG_HEIGHT],00h ; Zero segment height + jmp .VBG_WRITE_CHAR + +.VBG_FULL_SEG: ; Bargaph + sub [X+VBG_SEG_HEIGHT],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHAR: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHT] + jnz .VBG_LOOP + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitVBG +; +; DESCRIPTION: +; Initialize the vertical bargraph characters. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Stack offset constants +VBGDATA_CTR: equ 00h ; Char data count stack offset +VBG_BYTES: equ 01h ; Byte counter stack offset + + LCD_InitVBG: +_LCD_InitVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + push A ; Create 2 locations + push A + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+VBGDATA_CTR],01h ; Reset data counter + + .VBG_Loop1: ; loop once for each 8 characters + mov [X+VBG_BYTES],08h ; Load cycle pointer + .VBG_Loop2: ; Loop once for each line in character (8 times) + mov A,[X+VBGDATA_CTR] + cmp A,[X+VBG_BYTES] + jnc .VBG_SOLID + mov A,00h ; Empty line + jmp .VBG_Load ; Jump to load the bargraph +.VBG_SOLID: + mov A,FFh ; Load solid line +.VBG_Load: + call LCD_WriteData ; character data + dec [X+VBG_BYTES] ; Dec byte counter + jnz .VBG_Loop2 ; End Loop 2 + inc [X+VBGDATA_CTR] + cmp [X+VBGDATA_CTR],09h + jnz .VBG_Loop1 ; End Loop1 + + pop A + pop A + mov A,LCD_DISP_ON ; Turn on display, don't really + call LCD_Control ; need this. + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitBG +; +; DESCRIPTION: +; Initialize horizontal bargraph characters +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A = type 0 = full |||||||||........ +; 1 = single vertical line ..........|...... +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; THEORY of OPERATION or PROCEDURE: +; This function writes to the LCD character RAM to generate 8 custom +; characters used to generated one of two horizontal bargraphs. +; +.LITERAL + LCD_BG_TYPE1:: ; ....., |...., ||..., |||.., ||||., |||||, ||||| + DB 00h, 10h, 18h, 1Ch, 1Eh, 1Fh, 1Fh + LCD_BG_TYPE2:: ; ....., |...., .|..., ..|.., ...|., ....|, ..... + DB 00h, 10h, 08h, 04h, 02h, 01h, 00h +.ENDLITERAL + +.SECTION +; Stack offset constants +BGDATA_PTR: equ 00h ; Stack offsets +BGCHARS: equ 01h +BGTYPE: equ 02h + + LCD_InitBG: +_LCD_InitBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + add SP,3 + mov [X+BGTYPE],A ; Store the bargraph type + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+BGDATA_PTR],00h ; Reset pointer to BG data + + .BG_Loop1: + mov [X+BGCHARS],08h ; Load cycle pointer + .BG_Loop2: + mov A,[X+BGDATA_PTR] + cmp [X+BGTYPE],00h ; Check which bargraph + jnz .BG_OTHER + index LCD_BG_TYPE1 + jmp .BG_Load + .BG_OTHER: + index LCD_BG_TYPE2 + .BG_Load: + call LCD_WriteData + dec [X+BGCHARS] ; Character builder counter + jnz .BG_Loop2 + inc [X+BGDATA_PTR] ; Advance to next character + cmp [X+BGDATA_PTR],07h + jnz .BG_Loop1 + + add SP,-3 + mov A,LCD_DISP_ON + call LCD_Control + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +ENDIF + +; End of File LCD.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h new file mode 100644 index 0000000..23e5a48 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h @@ -0,0 +1,102 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: LCD.h +// Version: 1.60, Updated on 2012/9/21 at 11:59:10 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: LCD User Module C Language interface file. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef LCD_INCLUDE +#define LCD_INCLUDE + +#include + +#define LCD_BARGRAPH_ENABLE 1 + +/* Create pragmas to support proper argument and return value passing */ +#pragma fastcall16 LCD_Start +#pragma fastcall16 LCD_Init +#pragma fastcall16 LCD_Control +#pragma fastcall16 LCD_WriteData +#pragma fastcall16 LCD_PrString +#pragma fastcall16 LCD_PrCString +#pragma fastcall16 LCD_PrHexByte +#pragma fastcall16 LCD_PrHexInt +#pragma fastcall16 LCD_Position +#pragma fastcall16 LCD_Delay50uTimes +#pragma fastcall16 LCD_Delay50u + +#if ( LCD_BARGRAPH_ENABLE ) +#pragma fastcall16 LCD_InitBG +#pragma fastcall16 LCD_DrawBG +#pragma fastcall16 LCD_InitVBG +#pragma fastcall16 LCD_DrawVBG +#endif + +//------------------------------------------------- +// Prototypes of the LCD API. +//------------------------------------------------- + +extern void LCD_Start(void); +extern void LCD_Init(void); +extern void LCD_Control(BYTE bData); +extern void LCD_WriteData(BYTE bData); +extern void LCD_PrString(char * sRamString); +extern void LCD_PrCString(const char * sRomString); +extern void LCD_Position(BYTE bRow, BYTE bCol); +extern void LCD_PrHexByte(BYTE bValue); +extern void LCD_PrHexInt(INT iValue); + +extern void LCD_Delay50uTimes(BYTE bTimes); +extern void LCD_Delay50u(void); + +// Do not use, will be removed in future version. +extern void LCD_Write_Data(BYTE bData); +#pragma fastcall16 LCD_Write_Data +// + + +#if ( LCD_BARGRAPH_ENABLE ) +extern void LCD_InitBG(BYTE bBGType); +extern void LCD_InitVBG(void); +extern void LCD_DrawVBG(BYTE bRow, BYTE bCol, BYTE bHeight, BYTE bPixelRowEnd); +extern void LCD_DrawBG(BYTE bRow, BYTE bCol, BYTE bLen, BYTE bPixelColEnd); + + +#define LCD_SOLID_BG 0x00 +#define LCD_LINE_BG 0x01 + + +#endif + +//------------------------------------------------- +// Defines for LCD API's. +//------------------------------------------------- +#define LCD_DISP_ON 0x0C +#define LCD_DISP_OFF 0x08 +#define LCD_DISP_BLANK 0x0A +#define LCD_DISP_CLEAR_HOME 0x01 +#define LCD_CURSOR_ON 0x0E +#define LCD_CURSOR_OFF 0x0C +#define LCD_CURSOR_WINK 0x0D +#define LCD_CURSOR_BLINK 0x0F +#define LCD_CURSOR_SH_LEFT 0x10 +#define LCD_CURSOR_SH_RIGHT 0x14 +#define LCD_CURSOR_HOME 0x02 +#define LCD_CURSOR_LEFT 0x04 +#define LCD_CURSOR_RIGHT 0x06 + +#define LCD_PORT_MASK 0x7F +//------------------------------------------------------ +// Register Address Constants for LCD +//------------------------------------------------------ + +#define LCD_Port PRT2DR +#define LCD_PortMode0 PRT2DM0 +#define LCD_PortMode1 PRT2DM1 + +#endif +// end of file LCD.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc new file mode 100644 index 0000000..8515a23 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc @@ -0,0 +1,71 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.inc +;; Version: 1.60, Updated on 2012/9/21 at 11:59:10 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the LCD user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +; LCD connections to PSoC port +; +; PX.0 ==> LCD D4 +; PX.1 ==> LCD D5 +; PX.2 ==> LCD D6 +; PX.3 ==> LCD D7 +; PX.4 ==> LCD E +; PX.5 ==> LCD RS +; PX.6 ==> LCD R/W + + +include "m8c.inc" + +;------------------------------------------------------ +; Register Address Constants for LCD +;------------------------------------------------------ + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_BARGRAPH_ENABLE: equ 1 + + +;----------------------------------------------- +; Constants for LCD +;----------------------------------------------- +; LCD commands + +LCD_DISP_ON: equ 0Ch +LCD_DISP_OFF: equ 08h +LCD_CURSOR_ON: equ 0Eh +LCD_CURSOR_OFF: equ 0Ch +LCD_CURSOR_BLINK: equ 0Fh +LCD_CURSOR_WINK: equ 0Dh +LCD_CURSOR_SH_LEFT: equ 10h +LCD_CURSOR_SH_RIGHT: equ 14h +LCD_CURSOR_HOME: equ 02h +LCD_CURSOR_LEFT: equ 04h +LCD_CURSOR_RIGHT: equ 06h +LCD_DISP_CLEAR_HOME: equ 01h + +LCD_SOLID_BG: equ 00h +LCD_LINE_BG: equ 01h + +LCD_PORT_MASK: equ 7Fh + +ICE_PORT_SYNC: equ 0 ; This flag must be set to one to work around + ; the async read issue with the ICE with the + ; 25/26xxx family of devices. It will help + ; to eliminate "Invalid memory reference" errors. + ; It is not required when running without the ICE + ; or when using any other family besides the + ; 25/26xxx family. If not using the ICE, this flag + ; may be set to 0. + +; end of file LCD.inc + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h new file mode 100644 index 0000000..d33f926 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h @@ -0,0 +1,20 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.3.2710 +******************************************************************************/ +#ifndef __PSOCAPI_H +#define __PSOCAPI_H + +#include "PSoCGPIOINT.h" +#include "ADCINC.h" +#include "AMUX4_0.h" +#include "AMUX4_1.h" +#include "DAC6_VGND.h" +#include "DAC9_Ia.h" +#include "INSAMP.h" +#include "LCD.h" +#include "PWM8_Heater.h" +#include "PWM8_NB_Out.h" +#include "PWM8_Vout.h" +#include "SleepTimer.h" + +#endif diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc new file mode 100644 index 0000000..e66b43b --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc @@ -0,0 +1,14 @@ +; Generated by PSoC Designer 5.3.2710 +; +include "PSoCGPIOINT.inc" +include "ADCINC.inc" +include "AMUX4_0.inc" +include "AMUX4_1.inc" +include "DAC6_VGND.inc" +include "DAC9_Ia.inc" +include "INSAMP.inc" +include "LCD.inc" +include "PWM8_Heater.inc" +include "PWM8_NB_Out.inc" +include "PWM8_Vout.inc" +include "SleepTimer.inc" diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm new file mode 100644 index 0000000..36bc29a --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm @@ -0,0 +1,197 @@ +; Generated by PSoC Designer 5.3.2710 +; +;========================================================================== +; PSoCConfig.asm +; @PSOC_VERSION +; +; Version: 0.85 +; Revised: June 22, 2004 +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; This file is generated by the Device Editor on Application Generation. +; It contains code which loads the configuration data table generated in +; the file PSoCConfigTBL.asm +; +; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!! +; Edits to this file will not be preserved. +;========================================================================== +; +include "m8c.inc" +include "memory.inc" +include "GlobalParams.inc" + +export LoadConfigInit +export _LoadConfigInit +export LoadConfig_slc_free_28_pin_feb_16_2013 +export _LoadConfig_slc_free_28_pin_feb_16_2013 +export Port_2_Data_SHADE +export _Port_2_Data_SHADE +export Port_2_DriveMode_0_SHADE +export _Port_2_DriveMode_0_SHADE +export Port_2_DriveMode_1_SHADE +export _Port_2_DriveMode_1_SHADE + + +export NO_SHADOW +export _NO_SHADOW + +FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask +END_CONFIG_TABLE: equ ffh ;end of config table indicator + +AREA psoc_config(rom, rel) + +;--------------------------------------------------------------------------- +; LoadConfigInit - Establish the start-up configuration (except for a few +; parameters handled by boot code, like CPU speed). This +; function can be called from user code, but typically it +; is only called from boot. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfigInit: + LoadConfigInit: + RAM_PROLOGUE RAM_USE_CLASS_4 + + mov [Port_2_Data_SHADE], 0h + mov [Port_2_DriveMode_0_SHADE], ffh + mov [Port_2_DriveMode_1_SHADE], 0h + + lcall LoadConfig_slc_free_28_pin_feb_16_2013 + lcall LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret + +;--------------------------------------------------------------------------- +; Load Configuration slc_free_28_pin_feb_16_2013 +; +; Load configuration registers for slc_free_28_pin_feb_16_2013. +; IO Bank 0 registers a loaded first,then those in IO Bank 1. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be +; modified as may the Page Pointer registers! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfig_slc_free_28_pin_feb_16_2013: + LoadConfig_slc_free_28_pin_feb_16_2013: + RAM_PROLOGUE RAM_USE_CLASS_4 + + push x + M8C_SetBank0 ; Force bank 0 + mov a, 0 ; Specify bank 0 + asr a ; Store in carry flag + ; Load bank 0 table: + mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + mov X, LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + mov X, Bank 0; Carry=1 => Bank 1) +; +; RETURNS: nothing. +; +; STACK FRAME: X-4 I/O Bank 0/1 indicator +; X-3 Temporary store for register address +; X-2 LSB of config table address +; X-1 MSB of config table address +; +LoadConfig: + RAM_PROLOGUE RAM_USE_CLASS_2 + add SP, 2 ; Set up local vars + push X ; Save config table address on stack + push A + mov X, SP + mov [X-4], 0 ; Set default Destination to Bank 0 + jnc .BankSelectSaved ; Carry says Bank 0 is OK + mov [X-4], 1 ; No Carry: default to Bank 1 +.BankSelectSaved: + pop A + pop X + +LoadConfigLp: + M8C_SetBank0 ; Switch to bank 0 + M8C_ClearWDT ; Clear the watchdog for long inits + push X ; Preserve the config table address + push A + romx ; Load register address from table + cmp A, END_CONFIG_TABLE ; End of table? + jz EndLoadConfig ; Yes, go wrap it up + mov X, SP ; + tst [X-4], 1 ; Loading IO Bank 1? + jz .IOBankNowSet ; No, Bank 0 is fine + M8C_SetBank1 ; Yes, switch to Bank 1 +.IOBankNowSet: + mov [X-3], A ; Stash the register address + pop A ; Retrieve the table address + pop X + inc X ; Advance to the data byte + adc A, 0 + push X ; Save the config table address again + push A + romx ; load config data from the table + mov X, SP ; retrieve the register address + mov X, [X-3] + mov reg[X], A ; Configure the register + pop A ; retrieve the table address + pop X + inc X ; advance to next table entry + adc A, 0 + jmp LoadConfigLp ; loop to configure another register +EndLoadConfig: + add SP, -4 + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +AREA InterruptRAM(ram, rel) + +NO_SHADOW: +_NO_SHADOW: +; write only register shadows +_Port_2_Data_SHADE: +Port_2_Data_SHADE: BLK 1 +_Port_2_DriveMode_0_SHADE: +Port_2_DriveMode_0_SHADE: BLK 1 +_Port_2_DriveMode_1_SHADE: +Port_2_DriveMode_1_SHADE: BLK 1 + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm new file mode 100644 index 0000000..901262a --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm @@ -0,0 +1,180 @@ +; Generated by PSoC Designer 5.3.2710 +; +include "m8c.inc" +; Personalization tables +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered +AREA lit(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) + db 84h, 90h ;ADCINC_AtoDcr0(ASD11CR0) + db 85h, 00h ;ADCINC_AtoDcr1(ASD11CR1) + db 86h, 60h ;ADCINC_AtoDcr2(ASD11CR2) + db 87h, f8h ;ADCINC_AtoDcr3(ASD11CR3) +; Instance name ADCINC, Block Name PWM(DBB00) + db 23h, 00h ;ADCINC_PWMcr0(DBB00CR0) + db 21h, 00h ;ADCINC_PWMdr1(DBB00DR1) + db 22h, 01h ;ADCINC_PWMdr2(DBB00DR2) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) + db 80h, 80h ;DAC6_VGND_CR0(ASC10CR0) + db 81h, 40h ;DAC6_VGND_CR1(ASC10CR1) + db 82h, a0h ;DAC6_VGND_CR2(ASC10CR2) + db 83h, 30h ;DAC6_VGND_CR3(ASC10CR3) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) + db 90h, 80h ;DAC9_Ia_LSB_CR0(ASD20CR0) + db 91h, 80h ;DAC9_Ia_LSB_CR1(ASD20CR1) + db 92h, 20h ;DAC9_Ia_LSB_CR2(ASD20CR2) + db 93h, 30h ;DAC9_Ia_LSB_CR3(ASD20CR3) +; Instance name DAC9_Ia, Block Name MSB(ASC21) + db 94h, a0h ;DAC9_Ia_MSB_CR0(ASC21CR0) + db 95h, 41h ;DAC9_Ia_MSB_CR1(ASC21CR1) + db 96h, a0h ;DAC9_Ia_MSB_CR2(ASC21CR2) + db 97h, 34h ;DAC9_Ia_MSB_CR3(ASC21CR3) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) + db 71h, ddh ;INSAMP_INV_CR0(ACB00CR0) + db 72h, 21h ;INSAMP_INV_CR1(ACB00CR1) + db 73h, 20h ;INSAMP_INV_CR2(ACB00CR2) + db 70h, 00h ;INSAMP_INV_CR3(ACB00CR3) +; Instance name INSAMP, Block Name NON_INV(ACB01) + db 75h, 1ch ;INSAMP_NON_INV_CR0(ACB01CR0) + db 76h, 21h ;INSAMP_NON_INV_CR1(ACB01CR1) + db 77h, 20h ;INSAMP_NON_INV_CR2(ACB01CR2) + db 74h, 00h ;INSAMP_NON_INV_CR3(ACB01CR3) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 27h, 00h ;PWM8_Heater_CONTROL_REG(DBB01CR0) + db 25h, ffh ;PWM8_Heater_PERIOD_REG(DBB01DR1) + db 26h, 00h ;PWM8_Heater_COMPARE_REG(DBB01DR2) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2fh, 00h ;PWM8_NB_Out_CONTROL_REG(DCB03CR0) + db 2dh, ffh ;PWM8_NB_Out_PERIOD_REG(DCB03DR1) + db 2eh, 00h ;PWM8_NB_Out_COMPARE_REG(DCB03DR2) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 2bh, 00h ;PWM8_Vout_CONTROL_REG(DCB02CR0) + db 29h, ffh ;PWM8_Vout_PERIOD_REG(DCB02DR1) + db 2ah, 00h ;PWM8_Vout_COMPARE_REG(DCB02DR2) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 0 + db 60h, 09h ; AnalogColumnInputSelect register (AMX_IN) + db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1) + db 63h, 3fh ; AnalogReferenceControl register (ARF_CR) + db 65h, 00h ; AnalogSyncControl register (ASY_CR) + db e6h, 02h ; DecimatorControl_0 register (DEC_CR0) + db e7h, 02h ; DecimatorControl_1 register (DEC_CR1) + db d6h, 00h ; I2CConfig register (I2CCFG) + db b0h, 00h ; Row_0_InputMux register (RDI0RI) + db b1h, 00h ; Row_0_InputSync register (RDI0SYN) + db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS) + db b3h, 33h ; Row_0_LogicSelect_0 register (RDI0LT0) + db b4h, 33h ; Row_0_LogicSelect_1 register (RDI0LT1) + db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0) + db b6h, 08h ; Row_0_OutputDrive_1 register (RDI0SRO1) + db ffh +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) +; Instance name ADCINC, Block Name PWM(DBB00) + db 20h, 31h ;ADCINC_PWMfn(DBB00FN) + db 21h, 16h ;ADCINC_PWMsl(DBB00IN) + db 22h, 40h ;ADCINC_PWMos(DBB00OU) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) +; Instance name DAC9_Ia, Block Name MSB(ASC21) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) +; Instance name INSAMP, Block Name NON_INV(ACB01) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 24h, 31h ;PWM8_Heater_FUNC_REG(DBB01FN) + db 25h, 11h ;PWM8_Heater_INPUT_REG(DBB01IN) + db 26h, 44h ;PWM8_Heater_OUTPUT_REG(DBB01OU) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2ch, 31h ;PWM8_NB_Out_FUNC_REG(DCB03FN) + db 2dh, 14h ;PWM8_NB_Out_INPUT_REG(DCB03IN) + db 2eh, 06h ;PWM8_NB_Out_OUTPUT_REG(DCB03OU) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 28h, 31h ;PWM8_Vout_FUNC_REG(DCB02FN) + db 29h, 14h ;PWM8_Vout_INPUT_REG(DCB02IN) + db 2ah, 05h ;PWM8_Vout_OUTPUT_REG(DCB02OU) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 1 + db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1) + db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2) + db 60h, 05h ; AnalogColumnClockSelect register (CLK_CR0) + db 62h, 29h ; AnalogIOControl_0 register (ABF_CR0) + db 67h, 33h ; AnalogLUTControl0 register (ALT_CR0) + db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1) + db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0) + db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1) + db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN) + db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU) + db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN) + db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU) + db e1h, 0bh ; OscillatorControl_1 register (OSC_CR1) + db e2h, 00h ; OscillatorControl_2 register (OSC_CR2) + db dfh, 2fh ; OscillatorControl_3 register (OSC_CR3) + db deh, 00h ; OscillatorControl_4 register (OSC_CR4) + db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN) + db ffh +AREA psoc_config(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered: +; Ordered Global Register values + M8C_SetBank0 + mov reg[00h], 00h ; Port_0_Data register (PRT0DR) + M8C_SetBank1 + mov reg[00h], 04h ; Port_0_DriveMode_0 register (PRT0DM0) + mov reg[01h], fbh ; Port_0_DriveMode_1 register (PRT0DM1) + M8C_SetBank0 + mov reg[03h], fbh ; Port_0_DriveMode_2 register (PRT0DM2) + mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS) + M8C_SetBank1 + mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0) + mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1) + M8C_SetBank0 + mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE) + mov reg[04h], 00h ; Port_1_Data register (PRT1DR) + M8C_SetBank1 + mov reg[04h], 70h ; Port_1_DriveMode_0 register (PRT1DM0) + mov reg[05h], 8fh ; Port_1_DriveMode_1 register (PRT1DM1) + M8C_SetBank0 + mov reg[07h], 8fh ; Port_1_DriveMode_2 register (PRT1DM2) + mov reg[06h], 70h ; Port_1_GlobalSelect register (PRT1GS) + M8C_SetBank1 + mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0) + mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1) + M8C_SetBank0 + mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE) + mov reg[08h], 00h ; Port_2_Data register (PRT2DR) + M8C_SetBank1 + mov reg[08h], ffh ; Port_2_DriveMode_0 register (PRT2DM0) + mov reg[09h], 00h ; Port_2_DriveMode_1 register (PRT2DM1) + M8C_SetBank0 + mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2) + mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS) + M8C_SetBank1 + mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0) + mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1) + M8C_SetBank0 + mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE) + M8C_SetBank0 + ret + + +; PSoC Configuration file trailer PsocConfig.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm new file mode 100644 index 0000000..e69de29 diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h new file mode 100644 index 0000000..3e3dd2b --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h @@ -0,0 +1,236 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.3.2710 +******************************************************************************/ +#include +// AnalogOutBuf_0 address and mask defines +#pragma ioport AnalogOutBuf_0_Data_ADDR: 0x0 +BYTE AnalogOutBuf_0_Data_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_0_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_0_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_0_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_0_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_0_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_0_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_0_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_0_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_0_IntEn_ADDR; +#define AnalogOutBuf_0_MASK 0x8 +// AnalogOutBuf_1 address and mask defines +#pragma ioport AnalogOutBuf_1_Data_ADDR: 0x0 +BYTE AnalogOutBuf_1_Data_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_1_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_1_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_1_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_1_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_1_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_1_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_1_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_1_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_1_IntEn_ADDR; +#define AnalogOutBuf_1_MASK 0x20 +// LCDD4 address and mask defines +#pragma ioport LCDD4_Data_ADDR: 0x8 +BYTE LCDD4_Data_ADDR; +#pragma ioport LCDD4_DriveMode_0_ADDR: 0x108 +BYTE LCDD4_DriveMode_0_ADDR; +#pragma ioport LCDD4_DriveMode_1_ADDR: 0x109 +BYTE LCDD4_DriveMode_1_ADDR; +#pragma ioport LCDD4_DriveMode_2_ADDR: 0xb +BYTE LCDD4_DriveMode_2_ADDR; +#pragma ioport LCDD4_GlobalSelect_ADDR: 0xa +BYTE LCDD4_GlobalSelect_ADDR; +#pragma ioport LCDD4_IntCtrl_0_ADDR: 0x10a +BYTE LCDD4_IntCtrl_0_ADDR; +#pragma ioport LCDD4_IntCtrl_1_ADDR: 0x10b +BYTE LCDD4_IntCtrl_1_ADDR; +#pragma ioport LCDD4_IntEn_ADDR: 0x9 +BYTE LCDD4_IntEn_ADDR; +#define LCDD4_MASK 0x1 +// LCDD4 Shadow defines +// LCDD4_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD4_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD4_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD4_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD4_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD4_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD5 address and mask defines +#pragma ioport LCDD5_Data_ADDR: 0x8 +BYTE LCDD5_Data_ADDR; +#pragma ioport LCDD5_DriveMode_0_ADDR: 0x108 +BYTE LCDD5_DriveMode_0_ADDR; +#pragma ioport LCDD5_DriveMode_1_ADDR: 0x109 +BYTE LCDD5_DriveMode_1_ADDR; +#pragma ioport LCDD5_DriveMode_2_ADDR: 0xb +BYTE LCDD5_DriveMode_2_ADDR; +#pragma ioport LCDD5_GlobalSelect_ADDR: 0xa +BYTE LCDD5_GlobalSelect_ADDR; +#pragma ioport LCDD5_IntCtrl_0_ADDR: 0x10a +BYTE LCDD5_IntCtrl_0_ADDR; +#pragma ioport LCDD5_IntCtrl_1_ADDR: 0x10b +BYTE LCDD5_IntCtrl_1_ADDR; +#pragma ioport LCDD5_IntEn_ADDR: 0x9 +BYTE LCDD5_IntEn_ADDR; +#define LCDD5_MASK 0x2 +// LCDD5 Shadow defines +// LCDD5_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD5_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD5_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD5_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD5_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD5_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD6 address and mask defines +#pragma ioport LCDD6_Data_ADDR: 0x8 +BYTE LCDD6_Data_ADDR; +#pragma ioport LCDD6_DriveMode_0_ADDR: 0x108 +BYTE LCDD6_DriveMode_0_ADDR; +#pragma ioport LCDD6_DriveMode_1_ADDR: 0x109 +BYTE LCDD6_DriveMode_1_ADDR; +#pragma ioport LCDD6_DriveMode_2_ADDR: 0xb +BYTE LCDD6_DriveMode_2_ADDR; +#pragma ioport LCDD6_GlobalSelect_ADDR: 0xa +BYTE LCDD6_GlobalSelect_ADDR; +#pragma ioport LCDD6_IntCtrl_0_ADDR: 0x10a +BYTE LCDD6_IntCtrl_0_ADDR; +#pragma ioport LCDD6_IntCtrl_1_ADDR: 0x10b +BYTE LCDD6_IntCtrl_1_ADDR; +#pragma ioport LCDD6_IntEn_ADDR: 0x9 +BYTE LCDD6_IntEn_ADDR; +#define LCDD6_MASK 0x4 +// LCDD6 Shadow defines +// LCDD6_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD6_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD6_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD6_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD6_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD6_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD7 address and mask defines +#pragma ioport LCDD7_Data_ADDR: 0x8 +BYTE LCDD7_Data_ADDR; +#pragma ioport LCDD7_DriveMode_0_ADDR: 0x108 +BYTE LCDD7_DriveMode_0_ADDR; +#pragma ioport LCDD7_DriveMode_1_ADDR: 0x109 +BYTE LCDD7_DriveMode_1_ADDR; +#pragma ioport LCDD7_DriveMode_2_ADDR: 0xb +BYTE LCDD7_DriveMode_2_ADDR; +#pragma ioport LCDD7_GlobalSelect_ADDR: 0xa +BYTE LCDD7_GlobalSelect_ADDR; +#pragma ioport LCDD7_IntCtrl_0_ADDR: 0x10a +BYTE LCDD7_IntCtrl_0_ADDR; +#pragma ioport LCDD7_IntCtrl_1_ADDR: 0x10b +BYTE LCDD7_IntCtrl_1_ADDR; +#pragma ioport LCDD7_IntEn_ADDR: 0x9 +BYTE LCDD7_IntEn_ADDR; +#define LCDD7_MASK 0x8 +// LCDD7 Shadow defines +// LCDD7_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD7_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD7_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD7_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD7_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD7_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDE address and mask defines +#pragma ioport LCDE_Data_ADDR: 0x8 +BYTE LCDE_Data_ADDR; +#pragma ioport LCDE_DriveMode_0_ADDR: 0x108 +BYTE LCDE_DriveMode_0_ADDR; +#pragma ioport LCDE_DriveMode_1_ADDR: 0x109 +BYTE LCDE_DriveMode_1_ADDR; +#pragma ioport LCDE_DriveMode_2_ADDR: 0xb +BYTE LCDE_DriveMode_2_ADDR; +#pragma ioport LCDE_GlobalSelect_ADDR: 0xa +BYTE LCDE_GlobalSelect_ADDR; +#pragma ioport LCDE_IntCtrl_0_ADDR: 0x10a +BYTE LCDE_IntCtrl_0_ADDR; +#pragma ioport LCDE_IntCtrl_1_ADDR: 0x10b +BYTE LCDE_IntCtrl_1_ADDR; +#pragma ioport LCDE_IntEn_ADDR: 0x9 +BYTE LCDE_IntEn_ADDR; +#define LCDE_MASK 0x10 +// LCDE Shadow defines +// LCDE_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDE_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDE_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDE_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDE_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDE_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRS address and mask defines +#pragma ioport LCDRS_Data_ADDR: 0x8 +BYTE LCDRS_Data_ADDR; +#pragma ioport LCDRS_DriveMode_0_ADDR: 0x108 +BYTE LCDRS_DriveMode_0_ADDR; +#pragma ioport LCDRS_DriveMode_1_ADDR: 0x109 +BYTE LCDRS_DriveMode_1_ADDR; +#pragma ioport LCDRS_DriveMode_2_ADDR: 0xb +BYTE LCDRS_DriveMode_2_ADDR; +#pragma ioport LCDRS_GlobalSelect_ADDR: 0xa +BYTE LCDRS_GlobalSelect_ADDR; +#pragma ioport LCDRS_IntCtrl_0_ADDR: 0x10a +BYTE LCDRS_IntCtrl_0_ADDR; +#pragma ioport LCDRS_IntCtrl_1_ADDR: 0x10b +BYTE LCDRS_IntCtrl_1_ADDR; +#pragma ioport LCDRS_IntEn_ADDR: 0x9 +BYTE LCDRS_IntEn_ADDR; +#define LCDRS_MASK 0x20 +// LCDRS Shadow defines +// LCDRS_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRS_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRS_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRS_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRS_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRS_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRW address and mask defines +#pragma ioport LCDRW_Data_ADDR: 0x8 +BYTE LCDRW_Data_ADDR; +#pragma ioport LCDRW_DriveMode_0_ADDR: 0x108 +BYTE LCDRW_DriveMode_0_ADDR; +#pragma ioport LCDRW_DriveMode_1_ADDR: 0x109 +BYTE LCDRW_DriveMode_1_ADDR; +#pragma ioport LCDRW_DriveMode_2_ADDR: 0xb +BYTE LCDRW_DriveMode_2_ADDR; +#pragma ioport LCDRW_GlobalSelect_ADDR: 0xa +BYTE LCDRW_GlobalSelect_ADDR; +#pragma ioport LCDRW_IntCtrl_0_ADDR: 0x10a +BYTE LCDRW_IntCtrl_0_ADDR; +#pragma ioport LCDRW_IntCtrl_1_ADDR: 0x10b +BYTE LCDRW_IntCtrl_1_ADDR; +#pragma ioport LCDRW_IntEn_ADDR: 0x9 +BYTE LCDRW_IntEn_ADDR; +#define LCDRW_MASK 0x40 +// LCDRW Shadow defines +// LCDRW_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRW_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRW_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRW_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRW_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRW_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc new file mode 100644 index 0000000..955b840 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc @@ -0,0 +1,491 @@ +; Generated by PSoC Designer 5.3.2710 +; +; AnalogOutBuf_0 address and mask equates +AnalogOutBuf_0_Data_ADDR: equ 0h +AnalogOutBuf_0_DriveMode_0_ADDR: equ 100h +AnalogOutBuf_0_DriveMode_1_ADDR: equ 101h +AnalogOutBuf_0_DriveMode_2_ADDR: equ 3h +AnalogOutBuf_0_GlobalSelect_ADDR: equ 2h +AnalogOutBuf_0_IntCtrl_0_ADDR: equ 102h +AnalogOutBuf_0_IntCtrl_1_ADDR: equ 103h +AnalogOutBuf_0_IntEn_ADDR: equ 1h +AnalogOutBuf_0_MASK: equ 8h +; AnalogOutBuf_1 address and mask equates +AnalogOutBuf_1_Data_ADDR: equ 0h +AnalogOutBuf_1_DriveMode_0_ADDR: equ 100h +AnalogOutBuf_1_DriveMode_1_ADDR: equ 101h +AnalogOutBuf_1_DriveMode_2_ADDR: equ 3h +AnalogOutBuf_1_GlobalSelect_ADDR: equ 2h +AnalogOutBuf_1_IntCtrl_0_ADDR: equ 102h +AnalogOutBuf_1_IntCtrl_1_ADDR: equ 103h +AnalogOutBuf_1_IntEn_ADDR: equ 1h +AnalogOutBuf_1_MASK: equ 20h +; LCDD4 address and mask equates +LCDD4_Data_ADDR: equ 8h +LCDD4_DriveMode_0_ADDR: equ 108h +LCDD4_DriveMode_1_ADDR: equ 109h +LCDD4_DriveMode_2_ADDR: equ bh +LCDD4_GlobalSelect_ADDR: equ ah +LCDD4_IntCtrl_0_ADDR: equ 10ah +LCDD4_IntCtrl_1_ADDR: equ 10bh +LCDD4_IntEn_ADDR: equ 9h +LCDD4_MASK: equ 1h +; LCDD4_Data access macros +; GetLCDD4_Data macro, return in a +macro GetLCDD4_Data + mov a,[Port_2_Data_SHADE] + and a, 1h +endm +; SetLCDD4_Data macro +macro SetLCDD4_Data + or [Port_2_Data_SHADE], 1h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_Data macro +macro ClearLCDD4_Data + and [Port_2_Data_SHADE], ~1h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD4_DriveMode_0 access macros +; GetLCDD4_DriveMode_0 macro, return in a +macro GetLCDD4_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 1h +endm +; SetLCDD4_DriveMode_0 macro +macro SetLCDD4_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 1h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_DriveMode_0 macro +macro ClearLCDD4_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~1h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD4_DriveMode_1 access macros +; GetLCDD4_DriveMode_1 macro, return in a +macro GetLCDD4_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 1h +endm +; SetLCDD4_DriveMode_1 macro +macro SetLCDD4_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 1h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_DriveMode_1 macro +macro ClearLCDD4_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~1h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD5 address and mask equates +LCDD5_Data_ADDR: equ 8h +LCDD5_DriveMode_0_ADDR: equ 108h +LCDD5_DriveMode_1_ADDR: equ 109h +LCDD5_DriveMode_2_ADDR: equ bh +LCDD5_GlobalSelect_ADDR: equ ah +LCDD5_IntCtrl_0_ADDR: equ 10ah +LCDD5_IntCtrl_1_ADDR: equ 10bh +LCDD5_IntEn_ADDR: equ 9h +LCDD5_MASK: equ 2h +; LCDD5_Data access macros +; GetLCDD5_Data macro, return in a +macro GetLCDD5_Data + mov a,[Port_2_Data_SHADE] + and a, 2h +endm +; SetLCDD5_Data macro +macro SetLCDD5_Data + or [Port_2_Data_SHADE], 2h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_Data macro +macro ClearLCDD5_Data + and [Port_2_Data_SHADE], ~2h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD5_DriveMode_0 access macros +; GetLCDD5_DriveMode_0 macro, return in a +macro GetLCDD5_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 2h +endm +; SetLCDD5_DriveMode_0 macro +macro SetLCDD5_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 2h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_DriveMode_0 macro +macro ClearLCDD5_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~2h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD5_DriveMode_1 access macros +; GetLCDD5_DriveMode_1 macro, return in a +macro GetLCDD5_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 2h +endm +; SetLCDD5_DriveMode_1 macro +macro SetLCDD5_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 2h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_DriveMode_1 macro +macro ClearLCDD5_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~2h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD6 address and mask equates +LCDD6_Data_ADDR: equ 8h +LCDD6_DriveMode_0_ADDR: equ 108h +LCDD6_DriveMode_1_ADDR: equ 109h +LCDD6_DriveMode_2_ADDR: equ bh +LCDD6_GlobalSelect_ADDR: equ ah +LCDD6_IntCtrl_0_ADDR: equ 10ah +LCDD6_IntCtrl_1_ADDR: equ 10bh +LCDD6_IntEn_ADDR: equ 9h +LCDD6_MASK: equ 4h +; LCDD6_Data access macros +; GetLCDD6_Data macro, return in a +macro GetLCDD6_Data + mov a,[Port_2_Data_SHADE] + and a, 4h +endm +; SetLCDD6_Data macro +macro SetLCDD6_Data + or [Port_2_Data_SHADE], 4h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_Data macro +macro ClearLCDD6_Data + and [Port_2_Data_SHADE], ~4h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD6_DriveMode_0 access macros +; GetLCDD6_DriveMode_0 macro, return in a +macro GetLCDD6_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 4h +endm +; SetLCDD6_DriveMode_0 macro +macro SetLCDD6_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 4h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_DriveMode_0 macro +macro ClearLCDD6_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~4h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD6_DriveMode_1 access macros +; GetLCDD6_DriveMode_1 macro, return in a +macro GetLCDD6_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 4h +endm +; SetLCDD6_DriveMode_1 macro +macro SetLCDD6_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 4h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_DriveMode_1 macro +macro ClearLCDD6_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~4h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD7 address and mask equates +LCDD7_Data_ADDR: equ 8h +LCDD7_DriveMode_0_ADDR: equ 108h +LCDD7_DriveMode_1_ADDR: equ 109h +LCDD7_DriveMode_2_ADDR: equ bh +LCDD7_GlobalSelect_ADDR: equ ah +LCDD7_IntCtrl_0_ADDR: equ 10ah +LCDD7_IntCtrl_1_ADDR: equ 10bh +LCDD7_IntEn_ADDR: equ 9h +LCDD7_MASK: equ 8h +; LCDD7_Data access macros +; GetLCDD7_Data macro, return in a +macro GetLCDD7_Data + mov a,[Port_2_Data_SHADE] + and a, 8h +endm +; SetLCDD7_Data macro +macro SetLCDD7_Data + or [Port_2_Data_SHADE], 8h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_Data macro +macro ClearLCDD7_Data + and [Port_2_Data_SHADE], ~8h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDD7_DriveMode_0 access macros +; GetLCDD7_DriveMode_0 macro, return in a +macro GetLCDD7_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 8h +endm +; SetLCDD7_DriveMode_0 macro +macro SetLCDD7_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 8h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_DriveMode_0 macro +macro ClearLCDD7_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~8h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDD7_DriveMode_1 access macros +; GetLCDD7_DriveMode_1 macro, return in a +macro GetLCDD7_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 8h +endm +; SetLCDD7_DriveMode_1 macro +macro SetLCDD7_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 8h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_DriveMode_1 macro +macro ClearLCDD7_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~8h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDE address and mask equates +LCDE_Data_ADDR: equ 8h +LCDE_DriveMode_0_ADDR: equ 108h +LCDE_DriveMode_1_ADDR: equ 109h +LCDE_DriveMode_2_ADDR: equ bh +LCDE_GlobalSelect_ADDR: equ ah +LCDE_IntCtrl_0_ADDR: equ 10ah +LCDE_IntCtrl_1_ADDR: equ 10bh +LCDE_IntEn_ADDR: equ 9h +LCDE_MASK: equ 10h +; LCDE_Data access macros +; GetLCDE_Data macro, return in a +macro GetLCDE_Data + mov a,[Port_2_Data_SHADE] + and a, 10h +endm +; SetLCDE_Data macro +macro SetLCDE_Data + or [Port_2_Data_SHADE], 10h + mov a, [Port_2_Data_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_Data macro +macro ClearLCDE_Data + and [Port_2_Data_SHADE], ~10h + mov a, [Port_2_Data_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDE_DriveMode_0 access macros +; GetLCDE_DriveMode_0 macro, return in a +macro GetLCDE_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 10h +endm +; SetLCDE_DriveMode_0 macro +macro SetLCDE_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 10h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_DriveMode_0 macro +macro ClearLCDE_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~10h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDE_DriveMode_1 access macros +; GetLCDE_DriveMode_1 macro, return in a +macro GetLCDE_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 10h +endm +; SetLCDE_DriveMode_1 macro +macro SetLCDE_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 10h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_DriveMode_1 macro +macro ClearLCDE_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~10h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDRS address and mask equates +LCDRS_Data_ADDR: equ 8h +LCDRS_DriveMode_0_ADDR: equ 108h +LCDRS_DriveMode_1_ADDR: equ 109h +LCDRS_DriveMode_2_ADDR: equ bh +LCDRS_GlobalSelect_ADDR: equ ah +LCDRS_IntCtrl_0_ADDR: equ 10ah +LCDRS_IntCtrl_1_ADDR: equ 10bh +LCDRS_IntEn_ADDR: equ 9h +LCDRS_MASK: equ 20h +; LCDRS_Data access macros +; GetLCDRS_Data macro, return in a +macro GetLCDRS_Data + mov a,[Port_2_Data_SHADE] + and a, 20h +endm +; SetLCDRS_Data macro +macro SetLCDRS_Data + or [Port_2_Data_SHADE], 20h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_Data macro +macro ClearLCDRS_Data + and [Port_2_Data_SHADE], ~20h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRS_DriveMode_0 access macros +; GetLCDRS_DriveMode_0 macro, return in a +macro GetLCDRS_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 20h +endm +; SetLCDRS_DriveMode_0 macro +macro SetLCDRS_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 20h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_DriveMode_0 macro +macro ClearLCDRS_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~20h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRS_DriveMode_1 access macros +; GetLCDRS_DriveMode_1 macro, return in a +macro GetLCDRS_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 20h +endm +; SetLCDRS_DriveMode_1 macro +macro SetLCDRS_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 20h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_DriveMode_1 macro +macro ClearLCDRS_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~20h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRW address and mask equates +LCDRW_Data_ADDR: equ 8h +LCDRW_DriveMode_0_ADDR: equ 108h +LCDRW_DriveMode_1_ADDR: equ 109h +LCDRW_DriveMode_2_ADDR: equ bh +LCDRW_GlobalSelect_ADDR: equ ah +LCDRW_IntCtrl_0_ADDR: equ 10ah +LCDRW_IntCtrl_1_ADDR: equ 10bh +LCDRW_IntEn_ADDR: equ 9h +LCDRW_MASK: equ 40h +; LCDRW_Data access macros +; GetLCDRW_Data macro, return in a +macro GetLCDRW_Data + mov a,[Port_2_Data_SHADE] + and a, 40h +endm +; SetLCDRW_Data macro +macro SetLCDRW_Data + or [Port_2_Data_SHADE], 40h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_Data macro +macro ClearLCDRW_Data + and [Port_2_Data_SHADE], ~40h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; LCDRW_DriveMode_0 access macros +; GetLCDRW_DriveMode_0 macro, return in a +macro GetLCDRW_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 40h +endm +; SetLCDRW_DriveMode_0 macro +macro SetLCDRW_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 40h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_DriveMode_0 macro +macro ClearLCDRW_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~40h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; LCDRW_DriveMode_1 access macros +; GetLCDRW_DriveMode_1 macro, return in a +macro GetLCDRW_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 40h +endm +; SetLCDRW_DriveMode_1 macro +macro SetLCDRW_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 40h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_DriveMode_1 macro +macro ClearLCDRW_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~40h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm new file mode 100644 index 0000000..1ec9a61 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Heater_EnableInt +export _PWM8_Heater_EnableInt +export PWM8_Heater_DisableInt +export _PWM8_Heater_DisableInt +export PWM8_Heater_Start +export _PWM8_Heater_Start +export PWM8_Heater_Stop +export _PWM8_Heater_Stop +export PWM8_Heater_WritePeriod +export _PWM8_Heater_WritePeriod +export PWM8_Heater_WritePulseWidth +export _PWM8_Heater_WritePulseWidth +export PWM8_Heater_bReadPulseWidth +export _PWM8_Heater_bReadPulseWidth +export PWM8_Heater_bReadCounter +export _PWM8_Heater_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Heater_ReadPulseWidth ; deprecated +export _bPWM8_Heater_ReadPulseWidth ; deprecated +export bPWM8_Heater_ReadCounter ; deprecated +export _bPWM8_Heater_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_EnableInt: +_PWM8_Heater_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_DisableInt: +_PWM8_Heater_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Start: +_PWM8_Heater_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Stop: +_PWM8_Heater_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePeriod: +_PWM8_Heater_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePulseWidth: +_PWM8_Heater_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadPulseWidth: +_PWM8_Heater_bReadPulseWidth: + bPWM8_Heater_ReadPulseWidth: ; this name deprecated +_bPWM8_Heater_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Heater_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadCounter: +_PWM8_Heater_bReadCounter: + bPWM8_Heater_ReadCounter: ; this name deprecated +_bPWM8_Heater_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Heater_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Heater_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Heater_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Heater_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Heater_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Heater_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Heater_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Heater_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Heater_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Heater.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h new file mode 100644 index 0000000..de54579 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Heater.h +// Version: 2.60, Updated on 2012/9/21 at 11:59:18 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Heater_INCLUDE +#define PWM8_Heater_INCLUDE + +#include + +#pragma fastcall16 PWM8_Heater_EnableInt +#pragma fastcall16 PWM8_Heater_DisableInt +#pragma fastcall16 PWM8_Heater_Start +#pragma fastcall16 PWM8_Heater_Stop +#pragma fastcall16 PWM8_Heater_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Heater_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Heater_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Heater_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Heater_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Heater_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Heater API. +//------------------------------------------------- + +extern void PWM8_Heater_EnableInt(void); // Proxy Class 1 +extern void PWM8_Heater_DisableInt(void); // Proxy Class 1 +extern void PWM8_Heater_Start(void); // Proxy Class 1 +extern void PWM8_Heater_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Heater_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Heater_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Heater_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Heater_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Heater API's. +//-------------------------------------------------- + +#define PWM8_Heater_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Heater_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Heater_INT_MASK ( 0x02 ) + + +//-------------------------------------------------- +// Constants for PWM8_Heater user defined values +//-------------------------------------------------- + +#define PWM8_Heater_PERIOD ( 0xff ) +#define PWM8_Heater_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Heater +//------------------------------------------------- + +#pragma ioport PWM8_Heater_COUNTER_REG: 0x024 //DR0 Count register +BYTE PWM8_Heater_COUNTER_REG; +#pragma ioport PWM8_Heater_PERIOD_REG: 0x025 //DR1 Period register +BYTE PWM8_Heater_PERIOD_REG; +#pragma ioport PWM8_Heater_COMPARE_REG: 0x026 //DR2 Compare register +BYTE PWM8_Heater_COMPARE_REG; +#pragma ioport PWM8_Heater_CONTROL_REG: 0x027 //Control register +BYTE PWM8_Heater_CONTROL_REG; +#pragma ioport PWM8_Heater_FUNC_REG: 0x124 //Function register +BYTE PWM8_Heater_FUNC_REG; +#pragma ioport PWM8_Heater_INPUT_REG: 0x125 //Input register +BYTE PWM8_Heater_INPUT_REG; +#pragma ioport PWM8_Heater_OUTPUT_REG: 0x126 //Output register +BYTE PWM8_Heater_OUTPUT_REG; +#pragma ioport PWM8_Heater_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Heater_INT_REG; + + +//------------------------------------------------- +// PWM8_Heater Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Heater_Start_M \ + PWM8_Heater_CONTROL_REG |= PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_Stop_M \ + PWM8_Heater_CONTROL_REG &= ~PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_EnableInt_M \ + M8C_EnableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#define PWM8_Heater_DisableInt_M \ + M8C_DisableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#endif +// end of file PWM8_Heater.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc new file mode 100644 index 0000000..b37aaca --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.inc +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Heater API's. +;-------------------------------------------------- + +PWM8_Heater_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Heater_INT_REG: equ 0x0e1 +PWM8_Heater_INT_MASK: equ 0x02 + + +;-------------------------------------------------- +; Constants for PWM8_Heater user defined values +;-------------------------------------------------- + +PWM8_Heater_PERIOD: equ 0xff +PWM8_Heater_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Heater +;-------------------------------------------------- + +PWM8_Heater_COUNTER_REG: equ 0x24 ; DR0 Count register +PWM8_Heater_PERIOD_REG: equ 0x25 ; DR1 Period register +PWM8_Heater_COMPARE_REG: equ 0x26 ; DR2 Compare register +PWM8_Heater_CONTROL_REG: equ 0x27 ; Control register +PWM8_Heater_FUNC_REG: equ 0x24 ; Function register +PWM8_Heater_INPUT_REG: equ 0x25 ; Input register +PWM8_Heater_OUTPUT_REG: equ 0x26 ; Output register + + +;-------------------------------------------------- +; PWM8_Heater Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Heater_Start_M + or reg[PWM8_Heater_CONTROL_REG], PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_Stop_M + and reg[PWM8_Heater_CONTROL_REG], ~PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_EnableInt_M + M8C_EnableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + macro PWM8_Heater_DisableInt_M + M8C_DisableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + +; end of file PWM8_Heater.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm new file mode 100644 index 0000000..60be084 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_HeaterINT.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Heater_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Heater_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Heater_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_HeaterINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm new file mode 100644 index 0000000..f741dc5 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_NB_Out_EnableInt +export _PWM8_NB_Out_EnableInt +export PWM8_NB_Out_DisableInt +export _PWM8_NB_Out_DisableInt +export PWM8_NB_Out_Start +export _PWM8_NB_Out_Start +export PWM8_NB_Out_Stop +export _PWM8_NB_Out_Stop +export PWM8_NB_Out_WritePeriod +export _PWM8_NB_Out_WritePeriod +export PWM8_NB_Out_WritePulseWidth +export _PWM8_NB_Out_WritePulseWidth +export PWM8_NB_Out_bReadPulseWidth +export _PWM8_NB_Out_bReadPulseWidth +export PWM8_NB_Out_bReadCounter +export _PWM8_NB_Out_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_NB_Out_ReadPulseWidth ; deprecated +export _bPWM8_NB_Out_ReadPulseWidth ; deprecated +export bPWM8_NB_Out_ReadCounter ; deprecated +export _bPWM8_NB_Out_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_EnableInt: +_PWM8_NB_Out_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_DisableInt: +_PWM8_NB_Out_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Start: +_PWM8_NB_Out_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Stop: +_PWM8_NB_Out_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePeriod: +_PWM8_NB_Out_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePulseWidth: +_PWM8_NB_Out_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadPulseWidth: +_PWM8_NB_Out_bReadPulseWidth: + bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated +_bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_NB_Out_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadCounter: +_PWM8_NB_Out_bReadCounter: + bPWM8_NB_Out_ReadCounter: ; this name deprecated +_bPWM8_NB_Out_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_NB_Out_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_NB_Out_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_NB_Out_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_NB_Out_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_NB_Out_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_NB_Out_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_NB_Out_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_NB_Out.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h new file mode 100644 index 0000000..6910a28 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_NB_Out.h +// Version: 2.60, Updated on 2012/9/21 at 11:59:18 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_NB_Out_INCLUDE +#define PWM8_NB_Out_INCLUDE + +#include + +#pragma fastcall16 PWM8_NB_Out_EnableInt +#pragma fastcall16 PWM8_NB_Out_DisableInt +#pragma fastcall16 PWM8_NB_Out_Start +#pragma fastcall16 PWM8_NB_Out_Stop +#pragma fastcall16 PWM8_NB_Out_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_NB_Out_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_NB_Out_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_NB_Out_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_NB_Out_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_NB_Out_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_NB_Out API. +//------------------------------------------------- + +extern void PWM8_NB_Out_EnableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_DisableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_Start(void); // Proxy Class 1 +extern void PWM8_NB_Out_Stop(void); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadCounter(void); // Proxy Class 2 +extern void PWM8_NB_Out_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_NB_Out_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_NB_Out_ReadCounter(void); // Deprecated +extern BYTE bPWM8_NB_Out_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out API's. +//-------------------------------------------------- + +#define PWM8_NB_Out_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_NB_Out_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_NB_Out_INT_MASK ( 0x08 ) + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out user defined values +//-------------------------------------------------- + +#define PWM8_NB_Out_PERIOD ( 0xff ) +#define PWM8_NB_Out_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_NB_Out +//------------------------------------------------- + +#pragma ioport PWM8_NB_Out_COUNTER_REG: 0x02c //DR0 Count register +BYTE PWM8_NB_Out_COUNTER_REG; +#pragma ioport PWM8_NB_Out_PERIOD_REG: 0x02d //DR1 Period register +BYTE PWM8_NB_Out_PERIOD_REG; +#pragma ioport PWM8_NB_Out_COMPARE_REG: 0x02e //DR2 Compare register +BYTE PWM8_NB_Out_COMPARE_REG; +#pragma ioport PWM8_NB_Out_CONTROL_REG: 0x02f //Control register +BYTE PWM8_NB_Out_CONTROL_REG; +#pragma ioport PWM8_NB_Out_FUNC_REG: 0x12c //Function register +BYTE PWM8_NB_Out_FUNC_REG; +#pragma ioport PWM8_NB_Out_INPUT_REG: 0x12d //Input register +BYTE PWM8_NB_Out_INPUT_REG; +#pragma ioport PWM8_NB_Out_OUTPUT_REG: 0x12e //Output register +BYTE PWM8_NB_Out_OUTPUT_REG; +#pragma ioport PWM8_NB_Out_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_NB_Out_INT_REG; + + +//------------------------------------------------- +// PWM8_NB_Out Macro 'Functions' +//------------------------------------------------- + +#define PWM8_NB_Out_Start_M \ + PWM8_NB_Out_CONTROL_REG |= PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_Stop_M \ + PWM8_NB_Out_CONTROL_REG &= ~PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_EnableInt_M \ + M8C_EnableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#define PWM8_NB_Out_DisableInt_M \ + M8C_DisableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#endif +// end of file PWM8_NB_Out.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc new file mode 100644 index 0000000..c7d6d45 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.inc +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out API's. +;-------------------------------------------------- + +PWM8_NB_Out_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_NB_Out_INT_REG: equ 0x0e1 +PWM8_NB_Out_INT_MASK: equ 0x08 + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out user defined values +;-------------------------------------------------- + +PWM8_NB_Out_PERIOD: equ 0xff +PWM8_NB_Out_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_NB_Out +;-------------------------------------------------- + +PWM8_NB_Out_COUNTER_REG: equ 0x2c ; DR0 Count register +PWM8_NB_Out_PERIOD_REG: equ 0x2d ; DR1 Period register +PWM8_NB_Out_COMPARE_REG: equ 0x2e ; DR2 Compare register +PWM8_NB_Out_CONTROL_REG: equ 0x2f ; Control register +PWM8_NB_Out_FUNC_REG: equ 0x2c ; Function register +PWM8_NB_Out_INPUT_REG: equ 0x2d ; Input register +PWM8_NB_Out_OUTPUT_REG: equ 0x2e ; Output register + + +;-------------------------------------------------- +; PWM8_NB_Out Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_NB_Out_Start_M + or reg[PWM8_NB_Out_CONTROL_REG], PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_Stop_M + and reg[PWM8_NB_Out_CONTROL_REG], ~PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_EnableInt_M + M8C_EnableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + macro PWM8_NB_Out_DisableInt_M + M8C_DisableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + +; end of file PWM8_NB_Out.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm new file mode 100644 index 0000000..145c01f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm @@ -0,0 +1,93 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_OutINT.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_NB_Out_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_NB_Out_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_NB_Out_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom assembly code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom assembly code above this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert a lcall to a C function below this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + + ;PRESERVE_CPU_CONTEXT + ;lcall _My_C_Function + ;RESTORE_CPU_CONTEXT + + ;--------------------------------------------------- + ; Insert a lcall to a C function above this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_NB_OutINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm new file mode 100644 index 0000000..f21c84e --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Vout_EnableInt +export _PWM8_Vout_EnableInt +export PWM8_Vout_DisableInt +export _PWM8_Vout_DisableInt +export PWM8_Vout_Start +export _PWM8_Vout_Start +export PWM8_Vout_Stop +export _PWM8_Vout_Stop +export PWM8_Vout_WritePeriod +export _PWM8_Vout_WritePeriod +export PWM8_Vout_WritePulseWidth +export _PWM8_Vout_WritePulseWidth +export PWM8_Vout_bReadPulseWidth +export _PWM8_Vout_bReadPulseWidth +export PWM8_Vout_bReadCounter +export _PWM8_Vout_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Vout_ReadPulseWidth ; deprecated +export _bPWM8_Vout_ReadPulseWidth ; deprecated +export bPWM8_Vout_ReadCounter ; deprecated +export _bPWM8_Vout_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_EnableInt: +_PWM8_Vout_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_DisableInt: +_PWM8_Vout_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Start: +_PWM8_Vout_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Stop: +_PWM8_Vout_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePeriod: +_PWM8_Vout_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePulseWidth: +_PWM8_Vout_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadPulseWidth: +_PWM8_Vout_bReadPulseWidth: + bPWM8_Vout_ReadPulseWidth: ; this name deprecated +_bPWM8_Vout_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Vout_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadCounter: +_PWM8_Vout_bReadCounter: + bPWM8_Vout_ReadCounter: ; this name deprecated +_bPWM8_Vout_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Vout_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Vout_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Vout_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Vout_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Vout_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Vout_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Vout_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Vout_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Vout_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Vout.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h new file mode 100644 index 0000000..fec7429 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Vout.h +// Version: 2.60, Updated on 2012/9/21 at 11:59:18 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Vout_INCLUDE +#define PWM8_Vout_INCLUDE + +#include + +#pragma fastcall16 PWM8_Vout_EnableInt +#pragma fastcall16 PWM8_Vout_DisableInt +#pragma fastcall16 PWM8_Vout_Start +#pragma fastcall16 PWM8_Vout_Stop +#pragma fastcall16 PWM8_Vout_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Vout_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Vout_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Vout_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Vout_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Vout_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Vout API. +//------------------------------------------------- + +extern void PWM8_Vout_EnableInt(void); // Proxy Class 1 +extern void PWM8_Vout_DisableInt(void); // Proxy Class 1 +extern void PWM8_Vout_Start(void); // Proxy Class 1 +extern void PWM8_Vout_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Vout_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Vout_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Vout_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Vout_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Vout API's. +//-------------------------------------------------- + +#define PWM8_Vout_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Vout_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Vout_INT_MASK ( 0x04 ) + + +//-------------------------------------------------- +// Constants for PWM8_Vout user defined values +//-------------------------------------------------- + +#define PWM8_Vout_PERIOD ( 0xff ) +#define PWM8_Vout_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Vout +//------------------------------------------------- + +#pragma ioport PWM8_Vout_COUNTER_REG: 0x028 //DR0 Count register +BYTE PWM8_Vout_COUNTER_REG; +#pragma ioport PWM8_Vout_PERIOD_REG: 0x029 //DR1 Period register +BYTE PWM8_Vout_PERIOD_REG; +#pragma ioport PWM8_Vout_COMPARE_REG: 0x02a //DR2 Compare register +BYTE PWM8_Vout_COMPARE_REG; +#pragma ioport PWM8_Vout_CONTROL_REG: 0x02b //Control register +BYTE PWM8_Vout_CONTROL_REG; +#pragma ioport PWM8_Vout_FUNC_REG: 0x128 //Function register +BYTE PWM8_Vout_FUNC_REG; +#pragma ioport PWM8_Vout_INPUT_REG: 0x129 //Input register +BYTE PWM8_Vout_INPUT_REG; +#pragma ioport PWM8_Vout_OUTPUT_REG: 0x12a //Output register +BYTE PWM8_Vout_OUTPUT_REG; +#pragma ioport PWM8_Vout_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Vout_INT_REG; + + +//------------------------------------------------- +// PWM8_Vout Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Vout_Start_M \ + PWM8_Vout_CONTROL_REG |= PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_Stop_M \ + PWM8_Vout_CONTROL_REG &= ~PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_EnableInt_M \ + M8C_EnableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#define PWM8_Vout_DisableInt_M \ + M8C_DisableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#endif +// end of file PWM8_Vout.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc new file mode 100644 index 0000000..c45e892 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.inc +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Vout API's. +;-------------------------------------------------- + +PWM8_Vout_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Vout_INT_REG: equ 0x0e1 +PWM8_Vout_INT_MASK: equ 0x04 + + +;-------------------------------------------------- +; Constants for PWM8_Vout user defined values +;-------------------------------------------------- + +PWM8_Vout_PERIOD: equ 0xff +PWM8_Vout_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Vout +;-------------------------------------------------- + +PWM8_Vout_COUNTER_REG: equ 0x28 ; DR0 Count register +PWM8_Vout_PERIOD_REG: equ 0x29 ; DR1 Period register +PWM8_Vout_COMPARE_REG: equ 0x2a ; DR2 Compare register +PWM8_Vout_CONTROL_REG: equ 0x2b ; Control register +PWM8_Vout_FUNC_REG: equ 0x28 ; Function register +PWM8_Vout_INPUT_REG: equ 0x29 ; Input register +PWM8_Vout_OUTPUT_REG: equ 0x2a ; Output register + + +;-------------------------------------------------- +; PWM8_Vout Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Vout_Start_M + or reg[PWM8_Vout_CONTROL_REG], PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_Stop_M + and reg[PWM8_Vout_CONTROL_REG], ~PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_EnableInt_M + M8C_EnableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + macro PWM8_Vout_DisableInt_M + M8C_DisableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + +; end of file PWM8_Vout.inc diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm new file mode 100644 index 0000000..1aec444 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_VoutINT.asm +;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Vout_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Vout_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Vout_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_VoutINT.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm new file mode 100644 index 0000000..c6bebc3 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm @@ -0,0 +1,594 @@ +;;***************************************************************************** +;;***************************************************************************** +;; Filename: SleepTimer.asm +;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: SleepTimer User Module software implementation file for the +;; 22/24/27/29xxx families. +;; +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "m8c.inc" +include "memory.inc" +include "SleepTimer.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +;------------------------------------------------------------------- +; Declare the functions global for both assembler and C compiler. +; +; Note that there are two names for each API. First name is +; assembler reference. Name with underscore is name reference for +; C compiler. Calling function in C source code does not require +; the underscore. +;------------------------------------------------------------------- +export SleepTimer_EnableInt +export _SleepTimer_EnableInt +export SleepTimer_DisableInt +export _SleepTimer_DisableInt + +export SleepTimer_Start +export _SleepTimer_Start +export SleepTimer_Stop +export _SleepTimer_Stop + +export SleepTimer_TickWait +export _SleepTimer_TickWait + +export SleepTimer_SyncWait +export _SleepTimer_SyncWait + +export SleepTimer_SetInterval +export _SleepTimer_SetInterval + +export SleepTimer_bGetTickCntr +export _SleepTimer_bGetTickCntr + +export SleepTimer_SetTimer +export _SleepTimer_SetTimer + +export SleepTimer_bGetTimer +export _SleepTimer_bGetTimer + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +export SleepTimer_iGetTickCntr +export _SleepTimer_iGetTickCntr +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +export SleepTimer_lGetTickCntr +export _SleepTimer_lGetTickCntr +ENDIF + + +area text (ROM,REL) + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +; Counter LSB Offset if 4 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 4) +ST_LSB_OFFSET: equ 3 +ENDIF + +; Counter LSB Offset if 2 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 2) +ST_LSB_OFFSET: equ 1 +ENDIF + +; Counter LSB Offset if 1 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 1) +ST_LSB_OFFSET: equ 0 +ENDIF + + +area UserModules (ROM, REL, CON) + +;============================================================================= +;============================================================================= +; +; Low-Level Commands +; +;============================================================================= +;============================================================================= + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_EnableInt +; +; DESCRIPTION: +; Enables SleepTimer interrupts. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_EnableInt: +_SleepTimer_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_DisableInt +; +; DESCRIPTION: +; Disables the sleep timer. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_DisableInt: +_SleepTimer_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Start() +; +; DESCRIPTION: +; Clears all the variables. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Start: +_SleepTimer_Start: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov A,0 + mov [SleepTimer_fTick],A + mov [SleepTimer_bTimerValue],A + mov [SleepTimer_bCountDown],A + mov [SleepTimer_TickCount + ST_LSB_OFFSET],A ; Clear TickCount[0:7] +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 1],A ; Clear TickCount[8:15] +ENDIF + + +IF(SleepTimer_TICK_CNTR_SIZE & 4) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 2],A ; Clear TickCount[16:31] + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 3],A +ENDIF + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here as a place +; holder. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Stop: +_SleepTimer_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetInterval +; +; DESCRIPTION: +; Sets sleep timer interval +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Timer setting +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetInterval: +_SleepTimer_SetInterval: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,SleepTimer_CLOCK_MASK ; Mask off invalid data + mov X, SP + push A + M8C_SetBank1 + mov A, reg[OSC_CR0] ; Get current timer value + and A,~SleepTimer_CLOCK_MASK ; Zero out old timer value + or A, [X] ; Set new timer values + mov reg[OSC_CR0],A ; Write it + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_TickWait(BYTE bTicks) +; +; DESCRIPTION: +; Wait X Ticks and return +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Count down time +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_TickWait: +_SleepTimer_TickWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + +.WaitTick: + tst [SleepTimer_fTick],0xFF ; Check for tick + jz .WaitTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + dec A ; Dec the timer variable + jnz .WaitTick ; Loop until we count down to zero + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SyncWait(BYTE bCounts, BYTE fMode) +; +; DESCRIPTION: +; This function resets the SyncWait timer. If fMode = 0, the timer +; is set to the new value then exits the function immediatly. If fMode +; is set to 1, the firmware waits for the timer to expire before the +; timer is reset and and exits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= tCounts to wait +; X <= fMode fMode = 0 Just reload the value, do not wait +; fMode = 1 Wait for last value to count down to zero +; then reload. +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SyncWait: +_SleepTimer_SyncWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_bCountDown + swap A,X + AND A,SleepTimer_FORCE_RELOAD + jnz .ReloadIt + +.WaitLoop: + tst [SleepTimer_bCountDown],0xFF + jnz .WaitLoop + + +.ReloadIt: + swap A,X + mov [SleepTimer_bCountDown],A + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTickCntr +; +; DESCRIPTION: +; Returns the LSB of the tick Counter +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; LSB of lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTickCntr: +_SleepTimer_bGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetTimer +; +; DESCRIPTION: +; Set timer with parameter in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Value used to set Timer value +; +; RETURNS: +; None +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetTimer: +_SleepTimer_SetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov [SleepTimer_bTimerValue],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTimer +; +; DESCRIPTION: +; Returns timer value in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; None +; +; RETURNS: +; Return timer value in A +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTimer: +_SleepTimer_bGetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_bTimerValue] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_iGetTickCntr +; +; DESCRIPTION: +; Returns the least significant 16 bits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; (int)TickCount in A and X +; X <= MSB +; A <= LSB +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_iGetTickCntr: +_SleepTimer_iGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] ; Place LSB in A + mov X,[SleepTimer_TickCount + ST_LSB_OFFSET - 1] ; Place MSB in X + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_lGetTickCntr +; +; DESCRIPTION: +; Returns a pointer to TickCount +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; [A:X] => Pointer to 32 bit tick counter (X=LSB, A=MSB) +; +; RETURNS: +; Pointer to lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_lGetTickCntr: +_SleepTimer_lGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_PROLOGUE RAM_USE_CLASS_3 + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_SETPAGE_CUR >SleepTimer_TickCount + RAM_SETPAGE_IDX A + push A + mov A,[SleepTimer_TickCount + 0] + mov [X + 0],A + mov A,[SleepTimer_TickCount + 1] + mov [X + 1],A + mov A,[SleepTimer_TickCount + 2] + mov [X + 2],A + mov A,[SleepTimer_TickCount + 3] + mov [X + 3],A + pop A + + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION +ENDIF + + + + +; End of File SleepTimer.asm diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h new file mode 100644 index 0000000..1cb54b4 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h @@ -0,0 +1,78 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: SleepTimer.h +// Version: 1.0, Updated on 2012/9/21 at 11:59:23 +// Generated by PSoC Designer 5.3.2710 +// +// DESCRIPTION: SleepTimer User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef SleepTimer_INCLUDE +#define SleepTimer_INCLUDE + +#include +#define SleepTimer_TICK_CNTR_SIZE 4 + +#pragma fastcall16 SleepTimer_EnableInt // Proxy 1 +#pragma fastcall16 SleepTimer_DisableInt // Proxy 1 +#pragma fastcall16 SleepTimer_Start // Proxy 1 +#pragma fastcall16 SleepTimer_Stop // Proxy 1 +#pragma fastcall16 SleepTimer_SetInterval // Proxy 1 +#pragma fastcall16 SleepTimer_SetTimer +#pragma fastcall16 SleepTimer_bGetTimer + +#pragma fastcall16 SleepTimer_SyncWait // Proxy 1 +#pragma fastcall16 SleepTimer_TickWait // Proxy 1 + +#pragma fastcall16 SleepTimer_bGetTickCntr // Proxy 2 + + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +#pragma fastcall16 SleepTimer_iGetTickCntr // Proxy 4 +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +#pragma fastcall16 SleepTimer_lGetTickCntr // Proxy 4 +#endif + +//------------------------------------------------- +// Prototypes of the SleepTimer API. +//------------------------------------------------- + +extern void SleepTimer_EnableInt(void); +extern void SleepTimer_DisableInt(void); +extern void SleepTimer_Start(void); +extern void SleepTimer_Stop(void); +extern void SleepTimer_SetInterval(BYTE bInterval); +extern void SleepTimer_SyncWait(BYTE bTicks, BYTE bMode); +extern void SleepTimer_TickWait(BYTE bTicks); +extern void SleepTimer_SetTimer(BYTE bNewTimerValue); +extern BYTE SleepTimer_bGetTimer( void ); + +extern BYTE SleepTimer_bGetTickCntr(void); + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +extern unsigned int SleepTimer_iGetTickCntr(void); +#define ST_INT_VALID +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +extern unsigned long * SleepTimer_lGetTickCntr(unsigned long * lptr); +#define ST_LONG_VALID +#endif + +// Frequency of sleep timer interrupts +#define SleepTimer_1_HZ 0x18 +#define SleepTimer_8_HZ 0x10 +#define SleepTimer_64_HZ 0x08 +#define SleepTimer_512_HZ 0x00 + +#define SleepTimer_FORCE_RELOAD 0x01 +#define SleepTimer_WAIT_RELOAD 0x00 +extern BYTE SleepTimer_fTick; + + +#endif +// end of file SleepTimer.h diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc new file mode 100644 index 0000000..f413650 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc @@ -0,0 +1,33 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimer.inc +;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: Assembler declarations for the SleepTimer user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for SleepTimer API's. +;-------------------------------------------------- + +SleepTimer_INT_REG: equ 0x0e0 +SleepTimer_INT_MASK: equ 0x40 + +SleepTimer_TICK_CNTR_SIZE: equ 4h + +; Frequency of sleep timer interrupts +SleepTimer_1_HZ: equ 0x18 +SleepTimer_8_HZ: equ 0x10 +SleepTimer_64_HZ: equ 0x08 +SleepTimer_512_HZ: equ 0x00 +SleepTimer_CLOCK_MASK: equ 0x18 + +SleepTimer_FORCE_RELOAD: equ 0x01 +SleepTimer_WAIT_RELOAD: equ 0x00 diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm new file mode 100644 index 0000000..4a95ed9 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm @@ -0,0 +1,143 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimerINT.asm +;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 +;; Generated by PSoC Designer 5.3.2710 +;; +;; DESCRIPTION: SleepTimer Interrupt Service Routine. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "SleepTimer.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _SleepTimer_ISR + + +export SleepTimer_fTick +export _SleepTimer_fTick +export SleepTimer_bTimerValue +export _SleepTimer_bTimerValue +export SleepTimer_bCountDown +export _SleepTimer_bCountDown +export SleepTimer_TickCount +export _SleepTimer_TickCount + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM (RAM, REL, CON) + + SleepTimer_fTick: +_SleepTimer_fTick: BLK 1 + + SleepTimer_bTimerValue: +_SleepTimer_bTimerValue: BLK 1 + + SleepTimer_bCountDown: +_SleepTimer_bCountDown: BLK 1 + + SleepTimer_TickCount: +_SleepTimer_TickCount: BLK SleepTimer_TICK_CNTR_SIZE + + + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +Sleep_Counter:: // Sleep timer will trigger this ISR @ 512hz, Sleep Counter is used to count the number number of times this happens, Sleep Counter is used to figure how often certain routines should run +_Sleep_Counter:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL, CON) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _SleepTimer_ISR +; +; DESCRIPTION: +; interrupt handler for instance SleepTimer. +; +; This is a place holder function. If the user requires use of an interrupt +; handler for this function, then place code where specified. +;----------------------------------------------------------------------------- + +_SleepTimer_ISR: + + or [SleepTimer_fTick],0x01 ; Set tick flag + + ; Decrement CountDown (Sync counter) + tst [SleepTimer_bCountDown],0xFF + jz .DoTimer + dec [SleepTimer_bCountDown] + +.DoTimer: ; Decrement TimerValue, if required + tst [SleepTimer_bTimerValue],0xFF + jz .IncBigCounter + dec [SleepTimer_bTimerValue] + +.IncBigCounter: ; Increment big tick counter +IF (SleepTimer_TICK_CNTR_SIZE & 0x04) + inc [SleepTimer_TickCount+3] + jnc SleepTimer_SLEEP_ISR_END + + inc [SleepTimer_TickCount+2] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + +IF (SleepTimer_TICK_CNTR_SIZE & (0x04|0x02)) + inc [SleepTimer_TickCount+1] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + + inc [SleepTimer_TickCount+0] + +SleepTimer_SLEEP_ISR_END: + + ;@PSoC_UserCode_BODY_1@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + //14Point7 ASM Code Start + inc [Sleep_Counter] + //call LED7SEG_Update + //14Point7 ASM Code End + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + +; end of file SleepTimerINT.asm + diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a rename to June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile similarity index 100% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile rename to June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c new file mode 100644 index 0000000..f26dd16 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c @@ -0,0 +1,337 @@ +//---------------------------------------------------------------------------- +// C main line +//---------------------------------------------------------------------------- +#include // part specific constants and macros +#include "PSoCAPI.h" // PSoC API definitions for all User Modules +extern BYTE ADC_Counter; //Variable Declared in ADCININT.asm +extern BYTE Ri_Max_x1; //Variable Declared in ADCININT.asm +extern BYTE Ri_Min_x1; //Variable Declared in ADCININT.asm +extern BYTE ip_x1; //Variable Declared in ADCININT.asm +extern BYTE ADC_IF; //Variable Declared in ADCININT.asm +extern BYTE Sleep_Counter; //Variable Declared in SleepTimerINT.asm + +#define Vout_Lookup_Counter_Set 25 +#define LCD_Counter_Set 50 + +#define Lin_Out +#define NB_Out +#define LCD_Lambda_Graph +#define LCD_Temperature_Graph +//#define PID_Tune +#define Ri_Filter_Strength 4 +#define ip_Filter_Strength 4 + +#ifdef PID_Tune + INT Ri_Mid_Target= 271; //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell + INT Ia_PID_Kp = 35; + INT Ia_PID_Ki = 8; + INT Ia_Output_Bias = 256; + INT Ri_Delta_Target=143; //PID Target peak to peak Voltage of Nermest Cell + INT Heater_PID_Kp =-72; + INT Heater_PID_Ki =-4; + INT Heater_PID_Output_Bias =128; +#else + #define Ri_Mid_Target 271 //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell + #define Ia_PID_Kp 25 + #define Ia_PID_Ki 4 + #define Ia_Output_Bias 256 + #define Ri_Delta_Target 143 //PID Target peak to peak Voltage of Nermest Cell + #define Heater_PID_Kp -72 + #define Heater_PID_Ki -4 + #define Heater_PID_Output_Bias 128 +#endif + +#ifdef Lin_Out + #define ip_to_Vout_Lookup_Start 135 + #define ip_to_Vout_Lookup_Size 158 + const BYTE ip_to_Vout_Lookup[ip_to_Vout_Lookup_Size] = {0,1,1,2,3,4,4,5,6,7,8,8,9,10,11,12,12,13,14,15,16,17,17,18,19,20,21,22,22,23,24,25,26,27,27,28,29,30,31,32,33,34,34,35,36,37,38,39,40,41,42,43,44,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,76,77,78,79,80,81,82,83,84,86,87,88,89,90,91,92,94,95,96,97,98,100,101,102,103,105,106,107,108,110,111,112,113,115,116,117,119,120,123,126,129,132,135,138,141,144,147,151,154,157,161,164,168,171,175,178,182,186,190,194,197,201,206,210,214,218,222,227,231,236,240,245,250,255}; +#endif + +#ifdef LCD_Lambda_Graph + #define ip_to_Lambda_Lookup_Start 135 + #define ip_to_Lambda_Lookup_Size 158 + const BYTE ip_to_Graph_Lookup[ip_to_Lambda_Lookup_Size]={8,8,8,9,9,9,9,9,10,10,10,10,10,11,11,11,11,12,12,12,12,12,13,13,13,13,14,14,14,14,14,15,15,15,15,16,16,16,16,16,17,17,17,17,18,18,18,18,19,19,19,19,20,20,20,20,21,21,21,21,22,22,22,22,23,23,23,23,24,24,24,25,25,25,25,26,26,26,26,27,27,27,28,28,28,28,29,29,29,30,30,30,31,31,31,31,32,32,32,33,33,33,34,34,34,35,35,35,36,36,36,37,37,37,38,38,38,39,39,39,40,40,41,42,42,43,44,45,46,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,70,71,72,73,75,76}; +#endif + +#ifdef LCD_Temperature_Graph + #define Ri_Delta_to_Temperature_C_Start 113 + #define Ri_Delta_to_Temperature_C_Size 75 + const BYTE Ri_Delta_to_Graph[Ri_Delta_to_Temperature_C_Size]={80,78,77,75,74,73,71,70,68,67,65,64,63,61,60,59,58,56,55,54,52,51,50,49,48,46,45,44,43,42,41,40,39,37,36,35,34,33,32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,18,17,16,15,14,13,12,11,11,10,9,8,7,6,5,5,4,3,2,1,1,0}; +#endif + + + +INT Ri_Mid_Error_Sum=0; +INT Ri_Mid; +INT Ri_Delta_Error_Sum=0; +INT Ri_Delta; +#define Ia_PID_Counter_Set 1 +#define Heatup_Counter_Set 100 +#define Heater_PID_Counter_Set 25 +BYTE Heatup_Heater_Output=100; + +INT Ri_Delta_Error; +INT Heater_Output; +INT Heater_Pout; +INT Heater_Iout; + +//PID Controller, Input is Ri_Delta (The Peak to peak voltage on the Vs Port of the sensor) output is PWM8_Heater, PWM8_Heater is controlled such that Ri_Delta is maintained at 80 (80 =750C) +//Only a PI controller is used as adding the D term does not effect performance +//Everything is inflated by a factor of 4 so that floating point is avioded +void Heater_PID(void) // Ned to run this when counter >50 +{ + + Ri_Delta_Error=Ri_Delta_Target-Ri_Delta; + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Delta_Error>56) + { + Ri_Delta_Error=56; + } + if (Ri_Delta_Error<-56) + { + Ri_Delta_Error=-56; + } + Heater_Pout=(Heater_PID_Kp*Ri_Delta_Error)/16; + Ri_Delta_Error_Sum=Ri_Delta_Error_Sum+Ri_Delta_Error; + //If the sensor is too hot, then disreguard the Integratal contribution and just use the proportional to quickly correct the sensor temperature + /* + if((Ri_Delta<60)&&(Ri_Delta_Error_Sum>0)) + { + Ri_Delta_Error_Sum=0; + } + */ + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Delta_Error_Sum>1024) + { + Ri_Delta_Error_Sum=1024; + } + if (Ri_Delta_Error_Sum<-1024) + { + Ri_Delta_Error_Sum=-1024; + } + Heater_Iout=(Heater_PID_Ki*Ri_Delta_Error_Sum)/16; + if (Heatup_Heater_Output<255) // if Heatup_Heater_Output is < 255 that means the unit just turned on and to give control to the heatup routine + { + Heater_Output=Heatup_Heater_Output; + } + else + { + Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; + } + //Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; + if (Heater_Output<0) + { + Heater_Output=0; + } + if (Heater_Output>255) + { + Heater_Output=255; + } + + + PWM8_Heater_WritePulseWidth(Heater_Output); + //PWM8_Heater_WritePulseWidth(200); +} + +INT Ri_Mid_Error; +INT Ia_Output; +INT Ia_Pout; +INT Ia_Iout; +//PID Controller, Input is Ri_Mid (The average voltage on the Vs Port of the sensor) output is DAC9_Ia, DAC9_Ia sink/sources current to the Sensor pump cell such that Ri_Mid is is the same voltage as Vref +//Only a PI controller is used as adding the D term does not effect performance +//Everything is inflated by a factor of 4 so that floating point is avioded +void Ia_PID(void) +{ + + + Ri_Mid_Error=Ri_Mid_Target-Ri_Mid; + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Mid_Error>163) + { + Ri_Mid_Error=163; + } + if (Ri_Mid_Error<-163) + { + Ri_Mid_Error=-163; + } + Ia_Pout=(Ia_PID_Kp*Ri_Mid_Error)/16; + Ri_Mid_Error_Sum=Ri_Mid_Error_Sum+Ri_Mid_Error; + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Mid_Error_Sum>1020) + { + Ri_Mid_Error_Sum=1020; + } + if (Ri_Mid_Error_Sum<-1020) + { + Ri_Mid_Error_Sum=-1020; + } + Ia_Iout=(Ia_PID_Ki*Ri_Mid_Error_Sum)/16; + Ia_Output=Ia_Output_Bias+Ia_Pout+Ia_Iout; + //9 Bit Dac so only 0-511 is allowed, for some reason i put the limit at 510, I foget exactly why. + if (Ia_Output<0) + { + Ia_Output=0; + } + if (Ia_Output>510) + { + Ia_Output=510; + } + DAC9_Ia_WriteStall (Ia_Output); + //DAC9_Ia_WriteStall (256); +} +INT IIR_Int(INT Vin, INT Vout, BYTE A) +{ + return (Vout + (Vin - Vout)/A); +} + + +BYTE Ia_PID_Counter=0; +BYTE Vout_Lookup_Counter=0; +BYTE Heater_PID_Counter=0; +BYTE LCD_Counter=0; +BYTE Heatup_Counter=0; +INT Ri_Min,Ri_Max; +INT ip,ip_Justified; +BYTE Lambda_x100; +INT LSU_Temperature_C; +char Str1[] = "Lambda=x.xx"; +char Str2[] = "Temperature=xxxC"; +void main(void) +{ + unsigned long temp_ulong; + INT temp_int,temp_int2; + BYTE temp_byte; + AMUX4_0_InputSelect(AMUX4_0_PORT0_1); + AMUX4_1_InputSelect(AMUX4_1_PORT0_0); + INSAMP_Start(INSAMP_LOWPOWER); + ADCINC_Start(ADCINC_HIGHPOWER); + DAC9_Ia_Start(DAC9_Ia_HIGHPOWER); + DAC6_VGND_Start(DAC6_VGND_MEDPOWER); + DAC6_VGND_WriteStall (31); + PWM8_Vout_DisableInt(); + PWM8_Vout_Start(); + PWM8_Heater_DisableInt(); + PWM8_Heater_Start(); + PWM8_NB_Out_DisableInt(); + PWM8_NB_Out_Start(); + ADCINC_GetSamples(0); + SleepTimer_Start(); + SleepTimer_SetInterval(SleepTimer_512_HZ); + SleepTimer_EnableInt(); + M8C_EnableGInt ; + LCD_Start(); // Initialize LCD + LCD_InitBG(LCD_SOLID_BG); + + for(;;) + { + temp_ulong++; + if ((ADC_IF&1)==1) + { + ADC_IF=ADC_IF&254; + Ri_Min=IIR_Int(Ri_Min_x1*2,Ri_Min,Ri_Filter_Strength); + Ri_Delta=Ri_Max-Ri_Min; + Ri_Mid=(Ri_Max+Ri_Min)/2; + } + if ((ADC_IF&2)==2) + { + ADC_IF=ADC_IF&253; + Ri_Max=IIR_Int(Ri_Max_x1*2,Ri_Max,Ri_Filter_Strength); + Ri_Delta=Ri_Max-Ri_Min; + Ri_Mid=(Ri_Max+Ri_Min)/2; + } + if ((ADC_IF&4)==4) + { + ADC_IF=ADC_IF&251; + ip=IIR_Int(ip_x1*2,ip,ip_Filter_Strength); + } + Ia_PID_Counter+=Sleep_Counter; + Heater_PID_Counter+=Sleep_Counter; + Heatup_Counter+=Sleep_Counter; + Vout_Lookup_Counter+=Sleep_Counter; + LCD_Counter+=Sleep_Counter; + Sleep_Counter=0; + if (Ia_PID_Counter>Ia_PID_Counter_Set) + { + Ia_PID_Counter=0; + Ia_PID(); + } + if (Heater_PID_Counter>Heater_PID_Counter_Set) + { + Heater_PID_Counter=0; + Heater_PID(); + } + if (Vout_Lookup_Counter>Vout_Lookup_Counter_Set) + { + Vout_Lookup_Counter=0; + temp_int=ip-ip_to_Vout_Lookup_Start; + if (temp_int<0) + { + temp_int=0; + } + if (temp_int>(ip_to_Vout_Lookup_Size-1)) + { + temp_int=(ip_to_Vout_Lookup_Size-1); + } + PWM8_Vout_WritePulseWidth(ip_to_Vout_Lookup[temp_int]); + + #ifdef NB_Out + temp_byte=23;//0.45v + if (ip<251) // 251 =0.9797787392968 + { + temp_byte=46; //0.9v + + } + if (ip>259) //259 = 1.02295956968912 + { + temp_byte=0; //0v + } + PWM8_NB_Out_WritePulseWidth(temp_byte); + #endif + + } + if (LCD_Counter>LCD_Counter_Set) + { + LCD_Counter=0; + #ifdef LCD_Lambda_Graph + temp_int=ip-ip_to_Lambda_Lookup_Start; + if (temp_int<0) + { + temp_int=0; + } + if (temp_int>(ip_to_Lambda_Lookup_Size-1)) + { + temp_int=(ip_to_Lambda_Lookup_Size-1); + } + Lambda_x100=ip_to_Graph_Lookup[temp_int]; + LCD_DrawBG(0,0,16,Lambda_x100); + #endif + + #ifdef LCD_Temperature_Graph + temp_int=Ri_Delta-Ri_Delta_to_Temperature_C_Start; + if (temp_int<0) + { + temp_int=0; + } + if (temp_int>(Ri_Delta_to_Temperature_C_Size-1)) + { + temp_int=(Ri_Delta_to_Temperature_C_Size-1); + } + LSU_Temperature_C=Ri_Delta_to_Graph[temp_int]; + LCD_DrawBG(1,0,16,LSU_Temperature_C); + #endif + } + if (Heatup_Heater_Output<255) + { + if (Heatup_Counter>Heatup_Counter_Set) + { + Heatup_Counter=0; + Heatup_Heater_Output++; + } + if ((Ri_Min>50) && (Ri_Max<475) && (Ri_Delta__idata_start ; copy idata to data segment +00A4: 57 77 MOV X,0x77 (0358) mov X,<__idata_start +00A6: 55 2D 00 MOV [__r0],0x0 (0359) mov [__r0],<__data_start + (0360) IDataLoop: +00A9: 3C 2D 27 CMP [__r0],0x27 (0361) cmp [__r0],<__data_end +00AC: A0 0B JZ 0x00B8 (0362) jz C_RTE_Done +00AE: 08 PUSH A (0363) push A +00AF: 28 ROMX (0364) romx +00B0: 3F 2D MVI [__r0],A (0365) mvi [__r0],A +00B2: 18 POP A (0366) pop A +00B3: 75 INC X (0367) inc X +00B4: 09 00 ADC A,0x0 (0368) adc A,0 +00B6: 8F F2 JMP 0x00A9 (0369) jmp IDataLoop +00B8: 71 10 OR F,0x10 + (0370) + (0371) C_RTE_Done: + (0372) + (0373) ENDIF ; C_LANGUAGE_SUPPORT + (0374) + (0375) ;------------------------------- + (0376) ; Voltage Stabilization for SMP + (0377) ;------------------------------- + (0378) + (0379) IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation + (0380) IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + (0381) ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + (0382) ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + (0383) ; 5V before enabling the Precision Power-On Reset (PPOR). + (0384) ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + (0385) or reg[INT_MSK0],INT_MSK0_SLEEP + (0386) M8C_SetBank1 + (0387) and reg[OSC_CR0], ~OSC_CR0_SLEEP + (0388) or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + (0389) M8C_SetBank0 + (0390) M8C_ClearWDTAndSleep ; Restart the sleep timer + (0391) mov reg[INT_VC], 0 ; Clear all pending interrupts + (0392) .WaitFor2ms: + (0393) tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + (0394) jz .WaitFor2ms ; Branch fails when 2 msec has passed + (0395) ENDIF ; SMP is operational + (0396) ENDIF ; 5.0V Operation + (0397) + (0398) ;------------------------------- + (0399) ; Set Power-On Reset (POR) Level + (0400) ;------------------------------- + (0401) ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + (0402) ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + (0403) ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + (0404) ; These values should not be changed from the settings here. See Section "POR and LVD" of + (0405) ; Technical Reference Manual #001-14463 for more information. + (0406) + (0407) M8C_SetBank1 + (0408) + (0409) IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + (0410) ; Yes, lowest trip already set + (0411) ELSE ; No, must adjust POR... + (0412) IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + (0413) or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip + (0414) ELSE + (0415) IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + (0416) IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + (0417) or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + (0418) ELSE ; No, fast mode + (0419) IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? +00BA: 43 E3 10 OR REG[0xE3],0x10 (0420) or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip +00BD: 70 EF AND F,0xEF + (0421) ELSE ; 24HMz ; + (0422) or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + (0423) ENDIF ; 24MHz + (0424) ENDIF ; Slow Mode + (0425) ENDIF ; 5.0V Operation + (0426) ENDIF ; 3.3V Operation + (0427) ENDIF ; 2.7V Operation + (0428) + (0429) M8C_SetBank0 + (0430) + (0431) ;---------------------------- + (0432) ; Wrap up and invoke "main" + (0433) ;---------------------------- + (0434) + (0435) ; Disable the Sleep interrupt that was used for timing above. In fact, + (0436) ; no interrupts should be enabled now, so may as well clear the register. + (0437) ; +00BF: 62 E0 00 MOV REG[0xE0],0x0 (0438) mov reg[INT_MSK0],0 +00C2: 71 10 OR F,0x10 + (0439) + (0440) ; Everything has started OK. Now select requested CPU & sleep frequency. + (0441) ; + (0442) M8C_SetBank1 +00C4: 62 E0 02 MOV REG[0xE0],0x2 (0443) mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) +00C7: 70 EF AND F,0xEF + (0444) M8C_SetBank0 + (0445) + (0446) ; Global Interrupt are NOT enabled, this should be done in main(). + (0447) ; LVD is set but will not occur unless Global Interrupts are enabled. + (0448) ; Global Interrupts should be enabled as soon as possible in main(). + (0449) ; +00C9: 62 E2 00 MOV REG[0xE2],0x0 (0450) mov reg[INT_VC],0 ; Clear any pending interrupts which may + (0451) ; have been set during the boot process. + (0452) IF (TOOLCHAIN & HITECH) + (0453) ljmp startup ; Jump to C compiler startup code + (0454) ELSE + (0455) IF ENABLE_LJMP_TO_MAIN + (0456) ljmp _main ; goto main (no return) + (0457) ELSE +00CC: 7C 0B 49 LCALL _main (0458) lcall _main ; call main + (0459) .Exit: +00CF: 8F FF JMP 0x00CF (0460) jmp .Exit ; Wait here after return till power-off or reset + (0461) ENDIF + (0462) ENDIF ; TOOLCHAIN + (0463) + (0464) ;--------------------------------- + (0465) ; Library Access to Global Parms + (0466) ;--------------------------------- + (0467) ; + (0468) bGetPowerSetting: + (0469) _bGetPowerSetting: + (0470) ; Returns value of POWER_SETTING in the A register. + (0471) ; No inputs. No Side Effects. + (0472) ; + (0473) IF (POWER_SETTING & POWER_SET_2V7) + (0474) mov A, POWER_SETTING | POWER_SET_SLOW_IMO + (0475) ELSE +00D1: 50 10 MOV A,0x10 (0476) mov A, POWER_SETTING ; Supply voltage and internal main osc + (0477) ENDIF +00D3: 7F RET (0478) ret + (0479) + (0480) IF (TOOLCHAIN & HITECH) + (0481) ELSE + (0482) ;--------------------------------- + (0483) ; Order Critical RAM & ROM AREAs + (0484) ;--------------------------------- + (0485) ; 'TOP' is all that has been defined so far... + (0486) + (0487) ; ROM AREAs for C CONST, static & global items + (0488) ; + (0489) AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + (0490) AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM + (0491) __idata_start: + (0492) + (0493) AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers + (0494) __func_lit_start: + (0495) + (0496) AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + (0497) AREA UserModules (ROM, REL, CON) ; User Module APIs + (0498) + (0499) ; CODE segment for general use + (0500) ; + (0501) AREA text (ROM, REL, CON) + (0502) __text_start: + (0503) + (0504) ; RAM area usage + (0505) ; + (0506) AREA data (RAM, REL, CON) ; initialized RAM + (0507) __data_start: + (0508) + (0509) AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + (0510) AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + (0511) AREA bss (RAM, REL, CON) ; general use + (0512) __bss_start: + (0513) + (0514) ENDIF ; TOOLCHAIN + (0515) + (0516) ; end of file boot.asm +FILE: lib\psocconfigtbl.asm (0001) ; Generated by PSoC Designer 5.3.2710 +039E: 70 EF AND F,0xEF (0002) ; + (0003) include "m8c.inc" + (0004) ; Personalization tables + (0005) export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + (0006) export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + (0007) export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + (0008) AREA lit(rom, rel) + (0009) LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0: + (0010) ; Instance name ADCINC, User Module ADCINC + (0011) ; Instance name ADCINC, Block Name ADC(ASD11) + (0012) db 84h, 90h ;ADCINC_AtoDcr0(ASD11CR0) + (0013) db 85h, 00h ;ADCINC_AtoDcr1(ASD11CR1) + (0014) db 86h, 60h ;ADCINC_AtoDcr2(ASD11CR2) + (0015) db 87h, f8h ;ADCINC_AtoDcr3(ASD11CR3) + (0016) ; Instance name ADCINC, Block Name PWM(DBB00) + (0017) db 23h, 00h ;ADCINC_PWMcr0(DBB00CR0) + (0018) db 21h, 00h ;ADCINC_PWMdr1(DBB00DR1) + (0019) db 22h, 01h ;ADCINC_PWMdr2(DBB00DR2) + (0020) ; Instance name AMUX4_0, User Module AMUX4 + (0021) ; Instance name AMUX4_1, User Module AMUX4 + (0022) ; Instance name DAC6_VGND, User Module DAC6 + (0023) ; Instance name DAC6_VGND, Block Name DAC(ASC10) + (0024) db 80h, 80h ;DAC6_VGND_CR0(ASC10CR0) + (0025) db 81h, 40h ;DAC6_VGND_CR1(ASC10CR1) + (0026) db 82h, a0h ;DAC6_VGND_CR2(ASC10CR2) + (0027) db 83h, 30h ;DAC6_VGND_CR3(ASC10CR3) + (0028) ; Instance name DAC9_Ia, User Module DAC9 + (0029) ; Instance name DAC9_Ia, Block Name LSB(ASD20) + (0030) db 90h, 80h ;DAC9_Ia_LSB_CR0(ASD20CR0) + (0031) db 91h, 80h ;DAC9_Ia_LSB_CR1(ASD20CR1) + (0032) db 92h, 20h ;DAC9_Ia_LSB_CR2(ASD20CR2) + (0033) db 93h, 30h ;DAC9_Ia_LSB_CR3(ASD20CR3) + (0034) ; Instance name DAC9_Ia, Block Name MSB(ASC21) + (0035) db 94h, a0h ;DAC9_Ia_MSB_CR0(ASC21CR0) + (0036) db 95h, 41h ;DAC9_Ia_MSB_CR1(ASC21CR1) + (0037) db 96h, a0h ;DAC9_Ia_MSB_CR2(ASC21CR2) + (0038) db 97h, 34h ;DAC9_Ia_MSB_CR3(ASC21CR3) + (0039) ; Instance name INSAMP, User Module INSAMP + (0040) ; Instance name INSAMP, Block Name INV(ACB00) + (0041) db 71h, ddh ;INSAMP_INV_CR0(ACB00CR0) + (0042) db 72h, 21h ;INSAMP_INV_CR1(ACB00CR1) + (0043) db 73h, 20h ;INSAMP_INV_CR2(ACB00CR2) + (0044) db 70h, 00h ;INSAMP_INV_CR3(ACB00CR3) + (0045) ; Instance name INSAMP, Block Name NON_INV(ACB01) + (0046) db 75h, 1ch ;INSAMP_NON_INV_CR0(ACB01CR0) + (0047) db 76h, 21h ;INSAMP_NON_INV_CR1(ACB01CR1) + (0048) db 77h, 20h ;INSAMP_NON_INV_CR2(ACB01CR2) + (0049) db 74h, 00h ;INSAMP_NON_INV_CR3(ACB01CR3) + (0050) ; Instance name LCD, User Module LCD + (0051) ; Instance name PWM8_Heater, User Module PWM8 + (0052) ; Instance name PWM8_Heater, Block Name PWM8(DBB01) + (0053) db 27h, 00h ;PWM8_Heater_CONTROL_REG(DBB01CR0) + (0054) db 25h, ffh ;PWM8_Heater_PERIOD_REG(DBB01DR1) + (0055) db 26h, 00h ;PWM8_Heater_COMPARE_REG(DBB01DR2) + (0056) ; Instance name PWM8_NB_Out, User Module PWM8 + (0057) ; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + (0058) db 2fh, 00h ;PWM8_NB_Out_CONTROL_REG(DCB03CR0) + (0059) db 2dh, ffh ;PWM8_NB_Out_PERIOD_REG(DCB03DR1) + (0060) db 2eh, 00h ;PWM8_NB_Out_COMPARE_REG(DCB03DR2) + (0061) ; Instance name PWM8_Vout, User Module PWM8 + (0062) ; Instance name PWM8_Vout, Block Name PWM8(DCB02) + (0063) db 2bh, 00h ;PWM8_Vout_CONTROL_REG(DCB02CR0) + (0064) db 29h, ffh ;PWM8_Vout_PERIOD_REG(DCB02DR1) + (0065) db 2ah, 00h ;PWM8_Vout_COMPARE_REG(DCB02DR2) + (0066) ; Instance name SleepTimer, User Module SleepTimer + (0067) ; Global Register values Bank 0 + (0068) db 60h, 09h ; AnalogColumnInputSelect register (AMX_IN) + (0069) db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1) + (0070) db 63h, 3fh ; AnalogReferenceControl register (ARF_CR) + (0071) db 65h, 00h ; AnalogSyncControl register (ASY_CR) + (0072) db e6h, 02h ; DecimatorControl_0 register (DEC_CR0) + (0073) db e7h, 02h ; DecimatorControl_1 register (DEC_CR1) + (0074) db d6h, 00h ; I2CConfig register (I2CCFG) + (0075) db b0h, 00h ; Row_0_InputMux register (RDI0RI) + (0076) db b1h, 00h ; Row_0_InputSync register (RDI0SYN) + (0077) db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS) + (0078) db b3h, 33h ; Row_0_LogicSelect_0 register (RDI0LT0) + (0079) db b4h, 33h ; Row_0_LogicSelect_1 register (RDI0LT1) + (0080) db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0) + (0081) db b6h, 08h ; Row_0_OutputDrive_1 register (RDI0SRO1) + (0082) db ffh + (0083) LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1: + (0084) ; Instance name ADCINC, User Module ADCINC + (0085) ; Instance name ADCINC, Block Name ADC(ASD11) + (0086) ; Instance name ADCINC, Block Name PWM(DBB00) + (0087) db 20h, 31h ;ADCINC_PWMfn(DBB00FN) + (0088) db 21h, 16h ;ADCINC_PWMsl(DBB00IN) + (0089) db 22h, 40h ;ADCINC_PWMos(DBB00OU) + (0090) ; Instance name AMUX4_0, User Module AMUX4 + (0091) ; Instance name AMUX4_1, User Module AMUX4 + (0092) ; Instance name DAC6_VGND, User Module DAC6 + (0093) ; Instance name DAC6_VGND, Block Name DAC(ASC10) + (0094) ; Instance name DAC9_Ia, User Module DAC9 + (0095) ; Instance name DAC9_Ia, Block Name LSB(ASD20) + (0096) ; Instance name DAC9_Ia, Block Name MSB(ASC21) + (0097) ; Instance name INSAMP, User Module INSAMP + (0098) ; Instance name INSAMP, Block Name INV(ACB00) + (0099) ; Instance name INSAMP, Block Name NON_INV(ACB01) + (0100) ; Instance name LCD, User Module LCD + (0101) ; Instance name PWM8_Heater, User Module PWM8 + (0102) ; Instance name PWM8_Heater, Block Name PWM8(DBB01) + (0103) db 24h, 31h ;PWM8_Heater_FUNC_REG(DBB01FN) + (0104) db 25h, 11h ;PWM8_Heater_INPUT_REG(DBB01IN) + (0105) db 26h, 44h ;PWM8_Heater_OUTPUT_REG(DBB01OU) + (0106) ; Instance name PWM8_NB_Out, User Module PWM8 + (0107) ; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + (0108) db 2ch, 31h ;PWM8_NB_Out_FUNC_REG(DCB03FN) + (0109) db 2dh, 14h ;PWM8_NB_Out_INPUT_REG(DCB03IN) + (0110) db 2eh, 06h ;PWM8_NB_Out_OUTPUT_REG(DCB03OU) + (0111) ; Instance name PWM8_Vout, User Module PWM8 + (0112) ; Instance name PWM8_Vout, Block Name PWM8(DCB02) + (0113) db 28h, 31h ;PWM8_Vout_FUNC_REG(DCB02FN) + (0114) db 29h, 14h ;PWM8_Vout_INPUT_REG(DCB02IN) + (0115) db 2ah, 05h ;PWM8_Vout_OUTPUT_REG(DCB02OU) + (0116) ; Instance name SleepTimer, User Module SleepTimer + (0117) ; Global Register values Bank 1 + (0118) db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1) + (0119) db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2) + (0120) db 60h, 05h ; AnalogColumnClockSelect register (CLK_CR0) + (0121) db 62h, 29h ; AnalogIOControl_0 register (ABF_CR0) + (0122) db 67h, 33h ; AnalogLUTControl0 register (ALT_CR0) + (0123) db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1) + (0124) db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0) + (0125) db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1) + (0126) db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN) + (0127) db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU) + (0128) db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN) + (0129) db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU) + (0130) db e1h, 0bh ; OscillatorControl_1 register (OSC_CR1) + (0131) db e2h, 00h ; OscillatorControl_2 register (OSC_CR2) + (0132) db dfh, 2fh ; OscillatorControl_3 register (OSC_CR3) + (0133) db deh, 00h ; OscillatorControl_4 register (OSC_CR4) + (0134) db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN) + (0135) db ffh + (0136) AREA psoc_config(rom, rel) + (0137) LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered: + (0138) ; Ordered Global Register values + (0139) M8C_SetBank0 +03A0: 62 00 00 MOV REG[0x0],0x0 (0140) mov reg[00h], 00h ; Port_0_Data register (PRT0DR) +03A3: 71 10 OR F,0x10 + (0141) M8C_SetBank1 +03A5: 62 00 04 MOV REG[0x0],0x4 (0142) mov reg[00h], 04h ; Port_0_DriveMode_0 register (PRT0DM0) +03A8: 62 01 FB MOV REG[0x1],0xFB (0143) mov reg[01h], fbh ; Port_0_DriveMode_1 register (PRT0DM1) +03AB: 70 EF AND F,0xEF + (0144) M8C_SetBank0 +03AD: 62 03 FB MOV REG[0x3],0xFB (0145) mov reg[03h], fbh ; Port_0_DriveMode_2 register (PRT0DM2) +03B0: 62 02 00 MOV REG[0x2],0x0 (0146) mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS) +03B3: 71 10 OR F,0x10 + (0147) M8C_SetBank1 +03B5: 62 02 00 MOV REG[0x2],0x0 (0148) mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0) +03B8: 62 03 00 MOV REG[0x3],0x0 (0149) mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1) +03BB: 70 EF AND F,0xEF + (0150) M8C_SetBank0 +03BD: 62 01 00 MOV REG[0x1],0x0 (0151) mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE) +03C0: 62 04 00 MOV REG[0x4],0x0 (0152) mov reg[04h], 00h ; Port_1_Data register (PRT1DR) +03C3: 71 10 OR F,0x10 + (0153) M8C_SetBank1 +03C5: 62 04 70 MOV REG[0x4],0x70 (0154) mov reg[04h], 70h ; Port_1_DriveMode_0 register (PRT1DM0) +03C8: 62 05 8F MOV REG[0x5],0x8F (0155) mov reg[05h], 8fh ; Port_1_DriveMode_1 register (PRT1DM1) +03CB: 70 EF AND F,0xEF + (0156) M8C_SetBank0 +03CD: 62 07 8F MOV REG[0x7],0x8F (0157) mov reg[07h], 8fh ; Port_1_DriveMode_2 register (PRT1DM2) +03D0: 62 06 70 MOV REG[0x6],0x70 (0158) mov reg[06h], 70h ; Port_1_GlobalSelect register (PRT1GS) +03D3: 71 10 OR F,0x10 + (0159) M8C_SetBank1 +03D5: 62 06 00 MOV REG[0x6],0x0 (0160) mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0) +03D8: 62 07 00 MOV REG[0x7],0x0 (0161) mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1) +03DB: 70 EF AND F,0xEF + (0162) M8C_SetBank0 +03DD: 62 05 00 MOV REG[0x5],0x0 (0163) mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE) +03E0: 62 08 00 MOV REG[0x8],0x0 (0164) mov reg[08h], 00h ; Port_2_Data register (PRT2DR) +03E3: 71 10 OR F,0x10 + (0165) M8C_SetBank1 +03E5: 62 08 FF MOV REG[0x8],0xFF (0166) mov reg[08h], ffh ; Port_2_DriveMode_0 register (PRT2DM0) +03E8: 62 09 00 MOV REG[0x9],0x0 (0167) mov reg[09h], 00h ; Port_2_DriveMode_1 register (PRT2DM1) +03EB: 70 EF AND F,0xEF + (0168) M8C_SetBank0 +03ED: 62 0B 00 MOV REG[0xB],0x0 (0169) mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2) +03F0: 62 0A 00 MOV REG[0xA],0x0 (0170) mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS) +03F3: 71 10 OR F,0x10 + (0171) M8C_SetBank1 +03F5: 62 0A 00 MOV REG[0xA],0x0 (0172) mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0) +03F8: 62 0B 00 MOV REG[0xB],0x0 (0173) mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1) +03FB: 70 EF AND F,0xEF + (0174) M8C_SetBank0 +03FD: 62 09 00 MOV REG[0x9],0x0 (0175) mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE) +0400: 70 EF AND F,0xEF + (0176) M8C_SetBank0 +0402: 7F RET (0177) ret + (0178) + (0179) + (0180) ; PSoC Configuration file trailer PsocConfig.asm +FILE: lib\psocconfig.asm (0001) ; Generated by PSoC Designer 5.3.2710 + (0002) ; + (0003) ;========================================================================== + (0004) ; PSoCConfig.asm + (0005) ; @PSOC_VERSION + (0006) ; + (0007) ; Version: 0.85 + (0008) ; Revised: June 22, 2004 + (0009) ; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0010) ; + (0011) ; This file is generated by the Device Editor on Application Generation. + (0012) ; It contains code which loads the configuration data table generated in + (0013) ; the file PSoCConfigTBL.asm + (0014) ; + (0015) ; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!! + (0016) ; Edits to this file will not be preserved. + (0017) ;========================================================================== + (0018) ; + (0019) include "m8c.inc" + (0020) include "memory.inc" + (0021) include "GlobalParams.inc" + (0022) + (0023) export LoadConfigInit + (0024) export _LoadConfigInit + (0025) export LoadConfig_slc_free_28_pin_feb_16_2013 + (0026) export _LoadConfig_slc_free_28_pin_feb_16_2013 + (0027) export Port_2_Data_SHADE + (0028) export _Port_2_Data_SHADE + (0029) export Port_2_DriveMode_0_SHADE + (0030) export _Port_2_DriveMode_0_SHADE + (0031) export Port_2_DriveMode_1_SHADE + (0032) export _Port_2_DriveMode_1_SHADE + (0033) + (0034) + (0035) export NO_SHADOW + (0036) export _NO_SHADOW + (0037) + (0038) FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask + (0039) END_CONFIG_TABLE: equ ffh ;end of config table indicator + (0040) + (0041) AREA psoc_config(rom, rel) + (0042) + (0043) ;--------------------------------------------------------------------------- + (0044) ; LoadConfigInit - Establish the start-up configuration (except for a few + (0045) ; parameters handled by boot code, like CPU speed). This + (0046) ; function can be called from user code, but typically it + (0047) ; is only called from boot. + (0048) ; + (0049) ; INPUTS: None. + (0050) ; RETURNS: Nothing. + (0051) ; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified! + (0052) ; In the large memory model currently only the page + (0053) ; pointer registers listed below are modified. This does + (0054) ; not guarantee that in future implementations of this + (0055) ; function other page pointer registers will not be + (0056) ; modified. + (0057) ; + (0058) ; Page Pointer Registers Modified: + (0059) ; CUR_PP + (0060) ; + (0061) _LoadConfigInit: + (0062) LoadConfigInit: + (0063) RAM_PROLOGUE RAM_USE_CLASS_4 + (0064) +0403: 55 36 00 MOV [0x36],0x0 (0065) mov [Port_2_Data_SHADE], 0h +0406: 55 37 FF MOV [0x37],0xFF (0066) mov [Port_2_DriveMode_0_SHADE], ffh +0409: 55 38 00 MOV [0x38],0x0 (0067) mov [Port_2_DriveMode_1_SHADE], 0h + (0068) +040C: 7C 04 13 LCALL 0x0413 (0069) lcall LoadConfig_slc_free_28_pin_feb_16_2013 +040F: 7C 03 9E LCALL 0x039E (0070) lcall LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + (0071) + (0072) + (0073) RAM_EPILOGUE RAM_USE_CLASS_4 +0412: 7F RET (0074) ret + (0075) + (0076) ;--------------------------------------------------------------------------- + (0077) ; Load Configuration slc_free_28_pin_feb_16_2013 + (0078) ; + (0079) ; Load configuration registers for slc_free_28_pin_feb_16_2013. + (0080) ; IO Bank 0 registers a loaded first,then those in IO Bank 1. + (0081) ; + (0082) ; INPUTS: None. + (0083) ; RETURNS: Nothing. + (0084) ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be + (0085) ; modified as may the Page Pointer registers! + (0086) ; In the large memory model currently only the page + (0087) ; pointer registers listed below are modified. This does + (0088) ; not guarantee that in future implementations of this + (0089) ; function other page pointer registers will not be + (0090) ; modified. + (0091) ; + (0092) ; Page Pointer Registers Modified: + (0093) ; CUR_PP + (0094) ; + (0095) _LoadConfig_slc_free_28_pin_feb_16_2013: + (0096) LoadConfig_slc_free_28_pin_feb_16_2013: + (0097) RAM_PROLOGUE RAM_USE_CLASS_4 + (0098) +0413: 10 PUSH X (0099) push x +0414: 70 EF AND F,0xEF + (0100) M8C_SetBank0 ; Force bank 0 +0416: 50 00 MOV A,0x0 (0101) mov a, 0 ; Specify bank 0 +0418: 67 ASR A (0102) asr a ; Store in carry flag + (0103) ; Load bank 0 table: +0419: 50 02 MOV A,0x2 (0104) mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +041B: 57 D7 MOV X,0xD7 (0105) mov X, LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +0425: 57 3C MOV X,0x3C (0112) mov X, Bank 0; Carry=1 => Bank 1) + (0131) ; + (0132) ; RETURNS: nothing. + (0133) ; + (0134) ; STACK FRAME: X-4 I/O Bank 0/1 indicator + (0135) ; X-3 Temporary store for register address + (0136) ; X-2 LSB of config table address + (0137) ; X-1 MSB of config table address + (0138) ; + (0139) LoadConfig: + (0140) RAM_PROLOGUE RAM_USE_CLASS_2 +042E: 38 02 ADD SP,0x2 (0141) add SP, 2 ; Set up local vars +0430: 10 PUSH X (0142) push X ; Save config table address on stack +0431: 08 PUSH A (0143) push A +0432: 4F MOV X,SP (0144) mov X, SP +0433: 56 FC 00 MOV [X-4],0x0 (0145) mov [X-4], 0 ; Set default Destination to Bank 0 +0436: D0 04 JNC 0x043B (0146) jnc .BankSelectSaved ; Carry says Bank 0 is OK +0438: 56 FC 01 MOV [X-4],0x1 (0147) mov [X-4], 1 ; No Carry: default to Bank 1 + (0148) .BankSelectSaved: +043B: 18 POP A (0149) pop A +043C: 20 POP X (0150) pop X +043D: 70 EF AND F,0xEF +043F: 62 E3 00 MOV REG[0xE3],0x0 + (0151) + (0152) LoadConfigLp: + (0153) M8C_SetBank0 ; Switch to bank 0 + (0154) M8C_ClearWDT ; Clear the watchdog for long inits +0442: 10 PUSH X (0155) push X ; Preserve the config table address +0443: 08 PUSH A (0156) push A +0444: 28 ROMX (0157) romx ; Load register address from table +0445: 39 FF CMP A,0xFF (0158) cmp A, END_CONFIG_TABLE ; End of table? +0447: A0 1F JZ 0x0467 (0159) jz EndLoadConfig ; Yes, go wrap it up +0449: 4F MOV X,SP (0160) mov X, SP ; +044A: 48 FC 01 TST [X-4],0x1 (0161) tst [X-4], 1 ; Loading IO Bank 1? +044D: A0 03 JZ 0x0451 (0162) jz .IOBankNowSet ; No, Bank 0 is fine +044F: 71 10 OR F,0x10 + (0163) M8C_SetBank1 ; Yes, switch to Bank 1 + (0164) .IOBankNowSet: +0451: 54 FD MOV [X-3],A (0165) mov [X-3], A ; Stash the register address +0453: 18 POP A (0166) pop A ; Retrieve the table address +0454: 20 POP X (0167) pop X +0455: 75 INC X (0168) inc X ; Advance to the data byte +0456: 09 00 ADC A,0x0 (0169) adc A, 0 +0458: 10 PUSH X (0170) push X ; Save the config table address again +0459: 08 PUSH A (0171) push A +045A: 28 ROMX (0172) romx ; load config data from the table +045B: 4F MOV X,SP (0173) mov X, SP ; retrieve the register address +045C: 59 FD MOV X,[X-3] (0174) mov X, [X-3] +045E: 61 00 MOV REG[X+0x0],A (0175) mov reg[X], A ; Configure the register +0460: 18 POP A (0176) pop A ; retrieve the table address +0461: 20 POP X (0177) pop X +0462: 75 INC X (0178) inc X ; advance to next table entry +0463: 09 00 ADC A,0x0 (0179) adc A, 0 +0465: 8F D7 JMP 0x043D (0180) jmp LoadConfigLp ; loop to configure another register + (0181) EndLoadConfig: +0467: 38 FC ADD SP,0xFC (0182) add SP, -4 + (0183) RAM_EPILOGUE RAM_USE_CLASS_2 +0469: 7F RET (0184) ret + (0185) + (0186) AREA InterruptRAM(ram, rel) + (0187) + (0188) NO_SHADOW: + (0189) _NO_SHADOW: + (0190) ; write only register shadows + (0191) _Port_2_Data_SHADE: + (0192) Port_2_Data_SHADE: BLK 1 + (0193) _Port_2_DriveMode_0_SHADE: + (0194) Port_2_DriveMode_0_SHADE: BLK 1 + (0195) _Port_2_DriveMode_1_SHADE: + (0196) Port_2_DriveMode_1_SHADE: BLK 1 + (0197) +FILE: lib\sleeptimerint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: SleepTimerINT.asm + (0004) ;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: SleepTimer Interrupt Service Routine. + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "SleepTimer.inc" + (0014) include "memory.inc" + (0015) include "m8c.inc" + (0016) + (0017) ;----------------------------------------------- + (0018) ; Global Symbols + (0019) ;----------------------------------------------- + (0020) export _SleepTimer_ISR + (0021) + (0022) + (0023) export SleepTimer_fTick + (0024) export _SleepTimer_fTick + (0025) export SleepTimer_bTimerValue + (0026) export _SleepTimer_bTimerValue + (0027) export SleepTimer_bCountDown + (0028) export _SleepTimer_bCountDown + (0029) export SleepTimer_TickCount + (0030) export _SleepTimer_TickCount + (0031) + (0032) ;----------------------------------------------- + (0033) ; Variable Allocation + (0034) ;----------------------------------------------- + (0035) AREA InterruptRAM (RAM, REL, CON) + (0036) + (0037) SleepTimer_fTick: + (0038) _SleepTimer_fTick: BLK 1 + (0039) + (0040) SleepTimer_bTimerValue: + (0041) _SleepTimer_bTimerValue: BLK 1 + (0042) + (0043) SleepTimer_bCountDown: + (0044) _SleepTimer_bCountDown: BLK 1 + (0045) + (0046) SleepTimer_TickCount: + (0047) _SleepTimer_TickCount: BLK SleepTimer_TICK_CNTR_SIZE + (0048) + (0049) + (0050) + (0051) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0052) ;--------------------------------------------------- + (0053) ; Insert your custom declarations below this banner + (0054) ;--------------------------------------------------- + (0055) + (0056) ;------------------------ + (0057) ; Includes + (0058) ;------------------------ + (0059) + (0060) + (0061) ;------------------------ + (0062) ; Constant Definitions + (0063) ;------------------------ + (0064) + (0065) + (0066) ;------------------------ + (0067) ; Variable Allocation + (0068) ;------------------------ + (0069) + (0070) //14Point7 ASM Code Start + (0071) Sleep_Counter:: // Sleep timer will trigger this ISR @ 512hz, Sleep Counter is used to count the number number of times this happens, Sleep Counter is used to figure how often certain routines should run + (0072) _Sleep_Counter:: BLK 1 + (0073) //14Point7 ASM Code End + (0074) + (0075) ;--------------------------------------------------- + (0076) ; Insert your custom declarations above this banner + (0077) ;--------------------------------------------------- + (0078) ;@PSoC_UserCode_END@ (Do not change this line.) + (0079) + (0080) + (0081) AREA UserModules (ROM, REL, CON) + (0082) + (0083) ;----------------------------------------------------------------------------- + (0084) ; FUNCTION NAME: _SleepTimer_ISR + (0085) ; + (0086) ; DESCRIPTION: + (0087) ; interrupt handler for instance SleepTimer. + (0088) ; + (0089) ; This is a place holder function. If the user requires use of an interrupt + (0090) ; handler for this function, then place code where specified. + (0091) ;----------------------------------------------------------------------------- + (0092) + (0093) _SleepTimer_ISR: + (0094) +046A: 2E 2E 01 OR [0x2E],0x1 (0095) or [SleepTimer_fTick],0x01 ; Set tick flag + (0096) + (0097) ; Decrement CountDown (Sync counter) +046D: 47 30 FF TST [0x30],0xFF (0098) tst [SleepTimer_bCountDown],0xFF +0470: A0 03 JZ 0x0474 (0099) jz .DoTimer +0472: 7A 30 DEC [0x30] (0100) dec [SleepTimer_bCountDown] + (0101) + (0102) .DoTimer: ; Decrement TimerValue, if required +0474: 47 2F FF TST [0x2F],0xFF (0103) tst [SleepTimer_bTimerValue],0xFF +0477: A0 03 JZ 0x047B (0104) jz .IncBigCounter +0479: 7A 2F DEC [0x2F] (0105) dec [SleepTimer_bTimerValue] + (0106) + (0107) .IncBigCounter: ; Increment big tick counter + (0108) IF (SleepTimer_TICK_CNTR_SIZE & 0x04) +047B: 76 34 INC [0x34] (0109) inc [SleepTimer_TickCount+3] +047D: D0 0B JNC 0x0489 (0110) jnc SleepTimer_SLEEP_ISR_END + (0111) +047F: 76 33 INC [0x33] (0112) inc [SleepTimer_TickCount+2] +0481: D0 07 JNC 0x0489 (0113) jnc SleepTimer_SLEEP_ISR_END + (0114) ENDIF + (0115) + (0116) IF (SleepTimer_TICK_CNTR_SIZE & (0x04|0x02)) +0483: 76 32 INC [0x32] (0117) inc [SleepTimer_TickCount+1] +0485: D0 03 JNC 0x0489 (0118) jnc SleepTimer_SLEEP_ISR_END + (0119) ENDIF + (0120) +0487: 76 31 INC [0x31] (0121) inc [SleepTimer_TickCount+0] + (0122) + (0123) SleepTimer_SLEEP_ISR_END: + (0124) + (0125) ;@PSoC_UserCode_BODY_1@ (Do not change this line.) + (0126) ;--------------------------------------------------- + (0127) ; Insert your custom code below this banner + (0128) ;--------------------------------------------------- + (0129) ; NOTE: interrupt service routines must preserve + (0130) ; the values of the A and X CPU registers. + (0131) //14Point7 ASM Code Start +0489: 76 35 INC [0x35] (0132) inc [Sleep_Counter] + (0133) //call LED7SEG_Update + (0134) //14Point7 ASM Code End + (0135) ;--------------------------------------------------- + (0136) ; Insert your custom code above this banner + (0137) ;--------------------------------------------------- + (0138) ;@PSoC_UserCode_END@ (Do not change this line.) + (0139) +048B: 7E RETI (0140) reti + (0141) + (0142) ; end of file SleepTimerINT.asm + (0143) +FILE: lib\sleeptimer.asm (0001) ;;***************************************************************************** +048C: 43 E0 40 OR REG[0xE0],0x40 (0002) ;;***************************************************************************** + (0003) ;; Filename: SleepTimer.asm + (0004) ;; Version: 1.0, Updated on 2012/9/21 at 11:59:23 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: SleepTimer User Module software implementation file for the + (0008) ;; 22/24/27/29xxx families. + (0009) ;; + (0010) ;; + (0011) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0012) ;; arguments and observe the associated "Registers are volatile" policy. + (0013) ;; This means it is the caller's responsibility to preserve any values + (0014) ;; in the X and A registers that are still needed after the API functions + (0015) ;; returns. For Large Memory Model devices it is also the caller's + (0016) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0017) ;; MVW_PP registers. Even though some of these registers may not be modified + (0018) ;; now, there is no guarantee that will remain the case in future releases. + (0019) ;;----------------------------------------------------------------------------- + (0020) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0021) ;;***************************************************************************** + (0022) ;;***************************************************************************** + (0023) + (0024) + (0025) include "m8c.inc" + (0026) include "memory.inc" + (0027) include "SleepTimer.inc" + (0028) + (0029) ;----------------------------------------------- + (0030) ; Global Symbols + (0031) ;----------------------------------------------- + (0032) ;------------------------------------------------------------------- + (0033) ; Declare the functions global for both assembler and C compiler. + (0034) ; + (0035) ; Note that there are two names for each API. First name is + (0036) ; assembler reference. Name with underscore is name reference for + (0037) ; C compiler. Calling function in C source code does not require + (0038) ; the underscore. + (0039) ;------------------------------------------------------------------- + (0040) export SleepTimer_EnableInt + (0041) export _SleepTimer_EnableInt + (0042) export SleepTimer_DisableInt + (0043) export _SleepTimer_DisableInt + (0044) + (0045) export SleepTimer_Start + (0046) export _SleepTimer_Start + (0047) export SleepTimer_Stop + (0048) export _SleepTimer_Stop + (0049) + (0050) export SleepTimer_TickWait + (0051) export _SleepTimer_TickWait + (0052) + (0053) export SleepTimer_SyncWait + (0054) export _SleepTimer_SyncWait + (0055) + (0056) export SleepTimer_SetInterval + (0057) export _SleepTimer_SetInterval + (0058) + (0059) export SleepTimer_bGetTickCntr + (0060) export _SleepTimer_bGetTickCntr + (0061) + (0062) export SleepTimer_SetTimer + (0063) export _SleepTimer_SetTimer + (0064) + (0065) export SleepTimer_bGetTimer + (0066) export _SleepTimer_bGetTimer + (0067) + (0068) IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + (0069) export SleepTimer_iGetTickCntr + (0070) export _SleepTimer_iGetTickCntr + (0071) ENDIF + (0072) + (0073) IF(SleepTimer_TICK_CNTR_SIZE & 4) + (0074) export SleepTimer_lGetTickCntr + (0075) export _SleepTimer_lGetTickCntr + (0076) ENDIF + (0077) + (0078) + (0079) area text (ROM,REL) + (0080) + (0081) ;----------------------------------------------- + (0082) ; EQUATES + (0083) ;----------------------------------------------- + (0084) + (0085) ; Counter LSB Offset if 4 byte tick counter + (0086) IF(SleepTimer_TICK_CNTR_SIZE & 4) + (0087) ST_LSB_OFFSET: equ 3 + (0088) ENDIF + (0089) + (0090) ; Counter LSB Offset if 2 byte tick counter + (0091) IF(SleepTimer_TICK_CNTR_SIZE & 2) + (0092) ST_LSB_OFFSET: equ 1 + (0093) ENDIF + (0094) + (0095) ; Counter LSB Offset if 1 byte tick counter + (0096) IF(SleepTimer_TICK_CNTR_SIZE & 1) + (0097) ST_LSB_OFFSET: equ 0 + (0098) ENDIF + (0099) + (0100) + (0101) area UserModules (ROM, REL, CON) + (0102) + (0103) ;============================================================================= + (0104) ;============================================================================= + (0105) ; + (0106) ; Low-Level Commands + (0107) ; + (0108) ;============================================================================= + (0109) ;============================================================================= + (0110) + (0111) .SECTION + (0112) ;----------------------------------------------------------------------------- + (0113) ; FUNCTION NAME: SleepTimer_EnableInt + (0114) ; + (0115) ; DESCRIPTION: + (0116) ; Enables SleepTimer interrupts. + (0117) ;----------------------------------------------------------------------------- + (0118) ; + (0119) ; ARGUMENTS: + (0120) ; none. + (0121) ; + (0122) ; RETURNS: + (0123) ; none. + (0124) ; + (0125) ; SIDE EFFECTS: + (0126) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0127) ; + (0128) ; THEORY of OPERATION OR PROCEDURE: + (0129) ; + (0130) SleepTimer_EnableInt: + (0131) _SleepTimer_EnableInt: + (0132) RAM_PROLOGUE RAM_USE_CLASS_1 + (0133) M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0134) RAM_EPILOGUE RAM_USE_CLASS_1 +048F: 7F RET (0135) ret + (0136) .ENDSECTION + (0137) + (0138) + (0139) .SECTION + (0140) ;----------------------------------------------------------------------------- + (0141) ; FUNCTION NAME: SleepTimer_DisableInt + (0142) ; + (0143) ; DESCRIPTION: + (0144) ; Disables the sleep timer. + (0145) ; + (0146) ;----------------------------------------------------------------------------- + (0147) ; + (0148) ; ARGUMENTS: + (0149) ; none. + (0150) ; + (0151) ; RETURNS: + (0152) ; none. + (0153) ; + (0154) ; SIDE EFFECTS: + (0155) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0156) ; + (0157) ; THEORY of OPERATION OR PROCEDURE: + (0158) ; + (0159) SleepTimer_DisableInt: + (0160) _SleepTimer_DisableInt: + (0161) RAM_PROLOGUE RAM_USE_CLASS_1 + (0162) M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0163) RAM_EPILOGUE RAM_USE_CLASS_1 + (0164) ret + (0165) .ENDSECTION + (0166) + (0167) + (0168) .SECTION + (0169) ;----------------------------------------------------------------------------- + (0170) ; FUNCTION NAME: SleepTimer_Start() + (0171) ; + (0172) ; DESCRIPTION: + (0173) ; Clears all the variables. + (0174) ;----------------------------------------------------------------------------- + (0175) ; + (0176) ; ARGUMENTS: + (0177) ; none + (0178) ; + (0179) ; RETURNS: + (0180) ; none. + (0181) ; + (0182) ; SIDE EFFECTS; + (0183) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0184) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0185) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0186) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0187) ; REGISTERS WILL NOT BE MODIFIED. + (0188) ; + (0189) ; Page Pointer Registers Modified: + (0190) ; CUR_PP + (0191) ; + (0192) ; THEORY of OPERATION OR PROCEDURE: + (0193) ; + (0194) SleepTimer_Start: + (0195) _SleepTimer_Start: + (0196) RAM_PROLOGUE RAM_USE_CLASS_4 + (0197) RAM_SETPAGE_CUR >SleepTimer_fTick +0490: 50 00 MOV A,0x0 (0198) mov A,0 +0492: 53 2E MOV [0x2E],A (0199) mov [SleepTimer_fTick],A +0494: 53 2F MOV [0x2F],A (0200) mov [SleepTimer_bTimerValue],A +0496: 53 30 MOV [0x30],A (0201) mov [SleepTimer_bCountDown],A +0498: 53 34 MOV [0x34],A (0202) mov [SleepTimer_TickCount + ST_LSB_OFFSET],A ; Clear TickCount[0:7] + (0203) IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +049A: 53 33 MOV [0x33],A (0204) mov [SleepTimer_TickCount + ST_LSB_OFFSET - 1],A ; Clear TickCount[8:15] + (0205) ENDIF + (0206) + (0207) + (0208) IF(SleepTimer_TICK_CNTR_SIZE & 4) +049C: 53 32 MOV [0x32],A (0209) mov [SleepTimer_TickCount + ST_LSB_OFFSET - 2],A ; Clear TickCount[16:31] +049E: 53 31 MOV [0x31],A (0210) mov [SleepTimer_TickCount + ST_LSB_OFFSET - 3],A + (0211) ENDIF + (0212) + (0213) + (0214) RAM_EPILOGUE RAM_USE_CLASS_4 +04A0: 7F RET (0215) ret + (0216) .ENDSECTION + (0217) + (0218) + (0219) .SECTION + (0220) ;----------------------------------------------------------------------------- + (0221) ; FUNCTION NAME: SleepTimer_Stop + (0222) ; + (0223) ; DESCRIPTION: + (0224) ; This function does nothing at this time. It is only here as a place + (0225) ; holder. + (0226) ;----------------------------------------------------------------------------- + (0227) ; + (0228) ; ARGUMENTS: + (0229) ; none. + (0230) ; + (0231) ; RETURNS: + (0232) ; none. + (0233) ; + (0234) ; SIDE EFFECTS: + (0235) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0236) ; + (0237) ; THEORY of OPERATION OR PROCEDURE: + (0238) ; + (0239) SleepTimer_Stop: + (0240) _SleepTimer_Stop: + (0241) RAM_PROLOGUE RAM_USE_CLASS_1 + (0242) RAM_EPILOGUE RAM_USE_CLASS_1 + (0243) ret + (0244) .ENDSECTION + (0245) + (0246) .SECTION + (0247) ;----------------------------------------------------------------------------- + (0248) ; FUNCTION NAME: SleepTimer_SetInterval + (0249) ; + (0250) ; DESCRIPTION: + (0251) ; Sets sleep timer interval + (0252) ; + (0253) ;----------------------------------------------------------------------------- + (0254) ; + (0255) ; ARGUMENTS: + (0256) ; A <= Timer setting + (0257) ; + (0258) ; RETURNS: + (0259) ; none. + (0260) ; + (0261) ; SIDE EFFECTS: + (0262) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0263) ; + (0264) ; THEORY of OPERATION OR PROCEDURE: + (0265) ; + (0266) SleepTimer_SetInterval: + (0267) _SleepTimer_SetInterval: + (0268) RAM_PROLOGUE RAM_USE_CLASS_2 +04A1: 21 18 AND A,0x18 (0269) and A,SleepTimer_CLOCK_MASK ; Mask off invalid data +04A3: 4F MOV X,SP (0270) mov X, SP +04A4: 08 PUSH A (0271) push A +04A5: 71 10 OR F,0x10 + (0272) M8C_SetBank1 +04A7: 5D E0 MOV A,REG[0xE0] (0273) mov A, reg[OSC_CR0] ; Get current timer value +04A9: 21 E7 AND A,0xE7 (0274) and A,~SleepTimer_CLOCK_MASK ; Zero out old timer value +04AB: 2B 00 OR A,[X+0] (0275) or A, [X] ; Set new timer values +04AD: 60 E0 MOV REG[0xE0],A (0276) mov reg[OSC_CR0],A ; Write it +04AF: 70 EF AND F,0xEF + (0277) M8C_SetBank0 +04B1: 18 POP A (0278) pop A + (0279) RAM_EPILOGUE RAM_USE_CLASS_2 +04B2: 7F RET (0280) ret + (0281) .ENDSECTION + (0282) + (0283) + (0284) .SECTION + (0285) ;----------------------------------------------------------------------------- + (0286) ; FUNCTION NAME: SleepTimer_TickWait(BYTE bTicks) + (0287) ; + (0288) ; DESCRIPTION: + (0289) ; Wait X Ticks and return + (0290) ; + (0291) ;----------------------------------------------------------------------------- + (0292) ; + (0293) ; ARGUMENTS: + (0294) ; A <= Count down time + (0295) ; + (0296) ; RETURNS: + (0297) ; none. + (0298) ; + (0299) ; SIDE EFFECTS; + (0300) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0301) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0302) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0303) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0304) ; REGISTERS WILL NOT BE MODIFIED. + (0305) ; + (0306) ; Page Pointer Registers Modified: + (0307) ; CUR_PP + (0308) ; + (0309) ; THEORY of OPERATION OR PROCEDURE: + (0310) ; + (0311) SleepTimer_TickWait: + (0312) _SleepTimer_TickWait: + (0313) RAM_PROLOGUE RAM_USE_CLASS_4 + (0314) RAM_SETPAGE_CUR >SleepTimer_fTick + (0315) mov [SleepTimer_fTick],0x00 ; Clear tick flag + (0316) + (0317) .WaitTick: + (0318) tst [SleepTimer_fTick],0xFF ; Check for tick + (0319) jz .WaitTick + (0320) mov [SleepTimer_fTick],0x00 ; Clear tick flag + (0321) dec A ; Dec the timer variable + (0322) jnz .WaitTick ; Loop until we count down to zero + (0323) + (0324) RAM_EPILOGUE RAM_USE_CLASS_4 + (0325) ret + (0326) .ENDSECTION + (0327) + (0328) + (0329) .SECTION + (0330) ;----------------------------------------------------------------------------- + (0331) ; FUNCTION NAME: SleepTimer_SyncWait(BYTE bCounts, BYTE fMode) + (0332) ; + (0333) ; DESCRIPTION: + (0334) ; This function resets the SyncWait timer. If fMode = 0, the timer + (0335) ; is set to the new value then exits the function immediatly. If fMode + (0336) ; is set to 1, the firmware waits for the timer to expire before the + (0337) ; timer is reset and and exits. + (0338) ; + (0339) ;----------------------------------------------------------------------------- + (0340) ; + (0341) ; ARGUMENTS: + (0342) ; A <= tCounts to wait + (0343) ; X <= fMode fMode = 0 Just reload the value, do not wait + (0344) ; fMode = 1 Wait for last value to count down to zero + (0345) ; then reload. + (0346) ; + (0347) ; RETURNS: + (0348) ; none. + (0349) ; + (0350) ; SIDE EFFECTS; + (0351) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0352) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0353) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0354) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0355) ; REGISTERS WILL NOT BE MODIFIED. + (0356) ; + (0357) ; Page Pointer Registers Modified: + (0358) ; CUR_PP + (0359) ; + (0360) ; THEORY of OPERATION OR PROCEDURE: + (0361) ; + (0362) SleepTimer_SyncWait: + (0363) _SleepTimer_SyncWait: + (0364) RAM_PROLOGUE RAM_USE_CLASS_4 + (0365) RAM_SETPAGE_CUR >SleepTimer_bCountDown + (0366) swap A,X + (0367) AND A,SleepTimer_FORCE_RELOAD + (0368) jnz .ReloadIt + (0369) + (0370) .WaitLoop: + (0371) tst [SleepTimer_bCountDown],0xFF + (0372) jnz .WaitLoop + (0373) + (0374) + (0375) .ReloadIt: + (0376) swap A,X + (0377) mov [SleepTimer_bCountDown],A + (0378) + (0379) RAM_EPILOGUE RAM_USE_CLASS_4 + (0380) ret + (0381) .ENDSECTION + (0382) + (0383) + (0384) + (0385) .SECTION + (0386) ;----------------------------------------------------------------------------- + (0387) ; FUNCTION NAME: SleepTimer_bGetTickCntr + (0388) ; + (0389) ; DESCRIPTION: + (0390) ; Returns the LSB of the tick Counter + (0391) ; + (0392) ;----------------------------------------------------------------------------- + (0393) ; + (0394) ; ARGUMENTS: + (0395) ; none + (0396) ; + (0397) ; RETURNS: + (0398) ; LSB of lTickCount + (0399) ; + (0400) ; SIDE EFFECTS; + (0401) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0402) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0403) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0404) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0405) ; REGISTERS WILL NOT BE MODIFIED. + (0406) ; + (0407) ; Page Pointer Registers Modified: + (0408) ; CUR_PP + (0409) ; + (0410) ; THEORY of OPERATION OR PROCEDURE: + (0411) ; + (0412) SleepTimer_bGetTickCntr: + (0413) _SleepTimer_bGetTickCntr: + (0414) RAM_PROLOGUE RAM_USE_CLASS_4 + (0415) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0416) mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] + (0417) RAM_EPILOGUE RAM_USE_CLASS_4 + (0418) ret + (0419) .ENDSECTION + (0420) + (0421) .SECTION + (0422) ;----------------------------------------------------------------------------- + (0423) ; FUNCTION NAME: SleepTimer_SetTimer + (0424) ; + (0425) ; DESCRIPTION: + (0426) ; Set timer with parameter in A + (0427) ; + (0428) ;----------------------------------------------------------------------------- + (0429) ; + (0430) ; ARGUMENTS: + (0431) ; A => Value used to set Timer value + (0432) ; + (0433) ; RETURNS: + (0434) ; None + (0435) ; + (0436) ; SIDE EFFECTS; + (0437) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0438) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0439) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0440) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0441) ; REGISTERS WILL NOT BE MODIFIED. + (0442) ; + (0443) ; Page Pointer Registers Modified: + (0444) ; CUR_PP + (0445) ; + (0446) ; THEORY of OPERATION OR PROCEDURE: + (0447) ; + (0448) SleepTimer_SetTimer: + (0449) _SleepTimer_SetTimer: + (0450) RAM_PROLOGUE RAM_USE_CLASS_4 + (0451) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0452) mov [SleepTimer_bTimerValue],A + (0453) RAM_EPILOGUE RAM_USE_CLASS_4 + (0454) ret + (0455) .ENDSECTION + (0456) + (0457) .SECTION + (0458) ;----------------------------------------------------------------------------- + (0459) ; FUNCTION NAME: SleepTimer_bGetTimer + (0460) ; + (0461) ; DESCRIPTION: + (0462) ; Returns timer value in A + (0463) ; + (0464) ;----------------------------------------------------------------------------- + (0465) ; + (0466) ; ARGUMENTS: + (0467) ; None + (0468) ; + (0469) ; RETURNS: + (0470) ; Return timer value in A + (0471) ; + (0472) ; SIDE EFFECTS; + (0473) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0474) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0475) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0476) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0477) ; REGISTERS WILL NOT BE MODIFIED. + (0478) ; + (0479) ; Page Pointer Registers Modified: + (0480) ; CUR_PP + (0481) ; + (0482) ; THEORY of OPERATION OR PROCEDURE: + (0483) ; + (0484) SleepTimer_bGetTimer: + (0485) _SleepTimer_bGetTimer: + (0486) RAM_PROLOGUE RAM_USE_CLASS_4 + (0487) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0488) mov A,[SleepTimer_bTimerValue] + (0489) RAM_EPILOGUE RAM_USE_CLASS_4 + (0490) ret + (0491) .ENDSECTION + (0492) + (0493) IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + (0494) .SECTION + (0495) ;----------------------------------------------------------------------------- + (0496) ; FUNCTION NAME: SleepTimer_iGetTickCntr + (0497) ; + (0498) ; DESCRIPTION: + (0499) ; Returns the least significant 16 bits. + (0500) ; + (0501) ;----------------------------------------------------------------------------- + (0502) ; + (0503) ; ARGUMENTS: + (0504) ; none + (0505) ; + (0506) ; RETURNS: + (0507) ; (int)TickCount in A and X + (0508) ; X <= MSB + (0509) ; A <= LSB + (0510) ; + (0511) ; SIDE EFFECTS; + (0512) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0513) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0514) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0515) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0516) ; REGISTERS WILL NOT BE MODIFIED. + (0517) ; + (0518) ; Page Pointer Registers Modified: + (0519) ; CUR_PP + (0520) ; + (0521) ; THEORY of OPERATION OR PROCEDURE: + (0522) ; + (0523) SleepTimer_iGetTickCntr: + (0524) _SleepTimer_iGetTickCntr: + (0525) RAM_PROLOGUE RAM_USE_CLASS_4 + (0526) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0527) ; Disable interrupt here + (0528) M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0529) mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] ; Place LSB in A + (0530) mov X,[SleepTimer_TickCount + ST_LSB_OFFSET - 1] ; Place MSB in X + (0531) M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0532) RAM_EPILOGUE RAM_USE_CLASS_4 + (0533) ret + (0534) .ENDSECTION + (0535) ENDIF + (0536) + (0537) IF(SleepTimer_TICK_CNTR_SIZE & 4) + (0538) .SECTION + (0539) ;----------------------------------------------------------------------------- + (0540) ; FUNCTION NAME: SleepTimer_lGetTickCntr + (0541) ; + (0542) ; DESCRIPTION: + (0543) ; Returns a pointer to TickCount + (0544) ; + (0545) ;----------------------------------------------------------------------------- + (0546) ; + (0547) ; ARGUMENTS: + (0548) ; [A:X] => Pointer to 32 bit tick counter (X=LSB, A=MSB) + (0549) ; + (0550) ; RETURNS: + (0551) ; Pointer to lTickCount + (0552) ; + (0553) ; SIDE EFFECTS; + (0554) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0555) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0556) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0557) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0558) ; REGISTERS WILL NOT BE MODIFIED. + (0559) ; + (0560) ; Page Pointer Registers Modified: + (0561) ; CUR_PP + (0562) ; + (0563) ; THEORY of OPERATION OR PROCEDURE: + (0564) ; + (0565) SleepTimer_lGetTickCntr: + (0566) _SleepTimer_lGetTickCntr: + (0567) RAM_PROLOGUE RAM_USE_CLASS_4 + (0568) RAM_PROLOGUE RAM_USE_CLASS_3 + (0569) ; Disable interrupt here + (0570) M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0571) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0572) RAM_SETPAGE_IDX A + (0573) push A + (0574) mov A,[SleepTimer_TickCount + 0] + (0575) mov [X + 0],A + (0576) mov A,[SleepTimer_TickCount + 1] + (0577) mov [X + 1],A + (0578) mov A,[SleepTimer_TickCount + 2] + (0579) mov [X + 2],A + (0580) mov A,[SleepTimer_TickCount + 3] + (0581) mov [X + 3],A + (0582) pop A + (0583) + (0584) M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0585) RAM_EPILOGUE RAM_USE_CLASS_4 + (0586) RAM_EPILOGUE RAM_USE_CLASS_3 + (0587) ret + (0588) .ENDSECTION + (0589) ENDIF + (0590) + (0591) + (0592) + (0593) + (0594) ; End of File SleepTimer.asm +FILE: lib\pwm8_voutint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_VoutINT.asm + (0004) ;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 Interrupt Service Routine + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "m8c.inc" + (0014) include "PWM8_Vout.inc" + (0015) include "memory.inc" + (0016) + (0017) + (0018) ;----------------------------------------------- + (0019) ; Global Symbols + (0020) ;----------------------------------------------- + (0021) export _PWM8_Vout_ISR + (0022) + (0023) + (0024) AREA InterruptRAM (RAM,REL,CON) + (0025) + (0026) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0027) ;--------------------------------------------------- + (0028) ; Insert your custom declarations below this banner + (0029) ;--------------------------------------------------- + (0030) + (0031) ;------------------------ + (0032) ; Includes + (0033) ;------------------------ + (0034) + (0035) + (0036) ;------------------------ + (0037) ; Constant Definitions + (0038) ;------------------------ + (0039) + (0040) + (0041) ;------------------------ + (0042) ; Variable Allocation + (0043) ;------------------------ + (0044) + (0045) + (0046) ;--------------------------------------------------- + (0047) ; Insert your custom declarations above this banner + (0048) ;--------------------------------------------------- + (0049) ;@PSoC_UserCode_END@ (Do not change this line.) + (0050) + (0051) + (0052) AREA UserModules (ROM, REL) + (0053) + (0054) ;----------------------------------------------------------------------------- + (0055) ; FUNCTION NAME: _PWM8_Vout_ISR + (0056) ; + (0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub. + (0058) ; + (0059) ;----------------------------------------------------------------------------- + (0060) ; + (0061) + (0062) _PWM8_Vout_ISR: + (0063) + (0064) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0065) ;--------------------------------------------------- + (0066) ; Insert your custom code below this banner + (0067) ;--------------------------------------------------- + (0068) ; NOTE: interrupt service routines must preserve + (0069) ; the values of the A and X CPU registers. + (0070) + (0071) ;--------------------------------------------------- + (0072) ; Insert your custom code above this banner + (0073) ;--------------------------------------------------- + (0074) ;@PSoC_UserCode_END@ (Do not change this line.) + (0075) +04B3: 7E RETI (0076) reti + (0077) + (0078) + (0079) ; end of file PWM8_VoutINT.asm +FILE: lib\pwm8_vout.asm (0001) ;;***************************************************************************** +04B4: 41 E1 FB AND REG[0xE1],0xFB (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_Vout.asm + (0004) ;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 User Module software implementation file + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "m8c.inc" + (0023) include "PWM8_Vout.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export PWM8_Vout_EnableInt + (0030) export _PWM8_Vout_EnableInt + (0031) export PWM8_Vout_DisableInt + (0032) export _PWM8_Vout_DisableInt + (0033) export PWM8_Vout_Start + (0034) export _PWM8_Vout_Start + (0035) export PWM8_Vout_Stop + (0036) export _PWM8_Vout_Stop + (0037) export PWM8_Vout_WritePeriod + (0038) export _PWM8_Vout_WritePeriod + (0039) export PWM8_Vout_WritePulseWidth + (0040) export _PWM8_Vout_WritePulseWidth + (0041) export PWM8_Vout_bReadPulseWidth + (0042) export _PWM8_Vout_bReadPulseWidth + (0043) export PWM8_Vout_bReadCounter + (0044) export _PWM8_Vout_bReadCounter + (0045) + (0046) ; The following functions are deprecated and subject to omission in future releases + (0047) ; + (0048) export bPWM8_Vout_ReadPulseWidth ; deprecated + (0049) export _bPWM8_Vout_ReadPulseWidth ; deprecated + (0050) export bPWM8_Vout_ReadCounter ; deprecated + (0051) export _bPWM8_Vout_ReadCounter ; deprecated + (0052) + (0053) + (0054) AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + (0055) + (0056) ;----------------------------------------------- + (0057) ; Constant Definitions + (0058) ;----------------------------------------------- + (0059) + (0060) INPUT_REG_NULL: equ 0x00 ; Clear the input register + (0061) + (0062) + (0063) ;----------------------------------------------- + (0064) ; Variable Allocation + (0065) ;----------------------------------------------- + (0066) + (0067) + (0068) AREA UserModules (ROM, REL) + (0069) + (0070) .SECTION + (0071) ;----------------------------------------------------------------------------- + (0072) ; FUNCTION NAME: PWM8_Vout_EnableInt + (0073) ; + (0074) ; DESCRIPTION: + (0075) ; Enables this PWM's interrupt by setting the interrupt enable mask bit + (0076) ; associated with this User Module. This function has no effect until and + (0077) ; unless the global interrupts are enabled (for example by using the + (0078) ; macro M8C_EnableGInt). + (0079) ;----------------------------------------------------------------------------- + (0080) ; + (0081) ; ARGUMENTS: None. + (0082) ; RETURNS: Nothing. + (0083) ; SIDE EFFECTS: + (0084) ; The A and X registers may be modified by this or future implementations + (0085) ; of this function. The same is true for all RAM page pointer registers in + (0086) ; the Large Memory Model. When necessary, it is the calling function's + (0087) ; responsibility to perserve their values across calls to fastcall16 + (0088) ; functions. + (0089) ; + (0090) PWM8_Vout_EnableInt: + (0091) _PWM8_Vout_EnableInt: + (0092) RAM_PROLOGUE RAM_USE_CLASS_1 + (0093) PWM8_Vout_EnableInt_M + (0094) RAM_EPILOGUE RAM_USE_CLASS_1 + (0095) ret + (0096) + (0097) + (0098) .ENDSECTION + (0099) + (0100) .SECTION + (0101) ;----------------------------------------------------------------------------- + (0102) ; FUNCTION NAME: PWM8_Vout_DisableInt + (0103) ; + (0104) ; DESCRIPTION: + (0105) ; Disables this PWM's interrupt by clearing the interrupt enable + (0106) ; mask bit associated with this User Module. + (0107) ;----------------------------------------------------------------------------- + (0108) ; + (0109) ; ARGUMENTS: None + (0110) ; RETURNS: Nothing + (0111) ; SIDE EFFECTS: + (0112) ; The A and X registers may be modified by this or future implementations + (0113) ; of this function. The same is true for all RAM page pointer registers in + (0114) ; the Large Memory Model. When necessary, it is the calling function's + (0115) ; responsibility to perserve their values across calls to fastcall16 + (0116) ; functions. + (0117) ; + (0118) PWM8_Vout_DisableInt: + (0119) _PWM8_Vout_DisableInt: + (0120) RAM_PROLOGUE RAM_USE_CLASS_1 + (0121) PWM8_Vout_DisableInt_M + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +04B7: 7F RET (0123) ret +04B8: 43 2B 01 OR REG[0x2B],0x1 + (0124) + (0125) + (0126) .ENDSECTION + (0127) + (0128) .SECTION + (0129) ;----------------------------------------------------------------------------- + (0130) ; FUNCTION NAME: PWM8_Vout_Start + (0131) ; + (0132) ; DESCRIPTION: + (0133) ; Sets the start bit in the Control register of this user module. The + (0134) ; PWM will begin counting on the next input clock as soon as the + (0135) ; enable input is asserted high. + (0136) ;----------------------------------------------------------------------------- + (0137) ; + (0138) ; ARGUMENTS: None + (0139) ; RETURNS: Nothing + (0140) ; SIDE EFFECTS: + (0141) ; The A and X registers may be modified by this or future implementations + (0142) ; of this function. The same is true for all RAM page pointer registers in + (0143) ; the Large Memory Model. When necessary, it is the calling function's + (0144) ; responsibility to perserve their values across calls to fastcall16 + (0145) ; functions. + (0146) ; + (0147) PWM8_Vout_Start: + (0148) _PWM8_Vout_Start: + (0149) RAM_PROLOGUE RAM_USE_CLASS_1 + (0150) PWM8_Vout_Start_M + (0151) RAM_EPILOGUE RAM_USE_CLASS_1 +04BB: 7F RET (0152) ret + (0153) + (0154) + (0155) .ENDSECTION + (0156) + (0157) .SECTION + (0158) ;----------------------------------------------------------------------------- + (0159) ; FUNCTION NAME: PWM8_Vout_Stop + (0160) ; + (0161) ; DESCRIPTION: + (0162) ; Disables PWM operation by clearing the start bit in the Control + (0163) ; register. + (0164) ;----------------------------------------------------------------------------- + (0165) ; + (0166) ; ARGUMENTS: None + (0167) ; RETURNS: Nothing + (0168) ; SIDE EFFECTS: + (0169) ; The A and X registers may be modified by this or future implementations + (0170) ; of this function. The same is true for all RAM page pointer registers in + (0171) ; the Large Memory Model. When necessary, it is the calling function's + (0172) ; responsibility to perserve their values across calls to fastcall16 + (0173) ; functions. + (0174) ; + (0175) PWM8_Vout_Stop: + (0176) _PWM8_Vout_Stop: + (0177) RAM_PROLOGUE RAM_USE_CLASS_1 + (0178) PWM8_Vout_Stop_M + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) + (0183) .ENDSECTION + (0184) + (0185) .SECTION + (0186) ;----------------------------------------------------------------------------- + (0187) ; FUNCTION NAME: PWM8_Vout_WritePeriod + (0188) ; + (0189) ; DESCRIPTION: + (0190) ; Write the 8-bit period value into the Period register (DR1). + (0191) ;----------------------------------------------------------------------------- + (0192) ; + (0193) ; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) + (0194) ; RETURNS: Nothing + (0195) ; SIDE EFFECTS: + (0196) ; If the PWM user module is stopped, then this value will also be + (0197) ; latched into the Count register (DR0). + (0198) ; + (0199) ; The A and X registers may be modified by this or future implementations + (0200) ; of this function. The same is true for all RAM page pointer registers in + (0201) ; the Large Memory Model. When necessary, it is the calling function's + (0202) ; responsibility to perserve their values across calls to fastcall16 + (0203) ; functions. + (0204) ; + (0205) PWM8_Vout_WritePeriod: + (0206) _PWM8_Vout_WritePeriod: + (0207) RAM_PROLOGUE RAM_USE_CLASS_1 + (0208) mov reg[PWM8_Vout_PERIOD_REG], A + (0209) RAM_EPILOGUE RAM_USE_CLASS_1 + (0210) ret + (0211) + (0212) + (0213) .ENDSECTION + (0214) + (0215) .SECTION + (0216) ;----------------------------------------------------------------------------- + (0217) ; FUNCTION NAME: PWM8_Vout_WritePulseWidth + (0218) ; + (0219) ; DESCRIPTION: + (0220) ; Writes compare value into the Compare register (DR2). + (0221) ;----------------------------------------------------------------------------- + (0222) ; + (0223) ; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) + (0224) ; RETURNS: Nothing + (0225) ; SIDE EFFECTS: + (0226) ; The A and X registers may be modified by this or future implementations + (0227) ; of this function. The same is true for all RAM page pointer registers in + (0228) ; the Large Memory Model. When necessary, it is the calling function's + (0229) ; responsibility to perserve their values across calls to fastcall16 + (0230) ; functions. + (0231) ; + (0232) PWM8_Vout_WritePulseWidth: + (0233) _PWM8_Vout_WritePulseWidth: + (0234) RAM_PROLOGUE RAM_USE_CLASS_1 +04BC: 60 2A MOV REG[0x2A],A (0235) mov reg[PWM8_Vout_COMPARE_REG], A + (0236) RAM_EPILOGUE RAM_USE_CLASS_1 +04BE: 7F RET (0237) ret + (0238) + (0239) + (0240) .ENDSECTION + (0241) + (0242) .SECTION + (0243) ;----------------------------------------------------------------------------- + (0244) ; FUNCTION NAME: PWM8_Vout_bReadPulseWidth + (0245) ; + (0246) ; DESCRIPTION: + (0247) ; Reads the Compare register. + (0248) ;----------------------------------------------------------------------------- + (0249) ; + (0250) ; ARGUMENTS: None + (0251) ; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) + (0252) ; SIDE EFFECTS: + (0253) ; The A and X registers may be modified by this or future implementations + (0254) ; of this function. The same is true for all RAM page pointer registers in + (0255) ; the Large Memory Model. When necessary, it is the calling function's + (0256) ; responsibility to perserve their values across calls to fastcall16 + (0257) ; functions. + (0258) ; + (0259) PWM8_Vout_bReadPulseWidth: + (0260) _PWM8_Vout_bReadPulseWidth: + (0261) bPWM8_Vout_ReadPulseWidth: ; this name deprecated + (0262) _bPWM8_Vout_ReadPulseWidth: ; this name deprecated + (0263) RAM_PROLOGUE RAM_USE_CLASS_1 + (0264) mov A, reg[PWM8_Vout_COMPARE_REG] + (0265) RAM_EPILOGUE RAM_USE_CLASS_1 + (0266) ret + (0267) + (0268) + (0269) .ENDSECTION + (0270) + (0271) .SECTION + (0272) ;----------------------------------------------------------------------------- + (0273) ; FUNCTION NAME: PWM8_Vout_bReadCounter + (0274) ; + (0275) ; DESCRIPTION: + (0276) ; Returns the value in the Count register (DR0), preserving the value in + (0277) ; the compare register (DR2). Interrupts are prevented during the transfer + (0278) ; from the Count to the Compare registers by holding the clock low in + (0279) ; the PSoC block. + (0280) ;----------------------------------------------------------------------------- + (0281) ; + (0282) ; ARGUMENTS: None + (0283) ; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) + (0284) ; SIDE EFFECTS: + (0285) ; 1) The user module is stopped momentarily and one or more counts may be missed. + (0286) ; 2) The A and X registers may be modified by this or future implementations + (0287) ; of this function. The same is true for all RAM page pointer registers in + (0288) ; the Large Memory Model. When necessary, it is the calling function's + (0289) ; responsibility to perserve their values across calls to fastcall16 + (0290) ; functions. + (0291) ; + (0292) PWM8_Vout_bReadCounter: + (0293) _PWM8_Vout_bReadCounter: + (0294) bPWM8_Vout_ReadCounter: ; this name deprecated + (0295) _bPWM8_Vout_ReadCounter: ; this name deprecated + (0296) + (0297) bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + (0298) bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + (0299) wCounter: EQU 2 ; Frame offset to temp Count store + (0300) STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + (0301) + (0302) RAM_PROLOGUE RAM_USE_CLASS_2 + (0303) mov X, SP ; X <- stack frame pointer + (0304) mov A, reg[PWM8_Vout_COMPARE_REG] ; Save the Compare register on the stack + (0305) push A ; + (0306) PWM8_Vout_Stop_M ; Disable (stop) the PWM + (0307) M8C_SetBank1 ; + (0308) mov A, reg[PWM8_Vout_INPUT_REG] ; save the clock input setting + (0309) push A ; on the stack (now 2 bytes) and ... + (0310) ; hold the clock low: + (0311) mov reg[PWM8_Vout_INPUT_REG], INPUT_REG_NULL + (0312) M8C_SetBank0 + (0313) ; Extract the Count via DR2 register + (0314) mov A, reg[PWM8_Vout_COUNTER_REG] ; DR2 <- DR0 + (0315) mov A, reg[PWM8_Vout_COMPARE_REG] ; Stash the Count on the stack + (0316) push A ; -stack frame is now 3 bytes + (0317) mov A, [X+bOrigCompareValue] ; Restore the Compare register + (0318) mov reg[PWM8_Vout_COMPARE_REG], A + (0319) M8C_SetBank1 ; Restore the PWM operation: + (0320) mov A, [X+bOrigClockSetting] ; First, the clock setting... + (0321) mov reg[PWM8_Vout_INPUT_REG], A ; + (0322) M8C_SetBank0 ; + (0323) PWM8_Vout_Start_M ; then re-enable the PWM. + (0324) pop A ; Setup the return value + (0325) ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + (0326) RAM_EPILOGUE RAM_USE_CLASS_2 + (0327) ret + (0328) + (0329) .ENDSECTION + (0330) + (0331) ; End of File PWM8_Vout.asm +FILE: lib\pwm8_nb_outint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_NB_OutINT.asm + (0004) ;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 Interrupt Service Routine + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "m8c.inc" + (0014) include "PWM8_NB_Out.inc" + (0015) include "memory.inc" + (0016) + (0017) + (0018) ;----------------------------------------------- + (0019) ; Global Symbols + (0020) ;----------------------------------------------- + (0021) export _PWM8_NB_Out_ISR + (0022) + (0023) + (0024) AREA InterruptRAM (RAM,REL,CON) + (0025) + (0026) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0027) ;--------------------------------------------------- + (0028) ; Insert your custom declarations below this banner + (0029) ;--------------------------------------------------- + (0030) + (0031) ;------------------------ + (0032) ; Includes + (0033) ;------------------------ + (0034) + (0035) + (0036) ;------------------------ + (0037) ; Constant Definitions + (0038) ;------------------------ + (0039) + (0040) + (0041) ;------------------------ + (0042) ; Variable Allocation + (0043) ;------------------------ + (0044) + (0045) + (0046) ;--------------------------------------------------- + (0047) ; Insert your custom declarations above this banner + (0048) ;--------------------------------------------------- + (0049) ;@PSoC_UserCode_END@ (Do not change this line.) + (0050) + (0051) + (0052) AREA UserModules (ROM, REL) + (0053) + (0054) ;----------------------------------------------------------------------------- + (0055) ; FUNCTION NAME: _PWM8_NB_Out_ISR + (0056) ; + (0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub. + (0058) ; + (0059) ;----------------------------------------------------------------------------- + (0060) ; + (0061) + (0062) _PWM8_NB_Out_ISR: + (0063) + (0064) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0065) ;--------------------------------------------------- + (0066) ; Insert your custom assembly code below this banner + (0067) ;--------------------------------------------------- + (0068) ; NOTE: interrupt service routines must preserve + (0069) ; the values of the A and X CPU registers. + (0070) + (0071) ;--------------------------------------------------- + (0072) ; Insert your custom assembly code above this banner + (0073) ;--------------------------------------------------- + (0074) + (0075) ;--------------------------------------------------- + (0076) ; Insert a lcall to a C function below this banner + (0077) ; and un-comment the lines between these banners + (0078) ;--------------------------------------------------- + (0079) + (0080) ;PRESERVE_CPU_CONTEXT + (0081) ;lcall _My_C_Function + (0082) ;RESTORE_CPU_CONTEXT + (0083) + (0084) ;--------------------------------------------------- + (0085) ; Insert a lcall to a C function above this banner + (0086) ; and un-comment the lines between these banners + (0087) ;--------------------------------------------------- + (0088) ;@PSoC_UserCode_END@ (Do not change this line.) + (0089) +04BF: 7E RETI (0090) reti + (0091) + (0092) + (0093) ; end of file PWM8_NB_OutINT.asm +FILE: lib\pwm8_nb_out.asm (0001) ;;***************************************************************************** +04C0: 41 E1 F7 AND REG[0xE1],0xF7 (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_NB_Out.asm + (0004) ;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 User Module software implementation file + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "m8c.inc" + (0023) include "PWM8_NB_Out.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export PWM8_NB_Out_EnableInt + (0030) export _PWM8_NB_Out_EnableInt + (0031) export PWM8_NB_Out_DisableInt + (0032) export _PWM8_NB_Out_DisableInt + (0033) export PWM8_NB_Out_Start + (0034) export _PWM8_NB_Out_Start + (0035) export PWM8_NB_Out_Stop + (0036) export _PWM8_NB_Out_Stop + (0037) export PWM8_NB_Out_WritePeriod + (0038) export _PWM8_NB_Out_WritePeriod + (0039) export PWM8_NB_Out_WritePulseWidth + (0040) export _PWM8_NB_Out_WritePulseWidth + (0041) export PWM8_NB_Out_bReadPulseWidth + (0042) export _PWM8_NB_Out_bReadPulseWidth + (0043) export PWM8_NB_Out_bReadCounter + (0044) export _PWM8_NB_Out_bReadCounter + (0045) + (0046) ; The following functions are deprecated and subject to omission in future releases + (0047) ; + (0048) export bPWM8_NB_Out_ReadPulseWidth ; deprecated + (0049) export _bPWM8_NB_Out_ReadPulseWidth ; deprecated + (0050) export bPWM8_NB_Out_ReadCounter ; deprecated + (0051) export _bPWM8_NB_Out_ReadCounter ; deprecated + (0052) + (0053) + (0054) AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + (0055) + (0056) ;----------------------------------------------- + (0057) ; Constant Definitions + (0058) ;----------------------------------------------- + (0059) + (0060) INPUT_REG_NULL: equ 0x00 ; Clear the input register + (0061) + (0062) + (0063) ;----------------------------------------------- + (0064) ; Variable Allocation + (0065) ;----------------------------------------------- + (0066) + (0067) + (0068) AREA UserModules (ROM, REL) + (0069) + (0070) .SECTION + (0071) ;----------------------------------------------------------------------------- + (0072) ; FUNCTION NAME: PWM8_NB_Out_EnableInt + (0073) ; + (0074) ; DESCRIPTION: + (0075) ; Enables this PWM's interrupt by setting the interrupt enable mask bit + (0076) ; associated with this User Module. This function has no effect until and + (0077) ; unless the global interrupts are enabled (for example by using the + (0078) ; macro M8C_EnableGInt). + (0079) ;----------------------------------------------------------------------------- + (0080) ; + (0081) ; ARGUMENTS: None. + (0082) ; RETURNS: Nothing. + (0083) ; SIDE EFFECTS: + (0084) ; The A and X registers may be modified by this or future implementations + (0085) ; of this function. The same is true for all RAM page pointer registers in + (0086) ; the Large Memory Model. When necessary, it is the calling function's + (0087) ; responsibility to perserve their values across calls to fastcall16 + (0088) ; functions. + (0089) ; + (0090) PWM8_NB_Out_EnableInt: + (0091) _PWM8_NB_Out_EnableInt: + (0092) RAM_PROLOGUE RAM_USE_CLASS_1 + (0093) PWM8_NB_Out_EnableInt_M + (0094) RAM_EPILOGUE RAM_USE_CLASS_1 + (0095) ret + (0096) + (0097) + (0098) .ENDSECTION + (0099) + (0100) .SECTION + (0101) ;----------------------------------------------------------------------------- + (0102) ; FUNCTION NAME: PWM8_NB_Out_DisableInt + (0103) ; + (0104) ; DESCRIPTION: + (0105) ; Disables this PWM's interrupt by clearing the interrupt enable + (0106) ; mask bit associated with this User Module. + (0107) ;----------------------------------------------------------------------------- + (0108) ; + (0109) ; ARGUMENTS: None + (0110) ; RETURNS: Nothing + (0111) ; SIDE EFFECTS: + (0112) ; The A and X registers may be modified by this or future implementations + (0113) ; of this function. The same is true for all RAM page pointer registers in + (0114) ; the Large Memory Model. When necessary, it is the calling function's + (0115) ; responsibility to perserve their values across calls to fastcall16 + (0116) ; functions. + (0117) ; + (0118) PWM8_NB_Out_DisableInt: + (0119) _PWM8_NB_Out_DisableInt: + (0120) RAM_PROLOGUE RAM_USE_CLASS_1 + (0121) PWM8_NB_Out_DisableInt_M + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +04C3: 7F RET (0123) ret +04C4: 43 2F 01 OR REG[0x2F],0x1 + (0124) + (0125) + (0126) .ENDSECTION + (0127) + (0128) .SECTION + (0129) ;----------------------------------------------------------------------------- + (0130) ; FUNCTION NAME: PWM8_NB_Out_Start + (0131) ; + (0132) ; DESCRIPTION: + (0133) ; Sets the start bit in the Control register of this user module. The + (0134) ; PWM will begin counting on the next input clock as soon as the + (0135) ; enable input is asserted high. + (0136) ;----------------------------------------------------------------------------- + (0137) ; + (0138) ; ARGUMENTS: None + (0139) ; RETURNS: Nothing + (0140) ; SIDE EFFECTS: + (0141) ; The A and X registers may be modified by this or future implementations + (0142) ; of this function. The same is true for all RAM page pointer registers in + (0143) ; the Large Memory Model. When necessary, it is the calling function's + (0144) ; responsibility to perserve their values across calls to fastcall16 + (0145) ; functions. + (0146) ; + (0147) PWM8_NB_Out_Start: + (0148) _PWM8_NB_Out_Start: + (0149) RAM_PROLOGUE RAM_USE_CLASS_1 + (0150) PWM8_NB_Out_Start_M + (0151) RAM_EPILOGUE RAM_USE_CLASS_1 +04C7: 7F RET (0152) ret + (0153) + (0154) + (0155) .ENDSECTION + (0156) + (0157) .SECTION + (0158) ;----------------------------------------------------------------------------- + (0159) ; FUNCTION NAME: PWM8_NB_Out_Stop + (0160) ; + (0161) ; DESCRIPTION: + (0162) ; Disables PWM operation by clearing the start bit in the Control + (0163) ; register. + (0164) ;----------------------------------------------------------------------------- + (0165) ; + (0166) ; ARGUMENTS: None + (0167) ; RETURNS: Nothing + (0168) ; SIDE EFFECTS: + (0169) ; The A and X registers may be modified by this or future implementations + (0170) ; of this function. The same is true for all RAM page pointer registers in + (0171) ; the Large Memory Model. When necessary, it is the calling function's + (0172) ; responsibility to perserve their values across calls to fastcall16 + (0173) ; functions. + (0174) ; + (0175) PWM8_NB_Out_Stop: + (0176) _PWM8_NB_Out_Stop: + (0177) RAM_PROLOGUE RAM_USE_CLASS_1 + (0178) PWM8_NB_Out_Stop_M + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) + (0183) .ENDSECTION + (0184) + (0185) .SECTION + (0186) ;----------------------------------------------------------------------------- + (0187) ; FUNCTION NAME: PWM8_NB_Out_WritePeriod + (0188) ; + (0189) ; DESCRIPTION: + (0190) ; Write the 8-bit period value into the Period register (DR1). + (0191) ;----------------------------------------------------------------------------- + (0192) ; + (0193) ; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) + (0194) ; RETURNS: Nothing + (0195) ; SIDE EFFECTS: + (0196) ; If the PWM user module is stopped, then this value will also be + (0197) ; latched into the Count register (DR0). + (0198) ; + (0199) ; The A and X registers may be modified by this or future implementations + (0200) ; of this function. The same is true for all RAM page pointer registers in + (0201) ; the Large Memory Model. When necessary, it is the calling function's + (0202) ; responsibility to perserve their values across calls to fastcall16 + (0203) ; functions. + (0204) ; + (0205) PWM8_NB_Out_WritePeriod: + (0206) _PWM8_NB_Out_WritePeriod: + (0207) RAM_PROLOGUE RAM_USE_CLASS_1 + (0208) mov reg[PWM8_NB_Out_PERIOD_REG], A + (0209) RAM_EPILOGUE RAM_USE_CLASS_1 + (0210) ret + (0211) + (0212) + (0213) .ENDSECTION + (0214) + (0215) .SECTION + (0216) ;----------------------------------------------------------------------------- + (0217) ; FUNCTION NAME: PWM8_NB_Out_WritePulseWidth + (0218) ; + (0219) ; DESCRIPTION: + (0220) ; Writes compare value into the Compare register (DR2). + (0221) ;----------------------------------------------------------------------------- + (0222) ; + (0223) ; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) + (0224) ; RETURNS: Nothing + (0225) ; SIDE EFFECTS: + (0226) ; The A and X registers may be modified by this or future implementations + (0227) ; of this function. The same is true for all RAM page pointer registers in + (0228) ; the Large Memory Model. When necessary, it is the calling function's + (0229) ; responsibility to perserve their values across calls to fastcall16 + (0230) ; functions. + (0231) ; + (0232) PWM8_NB_Out_WritePulseWidth: + (0233) _PWM8_NB_Out_WritePulseWidth: + (0234) RAM_PROLOGUE RAM_USE_CLASS_1 +04C8: 60 2E MOV REG[0x2E],A (0235) mov reg[PWM8_NB_Out_COMPARE_REG], A + (0236) RAM_EPILOGUE RAM_USE_CLASS_1 +04CA: 7F RET (0237) ret + (0238) + (0239) + (0240) .ENDSECTION + (0241) + (0242) .SECTION + (0243) ;----------------------------------------------------------------------------- + (0244) ; FUNCTION NAME: PWM8_NB_Out_bReadPulseWidth + (0245) ; + (0246) ; DESCRIPTION: + (0247) ; Reads the Compare register. + (0248) ;----------------------------------------------------------------------------- + (0249) ; + (0250) ; ARGUMENTS: None + (0251) ; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) + (0252) ; SIDE EFFECTS: + (0253) ; The A and X registers may be modified by this or future implementations + (0254) ; of this function. The same is true for all RAM page pointer registers in + (0255) ; the Large Memory Model. When necessary, it is the calling function's + (0256) ; responsibility to perserve their values across calls to fastcall16 + (0257) ; functions. + (0258) ; + (0259) PWM8_NB_Out_bReadPulseWidth: + (0260) _PWM8_NB_Out_bReadPulseWidth: + (0261) bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + (0262) _bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + (0263) RAM_PROLOGUE RAM_USE_CLASS_1 + (0264) mov A, reg[PWM8_NB_Out_COMPARE_REG] + (0265) RAM_EPILOGUE RAM_USE_CLASS_1 + (0266) ret + (0267) + (0268) + (0269) .ENDSECTION + (0270) + (0271) .SECTION + (0272) ;----------------------------------------------------------------------------- + (0273) ; FUNCTION NAME: PWM8_NB_Out_bReadCounter + (0274) ; + (0275) ; DESCRIPTION: + (0276) ; Returns the value in the Count register (DR0), preserving the value in + (0277) ; the compare register (DR2). Interrupts are prevented during the transfer + (0278) ; from the Count to the Compare registers by holding the clock low in + (0279) ; the PSoC block. + (0280) ;----------------------------------------------------------------------------- + (0281) ; + (0282) ; ARGUMENTS: None + (0283) ; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) + (0284) ; SIDE EFFECTS: + (0285) ; 1) The user module is stopped momentarily and one or more counts may be missed. + (0286) ; 2) The A and X registers may be modified by this or future implementations + (0287) ; of this function. The same is true for all RAM page pointer registers in + (0288) ; the Large Memory Model. When necessary, it is the calling function's + (0289) ; responsibility to perserve their values across calls to fastcall16 + (0290) ; functions. + (0291) ; + (0292) PWM8_NB_Out_bReadCounter: + (0293) _PWM8_NB_Out_bReadCounter: + (0294) bPWM8_NB_Out_ReadCounter: ; this name deprecated + (0295) _bPWM8_NB_Out_ReadCounter: ; this name deprecated + (0296) + (0297) bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + (0298) bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + (0299) wCounter: EQU 2 ; Frame offset to temp Count store + (0300) STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + (0301) + (0302) RAM_PROLOGUE RAM_USE_CLASS_2 + (0303) mov X, SP ; X <- stack frame pointer + (0304) mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Save the Compare register on the stack + (0305) push A ; + (0306) PWM8_NB_Out_Stop_M ; Disable (stop) the PWM + (0307) M8C_SetBank1 ; + (0308) mov A, reg[PWM8_NB_Out_INPUT_REG] ; save the clock input setting + (0309) push A ; on the stack (now 2 bytes) and ... + (0310) ; hold the clock low: + (0311) mov reg[PWM8_NB_Out_INPUT_REG], INPUT_REG_NULL + (0312) M8C_SetBank0 + (0313) ; Extract the Count via DR2 register + (0314) mov A, reg[PWM8_NB_Out_COUNTER_REG] ; DR2 <- DR0 + (0315) mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Stash the Count on the stack + (0316) push A ; -stack frame is now 3 bytes + (0317) mov A, [X+bOrigCompareValue] ; Restore the Compare register + (0318) mov reg[PWM8_NB_Out_COMPARE_REG], A + (0319) M8C_SetBank1 ; Restore the PWM operation: + (0320) mov A, [X+bOrigClockSetting] ; First, the clock setting... + (0321) mov reg[PWM8_NB_Out_INPUT_REG], A ; + (0322) M8C_SetBank0 ; + (0323) PWM8_NB_Out_Start_M ; then re-enable the PWM. + (0324) pop A ; Setup the return value + (0325) ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + (0326) RAM_EPILOGUE RAM_USE_CLASS_2 + (0327) ret + (0328) + (0329) .ENDSECTION + (0330) + (0331) ; End of File PWM8_NB_Out.asm +FILE: lib\pwm8_heaterint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_HeaterINT.asm + (0004) ;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 Interrupt Service Routine + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "m8c.inc" + (0014) include "PWM8_Heater.inc" + (0015) include "memory.inc" + (0016) + (0017) + (0018) ;----------------------------------------------- + (0019) ; Global Symbols + (0020) ;----------------------------------------------- + (0021) export _PWM8_Heater_ISR + (0022) + (0023) + (0024) AREA InterruptRAM (RAM,REL,CON) + (0025) + (0026) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0027) ;--------------------------------------------------- + (0028) ; Insert your custom declarations below this banner + (0029) ;--------------------------------------------------- + (0030) + (0031) ;------------------------ + (0032) ; Includes + (0033) ;------------------------ + (0034) + (0035) + (0036) ;------------------------ + (0037) ; Constant Definitions + (0038) ;------------------------ + (0039) + (0040) + (0041) ;------------------------ + (0042) ; Variable Allocation + (0043) ;------------------------ + (0044) + (0045) + (0046) ;--------------------------------------------------- + (0047) ; Insert your custom declarations above this banner + (0048) ;--------------------------------------------------- + (0049) ;@PSoC_UserCode_END@ (Do not change this line.) + (0050) + (0051) + (0052) AREA UserModules (ROM, REL) + (0053) + (0054) ;----------------------------------------------------------------------------- + (0055) ; FUNCTION NAME: _PWM8_Heater_ISR + (0056) ; + (0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub. + (0058) ; + (0059) ;----------------------------------------------------------------------------- + (0060) ; + (0061) + (0062) _PWM8_Heater_ISR: + (0063) + (0064) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0065) ;--------------------------------------------------- + (0066) ; Insert your custom code below this banner + (0067) ;--------------------------------------------------- + (0068) ; NOTE: interrupt service routines must preserve + (0069) ; the values of the A and X CPU registers. + (0070) + (0071) ;--------------------------------------------------- + (0072) ; Insert your custom code above this banner + (0073) ;--------------------------------------------------- + (0074) ;@PSoC_UserCode_END@ (Do not change this line.) + (0075) +04CB: 7E RETI (0076) reti + (0077) + (0078) + (0079) ; end of file PWM8_HeaterINT.asm +FILE: lib\pwm8_heater.asm (0001) ;;***************************************************************************** +04CC: 41 E1 FD AND REG[0xE1],0xFD (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_Heater.asm + (0004) ;; Version: 2.60, Updated on 2012/9/21 at 11:59:18 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 User Module software implementation file + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "m8c.inc" + (0023) include "PWM8_Heater.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export PWM8_Heater_EnableInt + (0030) export _PWM8_Heater_EnableInt + (0031) export PWM8_Heater_DisableInt + (0032) export _PWM8_Heater_DisableInt + (0033) export PWM8_Heater_Start + (0034) export _PWM8_Heater_Start + (0035) export PWM8_Heater_Stop + (0036) export _PWM8_Heater_Stop + (0037) export PWM8_Heater_WritePeriod + (0038) export _PWM8_Heater_WritePeriod + (0039) export PWM8_Heater_WritePulseWidth + (0040) export _PWM8_Heater_WritePulseWidth + (0041) export PWM8_Heater_bReadPulseWidth + (0042) export _PWM8_Heater_bReadPulseWidth + (0043) export PWM8_Heater_bReadCounter + (0044) export _PWM8_Heater_bReadCounter + (0045) + (0046) ; The following functions are deprecated and subject to omission in future releases + (0047) ; + (0048) export bPWM8_Heater_ReadPulseWidth ; deprecated + (0049) export _bPWM8_Heater_ReadPulseWidth ; deprecated + (0050) export bPWM8_Heater_ReadCounter ; deprecated + (0051) export _bPWM8_Heater_ReadCounter ; deprecated + (0052) + (0053) + (0054) AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + (0055) + (0056) ;----------------------------------------------- + (0057) ; Constant Definitions + (0058) ;----------------------------------------------- + (0059) + (0060) INPUT_REG_NULL: equ 0x00 ; Clear the input register + (0061) + (0062) + (0063) ;----------------------------------------------- + (0064) ; Variable Allocation + (0065) ;----------------------------------------------- + (0066) + (0067) + (0068) AREA UserModules (ROM, REL) + (0069) + (0070) .SECTION + (0071) ;----------------------------------------------------------------------------- + (0072) ; FUNCTION NAME: PWM8_Heater_EnableInt + (0073) ; + (0074) ; DESCRIPTION: + (0075) ; Enables this PWM's interrupt by setting the interrupt enable mask bit + (0076) ; associated with this User Module. This function has no effect until and + (0077) ; unless the global interrupts are enabled (for example by using the + (0078) ; macro M8C_EnableGInt). + (0079) ;----------------------------------------------------------------------------- + (0080) ; + (0081) ; ARGUMENTS: None. + (0082) ; RETURNS: Nothing. + (0083) ; SIDE EFFECTS: + (0084) ; The A and X registers may be modified by this or future implementations + (0085) ; of this function. The same is true for all RAM page pointer registers in + (0086) ; the Large Memory Model. When necessary, it is the calling function's + (0087) ; responsibility to perserve their values across calls to fastcall16 + (0088) ; functions. + (0089) ; + (0090) PWM8_Heater_EnableInt: + (0091) _PWM8_Heater_EnableInt: + (0092) RAM_PROLOGUE RAM_USE_CLASS_1 + (0093) PWM8_Heater_EnableInt_M + (0094) RAM_EPILOGUE RAM_USE_CLASS_1 + (0095) ret + (0096) + (0097) + (0098) .ENDSECTION + (0099) + (0100) .SECTION + (0101) ;----------------------------------------------------------------------------- + (0102) ; FUNCTION NAME: PWM8_Heater_DisableInt + (0103) ; + (0104) ; DESCRIPTION: + (0105) ; Disables this PWM's interrupt by clearing the interrupt enable + (0106) ; mask bit associated with this User Module. + (0107) ;----------------------------------------------------------------------------- + (0108) ; + (0109) ; ARGUMENTS: None + (0110) ; RETURNS: Nothing + (0111) ; SIDE EFFECTS: + (0112) ; The A and X registers may be modified by this or future implementations + (0113) ; of this function. The same is true for all RAM page pointer registers in + (0114) ; the Large Memory Model. When necessary, it is the calling function's + (0115) ; responsibility to perserve their values across calls to fastcall16 + (0116) ; functions. + (0117) ; + (0118) PWM8_Heater_DisableInt: + (0119) _PWM8_Heater_DisableInt: + (0120) RAM_PROLOGUE RAM_USE_CLASS_1 + (0121) PWM8_Heater_DisableInt_M + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +04CF: 7F RET (0123) ret +04D0: 43 27 01 OR REG[0x27],0x1 + (0124) + (0125) + (0126) .ENDSECTION + (0127) + (0128) .SECTION + (0129) ;----------------------------------------------------------------------------- + (0130) ; FUNCTION NAME: PWM8_Heater_Start + (0131) ; + (0132) ; DESCRIPTION: + (0133) ; Sets the start bit in the Control register of this user module. The + (0134) ; PWM will begin counting on the next input clock as soon as the + (0135) ; enable input is asserted high. + (0136) ;----------------------------------------------------------------------------- + (0137) ; + (0138) ; ARGUMENTS: None + (0139) ; RETURNS: Nothing + (0140) ; SIDE EFFECTS: + (0141) ; The A and X registers may be modified by this or future implementations + (0142) ; of this function. The same is true for all RAM page pointer registers in + (0143) ; the Large Memory Model. When necessary, it is the calling function's + (0144) ; responsibility to perserve their values across calls to fastcall16 + (0145) ; functions. + (0146) ; + (0147) PWM8_Heater_Start: + (0148) _PWM8_Heater_Start: + (0149) RAM_PROLOGUE RAM_USE_CLASS_1 + (0150) PWM8_Heater_Start_M + (0151) RAM_EPILOGUE RAM_USE_CLASS_1 +04D3: 7F RET (0152) ret + (0153) + (0154) + (0155) .ENDSECTION + (0156) + (0157) .SECTION + (0158) ;----------------------------------------------------------------------------- + (0159) ; FUNCTION NAME: PWM8_Heater_Stop + (0160) ; + (0161) ; DESCRIPTION: + (0162) ; Disables PWM operation by clearing the start bit in the Control + (0163) ; register. + (0164) ;----------------------------------------------------------------------------- + (0165) ; + (0166) ; ARGUMENTS: None + (0167) ; RETURNS: Nothing + (0168) ; SIDE EFFECTS: + (0169) ; The A and X registers may be modified by this or future implementations + (0170) ; of this function. The same is true for all RAM page pointer registers in + (0171) ; the Large Memory Model. When necessary, it is the calling function's + (0172) ; responsibility to perserve their values across calls to fastcall16 + (0173) ; functions. + (0174) ; + (0175) PWM8_Heater_Stop: + (0176) _PWM8_Heater_Stop: + (0177) RAM_PROLOGUE RAM_USE_CLASS_1 + (0178) PWM8_Heater_Stop_M + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) + (0183) .ENDSECTION + (0184) + (0185) .SECTION + (0186) ;----------------------------------------------------------------------------- + (0187) ; FUNCTION NAME: PWM8_Heater_WritePeriod + (0188) ; + (0189) ; DESCRIPTION: + (0190) ; Write the 8-bit period value into the Period register (DR1). + (0191) ;----------------------------------------------------------------------------- + (0192) ; + (0193) ; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) + (0194) ; RETURNS: Nothing + (0195) ; SIDE EFFECTS: + (0196) ; If the PWM user module is stopped, then this value will also be + (0197) ; latched into the Count register (DR0). + (0198) ; + (0199) ; The A and X registers may be modified by this or future implementations + (0200) ; of this function. The same is true for all RAM page pointer registers in + (0201) ; the Large Memory Model. When necessary, it is the calling function's + (0202) ; responsibility to perserve their values across calls to fastcall16 + (0203) ; functions. + (0204) ; + (0205) PWM8_Heater_WritePeriod: + (0206) _PWM8_Heater_WritePeriod: + (0207) RAM_PROLOGUE RAM_USE_CLASS_1 + (0208) mov reg[PWM8_Heater_PERIOD_REG], A + (0209) RAM_EPILOGUE RAM_USE_CLASS_1 + (0210) ret + (0211) + (0212) + (0213) .ENDSECTION + (0214) + (0215) .SECTION + (0216) ;----------------------------------------------------------------------------- + (0217) ; FUNCTION NAME: PWM8_Heater_WritePulseWidth + (0218) ; + (0219) ; DESCRIPTION: + (0220) ; Writes compare value into the Compare register (DR2). + (0221) ;----------------------------------------------------------------------------- + (0222) ; + (0223) ; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) + (0224) ; RETURNS: Nothing + (0225) ; SIDE EFFECTS: + (0226) ; The A and X registers may be modified by this or future implementations + (0227) ; of this function. The same is true for all RAM page pointer registers in + (0228) ; the Large Memory Model. When necessary, it is the calling function's + (0229) ; responsibility to perserve their values across calls to fastcall16 + (0230) ; functions. + (0231) ; + (0232) PWM8_Heater_WritePulseWidth: + (0233) _PWM8_Heater_WritePulseWidth: + (0234) RAM_PROLOGUE RAM_USE_CLASS_1 +04D4: 60 26 MOV REG[0x26],A (0235) mov reg[PWM8_Heater_COMPARE_REG], A + (0236) RAM_EPILOGUE RAM_USE_CLASS_1 +04D6: 7F RET (0237) ret + (0238) + (0239) + (0240) .ENDSECTION + (0241) + (0242) .SECTION + (0243) ;----------------------------------------------------------------------------- + (0244) ; FUNCTION NAME: PWM8_Heater_bReadPulseWidth + (0245) ; + (0246) ; DESCRIPTION: + (0247) ; Reads the Compare register. + (0248) ;----------------------------------------------------------------------------- + (0249) ; + (0250) ; ARGUMENTS: None + (0251) ; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) + (0252) ; SIDE EFFECTS: + (0253) ; The A and X registers may be modified by this or future implementations + (0254) ; of this function. The same is true for all RAM page pointer registers in + (0255) ; the Large Memory Model. When necessary, it is the calling function's + (0256) ; responsibility to perserve their values across calls to fastcall16 + (0257) ; functions. + (0258) ; + (0259) PWM8_Heater_bReadPulseWidth: + (0260) _PWM8_Heater_bReadPulseWidth: + (0261) bPWM8_Heater_ReadPulseWidth: ; this name deprecated + (0262) _bPWM8_Heater_ReadPulseWidth: ; this name deprecated + (0263) RAM_PROLOGUE RAM_USE_CLASS_1 + (0264) mov A, reg[PWM8_Heater_COMPARE_REG] + (0265) RAM_EPILOGUE RAM_USE_CLASS_1 + (0266) ret + (0267) + (0268) + (0269) .ENDSECTION + (0270) + (0271) .SECTION + (0272) ;----------------------------------------------------------------------------- + (0273) ; FUNCTION NAME: PWM8_Heater_bReadCounter + (0274) ; + (0275) ; DESCRIPTION: + (0276) ; Returns the value in the Count register (DR0), preserving the value in + (0277) ; the compare register (DR2). Interrupts are prevented during the transfer + (0278) ; from the Count to the Compare registers by holding the clock low in + (0279) ; the PSoC block. + (0280) ;----------------------------------------------------------------------------- + (0281) ; + (0282) ; ARGUMENTS: None + (0283) ; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) + (0284) ; SIDE EFFECTS: + (0285) ; 1) The user module is stopped momentarily and one or more counts may be missed. + (0286) ; 2) The A and X registers may be modified by this or future implementations + (0287) ; of this function. The same is true for all RAM page pointer registers in + (0288) ; the Large Memory Model. When necessary, it is the calling function's + (0289) ; responsibility to perserve their values across calls to fastcall16 + (0290) ; functions. + (0291) ; + (0292) PWM8_Heater_bReadCounter: + (0293) _PWM8_Heater_bReadCounter: + (0294) bPWM8_Heater_ReadCounter: ; this name deprecated + (0295) _bPWM8_Heater_ReadCounter: ; this name deprecated + (0296) + (0297) bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + (0298) bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + (0299) wCounter: EQU 2 ; Frame offset to temp Count store + (0300) STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + (0301) + (0302) RAM_PROLOGUE RAM_USE_CLASS_2 + (0303) mov X, SP ; X <- stack frame pointer + (0304) mov A, reg[PWM8_Heater_COMPARE_REG] ; Save the Compare register on the stack + (0305) push A ; + (0306) PWM8_Heater_Stop_M ; Disable (stop) the PWM + (0307) M8C_SetBank1 ; + (0308) mov A, reg[PWM8_Heater_INPUT_REG] ; save the clock input setting + (0309) push A ; on the stack (now 2 bytes) and ... + (0310) ; hold the clock low: + (0311) mov reg[PWM8_Heater_INPUT_REG], INPUT_REG_NULL + (0312) M8C_SetBank0 + (0313) ; Extract the Count via DR2 register + (0314) mov A, reg[PWM8_Heater_COUNTER_REG] ; DR2 <- DR0 + (0315) mov A, reg[PWM8_Heater_COMPARE_REG] ; Stash the Count on the stack + (0316) push A ; -stack frame is now 3 bytes + (0317) mov A, [X+bOrigCompareValue] ; Restore the Compare register + (0318) mov reg[PWM8_Heater_COMPARE_REG], A + (0319) M8C_SetBank1 ; Restore the PWM operation: + (0320) mov A, [X+bOrigClockSetting] ; First, the clock setting... + (0321) mov reg[PWM8_Heater_INPUT_REG], A ; + (0322) M8C_SetBank0 ; + (0323) PWM8_Heater_Start_M ; then re-enable the PWM. + (0324) pop A ; Setup the return value + (0325) ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + (0326) RAM_EPILOGUE RAM_USE_CLASS_2 + (0327) ret + (0328) + (0329) .ENDSECTION + (0330) + (0331) ; End of File PWM8_Heater.asm +FILE: lib\lcd.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: LCD.asm + (0004) ;; Version: 1.60, Updated on 2012/9/21 at 11:59:10 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: LCD User Module software implementation file. + (0008) ;; + (0009) ;; This set of functions is written for the common 2 and 4 line + (0010) ;; LCDs that use the Hitachi HD44780A controller. + (0011) ;; + (0012) ;; LCD connections to PSoC port + (0013) ;; + (0014) ;; PX.0 ==> LCD D4 + (0015) ;; PX.1 ==> LCD D5 + (0016) ;; PX.2 ==> LCD D6 + (0017) ;; PX.3 ==> LCD D7 + (0018) ;; PX.4 ==> LCD E + (0019) ;; PX.5 ==> LCD RS + (0020) ;; PX.6 ==> LCD R/W + (0021) ;; + (0022) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0023) ;; arguments and observe the associated "Registers are volatile" policy. + (0024) ;; This means it is the caller's responsibility to preserve any values + (0025) ;; in the X and A registers that are still needed after the API functions + (0026) ;; returns. For Large Memory Model devices it is also the caller's + (0027) ;; responsibility to preserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0028) ;; MVW_PP registers. Even though some of these registers may not be modified + (0029) ;; now, there is no guarantee that will remain the case in future releases. + (0030) ;;----------------------------------------------------------------------------- + (0031) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0032) ;;***************************************************************************** + (0033) ;;***************************************************************************** + (0034) + (0035) include "m8c.inc" + (0036) include "memory.inc" + (0037) include "LCD.inc" + (0038) + (0039) ;----------------------------------------------- + (0040) ; Global Symbols + (0041) ;----------------------------------------------- + (0042) + (0043) export LCD_Start + (0044) export _LCD_Start + (0045) export LCD_Init + (0046) export _LCD_Init + (0047) + (0048) export LCD_WriteData + (0049) export _LCD_WriteData + (0050) + (0051) export LCD_Control + (0052) export _LCD_Control + (0053) + (0054) export LCD_PrString + (0055) export _LCD_PrString + (0056) + (0057) export LCD_PrCString + (0058) export _LCD_PrCString + (0059) + (0060) export LCD_Position + (0061) export _LCD_Position + (0062) + (0063) export LCD_PrHexByte + (0064) export _LCD_PrHexByte + (0065) + (0066) export LCD_PrHexInt + (0067) export _LCD_PrHexInt + (0068) + (0069) export LCD_Delay50uTimes + (0070) export _LCD_Delay50uTimes + (0071) + (0072) export LCD_Delay50u + (0073) export _LCD_Delay50u + (0074) + (0075) ;----------------------------------------------- + (0076) ; If bargraph functions not required, don't + (0077) ; export the function names. + (0078) ;----------------------------------------------- + (0079) + (0080) IF (LCD_BARGRAPH_ENABLE) + (0081) export LCD_InitBG + (0082) export _LCD_InitBG + (0083) + (0084) export LCD_InitVBG + (0085) export _LCD_InitVBG + (0086) + (0087) ; NOTE: The two functions, + (0088) ; + (0089) ; LCD_DrawVBG and + (0090) ; LCD_DrawBG + (0091) ; + (0092) ; are implemented using both fastcall16 and legacy fastcall16 because they + (0093) ; fall into a special and rare case where the calling sequences specified + (0094) ; by the two disciplines are incompatible. The fastcall16 versions are + (0095) ; provided for both C and Assembly users in all memory models. The legacy + (0096) ; fastcall16 versions are provided only to support existing small memory + (0097) ; model assembly language code---they do not work in the large memory + (0098) ; model. + (0099) ; + (0100) ; ** The legacy fastcall16 versions are provided on a temporary basis to + (0101) ; ** ease the transition to the 4.2 release of PSoC Designer. Their use is + (0102) ; ** deprecated and their status is "No Further Maintenance". + (0103) ; + (0104) ; The fastcall16 versions of these functions are distinguished by a + (0105) ; leading underscore in the name. The legacy fastcall16 names (which appear + (0106) ; in this comment) do not have the leading underscore. Details on the + (0107) ; calling sequence to be used for fastcall16 are given in the user module + (0108) ; datasheet. + (0109) ; + (0110) ; Fastcall16 versions: + (0111) export _LCD_DrawVBG + (0112) export _LCD_DrawBG + (0113) + (0114) IF SYSTEM_SMALL_MEMORY_MODEL + (0115) ; Legacy Fastcall versions: + (0116) export LCD_DrawVBG + (0117) export LCD_DrawBG + (0118) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + (0119) + (0120) ENDIF ; BARGRAPH_ENABLE + (0121) + (0122) ; + (0123) ; The following functions are deprecated and will be eliminated in a future + (0124) ; version of PSoC Designer. + (0125) ; + (0126) export LCD_Write_Data + (0127) export _LCD_Write_Data + (0128) + (0129) + (0130) ;----------------------------------------------- + (0131) ; EQUATES + (0132) ;----------------------------------------------- + (0133) + (0134) LCD_Port: equ PRT2DR + (0135) LCD_PortMode0: equ PRT2DM0 + (0136) LCD_PortMode1: equ PRT2DM1 + (0137) + (0138) LCD_E: equ 10h + (0139) LCD_RW: equ 40h + (0140) LCD_RS: equ 20h + (0141) + (0142) LCD_DATA_MASK: equ 0Fh + (0143) LCD_READY_BIT: equ 08h + (0144) + (0145) LCD_DATA_READ: equ ( LCD_E | LCD_RW | LCD_RS ) + (0146) LCD_CNTL_READ: equ ( LCD_E | LCD_RW ) + (0147) LCD_PORT_WRITE: equ 7Fh + (0148) LCD_PORT_MASK: equ 7Fh + (0149) + (0150) LCD_DISP_INC: equ 03h + (0151) LCD_DISP_OFF: equ 08h + (0152) LCD_DISP_ON: equ 0Ch + (0153) LCD_4BIT_2LINE: equ 2Ch + (0154) + (0155) + (0156) ;----------------------------------------------- + (0157) ; Bargraph definitions + (0158) ;----------------------------------------------- + (0159) + (0160) LCD_BG_CHAR_WIDTH: equ 16 ; 16 characters in width + (0161) LCD_BG_SEG_WIDTH: equ 80 ; 16 * 5 = 80 + (0162) LCD_BG_COL_START: equ 0 ; Always start in the left most column + (0163) + (0164) ; Offsets for 2x16, 2x20, 4x20 + (0165) ; Change these values for a custom LCD + (0166) + (0167) LCD_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 + (0168) LCD_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + (0169) LCD_ROW3_OFFSET: equ 94h ; Address/command offset for row 1 + (0170) LCD_ROW4_OFFSET: equ D4h ; Address/command offset for row 2 + (0171) + (0172) LCD_BG_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 + (0173) LCD_BG_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + (0174) + (0175) LCD_CG_RAM_OFFSET: equ 40h ; Offset to character RAM + (0176) + (0177) AREA UserModules (ROM, REL) + (0178) + (0179) .SECTION + (0180) ;----------------------------------------------------------------------------- + (0181) ; FUNCTION NAME: LCD_PrCString + (0182) ; + (0183) ; DESCRIPTION: + (0184) ; Print constant (ROM) string to LCD + (0185) ;----------------------------------------------------------------------------- + (0186) ; + (0187) ; ARGUMENTS: + (0188) ; A:X Pointer to String + (0189) ; A contains MSB of string address + (0190) ; X contains LSB of string address + (0191) ; + (0192) ; RETURNS: none + (0193) ; + (0194) ; SIDE EFFECTS: + (0195) ; The A and X registers may be modified by this or future implementations + (0196) ; of this function. The same is true for all RAM page pointer registers in + (0197) ; the Large Memory Model. When necessary, it is the calling function's + (0198) ; responsibility to preserve their values across calls to fastcall16 + (0199) ; functions. + (0200) ; + (0201) ; Currently only the page pointer registers listed below are modified: + (0202) ; CUR_PP + (0203) ; + (0204) LCD_PrCString: + (0205) _LCD_PrCString: + (0206) RAM_PROLOGUE RAM_USE_CLASS_1 + (0207) .Loop_PrCString: +04D7: 08 PUSH A (0208) push A ; Store ROM pointer +04D8: 10 PUSH X (0209) push X +04D9: 28 ROMX (0210) romx ; Get character from ROM +04DA: B0 04 JNZ 0x04DF (0211) jnz .LCD_PrCString_WR ; print character and advance pointer +04DC: 20 POP X (0212) pop X ; Restore the stack +04DD: 18 POP A (0213) pop A + (0214) RAM_EPILOGUE RAM_USE_CLASS_1 +04DE: 7F RET (0215) ret ; Return + (0216) + (0217) .LCD_PrCString_WR: +04DF: 90 35 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0218) call LCD_WriteData ; Write data to LCD +04E1: 20 POP X (0219) pop X ; Get ROM pointer +04E2: 18 POP A (0220) pop A +04E3: 75 INC X (0221) inc X ; Inc LSB of pointer +04E4: DF F2 JNC _bPWM8_Heater_ReadPulseWidth|_PWM8_Heater_bReadCounter|_bPWM8_Heater_ReadCounter|bPWM8_Heater_ReadCounter|_LCD_PrCString|LCD_PrCString|_PWM8_Heater_bReadPulseWidth(0222) jnc .Loop_PrCString +04E6: 74 INC A (0223) inc A ; Inc MSB of pointer if LSB overflow +04E7: 8F EF JMP _bPWM8_Heater_ReadPulseWidth|_PWM8_Heater_bReadCounter|_bPWM8_Heater_ReadCounter|bPWM8_Heater_ReadCounter|_LCD_PrCString|LCD_PrCString|_PWM8_Heater_bReadPulseWidth(0224) jmp .Loop_PrCString + (0225) + (0226) .ENDSECTION + (0227) + (0228) ;----------------------------------------------------------------------------- + (0229) ; FUNCTION NAME: LCD_PrHexByte + (0230) ; + (0231) ; DESCRIPTION: + (0232) ; Print a byte in Hex (two characters) to current LCD position + (0233) ; + (0234) ;----------------------------------------------------------------------------- + (0235) ; + (0236) ; ARGUMENTS: + (0237) ; A => (BYTE) Data/char to be printed + (0238) ; + (0239) ; RETURNS: none + (0240) ; + (0241) ; SIDE EFFECTS: + (0242) ; The A and X registers may be modified by this or future implementations + (0243) ; of this function. The same is true for all RAM page pointer registers in + (0244) ; the Large Memory Model. When necessary, it is the calling function's + (0245) ; responsibility to preserve their values across calls to fastcall16 + (0246) ; functions. + (0247) ; + (0248) ; Currently only the page pointer registers listed below are modified: + (0249) ; CUR_PP + (0250) ; + (0251) .LITERAL + (0252) LCD_HEX_STR:: + (0253) DS "0123456789ABCDEF" + (0254) .ENDLITERAL + (0255) .SECTION + (0256) + (0257) LCD_PrHexByte: + (0258) _LCD_PrHexByte: + (0259) RAM_PROLOGUE RAM_USE_CLASS_1 +04F9: 08 PUSH A (0260) push A ; Save lower nibble +04FA: 67 ASR A (0261) asr A ; Shift high nibble to right +04FB: 67 ASR A (0262) asr A +04FC: 67 ASR A (0263) asr A +04FD: 67 ASR A (0264) asr A +04FE: 21 0F AND A,0xF (0265) and A,0Fh ; Mask off nibble +0500: FF E7 INDEX LCD_HEX_STR (0266) index LCD_HEX_STR ; Get Hex value +0502: 90 12 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0267) call LCD_WriteData ; Write data to screen +0504: 18 POP A (0268) pop A ; Restore value +0505: 21 0F AND A,0xF (0269) and A,0Fh ; Mask off lower nibble +0507: FF E0 INDEX LCD_HEX_STR (0270) index LCD_HEX_STR ; Get Hex value +0509: 90 0B CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0271) call LCD_WriteData ; Write data to screen + (0272) RAM_EPILOGUE RAM_USE_CLASS_1 +050B: 7F RET (0273) ret + (0274) .ENDSECTION + (0275) + (0276) .SECTION + (0277) ;----------------------------------------------------------------------------- + (0278) ; FUNCTION NAME: LCD_PrHexInt + (0279) ; + (0280) ; DESCRIPTION: + (0281) ; Print an Int in Hex (four characters) to current LCD position + (0282) ; + (0283) ;----------------------------------------------------------------------------- + (0284) ; + (0285) ; ARGUMENTS: + (0286) ; A:X Integer value + (0287) ; A contains LSB of Int + (0288) ; X contains MSB of Int + (0289) ; + (0290) ; RETURNS: none + (0291) ; + (0292) ; SIDE EFFECTS: + (0293) ; The A and X registers may be modified by this or future implementations + (0294) ; of this function. The same is true for all RAM page pointer registers in + (0295) ; the Large Memory Model. When necessary, it is the calling function's + (0296) ; responsibility to preserve their values across calls to fastcall16 + (0297) ; functions. + (0298) ; + (0299) ; Currently only the page pointer registers listed below are modified: + (0300) ; CUR_PP + (0301) ; + (0302) LCD_PrHexInt: + (0303) _LCD_PrHexInt: + (0304) RAM_PROLOGUE RAM_USE_CLASS_1 + (0305) swap A,X + (0306) call LCD_PrHexByte ; Print MSB + (0307) mov A,X ; Move LSB into position + (0308) call LCD_PrHexByte ; Print LSB + (0309) RAM_EPILOGUE RAM_USE_CLASS_1 + (0310) ret + (0311) .ENDSECTION + (0312) + (0313) .SECTION + (0314) ;----------------------------------------------------------------------------- + (0315) ; FUNCTION NAME: LCD_PrString + (0316) ; + (0317) ; DESCRIPTION: + (0318) ; Print (RAM) ASCII string to LCD + (0319) ; + (0320) ;----------------------------------------------------------------------------- + (0321) ; + (0322) ; ARGUMENTS: + (0323) ; A:X contains pointer to string + (0324) ; X contains LSB of string pointer + (0325) ; A contains MSB or page of string pointer (not used at this time) + (0326) ; + (0327) ; RETURNS: + (0328) ; + (0329) ; SIDE EFFECTS: + (0330) ; The A and X registers may be modified by this or future implementations + (0331) ; of this function. The same is true for all RAM page pointer registers in + (0332) ; the Large Memory Model. When necessary, it is the calling function's + (0333) ; responsibility to preserve their values across calls to fastcall16 + (0334) ; functions. + (0335) ; + (0336) ; Currently only the page pointer registers listed below are modified: + (0337) ; CUR_PP + (0338) ; IDX_PP + (0339) ; + (0340) ; + (0341) LCD_PrString: + (0342) _LCD_PrString: + (0343) RAM_PROLOGUE RAM_USE_CLASS_3 + (0344) RAM_SETPAGE_IDX A + (0345) .Loop_PrString: +050C: 52 00 MOV A,[X+0] (0346) mov A,[X] ; Get value pointed to by X +050E: A0 06 JZ 0x0515 (0347) jz .End_LCD_PrString ; Check for end of string + (0348) ;LCD_writeData is known not to modify X so no need to preserve +0510: 90 04 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0349) call LCD_WriteData ; Write data to screen +0512: 75 INC X (0350) inc X ; Advance pointer to next character +0513: 8F F8 JMP _LCD_PrString|_LCD_PrHexInt(0351) jmp .Loop_PrString ; Go get next character + (0352) .End_LCD_PrString: + (0353) RAM_EPILOGUE RAM_USE_CLASS_3 +0515: 7F RET (0354) ret + (0355) .ENDSECTION + (0356) + (0357) .SECTION + (0358) ;----------------------------------------------------------------------------- + (0359) ; FUNCTION NAME: LCD_WriteData + (0360) ; + (0361) ; DESCRIPTION: + (0362) ; Write a byte to the LCD's data register. + (0363) ; + (0364) ;----------------------------------------------------------------------------- + (0365) ; + (0366) ; ARGUMENTS: + (0367) ; A contains byte to be written to LCD data register + (0368) ; + (0369) ; RETURNS: none + (0370) ; + (0371) ; SIDE EFFECTS: + (0372) ; The A and X registers may be modified by this or future implementations + (0373) ; of this function. The same is true for all RAM page pointer registers in + (0374) ; the Large Memory Model. When necessary, it is the calling function's + (0375) ; responsibility to preserve their values across calls to fastcall16 + (0376) ; functions. + (0377) ; + (0378) ; Currently only the page pointer registers listed below are modified: + (0379) ; CUR_PP + (0380) ; + (0381) LCD_WriteData: + (0382) _LCD_WriteData: + (0383) LCD_Write_Data: ; Do not use + (0384) _LCD_Write_Data: ; Do not use + (0385) RAM_PROLOGUE RAM_USE_CLASS_1 +0516: 90 5F CALL 0x0577 (0386) call LCD_Check_Ready ; Make sure controller is ready + (0387) ; A is preserved in LCD_Check_Ready +0518: 08 PUSH A (0388) push A ; Save copy of character +0519: 67 ASR A (0389) asr A ; Shift high nibble to right +051A: 67 ASR A (0390) asr A +051B: 67 ASR A (0391) asr A +051C: 67 ASR A (0392) asr A +051D: 21 0F AND A,0xF (0393) and A,0Fh ; Mask off high nibble +051F: 90 38 CALL 0x0559 (0394) call LCD_WDATA_Nibble ; Write Upper nibble +0521: 18 POP A (0395) pop A ; Retrieve copy of character +0522: 21 0F AND A,0xF (0396) and A,0Fh ; Mask off high nibble +0524: 40 NOP (0397) nop +0525: 40 NOP (0398) nop +0526: 40 NOP (0399) nop +0527: 90 30 CALL 0x0559 (0400) call LCD_WDATA_Nibble ; Write Lower nibble + (0401) RAM_EPILOGUE RAM_USE_CLASS_1 +0529: 7F RET (0402) ret + (0403) .ENDSECTION + (0404) + (0405) .SECTION + (0406) ;----------------------------------------------------------------------------- + (0407) ; FUNCTION NAME: LCD_Control + (0408) ; + (0409) ; DESCRIPTION: + (0410) ; Write a byte to the LCD's control register. + (0411) ; + (0412) ;----------------------------------------------------------------------------- + (0413) ; + (0414) ; ARGUMENTS: + (0415) ; A contains data to be written to LCD control register. + (0416) ; + (0417) ; RETURNS: none + (0418) ; + (0419) ; SIDE EFFECTS: + (0420) ; The A and X registers may be modified by this or future implementations + (0421) ; of this function. The same is true for all RAM page pointer registers in + (0422) ; the Large Memory Model. When necessary, it is the calling function's + (0423) ; responsibility to preserve their values across calls to fastcall16 + (0424) ; functions. + (0425) ; + (0426) ; Currently only the page pointer registers listed below are modified: + (0427) ; CUR_PP + (0428) ; + (0429) LCD_Control: + (0430) _LCD_Control: + (0431) RAM_PROLOGUE RAM_USE_CLASS_1 +052A: 90 4B CALL 0x0577 (0432) call LCD_Check_Ready ; Make sure controller is ready + (0433) ; A is preserved in LCD_Check_Ready +052C: 08 PUSH A (0434) push A ; Save copy of byte +052D: 67 ASR A (0435) asr A ; Shift Upper Nibble to right +052E: 67 ASR A (0436) asr A +052F: 67 ASR A (0437) asr A +0530: 67 ASR A (0438) asr A +0531: 21 0F AND A,0xF (0439) and A,0Fh ; Mask off, just in case +0533: 90 09 CALL 0x053E (0440) call LCD_WCNTL_Nibble ; Write high nibble +0535: 18 POP A (0441) pop A ; Restore copy of byte +0536: 21 0F AND A,0xF (0442) and A,0Fh ; Mask off high nibble +0538: 40 NOP (0443) nop +0539: 40 NOP (0444) nop +053A: 40 NOP (0445) nop +053B: 90 01 CALL 0x053E (0446) call LCD_WCNTL_Nibble ; Write Lower nibble + (0447) RAM_EPILOGUE RAM_USE_CLASS_1 +053D: 7F RET (0448) ret + (0449) .ENDSECTION + (0450) + (0451) .SECTION + (0452) ;----------------------------------------------------------------------------- + (0453) ; FUNCTION NAME: LCD_WCNTL_Nibble + (0454) ; + (0455) ; DESCRIPTION: + (0456) ; Write a single nibble to the LCD's command register + (0457) ; + (0458) ;----------------------------------------------------------------------------- + (0459) ; + (0460) ; ARGUMENTS: + (0461) ; A[3:0] Contains Nibble to be written to command register + (0462) ; + (0463) ; RETURNS: none + (0464) ; + (0465) ; SIDE EFFECTS: + (0466) ; The A and X registers may be modified by this or future implementations + (0467) ; of this function. The same is true for all RAM page pointer registers in + (0468) ; the Large Memory Model. When necessary, it is the calling function's + (0469) ; responsibility to preserve their values across calls to fastcall16 + (0470) ; functions. + (0471) ; + (0472) ; Currently only the page pointer registers listed below are modified: + (0473) ; CUR_PP + (0474) ; + (0475) LCD_WCNTL_Nibble: + (0476) RAM_PROLOGUE RAM_USE_CLASS_4 +053E: 08 PUSH A (0477) push A + (0478) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address +053F: 26 36 80 AND [0x36],0x80 (0479) and [Port_2_Data_SHADE],~LCD_PORT_MASK +0542: 51 36 MOV A,[0x36] (0480) mov A,[Port_2_Data_SHADE] +0544: 60 08 MOV REG[0x8],A (0481) mov reg[LCD_Port],A ; Reset control lines + (0482) +0546: 18 POP A (0483) pop A +0547: 21 0F AND A,0xF (0484) and A,LCD_DATA_MASK ; Make sure no bogus data in MSN +0549: 29 10 OR A,0x10 (0485) or A,LCD_E ; Bring "E" Enable line high +054B: 2A 36 OR A,[0x36] (0486) or A,[Port_2_Data_SHADE] ; OR in bit 7 just +054D: 60 08 MOV REG[0x8],A (0487) mov reg[LCD_Port], A ; Write data +054F: 53 36 MOV [0x36],A (0488) mov [Port_2_Data_SHADE],A ; Keep shadow register in sync +0551: 40 NOP (0489) nop +0552: 21 8F AND A,0x8F (0490) and A,(~LCD_PORT_MASK|LCD_DATA_MASK) ; Disable E signal and leave data on bus. +0554: 53 36 MOV [0x36],A (0491) mov [Port_2_Data_SHADE],A ; Keep shadow register in sync +0556: 60 08 MOV REG[0x8],A (0492) mov reg[LCD_Port],A + (0493) RAM_EPILOGUE RAM_USE_CLASS_4 +0558: 7F RET (0494) ret + (0495) .ENDSECTION + (0496) + (0497) .SECTION + (0498) ;----------------------------------------------------------------------------- + (0499) ; FUNCTION NAME: LCD_WDATA_Nibble + (0500) ; + (0501) ; DESCRIPTION: + (0502) ; Write a single nibble to the LCD's DATA register + (0503) ; + (0504) ;----------------------------------------------------------------------------- + (0505) ; + (0506) ; ARGUMENTS: + (0507) ; A[3:0] Contains Nibble to be written to data register + (0508) ; + (0509) ; RETURNS: none + (0510) ; + (0511) ; SIDE EFFECTS: + (0512) ; The A and X registers may be modified by this or future implementations + (0513) ; of this function. The same is true for all RAM page pointer registers in + (0514) ; the Large Memory Model. When necessary, it is the calling function's + (0515) ; responsibility to preserve their values across calls to fastcall16 + (0516) ; functions. + (0517) ; + (0518) ; Currently only the page pointer registers listed below are modified: + (0519) ; CUR_PP + (0520) ; + (0521) LCD_WDATA_Nibble: + (0522) RAM_PROLOGUE RAM_USE_CLASS_4 +0559: 08 PUSH A (0523) push A + (0524) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address +055A: 26 36 80 AND [0x36],0x80 (0525) and [Port_2_Data_SHADE],~LCD_PORT_MASK +055D: 2E 36 20 OR [0x36],0x20 (0526) or [Port_2_Data_SHADE],LCD_RS ; Raise RS to signify a Data Write +0560: 51 36 MOV A,[0x36] (0527) mov A,[Port_2_Data_SHADE] +0562: 60 08 MOV REG[0x8],A (0528) mov reg[LCD_Port],A + (0529) +0564: 18 POP A (0530) pop A +0565: 21 0F AND A,0xF (0531) and A,LCD_DATA_MASK ; Make sure no bogus data in A[7:4] +0567: 29 30 OR A,0x30 (0532) or A,(LCD_E | LCD_RS) ; Bring "E" Enable line high +0569: 2A 36 OR A,[0x36] (0533) or A,[Port_2_Data_SHADE] ; Keep shadow in sync +056B: 60 08 MOV REG[0x8],A (0534) mov reg[LCD_Port], A ; Write data +056D: 53 36 MOV [0x36],A (0535) mov [Port_2_Data_SHADE],A ; Keep shadow in sync +056F: 40 NOP (0536) NOP +0570: 21 AF AND A,0xAF (0537) and A,(~LCD_PORT_MASK|LCD_DATA_MASK|LCD_RS) ; Disable E signal and leave Data on bus +0572: 53 36 MOV [0x36],A (0538) mov [Port_2_Data_SHADE],A ; keep shadow in sync +0574: 60 08 MOV REG[0x8],A (0539) mov reg[LCD_Port],A + (0540) RAM_EPILOGUE RAM_USE_CLASS_4 +0576: 7F RET (0541) ret + (0542) .ENDSECTION + (0543) + (0544) .SECTION + (0545) ;----------------------------------------------------------------------------- + (0546) ; FUNCTION NAME: LCD_Check_Ready + (0547) ; + (0548) ; DESCRIPTION: + (0549) ; Wait until LCD has completed last command. + (0550) ; + (0551) ;----------------------------------------------------------------------------- + (0552) ; + (0553) ; ARGUMENTS: none + (0554) ; + (0555) ; RETURNS: none + (0556) ; + (0557) ; SIDE EFFECTS: + (0558) ; The A and X registers may be modified by this or future implementations + (0559) ; of this function. The same is true for all RAM page pointer registers in + (0560) ; the Large Memory Model. When necessary, it is the calling function's + (0561) ; responsibility to preserve their values across calls to fastcall16 + (0562) ; functions. + (0563) ; + (0564) ; Currently only the page pointer registers listed below are modified: + (0565) ; CUR_PP + (0566) ; + (0567) ; If LCD is not present, this routine may never return. + (0568) ; + (0569) LCD_Check_Ready: + (0570) RAM_PROLOGUE RAM_USE_CLASS_4 +0577: 08 PUSH A (0571) push A ; Save Accumulator + (0572) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address +0578: 26 36 80 AND [0x36],0x80 (0573) and [Port_2_Data_SHADE],~LCD_PORT_MASK ; Mask of all LCD bits +057B: 51 36 MOV A,[0x36] (0574) mov A,[Port_2_Data_SHADE] +057D: 60 08 MOV REG[0x8],A (0575) mov reg[LCD_Port],A ; Zero LCD port bits + (0576) +057F: 26 37 F0 AND [0x37],0xF0 (0577) and [Port_2_DriveMode_0_SHADE],~LCD_DATA_MASK ; Clear out LCD mode bits. +0582: 51 37 MOV A,[0x37] (0578) mov A,[Port_2_DriveMode_0_SHADE] +0584: 71 10 OR F,0x10 + (0579) M8C_SetBank1 ; Change port mode to read status +0586: 60 08 MOV REG[0x8],A (0580) mov reg[LCD_PortMode0],A ; Setup LCD Port for reading +0588: 70 EF AND F,0xEF + (0581) M8C_SetBank0 + (0582) +058A: 2E 36 40 OR [0x36],0x40 (0583) or [Port_2_Data_SHADE],LCD_RW ; Raise RW to signify Read operation +058D: 51 36 MOV A,[0x36] (0584) mov A,[Port_2_Data_SHADE] +058F: 60 08 MOV REG[0x8],A (0585) mov reg[LCD_Port],A +0591: 40 NOP (0586) NOP + (0587) +0592: 10 PUSH X (0588) push X ; Save 'X' register +0593: 57 FF MOV X,0xFF (0589) mov X,255 ; 255 Attempts + (0590) + (0591) .LCD_RDY_LOOP: +0595: 2E 36 50 OR [0x36],0x50 (0592) or [Port_2_Data_SHADE], LCD_CNTL_READ ; Raise E to start cycle +0598: 51 36 MOV A,[0x36] (0593) mov A,[Port_2_Data_SHADE] +059A: 60 08 MOV REG[0x8],A (0594) mov reg[LCD_Port],A + (0595) +059C: 40 NOP (0596) nop ; Wait 2 nops to make sure data is ready +059D: 40 NOP (0597) nop +059E: 5D 08 MOV A,REG[0x8] (0598) mov A,reg[LCD_Port] + (0599) + (0600) ; The code below is used to work around the async read issue with the ICE with the + (0601) ; 25/26xxx family of devices. It will help to eliminate "Invalid memory reference" + (0602) ; errors. It is not required when running without the ICE or when using any other + (0603) ; family besides the 25/26xxx family. If not using the ICE or with any other family + (0604) ; the ICE_PORT_SYNC flag should be set to 0. + (0605) IF(ICE_PORT_SYNC) + (0606) mov reg[ 0xfa], A + (0607) mov A, reg[0xfa] + (0608) ENDIF + (0609) +05A0: 08 PUSH A (0610) push A +05A1: 26 36 C0 AND [0x36],0xC0 (0611) and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal +05A4: 51 36 MOV A,[0x36] (0612) mov A,[Port_2_Data_SHADE] +05A6: 60 08 MOV REG[0x8],A (0613) mov reg[LCD_Port],A + (0614) +05A8: 40 NOP (0615) nop ; Add delay for the slowest part and the +05A9: 40 NOP (0616) nop ; fastest PSoC +05AA: 40 NOP (0617) nop + (0618) ; Get the LSBs +05AB: 2E 36 50 OR [0x36],0x50 (0619) or [Port_2_Data_SHADE],LCD_CNTL_READ ; Raise E to start cycle +05AE: 51 36 MOV A,[0x36] (0620) mov A,[Port_2_Data_SHADE] +05B0: 60 08 MOV REG[0x8],A (0621) mov reg[LCD_Port],A + (0622) +05B2: 40 NOP (0623) nop +05B3: 40 NOP (0624) nop + (0625) +05B4: 26 36 C0 AND [0x36],0xC0 (0626) and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal +05B7: 51 36 MOV A,[0x36] (0627) mov A,[Port_2_Data_SHADE] +05B9: 60 08 MOV REG[0x8],A (0628) mov reg[LCD_Port],A + (0629) +05BB: 18 POP A (0630) pop A +05BC: 21 08 AND A,0x8 (0631) and A,LCD_READY_BIT ; Check busy + (0632) +05BE: A0 04 JZ 0x05C3 (0633) jz .UNLOCK +05C0: 79 DEC X (0634) dec X +05C1: BF D3 JNZ 0x0595 (0635) jnz .LCD_RDY_LOOP ; If LCD still busy, read again for 255 times + (0636) .UNLOCK: +05C3: 20 POP X (0637) pop X ; Restore 'X' register + (0638) +05C4: 2E 37 7F OR [0x37],0x7F (0639) or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Revert Data bit to Write mode +05C7: 51 37 MOV A,[0x37] (0640) mov A,[Port_2_DriveMode_0_SHADE] +05C9: 71 10 OR F,0x10 + (0641) M8C_SetBank1 +05CB: 60 08 MOV REG[0x8],A (0642) mov reg[LCD_PortMode0],A ; Setup LCD Port for writing +05CD: 70 EF AND F,0xEF + (0643) M8C_SetBank0 +05CF: 18 POP A (0644) pop A + (0645) RAM_EPILOGUE RAM_USE_CLASS_4 ; Restore Accumulator +05D0: 7F RET (0646) ret + (0647) .ENDSECTION + (0648) + (0649) .SECTION + (0650) ;----------------------------------------------------------------------------- + (0651) ; FUNCTION NAME: LCD_Start + (0652) ; FUNCTION NAME: LCD_Init + (0653) ; + (0654) ; DESCRIPTION: + (0655) ; Initialize LCD + (0656) ; + (0657) ;----------------------------------------------------------------------------- + (0658) ; + (0659) ; ARGUMENTS: none + (0660) ; + (0661) ; RETURNS: none + (0662) ; + (0663) ; SIDE EFFECTS: + (0664) ; The A and X registers may be modified by this or future implementations + (0665) ; of this function. The same is true for all RAM page pointer registers in + (0666) ; the Large Memory Model. When necessary, it is the calling function's + (0667) ; responsibility to preserve their values across calls to fastcall16 + (0668) ; functions. + (0669) ; + (0670) ; Currently only the page pointer registers listed below are modified: + (0671) ; CUR_PP + (0672) ; + (0673) ; THEORY of OPERATION or PROCEDURE: + (0674) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0675) ; This initialization is a bit long, but it should work for + (0676) ; most 2 and 4 line LCDs. + (0677) ; + (0678) LCD_Start: + (0679) _LCD_Start: + (0680) LCD_Init: + (0681) _LCD_Init: + (0682) RAM_PROLOGUE RAM_USE_CLASS_4 + (0683) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + (0684) +05D1: 26 37 80 AND [0x37],0x80 (0685) and [Port_2_DriveMode_0_SHADE],~LCD_PORT_MASK ; Mask off LCD bits +05D4: 2E 37 7F OR [0x37],0x7F (0686) or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Set LCD port for writing +05D7: 26 38 80 AND [0x38],0x80 (0687) and [Port_2_DriveMode_1_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + (0688) +05DA: 51 37 MOV A,[0x37] (0689) mov A,[Port_2_DriveMode_0_SHADE] +05DC: 71 10 OR F,0x10 + (0690) M8C_SetBank1 +05DE: 60 08 MOV REG[0x8],A (0691) mov reg[LCD_PortMode0],A ; Setup LCD Port for writing +05E0: 51 38 MOV A,[0x38] (0692) mov A,[Port_2_DriveMode_1_SHADE] +05E2: 60 09 MOV REG[0x9],A (0693) mov reg[LCD_PortMode1],A +05E4: 70 EF AND F,0xEF + (0694) M8C_SetBank0 + (0695) +05E6: 50 FA MOV A,0xFA (0696) mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) +05E8: 90 63 CALL _LCD_Delay50uTimes (0697) call LCD_Delay50uTimes +05EA: 50 FA MOV A,0xFA (0698) mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) +05EC: 90 5F CALL _LCD_Delay50uTimes (0699) call LCD_Delay50uTimes + (0700) +05EE: 50 03 MOV A,0x3 (0701) mov A,03h +05F0: 9F 4C CALL 0x053E (0702) call LCD_WCNTL_Nibble + (0703) +05F2: 50 52 MOV A,0x52 (0704) mov A,82 ; Delay for 4.1 mSec (82 * 50uSec) +05F4: 90 57 CALL _LCD_Delay50uTimes (0705) call LCD_Delay50uTimes + (0706) +05F6: 50 03 MOV A,0x3 (0707) mov A,03h +05F8: 9F 44 CALL 0x053E (0708) call LCD_WCNTL_Nibble + (0709) +05FA: 90 5F CALL _LCD_Delay50u (0710) call LCD_Delay50u +05FC: 90 5D CALL _LCD_Delay50u (0711) call LCD_Delay50u +05FE: 90 5B CALL _LCD_Delay50u (0712) call LCD_Delay50u + (0713) +0600: 50 03 MOV A,0x3 (0714) mov A,03h +0602: 9F 3A CALL 0x053E (0715) call LCD_WCNTL_Nibble + (0716) +0604: 50 5A MOV A,0x5A (0717) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +0606: 90 45 CALL _LCD_Delay50uTimes (0718) call LCD_Delay50uTimes + (0719) +0608: 50 02 MOV A,0x2 (0720) mov A,02h +060A: 9F 32 CALL 0x053E (0721) call LCD_WCNTL_Nibble + (0722) +060C: 50 5A MOV A,0x5A (0723) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +060E: 90 3D CALL _LCD_Delay50uTimes (0724) call LCD_Delay50uTimes + (0725) +0610: 50 08 MOV A,0x8 (0726) mov A,08h +0612: 9F 16 CALL _LCD_Control (0727) call LCD_Control +0614: 50 5A MOV A,0x5A (0728) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +0616: 90 35 CALL _LCD_Delay50uTimes (0729) call LCD_Delay50uTimes + (0730) +0618: 50 01 MOV A,0x1 (0731) mov A,01h +061A: 9F 0E CALL _LCD_Control (0732) call LCD_Control +061C: 50 5A MOV A,0x5A (0733) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +061E: 90 2D CALL _LCD_Delay50uTimes (0734) call LCD_Delay50uTimes + (0735) +0620: 50 06 MOV A,0x6 (0736) mov A,06h +0622: 9F 06 CALL _LCD_Control (0737) call LCD_Control + (0738) +0624: 50 0E MOV A,0xE (0739) mov A,0Eh +0626: 9F 02 CALL _LCD_Control (0740) call LCD_Control + (0741) +0628: 50 2C MOV A,0x2C (0742) mov A,LCD_4BIT_2LINE ; Setup for 4 bit interface, 2 line +062A: 9E FE CALL _LCD_Control (0743) call LCD_Control + (0744) +062C: 50 08 MOV A,0x8 (0745) mov A,LCD_DISP_OFF +062E: 9E FA CALL _LCD_Control (0746) call LCD_Control + (0747) +0630: 50 0C MOV A,0xC (0748) mov A,LCD_DISP_ON +0632: 9E F6 CALL _LCD_Control (0749) call LCD_Control + (0750) +0634: 50 03 MOV A,0x3 (0751) mov A,LCD_DISP_INC +0636: 9E F2 CALL _LCD_Control (0752) call LCD_Control + (0753) +0638: 50 5A MOV A,0x5A (0754) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +063A: 90 11 CALL _LCD_Delay50uTimes (0755) call LCD_Delay50uTimes + (0756) RAM_EPILOGUE RAM_USE_CLASS_4 +063C: 7F RET (0757) ret + (0758) .ENDSECTION + (0759) + (0760) ;----------------------------------------------------------------------------- + (0761) ; FUNCTION NAME: LCD_Position + (0762) ; + (0763) ; DESCRIPTION: + (0764) ; Position Cursor at Row and Col location + (0765) ; + (0766) ;----------------------------------------------------------------------------- + (0767) ; + (0768) ; ARGUMENTS: + (0769) ; A => Row 0 to 3 + (0770) ; X => Col 0 to 39+ + (0771) ; + (0772) ; RETURNS: none + (0773) ; + (0774) ; SIDE EFFECTS: + (0775) ; The A and X registers may be modified by this or future implementations + (0776) ; of this function. The same is true for all RAM page pointer registers in + (0777) ; the Large Memory Model. When necessary, it is the calling function's + (0778) ; responsibility to preserve their values across calls to fastcall16 + (0779) ; functions. + (0780) ; + (0781) .LITERAL + (0782) LCD_ROW_OFFSET:: + (0783) DB LCD_ROW1_OFFSET, LCD_ROW2_OFFSET, LCD_ROW3_OFFSET, LCD_ROW4_OFFSET + (0784) .ENDLITERAL + (0785) + (0786) .SECTION + (0787) LCD_Position: + (0788) _LCD_Position: + (0789) RAM_PROLOGUE RAM_USE_CLASS_2 +0641: 21 03 AND A,0x3 (0790) and A,03h ; Mask off 2 bits for row address 0 to 3 +0643: 10 PUSH X (0791) push X ; Store COL +0644: FF F7 INDEX LCD_ROW_OFFSET (0792) index LCD_ROW_OFFSET ; Get ROW memory offset from table +0646: 4F MOV X,SP (0793) mov X,SP ; Get Stack pointer +0647: 03 FF ADD A,[X-1] (0794) add A,[X+(-1)] ; Add the COL to the display pointer +0649: 20 POP X (0795) pop X + (0796) +064A: 9E DE CALL _LCD_Control (0797) call LCD_Control ; Write control byte + (0798) RAM_EPILOGUE RAM_USE_CLASS_2 +064C: 7F RET (0799) ret + (0800) .ENDSECTION + (0801) + (0802) .SECTION + (0803) ;----------------------------------------------------------------------------- + (0804) ; FUNCTION NAME: LCD_Delay50uTimes + (0805) ; + (0806) ; DESCRIPTION: + (0807) ; Delay increments of 50uSeconds + (0808) ; + (0809) ;----------------------------------------------------------------------------- + (0810) ; + (0811) ; ARGUMENTS: + (0812) ; A contains the delay multiplier + (0813) ; + (0814) ; RETURNS: + (0815) ; + (0816) ; SIDE EFFECTS: + (0817) ; The A and X registers may be modified by this or future implementations + (0818) ; of this function. The same is true for all RAM page pointer registers in + (0819) ; the Large Memory Model. When necessary, it is the calling function's + (0820) ; responsibility to preserve their values across calls to fastcall16 + (0821) ; functions. + (0822) ; + (0823) ; + (0824) LCD_Delay50uTimes: + (0825) _LCD_Delay50uTimes: + (0826) RAM_PROLOGUE RAM_USE_CLASS_1 +064D: 90 0C CALL _LCD_Delay50u (0827) call LCD_Delay50u +064F: 78 DEC A (0828) dec A +0650: BF FC JNZ _LCD_Delay50uTimes (0829) jnz LCD_Delay50uTimes + (0830) RAM_EPILOGUE RAM_USE_CLASS_1 +0652: 7F RET (0831) ret + (0832) + (0833) .ENDSECTION + (0834) + (0835) ;----------------------------------------------------------------------------- + (0836) ; FUNCTION NAME: LCD_Delay50u + (0837) ; + (0838) ; DESCRIPTION: + (0839) ; Delay 50uSec for any clock frequency from 1.5MHz to 24MHz + (0840) ; Slower clock frequencies the delay will be; + (0841) ; 1.5 + (0842) ; -------------- * 50uSec + (0843) ; clock_freq(MHz) + (0844) ; + (0845) ; + (0846) ;----------------------------------------------------------------------------- + (0847) ; + (0848) ; ARGUMENTS: none + (0849) ; + (0850) ; RETURNS: none + (0851) ; + (0852) ; SIDE EFFECTS: + (0853) ; The A and X registers may be modified by this or future implementations + (0854) ; of this function. The same is true for all RAM page pointer registers in + (0855) ; the Large Memory Model. When necessary, it is the calling function's + (0856) ; responsibility to preserve their values across calls to fastcall16 + (0857) ; functions. + (0858) ; + (0859) ; THEORY of OPERATION or PROCEDURE: + (0860) ; + (0861) .LITERAL + (0862) LCD_Delay50u_Table:: + (0863) DB 08h, 19h, 3Ah, 7Ch, 01h, 01h, 01h, 01h + (0864) ; 3MHz, 6MHz, 12MHz, 24MHz, 1.5MHz, 750kHz, 188kHz, 94kHz + (0865) .ENDLITERAL + (0866) .SECTION + (0867) + (0868) LCD_Delay50u: + (0869) _LCD_Delay50u: ; [11] Call + (0870) RAM_PROLOGUE RAM_USE_CLASS_1 +065B: 08 PUSH A (0871) push A +065C: 71 10 OR F,0x10 + (0872) M8C_SetBank1 ; [4] +065E: 5D E0 MOV A,REG[0xE0] (0873) mov A, reg[OSC_CR0] ; [6] Get delay value +0660: 70 EF AND F,0xEF + (0874) M8C_SetBank0 ; [4] +0662: 21 07 AND A,0x7 (0875) and A,07h ; [4] Mask off only the clock bits +0664: 39 05 CMP A,0x5 (0876) cmp A,05h +0666: D0 06 JNC 0x066D (0877) jnc .Delay50u_End +0668: FF E9 INDEX LCD_Delay50u_Table (0878) index LCD_Delay50u_Table ; [13] Get delay value + (0879) .Delay50u_Loop: ; +066A: 78 DEC A (0880) dec A ; [4] +066B: BF FE JNZ 0x066A (0881) jnz .Delay50u_Loop ; [5] + (0882) .Delay50u_End: +066D: 18 POP A (0883) pop A + (0884) RAM_EPILOGUE RAM_USE_CLASS_1 +066E: 7F RET (0885) ret + (0886) .ENDSECTION + (0887) + (0888) + (0889) ;----------------------------------------------------------------------------- + (0890) ; If bargraph is not enabled, the following functions are not required. + (0891) ;----------------------------------------------------------------------------- + (0892) + (0893) IF (LCD_BARGRAPH_ENABLE) + (0894) + (0895) IF SYSTEM_SMALL_MEMORY_MODEL + (0896) .SECTION + (0897) ;----------------------------------------------------------------------------- + (0898) ; FUNCTION NAME: LCD_DrawBG + (0899) ; + (0900) ; DESCRIPTION: + (0901) ; This legacy fastcall version are provided only to support existing small + (0902) ; memory model assembly language code---it does not work in the large memory + (0903) ; model. + (0904) ; + (0905) ; ** This legacy fastcall version is provided on a temporary basis to + (0906) ; ** ease the transition to the 4.2 release of PSoC Designer. Its use is + (0907) ; ** deprecated and its status is "No Further Maintenance". If you call this + (0908) ; ** function in assembly you should convert to _LCD_DrawVBG + (0909) ; ** (with a leading underscore) and the fastcall16 interface + (0910) ; + (0911) ; Draw a horizontal bargraph on the LCD with the given parameters. This + (0912) ; is a legacy function that is intended to support existing Assembly + (0913) ; language programs that call this function. This should not be used for + (0914) ; new code or with Large Memory Model programs. + (0915) ;----------------------------------------------------------------------------- + (0916) ; + (0917) ; LEGACY FASTCALL ARGUMENTS: + (0918) ; A => Starting row for bargraph 0 to 3 + (0919) ; [X] => Starting Column for bargraph 0 to 39+ + (0920) ; [x-1] => Length of bargraph in chars 1 to 40+ + (0921) ; [X-2] => Position of pointer in segments 5 times Length + (0922) ; + (0923) ; + (0924) ; RETURNS: none + (0925) ; + (0926) ; SIDE EFFECTS: + (0927) ; The A and X registers may be modified by this or future implementations + (0928) ; of this function. The same is true for all RAM page pointer registers in + (0929) ; the Large Memory Model. When necessary, it is the calling function's + (0930) ; responsibility to preserve their values across calls to fastcall16 + (0931) ; functions. + (0932) ; + (0933) ; If LCD_Init is not called before this function, the + (0934) ; bargraph will not be drawn properly. + (0935) ; + (0936) ; Stack offset constants + (0937) BG_COLX: equ 0 ; Stack position of Column + (0938) BG_CHAR_LENX: equ -1 ; Stack position of Length + (0939) BG_LENGTHX: equ -2 ; Stack position of bargraph pointer position + (0940) + (0941) + (0942) LCD_DrawBG: + (0943) push X + (0944) mov X,[X+BG_COLX] ; Row in A, Col in X + (0945) call LCD_Position ; Set cursor position + (0946) pop X ; Restore pointer + (0947) + (0948) .LCD_BG_LOOP1X: + (0949) cmp [X+BG_LENGTHX],00h ; Check for past end of BG + (0950) jnz .LCD_CHECK1X + (0951) mov A,00h ; Load empty character + (0952) jmp .LCD_BG_DOITX ; + (0953) + (0954) .LCD_CHECK1X: + (0955) cmp [X+BG_LENGTHX],06h ; Check if BG pointer is at this character + (0956) jnc .LCD_CHECK2X ; Note yet, use full character + (0957) mov A,[X+BG_LENGTHX] + (0958) sub [X+BG_LENGTHX],A + (0959) jmp .LCD_BG_DOITX + (0960) + (0961) .LCD_CHECK2X: ; Put index to full character + (0962) mov A, 06h + (0963) sub [X+BG_LENGTHX],05h ; Subtract another 5 positions + (0964) + (0965) .LCD_BG_DOITX: + (0966) call LCD_WriteData ; Display BG character + (0967) + (0968) dec [X+BG_CHAR_LENX] ; Dec Char count + (0969) jnz .LCD_BG_LOOP1X ; Do it all over again + (0970) ret + (0971) .ENDSECTION + (0972) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + (0973) + (0974) .SECTION + (0975) ;----------------------------------------------------------------------------- + (0976) ; FUNCTION NAME: LCD_DrawBG + (0977) ; + (0978) ; DESCRIPTION: + (0979) ; Draw a horizontal bargraph on the LCD with the given parameters. + (0980) ; + (0981) ; + (0982) ;----------------------------------------------------------------------------- + (0983) ; + (0984) ; FASTCALL16 ARGUMENTS: + (0985) ; [SP-3] => Starting row for bargraph 0 to 3 + (0986) ; [SP-4] => Starting Column for bargraph 0 to 39+ + (0987) ; [SP-5] => Length of bargraph in chars 1 to 40+ + (0988) ; [SP-6] => Position of pointer in segments 5 times Length + (0989) ; + (0990) ; + (0991) ; RETURNS: none + (0992) ; + (0993) ; SIDE EFFECTS: + (0994) ; The A and X registers may be modified by this or future implementations + (0995) ; of this function. The same is true for all RAM page pointer registers in + (0996) ; the Large Memory Model. When necessary, it is the calling function's + (0997) ; responsibility to preserve their values across calls to fastcall16 + (0998) ; functions. + (0999) ; + (1000) ; Currently only the page pointer registers listed below are modified: + (1001) ; CUR_PP + (1002) ; + (1003) ; If LCD_Init is not called before this function, the + (1004) ; bargraph will not be drawn properly. + (1005) ; + (1006) ; Stack offset constants + (1007) BG_ROW: equ -3 + (1008) BG_COL: equ -4 ; Stack position of Column + (1009) BG_CHAR_LEN: equ -5 ; Stack position of Length + (1010) BG_LENGTH: equ -6 ; Stack position of bargraph pointer position + (1011) + (1012) + (1013) _LCD_DrawBG: + (1014) RAM_PROLOGUE RAM_USE_CLASS_2 +066F: 4F MOV X,SP (1015) mov X, SP +0670: 10 PUSH X (1016) push X +0671: 52 FD MOV A,[X-3] (1017) mov A,[X+BG_ROW] ; Row in A +0673: 59 FC MOV X,[X-4] (1018) mov X,[X+BG_COL] ; Col in X + (1019) RAM_EPILOGUE RAM_USE_CLASS_2 +0675: 9F CA CALL _LCD_Position (1020) call LCD_Position ; Set cursor position + (1021) RAM_PROLOGUE RAM_USE_CLASS_2 +0677: 20 POP X (1022) pop X + (1023) + (1024) .LCD_BG_LOOP1: +0678: 3D FA 00 CMP [X-6],0x0 (1025) cmp [X+BG_LENGTH],00h ; Check for past end of BG +067B: B0 05 JNZ 0x0681 (1026) jnz .LCD_CHECK1 +067D: 50 00 MOV A,0x0 (1027) mov A,00h ; Load empty character +067F: 80 11 JMP 0x0691 (1028) jmp .LCD_BG_DOIT ; + (1029) + (1030) .LCD_CHECK1: +0681: 3D FA 06 CMP [X-6],0x6 (1031) cmp [X+BG_LENGTH],06h ; Check if BG pointer is at this character +0684: D0 07 JNC 0x068C (1032) jnc .LCD_CHECK2 ; Note yet, use full character +0686: 52 FA MOV A,[X-6] (1033) mov A,[X+BG_LENGTH] +0688: 15 FA SUB [X-6],A (1034) sub [X+BG_LENGTH],A +068A: 80 06 JMP 0x0691 (1035) jmp .LCD_BG_DOIT + (1036) + (1037) .LCD_CHECK2: ; Put index to full character +068C: 50 06 MOV A,0x6 (1038) mov A, 06h +068E: 17 FA 05 SUB [X-6],0x5 (1039) sub [X+BG_LENGTH],05h ; Subtract another 5 positions + (1040) + (1041) .LCD_BG_DOIT: +0691: 9E 83 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(1042) call LCD_WriteData ; Display BG character + (1043) +0693: 7B FB DEC [X-5] (1044) dec [X+BG_CHAR_LEN] ; Dec Char count +0695: BF E2 JNZ 0x0678 (1045) jnz .LCD_BG_LOOP1 ; Do it all over again + (1046) RAM_EPILOGUE RAM_USE_CLASS_2 +0697: 7F RET (1047) ret + (1048) .ENDSECTION + (1049) + (1050) IF SYSTEM_SMALL_MEMORY_MODEL + (1051) .SECTION + (1052) ;----------------------------------------------------------------------------- + (1053) ; FUNCTION NAME: LCD_DrawVBG + (1054) ; + (1055) ; DESCRIPTION: + (1056) ; This legacy fastcall version are provided only to support existing small + (1057) ; memory model assembly language code---it does not work in the large memory + (1058) ; model. + (1059) ; + (1060) ; ** This legacy fastcall version is provided on a temporary basis to + (1061) ; ** ease the transition to the 4.2 release of PSoC Designer. Its use is + (1062) ; ** deprecated and its status is "No Further Maintenance". If you call this + (1063) ; ** function in assembly you should convert to _LCD_DrawVBG + (1064) ; ** (with a leading underscore) and the fastcall16 interface + (1065) ; + (1066) ; Draw a vertical bargraph on the LCD with the given parameters. This + (1067) ; is a legacy function that is intended to support existing Assembly + (1068) ; language programs that call this function. This should not be used for + (1069) ; new code or with Large Memory Model programs. + (1070) ;----------------------------------------------------------------------------- + (1071) ; + (1072) ; LEGACY FASTCALL ARGUMENTS: + (1073) ; A => Starting row for bargraph 0 to 3 + (1074) ; [X] => Starting Column for bargraph 0 to 40+ + (1075) ; [x-1] => Height of bargraph in chars 1 - 4 + (1076) ; [X-2] => Position of pointer in segments 8 times height + (1077) ; RETURNS: + (1078) ; + (1079) ; SIDE EFFECTS: + (1080) ; The A and X registers may be modified by this or future implementations + (1081) ; of this function. The same is true for all RAM page pointer registers in + (1082) ; the Large Memory Model. When necessary, it is the calling function's + (1083) ; responsibility to preserve their values across calls to fastcall16 + (1084) ; functions. + (1085) ; + (1086) ; If LCD_Init is not called before this function, the + (1087) ; bargraph will not be drawn properly. + (1088) ; + (1089) ; Stack offset constants + (1090) VBG_COLX: equ 0 + (1091) VBG_CHAR_HEIGHTX: equ -1 + (1092) VBG_SEG_HEIGHTX: equ -2 + (1093) + (1094) LCD_DrawVBG: + (1095) + (1096) and A,03h ; Make sure only rows 0 - 3 are valid + (1097) .VBG_LOOPX: + (1098) push A + (1099) index LCD_ROW_OFFSET ; Get row offset + (1100) add A,[X+VBG_COLX] ; Add column offset to position + (1101) call LCD_Control ; Position Cursor + (1102) cmp [X+VBG_SEG_HEIGHTX],00h ; Check for zero segs + (1103) jnz .VBG_NZ_SEGX + (1104) mov A,' ' ; Load space character + (1105) jmp .VBG_WRITE_CHARX + (1106) .VBG_NZ_SEGX: + (1107) cmp [X+VBG_SEG_HEIGHTX],09h ; Check for full segment + (1108) jnc .VBG_FULL_SEGX + (1109) ; Partial segment between 1 and 8 + (1110) mov A,[X+VBG_SEG_HEIGHTX] + (1111) dec A + (1112) mov [X+VBG_SEG_HEIGHTX],00h ; Zero segment height + (1113) jmp .VBG_WRITE_CHARX + (1114) + (1115) .VBG_FULL_SEGX: ; Bargaph + (1116) sub [X+VBG_SEG_HEIGHTX],08h ; Subtract full segment + (1117) mov A,07h ; Load full segment + (1118) + (1119) .VBG_WRITE_CHARX: ; Write character to display + (1120) call LCD_WriteData ; Write value + (1121) pop A + (1122) dec A + (1123) dec [X+VBG_CHAR_HEIGHTX] + (1124) jnz .VBG_LOOPX + (1125) ret + (1126) .ENDSECTION + (1127) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + (1128) + (1129) .SECTION + (1130) ;----------------------------------------------------------------------------- + (1131) ; FUNCTION NAME: LCD_DrawVBG + (1132) ; + (1133) ; DESCRIPTION: + (1134) ; Draw a vertical bargraph on the LCD with the given parameters. + (1135) ; + (1136) ; + (1137) ;----------------------------------------------------------------------------- + (1138) ; + (1139) ; FASTCALL16 ARGUMENTS: + (1140) ; + (1141) ; [SP-3] => Starting row for bargraph 0 to 3 + (1142) ; [SP-4] => Starting Column for bargraph 0 to 40+ + (1143) ; [SP-5] => Height of bargraph in chars 1 - 4 + (1144) ; [SP-6] => Position of pointer in segments 8 times height + (1145) ; RETURNS: + (1146) ; + (1147) ; SIDE EFFECTS: + (1148) ; The A and X registers may be modified by this or future implementations + (1149) ; of this function. The same is true for all RAM page pointer registers in + (1150) ; the Large Memory Model. When necessary, it is the calling function's + (1151) ; responsibility to preserve their values across calls to fastcall16 + (1152) ; functions. + (1153) ; + (1154) ; Currently only the page pointer registers listed below are modified: + (1155) ; CUR_PP + (1156) ; + (1157) ; If LCD_Init is not called before this function, the + (1158) ; bargraph will not be drawn properly. + (1159) ; + (1160) ; Stack offset constants + (1161) VBG_ROW: equ -3 + (1162) VBG_COL: equ -4 + (1163) VBG_CHAR_HEIGHT: equ -5 + (1164) VBG_SEG_HEIGHT: equ -6 + (1165) + (1166) _LCD_DrawVBG: + (1167) RAM_PROLOGUE RAM_USE_CLASS_2 + (1168) mov X, SP + (1169) mov A, [X+VBG_ROW] + (1170) and A,03h ; Make sure only rows 0 - 3 are valid + (1171) .VBG_LOOP: + (1172) push A + (1173) index LCD_ROW_OFFSET ; Get row offset + (1174) add A,[X+VBG_COL] ; Add column offset to position + (1175) call LCD_Control ; Position Cursor + (1176) cmp [X+VBG_SEG_HEIGHT],00h ; Check for zero segs + (1177) jnz .VBG_NZ_SEG + (1178) mov A,' ' ; Load space character + (1179) jmp .VBG_WRITE_CHAR + (1180) .VBG_NZ_SEG: + (1181) cmp [X+VBG_SEG_HEIGHT],09h ; Check for full segment + (1182) jnc .VBG_FULL_SEG + (1183) ; Partial segment between 1 and 8 + (1184) mov A,[X+VBG_SEG_HEIGHT] + (1185) dec A + (1186) mov [X+VBG_SEG_HEIGHT],00h ; Zero segment height + (1187) jmp .VBG_WRITE_CHAR + (1188) + (1189) .VBG_FULL_SEG: ; Bargaph + (1190) sub [X+VBG_SEG_HEIGHT],08h ; Subtract full segment + (1191) mov A,07h ; Load full segment + (1192) + (1193) .VBG_WRITE_CHAR: ; Write character to display + (1194) call LCD_WriteData ; Write value + (1195) pop A + (1196) dec A + (1197) dec [X+VBG_CHAR_HEIGHT] + (1198) jnz .VBG_LOOP + (1199) RAM_EPILOGUE RAM_USE_CLASS_2 + (1200) ret + (1201) .ENDSECTION + (1202) + (1203) .SECTION + (1204) ;----------------------------------------------------------------------------- + (1205) ; FUNCTION NAME: LCD_InitVBG + (1206) ; + (1207) ; DESCRIPTION: + (1208) ; Initialize the vertical bargraph characters. + (1209) ; + (1210) ;----------------------------------------------------------------------------- + (1211) ; + (1212) ; ARGUMENTS: none + (1213) ; + (1214) ; RETURNS: none + (1215) ; + (1216) ; SIDE EFFECTS: + (1217) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (1218) ; Only one type of bargraph (horizontal or vertical) may be used + (1219) ; at a time since they each require their own set of characters. + (1220) ; + (1221) ; SIDE EFFECTS: + (1222) ; The A and X registers may be modified by this or future implementations + (1223) ; of this function. The same is true for all RAM page pointer registers in + (1224) ; the Large Memory Model. When necessary, it is the calling function's + (1225) ; responsibility to preserve their values across calls to fastcall16 + (1226) ; functions. + (1227) ; + (1228) ; Currently only the page pointer registers listed below are modified: + (1229) ; CUR_PP + (1230) ; + (1231) ; Stack offset constants + (1232) VBGDATA_CTR: equ 00h ; Char data count stack offset + (1233) VBG_BYTES: equ 01h ; Byte counter stack offset + (1234) + (1235) LCD_InitVBG: + (1236) _LCD_InitVBG: + (1237) RAM_PROLOGUE RAM_USE_CLASS_2 + (1238) mov X,SP ; Get location of stack + (1239) push A ; Create 2 locations + (1240) push A + (1241) + (1242) mov A,LCD_CG_RAM_OFFSET ; Setup pointer + (1243) call LCD_Control ; Position the CG pointer + (1244) mov [X+VBGDATA_CTR],01h ; Reset data counter + (1245) + (1246) .VBG_Loop1: ; loop once for each 8 characters + (1247) mov [X+VBG_BYTES],08h ; Load cycle pointer + (1248) .VBG_Loop2: ; Loop once for each line in character (8 times) + (1249) mov A,[X+VBGDATA_CTR] + (1250) cmp A,[X+VBG_BYTES] + (1251) jnc .VBG_SOLID + (1252) mov A,00h ; Empty line + (1253) jmp .VBG_Load ; Jump to load the bargraph + (1254) .VBG_SOLID: + (1255) mov A,FFh ; Load solid line + (1256) .VBG_Load: + (1257) call LCD_WriteData ; character data + (1258) dec [X+VBG_BYTES] ; Dec byte counter + (1259) jnz .VBG_Loop2 ; End Loop 2 + (1260) inc [X+VBGDATA_CTR] + (1261) cmp [X+VBGDATA_CTR],09h + (1262) jnz .VBG_Loop1 ; End Loop1 + (1263) + (1264) pop A + (1265) pop A + (1266) mov A,LCD_DISP_ON ; Turn on display, don't really + (1267) call LCD_Control ; need this. + (1268) RAM_EPILOGUE RAM_USE_CLASS_2 + (1269) ret + (1270) .ENDSECTION + (1271) + (1272) ;----------------------------------------------------------------------------- + (1273) ; FUNCTION NAME: LCD_InitBG + (1274) ; + (1275) ; DESCRIPTION: + (1276) ; Initialize horizontal bargraph characters + (1277) ; + (1278) ;----------------------------------------------------------------------------- + (1279) ; + (1280) ; ARGUMENTS: + (1281) ; A = type 0 = full |||||||||........ + (1282) ; 1 = single vertical line ..........|...... + (1283) ; + (1284) ; RETURNS: + (1285) ; + (1286) ; SIDE EFFECTS: + (1287) ; The A and X registers may be modified by this or future implementations + (1288) ; of this function. The same is true for all RAM page pointer registers in + (1289) ; the Large Memory Model. When necessary, it is the calling function's + (1290) ; responsibility to preserve their values across calls to fastcall16 + (1291) ; functions. + (1292) ; + (1293) ; Currently only the page pointer registers listed below are modified: + (1294) ; CUR_PP + (1295) ; + (1296) ; Only one type of bargraph (horizontal or vertical) may be used + (1297) ; at a time since they each require their own set of characters. + (1298) ; + (1299) ; THEORY of OPERATION or PROCEDURE: + (1300) ; This function writes to the LCD character RAM to generate 8 custom + (1301) ; characters used to generated one of two horizontal bargraphs. + (1302) ; + (1303) .LITERAL + (1304) LCD_BG_TYPE1:: ; ....., |...., ||..., |||.., ||||., |||||, ||||| + (1305) DB 00h, 10h, 18h, 1Ch, 1Eh, 1Fh, 1Fh + (1306) LCD_BG_TYPE2:: ; ....., |...., .|..., ..|.., ...|., ....|, ..... + (1307) DB 00h, 10h, 08h, 04h, 02h, 01h, 00h + (1308) .ENDLITERAL + (1309) + (1310) .SECTION + (1311) ; Stack offset constants + (1312) BGDATA_PTR: equ 00h ; Stack offsets + (1313) BGCHARS: equ 01h + (1314) BGTYPE: equ 02h + (1315) + (1316) LCD_InitBG: + (1317) _LCD_InitBG: + (1318) RAM_PROLOGUE RAM_USE_CLASS_2 +06A6: 4F MOV X,SP (1319) mov X,SP ; Get location of stack +06A7: 38 03 ADD SP,0x3 (1320) add SP,3 +06A9: 54 02 MOV [X+2],A (1321) mov [X+BGTYPE],A ; Store the bargraph type + (1322) +06AB: 50 40 MOV A,0x40 (1323) mov A,LCD_CG_RAM_OFFSET ; Setup pointer +06AD: 9E 7B CALL _LCD_Control (1324) call LCD_Control ; Position the CG pointer +06AF: 56 00 00 MOV [X+0],0x0 (1325) mov [X+BGDATA_PTR],00h ; Reset pointer to BG data + (1326) + (1327) .BG_Loop1: +06B2: 56 01 08 MOV [X+1],0x8 (1328) mov [X+BGCHARS],08h ; Load cycle pointer + (1329) .BG_Loop2: +06B5: 52 00 MOV A,[X+0] (1330) mov A,[X+BGDATA_PTR] +06B7: 3D 02 00 CMP [X+2],0x0 (1331) cmp [X+BGTYPE],00h ; Check which bargraph +06BA: B0 05 JNZ 0x06C0 (1332) jnz .BG_OTHER +06BC: FF DA INDEX LCD_BG_TYPE1|_LCD_InitVBG(1333) index LCD_BG_TYPE1 +06BE: 80 03 JMP 0x06C2 (1334) jmp .BG_Load + (1335) .BG_OTHER: +06C0: FF DD INDEX LCD_BG_TYPE2 (1336) index LCD_BG_TYPE2 + (1337) .BG_Load: +06C2: 9E 52 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(1338) call LCD_WriteData +06C4: 7B 01 DEC [X+1] (1339) dec [X+BGCHARS] ; Character builder counter +06C6: BF EE JNZ 0x06B5 (1340) jnz .BG_Loop2 +06C8: 77 00 INC [X+0] (1341) inc [X+BGDATA_PTR] ; Advance to next character +06CA: 3D 00 07 CMP [X+0],0x7 (1342) cmp [X+BGDATA_PTR],07h +06CD: BF E4 JNZ 0x06B2 (1343) jnz .BG_Loop1 + (1344) +06CF: 38 FD ADD SP,0xFD (1345) add SP,-3 +06D1: 50 0C MOV A,0xC (1346) mov A,LCD_DISP_ON +06D3: 9E 55 CALL _LCD_Control (1347) call LCD_Control + (1348) RAM_EPILOGUE RAM_USE_CLASS_2 +06D5: 7F RET (1349) ret + (1350) .ENDSECTION + (1351) + (1352) ENDIF + (1353) + (1354) ; End of File LCD.asm +FILE: lib\insamp.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: INSAMP.asm + (0004) ;; Version: 2.2, Updated on 2012/9/21 at 11:59:7 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: + (0008) ;; Assembler source code for a two-OpAmp Instrumentation Amplifier + (0009) ;; topology in the 25/26xxx family of PSoC devices + (0010) ;; + (0011) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0012) ;; arguments and observe the associated "Registers are volatile" policy. + (0013) ;; This means it is the caller's responsibility to preserve any values + (0014) ;; in the X and A registers that are still needed after the API functions + (0015) ;; returns. For Large Memory Model devices it is also the caller's + (0016) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0017) ;; MVW_PP registers. Even though some of these registers may not be modified + (0018) ;; now, there is no guarantee that will remain the case in future releases. + (0019) ;;----------------------------------------------------------------------------- + (0020) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0021) ;;***************************************************************************** + (0022) ;;***************************************************************************** + (0023) + (0024) include "m8c.inc" + (0025) include "memory.inc" + (0026) include "INSAMP.inc" + (0027) + (0028) ;----------------------------------------------- + (0029) ; Global Symbols + (0030) ;----------------------------------------------- + (0031) + (0032) export INSAMP_Start + (0033) export _INSAMP_Start + (0034) export INSAMP_SetPower + (0035) export _INSAMP_SetPower + (0036) + (0037) export INSAMP_SetGain + (0038) export _INSAMP_SetGain + (0039) + (0040) export INSAMP_Stop + (0041) export _INSAMP_Stop + (0042) + (0043) + (0044) AREA bss (RAM,REL) + (0045) + (0046) ;----------------------------------------------- + (0047) ; Constant Definitions + (0048) ;----------------------------------------------- + (0049) + (0050) POWERMASK: equ 0x03 ; Power field mask for CR2 + (0051) GAINMASK: equ F0h ; Gain field mask for CR0 + (0052) + (0053) + (0054) ;----------------------------------------------- + (0055) ; Variable Allocation + (0056) ;----------------------------------------------- + (0057) + (0058) + (0059) AREA UserModules (ROM, REL) + (0060) + (0061) .SECTION + (0062) ;----------------------------------------------------------------------------- + (0063) ; FUNCTION NAME: INSAMP_Start + (0064) ; FUNCTION NAME: INSAMP_Setpower + (0065) ; + (0066) ; DESCRIPTION: + (0067) ; Sets power to the analog blocks used in this module. All three blocks + (0068) ; are set to the same power setting (which should be the same as the + (0069) ; analog reference power global parameter for best operation!). Constants + (0070) ; for proper values are defined in asm and C interface files. + (0071) ;----------------------------------------------------------------------------- + (0072) ; + (0073) ; ARGUMENTS: fastcall16 BYTE bPowerSetting in the A register + (0074) ; RETURNS: Nothing + (0075) ; SIDE EFFECTS: + (0076) ; The A and X registers may be modified by this or future implementations + (0077) ; of this function. The same is true for all RAM page pointer registers in + (0078) ; the Large Memory Model. When necessary, it is the calling function's + (0079) ; responsibility to perserve their values across calls to fastcall16 + (0080) ; functions. + (0081) ; + (0082) INSAMP_Start: + (0083) _INSAMP_Start: + (0084) INSAMP_SetPower: + (0085) _INSAMP_SetPower: + (0086) RAM_PROLOGUE RAM_USE_CLASS_2 + (0087) +06D6: 21 03 AND A,0x3 (0088) and A, POWERMASK ; mask A to protect unchanged bits +06D8: 4F MOV X,SP (0089) mov X, SP ; define temp store location + (0090) +06D9: 08 PUSH A (0091) push A ; put power value in temp store +06DA: 5D 73 MOV A,REG[0x73] (0092) mov A, reg[INSAMP_INV_CR2] ; read power value +06DC: 21 FC AND A,0xFC (0093) and A, ~POWERMASK ; clear power bits in A +06DE: 2B 00 OR A,[X+0] (0094) or A, [X] ; combine power value with balance of reg. +06E0: 60 73 MOV REG[0x73],A (0095) mov reg[INSAMP_INV_CR2], A + (0096) +06E2: 5D 77 MOV A,REG[0x77] (0097) mov A, reg[INSAMP_NON_INV_CR2] ; read power value +06E4: 21 FC AND A,0xFC (0098) and A, ~POWERMASK ; clear power bits in A +06E6: 2B 00 OR A,[X+0] (0099) or A, [X] ; combine power value with balance of reg. +06E8: 60 77 MOV REG[0x77],A (0100) mov reg[INSAMP_NON_INV_CR2], A +06EA: 18 POP A (0101) pop A + (0102) RAM_EPILOGUE RAM_USE_CLASS_2 +06EB: 7F RET (0103) ret + (0104) + (0105) .ENDSECTION + (0106) + (0107) .SECTION + (0108) ;----------------------------------------------------------------------------- + (0109) ; FUNCTION NAME: INSAMP_SetGain + (0110) ; + (0111) ; DESCRIPTION: + (0112) ; Applies gain set values to the module's PSoC blocks + (0113) ; + (0114) ;----------------------------------------------------------------------------- + (0115) ; + (0116) ; ARGUMENTS: fastcall16 BYTE bGain in the A register + (0117) ; RETURNS: Nothing + (0118) ; SIDE EFFECTS: + (0119) ; The A and X registers may be modified by this or future implementations + (0120) ; of this function. The same is true for all RAM page pointer registers in + (0121) ; the Large Memory Model. When necessary, it is the calling function's + (0122) ; responsibility to perserve their values across calls to fastcall16 + (0123) ; functions. + (0124) ; + (0125) ; THEORY of OPERATION or PROCEDURE: + (0126) ; The A register contains the gain setting per values in .inc file. + (0127) ; Values in range of 00h to 07h, upper 4 bits only. + (0128) ; Gain value applied to NON_INV block. + (0129) ; Difference (E0h-gain value) applied to _INV block. + (0130) ; + (0131) INSAMP_SetGain: + (0132) _INSAMP_SetGain: + (0133) RAM_PROLOGUE RAM_USE_CLASS_2 + (0134) and A, GAINMASK ; mask A to protect unchanged bits + (0135) mov X, SP ; set base address for local variable + (0136) + (0137) push A + (0138) mov A, reg[INSAMP_NON_INV_CR0] ; read gain value + (0139) and A, ~GAINMASK ; clear gain bits in A + (0140) or A, [X] ; combine gain value with balance of reg. + (0141) mov reg[INSAMP_NON_INV_CR0], A + (0142) + (0143) mov A, E0h ; load gain complement value + (0144) sub a, [X] ; calculate gain value for -INV block + (0145) push A + (0146) mov A, reg[INSAMP_INV_CR0] ; read gain complement value + (0147) and A, ~GAINMASK ; clear gain bits in A + (0148) or A, [X+1] ; combine gain value with balance of reg. + (0149) mov reg[INSAMP_INV_CR0], A + (0150) pop A + (0151) pop A + (0152) RAM_EPILOGUE RAM_USE_CLASS_2 + (0153) ret + (0154) + (0155) + (0156) .ENDSECTION + (0157) + (0158) .SECTION + (0159) ;----------------------------------------------------------------------------- + (0160) ; FUNCTION NAME: INSAMP_Stop + (0161) ; + (0162) ; DESCRIPTION: Turns off power to the two CT blocks + (0163) ;----------------------------------------------------------------------------- + (0164) ; + (0165) ; ARGUMENTS: None + (0166) ; RETURNS: Nothing + (0167) ; SIDE EFFECTS: + (0168) ; The A and X registers may be modified by this or future implementations + (0169) ; of this function. The same is true for all RAM page pointer registers in + (0170) ; the Large Memory Model. When necessary, it is the calling function's + (0171) ; responsibility to perserve their values across calls to fastcall16 + (0172) ; functions. + (0173) ; + (0174) INSAMP_Stop: + (0175) _INSAMP_Stop: + (0176) RAM_PROLOGUE RAM_USE_CLASS_1 + (0177) and reg[INSAMP_NON_INV_CR2], ~POWERMASK + (0178) and reg[INSAMP_INV_CR2], ~POWERMASK + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) .ENDSECTION + (0183) + (0184) ; End of File INSAMP.asm +FILE: lib\dac9_ia.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: DAC9_Ia.asm + (0004) ;; Version: 2.2, Updated on 2012/9/21 at 11:58:35 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: DAC9 User Module software inplementation file. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "DAC9_Ia.inc" + (0023) include "m8c.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export DAC9_Ia_Start + (0030) export _DAC9_Ia_Start + (0031) export DAC9_Ia_SetPower + (0032) export _DAC9_Ia_SetPower + (0033) + (0034) export DAC9_Ia_WriteBlind + (0035) export _DAC9_Ia_WriteBlind + (0036) export DAC9_Ia_WriteBlind2B + (0037) export _DAC9_Ia_WriteBlind2B + (0038) + (0039) export DAC9_Ia_WriteStall + (0040) export _DAC9_Ia_WriteStall + (0041) export DAC9_Ia_WriteStall2B + (0042) export _DAC9_Ia_WriteStall2B + (0043) + (0044) export DAC9_Ia_Stop + (0045) export _DAC9_Ia_Stop + (0046) + (0047) ;; ----------------------------------------------------------------- + (0048) ;; Register Definitions + (0049) ;; ----------------------------------------------------------------- + (0050) ;; + (0051) ;; Uses 2 Switched Cap Blocks, LSB and MSB, configured as shown below. + (0052) ;; This API depends on knowing the exact personalization of CR0 + (0053) ;; and CR3 bitfields for time efficiency. + (0054) ;; + (0055) ;; * For a Mask/Val pair this simply indicates that the value is + (0056) ;; determined by the user either through config-time parameteriza- + (0057) ;; tion or run-time manipulation. + (0058) ;; + (0059) ;; Setting for output=AGND to OBUS when LSB in ASA10 and MSB in ASB20: + (0060) ;; LSB.CR0=80 MSB.CR0=80 + (0061) ;; LSB.CR1=40 MSB.CR1=81 + (0062) ;; LSB.CR2=20 MSB.CR2=A0 + (0063) ;; LSB.CR3=33 MSB.CR3=3B + (0064) ;; + (0065) ;; BIT FIELD Mask/Val Function + (0066) ;; ----------------- -------- -------------------- + (0067) ;; LSB.CR0.FCap 80/1 Feedback cap size 32 + (0068) ;; LSB.CR0.ClockPhase 40/0 Normal phase + (0069) ;; LSB.CR0.ASign 20/* User parameter + (0070) ;; LSB.CR0.ACap 1F/* User parameter + (0071) ;; + (0072) ;; LSB.CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care + (0073) ;; LSB.CR1.BCap 1F/0 Prune B-input branch + (0074) ;; + (0075) ;; LSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable + (0076) ;; LSB.CR2.CmpBus 40/0 Comparator Bus Disabled + (0077) ;; LSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 + (0078) ;; LSB.CR2.CCap 1F/0 Prune C-input branch + (0079) ;; + (0080) ;; LSB.CR3.ARefSelect C0/0 Use AGND (to invert) + (0081) ;; LSB.CR3.FSW1 20/1 Feedback Cap Used + (0082) ;; LSB.CR3.FSW0 10/1 Feedback Cap Grounded for AZ + (0083) ;; LSB.CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned + (0084) ;; LSB.CR3.PWR 03/* User Parameter: Power; default=OFF + (0085) ;; + (0086) ;; MSB.CR0.FCap 80/1 Feedback cap size 32 + (0087) ;; MSB.CR0.ClockPhase 40/0 Normal phase + (0088) ;; MSB.CR0.ASign 20/* User parameter + (0089) ;; MSB.CR0.ACap 1F/* User parameter + (0090) ;; + (0091) ;; MSB.CR1.AMux E0/4 (SCB) VRef High + (0092) ;; MSB.CR1.BCap 1F/1 Subrange LSB block output by BCap/FCap (1/32) + (0093) ;; + (0094) ;; MSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable + (0095) ;; MSB.CR2.CmpBus 40/0 Comparator Bus Disable + (0096) ;; MSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 + (0097) ;; MSB.CR2.CCap 1F/0 Prune C-input branch + (0098) ;; + (0099) ;; MSB.CR3.ARefSelect C0/0 Use AGND (to invert) + (0100) ;; MSB.CR3.FSW1 20/1 Feedback Cap Used + (0101) ;; MSB.CR3.FSW2 10/1 Feedback Cap Grounded for AZ + (0102) ;; MSB.CR3.BSW 08/0 (SCB) why is this cont time instead of phi2?? + (0103) ;; MSB.CR3.BMux 04/? (SCB) LSB block output; determined by placement + (0104) ;; MSB.CR3.PWR 03/* User Parameter: Power, default=OFF + (0105) + (0106) ;----------------------------------------------- + (0107) ; Constant Definitions + (0108) ;----------------------------------------------- + (0109) iOFFSET: equ 255 ; Conversion term for offset binary to 2's C + (0110) bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg + (0111) bCR3: equ 30h ; Except for power bits, CR3 always looks like + (0112) ; this regardless of SC block type or location. + (0113) bSMMASK: equ 3Fh ; Sign and Magnitude bits mask + (0114) bSIGNMASK: equ 20h ; Sign bit mask + (0115) bMAGMASK: equ 1Fh ; Magnitude bits mask + (0116) bHIGHBITS: equ 80h ; Setting for FCap and ClockPhase + (0117) bHBMASK: equ C0h ; Mask for FCap and ClockPhase + (0118) + (0119) + (0120) ;;--------------------------- + (0121) macro Stall + (0122) ;;--------------------------- + (0123) mov reg[ASY_CR], 1 + (0124) endm + (0125) + (0126) ;;--------------------------- + (0127) macro UnStall + (0128) ;;--------------------------- + (0129) mov reg[ASY_CR], 0 + (0130) endm + (0131) + (0132) AREA UserModules (ROM, REL) + (0133) + (0134) .SECTION + (0135) ;----------------------------------------------------------------------------- + (0136) ; FUNCTION NAME: DAC9_Ia_Start + (0137) ; FUNCTION NAME: DAC9_Ia_SetPower + (0138) ; + (0139) ; DESCRIPTION: + (0140) ; Applies power setting to the module's analog PSoC blocks. + (0141) ; + (0142) ;----------------------------------------------------------------------------- + (0143) ; + (0144) ; ARGUMENTS: + (0145) ; A contains the power setting 0=Off, 1=Low, 2=Med, 3=Full. + (0146) ; + (0147) ; RETURNS: none + (0148) ; + (0149) ; SIDE EFFECTS: + (0150) ; The A and X registers may be modified by this or future implementations + (0151) ; of this function. The same is true for all RAM page pointer registers in + (0152) ; the Large Memory Model. When necessary, it is the calling function's + (0153) ; responsibility to perserve their values across calls to fastcall16 + (0154) ; functions. + (0155) ; + (0156) DAC9_Ia_Start: + (0157) _DAC9_Ia_Start: + (0158) DAC9_Ia_SetPower: + (0159) _DAC9_Ia_SetPower: + (0160) RAM_PROLOGUE RAM_USE_CLASS_2 +06EC: 21 03 AND A,0x3 (0161) and A, bPWRMASK ; trim input to bits of interest +06EE: 4F MOV X,SP (0162) mov X, SP ; Set stack frame pointer +06EF: 08 PUSH A (0163) push A + (0164) ;; read CR3 registers, modify power bits & write back +06F0: 5D 97 MOV A,REG[0x97] (0165) mov A, reg[DAC9_Ia_MSB_CR3] +06F2: 21 FC AND A,0xFC (0166) and a, ~bPWRMASK ; clear old setting +06F4: 2B 00 OR A,[X+0] (0167) or A, [X] ; set power in MSB register image +06F6: 60 97 MOV REG[0x97],A (0168) mov reg[DAC9_Ia_MSB_CR3], A +06F8: 5D 93 MOV A,REG[0x93] (0169) mov A, reg[DAC9_Ia_LSB_CR3] +06FA: 21 FC AND A,0xFC (0170) and a, ~bPWRMASK ; clear old setting +06FC: 2B 00 OR A,[X+0] (0171) or A, [X] ; set power in LSB register image +06FE: 60 93 MOV REG[0x93],A (0172) mov reg[DAC9_Ia_LSB_CR3], A +0700: 18 POP A (0173) pop A + (0174) RAM_EPILOGUE RAM_USE_CLASS_2 +0701: 7F RET (0175) ret + (0176) .ENDSECTION + (0177) + (0178) .SECTION + (0179) ;----------------------------------------------------------------------------- + (0180) ; FUNCTION NAME: DAC9_Ia_WriteBlind + (0181) ; FUNCTION NAME: DAC9_Ia_WriteBlind2B + (0182) ; + (0183) ; DESCRIPTION: + (0184) ; Modify the DAC's update value without worrying about the clocks. + (0185) ; Lowest overhead, but may cause glitches on the output. + (0186) ; + (0187) ;----------------------------------------------------------------------------- + (0188) ; + (0189) ; ARGUMENTS: + (0190) ; A contains the update value if data format is offset binary or + (0191) ; For offset binary format: A contains the low byte; X the high byte. + (0192) ; For twos complement format: A contains the low byte; X the high byte. + (0193) ; For two-byte sign-and-magnitude format: + (0194) ; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, + (0195) ; where t=s\ (the inverted sign). + (0196) ; + (0197) ; RETURNS: + (0198) ; + (0199) ; SIDE EFFECTS: + (0200) ; The A and X registers may be modified by this or future implementations + (0201) ; of this function. The same is true for all RAM page pointer registers in + (0202) ; the Large Memory Model. When necessary, it is the calling function's + (0203) ; responsibility to perserve their values across calls to fastcall16 + (0204) ; functions. + (0205) ; + (0206) DAC9_Ia_WriteBlind: + (0207) _DAC9_Ia_WriteBlind: + (0208) + (0209) RAM_PROLOGUE RAM_USE_CLASS_2 + (0210) IF DAC9_Ia_OFFSETBINARY + (0211) ;; Data is an unsigned byte value in [0..510] (511 unique values). + (0212) ;; Following converts it to 2's complement: + (0213) sub A, iOFFSET + (0214) swap A, X ; A <- upper, X <- lower + (0215) sbb A, 0 + (0216) swap A, X ; A <- lower, X <- upper + (0217) ENDIF + (0218) + (0219) IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + (0220) swap A, X ; A <- upper, X <- lower + (0221) push A ; Save Sign on stack - referenced using [X-N] + (0222) ; Sign is either FFh or 00h + (0223) dec A ; set or clear Carry Flag + (0224) ; A is now FEh(CF=0) or FFh(CF=1) + (0225) mov A,X ; MSB: 76543210 + (0226) jc BlindAdjustCycles + (0227) cpl A ; change negative magnitude to positive + (0228) inc A ; offset for twos complement + (0229) jmp BlindMagSet + (0230) BlindAdjustCycles: + (0231) cpl A ; make cycles used for positive same as + (0232) cpl A ; cycles used for negative + (0233) jmp BlindMagSet + (0234) BlindMagSet: + (0235) push A ; MSB: 76543210 (mag) + (0236) asr A ; MSB: 77654321 + (0237) asr A ; MSB: 77765432 + (0238) asr A ; MSB: 77776543 + (0239) and A,bMAGMASK ; MSB: 00076543 + (0240) mov X,SP + (0241) and [X-2],bSIGNMASK + (0242) or A,[X-2] ; MSB: 00s76543 + (0243) mov X,A ; MSB + (0244) pop A ; LSB: 76543210 (mag) + (0245) push X ; MSB + (0246) asl A ; LSB: 65432100 + (0247) asl A ; LSB: 54321000 + (0248) and A,bMAGMASK ; LSB: 00021000 + (0249) mov X,SP + (0250) or A,[X-2] ; LSB: 00s21000 + (0251) xor A,bSIGNMASK ; LSB: 00t21000 + (0252) ; LSB in A + (0253) pop X ; MSB in X + (0254) add SP, -1 ; clean up stack - from saving the sign + (0255) + (0256) ENDIF + (0257) + (0258) DAC9_Ia_WriteBlind2B: + (0259) _DAC9_Ia_WriteBlind2B: + (0260) ; IF DAC9_Ia_SIGNANDMAGNITUDE + (0261) or A,bHIGHBITS ; LSB: 10t21000 + (0262) swap A,X ; LSB in X, MSB in A + (0263) or A,bHIGHBITS ; MSB: 10s76543 + (0264) mov reg[DAC9_Ia_MSB_CR0],A + (0265) mov A,X ; LSB in A + (0266) mov reg[DAC9_Ia_LSB_CR0],A + (0267) ; ENDIF + (0268) + (0269) RAM_EPILOGUE RAM_USE_CLASS_2 + (0270) ret + (0271) .ENDSECTION + (0272) + (0273) .SECTION + (0274) ;----------------------------------------------------------------------------- + (0275) ; FUNCTION NAME: DAC9_Ia_WriteStall + (0276) ; FUNCTION NAME: DAC9_Ia_WriteStall2B + (0277) ; + (0278) ; DESCRIPTION: + (0279) ; Modify the DAC's update value, stalling the CPU if necessary. + (0280) ; This routine should be used with faster analog clocks or when the + (0281) ; effect of prolonging interrupt latencies can be safely tolerated. + (0282) ; + (0283) ;----------------------------------------------------------------------------- + (0284) ; + (0285) ; ARGUMENTS: + (0286) ; A contains the update value if data format is offset binary or + (0287) ; For offset binary format: A contains the low byte; X the high byte. + (0288) ; For twos complement format: A contains the low byte; X the high byte. + (0289) ; For two-byte sign-and-magnitude format: + (0290) ; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, + (0291) ; where t=s\ (the inverted sign). + (0292) ; + (0293) ; RETURNS: none + (0294) ; + (0295) ; SIDE EFFECTS: + (0296) ; The A and X registers may be modified by this or future implementations + (0297) ; of this function. The same is true for all RAM page pointer registers in + (0298) ; the Large Memory Model. When necessary, it is the calling function's + (0299) ; responsibility to perserve their values across calls to fastcall16 + (0300) ; functions. + (0301) ; + (0302) DAC9_Ia_WriteStall: + (0303) _DAC9_Ia_WriteStall: + (0304) + (0305) RAM_PROLOGUE RAM_USE_CLASS_2 + (0306) IF DAC9_Ia_OFFSETBINARY + (0307) ;; Data is an unsigned byte value in [0..510] (511 unique values). + (0308) ;; Following converts it to 2's complement: +0702: 11 FF SUB A,0xFF (0309) sub A, iOFFSET +0704: 4B SWAP A,X (0310) swap A, X ; A <- upper, X <- lower +0705: 19 00 SBB A,0x0 (0311) sbb A, 0 +0707: 4B SWAP A,X (0312) swap A, X ; A <- lower, X <- upper + (0313) ENDIF + (0314) + (0315) IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT +0708: 4B SWAP A,X (0316) swap A, X ; A <- upper, X <- lower +0709: 08 PUSH A (0317) push A ; Save Sign on stack - referenced via [X-N] + (0318) ; Sign is either FFh or 00h +070A: 78 DEC A (0319) dec A ; set or clear Carry Flag + (0320) ; A is now FEh(CF=0) or FFh(CF=1) +070B: 5B MOV A,X (0321) mov A,X ; MSB: 76543210 +070C: C0 05 JC 0x0712 (0322) jc StallAdjustCycles +070E: 73 CPL A (0323) cpl A ; change negative magnitude to positive +070F: 74 INC A (0324) inc A ; offset for twos complement +0710: 80 05 JMP 0x0716 (0325) jmp StallMagSet + (0326) StallAdjustCycles: +0712: 73 CPL A (0327) cpl A ; make cycles used for positive same as +0713: 73 CPL A (0328) cpl A ; cycles used for negative +0714: 80 01 JMP 0x0716 (0329) jmp StallMagSet + (0330) StallMagSet: +0716: 08 PUSH A (0331) push A ; MSB: 76543210 (mag) +0717: 67 ASR A (0332) asr A ; MSB: 77654321 +0718: 67 ASR A (0333) asr A ; MSB: 77765432 +0719: 67 ASR A (0334) asr A ; MSB: 77776543 +071A: 21 1F AND A,0x1F (0335) and A,bMAGMASK ; MSB: 00076543 +071C: 4F MOV X,SP (0336) mov X,SP +071D: 27 FE 20 AND [X-2],0x20 (0337) and [X-2],bSIGNMASK +0720: 2B FE OR A,[X-2] (0338) or A,[X-2] ; MSB: 00s76543 +0722: 5C MOV X,A (0339) mov X,A ; MSB + (0340) +0723: 18 POP A (0341) pop A ; LSB: 76543210 (mag) +0724: 10 PUSH X (0342) push X ; MSB + (0343) +0725: 64 ASL A (0344) asl A ; LSB: 65432100 +0726: 64 ASL A (0345) asl A ; LSB: 54321000 +0727: 21 1F AND A,0x1F (0346) and A,bMAGMASK ; LSB: 00021000 +0729: 4F MOV X,SP (0347) mov X,SP +072A: 2B FE OR A,[X-2] (0348) or A,[X-2] ; LSB: 00s21000 +072C: 31 20 XOR A,0x20 (0349) xor A,bSIGNMASK ; LSB: 00t21000 + (0350) ; LSB in A +072E: 20 POP X (0351) pop X ; MSB in X +072F: 38 FF ADD SP,0xFF (0352) add SP, -1 ; clean up stack - from saving the sign + (0353) ENDIF + (0354) + (0355) DAC9_Ia_WriteStall2B: + (0356) _DAC9_Ia_WriteStall2B: + (0357) ; IF DAC9_Ia_SIGNANDMAGNITUDE +0731: 29 80 OR A,0x80 (0358) or A,bHIGHBITS ; LSB: 10t21000 +0733: 4B SWAP A,X (0359) swap A,X ; LSB in X, MSB in A +0734: 29 80 OR A,0x80 (0360) or A,bHIGHBITS ; MSB: 10s76543 +0736: 43 65 01 OR REG[0x65],0x1 + (0361) M8C_Stall +0739: 60 94 MOV REG[0x94],A (0362) mov reg[DAC9_Ia_MSB_CR0],A +073B: 41 65 FE AND REG[0x65],0xFE + (0363) M8C_Unstall +073E: 5B MOV A,X (0364) mov A,X ; LSB in A +073F: 60 90 MOV REG[0x90],A (0365) mov reg[DAC9_Ia_LSB_CR0],A + (0366) ; ENDIF + (0367) + (0368) RAM_EPILOGUE RAM_USE_CLASS_2 +0741: 7F RET (0369) ret + (0370) .ENDSECTION + (0371) + (0372) .SECTION + (0373) ;----------------------------------------------------------------------------- + (0374) ; FUNCTION NAME: DAC9_Ia_Stop + (0375) ; + (0376) ; DESCRIPTION: + (0377) ; Cuts power to the user module. + (0378) ; + (0379) ;----------------------------------------------------------------------------- + (0380) ; + (0381) ; ARGUMENTS: none + (0382) ; + (0383) ; RETURNS: none + (0384) ; + (0385) ; SIDE EFFECTS: + (0386) ; The A and X registers may be modified by this or future implementations + (0387) ; of this function. The same is true for all RAM page pointer registers in + (0388) ; the Large Memory Model. When necessary, it is the calling function's + (0389) ; responsibility to perserve their values across calls to fastcall16 + (0390) ; functions. + (0391) ; + (0392) DAC9_Ia_Stop: + (0393) _DAC9_Ia_Stop: + (0394) RAM_PROLOGUE RAM_USE_CLASS_1 + (0395) and reg[DAC9_Ia_MSB_CR3], ~bPWRMASK + (0396) and reg[DAC9_Ia_LSB_CR3], ~bPWRMASK + (0397) RAM_EPILOGUE RAM_USE_CLASS_1 + (0398) ret + (0399) .ENDSECTION + (0400) + (0401) ; End of File DAC9_Ia.asm +FILE: lib\dac6_vgnd.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: DAC6_VGND.asm + (0004) ;; Version: 4.3, Updated on 2012/9/21 at 11:58:34 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: DAC6 User Module software implementation file. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "DAC6_VGND.inc" + (0023) include "memory.inc" + (0024) include "m8c.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) + (0030) export DAC6_VGND_Start + (0031) export _DAC6_VGND_Start + (0032) export DAC6_VGND_SetPower + (0033) export _DAC6_VGND_SetPower + (0034) + (0035) export DAC6_VGND_WriteBlind + (0036) export _DAC6_VGND_WriteBlind + (0037) export DAC6_VGND_WriteStall + (0038) export _DAC6_VGND_WriteStall + (0039) + (0040) export DAC6_VGND_Stop + (0041) export _DAC6_VGND_Stop + (0042) + (0043) ;; ----------------------------------------------------------------- + (0044) ;; Register Definitions + (0045) ;; ----------------------------------------------------------------- + (0046) ;; + (0047) ;; Uses 1 Switched Cap Block configured as shown. This API depends + (0048) ;; on knowing the exact personalization of CR0 and CR3 bitfields + (0049) ;; for time efficiency. + (0050) ;; + (0051) ;; * For a Mask/Val pair, this simply indicates that the value is + (0052) ;; determined by the user either through config-time parameteriza- + (0053) ;; tion or run-time manipulation. + (0054) ;; + (0055) ;; BIT FIELD Mask/Val Function + (0056) ;; ----------------- ----- -------------------- + (0057) ;; CR0.FCap 80/1 Feedback cap size 32 + (0058) ;; CR0.ClockPhase 40/0 Normal phase + (0059) ;; CR0.ASign 20/* User parameter + (0060) ;; CR0.ACap 1F/* User parameter + (0061) ;; + (0062) ;; CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care + (0063) ;; CR1.AMux E0/4 (SCB) VRef High + (0064) ;; CR1.BCap 1F/0 Prune B-input branch + (0065) ;; + (0066) ;; CR2.AnalogBus 80/* User Parameter: Output Bus Enable + (0067) ;; CR2.CmpBus 40/0 Comparator Bus Disable + (0068) ;; CR2.AutoZero 20/1 Auto-Zero enabled on Phi 1 + (0069) ;; CR2.CCap 1F/0 Prune C-input branch + (0070) ;; + (0071) ;; CR3.ARefSelect C0/0 Use AGND (to invert) + (0072) ;; CR3.FSW1 20/1 Feedback Cap Used + (0073) ;; CR3.FSW2 10/1 Feedback Cap Grounded for AZ + (0074) ;; CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned + (0075) ;; CR3.BSW 08/0 (SCB) Don't Care - this branch pruned + (0076) ;; CR3.BMux 04/0 (SCB) Don't Care - this branch pruned + (0077) ;; CR3.PWR 03/* User Parameter: Power, def=OFF + (0078) ;; + (0079) + (0080) ;----------------------------------------------- + (0081) ; Constant Definitions + (0082) ;----------------------------------------------- + (0083) cOFFSET: equ 31 ; Conversion term for offset binary to 2's C + (0084) bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg + (0085) bCR3: equ 30h ; Except for power bits, CR3 ALWAYS looks + (0086) ; like this regardless of SC block type + (0087) ; or where the DAC gets mapped. + (0088) + (0089) + (0090) AREA UserModules (ROM, REL) + (0091) + (0092) .SECTION + (0093) ;----------------------------------------------------------------------------- + (0094) ; FUNCTION NAME: DAC6_VGND_Start + (0095) ; FUNCTION NAME: DAC6_VGND_SetPower + (0096) ; + (0097) ; DESCRIPTION: + (0098) ; Start / SetPower - Applies power setting to the module's SC blocks + (0099) ; + (0100) ;----------------------------------------------------------------------------- + (0101) ; + (0102) ; ARGUMENTS: + (0103) ; A contains the power setting 0=Off, 1=Low, 2=Med, 3=High + (0104) ; + (0105) ; RETURNS: none + (0106) ; + (0107) ; SIDE EFFECTS: + (0108) ; The A and X registers may be modified by this or future implementations + (0109) ; of this function. The same is true for all RAM page pointer registers in + (0110) ; the Large Memory Model. When necessary, it is the calling function's + (0111) ; responsibility to perserve their values across calls to fastcall16 + (0112) ; functions. + (0113) ; + (0114) DAC6_VGND_Start: + (0115) _DAC6_VGND_Start: + (0116) DAC6_VGND_SetPower: + (0117) _DAC6_VGND_SetPower: + (0118) RAM_PROLOGUE RAM_USE_CLASS_1 +0742: 21 03 AND A,0x3 (0119) and A, bPWRMASK +0744: 29 30 OR A,0x30 (0120) or A, bCR3 ; Set all other bits in addition to power +0746: 60 83 MOV REG[0x83],A (0121) mov reg[DAC6_VGND_CR3], A + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +0748: 7F RET (0123) ret + (0124) .ENDSECTION + (0125) + (0126) .SECTION + (0127) ;----------------------------------------------------------------------------- + (0128) ; FUNCTION NAME: DAC6_VGND_WriteBlind + (0129) ; + (0130) ; DESCRIPTION: + (0131) ; Modify the DAC's update value without worrying about the clocks + (0132) ; Lowest overhead, but output may not settle to correct value until the + (0133) ; phi2 of next full cycle following the write. + (0134) ; + (0135) ;----------------------------------------------------------------------------- + (0136) ; + (0137) ; ARGUMENTS: + (0138) ; The accumulator, A, contains the input in the appropriate format. + (0139) ; The data format is determined by the setting of the DataFormat parameter + (0140) ; in the Device Editor. + (0141) ; + (0142) ; RETURNS: none + (0143) ; + (0144) ; SIDE EFFECTS: + (0145) ; The A and X registers may be modified by this or future implementations + (0146) ; of this function. The same is true for all RAM page pointer registers in + (0147) ; the Large Memory Model. When necessary, it is the calling function's + (0148) ; responsibility to perserve their values across calls to fastcall16 + (0149) ; functions. + (0150) ; + (0151) DAC6_VGND_WriteBlind: + (0152) _DAC6_VGND_WriteBlind: + (0153) + (0154) RAM_PROLOGUE RAM_USE_CLASS_1 + (0155) IF DAC6_VGND_OFFSETBINARY + (0156) ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + (0157) ;; Following converts it to 2's complement: + (0158) sub A, cOFFSET ; Apply the offset + (0159) ENDIF + (0160) IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + (0161) ;; Data is a byte in standard 2's complement form with value in [-31..+31] + (0162) ;; Following converts it to Sign & Magnitude form "00smmmmm" + (0163) ;; where sign, "s", is 1 for negative numbers; 0 for positive + (0164) ;; and "m" is the magnitude. + (0165) asl A ; Multiply by 2 and put sign in Carry flag + (0166) jnc BlindPositive + (0167) ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted! + (0168) cpl A ; bit 0 is a "1" so, following 1 byte "inc" works + (0169) inc A ; (otherwise, we'd have to "add A, 2") + (0170) or A, 40h ; Make it negative by forcing sign bit + (0171) jmp BlindMagSet + (0172) BlindPositive: + (0173) nop + (0174) nop + (0175) nop + (0176) jmp BlindMagSet + (0177) BlindMagSet: + (0178) asr A ; Divide by two to finish up + (0179) ENDIF + (0180) + (0181) ;; Data is in Sign & Magnitude form. + (0182) ;; Set FCap and ClockPhase bits + (0183) or A, DAC6_VGND_CR0_HIBITS + (0184) mov reg[DAC6_VGND_CR0], A + (0185) RAM_EPILOGUE RAM_USE_CLASS_1 + (0186) ret + (0187) .ENDSECTION + (0188) + (0189) .SECTION + (0190) ;----------------------------------------------------------------------------- + (0191) ; FUNCTION NAME: DAC6_VGND_WriteStall + (0192) ; + (0193) ; DESCRIPTION: + (0194) ; Modify the DAC's update value, stalling the CPU if necessary. + (0195) ; This routine should be used with fast analog clocks or when the + (0196) ; resulting interrupt latencies, comparable to the update period, + (0197) ; can be tolerated comfortably. + (0198) ; + (0199) ;----------------------------------------------------------------------------- + (0200) ; + (0201) ; ARGUMENTS: + (0202) ; The accumulator, A, contains the input in the appropriate format. + (0203) ; The data format is determined by the setting of the DataFormat parameter + (0204) ; in the Device Editor. + (0205) ; + (0206) ; RETURNS: none + (0207) ; + (0208) ; SIDE EFFECTS: + (0209) ; The A and X registers may be modified by this or future implementations + (0210) ; of this function. The same is true for all RAM page pointer registers in + (0211) ; the Large Memory Model. When necessary, it is the calling function's + (0212) ; responsibility to perserve their values across calls to fastcall16 + (0213) ; functions. + (0214) ; + (0215) + (0216) DAC6_VGND_WriteStall: + (0217) _DAC6_VGND_WriteStall: + (0218) + (0219) RAM_PROLOGUE RAM_USE_CLASS_1 + (0220) IF DAC6_VGND_OFFSETBINARY + (0221) ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + (0222) ;; Following converts it to 2's complement: +0749: 11 1F SUB A,0x1F (0223) sub A, cOFFSET ; Apply the offset + (0224) ENDIF + (0225) IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + (0226) ;; Data is a byte in standard 2's complement form with value in [-31..+31] + (0227) ;; Following converts it to Sign & Magnitude form "00smmmmm" + (0228) ;; where sign, "s", is 1 for negative numbers; 0 for positive + (0229) ;; and "m" is the magnitude. +074B: 64 ASL A (0230) asl A ; Multiply by 2 and put sign in Carry flag +074C: D0 07 JNC 0x0754 (0231) jnc StallPositive +074E: 73 CPL A (0232) cpl A ; "Invert" step of complement 2's complement +074F: 74 INC A (0233) inc A ; "Add 1" step of complement 2's complement +0750: 29 40 OR A,0x40 (0234) or A, 40h ; Make it negative +0752: 80 06 JMP 0x0759 (0235) jmp StallMagSet + (0236) StallPositive: +0754: 40 NOP (0237) nop +0755: 40 NOP (0238) nop +0756: 40 NOP (0239) nop +0757: 80 01 JMP 0x0759 (0240) jmp StallMagSet + (0241) StallMagSet: +0759: 67 ASR A (0242) asr A ; Divide by two to finish conversion + (0243) ENDIF + (0244) + (0245) ;; Data is in Sign & Magnitude form. + (0246) ;; Set FCap and ClockPhase bits +075A: 29 80 OR A,0x80 (0247) or A, DAC6_VGND_CR0_HIBITS +075C: 43 65 01 OR REG[0x65],0x1 + (0248) M8C_Stall +075F: 60 80 MOV REG[0x80],A (0249) mov reg[DAC6_VGND_CR0], A +0761: 41 65 FE AND REG[0x65],0xFE + (0250) M8C_Unstall + (0251) RAM_EPILOGUE RAM_USE_CLASS_1 +0764: 7F RET (0252) ret + (0253) .ENDSECTION + (0254) + (0255) .SECTION + (0256) ;----------------------------------------------------------------------------- + (0257) ; FUNCTION NAME: DAC6_VGND_Stop + (0258) ; + (0259) ; DESCRIPTION: + (0260) ; Turns off power to the SC block + (0261) ; + (0262) ;----------------------------------------------------------------------------- + (0263) ; + (0264) ; ARGUMENTS: none + (0265) ; + (0266) ; RETURNS: none + (0267) ; + (0268) ; SIDE EFFECTS: + (0269) ; The A and X registers may be modified by this or future implementations + (0270) ; of this function. The same is true for all RAM page pointer registers in + (0271) ; the Large Memory Model. When necessary, it is the calling function's + (0272) ; responsibility to perserve their values across calls to fastcall16 + (0273) ; functions. + (0274) ; + (0275) + (0276) DAC6_VGND_Stop: + (0277) _DAC6_VGND_Stop: + (0278) RAM_PROLOGUE RAM_USE_CLASS_1 + (0279) and reg[DAC6_VGND_CR3], ~bPWRMASK + (0280) RAM_EPILOGUE RAM_USE_CLASS_1 + (0281) ret + (0282) .ENDSECTION + (0283) + (0284) ; End of File DAC6_VGND.asm +FILE: lib\amux4_1.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: AMUX4_1.asm + (0004) ;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: AMux4 User Module software implementation file devices. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) + (0023) include "AMUX4_1.inc" + (0024) include "m8c.inc" + (0025) include "memory.inc" + (0026) + (0027) ;----------------------------------------------- + (0028) ; Global Symbols + (0029) ;----------------------------------------------- + (0030) export AMUX4_1_InputSelect + (0031) export _AMUX4_1_InputSelect + (0032) + (0033) export AMUX4_1_Start + (0034) export _AMUX4_1_Start + (0035) + (0036) export AMUX4_1_Stop + (0037) export _AMUX4_1_Stop + (0038) + (0039) ;----------------------------------------------- + (0040) ; EQUATES + (0041) ;----------------------------------------------- + (0042) + (0043) MUXMASK: equ 03h + (0044) + (0045) AREA UserModules (ROM, REL) + (0046) .SECTION + (0047) ;----------------------------------------------------------------------------- + (0048) ; FUNCTION NAME: AMUX4_1_InputSelect + (0049) ; + (0050) ; DESCRIPTION: + (0051) ; Place the signal from one of four port0 pins on the Analog Column bus. + (0052) ; + (0053) ;----------------------------------------------------------------------------- + (0054) ; + (0055) ; ARGUMENTS: + (0056) ; A contains the mux input control value + (0057) ; + (0058) ; Input Code + (0059) ; Mux input 0,1 00h + (0060) ; Mux input 2,3 01h + (0061) ; Mux input 4,5 02h + (0062) ; Mux input 6,7 03h + (0063) ; + (0064) ; RETURNS: none + (0065) ; + (0066) ; SIDE EFFECTS: + (0067) ; The A and X registers may be modified by this or future implementations + (0068) ; of this function. The same is true for all RAM page pointer registers in + (0069) ; the Large Memory Model. When necessary, it is the calling function's + (0070) ; responsibility to perserve their values across calls to fastcall16 + (0071) ; functions. + (0072) ; + (0073) AMUX4_1_InputSelect: + (0074) _AMUX4_1_InputSelect: + (0075) RAM_PROLOGUE RAM_USE_CLASS_2 + (0076) + (0077) IF (AMUX4_1_COL_COUNT) + (0078) M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 + (0079) ENDIF + (0080) +0765: 21 03 AND A,0x3 (0081) and A, MUXMASK ; Mask off only valid port0 input bits +0767: 57 00 MOV X,0x0 (0082) mov X,AMUX4_1_MUX_COL + (0083) .AMUX4_ShiftIt: ; Shift value to correct bit position for Mux +0769: 79 DEC X (0084) dec X +076A: C0 05 JC 0x0770 (0085) jc .AMUX4_SetIt +076C: 64 ASL A (0086) asl A +076D: 64 ASL A (0087) asl A +076E: 8F FA JMP 0x0769 (0088) jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + (0089) + (0090) .AMUX4_SetIt: +0770: 4F MOV X,SP (0091) mov X,SP ; Get current stack location +0771: 08 PUSH A (0092) push A ; Save a to OR it to AMX_IN later + (0093) IF (AMUX4_1_COL_COUNT) + (0094) mov A, reg[ACE_AMX_IN] ; Get current value of mux control register + (0095) ELSE +0772: 5D 60 MOV A,REG[0x60] (0096) mov A, reg[AMX_IN] ; Get current value of mux control register + (0097) ENDIF +0774: 21 FC AND A,0xFC (0098) and A,~AMUX4_1_MUX_MASK ; Mask off the bits for this Mux +0776: 2B 00 OR A,[X+0] (0099) or A,[X] ; OR in the mux control bits + (0100) IF (AMUX4_1_COL_COUNT) + (0101) mov reg[ACE_AMX_IN], A ; Get current value of mux control register + (0102) ELSE +0778: 60 60 MOV REG[0x60],A (0103) mov reg[AMX_IN], A ; Write out mux value to mux control register + (0104) ENDIF +077A: 18 POP A (0105) pop A ; Restore the stack + (0106) + (0107) IF (AMUX4_1_COL_COUNT) + (0108) M8C_SetBank0 + (0109) ENDIF + (0110) RAM_EPILOGUE RAM_USE_CLASS_2 +077B: 7F RET (0111) ret + (0112) .ENDSECTION + (0113) + (0114) .SECTION + (0115) ;----------------------------------------------------------------------------- + (0116) ; FUNCTION NAME: AMUX4_1_Start + (0117) ; + (0118) ; DESCRIPTION: + (0119) ; This function does nothing at this time. It is only here for + (0120) ; future compatibility. + (0121) ; + (0122) ;----------------------------------------------------------------------------- + (0123) ; + (0124) ; ARGUMENTS: none + (0125) ; + (0126) ; RETURNS: none + (0127) ; + (0128) ; SIDE EFFECTS: + (0129) ; The A and X registers may be modified by this or future implementations + (0130) ; of this function. The same is true for all RAM page pointer registers in + (0131) ; the Large Memory Model. When necessary, it is the calling function's + (0132) ; responsibility to perserve their values across calls to fastcall16 + (0133) ; functions. + (0134) ; + (0135) AMUX4_1_Start: + (0136) _AMUX4_1_Start: + (0137) RAM_PROLOGUE RAM_USE_CLASS_1 + (0138) RAM_EPILOGUE RAM_USE_CLASS_1 + (0139) ret + (0140) .ENDSECTION + (0141) + (0142) .SECTION + (0143) ;----------------------------------------------------------------------------- + (0144) ; FUNCTION NAME: AMUX4_1_Stop + (0145) ; + (0146) ; DESCRIPTION: + (0147) ; This function does nothing at this time. It is only here for + (0148) ; future compatibility. + (0149) ; + (0150) ;----------------------------------------------------------------------------- + (0151) ; + (0152) ; ARGUMENTS: none + (0153) ; + (0154) ; RETURNS: none + (0155) ; + (0156) ; SIDE EFFECTS: + (0157) ; The A and X registers may be modified by this or future implementations + (0158) ; of this function. The same is true for all RAM page pointer registers in + (0159) ; the Large Memory Model. When necessary, it is the calling function's + (0160) ; responsibility to perserve their values across calls to fastcall16 + (0161) ; functions. + (0162) ; + (0163) AMUX4_1_Stop: + (0164) _AMUX4_1_Stop: + (0165) RAM_PROLOGUE RAM_USE_CLASS_1 + (0166) RAM_EPILOGUE RAM_USE_CLASS_1 + (0167) ret + (0168) .ENDSECTION + (0169) ; End of File AMUX4_1.asm +FILE: lib\amux4_0.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: AMUX4_0.asm + (0004) ;; Version: 1.50, Updated on 2012/9/21 at 11:56:52 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: AMux4 User Module software implementation file devices. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) + (0023) include "AMUX4_0.inc" + (0024) include "m8c.inc" + (0025) include "memory.inc" + (0026) + (0027) ;----------------------------------------------- + (0028) ; Global Symbols + (0029) ;----------------------------------------------- + (0030) export AMUX4_0_InputSelect + (0031) export _AMUX4_0_InputSelect + (0032) + (0033) export AMUX4_0_Start + (0034) export _AMUX4_0_Start + (0035) + (0036) export AMUX4_0_Stop + (0037) export _AMUX4_0_Stop + (0038) + (0039) ;----------------------------------------------- + (0040) ; EQUATES + (0041) ;----------------------------------------------- + (0042) + (0043) MUXMASK: equ 03h + (0044) + (0045) AREA UserModules (ROM, REL) + (0046) .SECTION + (0047) ;----------------------------------------------------------------------------- + (0048) ; FUNCTION NAME: AMUX4_0_InputSelect + (0049) ; + (0050) ; DESCRIPTION: + (0051) ; Place the signal from one of four port0 pins on the Analog Column bus. + (0052) ; + (0053) ;----------------------------------------------------------------------------- + (0054) ; + (0055) ; ARGUMENTS: + (0056) ; A contains the mux input control value + (0057) ; + (0058) ; Input Code + (0059) ; Mux input 0,1 00h + (0060) ; Mux input 2,3 01h + (0061) ; Mux input 4,5 02h + (0062) ; Mux input 6,7 03h + (0063) ; + (0064) ; RETURNS: none + (0065) ; + (0066) ; SIDE EFFECTS: + (0067) ; The A and X registers may be modified by this or future implementations + (0068) ; of this function. The same is true for all RAM page pointer registers in + (0069) ; the Large Memory Model. When necessary, it is the calling function's + (0070) ; responsibility to perserve their values across calls to fastcall16 + (0071) ; functions. + (0072) ; + (0073) AMUX4_0_InputSelect: + (0074) _AMUX4_0_InputSelect: + (0075) RAM_PROLOGUE RAM_USE_CLASS_2 + (0076) + (0077) IF (AMUX4_0_COL_COUNT) + (0078) M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 + (0079) ENDIF + (0080) +077C: 21 03 AND A,0x3 (0081) and A, MUXMASK ; Mask off only valid port0 input bits +077E: 57 00 MOV X,0x0 (0082) mov X,AMUX4_0_MUX_COL + (0083) .AMUX4_ShiftIt: ; Shift value to correct bit position for Mux +0780: 79 DEC X (0084) dec X +0781: C0 05 JC 0x0787 (0085) jc .AMUX4_SetIt +0783: 64 ASL A (0086) asl A +0784: 64 ASL A (0087) asl A +0785: 8F FA JMP 0x0780 (0088) jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + (0089) + (0090) .AMUX4_SetIt: +0787: 4F MOV X,SP (0091) mov X,SP ; Get current stack location +0788: 08 PUSH A (0092) push A ; Save a to OR it to AMX_IN later + (0093) IF (AMUX4_0_COL_COUNT) + (0094) mov A, reg[ACE_AMX_IN] ; Get current value of mux control register + (0095) ELSE +0789: 5D 60 MOV A,REG[0x60] (0096) mov A, reg[AMX_IN] ; Get current value of mux control register + (0097) ENDIF +078B: 21 FC AND A,0xFC (0098) and A,~AMUX4_0_MUX_MASK ; Mask off the bits for this Mux +078D: 2B 00 OR A,[X+0] (0099) or A,[X] ; OR in the mux control bits + (0100) IF (AMUX4_0_COL_COUNT) + (0101) mov reg[ACE_AMX_IN], A ; Get current value of mux control register + (0102) ELSE +078F: 60 60 MOV REG[0x60],A (0103) mov reg[AMX_IN], A ; Write out mux value to mux control register + (0104) ENDIF +0791: 18 POP A (0105) pop A ; Restore the stack + (0106) + (0107) IF (AMUX4_0_COL_COUNT) + (0108) M8C_SetBank0 + (0109) ENDIF + (0110) RAM_EPILOGUE RAM_USE_CLASS_2 +0792: 7F RET (0111) ret + (0112) .ENDSECTION + (0113) + (0114) .SECTION + (0115) ;----------------------------------------------------------------------------- + (0116) ; FUNCTION NAME: AMUX4_0_Start + (0117) ; + (0118) ; DESCRIPTION: + (0119) ; This function does nothing at this time. It is only here for + (0120) ; future compatibility. + (0121) ; + (0122) ;----------------------------------------------------------------------------- + (0123) ; + (0124) ; ARGUMENTS: none + (0125) ; + (0126) ; RETURNS: none + (0127) ; + (0128) ; SIDE EFFECTS: + (0129) ; The A and X registers may be modified by this or future implementations + (0130) ; of this function. The same is true for all RAM page pointer registers in + (0131) ; the Large Memory Model. When necessary, it is the calling function's + (0132) ; responsibility to perserve their values across calls to fastcall16 + (0133) ; functions. + (0134) ; + (0135) AMUX4_0_Start: + (0136) _AMUX4_0_Start: + (0137) RAM_PROLOGUE RAM_USE_CLASS_1 + (0138) RAM_EPILOGUE RAM_USE_CLASS_1 + (0139) ret + (0140) .ENDSECTION + (0141) + (0142) .SECTION + (0143) ;----------------------------------------------------------------------------- + (0144) ; FUNCTION NAME: AMUX4_0_Stop + (0145) ; + (0146) ; DESCRIPTION: + (0147) ; This function does nothing at this time. It is only here for + (0148) ; future compatibility. + (0149) ; + (0150) ;----------------------------------------------------------------------------- + (0151) ; + (0152) ; ARGUMENTS: none + (0153) ; + (0154) ; RETURNS: none + (0155) ; + (0156) ; SIDE EFFECTS: + (0157) ; The A and X registers may be modified by this or future implementations + (0158) ; of this function. The same is true for all RAM page pointer registers in + (0159) ; the Large Memory Model. When necessary, it is the calling function's + (0160) ; responsibility to perserve their values across calls to fastcall16 + (0161) ; functions. + (0162) ; + (0163) AMUX4_0_Stop: + (0164) _AMUX4_0_Stop: + (0165) RAM_PROLOGUE RAM_USE_CLASS_1 + (0166) RAM_EPILOGUE RAM_USE_CLASS_1 + (0167) ret + (0168) .ENDSECTION + (0169) ; End of File AMUX4_0.asm +FILE: lib\adcincint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: ADCINCINT.asm + (0004) ;; Version: 1.20, Updated on 2012/9/21 at 11:56:47 + (0005) ;; + (0006) ;; DESCRIPTION: Assembler interrupt service routine for the ADCINC + (0007) ;; A/D Converter User Module. This code works for both the + (0008) ;; first and second-order modulator topologies. + (0009) ;;----------------------------------------------------------------------------- + (0010) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0011) ;;***************************************************************************** + (0012) ;;***************************************************************************** + (0013) + (0014) include "m8c.inc" + (0015) include "memory.inc" + (0016) include "ADCINC.inc" + (0017) + (0018) + (0019) ;----------------------------------------------- + (0020) ; Global Symbols + (0021) ;----------------------------------------------- + (0022) + (0023) export _ADCINC_ADConversion_ISR + (0024) + (0025) export _ADCINC_iResult + (0026) export ADCINC_iResult + (0027) export _ADCINC_fStatus + (0028) export ADCINC_fStatus + (0029) export _ADCINC_bState + (0030) export ADCINC_bState + (0031) export _ADCINC_fMode + (0032) export ADCINC_fMode + (0033) export _ADCINC_bNumSamples + (0034) export ADCINC_bNumSamples + (0035) + (0036) ;----------------------------------------------- + (0037) ; Variable Allocation + (0038) ;----------------------------------------------- + (0039) AREA InterruptRAM(RAM,REL) + (0040) ADCINC_iResult: + (0041) _ADCINC_iResult: BLK 2 ;Calculated answer + (0042) iTemp: BLK 2 ;internal temp storage + (0043) ADCINC_fStatus: + (0044) _ADCINC_fStatus: BLK 1 ;ADC Status + (0045) ADCINC_bState: + (0046) _ADCINC_bState: BLK 1 ;State value of ADC count + (0047) ADCINC_fMode: + (0048) _ADCINC_fMode: BLK 1 ;Integrate and reset mode. + (0049) ADCINC_bNumSamples: + (0050) _ADCINC_bNumSamples: BLK 1 ;Number of samples to take. + (0051) + (0052) ;----------------------------------------------- + (0053) ; EQUATES + (0054) ;----------------------------------------------- + (0055) + (0056) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0057) ;--------------------------------------------------- + (0058) ; Insert your custom declarations below this banner + (0059) ;--------------------------------------------------- + (0060) + (0061) ;------------------------ + (0062) ; Constant Definitions + (0063) ;------------------------ + (0064) + (0065) + (0066) ;------------------------ + (0067) ; Variable Allocation + (0068) ;------------------------ + (0069) + (0070) //14Point7 ASM Code Start + (0071) AREA InterruptRAM (RAM, REL, CON) + (0072) ADC_Counter:: //ADC Counter + (0073) _ADC_Counter:: BLK 1 + (0074) Ri_Max_x1:: //Peak of Nermest AC coupled signal for temperature sensing + (0075) _Ri_Max_x1:: BLK 1 + (0076) Ri_Min_x1:: //Trough of Nermest AC coupled signal for temperature sensing + (0077) _Ri_Min_x1:: BLK 1 + (0078) ip_x1:: //Voltage Across Pump Current sense Resistor, it is in + (0079) _ip_x1:: BLK 1 + (0080) ADC_IF::// Byte value used to track which ADC sample last occurred, ADC_IF[0]=1 if Ri_Min,ADC_IF[1]=1 if Ri_Max,ADC_IF[2]=1 if VR + (0081) _ADC_IF:: BLK 1 + (0082) //14Point7 ASM Code End + (0083) + (0084) ;--------------------------------------------------- + (0085) ; Insert your custom declarations above this banner + (0086) ;--------------------------------------------------- + (0087) ;@PSoC_UserCode_END@ (Do not change this line.) + (0088) + (0089) + (0090) AREA UserModules (ROM, REL) + (0091) + (0092) ;----------------------------------------------------------------------------- + (0093) ; FUNCTION NAME: _ADCINC_ADConversion_ISR + (0094) ; + (0095) ; DESCRIPTION: Perform final filter operations to produce output samples. + (0096) ; + (0097) ;----------------------------------------------------------------------------- + (0098) ; + (0099) ; The decimation rate is established by the PWM interrupt. Four timer + (0100) ; clocks elapse for each modulator output (decimator input) since the + (0101) ; phi1/phi2 generator divides by 4. This means the timer period and thus + (0102) ; it's interrupt must equal 4 times the actual decimation rate. The + (0103) ; decimator is ru for 2^(#bits-6). + (0104) ; + (0105) _ADCINC_ADConversion_ISR: +0793: 7A 3E DEC [0x3E] (0106) dec [ADCINC_bState] + (0107) if1: +0795: C0 02 JC 0x0798 (0108) jc endif1 ; no underflow +0797: 7E RETI (0109) reti + (0110) endif1: +0798: 3C 3F 00 CMP [0x3F],0x0 (0111) cmp [ADCINC_fMode],0 + (0112) if2: +079B: B0 12 JNZ 0x07AE (0113) jnz endif2 ;leaving reset mode +079D: 08 PUSH A (0114) push A ;read decimator +079E: 5D E5 MOV A,REG[0xE5] (0115) mov A, reg[DEC_DL] +07A0: 53 3C MOV [0x3C],A (0116) mov [iTemp + LowByte],A +07A2: 5D E4 MOV A,REG[0xE4] (0117) mov A, reg[DEC_DH] +07A4: 53 3B MOV [0x3B],A (0118) mov [iTemp + HighByte], A +07A6: 18 POP A (0119) pop A +07A7: 55 3F 01 MOV [0x3F],0x1 (0120) mov [ADCINC_fMode],1 +07AA: 55 3E 03 MOV [0x3E],0x3 (0121) mov [ADCINC_bState],((1<<(ADCINC_bNUMBITS- 6))-1) +07AD: 7E RETI (0122) reti +07AE: 43 86 20 OR REG[0x86],0x20 +07B1: 43 87 10 OR REG[0x87],0x10 + (0123) endif2: + (0124) ;This code runs at end of integrate + (0125) ADCINC_RESET_INTEGRATOR_M +07B4: 08 PUSH A (0126) push A +07B5: 5D E5 MOV A,REG[0xE5] (0127) mov A, reg[DEC_DL] +07B7: 12 3C SUB A,[0x3C] (0128) sub A,[iTemp + LowByte] +07B9: 53 3C MOV [0x3C],A (0129) mov [iTemp +LowByte],A +07BB: 5D E4 MOV A,REG[0xE4] (0130) mov A, reg[DEC_DH] +07BD: 1A 3B SBB A,[0x3B] (0131) sbb A,[iTemp + HighByte] +07BF: 67 ASR A (0132) asr A +07C0: 6E 3C RRC [0x3C] (0133) rrc [iTemp + LowByte] + (0134) + (0135) ;Covert to Unipolar + (0136) IF ADCINC_9_OR_MORE_BITS + (0137) add A, (1<<(ADCINC_bNUMBITS - 9)) + (0138) ELSE +07C2: 06 3C 80 ADD [0x3C],0x80 (0139) add [iTemp + LowByte], (1<<(ADCINC_bNUMBITS - 1)) ;work on lower Byte +07C5: 09 00 ADC A,0x0 (0140) adc A,0 + (0141) ENDIF + (0142) ;check for overflow + (0143) IF ADCINC_8_OR_MORE_BITS +07C7: 39 01 CMP A,0x1 (0144) cmp A,(1<<(ADCINC_bNUMBITS - 8)) + (0145) if3: +07C9: B0 05 JNZ 0x07CF (0146) jnz endif3 ;overflow +07CB: 78 DEC A (0147) dec A +07CC: 55 3C FF MOV [0x3C],0xFF (0148) mov [iTemp + LowByte],ffh + (0149) endif3: + (0150) ELSE + (0151) cmp [iTemp + LowByte],(1<<(ADCINC_bNUMBITS)) + (0152) if4: + (0153) jnz endif4 ;overflow + (0154) dec [iTemp + LowByte] + (0155) endif4: + (0156) ENDIF + (0157) IF ADCINC_SIGNED_DATA + (0158) IF ADCINC_9_OR_MORE_BITS + (0159) sub A,(1<<(ADCINC_bNUMBITS - 9)) + (0160) ELSE + (0161) sub [iTemp +LowByte],(1<<(ADCINC_bNUMBITS - 1)) + (0162) sbb A,0 + (0163) ENDIF + (0164) ENDIF +07CF: 5F 3A 3C MOV [0x3A],[0x3C] (0165) mov [ADCINC_iResult + LowByte],[iTemp +LowByte] +07D2: 53 39 MOV [0x39],A (0166) mov [ADCINC_iResult + HighByte],A +07D4: 55 3D 01 MOV [0x3D],0x1 (0167) mov [ADCINC_fStatus],1 + (0168) ConversionReady: + (0169) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0170) ;--------------------------------------------------- + (0171) ; Insert your custom code below this banner + (0172) ;--------------------------------------------------- + (0173) //14Point7 ASM Code Start +07D7: 51 41 MOV A,[0x41] (0174) mov A,[_ADC_Counter] +07D9: 11 00 SUB A,0x0 (0175) sub A,0 +07DB: A0 0D JZ 0x07E9 (0176) JZ ADC_0 + (0177) +07DD: 11 01 SUB A,0x1 (0178) sub A,1 +07DF: A0 17 JZ 0x07F7 (0179) JZ ADC_1 + (0180) +07E1: 11 01 SUB A,0x1 (0181) sub A,1 +07E3: A0 24 JZ 0x0808 (0182) JZ ADC_2 + (0183) +07E5: 11 01 SUB A,0x1 (0184) sub A,1 +07E7: A0 2E JZ 0x0816 (0185) JZ ADC_3 + (0186) + (0187) ADC_0: //Ri_Max, Peak of AC coupled Temperature sense signal + (0188) //and reg[PRT2DR],127 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal +07E9: 41 00 FB AND REG[0x0],0xFB (0189) and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal +07EC: 5F 42 3A MOV [0x42],[0x3A] (0190) mov [_Ri_Max_x1],[ADCINC_iResult + LowByte] +07EF: 55 41 01 MOV [0x41],0x1 (0191) mov [_ADC_Counter],1 +07F2: 2E 45 02 OR [0x45],0x2 (0192) or [_ADC_IF],2 // Set ADC_IF[1] to indicate that new Ri_Max data is available +07F5: 80 2F JMP 0x0825 (0193) jmp Cont + (0194) + (0195) ADC_1://Ri_Min, Trough of AC coupled Temperature sense signal +07F7: 62 60 0F MOV REG[0x60],0xF (0196) mov reg[AMX_IN],15 //setup Mux so that Next ADC sample is a differential Ip Vs Ia (voltage across pump current sense resistor, P0[7] Vs P0[6] + (0197) //mov reg[AMX_IN],9 //cal lin + (0198) //or reg[PRT2DR],128 //set Ri_Out Pin +07FA: 43 00 04 OR REG[0x0],0x4 (0199) or reg[PRT0DR],4 //set Ri_Out Pin +07FD: 5F 43 3A MOV [0x43],[0x3A] (0200) mov [_Ri_Min_x1],[ADCINC_iResult + LowByte] +0800: 2E 45 01 OR [0x45],0x1 (0201) or [_ADC_IF],1 // Set ADC_IF[0] to indicate that new Ri_Min data is available +0803: 55 41 02 MOV [0x41],0x2 (0202) mov [_ADC_Counter],2 + (0203) +0806: 80 1E JMP 0x0825 (0204) jmp Cont + (0205) + (0206) ADC_2://Voltage Across Pump Current sense resistor + (0207) //and reg[PRT2DR],127 //clear Ri_Out Pin, Next ADC sample is not the Ri_Min, but Ri_Out is cleared so that ~1khz AC signal is mantained +0808: 41 00 FB AND REG[0x0],0xFB (0208) and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal +080B: 5F 44 3A MOV [0x44],[0x3A] (0209) mov [_ip_x1],[ADCINC_iResult + LowByte] +080E: 2E 45 04 OR [0x45],0x4 (0210) or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available +0811: 55 41 03 MOV [0x41],0x3 (0211) mov [_ADC_Counter],3 +0814: 80 10 JMP 0x0825 (0212) jmp Cont + (0213) + (0214) ADC_3://Voltage Across Pump Current sense resistor again, this ADC sample is need to keep timing on the ~1khz AC Temperature Sense Signal so might as well get another Sample of VR + (0215) //or reg[PRT2DR],128 //Set Ri_Out Pin so that the next ADC sample will Acquire the Peak (Ri_Max) of AC coupled Temperature sense signal +0816: 43 00 04 OR REG[0x0],0x4 (0216) or reg[PRT0DR],4 //set Ri_Out Pin +0819: 62 60 00 MOV REG[0x60],0x0 (0217) mov reg[AMX_IN],0 // Setup Mux so that Next ADC sample is differential Ri_in Vs Vref, P0[1] Vs P0[0] +081C: 5F 44 3A MOV [0x44],[0x3A] (0218) mov [_ip_x1],[ADCINC_iResult + LowByte] +081F: 2E 45 04 OR [0x45],0x4 (0219) or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available +0822: 55 41 00 MOV [0x41],0x0 (0220) mov [_ADC_Counter],0 + (0221) + (0222) Cont: + (0223) //14Point7 ASM Code End + (0224) + (0225) ; Sample data is now in iResult + (0226) ; + (0227) ; NOTE: This interrupt service routine has already + (0228) ; preserved the values of the A CPU register. If + (0229) ; you need to use the X register you must preserve + (0230) ; its value and restore it before the return from + (0231) ; interrupt. + (0232) ;--------------------------------------------------- + (0233) ; Insert your custom code above this banner + (0234) ;--------------------------------------------------- + (0235) ;@PSoC_UserCode_END@ (Do not change this line.) +0825: 18 POP A (0236) pop A +0826: 3C 40 00 CMP [0x40],0x0 (0237) cmp [ADCINC_bNumSamples],0 + (0238) if5: +0829: B0 0E JNZ 0x0838 (0239) jnz endif5 ; Number of samples is zero +082B: 55 3F 00 MOV [0x3F],0x0 (0240) mov [ADCINC_fMode],0 +082E: 55 3E 00 MOV [0x3E],0x0 (0241) mov [ADCINC_bState],0 +0831: 41 87 EF AND REG[0x87],0xEF +0834: 41 86 DF AND REG[0x86],0xDF + (0242) ADCINC_ENABLE_INTEGRATOR_M +0837: 7E RETI (0243) reti + (0244) endif5: +0838: 7A 40 DEC [0x40] (0245) dec [ADCINC_bNumSamples] + (0246) if6: +083A: A0 0E JZ 0x0849 (0247) jz endif6 ; count not zero +083C: 55 3F 00 MOV [0x3F],0x0 (0248) mov [ADCINC_fMode],0 +083F: 55 3E 00 MOV [0x3E],0x0 (0249) mov [ADCINC_bState],0 +0842: 41 87 EF AND REG[0x87],0xEF +0845: 41 86 DF AND REG[0x86],0xDF + (0250) ADCINC_ENABLE_INTEGRATOR_M +0848: 7E RETI (0251) reti +0849: 41 E1 FE AND REG[0xE1],0xFE + (0252) endif6: + (0253) ;All samples done + (0254) ADCINC_STOPADC_M +084C: 7E RETI (0255) reti +FILE: lib\adcinc.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: ADCINC.asm + (0004) ;; Version: 1.1, Updated on 2006/02/03 at 09:10:49 + (0005) ;; Generated by PSoC Designer 5.3.2710 + (0006) ;; + (0007) ;; DESCRIPTION: Assembler source for the ADCINC A/D Converter + (0008) ;; User Module with 1st-order modulator. + (0009) ;; + (0010) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0011) ;; arguments and observe the associated "Registers are volatile" policy. + (0012) ;; This means it is the caller's responsibility to preserve any values + (0013) ;; in the X and A registers that are still needed after the API + (0014) ;; function returns. Even though these registers may be preserved now, + (0015) ;; there is no guarantee they will be preserved in future releases. + (0016) ;;----------------------------------------------------------------------------- + (0017) ;; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0018) ;;***************************************************************************** + (0019) ;;***************************************************************************** + (0020) + (0021) include "m8c.inc" + (0022) include "memory.inc" + (0023) + (0024) include "ADCINC.inc" + (0025) + (0026) + (0027) ;----------------------------------------------- + (0028) ; Global Symbols + (0029) ;----------------------------------------------- + (0030) export ADCINC_Start + (0031) export _ADCINC_Start + (0032) export ADCINC_SetPower + (0033) export _ADCINC_SetPower + (0034) export ADCINC_Stop + (0035) export _ADCINC_Stop + (0036) export ADCINC_GetSamples + (0037) export _ADCINC_GetSamples + (0038) export ADCINC_StopADC + (0039) export _ADCINC_StopADC + (0040) export ADCINC_fIsDataAvailable + (0041) export _ADCINC_fIsDataAvailable + (0042) export ADCINC_iClearFlagGetData + (0043) export _ADCINC_iClearFlagGetData + (0044) export ADCINC_wClearFlagGetData + (0045) export _ADCINC_wClearFlagGetData + (0046) export ADCINC_cClearFlagGetData + (0047) export _ADCINC_cClearFlagGetData + (0048) export ADCINC_bClearFlagGetData + (0049) export _ADCINC_bClearFlagGetData + (0050) export ADCINC_iGetData + (0051) export _ADCINC_iGetData + (0052) export ADCINC_wGetData + (0053) export _ADCINC_wGetData + (0054) export ADCINC_bGetData + (0055) export _ADCINC_bGetData + (0056) export ADCINC_cGetData + (0057) export _ADCINC_cGetData + (0058) export ADCINC_fClearFlag + (0059) export _ADCINC_fClearFlag + (0060) export ADCINC_WritePulseWidth + (0061) export _ADCINC_WritePulseWidth + (0062) + (0063) + (0064) AREA bss (RAM,REL) + (0065) + (0066) ;----------------------------------------------- + (0067) ; Constant Definitions + (0068) ;----------------------------------------------- + (0069) + (0070) ;----------------------------------------------- + (0071) ; Variable Allocation + (0072) ;----------------------------------------------- + (0073) + (0074) + (0075) AREA UserModules (ROM, REL) + (0076) + (0077) .SECTION + (0078) ;----------------------------------------------------------------------------- + (0079) ; FUNCTION NAME: ADCINC_Start + (0080) ; + (0081) ; DESCRIPTION: Applies power setting to the module's analog PSoc block. + (0082) ; and starts the PWM + (0083) ;----------------------------------------------------------------------------- + (0084) ; + (0085) ; ARGUMENTS: The A register contains the power setting. + (0086) ; RETURNS: Nothing. + (0087) ; SIDE EFFECTS: + (0088) ; The A and X registers may be modified by this or future implementations + (0089) ; of this function. When necessary, it is the calling function's + (0090) ; responsibility to perserve their values across calls to fastcall16 + (0091) ; functions. + (0092) ; + (0093) ADCINC_Start: + (0094) _ADCINC_Start: + (0095) RAM_PROLOGUE RAM_USE_CLASS_1 +084D: 43 E7 C0 OR REG[0xE7],0xC0 (0096) or reg[DEC_CR1],c0h +0850: 90 0D CALL _ADCINC_SetPower (0097) call ADCINC_SetPower +0852: 43 86 20 OR REG[0x86],0x20 +0855: 43 87 10 OR REG[0x87],0x10 + (0098) ADCINC_RESET_INTEGRATOR_M +0858: 62 21 FF MOV REG[0x21],0xFF (0099) mov reg[ADCINC_PWMdr1],ffh +085B: 43 23 01 OR REG[0x23],0x1 (0100) or reg[ADCINC_PWMcr0],01h ; start PWM + (0101) RAM_EPILOGUE RAM_USE_CLASS_1 +085E: 7F RET (0102) ret + (0103) .ENDSECTION + (0104) + (0105) + (0106) .SECTION + (0107) ;----------------------------------------------------------------------------- + (0108) ; FUNCTION NAME: ADCINC_SetPower + (0109) ; + (0110) ; DESCRIPTION: Applies power setting to the module's analog PSoc block. + (0111) ;----------------------------------------------------------------------------- + (0112) ; + (0113) ; ARGUMENTS: The A register contains the power setting. + (0114) ; RETURNS: Nothing. + (0115) ; SIDE EFFECTS: + (0116) ; The A and X registers may be modified by this or future implementations + (0117) ; of this function. When necessary, it is the calling function's + (0118) ; responsibility to perserve their values across calls to fastcall16 + (0119) ; functions. + (0120) ; + (0121) ADCINC_SetPower: + (0122) _ADCINC_SetPower: + (0123) RAM_PROLOGUE RAM_USE_CLASS_2 +085F: 4F MOV X,SP (0124) mov X,SP ; Set up Stack frame +0860: 21 03 AND A,0x3 (0125) and A,03h ; Ensure value is legal +0862: 08 PUSH A (0126) push A +0863: 5D 87 MOV A,REG[0x87] (0127) mov A,reg[ADCINC_AtoDcr3] ; First SC block: +0865: 21 FC AND A,0xFC (0128) and A,~03h ; clear power bits to zero +0867: 2B 00 OR A,[X+0] (0129) or A,[ X ] ; establish new value +0869: 60 87 MOV REG[0x87],A (0130) mov reg[ADCINC_AtoDcr3],A ; change the actual setting +086B: 18 POP A (0131) pop A + (0132) RAM_EPILOGUE RAM_USE_CLASS_2 +086C: 7F RET (0133) ret +086D: 41 87 EF AND REG[0x87],0xEF +0870: 41 86 DF AND REG[0x86],0xDF + (0134) .ENDSECTION + (0135) + (0136) .SECTION + (0137) ;----------------------------------------------------------------------------- + (0138) ; FUNCTION NAME: ADCINC_Stop + (0139) ; + (0140) ; DESCRIPTION: Removes power from the module's analog PSoc block. + (0141) ; and turns off PWM + (0142) ;----------------------------------------------------------------------------- + (0143) ; + (0144) ; ARGUMENTS: None. + (0145) ; RETURNS: Nothing. + (0146) ; SIDE EFFECTS: + (0147) ; The A and X registers may be modified by this or future implementations + (0148) ; of this function. When necessary, it is the calling function's + (0149) ; responsibility to perserve their values across calls to fastcall16 + (0150) ; functions. + (0151) ; + (0152) ADCINC_Stop: + (0153) _ADCINC_Stop: + (0154) RAM_PROLOGUE RAM_USE_CLASS_1 + (0155) ADCINC_STOPADC_M + (0156) and reg[ADCINC_AtoDcr3], ~03h + (0157) and reg[ADCINC_PWMcr0], ~01h ; stop PWM + (0158) RAM_EPILOGUE RAM_USE_CLASS_1 + (0159) ret + (0160) .ENDSECTION + (0161) + (0162) + (0163) .SECTION + (0164) ;----------------------------------------------------------------------------- + (0165) ; FUNCTION NAME: ADCINC_GetSamples + (0166) ; + (0167) ; DESCRIPTION: Activates interrupts for this user module and begins sampling. + (0168) ;----------------------------------------------------------------------------- + (0169) ; + (0170) ; ARGUMENTS: A register contain number of samples + (0171) ; RETURNS: Nothing. + (0172) ; SIDE EFFECTS: + (0173) ; The A and X registers may be modified by this or future implementations + (0174) ; of this function. When necessary, it is the calling function's + (0175) ; responsibility to perserve their values across calls to fastcall16 + (0176) ; functions. + (0177) ; + (0178) ADCINC_GetSamples: + (0179) _ADCINC_GetSamples: + (0180) RAM_PROLOGUE RAM_USE_CLASS_4 + (0181) RAM_SETPAGE_CUR >ADCINC_fMode + (0182) ADCINC_ENABLE_INTEGRATOR_M +0873: 55 3F 00 MOV [0x3F],0x0 (0183) mov [ADCINC_fMode],0 +0876: 55 3E 00 MOV [0x3E],0x0 (0184) mov [ADCINC_bState],0 +0879: 53 40 MOV [0x40],A (0185) mov [ADCINC_bNumSamples],A +087B: 5D 22 MOV A,REG[0x22] (0186) mov A, reg[ADCINC_PWMdr2] +087D: B0 04 JNZ 0x0882 (0187) jnz .SkipPulseWrite +087F: 62 22 01 MOV REG[0x22],0x1 (0188) mov reg[ADCINC_PWMdr2], 1 +0882: 62 DB FE MOV REG[0xDB],0xFE +0885: 43 E1 01 OR REG[0xE1],0x1 + (0189) .SkipPulseWrite: + (0190) ADCINC_STARTADC_M ;enable interrupt + (0191) RAM_EPILOGUE RAM_USE_CLASS_4 +0888: 7F RET (0192) ret +0889: 55 3D 00 MOV [0x3D],0x0 +088C: 58 39 MOV X,[0x39] +088E: 51 3A MOV A,[0x3A] +0890: 3C 3D 00 CMP [0x3D],0x0 +0893: BF F5 JNZ _ADCINC_StopADC|_ADCINC_iClearFlagGetData|_ADCINC_fIsDataAvailable|_ADCINC_wClearFlagGetData|ADCINC_iClearFlagGetData|ADCINC_wClearFlagGetData + (0193) .ENDSECTION + (0194) + (0195) + (0196) .SECTION + (0197) ;----------------------------------------------------------------------------- + (0198) ; FUNCTION NAME: ADCINC_StopADC + (0199) ; + (0200) ; DESCRIPTION: Shuts down the A/D is an orderly manner. The interrupt + (0201) ; is disabled but the PWM output is still active. + (0202) ; Integrator is reset + (0203) ;----------------------------------------------------------------------------- + (0204) ; + (0205) ; ARGUMENTS: None. + (0206) ; RETURNS: Nothing. + (0207) ; SIDE EFFECTS: + (0208) ; The A and X registers may be modified by this or future implementations + (0209) ; of this function. When necessary, it is the calling function's + (0210) ; responsibility to perserve their values across calls to fastcall16 + (0211) ; functions. + (0212) ; + (0213) ADCINC_StopADC: + (0214) _ADCINC_StopADC: + (0215) RAM_PROLOGUE RAM_USE_CLASS_1 + (0216) ADCINC_STOPADC_M + (0217) ADCINC_RESET_INTEGRATOR_M + (0218) RAM_EPILOGUE RAM_USE_CLASS_1 + (0219) ret + (0220) .ENDSECTION + (0221) + (0222) + (0223) .SECTION + (0224) ;----------------------------------------------------------------------------- + (0225) ; FUNCTION NAME: ADCINC_fIsDataAvailable + (0226) ; + (0227) ; DESCRIPTION: Returns the status of the A/D Data + (0228) ;----------------------------------------------------------------------------- + (0229) ; ARGUMENTS: None. + (0230) ; RETURNS: fastcall BOOL DataAvailable returned in the A register + (0231) ; SIDE EFFECTS: + (0232) ; The A and X registers may be modified by this or future implementations + (0233) ; of this function. When necessary, it is the calling function's + (0234) ; responsibility to perserve their values across calls to fastcall16 + (0235) ; functions. + (0236) ; + (0237) ADCINC_fIsDataAvailable: + (0238) _ADCINC_fIsDataAvailable: + (0239) RAM_PROLOGUE RAM_USE_CLASS_4 + (0240) ADCINC_fIsDataAvailable_M + (0241) RAM_EPILOGUE RAM_USE_CLASS_4 + (0242) ret + (0243) .ENDSECTION + (0244) + (0245) + (0246) .SECTION + (0247) ;----------------------------------------------------------------------------- + (0248) ; FUNCTION NAME: ADCINC_iClearFlagGetData + (0249) ; ADCINC_wClearFlagGetData + (0250) ; + (0251) ; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. + (0252) ; Flag is checked after trandfer to insure valid data. + (0253) ; available. Also clears the DATA_READY flag. + (0254) ;----------------------------------------------------------------------------- + (0255) ; ARGUMENTS: None. + (0256) ; RETURNS: fastcall int iResult returned in the X and A register + (0257) ; SIDE EFFECTS: + (0258) ; The A and X registers may be modified by this or future implementations + (0259) ; of this function. When necessary, it is the calling function's + (0260) ; responsibility to perserve their values across calls to fastcall16 + (0261) ; functions. + (0262) ; + (0263) ADCINC_iClearFlagGetData: + (0264) _ADCINC_iClearFlagGetData: + (0265) ADCINC_wClearFlagGetData: + (0266) _ADCINC_wClearFlagGetData: + (0267) RAM_PROLOGUE RAM_USE_CLASS_4 + (0268) ADCINC_iClearFlagGetData_M + (0269) RAM_EPILOGUE RAM_USE_CLASS_4 +0895: 7F RET (0270) ret + (0271) .ENDSECTION + (0272) + (0273) + (0274) .SECTION + (0275) ;----------------------------------------------------------------------------- + (0276) ; FUNCTION NAME: ADCINC_cClearFlagGetData + (0277) ; ADCINC_bClearFlagGetData + (0278) ; + (0279) ; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. + (0280) ;----------------------------------------------------------------------------- + (0281) ; ARGUMENTS: None. + (0282) ; RETURNS: fastcall int iResult returned in the X and A register + (0283) ; SIDE EFFECTS: + (0284) ; The A and X registers may be modified by this or future implementations + (0285) ; of this function. When necessary, it is the calling function's + (0286) ; responsibility to perserve their values across calls to fastcall16 + (0287) ; functions. + (0288) ; + (0289) ADCINC_cClearFlagGetData: + (0290) _ADCINC_cClearFlagGetData: + (0291) ADCINC_bClearFlagGetData: + (0292) _ADCINC_bClearFlagGetData: + (0293) RAM_PROLOGUE RAM_USE_CLASS_4 + (0294) ADCINC_bClearFlagGetData_M + (0295) RAM_EPILOGUE RAM_USE_CLASS_4 + (0296) ret + (0297) .ENDSECTION + (0298) .SECTION + (0299) ;----------------------------------------------------------------------------- + (0300) ; FUNCTION NAME: ADCINC_iGetData + (0301) ; ADCINC_wGetData + (0302) ; + (0303) ; DESCRIPTION: Returns the data from the A/D. Does not check if data is + (0304) ; available. + (0305) ;----------------------------------------------------------------------------- + (0306) ; ARGUMENTS: None. + (0307) ; RETURNS: fastcall int iResult is returned in the X,A registers + (0308) ; SIDE EFFECTS: + (0309) ; The A and X registers may be modified by this or future implementations + (0310) ; of this function. When necessary, it is the calling function's + (0311) ; responsibility to perserve their values across calls to fastcall16 + (0312) ; functions. + (0313) ; + (0314) ADCINC_iGetData: + (0315) _ADCINC_iGetData: + (0316) ADCINC_wGetData: + (0317) _ADCINC_wGetData: + (0318) RAM_PROLOGUE RAM_USE_CLASS_4 + (0319) ADCINC_wGetData_M + (0320) RAM_EPILOGUE RAM_USE_CLASS_4 + (0321) ret + (0322) .ENDSECTION + (0323) .SECTION + (0324) ;----------------------------------------------------------------------------- + (0325) ; FUNCTION NAME: ADCINC_bGetData + (0326) ; ADCINC_cGetData + (0327) ; + (0328) ; DESCRIPTION: Returns the data from the A/D. Does not check if data is + (0329) ; available. + (0330) ;----------------------------------------------------------------------------- + (0331) ; ARGUMENTS: None. + (0332) ; RETURNS: fastcall CHAR cData returned in the A register + (0333) ; SIDE EFFECTS: + (0334) ; The A and X registers may be modified by this or future implementations + (0335) ; of this function. When necessary, it is the calling function's + (0336) ; responsibility to perserve their values across calls to fastcall16 + (0337) ; functions. + (0338) ; + (0339) ADCINC_bGetData: + (0340) _ADCINC_bGetData: + (0341) ADCINC_cGetData: + (0342) _ADCINC_cGetData: + (0343) RAM_PROLOGUE RAM_USE_CLASS_4 + (0344) ADCINC_cGetData_M + (0345) RAM_EPILOGUE RAM_USE_CLASS_4 + (0346) ret + (0347) .ENDSECTION + (0348) + (0349) + (0350) .SECTION + (0351) ;----------------------------------------------------------------------------- + (0352) ; FUNCTION NAME: ADCINC_fClearFlag + (0353) ; + (0354) ; DESCRIPTION: Clears the data ready flag. + (0355) ;----------------------------------------------------------------------------- + (0356) ; ARGUMENTS: None. + (0357) ; RETURNS: Nothing. + (0358) ; SIDE EFFECTS: + (0359) ; The DATA_READY flag is cleared. + (0360) ; The A and X registers may be modified by this or future implementations + (0361) ; of this function. When necessary, it is the calling function's + (0362) ; responsibility to perserve their values across calls to fastcall16 + (0363) ; functions. + (0364) ; + (0365) ADCINC_fClearFlag: + (0366) _ADCINC_fClearFlag: + (0367) RAM_PROLOGUE RAM_USE_CLASS_4 + (0368) ADCINC_fClearFlag_M + (0369) RAM_EPILOGUE RAM_USE_CLASS_4 + (0370) ret + (0371) .ENDSECTION + (0372) + (0373) + (0374) .SECTION + (0375) ;----------------------------------------------------------------------------- + (0376) ; FUNCTION NAME: ADCINC_WritePulseWidth + (0377) ; + (0378) ; DESCRIPTION: + (0379) ; Write the 8-bit period value into the compare register (DR2). + (0380) ;----------------------------------------------------------------------------- + (0381) ; + (0382) ; ARGUMENTS: fastcall BYTE bPeriodValue (passed in A) + (0383) ; RETURNS: Nothing + (0384) ; SIDE EFFECTS: + (0385) ; The A and X registers may be modified by this or future implementations + (0386) ; of this function. When necessary, it is the calling function's + (0387) ; responsibility to perserve their values across calls to fastcall16 + (0388) ; functions. + (0389) ; + (0390) ADCINC_WritePulseWidth: + (0391) _ADCINC_WritePulseWidth: + (0392) RAM_PROLOGUE RAM_USE_CLASS_1 + (0393) ADCINC_WritePulseWidth_M + (0394) RAM_EPILOGUE RAM_USE_CLASS_1 + (0395) ret + (0396) .ENDSECTION + (0397) + (0398) ; End of File ADCINC.asm +FILE: C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\main.c +(0001) //---------------------------------------------------------------------------- +(0002) // C main line +(0003) //---------------------------------------------------------------------------- +(0004) #include // part specific constants and macros +(0005) #include "PSoCAPI.h" // PSoC API definitions for all User Modules +(0006) extern BYTE ADC_Counter; //Variable Declared in ADCININT.asm +(0007) extern BYTE Ri_Max_x1; //Variable Declared in ADCININT.asm +(0008) extern BYTE Ri_Min_x1; //Variable Declared in ADCININT.asm +(0009) extern BYTE ip_x1; //Variable Declared in ADCININT.asm +(0010) extern BYTE ADC_IF; //Variable Declared in ADCININT.asm +(0011) extern BYTE Sleep_Counter; //Variable Declared in SleepTimerINT.asm +(0012) +(0013) #define Vout_Lookup_Counter_Set 25 +(0014) #define LCD_Counter_Set 50 +(0015) +(0016) #define Lin_Out +(0017) #define NB_Out +(0018) #define LCD_Lambda_Graph +(0019) #define LCD_Temperature_Graph +(0020) //#define PID_Tune +(0021) #define Ri_Filter_Strength 4 +(0022) #define ip_Filter_Strength 4 +(0023) +(0024) #ifdef PID_Tune +(0025) INT Ri_Mid_Target= 271; //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell +(0026) INT Ia_PID_Kp = 35; +(0027) INT Ia_PID_Ki = 8; +(0028) INT Ia_Output_Bias = 256; +(0029) INT Ri_Delta_Target=143; //PID Target peak to peak Voltage of Nermest Cell +(0030) INT Heater_PID_Kp =-72; +(0031) INT Heater_PID_Ki =-4; +(0032) INT Heater_PID_Output_Bias =128; +(0033) #else +(0034) #define Ri_Mid_Target 271 //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell +(0035) #define Ia_PID_Kp 25 +(0036) #define Ia_PID_Ki 4 +(0037) #define Ia_Output_Bias 256 +(0038) #define Ri_Delta_Target 143 //PID Target peak to peak Voltage of Nermest Cell +(0039) #define Heater_PID_Kp -72 +(0040) #define Heater_PID_Ki -4 +(0041) #define Heater_PID_Output_Bias 128 +(0042) #endif +(0043) +(0044) #ifdef Lin_Out +(0045) #define ip_to_Vout_Lookup_Start 135 +(0046) #define ip_to_Vout_Lookup_Size 158 +(0047) const BYTE ip_to_Vout_Lookup[ip_to_Vout_Lookup_Size] = {0,1,1,2,3,4,4,5,6,7,8,8,9,10,11,12,12,13,14,15,16,17,17,18,19,20,21,22,22,23,24,25,26,27,27,28,29,30,31,32,33,34,34,35,36,37,38,39,40,41,42,43,44,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,76,77,78,79,80,81,82,83,84,86,87,88,89,90,91,92,94,95,96,97,98,100,101,102,103,105,106,107,108,110,111,112,113,115,116,117,119,120,123,126,129,132,135,138,141,144,147,151,154,157,161,164,168,171,175,178,182,186,190,194,197,201,206,210,214,218,222,227,231,236,240,245,250,255}; +(0048) #endif +(0049) +(0050) #ifdef LCD_Lambda_Graph +(0051) #define ip_to_Lambda_Lookup_Start 135 +(0052) #define ip_to_Lambda_Lookup_Size 158 +(0053) const BYTE ip_to_Graph_Lookup[ip_to_Lambda_Lookup_Size]={8,8,8,9,9,9,9,9,10,10,10,10,10,11,11,11,11,12,12,12,12,12,13,13,13,13,14,14,14,14,14,15,15,15,15,16,16,16,16,16,17,17,17,17,18,18,18,18,19,19,19,19,20,20,20,20,21,21,21,21,22,22,22,22,23,23,23,23,24,24,24,25,25,25,25,26,26,26,26,27,27,27,28,28,28,28,29,29,29,30,30,30,31,31,31,31,32,32,32,33,33,33,34,34,34,35,35,35,36,36,36,37,37,37,38,38,38,39,39,39,40,40,41,42,42,43,44,45,46,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,70,71,72,73,75,76}; +(0054) #endif +(0055) +(0056) #ifdef LCD_Temperature_Graph +(0057) #define Ri_Delta_to_Temperature_C_Start 113 +(0058) #define Ri_Delta_to_Temperature_C_Size 75 +(0059) const BYTE Ri_Delta_to_Graph[Ri_Delta_to_Temperature_C_Size]={80,78,77,75,74,73,71,70,68,67,65,64,63,61,60,59,58,56,55,54,52,51,50,49,48,46,45,44,43,42,41,40,39,37,36,35,34,33,32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,18,17,16,15,14,13,12,11,11,10,9,8,7,6,5,5,4,3,2,1,1,0}; +(0060) #endif +(0061) +(0062) +(0063) +(0064) INT Ri_Mid_Error_Sum=0; +(0065) INT Ri_Mid; +(0066) INT Ri_Delta_Error_Sum=0; +(0067) INT Ri_Delta; +(0068) #define Ia_PID_Counter_Set 1 +(0069) #define Heatup_Counter_Set 100 +(0070) #define Heater_PID_Counter_Set 25 +(0071) BYTE Heatup_Heater_Output=100; +(0072) +(0073) INT Ri_Delta_Error; +(0074) INT Heater_Output; +(0075) INT Heater_Pout; +(0076) INT Heater_Iout; +(0077) +(0078) //PID Controller, Input is Ri_Delta (The Peak to peak voltage on the Vs Port of the sensor) output is PWM8_Heater, PWM8_Heater is controlled such that Ri_Delta is maintained at 80 (80 =750C) +(0079) //Only a PI controller is used as adding the D term does not effect performance +(0080) //Everything is inflated by a factor of 4 so that floating point is avioded +(0081) void Heater_PID(void) // Ned to run this when counter >50 +(0082) { +(0083) +(0084) Ri_Delta_Error=Ri_Delta_Target-Ri_Delta; +__UserModules_end|_ADCINC_wGetData|ADCINC_bClearFlagGetData|_ADCINC_fClearFlag|_ADCINC_iGetData|ADCINC_cGetData|_ADCINC_cClearFlagGetData|_ADCINC_bClearFlagGetData|_ADCINC_cGetData|_ADCINC_WritePulseWidth|ADCINC_wGetData|_ADCINC_bGetData|__text_start|...: + 0896: 50 8F MOV A,0x8F + 0898: 12 62 SUB A,[Ri_Delta+1] + 089A: 53 60 MOV [Ri_Delta_Error+1],A + 089C: 50 00 MOV A,0x0 + 089E: 1A 61 SBB A,[Ri_Delta] + 08A0: 53 5F MOV [Ri_Delta_Error],A +(0085) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0086) if (Ri_Delta_Error>56) + 08A2: 50 38 MOV A,0x38 + 08A4: 12 60 SUB A,[Ri_Delta_Error+1] + 08A6: 51 5F MOV A,[Ri_Delta_Error] + 08A8: 31 80 XOR A,0x80 + 08AA: 53 29 MOV [__rX],A + 08AC: 50 80 MOV A,0x80 + 08AE: 1A 29 SBB A,[__rX] + 08B0: D0 07 JNC 0x08B8 +(0087) { +(0088) Ri_Delta_Error=56; + 08B2: 55 60 38 MOV [Ri_Delta_Error+1],0x38 + 08B5: 55 5F 00 MOV [Ri_Delta_Error],0x0 +(0089) } +(0090) if (Ri_Delta_Error<-56) + 08B8: 51 60 MOV A,[Ri_Delta_Error+1] + 08BA: 11 C8 SUB A,0xC8 + 08BC: 51 5F MOV A,[Ri_Delta_Error] + 08BE: 31 80 XOR A,0x80 + 08C0: 19 7F SBB A,0x7F + 08C2: D0 07 JNC 0x08CA +(0091) { +(0092) Ri_Delta_Error=-56; + 08C4: 55 60 C8 MOV [Ri_Delta_Error+1],0xC8 + 08C7: 55 5F FF MOV [Ri_Delta_Error],0xFF +(0093) } +(0094) Heater_Pout=(Heater_PID_Kp*Ri_Delta_Error)/16; + 08CA: 5F 2C 60 MOV [__r1],[Ri_Delta_Error+1] + 08CD: 5F 2D 5F MOV [__r0],[Ri_Delta_Error] + 08D0: 55 2A B8 MOV [__r3],0xB8 + 08D3: 55 2B FF MOV [__r2],0xFF + 08D6: 55 29 00 MOV [__rX],0x0 + 08D9: 55 28 00 MOV [__rY],0x0 + 08DC: 3C 2B 00 CMP [__r2],0x0 + 08DF: B0 06 JNZ 0x08E6 + 08E1: 3C 2A 00 CMP [__r3],0x0 + 08E4: A0 17 JZ 0x08FC + 08E6: 70 FB AND F,0xFB + 08E8: 6E 2B RRC [__r2] + 08EA: 6E 2A RRC [__r3] + 08EC: D0 09 JNC 0x08F6 + 08EE: 51 2C MOV A,[__r1] + 08F0: 04 29 ADD [__rX],A + 08F2: 51 2D MOV A,[__r0] + 08F4: 0C 28 ADC [__rY],A + 08F6: 65 2C ASL [__r1] + 08F8: 6B 2D RLC [__r0] + 08FA: 8F E1 JMP 0x08DC + 08FC: 5F 2C 29 MOV [__r1],[__rX] + 08FF: 5F 2D 28 MOV [__r0],[__rY] + 0902: 50 00 MOV A,0x0 + 0904: 08 PUSH A + 0905: 50 10 MOV A,0x10 + 0907: 08 PUSH A + 0908: 51 2D MOV A,[__r0] + 090A: 08 PUSH A + 090B: 51 2C MOV A,[__r1] + 090D: 08 PUSH A + 090E: 7C 0E 41 LCALL 0x0E41 + 0911: 18 POP A + 0912: 53 5C MOV [Heater_Pout+1],A + 0914: 18 POP A + 0915: 53 5B MOV [Heater_Pout],A + 0917: 38 FE ADD SP,0xFE +(0095) Ri_Delta_Error_Sum=Ri_Delta_Error_Sum+Ri_Delta_Error; + 0919: 51 60 MOV A,[Ri_Delta_Error+1] + 091B: 04 03 ADD [Ri_Delta_Error_Sum+1],A + 091D: 51 5F MOV A,[Ri_Delta_Error] + 091F: 0C 02 ADC [Ri_Delta_Error_Sum],A +(0096) //If the sensor is too hot, then disreguard the Integratal contribution and just use the proportional to quickly correct the sensor temperature +(0097) /* +(0098) if((Ri_Delta<60)&&(Ri_Delta_Error_Sum>0)) +(0099) { +(0100) Ri_Delta_Error_Sum=0; +(0101) } +(0102) */ +(0103) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0104) if (Ri_Delta_Error_Sum>1024) + 0921: 50 00 MOV A,0x0 + 0923: 12 03 SUB A,[Ri_Delta_Error_Sum+1] + 0925: 51 02 MOV A,[Ri_Delta_Error_Sum] + 0927: 31 80 XOR A,0x80 + 0929: 53 29 MOV [__rX],A + 092B: 50 84 MOV A,0x84 + 092D: 1A 29 SBB A,[__rX] + 092F: D0 07 JNC 0x0937 +(0105) { +(0106) Ri_Delta_Error_Sum=1024; + 0931: 55 03 00 MOV [Ri_Delta_Error_Sum+1],0x0 + 0934: 55 02 04 MOV [Ri_Delta_Error_Sum],0x4 +(0107) } +(0108) if (Ri_Delta_Error_Sum<-1024) + 0937: 51 03 MOV A,[Ri_Delta_Error_Sum+1] + 0939: 11 00 SUB A,0x0 + 093B: 51 02 MOV A,[Ri_Delta_Error_Sum] + 093D: 31 80 XOR A,0x80 + 093F: 19 7C SBB A,0x7C + 0941: D0 07 JNC 0x0949 +(0109) { +(0110) Ri_Delta_Error_Sum=-1024; + 0943: 55 03 00 MOV [Ri_Delta_Error_Sum+1],0x0 + 0946: 55 02 FC MOV [Ri_Delta_Error_Sum],0xFC +(0111) } +(0112) Heater_Iout=(Heater_PID_Ki*Ri_Delta_Error_Sum)/16; + 0949: 5F 2C 03 MOV [__r1],[Ri_Delta_Error_Sum+1] + 094C: 5F 2D 02 MOV [__r0],[Ri_Delta_Error_Sum] + 094F: 55 2A FC MOV [__r3],0xFC + 0952: 55 2B FF MOV [__r2],0xFF + 0955: 55 29 00 MOV [__rX],0x0 + 0958: 55 28 00 MOV [__rY],0x0 + 095B: 3C 2B 00 CMP [__r2],0x0 + 095E: B0 06 JNZ 0x0965 + 0960: 3C 2A 00 CMP [__r3],0x0 + 0963: A0 17 JZ 0x097B + 0965: 70 FB AND F,0xFB + 0967: 6E 2B RRC [__r2] + 0969: 6E 2A RRC [__r3] + 096B: D0 09 JNC 0x0975 + 096D: 51 2C MOV A,[__r1] + 096F: 04 29 ADD [__rX],A + 0971: 51 2D MOV A,[__r0] + 0973: 0C 28 ADC [__rY],A + 0975: 65 2C ASL [__r1] + 0977: 6B 2D RLC [__r0] + 0979: 8F E1 JMP 0x095B + 097B: 5F 2C 29 MOV [__r1],[__rX] + 097E: 5F 2D 28 MOV [__r0],[__rY] + 0981: 50 00 MOV A,0x0 + 0983: 08 PUSH A + 0984: 50 10 MOV A,0x10 + 0986: 08 PUSH A + 0987: 51 2D MOV A,[__r0] + 0989: 08 PUSH A + 098A: 51 2C MOV A,[__r1] + 098C: 08 PUSH A + 098D: 7C 0E 41 LCALL 0x0E41 + 0990: 18 POP A + 0991: 53 5A MOV [Heater_Iout+1],A + 0993: 18 POP A + 0994: 53 59 MOV [Heater_Iout],A + 0996: 38 FE ADD SP,0xFE +(0113) if (Heatup_Heater_Output<255) // if Heatup_Heater_Output is < 255 that means the unit just turned on and to give control to the heatup routine + 0998: 3C 04 FF CMP [Heatup_Heater_Output],0xFF + 099B: D0 09 JNC 0x09A5 +(0114) { +(0115) Heater_Output=Heatup_Heater_Output; + 099D: 5F 5E 04 MOV [Heater_Output+1],[Heatup_Heater_Output] + 09A0: 55 5D 00 MOV [Heater_Output],0x0 +(0116) } + 09A3: 80 19 JMP 0x09BD +(0117) else +(0118) { +(0119) Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; + 09A5: 51 5C MOV A,[Heater_Pout+1] + 09A7: 01 80 ADD A,0x80 + 09A9: 53 2C MOV [__r1],A + 09AB: 51 5B MOV A,[Heater_Pout] + 09AD: 09 00 ADC A,0x0 + 09AF: 53 2D MOV [__r0],A + 09B1: 51 2C MOV A,[__r1] + 09B3: 02 5A ADD A,[Heater_Iout+1] + 09B5: 53 5E MOV [Heater_Output+1],A + 09B7: 51 2D MOV A,[__r0] + 09B9: 0A 59 ADC A,[Heater_Iout] + 09BB: 53 5D MOV [Heater_Output],A +(0120) } +(0121) //Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; +(0122) if (Heater_Output<0) + 09BD: 51 5E MOV A,[Heater_Output+1] + 09BF: 11 00 SUB A,0x0 + 09C1: 51 5D MOV A,[Heater_Output] + 09C3: 31 80 XOR A,0x80 + 09C5: 19 80 SBB A,0x80 + 09C7: D0 07 JNC 0x09CF +(0123) { +(0124) Heater_Output=0; + 09C9: 55 5E 00 MOV [Heater_Output+1],0x0 + 09CC: 55 5D 00 MOV [Heater_Output],0x0 +(0125) } +(0126) if (Heater_Output>255) + 09CF: 50 FF MOV A,0xFF + 09D1: 12 5E SUB A,[Heater_Output+1] + 09D3: 51 5D MOV A,[Heater_Output] + 09D5: 31 80 XOR A,0x80 + 09D7: 53 29 MOV [__rX],A + 09D9: 50 80 MOV A,0x80 + 09DB: 1A 29 SBB A,[__rX] + 09DD: D0 07 JNC 0x09E5 +(0127) { +(0128) Heater_Output=255; + 09DF: 55 5E FF MOV [Heater_Output+1],0xFF + 09E2: 55 5D 00 MOV [Heater_Output],0x0 +(0129) } +(0130) +(0131) +(0132) PWM8_Heater_WritePulseWidth(Heater_Output); + 09E5: 5F 2D 5E MOV [__r0],[Heater_Output+1] + 09E8: 10 PUSH X + 09E9: 51 2D MOV A,[__r0] + 09EB: 7C 04 D4 LCALL PWM8_Heater_WritePulseWidth|_PWM8_Heater_WritePeriod|_PWM8_Heater_Stop|_PWM8_Heater_WritePulseWidth + 09EE: 20 POP X + 09EF: 7F RET +(0133) //PWM8_Heater_WritePulseWidth(200); +(0134) } +(0135) +(0136) INT Ri_Mid_Error; +(0137) INT Ia_Output; +(0138) INT Ia_Pout; +(0139) INT Ia_Iout; +(0140) //PID Controller, Input is Ri_Mid (The average voltage on the Vs Port of the sensor) output is DAC9_Ia, DAC9_Ia sink/sources current to the Sensor pump cell such that Ri_Mid is is the same voltage as Vref +(0141) //Only a PI controller is used as adding the D term does not effect performance +(0142) //Everything is inflated by a factor of 4 so that floating point is avioded +(0143) void Ia_PID(void) +(0144) { +(0145) +(0146) +(0147) Ri_Mid_Error=Ri_Mid_Target-Ri_Mid; +_Ia_PID: + 09F0: 50 0F MOV A,0xF + 09F2: 12 64 SUB A,[Ri_Mid+1] + 09F4: 53 58 MOV [Ri_Mid_Error+1],A + 09F6: 50 01 MOV A,0x1 + 09F8: 1A 63 SBB A,[Ri_Mid] + 09FA: 53 57 MOV [Ri_Mid_Error],A +(0148) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0149) if (Ri_Mid_Error>163) + 09FC: 50 A3 MOV A,0xA3 + 09FE: 12 58 SUB A,[Ri_Mid_Error+1] + 0A00: 51 57 MOV A,[Ri_Mid_Error] + 0A02: 31 80 XOR A,0x80 + 0A04: 53 29 MOV [__rX],A + 0A06: 50 80 MOV A,0x80 + 0A08: 1A 29 SBB A,[__rX] + 0A0A: D0 07 JNC 0x0A12 +(0150) { +(0151) Ri_Mid_Error=163; + 0A0C: 55 58 A3 MOV [Ri_Mid_Error+1],0xA3 + 0A0F: 55 57 00 MOV [Ri_Mid_Error],0x0 +(0152) } +(0153) if (Ri_Mid_Error<-163) + 0A12: 51 58 MOV A,[Ri_Mid_Error+1] + 0A14: 11 5D SUB A,0x5D + 0A16: 51 57 MOV A,[Ri_Mid_Error] + 0A18: 31 80 XOR A,0x80 + 0A1A: 19 7F SBB A,0x7F + 0A1C: D0 07 JNC 0x0A24 +(0154) { +(0155) Ri_Mid_Error=-163; + 0A1E: 55 58 5D MOV [Ri_Mid_Error+1],0x5D + 0A21: 55 57 FF MOV [Ri_Mid_Error],0xFF +(0156) } +(0157) Ia_Pout=(Ia_PID_Kp*Ri_Mid_Error)/16; + 0A24: 5F 2C 58 MOV [__r1],[Ri_Mid_Error+1] + 0A27: 5F 2D 57 MOV [__r0],[Ri_Mid_Error] + 0A2A: 55 2A 19 MOV [__r3],0x19 + 0A2D: 55 2B 00 MOV [__r2],0x0 + 0A30: 55 29 00 MOV [__rX],0x0 + 0A33: 55 28 00 MOV [__rY],0x0 + 0A36: 3C 2B 00 CMP [__r2],0x0 + 0A39: B0 06 JNZ 0x0A40 + 0A3B: 3C 2A 00 CMP [__r3],0x0 + 0A3E: A0 17 JZ 0x0A56 + 0A40: 70 FB AND F,0xFB + 0A42: 6E 2B RRC [__r2] + 0A44: 6E 2A RRC [__r3] + 0A46: D0 09 JNC 0x0A50 + 0A48: 51 2C MOV A,[__r1] + 0A4A: 04 29 ADD [__rX],A + 0A4C: 51 2D MOV A,[__r0] + 0A4E: 0C 28 ADC [__rY],A + 0A50: 65 2C ASL [__r1] + 0A52: 6B 2D RLC [__r0] + 0A54: 8F E1 JMP 0x0A36 + 0A56: 5F 2C 29 MOV [__r1],[__rX] + 0A59: 5F 2D 28 MOV [__r0],[__rY] + 0A5C: 50 00 MOV A,0x0 + 0A5E: 08 PUSH A + 0A5F: 50 10 MOV A,0x10 + 0A61: 08 PUSH A + 0A62: 51 2D MOV A,[__r0] + 0A64: 08 PUSH A + 0A65: 51 2C MOV A,[__r1] + 0A67: 08 PUSH A + 0A68: 7C 0E 41 LCALL 0x0E41 + 0A6B: 18 POP A + 0A6C: 53 54 MOV [Ia_Pout+1],A + 0A6E: 18 POP A + 0A6F: 53 53 MOV [Ia_Pout],A + 0A71: 38 FE ADD SP,0xFE +(0158) Ri_Mid_Error_Sum=Ri_Mid_Error_Sum+Ri_Mid_Error; + 0A73: 51 58 MOV A,[Ri_Mid_Error+1] + 0A75: 04 01 ADD [Ri_Mid_Error_Sum+1],A + 0A77: 51 57 MOV A,[Ri_Mid_Error] + 0A79: 0C 00 ADC [Ri_Mid_Error_Sum],A +(0159) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0160) if (Ri_Mid_Error_Sum>1020) + 0A7B: 50 FC MOV A,0xFC + 0A7D: 12 01 SUB A,[Ri_Mid_Error_Sum+1] + 0A7F: 51 00 MOV A,[Ri_Mid_Error_Sum] + 0A81: 31 80 XOR A,0x80 + 0A83: 53 29 MOV [__rX],A + 0A85: 50 83 MOV A,0x83 + 0A87: 1A 29 SBB A,[__rX] + 0A89: D0 07 JNC 0x0A91 +(0161) { +(0162) Ri_Mid_Error_Sum=1020; + 0A8B: 55 01 FC MOV [Ri_Mid_Error_Sum+1],0xFC + 0A8E: 55 00 03 MOV [Ri_Mid_Error_Sum],0x3 +(0163) } +(0164) if (Ri_Mid_Error_Sum<-1020) + 0A91: 51 01 MOV A,[Ri_Mid_Error_Sum+1] + 0A93: 11 04 SUB A,0x4 + 0A95: 51 00 MOV A,[Ri_Mid_Error_Sum] + 0A97: 31 80 XOR A,0x80 + 0A99: 19 7C SBB A,0x7C + 0A9B: D0 07 JNC 0x0AA3 +(0165) { +(0166) Ri_Mid_Error_Sum=-1020; + 0A9D: 55 01 04 MOV [Ri_Mid_Error_Sum+1],0x4 + 0AA0: 55 00 FC MOV [Ri_Mid_Error_Sum],0xFC +(0167) } +(0168) Ia_Iout=(Ia_PID_Ki*Ri_Mid_Error_Sum)/16; + 0AA3: 5F 2C 01 MOV [__r1],[Ri_Mid_Error_Sum+1] + 0AA6: 5F 2D 00 MOV [__r0],[Ri_Mid_Error_Sum] + 0AA9: 65 2C ASL [__r1] + 0AAB: 6B 2D RLC [__r0] + 0AAD: 65 2C ASL [__r1] + 0AAF: 6B 2D RLC [__r0] + 0AB1: 50 00 MOV A,0x0 + 0AB3: 08 PUSH A + 0AB4: 50 10 MOV A,0x10 + 0AB6: 08 PUSH A + 0AB7: 51 2D MOV A,[__r0] + 0AB9: 08 PUSH A + 0ABA: 51 2C MOV A,[__r1] + 0ABC: 08 PUSH A + 0ABD: 7C 0E 41 LCALL 0x0E41 + 0AC0: 18 POP A + 0AC1: 53 52 MOV [Ia_Iout+1],A + 0AC3: 18 POP A + 0AC4: 53 51 MOV [Ia_Iout],A + 0AC6: 38 FE ADD SP,0xFE +(0169) Ia_Output=Ia_Output_Bias+Ia_Pout+Ia_Iout; + 0AC8: 51 54 MOV A,[Ia_Pout+1] + 0ACA: 01 00 ADD A,0x0 + 0ACC: 53 2C MOV [__r1],A + 0ACE: 51 53 MOV A,[Ia_Pout] + 0AD0: 09 01 ADC A,0x1 + 0AD2: 53 2D MOV [__r0],A + 0AD4: 51 2C MOV A,[__r1] + 0AD6: 02 52 ADD A,[Ia_Iout+1] + 0AD8: 53 56 MOV [Ia_Output+1],A + 0ADA: 51 2D MOV A,[__r0] + 0ADC: 0A 51 ADC A,[Ia_Iout] + 0ADE: 53 55 MOV [Ia_Output],A +(0170) //9 Bit Dac so only 0-511 is allowed, for some reason i put the limit at 510, I foget exactly why. +(0171) if (Ia_Output<0) + 0AE0: 51 56 MOV A,[Ia_Output+1] + 0AE2: 11 00 SUB A,0x0 + 0AE4: 51 55 MOV A,[Ia_Output] + 0AE6: 31 80 XOR A,0x80 + 0AE8: 19 80 SBB A,0x80 + 0AEA: D0 07 JNC 0x0AF2 +(0172) { +(0173) Ia_Output=0; + 0AEC: 55 56 00 MOV [Ia_Output+1],0x0 + 0AEF: 55 55 00 MOV [Ia_Output],0x0 +(0174) } +(0175) if (Ia_Output>510) + 0AF2: 50 FE MOV A,0xFE + 0AF4: 12 56 SUB A,[Ia_Output+1] + 0AF6: 51 55 MOV A,[Ia_Output] + 0AF8: 31 80 XOR A,0x80 + 0AFA: 53 29 MOV [__rX],A + 0AFC: 50 81 MOV A,0x81 + 0AFE: 1A 29 SBB A,[__rX] + 0B00: D0 07 JNC 0x0B08 +(0176) { +(0177) Ia_Output=510; + 0B02: 55 56 FE MOV [Ia_Output+1],0xFE + 0B05: 55 55 01 MOV [Ia_Output],0x1 +(0178) } +(0179) DAC9_Ia_WriteStall (Ia_Output); + 0B08: 10 PUSH X + 0B09: 58 55 MOV X,[Ia_Output] + 0B0B: 51 56 MOV A,[Ia_Output+1] + 0B0D: 7C 07 02 LCALL _DAC9_Ia_WriteStall|_DAC9_Ia_WriteBlind|DAC9_Ia_WriteBlind2B|_DAC9_Ia_WriteBlind2B + 0B10: 20 POP X + 0B11: 7F RET +(0180) //DAC9_Ia_WriteStall (256); +(0181) } +(0182) INT IIR_Int(INT Vin, INT Vout, BYTE A) +(0183) { +_IIR_Int: + A --> X-8 + Vout --> X-7 + Vin --> X-5 + 0B12: 10 PUSH X + 0B13: 4F MOV X,SP +(0184) return (Vout + (Vin - Vout)/A); + 0B14: 52 FC MOV A,[X-4] + 0B16: 13 FA SUB A,[X-6] + 0B18: 53 2C MOV [__r1],A + 0B1A: 52 FB MOV A,[X-5] + 0B1C: 1B F9 SBB A,[X-7] + 0B1E: 53 2D MOV [__r0],A + 0B20: 52 F8 MOV A,[X-8] + 0B22: 53 2A MOV [__r3],A + 0B24: 50 00 MOV A,0x0 + 0B26: 08 PUSH A + 0B27: 51 2A MOV A,[__r3] + 0B29: 08 PUSH A + 0B2A: 51 2D MOV A,[__r0] + 0B2C: 08 PUSH A + 0B2D: 51 2C MOV A,[__r1] + 0B2F: 08 PUSH A + 0B30: 7C 0E 41 LCALL 0x0E41 + 0B33: 18 POP A + 0B34: 53 2C MOV [__r1],A + 0B36: 18 POP A + 0B37: 53 2D MOV [__r0],A + 0B39: 38 FE ADD SP,0xFE + 0B3B: 52 FA MOV A,[X-6] + 0B3D: 02 2C ADD A,[__r1] + 0B3F: 53 2C MOV [__r1],A + 0B41: 52 F9 MOV A,[X-7] + 0B43: 0A 2D ADC A,[__r0] + 0B45: 53 2D MOV [__r0],A + 0B47: 20 POP X + 0B48: 7F RET +(0185) } +(0186) +(0187) +(0188) BYTE Ia_PID_Counter=0; +(0189) BYTE Vout_Lookup_Counter=0; +(0190) BYTE Heater_PID_Counter=0; +(0191) BYTE LCD_Counter=0; +(0192) BYTE Heatup_Counter=0; +(0193) INT Ri_Min,Ri_Max; +(0194) INT ip,ip_Justified; +(0195) BYTE Lambda_x100; +(0196) INT LSU_Temperature_C; +(0197) char Str1[] = "Lambda=x.xx"; +(0198) char Str2[] = "Temperature=xxxC"; +(0199) void main(void) +(0200) { +_main: + temp_int2 --> X+7 + temp_ulong --> X+3 + temp_byte --> X+2 + temp_int --> X+0 + 0B49: 10 PUSH X + 0B4A: 4F MOV X,SP + 0B4B: 38 09 ADD SP,0x9 +(0201) unsigned long temp_ulong; +(0202) INT temp_int,temp_int2; +(0203) BYTE temp_byte; +(0204) AMUX4_0_InputSelect(AMUX4_0_PORT0_1); + 0B4D: 10 PUSH X + 0B4E: 50 00 MOV A,0x0 + 0B50: 7C 07 7C LCALL _AMUX4_1_Start|_AMUX4_1_Stop|_AMUX4_0_InputSelect|AMUX4_0_InputSelect +(0205) AMUX4_1_InputSelect(AMUX4_1_PORT0_0); + 0B53: 50 00 MOV A,0x0 + 0B55: 7C 07 65 LCALL AMUX4_1_InputSelect|_DAC6_VGND_Stop|_AMUX4_1_InputSelect +(0206) INSAMP_Start(INSAMP_LOWPOWER); + 0B58: 50 01 MOV A,0x1 + 0B5A: 7C 06 D6 LCALL _INSAMP_SetPower|_INSAMP_Start|INSAMP_Start +(0207) ADCINC_Start(ADCINC_HIGHPOWER); + 0B5D: 50 03 MOV A,0x3 + 0B5F: 7C 08 4D LCALL _ADCINC_Start +(0208) DAC9_Ia_Start(DAC9_Ia_HIGHPOWER); + 0B62: 50 03 MOV A,0x3 + 0B64: 7C 06 EC LCALL _INSAMP_Stop|_DAC9_Ia_Start|DAC9_Ia_Start|_INSAMP_SetGain|DAC9_Ia_SetPower|_DAC9_Ia_SetPower +(0209) DAC6_VGND_Start(DAC6_VGND_MEDPOWER); + 0B67: 50 02 MOV A,0x2 + 0B69: 7C 07 42 LCALL _DAC9_Ia_Stop|DAC6_VGND_Start|_DAC6_VGND_Start|_DAC6_VGND_SetPower|DAC6_VGND_SetPower +(0210) DAC6_VGND_WriteStall (31); + 0B6C: 50 1F MOV A,0x1F + 0B6E: 7C 07 49 LCALL DAC6_VGND_WriteStall|_DAC6_VGND_WriteBlind|_DAC6_VGND_WriteStall +(0211) PWM8_Vout_DisableInt(); + 0B71: 7C 04 B4 LCALL _PWM8_Vout_DisableInt|_PWM8_Vout_EnableInt +(0212) PWM8_Vout_Start(); + 0B74: 7C 04 B8 LCALL _PWM8_Vout_Start +(0213) PWM8_Heater_DisableInt(); + 0B77: 7C 04 CC LCALL _PWM8_Heater_DisableInt|_PWM8_Heater_EnableInt +(0214) PWM8_Heater_Start(); + 0B7A: 7C 04 D0 LCALL _PWM8_Heater_Start +(0215) PWM8_NB_Out_DisableInt(); + 0B7D: 7C 04 C0 LCALL PWM8_NB_Out_DisableInt|_PWM8_NB_Out_EnableInt|_PWM8_NB_Out_DisableInt +(0216) PWM8_NB_Out_Start(); + 0B80: 7C 04 C4 LCALL _PWM8_NB_Out_Start +(0217) ADCINC_GetSamples(0); + 0B83: 50 00 MOV A,0x0 + 0B85: 7C 08 6D LCALL ADCINC_GetSamples|_ADCINC_Stop|_ADCINC_GetSamples +(0218) SleepTimer_Start(); + 0B88: 7C 04 90 LCALL _SleepTimer_Start|_SleepTimer_DisableInt +(0219) SleepTimer_SetInterval(SleepTimer_512_HZ); + 0B8B: 50 00 MOV A,0x0 + 0B8D: 7C 04 A1 LCALL _SleepTimer_SetInterval|_SleepTimer_Stop +(0220) SleepTimer_EnableInt(); + 0B90: 7C 04 8C LCALL _SleepTimer_EnableInt + 0B93: 20 POP X +(0221) M8C_EnableGInt ; + 0B94: 71 01 OR F,0x1 +(0222) LCD_Start(); // Initialize LCD + 0B96: 10 PUSH X + 0B97: 7C 05 D1 LCALL _LCD_Start|LCD_Init|LCD_Start|_LCD_Init +(0223) LCD_InitBG(LCD_SOLID_BG); + 0B9A: 50 00 MOV A,0x0 + 0B9C: 7C 06 A6 LCALL _LCD_InitBG + 0B9F: 20 POP X +(0224) +(0225) for(;;) +(0226) { +(0227) temp_ulong++; + 0BA0: 07 06 01 ADD [X+6],0x1 + 0BA3: 0F 05 00 ADC [X+5],0x0 + 0BA6: 0F 04 00 ADC [X+4],0x0 + 0BA9: 0F 03 00 ADC [X+3],0x0 +(0228) if ((ADC_IF&1)==1) + 0BAC: 51 45 MOV A,[0x45] + 0BAE: 21 01 AND A,0x1 + 0BB0: 39 01 CMP A,0x1 + 0BB2: B0 56 JNZ 0x0C09 +(0229) { +(0230) ADC_IF=ADC_IF&254; + 0BB4: 26 45 FE AND [0x45],0xFE +(0231) Ri_Min=IIR_Int(Ri_Min_x1*2,Ri_Min,Ri_Filter_Strength); + 0BB7: 50 04 MOV A,0x4 + 0BB9: 08 PUSH A + 0BBA: 51 4F MOV A,[Ri_Min] + 0BBC: 08 PUSH A + 0BBD: 51 50 MOV A,[Ri_Min+1] + 0BBF: 08 PUSH A + 0BC0: 5F 2C 43 MOV [__r1],[0x43] + 0BC3: 55 2D 00 MOV [__r0],0x0 + 0BC6: 65 2C ASL [__r1] + 0BC8: 6B 2D RLC [__r0] + 0BCA: 51 2D MOV A,[__r0] + 0BCC: 08 PUSH A + 0BCD: 51 2C MOV A,[__r1] + 0BCF: 08 PUSH A + 0BD0: 9F 40 CALL _IIR_Int + 0BD2: 38 FB ADD SP,0xFB + 0BD4: 5F 50 2C MOV [Ri_Min+1],[__r1] + 0BD7: 5F 4F 2D MOV [Ri_Min],[__r0] +(0232) Ri_Delta=Ri_Max-Ri_Min; + 0BDA: 51 4E MOV A,[Ri_Max+1] + 0BDC: 12 50 SUB A,[Ri_Min+1] + 0BDE: 53 62 MOV [Ri_Delta+1],A + 0BE0: 51 4D MOV A,[Ri_Max] + 0BE2: 1A 4F SBB A,[Ri_Min] + 0BE4: 53 61 MOV [Ri_Delta],A +(0233) Ri_Mid=(Ri_Max+Ri_Min)/2; + 0BE6: 51 4E MOV A,[Ri_Max+1] + 0BE8: 02 50 ADD A,[Ri_Min+1] + 0BEA: 53 2C MOV [__r1],A + 0BEC: 51 4D MOV A,[Ri_Max] + 0BEE: 0A 4F ADC A,[Ri_Min] + 0BF0: 53 2D MOV [__r0],A + 0BF2: 50 00 MOV A,0x0 + 0BF4: 08 PUSH A + 0BF5: 50 02 MOV A,0x2 + 0BF7: 08 PUSH A + 0BF8: 51 2D MOV A,[__r0] + 0BFA: 08 PUSH A + 0BFB: 51 2C MOV A,[__r1] + 0BFD: 08 PUSH A + 0BFE: 7C 0E 41 LCALL 0x0E41 + 0C01: 18 POP A + 0C02: 53 64 MOV [Ri_Mid+1],A + 0C04: 18 POP A + 0C05: 53 63 MOV [Ri_Mid],A + 0C07: 38 FE ADD SP,0xFE +(0234) } +(0235) if ((ADC_IF&2)==2) + 0C09: 51 45 MOV A,[0x45] + 0C0B: 21 02 AND A,0x2 + 0C0D: 39 02 CMP A,0x2 + 0C0F: B0 56 JNZ 0x0C66 +(0236) { +(0237) ADC_IF=ADC_IF&253; + 0C11: 26 45 FD AND [0x45],0xFD +(0238) Ri_Max=IIR_Int(Ri_Max_x1*2,Ri_Max,Ri_Filter_Strength); + 0C14: 50 04 MOV A,0x4 + 0C16: 08 PUSH A + 0C17: 51 4D MOV A,[Ri_Max] + 0C19: 08 PUSH A + 0C1A: 51 4E MOV A,[Ri_Max+1] + 0C1C: 08 PUSH A + 0C1D: 5F 2C 42 MOV [__r1],[0x42] + 0C20: 55 2D 00 MOV [__r0],0x0 + 0C23: 65 2C ASL [__r1] + 0C25: 6B 2D RLC [__r0] + 0C27: 51 2D MOV A,[__r0] + 0C29: 08 PUSH A + 0C2A: 51 2C MOV A,[__r1] + 0C2C: 08 PUSH A + 0C2D: 9E E3 CALL _IIR_Int + 0C2F: 38 FB ADD SP,0xFB + 0C31: 5F 4E 2C MOV [Ri_Max+1],[__r1] + 0C34: 5F 4D 2D MOV [Ri_Max],[__r0] +(0239) Ri_Delta=Ri_Max-Ri_Min; + 0C37: 51 4E MOV A,[Ri_Max+1] + 0C39: 12 50 SUB A,[Ri_Min+1] + 0C3B: 53 62 MOV [Ri_Delta+1],A + 0C3D: 51 4D MOV A,[Ri_Max] + 0C3F: 1A 4F SBB A,[Ri_Min] + 0C41: 53 61 MOV [Ri_Delta],A +(0240) Ri_Mid=(Ri_Max+Ri_Min)/2; + 0C43: 51 4E MOV A,[Ri_Max+1] + 0C45: 02 50 ADD A,[Ri_Min+1] + 0C47: 53 2C MOV [__r1],A + 0C49: 51 4D MOV A,[Ri_Max] + 0C4B: 0A 4F ADC A,[Ri_Min] + 0C4D: 53 2D MOV [__r0],A + 0C4F: 50 00 MOV A,0x0 + 0C51: 08 PUSH A + 0C52: 50 02 MOV A,0x2 + 0C54: 08 PUSH A + 0C55: 51 2D MOV A,[__r0] + 0C57: 08 PUSH A + 0C58: 51 2C MOV A,[__r1] + 0C5A: 08 PUSH A + 0C5B: 7C 0E 41 LCALL 0x0E41 + 0C5E: 18 POP A + 0C5F: 53 64 MOV [Ri_Mid+1],A + 0C61: 18 POP A + 0C62: 53 63 MOV [Ri_Mid],A + 0C64: 38 FE ADD SP,0xFE +(0241) } +(0242) if ((ADC_IF&4)==4) + 0C66: 51 45 MOV A,[0x45] + 0C68: 21 04 AND A,0x4 + 0C6A: 39 04 CMP A,0x4 + 0C6C: B0 27 JNZ 0x0C94 +(0243) { +(0244) ADC_IF=ADC_IF&251; + 0C6E: 26 45 FB AND [0x45],0xFB +(0245) ip=IIR_Int(ip_x1*2,ip,ip_Filter_Strength); + 0C71: 50 04 MOV A,0x4 + 0C73: 08 PUSH A + 0C74: 51 4B MOV A,[ip] + 0C76: 08 PUSH A + 0C77: 51 4C MOV A,[ip+1] + 0C79: 08 PUSH A + 0C7A: 5F 2C 44 MOV [__r1],[0x44] + 0C7D: 55 2D 00 MOV [__r0],0x0 + 0C80: 65 2C ASL [__r1] + 0C82: 6B 2D RLC [__r0] + 0C84: 51 2D MOV A,[__r0] + 0C86: 08 PUSH A + 0C87: 51 2C MOV A,[__r1] + 0C89: 08 PUSH A + 0C8A: 9E 86 CALL _IIR_Int + 0C8C: 38 FB ADD SP,0xFB + 0C8E: 5F 4C 2C MOV [ip+1],[__r1] + 0C91: 5F 4B 2D MOV [ip],[__r0] +(0246) } +(0247) Ia_PID_Counter+=Sleep_Counter; + 0C94: 51 35 MOV A,[0x35] + 0C96: 04 05 ADD [Ia_PID_Counter],A +(0248) Heater_PID_Counter+=Sleep_Counter; + 0C98: 51 35 MOV A,[0x35] + 0C9A: 04 07 ADD [Heater_PID_Counter],A +(0249) Heatup_Counter+=Sleep_Counter; + 0C9C: 51 35 MOV A,[0x35] + 0C9E: 04 09 ADD [Heatup_Counter],A +(0250) Vout_Lookup_Counter+=Sleep_Counter; + 0CA0: 51 35 MOV A,[0x35] + 0CA2: 04 06 ADD [Vout_Lookup_Counter],A +(0251) LCD_Counter+=Sleep_Counter; + 0CA4: 51 35 MOV A,[0x35] + 0CA6: 04 08 ADD [LCD_Counter],A +(0252) Sleep_Counter=0; + 0CA8: 55 35 00 MOV [0x35],0x0 +(0253) if (Ia_PID_Counter>Ia_PID_Counter_Set) + 0CAB: 50 01 MOV A,0x1 + 0CAD: 3A 05 CMP A,[Ia_PID_Counter] + 0CAF: D0 06 JNC 0x0CB6 +(0254) { +(0255) Ia_PID_Counter=0; + 0CB1: 55 05 00 MOV [Ia_PID_Counter],0x0 +(0256) Ia_PID(); + 0CB4: 9D 3A CALL _Ia_PID +(0257) } +(0258) if (Heater_PID_Counter>Heater_PID_Counter_Set) + 0CB6: 50 19 MOV A,0x19 + 0CB8: 3A 07 CMP A,[Heater_PID_Counter] + 0CBA: D0 06 JNC 0x0CC1 +(0259) { +(0260) Heater_PID_Counter=0; + 0CBC: 55 07 00 MOV [Heater_PID_Counter],0x0 +(0261) Heater_PID(); + 0CBF: 9B D5 CALL __UserModules_end|_ADCINC_wGetData|ADCINC_bClearFlagGetData|_ADCINC_fClearFlag|_ADCINC_iGetData|ADCINC_cGetData|_ADCINC_cClearFlagGetData|_ADCINC_bClearFlagGetData|_ADCINC_cGetData|_ADCINC_WritePulseWidth|ADCINC_wGetData|_ADCINC_bGetData|__text_start|... +(0262) } +(0263) if (Vout_Lookup_Counter>Vout_Lookup_Counter_Set) + 0CC1: 50 19 MOV A,0x19 + 0CC3: 3A 06 CMP A,[Vout_Lookup_Counter] + 0CC5: D0 76 JNC 0x0D3C +(0264) { +(0265) Vout_Lookup_Counter=0; + 0CC7: 55 06 00 MOV [Vout_Lookup_Counter],0x0 +(0266) temp_int=ip-ip_to_Vout_Lookup_Start; + 0CCA: 51 4C MOV A,[ip+1] + 0CCC: 11 87 SUB A,0x87 + 0CCE: 54 01 MOV [X+1],A + 0CD0: 51 4B MOV A,[ip] + 0CD2: 19 00 SBB A,0x0 + 0CD4: 54 00 MOV [X+0],A +(0267) if (temp_int<0) + 0CD6: 52 01 MOV A,[X+1] + 0CD8: 11 00 SUB A,0x0 + 0CDA: 52 00 MOV A,[X+0] + 0CDC: 31 80 XOR A,0x80 + 0CDE: 19 80 SBB A,0x80 + 0CE0: D0 07 JNC 0x0CE8 +(0268) { +(0269) temp_int=0; + 0CE2: 56 01 00 MOV [X+1],0x0 + 0CE5: 56 00 00 MOV [X+0],0x0 +(0270) } +(0271) if (temp_int>(ip_to_Vout_Lookup_Size-1)) + 0CE8: 50 9D MOV A,0x9D + 0CEA: 13 01 SUB A,[X+1] + 0CEC: 52 00 MOV A,[X+0] + 0CEE: 31 80 XOR A,0x80 + 0CF0: 53 29 MOV [__rX],A + 0CF2: 50 80 MOV A,0x80 + 0CF4: 1A 29 SBB A,[__rX] + 0CF6: D0 07 JNC 0x0CFE +(0272) { +(0273) temp_int=(ip_to_Vout_Lookup_Size-1); + 0CF8: 56 01 9D MOV [X+1],0x9D + 0CFB: 56 00 00 MOV [X+0],0x0 +(0274) } +(0275) PWM8_Vout_WritePulseWidth(ip_to_Vout_Lookup[temp_int]); + 0CFE: 52 01 MOV A,[X+1] + 0D00: 01 50 ADD A,0x50 + 0D02: 53 2C MOV [__r1],A + 0D04: 52 00 MOV A,[X+0] + 0D06: 09 01 ADC A,0x1 + 0D08: 10 PUSH X + 0D09: 58 2C MOV X,[__r1] + 0D0B: 28 ROMX + 0D0C: 7C 04 BC LCALL _PWM8_Vout_WritePulseWidth|_PWM8_Vout_Stop|_PWM8_Vout_WritePeriod + 0D0F: 20 POP X +(0276) +(0277) #ifdef NB_Out +(0278) temp_byte=23;//0.45v + 0D10: 56 02 17 MOV [X+2],0x17 +(0279) if (ip<251) // 251 =0.9797787392968 + 0D13: 51 4C MOV A,[ip+1] + 0D15: 11 FB SUB A,0xFB + 0D17: 51 4B MOV A,[ip] + 0D19: 31 80 XOR A,0x80 + 0D1B: 19 80 SBB A,0x80 + 0D1D: D0 04 JNC 0x0D22 +(0280) { +(0281) temp_byte=46; //0.9v + 0D1F: 56 02 2E MOV [X+2],0x2E +(0282) +(0283) } +(0284) if (ip>259) //259 = 1.02295956968912 + 0D22: 50 03 MOV A,0x3 + 0D24: 12 4C SUB A,[ip+1] + 0D26: 51 4B MOV A,[ip] + 0D28: 31 80 XOR A,0x80 + 0D2A: 53 29 MOV [__rX],A + 0D2C: 50 81 MOV A,0x81 + 0D2E: 1A 29 SBB A,[__rX] + 0D30: D0 04 JNC 0x0D35 +(0285) { +(0286) temp_byte=0; //0v + 0D32: 56 02 00 MOV [X+2],0x0 +(0287) } +(0288) PWM8_NB_Out_WritePulseWidth(temp_byte); + 0D35: 10 PUSH X + 0D36: 52 02 MOV A,[X+2] + 0D38: 7C 04 C8 LCALL _PWM8_NB_Out_Stop|_PWM8_NB_Out_WritePulseWidth|_PWM8_NB_Out_WritePeriod|PWM8_NB_Out_WritePulseWidth + 0D3B: 20 POP X +(0289) #endif +(0290) +(0291) } +(0292) if (LCD_Counter>LCD_Counter_Set) + 0D3C: 50 32 MOV A,0x32 + 0D3E: 3A 08 CMP A,[LCD_Counter] + 0D40: D0 B8 JNC 0x0DF9 +(0293) { +(0294) LCD_Counter=0; + 0D42: 55 08 00 MOV [LCD_Counter],0x0 +(0295) #ifdef LCD_Lambda_Graph +(0296) temp_int=ip-ip_to_Lambda_Lookup_Start; + 0D45: 51 4C MOV A,[ip+1] + 0D47: 11 87 SUB A,0x87 + 0D49: 54 01 MOV [X+1],A + 0D4B: 51 4B MOV A,[ip] + 0D4D: 19 00 SBB A,0x0 + 0D4F: 54 00 MOV [X+0],A +(0297) if (temp_int<0) + 0D51: 52 01 MOV A,[X+1] + 0D53: 11 00 SUB A,0x0 + 0D55: 52 00 MOV A,[X+0] + 0D57: 31 80 XOR A,0x80 + 0D59: 19 80 SBB A,0x80 + 0D5B: D0 07 JNC 0x0D63 +(0298) { +(0299) temp_int=0; + 0D5D: 56 01 00 MOV [X+1],0x0 + 0D60: 56 00 00 MOV [X+0],0x0 +(0300) } +(0301) if (temp_int>(ip_to_Lambda_Lookup_Size-1)) + 0D63: 50 9D MOV A,0x9D + 0D65: 13 01 SUB A,[X+1] + 0D67: 52 00 MOV A,[X+0] + 0D69: 31 80 XOR A,0x80 + 0D6B: 53 29 MOV [__rX],A + 0D6D: 50 80 MOV A,0x80 + 0D6F: 1A 29 SBB A,[__rX] + 0D71: D0 07 JNC 0x0D79 +(0302) { +(0303) temp_int=(ip_to_Lambda_Lookup_Size-1); + 0D73: 56 01 9D MOV [X+1],0x9D + 0D76: 56 00 00 MOV [X+0],0x0 +(0304) } +(0305) Lambda_x100=ip_to_Graph_Lookup[temp_int]; + 0D79: 52 01 MOV A,[X+1] + 0D7B: 01 EE ADD A,0xEE + 0D7D: 53 2C MOV [__r1],A + 0D7F: 52 00 MOV A,[X+0] + 0D81: 09 01 ADC A,0x1 + 0D83: 10 PUSH X + 0D84: 58 2C MOV X,[__r1] + 0D86: 28 ROMX + 0D87: 20 POP X + 0D88: 53 48 MOV [Lambda_x100],A +(0306) LCD_DrawBG(0,0,16,Lambda_x100); + 0D8A: 10 PUSH X + 0D8B: 51 48 MOV A,[Lambda_x100] + 0D8D: 08 PUSH A + 0D8E: 50 10 MOV A,0x10 + 0D90: 08 PUSH A + 0D91: 50 00 MOV A,0x0 + 0D93: 08 PUSH A + 0D94: 08 PUSH A + 0D95: 7C 06 6F LCALL _LCD_DrawBG + 0D98: 38 FC ADD SP,0xFC + 0D9A: 20 POP X +(0307) #endif +(0308) +(0309) #ifdef LCD_Temperature_Graph +(0310) temp_int=Ri_Delta-Ri_Delta_to_Temperature_C_Start; + 0D9B: 51 62 MOV A,[Ri_Delta+1] + 0D9D: 11 71 SUB A,0x71 + 0D9F: 54 01 MOV [X+1],A + 0DA1: 51 61 MOV A,[Ri_Delta] + 0DA3: 19 00 SBB A,0x0 + 0DA5: 54 00 MOV [X+0],A +(0311) if (temp_int<0) + 0DA7: 52 01 MOV A,[X+1] + 0DA9: 11 00 SUB A,0x0 + 0DAB: 52 00 MOV A,[X+0] + 0DAD: 31 80 XOR A,0x80 + 0DAF: 19 80 SBB A,0x80 + 0DB1: D0 07 JNC 0x0DB9 +(0312) { +(0313) temp_int=0; + 0DB3: 56 01 00 MOV [X+1],0x0 + 0DB6: 56 00 00 MOV [X+0],0x0 +(0314) } +(0315) if (temp_int>(Ri_Delta_to_Temperature_C_Size-1)) + 0DB9: 50 4A MOV A,0x4A + 0DBB: 13 01 SUB A,[X+1] + 0DBD: 52 00 MOV A,[X+0] + 0DBF: 31 80 XOR A,0x80 + 0DC1: 53 29 MOV [__rX],A + 0DC3: 50 80 MOV A,0x80 + 0DC5: 1A 29 SBB A,[__rX] + 0DC7: D0 07 JNC 0x0DCF +(0316) { +(0317) temp_int=(Ri_Delta_to_Temperature_C_Size-1); + 0DC9: 56 01 4A MOV [X+1],0x4A + 0DCC: 56 00 00 MOV [X+0],0x0 +(0318) } +(0319) LSU_Temperature_C=Ri_Delta_to_Graph[temp_int]; + 0DCF: 52 01 MOV A,[X+1] + 0DD1: 01 8C ADD A,0x8C + 0DD3: 53 2C MOV [__r1],A + 0DD5: 52 00 MOV A,[X+0] + 0DD7: 09 02 ADC A,0x2 + 0DD9: 10 PUSH X + 0DDA: 58 2C MOV X,[__r1] + 0DDC: 28 ROMX + 0DDD: 20 POP X + 0DDE: 53 47 MOV [LSU_Temperature_C+1],A + 0DE0: 55 46 00 MOV [LSU_Temperature_C],0x0 +(0320) LCD_DrawBG(1,0,16,LSU_Temperature_C); + 0DE3: 5F 2D 47 MOV [__r0],[LSU_Temperature_C+1] + 0DE6: 10 PUSH X + 0DE7: 51 2D MOV A,[__r0] + 0DE9: 08 PUSH A + 0DEA: 50 10 MOV A,0x10 + 0DEC: 08 PUSH A + 0DED: 50 00 MOV A,0x0 + 0DEF: 08 PUSH A + 0DF0: 50 01 MOV A,0x1 + 0DF2: 08 PUSH A + 0DF3: 7C 06 6F LCALL _LCD_DrawBG + 0DF6: 38 FC ADD SP,0xFC + 0DF8: 20 POP X +(0321) #endif +(0322) } +(0323) if (Heatup_Heater_Output<255) + 0DF9: 3C 04 FF CMP [Heatup_Heater_Output],0xFF + 0DFC: DD A3 JNC 0x0BA0 +(0324) { +(0325) if (Heatup_Counter>Heatup_Counter_Set) + 0DFE: 50 64 MOV A,0x64 + 0E00: 3A 09 CMP A,[Heatup_Counter] + 0E02: D0 06 JNC 0x0E09 +(0326) { +(0327) Heatup_Counter=0; + 0E04: 55 09 00 MOV [Heatup_Counter],0x0 +(0328) Heatup_Heater_Output++; + 0E07: 76 04 INC [Heatup_Heater_Output] +(0329) } +(0330) if ((Ri_Min>50) && (Ri_Max<475) && (Ri_Delta [ sleeptimerint.asm, sleeptimer.asm, pwm8_voutint.asm, pwm8_vout.asm, pwm8_nb_outint.asm, pwm8_nb_out.asm ] +[ pwm8_heaterint.asm, pwm8_heater.asm, psocconfigtbl.asm, psocconfig.asm, lcd.asm, insamp.asm ] +[ dac9_ia.asm, dac6_vgnd.asm, amux4_1.asm, amux4_0.asm, adcincint.asm, adcinc.asm, rZ.asm, rY.asm ] +[ rX.asm, r3.asm, r2.asm, r1.asm, r0.asm, divmod_16x16_16_util.asm, i_div16_block_util.asm ] + +Area Definitions + +-blit:0x150.0xfff +-bdata:0.0xff +-rwh:SSCParmBlk:0xf7.0xff + diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom new file mode 100644 index 0000000..34eb538 --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom @@ -0,0 +1,472 @@ +80 67 30 30 30 30 30 30 +7E 30 30 30 7E 30 30 30 +30 30 30 30 30 30 30 30 +7E 30 30 30 7E 30 30 30 +7D 07 93 7E 7D 04 CB 7E +7D 04 B3 7E 7D 04 BF 7E +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +7E 30 30 30 7D 04 6A 7E +71 10 62 E3 86 70 EF 62 +E3 38 41 FE FB 50 65 4E +62 E3 38 55 F8 00 55 F9 +00 71 10 62 E0 02 70 EF +62 E3 38 62 71 05 62 75 +05 7C 04 03 50 00 55 2D +46 3C 2D 65 A0 05 3F 2D +8F F8 50 03 57 77 55 2D +00 3C 2D 27 A0 0B 08 28 +3F 2D 18 75 09 00 8F F2 +71 10 43 E3 10 70 EF 62 +E0 00 71 10 62 E0 02 70 +EF 62 E2 00 7C 0B 49 8F +FF 50 10 7F 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +00 01 01 02 03 04 04 05 +06 07 08 08 09 0A 0B 0C +0C 0D 0E 0F 10 11 11 12 +13 14 15 16 16 17 18 19 +1A 1B 1B 1C 1D 1E 1F 20 +21 22 22 23 24 25 26 27 +28 29 2A 2B 2C 2C 2D 2E +2F 30 31 32 33 34 35 36 +37 38 39 3A 3B 3C 3D 3E +3F 40 41 42 43 44 45 46 +47 48 49 4A 4C 4D 4E 4F +50 51 52 53 54 56 57 58 +59 5A 5B 5C 5E 5F 60 61 +62 64 65 66 67 69 6A 6B +6C 6E 6F 70 71 73 74 75 +77 78 7B 7E 81 84 87 8A +8D 90 93 97 9A 9D A1 A4 +A8 AB AF B2 B6 BA BE C2 +C5 C9 CE D2 D6 DA DE E3 +E7 EC F0 F5 FA FF 08 08 +08 09 09 09 09 09 0A 0A +0A 0A 0A 0B 0B 0B 0B 0C +0C 0C 0C 0C 0D 0D 0D 0D +0E 0E 0E 0E 0E 0F 0F 0F +0F 10 10 10 10 10 11 11 +11 11 12 12 12 12 13 13 +13 13 14 14 14 14 15 15 +15 15 16 16 16 16 17 17 +17 17 18 18 18 19 19 19 +19 1A 1A 1A 1A 1B 1B 1B +1C 1C 1C 1C 1D 1D 1D 1E +1E 1E 1F 1F 1F 1F 20 20 +20 21 21 21 22 22 22 23 +23 23 24 24 24 25 25 25 +26 26 26 27 27 27 28 28 +29 2A 2A 2B 2C 2D 2E 2E +2F 30 31 32 33 34 35 36 +37 38 39 3A 3B 3C 3D 3E +3F 40 41 42 43 44 46 47 +48 49 4B 4C 50 4E 4D 4B +4A 49 47 46 44 43 41 40 +3F 3D 3C 3B 3A 38 37 36 +34 33 32 31 30 2E 2D 2C +2B 2A 29 28 27 25 24 23 +22 21 20 1F 1E 1D 1C 1B +1A 19 18 17 16 15 14 13 +12 12 11 10 0F 0E 0D 0C +0B 0B 0A 09 08 07 06 05 +05 04 03 02 01 01 00 84 +90 85 00 86 60 87 F8 23 +00 21 00 22 01 80 80 81 +40 82 A0 83 30 90 80 91 +80 92 20 93 30 94 A0 95 +41 96 A0 97 34 71 DD 72 +21 73 20 70 00 75 1C 76 +21 77 20 74 00 27 00 25 +FF 26 00 2F 00 2D FF 2E +00 2B 00 29 FF 2A 00 60 +09 66 00 63 3F 65 00 E6 +02 E7 02 D6 00 B0 00 B1 +00 B2 00 B3 33 B4 33 B5 +88 B6 08 FF 20 31 21 16 +22 40 24 31 25 11 26 44 +2C 31 2D 14 2E 06 28 31 +29 14 2A 05 61 00 69 00 +60 05 62 29 67 33 68 00 +63 00 66 00 D1 00 D3 00 +D0 00 D2 00 E1 0B E2 00 +DF 2F DE 00 DD 00 FF 00 +00 00 00 64 00 00 00 00 +00 4C 61 6D 62 64 61 3D +78 2E 78 78 00 54 65 6D +70 65 72 61 74 75 72 65 +3D 78 78 78 43 00 70 EF +62 00 00 71 10 62 00 04 +62 01 FB 70 EF 62 03 FB +62 02 00 71 10 62 02 00 +62 03 00 70 EF 62 01 00 +62 04 00 71 10 62 04 70 +62 05 8F 70 EF 62 07 8F +62 06 70 71 10 62 06 00 +62 07 00 70 EF 62 05 00 +62 08 00 71 10 62 08 FF +62 09 00 70 EF 62 0B 00 +62 0A 00 71 10 62 0A 00 +62 0B 00 70 EF 62 09 00 +70 EF 7F 55 36 00 55 37 +FF 55 38 00 7C 04 13 7C +03 9E 7F 10 70 EF 50 00 +67 50 02 57 D7 7C 04 2E +50 01 67 50 03 57 3C 7C +04 2E 70 EF 20 7F 38 02 +10 08 4F 56 FC 00 D0 04 +56 FC 01 18 20 70 EF 62 +E3 00 10 08 28 39 FF A0 +1F 4F 48 FC 01 A0 03 71 +10 54 FD 18 20 75 09 00 +10 08 28 4F 59 FD 61 00 +18 20 75 09 00 8F D7 38 +FC 7F 2E 2E 01 47 30 FF +A0 03 7A 30 47 2F FF A0 +03 7A 2F 76 34 D0 0B 76 +33 D0 07 76 32 D0 03 76 +31 76 35 7E 43 E0 40 7F +50 00 53 2E 53 2F 53 30 +53 34 53 33 53 32 53 31 +7F 21 18 4F 08 71 10 5D +E0 21 E7 2B 00 60 E0 70 +EF 18 7F 7E 41 E1 FB 7F +43 2B 01 7F 60 2A 7F 7E +41 E1 F7 7F 43 2F 01 7F +60 2E 7F 7E 41 E1 FD 7F +43 27 01 7F 60 26 7F 08 +10 28 B0 04 20 18 7F 90 +35 20 18 75 DF F2 74 8F +EF 30 31 32 33 34 35 36 +37 38 39 41 42 43 44 45 +46 08 67 67 67 67 21 0F +FF E7 90 12 18 21 0F FF +E0 90 0B 7F 52 00 A0 06 +90 04 75 8F F8 7F 90 5F +08 67 67 67 67 21 0F 90 +38 18 21 0F 40 40 40 90 +30 7F 90 4B 08 67 67 67 +67 21 0F 90 09 18 21 0F +40 40 40 90 01 7F 08 26 +36 80 51 36 60 08 18 21 +0F 29 10 2A 36 60 08 53 +36 40 21 8F 53 36 60 08 +7F 08 26 36 80 2E 36 20 +51 36 60 08 18 21 0F 29 +30 2A 36 60 08 53 36 40 +21 AF 53 36 60 08 7F 08 +26 36 80 51 36 60 08 26 +37 F0 51 37 71 10 60 08 +70 EF 2E 36 40 51 36 60 +08 40 10 57 FF 2E 36 50 +51 36 60 08 40 40 5D 08 +08 26 36 C0 51 36 60 08 +40 40 40 2E 36 50 51 36 +60 08 40 40 26 36 C0 51 +36 60 08 18 21 08 A0 04 +79 BF D3 20 2E 37 7F 51 +37 71 10 60 08 70 EF 18 +7F 26 37 80 2E 37 7F 26 +38 80 51 37 71 10 60 08 +51 38 60 09 70 EF 50 FA +90 63 50 FA 90 5F 50 03 +9F 4C 50 52 90 57 50 03 +9F 44 90 5F 90 5D 90 5B +50 03 9F 3A 50 5A 90 45 +50 02 9F 32 50 5A 90 3D +50 08 9F 16 50 5A 90 35 +50 01 9F 0E 50 5A 90 2D +50 06 9F 06 50 0E 9F 02 +50 2C 9E FE 50 08 9E FA +50 0C 9E F6 50 03 9E F2 +50 5A 90 11 7F 80 C0 94 +D4 21 03 10 FF F7 4F 03 +FF 20 9E DE 7F 90 0C 78 +BF FC 7F 08 19 3A 7C 01 +01 01 01 08 71 10 5D E0 +70 EF 21 07 39 05 D0 06 +FF E9 78 BF FE 18 7F 4F +10 52 FD 59 FC 9F CA 20 +3D FA 00 B0 05 50 00 80 +11 3D FA 06 D0 07 52 FA +15 FA 80 06 50 06 17 FA +05 9E 83 7B FB BF E2 7F +00 10 18 1C 1E 1F 1F 00 +10 08 04 02 01 00 4F 38 +03 54 02 50 40 9E 7B 56 +00 00 56 01 08 52 00 3D +02 00 B0 05 FF DA 80 03 +FF DD 9E 52 7B 01 BF EE +77 00 3D 00 07 BF E4 38 +FD 50 0C 9E 55 7F 21 03 +4F 08 5D 73 21 FC 2B 00 +60 73 5D 77 21 FC 2B 00 +60 77 18 7F 21 03 4F 08 +5D 97 21 FC 2B 00 60 97 +5D 93 21 FC 2B 00 60 93 +18 7F 11 FF 4B 19 00 4B +4B 08 78 5B C0 05 73 74 +80 05 73 73 80 01 08 67 +67 67 21 1F 4F 27 FE 20 +2B FE 5C 18 10 64 64 21 +1F 4F 2B FE 31 20 20 38 +FF 29 80 4B 29 80 43 65 +01 60 94 41 65 FE 5B 60 +90 7F 21 03 29 30 60 83 +7F 11 1F 64 D0 07 73 74 +29 40 80 06 40 40 40 80 +01 67 29 80 43 65 01 60 +80 41 65 FE 7F 21 03 57 +00 79 C0 05 64 64 8F FA +4F 08 5D 60 21 FC 2B 00 +60 60 18 7F 21 03 57 00 +79 C0 05 64 64 8F FA 4F +08 5D 60 21 FC 2B 00 60 +60 18 7F 7A 3E C0 02 7E +3C 3F 00 B0 12 08 5D E5 +53 3C 5D E4 53 3B 18 55 +3F 01 55 3E 03 7E 43 86 +20 43 87 10 08 5D E5 12 +3C 53 3C 5D E4 1A 3B 67 +6E 3C 06 3C 80 09 00 39 +01 B0 05 78 55 3C FF 5F +3A 3C 53 39 55 3D 01 51 +41 11 00 A0 0D 11 01 A0 +17 11 01 A0 24 11 01 A0 +2E 41 00 FB 5F 42 3A 55 +41 01 2E 45 02 80 2F 62 +60 0F 43 00 04 5F 43 3A +2E 45 01 55 41 02 80 1E +41 00 FB 5F 44 3A 2E 45 +04 55 41 03 80 10 43 00 +04 62 60 00 5F 44 3A 2E +45 04 55 41 00 18 3C 40 +00 B0 0E 55 3F 00 55 3E +00 41 87 EF 41 86 DF 7E +7A 40 A0 0E 55 3F 00 55 +3E 00 41 87 EF 41 86 DF +7E 41 E1 FE 7E 43 E7 C0 +90 0D 43 86 20 43 87 10 +62 21 FF 43 23 01 7F 4F +21 03 08 5D 87 21 FC 2B +00 60 87 18 7F 41 87 EF +41 86 DF 55 3F 00 55 3E +00 53 40 5D 22 B0 04 62 +22 01 62 DB FE 43 E1 01 +7F 55 3D 00 58 39 51 3A +3C 3D 00 BF F5 7F 50 8F +12 62 53 60 50 00 1A 61 +53 5F 50 38 12 60 51 5F +31 80 53 29 50 80 1A 29 +D0 07 55 60 38 55 5F 00 +51 60 11 C8 51 5F 31 80 +19 7F D0 07 55 60 C8 55 +5F FF 5F 2C 60 5F 2D 5F +55 2A B8 55 2B FF 55 29 +00 55 28 00 3C 2B 00 B0 +06 3C 2A 00 A0 17 70 FB +6E 2B 6E 2A D0 09 51 2C +04 29 51 2D 0C 28 65 2C +6B 2D 8F E1 5F 2C 29 5F +2D 28 50 00 08 50 10 08 +51 2D 08 51 2C 08 7C 0E +41 18 53 5C 18 53 5B 38 +FE 51 60 04 03 51 5F 0C +02 50 00 12 03 51 02 31 +80 53 29 50 84 1A 29 D0 +07 55 03 00 55 02 04 51 +03 11 00 51 02 31 80 19 +7C D0 07 55 03 00 55 02 +FC 5F 2C 03 5F 2D 02 55 +2A FC 55 2B FF 55 29 00 +55 28 00 3C 2B 00 B0 06 +3C 2A 00 A0 17 70 FB 6E +2B 6E 2A D0 09 51 2C 04 +29 51 2D 0C 28 65 2C 6B +2D 8F E1 5F 2C 29 5F 2D +28 50 00 08 50 10 08 51 +2D 08 51 2C 08 7C 0E 41 +18 53 5A 18 53 59 38 FE +3C 04 FF D0 09 5F 5E 04 +55 5D 00 80 19 51 5C 01 +80 53 2C 51 5B 09 00 53 +2D 51 2C 02 5A 53 5E 51 +2D 0A 59 53 5D 51 5E 11 +00 51 5D 31 80 19 80 D0 +07 55 5E 00 55 5D 00 50 +FF 12 5E 51 5D 31 80 53 +29 50 80 1A 29 D0 07 55 +5E FF 55 5D 00 5F 2D 5E +10 51 2D 7C 04 D4 20 7F +50 0F 12 64 53 58 50 01 +1A 63 53 57 50 A3 12 58 +51 57 31 80 53 29 50 80 +1A 29 D0 07 55 58 A3 55 +57 00 51 58 11 5D 51 57 +31 80 19 7F D0 07 55 58 +5D 55 57 FF 5F 2C 58 5F +2D 57 55 2A 19 55 2B 00 +55 29 00 55 28 00 3C 2B +00 B0 06 3C 2A 00 A0 17 +70 FB 6E 2B 6E 2A D0 09 +51 2C 04 29 51 2D 0C 28 +65 2C 6B 2D 8F E1 5F 2C +29 5F 2D 28 50 00 08 50 +10 08 51 2D 08 51 2C 08 +7C 0E 41 18 53 54 18 53 +53 38 FE 51 58 04 01 51 +57 0C 00 50 FC 12 01 51 +00 31 80 53 29 50 83 1A +29 D0 07 55 01 FC 55 00 +03 51 01 11 04 51 00 31 +80 19 7C D0 07 55 01 04 +55 00 FC 5F 2C 01 5F 2D +00 65 2C 6B 2D 65 2C 6B +2D 50 00 08 50 10 08 51 +2D 08 51 2C 08 7C 0E 41 +18 53 52 18 53 51 38 FE +51 54 01 00 53 2C 51 53 +09 01 53 2D 51 2C 02 52 +53 56 51 2D 0A 51 53 55 +51 56 11 00 51 55 31 80 +19 80 D0 07 55 56 00 55 +55 00 50 FE 12 56 51 55 +31 80 53 29 50 81 1A 29 +D0 07 55 56 FE 55 55 01 +10 58 55 51 56 7C 07 02 +20 7F 10 4F 52 FC 13 FA +53 2C 52 FB 1B F9 53 2D +52 F8 53 2A 50 00 08 51 +2A 08 51 2D 08 51 2C 08 +7C 0E 41 18 53 2C 18 53 +2D 38 FE 52 FA 02 2C 53 +2C 52 F9 0A 2D 53 2D 20 +7F 10 4F 38 09 10 50 00 +7C 07 7C 50 00 7C 07 65 +50 01 7C 06 D6 50 03 7C +08 4D 50 03 7C 06 EC 50 +02 7C 07 42 50 1F 7C 07 +49 7C 04 B4 7C 04 B8 7C +04 CC 7C 04 D0 7C 04 C0 +7C 04 C4 50 00 7C 08 6D +7C 04 90 50 00 7C 04 A1 +7C 04 8C 20 71 01 10 7C +05 D1 50 00 7C 06 A6 20 +07 06 01 0F 05 00 0F 04 +00 0F 03 00 51 45 21 01 +39 01 B0 56 26 45 FE 50 +04 08 51 4F 08 51 50 08 +5F 2C 43 55 2D 00 65 2C +6B 2D 51 2D 08 51 2C 08 +9F 40 38 FB 5F 50 2C 5F +4F 2D 51 4E 12 50 53 62 +51 4D 1A 4F 53 61 51 4E +02 50 53 2C 51 4D 0A 4F +53 2D 50 00 08 50 02 08 +51 2D 08 51 2C 08 7C 0E +41 18 53 64 18 53 63 38 +FE 51 45 21 02 39 02 B0 +56 26 45 FD 50 04 08 51 +4D 08 51 4E 08 5F 2C 42 +55 2D 00 65 2C 6B 2D 51 +2D 08 51 2C 08 9E E3 38 +FB 5F 4E 2C 5F 4D 2D 51 +4E 12 50 53 62 51 4D 1A +4F 53 61 51 4E 02 50 53 +2C 51 4D 0A 4F 53 2D 50 +00 08 50 02 08 51 2D 08 +51 2C 08 7C 0E 41 18 53 +64 18 53 63 38 FE 51 45 +21 04 39 04 B0 27 26 45 +FB 50 04 08 51 4B 08 51 +4C 08 5F 2C 44 55 2D 00 +65 2C 6B 2D 51 2D 08 51 +2C 08 9E 86 38 FB 5F 4C +2C 5F 4B 2D 51 35 04 05 +51 35 04 07 51 35 04 09 +51 35 04 06 51 35 04 08 +55 35 00 50 01 3A 05 D0 +06 55 05 00 9D 3A 50 19 +3A 07 D0 06 55 07 00 9B +D5 50 19 3A 06 D0 76 55 +06 00 51 4C 11 87 54 01 +51 4B 19 00 54 00 52 01 +11 00 52 00 31 80 19 80 +D0 07 56 01 00 56 00 00 +50 9D 13 01 52 00 31 80 +53 29 50 80 1A 29 D0 07 +56 01 9D 56 00 00 52 01 +01 50 53 2C 52 00 09 01 +10 58 2C 28 7C 04 BC 20 +56 02 17 51 4C 11 FB 51 +4B 31 80 19 80 D0 04 56 +02 2E 50 03 12 4C 51 4B +31 80 53 29 50 81 1A 29 +D0 04 56 02 00 10 52 02 +7C 04 C8 20 50 32 3A 08 +D0 B8 55 08 00 51 4C 11 +87 54 01 51 4B 19 00 54 +00 52 01 11 00 52 00 31 +80 19 80 D0 07 56 01 00 +56 00 00 50 9D 13 01 52 +00 31 80 53 29 50 80 1A +29 D0 07 56 01 9D 56 00 +00 52 01 01 EE 53 2C 52 +00 09 01 10 58 2C 28 20 +53 48 10 51 48 08 50 10 +08 50 00 08 08 7C 06 6F +38 FC 20 51 62 11 71 54 +01 51 61 19 00 54 00 52 +01 11 00 52 00 31 80 19 +80 D0 07 56 01 00 56 00 +00 50 4A 13 01 52 00 31 +80 53 29 50 80 1A 29 D0 +07 56 01 4A 56 00 00 52 +01 01 8C 53 2C 52 00 09 +02 10 58 2C 28 20 53 47 +55 46 00 5F 2D 47 10 51 +2D 08 50 10 08 50 00 08 +50 01 08 7C 06 6F 38 FC +20 3C 04 FF DD A3 50 64 +3A 09 D0 06 55 09 00 76 +04 50 32 12 50 51 4F 31 +80 53 29 50 80 1A 29 DD +88 51 4E 11 DB 51 4D 31 +80 19 81 DD 7C 51 62 11 +8F 51 61 31 80 19 80 DD +70 55 04 FF 55 03 00 55 +02 00 8D 65 38 F7 20 8F +FF 10 4F 50 00 3D FB 80 +C0 0D 37 FC FF 77 FC 37 +FB FF 0D FB 50 C0 3D F9 +80 C0 0E 37 FA FF 77 FA +37 F9 FF 0F F9 00 31 80 +08 7C 0E 8B 18 6A D0 0C +37 FC FF 37 FB FF 77 FC +0F FB 00 6A D0 0C 37 FA +FF 37 F9 FF 77 FA 0F F9 +00 20 7F 50 00 53 28 53 +29 55 27 10 66 FC 6C FB +6B 28 6B 29 51 28 1B FA +51 29 1B F9 C0 09 53 29 +52 FA 1C 28 77 FC 7A 27 +BF E3 51 28 54 FA 51 29 +54 F9 7F 30 \ No newline at end of file diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep similarity index 72% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep rename to June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep index 69ca8b5..7f96ff0 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep @@ -2,8 +2,8 @@ ./obj/boot.o : \ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8ssc.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\lib\GLOBAL~1.INC\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\lib\GLOBAL~1.INC\ + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./obj/main.o : ./lib/ADCINC.h ./lib/AMUX4_0.h ./lib/AMUX4_1.h\ ./lib/DAC6_V~1.H ./lib/DAC9_Ia.h ./lib/INSAMP.h ./lib/LCD.h\ ./lib/PSoCAPI.h ./lib/PSOCGP~1.H ./lib/PWM8_H~1.H ./lib/PWM8_N~1.H\ @@ -12,54 +12,54 @@ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.h ./lib/obj/adcinc.o : ./lib/ADCINC.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/adcincint.o : ./lib/ADCINC.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/amux4_0.o : ./lib/AMUX4_0.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/amux4_1.o : ./lib/AMUX4_1.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/dac6_vgnd.o : ./lib/DAC6_V~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/dac9_ia.o : ./lib/DAC9_Ia.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/insamp.o : ./lib/INSAMP.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/lcd.o : ./lib/LCD.inc\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/psocconfig.o : ./lib/GLOBAL~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/psocconfigtbl.o : \ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc ./lib/obj/pwm8_heater.o : ./lib/PWM8_H~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/pwm8_heaterint.o : ./lib/PWM8_H~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/pwm8_nb_out.o : ./lib/PWM8_N~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/pwm8_nb_outint.o : ./lib/PWM8_N~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/pwm8_vout.o : ./lib/PWM8_V~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/pwm8_voutint.o : ./lib/PWM8_V~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/sleeptimer.o : ./lib/SLEEPT~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc ./lib/obj/sleeptimerint.o : ./lib/SLEEPT~1.INC\ C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3/m8c.inc\ - C:\Work\SLC_Free\SL55AE~1\SLC_FR~1\SLC_FR~1\memory.inc + C:\Work\Git\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc diff --git a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk similarity index 94% rename from SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk rename to June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk index 9d7fc78..1418ff3 100644 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk @@ -1,7 +1,7 @@ PROJNAME=SLC_Free_Open_Source DEVICE=CY8C24423B BASEDEVICE=CY8C24000B -PROJPATH=C:/Work/SLC_Free/SL55AE~1/SLC_FR~1/SLC_FR~1 +PROJPATH=C:/Work/Git/SLC_FR~1/SLC_FR~1/SLC_FR~1 PSOCDIR=C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1 INCLUDE_PATH=C:/PROGRA~1/Cypress/PSOCDE~2/5.3/Common/CY3E64~1/tools/include/CY8C24~3 CSRCS= main.c diff --git a/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml new file mode 100644 index 0000000..2eb839f --- /dev/null +++ b/June_16_2014/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml @@ -0,0 +1,3 @@ + + + diff --git a/June_16_2014/SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip b/June_16_2014/SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip new file mode 100644 index 0000000..30cafb4 Binary files /dev/null and b/June_16_2014/SLC_Free_PCB_Gerber_Files/SLC_Free_Oct_28_2013.zip differ diff --git a/LICENSE b/LICENCE.txt similarity index 99% rename from LICENSE rename to LICENCE.txt index ef7e7ef..0080769 100644 --- a/LICENSE +++ b/LICENCE.txt @@ -1,4 +1,4 @@ -GNU GENERAL PUBLIC LICENSE + GNU GENERAL PUBLIC LICENSE Version 3, 29 June 2007 Copyright (C) 2007 Free Software Foundation, Inc. diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/38-12028_CY8C24123A_CY8C24223A_CY8C24423A_PSOC_PRO-769501.pdf b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/38-12028_CY8C24123A_CY8C24223A_CY8C24423A_PSOC_PRO-769501.pdf new file mode 100644 index 0000000..5c59d2b Binary files /dev/null and b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/38-12028_CY8C24123A_CY8C24223A_CY8C24423A_PSOC_PRO-769501.pdf differ diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.Mask.gbs b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.Mask.gbs new file mode 100644 index 0000000..8acea0b --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.Mask.gbs @@ -0,0 +1,257 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Bot* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10O,1.422400X2.743200*% +%ADD11C,1.422400*% +%ADD12C,1.778000*% +%ADD13O,1.778000X3.454400*% +%ADD14C,1.371600*% +%ADD15O,1.625600X3.149600*% +%ADD16R,4.100000X4.100000*% +%ADD17C,4.100000*% +%ADD18C,3.400000*% +G04 APERTURE END LIST* +D10* +G04 #@! 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TO.C,R12* +X152981500Y-122136000D03* +X152981500Y-114516000D03* +G04 #@! TD* +G04 #@! TO.C,R10* +X156105700Y-92926000D03* +X156105700Y-100546000D03* +G04 #@! TD* +G04 #@! TO.C,C6* +X141145100Y-96050200D03* +X141145100Y-98590200D03* +G04 #@! TD* +G04 #@! TO.C,C8* +X153130000Y-93740000D03* +X153130000Y-96280000D03* +G04 #@! TD* +G04 #@! TO.C,C5* +X133347300Y-97498000D03* +X133347300Y-100038000D03* +G04 #@! TD* +D12* +G04 #@! TO.C,D2* +X183690100Y-89852600D03* +X173530100Y-89852600D03* +G04 #@! TD* +G04 #@! TO.C,D3* +X183715500Y-93103800D03* +X173555500Y-93103800D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R8* +X144777300Y-101079400D03* +X144777300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.C,R2* +X128775300Y-121805800D03* +X128775300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.C,R6* +X133702900Y-121805800D03* +X133702900Y-114185800D03* +G04 #@! TD* +G04 #@! TO.C,R7* +X147926900Y-93459400D03* +X147926900Y-101079400D03* +G04 #@! TD* +D13* +G04 #@! TO.C,IC3* +X121180700Y-115125600D03* +X118640700Y-115125600D03* +X116100700Y-115125600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R5* +X137741500Y-114185800D03* +X137741500Y-121805800D03* +G04 #@! TD* +G04 #@! TO.C,R9* +X140332300Y-121805800D03* +X140332300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.C,C7* +X144040700Y-119900800D03* +X144040700Y-117360800D03* +G04 #@! TD* +D13* +G04 #@! TO.C,IC1* +X176654300Y-113957200D03* +X174114300Y-113957200D03* +X171574300Y-113957200D03* +G04 #@! TD* +D11* +G04 #@! TO.C,C2* +X181480300Y-102654200D03* +X184020300Y-102654200D03* +G04 #@! TD* +G04 #@! TO.C,C4* +X187677900Y-116294000D03* +X185137900Y-116294000D03* +G04 #@! TD* +D12* +G04 #@! TO.C,D1* +X182039100Y-105270400D03* +X182039100Y-115430400D03* +G04 #@! TD* +D14* +G04 #@! TO.C,C1* +X184274300Y-98361600D03* +X182242300Y-98361600D03* +G04 #@! TD* +G04 #@! TO.C,C3* +X187347700Y-111061600D03* +X185315700Y-111061600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R3* +X131264500Y-114185800D03* +X131264500Y-121805800D03* +G04 #@! TD* +D15* +G04 #@! TO.C,JP3* +X183817100Y-120586600D03* +X181277100Y-120586600D03* +X178737100Y-120586600D03* +X176197100Y-120586600D03* +X173657100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R11* +X162582700Y-93205400D03* +X162582700Y-100825400D03* +G04 #@! TD* +D15* +G04 #@! TO.C,JP4* +X157578900Y-90309800D03* +X155038900Y-90309800D03* +X152498900Y-90309800D03* +X149958900Y-90309800D03* +X147418900Y-90309800D03* +X144878900Y-90309800D03* +X142338900Y-90309800D03* +X139798900Y-90309800D03* +X137258900Y-90309800D03* +X134718900Y-90309800D03* +X132178900Y-90309800D03* +X129638900Y-90309800D03* +X127098900Y-90309800D03* +X124558900Y-90309800D03* +X122018900Y-90309800D03* +X119478900Y-90309800D03* +G04 #@! TD* +D11* +G04 #@! TO.C,C10* +X150238300Y-117056000D03* +X150238300Y-119596000D03* +G04 #@! TD* +G04 #@! TO.C,C9* +X159356900Y-98514000D03* +X159356900Y-95974000D03* +G04 #@! TD* +G04 #@! TO.C,C11* +X126463900Y-104889400D03* +X129003900Y-104889400D03* +G04 #@! TD* +G04 #@! TO.C,R14* +X129003900Y-102171600D03* +X129003900Y-94551600D03* +G04 #@! TD* +G04 #@! TO.C,R15* +X126565500Y-94551600D03* +X126565500Y-102171600D03* +G04 #@! TD* +G04 #@! TO.C,R16* +X168348500Y-90386000D03* +X160728500Y-90386000D03* +G04 #@! TD* +D15* +G04 #@! TO.C,JP5* +X169593100Y-120586600D03* +X167053100Y-120586600D03* +X164513100Y-120586600D03* +X161973100Y-120586600D03* +X159433100Y-120586600D03* +X156893100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R1* +X188541500Y-108089800D03* +X188541500Y-95389800D03* +G04 #@! TD* +D16* +G04 #@! TO.C,JP1* +X102140000Y-99230000D03* +D17* +X102140000Y-93530000D03* +X107640000Y-99230000D03* +X107640000Y-93530000D03* +D18* +X94840000Y-96380000D03* +G04 #@! TD* +D16* +G04 #@! TO.C,JP2* +X102140000Y-117970000D03* +D17* +X102140000Y-112270000D03* +X102140000Y-106570000D03* +X107640000Y-117970000D03* +X107640000Y-112270000D03* +X107640000Y-106570000D03* +D18* +X94840000Y-117970000D03* +X94840000Y-106570000D03* +G04 #@! TD* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.Paste.gbp b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.Paste.gbp new file mode 100644 index 0000000..2865484 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.Paste.gbp @@ -0,0 +1,15 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Paste,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.SilkS.gbo b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.SilkS.gbo new file mode 100644 index 0000000..141cac3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-B.SilkS.gbo @@ -0,0 +1,15 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Legend,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Bottom.gbl b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Bottom.gbl new file mode 100644 index 0000000..258a9fa --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Bottom.gbl @@ -0,0 +1,5344 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L2,Bot,Signal* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,ComponentPad* +%ADD10O,1.320800X2.641600*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD11C,1.320800*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD12C,1.676400*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD13O,1.676400X3.352800*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD14C,1.270000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD15O,1.524000X3.048000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD16R,3.700000X3.700000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD17C,3.700000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD18C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD19C,0.711200*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD20C,1.006400*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD21C,1.016000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD22C,0.203200*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD23C,0.609600*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD24C,0.304800*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD25C,0.254000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +G04 #@! TO.P,IC2,28* +G04 #@! TO.N,+5V* +X133347300Y-103848000D03* +G04 #@! TO.P,IC2,27* +G04 #@! TO.N,/RT_ADC* +X135887300Y-103848000D03* +G04 #@! TO.P,IC2,26* +G04 #@! TO.N,/P0[4]* +X138427300Y-103848000D03* +G04 #@! TO.P,IC2,25* +G04 #@! TO.N,/AC_TEMP_SENSE_OUT* +X140967300Y-103848000D03* +G04 #@! TO.P,IC2,24* +G04 #@! TO.N,/RE+_ADC* +X143507300Y-103848000D03* +G04 #@! TO.P,IC2,23* +G04 #@! TO.N,/LCD_RW* +X146047300Y-103848000D03* +G04 #@! TO.P,IC2,22* +G04 #@! TO.N,/LCD_E* +X148587300Y-103848000D03* +G04 #@! TO.P,IC2,21* +G04 #@! TO.N,/LCD_DB6* +X151127300Y-103848000D03* +G04 #@! TO.P,IC2,20* +G04 #@! TO.N,/LCD_DB4* +X153667300Y-103848000D03* +G04 #@! TO.P,IC2,19* +G04 #@! TO.N,/XRES* +X156207300Y-103848000D03* +G04 #@! TO.P,IC2,18* +G04 #@! TO.N,/PWM_NB_OUT* +X158747300Y-103848000D03* +G04 #@! TO.P,IC2,17* +G04 #@! TO.N,/PWM_HEATER* +X161287300Y-103848000D03* +G04 #@! TO.P,IC2,16* +G04 #@! TO.N,/CAL* +X163827300Y-103848000D03* +G04 #@! TO.P,IC2,15* +G04 #@! TO.N,/PROG_SDA* +X166367300Y-103848000D03* +G04 #@! TO.P,IC2,14* +G04 #@! TO.N,GND* +X166367300Y-111468000D03* +G04 #@! TO.P,IC2,13* +G04 #@! TO.N,/PROG_SCL* +X163827300Y-111468000D03* +G04 #@! TO.P,IC2,12* +G04 #@! TO.N,/P1[3]* +X161287300Y-111468000D03* +G04 #@! TO.P,IC2,11* +G04 #@! TO.N,/PWM_LIN_OUT* +X158747300Y-111468000D03* +G04 #@! TO.P,IC2,10* +G04 #@! TO.N,/P1[7]* +X156207300Y-111468000D03* +G04 #@! TO.P,IC2,9* +G04 #@! TO.N,Net-(IC2-Pad9)* +X153667300Y-111468000D03* +G04 #@! TO.P,IC2,5* +G04 #@! TO.N,/P2[7]* +X143507300Y-111468000D03* +G04 #@! TO.P,IC2,6* +G04 #@! TO.N,/LCD_RS* +X146047300Y-111468000D03* +G04 #@! TO.P,IC2,4* +G04 #@! TO.N,/INSAMP_VREF* +X140967300Y-111468000D03* +G04 #@! TO.P,IC2,3* +G04 #@! TO.N,/LSU_VGND* +X138427300Y-111468000D03* +G04 #@! TO.P,IC2,8* +G04 #@! TO.N,/LCD_DB5* +X151127300Y-111468000D03* +G04 #@! TO.P,IC2,7* +G04 #@! TO.N,/LCD_DB7* +X148587300Y-111468000D03* +G04 #@! TO.P,IC2,2* +G04 #@! TO.N,/LSU_IA* +X135887300Y-111468000D03* +G04 #@! TO.P,IC2,1* +G04 #@! TO.N,/APE_ADC* +X133347300Y-111468000D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R13,2* +G04 #@! TO.N,Net-(IC3-PadG)* +X124025500Y-118961000D03* +G04 #@! TO.P,R13,1* +G04 #@! TO.N,/PWM_HEATER* +X124025500Y-111341000D03* +G04 #@! TD* +G04 #@! TO.P,R4,2* +G04 #@! TO.N,Net-(C6-Pad2)* +X138300300Y-101079400D03* +G04 #@! TO.P,R4,1* +G04 #@! TO.N,/LSU_NERMEST* +X138300300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.P,R12,2* +G04 #@! TO.N,LIN_OUT* +X152981500Y-122136000D03* +G04 #@! TO.P,R12,1* +G04 #@! TO.N,/PWM_LIN_OUT* +X152981500Y-114516000D03* +G04 #@! TD* +G04 #@! TO.P,R10,2* +G04 #@! TO.N,GND* +X156105700Y-92926000D03* +G04 #@! TO.P,R10,1* +G04 #@! TO.N,/XRES* +X156105700Y-100546000D03* +G04 #@! TD* +G04 #@! TO.P,C6,2* +G04 #@! TO.N,Net-(C6-Pad2)* +X141145100Y-96050200D03* +G04 #@! TO.P,C6,1* +G04 #@! TO.N,/AC_TEMP_SENSE_OUT* +X141145100Y-98590200D03* +G04 #@! TD* +G04 #@! TO.P,C8,2* +G04 #@! TO.N,GND* +X153130000Y-93740000D03* +G04 #@! TO.P,C8,1* +G04 #@! TO.N,/XRES* +X153130000Y-96280000D03* +G04 #@! TD* +G04 #@! TO.P,C5,2* +G04 #@! TO.N,GND* +X133347300Y-97498000D03* +G04 #@! TO.P,C5,1* +G04 #@! TO.N,+5V* +X133347300Y-100038000D03* +G04 #@! TD* +D12* +G04 #@! TO.P,D2,C* +G04 #@! TO.N,Net-(D2-PadC)* +X183690100Y-89852600D03* +G04 #@! TO.P,D2,A* +G04 #@! TO.N,+12V* +X173530100Y-89852600D03* +G04 #@! TD* +G04 #@! TO.P,D3,C* +G04 #@! TO.N,Net-(C1-Pad+)* +X183715500Y-93103800D03* +G04 #@! TO.P,D3,A* +G04 #@! TO.N,GND* +X173555500Y-93103800D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R8,2* +G04 #@! TO.N,/RE+_ADC* +X144777300Y-101079400D03* +G04 #@! TO.P,R8,1* +G04 #@! TO.N,/LSU_NERMEST* +X144777300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.P,R2,2* +G04 #@! TO.N,/LSU_IP* +X128775300Y-121805800D03* +G04 #@! TO.P,R2,1* +G04 #@! TO.N,/APE_ADC* +X128775300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.P,R6,2* +G04 #@! TO.N,/RT_ADC* +X133702900Y-121805800D03* +G04 #@! TO.P,R6,1* +G04 #@! TO.N,/LSU_IA* +X133702900Y-114185800D03* +G04 #@! TD* +G04 #@! TO.P,R7,2* +G04 #@! TO.N,/LSU_NERMEST* +X147926900Y-93459400D03* +G04 #@! TO.P,R7,1* +G04 #@! TO.N,+5V* +X147926900Y-101079400D03* +G04 #@! TD* +D13* +G04 #@! TO.P,IC3,S* +G04 #@! TO.N,/H_GND* +X121180700Y-115125600D03* +G04 #@! TO.P,IC3,D* +G04 #@! TO.N,LSU_HEATER-* +X118640700Y-115125600D03* +G04 #@! TO.P,IC3,G* +G04 #@! TO.N,Net-(IC3-PadG)* +X116100700Y-115125600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R5,2* +G04 #@! TO.N,/INSAMP_VREF* +X137741500Y-114185800D03* +G04 #@! TO.P,R5,1* +G04 #@! TO.N,+5V* +X137741500Y-121805800D03* +G04 #@! TD* +G04 #@! TO.P,R9,2* +G04 #@! TO.N,GND* +X140332300Y-121805800D03* +G04 #@! TO.P,R9,1* +G04 #@! TO.N,/INSAMP_VREF* +X140332300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.P,C7,2* +G04 #@! TO.N,GND* +X144040700Y-119900800D03* +G04 #@! TO.P,C7,1* +G04 #@! TO.N,/INSAMP_VREF* +X144040700Y-117360800D03* +G04 #@! TD* +D13* +G04 #@! TO.P,IC1,3* +G04 #@! TO.N,+5V* +X176654300Y-113957200D03* +G04 #@! TO.P,IC1,2* +G04 #@! TO.N,GND* +X174114300Y-113957200D03* +G04 #@! TO.P,IC1,1* +G04 #@! TO.N,Net-(C1-Pad+)* +X171574300Y-113957200D03* +G04 #@! TD* +D11* +G04 #@! TO.P,C2,2* +G04 #@! TO.N,GND* +X181480300Y-102654200D03* +G04 #@! TO.P,C2,1* +G04 #@! TO.N,Net-(C1-Pad+)* +X184020300Y-102654200D03* +G04 #@! TD* +G04 #@! TO.P,C4,2* +G04 #@! TO.N,GND* +X187677900Y-116294000D03* +G04 #@! TO.P,C4,1* +G04 #@! TO.N,+5V* +X185137900Y-116294000D03* +G04 #@! TD* +D12* +G04 #@! TO.P,D1,C* +G04 #@! TO.N,Net-(C1-Pad+)* +X182039100Y-105270400D03* +G04 #@! TO.P,D1,A* +G04 #@! TO.N,+5V* +X182039100Y-115430400D03* +G04 #@! TD* +D14* +G04 #@! TO.P,C1,+* +G04 #@! TO.N,Net-(C1-Pad+)* +X184274300Y-98361600D03* +G04 #@! TO.P,C1,-* +G04 #@! TO.N,GND* +X182242300Y-98361600D03* +G04 #@! TD* +G04 #@! TO.P,C3,+* +G04 #@! TO.N,+5V* +X187347700Y-111061600D03* +G04 #@! TO.P,C3,-* +G04 #@! TO.N,GND* +X185315700Y-111061600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R3,2* +G04 #@! TO.N,/LSU_IA* +X131264500Y-114185800D03* +G04 #@! TO.P,R3,1* +G04 #@! TO.N,/LSU_IP* +X131264500Y-121805800D03* +G04 #@! TD* +D15* +G04 #@! TO.P,JP3,5* +G04 #@! TO.N,/PROG_SDA* +X183817100Y-120586600D03* +G04 #@! TO.P,JP3,4* +G04 #@! TO.N,/PROG_SCL* +X181277100Y-120586600D03* +G04 #@! TO.P,JP3,3* +G04 #@! TO.N,/XRES* +X178737100Y-120586600D03* +G04 #@! TO.P,JP3,2* +G04 #@! TO.N,GND* +X176197100Y-120586600D03* +G04 #@! TO.P,JP3,1* +G04 #@! TO.N,+5V* +X173657100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R11,2* +G04 #@! TO.N,NB_OUT* +X162582700Y-93205400D03* +G04 #@! TO.P,R11,1* +G04 #@! TO.N,/PWM_NB_OUT* +X162582700Y-100825400D03* +G04 #@! TD* +D15* +G04 #@! TO.P,JP4,16* +G04 #@! TO.N,GND* +X157578900Y-90309800D03* +G04 #@! TO.P,JP4,15* +G04 #@! TO.N,/LCD_ANODE* +X155038900Y-90309800D03* +G04 #@! TO.P,JP4,14* +G04 #@! TO.N,/LCD_DB7* +X152498900Y-90309800D03* +G04 #@! TO.P,JP4,13* +G04 #@! TO.N,/LCD_DB6* +X149958900Y-90309800D03* +G04 #@! TO.P,JP4,12* +G04 #@! TO.N,/LCD_DB5* +X147418900Y-90309800D03* +G04 #@! TO.P,JP4,11* +G04 #@! TO.N,/LCD_DB4* +X144878900Y-90309800D03* +G04 #@! TO.P,JP4,10* +G04 #@! TO.N,Net-(JP4-Pad10)* +X142338900Y-90309800D03* +G04 #@! TO.P,JP4,9* +G04 #@! TO.N,Net-(JP4-Pad9)* +X139798900Y-90309800D03* +G04 #@! TO.P,JP4,8* +G04 #@! TO.N,Net-(JP4-Pad8)* +X137258900Y-90309800D03* +G04 #@! TO.P,JP4,7* +G04 #@! TO.N,Net-(JP4-Pad7)* +X134718900Y-90309800D03* +G04 #@! TO.P,JP4,6* +G04 #@! TO.N,/LCD_E* +X132178900Y-90309800D03* +G04 #@! TO.P,JP4,5* +G04 #@! TO.N,/LCD_RW* +X129638900Y-90309800D03* +G04 #@! TO.P,JP4,4* +G04 #@! TO.N,/LCD_RS* +X127098900Y-90309800D03* +G04 #@! TO.P,JP4,3* +G04 #@! TO.N,/LCD_CONTRAST* +X124558900Y-90309800D03* +G04 #@! TO.P,JP4,2* +G04 #@! TO.N,+5V* +X122018900Y-90309800D03* +G04 #@! TO.P,JP4,1* +G04 #@! TO.N,GND* +X119478900Y-90309800D03* +G04 #@! TD* +D11* +G04 #@! TO.P,C10,2* +G04 #@! TO.N,GND* +X150238300Y-117056000D03* +G04 #@! TO.P,C10,1* +G04 #@! TO.N,LIN_OUT* +X150238300Y-119596000D03* +G04 #@! TD* +G04 #@! TO.P,C9,2* +G04 #@! TO.N,GND* +X159356900Y-98514000D03* +G04 #@! TO.P,C9,1* +G04 #@! TO.N,NB_OUT* +X159356900Y-95974000D03* +G04 #@! TD* +G04 #@! TO.P,C11,2* +G04 #@! TO.N,GND* +X126463900Y-104889400D03* +G04 #@! TO.P,C11,1* +G04 #@! TO.N,+5V* +X129003900Y-104889400D03* +G04 #@! TD* +G04 #@! TO.P,R14,2* +G04 #@! TO.N,+5V* +X129003900Y-102171600D03* +G04 #@! TO.P,R14,1* +G04 #@! TO.N,/LCD_CONTRAST* +X129003900Y-94551600D03* +G04 #@! TD* +G04 #@! TO.P,R15,2* +G04 #@! TO.N,/LCD_CONTRAST* +X126565500Y-94551600D03* +G04 #@! TO.P,R15,1* +G04 #@! TO.N,GND* +X126565500Y-102171600D03* +G04 #@! TD* +G04 #@! TO.P,R16,2* +G04 #@! TO.N,+5V* +X168348500Y-90386000D03* +G04 #@! TO.P,R16,1* +G04 #@! TO.N,/LCD_ANODE* +X160728500Y-90386000D03* +G04 #@! TD* +D15* +G04 #@! TO.P,JP5,6* +G04 #@! TO.N,+5V* +X169593100Y-120586600D03* +G04 #@! TO.P,JP5,5* +G04 #@! TO.N,GND* +X167053100Y-120586600D03* +G04 #@! TO.P,JP5,4* +G04 #@! TO.N,/P2[7]* +X164513100Y-120586600D03* +G04 #@! TO.P,JP5,3* +G04 #@! TO.N,/P1[7]* +X161973100Y-120586600D03* +G04 #@! TO.P,JP5,2* +G04 #@! TO.N,/P1[3]* +X159433100Y-120586600D03* +G04 #@! TO.P,JP5,1* +G04 #@! TO.N,/P0[4]* +X156893100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R1,2* +G04 #@! TO.N,Net-(C1-Pad+)* +X188541500Y-108089800D03* +G04 #@! TO.P,R1,1* +G04 #@! TO.N,Net-(D2-PadC)* +X188541500Y-95389800D03* +G04 #@! TD* +D16* +G04 #@! TO.P,JP1,1* +G04 #@! TO.N,NB_OUT* +X102140000Y-99230000D03* +D17* +G04 #@! TO.P,JP1,2* +G04 #@! TO.N,LIN_OUT* +X102140000Y-93530000D03* +G04 #@! TO.P,JP1,3* +G04 #@! TO.N,GND* +X107640000Y-99230000D03* +G04 #@! TO.P,JP1,4* +G04 #@! TO.N,+12V* +X107640000Y-93530000D03* +G04 #@! TD* +D16* +G04 #@! TO.P,JP2,1* +G04 #@! TO.N,+12V* +X102140000Y-117970000D03* +D17* +G04 #@! TO.P,JP2,2* +G04 #@! TO.N,LSU_HEATER-* +X102140000Y-112270000D03* +G04 #@! TO.P,JP2,3* +G04 #@! TO.N,/LSU_IA* +X102140000Y-106570000D03* +G04 #@! TO.P,JP2,4* +G04 #@! TO.N,/LSU_IP* +X107640000Y-117970000D03* +G04 #@! TO.P,JP2,5* +G04 #@! TO.N,/LSU_NERMEST* +X107640000Y-112270000D03* +G04 #@! TO.P,JP2,6* +G04 #@! TO.N,/LSU_VGND* +X107640000Y-106570000D03* +G04 #@! TD* +D18* +G04 #@! TO.N,GND* +X135750000Y-121210000D03* +X135750000Y-116590000D03* +X142220000Y-107750000D03* +X142200000Y-119850000D03* +X151330000Y-107880000D03* +X147820000Y-120240000D03* +D19* +G04 #@! TO.N,+5V* +X147926900Y-97244000D03* +X129003900Y-100038000D03* +X127784700Y-93357800D03* +X136852500Y-100038000D03* +X167535700Y-97244000D03* +G04 #@! TO.N,/P0[4]* +X138427300Y-109080400D03* +X157223300Y-109283600D03* +G04 #@! TO.N,/LCD_RW* +X146047300Y-97574200D03* +X130731100Y-98514000D03* +D18* +X136610000Y-97574200D03* +D19* +G04 #@! TO.N,/LCD_E* +X148942900Y-96532800D03* +X131442300Y-96278800D03* +G04 #@! TO.N,/LCD_DB4* +X143913700Y-99377600D03* +X153667300Y-100063400D03* +G04 #@! TO.N,/XRES* +X155191300Y-118783200D03* +G04 #@! TO.N,/PWM_NB_OUT* +X158747300Y-100825400D03* +G04 #@! TO.N,/PWM_HEATER* +X126159100Y-111341000D03* +X126209900Y-119062600D03* +X138046300Y-116344800D03* +X160271300Y-118072000D03* +X138046300Y-117564000D03* +G04 #@! TO.N,/PROG_SDA* +X165732300Y-117487800D03* +G04 #@! TO.N,/PROG_SCL* +X163801900Y-117995800D03* +G04 #@! TO.N,/P1[3]* +X159560100Y-117360800D03* +X160982500Y-117360800D03* +G04 #@! TO.N,/PWM_LIN_OUT* +X158747300Y-114516000D03* +G04 #@! TO.N,/P1[7]* +X161973100Y-116649600D03* +X156181900Y-116649600D03* +G04 #@! TO.N,/P2[7]* +X164513100Y-115938400D03* +X143507300Y-115633600D03* +G04 #@! TO.N,/LCD_RS* +X130019900Y-109791600D03* +G04 #@! TO.N,/INSAMP_VREF* +X140332300Y-117360800D03* +G04 #@! TO.N,/LSU_VGND* +X138605100Y-118961000D03* +G04 #@! TO.N,/LCD_DB5* +X147063300Y-113169800D03* +G04 #@! TO.N,/LCD_DB7* +X149654100Y-94246800D03* +G04 #@! TO.N,/LSU_IA* +X135887300Y-114185800D03* +X131289900Y-120383400D03* +G04 #@! TO.N,/APE_ADC* +X128775300Y-111468000D03* +G04 #@! TO.N,Net-(C6-Pad2)* +X138300300Y-96050200D03* +G04 #@! TO.N,/LSU_NERMEST* +X139316300Y-119672200D03* +D20* +G04 #@! TO.N,Net-(C1-Pad+)* +X180489700Y-116344800D03* +X188566900Y-102654200D03* +D19* +G04 #@! TO.N,LIN_OUT* +X152981500Y-119596000D03* +X125447900Y-99885600D03* +X125447900Y-119570600D03* +G04 #@! TO.N,NB_OUT* +X159356900Y-93205400D03* +X124736700Y-102425600D03* +X125498700Y-95567600D03* +D18* +X107670000Y-103425600D03* +X114310000Y-103425600D03* +G04 #@! TD* +D21* +G04 #@! TO.N,+12V* +X107640000Y-93530000D02* +X114994300Y-93530000D01* +X116964300Y-89080300D02* +X117970000Y-88074600D01* +X114994300Y-93530000D02* +X116964300Y-91560000D01* +X116964300Y-91560000D02* +X116964300Y-89080300D01* +X117970000Y-88074600D02* +X172387100Y-88074600D01* +X173530100Y-89217600D02* +X173530100Y-89852600D01* +X172387100Y-88074600D02* +X173530100Y-89217600D01* +X98090000Y-116786000D02* +X98090000Y-91720000D01* +X103700000Y-89590000D02* +X107640000Y-93530000D01* +X100220000Y-89590000D02* +X103700000Y-89590000D01* +X98090000Y-91720000D02* +X100220000Y-89590000D01* +X99274000Y-117970000D02* +X98090000Y-116786000D01* +X102140000Y-117970000D02* +X99274000Y-117970000D01* +D22* +G04 #@! TO.N,+5V* +X136852500Y-100038000D02* +X146885500Y-100038000D01* +X146885500Y-100038000D02* +X147926900Y-101079400D01* +X129003900Y-100038000D02* +X133347300Y-100038000D01* +D23* +X122018900Y-93357800D02* +X127784700Y-93357800D01* +X122018900Y-93357800D02* +X122018900Y-90309800D01* +D21* +X176654300Y-113957200D02* +X176730500Y-113881000D01* +X176730500Y-113881000D02* +X180489700Y-113881000D01* +X180489700Y-113881000D02* +X182039100Y-115430400D01* +X182039100Y-115430400D02* +X184274300Y-115430400D01* +X184274300Y-115430400D02* +X185137900Y-116294000D01* +X169593100Y-120586600D02* +X173657100Y-120586600D01* +D24* +X167339700Y-97440000D02* +X167535700Y-97244000D01* +X147926900Y-97244000D02* +X148429794Y-97244000D01* +X148429794Y-97244000D02* +X148625794Y-97440000D01* +X148625794Y-97440000D02* +X167339700Y-97440000D01* +G04 #@! TO.N,/P0[4]* +X138427300Y-109080400D02* +X138630500Y-109283600D01* +X138630500Y-109283600D02* +X157223300Y-109283600D01* +G04 #@! TO.N,/LCD_RW* +X136610000Y-97574200D02* +X146047300Y-97574200D01* +G04 #@! TO.N,/LCD_E* +X148942900Y-96532800D02* +X142110300Y-96532800D01* +X142110300Y-96532800D02* +X141576900Y-97066200D01* +X141576900Y-97066200D02* +X140713300Y-97066200D01* +X140713300Y-97066200D02* +X140408500Y-96761400D01* +X140408500Y-96761400D02* +X137995500Y-96761400D01* +X137995500Y-96761400D02* +X137309700Y-96075600D01* +X137309700Y-96075600D02* +X131645500Y-96075600D01* +X131645500Y-96075600D02* +X131442300Y-96278800D01* +G04 #@! TO.N,/LCD_DB4* +X147088700Y-99580800D02* +X147571300Y-100063400D01* +X147571300Y-100063400D02* +X153667300Y-100063400D01* +X147088700Y-99580800D02* +X144116900Y-99580800D01* +X144116900Y-99580800D02* +X143913700Y-99377600D01* +G04 #@! TO.N,/XRES* +X178737100Y-120586600D02* +X178737100Y-118707000D01* +X178737100Y-118707000D02* +X160601500Y-118707000D01* +X160601500Y-118707000D02* +X160525300Y-118783200D01* +X160525300Y-118783200D02* +X159966500Y-118783200D01* +X159966500Y-118783200D02* +X159763300Y-118580000D01* +X159763300Y-118580000D02* +X155394500Y-118580000D01* +X155394500Y-118580000D02* +X155191300Y-118783200D01* +G04 #@! TO.N,/PWM_NB_OUT* +X158747300Y-100825400D02* +X162582700Y-100825400D01* +G04 #@! TO.N,/PWM_HEATER* +X124025500Y-111341000D02* +X126159100Y-111341000D01* +X126209900Y-119062600D02* +X127124300Y-119062600D01* +X127124300Y-119062600D02* +X127835500Y-118351400D01* +X127835500Y-118351400D02* +X130096100Y-118351400D01* +X130096100Y-118351400D02* +X130299300Y-118148200D01* +X130299300Y-118148200D02* +X137462100Y-118148200D01* +X138046300Y-116344800D02* +X144472500Y-116344800D01* +X144472500Y-116344800D02* +X145996500Y-117868800D01* +X145996500Y-117868800D02* +X149603300Y-117868800D01* +X149603300Y-117868800D02* +X149806500Y-118072000D01* +X149806500Y-118072000D02* +X160271300Y-118072000D01* +X137462100Y-118148200D02* +X138046300Y-117564000D01* +G04 #@! TO.N,/PROG_SDA* +X183817100Y-120586600D02* +X183817100Y-117691000D01* +X183817100Y-117691000D02* +X165935500Y-117691000D01* +X165935500Y-117691000D02* +X165732300Y-117487800D01* +G04 #@! TO.N,/PROG_SCL* +X181277100Y-120586600D02* +X181277100Y-118199000D01* +X163801900Y-117995800D02* +X164005100Y-118199000D01* +X164005100Y-118199000D02* +X181277100Y-118199000D01* +G04 #@! TO.N,/P1[3]* +X159560100Y-117360800D02* +X160982500Y-117360800D01* +G04 #@! TO.N,/PWM_LIN_OUT* +X158747300Y-114516000D02* +X152981500Y-114516000D01* +G04 #@! TO.N,/P1[7]* +X161973100Y-116649600D02* +X156181900Y-116649600D01* +G04 #@! TO.N,/P2[7]* +X164513100Y-115938400D02* +X144802700Y-115938400D01* +X144802700Y-115938400D02* +X144497900Y-115633600D01* +X144497900Y-115633600D02* +X143507300Y-115633600D01* +G04 #@! TO.N,/LCD_RS* +X146047300Y-111468000D02* +X146047300Y-109791600D01* +X146047300Y-109791600D02* +X130019900Y-109791600D01* +G04 #@! TO.N,/INSAMP_VREF* +X137741500Y-114185800D02* +X140332300Y-114185800D01* +X144040700Y-117360800D02* +X140332300Y-117360800D01* +G04 #@! TO.N,/LSU_VGND* +X118132700Y-120281800D02* +X127378300Y-120281800D01* +X127378300Y-120281800D02* +X128292700Y-119367400D01* +X128292700Y-119367400D02* +X130553300Y-119367400D01* +X130553300Y-119367400D02* +X130756500Y-119164200D01* +X130756500Y-119164200D02* +X138401900Y-119164200D01* +X138401900Y-119164200D02* +X138605100Y-118961000D01* +X118132700Y-120281800D02* +X118132700Y-119469000D01* +X118132700Y-119469000D02* +X115795900Y-117132200D01* +X115795900Y-117132200D02* +X113154300Y-117132200D01* +X113154300Y-117132200D02* +X112722500Y-116700400D01* +X112722500Y-111652500D02* +X107640000Y-106570000D01* +X112722500Y-116700400D02* +X112722500Y-111652500D01* +G04 #@! TO.N,/LCD_DB5* +X147063300Y-113169800D02* +X151127300Y-113169800D01* +X151127300Y-113169800D02* +X151127300Y-111468000D01* +G04 #@! TO.N,/LCD_DB7* +X152498900Y-91071800D02* +X149654100Y-93916600D01* +X149654100Y-93916600D02* +X149654100Y-94246800D01* +X152498900Y-90309800D02* +X152498900Y-91071800D01* +G04 #@! TO.N,/LSU_IA* +X133702900Y-114185800D02* +X131264500Y-114185800D01* +X135887300Y-114185800D02* +X133702900Y-114185800D01* +X117116700Y-121297800D02* +X127835500Y-121297800D01* +X127835500Y-121297800D02* +X128749900Y-120383400D01* +X128749900Y-120383400D02* +X131289900Y-120383400D01* +X115338700Y-118148200D02* +X117116700Y-119926200D01* +X117116700Y-121297800D02* +X117116700Y-119926200D01* +X102140000Y-106570000D02* +X104820000Y-109250000D01* +X104820000Y-109250000D02* +X104820000Y-113990000D01* +X104820000Y-113990000D02* +X105890000Y-115060000D01* +X105890000Y-115060000D02* +X109270000Y-115060000D01* +X112358200Y-118148200D02* +X115338700Y-118148200D01* +X109270000Y-115060000D02* +X112358200Y-118148200D01* +G04 #@! TO.N,/APE_ADC* +X128775300Y-111468000D02* +X133347300Y-111468000D01* +G04 #@! TO.N,Net-(IC3-PadG)* +X116100700Y-114998600D02* +X116100700Y-115125600D01* +X118361300Y-118961000D02* +X116100700Y-116700400D01* +X116100700Y-116700400D02* +X116100700Y-115125600D01* +X118361300Y-118961000D02* +X124025500Y-118961000D01* +G04 #@! TO.N,Net-(C6-Pad2)* +X138300300Y-96050200D02* +X141145100Y-96050200D01* +G04 #@! TO.N,/LSU_NERMEST* +X147926900Y-93459400D02* +X144777300Y-93459400D01* +X144777300Y-93459400D02* +X138300300Y-93459400D01* +X130985100Y-119672200D02* +X139316300Y-119672200D01* +X128521300Y-119875400D02* +X130781900Y-119875400D01* +X127606900Y-120789800D02* +X128521300Y-119875400D01* +X117624700Y-120789800D02* +X127606900Y-120789800D01* +X107640000Y-112270000D02* +X109489999Y-114119999D01* +X109489999Y-114566090D02* +X112560919Y-117637010D01* +X130781900Y-119875400D02* +X130985100Y-119672200D01* +X109489999Y-114119999D02* +X109489999Y-114566090D01* +X112560919Y-117637010D02* +X115564110Y-117637010D01* +X115564110Y-117637010D02* +X117624700Y-119697600D01* +X117624700Y-119697600D02* +X117624700Y-120789800D01* +D21* +G04 #@! TO.N,Net-(D2-PadC)* +X183690100Y-89852600D02* +X188541500Y-94704000D01* +X188541500Y-94704000D02* +X188541500Y-95389800D01* +G04 #@! TO.N,Net-(C1-Pad+)* +X171574300Y-113957200D02* +X171574300Y-116344800D01* +X171574300Y-116344800D02* +X180489700Y-116344800D01* +X188541500Y-108089800D02* +X188566900Y-102654200D01* +D24* +G04 #@! TO.N,/LSU_IP* +X131264500Y-121805800D02* +X128775300Y-121805800D01* +X116608700Y-121805800D02* +X128775300Y-121805800D01* +X116608700Y-121805800D02* +X116608700Y-120154800D01* +X116608700Y-120154800D02* +X115110100Y-118656200D01* +X112927354Y-118656200D02* +X112927354Y-118656200D01* +X107640000Y-117970000D02* +X110256295Y-117970000D01* +X110256295Y-117970000D02* +X110942495Y-118656200D01* +X115110100Y-118656200D02* +X113410000Y-118656200D01* +X110942495Y-118656200D02* +X113410000Y-118656200D01* +X113410000Y-118656200D02* +X112927354Y-118656200D01* +G04 #@! TO.N,/LCD_CONTRAST* +X126565500Y-94551600D02* +X129003900Y-94551600D01* +G04 #@! TO.N,LIN_OUT* +X152981500Y-119596000D02* +X150238300Y-119596000D01* +X125447900Y-119570600D02* +X125651100Y-119773800D01* +X125651100Y-119773800D02* +X127149700Y-119773800D01* +X127149700Y-119773800D02* +X128064100Y-118859400D01* +X128064100Y-118859400D02* +X130324700Y-118859400D01* +X130324700Y-118859400D02* +X130527900Y-118656200D01* +X130527900Y-118656200D02* +X137893900Y-118656200D01* +X137893900Y-118656200D02* +X138300300Y-118249800D01* +X138300300Y-118249800D02* +X143481900Y-118249800D01* +X143481900Y-118249800D02* +X143608900Y-118376800D01* +X143608900Y-118376800D02* +X149019100Y-118376800D01* +X149019100Y-118376800D02* +X150238300Y-119596000D01* +X105670000Y-96280000D02* +X108804400Y-96280000D01* +X108804400Y-96280000D02* +X112410000Y-99885600D01* +X112410000Y-99885600D02* +X125447900Y-99885600D01* +X104890000Y-96280000D02* +X108804400Y-96280000D01* +X102140000Y-93530000D02* +X104890000Y-96280000D01* +G04 #@! TO.N,NB_OUT* +X159356900Y-93205400D02* +X162582700Y-93205400D01* +X102140000Y-99230000D02* +X102720000Y-99230000D01* +X108235685Y-103425600D02* +X114310000Y-103425600D01* +X107670000Y-103425600D02* +X108235685Y-103425600D01* +X138300300Y-95034200D02* +X153490000Y-95034200D01* +X125498700Y-95567600D02* +X137766900Y-95567600D01* +X137766900Y-95567600D02* +X138300300Y-95034200D01* +X153490000Y-95034200D02* +X158417100Y-95034200D01* +X158417100Y-95034200D02* +X159356900Y-95974000D01* +G04 #@! TD* +D25* +G04 #@! TO.N,GND* +G36* +X190119134Y-87128923D02* +X190353939Y-87248562D01* +X190540285Y-87434908D01* +X190659924Y-87669713D01* +X190710011Y-87985949D01* +X190710282Y-88911415D01* +X190213926Y-88415059D01* +X189392469Y-88074800D01* +X188503331Y-88074800D01* +X187681874Y-88415059D01* +X187053159Y-89043774D01* +X186712900Y-89865231D01* +X186712900Y-90754369D01* +X187053159Y-91575826D01* +X187681874Y-92204541D01* +X188503331Y-92544800D01* +X189392469Y-92544800D01* +X190213926Y-92204541D01* +X190711102Y-91707365D01* +X190719345Y-119832278D01* +X190213926Y-119326859D01* +X189392469Y-118986600D01* +X188503331Y-118986600D01* +X187681874Y-119326859D01* +X187053159Y-119955574D01* +X186712900Y-120777031D01* +X186712900Y-121666169D01* +X187053159Y-122487626D01* +X187485533Y-122920000D01* +X154029472Y-122920000D01* +X154079687Y-122869785D01* +X154276900Y-122393671D01* +X154276900Y-121878329D01* +X154079687Y-121402215D01* +X153715285Y-121037813D01* +X153239171Y-120840600D01* +X152723829Y-120840600D01* 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TD* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Edge.Cuts.gm1 b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Edge.Cuts.gm1 new file mode 100644 index 0000000..910613a --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Edge.Cuts.gm1 @@ -0,0 +1,52 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Profile,NP* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10C,0.150000*% +G04 APERTURE END LIST* +D10* +X189860000Y-123630000D02* +X112230000Y-123630000D01* +X110680000Y-122070000D02* +X90299939Y-122070000D01* +X90301153Y-122071153D02* +G75* +G02X88740000Y-120510000I0J1561153D01* +G01* +X88740000Y-89490000D02* +X88740000Y-120540779D01* +X88738847Y-89501153D02* +G75* +G02X90300000Y-87940000I1561153J0D01* +G01* +X110570000Y-87940000D02* +X90260000Y-87940000D01* +X110670000Y-122070000D02* +G75* +G02X112231153Y-123631153I0J-1561153D01* +G01* +X189860000Y-86370000D02* +X112119998Y-86370000D01* +X191430000Y-122070000D02* +X191420000Y-87950000D01* +X189858847Y-86368847D02* +G75* +G02X191420000Y-87930000I0J-1561153D01* +G01* +X191431153Y-122070000D02* +G75* +G02X189870000Y-123631153I-1561153J0D01* +G01* +X112121153Y-86378847D02* +G75* +G02X110560000Y-87940000I-1561153J0D01* +G01* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.Mask.gts b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.Mask.gts new file mode 100644 index 0000000..0e6a8e2 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.Mask.gts @@ -0,0 +1,257 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Top* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10O,1.422400X2.743200*% +%ADD11C,1.422400*% +%ADD12C,1.778000*% +%ADD13O,1.778000X3.454400*% +%ADD14C,1.371600*% +%ADD15O,1.625600X3.149600*% +%ADD16R,4.100000X4.100000*% +%ADD17C,4.100000*% +%ADD18C,3.400000*% +G04 APERTURE END LIST* +D10* +G04 #@! TO.C,IC2* +X133347300Y-103848000D03* +X135887300Y-103848000D03* +X138427300Y-103848000D03* +X140967300Y-103848000D03* +X143507300Y-103848000D03* +X146047300Y-103848000D03* +X148587300Y-103848000D03* +X151127300Y-103848000D03* +X153667300Y-103848000D03* +X156207300Y-103848000D03* +X158747300Y-103848000D03* +X161287300Y-103848000D03* +X163827300Y-103848000D03* +X166367300Y-103848000D03* +X166367300Y-111468000D03* +X163827300Y-111468000D03* +X161287300Y-111468000D03* +X158747300Y-111468000D03* +X156207300Y-111468000D03* +X153667300Y-111468000D03* +X143507300Y-111468000D03* +X146047300Y-111468000D03* +X140967300Y-111468000D03* +X138427300Y-111468000D03* +X151127300Y-111468000D03* +X148587300Y-111468000D03* +X135887300Y-111468000D03* +X133347300Y-111468000D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R13* +X124025500Y-118961000D03* +X124025500Y-111341000D03* +G04 #@! TD* +G04 #@! TO.C,R4* +X138300300Y-101079400D03* +X138300300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.C,R12* +X152981500Y-122136000D03* +X152981500Y-114516000D03* +G04 #@! TD* +G04 #@! TO.C,R10* +X156105700Y-92926000D03* +X156105700Y-100546000D03* +G04 #@! TD* +G04 #@! TO.C,C6* +X141145100Y-96050200D03* +X141145100Y-98590200D03* +G04 #@! TD* +G04 #@! TO.C,C8* +X153130000Y-93740000D03* +X153130000Y-96280000D03* +G04 #@! TD* +G04 #@! TO.C,C5* +X133347300Y-97498000D03* +X133347300Y-100038000D03* +G04 #@! TD* +D12* +G04 #@! TO.C,D2* +X183690100Y-89852600D03* +X173530100Y-89852600D03* +G04 #@! TD* +G04 #@! TO.C,D3* +X183715500Y-93103800D03* +X173555500Y-93103800D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R8* +X144777300Y-101079400D03* +X144777300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.C,R2* +X128775300Y-121805800D03* +X128775300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.C,R6* +X133702900Y-121805800D03* +X133702900Y-114185800D03* +G04 #@! TD* +G04 #@! TO.C,R7* +X147926900Y-93459400D03* +X147926900Y-101079400D03* +G04 #@! TD* +D13* +G04 #@! TO.C,IC3* +X121180700Y-115125600D03* +X118640700Y-115125600D03* +X116100700Y-115125600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R5* +X137741500Y-114185800D03* +X137741500Y-121805800D03* +G04 #@! TD* +G04 #@! TO.C,R9* +X140332300Y-121805800D03* +X140332300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.C,C7* +X144040700Y-119900800D03* +X144040700Y-117360800D03* +G04 #@! TD* +D13* +G04 #@! TO.C,IC1* +X176654300Y-113957200D03* +X174114300Y-113957200D03* +X171574300Y-113957200D03* +G04 #@! TD* +D11* +G04 #@! TO.C,C2* +X181480300Y-102654200D03* +X184020300Y-102654200D03* +G04 #@! TD* +G04 #@! TO.C,C4* +X187677900Y-116294000D03* +X185137900Y-116294000D03* +G04 #@! TD* +D12* +G04 #@! TO.C,D1* +X182039100Y-105270400D03* +X182039100Y-115430400D03* +G04 #@! TD* +D14* +G04 #@! TO.C,C1* +X184274300Y-98361600D03* +X182242300Y-98361600D03* +G04 #@! TD* +G04 #@! TO.C,C3* +X187347700Y-111061600D03* +X185315700Y-111061600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R3* +X131264500Y-114185800D03* +X131264500Y-121805800D03* +G04 #@! TD* +D15* +G04 #@! TO.C,JP3* +X183817100Y-120586600D03* +X181277100Y-120586600D03* +X178737100Y-120586600D03* +X176197100Y-120586600D03* +X173657100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R11* +X162582700Y-93205400D03* +X162582700Y-100825400D03* +G04 #@! TD* +D15* +G04 #@! TO.C,JP4* +X157578900Y-90309800D03* +X155038900Y-90309800D03* +X152498900Y-90309800D03* +X149958900Y-90309800D03* +X147418900Y-90309800D03* +X144878900Y-90309800D03* +X142338900Y-90309800D03* +X139798900Y-90309800D03* +X137258900Y-90309800D03* +X134718900Y-90309800D03* +X132178900Y-90309800D03* +X129638900Y-90309800D03* +X127098900Y-90309800D03* +X124558900Y-90309800D03* +X122018900Y-90309800D03* +X119478900Y-90309800D03* +G04 #@! TD* +D11* +G04 #@! TO.C,C10* +X150238300Y-117056000D03* +X150238300Y-119596000D03* +G04 #@! TD* +G04 #@! TO.C,C9* +X159356900Y-98514000D03* +X159356900Y-95974000D03* +G04 #@! TD* +G04 #@! TO.C,C11* +X126463900Y-104889400D03* +X129003900Y-104889400D03* +G04 #@! TD* +G04 #@! TO.C,R14* +X129003900Y-102171600D03* +X129003900Y-94551600D03* +G04 #@! TD* +G04 #@! TO.C,R15* +X126565500Y-94551600D03* +X126565500Y-102171600D03* +G04 #@! TD* +G04 #@! TO.C,R16* +X168348500Y-90386000D03* +X160728500Y-90386000D03* +G04 #@! TD* +D15* +G04 #@! TO.C,JP5* +X169593100Y-120586600D03* +X167053100Y-120586600D03* +X164513100Y-120586600D03* +X161973100Y-120586600D03* +X159433100Y-120586600D03* +X156893100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.C,R1* +X188541500Y-108089800D03* +X188541500Y-95389800D03* +G04 #@! TD* +D16* +G04 #@! TO.C,JP1* +X102140000Y-99230000D03* +D17* +X102140000Y-93530000D03* +X107640000Y-99230000D03* +X107640000Y-93530000D03* +D18* +X94840000Y-96380000D03* +G04 #@! TD* +D16* +G04 #@! TO.C,JP2* +X102140000Y-117970000D03* +D17* +X102140000Y-112270000D03* +X102140000Y-106570000D03* +X107640000Y-117970000D03* +X107640000Y-112270000D03* +X107640000Y-106570000D03* +D18* +X94840000Y-117970000D03* +X94840000Y-106570000D03* +G04 #@! TD* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.Paste.gtp b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.Paste.gtp new file mode 100644 index 0000000..1d6d3f0 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.Paste.gtp @@ -0,0 +1,15 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Paste,Top* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.SilkS.gto b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.SilkS.gto new file mode 100644 index 0000000..097546f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-F.SilkS.gto @@ -0,0 +1,4416 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Legend,Top* +G04 #@! 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TO.C,R4* +G36* +X138046300Y-94348400D02* +X138046300Y-94729400D01* +X138554300Y-94729400D01* +X138554300Y-94348400D01* +X138046300Y-94348400D01* +G37* +G36* +X138046300Y-99809400D02* +X138046300Y-100190400D01* +X138554300Y-100190400D01* +X138554300Y-99809400D01* +X138046300Y-99809400D01* +G37* +D15* +X137538300Y-99809400D02* +X139062300Y-99809400D01* +X137284300Y-99555400D02* +X137284300Y-99174400D01* +X139316300Y-99555400D02* +X139316300Y-99174400D01* +X137411300Y-99047400D02* +X137411300Y-95491400D01* +X137411300Y-99047400D02* +X137284300Y-99174400D01* +X139189300Y-99047400D02* +X139189300Y-95491400D01* +X139189300Y-99047400D02* +X139316300Y-99174400D01* +X137411300Y-95491400D02* +X137284300Y-95364400D01* +X137284300Y-94983400D02* +X137284300Y-95364400D01* +X139189300Y-95491400D02* +X139316300Y-95364400D01* +X139316300Y-94983400D02* +X139316300Y-95364400D01* +X137538300Y-94729400D02* +X139062300Y-94729400D01* +X139062300Y-99809400D02* +G75* +G03X139316300Y-99555400I0J254000D01* +G01* +X137538300Y-99809400D02* +G75* +G02X137284300Y-99555400I0J254000D01* +G01* +X137284300Y-94983400D02* +G75* +G02X137538300Y-94729400I254000J0D01* +G01* +X139316300Y-94983400D02* +G75* +G03X139062300Y-94729400I-254000J0D01* +G01* +D16* +G04 #@! TO.C,R12* +G36* +X152727500Y-115405000D02* +X152727500Y-115786000D01* +X153235500Y-115786000D01* +X153235500Y-115405000D01* +X152727500Y-115405000D01* +G37* +G36* +X152727500Y-120866000D02* +X152727500Y-121247000D01* +X153235500Y-121247000D01* +X153235500Y-120866000D01* +X152727500Y-120866000D01* +G37* +D15* +X152219500Y-120866000D02* +X153743500Y-120866000D01* +X151965500Y-120612000D02* +X151965500Y-120231000D01* +X153997500Y-120612000D02* +X153997500Y-120231000D01* +X152092500Y-120104000D02* +X152092500Y-116548000D01* +X152092500Y-120104000D02* +X151965500Y-120231000D01* +X153870500Y-120104000D02* +X153870500Y-116548000D01* +X153870500Y-120104000D02* +X153997500Y-120231000D01* +X152092500Y-116548000D02* +X151965500Y-116421000D01* +X151965500Y-116040000D02* +X151965500Y-116421000D01* +X153870500Y-116548000D02* +X153997500Y-116421000D01* +X153997500Y-116040000D02* +X153997500Y-116421000D01* +X152219500Y-115786000D02* +X153743500Y-115786000D01* +X153743500Y-120866000D02* +G75* +G03X153997500Y-120612000I0J254000D01* +G01* +X152219500Y-120866000D02* +G75* +G02X151965500Y-120612000I0J254000D01* +G01* +X151965500Y-116040000D02* +G75* +G02X152219500Y-115786000I254000J0D01* +G01* +X153997500Y-116040000D02* +G75* +G03X153743500Y-115786000I-254000J0D01* +G01* +D16* +G04 #@! TO.C,R10* +G36* +X156359700Y-99657000D02* +X156359700Y-99276000D01* +X155851700Y-99276000D01* +X155851700Y-99657000D01* +X156359700Y-99657000D01* +G37* +G36* +X156359700Y-94196000D02* +X156359700Y-93815000D01* +X155851700Y-93815000D01* +X155851700Y-94196000D01* +X156359700Y-94196000D01* +G37* +D15* +X156867700Y-94196000D02* +X155343700Y-94196000D01* +X157121700Y-94450000D02* +X157121700Y-94831000D01* +X155089700Y-94450000D02* +X155089700Y-94831000D01* +X156994700Y-94958000D02* +X156994700Y-98514000D01* +X156994700Y-94958000D02* +X157121700Y-94831000D01* +X155216700Y-94958000D02* +X155216700Y-98514000D01* +X155216700Y-94958000D02* +X155089700Y-94831000D01* +X156994700Y-98514000D02* +X157121700Y-98641000D01* +X157121700Y-99022000D02* +X157121700Y-98641000D01* +X155216700Y-98514000D02* +X155089700Y-98641000D01* +X155089700Y-99022000D02* +X155089700Y-98641000D01* +X156867700Y-99276000D02* +X155343700Y-99276000D01* +X155343700Y-94196000D02* +G75* +G03X155089700Y-94450000I0J-254000D01* +G01* +X156867700Y-94196000D02* +G75* +G02X157121700Y-94450000I0J-254000D01* +G01* +X157121700Y-99022000D02* +G75* +G02X156867700Y-99276000I-254000J0D01* +G01* +X155089700Y-99022000D02* +G75* +G03X155343700Y-99276000I254000J0D01* +G01* +G04 #@! TO.C,C6* +X141145100Y-97574200D02* +X141145100Y-97701200D01* +D17* +X141145100Y-97574200D02* +X141907100Y-97574200D01* +X140383100Y-97574200D02* +X141145100Y-97574200D01* +X141145100Y-97066200D02* +X141907100Y-97066200D01* +X141145100Y-97066200D02* +X140383100Y-97066200D01* +D15* +X141145100Y-96939200D02* +X141145100Y-97066200D01* +X142415100Y-99479200D02* +G75* +G02X142161100Y-99733200I-254000J0D01* +G01* +X142161100Y-94907200D02* +G75* +G02X142415100Y-95161200I0J-254000D01* +G01* +X139875100Y-99479200D02* +G75* +G03X140129100Y-99733200I254000J0D01* +G01* +X140129100Y-94907200D02* +G75* +G03X139875100Y-95161200I0J-254000D01* +G01* +X140129100Y-99733200D02* +X142161100Y-99733200D01* +X140129100Y-94907200D02* +X142161100Y-94907200D01* +X142415100Y-95161200D02* +X142415100Y-99479200D01* +X139875100Y-99479200D02* +X139875100Y-95161200D01* +G04 #@! TO.C,C8* +X153130000Y-95264000D02* +X153130000Y-95391000D01* +D17* +X153130000Y-95264000D02* +X153892000Y-95264000D01* +X152368000Y-95264000D02* +X153130000Y-95264000D01* +X153130000Y-94756000D02* +X153892000Y-94756000D01* +X153130000Y-94756000D02* +X152368000Y-94756000D01* +D15* +X153130000Y-94629000D02* +X153130000Y-94756000D01* +X154400000Y-97169000D02* +G75* +G02X154146000Y-97423000I-254000J0D01* +G01* +X154146000Y-92597000D02* +G75* +G02X154400000Y-92851000I0J-254000D01* +G01* +X151860000Y-97169000D02* +G75* +G03X152114000Y-97423000I254000J0D01* +G01* +X152114000Y-92597000D02* +G75* +G03X151860000Y-92851000I0J-254000D01* +G01* +X152114000Y-97423000D02* +X154146000Y-97423000D01* +X152114000Y-92597000D02* +X154146000Y-92597000D01* +X154400000Y-92851000D02* +X154400000Y-97169000D01* +X151860000Y-97169000D02* +X151860000Y-92851000D01* +G04 #@! TO.C,C5* +X133347300Y-99022000D02* +X133347300Y-99149000D01* +D17* +X133347300Y-99022000D02* +X134109300Y-99022000D01* +X132585300Y-99022000D02* +X133347300Y-99022000D01* +X133347300Y-98514000D02* +X134109300Y-98514000D01* +X133347300Y-98514000D02* +X132585300Y-98514000D01* +D15* +X133347300Y-98387000D02* +X133347300Y-98514000D01* +X134617300Y-100927000D02* +G75* +G02X134363300Y-101181000I-254000J0D01* +G01* +X134363300Y-96355000D02* +G75* +G02X134617300Y-96609000I0J-254000D01* +G01* +X132077300Y-100927000D02* +G75* +G03X132331300Y-101181000I254000J0D01* +G01* +X132331300Y-96355000D02* +G75* +G03X132077300Y-96609000I0J-254000D01* +G01* +X132331300Y-101181000D02* +X134363300Y-101181000D01* +X132331300Y-96355000D02* +X134363300Y-96355000D01* +X134617300Y-96609000D02* +X134617300Y-100927000D01* +X132077300Y-100927000D02* +X132077300Y-96609000D01* +D16* +G04 #@! TO.C,D2* +G36* +X182547100Y-89471600D02* +X180642100Y-89471600D01* +X180642100Y-90233600D01* +X182547100Y-90233600D01* +X182547100Y-89471600D01* +G37* +G36* +X176578100Y-89471600D02* +X174673100Y-89471600D01* +X174673100Y-90233600D01* +X176578100Y-90233600D01* +X176578100Y-89471600D01* +G37* +G36* +X180261100Y-88582600D02* +X179753100Y-88582600D01* +X179753100Y-91122600D01* +X180261100Y-91122600D01* +X180261100Y-88582600D01* +G37* +D15* +X178610100Y-89852600D02* +X178610100Y-89217600D01* +X178610100Y-90487600D02* +X178610100Y-89852600D01* +X178610100Y-89852600D02* +X177594100Y-90487600D01* +X178610100Y-89852600D02* +X177086100Y-89852600D01* +X177594100Y-89217600D02* +X178610100Y-89852600D01* +X177594100Y-90487600D02* +X177594100Y-89217600D01* +X179245100Y-89852600D02* +X178610100Y-89852600D01* +X180642100Y-91122600D02* +X180642100Y-88582600D01* +X180642100Y-91122600D02* +X176578100Y-91122600D01* +X176578100Y-88582600D02* +X176578100Y-91122600D01* +X176578100Y-88582600D02* +X180642100Y-88582600D01* +D16* +G04 #@! TO.C,D3* +G36* +X182572500Y-92722800D02* +X180667500Y-92722800D01* +X180667500Y-93484800D01* +X182572500Y-93484800D01* +X182572500Y-92722800D01* +G37* +G36* +X176603500Y-92722800D02* +X174698500Y-92722800D01* +X174698500Y-93484800D01* +X176603500Y-93484800D01* +X176603500Y-92722800D01* +G37* +G36* +X180286500Y-91833800D02* +X179778500Y-91833800D01* +X179778500Y-94373800D01* +X180286500Y-94373800D01* +X180286500Y-91833800D01* +G37* +D15* +X178635500Y-93103800D02* +X178635500Y-92468800D01* +X178635500Y-93738800D02* +X178635500Y-93103800D01* +X178635500Y-93103800D02* +X177619500Y-93738800D01* +X178635500Y-93103800D02* +X177111500Y-93103800D01* +X177619500Y-92468800D02* +X178635500Y-93103800D01* +X177619500Y-93738800D02* +X177619500Y-92468800D01* +X179270500Y-93103800D02* +X178635500Y-93103800D01* +X180667500Y-94373800D02* +X180667500Y-91833800D01* +X180667500Y-94373800D02* +X176603500Y-94373800D01* +X176603500Y-91833800D02* +X176603500Y-94373800D01* +X176603500Y-91833800D02* +X180667500Y-91833800D01* +D16* +G04 #@! TO.C,R8* +G36* +X144523300Y-94348400D02* +X144523300Y-94729400D01* +X145031300Y-94729400D01* +X145031300Y-94348400D01* +X144523300Y-94348400D01* +G37* +G36* +X144523300Y-99809400D02* +X144523300Y-100190400D01* +X145031300Y-100190400D01* +X145031300Y-99809400D01* +X144523300Y-99809400D01* +G37* +D15* +X144015300Y-99809400D02* +X145539300Y-99809400D01* +X143761300Y-99555400D02* +X143761300Y-99174400D01* +X145793300Y-99555400D02* +X145793300Y-99174400D01* +X143888300Y-99047400D02* +X143888300Y-95491400D01* +X143888300Y-99047400D02* +X143761300Y-99174400D01* +X145666300Y-99047400D02* +X145666300Y-95491400D01* +X145666300Y-99047400D02* +X145793300Y-99174400D01* +X143888300Y-95491400D02* +X143761300Y-95364400D01* +X143761300Y-94983400D02* +X143761300Y-95364400D01* +X145666300Y-95491400D02* +X145793300Y-95364400D01* +X145793300Y-94983400D02* +X145793300Y-95364400D01* +X144015300Y-94729400D02* +X145539300Y-94729400D01* +X145539300Y-99809400D02* +G75* +G03X145793300Y-99555400I0J254000D01* +G01* +X144015300Y-99809400D02* +G75* +G02X143761300Y-99555400I0J254000D01* +G01* +X143761300Y-94983400D02* +G75* +G02X144015300Y-94729400I254000J0D01* +G01* +X145793300Y-94983400D02* +G75* +G03X145539300Y-94729400I-254000J0D01* +G01* +D16* +G04 #@! TO.C,R2* +G36* +X128521300Y-115074800D02* +X128521300Y-115455800D01* +X129029300Y-115455800D01* +X129029300Y-115074800D01* +X128521300Y-115074800D01* +G37* +G36* +X128521300Y-120535800D02* +X128521300Y-120916800D01* +X129029300Y-120916800D01* +X129029300Y-120535800D01* +X128521300Y-120535800D01* +G37* +D15* +X128013300Y-120535800D02* +X129537300Y-120535800D01* +X127759300Y-120281800D02* +X127759300Y-119900800D01* +X129791300Y-120281800D02* +X129791300Y-119900800D01* +X127886300Y-119773800D02* +X127886300Y-116217800D01* +X127886300Y-119773800D02* +X127759300Y-119900800D01* +X129664300Y-119773800D02* +X129664300Y-116217800D01* +X129664300Y-119773800D02* +X129791300Y-119900800D01* +X127886300Y-116217800D02* +X127759300Y-116090800D01* +X127759300Y-115709800D02* +X127759300Y-116090800D01* +X129664300Y-116217800D02* +X129791300Y-116090800D01* +X129791300Y-115709800D02* +X129791300Y-116090800D01* +X128013300Y-115455800D02* +X129537300Y-115455800D01* +X129537300Y-120535800D02* +G75* +G03X129791300Y-120281800I0J254000D01* +G01* +X128013300Y-120535800D02* +G75* +G02X127759300Y-120281800I0J254000D01* +G01* +X127759300Y-115709800D02* +G75* +G02X128013300Y-115455800I254000J0D01* +G01* +X129791300Y-115709800D02* +G75* +G03X129537300Y-115455800I-254000J0D01* +G01* +D16* +G04 #@! TO.C,R6* +G36* +X133448900Y-115074800D02* +X133448900Y-115455800D01* +X133956900Y-115455800D01* +X133956900Y-115074800D01* +X133448900Y-115074800D01* +G37* +G36* +X133448900Y-120535800D02* +X133448900Y-120916800D01* +X133956900Y-120916800D01* +X133956900Y-120535800D01* +X133448900Y-120535800D01* +G37* +D15* +X132940900Y-120535800D02* +X134464900Y-120535800D01* +X132686900Y-120281800D02* +X132686900Y-119900800D01* +X134718900Y-120281800D02* +X134718900Y-119900800D01* +X132813900Y-119773800D02* +X132813900Y-116217800D01* +X132813900Y-119773800D02* +X132686900Y-119900800D01* +X134591900Y-119773800D02* +X134591900Y-116217800D01* +X134591900Y-119773800D02* +X134718900Y-119900800D01* +X132813900Y-116217800D02* +X132686900Y-116090800D01* +X132686900Y-115709800D02* +X132686900Y-116090800D01* +X134591900Y-116217800D02* +X134718900Y-116090800D01* +X134718900Y-115709800D02* +X134718900Y-116090800D01* +X132940900Y-115455800D02* +X134464900Y-115455800D01* +X134464900Y-120535800D02* +G75* +G03X134718900Y-120281800I0J254000D01* +G01* +X132940900Y-120535800D02* +G75* +G02X132686900Y-120281800I0J254000D01* +G01* +X132686900Y-115709800D02* +G75* +G02X132940900Y-115455800I254000J0D01* +G01* +X134718900Y-115709800D02* +G75* +G03X134464900Y-115455800I-254000J0D01* +G01* +D16* +G04 #@! TO.C,R7* +G36* +X148180900Y-100190400D02* +X148180900Y-99809400D01* +X147672900Y-99809400D01* +X147672900Y-100190400D01* +X148180900Y-100190400D01* +G37* +G36* +X148180900Y-94729400D02* +X148180900Y-94348400D01* +X147672900Y-94348400D01* +X147672900Y-94729400D01* +X148180900Y-94729400D01* +G37* +D15* +X148688900Y-94729400D02* +X147164900Y-94729400D01* +X148942900Y-94983400D02* +X148942900Y-95364400D01* +X146910900Y-94983400D02* +X146910900Y-95364400D01* +X148815900Y-95491400D02* +X148815900Y-99047400D01* +X148815900Y-95491400D02* +X148942900Y-95364400D01* +X147037900Y-95491400D02* +X147037900Y-99047400D01* +X147037900Y-95491400D02* +X146910900Y-95364400D01* +X148815900Y-99047400D02* +X148942900Y-99174400D01* +X148942900Y-99555400D02* +X148942900Y-99174400D01* +X147037900Y-99047400D02* +X146910900Y-99174400D01* +X146910900Y-99555400D02* +X146910900Y-99174400D01* +X148688900Y-99809400D02* +X147164900Y-99809400D01* +X147164900Y-94729400D02* +G75* +G03X146910900Y-94983400I0J-254000D01* +G01* +X148688900Y-94729400D02* +G75* +G02X148942900Y-94983400I0J-254000D01* +G01* +X148942900Y-99555400D02* +G75* +G02X148688900Y-99809400I-254000J0D01* +G01* +X146910900Y-99555400D02* +G75* +G03X147164900Y-99809400I254000J0D01* +G01* +D16* +G04 #@! TO.C,IC3* +G36* +X120545700Y-112839600D02* +X121815700Y-112839600D01* +X121815700Y-110045600D01* +X120545700Y-110045600D01* +X120545700Y-112839600D01* +G37* +G36* +X118005700Y-112839600D02* +X119275700Y-112839600D01* +X119275700Y-110045600D01* +X118005700Y-110045600D01* +X118005700Y-112839600D01* +G37* +G36* +X115465700Y-112839600D02* +X116735700Y-112839600D01* +X116735700Y-110045600D01* +X115465700Y-110045600D01* +X115465700Y-112839600D01* +G37* +G36* +X115719700Y-113474600D02* +X116481700Y-113474600D01* +X116481700Y-112839600D01* +X115719700Y-112839600D01* +X115719700Y-113474600D01* +G37* +G36* +X118259700Y-113474600D02* +X119021700Y-113474600D01* +X119021700Y-112839600D01* +X118259700Y-112839600D01* +X118259700Y-113474600D01* +G37* +G36* +X120799700Y-113474600D02* +X121561700Y-113474600D01* +X121561700Y-112839600D01* +X120799700Y-112839600D01* +X120799700Y-113474600D01* +G37* +D18* +X114068700Y-109410600D02* +X114068700Y-101155600D01* +X123212700Y-101155600D02* +X114068700Y-101155600D01* +X123212700Y-101155600D02* +X123212700Y-109410600D01* +X114068700Y-109410600D02* +X123212700Y-109410600D01* +D15* +X113433700Y-96075600D02* +X113433700Y-94170600D01* +X114322700Y-96075600D02* +X113433700Y-96075600D01* +X114322700Y-97599600D02* +X114322700Y-96075600D01* +X113433700Y-97599600D02* +X114322700Y-97599600D01* +X113433700Y-110045600D02* +X113433700Y-97599600D01* +X123847700Y-96075600D02* +X123847700Y-94170600D01* +X122958700Y-96075600D02* +X123847700Y-96075600D01* +X122958700Y-97599600D02* +X122958700Y-96075600D01* +X123847700Y-97599600D02* +X122958700Y-97599600D01* +X123847700Y-110045600D02* +X123847700Y-97599600D01* +X123847700Y-94170600D02* +X113433700Y-94170600D01* +X113433700Y-110045600D02* +X123847700Y-110045600D01* +D16* +G04 #@! TO.C,R5* +G36* +X137995500Y-120916800D02* +X137995500Y-120535800D01* +X137487500Y-120535800D01* +X137487500Y-120916800D01* +X137995500Y-120916800D01* +G37* +G36* +X137995500Y-115455800D02* +X137995500Y-115074800D01* +X137487500Y-115074800D01* +X137487500Y-115455800D01* +X137995500Y-115455800D01* +G37* +D15* +X138503500Y-115455800D02* +X136979500Y-115455800D01* +X138757500Y-115709800D02* +X138757500Y-116090800D01* +X136725500Y-115709800D02* +X136725500Y-116090800D01* +X138630500Y-116217800D02* +X138630500Y-119773800D01* +X138630500Y-116217800D02* +X138757500Y-116090800D01* +X136852500Y-116217800D02* +X136852500Y-119773800D01* +X136852500Y-116217800D02* +X136725500Y-116090800D01* +X138630500Y-119773800D02* +X138757500Y-119900800D01* +X138757500Y-120281800D02* +X138757500Y-119900800D01* +X136852500Y-119773800D02* +X136725500Y-119900800D01* +X136725500Y-120281800D02* +X136725500Y-119900800D01* +X138503500Y-120535800D02* +X136979500Y-120535800D01* +X136979500Y-115455800D02* +G75* +G03X136725500Y-115709800I0J-254000D01* +G01* +X138503500Y-115455800D02* +G75* +G02X138757500Y-115709800I0J-254000D01* +G01* +X138757500Y-120281800D02* +G75* +G02X138503500Y-120535800I-254000J0D01* +G01* +X136725500Y-120281800D02* +G75* +G03X136979500Y-120535800I254000J0D01* +G01* +D16* +G04 #@! TO.C,R9* +G36* +X140078300Y-115074800D02* +X140078300Y-115455800D01* +X140586300Y-115455800D01* +X140586300Y-115074800D01* +X140078300Y-115074800D01* +G37* +G36* +X140078300Y-120535800D02* +X140078300Y-120916800D01* +X140586300Y-120916800D01* +X140586300Y-120535800D01* +X140078300Y-120535800D01* +G37* +D15* +X139570300Y-120535800D02* +X141094300Y-120535800D01* +X139316300Y-120281800D02* +X139316300Y-119900800D01* +X141348300Y-120281800D02* +X141348300Y-119900800D01* +X139443300Y-119773800D02* +X139443300Y-116217800D01* +X139443300Y-119773800D02* +X139316300Y-119900800D01* +X141221300Y-119773800D02* +X141221300Y-116217800D01* +X141221300Y-119773800D02* +X141348300Y-119900800D01* +X139443300Y-116217800D02* +X139316300Y-116090800D01* +X139316300Y-115709800D02* +X139316300Y-116090800D01* +X141221300Y-116217800D02* +X141348300Y-116090800D01* +X141348300Y-115709800D02* +X141348300Y-116090800D01* +X139570300Y-115455800D02* +X141094300Y-115455800D01* +X141094300Y-120535800D02* +G75* +G03X141348300Y-120281800I0J254000D01* +G01* +X139570300Y-120535800D02* +G75* +G02X139316300Y-120281800I0J254000D01* +G01* +X139316300Y-115709800D02* +G75* +G02X139570300Y-115455800I254000J0D01* +G01* +X141348300Y-115709800D02* +G75* +G03X141094300Y-115455800I-254000J0D01* +G01* +G04 #@! TO.C,C7* +X144040700Y-118376800D02* +X144040700Y-118249800D01* +D17* +X144040700Y-118376800D02* +X143278700Y-118376800D01* +X144802700Y-118376800D02* +X144040700Y-118376800D01* +X144040700Y-118884800D02* +X143278700Y-118884800D01* +X144040700Y-118884800D02* +X144802700Y-118884800D01* +D15* +X144040700Y-119011800D02* +X144040700Y-118884800D01* +X142770700Y-116471800D02* +G75* +G02X143024700Y-116217800I254000J0D01* +G01* +X143024700Y-121043800D02* +G75* +G02X142770700Y-120789800I0J254000D01* +G01* +X145310700Y-116471800D02* +G75* +G03X145056700Y-116217800I-254000J0D01* +G01* +X145056700Y-121043800D02* +G75* +G03X145310700Y-120789800I0J254000D01* +G01* +X145056700Y-116217800D02* +X143024700Y-116217800D01* +X145056700Y-121043800D02* +X143024700Y-121043800D01* +X142770700Y-120789800D02* +X142770700Y-116471800D01* +X145310700Y-116471800D02* +X145310700Y-120789800D01* +D16* +G04 #@! TO.C,IC1* +G36* +X176019300Y-114211200D02* +X177289300Y-114211200D01* +X177289300Y-111417200D01* +X176019300Y-111417200D01* +X176019300Y-114211200D01* +G37* +G36* +X173479300Y-114211200D02* +X174749300Y-114211200D01* +X174749300Y-111417200D01* +X173479300Y-111417200D01* +X173479300Y-114211200D01* +G37* +G36* +X170939300Y-114211200D02* +X172209300Y-114211200D01* +X172209300Y-111417200D01* +X170939300Y-111417200D01* +X170939300Y-114211200D01* +G37* +G36* +X171193300Y-114846200D02* +X171955300Y-114846200D01* +X171955300Y-114211200D01* +X171193300Y-114211200D01* +X171193300Y-114846200D01* +G37* +G36* +X173733300Y-114846200D02* +X174495300Y-114846200D01* +X174495300Y-114211200D01* +X173733300Y-114211200D01* +X173733300Y-114846200D01* +G37* +G36* +X176273300Y-114846200D02* +X177035300Y-114846200D01* +X177035300Y-114211200D01* +X176273300Y-114211200D01* +X176273300Y-114846200D01* +G37* +D18* +X169542300Y-110782200D02* +X169542300Y-102527200D01* +X178686300Y-102527200D02* +X169542300Y-102527200D01* +X178686300Y-102527200D02* +X178686300Y-110782200D01* +X169542300Y-110782200D02* +X178686300Y-110782200D01* +D15* +X168907300Y-97447200D02* +X168907300Y-95542200D01* +X169796300Y-97447200D02* +X168907300Y-97447200D01* +X169796300Y-98971200D02* +X169796300Y-97447200D01* +X168907300Y-98971200D02* +X169796300Y-98971200D01* +X168907300Y-111417200D02* +X168907300Y-98971200D01* +X179321300Y-97447200D02* +X179321300Y-95542200D01* +X178432300Y-97447200D02* +X179321300Y-97447200D01* +X178432300Y-98971200D02* +X178432300Y-97447200D01* +X179321300Y-98971200D02* +X178432300Y-98971200D01* +X179321300Y-111417200D02* +X179321300Y-98971200D01* +X179321300Y-95542200D02* +X168907300Y-95542200D01* +X168907300Y-111417200D02* +X179321300Y-111417200D01* +G04 #@! TO.C,C2* +X183004300Y-102654200D02* +X183131300Y-102654200D01* +D17* +X183004300Y-102654200D02* +X183004300Y-101892200D01* +X183004300Y-103416200D02* +X183004300Y-102654200D01* +X182496300Y-102654200D02* +X182496300Y-101892200D01* +X182496300Y-102654200D02* +X182496300Y-103416200D01* +D15* +X182369300Y-102654200D02* +X182496300Y-102654200D01* +X184909300Y-101384200D02* +G75* +G02X185163300Y-101638200I0J-254000D01* +G01* +X180337300Y-101638200D02* +G75* +G02X180591300Y-101384200I254000J0D01* +G01* +X184909300Y-103924200D02* +G75* +G03X185163300Y-103670200I0J254000D01* +G01* +X180337300Y-103670200D02* +G75* +G03X180591300Y-103924200I254000J0D01* +G01* +X185163300Y-103670200D02* +X185163300Y-101638200D01* +X180337300Y-103670200D02* +X180337300Y-101638200D01* +X180591300Y-101384200D02* +X184909300Y-101384200D01* +X184909300Y-103924200D02* +X180591300Y-103924200D01* +G04 #@! TO.C,C4* +X186153900Y-116294000D02* +X186026900Y-116294000D01* +D17* +X186153900Y-116294000D02* +X186153900Y-117056000D01* +X186153900Y-115532000D02* +X186153900Y-116294000D01* +X186661900Y-116294000D02* +X186661900Y-117056000D01* +X186661900Y-116294000D02* +X186661900Y-115532000D01* +D15* +X186788900Y-116294000D02* +X186661900Y-116294000D01* +X184248900Y-117564000D02* +G75* +G02X183994900Y-117310000I0J254000D01* +G01* +X188820900Y-117310000D02* +G75* +G02X188566900Y-117564000I-254000J0D01* +G01* +X184248900Y-115024000D02* +G75* +G03X183994900Y-115278000I0J-254000D01* +G01* +X188820900Y-115278000D02* +G75* +G03X188566900Y-115024000I-254000J0D01* +G01* +X183994900Y-115278000D02* +X183994900Y-117310000D01* +X188820900Y-115278000D02* +X188820900Y-117310000D01* +X188566900Y-117564000D02* +X184248900Y-117564000D01* +X184248900Y-115024000D02* +X188566900Y-115024000D01* +D16* +G04 #@! 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TO.C,C1* +X185798300Y-98361600D02* +G75* +G03X185798300Y-98361600I-2540000J0D01* +G01* +X184274300Y-99885600D02* +X184274300Y-100393600D01* +X184528300Y-100139600D02* +X184020300Y-100139600D01* +G04 #@! TO.C,C3* +X188871700Y-111061600D02* +G75* +G03X188871700Y-111061600I-2540000J0D01* +G01* +X187347700Y-112585600D02* +X187347700Y-113093600D01* +X187601700Y-112839600D02* +X187093700Y-112839600D01* +D16* +G04 #@! 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TO.C,C9* +X159356900Y-96990000D02* +X159356900Y-96863000D01* +D17* +X159356900Y-96990000D02* +X158594900Y-96990000D01* +X160118900Y-96990000D02* +X159356900Y-96990000D01* +X159356900Y-97498000D02* +X158594900Y-97498000D01* +X159356900Y-97498000D02* +X160118900Y-97498000D01* +D15* +X159356900Y-97625000D02* +X159356900Y-97498000D01* +X158086900Y-95085000D02* +G75* +G02X158340900Y-94831000I254000J0D01* +G01* +X158340900Y-99657000D02* +G75* +G02X158086900Y-99403000I0J254000D01* +G01* +X160626900Y-95085000D02* +G75* +G03X160372900Y-94831000I-254000J0D01* +G01* +X160372900Y-99657000D02* +G75* +G03X160626900Y-99403000I0J254000D01* +G01* +X160372900Y-94831000D02* +X158340900Y-94831000D01* +X160372900Y-99657000D02* +X158340900Y-99657000D01* +X158086900Y-99403000D02* +X158086900Y-95085000D01* +X160626900Y-95085000D02* +X160626900Y-99403000D01* +G04 #@! TO.C,C11* +X127987900Y-104889400D02* +X128114900Y-104889400D01* +D17* +X127987900Y-104889400D02* +X127987900Y-104127400D01* +X127987900Y-105651400D02* +X127987900Y-104889400D01* +X127479900Y-104889400D02* +X127479900Y-104127400D01* +X127479900Y-104889400D02* +X127479900Y-105651400D01* +D15* +X127352900Y-104889400D02* +X127479900Y-104889400D01* +X129892900Y-103619400D02* +G75* +G02X130146900Y-103873400I0J-254000D01* +G01* +X125320900Y-103873400D02* +G75* +G02X125574900Y-103619400I254000J0D01* +G01* +X129892900Y-106159400D02* +G75* +G03X130146900Y-105905400I0J254000D01* +G01* +X125320900Y-105905400D02* +G75* +G03X125574900Y-106159400I254000J0D01* +G01* +X130146900Y-105905400D02* +X130146900Y-103873400D01* +X125320900Y-105905400D02* +X125320900Y-103873400D01* +X125574900Y-103619400D02* +X129892900Y-103619400D01* +X129892900Y-106159400D02* +X125574900Y-106159400D01* +D16* +G04 #@! TO.C,R14* +G36* +X128749900Y-95440600D02* +X128749900Y-95821600D01* +X129257900Y-95821600D01* +X129257900Y-95440600D01* +X128749900Y-95440600D01* +G37* +G36* +X128749900Y-100901600D02* +X128749900Y-101282600D01* +X129257900Y-101282600D01* +X129257900Y-100901600D01* +X128749900Y-100901600D01* +G37* +D15* +X128241900Y-100901600D02* +X129765900Y-100901600D01* +X127987900Y-100647600D02* +X127987900Y-100266600D01* +X130019900Y-100647600D02* +X130019900Y-100266600D01* +X128114900Y-100139600D02* +X128114900Y-96583600D01* +X128114900Y-100139600D02* +X127987900Y-100266600D01* +X129892900Y-100139600D02* +X129892900Y-96583600D01* +X129892900Y-100139600D02* +X130019900Y-100266600D01* +X128114900Y-96583600D02* +X127987900Y-96456600D01* +X127987900Y-96075600D02* +X127987900Y-96456600D01* +X129892900Y-96583600D02* +X130019900Y-96456600D01* +X130019900Y-96075600D02* +X130019900Y-96456600D01* +X128241900Y-95821600D02* +X129765900Y-95821600D01* +X129765900Y-100901600D02* +G75* +G03X130019900Y-100647600I0J254000D01* +G01* +X128241900Y-100901600D02* +G75* +G02X127987900Y-100647600I0J254000D01* +G01* +X127987900Y-96075600D02* +G75* +G02X128241900Y-95821600I254000J0D01* +G01* +X130019900Y-96075600D02* +G75* +G03X129765900Y-95821600I-254000J0D01* +G01* +D16* +G04 #@! TO.C,R15* +G36* +X126819500Y-101282600D02* +X126819500Y-100901600D01* +X126311500Y-100901600D01* +X126311500Y-101282600D01* +X126819500Y-101282600D01* +G37* +G36* +X126819500Y-95821600D02* +X126819500Y-95440600D01* +X126311500Y-95440600D01* +X126311500Y-95821600D01* +X126819500Y-95821600D01* +G37* +D15* +X127327500Y-95821600D02* +X125803500Y-95821600D01* +X127581500Y-96075600D02* +X127581500Y-96456600D01* +X125549500Y-96075600D02* +X125549500Y-96456600D01* +X127454500Y-96583600D02* +X127454500Y-100139600D01* +X127454500Y-96583600D02* +X127581500Y-96456600D01* +X125676500Y-96583600D02* +X125676500Y-100139600D01* +X125676500Y-96583600D02* +X125549500Y-96456600D01* +X127454500Y-100139600D02* +X127581500Y-100266600D01* +X127581500Y-100647600D02* +X127581500Y-100266600D01* +X125676500Y-100139600D02* +X125549500Y-100266600D01* +X125549500Y-100647600D02* +X125549500Y-100266600D01* +X127327500Y-100901600D02* +X125803500Y-100901600D01* +X125803500Y-95821600D02* +G75* +G03X125549500Y-96075600I0J-254000D01* +G01* +X127327500Y-95821600D02* +G75* +G02X127581500Y-96075600I0J-254000D01* +G01* +X127581500Y-100647600D02* +G75* +G02X127327500Y-100901600I-254000J0D01* +G01* +X125549500Y-100647600D02* +G75* +G03X125803500Y-100901600I254000J0D01* +G01* +D16* +G04 #@! TO.C,R16* +G36* +X161617500Y-90640000D02* +X161998500Y-90640000D01* +X161998500Y-90132000D01* +X161617500Y-90132000D01* +X161617500Y-90640000D01* +G37* +G36* +X167078500Y-90640000D02* +X167459500Y-90640000D01* +X167459500Y-90132000D01* +X167078500Y-90132000D01* +X167078500Y-90640000D01* +G37* +D15* +X167078500Y-91148000D02* +X167078500Y-89624000D01* +X166824500Y-91402000D02* +X166443500Y-91402000D01* +X166824500Y-89370000D02* +X166443500Y-89370000D01* +X166316500Y-91275000D02* +X162760500Y-91275000D01* +X166316500Y-91275000D02* +X166443500Y-91402000D01* +X166316500Y-89497000D02* +X162760500Y-89497000D01* +X166316500Y-89497000D02* +X166443500Y-89370000D01* +X162760500Y-91275000D02* +X162633500Y-91402000D01* +X162252500Y-91402000D02* +X162633500Y-91402000D01* +X162760500Y-89497000D02* +X162633500Y-89370000D01* +X162252500Y-89370000D02* +X162633500Y-89370000D01* +X161998500Y-91148000D02* +X161998500Y-89624000D01* +X167078500Y-89624000D02* +G75* +G03X166824500Y-89370000I-254000J0D01* +G01* +X167078500Y-91148000D02* +G75* +G02X166824500Y-91402000I-254000J0D01* +G01* +X162252500Y-91402000D02* +G75* +G02X161998500Y-91148000I0J254000D01* +G01* +X162252500Y-89370000D02* +G75* +G03X161998500Y-89624000I0J-254000D01* +G01* +G04 #@! TO.C,JP5* +X170228100Y-121856600D02* +X168958100Y-121856600D01* +X168323100Y-121221600D02* +X168958100Y-121856600D01* +X168958100Y-119316600D02* +X168323100Y-119951600D01* +X170863100Y-121221600D02* +X170228100Y-121856600D01* +X170863100Y-119951600D02* +X170863100Y-121221600D01* +X170228100Y-119316600D02* +X170863100Y-119951600D01* +X168958100Y-119316600D02* +X170228100Y-119316600D01* +X157528100Y-121856600D02* +X156258100Y-121856600D01* +X155623100Y-121221600D02* +X156258100Y-121856600D01* +X156258100Y-119316600D02* +X155623100Y-119951600D01* +X155623100Y-119951600D02* +X155623100Y-121221600D01* +X158798100Y-121856600D02* +X158163100Y-121221600D01* +X160068100Y-121856600D02* +X158798100Y-121856600D01* +X160703100Y-121221600D02* +X160068100Y-121856600D01* +X160703100Y-119951600D02* +X160703100Y-121221600D01* +X160068100Y-119316600D02* +X160703100Y-119951600D01* +X158798100Y-119316600D02* +X160068100Y-119316600D01* +X158163100Y-119951600D02* +X158798100Y-119316600D01* +X158163100Y-121221600D02* +X157528100Y-121856600D01* +X158163100Y-119951600D02* +X158163100Y-121221600D01* +X157528100Y-119316600D02* +X158163100Y-119951600D01* +X156258100Y-119316600D02* +X157528100Y-119316600D01* +X165148100Y-121856600D02* +X163878100Y-121856600D01* +X163243100Y-121221600D02* +X163878100Y-121856600D01* +X163878100Y-119316600D02* +X163243100Y-119951600D01* +X161338100Y-121856600D02* +X160703100Y-121221600D01* +X162608100Y-121856600D02* +X161338100Y-121856600D01* +X163243100Y-121221600D02* +X162608100Y-121856600D01* +X163243100Y-119951600D02* +X163243100Y-121221600D01* +X162608100Y-119316600D02* +X163243100Y-119951600D01* +X161338100Y-119316600D02* +X162608100Y-119316600D01* +X160703100Y-119951600D02* +X161338100Y-119316600D01* +X166418100Y-121856600D02* +X165783100Y-121221600D01* +X167688100Y-121856600D02* +X166418100Y-121856600D01* +X168323100Y-121221600D02* +X167688100Y-121856600D01* +X168323100Y-119951600D02* +X168323100Y-121221600D01* +X167688100Y-119316600D02* +X168323100Y-119951600D01* +X166418100Y-119316600D02* +X167688100Y-119316600D01* +X165783100Y-119951600D02* +X166418100Y-119316600D01* +X165783100Y-121221600D02* +X165148100Y-121856600D01* +X165783100Y-119951600D02* +X165783100Y-121221600D01* +X165148100Y-119316600D02* +X165783100Y-119951600D01* +X163878100Y-119316600D02* +X165148100Y-119316600D01* +D16* +G04 #@! TO.C,R1* +G36* +X188236700Y-96558200D02* +X188236700Y-97421800D01* +X188846300Y-97421800D01* +X188846300Y-96558200D01* +X188236700Y-96558200D01* +G37* +G36* +X188236700Y-106057800D02* +X188236700Y-106921400D01* +X188846300Y-106921400D01* +X188846300Y-106057800D01* +X188236700Y-106057800D01* +G37* +D15* +X187271500Y-106057800D02* +X189811500Y-106057800D01* +X187017500Y-105803800D02* +X187017500Y-105168800D01* +X190065500Y-105803800D02* +X190065500Y-105168800D01* +X187144500Y-105041800D02* +X187144500Y-98437800D01* +X187144500Y-105041800D02* +X187017500Y-105168800D01* +X189938500Y-105041800D02* +X189938500Y-98437800D01* +X189938500Y-105041800D02* +X190065500Y-105168800D01* +X187144500Y-98437800D02* +X187017500Y-98310800D01* +X187017500Y-97675800D02* +X187017500Y-98310800D01* +X189938500Y-98437800D02* +X190065500Y-98310800D01* +X190065500Y-97675800D02* +X190065500Y-98310800D01* +X187271500Y-97421800D02* +X189811500Y-97421800D01* +X189811500Y-106057800D02* +G75* +G03X190065500Y-105803800I0J254000D01* +G01* +X187271500Y-106057800D02* +G75* +G02X187017500Y-105803800I0J254000D01* +G01* +X187017500Y-97675800D02* +G75* +G02X187271500Y-97421800I254000J0D01* +G01* +X190065500Y-97675800D02* +G75* +G03X189811500Y-97421800I-254000J0D01* +G01* +D19* +G04 #@! TO.C,JP1* +X96600000Y-96380000D02* +G75* +G03X96600000Y-96380000I-1760000J0D01* +G01* +X86130000Y-96380000D02* +X86130000Y-102515000D01* +X86130000Y-102515000D02* +X101150000Y-102515000D01* +X101150000Y-102515000D02* +X101150000Y-101340000D01* +X86130000Y-96380000D02* +X86130000Y-90245000D01* +X86130000Y-90245000D02* +X101150000Y-90245000D01* +X101150000Y-90245000D02* +X101150000Y-91420000D01* +X101150000Y-97120000D02* +X101150000Y-95640000D01* +X104250000Y-99530000D02* +X105530000Y-99530000D01* +X104250000Y-98930000D02* +X105530000Y-98930000D01* +X104250000Y-93830000D02* +X105530000Y-93830000D01* +X104250000Y-93230000D02* +X105530000Y-93230000D01* +X102140000Y-101730000D02* +X102440000Y-102330000D01* +X102440000Y-102330000D02* +X101840000Y-102330000D01* +X101840000Y-102330000D02* +X102140000Y-101730000D01* +G04 #@! TO.C,JP2* +X96600000Y-117970000D02* +G75* +G03X96600000Y-117970000I-1760000J0D01* +G01* +X96600000Y-106570000D02* +G75* +G03X96600000Y-106570000I-1760000J0D01* +G01* +X86130000Y-112270000D02* +X86130000Y-121255000D01* +X86130000Y-121255000D02* +X101150000Y-121255000D01* +X101150000Y-121255000D02* +X101150000Y-120080000D01* +X86130000Y-112270000D02* +X86130000Y-103285000D01* +X86130000Y-103285000D02* +X101150000Y-103285000D01* +X101150000Y-103285000D02* +X101150000Y-104460000D01* +X101150000Y-115860000D02* +X101150000Y-114380000D01* +X101150000Y-110160000D02* +X101150000Y-108680000D01* +X104250000Y-118270000D02* +X105530000Y-118270000D01* +X104250000Y-117670000D02* +X105530000Y-117670000D01* +X104250000Y-112570000D02* +X105530000Y-112570000D01* +X104250000Y-111970000D02* +X105530000Y-111970000D01* +X104250000Y-106870000D02* +X105530000Y-106870000D01* +X104250000Y-106270000D02* +X105530000Y-106270000D01* +X102140000Y-120470000D02* +X102440000Y-121070000D01* +X102440000Y-121070000D02* +X101840000Y-121070000D01* +X101840000Y-121070000D02* +X102140000Y-120470000D01* +G04 #@! TO.C,@HOLE0* +D20* +G04 #@! TO.C,@HOLE1* +G04 #@! TO.C,@HOLE2* +G04 #@! TO.C,@HOLE3* +G04 #@! TO.C,IC2* +D21* +X131594038Y-108297452D02* +X130628838Y-108297452D01* +X131502114Y-107286290D02* +X131548076Y-107332252D01* +X131594038Y-107470138D01* +X131594038Y-107562062D01* +X131548076Y-107699947D01* +X131456152Y-107791871D01* +X131364228Y-107837833D01* +X131180380Y-107883795D01* +X131042495Y-107883795D01* +X130858647Y-107837833D01* +X130766723Y-107791871D01* +X130674800Y-107699947D01* +X130628838Y-107562062D01* +X130628838Y-107470138D01* +X130674800Y-107332252D01* +X130720761Y-107286290D01* +X130720761Y-106918595D02* +X130674800Y-106872633D01* +X130628838Y-106780709D01* +X130628838Y-106550900D01* +X130674800Y-106458976D01* +X130720761Y-106413014D01* +X130812685Y-106367052D01* +X130904609Y-106367052D01* +X131042495Y-106413014D01* +X131594038Y-106964557D01* +X131594038Y-106367052D01* +G04 #@! TO.C,R13* +X126409238Y-116185061D02* +X125949619Y-116506795D01* +X126409238Y-116736604D02* +X125444038Y-116736604D01* +X125444038Y-116368909D01* +X125490000Y-116276985D01* +X125535961Y-116231023D01* +X125627885Y-116185061D01* +X125765771Y-116185061D01* +X125857695Y-116231023D01* +X125903657Y-116276985D01* +X125949619Y-116368909D01* +X125949619Y-116736604D01* +X126409238Y-115265823D02* +X126409238Y-115817366D01* +X126409238Y-115541595D02* +X125444038Y-115541595D01* +X125581923Y-115633518D01* +X125673847Y-115725442D01* +X125719809Y-115817366D01* +X125444038Y-114944090D02* +X125444038Y-114346585D01* +X125811733Y-114668318D01* +X125811733Y-114530433D01* +X125857695Y-114438509D01* +X125903657Y-114392547D01* +X125995580Y-114346585D01* +X126225390Y-114346585D01* +X126317314Y-114392547D01* +X126363276Y-114438509D01* +X126409238Y-114530433D01* +X126409238Y-114806204D01* +X126363276Y-114898128D01* +X126317314Y-114944090D01* +G04 #@! TO.C,R4* +X138704038Y-98005909D02* +X138244419Y-98327642D01* +X138704038Y-98557452D02* +X137738838Y-98557452D01* +X137738838Y-98189757D01* +X137784800Y-98097833D01* +X137830761Y-98051871D01* +X137922685Y-98005909D01* +X138060571Y-98005909D01* +X138152495Y-98051871D01* +X138198457Y-98097833D01* +X138244419Y-98189757D01* +X138244419Y-98557452D01* +X138060571Y-97178595D02* +X138704038Y-97178595D01* +X137692876Y-97408404D02* +X138382304Y-97638214D01* +X138382304Y-97040709D01* +G04 #@! TO.C,R12* +X153439238Y-118015061D02* +X152979619Y-118336795D01* +X153439238Y-118566604D02* +X152474038Y-118566604D01* +X152474038Y-118198909D01* +X152520000Y-118106985D01* +X152565961Y-118061023D01* +X152657885Y-118015061D01* +X152795771Y-118015061D01* +X152887695Y-118061023D01* +X152933657Y-118106985D01* +X152979619Y-118198909D01* +X152979619Y-118566604D01* +X153439238Y-117095823D02* +X153439238Y-117647366D01* +X153439238Y-117371595D02* +X152474038Y-117371595D01* +X152611923Y-117463518D01* +X152703847Y-117555442D01* +X152749809Y-117647366D01* +X152565961Y-116728128D02* +X152520000Y-116682166D01* +X152474038Y-116590242D01* +X152474038Y-116360433D01* +X152520000Y-116268509D01* +X152565961Y-116222547D01* +X152657885Y-116176585D01* +X152749809Y-116176585D01* +X152887695Y-116222547D01* +X153439238Y-116774090D01* +X153439238Y-116176585D01* +G04 #@! TO.C,R10* +X156534038Y-97385909D02* +X156074419Y-97707642D01* +X156534038Y-97937452D02* +X155568838Y-97937452D01* +X155568838Y-97569757D01* +X155614800Y-97477833D01* +X155660761Y-97431871D01* +X155752685Y-97385909D01* +X155890571Y-97385909D01* +X155982495Y-97431871D01* +X156028457Y-97477833D01* +X156074419Y-97569757D01* +X156074419Y-97937452D01* +X156534038Y-96466671D02* +X156534038Y-97018214D01* +X156534038Y-96742442D02* +X155568838Y-96742442D01* +X155706723Y-96834366D01* +X155798647Y-96926290D01* +X155844609Y-97018214D01* +X155568838Y-95869166D02* +X155568838Y-95777242D01* +X155614800Y-95685319D01* +X155660761Y-95639357D01* +X155752685Y-95593395D01* +X155936533Y-95547433D01* +X156166342Y-95547433D01* +X156350190Y-95593395D01* +X156442114Y-95639357D01* +X156488076Y-95685319D01* +X156534038Y-95777242D01* +X156534038Y-95869166D01* +X156488076Y-95961090D01* +X156442114Y-96007052D01* +X156350190Y-96053014D01* +X156166342Y-96098976D01* +X155936533Y-96098976D01* +X155752685Y-96053014D01* +X155660761Y-96007052D01* +X155614800Y-95961090D01* +X155568838Y-95869166D01* +G04 #@! TO.C,C6* +X140754176Y-101157314D02* +X140708214Y-101203276D01* +X140570328Y-101249238D01* +X140478404Y-101249238D01* +X140340519Y-101203276D01* +X140248595Y-101111352D01* +X140202633Y-101019428D01* +X140156671Y-100835580D01* +X140156671Y-100697695D01* +X140202633Y-100513847D01* +X140248595Y-100421923D01* +X140340519Y-100330000D01* +X140478404Y-100284038D01* +X140570328Y-100284038D01* +X140708214Y-100330000D01* +X140754176Y-100375961D01* +X141581490Y-100284038D02* +X141397642Y-100284038D01* +X141305719Y-100330000D01* +X141259757Y-100375961D01* +X141167833Y-100513847D01* +X141121871Y-100697695D01* +X141121871Y-101065390D01* +X141167833Y-101157314D01* +X141213795Y-101203276D01* +X141305719Y-101249238D01* +X141489566Y-101249238D01* +X141581490Y-101203276D01* +X141627452Y-101157314D01* +X141673414Y-101065390D01* +X141673414Y-100835580D01* +X141627452Y-100743657D01* +X141581490Y-100697695D01* +X141489566Y-100651733D01* +X141305719Y-100651733D01* +X141213795Y-100697695D01* +X141167833Y-100743657D01* +X141121871Y-100835580D01* +G04 #@! TO.C,C8* +X150440176Y-98123314D02* +X150394214Y-98169276D01* +X150256328Y-98215238D01* +X150164404Y-98215238D01* +X150026519Y-98169276D01* +X149934595Y-98077352D01* +X149888633Y-97985428D01* +X149842671Y-97801580D01* +X149842671Y-97663695D01* +X149888633Y-97479847D01* +X149934595Y-97387923D01* +X150026519Y-97296000D01* +X150164404Y-97250038D01* +X150256328Y-97250038D01* +X150394214Y-97296000D01* +X150440176Y-97341961D01* +X150991719Y-97663695D02* +X150899795Y-97617733D01* +X150853833Y-97571771D01* +X150807871Y-97479847D01* +X150807871Y-97433885D01* +X150853833Y-97341961D01* +X150899795Y-97296000D01* +X150991719Y-97250038D01* +X151175566Y-97250038D01* +X151267490Y-97296000D01* +X151313452Y-97341961D01* +X151359414Y-97433885D01* +X151359414Y-97479847D01* +X151313452Y-97571771D01* +X151267490Y-97617733D01* +X151175566Y-97663695D01* +X150991719Y-97663695D01* +X150899795Y-97709657D01* +X150853833Y-97755619D01* +X150807871Y-97847542D01* +X150807871Y-98031390D01* +X150853833Y-98123314D01* +X150899795Y-98169276D01* +X150991719Y-98215238D01* +X151175566Y-98215238D01* +X151267490Y-98169276D01* +X151313452Y-98123314D01* +X151359414Y-98031390D01* +X151359414Y-97847542D01* +X151313452Y-97755619D01* +X151267490Y-97709657D01* +X151175566Y-97663695D01* +G04 #@! TO.C,C5* +X133014176Y-95877314D02* +X132968214Y-95923276D01* +X132830328Y-95969238D01* +X132738404Y-95969238D01* +X132600519Y-95923276D01* +X132508595Y-95831352D01* +X132462633Y-95739428D01* +X132416671Y-95555580D01* +X132416671Y-95417695D01* +X132462633Y-95233847D01* +X132508595Y-95141923D01* +X132600519Y-95050000D01* +X132738404Y-95004038D01* +X132830328Y-95004038D01* +X132968214Y-95050000D01* +X133014176Y-95095961D01* +X133887452Y-95004038D02* +X133427833Y-95004038D01* +X133381871Y-95463657D01* +X133427833Y-95417695D01* +X133519757Y-95371733D01* +X133749566Y-95371733D01* +X133841490Y-95417695D01* +X133887452Y-95463657D01* +X133933414Y-95555580D01* +X133933414Y-95785390D01* +X133887452Y-95877314D01* +X133841490Y-95923276D01* +X133749566Y-95969238D01* +X133519757Y-95969238D01* +X133427833Y-95923276D01* +X133381871Y-95877314D01* +G04 #@! TO.C,D2* +X178924733Y-92422838D02* +X178924733Y-91457638D01* +X179154542Y-91457638D01* +X179292428Y-91503600D01* +X179384352Y-91595523D01* +X179430314Y-91687447D01* +X179476276Y-91871295D01* +X179476276Y-92009180D01* +X179430314Y-92193028D01* +X179384352Y-92284952D01* +X179292428Y-92376876D01* +X179154542Y-92422838D01* +X178924733Y-92422838D01* +X179843971Y-91549561D02* +X179889933Y-91503600D01* +X179981857Y-91457638D01* +X180211666Y-91457638D01* +X180303590Y-91503600D01* +X180349552Y-91549561D01* +X180395514Y-91641485D01* +X180395514Y-91733409D01* +X180349552Y-91871295D01* +X179798009Y-92422838D01* +X180395514Y-92422838D01* +G04 #@! TO.C,D3* +X177492633Y-93689238D02* +X177492633Y-92724038D01* +X177722442Y-92724038D01* +X177860328Y-92770000D01* +X177952252Y-92861923D01* +X177998214Y-92953847D01* +X178044176Y-93137695D01* +X178044176Y-93275580D01* +X177998214Y-93459428D01* +X177952252Y-93551352D01* +X177860328Y-93643276D01* +X177722442Y-93689238D01* +X177492633Y-93689238D01* +X178365909Y-92724038D02* +X178963414Y-92724038D01* +X178641681Y-93091733D01* +X178779566Y-93091733D01* +X178871490Y-93137695D01* +X178917452Y-93183657D01* +X178963414Y-93275580D01* +X178963414Y-93505390D01* +X178917452Y-93597314D01* +X178871490Y-93643276D01* +X178779566Y-93689238D01* +X178503795Y-93689238D01* +X178411871Y-93643276D01* +X178365909Y-93597314D01* +G04 #@! TO.C,R8* +X145299238Y-97505823D02* +X144839619Y-97827557D01* +X145299238Y-98057366D02* +X144334038Y-98057366D01* +X144334038Y-97689671D01* +X144380000Y-97597747D01* +X144425961Y-97551785D01* +X144517885Y-97505823D01* +X144655771Y-97505823D01* +X144747695Y-97551785D01* +X144793657Y-97597747D01* +X144839619Y-97689671D01* +X144839619Y-98057366D01* +X144747695Y-96954280D02* +X144701733Y-97046204D01* +X144655771Y-97092166D01* +X144563847Y-97138128D01* +X144517885Y-97138128D01* +X144425961Y-97092166D01* +X144380000Y-97046204D01* +X144334038Y-96954280D01* +X144334038Y-96770433D01* +X144380000Y-96678509D01* +X144425961Y-96632547D01* +X144517885Y-96586585D01* +X144563847Y-96586585D01* +X144655771Y-96632547D01* +X144701733Y-96678509D01* +X144747695Y-96770433D01* +X144747695Y-96954280D01* +X144793657Y-97046204D01* +X144839619Y-97092166D01* +X144931542Y-97138128D01* +X145115390Y-97138128D01* +X145207314Y-97092166D01* +X145253276Y-97046204D01* +X145299238Y-96954280D01* +X145299238Y-96770433D01* +X145253276Y-96678509D01* +X145207314Y-96632547D01* +X145115390Y-96586585D01* +X144931542Y-96586585D01* +X144839619Y-96632547D01* +X144793657Y-96678509D01* +X144747695Y-96770433D01* +G04 #@! TO.C,R2* +X129309238Y-118255823D02* +X128849619Y-118577557D01* +X129309238Y-118807366D02* +X128344038Y-118807366D01* +X128344038Y-118439671D01* +X128390000Y-118347747D01* +X128435961Y-118301785D01* +X128527885Y-118255823D01* +X128665771Y-118255823D01* +X128757695Y-118301785D01* +X128803657Y-118347747D01* +X128849619Y-118439671D01* +X128849619Y-118807366D01* +X128435961Y-117888128D02* +X128390000Y-117842166D01* +X128344038Y-117750242D01* +X128344038Y-117520433D01* +X128390000Y-117428509D01* +X128435961Y-117382547D01* +X128527885Y-117336585D01* +X128619809Y-117336585D01* +X128757695Y-117382547D01* +X129309238Y-117934090D01* +X129309238Y-117336585D01* +G04 #@! TO.C,R6* +X134099238Y-118375823D02* +X133639619Y-118697557D01* +X134099238Y-118927366D02* +X133134038Y-118927366D01* +X133134038Y-118559671D01* +X133180000Y-118467747D01* +X133225961Y-118421785D01* +X133317885Y-118375823D01* +X133455771Y-118375823D01* +X133547695Y-118421785D01* +X133593657Y-118467747D01* +X133639619Y-118559671D01* +X133639619Y-118927366D01* +X133134038Y-117548509D02* +X133134038Y-117732357D01* +X133180000Y-117824280D01* +X133225961Y-117870242D01* +X133363847Y-117962166D01* +X133547695Y-118008128D01* +X133915390Y-118008128D01* +X134007314Y-117962166D01* +X134053276Y-117916204D01* +X134099238Y-117824280D01* +X134099238Y-117640433D01* +X134053276Y-117548509D01* +X134007314Y-117502547D01* +X133915390Y-117456585D01* +X133685580Y-117456585D01* +X133593657Y-117502547D01* +X133547695Y-117548509D01* +X133501733Y-117640433D01* +X133501733Y-117824280D01* +X133547695Y-117916204D01* +X133593657Y-117962166D01* +X133685580Y-118008128D01* +G04 #@! TO.C,R7* +X148409238Y-96045823D02* +X147949619Y-96367557D01* +X148409238Y-96597366D02* +X147444038Y-96597366D01* +X147444038Y-96229671D01* +X147490000Y-96137747D01* +X147535961Y-96091785D01* +X147627885Y-96045823D01* +X147765771Y-96045823D01* +X147857695Y-96091785D01* +X147903657Y-96137747D01* +X147949619Y-96229671D01* +X147949619Y-96597366D01* +X147444038Y-95724090D02* +X147444038Y-95080623D01* +X148409238Y-95494280D01* +G04 #@! TO.C,IC3* +X114784738Y-103276052D02* +X113819538Y-103276052D01* +X114692814Y-102264890D02* +X114738776Y-102310852D01* +X114784738Y-102448738D01* +X114784738Y-102540662D01* +X114738776Y-102678547D01* +X114646852Y-102770471D01* +X114554928Y-102816433D01* +X114371080Y-102862395D01* +X114233195Y-102862395D01* +X114049347Y-102816433D01* +X113957423Y-102770471D01* +X113865500Y-102678547D01* +X113819538Y-102540662D01* +X113819538Y-102448738D01* +X113865500Y-102310852D01* +X113911461Y-102264890D01* +X113819538Y-101943157D02* +X113819538Y-101345652D01* +X114187233Y-101667385D01* +X114187233Y-101529500D01* +X114233195Y-101437576D01* +X114279157Y-101391614D01* +X114371080Y-101345652D01* +X114600890Y-101345652D01* +X114692814Y-101391614D01* +X114738776Y-101437576D01* +X114784738Y-101529500D01* +X114784738Y-101805271D01* +X114738776Y-101897195D01* +X114692814Y-101943157D01* +D14* +X114445587Y-100579866D02* +X114905206Y-100579866D01* +X114353663Y-100855638D02* +X114675397Y-99890438D01* +X114997130Y-100855638D01* +X115824444Y-100855638D02* +X115272901Y-100855638D01* +X115548673Y-100855638D02* +X115548673Y-99890438D01* +X115456749Y-100028323D01* +X115364825Y-100120247D01* +X115272901Y-100166209D01* +X116146178Y-99890438D02* +X116789644Y-99890438D01* +X116375987Y-100855638D01* +X117203301Y-100809676D02* +X117203301Y-100855638D01* +X117157340Y-100947561D01* +X117111378Y-100993523D01* +X118076578Y-99890438D02* +X117616959Y-99890438D01* +X117570997Y-100350057D01* +X117616959Y-100304095D01* +X117708882Y-100258133D01* +X117938692Y-100258133D01* +X118030616Y-100304095D01* +X118076578Y-100350057D01* +X118122540Y-100441980D01* +X118122540Y-100671790D01* +X118076578Y-100763714D01* +X118030616Y-100809676D01* +X117938692Y-100855638D01* +X117708882Y-100855638D01* +X117616959Y-100809676D01* +X117570997Y-100763714D01* +X118536197Y-100855638D02* +X118536197Y-100212171D01* +X118536197Y-100304095D02* +X118582159Y-100258133D01* +X118674082Y-100212171D01* +X118811968Y-100212171D01* +X118903892Y-100258133D01* +X118949854Y-100350057D01* +X118949854Y-100855638D01* +X118949854Y-100350057D02* +X118995816Y-100258133D01* +X119087740Y-100212171D01* +X119225625Y-100212171D01* +X119317549Y-100258133D01* +X119363511Y-100350057D01* +X119363511Y-100855638D01* +X119823130Y-100855638D02* +X119823130Y-100212171D01* +X119823130Y-100304095D02* +X119869092Y-100258133D01* +X119961016Y-100212171D01* +X120098901Y-100212171D01* +X120190825Y-100258133D01* +X120236787Y-100350057D01* +X120236787Y-100855638D01* +X120236787Y-100350057D02* +X120282749Y-100258133D01* +X120374673Y-100212171D01* +X120512559Y-100212171D01* +X120604482Y-100258133D01* +X120650444Y-100350057D01* +X120650444Y-100855638D01* +G04 #@! TO.C,R5* +D21* +X138104038Y-119125909D02* +X137644419Y-119447642D01* +X138104038Y-119677452D02* +X137138838Y-119677452D01* +X137138838Y-119309757D01* +X137184800Y-119217833D01* +X137230761Y-119171871D01* +X137322685Y-119125909D01* +X137460571Y-119125909D01* +X137552495Y-119171871D01* +X137598457Y-119217833D01* +X137644419Y-119309757D01* +X137644419Y-119677452D01* +X137138838Y-118252633D02* +X137138838Y-118712252D01* +X137598457Y-118758214D01* +X137552495Y-118712252D01* +X137506533Y-118620328D01* +X137506533Y-118390519D01* +X137552495Y-118298595D01* +X137598457Y-118252633D01* +X137690380Y-118206671D01* +X137920190Y-118206671D01* +X138012114Y-118252633D01* +X138058076Y-118298595D01* +X138104038Y-118390519D01* +X138104038Y-118620328D01* +X138058076Y-118712252D01* +X138012114Y-118758214D01* +G04 #@! TO.C,R9* +X140869238Y-119625823D02* +X140409619Y-119947557D01* +X140869238Y-120177366D02* +X139904038Y-120177366D01* +X139904038Y-119809671D01* +X139950000Y-119717747D01* +X139995961Y-119671785D01* +X140087885Y-119625823D01* +X140225771Y-119625823D01* +X140317695Y-119671785D01* +X140363657Y-119717747D01* +X140409619Y-119809671D01* +X140409619Y-120177366D01* +X140869238Y-119166204D02* +X140869238Y-118982357D01* +X140823276Y-118890433D01* +X140777314Y-118844471D01* +X140639428Y-118752547D01* +X140455580Y-118706585D01* +X140087885Y-118706585D01* +X139995961Y-118752547D01* +X139950000Y-118798509D01* +X139904038Y-118890433D01* +X139904038Y-119074280D01* +X139950000Y-119166204D01* +X139995961Y-119212166D01* +X140087885Y-119258128D01* +X140317695Y-119258128D01* +X140409619Y-119212166D01* +X140455580Y-119166204D01* +X140501542Y-119074280D01* +X140501542Y-118890433D01* +X140455580Y-118798509D01* +X140409619Y-118752547D01* +X140317695Y-118706585D01* +G04 #@! TO.C,C7* +X143754090Y-122122114D02* +X143708128Y-122168076D01* +X143570242Y-122214038D01* +X143478318Y-122214038D01* +X143340433Y-122168076D01* +X143248509Y-122076152D01* +X143202547Y-121984228D01* +X143156585Y-121800380D01* +X143156585Y-121662495D01* +X143202547Y-121478647D01* +X143248509Y-121386723D01* +X143340433Y-121294800D01* +X143478318Y-121248838D01* +X143570242Y-121248838D01* +X143708128Y-121294800D01* +X143754090Y-121340761D01* +X144075823Y-121248838D02* +X144719290Y-121248838D01* +X144305633Y-122214038D01* +G04 #@! TO.C,C2* +X183870476Y-105005514D02* +X183824514Y-105051476D01* +X183686628Y-105097438D01* +X183594704Y-105097438D01* +X183456819Y-105051476D01* +X183364895Y-104959552D01* +X183318933Y-104867628D01* +X183272971Y-104683780D01* +X183272971Y-104545895D01* +X183318933Y-104362047D01* +X183364895Y-104270123D01* +X183456819Y-104178200D01* +X183594704Y-104132238D01* +X183686628Y-104132238D01* +X183824514Y-104178200D01* +X183870476Y-104224161D01* +X184238171Y-104224161D02* +X184284133Y-104178200D01* +X184376057Y-104132238D01* +X184605866Y-104132238D01* +X184697790Y-104178200D01* +X184743752Y-104224161D01* +X184789714Y-104316085D01* +X184789714Y-104408009D01* +X184743752Y-104545895D01* +X184192209Y-105097438D01* +X184789714Y-105097438D01* +G04 #@! TO.C,C4* +X185074090Y-114562114D02* +X185028128Y-114608076D01* +X184890242Y-114654038D01* +X184798318Y-114654038D01* +X184660433Y-114608076D01* +X184568509Y-114516152D01* +X184522547Y-114424228D01* +X184476585Y-114240380D01* +X184476585Y-114102495D01* +X184522547Y-113918647D01* +X184568509Y-113826723D01* +X184660433Y-113734800D01* +X184798318Y-113688838D01* +X184890242Y-113688838D01* +X185028128Y-113734800D01* +X185074090Y-113780761D01* +X185901404Y-114010571D02* +X185901404Y-114654038D01* +X185671595Y-113642876D02* +X185441785Y-114332304D01* +X186039290Y-114332304D01* +G04 #@! TO.C,D1* +X182499238Y-111817366D02* +X181534038Y-111817366D01* +X181534038Y-111587557D01* +X181580000Y-111449671D01* +X181671923Y-111357747D01* +X181763847Y-111311785D01* +X181947695Y-111265823D01* +X182085580Y-111265823D01* +X182269428Y-111311785D01* +X182361352Y-111357747D01* +X182453276Y-111449671D01* +X182499238Y-111587557D01* +X182499238Y-111817366D01* +X182499238Y-110346585D02* +X182499238Y-110898128D01* +X182499238Y-110622357D02* +X181534038Y-110622357D01* +X181671923Y-110714280D01* +X181763847Y-110806204D01* +X181809809Y-110898128D01* +G04 #@! TO.C,C1* +X181664090Y-95692114D02* +X181618128Y-95738076D01* +X181480242Y-95784038D01* +X181388318Y-95784038D01* +X181250433Y-95738076D01* +X181158509Y-95646152D01* +X181112547Y-95554228D01* +X181066585Y-95370380D01* +X181066585Y-95232495D01* +X181112547Y-95048647D01* +X181158509Y-94956723D01* +X181250433Y-94864800D01* +X181388318Y-94818838D01* +X181480242Y-94818838D01* +X181618128Y-94864800D01* +X181664090Y-94910761D01* +X182583328Y-95784038D02* +X182031785Y-95784038D01* +X182307557Y-95784038D02* +X182307557Y-94818838D01* +X182215633Y-94956723D01* +X182123709Y-95048647D01* +X182031785Y-95094609D01* +G04 #@! TO.C,C3* +X186124090Y-109702114D02* +X186078128Y-109748076D01* +X185940242Y-109794038D01* +X185848318Y-109794038D01* +X185710433Y-109748076D01* +X185618509Y-109656152D01* +X185572547Y-109564228D01* +X185526585Y-109380380D01* +X185526585Y-109242495D01* +X185572547Y-109058647D01* +X185618509Y-108966723D01* +X185710433Y-108874800D01* +X185848318Y-108828838D01* +X185940242Y-108828838D01* +X186078128Y-108874800D01* +X186124090Y-108920761D01* +X186445823Y-108828838D02* +X187043328Y-108828838D01* +X186721595Y-109196533D01* +X186859480Y-109196533D01* +X186951404Y-109242495D01* +X186997366Y-109288457D01* +X187043328Y-109380380D01* +X187043328Y-109610190D01* +X186997366Y-109702114D01* +X186951404Y-109748076D01* +X186859480Y-109794038D01* +X186583709Y-109794038D01* +X186491785Y-109748076D01* +X186445823Y-109702114D01* +G04 #@! TO.C,R3* +X131809238Y-118285823D02* +X131349619Y-118607557D01* +X131809238Y-118837366D02* +X130844038Y-118837366D01* +X130844038Y-118469671D01* +X130890000Y-118377747D01* +X130935961Y-118331785D01* +X131027885Y-118285823D01* +X131165771Y-118285823D01* +X131257695Y-118331785D01* +X131303657Y-118377747D01* +X131349619Y-118469671D01* +X131349619Y-118837366D01* +X130844038Y-117964090D02* +X130844038Y-117366585D01* +X131211733Y-117688318D01* +X131211733Y-117550433D01* +X131257695Y-117458509D01* +X131303657Y-117412547D01* +X131395580Y-117366585D01* +X131625390Y-117366585D01* +X131717314Y-117412547D01* +X131763276Y-117458509D01* +X131809238Y-117550433D01* +X131809238Y-117826204D01* +X131763276Y-117918128D01* +X131717314Y-117964090D01* +G04 #@! TO.C,JP3* +X172264938Y-120934785D02* +X172954366Y-120934785D01* +X173092252Y-120980747D01* +X173184176Y-121072671D01* +X173230138Y-121210557D01* +X173230138Y-121302480D01* +X173230138Y-120475166D02* +X172264938Y-120475166D01* +X172264938Y-120107471D01* +X172310900Y-120015547D01* +X172356861Y-119969585D01* +X172448785Y-119923623D01* +X172586671Y-119923623D01* +X172678595Y-119969585D01* +X172724557Y-120015547D01* +X172770519Y-120107471D01* +X172770519Y-120475166D01* +X172264938Y-119601890D02* +X172264938Y-119004385D01* +X172632633Y-119326118D01* +X172632633Y-119188233D01* +X172678595Y-119096309D01* +X172724557Y-119050347D01* +X172816480Y-119004385D01* +X173046290Y-119004385D01* +X173138214Y-119050347D01* +X173184176Y-119096309D01* +X173230138Y-119188233D01* +X173230138Y-119464004D01* +X173184176Y-119555928D01* +X173138214Y-119601890D01* +G04 #@! TO.C,R11* +X163004038Y-97785909D02* +X162544419Y-98107642D01* +X163004038Y-98337452D02* +X162038838Y-98337452D01* +X162038838Y-97969757D01* +X162084800Y-97877833D01* +X162130761Y-97831871D01* +X162222685Y-97785909D01* +X162360571Y-97785909D01* +X162452495Y-97831871D01* +X162498457Y-97877833D01* +X162544419Y-97969757D01* +X162544419Y-98337452D01* +X163004038Y-96866671D02* +X163004038Y-97418214D01* +X163004038Y-97142442D02* +X162038838Y-97142442D01* +X162176723Y-97234366D01* +X162268647Y-97326290D01* +X162314609Y-97418214D01* +X163004038Y-95947433D02* +X163004038Y-96498976D01* +X163004038Y-96223204D02* +X162038838Y-96223204D01* +X162176723Y-96315128D01* +X162268647Y-96407052D01* +X162314609Y-96498976D01* +G04 #@! TO.C,JP4* +X117121538Y-87912681D02* +X117810966Y-87912681D01* +X117948852Y-87958642D01* +X118040776Y-88050566D01* +X118086738Y-88188452D01* +X118086738Y-88280376D01* +X118086738Y-87453062D02* +X117121538Y-87453062D01* +X117121538Y-87085366D01* +X117167500Y-86993442D01* +X117213461Y-86947481D01* +X117305385Y-86901519D01* +X117443271Y-86901519D01* +X117535195Y-86947481D01* +X117581157Y-86993442D01* +X117627119Y-87085366D01* +X117627119Y-87453062D01* +X117443271Y-86074204D02* +X118086738Y-86074204D01* +X117075576Y-86304014D02* +X117765004Y-86533823D01* +X117765004Y-85936319D01* +G04 #@! TO.C,C10* +X149184938Y-121897314D02* +X149138976Y-121943276D01* +X149001090Y-121989238D01* +X148909166Y-121989238D01* +X148771281Y-121943276D01* +X148679357Y-121851352D01* +X148633395Y-121759428D01* +X148587433Y-121575580D01* +X148587433Y-121437695D01* +X148633395Y-121253847D01* +X148679357Y-121161923D01* +X148771281Y-121070000D01* +X148909166Y-121024038D01* +X149001090Y-121024038D01* +X149138976Y-121070000D01* +X149184938Y-121115961D01* +X150104176Y-121989238D02* +X149552633Y-121989238D01* +X149828404Y-121989238D02* +X149828404Y-121024038D01* +X149736481Y-121161923D01* +X149644557Y-121253847D01* +X149552633Y-121299809D01* +X150701681Y-121024038D02* +X150793604Y-121024038D01* +X150885528Y-121070000D01* +X150931490Y-121115961D01* +X150977452Y-121207885D01* +X151023414Y-121391733D01* +X151023414Y-121621542D01* +X150977452Y-121805390D01* +X150931490Y-121897314D01* +X150885528Y-121943276D01* +X150793604Y-121989238D01* +X150701681Y-121989238D01* +X150609757Y-121943276D01* +X150563795Y-121897314D01* +X150517833Y-121805390D01* +X150471871Y-121621542D01* +X150471871Y-121391733D01* +X150517833Y-121207885D01* +X150563795Y-121115961D01* +X150609757Y-121070000D01* +X150701681Y-121024038D01* +G04 #@! TO.C,C9* +X159174090Y-94462114D02* +X159128128Y-94508076D01* +X158990242Y-94554038D01* +X158898318Y-94554038D01* +X158760433Y-94508076D01* +X158668509Y-94416152D01* +X158622547Y-94324228D01* +X158576585Y-94140380D01* +X158576585Y-94002495D01* +X158622547Y-93818647D01* +X158668509Y-93726723D01* +X158760433Y-93634800D01* +X158898318Y-93588838D01* +X158990242Y-93588838D01* +X159128128Y-93634800D01* +X159174090Y-93680761D01* +X159633709Y-94554038D02* +X159817557Y-94554038D01* +X159909480Y-94508076D01* +X159955442Y-94462114D01* +X160047366Y-94324228D01* +X160093328Y-94140380D01* +X160093328Y-93772685D01* +X160047366Y-93680761D01* +X160001404Y-93634800D01* +X159909480Y-93588838D01* +X159725633Y-93588838D01* +X159633709Y-93634800D01* +X159587747Y-93680761D01* +X159541785Y-93772685D01* +X159541785Y-94002495D01* +X159587747Y-94094419D01* +X159633709Y-94140380D01* +X159725633Y-94186342D01* +X159909480Y-94186342D01* +X160001404Y-94140380D01* +X160047366Y-94094419D01* +X160093328Y-94002495D01* +G04 #@! TO.C,C11* +X126904938Y-107477314D02* +X126858976Y-107523276D01* +X126721090Y-107569238D01* +X126629166Y-107569238D01* +X126491281Y-107523276D01* +X126399357Y-107431352D01* +X126353395Y-107339428D01* +X126307433Y-107155580D01* +X126307433Y-107017695D01* +X126353395Y-106833847D01* +X126399357Y-106741923D01* +X126491281Y-106650000D01* +X126629166Y-106604038D01* +X126721090Y-106604038D01* +X126858976Y-106650000D01* +X126904938Y-106695961D01* +X127824176Y-107569238D02* +X127272633Y-107569238D01* +X127548404Y-107569238D02* +X127548404Y-106604038D01* +X127456481Y-106741923D01* +X127364557Y-106833847D01* +X127272633Y-106879809D01* +X128743414Y-107569238D02* +X128191871Y-107569238D01* +X128467642Y-107569238D02* +X128467642Y-106604038D01* +X128375719Y-106741923D01* +X128283795Y-106833847D01* +X128191871Y-106879809D01* +G04 #@! TO.C,R14* +X129469238Y-99065061D02* +X129009619Y-99386795D01* +X129469238Y-99616604D02* +X128504038Y-99616604D01* +X128504038Y-99248909D01* +X128550000Y-99156985D01* +X128595961Y-99111023D01* +X128687885Y-99065061D01* +X128825771Y-99065061D01* +X128917695Y-99111023D01* +X128963657Y-99156985D01* +X129009619Y-99248909D01* +X129009619Y-99616604D01* +X129469238Y-98145823D02* +X129469238Y-98697366D01* +X129469238Y-98421595D02* +X128504038Y-98421595D01* +X128641923Y-98513518D01* +X128733847Y-98605442D01* +X128779809Y-98697366D01* +X128825771Y-97318509D02* +X129469238Y-97318509D01* +X128458076Y-97548318D02* +X129147504Y-97778128D01* +X129147504Y-97180623D01* +G04 #@! TO.C,R15* +X125229238Y-98645061D02* +X124769619Y-98966795D01* +X125229238Y-99196604D02* +X124264038Y-99196604D01* +X124264038Y-98828909D01* +X124310000Y-98736985D01* +X124355961Y-98691023D01* +X124447885Y-98645061D01* +X124585771Y-98645061D01* +X124677695Y-98691023D01* +X124723657Y-98736985D01* +X124769619Y-98828909D01* +X124769619Y-99196604D01* +X125229238Y-97725823D02* +X125229238Y-98277366D01* +X125229238Y-98001595D02* +X124264038Y-98001595D01* +X124401923Y-98093518D01* +X124493847Y-98185442D01* +X124539809Y-98277366D01* +X124264038Y-96852547D02* +X124264038Y-97312166D01* +X124723657Y-97358128D01* +X124677695Y-97312166D01* +X124631733Y-97220242D01* +X124631733Y-96990433D01* +X124677695Y-96898509D01* +X124723657Y-96852547D01* +X124815580Y-96806585D01* +X125045390Y-96806585D01* +X125137314Y-96852547D01* +X125183276Y-96898509D01* +X125229238Y-96990433D01* +X125229238Y-97220242D01* +X125183276Y-97312166D01* +X125137314Y-97358128D01* +G04 #@! TO.C,R16* +X162842590Y-89044638D02* +X162520857Y-88585019D01* +X162291047Y-89044638D02* +X162291047Y-88079438D01* +X162658742Y-88079438D01* +X162750666Y-88125400D01* +X162796628Y-88171361D01* +X162842590Y-88263285D01* +X162842590Y-88401171D01* +X162796628Y-88493095D01* +X162750666Y-88539057D01* +X162658742Y-88585019D01* +X162291047Y-88585019D01* +X163761828Y-89044638D02* +X163210285Y-89044638D01* +X163486057Y-89044638D02* +X163486057Y-88079438D01* +X163394133Y-88217323D01* +X163302209Y-88309247D01* +X163210285Y-88355209D01* +X164589142Y-88079438D02* +X164405295Y-88079438D01* +X164313371Y-88125400D01* +X164267409Y-88171361D01* +X164175485Y-88309247D01* +X164129523Y-88493095D01* +X164129523Y-88860790D01* +X164175485Y-88952714D01* +X164221447Y-88998676D01* +X164313371Y-89044638D01* +X164497218Y-89044638D01* +X164589142Y-88998676D01* +X164635104Y-88952714D01* +X164681066Y-88860790D01* +X164681066Y-88630980D01* +X164635104Y-88539057D01* +X164589142Y-88493095D01* +X164497218Y-88447133D01* +X164313371Y-88447133D01* +X164221447Y-88493095D01* +X164175485Y-88539057D01* +X164129523Y-88630980D01* +G04 #@! TO.C,R1* +D22* +X189079047Y-100127279D02* +X188504523Y-100529446D01* +X189079047Y-100816708D02* +X187872547Y-100816708D01* +X187872547Y-100357089D01* +X187930000Y-100242184D01* +X187987452Y-100184732D01* +X188102357Y-100127279D01* +X188274714Y-100127279D01* +X188389619Y-100184732D01* +X188447071Y-100242184D01* +X188504523Y-100357089D01* +X188504523Y-100816708D01* +X189079047Y-98978232D02* +X189079047Y-99667660D01* +X189079047Y-99322946D02* +X187872547Y-99322946D01* +X188044904Y-99437851D01* +X188159809Y-99552755D01* +X188217261Y-99667660D01* +G04 #@! TO.C,JP1* +D20* +X84492380Y-97213333D02* +X85206666Y-97213333D01* +X85349523Y-97260952D01* +X85444761Y-97356190D01* +X85492380Y-97499047D01* +X85492380Y-97594285D01* +X85492380Y-96737142D02* +X84492380Y-96737142D01* +X84492380Y-96356190D01* +X84540000Y-96260952D01* +X84587619Y-96213333D01* +X84682857Y-96165714D01* +X84825714Y-96165714D01* +X84920952Y-96213333D01* +X84968571Y-96260952D01* +X85016190Y-96356190D01* +X85016190Y-96737142D01* +X85492380Y-95213333D02* +X85492380Y-95784761D01* +X85492380Y-95499047D02* +X84492380Y-95499047D01* +X84635238Y-95594285D01* +X84730476Y-95689523D01* +X84778095Y-95784761D01* +G04 #@! TO.C,JP2* +X84492380Y-113103333D02* +X85206666Y-113103333D01* +X85349523Y-113150952D01* +X85444761Y-113246190D01* +X85492380Y-113389047D01* +X85492380Y-113484285D01* +X85492380Y-112627142D02* +X84492380Y-112627142D01* +X84492380Y-112246190D01* +X84540000Y-112150952D01* +X84587619Y-112103333D01* +X84682857Y-112055714D01* +X84825714Y-112055714D01* +X84920952Y-112103333D01* +X84968571Y-112150952D01* +X85016190Y-112246190D01* +X85016190Y-112627142D01* +X84587619Y-111674761D02* +X84540000Y-111627142D01* +X84492380Y-111531904D01* +X84492380Y-111293809D01* +X84540000Y-111198571D01* +X84587619Y-111150952D01* +X84682857Y-111103333D01* +X84778095Y-111103333D01* +X84920952Y-111150952D01* +X85492380Y-111722380D01* +X85492380Y-111103333D01* +G04 #@! TD* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Top.gtl b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Top.gtl new file mode 100644 index 0000000..2765529 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-Top.gtl @@ -0,0 +1,3798 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.0+dfsg1-2* +G04 #@! TF.CreationDate,2019-01-23T11:39:39+01:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534C435F467265655F5043422E6B6963,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L1,Top,Signal* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.0.0+dfsg1-2) date Wed Jan 23 11:39:39 2019* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,ComponentPad* +%ADD10O,1.320800X2.641600*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD11C,1.320800*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD12C,1.676400*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD13O,1.676400X3.352800*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD14C,1.270000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD15O,1.524000X3.048000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD16R,3.700000X3.700000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD17C,3.700000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD18C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD19C,0.711200*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD20C,1.006400*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD21C,1.350000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD22C,0.609600*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD23C,0.304800*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD24C,0.203200*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD25C,1.016000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD26C,0.254000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +G04 #@! TO.P,IC2,28* +G04 #@! TO.N,+5V* +X133347300Y-103848000D03* +G04 #@! TO.P,IC2,27* +G04 #@! TO.N,/RT_ADC* +X135887300Y-103848000D03* +G04 #@! TO.P,IC2,26* +G04 #@! TO.N,/P0[4]* +X138427300Y-103848000D03* +G04 #@! TO.P,IC2,25* +G04 #@! TO.N,/AC_TEMP_SENSE_OUT* +X140967300Y-103848000D03* +G04 #@! TO.P,IC2,24* +G04 #@! TO.N,/RE+_ADC* +X143507300Y-103848000D03* +G04 #@! TO.P,IC2,23* +G04 #@! TO.N,/LCD_RW* +X146047300Y-103848000D03* +G04 #@! TO.P,IC2,22* +G04 #@! TO.N,/LCD_E* +X148587300Y-103848000D03* +G04 #@! TO.P,IC2,21* +G04 #@! TO.N,/LCD_DB6* +X151127300Y-103848000D03* +G04 #@! TO.P,IC2,20* +G04 #@! TO.N,/LCD_DB4* +X153667300Y-103848000D03* +G04 #@! TO.P,IC2,19* +G04 #@! TO.N,/XRES* +X156207300Y-103848000D03* +G04 #@! TO.P,IC2,18* +G04 #@! TO.N,/PWM_NB_OUT* +X158747300Y-103848000D03* +G04 #@! TO.P,IC2,17* +G04 #@! TO.N,/PWM_HEATER* +X161287300Y-103848000D03* +G04 #@! TO.P,IC2,16* +G04 #@! TO.N,/CAL* +X163827300Y-103848000D03* +G04 #@! TO.P,IC2,15* +G04 #@! TO.N,/PROG_SDA* +X166367300Y-103848000D03* +G04 #@! TO.P,IC2,14* +G04 #@! TO.N,GND* +X166367300Y-111468000D03* +G04 #@! TO.P,IC2,13* +G04 #@! TO.N,/PROG_SCL* +X163827300Y-111468000D03* +G04 #@! TO.P,IC2,12* +G04 #@! TO.N,/P1[3]* +X161287300Y-111468000D03* +G04 #@! TO.P,IC2,11* +G04 #@! TO.N,/PWM_LIN_OUT* +X158747300Y-111468000D03* +G04 #@! TO.P,IC2,10* +G04 #@! TO.N,/P1[7]* +X156207300Y-111468000D03* +G04 #@! TO.P,IC2,9* +G04 #@! TO.N,Net-(IC2-Pad9)* +X153667300Y-111468000D03* +G04 #@! TO.P,IC2,5* +G04 #@! TO.N,/P2[7]* +X143507300Y-111468000D03* +G04 #@! TO.P,IC2,6* +G04 #@! TO.N,/LCD_RS* +X146047300Y-111468000D03* +G04 #@! TO.P,IC2,4* +G04 #@! TO.N,/INSAMP_VREF* +X140967300Y-111468000D03* +G04 #@! TO.P,IC2,3* +G04 #@! TO.N,/LSU_VGND* +X138427300Y-111468000D03* +G04 #@! TO.P,IC2,8* +G04 #@! TO.N,/LCD_DB5* +X151127300Y-111468000D03* +G04 #@! TO.P,IC2,7* +G04 #@! TO.N,/LCD_DB7* +X148587300Y-111468000D03* +G04 #@! TO.P,IC2,2* +G04 #@! TO.N,/LSU_IA* +X135887300Y-111468000D03* +G04 #@! TO.P,IC2,1* +G04 #@! TO.N,/APE_ADC* +X133347300Y-111468000D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R13,2* +G04 #@! TO.N,Net-(IC3-PadG)* +X124025500Y-118961000D03* +G04 #@! TO.P,R13,1* +G04 #@! TO.N,/PWM_HEATER* +X124025500Y-111341000D03* +G04 #@! TD* +G04 #@! TO.P,R4,2* +G04 #@! TO.N,Net-(C6-Pad2)* +X138300300Y-101079400D03* +G04 #@! TO.P,R4,1* +G04 #@! TO.N,/LSU_NERMEST* +X138300300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.P,R12,2* +G04 #@! TO.N,LIN_OUT* +X152981500Y-122136000D03* +G04 #@! TO.P,R12,1* +G04 #@! TO.N,/PWM_LIN_OUT* +X152981500Y-114516000D03* +G04 #@! TD* +G04 #@! TO.P,R10,2* +G04 #@! TO.N,GND* +X156105700Y-92926000D03* +G04 #@! TO.P,R10,1* +G04 #@! TO.N,/XRES* +X156105700Y-100546000D03* +G04 #@! TD* +G04 #@! TO.P,C6,2* +G04 #@! TO.N,Net-(C6-Pad2)* +X141145100Y-96050200D03* +G04 #@! TO.P,C6,1* +G04 #@! TO.N,/AC_TEMP_SENSE_OUT* +X141145100Y-98590200D03* +G04 #@! TD* +G04 #@! TO.P,C8,2* +G04 #@! TO.N,GND* +X153130000Y-93740000D03* +G04 #@! TO.P,C8,1* +G04 #@! TO.N,/XRES* +X153130000Y-96280000D03* +G04 #@! TD* +G04 #@! TO.P,C5,2* +G04 #@! TO.N,GND* +X133347300Y-97498000D03* +G04 #@! TO.P,C5,1* +G04 #@! TO.N,+5V* +X133347300Y-100038000D03* +G04 #@! TD* +D12* +G04 #@! TO.P,D2,C* +G04 #@! TO.N,Net-(D2-PadC)* +X183690100Y-89852600D03* +G04 #@! TO.P,D2,A* +G04 #@! TO.N,+12V* +X173530100Y-89852600D03* +G04 #@! TD* +G04 #@! TO.P,D3,C* +G04 #@! TO.N,Net-(C1-Pad+)* +X183715500Y-93103800D03* +G04 #@! TO.P,D3,A* +G04 #@! TO.N,GND* +X173555500Y-93103800D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R8,2* +G04 #@! TO.N,/RE+_ADC* +X144777300Y-101079400D03* +G04 #@! TO.P,R8,1* +G04 #@! TO.N,/LSU_NERMEST* +X144777300Y-93459400D03* +G04 #@! TD* +G04 #@! TO.P,R2,2* +G04 #@! TO.N,/LSU_IP* +X128775300Y-121805800D03* +G04 #@! TO.P,R2,1* +G04 #@! TO.N,/APE_ADC* +X128775300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.P,R6,2* +G04 #@! TO.N,/RT_ADC* +X133702900Y-121805800D03* +G04 #@! TO.P,R6,1* +G04 #@! TO.N,/LSU_IA* +X133702900Y-114185800D03* +G04 #@! TD* +G04 #@! TO.P,R7,2* +G04 #@! TO.N,/LSU_NERMEST* +X147926900Y-93459400D03* +G04 #@! TO.P,R7,1* +G04 #@! TO.N,+5V* +X147926900Y-101079400D03* +G04 #@! TD* +D13* +G04 #@! TO.P,IC3,S* +G04 #@! TO.N,/H_GND* +X121180700Y-115125600D03* +G04 #@! TO.P,IC3,D* +G04 #@! TO.N,LSU_HEATER-* +X118640700Y-115125600D03* +G04 #@! TO.P,IC3,G* +G04 #@! TO.N,Net-(IC3-PadG)* +X116100700Y-115125600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R5,2* +G04 #@! TO.N,/INSAMP_VREF* +X137741500Y-114185800D03* +G04 #@! TO.P,R5,1* +G04 #@! TO.N,+5V* +X137741500Y-121805800D03* +G04 #@! TD* +G04 #@! TO.P,R9,2* +G04 #@! TO.N,GND* +X140332300Y-121805800D03* +G04 #@! TO.P,R9,1* +G04 #@! TO.N,/INSAMP_VREF* +X140332300Y-114185800D03* +G04 #@! TD* +G04 #@! TO.P,C7,2* +G04 #@! TO.N,GND* +X144040700Y-119900800D03* +G04 #@! TO.P,C7,1* +G04 #@! TO.N,/INSAMP_VREF* +X144040700Y-117360800D03* +G04 #@! TD* +D13* +G04 #@! TO.P,IC1,3* +G04 #@! TO.N,+5V* +X176654300Y-113957200D03* +G04 #@! TO.P,IC1,2* +G04 #@! TO.N,GND* +X174114300Y-113957200D03* +G04 #@! TO.P,IC1,1* +G04 #@! TO.N,Net-(C1-Pad+)* +X171574300Y-113957200D03* +G04 #@! TD* +D11* +G04 #@! TO.P,C2,2* +G04 #@! TO.N,GND* +X181480300Y-102654200D03* +G04 #@! TO.P,C2,1* +G04 #@! TO.N,Net-(C1-Pad+)* +X184020300Y-102654200D03* +G04 #@! TD* +G04 #@! TO.P,C4,2* +G04 #@! TO.N,GND* +X187677900Y-116294000D03* +G04 #@! TO.P,C4,1* +G04 #@! TO.N,+5V* +X185137900Y-116294000D03* +G04 #@! TD* +D12* +G04 #@! TO.P,D1,C* +G04 #@! TO.N,Net-(C1-Pad+)* +X182039100Y-105270400D03* +G04 #@! TO.P,D1,A* +G04 #@! TO.N,+5V* +X182039100Y-115430400D03* +G04 #@! TD* +D14* +G04 #@! TO.P,C1,+* +G04 #@! TO.N,Net-(C1-Pad+)* +X184274300Y-98361600D03* +G04 #@! TO.P,C1,-* +G04 #@! TO.N,GND* +X182242300Y-98361600D03* +G04 #@! TD* +G04 #@! TO.P,C3,+* +G04 #@! TO.N,+5V* +X187347700Y-111061600D03* +G04 #@! TO.P,C3,-* +G04 #@! TO.N,GND* +X185315700Y-111061600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R3,2* +G04 #@! TO.N,/LSU_IA* +X131264500Y-114185800D03* +G04 #@! TO.P,R3,1* +G04 #@! TO.N,/LSU_IP* +X131264500Y-121805800D03* +G04 #@! TD* +D15* +G04 #@! TO.P,JP3,5* +G04 #@! TO.N,/PROG_SDA* +X183817100Y-120586600D03* +G04 #@! TO.P,JP3,4* +G04 #@! TO.N,/PROG_SCL* +X181277100Y-120586600D03* +G04 #@! TO.P,JP3,3* +G04 #@! TO.N,/XRES* +X178737100Y-120586600D03* +G04 #@! TO.P,JP3,2* +G04 #@! TO.N,GND* +X176197100Y-120586600D03* +G04 #@! TO.P,JP3,1* +G04 #@! TO.N,+5V* +X173657100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R11,2* +G04 #@! TO.N,NB_OUT* +X162582700Y-93205400D03* +G04 #@! TO.P,R11,1* +G04 #@! TO.N,/PWM_NB_OUT* +X162582700Y-100825400D03* +G04 #@! TD* +D15* +G04 #@! TO.P,JP4,16* +G04 #@! TO.N,GND* +X157578900Y-90309800D03* +G04 #@! TO.P,JP4,15* +G04 #@! TO.N,/LCD_ANODE* +X155038900Y-90309800D03* +G04 #@! TO.P,JP4,14* +G04 #@! TO.N,/LCD_DB7* +X152498900Y-90309800D03* +G04 #@! TO.P,JP4,13* +G04 #@! TO.N,/LCD_DB6* +X149958900Y-90309800D03* +G04 #@! TO.P,JP4,12* +G04 #@! TO.N,/LCD_DB5* +X147418900Y-90309800D03* +G04 #@! TO.P,JP4,11* +G04 #@! TO.N,/LCD_DB4* +X144878900Y-90309800D03* +G04 #@! TO.P,JP4,10* +G04 #@! TO.N,Net-(JP4-Pad10)* +X142338900Y-90309800D03* +G04 #@! TO.P,JP4,9* +G04 #@! TO.N,Net-(JP4-Pad9)* +X139798900Y-90309800D03* +G04 #@! TO.P,JP4,8* +G04 #@! TO.N,Net-(JP4-Pad8)* +X137258900Y-90309800D03* +G04 #@! TO.P,JP4,7* +G04 #@! TO.N,Net-(JP4-Pad7)* +X134718900Y-90309800D03* +G04 #@! TO.P,JP4,6* +G04 #@! TO.N,/LCD_E* +X132178900Y-90309800D03* +G04 #@! TO.P,JP4,5* +G04 #@! TO.N,/LCD_RW* +X129638900Y-90309800D03* +G04 #@! TO.P,JP4,4* +G04 #@! TO.N,/LCD_RS* +X127098900Y-90309800D03* +G04 #@! TO.P,JP4,3* +G04 #@! TO.N,/LCD_CONTRAST* +X124558900Y-90309800D03* +G04 #@! TO.P,JP4,2* +G04 #@! TO.N,+5V* +X122018900Y-90309800D03* +G04 #@! TO.P,JP4,1* +G04 #@! TO.N,GND* +X119478900Y-90309800D03* +G04 #@! TD* +D11* +G04 #@! TO.P,C10,2* +G04 #@! TO.N,GND* +X150238300Y-117056000D03* +G04 #@! TO.P,C10,1* +G04 #@! TO.N,LIN_OUT* +X150238300Y-119596000D03* +G04 #@! TD* +G04 #@! TO.P,C9,2* +G04 #@! TO.N,GND* +X159356900Y-98514000D03* +G04 #@! TO.P,C9,1* +G04 #@! TO.N,NB_OUT* +X159356900Y-95974000D03* +G04 #@! TD* +G04 #@! TO.P,C11,2* +G04 #@! TO.N,GND* +X126463900Y-104889400D03* +G04 #@! TO.P,C11,1* +G04 #@! TO.N,+5V* +X129003900Y-104889400D03* +G04 #@! TD* +G04 #@! TO.P,R14,2* +G04 #@! TO.N,+5V* +X129003900Y-102171600D03* +G04 #@! TO.P,R14,1* +G04 #@! TO.N,/LCD_CONTRAST* +X129003900Y-94551600D03* +G04 #@! TD* +G04 #@! TO.P,R15,2* +G04 #@! TO.N,/LCD_CONTRAST* +X126565500Y-94551600D03* +G04 #@! TO.P,R15,1* +G04 #@! TO.N,GND* +X126565500Y-102171600D03* +G04 #@! TD* +G04 #@! TO.P,R16,2* +G04 #@! TO.N,+5V* +X168348500Y-90386000D03* +G04 #@! TO.P,R16,1* +G04 #@! TO.N,/LCD_ANODE* +X160728500Y-90386000D03* +G04 #@! TD* +D15* +G04 #@! TO.P,JP5,6* +G04 #@! TO.N,+5V* +X169593100Y-120586600D03* +G04 #@! TO.P,JP5,5* +G04 #@! TO.N,GND* +X167053100Y-120586600D03* +G04 #@! TO.P,JP5,4* +G04 #@! TO.N,/P2[7]* +X164513100Y-120586600D03* +G04 #@! TO.P,JP5,3* +G04 #@! TO.N,/P1[7]* +X161973100Y-120586600D03* +G04 #@! TO.P,JP5,2* +G04 #@! TO.N,/P1[3]* +X159433100Y-120586600D03* +G04 #@! TO.P,JP5,1* +G04 #@! TO.N,/P0[4]* +X156893100Y-120586600D03* +G04 #@! TD* +D11* +G04 #@! TO.P,R1,2* +G04 #@! TO.N,Net-(C1-Pad+)* +X188541500Y-108089800D03* +G04 #@! TO.P,R1,1* +G04 #@! TO.N,Net-(D2-PadC)* +X188541500Y-95389800D03* +G04 #@! TD* +D16* +G04 #@! TO.P,JP1,1* +G04 #@! TO.N,NB_OUT* +X102140000Y-99230000D03* +D17* +G04 #@! TO.P,JP1,2* +G04 #@! TO.N,LIN_OUT* +X102140000Y-93530000D03* +G04 #@! TO.P,JP1,3* +G04 #@! TO.N,GND* +X107640000Y-99230000D03* +G04 #@! TO.P,JP1,4* +G04 #@! TO.N,+12V* +X107640000Y-93530000D03* +G04 #@! TD* +D16* +G04 #@! TO.P,JP2,1* +G04 #@! TO.N,+12V* +X102140000Y-117970000D03* +D17* +G04 #@! TO.P,JP2,2* +G04 #@! TO.N,LSU_HEATER-* +X102140000Y-112270000D03* +G04 #@! TO.P,JP2,3* +G04 #@! TO.N,/LSU_IA* +X102140000Y-106570000D03* +G04 #@! TO.P,JP2,4* +G04 #@! TO.N,/LSU_IP* +X107640000Y-117970000D03* +G04 #@! TO.P,JP2,5* +G04 #@! TO.N,/LSU_NERMEST* +X107640000Y-112270000D03* +G04 #@! TO.P,JP2,6* +G04 #@! TO.N,/LSU_VGND* +X107640000Y-106570000D03* +G04 #@! TD* +D18* +G04 #@! TO.N,GND* +X135750000Y-121210000D03* +X135750000Y-116590000D03* +X142220000Y-107750000D03* +X142200000Y-119850000D03* +X151330000Y-107880000D03* +X147820000Y-120240000D03* +D19* +G04 #@! TO.N,+5V* +X147926900Y-97244000D03* +X129003900Y-100038000D03* +X127784700Y-93357800D03* +X136852500Y-100038000D03* +X167535700Y-97244000D03* +G04 #@! TO.N,/P0[4]* +X138427300Y-109080400D03* +X157223300Y-109283600D03* +G04 #@! TO.N,/LCD_RW* +X146047300Y-97574200D03* +X130731100Y-98514000D03* +D18* +X136610000Y-97574200D03* +D19* +G04 #@! TO.N,/LCD_E* +X148942900Y-96532800D03* +X131442300Y-96278800D03* +G04 #@! TO.N,/LCD_DB4* +X143913700Y-99377600D03* +X153667300Y-100063400D03* +G04 #@! TO.N,/XRES* +X155191300Y-118783200D03* +G04 #@! TO.N,/PWM_NB_OUT* +X158747300Y-100825400D03* +G04 #@! TO.N,/PWM_HEATER* +X126159100Y-111341000D03* +X126209900Y-119062600D03* +X138046300Y-116344800D03* +X160271300Y-118072000D03* +X138046300Y-117564000D03* +G04 #@! TO.N,/PROG_SDA* +X165732300Y-117487800D03* +G04 #@! TO.N,/PROG_SCL* +X163801900Y-117995800D03* +G04 #@! TO.N,/P1[3]* +X159560100Y-117360800D03* +X160982500Y-117360800D03* +G04 #@! TO.N,/PWM_LIN_OUT* +X158747300Y-114516000D03* +G04 #@! TO.N,/P1[7]* +X161973100Y-116649600D03* +X156181900Y-116649600D03* +G04 #@! TO.N,/P2[7]* +X164513100Y-115938400D03* +X143507300Y-115633600D03* +G04 #@! TO.N,/LCD_RS* +X130019900Y-109791600D03* +G04 #@! TO.N,/INSAMP_VREF* +X140332300Y-117360800D03* +G04 #@! TO.N,/LSU_VGND* +X138605100Y-118961000D03* +G04 #@! TO.N,/LCD_DB5* +X147063300Y-113169800D03* +G04 #@! TO.N,/LCD_DB7* +X149654100Y-94246800D03* +G04 #@! TO.N,/LSU_IA* +X135887300Y-114185800D03* +X131289900Y-120383400D03* +G04 #@! TO.N,/APE_ADC* +X128775300Y-111468000D03* +G04 #@! TO.N,Net-(C6-Pad2)* +X138300300Y-96050200D03* +G04 #@! TO.N,/LSU_NERMEST* +X139316300Y-119672200D03* +D20* +G04 #@! TO.N,Net-(C1-Pad+)* +X180489700Y-116344800D03* +X188566900Y-102654200D03* +D19* +G04 #@! TO.N,LIN_OUT* +X152981500Y-119596000D03* +X125447900Y-99885600D03* +X125447900Y-119570600D03* +G04 #@! TO.N,NB_OUT* +X159356900Y-93205400D03* +X124736700Y-102425600D03* +X125498700Y-95567600D03* +D18* +X107670000Y-103425600D03* +X114310000Y-103425600D03* +G04 #@! TD* +D21* +G04 #@! TO.N,GND* +X121180000Y-115124900D02* +X121180700Y-115125600D01* +X107640000Y-99230000D02* +X121180000Y-112770000D01* +X121180000Y-112770000D02* +X121180000Y-115124900D01* +D22* +X135750000Y-117155685D02* +X135750000Y-121210000D01* +D23* +X142220000Y-119750000D02* +X142120000Y-119850000D01* +D22* +X142220000Y-107750000D02* +X142220000Y-119750000D01* +D23* +X147820000Y-119474300D02* +X150238300Y-117056000D01* +X147820000Y-120240000D02* +X147820000Y-119474300D01* +X150898699Y-116395601D02* +X150898699Y-114391301D01* +X150238300Y-117056000D02* +X150898699Y-116395601D01* +X150898699Y-114391301D02* +X152390000Y-112900000D01* +X152390000Y-108940000D02* +X151330000Y-107880000D01* +X152390000Y-112900000D02* +X152390000Y-108940000D01* +D22* +X135750000Y-117155685D02* +X135750000Y-116590000D01* +G04 #@! TO.N,+5V* +X133347300Y-103848000D02* +X133347300Y-100038000D01* +D24* +X133347300Y-100038000D02* +X136852500Y-100038000D01* +X147926900Y-101079400D02* +X147926900Y-97244000D01* +D22* +X129003900Y-104889400D02* +X129003900Y-102171600D01* +D24* +X129003900Y-102171600D02* +X129003900Y-100038000D01* +D22* +X127784700Y-93357800D02* +X127784700Y-100952400D01* +X127784700Y-100952400D02* +X129003900Y-102171600D01* +D24* +X137741500Y-121805800D02* +X136776300Y-120840600D01* +X136776300Y-120840600D02* +X136776300Y-113779400D01* +X136776300Y-113779400D02* +X136852500Y-113703200D01* +X136852500Y-113703200D02* +X136852500Y-100038000D01* +D25* +X176654300Y-113957200D02* +X176654300Y-116319400D01* +X176654300Y-116319400D02* +X173657100Y-119316600D01* +X173657100Y-119316600D02* +X173657100Y-120586600D01* +D22* +X168348500Y-90386000D02* +X167535700Y-91198800D01* +X167535700Y-91198800D02* +X167535700Y-97244000D01* +X167535700Y-97244000D02* +X167535700Y-111671200D01* +X167535700Y-111671200D02* +X169593100Y-113728600D01* +X169593100Y-113728600D02* +X169593100Y-120586600D01* +D25* +X187347700Y-111061600D02* +X187347700Y-114084200D01* +X187347700Y-114084200D02* +X185137900Y-116294000D01* +D23* +G04 #@! TO.N,/RT_ADC* +X133702900Y-121805800D02* +X134871300Y-120637400D01* +X134871300Y-120637400D02* +X134871300Y-106692800D01* +X134871300Y-106692800D02* +X135887300Y-105676800D01* +X135887300Y-105676800D02* +X135887300Y-103848000D01* +G04 #@! TO.N,/P0[4]* +X156893100Y-120586600D02* +X156893100Y-112890400D01* +X156893100Y-112890400D02* +X157223300Y-112560200D01* +X138427300Y-103848000D02* +X138427300Y-109080400D01* +X157223300Y-109283600D02* +X157223300Y-112560200D01* +G04 #@! TO.N,/AC_TEMP_SENSE_OUT* +X140967300Y-103848000D02* +X140967300Y-98768000D01* +X140967300Y-98768000D02* +X141145100Y-98590200D01* +G04 #@! TO.N,/RE+_ADC* +X143507300Y-103848000D02* +X143507300Y-102349400D01* +X143507300Y-102349400D02* +X144777300Y-101079400D01* +G04 #@! TO.N,/LCD_RW* +X146047300Y-103848000D02* +X146047300Y-97574200D01* +X134210900Y-98539400D02* +X130731100Y-98514000D01* +X130731100Y-98514000D02* +X130731100Y-91402000D01* +X130731100Y-91402000D02* +X129638900Y-90309800D01* +X135176100Y-97574200D02* +X136610000Y-97574200D01* +X134210900Y-98539400D02* +X135176100Y-97574200D01* +G04 #@! TO.N,/LCD_E* +X148587300Y-103848000D02* +X148942900Y-103492400D01* +X148942900Y-103492400D02* +X148942900Y-96532800D01* +X131442300Y-96278800D02* +X131442300Y-91046400D01* +X131442300Y-91046400D02* +X132178900Y-90309800D01* +G04 #@! TO.N,/LCD_DB6* +X151127300Y-103848000D02* +X151127300Y-91478200D01* +X151127300Y-91478200D02* +X149958900Y-90309800D01* +G04 #@! TO.N,/LCD_DB4* +X144878900Y-90309800D02* +X144878900Y-91910000D01* +X144878900Y-91910000D02* +X143761300Y-93027600D01* +X153667300Y-100063400D02* +X153667300Y-103848000D01* +X143761300Y-93027600D02* +X143761300Y-99225200D01* +X143761300Y-99225200D02* +X143913700Y-99377600D01* +G04 #@! TO.N,/XRES* +X156207300Y-100647600D02* +X156105700Y-100546000D01* +X155191300Y-118783200D02* +X155191300Y-106718200D01* +X155191300Y-106718200D02* +X156207300Y-105702200D01* +X156207300Y-105702200D02* +X156207300Y-103848000D01* +X156207300Y-103848000D02* +X156207300Y-100647600D01* +X156105700Y-99255700D02* +X156105700Y-100546000D01* +X153130000Y-96280000D02* +X156105700Y-99255700D01* +G04 #@! TO.N,/PWM_NB_OUT* +X158747300Y-103848000D02* +X158747300Y-100825400D01* +G04 #@! TO.N,/PWM_HEATER* +X126159100Y-111341000D02* +X126159100Y-119011800D01* +X126159100Y-119011800D02* +X126209900Y-119062600D01* +X160271300Y-118072000D02* +X160271300Y-106616600D01* +X160271300Y-106616600D02* +X161287300Y-105600600D01* +X161287300Y-105600600D02* +X161287300Y-103848000D01* +X138046300Y-117564000D02* +X138046300Y-116344800D01* +G04 #@! TO.N,/PROG_SDA* +X165351300Y-106743600D02* +X166367300Y-105727600D01* +X166367300Y-105727600D02* +X166367300Y-103848000D01* +X165351300Y-106743600D02* +X165351300Y-117106800D01* +X165351300Y-117106800D02* +X165732300Y-117487800D01* +G04 #@! TO.N,/PROG_SCL* +X163827300Y-111468000D02* +X163827300Y-115735200D01* +X163827300Y-115735200D02* +X163801900Y-115760600D01* +X163801900Y-115760600D02* +X163801900Y-117995800D01* +G04 #@! TO.N,/P1[3]* +X159433100Y-120586600D02* +X159433100Y-117487800D01* +X159433100Y-117487800D02* +X159560100Y-117360800D01* +X160982500Y-117360800D02* +X160982500Y-111772800D01* +X160982500Y-111772800D02* +X161287300Y-111468000D01* +G04 #@! TO.N,/PWM_LIN_OUT* +X158747300Y-114516000D02* +X158747300Y-111468000D01* +G04 #@! TO.N,/P1[7]* +X161973100Y-120586600D02* +X161973100Y-116649600D01* +X156207300Y-111468000D02* +X156207300Y-116624200D01* +X156207300Y-116624200D02* +X156181900Y-116649600D01* +G04 #@! TO.N,/P2[7]* +X164513100Y-120586600D02* +X164513100Y-115938400D01* +X143507300Y-115633600D02* +X143507300Y-111468000D01* +G04 #@! TO.N,/LCD_RS* +X130019900Y-109791600D02* +X130019900Y-93230800D01* +X130019900Y-93230800D02* +X127098900Y-90309800D01* +G04 #@! TO.N,/INSAMP_VREF* +X140967300Y-111468000D02* +X140967300Y-113550800D01* +X140967300Y-113550800D02* +X140332300Y-114185800D01* +X140332300Y-117360800D02* +X140332300Y-114185800D01* +G04 #@! TO.N,/LSU_VGND* +X138605100Y-118961000D02* +X138757500Y-118808600D01* +X138757500Y-118808600D02* +X138757500Y-111798200D01* +X138757500Y-111798200D02* +X138427300Y-111468000D01* +G04 #@! TO.N,/LCD_DB5* +X147418900Y-90309800D02* +X147418900Y-92519600D01* +X147418900Y-92519600D02* +X146910900Y-93027600D01* +X146910900Y-93027600D02* +X146910900Y-101511200D01* +X146910900Y-101511200D02* +X147063300Y-101663600D01* +X147063300Y-101663600D02* +X147063300Y-113169800D01* +G04 #@! TO.N,/LCD_DB7* +X149654100Y-94246800D02* +X149654100Y-108623200D01* +X149654100Y-108623200D02* +X148587300Y-109690000D01* +X148587300Y-109690000D02* +X148587300Y-111468000D01* +G04 #@! TO.N,/LSU_IA* +X135887300Y-111468000D02* +X135887300Y-114185800D01* +X131289900Y-120383400D02* +X131264500Y-118453000D01* +X131264500Y-118453000D02* +X131264500Y-114185800D01* +G04 #@! TO.N,/APE_ADC* +X128775300Y-114185800D02* +X128775300Y-111468000D01* +G04 #@! TO.N,Net-(C6-Pad2)* +X138300300Y-101079400D02* +X138300300Y-96050200D01* +G04 #@! TO.N,/LSU_NERMEST* +X139316300Y-119672200D02* +X139316300Y-112636400D01* +X139316300Y-112636400D02* +X139443300Y-112509400D01* +X139443300Y-112509400D02* +X139443300Y-94602400D01* +X139443300Y-94602400D02* +X138300300Y-93459400D01* +D25* +G04 #@! TO.N,Net-(C1-Pad+)* +X180489700Y-116344800D02* +X180489700Y-106819800D01* +X180489700Y-106819800D02* +X182039100Y-105270400D01* +X188566900Y-102654200D02* +X184020300Y-102654200D01* +X184274300Y-98361600D02* +X184274300Y-102400200D01* +X184274300Y-102400200D02* +X184020300Y-102654200D01* +X182039100Y-105270400D02* +X184020300Y-103289200D01* +X184020300Y-103289200D02* +X184020300Y-102654200D01* +X183715500Y-93103800D02* +X184274300Y-93662600D01* +X184274300Y-93662600D02* +X184274300Y-98361600D01* +D22* +G04 #@! TO.N,/LCD_ANODE* +X155038900Y-90309800D02* +X155038900Y-88277800D01* +X155038900Y-88277800D02* +X158620300Y-88277800D01* +X158620300Y-88277800D02* +X160728500Y-90386000D01* +D23* +G04 #@! TO.N,/LCD_CONTRAST* +X124558900Y-90309800D02* +X124558900Y-92545000D01* +X124558900Y-92545000D02* +X126565500Y-94551600D01* +G04 #@! TO.N,LIN_OUT* +X152981500Y-119596000D02* +X152981500Y-122136000D01* +X125447900Y-99885600D02* +X125447900Y-119570600D01* +D22* +G04 #@! TO.N,H_GND* +X171675900Y-118097400D02* +X171675900Y-119418200D01* +D23* +G04 #@! TO.N,NB_OUT* +X159356900Y-95974000D02* +X159356900Y-93205400D01* +X124736700Y-102425600D02* +X124736700Y-96329600D01* +X124736700Y-96329600D02* +X125498700Y-95567600D01* +X102140000Y-101384800D02* +X103180800Y-102425600D01* +X102140000Y-101384800D02* +X102140000Y-99230000D01* +X104180800Y-103425600D02* +X102140000Y-101384800D01* +X107670000Y-103425600D02* +X104180800Y-103425600D01* +X123736700Y-103425600D02* +X124736700Y-102425600D01* +X114310000Y-103425600D02* +X123736700Y-103425600D01* +G04 #@! TD* +D26* +G04 #@! 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TD* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-cache.lib b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-cache.lib new file mode 100644 index 0000000..47b6c4c --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-cache.lib @@ -0,0 +1,306 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Device_CP +# +DEF Device_CP C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "Device_CP" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + CP_* +$ENDFPLIST +DRAW +S -90 20 90 40 0 1 0 N +S 90 -20 -90 -40 0 1 0 F +P 2 0 1 0 -70 90 -30 90 N +P 2 0 1 0 -50 110 -50 70 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_D +# +DEF Device_D D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "Device_D" 0 -100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + TO-???* + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +P 2 0 1 8 -50 50 -50 -50 N +P 2 0 1 0 50 0 -50 0 N +P 4 0 1 8 50 50 50 -50 -50 0 50 50 N +X K 1 -150 0 100 R 50 50 1 1 P +X A 2 150 0 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_+5V +# +DEF SLC_Free_PCB-eagle-import_+5V #P+ 0 40 Y Y 1 L P +F0 "#P+" 0 0 50 H I C CNN +F1 "SLC_Free_PCB-eagle-import_+5V" -100 -200 59 V V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 0 0 -50 -75 N +P 2 1 0 0 50 -75 0 0 N +X +5V 1 0 -100 100 U 0 0 1 0 W +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_78T +# +DEF SLC_Free_PCB-eagle-import_78T IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_78T" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VI 1 -400 0 100 R 50 50 1 0 I +X GND 2 0 -300 100 U 50 0 1 0 P +X VO 3 400 0 100 L 50 50 1 0 P +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_BUZ11BH +# +DEF SLC_Free_PCB-eagle-import_BUZ11BH Q 0 40 Y Y 1 L N +F0 "Q" 200 100 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_BUZ11BH" 200 0 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 100 -75 5 1 0 16 N +T 0 50 100 27 0 1 0 D Normal 0 L B +T 0 -100 -50 27 0 1 0 G Normal 0 L B +T 0 50 -125 27 0 1 0 S Normal 0 L B +S -10 -100 20 -50 1 0 0 F +S -10 -35 20 35 1 0 0 F +S -10 50 20 100 1 0 0 F +P 2 1 0 0 -44 -100 -100 -100 N +P 2 1 0 0 -44 95 -44 -100 N +P 2 1 0 0 20 -75 100 -75 N +P 2 1 0 0 20 0 70 -20 N +P 2 1 0 0 30 0 65 -10 N +P 2 1 0 0 65 -10 65 0 N +P 2 1 0 0 65 0 55 0 N +P 2 1 0 0 65 0 100 0 N +P 2 1 0 0 65 10 30 0 N +P 2 1 0 0 70 -20 70 20 N +P 2 1 0 0 70 20 20 0 N +P 2 1 0 0 100 -75 100 -100 N +P 2 1 0 0 100 0 100 -75 N +P 2 1 0 0 100 75 21 75 N +P 2 1 0 0 100 100 100 75 N +X D D 100 200 100 D 0 0 1 0 P +X G G -100 -100 0 R 0 0 1 0 P +X S S 100 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_C-US025-025X050 +# +DEF SLC_Free_PCB-eagle-import_C-US025-025X050 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_C-US025-025X050" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_DIL28-3 +# +DEF SLC_Free_PCB-eagle-import_DIL28-3 IC 0 40 Y Y 1 L N +F0 "IC" -175 675 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_DIL28-3" -175 -850 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 650 100 -1799 -1 1 0 10 N -100 650 100 650 +P 2 1 0 0 -200 -750 200 -750 N +P 2 1 0 0 -200 650 -200 -750 N +P 2 1 0 0 -200 650 -100 650 N +P 2 1 0 0 200 -750 200 650 N +P 2 1 0 0 200 650 100 650 N +X 1 1 -300 600 100 R 50 0 1 0 P +X 10 10 -300 -300 100 R 50 0 1 0 P +X 11 11 -300 -400 100 R 50 0 1 0 P +X 12 12 -300 -500 100 R 50 0 1 0 P +X 13 13 -300 -600 100 R 50 0 1 0 P +X 14 14 -300 -700 100 R 50 0 1 0 P +X 15 15 300 -700 100 L 50 0 1 0 P +X 16 16 300 -600 100 L 50 0 1 0 P +X 17 17 300 -500 100 L 50 0 1 0 P +X 18 18 300 -400 100 L 50 0 1 0 P +X 19 19 300 -300 100 L 50 0 1 0 P +X 2 2 -300 500 100 R 50 0 1 0 P +X 20 20 300 -200 100 L 50 0 1 0 P +X 21 21 300 -100 100 L 50 0 1 0 P +X 22 22 300 0 100 L 50 0 1 0 P +X 23 23 300 100 100 L 50 0 1 0 P +X 24 24 300 200 100 L 50 0 1 0 P +X 25 25 300 300 100 L 50 0 1 0 P +X 26 26 300 400 100 L 50 0 1 0 P +X 27 27 300 500 100 L 50 0 1 0 P +X 28 28 300 600 100 L 50 0 1 0 P +X 3 3 -300 400 100 R 50 0 1 0 P +X 4 4 -300 300 100 R 50 0 1 0 P +X 5 5 -300 200 100 R 50 0 1 0 P +X 6 6 -300 100 100 R 50 0 1 0 P +X 7 7 -300 0 100 R 50 0 1 0 P +X 8 8 -300 -100 100 R 50 0 1 0 P +X 9 9 -300 -200 100 R 50 0 1 0 P +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_GND +# +DEF SLC_Free_PCB-eagle-import_GND #GND 0 40 Y Y 1 L P +F0 "#GND" 0 0 50 H I C CNN +F1 "SLC_Free_PCB-eagle-import_GND" -100 -100 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -75 0 75 0 N +X GND 1 0 100 100 D 0 0 1 0 W +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_PINHD-1X16 +# +DEF SLC_Free_PCB-eagle-import_PINHD-1X16 JP 0 40 Y Y 1 L N +F0 "JP" -250 825 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_PINHD-1X16" -250 -1000 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -250 -900 50 -900 N +P 2 1 0 0 -250 800 -250 -900 N +P 2 1 0 0 50 -900 50 800 N +P 2 1 0 0 50 800 -250 800 N +X 1 1 -100 700 100 R 50 0 1 0 P I +X 10 10 -100 -200 100 R 50 0 1 0 P I +X 11 11 -100 -300 100 R 50 0 1 0 P I +X 12 12 -100 -400 100 R 50 0 1 0 P I +X 13 13 -100 -500 100 R 50 0 1 0 P I +X 14 14 -100 -600 100 R 50 0 1 0 P I +X 15 15 -100 -700 100 R 50 0 1 0 P I +X 16 16 -100 -800 100 R 50 0 1 0 P I +X 2 2 -100 600 100 R 50 0 1 0 P I +X 3 3 -100 500 100 R 50 0 1 0 P I +X 4 4 -100 400 100 R 50 0 1 0 P I +X 5 5 -100 300 100 R 50 0 1 0 P I +X 6 6 -100 200 100 R 50 0 1 0 P I +X 7 7 -100 100 100 R 50 0 1 0 P I +X 8 8 -100 0 100 R 50 0 1 0 P I +X 9 9 -100 -100 100 R 50 0 1 0 P I +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_PINHD-1X5 +# +DEF SLC_Free_PCB-eagle-import_PINHD-1X5 JP 0 40 Y Y 1 L N +F0 "JP" -250 325 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_PINHD-1X5" -250 -400 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -250 -300 50 -300 N +P 2 1 0 0 -250 300 -250 -300 N +P 2 1 0 0 50 -300 50 300 N +P 2 1 0 0 50 300 -250 300 N +X 1 1 -100 200 100 R 50 0 1 0 P I +X 2 2 -100 100 100 R 50 0 1 0 P I +X 3 3 -100 0 100 R 50 0 1 0 P I +X 4 4 -100 -100 100 R 50 0 1 0 P I +X 5 5 -100 -200 100 R 50 0 1 0 P I +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_PINHD-1X6 +# +DEF SLC_Free_PCB-eagle-import_PINHD-1X6 JP 0 40 Y Y 1 L N +F0 "JP" -250 425 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_PINHD-1X6" -250 -400 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -250 -300 50 -300 N +P 2 1 0 0 -250 400 -250 -300 N +P 2 1 0 0 50 -300 50 400 N +P 2 1 0 0 50 400 -250 400 N +X 1 1 -100 300 100 R 50 0 1 0 P I +X 2 2 -100 200 100 R 50 0 1 0 P I +X 3 3 -100 100 100 R 50 0 1 0 P I +X 4 4 -100 0 100 R 50 0 1 0 P I +X 5 5 -100 -100 100 R 50 0 1 0 P I +X 6 6 -100 -200 100 R 50 0 1 0 P I +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_R-US_0204_7 +# +DEF SLC_Free_PCB-eagle-import_R-US_0204_7 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_R-US_0204_7" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# SLC_Free_PCB-eagle-import_R-US_0309_12 +# +DEF SLC_Free_PCB-eagle-import_R-US_0309_12 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "SLC_Free_PCB-eagle-import_R-US_0309_12" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-eagle-import.dcm b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-eagle-import.dcm new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-eagle-import.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-eagle-import.lib b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-eagle-import.lib new file mode 100644 index 0000000..0d6b623 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB-eagle-import.lib @@ -0,0 +1,7051 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# +12V +# +DEF +12V #P+ 0 40 Y Y 1 L P +F0 "#P+" 0 0 50 H I C CNN +F1 "+12V" -100 -200 59 V V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 0 0 -50 -75 N +P 2 1 0 0 0 50 -50 -25 N +P 2 1 0 0 50 -75 0 0 N +P 2 1 0 0 50 -25 0 50 N +X +12V 1 0 -100 100 U 0 0 1 0 W +ENDDRAW +ENDDEF +# +# +5V +# +DEF +5V #P+ 0 40 Y Y 1 L P +F0 "#P+" 0 0 50 H I C CNN +F1 "+5V" -100 -200 59 V V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 0 0 -50 -75 N +P 2 1 0 0 50 -75 0 0 N +X +5V 1 0 -100 100 U 0 0 1 0 W +ENDDRAW +ENDDEF +# +# 1N4004 +# +DEF 1N4004 D 0 40 Y Y 1 L N +F0 "D" 100 19 59 H V L BNN +F1 "1N4004" 100 -91 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -50 -50 50 0 N +P 2 1 0 0 -50 50 -50 -50 N +P 2 1 0 0 50 0 -50 50 N +P 2 1 0 0 50 0 50 -50 N +P 2 1 0 0 50 50 50 0 N +X A A -100 0 100 R 0 0 1 0 P +X C C 100 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# 78DT +# +DEF 78DT IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "78DT" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VI 1 -400 0 100 R 50 50 1 0 I +X VO 2 400 0 100 L 50 50 1 0 P +X GND 3 0 -300 100 U 50 0 1 0 P +ENDDRAW +ENDDEF +# +# 78H +# +DEF 78H IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "78H" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VI 1 -400 0 100 R 50 50 1 0 I +X VO 2 400 0 100 L 50 50 1 0 P +X GND 3 0 -300 100 U 50 0 1 0 P +ENDDRAW +ENDDEF +# +# 78L +# +DEF 78L IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "78L" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VO 1 400 0 100 L 50 50 1 0 P +X GND 2 0 -300 100 U 50 0 1 0 P +X VI 3 -400 0 100 R 50 50 1 0 I +ENDDRAW +ENDDEF +# +# 78T +# +DEF 78T IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "78T" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VI 1 -400 0 100 R 50 50 1 0 I +X GND 2 0 -300 100 U 50 0 1 0 P +X VO 3 400 0 100 L 50 50 1 0 P +ENDDRAW +ENDDEF +# +# 78TV +# +DEF 78TV IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "78TV" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VI 1 -400 0 100 R 50 50 1 0 I +X GND 2 0 -300 100 U 50 0 1 0 P +X VO 3 400 0 100 L 50 50 1 0 P +ENDDRAW +ENDDEF +# +# 78Z +# +DEF 78Z IC 0 40 Y Y 1 L N +F0 "IC" -300 225 59 H V L BNN +F1 "78Z" -300 125 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +T 0 -80 -170 51 0 1 0 GND Normal 0 L B +P 2 1 0 0 -300 -200 300 -200 N +P 2 1 0 0 -300 100 -300 -200 N +P 2 1 0 0 300 -200 300 100 N +P 2 1 0 0 300 100 -300 100 N +X VO 1 400 0 100 L 50 50 1 0 P +X GND 2 0 -300 100 U 50 0 1 0 P +X VI 3 -400 0 100 R 50 50 1 0 I +ENDDRAW +ENDDEF +# +# BUZ11BH +# +DEF BUZ11BH Q 0 40 Y Y 1 L N +F0 "Q" 200 100 59 H V L BNN +F1 "BUZ11BH" 200 0 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 100 -75 5 1 0 16 N +T 0 50 100 27 0 1 0 D Normal 0 L B +T 0 -100 -50 27 0 1 0 G Normal 0 L B +T 0 50 -125 27 0 1 0 S Normal 0 L B +S -10 -100 20 -50 1 0 0 F +S -10 -35 20 35 1 0 0 F +S -10 50 20 100 1 0 0 F +P 2 1 0 0 -44 -100 -100 -100 N +P 2 1 0 0 -44 95 -44 -100 N +P 2 1 0 0 20 -75 100 -75 N +P 2 1 0 0 20 0 70 -20 N +P 2 1 0 0 30 0 65 -10 N +P 2 1 0 0 65 -10 65 0 N +P 2 1 0 0 65 0 55 0 N +P 2 1 0 0 65 0 100 0 N +P 2 1 0 0 65 10 30 0 N +P 2 1 0 0 70 -20 70 20 N +P 2 1 0 0 70 20 20 0 N +P 2 1 0 0 100 -75 100 -100 N +P 2 1 0 0 100 0 100 -75 N +P 2 1 0 0 100 75 21 75 N +P 2 1 0 0 100 100 100 75 N +X D D 100 200 100 D 0 0 1 0 P +X G G -100 -100 0 R 0 0 1 0 P +X S S 100 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# BUZ11BV +# +DEF BUZ11BV Q 0 40 Y Y 1 L N +F0 "Q" 200 100 59 H V L BNN +F1 "BUZ11BV" 200 0 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 100 -75 5 1 0 16 N +T 0 50 100 27 0 1 0 D Normal 0 L B +T 0 -100 -50 27 0 1 0 G Normal 0 L B +T 0 50 -125 27 0 1 0 S Normal 0 L B +S -10 -100 20 -50 1 0 0 F +S -10 -35 20 35 1 0 0 F +S -10 50 20 100 1 0 0 F +P 2 1 0 0 -44 -100 -100 -100 N +P 2 1 0 0 -44 95 -44 -100 N +P 2 1 0 0 20 -75 100 -75 N +P 2 1 0 0 20 0 70 -20 N +P 2 1 0 0 30 0 65 -10 N +P 2 1 0 0 65 -10 65 0 N +P 2 1 0 0 65 0 55 0 N +P 2 1 0 0 65 0 100 0 N +P 2 1 0 0 65 10 30 0 N +P 2 1 0 0 70 -20 70 20 N +P 2 1 0 0 70 20 20 0 N +P 2 1 0 0 100 -75 100 -100 N +P 2 1 0 0 100 0 100 -75 N +P 2 1 0 0 100 75 21 75 N +P 2 1 0 0 100 100 100 75 N +X D D 100 200 100 D 0 0 1 0 P +X G G -100 -100 0 R 0 0 1 0 P +X S S 100 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025-024X044 +# +DEF C-US025-024X044 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025-024X044" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025-025X050 +# +DEF C-US025-025X050 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025-025X050" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025-030X050 +# +DEF C-US025-030X050 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025-030X050" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025-040X050 +# +DEF C-US025-040X050 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025-040X050" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025-050X050 +# +DEF C-US025-050X050 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025-050X050" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025-060X050 +# +DEF C-US025-060X050 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025-060X050" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025_050-025X075 +# +DEF C-US025_050-025X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025_050-025X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025_050-035X075 +# +DEF C-US025_050-035X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025_050-035X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025_050-045X075 +# +DEF C-US025_050-045X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025_050-045X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US025_050-055X075 +# +DEF C-US025_050-055X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US025_050-055X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-024X044 +# +DEF C-US050-024X044 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-024X044" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-025X075 +# +DEF C-US050-025X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-025X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-030X075 +# +DEF C-US050-030X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-030X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-035X075 +# +DEF C-US050-035X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-035X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-045X075 +# +DEF C-US050-045X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-045X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-050X075 +# +DEF C-US050-050X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-050X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-055X075 +# +DEF C-US050-055X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-055X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050-075X075 +# +DEF C-US050-075X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050-075X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US050H075X075 +# +DEF C-US050H075X075 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US050H075X075" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US075-032X103 +# +DEF C-US075-032X103 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US075-032X103" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US075-042X103 +# +DEF C-US075-042X103 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US075-042X103" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US075-052X106 +# +DEF C-US075-052X106 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US075-052X106" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US075-063X106 +# +DEF C-US075-063X106 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US075-063X106" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US102-043X133 +# +DEF C-US102-043X133 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US102-043X133" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US102-054X133 +# +DEF C-US102-054X133 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US102-054X133" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US102-064X133 +# +DEF C-US102-064X133 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US102-064X133" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US102_152-062X184 +# +DEF C-US102_152-062X184 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US102_152-062X184" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US150-054X183 +# +DEF C-US150-054X183 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US150-054X183" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US150-064X183 +# +DEF C-US150-064X183 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US150-064X183" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US150-072X183 +# +DEF C-US150-072X183 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US150-072X183" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US150-084X183 +# +DEF C-US150-084X183 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US150-084X183" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US150-091X182 +# +DEF C-US150-091X182 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US150-091X182" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US225-062X268 +# +DEF C-US225-062X268 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US225-062X268" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US225-074X268 +# +DEF C-US225-074X268 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US225-074X268" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US225-087X268 +# +DEF C-US225-087X268 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US225-087X268" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US225-108X268 +# +DEF C-US225-108X268 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US225-108X268" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US225-113X268 +# +DEF C-US225-113X268 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US225-113X268" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US275-093X316 +# +DEF C-US275-093X316 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US275-093X316" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US275-113X316 +# +DEF C-US275-113X316 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US275-113X316" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US275-134X316 +# +DEF C-US275-134X316 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US275-134X316" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US275-154X316 +# +DEF C-US275-154X316 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US275-154X316" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US275-173X316 +# +DEF C-US275-173X316 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US275-173X316" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US275-205X316 +# +DEF C-US275-205X316 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US275-205X316" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US325-137X374 +# +DEF C-US325-137X374 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US325-137X374" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US325-162X374 +# +DEF C-US325-162X374 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US325-162X374" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US325-182X374 +# +DEF C-US325-182X374 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US325-182X374" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US375-155X418 +# +DEF C-US375-155X418 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US375-155X418" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US375-192X418 +# +DEF C-US375-192X418 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US375-192X418" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-US375-203X418 +# +DEF C-US375-203X418 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-US375-203X418" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0201 +# +DEF C-USC0201 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0201" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC025_050-024X070 +# +DEF C-USC025_050-024X070 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC025_050-024X070" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0402 +# +DEF C-USC0402 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0402" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0402K +# +DEF C-USC0402K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0402K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0504 +# +DEF C-USC0504 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0504" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0603 +# +DEF C-USC0603 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0603" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0603K +# +DEF C-USC0603K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0603K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0805 +# +DEF C-USC0805 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0805" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC0805K +# +DEF C-USC0805K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC0805K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1005 +# +DEF C-USC1005 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1005" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1206 +# +DEF C-USC1206 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1206" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1206K +# +DEF C-USC1206K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1206K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1210 +# +DEF C-USC1210 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1210" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1210K +# +DEF C-USC1210K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1210K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1310 +# +DEF C-USC1310 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1310" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1608 +# +DEF C-USC1608 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1608" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1808 +# +DEF C-USC1808 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1808" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1812 +# +DEF C-USC1812 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1812" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1812K +# +DEF C-USC1812K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1812K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1825 +# +DEF C-USC1825 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1825" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC1825K +# +DEF C-USC1825K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC1825K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC2012 +# +DEF C-USC2012 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC2012" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC2220K +# +DEF C-USC2220K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC2220K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC2225K +# +DEF C-USC2225K C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC2225K" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC3216 +# +DEF C-USC3216 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC3216" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC3225 +# +DEF C-USC3225 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC3225" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC3640 +# +DEF C-USC3640 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC3640" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC4532 +# +DEF C-USC4532 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC4532" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# C-USC4564 +# +DEF C-USC4564 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "C-USC4564" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X 1 1 0 100 100 D 0 0 1 0 P +X 2 2 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US085CS-1AR +# +DEF CPOL-US085CS-1AR C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US085CS-1AR" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US085CS-1AW +# +DEF CPOL-US085CS-1AW C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US085CS-1AW" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US085CS-1R +# +DEF CPOL-US085CS-1R C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US085CS-1R" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US085CS-1W +# +DEF CPOL-US085CS-1W C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US085CS-1W" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US139CLL-2R +# +DEF CPOL-US139CLL-2R C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US139CLL-2R" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US139CLL-2W +# +DEF CPOL-US139CLL-2W C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US139CLL-2W" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US139CLL-3R +# +DEF CPOL-US139CLL-3R C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US139CLL-3R" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US139CLL-3W +# +DEF CPOL-US139CLL-3W C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US139CLL-3W" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US140CLH-0810 +# +DEF CPOL-US140CLH-0810 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US140CLH-0810" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US140CLH-1010 +# +DEF CPOL-US140CLH-1010 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US140CLH-1010" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US140CLH-1014 +# +DEF CPOL-US140CLH-1014 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US140CLH-1014" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US150CLZ-0810 +# +DEF CPOL-US150CLZ-0810 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US150CLZ-0810" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US150CLZ-1010 +# +DEF CPOL-US150CLZ-1010 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US150CLZ-1010" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US150CLZ-1014 +# +DEF CPOL-US150CLZ-1014 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US150CLZ-1014" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-0405 +# +DEF CPOL-US153CLV-0405 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-0405" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-0505 +# +DEF CPOL-US153CLV-0505 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-0505" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-0605 +# +DEF CPOL-US153CLV-0605 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-0605" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-0807 +# +DEF CPOL-US153CLV-0807 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-0807" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-0810 +# +DEF CPOL-US153CLV-0810 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-0810" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-1010 +# +DEF CPOL-US153CLV-1010 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-1010" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-1012 +# +DEF CPOL-US153CLV-1012 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-1012" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US153CLV-1014 +# +DEF CPOL-US153CLV-1014 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US153CLV-1014" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US175TMP-0808 +# +DEF CPOL-US175TMP-0808 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US175TMP-0808" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-US175TMP-0810 +# +DEF CPOL-US175TMP-0810 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-US175TMP-0810" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USA +# +DEF CPOL-USA C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USA" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USA_3216-18R +# +DEF CPOL-USA_3216-18R C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USA_3216-18R" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USA_3216-18W +# +DEF CPOL-USA_3216-18W C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USA_3216-18W" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USB +# +DEF CPOL-USB C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USB" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USB45181A +# +DEF CPOL-USB45181A C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USB45181A" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 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CPOL-USE_7260-38R C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USE_7260-38R" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USE_7260-38W +# +DEF CPOL-USE_7260-38W C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USE_7260-38W" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USF +# +DEF CPOL-USF C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USF" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USG +# +DEF CPOL-USG C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USG" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USP128-35 +# +DEF CPOL-USP128-35 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USP128-35" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USP128-40 +# +DEF CPOL-USP128-40 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USP128-40" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USP128-50 +# +DEF CPOL-USP128-50 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USP128-50" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 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U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USR_2012-12W +# +DEF CPOL-USR_2012-12W C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USR_2012-12W" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_9E +# +DEF CPOL-USSANYO_9E C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_9E" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_9F +# +DEF CPOL-USSANYO_9F C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_9F" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_A +# +DEF CPOL-USSANYO_A C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_A" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_A' +# +DEF CPOL-USSANYO_A' C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_A'" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_B +# +DEF CPOL-USSANYO_B C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_B" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_B' +# +DEF CPOL-USSANYO_B' C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_B'" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_C +# +DEF CPOL-USSANYO_C C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_C" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_C' +# +DEF CPOL-USSANYO_C' C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_C'" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_C6 +# +DEF CPOL-USSANYO_C6 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_C6" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_D +# +DEF CPOL-USSANYO_D C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_D" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E +# +DEF CPOL-USSANYO_E C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E' +# +DEF CPOL-USSANYO_E' C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E'" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E1 +# +DEF CPOL-USSANYO_E1 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E1" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E12 +# +DEF CPOL-USSANYO_E12 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E12" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E13 +# +DEF CPOL-USSANYO_E13 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E13" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E7 +# +DEF CPOL-USSANYO_E7 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E7" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_E9 +# +DEF CPOL-USSANYO_E9 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_E9" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 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1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_H" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_A5 +# +DEF CPOL-USSANYO_SMD_A5 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_A5" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_B6 +# +DEF CPOL-USSANYO_SMD_B6 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_B6" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_C6 +# +DEF CPOL-USSANYO_SMD_C6 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_C6" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_E12 +# +DEF CPOL-USSANYO_SMD_E12 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_E12" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_E7 +# +DEF CPOL-USSANYO_SMD_E7 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_E7" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_F12 +# +DEF CPOL-USSANYO_SMD_F12 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_F12" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSANYO_SMD_F8 +# +DEF CPOL-USSANYO_SMD_F8 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSANYO_SMD_F8" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCA +# +DEF CPOL-USSMCA C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCA" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCB +# +DEF CPOL-USSMCB C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCB" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCC +# +DEF CPOL-USSMCC C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCC" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCD +# +DEF CPOL-USSMCD C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCD" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCE +# +DEF CPOL-USSMCE C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCE" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCP +# +DEF CPOL-USSMCP C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCP" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USSMCZ +# +DEF CPOL-USSMCZ C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USSMCZ" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTAP5-45 +# +DEF CPOL-USTAP5-45 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTAP5-45" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTAP5-50 +# +DEF CPOL-USTAP5-50 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTAP5-50" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTAP5-60 +# +DEF CPOL-USTAP5-60 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTAP5-60" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTAP5-70 +# +DEF CPOL-USTAP5-70 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTAP5-70" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTAP5-80 +# +DEF CPOL-USTAP5-80 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTAP5-80" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D4 +# +DEF CPOL-USTT2D4 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D4" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D4L +# +DEF CPOL-USTT2D4L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D4L" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D5 +# +DEF CPOL-USTT2D5 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D5" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D5L +# +DEF CPOL-USTT2D5L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D5L" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D6 +# +DEF CPOL-USTT2D6 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D6" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D6L +# +DEF CPOL-USTT2D6L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D6L" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D7 +# +DEF CPOL-USTT2D7 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D7" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT2D7L +# +DEF CPOL-USTT2D7L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT2D7L" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT5D10 +# +DEF CPOL-USTT5D10 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT5D10" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT5D11 +# +DEF CPOL-USTT5D11 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT5D11" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT5D11L +# +DEF CPOL-USTT5D11L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT5D11L" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT5D6L +# +DEF CPOL-USTT5D6L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT5D6L" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT5D7 +# +DEF CPOL-USTT5D7 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT5D7" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USTT5D7L +# +DEF CPOL-USTT5D7L C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USTT5D7L" 40 -165 59 H V L BNN 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0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USUD-6,3X5,8 +# +DEF CPOL-USUD-6,3X5,8 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USUD-6,3X5,8" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USUD-6,3X7,7 +# +DEF CPOL-USUD-6,3X7,7 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USUD-6,3X7,7" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# CPOL-USUD-8X10 +# +DEF CPOL-USUD-8X10 C 0 40 Y Y 1 L N +F0 "C" 40 25 59 H V L BNN +F1 "CPOL-USUD-8X10" 40 -165 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 -199 159 900 1274 1 0 10 N 0 -40 -97 -72 +A 0 -198 159 519 900 1 0 10 N 98 -73 0 -39 +S -88 26 -53 31 1 0 0 F +S -73 11 -68 46 1 0 0 F +P 2 1 0 0 -100 0 100 0 N +P 2 1 0 0 0 -40 0 -100 N +X + + 0 100 100 D 0 0 1 0 P +X - - 0 -200 100 U 0 0 1 0 P +ENDDRAW +ENDDEF +# +# DIL28 +# +DEF DIL28 IC 0 40 Y Y 1 L N +F0 "IC" -175 675 59 H V L BNN +F1 "DIL28" -175 -850 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A 0 650 100 -1799 -1 1 0 10 N -100 650 100 650 +P 2 1 0 0 -200 -750 200 -750 N +P 2 1 0 0 -200 650 -200 -750 N +P 2 1 0 0 -200 650 -100 650 N +P 2 1 0 0 200 -750 200 650 N +P 2 1 0 0 200 650 100 650 N +X 1 1 -300 600 100 R 50 0 1 0 P +X 10 10 -300 -300 100 R 50 0 1 0 P +X 11 11 -300 -400 100 R 50 0 1 0 P +X 12 12 -300 -500 100 R 50 0 1 0 P +X 13 13 -300 -600 100 R 50 0 1 0 P +X 14 14 -300 -700 100 R 50 0 1 0 P +X 15 15 300 -700 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+DEF PINHD-1X6_90 JP 0 40 Y Y 1 L N +F0 "JP" -250 425 59 H V L BNN +F1 "PINHD-1X6_90" -250 -400 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -250 -300 50 -300 N +P 2 1 0 0 -250 400 -250 -300 N +P 2 1 0 0 50 -300 50 400 N +P 2 1 0 0 50 400 -250 400 N +X 1 1 -100 300 100 R 50 0 1 0 P I +X 2 2 -100 200 100 R 50 0 1 0 P I +X 3 3 -100 100 100 R 50 0 1 0 P I +X 4 4 -100 0 100 R 50 0 1 0 P I +X 5 5 -100 -100 100 R 50 0 1 0 P I +X 6 6 -100 -200 100 R 50 0 1 0 P I +ENDDRAW +ENDDEF +# +# R-US_0204_2V +# +DEF R-US_0204_2V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0204_2V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0204_5 +# +DEF R-US_0204_5 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0204_5" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0204_7 +# +DEF R-US_0204_7 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0204_7" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0207_10 +# +DEF R-US_0207_10 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0207_10" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0207_12 +# +DEF R-US_0207_12 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0207_12" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0207_15 +# +DEF R-US_0207_15 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0207_15" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0207_2V +# +DEF R-US_0207_2V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0207_2V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0207_5V +# +DEF R-US_0207_5V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0207_5V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0207_7 +# +DEF R-US_0207_7 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0207_7" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0309_10 +# +DEF R-US_0309_10 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0309_10" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0309_12 +# +DEF R-US_0309_12 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0309_12" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0309_V +# +DEF R-US_0309_V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0309_V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0411_12 +# +DEF R-US_0411_12 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0411_12" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0411_15 +# +DEF R-US_0411_15 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0411_15" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0411_3V +# +DEF R-US_0411_3V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0411_3V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0414_15 +# +DEF R-US_0414_15 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0414_15" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0414_5V +# +DEF R-US_0414_5V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0414_5V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0613_15 +# +DEF R-US_0613_15 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0613_15" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0613_5V +# +DEF R-US_0613_5V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0613_5V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0617_17 +# +DEF R-US_0617_17 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0617_17" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0617_22 +# +DEF R-US_0617_22 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0617_22" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0617_5V +# +DEF R-US_0617_5V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0617_5V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0817_22 +# +DEF R-US_0817_22 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0817_22" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0817_7V +# +DEF R-US_0817_7V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0817_7V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0922V +# +DEF R-US_0922V R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0922V" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_0922_22 +# +DEF R-US_0922_22 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_0922_22" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_1812X7R +# +DEF R-US_1812X7R R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_1812X7R" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M0805 +# +DEF R-US_M0805 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M0805" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M1206 +# +DEF R-US_M1206 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M1206" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M1406 +# +DEF R-US_M1406 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M1406" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M2012 +# +DEF R-US_M2012 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M2012" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M2309 +# +DEF R-US_M2309 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M2309" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M3216 +# +DEF R-US_M3216 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M3216" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M3516 +# +DEF R-US_M3516 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M3516" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_M5923 +# +DEF R-US_M5923 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_M5923" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0102AX +# +DEF R-US_MELF0102AX R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0102AX" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0102R +# +DEF R-US_MELF0102R R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0102R" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0102W +# +DEF R-US_MELF0102W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0102W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0204R +# +DEF R-US_MELF0204R R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0204R" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0204W +# +DEF R-US_MELF0204W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0204W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0207R +# +DEF R-US_MELF0207R R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0207R" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_MELF0207W +# +DEF R-US_MELF0207W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_MELF0207W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R0201 +# +DEF R-US_R0201 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R0201" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R0402 +# +DEF R-US_R0402 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R0402" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R0603 +# +DEF R-US_R0603 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R0603" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R0805 +# +DEF R-US_R0805 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R0805" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R0805W +# +DEF R-US_R0805W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R0805W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R1005 +# +DEF R-US_R1005 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R1005" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R1206 +# +DEF R-US_R1206 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R1206" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R1206W +# +DEF R-US_R1206W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R1206W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R1210 +# +DEF R-US_R1210 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R1210" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R1210W +# +DEF R-US_R1210W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R1210W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R1218 +# +DEF R-US_R1218 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R1218" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R2010 +# +DEF R-US_R2010 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R2010" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R2010W +# +DEF R-US_R2010W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R2010W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R2012 +# +DEF R-US_R2012 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R2012" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R2012W +# +DEF R-US_R2012W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R2012W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R2512 +# +DEF R-US_R2512 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R2512" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R2512W +# +DEF R-US_R2512W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R2512W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R3216 +# +DEF R-US_R3216 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R3216" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R3216W +# +DEF R-US_R3216W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R3216W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R3225 +# +DEF R-US_R3225 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R3225" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R3225W +# +DEF R-US_R3225W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R3225W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R4527 +# +DEF R-US_R4527 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R4527" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R5025 +# +DEF R-US_R5025 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R5025" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R5025W +# +DEF R-US_R5025W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R5025W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R6332 +# +DEF R-US_R6332 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R6332" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_R6332W +# +DEF R-US_R6332W R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_R6332W" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_RDH_15 +# +DEF R-US_RDH_15 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_RDH_15" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_V234_12 +# +DEF R-US_V234_12 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_V234_12" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_V235_17 +# +DEF R-US_V235_17 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_V235_17" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_V526-0 +# +DEF R-US_V526-0 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_V526-0" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VMTA55 +# +DEF R-US_VMTA55 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VMTA55" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VMTB60 +# +DEF R-US_VMTB60 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VMTB60" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VTA52 +# +DEF R-US_VTA52 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VTA52" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VTA53 +# +DEF R-US_VTA53 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VTA53" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VTA54 +# +DEF R-US_VTA54 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VTA54" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VTA55 +# +DEF R-US_VTA55 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VTA55" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_VTA56 +# +DEF R-US_VTA56 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_VTA56" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_WSC0001 +# +DEF R-US_WSC0001 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_WSC0001" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_WSC0002 +# +DEF R-US_WSC0002 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_WSC0002" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_WSC01_2 +# +DEF R-US_WSC01_2 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_WSC01_2" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_WSC2515 +# +DEF R-US_WSC2515 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_WSC2515" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_WSC4527 +# +DEF R-US_WSC4527 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_WSC4527" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +# R-US_WSC6927 +# +DEF R-US_WSC6927 R 0 40 Y Y 1 L N +F0 "R" -150 59 59 H V L BNN +F1 "R-US_WSC6927" -150 -130 59 H V L BNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 1 0 0 -100 0 -85 40 N +P 2 1 0 0 -85 40 -60 -40 N +P 2 1 0 0 -60 -40 -35 40 N +P 2 1 0 0 -35 40 -10 -40 N +P 2 1 0 0 -10 -40 15 40 N +P 2 1 0 0 15 40 40 -40 N +P 2 1 0 0 40 -40 65 40 N +P 2 1 0 0 65 40 90 -40 N +P 2 1 0 0 90 -40 100 0 N +X 1 1 -200 0 100 R 0 0 1 0 P +X 2 2 200 0 100 L 0 0 1 0 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.kicad_pcb b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.kicad_pcb new file mode 100644 index 0000000..537f53f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.kicad_pcb @@ -0,0 +1,3783 @@ +(kicad_pcb (version 20171130) (host pcbnew 5.1.4-e60b266~84~ubuntu19.04.1) + + (general + (thickness 1.6) + (drawings 32) + (tracks 501) + (zones 0) + (modules 42) + (nets 46) + ) + + (page A4) + (layers + (0 Top signal) + (31 Bottom signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user hide) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (user_trace_width 0.3048) + (user_trace_width 0.6096) + (user_trace_width 1.016) + (user_trace_width 1.35) + (trace_clearance 0.2) + (zone_clearance 0.254) + (zone_45_only no) + (trace_min 0.2) + (via_size 0.8) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (edge_width 0.15) + (segment_width 0.2) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 11.5 8) + (pad_drill 0) + (pad_to_mask_clearance 0.2) + (aux_axis_origin 0 0) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 0x010fc_ffffffff) + (usegerberextensions true) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "gerber/")) + ) + + (net 0 "") + (net 1 GND) + (net 2 +5V) + (net 3 /RT_ADC) + (net 4 /P0[4]) + (net 5 /AC_TEMP_SENSE_OUT) + (net 6 /RE+_ADC) + (net 7 /LCD_RW) + (net 8 /LCD_E) + (net 9 /LCD_DB6) + (net 10 /LCD_DB4) + (net 11 /XRES) + (net 12 /PWM_NB_OUT) + (net 13 /PWM_HEATER) + (net 14 /CAL) + (net 15 /PROG_SDA) + (net 16 /PROG_SCL) + (net 17 /P1[3]) + (net 18 /PWM_LIN_OUT) + (net 19 /P1[7]) + (net 20 "Net-(IC2-Pad9)") + (net 21 /P2[7]) + (net 22 /LCD_RS) + (net 23 /INSAMP_VREF) + (net 24 /LSU_VGND) + (net 25 /LCD_DB5) + (net 26 /LCD_DB7) + (net 27 /LSU_IA) + (net 28 /APE_ADC) + (net 29 "Net-(IC3-PadG)") + (net 30 "Net-(C6-Pad2)") + (net 31 /LSU_NERMEST) + (net 32 /LSU_IP) + (net 33 /LCD_ANODE) + (net 34 "Net-(JP4-Pad10)") + (net 35 "Net-(JP4-Pad9)") + (net 36 "Net-(JP4-Pad8)") + (net 37 "Net-(JP4-Pad7)") + (net 38 /LCD_CONTRAST) + (net 39 LIN_OUT) + (net 40 H_GND) + (net 41 NB_OUT) + (net 42 LSU_HEATER-) + (net 43 12V) + (net 44 "Net-(D2-Pad1)") + (net 45 "Net-(C1-Pad1)") + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.8) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +5V) + (add_net /AC_TEMP_SENSE_OUT) + (add_net /APE_ADC) + (add_net /CAL) + (add_net /INSAMP_VREF) + (add_net /LCD_ANODE) + (add_net /LCD_CONTRAST) + (add_net /LCD_DB4) + (add_net /LCD_DB5) + (add_net /LCD_DB6) + (add_net /LCD_DB7) + (add_net /LCD_E) + (add_net /LCD_RS) + (add_net /LCD_RW) + (add_net /LSU_IA) + (add_net /LSU_IP) + (add_net /LSU_NERMEST) + (add_net /LSU_VGND) + (add_net /P0[4]) + (add_net /P1[3]) + (add_net /P1[7]) + (add_net /P2[7]) + (add_net /PROG_SCL) + (add_net /PROG_SDA) + (add_net /PWM_HEATER) + (add_net /PWM_LIN_OUT) + (add_net /PWM_NB_OUT) + (add_net /RE+_ADC) + (add_net /RT_ADC) + (add_net /XRES) + (add_net 12V) + (add_net GND) + (add_net LIN_OUT) + (add_net LSU_HEATER-) + (add_net NB_OUT) + (add_net "Net-(C1-Pad1)") + (add_net "Net-(C6-Pad2)") + (add_net "Net-(D2-Pad1)") + (add_net "Net-(IC2-Pad9)") + (add_net "Net-(IC3-PadG)") + (add_net "Net-(JP4-Pad10)") + (add_net "Net-(JP4-Pad7)") + (add_net "Net-(JP4-Pad8)") + (add_net "Net-(JP4-Pad9)") + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D193) + (at 152.9815 114.49 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /436F0B63FC0C7BCC) + (fp_text reference R12 (at 3.82 0.0115 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 39 LIN_OUT)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 18 /PWM_LIN_OUT)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_Molex:Molex_Mini-Fit_Jr_5569-04A2_2x02_P4.20mm_Horizontal (layer Top) (tedit 5A15CC90) (tstamp 5C539864) + (at 102.73 98.99 90) + (descr "Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-04A2, example for new mpn: 39-30-0040, 2 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator") + (tags "connector Molex Mini-Fit_Jr top entryplastic_peg") + (path /848DA6002F430EF2) + (fp_text reference JP1 (at 2.1 -15.1 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PINHD-1X5 (at 2.1 8.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 2.1 -13.2 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 7.4 -14.4) (end -3.2 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.4 7.85) (end 7.4 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 7.85) (end 7.4 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 -14.4) (end -3.2 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 -2.514214) (end 1 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -1.1) (end 0 -2.514214) (layer F.Fab) (width 0.1)) + (fp_line (start -2.6 -0.3) (end -2 0) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.6 0.3) (end -2.6 -0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 0) (end -2.6 0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.61 -1) (end 2.59 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.5 2.11) (end 4.5 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.9 2.11) (end 3.9 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.3 2.11) (end 0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.3 2.11) (end -0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.01 -14.01) (end 2.1 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.01 -0.99) (end 7.01 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.2 -0.99) (end 7.01 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -14.01) (end 2.1 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -0.99) (end -2.81 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 -0.99) (end -2.81 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.9 -13.9) (end -2.7 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start 6.9 -1.1) (end 6.9 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -1.1) (end 6.9 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -13.9) (end -2.7 -1.1) (layer F.Fab) (width 0.1)) + (pad "" np_thru_hole circle (at 2.1 -7.3 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) + (pad 4 thru_hole oval (at 4.2 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 41 NB_OUT)) + (pad 3 thru_hole oval (at 0 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 39 LIN_OUT)) + (pad 2 thru_hole oval (at 4.2 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole rect (at 0 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 43 12V)) + (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Mini-Fit_Jr_5569-04A2_2x02_P4.20mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_Molex:Molex_Mini-Fit_Jr_5569-06A2_2x03_P4.20mm_Horizontal (layer Top) (tedit 5A15CC90) (tstamp 5C53988E) + (at 102.72 116.78 90) + (descr "Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-06A2, example for new mpn: 39-30-0060, 3 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator") + (tags "connector Molex Mini-Fit_Jr top entryplastic_peg") + (path /4804D7FCFA93C76E) + (fp_text reference JP2 (at 4.2 -15.1 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PINHD-1X6 (at 4.2 8.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 4.2 -13.2 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.6 -14.4) (end -3.2 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.6 7.85) (end 11.6 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 7.85) (end 11.6 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 -14.4) (end -3.2 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 -2.514214) (end 1 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -1.1) (end 0 -2.514214) (layer F.Fab) (width 0.1)) + (fp_line (start -2.6 -0.3) (end -2 0) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.6 0.3) (end -2.6 -0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 0) (end -2.6 0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start 5.81 -1) (end 6.79 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.61 -1) (end 2.59 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.7 2.11) (end 8.7 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.1 2.11) (end 8.1 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.5 2.11) (end 4.5 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.9 2.11) (end 3.9 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.3 2.11) (end 0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.3 2.11) (end -0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 11.21 -14.01) (end 4.2 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 11.21 -0.99) (end 11.21 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.4 -0.99) (end 11.21 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -14.01) (end 4.2 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -0.99) (end -2.81 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 -0.99) (end -2.81 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start 11.1 -13.9) (end -2.7 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start 11.1 -1.1) (end 11.1 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -1.1) (end 11.1 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -13.9) (end -2.7 -1.1) (layer F.Fab) (width 0.1)) + (pad "" np_thru_hole circle (at 8.4 -7.3 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) + (pad "" np_thru_hole circle (at 0 -7.3 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) + (pad 6 thru_hole oval (at 8.4 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 32 /LSU_IP)) + (pad 5 thru_hole oval (at 4.2 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (pad 4 thru_hole oval (at 0 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 42 LSU_HEATER-)) + (pad 3 thru_hole oval (at 8.4 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 27 /LSU_IA)) + (pad 2 thru_hole oval (at 4.2 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 24 /LSU_VGND)) + (pad 1 thru_hole rect (at 0 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 43 12V)) + (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Mini-Fit_Jr_5569-06A2_2x03_P4.20mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D59A) + (at 172.24 94.27) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /3DE44650224EEC03) + (fp_text reference R1 (at 5.02 0.05) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10 (at 5.08 2.37) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 5.05 0.05) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.21 1.5) (end 11.21 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 11.21 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 9.12 0) (end 8.35 0) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.04 0) (end 1.81 0) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.35 -1.37) (end 1.81 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.35 1.37) (end 8.35 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.81 1.37) (end 8.35 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.81 -1.37) (end 1.81 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1)) + (fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)")) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 44 "Net-(D2-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D1C5) + (at 141.15 98.55 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /92D3568E45125544) + (fp_text reference C6 (at 4.27 -0.01 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1uf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 "Net-(C6-Pad2)")) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 /AC_TEMP_SENSE_OUT)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D279) + (at 147.925 101.1 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /4721ED5BD7380F0A) + (fp_text reference R7 (at 3.74 -0.105 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value R-US_0204_7 (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D22E) + (at 144.81 93.47 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /92B6EBFFB35105BA) + (fp_text reference R8 (at 3.8 -0.04 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 6 /RE+_ADC)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D547) + (at 160.775 90.375) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /DE7FF8CFEFF1A6CC) + (fp_text reference R16 (at 3.755 -0.005) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100 (at 3.81 2.37) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 33 /LCD_ANODE)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D1AC) + (at 156.25 101.125 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /97512B480A067037) + (fp_text reference R10 (at 3.895 -0.01 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 /XRES)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D429) + (at 162.65 100.825 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /F90901174EA54AE4) + (fp_text reference R11 (at 3.825 2.41 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 41 NB_OUT)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 12 /PWM_NB_OUT)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5C53A8EE) + (at 124.05 111.33 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /FE98EEC3D5237DDE) + (fp_text reference R13 (at 3.81 -2.37 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1K (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 29 "Net-(IC3-PadG)")) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 13 /PWM_HEATER)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D374) + (at 131.275 121.82 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /A761C73577E48E03) + (fp_text reference R3 (at 3.89 -2.615 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 61.9 (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 27 /LSU_IA)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 32 /LSU_IP)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D247) + (at 128.725 114.2 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /739C9E2D733DB3B0) + (fp_text reference R2 (at 3.81 -2.37 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 32 /LSU_IP)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 28 /APE_ADC)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D260) + (at 133.725 114.2 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /EF632DAE64669C67) + (fp_text reference R6 (at 3.77 -0.095 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 /RT_ADC)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 27 /LSU_IA)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D2B2) + (at 137.325 121.82 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /CCADE161F5E59E3A) + (fp_text reference R5 (at 3.64 -0.115 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D2CB) + (at 140.725 114.2 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /C1743B5DAF631EA7) + (fp_text reference R9 (at 3.77 -0.105 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D17A) + (at 138.3003 93.4594 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /23E57F8398DC0D12) + (fp_text reference R4 (at 3.7506 0.1503 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 "Net-(C6-Pad2)")) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D515) + (at 129.075 94.55 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /F87BD34C42B60E9C) + (fp_text reference R14 (at 3.9 0.015 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7k (at 3.55 0.175 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 38 /LCD_CONTRAST)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D52E) + (at 126.2 101.7 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /C78DE6E200557CD) + (fp_text reference R15 (at 3.76 -0.08 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1.2k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 38 /LCD_CONTRAST)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D500) + (at 129 104.9 180) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /A78DF8BC5F7CD27E) + (fp_text reference C11 (at 1.25 -2.25 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 180) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D2E4) + (at 144.075 117.075 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /309F8869BFFA351D) + (fp_text reference C7 (at 1.25 -2.25 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 270) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D4D6) + (at 150.275 119.575 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /BEE27C0CB9820DED) + (fp_text reference C10 (at 1.25 -2.25 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.375 2.055 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 39 LIN_OUT)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D32A) + (at 185.82 115.62) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /C3DB98572E544DC1) + (fp_text reference C4 (at 1.2 2.1) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D315) + (at 184.9 102.57 180) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /3B2CE81D6F136683) + (fp_text reference C2 (at -0.62 -2.09 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 180) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D4EB) + (at 159.3569 96 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /F0EA715621F188E2) + (fp_text reference C9 (at -2.18 -0.0131 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 270) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 41 NB_OUT)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D1DA) + (at 153.13 96.3 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /8488437E6406DB36) + (fp_text reference C8 (at 1.25 -2.25 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 /XRES)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D1EF) + (at 133.3473 100.038 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /311CF9FF0A6764) + (fp_text reference C5 (at 1.378 -2.0573 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SLC_Free_PCB:TO220BH (layer Top) (tedit 5CA126FF) (tstamp 5BE1D292) + (at 117.69 108.84) + (descr "Molded Package

\ngrid 2.54 mm") + (path /F1F22196A6F5BEF) + (fp_text reference IC3 (at -3.81 -5.207 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value IRF3710 (at -3.937 -2.54 90) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_line (start -5.207 1.27) (end 5.207 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -14.605) (end -5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 1.27) (end 5.207 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -11.176) (end 4.318 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -11.176) (end 4.318 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -12.7) (end 5.207 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -12.7) (end 5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 1.27) (end -5.207 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -11.176) (end -4.318 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -11.176) (end -4.318 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -12.7) (end -5.207 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -12.7) (end -5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.572 0.635) (end 4.572 0.635) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -7.62) (end 4.572 0.635) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -7.62) (end -4.572 -7.62) (layer F.SilkS) (width 0.0508)) + (fp_line (start -4.572 0.635) (end -4.572 -7.62) (layer F.SilkS) (width 0.0508)) + (fp_text user A17,5mm (at -4.445 -7.874) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.1016)) (justify left bottom)) + ) + (fp_poly (pts (xy 2.159 4.699) (xy 2.921 4.699) (xy 2.921 4.064) (xy 2.159 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.381 4.699) (xy 0.381 4.699) (xy 0.381 4.064) (xy -0.381 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 4.699) (xy -2.159 4.699) (xy -2.159 4.064) (xy -2.921 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.175 4.064) (xy -1.905 4.064) (xy -1.905 1.27) (xy -3.175 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.635 4.064) (xy 0.635 4.064) (xy 0.635 1.27) (xy -0.635 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 1.905 4.064) (xy 3.175 4.064) (xy 3.175 1.27) (xy 1.905 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 6.604) (xy -2.159 6.604) (xy -2.159 4.699) (xy -2.921 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -0.381 6.604) (xy 0.381 6.604) (xy 0.381 4.699) (xy -0.381 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 2.159 6.604) (xy 2.921 6.604) (xy 2.921 4.699) (xy 2.159 4.699)) (layer F.Fab) (width 0)) + (pad 3 smd rect (at 0 -11.43) (size 11.5 8) (layers Top F.Paste F.Mask)) + (pad G thru_hole oval (at -2.54 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 29 "Net-(IC3-PadG)") (solder_mask_margin 0.0508)) + (pad D thru_hole oval (at 0 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 42 LSU_HEATER-) (solder_mask_margin 0.0508)) + (pad S thru_hole oval (at 2.54 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508) (zone_connect 0)) + ) + + (module SLC_Free_PCB:TO220H (layer Top) (tedit 5C603A56) (tstamp 5BE1D2F9) + (at 174.1143 105.2972) + (descr TO-220) + (path /7C8C299E06F92037) + (fp_text reference IC1 (at -5.461 10.922) (layer F.SilkS) hide + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value 78T (at 0.0857 1.2628) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_line (start -5.207 7.62) (end 5.207 7.62) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -8.255) (end -5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 7.62) (end 5.207 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -4.826) (end 4.318 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -4.826) (end 4.318 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -6.35) (end 5.207 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -6.35) (end 5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 7.62) (end -5.207 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -4.826) (end -4.318 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -4.826) (end -4.318 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -6.35) (end -5.207 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -6.35) (end -5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.572 6.985) (end 4.572 6.985) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -1.27) (end 4.572 6.985) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -1.27) (end -4.572 -1.27) (layer F.SilkS) (width 0.0508)) + (fp_line (start -4.572 6.985) (end -4.572 -1.27) (layer F.SilkS) (width 0.0508)) + (fp_poly (pts (xy 2.159 11.049) (xy 2.921 11.049) (xy 2.921 10.414) (xy 2.159 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.381 11.049) (xy 0.381 11.049) (xy 0.381 10.414) (xy -0.381 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 11.049) (xy -2.159 11.049) (xy -2.159 10.414) (xy -2.921 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.175 10.414) (xy -1.905 10.414) (xy -1.905 7.62) (xy -3.175 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.635 10.414) (xy 0.635 10.414) (xy 0.635 7.62) (xy -0.635 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 1.905 10.414) (xy 3.175 10.414) (xy 3.175 7.62) (xy 1.905 7.62)) (layer F.SilkS) (width 0)) + (pad 4 smd rect (at 0 -5.08) (size 11.5 8) (layers Top F.Paste F.Mask)) + (pad 1 thru_hole oval (at -2.54 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)") (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at 0 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at 2.54 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 114.0179 121.2216) + (fp_text reference @HOLE0 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 188.9479 121.2216) + (fp_text reference @HOLE1 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 188.9479 90.3098) + (fp_text reference @HOLE2 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 114.0179 90.3098) + (fp_text reference @HOLE3 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module SLC_Free_PCB:DIL28-3 (layer Top) (tedit 0) (tstamp 5BE1D13C) + (at 149.8573 107.658) + (descr "Dual In Line Package Small") + (path /F9CA0720FE6CCBEC) + (fp_text reference IC2 (at -18.2173 0.932 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value CY8C24423A-24PXI (at -8.509 0.635) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom)) + ) + (fp_arc (start -17.78 0) (end -17.78 -1.016) (angle 180) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 2.921) (end -17.78 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 -2.921) (end -17.78 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -2.921) (end 17.78 2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 2.921) (end 17.78 2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -2.921) (end -17.78 -2.921) (layer F.SilkS) (width 0.1524)) + (pad 28 thru_hole oval (at -16.51 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + (pad 27 thru_hole oval (at -13.97 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 3 /RT_ADC) (solder_mask_margin 0.0508)) + (pad 26 thru_hole oval (at -11.43 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 4 /P0[4]) (solder_mask_margin 0.0508)) + (pad 25 thru_hole oval (at -8.89 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 5 /AC_TEMP_SENSE_OUT) (solder_mask_margin 0.0508)) + (pad 24 thru_hole oval (at -6.35 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 6 /RE+_ADC) (solder_mask_margin 0.0508)) + (pad 23 thru_hole oval (at -3.81 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 7 /LCD_RW) (solder_mask_margin 0.0508)) + (pad 22 thru_hole oval (at -1.27 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 8 /LCD_E) (solder_mask_margin 0.0508)) + (pad 21 thru_hole oval (at 1.27 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 9 /LCD_DB6) (solder_mask_margin 0.0508)) + (pad 20 thru_hole oval (at 3.81 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 10 /LCD_DB4) (solder_mask_margin 0.0508)) + (pad 19 thru_hole oval (at 6.35 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 11 /XRES) (solder_mask_margin 0.0508)) + (pad 18 thru_hole oval (at 8.89 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 12 /PWM_NB_OUT) (solder_mask_margin 0.0508)) + (pad 17 thru_hole oval (at 11.43 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 13 /PWM_HEATER) (solder_mask_margin 0.0508)) + (pad 16 thru_hole oval (at 13.97 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 14 /CAL) (solder_mask_margin 0.0508)) + (pad 15 thru_hole oval (at 16.51 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 15 /PROG_SDA) (solder_mask_margin 0.0508)) + (pad 14 thru_hole oval (at 16.51 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 13 thru_hole oval (at 13.97 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 16 /PROG_SCL) (solder_mask_margin 0.0508)) + (pad 12 thru_hole oval (at 11.43 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 17 /P1[3]) (solder_mask_margin 0.0508)) + (pad 11 thru_hole oval (at 8.89 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 18 /PWM_LIN_OUT) (solder_mask_margin 0.0508)) + (pad 10 thru_hole oval (at 6.35 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 19 /P1[7]) (solder_mask_margin 0.0508)) + (pad 9 thru_hole oval (at 3.81 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 20 "Net-(IC2-Pad9)") (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at -6.35 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 21 /P2[7]) (solder_mask_margin 0.0508)) + (pad 6 thru_hole oval (at -3.81 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 22 /LCD_RS) (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at -8.89 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -11.43 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 24 /LSU_VGND) (solder_mask_margin 0.0508)) + (pad 8 thru_hole oval (at 1.27 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 25 /LCD_DB5) (solder_mask_margin 0.0508)) + (pad 7 thru_hole oval (at -1.27 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 26 /LCD_DB7) (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -13.97 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 27 /LSU_IA) (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -16.51 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 28 /APE_ADC) (solder_mask_margin 0.0508)) + ) + + (module SLC_Free_PCB:1X05 (layer Top) (tedit 0) (tstamp 5BE1D3F8) + (at 178.7371 120.5866) + (descr "PIN HEADER") + (path /CD71B194ACD8E5B6) + (fp_text reference JP3 (at -6.4262 -1.8288 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value PINHD-1X5 (at -6.35 3.175) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom)) + ) + (fp_poly (pts (xy 4.826 0.254) (xy 5.334 0.254) (xy 5.334 -0.254) (xy 4.826 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -5.334 0.254) (xy -4.826 0.254) (xy -4.826 -0.254) (xy -5.334 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -2.794 0.254) (xy -2.286 0.254) (xy -2.286 -0.254) (xy -2.794 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -0.254 0.254) (xy 0.254 0.254) (xy 0.254 -0.254) (xy -0.254 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 2.286 0.254) (xy 2.794 0.254) (xy 2.794 -0.254) (xy 2.286 -0.254)) (layer F.Fab) (width 0)) + (fp_line (start 5.715 1.27) (end 4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.81 0.635) (end 4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.445 -1.27) (end 3.81 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 6.35 0.635) (end 5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 6.35 -0.635) (end 6.35 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.715 -1.27) (end 6.35 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.445 -1.27) (end 5.715 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.445 1.27) (end -5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -6.35 0.635) (end -5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.715 -1.27) (end -6.35 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -6.35 -0.635) (end -6.35 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.175 1.27) (end -3.81 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.905 1.27) (end -3.175 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 0.635) (end -1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -0.635) (end -1.27 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.905 -1.27) (end -1.27 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.175 -1.27) (end -1.905 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.81 -0.635) (end -3.175 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.81 0.635) (end -4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.81 -0.635) (end -3.81 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.445 -1.27) (end -3.81 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.715 -1.27) (end -4.445 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.175 1.27) (end 1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 0.635) (end 1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.905 -1.27) (end 1.27 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.635 1.27) (end -1.27 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.635 1.27) (end -0.635 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 0.635) (end 0.635 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 -0.635) (end 1.27 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.635 -1.27) (end 0.635 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.81 0.635) (end 3.175 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.81 -0.635) (end 3.81 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.175 -1.27) (end 3.81 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.905 -1.27) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524)) + (pad 5 thru_hole oval (at 5.08 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 15 /PROG_SDA) (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at 2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 16 /PROG_SCL) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at 0 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 11 /XRES) (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -5.08 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + ) + + (module SLC_Free_PCB:1X16 (layer Top) (tedit 0) (tstamp 5BE1D442) + (at 138.5289 90.3098) + (descr "PIN HEADER") + (path /28A9B5EA47274FB3) + (fp_text reference JP4 (at -20.3962 -1.8288 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value PINHD-1X16 (at -20.32 3.175) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom)) + ) + (fp_poly (pts (xy 18.796 0.254) (xy 19.304 0.254) (xy 19.304 -0.254) (xy 18.796 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -19.304 0.254) (xy -18.796 0.254) (xy -18.796 -0.254) (xy -19.304 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -16.764 0.254) (xy -16.256 0.254) (xy -16.256 -0.254) (xy -16.764 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -14.224 0.254) (xy -13.716 0.254) (xy -13.716 -0.254) (xy -14.224 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -11.684 0.254) (xy -11.176 0.254) (xy -11.176 -0.254) (xy -11.684 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -9.144 0.254) (xy -8.636 0.254) (xy -8.636 -0.254) (xy -9.144 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -6.604 0.254) (xy -6.096 0.254) (xy -6.096 -0.254) (xy -6.604 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -4.064 0.254) (xy -3.556 0.254) (xy -3.556 -0.254) (xy -4.064 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -1.524 0.254) (xy -1.016 0.254) (xy -1.016 -0.254) (xy -1.524 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 1.016 0.254) (xy 1.524 0.254) (xy 1.524 -0.254) (xy 1.016 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 3.556 0.254) (xy 4.064 0.254) (xy 4.064 -0.254) (xy 3.556 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 6.096 0.254) (xy 6.604 0.254) (xy 6.604 -0.254) (xy 6.096 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 8.636 0.254) (xy 9.144 0.254) (xy 9.144 -0.254) (xy 8.636 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 11.176 0.254) (xy 11.684 0.254) (xy 11.684 -0.254) (xy 11.176 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 13.716 0.254) (xy 14.224 0.254) (xy 14.224 -0.254) (xy 13.716 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 16.256 0.254) (xy 16.764 0.254) (xy 16.764 -0.254) (xy 16.256 -0.254)) (layer F.Fab) (width 0)) + (fp_line (start 18.415 1.27) (end 17.78 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.685 1.27) (end 18.415 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 20.32 0.635) (end 19.685 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 20.32 -0.635) (end 20.32 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.685 -1.27) (end 20.32 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 18.415 -1.27) (end 19.685 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -0.635) (end 18.415 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -18.415 1.27) (end -19.685 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -20.32 0.635) (end -19.685 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -19.685 -1.27) (end -20.32 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -20.32 -0.635) (end -20.32 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.145 1.27) (end -17.78 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -15.875 1.27) (end -17.145 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1.905 -1.27) (end 2.54 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.635 -1.27) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524)) + (pad 6 thru_hole oval (at 6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 21 /P2[7]) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 19 /P1[7]) (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 17 /P1[3]) (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 4 /P0[4]) (solder_mask_margin 0.0508)) + ) + + (module Diode_THT:D_DO-15_P10.16mm_Horizontal (layer Top) (tedit 5C6154CD) (tstamp 5C6E5383) + (at 183.73 90.7 180) + (descr "Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf") + (tags "Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm") + (path /5C62CF2C) + (fp_text reference D2 (at 5.66 0.02 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1N4004 (at 5.08 2.92 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.28 -1.8) (end 1.28 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.28 1.8) (end 8.88 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 1.8) (end 8.88 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 -1.8) (end 1.28 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.28 0) (layer F.Fab) (width 0.1)) + (fp_line (start 10.16 0) (end 8.88 0) (layer F.Fab) (width 0.1)) + (fp_line (start 2.42 -1.8) (end 2.42 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.52 -1.8) (end 2.52 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.32 -1.8) (end 2.32 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.16 -1.44) (end 1.16 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.92) (end 9 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 -1.92) (end 9 -1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.44) (end 1.16 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.92) (end 9 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 1.92) (end 9 1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.42 -1.92) (end 2.42 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.54 -1.92) (end 2.54 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.3 -1.92) (end 2.3 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 -2.05) (end -1.45 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 2.05) (end 11.61 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 2.05) (end 11.61 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 -2.05) (end -1.45 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 5.65 0 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 180) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 180) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 44 "Net-(D2-Pad1)")) + (pad 2 thru_hole oval (at 10.16 0 180) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 43 12V)) + (model ${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-15_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Diode_THT:D_DO-15_P10.16mm_Horizontal (layer Top) (tedit 5C6154B0) (tstamp 5C6E54F6) + (at 182.25 105.44 270) + (descr "Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf") + (tags "Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm") + (path /5C630786) + (fp_text reference D1 (at 5.63 -0.03 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1N4004 (at 5.08 2.92 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.28 -1.8) (end 1.28 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.28 1.8) (end 8.88 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 1.8) (end 8.88 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 -1.8) (end 1.28 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.28 0) (layer F.Fab) (width 0.1)) + (fp_line (start 10.16 0) (end 8.88 0) (layer F.Fab) (width 0.1)) + (fp_line (start 2.42 -1.8) (end 2.42 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.52 -1.8) (end 2.52 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.32 -1.8) (end 2.32 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.16 -1.44) (end 1.16 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.92) (end 9 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 -1.92) (end 9 -1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.44) (end 1.16 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.92) (end 9 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 1.92) (end 9 1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.42 -1.92) (end 2.42 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.54 -1.92) (end 2.54 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.3 -1.92) (end 2.3 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 -2.05) (end -1.45 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 2.05) (end 11.61 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 2.05) (end 11.61 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 -2.05) (end -1.45 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 5.65 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 270) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)")) + (pad 2 thru_hole oval (at 10.16 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-15_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Diode_THT:D_DO-15_P10.16mm_Horizontal (layer Top) (tedit 5C6154D7) (tstamp 5C6E5515) + (at 189.14 96.14 270) + (descr "Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf") + (tags "Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm") + (path /5C630A00) + (fp_text reference D3 (at 5.67 0.04 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value P6KE24A (at 5.08 2.92 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 270) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 5.65 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.61 -2.05) (end -1.45 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 2.05) (end 11.61 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 2.05) (end 11.61 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 -2.05) (end -1.45 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.3 -1.92) (end 2.3 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.54 -1.92) (end 2.54 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.42 -1.92) (end 2.42 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 1.92) (end 9 1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.92) (end 9 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.44) (end 1.16 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 -1.92) (end 9 -1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.92) (end 9 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.44) (end 1.16 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.32 -1.8) (end 2.32 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.52 -1.8) (end 2.52 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.42 -1.8) (end 2.42 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 10.16 0) (end 8.88 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.28 0) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 -1.8) (end 1.28 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 1.8) (end 8.88 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.28 1.8) (end 8.88 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.28 -1.8) (end 1.28 1.8) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 10.16 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole rect (at 0 0 270) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-15_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:CP_Radial_D5.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5C6D88DA) + (at 184.9 98.16 180) + (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor") + (tags "CP Radial series Radial pin pitch 2.50mm diameter 5mm Electrolytic Capacitor") + (path /5C619F16) + (fp_text reference C1 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"Net-(JP4-Pad10)") + (add_net "Net-(JP4-Pad7)") + (add_net "Net-(JP4-Pad8)") + (add_net "Net-(JP4-Pad9)") + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D193) + (at 152.9815 114.49 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /436F0B63FC0C7BCC) + (fp_text reference R12 (at 3.82 0.0115 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 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(width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 39 LIN_OUT)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 18 /PWM_LIN_OUT)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_Molex:Molex_Mini-Fit_Jr_5569-04A2_2x02_P4.20mm_Horizontal (layer Top) (tedit 5A15CC90) (tstamp 5C539864) + (at 102.73 98.99 90) + (descr "Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-04A2, example for new mpn: 39-30-0040, 2 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator") + (tags "connector Molex Mini-Fit_Jr top entryplastic_peg") + (path /848DA6002F430EF2) + (fp_text reference JP1 (at 2.1 -15.1 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PINHD-1X5 (at 2.1 8.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 2.1 -13.2 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 7.4 -14.4) (end -3.2 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.4 7.85) (end 7.4 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 7.85) (end 7.4 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 -14.4) (end -3.2 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 -2.514214) (end 1 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -1.1) (end 0 -2.514214) (layer F.Fab) (width 0.1)) + (fp_line (start -2.6 -0.3) (end -2 0) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.6 0.3) (end -2.6 -0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 0) (end -2.6 0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.61 -1) (end 2.59 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.5 2.11) (end 4.5 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.9 2.11) (end 3.9 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.3 2.11) (end 0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.3 2.11) (end -0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.01 -14.01) (end 2.1 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.01 -0.99) (end 7.01 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.2 -0.99) (end 7.01 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -14.01) (end 2.1 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -0.99) (end -2.81 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 -0.99) (end -2.81 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.9 -13.9) (end -2.7 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start 6.9 -1.1) (end 6.9 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -1.1) (end 6.9 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -13.9) (end -2.7 -1.1) (layer F.Fab) (width 0.1)) + (pad "" np_thru_hole circle (at 2.1 -7.3 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) + (pad 4 thru_hole oval (at 4.2 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 41 NB_OUT)) + (pad 3 thru_hole oval (at 0 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 39 LIN_OUT)) + (pad 2 thru_hole oval (at 4.2 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole rect (at 0 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 43 12V)) + (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Mini-Fit_Jr_5569-04A2_2x02_P4.20mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_Molex:Molex_Mini-Fit_Jr_5569-06A2_2x03_P4.20mm_Horizontal (layer Top) (tedit 5A15CC90) (tstamp 5C53988E) + (at 102.72 116.78 90) + (descr "Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-06A2, example for new mpn: 39-30-0060, 3 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator") + (tags "connector Molex Mini-Fit_Jr top entryplastic_peg") + (path /4804D7FCFA93C76E) + (fp_text reference JP2 (at 4.2 -15.1 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PINHD-1X6 (at 4.2 8.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 4.2 -13.2 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.6 -14.4) (end -3.2 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.6 7.85) (end 11.6 -14.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 7.85) (end 11.6 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.2 -14.4) (end -3.2 7.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 -2.514214) (end 1 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -1.1) (end 0 -2.514214) (layer F.Fab) (width 0.1)) + (fp_line (start -2.6 -0.3) (end -2 0) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.6 0.3) (end -2.6 -0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 0) (end -2.6 0.3) (layer F.SilkS) (width 0.12)) + (fp_line (start 5.81 -1) (end 6.79 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.61 -1) (end 2.59 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.7 2.11) (end 8.7 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.1 2.11) (end 8.1 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 4.5 2.11) (end 4.5 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.9 2.11) (end 3.9 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.3 2.11) (end 0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.3 2.11) (end -0.3 3.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 11.21 -14.01) (end 4.2 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 11.21 -0.99) (end 11.21 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.4 -0.99) (end 11.21 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -14.01) (end 4.2 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.81 -0.99) (end -2.81 -14.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -2 -0.99) (end -2.81 -0.99) (layer F.SilkS) (width 0.12)) + (fp_line (start 11.1 -13.9) (end -2.7 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start 11.1 -1.1) (end 11.1 -13.9) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -1.1) (end 11.1 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -13.9) (end -2.7 -1.1) (layer F.Fab) (width 0.1)) + (pad "" np_thru_hole circle (at 8.4 -7.3 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) + (pad "" np_thru_hole circle (at 0 -7.3 90) (size 3 3) (drill 3) (layers *.Cu *.Mask)) + (pad 6 thru_hole oval (at 8.4 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 32 /LSU_IP)) + (pad 5 thru_hole oval (at 4.2 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (pad 4 thru_hole oval (at 0 5.5 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 42 LSU_HEATER-)) + (pad 3 thru_hole oval (at 8.4 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 27 /LSU_IA)) + (pad 2 thru_hole oval (at 4.2 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 24 /LSU_VGND)) + (pad 1 thru_hole rect (at 0 0 90) (size 2.7 3.7) (drill 1.8) (layers *.Cu *.Mask) + (net 43 12V)) + (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Mini-Fit_Jr_5569-06A2_2x03_P4.20mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D59A) + (at 172.24 94.27) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /3DE44650224EEC03) + (fp_text reference R1 (at 5.02 0.05) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10 (at 5.08 2.37) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 5.05 0.05) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.21 1.5) (end 11.21 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 11.21 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 9.12 0) (end 8.35 0) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.04 0) (end 1.81 0) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.35 -1.37) (end 1.81 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.35 1.37) (end 8.35 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.81 1.37) (end 8.35 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.81 -1.37) (end 1.81 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1)) + (fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)")) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 44 "Net-(D2-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D1C5) + (at 141.15 98.55 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /92D3568E45125544) + (fp_text reference C6 (at 4.27 -0.01 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1uf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 "Net-(C6-Pad2)")) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 /AC_TEMP_SENSE_OUT)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D279) + (at 147.925 101.1 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /4721ED5BD7380F0A) + (fp_text reference R7 (at 3.74 -0.105 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value R-US_0204_7 (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D22E) + (at 144.81 93.47 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /92B6EBFFB35105BA) + (fp_text reference R8 (at 3.8 -0.04 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 6 /RE+_ADC)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D547) + (at 160.775 90.375) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /DE7FF8CFEFF1A6CC) + (fp_text reference R16 (at 3.755 -0.005) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100 (at 3.81 2.37) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 33 /LCD_ANODE)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D1AC) + (at 156.25 101.125 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /97512B480A067037) + (fp_text reference R10 (at 3.895 -0.01 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 /XRES)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D429) + (at 162.65 100.825 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /F90901174EA54AE4) + (fp_text reference R11 (at 3.825 2.41 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 41 NB_OUT)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 12 /PWM_NB_OUT)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5C53A8EE) + (at 124.05 111.33 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /FE98EEC3D5237DDE) + (fp_text reference R13 (at 3.81 -2.37 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1K (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 29 "Net-(IC3-PadG)")) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 13 /PWM_HEATER)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D374) + (at 131.275 121.82 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /A761C73577E48E03) + (fp_text reference R3 (at 3.89 -2.615 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 61.9 (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 27 /LSU_IA)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 32 /LSU_IP)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D247) + (at 128.725 114.2 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /739C9E2D733DB3B0) + (fp_text reference R2 (at 3.81 -2.37 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 32 /LSU_IP)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 28 /APE_ADC)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D260) + (at 133.725 114.2 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /EF632DAE64669C67) + (fp_text reference R6 (at 3.77 -0.095 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 /RT_ADC)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 27 /LSU_IA)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D2B2) + (at 137.325 121.82 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /CCADE161F5E59E3A) + (fp_text reference R5 (at 3.64 -0.115 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D2CB) + (at 140.725 114.2 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /C1743B5DAF631EA7) + (fp_text reference R9 (at 3.77 -0.105 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D17A) + (at 138.3003 93.4594 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /23E57F8398DC0D12) + (fp_text reference R4 (at 3.7506 0.1503 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10k (at 3.81 2.37 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 "Net-(C6-Pad2)")) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 /LSU_NERMEST)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D515) + (at 129.075 94.55 270) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /F87BD34C42B60E9C) + (fp_text reference R14 (at 3.9 0.015 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7k (at 3.55 0.175 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 38 /LCD_CONTRAST)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer Top) (tedit 5AE5139B) (tstamp 5BE1D52E) + (at 126.2 101.7 90) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /C78DE6E200557CD) + (fp_text reference R15 (at 3.76 -0.08 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1.2k (at 3.81 2.37 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.67 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.67 1.5) (end 8.67 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end 8.67 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer F.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 0.66 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 6.96 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 6.96 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 0.66 1.25) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 38 /LCD_CONTRAST)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D500) + (at 129 104.9 180) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /A78DF8BC5F7CD27E) + (fp_text reference C11 (at 1.25 -2.25 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 180) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D2E4) + (at 144.075 117.075 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /309F8869BFFA351D) + (fp_text reference C7 (at 1.25 -2.25 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 270) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D4D6) + (at 150.275 119.575 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /BEE27C0CB9820DED) + (fp_text reference C10 (at 1.25 -2.25 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.375 2.055 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 39 LIN_OUT)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D32A) + (at 185.82 115.62) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /C3DB98572E544DC1) + (fp_text reference C4 (at 1.2 2.1) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D315) + (at 184.9 102.57 180) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /3B2CE81D6F136683) + (fp_text reference C2 (at -0.62 -2.09 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 180) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D4EB) + (at 159.3569 96 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /F0EA715621F188E2) + (fp_text reference C9 (at -2.18 -0.0131 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 270) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 41 NB_OUT)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D1DA) + (at 153.13 96.3 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /8488437E6406DB36) + (fp_text reference C8 (at 1.25 -2.25 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 /XRES)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer Top) (tedit 5AE50EF0) (tstamp 5BE1D1EF) + (at 133.3473 100.038 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /311CF9FF0A6764) + (fp_text reference C5 (at 1.378 -2.0573 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nf (at 1.25 2.25 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.6 0.6) (thickness 0.09))) + ) + (fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.25) (end -1.05 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.87 1.055) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.87 -1.12) (end 2.87 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.055) (end -0.37 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end -0.37 -1.055) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 1.12) (end 2.87 1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.37 -1.12) (end 2.87 -1.12) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 +5V)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SLC_Free_PCB:TO220BH (layer Top) (tedit 5CA126FF) (tstamp 5BE1D292) + (at 117.69 108.84) + (descr "Molded Package

\ngrid 2.54 mm") + (path /F1F22196A6F5BEF) + (fp_text reference IC3 (at -3.81 -5.207 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value IRF3710 (at -3.937 -2.54 90) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_line (start -5.207 1.27) (end 5.207 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -14.605) (end -5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 1.27) (end 5.207 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -11.176) (end 4.318 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -11.176) (end 4.318 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -12.7) (end 5.207 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -12.7) (end 5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 1.27) (end -5.207 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -11.176) (end -4.318 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -11.176) (end -4.318 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -12.7) (end -5.207 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -12.7) (end -5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.572 0.635) (end 4.572 0.635) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -7.62) (end 4.572 0.635) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -7.62) (end -4.572 -7.62) (layer F.SilkS) (width 0.0508)) + (fp_line (start -4.572 0.635) (end -4.572 -7.62) (layer F.SilkS) (width 0.0508)) + (fp_text user A17,5mm (at -4.445 -7.874) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.1016)) (justify left bottom)) + ) + (fp_poly (pts (xy 2.159 4.699) (xy 2.921 4.699) (xy 2.921 4.064) (xy 2.159 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.381 4.699) (xy 0.381 4.699) (xy 0.381 4.064) (xy -0.381 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 4.699) (xy -2.159 4.699) (xy -2.159 4.064) (xy -2.921 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.175 4.064) (xy -1.905 4.064) (xy -1.905 1.27) (xy -3.175 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.635 4.064) (xy 0.635 4.064) (xy 0.635 1.27) (xy -0.635 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 1.905 4.064) (xy 3.175 4.064) (xy 3.175 1.27) (xy 1.905 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 6.604) (xy -2.159 6.604) (xy -2.159 4.699) (xy -2.921 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -0.381 6.604) (xy 0.381 6.604) (xy 0.381 4.699) (xy -0.381 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 2.159 6.604) (xy 2.921 6.604) (xy 2.921 4.699) (xy 2.159 4.699)) (layer F.Fab) (width 0)) + (pad 3 smd rect (at 0 -11.43) (size 11.5 8) (layers Top F.Paste F.Mask)) + (pad G thru_hole oval (at -2.54 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 29 "Net-(IC3-PadG)") (solder_mask_margin 0.0508)) + (pad D thru_hole oval (at 0 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 42 LSU_HEATER-) (solder_mask_margin 0.0508)) + (pad S thru_hole oval (at 2.54 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508) (zone_connect 0)) + ) + + (module SLC_Free_PCB:TO220H (layer Top) (tedit 5C603A56) (tstamp 5BE1D2F9) + (at 174.1143 105.2972) + (descr TO-220) + (path /7C8C299E06F92037) + (fp_text reference IC1 (at -5.461 10.922) (layer F.SilkS) hide + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value 78T (at 0.0857 1.2628) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_line (start -5.207 7.62) (end 5.207 7.62) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -8.255) (end -5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 7.62) (end 5.207 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -4.826) (end 4.318 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -4.826) (end 4.318 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -6.35) (end 5.207 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -6.35) (end 5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 7.62) (end -5.207 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -4.826) (end -4.318 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -4.826) (end -4.318 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -6.35) (end -5.207 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -6.35) (end -5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.572 6.985) (end 4.572 6.985) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -1.27) (end 4.572 6.985) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -1.27) (end -4.572 -1.27) (layer F.SilkS) (width 0.0508)) + (fp_line (start -4.572 6.985) (end -4.572 -1.27) (layer F.SilkS) (width 0.0508)) + (fp_poly (pts (xy 2.159 11.049) (xy 2.921 11.049) (xy 2.921 10.414) (xy 2.159 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.381 11.049) (xy 0.381 11.049) (xy 0.381 10.414) (xy -0.381 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 11.049) (xy -2.159 11.049) (xy -2.159 10.414) (xy -2.921 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.175 10.414) (xy -1.905 10.414) (xy -1.905 7.62) (xy -3.175 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.635 10.414) (xy 0.635 10.414) (xy 0.635 7.62) (xy -0.635 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 1.905 10.414) (xy 3.175 10.414) (xy 3.175 7.62) (xy 1.905 7.62)) (layer F.SilkS) (width 0)) + (pad 4 smd rect (at 0 -5.08) (size 11.5 8) (layers Top F.Paste F.Mask)) + (pad 1 thru_hole oval (at -2.54 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 45 "Net-(C1-Pad1)") (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at 0 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at 2.54 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 114.0179 121.2216) + (fp_text reference @HOLE0 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 188.9479 121.2216) + (fp_text reference @HOLE1 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 188.9479 90.3098) + (fp_text reference @HOLE2 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module "" (layer Top) (tedit 0) (tstamp 0) + (at 114.0179 90.3098) + (fp_text reference @HOLE3 (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (fp_text value "" (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.15))) + ) + (pad "" np_thru_hole circle (at 0 0) (size 3.2 3.2) (drill 3.2) (layers *.Cu)) + ) + + (module SLC_Free_PCB:DIL28-3 (layer Top) (tedit 0) (tstamp 5BE1D13C) + (at 149.8573 107.658) + (descr "Dual In Line Package Small") + (path /F9CA0720FE6CCBEC) + (fp_text reference IC2 (at -18.2173 0.932 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value CY8C24423A-24PXI (at -8.509 0.635) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom)) + ) + (fp_arc (start -17.78 0) (end -17.78 -1.016) (angle 180) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 2.921) (end -17.78 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 -2.921) (end -17.78 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -2.921) (end 17.78 2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 2.921) (end 17.78 2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -2.921) (end -17.78 -2.921) (layer F.SilkS) (width 0.1524)) + (pad 28 thru_hole oval (at -16.51 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + (pad 27 thru_hole oval (at -13.97 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 3 /RT_ADC) (solder_mask_margin 0.0508)) + (pad 26 thru_hole oval (at -11.43 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 4 /P0[4]) (solder_mask_margin 0.0508)) + (pad 25 thru_hole oval (at -8.89 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 5 /AC_TEMP_SENSE_OUT) (solder_mask_margin 0.0508)) + (pad 24 thru_hole oval (at -6.35 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 6 /RE+_ADC) (solder_mask_margin 0.0508)) + (pad 23 thru_hole oval (at -3.81 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 7 /LCD_RW) (solder_mask_margin 0.0508)) + (pad 22 thru_hole oval (at -1.27 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 8 /LCD_E) (solder_mask_margin 0.0508)) + (pad 21 thru_hole oval (at 1.27 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 9 /LCD_DB6) (solder_mask_margin 0.0508)) + (pad 20 thru_hole oval (at 3.81 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 10 /LCD_DB4) (solder_mask_margin 0.0508)) + (pad 19 thru_hole oval (at 6.35 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 11 /XRES) (solder_mask_margin 0.0508)) + (pad 18 thru_hole oval (at 8.89 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 12 /PWM_NB_OUT) (solder_mask_margin 0.0508)) + (pad 17 thru_hole oval (at 11.43 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 13 /PWM_HEATER) (solder_mask_margin 0.0508)) + (pad 16 thru_hole oval (at 13.97 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 14 /CAL) (solder_mask_margin 0.0508)) + (pad 15 thru_hole oval (at 16.51 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 15 /PROG_SDA) (solder_mask_margin 0.0508)) + (pad 14 thru_hole oval (at 16.51 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 13 thru_hole oval (at 13.97 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 16 /PROG_SCL) (solder_mask_margin 0.0508)) + (pad 12 thru_hole oval (at 11.43 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 17 /P1[3]) (solder_mask_margin 0.0508)) + (pad 11 thru_hole oval (at 8.89 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 18 /PWM_LIN_OUT) (solder_mask_margin 0.0508)) + (pad 10 thru_hole oval (at 6.35 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 19 /P1[7]) (solder_mask_margin 0.0508)) + (pad 9 thru_hole oval (at 3.81 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 20 "Net-(IC2-Pad9)") (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at -6.35 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 21 /P2[7]) (solder_mask_margin 0.0508)) + (pad 6 thru_hole oval (at -3.81 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 22 /LCD_RS) (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at -8.89 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 23 /INSAMP_VREF) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -11.43 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 24 /LSU_VGND) (solder_mask_margin 0.0508)) + (pad 8 thru_hole oval (at 1.27 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 25 /LCD_DB5) (solder_mask_margin 0.0508)) + (pad 7 thru_hole oval (at -1.27 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 26 /LCD_DB7) (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -13.97 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 27 /LSU_IA) (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -16.51 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (net 28 /APE_ADC) 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1.016) (layers *.Cu *.Mask) + (net 10 /LCD_DB4) (solder_mask_margin 0.0508)) + (pad 10 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 34 "Net-(JP4-Pad10)") (solder_mask_margin 0.0508)) + (pad 9 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 35 "Net-(JP4-Pad9)") (solder_mask_margin 0.0508)) + (pad 8 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 36 "Net-(JP4-Pad8)") (solder_mask_margin 0.0508)) + (pad 7 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 37 "Net-(JP4-Pad7)") (solder_mask_margin 0.0508)) + (pad 6 thru_hole oval (at -6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 8 /LCD_E) (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at -8.89 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 7 /LCD_RW) (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at -11.43 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 22 /LCD_RS) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -13.97 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 38 /LCD_CONTRAST) (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -16.51 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -19.05 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + ) + + (module SLC_Free_PCB:1X06 (layer Top) (tedit 5C476CA5) (tstamp 5BE1D560) + (at 163.2431 120.5866) + (descr "PIN HEADER") + (path /B2768A806716FC81) + (fp_text reference JP5 (at 4.3069 -4.1866 90) (layer F.SilkS) hide + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value PINHD-1X6 (at -7.62 3.175) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom)) + ) + (fp_poly (pts (xy 6.096 0.254) (xy 6.604 0.254) (xy 6.604 -0.254) (xy 6.096 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -6.604 0.254) (xy -6.096 0.254) (xy -6.096 -0.254) (xy -6.604 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -4.064 0.254) (xy -3.556 0.254) (xy -3.556 -0.254) (xy -4.064 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -1.524 0.254) (xy -1.016 0.254) (xy -1.016 -0.254) (xy -1.524 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 1.016 0.254) (xy 1.524 0.254) (xy 1.524 -0.254) (xy 1.016 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 3.556 0.254) (xy 4.064 0.254) (xy 4.064 -0.254) (xy 3.556 -0.254)) (layer F.Fab) (width 0)) + (fp_line (start 6.985 1.27) (end 5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.08 0.635) (end 5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.715 -1.27) (end 5.08 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 7.62 0.635) (end 6.985 1.27) (layer F.SilkS) (width 0.1524)) + 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(width 0.1524)) + (fp_line (start -0.635 -1.27) (end 0 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.905 -1.27) (end -0.635 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.54 -0.635) (end -1.905 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.175 1.27) (end 2.54 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.445 1.27) (end 3.175 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.08 0.635) (end 4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.08 -0.635) (end 5.08 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.445 -1.27) (end 5.08 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.175 -1.27) (end 4.445 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.54 -0.635) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.54 0.635) (end 1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.54 -0.635) (end 2.54 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.905 -1.27) (end 2.54 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.635 -1.27) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524)) + (pad 6 thru_hole oval (at 6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 2 +5V) (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 1 GND) (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 21 /P2[7]) (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 19 /P1[7]) (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 17 /P1[3]) (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 4 /P0[4]) (solder_mask_margin 0.0508)) + ) + + (module Diode_THT:D_DO-15_P10.16mm_Horizontal (layer Top) (tedit 5C6154CD) (tstamp 5C6E5383) + (at 183.73 90.7 180) + (descr "Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf") + (tags "Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm") + (path /5C62CF2C) + (fp_text reference D2 (at 5.66 0.02 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1N4004 (at 5.08 2.92 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.28 -1.8) (end 1.28 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.28 1.8) (end 8.88 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 1.8) (end 8.88 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 -1.8) (end 1.28 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.28 0) (layer F.Fab) (width 0.1)) + (fp_line (start 10.16 0) (end 8.88 0) (layer F.Fab) (width 0.1)) + (fp_line (start 2.42 -1.8) (end 2.42 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.52 -1.8) (end 2.52 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.32 -1.8) (end 2.32 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.16 -1.44) (end 1.16 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.92) (end 9 -1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 -1.92) (end 9 -1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.44) (end 1.16 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 1.92) (end 9 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9 1.92) (end 9 1.44) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.42 -1.92) (end 2.42 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.54 -1.92) (end 2.54 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.3 -1.92) (end 2.3 1.92) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 -2.05) (end -1.45 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 2.05) (end 11.61 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 2.05) (end 11.61 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 -2.05) (end -1.45 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 5.65 0 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 180) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 180) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 44 "Net-(D2-Pad1)")) + (pad 2 thru_hole oval (at 10.16 0 180) (size 2.4 2.4) (drill 1.2) (layers *.Cu *.Mask) + (net 43 12V)) + (model ${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-15_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Diode_THT:D_DO-15_P10.16mm_Horizontal (layer Top) (tedit 5C6154B0) (tstamp 5C6E54F6) + (at 182.25 105.44 270) + (descr "Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf") + (tags "Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm") + (path /5C630786) + (fp_text reference D1 (at 5.63 -0.03 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1N4004 (at 5.08 2.92 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.28 -1.8) (end 1.28 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.28 1.8) (end 8.88 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 1.8) (end 8.88 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 8.88 -1.8) (end 1.28 -1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.28 0) (layer F.Fab) (width 0.1)) + (fp_line (start 10.16 0) (end 8.88 0) (layer F.Fab) (width 0.1)) + (fp_line (start 2.42 -1.8) (end 2.42 1.8) (layer F.Fab) (width 0.1)) + (fp_line (start 2.52 -1.8) (end 2.52 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http://www.diodes.com/_files/packages/DO-15.pdf") + (tags "Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm") + (path /5C630A00) + (fp_text reference D3 (at 5.67 0.04 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value P6KE24A (at 5.08 2.92 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 270) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user K (at 0 -2.2 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 5.65 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.61 -2.05) (end -1.45 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.61 2.05) (end 11.61 -2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 2.05) (end 11.61 2.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 -2.05) (end -1.45 2.05) (layer F.CrtYd) (width 0.05)) + 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SLC_Free_PCB-eagle-import) (part R-US_0204_7) + (fields + (field (name Reference) R) + (field (name Value) R-US_0204_7)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive)))) + (libpart (lib SLC_Free_PCB-eagle-import) (part R-US_0309_12) + (fields + (field (name Reference) R) + (field (name Value) R-US_0309_12)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive))))) + (libraries + (library (logical Device) + (uri /usr/share/kicad/library/Device.lib)) + (library (logical SLC_Free_PCB-eagle-import) + (uri /home/jp/Documents/KiCad/SLC_Free_PCB_V2/SLC_Free_PCB-eagle-import.lib))) + (nets + (net (code 1) (name GND) + (node (ref C10) (pin 2)) + (node (ref C11) (pin 2)) + (node (ref JP4) (pin 16)) + (node (ref JP5) (pin 5)) + (node (ref C9) (pin 2)) + (node (ref R15) (pin 1)) + (node (ref C8) (pin 2)) + (node (ref C5) (pin 2)) + (node (ref JP4) (pin 1)) + (node (ref R10) (pin 2)) + (node (ref D3) (pin 2)) + (node (ref JP1) (pin 2)) + (node (ref C3) (pin 2)) + (node (ref C1) (pin 2)) + (node (ref C4) (pin 2)) + (node (ref R9) (pin 2)) + (node (ref C7) (pin 2)) + (node (ref JP3) (pin 2)) + (node (ref IC3) (pin S)) + (node (ref IC1) (pin 2)) + (node (ref C2) (pin 2)) + (node (ref IC2) (pin 14))) + (net (code 2) (name +5V) + (node (ref D1) (pin 2)) + (node (ref JP5) (pin 6)) + (node (ref R16) (pin 2)) + (node (ref R14) (pin 2)) + (node (ref JP4) (pin 2)) + (node (ref C11) (pin 1)) + (node (ref IC2) (pin 28)) + (node (ref IC1) (pin 3)) + (node (ref R5) (pin 1)) + (node (ref C3) (pin 1)) + (node (ref C5) (pin 1)) + (node (ref C4) (pin 1)) + (node (ref R7) (pin 1)) + (node (ref JP3) (pin 1))) + (net (code 3) (name "Net-(IC3-PadG)") + (node (ref R13) (pin 2)) + (node (ref IC3) (pin G))) + (net (code 4) (name LSU_HEATER-) + (node (ref JP2) (pin 4)) + (node (ref IC3) (pin D))) + (net (code 5) (name /LSU_VGND) + (node (ref JP2) (pin 2)) + (node (ref IC2) (pin 3))) + (net (code 6) (name "Net-(IC2-Pad9)") + (node (ref IC2) (pin 9))) + (net (code 7) (name /PWM_NB_OUT) + (node (ref IC2) (pin 18)) + (node (ref R11) (pin 1))) + (net (code 8) (name /PWM_HEATER) + (node (ref IC2) (pin 17)) + (node (ref R13) (pin 1))) + (net (code 9) (name "Net-(C6-Pad2)") + (node (ref C6) (pin 2)) + (node (ref R4) (pin 2))) + (net (code 10) (name /AC_TEMP_SENSE_OUT) + (node (ref IC2) (pin 25)) + (node (ref C6) (pin 1))) + (net (code 11) (name /PWM_LIN_OUT) + (node (ref IC2) (pin 11)) + (node (ref R12) (pin 1))) + (net (code 12) (name /LSU_NERMEST) + (node (ref R7) (pin 2)) + (node (ref JP2) (pin 5)) + (node (ref R4) (pin 1)) + (node (ref R8) (pin 1))) + (net (code 13) (name LIN_OUT) + (node (ref R12) (pin 2)) + (node (ref JP1) (pin 3)) + (node (ref C10) (pin 1))) + (net (code 14) (name NB_OUT) + (node (ref JP1) (pin 4)) + (node (ref C9) (pin 1)) + (node (ref R11) (pin 2))) + (net (code 15) (name "Net-(D2-Pad1)") + (node (ref D2) (pin 1)) + (node (ref R1) (pin 1))) + (net (code 16) (name 12V) + (node (ref D2) (pin 2)) + (node (ref JP1) (pin 1)) + (node (ref JP2) (pin 1))) + (net (code 17) (name "Net-(C1-Pad1)") + (node (ref D3) (pin 1)) + (node (ref C1) (pin 1)) + (node (ref R1) (pin 2)) + (node (ref IC1) (pin 1)) + (node (ref C2) (pin 1)) + (node (ref D1) (pin 1))) + (net (code 18) (name "Net-(JP4-Pad9)") + (node (ref JP4) (pin 9))) + (net (code 19) (name "Net-(JP4-Pad8)") + (node (ref JP4) (pin 8))) + (net (code 20) (name "Net-(JP4-Pad7)") + (node (ref JP4) (pin 7))) + (net (code 21) (name "Net-(JP4-Pad10)") + (node (ref JP4) (pin 10))) + (net (code 22) (name /LCD_ANODE) + (node (ref R16) (pin 1)) + (node (ref JP4) (pin 15))) + (net (code 23) (name /LCD_CONTRAST) + (node (ref R14) (pin 1)) + (node (ref JP4) (pin 3)) + (node (ref R15) (pin 2))) + (net (code 24) (name /XRES) + (node (ref R10) (pin 1)) + (node (ref IC2) (pin 19)) + (node (ref C8) (pin 1)) + (node (ref JP3) (pin 3))) + (net (code 25) (name /H_GND) + (node (ref JP1) (pin 5))) + (net (code 26) (name /LSU_IA) + (node (ref R6) (pin 1)) + (node (ref JP2) (pin 3)) + (node (ref IC2) (pin 2)) + (node (ref R3) (pin 2))) + (net (code 27) (name /LSU_IP) + (node (ref R3) (pin 1)) + (node (ref R2) (pin 2)) + (node (ref JP2) (pin 6))) + (net (code 28) (name /LCD_RS) + (node (ref IC2) (pin 6)) + (node (ref JP4) (pin 4))) + (net (code 29) (name /CAL) + (node (ref IC2) (pin 16))) + (net (code 30) (name /LCD_RW) + (node (ref IC2) (pin 23)) + (node (ref JP4) (pin 5))) + (net (code 31) (name /LCD_E) + (node (ref JP4) (pin 6)) + (node (ref IC2) (pin 22))) + (net (code 32) (name /LCD_DB6) + (node (ref JP4) (pin 13)) + (node (ref IC2) (pin 21))) + (net (code 33) (name /P0[4]) + (node (ref IC2) (pin 26)) + (node (ref JP5) (pin 1))) + (net (code 34) (name /P1[3]) + (node (ref IC2) (pin 12)) + (node (ref JP5) (pin 2))) + (net (code 35) (name /P1[7]) + (node (ref JP5) (pin 3)) + (node (ref IC2) (pin 10))) + (net (code 36) (name /P2[7]) + (node (ref JP5) (pin 4)) + (node (ref IC2) (pin 5))) + (net (code 37) (name /RE+_ADC) + (node (ref IC2) (pin 24)) + (node (ref R8) (pin 2))) + (net (code 38) (name /RT_ADC) + (node (ref IC2) (pin 27)) + (node (ref R6) (pin 2))) + (net (code 39) (name /APE_ADC) + (node (ref R2) (pin 1)) + (node (ref IC2) (pin 1))) + (net (code 40) (name /INSAMP_VREF) + (node (ref R9) (pin 1)) + (node (ref IC2) (pin 4)) + (node (ref R5) (pin 2)) + (node (ref C7) (pin 1))) + (net (code 41) (name /LCD_DB4) + (node (ref IC2) (pin 20)) + (node (ref JP4) (pin 11))) + (net (code 42) (name /LCD_DB7) + (node (ref IC2) (pin 7)) + (node (ref JP4) (pin 14))) + (net (code 43) (name /LCD_DB5) + (node (ref JP4) (pin 12)) + (node (ref IC2) (pin 8))) + (net (code 44) (name /PROG_SCL) + (node (ref JP3) (pin 4)) + (node (ref IC2) (pin 13))) + (net (code 45) (name /PROG_SDA) + (node (ref IC2) (pin 15)) + (node (ref JP3) (pin 5))))) \ No newline at end of file diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/0204_7.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/0204_7.kicad_mod new file mode 100644 index 0000000..8e51146 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/0204_7.kicad_mod @@ -0,0 +1,33 @@ +(module 0204_7 (layer F.Cu) (tedit 0) + (descr "RESISTOR

\ntype 0204, grid 7.5 mm") + (fp_text reference R16 (at -2.54 -1.2954) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value 100 (at -1.6256 0.4826) (layer F.Fab) + (effects (font (size 0.94107 0.94107) (thickness 0.094107)) (justify left bottom)) + ) + (fp_line (start 3.81 0) (end 2.921 0) (layer F.Fab) (width 0.508)) + (fp_line (start -3.81 0) (end -2.921 0) (layer F.Fab) (width 0.508)) + (fp_arc (start -2.286 -0.762) (end -2.54 -0.762) (angle 90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -2.286 0.762) (end -2.54 0.762) (angle -90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start 2.286 0.762) (end 2.286 1.016) (angle -90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start 2.286 -0.762) (end 2.286 -1.016) (angle 90) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.54 0.762) (end -2.54 -0.762) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.286 -1.016) (end -1.905 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.778 -0.889) (end -1.905 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.286 1.016) (end -1.905 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.778 0.889) (end -1.905 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.778 -0.889) (end 1.905 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.778 -0.889) (end -1.778 -0.889) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.778 0.889) (end 1.905 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.778 0.889) (end -1.778 0.889) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.286 -1.016) (end 1.905 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.286 1.016) (end 1.905 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.54 0.762) (end 2.54 -0.762) (layer F.SilkS) (width 0.1524)) + (fp_poly (pts (xy 2.54 0.254) (xy 2.921 0.254) (xy 2.921 -0.254) (xy 2.54 -0.254)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 0.254) (xy -2.54 0.254) (xy -2.54 -0.254) (xy -2.921 -0.254)) (layer F.SilkS) (width 0)) + (pad 1 thru_hole circle (at -3.81 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole circle (at 3.81 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/0309_12.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/0309_12.kicad_mod new file mode 100644 index 0000000..a3ede17 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/0309_12.kicad_mod @@ -0,0 +1,33 @@ +(module 0309_12 (layer F.Cu) (tedit 0) + (descr "RESISTOR

\ntype 0309, grid 12.5 mm") + (fp_text reference R1 (at -4.191 -1.905 -180) (layer F.SilkS) + (effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify right top)) + ) + (fp_text value 10 (at -3.175 0.6858 -180) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify right top)) + ) + (fp_line (start 6.35 0) (end 5.08 0) (layer F.Fab) (width 0.6096)) + (fp_line (start -6.35 0) (end -5.08 0) (layer F.Fab) (width 0.6096)) + (fp_arc (start -4.064 -1.27) (end -4.318 -1.27) (angle 90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -4.064 1.27) (end -4.318 1.27) (angle -90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start 4.064 1.27) (end 4.064 1.524) (angle -90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start 4.064 -1.27) (end 4.064 -1.524) (angle 90) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 1.27) (end -4.318 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.064 -1.524) (end -3.429 -1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.302 -1.397) (end -3.429 -1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.064 1.524) (end -3.429 1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.302 1.397) (end -3.429 1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.302 -1.397) (end 3.429 -1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.302 -1.397) (end -3.302 -1.397) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.302 1.397) (end 3.429 1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.302 1.397) (end -3.302 1.397) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.064 -1.524) (end 3.429 -1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.064 1.524) (end 3.429 1.524) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 1.27) (end 4.318 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_poly (pts (xy 4.318 0.3048) (xy 5.1816 0.3048) (xy 5.1816 -0.3048) (xy 4.318 -0.3048)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -5.1816 0.3048) (xy -4.318 0.3048) (xy -4.318 -0.3048) (xy -5.1816 -0.3048)) (layer F.SilkS) (width 0)) + (pad 1 thru_hole circle (at -6.35 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole circle (at 6.35 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X05.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X05.kicad_mod new file mode 100644 index 0000000..2b93728 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X05.kicad_mod @@ -0,0 +1,60 @@ +(module 1X05 (layer F.Cu) (tedit 0) + (descr "PIN HEADER") + (fp_text reference JP3 (at -6.4262 -1.8288 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value "" (at -6.35 3.175) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom)) + ) + (fp_line (start 1.905 -1.27) (end 3.175 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.175 -1.27) (end 3.81 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.81 -0.635) (end 3.81 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.81 0.635) (end 3.175 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.635 -1.27) (end 0.635 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 -0.635) (end 1.27 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 0.635) (end 0.635 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.635 1.27) (end -0.635 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.635 1.27) (end -1.27 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.905 -1.27) (end 1.27 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 0.635) (end 1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.175 1.27) (end 1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.715 -1.27) (end -4.445 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.445 -1.27) (end -3.81 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.81 -0.635) (end -3.81 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.81 0.635) (end -4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.81 -0.635) (end -3.175 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.175 -1.27) (end -1.905 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.905 -1.27) (end -1.27 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -0.635) (end -1.27 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 0.635) (end -1.905 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.905 1.27) (end -3.175 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.175 1.27) (end -3.81 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -6.35 -0.635) (end -6.35 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.715 -1.27) (end -6.35 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -6.35 0.635) (end -5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.445 1.27) (end -5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.445 -1.27) (end 5.715 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.715 -1.27) (end 6.35 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 6.35 -0.635) (end 6.35 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 6.35 0.635) (end 5.715 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.445 -1.27) (end 3.81 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.81 0.635) (end 4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.715 1.27) (end 4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_poly (pts (xy 2.286 0.254) (xy 2.794 0.254) (xy 2.794 -0.254) (xy 2.286 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -0.254 0.254) (xy 0.254 0.254) (xy 0.254 -0.254) (xy -0.254 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -2.794 0.254) (xy -2.286 0.254) (xy -2.286 -0.254) (xy -2.794 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -5.334 0.254) (xy -4.826 0.254) (xy -4.826 -0.254) (xy -5.334 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 4.826 0.254) (xy 5.334 0.254) (xy 5.334 -0.254) (xy 4.826 -0.254)) (layer F.Fab) (width 0)) + (pad 1 thru_hole oval (at -5.08 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at 0 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at 2.54 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at 5.08 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X06.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X06.kicad_mod new file mode 100644 index 0000000..e8eaa6f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X06.kicad_mod @@ -0,0 +1,70 @@ +(module 1X06 (layer F.Cu) (tedit 0) + (descr "PIN HEADER") + (fp_text reference JP5 (at -7.6962 -1.8288 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value "" (at -7.62 3.175) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom)) + ) + (fp_line (start 0.635 -1.27) (end 1.905 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.905 -1.27) (end 2.54 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.54 -0.635) (end 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3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 6 thru_hole oval (at 6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X16.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X16.kicad_mod new file mode 100644 index 0000000..4350ac9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/1X16.kicad_mod @@ -0,0 +1,170 @@ +(module 1X16 (layer F.Cu) (tedit 0) + (descr "PIN HEADER") + (fp_text reference JP4 (at -20.3962 -1.8288 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value "" (at -20.32 3.175) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.09652)) (justify left bottom)) + ) + (fp_line (start 15.24 -0.635) (end 15.875 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 15.875 -1.27) (end 17.145 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.145 -1.27) (end 17.78 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -0.635) (end 17.78 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 0.635) (end 17.145 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.145 1.27) (end 15.875 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 15.875 1.27) (end 15.24 0.635) (layer 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(end -4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.175 1.27) (end -4.445 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -12.065 -1.27) (end -10.795 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -10.795 -1.27) (end -10.16 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -10.16 -0.635) (end -10.16 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -10.16 0.635) (end -10.795 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -10.16 -0.635) (end -9.525 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -9.525 -1.27) (end -8.255 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -8.255 -1.27) (end -7.62 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -7.62 -0.635) (end -7.62 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -7.62 0.635) (end -8.255 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -8.255 1.27) (end -9.525 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -9.525 1.27) (end -10.16 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -15.24 -0.635) (end -14.605 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -14.605 -1.27) (end -13.335 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -13.335 -1.27) (end -12.7 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -12.7 -0.635) (end -12.7 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -12.7 0.635) (end -13.335 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -13.335 1.27) (end -14.605 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -14.605 1.27) (end -15.24 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -12.065 -1.27) (end -12.7 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -12.7 0.635) (end -12.065 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -10.795 1.27) (end -12.065 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -19.685 -1.27) (end -18.415 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -18.415 -1.27) (end -17.78 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 -0.635) (end -17.78 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 0.635) (end -18.415 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 -0.635) (end -17.145 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.145 -1.27) (end -15.875 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -15.875 -1.27) (end -15.24 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -15.24 -0.635) (end -15.24 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -15.24 0.635) (end -15.875 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -15.875 1.27) (end -17.145 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.145 1.27) (end -17.78 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -20.32 -0.635) (end -20.32 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -19.685 -1.27) (end -20.32 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start -20.32 0.635) (end -19.685 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -18.415 1.27) (end -19.685 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -0.635) (end 18.415 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 18.415 -1.27) (end 19.685 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.685 -1.27) (end 20.32 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 20.32 -0.635) (end 20.32 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 20.32 0.635) (end 19.685 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.685 1.27) (end 18.415 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 18.415 1.27) (end 17.78 0.635) (layer F.SilkS) (width 0.1524)) + (fp_poly (pts (xy 16.256 0.254) (xy 16.764 0.254) (xy 16.764 -0.254) (xy 16.256 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 13.716 0.254) (xy 14.224 0.254) (xy 14.224 -0.254) (xy 13.716 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 11.176 0.254) (xy 11.684 0.254) (xy 11.684 -0.254) (xy 11.176 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 8.636 0.254) (xy 9.144 0.254) (xy 9.144 -0.254) (xy 8.636 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 6.096 0.254) (xy 6.604 0.254) (xy 6.604 -0.254) (xy 6.096 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 3.556 0.254) (xy 4.064 0.254) (xy 4.064 -0.254) (xy 3.556 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 1.016 0.254) (xy 1.524 0.254) (xy 1.524 -0.254) (xy 1.016 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -1.524 0.254) (xy -1.016 0.254) (xy -1.016 -0.254) (xy -1.524 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -4.064 0.254) (xy -3.556 0.254) (xy -3.556 -0.254) (xy -4.064 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -6.604 0.254) (xy -6.096 0.254) (xy -6.096 -0.254) (xy -6.604 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -9.144 0.254) (xy -8.636 0.254) (xy -8.636 -0.254) (xy -9.144 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -11.684 0.254) (xy -11.176 0.254) (xy -11.176 -0.254) (xy -11.684 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -14.224 0.254) (xy -13.716 0.254) (xy -13.716 -0.254) (xy -14.224 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -16.764 0.254) (xy -16.256 0.254) (xy -16.256 -0.254) (xy -16.764 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -19.304 0.254) (xy -18.796 0.254) (xy -18.796 -0.254) (xy -19.304 -0.254)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 18.796 0.254) (xy 19.304 0.254) (xy 19.304 -0.254) (xy 18.796 -0.254)) (layer F.Fab) (width 0)) + (pad 1 thru_hole oval (at -19.05 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -16.51 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -13.97 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at -11.43 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at -8.89 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 6 thru_hole oval (at -6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 7 thru_hole oval (at -3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 8 thru_hole oval (at -1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 9 thru_hole oval (at 1.27 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 10 thru_hole oval (at 3.81 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 11 thru_hole oval (at 6.35 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 12 thru_hole oval (at 8.89 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 13 thru_hole oval (at 11.43 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 14 thru_hole oval (at 13.97 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 15 thru_hole oval (at 16.51 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 16 thru_hole oval (at 19.05 0 90) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/C025-025X050.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/C025-025X050.kicad_mod new file mode 100644 index 0000000..62dd7f1 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/C025-025X050.kicad_mod @@ -0,0 +1,29 @@ +(module C025-025X050 (layer F.Cu) (tedit 0) + (descr "CAPACITOR

\ngrid 2.5 mm, outline 2.5 x 5 mm") + (fp_text reference C11 (at -2.286 -1.524 -90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value 100nf (at -2.286 2.794 -180) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_line (start -2.159 -1.27) (end 2.159 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.159 1.27) (end -2.159 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.413 -1.016) (end 2.413 1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.413 -1.016) (end -2.413 1.016) (layer F.SilkS) (width 0.1524)) + (fp_arc (start 2.159 -1.016) (end 2.159 -1.27) (angle 90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -2.159 -1.016) (end -2.413 -1.016) (angle 90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start 2.159 1.016) (end 2.159 1.27) (angle -90) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -2.159 1.016) (end -2.413 1.016) (angle -90) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.762 0) (end 0.381 0) (layer F.Fab) (width 0.1524)) + (fp_line (start 0.381 0) (end 0.254 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0.254 0) (end 0.254 -0.762) (layer F.SilkS) (width 0.254)) + (fp_line (start 0.254 0) (end 0.254 0.762) (layer F.SilkS) (width 0.254)) + (fp_line (start -0.254 -0.762) (end -0.254 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -0.254 0) (end -0.254 0.762) (layer F.SilkS) (width 0.254)) + (fp_line (start -0.254 0) (end -0.381 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.381 0) (end -0.762 0) (layer F.Fab) (width 0.1524)) + (pad 1 thru_hole circle (at -1.27 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole circle (at 1.27 0) (size 1.3208 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/DIL28-3.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/DIL28-3.kicad_mod new file mode 100644 index 0000000..fa82bff --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/DIL28-3.kicad_mod @@ -0,0 +1,71 @@ +(module DIL28-3 (layer F.Cu) (tedit 0) + (descr "Dual In Line Package Small") + (fp_text reference IC2 (at -18.034 2.921 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value CY8C24423A-24PXI (at -8.509 0.635) (layer F.Fab) + (effects (font (size 1.2065 1.2065) (thickness 0.12065)) (justify left bottom)) + ) + (fp_line (start 17.78 -2.921) (end -17.78 -2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 2.921) (end 17.78 2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start 17.78 -2.921) (end 17.78 2.921) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 -2.921) (end -17.78 -1.016) (layer F.SilkS) (width 0.1524)) + (fp_line (start -17.78 2.921) (end -17.78 1.016) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -17.78 0) (end -17.78 -1.016) (angle 180) (layer F.SilkS) (width 0.1524)) + (pad 1 thru_hole oval (at -16.51 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at -13.97 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 7 thru_hole oval (at -1.27 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 8 thru_hole oval (at 1.27 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 3 thru_hole oval (at -11.43 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 4 thru_hole oval (at -8.89 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 6 thru_hole oval (at -3.81 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 5 thru_hole oval (at -6.35 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 9 thru_hole oval (at 3.81 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 10 thru_hole oval (at 6.35 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 11 thru_hole oval (at 8.89 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 12 thru_hole oval (at 11.43 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 13 thru_hole oval (at 13.97 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 14 thru_hole oval (at 16.51 3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 15 thru_hole oval (at 16.51 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 16 thru_hole oval (at 13.97 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 17 thru_hole oval (at 11.43 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 18 thru_hole oval (at 8.89 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 19 thru_hole oval (at 6.35 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 20 thru_hole oval (at 3.81 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 21 thru_hole oval (at 1.27 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 22 thru_hole oval (at -1.27 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 23 thru_hole oval (at -3.81 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 24 thru_hole oval (at -6.35 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 25 thru_hole oval (at -8.89 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 26 thru_hole oval (at -11.43 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 27 thru_hole oval (at -13.97 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 28 thru_hole oval (at -16.51 -3.81 90) (size 2.6416 1.3208) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/DO41-10.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/DO41-10.kicad_mod new file mode 100644 index 0000000..d7c6fba --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/DO41-10.kicad_mod @@ -0,0 +1,29 @@ +(module DO41-10 (layer F.Cu) (tedit 0) + (descr "DIODE

\ndiameter 2.54 mm, horizontal, grid 10.16 mm") + (fp_text reference D1 (at -2.032 -1.651 -180) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value 1N4004 (at -2.032 2.794 -180) (layer F.Fab) + (effects (font (size 0.77216 0.77216) (thickness 0.077216)) (justify right top)) + ) + (fp_line (start 2.032 1.27) (end -2.032 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.032 1.27) (end 2.032 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.032 -1.27) (end 2.032 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -2.032 -1.27) (end -2.032 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.08 0) (end 4.064 0) (layer F.Fab) (width 0.762)) + (fp_line (start -5.08 0) (end -4.064 0) (layer F.Fab) (width 0.762)) + (fp_line (start -0.635 0) (end 0 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.016 -0.635) (end 1.016 0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.016 0.635) (end 0 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0 0) (end 1.524 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0 0) (end 1.016 -0.635) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0 -0.635) (end 0 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 0 0) (end 0 0.635) (layer F.SilkS) (width 0.1524)) + (fp_poly (pts (xy -1.651 1.27) (xy -1.143 1.27) (xy -1.143 -1.27) (xy -1.651 -1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 2.032 0.381) (xy 3.937 0.381) (xy 3.937 -0.381) (xy 2.032 -0.381)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.937 0.381) (xy -2.032 0.381) (xy -2.032 -0.381) (xy -3.937 -0.381)) (layer F.SilkS) (width 0)) + (pad A thru_hole circle (at 5.08 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad C thru_hole circle (at -5.08 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/E2-5.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/E2-5.kicad_mod new file mode 100644 index 0000000..64c7e2f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/E2-5.kicad_mod @@ -0,0 +1,24 @@ +(module E2-5 (layer F.Cu) (tedit 0) + (descr "ELECTROLYTIC CAPACITOR

\ngrid 2.032 mm, diameter 5 mm") + (fp_text reference C3 (at 2.54 -1.016 -180) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value 47uf (at 2.54 2.159 -180) (layer F.Fab) + (effects (font (size 0.77216 0.77216) (thickness 0.077216)) (justify right top)) + ) + (fp_line (start -1.524 0) (end -0.762 0) (layer F.Fab) (width 0.1524)) + (fp_line (start -0.762 0) (end -0.762 1.016) (layer F.Fab) (width 0.1524)) + (fp_line (start -0.762 1.016) (end -0.254 1.016) (layer F.Fab) (width 0.1524)) + (fp_line (start -0.254 1.016) (end -0.254 -1.016) (layer F.Fab) (width 0.1524)) + (fp_line (start -0.254 -1.016) (end -0.762 -1.016) (layer F.Fab) (width 0.1524)) + (fp_line (start -0.762 -1.016) (end -0.762 0) (layer F.Fab) (width 0.1524)) + (fp_line (start 0.635 0) (end 1.524 0) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 -1.778) (end -0.762 -1.778) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.016 -1.524) (end -1.016 -2.032) (layer F.SilkS) (width 0.1524)) + (fp_circle (center 0 0) (end 2.54 0) (layer F.SilkS) (width 0.1524)) + (fp_poly (pts (xy 0.254 1.016) (xy 0.762 1.016) (xy 0.762 -1.016) (xy 0.254 -1.016)) (layer F.Fab) (width 0)) + (pad - thru_hole circle (at 1.016 0) (size 1.27 1.27) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad + thru_hole circle (at -1.016 0) (size 1.27 1.27) (drill 0.8128) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/TO220BH.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/TO220BH.kicad_mod new file mode 100644 index 0000000..d81e6dc --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/TO220BH.kicad_mod @@ -0,0 +1,44 @@ +(module TO220BH (layer F.Cu) (tedit 5C603AB2) + (descr "Molded Package

\ngrid 2.54 mm") + (fp_text reference IC3 (at -3.81 -5.207 90) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_text value IRF3710 (at -3.937 -2.54 90) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify left bottom)) + ) + (fp_poly (pts (xy 2.159 6.604) (xy 2.921 6.604) (xy 2.921 4.699) (xy 2.159 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -0.381 6.604) (xy 0.381 6.604) (xy 0.381 4.699) (xy -0.381 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy -2.921 6.604) (xy -2.159 6.604) (xy -2.159 4.699) (xy -2.921 4.699)) (layer F.Fab) (width 0)) + (fp_poly (pts (xy 1.905 4.064) (xy 3.175 4.064) (xy 3.175 1.27) (xy 1.905 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.635 4.064) (xy 0.635 4.064) (xy 0.635 1.27) (xy -0.635 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.175 4.064) (xy -1.905 4.064) (xy -1.905 1.27) (xy -3.175 1.27)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 4.699) (xy -2.159 4.699) (xy -2.159 4.064) (xy -2.921 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.381 4.699) (xy 0.381 4.699) (xy 0.381 4.064) (xy -0.381 4.064)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 2.159 4.699) (xy 2.921 4.699) (xy 2.921 4.064) (xy 2.159 4.064)) (layer F.SilkS) (width 0)) + (fp_text user A17,5mm (at -4.445 -7.874) (layer F.SilkS) + (effects (font (size 0.9652 0.9652) (thickness 0.1016)) (justify left bottom)) + ) + (fp_line (start -4.572 0.635) (end -4.572 -7.62) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -7.62) (end -4.572 -7.62) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -7.62) (end 4.572 0.635) (layer F.SilkS) (width 0.0508)) + (fp_line (start -4.572 0.635) (end 4.572 0.635) (layer F.SilkS) (width 0.0508)) + (fp_line (start -5.207 -12.7) (end -5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -12.7) (end -5.207 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -11.176) (end -4.318 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -11.176) (end -4.318 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 1.27) (end -5.207 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -12.7) (end 5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -12.7) (end 5.207 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -11.176) (end 4.318 -12.7) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -11.176) (end 4.318 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 1.27) (end 5.207 -11.176) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -14.605) (end -5.207 -14.605) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 1.27) (end 5.207 1.27) (layer F.SilkS) (width 0.1524)) + (pad S thru_hole oval (at 2.54 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad D thru_hole oval (at 0 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad G thru_hole oval (at -2.54 6.35 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 1 smd rect (at 0 -11.43) (size 11.5 8) (layers F.Cu F.Paste F.Mask)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/TO220H.kicad_mod b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/TO220H.kicad_mod new file mode 100644 index 0000000..a8e8d89 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pretty/TO220H.kicad_mod @@ -0,0 +1,38 @@ +(module TO220H (layer F.Cu) (tedit 5C603A56) + (descr TO-220) + (fp_text reference IC1 (at -5.461 10.922) (layer F.SilkS) hide + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_text value 78T (at 7.366 11.049) (layer F.Fab) + (effects (font (size 0.9652 0.9652) (thickness 0.09652)) (justify right top)) + ) + (fp_poly (pts (xy 1.905 10.414) (xy 3.175 10.414) (xy 3.175 7.62) (xy 1.905 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.635 10.414) (xy 0.635 10.414) (xy 0.635 7.62) (xy -0.635 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -3.175 10.414) (xy -1.905 10.414) (xy -1.905 7.62) (xy -3.175 7.62)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.921 11.049) (xy -2.159 11.049) (xy -2.159 10.414) (xy -2.921 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -0.381 11.049) (xy 0.381 11.049) (xy 0.381 10.414) (xy -0.381 10.414)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 2.159 11.049) (xy 2.921 11.049) (xy 2.921 10.414) (xy 2.159 10.414)) (layer F.SilkS) (width 0)) + (fp_line (start -4.572 6.985) (end -4.572 -1.27) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -1.27) (end -4.572 -1.27) (layer F.SilkS) (width 0.0508)) + (fp_line (start 4.572 -1.27) (end 4.572 6.985) (layer F.SilkS) (width 0.0508)) + (fp_line (start -4.572 6.985) (end 4.572 6.985) (layer F.SilkS) (width 0.0508)) + (fp_line (start -5.207 -6.35) (end -5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -6.35) (end -5.207 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.318 -4.826) (end -4.318 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 -4.826) (end -4.318 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 7.62) (end -5.207 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -6.35) (end 5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -6.35) (end 5.207 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start 4.318 -4.826) (end 4.318 -6.35) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -4.826) (end 4.318 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 7.62) (end 5.207 -4.826) (layer F.SilkS) (width 0.1524)) + (fp_line (start 5.207 -8.255) (end -5.207 -8.255) (layer F.SilkS) (width 0.1524)) + (fp_line (start -5.207 7.62) (end 5.207 7.62) (layer F.SilkS) (width 0.1524)) + (pad 3 thru_hole oval (at 2.54 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 2 thru_hole oval (at 0 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 1 thru_hole oval (at -2.54 10.16 90) (size 3.3528 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (solder_mask_margin 0.0508)) + (pad 4 smd rect (at 0 -5.08) (size 11.5 8) (layers F.Cu F.Paste F.Mask)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pro b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pro new file mode 100644 index 0000000..18d195a --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.pro @@ -0,0 +1,80 @@ +update=tis 26 mar 2019 21:32:51 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +[schematic_editor] +version=1 +PageLayoutDescrFile=empty.kicad_wks +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceAjustPassiveValues=0 +LabSize=50 +ERC_TestSimilarLabels=1 +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead=SLC_Free_PCB.net +CopperLayerCount=2 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.2 +MinViaDiameter=0.4 +MinViaDrill=0.3 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.25 +TrackWidth2=0.3048 +TrackWidth3=0.6096 +TrackWidth4=1.016 +TrackWidth5=1.35 +ViaDiameter1=0.8 +ViaDrill1=0.4 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.15 +SilkTextSizeV=1 +SilkTextSizeH=1 +SilkTextSizeThickness=0.15 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.15 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0.2 +SolderMaskMinWidth=0 +SolderPasteClearance=0 +SolderPasteRatio=0 +[pcbnew/Layer.F.Cu] +Name=Top +Type=0 +[pcbnew/Layer.B.Cu] +Name=Bottom +Type=0 diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.sch b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.sch new file mode 100644 index 0000000..124f5db --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.sch @@ -0,0 +1,1140 @@ +EESchema Schematic File Version 4 +LIBS:SLC_Free_PCB-cache +EELAYER 29 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5100 5900 5300 5900 +Text Label 5100 5900 0 10 ~ 0 +GND +Wire Wire Line + 6400 4400 6300 4400 +Text Label 6400 4400 0 10 ~ 0 +GND +Wire Wire Line + 6000 3300 6000 3200 +Wire Wire Line + 6000 3300 6200 3300 +Wire Wire Line + 6200 3300 6500 3300 +Connection ~ 6200 3300 +Text Label 6000 3300 0 10 ~ 0 +GND +Wire Wire Line + 4600 2700 3800 2700 +Wire Wire Line + 4200 5200 3700 5200 +Wire Wire Line + 3700 5200 3700 5000 +Connection ~ 4200 5200 +Text Label 4200 5200 0 10 ~ 0 +GND +Wire Wire Line + 7600 3300 7900 3300 +Text Label 7600 3300 0 10 ~ 0 +GND +Wire Wire Line + 3200 4700 2700 4700 +Wire Wire Line + 2700 4700 2700 4500 +Wire Wire Line + 2700 4500 2500 4500 +Text Label 3200 4700 0 10 ~ 0 +GND +Wire Wire Line + 6800 5500 6900 5500 +Wire Wire Line + 6900 5500 6900 5400 +Wire Wire Line + 6900 5400 7100 5400 +Connection ~ 7100 5400 +Text Label 6800 5500 0 10 ~ 0 +GND +Wire Wire Line + 3200 2600 3000 2600 +Wire Wire Line + 3000 2600 3000 2400 +Wire Wire Line + 3000 2400 2800 2400 +Text Label 3200 2600 0 10 ~ 0 +GND +Wire Wire Line + 3200 4100 2800 4100 +Text Label 3200 4100 0 10 ~ 0 +GND +Wire Wire Line + 3200 5800 2600 5800 +Wire Wire Line + 2600 5800 2600 5700 +Wire Wire Line + 2600 5700 2400 5700 +Text Label 3200 5800 0 10 ~ 0 +GND +Wire Wire Line + 4600 3600 3700 3600 +Text Label 3750 3450 0 70 ~ 0 +LSU_VGND +Wire Wire Line + 5300 4800 4700 4800 +Text Label 4700 4800 0 70 ~ 0 +LSU_VGND +Text Label 3700 3800 0 70 ~ 0 +LSU_NERMEST +Wire Wire Line + 7800 4600 7800 5000 +Wire Wire Line + 7800 5000 8100 5000 +Text Label 7800 4600 3 70 ~ 0 +LSU_NERMEST +Connection ~ 7800 5000 +Text Label 3800 3900 0 70 ~ 0 +LSU_IP +Wire Wire Line + 4500 4300 4500 4100 +Wire Wire Line + 4500 4100 4800 4100 +Text Label 4600 4100 0 70 ~ 0 +LSU_IP +Wire Wire Line + 4600 3800 3700 3800 +Text Label 3700 3600 0 70 ~ 0 +LSU_IA +Wire Wire Line + 5300 4700 4500 4700 +Text Label 4900 4700 0 70 ~ 0 +LSU_IA +Wire Wire Line + 6800 4700 6900 4700 +Text Label 6900 4700 0 70 ~ 0 +LSU_IA +Wire Wire Line + 5000 3000 5000 2900 +Wire Wire Line + 4600 3400 4300 3400 +Wire Wire Line + 4300 3400 4300 3300 +Text Label 7200 6400 2 70 ~ 0 +GND +Text Label 4000 3000 0 70 ~ 0 +H_GND +Wire Wire Line + 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BNN +F 2 "" H 2800 4200 50 0001 C CNN +F 3 "" H 2800 4200 50 0001 C CNN + 1 2800 4200 + 1 0 0 -1 +$EndComp +$Comp +L SLC_Free_PCB-eagle-import:PINHD-1X6 JP5 +U 1 1 6716FC81 +P 3300 5700 +F 0 "JP5" H 3050 6125 59 0000 L BNN +F 1 "PINHD-1X6" H 3050 5300 59 0000 L BNN +F 2 "SLC_Free_PCB:1X06" H 3300 5700 50 0001 C CNN +F 3 "" H 3300 5700 50 0001 C CNN + 1 3300 5700 + 1 0 0 -1 +$EndComp +$Comp +L SLC_Free_PCB-eagle-import:GND #GND03 +U 1 1 7679BDCC +P 2400 5800 +F 0 "#GND03" H 2400 5800 50 0001 C CNN +F 1 "GND" H 2300 5700 59 0000 L BNN +F 2 "" H 2400 5800 50 0001 C CNN +F 3 "" H 2400 5800 50 0001 C CNN + 1 2400 5800 + 1 0 0 -1 +$EndComp +$Comp +L SLC_Free_PCB-eagle-import:+5V #P+011 +U 1 1 FBD5C941 +P 2200 5700 +F 0 "#P+011" H 2200 5700 50 0001 C CNN +F 1 "+5V" V 2100 5500 59 0000 L BNN +F 2 "" H 2200 5700 50 0001 C CNN +F 3 "" H 2200 5700 50 0001 C CNN + 1 2200 5700 + 1 0 0 -1 +$EndComp +$Comp +L SLC_Free_PCB-eagle-import:R-US_0309_12 R1 +U 1 1 224EEC03 +P 5700 3000 +F 0 "R1" H 5550 3059 59 0000 L BNN +F 1 "10" H 5550 2870 59 0000 L BNN +F 2 "SLC_Free_PCB:0309_12" H 5700 3000 50 0001 C CNN +F 3 "" H 5700 3000 50 0001 C CNN + 1 5700 3000 + 1 0 0 -1 +$EndComp +Text Notes 1600 1800 0 59 ~ 0 +Requires external 5a fuse on 12v +Text Notes 1600 1900 0 59 ~ 0 +Populate R7 with 120k for LSU 4.9, leave empty for LSU 4.2 +Text Notes 1600 2200 0 59 ~ 0 +R16 sets the LCD backlight brightness +Text Notes 1600 2000 0 59 ~ 0 +R1 is a 1/2 Watt resistor, it is physically larger than the other resistors +Text Notes 1600 2100 0 59 ~ 0 +R14+R15 sets the contrast of the LCD, the values shown on this schematic is specific to the LCD supplied by 14Point7. Using another LCD may require adjustments to the resistor values +Text Notes 1600 2300 0 59 ~ 0 +Never connect or disconnect the Lambda sensor while SLC Free is powered +Connection ~ 6000 3300 +Text Label 4100 5600 2 70 ~ 0 +LIN_OUT +Text GLabel 3800 5600 0 50 Input ~ 0 +LIN_OUT +Text GLabel 4000 2800 0 50 Input ~ 0 +LIN_OUT +Text GLabel 4600 2900 0 50 Input ~ 0 +NB_OUT +Text GLabel 8150 5600 2 50 Input ~ 0 +NB_OUT +Wire Wire Line + 7900 5600 8150 5600 +Connection ~ 7900 5600 +Text GLabel 3800 2700 0 50 Input ~ 0 +GND +Text GLabel 6000 3300 0 50 Input ~ 0 +GND +Wire Wire Line + 7200 5900 7200 5800 +Wire Wire Line + 7200 6300 7200 6400 +Wire Wire Line + 4600 2800 4000 2800 +Text GLabel 7200 5800 2 50 Input ~ 0 +LSU_HEATER- +Text GLabel 3950 3700 0 50 Input ~ 0 +LSU_HEATER- +Wire Wire Line + 4600 3450 4600 3500 +Wire Wire Line + 4600 3700 3950 3700 +Wire Wire Line + 3750 3450 4600 3450 +Wire Wire Line + 3800 3900 4600 3900 +Text GLabel 5000 2900 0 50 Input ~ 0 +12V +Text GLabel 4300 3300 0 50 Input ~ 0 +12V +Text GLabel 4600 2600 0 50 Input ~ 0 +12V +$Comp +L Device:D D2 +U 1 1 5C62CF2C +P 5150 3000 +F 0 "D2" H 5150 2784 50 0000 C CNN +F 1 "1N4004" H 5150 2875 50 0000 C CNN +F 2 "Diode_THT:D_DO-15_P10.16mm_Horizontal" H 5150 3000 50 0001 C CNN +F 3 "~" H 5150 3000 50 0001 C CNN + 1 5150 3000 + -1 0 0 1 +$EndComp +Connection ~ 5300 3000 +Wire Wire Line + 5300 3000 5500 3000 +$Comp +L Device:D D1 +U 1 1 5C630786 +P 7300 2700 +F 0 "D1" H 7300 2916 50 0000 C CNN +F 1 "1N4004" H 7300 2825 50 0000 C CNN +F 2 "Diode_THT:D_DO-15_P10.16mm_Horizontal" H 7300 2700 50 0001 C CNN +F 3 "~" H 7300 2700 50 0001 C CNN + 1 7300 2700 + 1 0 0 -1 +$EndComp +Connection ~ 7150 2700 +Wire Wire Line + 7150 2700 6700 2700 +Connection ~ 7450 2700 +Wire Wire Line + 7450 2700 7600 2700 +Wire Wire Line + 5900 3000 6000 3000 +$Comp +L Device:D D3 +U 1 1 5C630A00 +P 6000 3150 +F 0 "D3" V 5954 3229 50 0000 L CNN +F 1 "P6KE24A" V 5600 3100 50 0000 L CNN +F 2 "Diode_THT:D_DO-15_P10.16mm_Horizontal" H 6000 3150 50 0001 C CNN +F 3 "~" H 6000 3150 50 0001 C CNN + 1 6000 3150 + 0 1 1 0 +$EndComp +Connection ~ 6000 3000 +Wire Wire Line + 6000 3000 6200 3000 +$Comp +L Device:CP C1 +U 1 1 5C619F16 +P 6200 3150 +F 0 "C1" H 6318 3196 50 0000 L CNN +F 1 "47uF 20V" H 6318 3105 50 0000 L CNN +F 2 "Capacitor_THT:CP_Radial_D5.0mm_P2.50mm" H 6238 3000 50 0001 C CNN +F 3 "~" H 6200 3150 50 0001 C CNN + 1 6200 3150 + 1 0 0 -1 +$EndComp +$Comp +L Device:CP C3 +U 1 1 5C61A09F +P 7600 3150 +F 0 "C3" H 7718 3196 50 0000 L CNN +F 1 "47uF" H 7718 3105 50 0000 L CNN +F 2 "Capacitor_THT:CP_Radial_D5.0mm_P2.50mm" H 7638 3000 50 0001 C CNN +F 3 "~" H 7600 3150 50 0001 C CNN + 1 7600 3150 + 1 0 0 -1 +$EndComp +Connection ~ 7600 3300 +$Comp +L SLC_Free_PCB-eagle-import:PINHD-1X5 JP1 +U 1 1 2F430EF2 +P 4700 2800 +F 0 "JP1" H 4450 3125 59 0000 L BNN +F 1 "PINHD-1X5" H 4450 2400 59 0000 L BNN +F 2 "Connector_Molex:Molex_Mega-Fit_76825-0004_2x02_P5.70mm_Horizontal" H 4700 2800 50 0001 C CNN +F 3 "" H 4700 2800 50 0001 C CNN + 1 4700 2800 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.xml b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.xml new file mode 100644 index 0000000..cbec32e --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB.xml @@ -0,0 +1,700 @@ + + + + /home/jp/Documents/KiCad/SLC_Free_PCB_V2/SLC_Free_PCB.sch + tor 28 mar 2019 13:11:28 + Eeschema 5.1.0-060a0da~80~ubuntu18.10.1 + + + + <company/> + <rev/> + <date/> + <source>SLC_Free_PCB.sch</source> + <comment number="1" value=""/> + <comment number="2" value=""/> + <comment number="3" value=""/> + <comment number="4" value=""/> + </title_block> + </sheet> + </design> + <components> + <comp ref="IC2"> + <value>CY8C24423A-24PXI</value> + <footprint>SLC_Free_PCB:DIL28-3</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="DIL28-3" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>F9CA0720FE6CCBEC</tstamp> + </comp> + <comp ref="R13"> + <value>1K</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>FE98EEC3D5237DDE</tstamp> + </comp> + <comp ref="R4"> + <value>10k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>23E57F8398DC0D12</tstamp> + </comp> + <comp ref="R12"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>436F0B63FC0C7BCC</tstamp> + </comp> + <comp ref="R10"> + <value>10k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>97512B480A067037</tstamp> + </comp> + <comp ref="C6"> + <value>1uf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>92D3568E45125544</tstamp> + </comp> + <comp ref="C8"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>8488437E6406DB36</tstamp> + </comp> + <comp ref="C5"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>311CF9FF0A6764</tstamp> + </comp> + <comp ref="R8"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>92B6EBFFB35105BA</tstamp> + </comp> + <comp ref="R2"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>739C9E2D733DB3B0</tstamp> + </comp> + <comp ref="R6"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>EF632DAE64669C67</tstamp> + </comp> + <comp ref="R7"> + <value>R-US_0204_7</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>4721ED5BD7380F0A</tstamp> + </comp> + <comp ref="IC3"> + <value>IRF3710</value> + <footprint>SLC_Free_PCB:TO220BH</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="BUZ11BH" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>F1F22196A6F5BEF</tstamp> + </comp> + <comp ref="R5"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>CCADE161F5E59E3A</tstamp> + </comp> + <comp ref="R9"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>C1743B5DAF631EA7</tstamp> + </comp> + <comp ref="C7"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>309F8869BFFA351D</tstamp> + </comp> + <comp ref="IC1"> + <value>78T</value> + <footprint>SLC_Free_PCB:TO220H</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="78T" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>7C8C299E06F92037</tstamp> + </comp> + <comp ref="C2"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>3B2CE81D6F136683</tstamp> + </comp> + <comp ref="C4"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>C3DB98572E544DC1</tstamp> + </comp> + <comp ref="R3"> + <value>61.9</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>A761C73577E48E03</tstamp> + </comp> + <comp ref="JP2"> + <value>PINHD-1X6</value> + <footprint>Connector_Molex:Molex_Mega-Fit_76825-0006_2x03_P5.70mm_Horizontal</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="PINHD-1X6" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>4804D7FCFA93C76E</tstamp> + </comp> + <comp ref="JP3"> + <value>PINHD-1X5</value> + <footprint>SLC_Free_PCB:1X05</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="PINHD-1X5" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>CD71B194ACD8E5B6</tstamp> + </comp> + <comp ref="R11"> + <value>1k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>F90901174EA54AE4</tstamp> + </comp> + <comp ref="JP4"> + <value>PINHD-1X16</value> + <footprint>SLC_Free_PCB:1X16</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="PINHD-1X16" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>28A9B5EA47274FB3</tstamp> + </comp> + <comp ref="C10"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>BEE27C0CB9820DED</tstamp> + </comp> + <comp ref="C9"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>F0EA715621F188E2</tstamp> + </comp> + <comp ref="C11"> + <value>100nf</value> + <footprint>SLC_Free_PCB:C025-025X050</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>A78DF8BC5F7CD27E</tstamp> + </comp> + <comp ref="R14"> + <value>4.7k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>F87BD34C42B60E9C</tstamp> + </comp> + <comp ref="R15"> + <value>1.2k</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>C78DE6E200557CD</tstamp> + </comp> + <comp ref="R16"> + <value>100</value> + <footprint>SLC_Free_PCB:0204_7</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>DE7FF8CFEFF1A6CC</tstamp> + </comp> + <comp ref="JP5"> + <value>PINHD-1X6</value> + <footprint>SLC_Free_PCB:1X06</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="PINHD-1X6" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>B2768A806716FC81</tstamp> + </comp> + <comp ref="R1"> + <value>10</value> + <footprint>SLC_Free_PCB:0309_12</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="R-US_0309_12" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>3DE44650224EEC03</tstamp> + </comp> + <comp ref="D2"> + <value>1N4004</value> + <footprint>Diode_THT:D_DO-15_P10.16mm_Horizontal</footprint> + <datasheet>~</datasheet> + <libsource lib="Device" part="D" description="Diode"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5C62CF2C</tstamp> + </comp> + <comp ref="D1"> + <value>1N4004</value> + <footprint>Diode_THT:D_DO-15_P10.16mm_Horizontal</footprint> + <datasheet>~</datasheet> + <libsource lib="Device" part="D" description="Diode"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5C630786</tstamp> + </comp> + <comp ref="D3"> + <value>P6KE24A</value> + <footprint>Diode_THT:D_DO-15_P10.16mm_Horizontal</footprint> + <datasheet>~</datasheet> + <libsource lib="Device" part="D" description="Diode"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5C630A00</tstamp> + </comp> + <comp ref="C1"> + <value>47uF 20V</value> + <footprint>Capacitor_THT:CP_Radial_D5.0mm_P2.50mm</footprint> + <datasheet>~</datasheet> + <libsource lib="Device" part="CP" description="Polarized capacitor"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5C619F16</tstamp> + </comp> + <comp ref="C3"> + <value>47uF</value> + <footprint>Capacitor_THT:CP_Radial_D5.0mm_P2.50mm</footprint> + <datasheet>~</datasheet> + <libsource lib="Device" part="CP" description="Polarized capacitor"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5C61A09F</tstamp> + </comp> + <comp ref="JP1"> + <value>PINHD-1X5</value> + <footprint>Connector_Molex:Molex_Mega-Fit_76825-0004_2x02_P5.70mm_Horizontal</footprint> + <libsource lib="SLC_Free_PCB-eagle-import" part="PINHD-1X5" description=""/> + <sheetpath names="/" tstamps="/"/> + <tstamp>848DA6002F430EF2</tstamp> + </comp> + </components> + <libparts> + <libpart lib="Device" part="CP"> + <description>Polarized capacitor</description> + <docs>~</docs> + <footprints> + <fp>CP_*</fp> + </footprints> + <fields> + <field name="Reference">C</field> + <field name="Value">CP</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + </pins> + </libpart> + <libpart lib="Device" part="D"> + <description>Diode</description> + <docs>~</docs> + <footprints> + <fp>TO-???*</fp> + <fp>*_Diode_*</fp> + <fp>*SingleDiode*</fp> + <fp>D_*</fp> + </footprints> + <fields> + <field name="Reference">D</field> + <field name="Value">D</field> + </fields> + <pins> + <pin num="1" name="K" type="passive"/> + <pin num="2" name="A" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="78T"> + <fields> + <field name="Reference">IC</field> + <field name="Value">78T</field> + </fields> + <pins> + <pin num="1" name="VI" type="input"/> + <pin num="2" name="GND" type="passive"/> + <pin num="3" name="VO" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="BUZ11BH"> + <fields> + <field name="Reference">Q</field> + <field name="Value">BUZ11BH</field> + </fields> + <pins> + <pin num="D" name="D" type="passive"/> + <pin num="G" name="G" type="passive"/> + <pin num="S" name="S" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="C-US025-025X050"> + <fields> + <field name="Reference">C</field> + <field name="Value">C-US025-025X050</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="DIL28-3"> + <fields> + <field name="Reference">IC</field> + <field name="Value">DIL28-3</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + <pin num="3" name="3" type="passive"/> + <pin num="4" name="4" type="passive"/> + <pin num="5" name="5" type="passive"/> + <pin num="6" name="6" type="passive"/> + <pin num="7" name="7" type="passive"/> + <pin num="8" name="8" type="passive"/> + <pin num="9" name="9" type="passive"/> + <pin num="10" name="10" type="passive"/> + <pin num="11" name="11" type="passive"/> + <pin num="12" name="12" type="passive"/> + <pin num="13" name="13" type="passive"/> + <pin num="14" name="14" type="passive"/> + <pin num="15" name="15" type="passive"/> + <pin num="16" name="16" type="passive"/> + <pin num="17" name="17" type="passive"/> + <pin num="18" name="18" type="passive"/> + <pin num="19" name="19" type="passive"/> + <pin num="20" name="20" type="passive"/> + <pin num="21" name="21" type="passive"/> + <pin num="22" name="22" type="passive"/> + <pin num="23" name="23" type="passive"/> + <pin num="24" name="24" type="passive"/> + <pin num="25" name="25" type="passive"/> + <pin num="26" name="26" type="passive"/> + <pin num="27" name="27" type="passive"/> + <pin num="28" name="28" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="PINHD-1X16"> + <fields> + <field name="Reference">JP</field> + <field name="Value">PINHD-1X16</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + <pin num="3" name="3" type="passive"/> + <pin num="4" name="4" type="passive"/> + <pin num="5" name="5" type="passive"/> + <pin num="6" name="6" type="passive"/> + <pin num="7" name="7" type="passive"/> + <pin num="8" name="8" type="passive"/> + <pin num="9" name="9" type="passive"/> + <pin num="10" name="10" type="passive"/> + <pin num="11" name="11" type="passive"/> + <pin num="12" name="12" type="passive"/> + <pin num="13" name="13" type="passive"/> + <pin num="14" name="14" type="passive"/> + <pin num="15" name="15" type="passive"/> + <pin num="16" name="16" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="PINHD-1X5"> + <fields> + <field name="Reference">JP</field> + <field name="Value">PINHD-1X5</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + <pin num="3" name="3" type="passive"/> + <pin num="4" name="4" type="passive"/> + <pin num="5" name="5" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="PINHD-1X6"> + <fields> + <field name="Reference">JP</field> + <field name="Value">PINHD-1X6</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + <pin num="3" name="3" type="passive"/> + <pin num="4" name="4" type="passive"/> + <pin num="5" name="5" type="passive"/> + <pin num="6" name="6" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="R-US_0204_7"> + <fields> + <field name="Reference">R</field> + <field name="Value">R-US_0204_7</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + </pins> + </libpart> + <libpart lib="SLC_Free_PCB-eagle-import" part="R-US_0309_12"> + <fields> + <field name="Reference">R</field> + <field name="Value">R-US_0309_12</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + </pins> + </libpart> + </libparts> + <libraries> + <library logical="Device"> + <uri>/usr/share/kicad/library/Device.lib</uri> + </library> + <library logical="SLC_Free_PCB-eagle-import"> + <uri>/home/jp/Documents/KiCad/SLC_Free_PCB_V2/SLC_Free_PCB-eagle-import.lib</uri> + </library> + </libraries> + <nets> + <net code="1" name="GND"> + <node ref="C10" pin="2"/> + <node ref="C11" pin="2"/> + <node ref="JP4" pin="16"/> + <node ref="JP5" pin="5"/> + <node ref="C9" pin="2"/> + <node ref="R15" pin="1"/> + <node ref="C8" pin="2"/> + <node ref="C5" pin="2"/> + <node ref="JP4" pin="1"/> + <node ref="R10" pin="2"/> + <node ref="D3" pin="2"/> + <node ref="JP1" pin="2"/> + <node ref="C3" pin="2"/> + <node ref="C1" pin="2"/> + <node ref="C4" pin="2"/> + <node ref="R9" pin="2"/> + <node ref="C7" pin="2"/> + <node ref="JP3" pin="2"/> + <node ref="IC3" pin="S"/> + <node ref="IC1" pin="2"/> + <node ref="C2" pin="2"/> + <node ref="IC2" pin="14"/> + </net> + <net code="2" name="+5V"> + <node ref="D1" pin="2"/> + <node ref="JP5" pin="6"/> + <node ref="R16" pin="2"/> + <node ref="R14" pin="2"/> + <node ref="JP4" pin="2"/> + <node ref="C11" pin="1"/> + <node ref="IC2" pin="28"/> + <node ref="IC1" pin="3"/> + <node ref="R5" pin="1"/> + <node ref="C3" pin="1"/> + <node ref="C5" pin="1"/> + <node ref="C4" pin="1"/> + <node ref="R7" pin="1"/> + <node ref="JP3" pin="1"/> + </net> + <net code="3" name="Net-(IC3-PadG)"> + <node ref="R13" pin="2"/> + <node ref="IC3" pin="G"/> + </net> + <net code="4" name="LSU_HEATER-"> + <node ref="JP2" pin="4"/> + <node ref="IC3" pin="D"/> + </net> + <net code="5" name="/LSU_VGND"> + <node ref="JP2" pin="2"/> + <node ref="IC2" pin="3"/> + </net> + <net code="6" name="Net-(IC2-Pad9)"> + <node ref="IC2" pin="9"/> + </net> + <net code="7" name="/PWM_NB_OUT"> + <node ref="IC2" pin="18"/> + <node ref="R11" pin="1"/> + </net> + <net code="8" name="/PWM_HEATER"> + <node ref="IC2" pin="17"/> + <node ref="R13" pin="1"/> + </net> + <net code="9" name="Net-(C6-Pad2)"> + <node ref="C6" pin="2"/> + <node ref="R4" pin="2"/> + </net> + <net code="10" name="/AC_TEMP_SENSE_OUT"> + <node ref="IC2" pin="25"/> + <node ref="C6" pin="1"/> + </net> + <net code="11" name="/PWM_LIN_OUT"> + <node ref="IC2" pin="11"/> + <node ref="R12" pin="1"/> + </net> + <net code="12" name="/LSU_NERMEST"> + <node ref="R7" pin="2"/> + <node ref="JP2" pin="5"/> + <node ref="R4" pin="1"/> + <node ref="R8" pin="1"/> + </net> + <net code="13" name="LIN_OUT"> + <node ref="R12" pin="2"/> + <node ref="JP1" pin="3"/> + <node ref="C10" pin="1"/> + </net> + <net code="14" name="NB_OUT"> + <node ref="JP1" pin="4"/> + <node ref="C9" pin="1"/> + <node ref="R11" pin="2"/> + </net> + <net code="15" name="Net-(D2-Pad1)"> + <node ref="D2" pin="1"/> + <node ref="R1" pin="1"/> + </net> + <net code="16" name="12V"> + <node ref="D2" pin="2"/> + <node ref="JP1" pin="1"/> + <node ref="JP2" pin="1"/> + </net> + <net code="17" name="Net-(C1-Pad1)"> + <node ref="D3" pin="1"/> + <node ref="C1" pin="1"/> + <node ref="R1" pin="2"/> + <node ref="IC1" pin="1"/> + <node ref="C2" pin="1"/> + <node ref="D1" pin="1"/> + </net> + <net code="18" name="Net-(JP4-Pad9)"> + <node ref="JP4" pin="9"/> + </net> + <net code="19" name="Net-(JP4-Pad8)"> + <node ref="JP4" pin="8"/> + </net> + <net code="20" name="Net-(JP4-Pad7)"> + <node ref="JP4" pin="7"/> + </net> + <net code="21" name="Net-(JP4-Pad10)"> + <node ref="JP4" pin="10"/> + </net> + <net code="22" name="/LCD_ANODE"> + <node ref="R16" pin="1"/> + <node ref="JP4" pin="15"/> + </net> + <net code="23" name="/LCD_CONTRAST"> + <node ref="R14" pin="1"/> + <node ref="JP4" pin="3"/> + <node ref="R15" pin="2"/> + </net> + <net code="24" name="/XRES"> + <node ref="R10" pin="1"/> + <node ref="IC2" pin="19"/> + <node ref="C8" pin="1"/> + <node ref="JP3" pin="3"/> + </net> + <net code="25" name="/H_GND"> + <node ref="JP1" pin="5"/> + </net> + <net code="26" name="/LSU_IA"> + <node ref="R6" pin="1"/> + <node ref="JP2" pin="3"/> + <node ref="IC2" pin="2"/> + <node ref="R3" pin="2"/> + </net> + <net code="27" name="/LSU_IP"> + <node ref="R3" pin="1"/> + <node ref="R2" pin="2"/> + <node ref="JP2" pin="6"/> + </net> + <net code="28" name="/LCD_RS"> + <node ref="IC2" pin="6"/> + <node ref="JP4" pin="4"/> + </net> + <net code="29" name="/CAL"> + <node ref="IC2" pin="16"/> + </net> + <net code="30" name="/LCD_RW"> + <node ref="IC2" pin="23"/> + <node ref="JP4" pin="5"/> + </net> + <net code="31" name="/LCD_E"> + <node ref="JP4" pin="6"/> + <node ref="IC2" pin="22"/> + </net> + <net code="32" name="/LCD_DB6"> + <node ref="JP4" pin="13"/> + <node ref="IC2" pin="21"/> + </net> + <net code="33" name="/P0[4]"> + <node ref="IC2" pin="26"/> + <node ref="JP5" pin="1"/> + </net> + <net code="34" name="/P1[3]"> + <node ref="IC2" pin="12"/> + <node ref="JP5" pin="2"/> + </net> + <net code="35" name="/P1[7]"> + <node ref="JP5" pin="3"/> + <node ref="IC2" pin="10"/> + </net> + <net code="36" name="/P2[7]"> + <node ref="JP5" pin="4"/> + <node ref="IC2" pin="5"/> + </net> + <net code="37" name="/RE+_ADC"> + <node ref="IC2" pin="24"/> + <node ref="R8" pin="2"/> + </net> + <net code="38" name="/RT_ADC"> + <node ref="IC2" pin="27"/> + <node ref="R6" pin="2"/> + </net> + <net code="39" name="/APE_ADC"> + <node ref="R2" pin="1"/> + <node ref="IC2" pin="1"/> + </net> + <net code="40" name="/INSAMP_VREF"> + <node ref="R9" pin="1"/> + <node ref="IC2" pin="4"/> + <node ref="R5" pin="2"/> + <node ref="C7" pin="1"/> + </net> + <net code="41" name="/LCD_DB4"> + <node ref="IC2" pin="20"/> + <node ref="JP4" pin="11"/> + </net> + <net code="42" name="/LCD_DB7"> + <node ref="IC2" pin="7"/> + <node ref="JP4" pin="14"/> + </net> + <net code="43" name="/LCD_DB5"> + <node ref="JP4" pin="12"/> + <node ref="IC2" pin="8"/> + </net> + <net code="44" name="/PROG_SCL"> + <node ref="JP3" pin="4"/> + <node ref="IC2" pin="13"/> + </net> + <net code="45" name="/PROG_SDA"> + <node ref="IC2" pin="15"/> + <node ref="JP3" pin="5"/> + </net> + </nets> +</export> diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB_bom_.ods b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB_bom_.ods new file mode 100644 index 0000000..fa06d6a Binary files /dev/null and b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/SLC_Free_PCB_bom_.ods differ diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/_AutoGen_SLC_Free_PCB_bom.csv b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/_AutoGen_SLC_Free_PCB_bom.csv new file mode 100644 index 0000000..4cf31f5 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/_AutoGen_SLC_Free_PCB_bom.csv @@ -0,0 +1,38 @@ +Component,Description,Part,References,Value,Footprint,Quantity Per PCB,Datasheet +1,,C-US025-025X050,C2 C4 C5 C7 C8 C9 C10 C11,100nf,C025-025X050,8, +2,,C-US025-025X050,C6,1uf,C025-025X050,1, +3,Polarized capacitor,CP,C3,47uF,CP_Radial_D5.0mm_P2.50mm,1,~ +4,Polarized capacitor,CP,C1,47uF 20V,CP_Radial_D5.0mm_P2.50mm,1,~ +5,Diode,D,D1 D2,1N4004,D_DO-15_P10.16mm_Horizontal,2,~ +6,Diode,D,D3,P6KE24A,D_DO-15_P10.16mm_Horizontal,1,~ +7,,78T,IC1,78T,TO220H,1, +8,,DIL28-3,IC2,CY8C24423A-24PXI,DIL28-3,1, +9,,BUZ11BH,IC3,IRF3710,TO220BH,1, +10,,PINHD-1X16,JP4,PINHD-1X16,1X16,1, +11,,PINHD-1X5,JP1,PINHD-1X5,Molex_Mega-Fit_76825-0004_2x02_P5.70mm_Horizontal,1, +12,,PINHD-1X5,JP3,PINHD-1X5,1X05,1, +13,,PINHD-1X6,JP2,PINHD-1X6,Molex_Mega-Fit_76825-0006_2x03_P5.70mm_Horizontal,1, +14,,PINHD-1X6,JP5,PINHD-1X6,1X06,1, +15,,R-US_0204_7,R15,1.2k,0204_7,1, +16,,R-US_0309_12,R1,10,0309_12,1, +17,,R-US_0204_7,R16,100,0204_7,1, +18,,R-US_0204_7,R4 R10,10k,0204_7,2, +19,,R-US_0204_7,R2 R5 R6 R8 R9 R11 R12 R13,1k,0204_7,8, +20,,R-US_0204_7,R14,4.7k,0204_7,1, +21,,R-US_0204_7,R3,61.9,0204_7,1, +22,,R-US_0204_7,R7,R-US_0204_7,0204_7,1, + + + + + +Component Groups:,22 +Component Count:,38 +Fitted Components:,38 +Number of PCBs:,1 +Total components:,38 +Schematic Version:, +Schematic Date:, +BoM Date:,tor 28 mar 2019 13:11:28 +Schematic Source:,/home/jp/Documents/KiCad/SLC_Free_PCB_V2/SLC_Free_PCB.sch +KiCad Version:,Eeschema 5.1.0-060a0da~80~ubuntu18.10.1 diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/bom.ini b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/bom.ini new file mode 100644 index 0000000..07eae92 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/bom.ini @@ -0,0 +1,85 @@ +[BOM_OPTIONS] +; General BoM options here +; If 'ignore_dnf' option is set to 1, rows that are not to be fitted on the PCB will not be written to the BoM file +ignore_dnf = 1 +; If 'use_alt' option is set to 1, grouped references will be printed in the alternate compressed style eg: R1-R7,R18 +use_alt = 0 +; If 'alt_wrap' option is set to and integer N, the references field will wrap after N entries are printed +alt_wrap = 0 +; If 'number_rows' option is set to 1, each row in the BoM will be prepended with an incrementing row number +number_rows = 1 +; If 'group_connectors' option is set to 1, connectors with the same footprints will be grouped together, independent of the name of the connector +group_connectors = 1 +; If 'test_regex' option is set to 1, each component group will be tested against a number of regular-expressions (specified, per column, below). If any matches are found, the row is ignored in the output file +test_regex = 1 +; If 'merge_blank_fields' option is set to 1, component groups with blank fields will be merged into the most compatible group, where possible +merge_blank_fields = 1 +; If '{opt}' option is set to 1, the schematic version number will be appended to the filename. +include_version_number = 1 +; Field name used to determine if a particular part is to be fitted +fit_field = Config +; Make a backup of the bom before generating the new one, using the folloing template +make_backup = %O.tmp + +[IGNORE_COLUMNS] +; Any column heading that appears here will be excluded from the Generated BoM +; Titles are case-insensitive +Part Lib +Footprint Lib + +[COLUMN_ORDER] +; Columns will apear in the order they are listed here +; Titles are case-insensitive +Description +Part +Part Lib +References +Value +Footprint +Footprint Lib +Quantity Per PCB +Build Quantity +Datasheet + +[GROUP_FIELDS] +; List of fields used for sorting individual components into groups +; Components which match (comparing *all* fields) will be grouped together +; Field names are case-insensitive +Part +Part Lib +Value +Footprint +Footprint Lib + +[COMPONENT_ALIASES] +; A series of values which are considered to be equivalent for the part name +; Each line represents a tab-separated list of equivalent component name values +; e.g. 'c c_small cap' will ensure the equivalent capacitor symbols can be grouped together +; Aliases are case-insensitive +c c_small cap capacitor +r r_small res resistor +sw switch +l l_small inductor +zener zenersmall +d diode d_small + +[REGEX_INCLUDE] +; A series of regular expressions used to include parts in the BoM +; If there are any regex defined here, only components that match against ANY of them will be included in the BOM +; Column names are case-insensitive +; Format is: "ColumName Regex" (tab-separated) + +[REGEX_EXCLUDE] +; A series of regular expressions used to exclude parts from the BoM +; If a component matches ANY of these, it will be excluded from the BoM +; Column names are case-insensitive +; Format is: "ColumName Regex" (tab-separated) +References ^TP[0-9]* +References ^FID +Part mount.*hole +Part solder.*bridge +Part test.*point +Footprint test.*point +Footprint mount.*hole +Footprint fiducial + diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/empty.kicad_wks b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/empty.kicad_wks new file mode 100644 index 0000000..f50032b --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/empty.kicad_wks @@ -0,0 +1,5 @@ +(page_layout +(setup (textsize 1.5 1.5)(linewidth 0.15)(textlinewidth 0.15) +(left_margin 10)(right_margin 10)(top_margin 10)(bottom_margin 10)) +(line (name segm1:Line) (start 0 0) (end 0 0)) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/fp-info-cache b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/fp-info-cache new file mode 100644 index 0000000..1df0cea --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/fp-info-cache @@ -0,0 +1,70638 @@ +15663743033926842 +Battery +BatteryHolder_Bulgin_BX0036_1xC +Bulgin Battery Holder, BX0036, Battery Type C (https://www.bulgin.com/products/pub/media/bulgin/data/Battery_holders.pdf) +Bulgin BX0036 +0 +2 +2 +Battery +BatteryHolder_Eagle_12BH611-GR +https://eu.mouser.com/datasheet/2/209/EPD-200766-1274481.pdf +9V Battery Holder +0 +2 +2 +Battery +BatteryHolder_Keystone_103_1x20mm +http://www.keyelco.com/product-pdf.cfm?p=719 +Keystone type 103 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_104_1x23mm +http://www.keyelco.com/product-pdf.cfm?p=744 +Keystone type 104 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_105_1x2430 +http://www.keyelco.com/product-pdf.cfm?p=745 +Keystone type 105 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_106_1x20mm +http://www.keyelco.com/product-pdf.cfm?p=720 +Keystone type 106 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_107_1x23mm +http://www.keyelco.com/product-pdf.cfm?p=746 +Keystone type 107 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_500 +Keystone #500, CR1220 battery holder, http://www.keyelco.com/product-pdf.cfm?p=710 +CR1220 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_1042_1x18650 +Battery holder for 18650 cylindrical cells http://www.keyelco.com/product.cfm/product_id/918 +18650 Keystone 1042 Li-ion +0 +2 +2 +Battery +BatteryHolder_Keystone_1058_1x2032 +http://www.keyelco.com/product-pdf.cfm?p=14028 +Keystone type 1058 coin cell retainer +0 +2 +2 +Battery +BatteryHolder_Keystone_1060_1x2032 +http://www.keyelco.com/product-pdf.cfm?p=726 +CR2032 BR2032 BatteryHolder Battery +0 +2 +2 +Battery +BatteryHolder_Keystone_2462_2xAA +2xAA cell battery holder, Keystone P/N 2462, https://www.keyelco.com/product-pdf.cfm?p=1027 +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_Keystone_2466_1xAAA +1xAAA Battery Holder, Keystone, Plastic Case, http://www.keyelco.com/product-pdf.cfm?p=1031 +AAA battery holder Keystone +0 +2 +2 +Battery +BatteryHolder_Keystone_2468_2xAAA +2xAAA cell battery holder, Keystone P/N 2468, http://www.keyelco.com/product-pdf.cfm?p=1033 +AAA battery cell holder +0 +2 +2 +Battery +BatteryHolder_Keystone_2479_3xAAA +3xAAA cell battery holder, Keystone P/N 2479, http://www.keyelco.com/product-pdf.cfm?p=1041 +AAA battery cell holder +0 +2 +2 +Battery +BatteryHolder_Keystone_2993 +http://www.keyelco.com/product-pdf.cfm?p=776 +Keystone type 2993 negative battery contact +0 +1 +1 +Battery +BatteryHolder_Keystone_3000_1x12mm +http://www.keyelco.com/product-pdf.cfm?p=777 +Keystone type 3000 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3001_1x12mm +http://www.keyelco.com/product-pdf.cfm?p=778 +Keystone type 3001 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3008_1x2450 +http://www.keyelco.com/product-pdf.cfm?p=786 +Keystone type 3008 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3009_1x2450 +http://www.keyelco.com/product-pdf.cfm?p=787 +Keystone type 3009 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3034_1x20mm +Keystone 3034 SMD battery holder for 2020, 2025 and 2032 coincell batteries. http://www.keyelco.com/product-pdf.cfm?p=798 +Keystone type 3034 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_LINX_BAT-HLD-012-SMT +SMT battery holder for CR1216/1220/1225, https://linxtechnologies.com/wp/wp-content/uploads/bat-hld-012-smt.pdf +battery holder coin cell cr1216 cr1220 cr1225 +0 +3 +2 +Battery +BatteryHolder_MPD_BC2AAPC_2xAA +2xAA cell battery holder, Memory Protection Devices P/N BC2AAPC, http://www.memoryprotectiondevices.com/datasheets/BC2AAPC-datasheet.pdf +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_MPD_BC12AAPC_2xAA +2xAA cell battery holder, Memory Protection Devices P/N BC12AAPC, http://www.memoryprotectiondevices.com/datasheets/BC12AAPC-datasheet.pdf +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_MPD_BC2003_1x2032 +http://www.memoryprotectiondevices.com/datasheets/BC-2003-datasheet.pdf +BC2003 CR2032 2032 Battery Holder +0 +3 +2 +Battery +BatteryHolder_MPD_BH-18650-PC2 +18650 Battery Holder (http://www.memoryprotectiondevices.com/datasheets/BK-18650-PC2-datasheet.pdf) +18650 Battery Holder +0 +2 +2 +Battery +BatteryHolder_Seiko_MS621F +Seiko MS621F, https://www.sii.co.jp/en/me/files/2014/02/file_EXTENDED_PRDCT_SPEC_75_FILE_11.jpg +Seiko MS621F +0 +2 +2 +Battery +BatteryHolder_TruPower_BH-331P_3xAA +Keystone Battery Holder BH-331P Battery Type 3xAA (Script generated with StandardBox.py) (Keystone Battery Holder BH-331P Battery Type 3xAA) +Battery Holder BH-331P Battery Type 3xAA +0 +2 +2 +Battery +Battery_CR1225 +CR1225 battery +battery CR1225 coin cell +0 +0 +0 +Button_Switch_Keyboard +SW_Cherry_MX_1.00u_PCB +Cherry MX keyswitch, 1.00u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.00u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.00u_Plate +Cherry MX keyswitch, 1.00u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.00u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.25u_PCB +Cherry MX keyswitch, 1.25u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.25u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.25u_Plate +Cherry MX keyswitch, 1.25u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.25u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.50u_PCB +Cherry MX keyswitch, 1.50u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.50u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.50u_Plate +Cherry MX keyswitch, 1.50u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.50u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.75u_PCB +Cherry MX keyswitch, 1.75u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.75u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.75u_Plate +Cherry MX keyswitch, 1.75u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.75u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_PCB +Cherry MX keyswitch, 2.00u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_Plate +Cherry MX keyswitch, 2.00u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_Vertical_PCB +Cherry MX keyswitch, 2.00u, vertical, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u vertical PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_Vertical_Plate +Cherry MX keyswitch, 2.00u, vertical, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u vertical plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.25u_PCB +Cherry MX keyswitch, 2.25u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.25u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.25u_Plate +Cherry MX keyswitch, 2.25u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.25u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.75u_PCB +Cherry MX keyswitch, 2.75u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.75u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.75u_Plate +Cherry MX keyswitch, 2.75u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.75u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_6.25u_PCB +Cherry MX keyswitch, 6.25u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 6.25u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_6.25u_Plate +Cherry MX keyswitch, 6.25u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 6.25u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_ISOEnter_PCB +Cherry MX keyswitch, ISO Enter, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch ISO enter PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_ISOEnter_Plate +Cherry MX keyswitch, ISO Enter, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch ISO enter plate +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.00u +Matias/ALPS keyswitch, 1.00u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.00u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.25u +Matias/ALPS keyswitch, 1.25u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.25u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.50u +Matias/ALPS keyswitch, 1.50u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.50u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.75u +Matias/ALPS keyswitch, 1.75u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.75u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_2.00u +Matias/ALPS keyswitch, 2.00u, http://matias.ca/switches/ +Matias ALPS keyswitch 2.00u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_2.25u +Matias/ALPS keyswitch, 2.25u, http://matias.ca/switches/ +Matias ALPS keyswitch 2.25u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_2.75u +Matias/ALPS keyswitch, 2.75u, http://matias.ca/switches/ +Matias ALPS keyswitch 2.75u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_6.25u +Matias/ALPS keyswitch, 6.25u, http://matias.ca/switches/ +Matias ALPS keyswitch 6.25u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_ISOEnter +Matias/ALPS keyswitch, ISO Enter, http://matias.ca/switches/ +Matias ALPS keyswitch ISO enter +0 +2 +2 +Button_Switch_SMD +Nidec_Copal_SH-7010A +4-bit rotary coded switch, J-hook, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +6 +5 +Button_Switch_SMD +Nidec_Copal_SH-7010B +4-bit rotary coded switch, gull wing, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +6 +5 +Button_Switch_SMD +Nidec_Copal_SH-7040B +4-bit rotary coded switch, gull wing, Gray code, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +5 +5 +Button_Switch_SMD +Panasonic_EVQPUJ_EVQPUA +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUJ EVQPUA +0 +4 +2 +Button_Switch_SMD +Panasonic_EVQPUK_EVQPUB +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUK EVQPUB +0 +4 +2 +Button_Switch_SMD +Panasonic_EVQPUL_EVQPUC +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUL EVQPUC +0 +4 +2 +Button_Switch_SMD +Panasonic_EVQPUM_EVQPUD +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUM EVQPUD +0 +4 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_6.7x4.1mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 1x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_6.7x4.1mm_W8.61mm_P2.54mm_LowProfile +SMD 1x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_9.78x4.72mm_W8.61mm_P2.54mm +SMD 1x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x4.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Copal_CHS-01A_W5.08mm_P1.27mm_JPin +SMD 1x-dip-switch SPST Copal_CHS-01A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Copal_CHS-01B_W7.62mm_P1.27mm +SMD 1x-dip-switch SPST Copal_CHS-01B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Copal_CVS-01xB_W5.9mm_P1mm +SMD 1x-dip-switch SPST Copal_CVS-01xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +6 +3 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Omron_A6S-110x_W8.9mm_P2.54mm +SMD 1x-dip-switch SPST Omron_A6S-110x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_6.7x6.64mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 2x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_6.7x6.64mm_W8.61mm_P2.54mm_LowProfile +SMD 2x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_9.78x7.26mm_W8.61mm_P2.54mm +SMD 2x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x7.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Copal_CHS-02A_W5.08mm_P1.27mm_JPin +SMD 2x-dip-switch SPST Copal_CHS-02A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Copal_CHS-02B_W7.62mm_P1.27mm +SMD 2x-dip-switch SPST Copal_CHS-02B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Copal_CVS-02xB_W5.9mm_P1mm +SMD 2x-dip-switch SPST Copal_CVS-02xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +8 +5 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_KingTek_DSHP02TJ_W5.25mm_P1.27mm_JPin +SMD 2x-dip-switch SPST KingTek_DSHP02TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_KingTek_DSHP02TS_W7.62mm_P1.27mm +SMD 2x-dip-switch SPST KingTek_DSHP02TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Omron_A6H-2101_W6.15mm_P1.27mm +SMD 2x-dip-switch SPST Omron_A6H-2101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Omron_A6S-210x_W8.9mm_P2.54mm +SMD 2x-dip-switch SPST Omron_A6S-210x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_6.7x9.18mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 3x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x9.18mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_6.7x9.18mm_W8.61mm_P2.54mm_LowProfile +SMD 3x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x9.18mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_9.78x9.8mm_W8.61mm_P2.54mm +SMD 3x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x9.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_Copal_CVS-03xB_W5.9mm_P1mm +SMD 3x-dip-switch SPST Copal_CVS-03xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +10 +7 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_KingTek_DSHP03TJ_W5.25mm_P1.27mm_JPin +SMD 3x-dip-switch SPST KingTek_DSHP03TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_KingTek_DSHP03TS_W7.62mm_P1.27mm +SMD 3x-dip-switch SPST KingTek_DSHP03TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_Omron_A6S-310x_W8.9mm_P2.54mm +SMD 3x-dip-switch SPST Omron_A6S-310x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_6.7x11.72mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 4x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x11.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_6.7x11.72mm_W8.61mm_P2.54mm_LowProfile +SMD 4x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x11.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_9.78x12.34mm_W8.61mm_P2.54mm +SMD 4x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x12.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Copal_CHS-04A_W5.08mm_P1.27mm_JPin +SMD 4x-dip-switch SPST Copal_CHS-04A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Copal_CHS-04B_W7.62mm_P1.27mm +SMD 4x-dip-switch SPST Copal_CHS-04B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Copal_CVS-04xB_W5.9mm_P1mm +SMD 4x-dip-switch SPST Copal_CVS-04xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +12 +9 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_KingTek_DSHP04TJ_W5.25mm_P1.27mm_JPin +SMD 4x-dip-switch SPST KingTek_DSHP04TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_KingTek_DSHP04TS_W7.62mm_P1.27mm +SMD 4x-dip-switch SPST KingTek_DSHP04TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Omron_A6H-4101_W6.15mm_P1.27mm +SMD 4x-dip-switch SPST Omron_A6H-4101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Omron_A6S-410x_W8.9mm_P2.54mm +SMD 4x-dip-switch SPST Omron_A6S-410x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_6.7x14.26mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 5x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x14.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_6.7x14.26mm_W8.61mm_P2.54mm_LowProfile +SMD 5x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x14.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_9.78x14.88mm_W8.61mm_P2.54mm +SMD 5x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x14.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_KingTek_DSHP05TJ_W5.25mm_P1.27mm_JPin +SMD 5x-dip-switch SPST KingTek_DSHP05TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_KingTek_DSHP05TS_W7.62mm_P1.27mm +SMD 5x-dip-switch SPST KingTek_DSHP05TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_Omron_A6S-510x_W8.9mm_P2.54mm +SMD 5x-dip-switch SPST Omron_A6S-510x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_6.7x16.8mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 6x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x16.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_6.7x16.8mm_W8.61mm_P2.54mm_LowProfile +SMD 6x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x16.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_9.78x17.42mm_W8.61mm_P2.54mm +SMD 6x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x17.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Copal_CHS-06A_W5.08mm_P1.27mm_JPin +SMD 6x-dip-switch SPST Copal_CHS-06A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Copal_CHS-06B_W7.62mm_P1.27mm +SMD 6x-dip-switch SPST Copal_CHS-06B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_KingTek_DSHP06TJ_W5.25mm_P1.27mm_JPin +SMD 6x-dip-switch SPST KingTek_DSHP06TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_KingTek_DSHP06TS_W7.62mm_P1.27mm +SMD 6x-dip-switch SPST KingTek_DSHP06TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Omron_A6H-6101_W6.15mm_P1.27mm +SMD 6x-dip-switch SPST Omron_A6H-6101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Omron_A6S-610x_W8.9mm_P2.54mm +SMD 6x-dip-switch SPST Omron_A6S-610x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_6.7x19.34mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 7x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x19.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_6.7x19.34mm_W8.61mm_P2.54mm_LowProfile +SMD 7x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x19.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_9.78x19.96mm_W8.61mm_P2.54mm +SMD 7x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x19.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_KingTek_DSHP07TJ_W5.25mm_P1.27mm_JPin +SMD 7x-dip-switch SPST KingTek_DSHP07TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_KingTek_DSHP07TS_W7.62mm_P1.27mm +SMD 7x-dip-switch SPST KingTek_DSHP07TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_Omron_A6S-710x_W8.9mm_P2.54mm +SMD 7x-dip-switch SPST Omron_A6S-710x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_6.7x21.88mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 8x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x21.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_6.7x21.88mm_W8.61mm_P2.54mm_LowProfile +SMD 8x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x21.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_9.78x22.5mm_W8.61mm_P2.54mm +SMD 8x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x22.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Copal_CHS-08A_W5.08mm_P1.27mm_JPin +SMD 8x-dip-switch SPST Copal_CHS-08A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Copal_CHS-08B_W7.62mm_P1.27mm +SMD 8x-dip-switch SPST Copal_CHS-08B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Copal_CVS-08xB_W5.9mm_P1mm +SMD 8x-dip-switch SPST Copal_CVS-08xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +20 +17 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_KingTek_DSHP08TJ_W5.25mm_P1.27mm_JPin +SMD 8x-dip-switch SPST KingTek_DSHP08TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_KingTek_DSHP08TS_W7.62mm_P1.27mm +SMD 8x-dip-switch SPST KingTek_DSHP08TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Omron_A6H-8101_W6.15mm_P1.27mm +SMD 8x-dip-switch SPST Omron_A6H-8101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Omron_A6S-810x_W8.9mm_P2.54mm +SMD 8x-dip-switch SPST Omron_A6S-810x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_6.7x24.42mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 9x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x24.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_6.7x24.42mm_W8.61mm_P2.54mm_LowProfile +SMD 9x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x24.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_9.78x25.04mm_W8.61mm_P2.54mm +SMD 9x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x25.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_KingTek_DSHP09TJ_W5.25mm_P1.27mm_JPin +SMD 9x-dip-switch SPST KingTek_DSHP09TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_KingTek_DSHP09TS_W7.62mm_P1.27mm +SMD 9x-dip-switch SPST KingTek_DSHP09TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_Omron_A6S-910x_W8.9mm_P2.54mm +SMD 9x-dip-switch SPST Omron_A6S-910x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_6.7x26.96mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 10x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x26.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_6.7x26.96mm_W8.61mm_P2.54mm_LowProfile +SMD 10x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x26.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_9.78x27.58mm_W8.61mm_P2.54mm +SMD 10x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x27.58mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Copal_CHS-10A_W5.08mm_P1.27mm_JPin +SMD 10x-dip-switch SPST Copal_CHS-10A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Copal_CHS-10B_W7.62mm_P1.27mm +SMD 10x-dip-switch SPST Copal_CHS-10B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_KingTek_DSHP10TJ_W5.25mm_P1.27mm_JPin +SMD 10x-dip-switch SPST KingTek_DSHP10TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_KingTek_DSHP10TS_W7.62mm_P1.27mm +SMD 10x-dip-switch SPST KingTek_DSHP10TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Omron_A6H-10101_W6.15mm_P1.27mm +SMD 10x-dip-switch SPST Omron_A6H-10101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Omron_A6S-1010x_W8.9mm_P2.54mm +SMD 10x-dip-switch SPST Omron_A6S-1010x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx11_Slide_6.7x29.5mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 11x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x29.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +22 +22 +Button_Switch_SMD +SW_DIP_SPSTx11_Slide_6.7x29.5mm_W8.61mm_P2.54mm_LowProfile +SMD 11x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x29.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +22 +22 +Button_Switch_SMD +SW_DIP_SPSTx11_Slide_9.78x30.12mm_W8.61mm_P2.54mm +SMD 11x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x30.12mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +22 +22 +Button_Switch_SMD +SW_DIP_SPSTx12_Slide_6.7x32.04mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 12x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x32.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +24 +24 +Button_Switch_SMD +SW_DIP_SPSTx12_Slide_6.7x32.04mm_W8.61mm_P2.54mm_LowProfile +SMD 12x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x32.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +24 +24 +Button_Switch_SMD +SW_DIP_SPSTx12_Slide_9.78x32.66mm_W8.61mm_P2.54mm +SMD 12x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x32.66mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +24 +24 +Button_Switch_SMD +SW_MEC_5GSH9 +MEC 5G single pole normally-open tactile switch +switch normally-open pushbutton push-button +0 +4 +4 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_KMR2 +CK components KMR2 tactile switch http://www.ckswitches.com/media/1479/kmr2.pdf +tactile switch kmr2 +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_KSC6xxJ +CK components KSC6 tactile switch https://www.ckswitches.com/media/1972/ksc6.pdf +tactile switch ksc6 +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_KSC7xxJ +CK components KSC7 tactile switch https://www.ckswitches.com/media/1973/ksc7.pdf +tactile switch ksc7 +0 +4 +2 +Button_Switch_SMD +SW_Push_SPST_NO_Alps_SKRK +http://www.alps.com/prod/info/E/HTML/Tact/SurfaceMount/SKRK/SKRKAHE020.html +SMD SMT button +0 +2 +2 +Button_Switch_SMD +SW_SP3T_PCM13 +Ultraminiature Surface Mount Slide Switch + +0 +8 +4 +Button_Switch_SMD +SW_SPDT_CK-JS102011SAQN +http://www.ckswitches.com/media/1422/js.pdf +switch spdt +0 +3 +3 +Button_Switch_SMD +SW_SPDT_PCM12 +Ultraminiature Surface Mount Slide Switch + +0 +7 +3 +Button_Switch_SMD +SW_SPST_B3S-1000 +Surface Mount Tactile Switch for High-Density Packaging +Tactile Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_B3S-1100 +Surface Mount Tactile Switch for High-Density Packaging with Ground Terminal +Tactile Switch +0 +5 +3 +Button_Switch_SMD +SW_SPST_B3SL-1002P +Middle Stroke Tactile Switch, B3SL +Middle Stroke Tactile Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_B3SL-1022P +Middle Stroke Tactile Switch, B3SL +Middle Stroke Tactile Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_B3U-1000P +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, without Ground Terminal, without Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-1000P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, without Ground Terminal, with Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-1100P +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, with Ground Terminal, without Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_B3U-1100P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, with Ground Terminal, with Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_B3U-3000P +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, without Ground Terminal, without Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-3000P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, without Ground Terminal, with Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-3100P +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, with Ground Terminal, without Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_B3U-3100P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, with Ground Terminal, with Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_CK_KXT3 +https://www.ckswitches.com/media/1465/kxt3.pdf +Switch SPST KXT3 +0 +2 +2 +Button_Switch_SMD +SW_SPST_CK_RS282G05A3 +https://www.mouser.com/ds/2/60/RS-282G05A-SM_RT-1159762.pdf +SPST button tactile switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_EVPBF +Light Touch Switch + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP0 +Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE28.pdf + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP2 +Light Touch Switch + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP7A +Light Touch Switch,https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE20.pdf + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP7C +Light Touch Switch + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQPE1 +Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE7.pdf + +0 +2 +2 +Button_Switch_SMD +SW_SPST_EVQQ2 +Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE28.pdf + +0 +4 +2 +Button_Switch_SMD +SW_SPST_FSMSM +http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1437566-3&DocType=Customer+Drawing&DocLang=English +SPST button tactile switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_Panasonic_EVQPL_3PL_5PL_PT_A08 +Light Touch Switch, http://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE3.pdf +SMD SMT SPST EVQPL EVQPT +0 +6 +3 +Button_Switch_SMD +SW_SPST_Panasonic_EVQPL_3PL_5PL_PT_A15 +Light Touch Switch, http://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE3.pdf +SMD SMT SPST EVQPL EVQPT +0 +6 +3 +Button_Switch_SMD +SW_SPST_PTS645 +C&K Components SPST SMD PTS645 Series 6mm Tact Switch +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_PTS810 +C&K Components, PTS 810 Series, Microminiature SMT Top Actuated, http://www.ckswitches.com/media/1476/pts810.pdf +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_REED_CT05-XXXX-G1 +Coto Technologies SPST Reed Switch CT05-XXXX-G1 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT05-XXXX-J1 +Coto Technologies SPST Reed Switch CT05-XXXX-J1 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT10-XXXX-G1 +Coto Technologies SPST Reed Switch CT10-XXXX-G1 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT10-XXXX-G2 +Coto Technologies SPST Reed Switch CT10-XXXX-G2 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT10-XXXX-G4 +Coto Technologies SPST Reed Switch CT10-XXXX-G4 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_SKQG_WithoutStem +ALPS 5.2mm Square Low-profile Type (Surface Mount) SKQG Series, Without stem, http://www.alps.com/prod/info/E/HTML/Tact/SurfaceMount/SKQG/SKQGAEE010.html +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_SKQG_WithStem +ALPS 5.2mm Square Low-profile Type (Surface Mount) SKQG Series, With stem, http://www.alps.com/prod/info/E/HTML/Tact/SurfaceMount/SKQG/SKQGAFE010.html +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3305A +https://www.e-switch.com/system/asset/product_line/data_sheet/213/TL3305.pdf +TL3305 Series Tact Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3305B +https://www.e-switch.com/system/asset/product_line/data_sheet/213/TL3305.pdf +TL3305 Series Tact Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3305C +https://www.e-switch.com/system/asset/product_line/data_sheet/213/TL3305.pdf +TL3305 Series Tact Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3342 +Low-profile SMD Tactile Switch, https://www.e-switch.com/system/asset/product_line/data_sheet/165/TL3342.pdf +SPST Tactile Switch +0 +4 +2 +Button_Switch_THT +KSA_Tactile_SPST +KSA http://www.ckswitches.com/media/1457/ksa_ksl.pdf +SWITCH SMD KSA SW +0 +5 +5 +Button_Switch_THT +Nidec_Copal_SH-7010C +4-bit rotary coded switch, through-hole, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +6 +5 +Button_Switch_THT +Push_E-Switch_KS01Q01 +E-Switch KS01Q01 http://spec_sheets.e-switch.com/specs/29-KS01Q01.pdf +Push Button +0 +4 +4 +Button_Switch_THT +SW_CuK_JS202011AQN_DPDT_Angled +CuK sub miniature slide switch, JS series, DPDT, right angle, http://www.ckswitches.com/media/1422/js.pdf +switch DPDT +0 +6 +6 +Button_Switch_THT +SW_CuK_JS202011CQN_DPDT_Straight +CuK sub miniature slide switch, JS series, DPDT, right angle, http://www.ckswitches.com/media/1422/js.pdf +switch DPDT +0 +6 +6 +Button_Switch_THT +SW_CuK_OS102011MA1QN1_SPDT_Angled +CuK miniature slide switch, OS series, SPDT, right angle, http://www.ckswitches.com/media/1428/os.pdf +switch SPDT +0 +5 +3 +Button_Switch_THT +SW_CW_GPTS203211B +SPST Off-On Pushbutton, 1A, 30V, CW Industries P/N GPTS203211B, http://switches-connectors-custom.cwind.com/Asset/GPTS203211BR2.pdf +SPST button switch Off-On +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx01_Piano_10.8x4.1mm_W7.62mm_P2.54mm +1x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x4.1mm +DIP Switch SPST Piano 7.62mm 300mil +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx01_Slide_6.7x4.1mm_W7.62mm_P2.54mm_LowProfile +1x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx01_Slide_9.78x4.72mm_W7.62mm_P2.54mm +1x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x4.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx02_Piano_10.8x6.64mm_W7.62mm_P2.54mm +2x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x6.64mm +DIP Switch SPST Piano 7.62mm 300mil +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx02_Piano_CTS_Series194-2MSTN_W7.62mm_P2.54mm +2x-dip-switch SPST CTS_Series194-2MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx02_Slide_6.7x6.64mm_W7.62mm_P2.54mm_LowProfile +2x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx02_Slide_9.78x7.26mm_W7.62mm_P2.54mm +2x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x7.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx03_Piano_10.8x9.18mm_W7.62mm_P2.54mm +3x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x9.18mm +DIP Switch SPST Piano 7.62mm 300mil +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx03_Piano_CTS_Series194-3MSTN_W7.62mm_P2.54mm +3x-dip-switch SPST CTS_Series194-3MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx03_Slide_6.7x9.18mm_W7.62mm_P2.54mm_LowProfile +3x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x9.18mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx03_Slide_9.78x9.8mm_W7.62mm_P2.54mm +3x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x9.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx04_Piano_10.8x11.72mm_W7.62mm_P2.54mm +4x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x11.72mm +DIP Switch SPST Piano 7.62mm 300mil +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx04_Piano_CTS_Series194-4MSTN_W7.62mm_P2.54mm +4x-dip-switch SPST CTS_Series194-4MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx04_Slide_6.7x11.72mm_W7.62mm_P2.54mm_LowProfile +4x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x11.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx04_Slide_9.78x12.34mm_W7.62mm_P2.54mm +4x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x12.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx05_Piano_10.8x14.26mm_W7.62mm_P2.54mm +5x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x14.26mm +DIP Switch SPST Piano 7.62mm 300mil +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx05_Piano_CTS_Series194-5MSTN_W7.62mm_P2.54mm +5x-dip-switch SPST CTS_Series194-5MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx05_Slide_6.7x14.26mm_W7.62mm_P2.54mm_LowProfile +5x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x14.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx05_Slide_9.78x14.88mm_W7.62mm_P2.54mm +5x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x14.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx06_Piano_10.8x16.8mm_W7.62mm_P2.54mm +6x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x16.8mm +DIP Switch SPST Piano 7.62mm 300mil +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx06_Piano_CTS_Series194-6MSTN_W7.62mm_P2.54mm +6x-dip-switch SPST CTS_Series194-6MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx06_Slide_6.7x16.8mm_W7.62mm_P2.54mm_LowProfile +6x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x16.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx06_Slide_9.78x17.42mm_W7.62mm_P2.54mm +6x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x17.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx07_Piano_10.8x19.34mm_W7.62mm_P2.54mm +7x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x19.34mm +DIP Switch SPST Piano 7.62mm 300mil +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx07_Piano_CTS_Series194-7MSTN_W7.62mm_P2.54mm +7x-dip-switch SPST CTS_Series194-7MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx07_Slide_6.7x19.34mm_W7.62mm_P2.54mm_LowProfile +7x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x19.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx07_Slide_9.78x19.96mm_W7.62mm_P2.54mm +7x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x19.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx08_Piano_10.8x21.88mm_W7.62mm_P2.54mm +8x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x21.88mm +DIP Switch SPST Piano 7.62mm 300mil +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx08_Piano_CTS_Series194-8MSTN_W7.62mm_P2.54mm +8x-dip-switch SPST CTS_Series194-8MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx08_Slide_6.7x21.88mm_W7.62mm_P2.54mm_LowProfile +8x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x21.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx08_Slide_9.78x22.5mm_W7.62mm_P2.54mm +8x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x22.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx09_Piano_10.8x24.42mm_W7.62mm_P2.54mm +9x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x24.42mm +DIP Switch SPST Piano 7.62mm 300mil +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx09_Piano_CTS_Series194-9MSTN_W7.62mm_P2.54mm +9x-dip-switch SPST CTS_Series194-9MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx09_Slide_6.7x24.42mm_W7.62mm_P2.54mm_LowProfile +9x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x24.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx09_Slide_9.78x25.04mm_W7.62mm_P2.54mm +9x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x25.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx10_Piano_10.8x26.96mm_W7.62mm_P2.54mm +10x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x26.96mm +DIP Switch SPST Piano 7.62mm 300mil +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx10_Piano_CTS_Series194-10MSTN_W7.62mm_P2.54mm +10x-dip-switch SPST CTS_Series194-10MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx10_Slide_6.7x26.96mm_W7.62mm_P2.54mm_LowProfile +10x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x26.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx10_Slide_9.78x27.58mm_W7.62mm_P2.54mm +10x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x27.58mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx11_Piano_10.8x29.5mm_W7.62mm_P2.54mm +11x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x29.5mm +DIP Switch SPST Piano 7.62mm 300mil +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx11_Piano_CTS_Series194-11MSTN_W7.62mm_P2.54mm +11x-dip-switch SPST CTS_Series194-11MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx11_Slide_6.7x29.5mm_W7.62mm_P2.54mm_LowProfile +11x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x29.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx11_Slide_9.78x30.12mm_W7.62mm_P2.54mm +11x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x30.12mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx12_Piano_10.8x32.04mm_W7.62mm_P2.54mm +12x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x32.04mm +DIP Switch SPST Piano 7.62mm 300mil +0 +24 +24 +Button_Switch_THT +SW_DIP_SPSTx12_Piano_CTS_Series194-12MSTN_W7.62mm_P2.54mm +12x-dip-switch SPST CTS_Series194-12MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +24 +24 +Button_Switch_THT +SW_DIP_SPSTx12_Slide_6.7x32.04mm_W7.62mm_P2.54mm_LowProfile +12x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x32.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +24 +24 +Button_Switch_THT +SW_DIP_SPSTx12_Slide_9.78x32.66mm_W7.62mm_P2.54mm +12x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x32.66mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +24 +24 +Button_Switch_THT +SW_E-Switch_EG1224_SPDT_Angled +E-Switch slide switch, EG series, SPDT, right angle, http://spec_sheets.e-switch.com/specs/P040042.pdf +switch SPDT +0 +7 +3 +Button_Switch_THT +SW_E-Switch_EG1271_DPDT +E-Switch sub miniature slide switch, EG series, DPDT, http://spec_sheets.e-switch.com/specs/P040047.pdf +switch DPDT +0 +6 +6 +Button_Switch_THT +SW_E-Switch_EG2219_DPDT_Angled +E-Switch slide switch, EG series, DPDT, right angle, http://spec_sheets.e-switch.com/specs/P040170.pdf +switch DPDT +0 +10 +6 +Button_Switch_THT +SW_Lever_1P2T_NKK_GW12LxH +Switch, single pole double throw, right angle, http://www.nkkswitches.com/pdf/GW.pdf +switch single-pole double-throw spdt ON-ON horizontal +0 +5 +3 +Button_Switch_THT +SW_MEC_5GTH9 +MEC 5G single pole normally-open tactile switch https://cdn.sos.sk/productdata/80/f6/aabf7be6/5gth9358222.pdf +switch normally-open pushbutton push-button +0 +4 +2 +Button_Switch_THT +SW_NKK_BB15AH +https://www.nkkswitches.com/pdf/Bpushbuttons-1.pdf +Pushbutton Right-angle +0 +5 +3 +Button_Switch_THT +SW_NKK_G1xJP +Switch NKK G1xJP http://www.nkkswitches.com/pdf/gwillum.pdf +SWITCH TOGGLE ILLUM SPDT NKK +0 +6 +6 +Button_Switch_THT +SW_NKK_GW12LJP +Switch, single pole double throw, illuminated paddle, http://www.nkkswitches.com/pdf/gwillum.pdf +switch single-pole double-throw spdt ON-ON illuminated LED +0 +6 +6 +Button_Switch_THT +SW_PUSH-12mm +SW PUSH 12mm https://www.e-switch.com/system/asset/product_line/data_sheet/143/TL1100.pdf +tact sw push 12mm +0 +4 +2 +Button_Switch_THT +SW_PUSH-12mm_Wuerth-430476085716 +SW PUSH 12mm http://katalog.we-online.de/em/datasheet/430476085716.pdf +tact sw push 12mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm +https://www.omron.com/ecb/products/pdf/en-b3f.pdf +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H4.3mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=4.3mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H5mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=5mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H7.3mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=7.3mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H8.5mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=8.5mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H8mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=8mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H9.5mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=9.5mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H13mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=13mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_E-Switch_FS5700DP_DPDT +FS5700 series pushbutton footswitch, DPDT, https://www.e-switch.com/system/asset/product_line/data_sheet/226/FS5700.pdf +switch DPDT footswitch +0 +6 +6 +Button_Switch_THT +SW_PUSH_LCD_E3_SAxxxx +Switch with LCD screen E3 SAxxxx +switch normally-open pushbutton push-button LCD +0 +6 +6 +Button_Switch_THT +SW_PUSH_LCD_E3_SAxxxx_SocketPins +Switch with LCD screen E3 SAxxxx +switch normally-open pushbutton push-button LCD +0 +6 +6 +Button_Switch_THT +SW_Slide_1P2T_CK_OS102011MS2Q +CuK miniature slide switch, OS series, SPDT, https://www.ckswitches.com/media/1428/os.pdf +switch SPDT +0 +5 +3 +Button_Switch_THT +SW_Tactile_SKHH_Angled +tactile switch 6mm ALPS SKHH right angle http://www.alps.com/prod/info/E/HTML/Tact/SnapIn/SKHH/SKHHLUA010.html +tactile switch 6mm ALPS SKHH right angle +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx31-2LFS +tactile switch SPST right angle, PTS645VL31-2 LFS +tactile switch SPST angled PTS645VL31-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx39-2LFS +tactile switch SPST right angle, PTS645VL39-2 LFS +tactile switch SPST angled PTS645VL39-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx58-2LFS +tactile switch SPST right angle, PTS645VL58-2 LFS +tactile switch SPST angled PTS645VL58-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx83-2LFS +tactile switch SPST right angle, PTS645VL83-2 LFS +tactile switch SPST angled PTS645VL83-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_Straight_KSA0Axx1LFTR +SW PUSH SMALL http://www.ckswitches.com/media/1457/ksa_ksl.pdf +SW PUSH SMALL Tactile C&K +0 +4 +2 +Button_Switch_THT +SW_Tactile_Straight_KSL0Axx1LFTR +SW PUSH SMALL http://www.ckswitches.com/media/1457/ksa_ksl.pdf +SW PUSH SMALL Tactile C&K +0 +4 +2 +Button_Switch_THT +SW_TH_Tactile_Omron_B3F-10xx +SW_TH_Tactile_Omron_B3F-10xx_https://www.omron.com/ecb/products/pdf/en-b3f.pdf +Omron B3F-10xx +0 +4 +4 +Buzzer_Beeper +Buzzer_12x9.5RM7.6 +Generic Buzzer, D12mm height 9.5mm with RM7.6mm +buzzer +0 +2 +2 +Buzzer_Beeper +Buzzer_15x7.5RM7.6 +Generic Buzzer, D15mm height 7.5mm with RM7.6mm +buzzer +0 +2 +2 +Buzzer_Beeper +Buzzer_CUI_CPT-9019S-SMT +https://www.cui.com/product/resource/cpt-9019s-smt.pdf +buzzer piezo +0 +2 +2 +Buzzer_Beeper +Buzzer_Murata_PKMCS0909E4000-R1 +Murata Buzzer http://www.murata.com/en-us/api/pdfdownloadapi?cate=&partno=PKMCS0909E4000-R1 +Murata Buzzer Beeper +0 +2 +2 +Buzzer_Beeper +Buzzer_TDK_PS1240P02BT_D12.2mm_H6.5mm +Buzzer, D12.2mm height 6.5mm, https://product.tdk.com/info/en/catalog/datasheets/piezoelectronic_buzzer_ps_en.pdf +buzzer +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_CUI_CST-931RP-A +CST-931RP-A, http://www.cui.com/product/resource/cst-931rp-a.pdf +CST-931RP-A +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_Kingstate_KCG0601 +Buzzer, Elektromagnetic Beeper, Summer, +Kingstate KCG0601 +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_Kobitone_254-EMB84Q-RO +MagneticBuzzer Kobitone 254-EMB84Q-RO https://www.mouser.es/datasheet/2/209/KT-400385-1171904.pdf +MagneticBuzzer Kobitone 254-EMB84Q-RO +0 +3 +3 +Buzzer_Beeper +MagneticBuzzer_ProjectsUnlimited_AI-4228-TWT-R +Buzzer, Elektromagnetic Beeper, Summer, 3-28V-DC, https://www.kynix.com/uploadfiles/pdf/AI-4228-TWT-R.pdf +Projects Unlimited AI-4228-TWT-R +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProSignal_ABI-009-RC +Buzzer, Elektromagnetic Beeper, Summer, 6V-DC, +Pro Signal ABI-009-RC +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProSignal_ABI-010-RC +Buzzer, Elektromagnetic Beeper, Summer, 12V-DC, +Pro Signal ABI-010-RC +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProSignal_ABT-410-RC +Buzzer, Elektromagnetic Beeper, Summer, 1,5V-DC, +Pro Signal ABT-410-RC +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_StarMicronics_HMB-06_HMB-12 +Buzzer, Elektromagnetic Beeper, Summer, +Star Micronics HMB-06 HMB-12 +0 +2 +2 +Buzzer_Beeper +PUIAudio_SMT_0825_S_4_R +SMD 8540, http://www.puiaudio.com/product-detail.aspx?partnumber=SMT-0825-S-4-R +SMD 8540 +0 +4 +4 +Calibration_Scale +Gauge_10mm_Type1_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 1, +Gauge Massstab 10mm CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type1_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 1, +Gauge Massstab 10mm SilkScreenTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type2_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 2, +Gauge Massstab 10mm CopperTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type2_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 2, +Gauge Massstab 10mm SilkScreenTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type3_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 3, +Gauge Massstab 10mm CopperTop Type 3 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type3_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 3, +Gauge Massstab 10mm SilkScreenTop Type 3 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type4_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 4, +Gauge Massstab 10mm CopperTop Type 4 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type4_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 4, +Gauge Massstab 10mm SilkScreenTop Type 4 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type5_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 5, +Gauge Massstab 10mm CopperTop Type 5 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type5_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 5, +Gauge Massstab 10mm SilkScreenTop Type 5 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type1_CopperTop +Gauge, Massstab, 50mm, CopperTop, Type 1, +Gauge Massstab 50mm CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type1_SilkScreenTop +Gauge, Massstab, 50mm, SilkScreenTop, Type 1, +Gauge Massstab 50mm SilkScreenTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type2_CopperTop +Gauge, Massstab, 50mm, CopperTop, Type 2, +Gauge Massstab 50mm CopperTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type2_SilkScreenTop +Gauge, Massstab, 50mm, SilkScreenTop, Type 2, +Gauge Massstab 50mm SilkScreenTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Grid_Type1_CopperTop +Gauge, Massstab, 100mm, Gitter, Grid, CopperTop, Type 1, +Gauge Massstab 100mm Gitter Grid CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type1_CopperTop +Gauge, Massstab, 100mm, CopperTop, Type 1, +Gauge Massstab 100mm CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type1_SilkScreenTop +Gauge, Massstab, 100mm, SilkScreenTop, Type 1, +Gauge Massstab 100mm SilkScreenTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type2_CopperTop +Gauge, Massstab, 100mm, CopperTop, Type 2, +Gauge Massstab 100mm CopperTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type2_SilkScreenTop +Gauge, Massstab, 100mm, SilkScreenTop, Type 2, +Gauge Massstab 100mm SilkScreenTop Type 2 +0 +0 +0 +Capacitor_SMD +CP_Elec_3x5.3 +SMT capacitor, aluminium electrolytic, 3x5.3, Cornell Dubilier Electronics +Capacitor Electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_3x5.4 +SMD capacitor, aluminum electrolytic, Nichicon, 3.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x3 +SMD capacitor, aluminum electrolytic, Nichicon, 4.0x3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x3.9 +SMD capacitor, aluminum electrolytic, Nichicon, 4.0x3.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x4.5 +SMD capacitor, aluminum electrolytic, Nichicon, 4.0x4.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.3 +SMD capacitor, aluminum electrolytic, Vishay, 4.0x5.3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.4 +SMD capacitor, aluminum electrolytic, Panasonic A5 / Nichicon, 4.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 4.0x5.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.8 +SMD capacitor, aluminum electrolytic, Panasonic, 4.0x5.8mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x3 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x3.0mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x3.9 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x3.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x4.4 +SMD capacitor, aluminum electrolytic, Panasonic B45, 5.0x4.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x4.5 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x4.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.3 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x5.3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.4 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 5.0x5.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.8 +SMD capacitor, aluminum electrolytic, Panasonic, 5.0x5.8mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.9 +SMD capacitor, aluminum electrolytic, Panasonic B6, 5.0x5.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x3 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x3.0mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x3.9 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x3.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x4.5 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x4.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x4.9 +SMD capacitor, aluminum electrolytic, Panasonic C5, 6.3x4.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.2 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 6.3x5.2mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.3 +SMD capacitor, aluminum electrolytic, Cornell Dubilier, 6.3x5.3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.4 +SMD capacitor, aluminum electrolytic, Panasonic C55, 6.3x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.4_Nichicon +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 6.3x5.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.8 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x5.8mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.9 +SMD capacitor, aluminum electrolytic, Panasonic C6, 6.3x5.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x7.7 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x7.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x9.9 +SMD capacitor, aluminum electrolytic, Panasonic C10, 6.3x9.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x5.4 +SMD capacitor, aluminum electrolytic, Nichicon, 8.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.2 +SMD capacitor, aluminum electrolytic, Nichicon, 8.0x6.2mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.5 +SMD capacitor, aluminum electrolytic, Rubycon, 8.0x6.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 8.0x6.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.9 +SMD capacitor, aluminum electrolytic, Panasonic E7, 8.0x6.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x10 +SMD capacitor, aluminum electrolytic, Nichicon, 8.0x10mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x10.5 +SMD capacitor, aluminum electrolytic, Vishay 0810, 8.0x10.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x11.9 +SMD capacitor, aluminum electrolytic, Panasonic E12, 8.0x11.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x7.7 +SMD capacitor, aluminum electrolytic, Nichicon, 10.0x7.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x7.9 +SMD capacitor, aluminum electrolytic, Panasonic F8, 10.0x7.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x10 +SMD capacitor, aluminum electrolytic, Nichicon, 10.0x10.0mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x10.5 +SMD capacitor, aluminum electrolytic, Vishay 1010, 10.0x10.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x12.5 +SMD capacitor, aluminum electrolytic, Vishay 1012, 10.0x12.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x12.6 +SMD capacitor, aluminum electrolytic, Panasonic F12, 10.0x12.6mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x14.3 +SMD capacitor, aluminum electrolytic, Vishay 1014, 10.0x14.3mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_16x17.5 +SMD capacitor, aluminum electrolytic, Vishay 1616, 16.0x17.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_16x22 +SMD capacitor, aluminum electrolytic, Vishay 1621, 16.0x22.0mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_18x17.5 +SMD capacitor, aluminum electrolytic, Vishay 1816, 18.0x17.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_18x22 +SMD capacitor, aluminum electrolytic, Vishay 1821, 18.0x22.0mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +C_0201_0603Metric +Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +capacitor +0 +4 +2 +Capacitor_SMD +C_0402_1005Metric +Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0603_1608Metric +Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_0805_2012Metric +Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_01005_0402Metric +Capacitor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +capacitor +0 +4 +2 +Capacitor_SMD +C_1206_3216Metric +Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1210_3225Metric +Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1806_4516Metric +Capacitor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Capacitor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1812_4532Metric +Capacitor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Capacitor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1825_4564Metric +Capacitor SMD 1825 (4564 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1825_4564Metric_Pad1.88x6.70mm_HandSolder +Capacitor SMD 1825 (4564 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2010_5025Metric +Capacitor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Capacitor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2220_5650Metric +Capacitor SMD 2220 (5650 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2220_5650Metric_Pad1.97x5.40mm_HandSolder +Capacitor SMD 2220 (5650 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2225_5664Metric +Capacitor SMD 2225 (5664 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2225_5664Metric_Pad1.80x6.60mm_HandSolder +Capacitor SMD 2225 (5664 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2512_6332Metric +Capacitor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Capacitor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2816_7142Metric +Capacitor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Capacitor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_3640_9110Metric +Capacitor SMD 3640 (9110 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_3640_9110Metric_Pad2.10x10.45mm_HandSolder +Capacitor SMD 3640 (9110 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_Elec_3x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 3.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_4x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 4.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_4x5.8 +SMD capacitor, aluminum electrolytic nonpolar, 4.0x5.8mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_5x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 5.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_5x5.8 +SMD capacitor, aluminum electrolytic nonpolar, 5.0x5.8mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_6.3x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 6.3x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_6.3x5.8 +SMD capacitor, aluminum electrolytic nonpolar, 6.3x5.8mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_6.3x7.7 +SMD capacitor, aluminum electrolytic nonpolar, 6.3x7.7mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_8x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 8.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_8x6.2 +SMD capacitor, aluminum electrolytic nonpolar, 8.0x6.2mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_8x10.2 +SMD capacitor, aluminum electrolytic nonpolar, 8.0x10.2mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_10x10.2 +SMD capacitor, aluminum electrolytic nonpolar, 10.0x10.2mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZB4-A +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZB4 TZB4-A +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZB4-B +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZB4 TZB4-A +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZC3 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZC3 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZR1 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZR1 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZW4 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZW4 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZY2 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZY2 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Sprague-Goodman_SGC3 +trimmer capacitor SMD horizontal, http://media.wix.com/ugd/d86717_38d9821e12823a7aa9cef38c6c2a73cc.pdf + Sprague Goodman SGC3 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JN +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JN +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JQ +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JQ +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JR +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JR +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JV +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JV +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JZ +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JR +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-08_AVX-J +Tantalum Capacitor SMD AVX-J (1608-08 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-08_AVX-J_Pad1.25x1.05mm_HandSolder +Tantalum Capacitor SMD AVX-J (1608-08 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-10_AVX-L +Tantalum Capacitor SMD AVX-L (1608-10 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-10_AVX-L_Pad1.25x1.05mm_HandSolder +Tantalum Capacitor SMD AVX-L (1608-10 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-12_Kemet-R +Tantalum Capacitor SMD Kemet-R (2012-12 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-12_Kemet-R_Pad1.30x1.05mm_HandSolder +Tantalum Capacitor SMD Kemet-R (2012-12 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-15_AVX-P +Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-15_AVX-P_Pad1.30x1.05mm_HandSolder +Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-10_Kemet-I +Tantalum Capacitor SMD Kemet-I (3216-10 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-10_Kemet-I_Pad1.58x1.35mm_HandSolder +Tantalum Capacitor SMD Kemet-I (3216-10 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-12_Kemet-S +Tantalum Capacitor SMD Kemet-S (3216-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-12_Kemet-S_Pad1.58x1.35mm_HandSolder +Tantalum Capacitor SMD Kemet-S (3216-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-18_Kemet-A +Tantalum Capacitor SMD Kemet-A (3216-18 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-18_Kemet-A_Pad1.58x1.35mm_HandSolder +Tantalum Capacitor SMD Kemet-A (3216-18 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-12_Kemet-T +Tantalum Capacitor SMD Kemet-T (3528-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-12_Kemet-T_Pad1.50x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-T (3528-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-15_AVX-H +Tantalum Capacitor SMD AVX-H (3528-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-15_AVX-H_Pad1.50x2.35mm_HandSolder +Tantalum Capacitor SMD AVX-H (3528-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-21_Kemet-B +Tantalum Capacitor SMD Kemet-B (3528-21 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-21_Kemet-B_Pad1.50x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-B (3528-21 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-15_Kemet-U +Tantalum Capacitor SMD Kemet-U (6032-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-15_Kemet-U_Pad2.25x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-U (6032-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-20_AVX-F +Tantalum Capacitor SMD AVX-F (6032-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-20_AVX-F_Pad2.25x2.35mm_HandSolder +Tantalum Capacitor SMD AVX-F (6032-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-28_Kemet-C +Tantalum Capacitor SMD Kemet-C (6032-28 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-28_Kemet-C_Pad2.25x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-C (6032-28 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-15_Kemet-W +Tantalum Capacitor SMD Kemet-W (7343-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-15_Kemet-W_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-W (7343-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-20_Kemet-V +Tantalum Capacitor SMD Kemet-V (7343-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-20_Kemet-V_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-V (7343-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-30_AVX-N +Tantalum Capacitor SMD AVX-N (7343-30 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-30_AVX-N_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD AVX-N (7343-30 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-31_Kemet-D +Tantalum Capacitor SMD Kemet-D (7343-31 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-31_Kemet-D_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-D (7343-31 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-40_Kemet-Y +Tantalum Capacitor SMD Kemet-Y (7343-40 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-40_Kemet-Y_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-Y (7343-40 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-43_Kemet-X +Tantalum Capacitor SMD Kemet-X (7343-43 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-43_Kemet-X_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-X (7343-43 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7360-38_Kemet-E +Tantalum Capacitor SMD Kemet-E (7360-38 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7360-38_Kemet-E_Pad2.25x4.25mm_HandSolder +Tantalum Capacitor SMD Kemet-E (7360-38 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-38_AVX-V +Tantalum Capacitor SMD AVX-V (7361-38 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-38_AVX-V_Pad2.18x3.30mm_HandSolder +Tantalum Capacitor SMD AVX-V (7361-38 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-438_AVX-U +Tantalum Capacitor SMD AVX-U (7361-438 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-438_AVX-U_Pad2.18x3.30mm_HandSolder +Tantalum Capacitor SMD AVX-U (7361-438 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_THT +CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=10*4.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 15mm length 10mm diameter 4.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L10.0mm_D6.0mm_P15.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=10*6mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 15mm length 10mm diameter 6mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=18mm, , length*diameter=11*5mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 18mm length 11mm diameter 5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L11.0mm_D6.0mm_P18.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=18mm, , length*diameter=11*6mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 18mm length 11mm diameter 6mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L11.0mm_D8.0mm_P15.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=11*8mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 15mm length 11mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L18.0mm_D6.5mm_P25.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=18*6.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 25mm length 18mm diameter 6.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L18.0mm_D8.0mm_P25.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=18*8mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 25mm length 18mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L18.0mm_D10.0mm_P25.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=18*10mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 25mm length 18mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L20.0mm_D10.0mm_P26.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=26mm, , length*diameter=20*10mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 26mm length 20mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L20.0mm_D13.0mm_P26.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=26mm, , length*diameter=20*13mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 26mm length 20mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L21.0mm_D8.0mm_P28.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=28mm, , length*diameter=21*8mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 28mm length 21mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L25.0mm_D10.0mm_P30.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=30mm, , length*diameter=25*10mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 30mm length 25mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L26.5mm_D20.0mm_P33.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=33mm, , length*diameter=26.5*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 33mm length 26.5mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D10.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*10mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D13.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*13mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D16.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*16mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D20.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D10.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*10mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D12.5mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*12.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D15.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*15mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 15mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D18.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*18mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 18mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L34.5mm_D20.0mm_P41.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=41mm, , length*diameter=34.5*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 41mm length 34.5mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L37.0mm_D13.0mm_P43.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=43mm, , length*diameter=37*13mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 43mm length 37mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L37.0mm_D16.0mm_P43.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=43mm, , length*diameter=37*16mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 43mm length 37mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L37.0mm_D20.0mm_P43.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=43mm, , length*diameter=37*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 43mm length 37mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L38.0mm_D18.0mm_P44.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=44mm, , length*diameter=38*18mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 44mm length 38mm diameter 18mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L38.0mm_D21.0mm_P44.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=44mm, , length*diameter=38*21mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 44mm length 38mm diameter 21mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L40.0mm_D16.0mm_P48.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=48mm, , length*diameter=40*16mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 48mm length 40mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D23.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D26.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D29.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D32.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D35.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.5mm_D20.0mm_P49.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=49mm, , length*diameter=42.5*20mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 49mm length 42.5mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L46.0mm_D20.0mm_P52.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=52mm, , length*diameter=46*20mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 52mm length 46mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D23.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D26.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D29.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D32.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D35.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D23.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D26.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D29.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D32.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D35.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D23.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D26.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D29.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D32.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D35.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D23.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D26.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D29.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D32.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D35.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D4.0mm_P1.50mm +CP, Radial series, Radial, pin pitch=1.50mm, , diameter=4mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 1.50mm diameter 4mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D4.0mm_P2.00mm +CP, Radial series, Radial, pin pitch=2.00mm, , diameter=4mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.00mm diameter 4mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D5.0mm_P2.00mm +CP, Radial series, Radial, pin pitch=2.00mm, , diameter=5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.00mm diameter 5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D5.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D6.3mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=6.3mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 6.3mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D7.5mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=7.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 7.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P3.50mm +CP, Radial series, Radial, pin pitch=3.50mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.50mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P3.80mm +CP, Radial series, Radial, pin pitch=3.80mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.80mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P2.50mm_P5.00mm +CP, Radial series, Radial, pin pitch=2.50mm 5.00mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm 5.00mm diameter 10mm Electrolytic Capacitor +0 +4 +2 +Capacitor_THT +CP_Radial_D10.0mm_P3.50mm +CP, Radial series, Radial, pin pitch=3.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.50mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P3.80mm +CP, Radial series, Radial, pin pitch=3.80mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.80mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P5.00mm_P7.50mm +CP, Radial series, Radial, pin pitch=5.00mm 7.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm 7.50mm diameter 10mm Electrolytic Capacitor +0 +4 +2 +Capacitor_THT +CP_Radial_D10.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D12.5mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=12.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D12.5mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=12.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D12.5mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=12.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D13.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=13mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D13.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=13mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D13.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=13mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D14.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=14mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 14mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D14.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=14mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 14mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D16.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=16mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D17.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=17mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 17mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D18.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=18mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 18mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D22.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=22mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 22mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D22.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=22mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 22mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D24.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=24mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 24mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D24.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=24mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 24mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D25.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=25mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 25mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D25.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=25mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 25mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D26.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=26mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 26mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D26.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=26mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D30.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=30mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 30mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D30.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=30mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 30mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D35.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=35mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 35mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D35.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=35mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 35mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D40.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=40mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 40mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D40.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=40mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 40mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D4.5mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D4.5mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 4.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=5.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 5.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=5.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 5.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.5mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=5.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 5.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.5mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=5.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 5.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D6.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=6.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 6.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D6.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=6.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 6.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D7.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=7.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 7.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D7.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=7.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 7.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D8.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=8.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 8.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D8.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=8.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 8.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D9.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=9.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 9.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D9.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=9.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 9.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D10.5mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=10.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 10.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D10.5mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=10.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 10.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=7.5mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 7.5mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P10.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=10mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 10mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P12.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=12.5mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 12.5mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 15mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P7.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=7.5mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 7.5mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P10.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=10mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 10mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P12.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=12.5mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 12.5mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 15mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D6.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D6.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D7.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*7.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 7.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D7.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*7.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 7.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D8.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*8.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 8.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D8.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*8.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 8.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D9.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D9.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D10.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*10.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 10.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D10.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*10.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 10.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D6.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=17*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 17mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D6.5mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=17*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 17mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D7.0mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=17*7.0mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 17mm diameter 7.0mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D7.0mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=17*7.0mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 17mm diameter 7.0mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D7.5mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*7.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 7.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D8.0mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*8.0mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 8.0mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D9.0mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*9mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 9mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D9.5mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L22.0mm_D9.5mm_P27.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=27.5mm, , length*diameter=22*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 27.5mm length 22mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L22.0mm_D10.5mm_P27.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=27.5mm, , length*diameter=22*10.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 27.5mm length 22mm diameter 10.5mm +0 +2 +2 +Capacitor_THT +C_Disc_D3.0mm_W1.6mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 2.50mm diameter 3.0mm width 1.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D3.0mm_W2.0mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor +C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D3.4mm_W2.1mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.4*2.1mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 2.50mm diameter 3.4mm width 2.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D3.8mm_W2.6mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D4.3mm_W1.9mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.3*1.9mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 5.00mm diameter 4.3mm width 1.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D4.7mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D5.0mm_W2.5mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 2.50mm diameter 5mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D5.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D5.1mm_W3.2mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5.1*3.2mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 5.00mm diameter 5.1mm width 3.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D6.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=6*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 6mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D6.0mm_W4.4mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=6*4.4mm^2, Capacitor +C Disc series Radial pin pitch 5.00mm diameter 6mm width 4.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 7mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7.5*2.5mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 7.5mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W4.4mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7.5*4.4mm^2, Capacitor +C Disc series Radial pin pitch 5.00mm diameter 7.5mm width 4.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 7.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=7.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 7.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=7.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 7.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 8mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 8mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=8*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 8mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=8*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 8mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=9*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 9mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=9*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 9mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=9*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 9mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=9*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 9mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=10*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 10mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.5mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=10.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 10.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=10.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 10.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=10.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 10.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D11.0mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 11mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D11.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 11mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D11.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 11mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D12.0mm_W4.4mm_P7.75mm +C, Disc series, Radial, pin pitch=7.75mm, , diameter*width=12*4.4mm^2, Capacitor +C Disc series Radial pin pitch 7.75mm diameter 12mm width 4.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D12.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=12.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 12.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D12.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=12.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 12.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D14.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=14.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 14.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D14.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=14.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 14.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D16.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=16.0*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 16.0mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D16.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=16.0*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 16.0mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D4.0mm_H5.0mm_P1.50mm +C, Radial series, Radial, pin pitch=1.50mm, diameter=4mm, height=5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 1.50mm diameter 4mm height 5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D4.0mm_H7.0mm_P1.50mm +C, Radial series, Radial, pin pitch=1.50mm, diameter=4mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 1.50mm diameter 4mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D5.0mm_H5.0mm_P2.00mm +C, Radial series, Radial, pin pitch=2.00mm, diameter=5mm, height=5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.00mm diameter 5mm height 5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D5.0mm_H7.0mm_P2.00mm +C, Radial series, Radial, pin pitch=2.00mm, diameter=5mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.00mm diameter 5mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D5.0mm_H11.0mm_P2.00mm +C, Radial series, Radial, pin pitch=2.00mm, diameter=5mm, height=11mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.00mm diameter 5mm height 11mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D6.3mm_H5.0mm_P2.50mm +C, Radial series, Radial, pin pitch=2.50mm, diameter=6.3mm, height=5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.50mm diameter 6.3mm height 5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D6.3mm_H7.0mm_P2.50mm +C, Radial series, Radial, pin pitch=2.50mm, diameter=6.3mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.50mm diameter 6.3mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D6.3mm_H11.0mm_P2.50mm +C, Radial series, Radial, pin pitch=2.50mm, diameter=6.3mm, height=11mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.50mm diameter 6.3mm height 11mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D8.0mm_H7.0mm_P3.50mm +C, Radial series, Radial, pin pitch=3.50mm, diameter=8mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 3.50mm diameter 8mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D8.0mm_H11.5mm_P3.50mm +C, Radial series, Radial, pin pitch=3.50mm, diameter=8mm, height=11.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 3.50mm diameter 8mm height 11.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D10.0mm_H12.5mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=12.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 10mm height 12.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D10.0mm_H16.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=16mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 10mm height 16mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D10.0mm_H20.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=20mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 10mm height 20mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D12.5mm_H20.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=12.5mm, height=20mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 12.5mm height 20mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D12.5mm_H25.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=12.5mm, height=25mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 12.5mm height 25mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D16.0mm_H25.0mm_P7.50mm +C, Radial series, Radial, pin pitch=7.50mm, diameter=16mm, height=25mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 7.50mm diameter 16mm height 25mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D16.0mm_H31.5mm_P7.50mm +C, Radial series, Radial, pin pitch=7.50mm, diameter=16mm, height=31.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 7.50mm diameter 16mm height 31.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D18.0mm_H35.5mm_P7.50mm +C, Radial series, Radial, pin pitch=7.50mm, diameter=18mm, height=35.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 7.50mm diameter 18mm height 35.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.0mm_W2.5mm_P2.50mm +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4*2.5mm^2, Capacitor +C Rect series Radial pin pitch 2.50mm length 4mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W2.0mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*2mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W3.0mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*3.0mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 3.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W3.8mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*3.8mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 3.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W4.6mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*4.6mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 4.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W5.5mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*5.5mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 5.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W2.0mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*2mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W2.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*2.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W3.5mm_P2.50mm_P5.00mm +C, Rect series, Radial, pin pitch=2.50mm 5.00mm, , length*width=7*3.5mm^2, Capacitor +C Rect series Radial pin pitch 2.50mm 5.00mm length 7mm width 3.5mm Capacitor +0 +4 +2 +Capacitor_THT +C_Rect_L7.0mm_W3.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*3.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W4.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*4.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W6.0mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*6mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W6.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*6.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 6.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W2.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*2.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W3.0mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*3.0mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 3.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W3.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*3.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W4.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*4.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W5.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*5.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 5.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W7.2mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*7.2mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 7.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W8.5mm_P5.00mm_FKP2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*8.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 8.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W11.0mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.5mm_W6.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.5*6.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7.5mm width 6.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W2.5mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*2.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W2.6mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*2.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 2.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W2.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*2.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 2.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.2mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.3mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.4mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.6mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.8mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.9mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W4.0mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*4.0mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 4.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W4.2mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*4.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 4.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W4.9mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*4.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 4.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W5.1mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*5.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 5.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W5.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*5.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 5.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W6.4mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*6.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 6.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W6.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*6.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 6.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W7.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*7.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 7.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W8.5mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*8.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 8.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W9.5mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*9.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 9.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W9.8mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*9.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 9.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W2.5mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*2.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W3.0mm_P7.50mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*3mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W3.0mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*3.0mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 3.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W4.0mm_P7.50mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*4mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W4.0mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*4.0mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 4.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W5.0mm_P5.00mm_P7.50mm +C, Rect series, Radial, pin pitch=5.00mm 7.50mm, , length*width=10*5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm 7.50mm length 10mm width 5mm Capacitor +0 +4 +2 +Capacitor_THT +C_Rect_L10.3mm_W4.5mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*4.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.3mm_W5.0mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.3mm_W5.7mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*5.7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 5.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.3mm_W7.2mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*7.2mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 7.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W2.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*2.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 2.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W3.4mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*3.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 3.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W3.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*3.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W4.2mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*4.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 4.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W4.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*4.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 4.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W5.1mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*5.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 5.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W5.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*5.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 5.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W6.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*6.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 6.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W6.4mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*6.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 6.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W7.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*7.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 7.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W8.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*8.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 8.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W2.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W2.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*2.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 2.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W2.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*2.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 2.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W3.2mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*3.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 3.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W3.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*3.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W3.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*3.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 3.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W4.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*4.0mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 4.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W4.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*4.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 4.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W4.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*4.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.1mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.2mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W6.4mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*6.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 6.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W6.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*6.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 6.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W6.9mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*6.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 6.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W7.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*7.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 7.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W7.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*7.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 7.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W7.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*7.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 7.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W8.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*8.0mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 8.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W8.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*8.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 8.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W9.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*9.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 9.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W9.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*9.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 9.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W3.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*3mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W4.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*4mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W5.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W6.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W6.5mm_P7.50mm_P10.00mm +C, Rect series, Radial, pin pitch=7.50mm 10.00mm, , length*width=13*6.5mm^2, Capacitor +C Rect series Radial pin pitch 7.50mm 10.00mm length 13mm width 6.5mm Capacitor +0 +4 +2 +Capacitor_THT +C_Rect_L13.0mm_W8.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.5mm_W4.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13.5*4mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13.5mm width 4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.5mm_W5.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13.5*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W4.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*4.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 4.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W4.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*4.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 4.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W5.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W6.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W7.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W7.3mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*7.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 7.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W8.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*8.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 8.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W8.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*8.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 8.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W9.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W9.2mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*9.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 9.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W10.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*10.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 10.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W10.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*10.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 10.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W11.2mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*11.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 11.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W11.8mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*11.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 11.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W13.5mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*13.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 13.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W13.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*13.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 13.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W13.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*13.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 13.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W5.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W6.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W7.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*7mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W8.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W9.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W11.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W5.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W6.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W7.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W8.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W9.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W11.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W7.0mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W8.3mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*8.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 8.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W8.6mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*8.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 8.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W10.1mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*10.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 10.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W10.3mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*10.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 10.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W10.9mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*10.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 10.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W12.2mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*12.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 12.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W12.6mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*12.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 12.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W12.8mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*12.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 12.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W5.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W6.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W7.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W8.5mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*8.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 8.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W10.5mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*10.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 10.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W11.5mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*11.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 11.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L27.0mm_W9.0mm_P22.00mm +C, Rect series, Radial, pin pitch=22.00mm, , length*width=27*9mm^2, Capacitor +C Rect series Radial pin pitch 22.00mm length 27mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L27.0mm_W9.0mm_P23.00mm +C, Rect series, Radial, pin pitch=23.00mm, , length*width=27*9mm^2, Capacitor +C Rect series Radial pin pitch 23.00mm length 27mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L27.0mm_W11.0mm_P22.00mm +C, Rect series, Radial, pin pitch=22.00mm, , length*width=27*11mm^2, Capacitor +C Rect series Radial pin pitch 22.00mm length 27mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L28.0mm_W8.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=28*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 28mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L28.0mm_W10.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=28*10mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 28mm width 10mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L28.0mm_W12.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=28*12mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 28mm width 12mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W7.6mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*7.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 7.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W7.8mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*7.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 7.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W7.9mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*7.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 7.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W9.1mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*9.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 9.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W9.6mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*9.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 9.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W11.0mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*11mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W11.9mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*11.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 11.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W12.2mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*12.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 12.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W13.0mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*13mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W13.8mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*13.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 13.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W14.2mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*14.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 14.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W16.0mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*16mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 16mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W9.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W11.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W13.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*13mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W15.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*15mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W17.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*17mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 17mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W20.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*20mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 20mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L32.0mm_W15.0mm_P27.00mm +C, Rect series, Radial, pin pitch=27.00mm, , length*width=32*15mm^2, Capacitor +C Rect series Radial pin pitch 27.00mm length 32mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L33.0mm_W13.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=33*13mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 33mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L33.0mm_W15.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=33*15mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 33mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L33.0mm_W20.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=33*20mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 33mm width 20mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W9.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W11.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W13.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*13mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W15.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*15mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W17.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*17mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 17mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W19.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*19mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 19mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W20.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*20mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 20mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W24.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*24mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 24mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W31.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*31mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 31mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W35.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*35mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 35mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W40.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*40mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 40mm Capacitor +0 +2 +2 +Connector +Banana_Jack_1Pin +Single banana socket, footprint - 6mm drill +banana socket +0 +1 +1 +Connector +Banana_Jack_2Pin +Dual banana socket, footprint - 2 x 6mm drills +banana socket +0 +2 +2 +Connector +Banana_Jack_3Pin +Triple banana socket, footprint - 3 x 6mm drills +banana socket +0 +3 +3 +Connector +CalTest_CT3151 +Right-angle standard banana jack, http://www.caltestelectronics.com/images/attachments/P315100rH_drawing.pdf +banana jack horizontal +0 +4 +1 +Connector +CUI_PD-30 +3 pin connector, PD-30, http://www.cui.com/product/resource/pd-30.pdf +connector 3-pin PD-30 power DIN +0 +4 +4 +Connector +DTF13-12Px +http://www.te.com/usa-en/product-DTF13-12PA-G003.html +DEUTSCH DT header 12 pin +0 +12 +12 +Connector +FanPinHeader_1x03_P2.54mm_Vertical +3-pin CPU fan Through hole pin header, see http://www.formfactors.org/developer%5Cspecs%5Crev1_2_public.pdf +pin header 3-pin CPU fan +0 +3 +3 +Connector +FanPinHeader_1x04_P2.54mm_Vertical +4-pin CPU fan Through hole pin header, e.g. for Wieson part number 2366C888-007 Molex 47053-1000, Foxconn HF27040-M1, Tyco 1470947-1 or equivalent, see http://www.formfactors.org/developer%5Cspecs%5Crev1_2_public.pdf +pin header 4-pin CPU fan +0 +4 +4 +Connector +GB042-34S-H10 +http://www.lsmtron.com/pdf/Connector&Antenna_catalog.PDF +34pin SMD connector +0 +34 +34 +Connector +IHI_B6A-PCB-45_Vertical +https://lugsdirect.com/PDF_Webprint/B6A-PCB-45-XX(-X).pdf +connector IHI B6A-PCB-45 +0 +49 +1 +Connector +JWT_A3963_1x02_P3.96mm_Vertical +JWT A3963, 3.96mm pitch Pin head connector (http://www.jwt.com.tw/pro_pdf/A3963.pdf) +connector JWT A3963 pinhead +0 +2 +2 +Connector +NS-Tech_Grove_1x04_P2mm_Vertical +https://statics3.seeedstudio.com/images/opl/datasheet/3470130P1.pdf +Grove-1x04 +0 +4 +4 +Connector +Tag-Connect_TC2030-IDC-FP_2x03_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2030-IDC.pdf +tag connect programming header pogo pins +0 +6 +6 +Connector +Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2030-IDC-NL.pdf +tag connect programming header pogo pins +0 +6 +6 +Connector +Tag-Connect_TC2050-IDC-FP_2x05_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2050-IDC-430%20Datasheet.pdf +tag connect programming header pogo pins +0 +10 +10 +Connector +Tag-Connect_TC2050-IDC-NL_2x05_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2050-IDC-NL%20Datasheet.pdf +tag connect programming header pogo pins +0 +10 +10 +Connector +Tag-Connect_TC2070-IDC-FP_2x07_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2070-IDC%20Datasheet.pdf +tag connect programming header pogo pins +0 +14 +14 +Connector_Audio +Jack_3.5mm_CUI_SJ-3523-SMT_Horizontal +3.5 mm, Stereo, Right Angle, Surface Mount (SMT), Audio Jack Connector (https://www.cui.com/product/resource/sj-352x-smt-series.pdf) +3.5mm audio cui horizontal jack stereo +0 +3 +3 +Connector_Audio +Jack_3.5mm_CUI_SJ-3524-SMT_Horizontal +3.5 mm, Stereo, Right Angle, Surface Mount (SMT), Audio Jack Connector (https://www.cui.com/product/resource/sj-352x-smt-series.pdf) +3.5mm audio cui horizontal jack stereo +0 +4 +4 +Connector_Audio +Jack_3.5mm_CUI_SJ1-3533NG_Horizontal +TRS 3.5mm, horizontal, through-hole, https://www.cui.com/product/resource/sj1-353xng.pdf +TRS audio jack stereo horizontal +0 +3 +3 +Connector_Audio +Jack_3.5mm_CUI_SJ1-3533NG_Horizontal_CircularHoles +TRS 3.5mm, horizontal, through-hole, , circular holeshttps://www.cui.com/product/resource/sj1-353xng.pdf +TRS audio jack stereo horizontal circular +0 +3 +3 +Connector_Audio +Jack_3.5mm_Ledino_KB3SPRS_Horizontal +https://www.reichelt.de/index.html?ACTION=7&LA=3&OPEN=0&INDEX=0&FILENAME=C160%252FKB3SPRS.pdf +jack stereo TRS +0 +5 +5 +Connector_Audio +Jack_3.5mm_Neutrik_NMJ6HCD2_Horizontal +NMJ6HCD2, TRS 1/4in (http://www.neutrik.com/en/audio/plugs-and-jacks/m-series/nmj6hcd2) +NMJ6HCD2 TRS stereo jack connector +0 +6 +6 +Connector_Audio +Jack_3.5mm_PJ311_Horizontal +PJ311 6pin SMD 3.5mm stereo headphones jack. +headphones jack plug stereo 3.5mm PJ311 +0 +6 +6 +Connector_Audio +Jack_3.5mm_PJ320D_Horizontal +Headphones with microphone connector, 3.5mm, 4 pins (http://www.qingpu-electronics.com/en/products/WQP-PJ320D-72.html) +3.5mm jack mic microphone phones headphones 4pins audio plug +0 +4 +4 +Connector_Audio +Jack_3.5mm_PJ320E_Horizontal +Headphones with microphone connector, 3.5mm, 4 pins (http://www.qingpu-electronics.com/en/products/WQP-PJ320E-177.html) +3.5mm jack mic microphone phones headphones 4pins audio plug +0 +5 +4 +Connector_Audio +Jack_3.5mm_PJ31060-I_Horizontal +PJ31060-I 6pin SMD 3.5mm headphones jack (http://www.china-bsun.com/Product48/1577.html) +headphones jack plug stereo 3.5mm PJ31060-I PJ31060 +0 +6 +6 +Connector_Audio +Jack_3.5mm_QingPu_WQP-PJ398SM_Vertical_CircularHoles +TRS 3.5mm, vertical, Thonkiconn, PCB mount, (http://www.qingpu-electronics.com/en/products/WQP-PJ398SM-362.html) +WQP-PJ398SM WQP-PJ301M-12 TRS 3.5mm mono vertical jack thonkiconn qingpu +0 +3 +3 +Connector_Audio +MiniXLR-5_Switchcraft_TRAPC_Horizontal +http://www.switchcraft.com/ProductSummary.aspx?Parent=620 http://www.switchcraft.com/Drawings/TRAPC_X-TRASM_X_SERIES_CD.PDF +THT Mini XLR 5Pin right angle +0 +5 +5 +Connector_BarrelJack +BarrelJack_CUI_PJ-036AH-SMT_Horizontal +Surface-mount DC Barrel Jack, http://www.cui.com/product/resource/pj-036ah-smt.pdf +Power Jack SMT +0 +3 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-063AH_Horizontal +Barrel Jack, 2.0mm ID, 5.5mm OD, 24V, 8A, no switch, https://www.cui.com/product/resource/pj-063ah.pdf +barrel jack cui dc power +0 +4 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-063AH_Horizontal_CircularHoles +Barrel Jack, 2.0mm ID, 5.5mm OD, 24V, 8A, no switch, https://www.cui.com/product/resource/pj-063ah.pdf +barrel jack cui dc power +0 +4 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-102AH_Horizontal +Thin-pin DC Barrel Jack, https://cdn-shop.adafruit.com/datasheets/21mmdcjackDatasheet.pdf +Power Jack +0 +3 +3 +Connector_BarrelJack +BarrelJack_Horizontal +DC Barrel Jack +Power Jack +0 +3 +3 +Connector_BarrelJack +BarrelJack_Wuerth_6941xx301002 +Wuerth electronics barrel jack connector (5.5mm outher diameter, inner diameter 2.05mm or 2.55mm depending on exact order number), See: http://katalog.we-online.de/em/datasheet/6941xx301002.pdf +connector barrel jack +0 +3 +3 +Connector_Card +CF-Card_3M_N7E50-7516PK-20-WF +Compact Flash Card connector (https://multimedia.3m.com/mws/media/22365O/3mtm-cf-card-header-compactflashtm-type-i-sm-ts0662.pdf) +connector cf +0 +54 +50 +Connector_Card +microSD_HC_Hirose_DM3AT-SF-PEJM5 +Micro SD, SMD, right-angle, push-pull (https://www.hirose.com/product/en/download_file/key_name/DM3AT-SF-PEJM5/category/Drawing%20(2D)/doc_file_id/44099/?file_category_id=6&item_id=06090031000&is_series=) +Micro SD +0 +14 +11 +Connector_Card +microSD_HC_Hirose_DM3BT-DSF-PEJS +Micro SD, SMD, reverse on-board, right-angle, push-pull (https://www.hirose.com/product/en/download_file/key_name/DM3BT-DSF-PEJS/category/Drawing%20(2D)/doc_file_id/44097/?file_category_id=6&item_id=06090029900&is_series=) +Micro SD +0 +16 +11 +Connector_Card +microSD_HC_Hirose_DM3D-SF +Micro SD, SMD, right-angle, push-pull (https://media.digikey.com/PDF/Data%20Sheets/Hirose%20PDFs/DM3D-SF.pdf) +Micro SD +0 +14 +11 +Connector_Card +microSD_HC_Wuerth_693072010801 +http://katalog.we-online.de/em/datasheet/693072010801.pdf +Micro SD Wuerth Wurth Würth +0 +12 +9 +Connector_Card +microSIM_JAE_SF53S006VCBR2000 +https://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ115712.pdf +microSIM GSM Card +0 +14 +7 +Connector_Card +SD_Kyocera_145638009211859+ +SD Card Connector, Normal Type, Outer Tail, Without Ejector (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +12 +Connector_Card +SD_Kyocera_145638009511859+ +SD Card Connector, Normal Type, Outer Tail, Spring Eject Type (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +12 +Connector_Card +SD_Kyocera_145638109211859+ +SD Card Connector, Reverse Type, Outer Tail, Without Ejector (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +12 +Connector_Card +SD_Kyocera_145638109511859+ +SD Card Connector, Reverse Type, Outer Tail, Spring Eject Type (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +12 +Connector_Card +SD_TE_2041021 +SD card connector, top mount, SMT (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F2041021%7FB%7Fpdf%7FEnglish%7FENG_CD_2041021_B_C_2041021_B.pdf%7F2041021-4) +sd card +0 +15 +12 +Connector_Coaxial +BNC_Amphenol_B6252HB-NPP3G-50_Horizontal +http://www.farnell.com/datasheets/612848.pdf +BNC Amphenol Horizontal +0 +4 +2 +Connector_Coaxial +BNC_PanelMountable_Vertical +Panel-mountable BNC connector mounted through PCB, vertical +BNC connector +0 +2 +2 +Connector_Coaxial +BNC_TEConnectivity_1478204_Vertical +BNC female PCB mount 4 pin straight chassis connector http://www.te.com/usa-en/product-1-1478204-0.html +BNC female PCB mount 4 pin straight chassis connector +0 +5 +2 +Connector_Coaxial +MMCX_Molex_73415-0961_Horizontal_0.8mm-PCB +Molex MMCX Horizontal Coaxial https://www.molex.com/pdm_docs/sd/734150961_sd.pdf +Molex MMCX Horizontal Coaxial +0 +3 +2 +Connector_Coaxial +MMCX_Molex_73415-0961_Horizontal_1.0mm-PCB +Molex MMCX Horizontal Coaxial https://www.molex.com/pdm_docs/sd/734150961_sd.pdf +Molex MMCX Horizontal Coaxial +0 +3 +2 +Connector_Coaxial +MMCX_Molex_73415-0961_Horizontal_1.6mm-PCB +Molex MMCX Horizontal Coaxial https://www.molex.com/pdm_docs/sd/734150961_sd.pdf +Molex MMCX Horizontal Coaxial +0 +3 +2 +Connector_Coaxial +MMCX_Molex_73415-1471_Vertical +http://www.molex.com/pdm_docs/sd/734151471_sd.pdf +Molex MMCX Coaxial Connector 50 ohms Female Jack Vertical THT +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_901-144_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/7023/product/3103/901_144_customer_drawing.pdf +SMA THT Female Jack Vertical +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134-10_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/4007/product/2974/132134_10_customer_drawing.pdf +SMA SMD Female Jack Vertical +0 +3 +2 +Connector_Coaxial +SMA_Amphenol_132134-11_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/3406/product/2975/132134_11_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134-14_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/1793/product/2976/132134_14_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134-16_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/1141/product/2978/132134_16_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/2187/product/2843/132134_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132289_EdgeMount +http://www.amphenolrf.com/132289.html +SMA +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132291-12_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/1688/product/3020/132291_12_customer_drawing.pdf +SMA THT Female Jack Vertical Bulkhead +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132291_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/3222/product/2918/132291_customer_drawing.pdf +SMA THT Female Jack Vertical Bulkhead +0 +5 +2 +Connector_Coaxial +SMA_Molex_73251-1153_EdgeMount_Horizontal +Molex SMA RF Connectors, Edge Mount, (http://www.molex.com/pdm_docs/sd/732511150_sd.pdf) +sma edge +0 +11 +2 +Connector_Coaxial +SMA_Molex_73251-2200_Horizontal +https://www.molex.com/webdocs/datasheets/pdf/en-us/0732512200_RF_COAX_CONNECTORS.pdf +SMA THT Female Jack Horizontal +0 +5 +2 +Connector_Coaxial +SMA_Samtec_SMA-J-P-H-ST-EM1_EdgeMount +http://suddendocs.samtec.com/prints/sma-j-p-x-st-em1-mkt.pdf +SMA +0 +5 +2 +Connector_Coaxial +SMB_Jack_Vertical +SMB pcb mounting jack +SMB Jack Striaght +0 +5 +2 +Connector_Coaxial +U.FL_Hirose_U.FL-R-SMT-1_Vertical +Hirose U.FL Coaxial https://www.hirose.com/product/en/products/U.FL/U.FL-R-SMT-1%2810%29/ +Hirose U.FL Coaxial +0 +3 +2 +Connector_Coaxial +U.FL_Molex_MCRF_73412-0110_Vertical +Molex Microcoaxial RF Connectors (MCRF), mates Hirose U.FL, (http://www.molex.com/pdm_docs/sd/734120110_sd.pdf) +mcrf hirose ufl u.fl microcoaxial +0 +4 +2 +Connector_DIN +DIN41612_B2_2x8_Horizontal +DIN 41612 connector, type B/2, horizontal, 16 pins wide, 2 rows, even columns +DIN 41512 IEC 60603 B/2 +0 +16 +16 +Connector_DIN +DIN41612_B2_2x8_Vertical +DIN 41612 connector, type B/2, vertical, 16 pins wide, 2 rows, even columns +DIN 41512 IEC 60603 B/2 +0 +16 +16 +Connector_DIN +DIN41612_B2_2x16_Horizontal +DIN 41612 connector, type B/2, horizontal, 16 pins wide, 2 rows, full configuration +DIN 41512 IEC 60603 B/2 +0 +32 +32 +Connector_DIN +DIN41612_B2_2x16_Vertical +DIN 41612 connector, type B/2, vertical, 16 pins wide, 2 rows, full configuration +DIN 41512 IEC 60603 B/2 +0 +32 +32 +Connector_DIN +DIN41612_B3_2x5_Horizontal +DIN 41612 connector, type B/3, horizontal, 10 pins wide, 2 rows, even columns +DIN 41512 IEC 60603 B/3 +0 +10 +10 +Connector_DIN +DIN41612_B3_2x5_Vertical +DIN 41612 connector, type B/3, vertical, 10 pins wide, 2 rows, even columns +DIN 41512 IEC 60603 B/3 +0 +10 +10 +Connector_DIN +DIN41612_B3_2x10_Horizontal +DIN 41612 connector, type B/3, horizontal, 10 pins wide, 2 rows, full configuration +DIN 41512 IEC 60603 B/3 +0 +20 +20 +Connector_DIN +DIN41612_B3_2x10_Vertical +DIN 41612 connector, type B/3, vertical, 10 pins wide, 2 rows, full configuration +DIN 41512 IEC 60603 B/3 +0 +20 +20 +Connector_DIN +DIN41612_B_2x16_Horizontal +DIN 41612 connector, type B, horizontal, 32 pins wide, 2 rows, even columns +DIN 41512 IEC 60603 B +0 +32 +32 +Connector_DIN +DIN41612_B_2x16_Vertical +DIN 41612 connector, type B, vertical, 32 pins wide, 2 rows, even columns +DIN 41512 IEC 60603 B +0 +32 +32 +Connector_DIN +DIN41612_B_2x32_Horizontal +DIN 41612 connector, type B, horizontal, 32 pins wide, 2 rows, full configuration +DIN 41512 IEC 60603 B +0 +64 +64 +Connector_DIN +DIN41612_B_2x32_Vertical +DIN 41612 connector, type B, vertical, 32 pins wide, 2 rows, full configuration +DIN 41512 IEC 60603 B +0 +64 +64 +Connector_Dsub +DSUB-9_Female_EdgeMount_P2.77mm +9-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Vertical_P2.77x2.84mm +9-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Vertical_P2.77x2.84mm_MountingHoles +9-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_EdgeMount_P2.77mm +9-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Vertical_P2.77x2.84mm +9-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Vertical_P2.77x2.84mm_MountingHoles +9-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 25mm +0 +11 +10 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Female_Vertical_P2.29x1.98mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.29x1.98mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT female pitch 2.29x1.98mm mounting holes distance 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Male_Vertical_P2.29x1.98mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.29x1.98mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT male pitch 2.29x1.98mm mounting holes distance 25mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_EdgeMount_P2.77mm +15-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Vertical_P2.77x2.84mm +15-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Vertical_P2.77x2.84mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_EdgeMount_P2.77mm +15-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Vertical_P2.77x2.84mm +15-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Vertical_P2.77x2.84mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-25_Female_EdgeMount_P2.77mm +25-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Vertical_P2.77x2.84mm +25-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Vertical_P2.77x2.84mm_MountingHoles +25-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_EdgeMount_P2.77mm +25-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Vertical_P2.77x2.84mm +25-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Vertical_P2.77x2.84mm_MountingHoles +25-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Female_Vertical_P2.29x1.98mm_MountingHoles +26-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.29x1.98mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector straight vertical THT female pitch 2.29x1.98mm mounting holes distance 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Male_Vertical_P2.29x1.98mm_MountingHoles +26-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.29x1.98mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector straight vertical THT male pitch 2.29x1.98mm mounting holes distance 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-37_Female_EdgeMount_P2.77mm +37-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Vertical_P2.77x2.84mm +37-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Vertical_P2.77x2.84mm_MountingHoles +37-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_EdgeMount_P2.77mm +37-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Vertical_P2.77x2.84mm +37-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Vertical_P2.77x2.84mm_MountingHoles +37-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Female_Vertical_P2.29x1.98mm_MountingHoles +44-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.29x1.98mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector straight vertical THT female pitch 2.29x1.98mm mounting holes distance 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Male_Vertical_P2.29x1.98mm_MountingHoles +44-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.29x1.98mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector straight vertical THT male pitch 2.29x1.98mm mounting holes distance 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x1.98mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x1.98mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x2.54mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x2.54mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Female_Vertical_P2.41x1.98mm_MountingHoles +62-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.41x1.98mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector straight vertical THT female pitch 2.41x1.98mm mounting holes distance 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x1.98mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x1.98mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x2.54mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x2.54mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Male_Vertical_P2.41x1.98mm_MountingHoles +62-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.41x1.98mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector straight vertical THT male pitch 2.41x1.98mm mounting holes distance 63.5mm +0 +64 +63 +Connector_FFC-FPC +Hirose_FH12-6S-0.5SH_1x06-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-6S-0.5SH, 6 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +8 +7 +Connector_FFC-FPC +Hirose_FH12-8S-0.5SH_1x08-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-8S-0.5SH, 8 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +10 +9 +Connector_FFC-FPC +Hirose_FH12-10S-0.5SH_1x10-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-10S-0.5SH, 10 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +12 +11 +Connector_FFC-FPC +Hirose_FH12-11S-0.5SH_1x11-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-11S-0.5SH, 11 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +13 +12 +Connector_FFC-FPC +Hirose_FH12-12S-0.5SH_1x12-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-12S-0.5SH, 12 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +14 +13 +Connector_FFC-FPC +Hirose_FH12-13S-0.5SH_1x13-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-13S-0.5SH, 13 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +15 +14 +Connector_FFC-FPC +Hirose_FH12-14S-0.5SH_1x14-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-14S-0.5SH, 14 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +16 +15 +Connector_FFC-FPC +Hirose_FH12-15S-0.5SH_1x15-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-15S-0.5SH, 15 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +17 +16 +Connector_FFC-FPC +Hirose_FH12-16S-0.5SH_1x16-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-16S-0.5SH, 16 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +18 +17 +Connector_FFC-FPC +Hirose_FH12-17S-0.5SH_1x17-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-17S-0.5SH, 17 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +19 +18 +Connector_FFC-FPC +Hirose_FH12-18S-0.5SH_1x18-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-18S-0.5SH, 18 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +20 +19 +Connector_FFC-FPC +Hirose_FH12-19S-0.5SH_1x19-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-19S-0.5SH, 19 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +21 +20 +Connector_FFC-FPC +Hirose_FH12-20S-0.5SH_1x20-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-20S-0.5SH, 20 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +22 +21 +Connector_FFC-FPC +Hirose_FH12-22S-0.5SH_1x22-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-22S-0.5SH, 22 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +24 +23 +Connector_FFC-FPC +Hirose_FH12-24S-0.5SH_1x24-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-24S-0.5SH, 24 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +26 +25 +Connector_FFC-FPC +Hirose_FH12-25S-0.5SH_1x25-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-25S-0.5SH, 25 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +27 +26 +Connector_FFC-FPC +Hirose_FH12-26S-0.5SH_1x26-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-26S-0.5SH, 26 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +28 +27 +Connector_FFC-FPC +Hirose_FH12-28S-0.5SH_1x28-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-28S-0.5SH, 28 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +30 +29 +Connector_FFC-FPC +Hirose_FH12-30S-0.5SH_1x30-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-30S-0.5SH, 30 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +32 +31 +Connector_FFC-FPC +Hirose_FH12-32S-0.5SH_1x32-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-32S-0.5SH, 32 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +34 +33 +Connector_FFC-FPC +Hirose_FH12-33S-0.5SH_1x33-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-33S-0.5SH, 33 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +35 +34 +Connector_FFC-FPC +Hirose_FH12-34S-0.5SH_1x34-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-34S-0.5SH, 34 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +36 +35 +Connector_FFC-FPC +Hirose_FH12-35S-0.5SH_1x35-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-35S-0.5SH, 35 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +37 +36 +Connector_FFC-FPC +Hirose_FH12-36S-0.5SH_1x36-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-36S-0.5SH, 36 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +38 +37 +Connector_FFC-FPC +Hirose_FH12-40S-0.5SH_1x40-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-40S-0.5SH, 40 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +42 +41 +Connector_FFC-FPC +Hirose_FH12-45S-0.5SH_1x45-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-45S-0.5SH, 45 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +47 +46 +Connector_FFC-FPC +Hirose_FH12-50S-0.5SH_1x50-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-50S-0.5SH, 50 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +52 +51 +Connector_FFC-FPC +Hirose_FH12-53S-0.5SH_1x53-1MP_P0.50mm_Horizontal +Molex FH12, FFC/FPC connector, FH12-53S-0.5SH, 53 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose top entry +0 +55 +54 +Connector_FFC-FPC +JAE_FF0825SA1_2Rows-25Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0825SA1, 25 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +25 +25 +Connector_FFC-FPC +JAE_FF0829SA1_2Rows-29Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0829SA1, 29 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +29 +29 +Connector_FFC-FPC +JAE_FF0841SA1_2Rows-41Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0841SA1, 41 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +41 +41 +Connector_FFC-FPC +JAE_FF0851SA1_2Rows-51Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0851SA1, 51 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +51 +51 +Connector_FFC-FPC +JAE_FF0871SA1_2Rows-71Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0871SA1, 71 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +71 +71 +Connector_FFC-FPC +JAE_FF0881SA1_2Rows-81Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0881SA1, 81 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +81 +81 +Connector_FFC-FPC +Molex_54132-5033_1x50-1MP_P0.5mm_Horizontal +Molex FFC/FPC connector, 50 bottom-side contacts, 0.5mm pitch, 2.0mm height, https://www.molex.com/pdm_docs/sd/541325033_sd.pdf +FFC FPC +0 +54 +51 +Connector_FFC-FPC +Molex_200528-0040_1x04-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0040, 4 Circuits (https://www.molex.com/pdm_docs/sd/2005280040_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +6 +5 +Connector_FFC-FPC +Molex_200528-0050_1x05-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0050, 5 Circuits (https://www.molex.com/pdm_docs/sd/2005280050_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +7 +6 +Connector_FFC-FPC +Molex_200528-0060_1x06-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0060, 6 Circuits (https://www.molex.com/pdm_docs/sd/2005280060_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +8 +7 +Connector_FFC-FPC +Molex_200528-0070_1x07-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0070, 7 Circuits (https://www.molex.com/pdm_docs/sd/2005280070_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +9 +8 +Connector_FFC-FPC +Molex_200528-0080_1x08-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0080, 8 Circuits (https://www.molex.com/pdm_docs/sd/2005280080_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +10 +9 +Connector_FFC-FPC +Molex_200528-0090_1x09-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0090, 9 Circuits (https://www.molex.com/pdm_docs/sd/2005280090_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +11 +10 +Connector_FFC-FPC +Molex_200528-0100_1x10-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0100, 10 Circuits (https://www.molex.com/pdm_docs/sd/2005280100_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +12 +11 +Connector_FFC-FPC +Molex_200528-0110_1x11-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0110, 11 Circuits (https://www.molex.com/pdm_docs/sd/2005280110_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +13 +12 +Connector_FFC-FPC +Molex_200528-0120_1x12-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0120, 12 Circuits (https://www.molex.com/pdm_docs/sd/2005280120_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +14 +13 +Connector_FFC-FPC +Molex_200528-0130_1x13-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0130, 13 Circuits (https://www.molex.com/pdm_docs/sd/2005280130_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +15 +14 +Connector_FFC-FPC +Molex_200528-0140_1x14-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0140, 14 Circuits (https://www.molex.com/pdm_docs/sd/2005280140_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +16 +15 +Connector_FFC-FPC +Molex_200528-0150_1x15-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0150, 15 Circuits (https://www.molex.com/pdm_docs/sd/2005280150_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +17 +16 +Connector_FFC-FPC +Molex_200528-0160_1x16-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0160, 16 Circuits (https://www.molex.com/pdm_docs/sd/2005280160_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +18 +17 +Connector_FFC-FPC +Molex_200528-0170_1x17-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0170, 17 Circuits (https://www.molex.com/pdm_docs/sd/2005280170_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +19 +18 +Connector_FFC-FPC +Molex_200528-0180_1x18-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0180, 18 Circuits (https://www.molex.com/pdm_docs/sd/2005280180_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +20 +19 +Connector_FFC-FPC +Molex_200528-0190_1x19-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0190, 19 Circuits (https://www.molex.com/pdm_docs/sd/2005280190_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +21 +20 +Connector_FFC-FPC +Molex_200528-0200_1x20-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0200, 20 Circuits (https://www.molex.com/pdm_docs/sd/2005280200_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +22 +21 +Connector_FFC-FPC +Molex_200528-0210_1x21-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0210, 21 Circuits (https://www.molex.com/pdm_docs/sd/2005280210_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +23 +22 +Connector_FFC-FPC +Molex_200528-0220_1x22-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0220, 22 Circuits (https://www.molex.com/pdm_docs/sd/2005280220_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +24 +23 +Connector_FFC-FPC +Molex_200528-0230_1x23-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0230, 23 Circuits (https://www.molex.com/pdm_docs/sd/2005280230_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +25 +24 +Connector_FFC-FPC +Molex_200528-0240_1x24-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0240, 24 Circuits (https://www.molex.com/pdm_docs/sd/2005280240_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +26 +25 +Connector_FFC-FPC +Molex_200528-0250_1x25-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0250, 25 Circuits (https://www.molex.com/pdm_docs/sd/2005280250_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +27 +26 +Connector_FFC-FPC +Molex_200528-0260_1x26-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0260, 26 Circuits (https://www.molex.com/pdm_docs/sd/2005280260_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +28 +27 +Connector_FFC-FPC +Molex_200528-0270_1x27-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0270, 27 Circuits (https://www.molex.com/pdm_docs/sd/2005280270_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +29 +28 +Connector_FFC-FPC +Molex_200528-0280_1x28-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0280, 28 Circuits (https://www.molex.com/pdm_docs/sd/2005280280_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +30 +29 +Connector_FFC-FPC +Molex_200528-0290_1x29-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0290, 29 Circuits (https://www.molex.com/pdm_docs/sd/2005280290_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +31 +30 +Connector_FFC-FPC +Molex_200528-0300_1x30-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0300, 30 Circuits (https://www.molex.com/pdm_docs/sd/2005280300_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +32 +31 +Connector_FFC-FPC +Molex_502244-1530_1x15-1MP_P0.5mm_Horizontal +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 2.33mm Height, Right Angle, Surface Mount, ZIF, Bottom Contact Style, 15 Circuits (http://www.molex.com/pdm_docs/sd/5022441530_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm right angle +0 +19 +16 +Connector_FFC-FPC +Molex_502244-2430_1x24-1MP_P0.5mm_Horizontal +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 2.33mm Height, Right Angle, Surface Mount, ZIF, Bottom Contact Style, 24 Circuits (http://www.molex.com/pdm_docs/sd/5022441530_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm right angle +0 +28 +25 +Connector_FFC-FPC +Molex_502244-3330_1x33-1MP_P0.5mm_Horizontal +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 2.33mm Height, Right Angle, Surface Mount, ZIF, Bottom Contact Style, 33 Circuits (http://www.molex.com/pdm_docs/sd/5022441530_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm right angle +0 +39 +34 +Connector_FFC-FPC +Molex_502250-1791_2Rows-17Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-1791, 17 Circuits (http://www.molex.com/pdm_docs/sd/5022501791_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +19 +18 +Connector_FFC-FPC +Molex_502250-2191_2Rows-21Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-2191, 21 Circuits (http://www.molex.com/pdm_docs/sd/5022502191_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +23 +22 +Connector_FFC-FPC +Molex_502250-2391_2Rows-23Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-2391, 23 Circuits (http://www.molex.com/pdm_docs/sd/5022502391_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +25 +24 +Connector_FFC-FPC +Molex_502250-2791_2Rows-27Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-2791, 27 Circuits (http://www.molex.com/pdm_docs/sd/5022502791_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +29 +28 +Connector_FFC-FPC +Molex_502250-3391_2Rows-33Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-3391, 33 Circuits (http://www.molex.com/pdm_docs/sd/5022503391_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +35 +34 +Connector_FFC-FPC +Molex_502250-3591_2Rows-35Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-3591, 35 Circuits (http://www.molex.com/pdm_docs/sd/5022503591_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +37 +36 +Connector_FFC-FPC +Molex_502250-3991_2Rows-39Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-3991, 39 Circuits (http://www.molex.com/pdm_docs/sd/5022503991_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +41 +40 +Connector_FFC-FPC +Molex_502250-4191_2Rows-41Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-4191, 41 Circuits (http://www.molex.com/pdm_docs/sd/5022504191_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +43 +42 +Connector_FFC-FPC +Molex_502250-5191_2Rows-51Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-5191, 51 Circuits (http://www.molex.com/pdm_docs/sd/5022505191_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +53 +52 +Connector_FFC-FPC +TE_1-84952-0_1x10-1MP_P1.0mm_Horizontal +TE FPC connector, 10 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +12 +11 +Connector_FFC-FPC +TE_1-84952-1_1x11-1MP_P1.0mm_Horizontal +TE FPC connector, 11 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +13 +12 +Connector_FFC-FPC +TE_1-84952-2_1x12-1MP_P1.0mm_Horizontal +TE FPC connector, 12 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +14 +13 +Connector_FFC-FPC +TE_1-84952-3_1x13-1MP_P1.0mm_Horizontal +TE FPC connector, 13 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +15 +14 +Connector_FFC-FPC +TE_1-84952-4_1x14-1MP_P1.0mm_Horizontal +TE FPC connector, 14 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +16 +15 +Connector_FFC-FPC +TE_1-84952-5_1x15-1MP_P1.0mm_Horizontal +TE FPC connector, 15 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +17 +16 +Connector_FFC-FPC +TE_1-84952-6_1x16-1MP_P1.0mm_Horizontal +TE FPC connector, 16 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +18 +17 +Connector_FFC-FPC +TE_1-84952-7_1x17-1MP_P1.0mm_Horizontal +TE FPC connector, 17 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +19 +18 +Connector_FFC-FPC +TE_1-84952-8_1x18-1MP_P1.0mm_Horizontal +TE FPC connector, 18 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +20 +19 +Connector_FFC-FPC +TE_1-84952-9_1x19-1MP_P1.0mm_Horizontal +TE FPC connector, 19 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +21 +20 +Connector_FFC-FPC +TE_1-84953-0_1x10-1MP_P1.0mm_Horizontal +TE FPC connector, 10 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +12 +11 +Connector_FFC-FPC +TE_1-84953-1_1x11-1MP_P1.0mm_Horizontal +TE FPC connector, 11 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +13 +12 +Connector_FFC-FPC +TE_1-84953-2_1x12-1MP_P1.0mm_Horizontal +TE FPC connector, 12 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +14 +13 +Connector_FFC-FPC +TE_1-84953-3_1x13-1MP_P1.0mm_Horizontal +TE FPC connector, 13 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +15 +14 +Connector_FFC-FPC +TE_1-84953-4_1x14-1MP_P1.0mm_Horizontal +TE FPC connector, 14 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +16 +15 +Connector_FFC-FPC +TE_1-84953-5_1x15-1MP_P1.0mm_Horizontal +TE FPC connector, 15 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +17 +16 +Connector_FFC-FPC +TE_1-84953-6_1x16-1MP_P1.0mm_Horizontal +TE FPC connector, 16 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +18 +17 +Connector_FFC-FPC +TE_1-84953-7_1x17-1MP_P1.0mm_Horizontal +TE FPC connector, 17 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +19 +18 +Connector_FFC-FPC +TE_1-84953-8_1x18-1MP_P1.0mm_Horizontal +TE FPC connector, 18 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +20 +19 +Connector_FFC-FPC +TE_1-84953-9_1x19-1MP_P1.0mm_Horizontal +TE FPC connector, 19 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +21 +20 +Connector_FFC-FPC +TE_2-84952-0_1x20-1MP_P1.0mm_Horizontal +TE FPC connector, 20 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +22 +21 +Connector_FFC-FPC +TE_2-84952-1_1x21-1MP_P1.0mm_Horizontal +TE FPC connector, 21 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +23 +22 +Connector_FFC-FPC +TE_2-84952-2_1x22-1MP_P1.0mm_Horizontal +TE FPC connector, 22 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +24 +23 +Connector_FFC-FPC +TE_2-84952-3_1x23-1MP_P1.0mm_Horizontal +TE FPC connector, 23 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +25 +24 +Connector_FFC-FPC +TE_2-84952-4_1x24-1MP_P1.0mm_Horizontal +TE FPC connector, 24 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +26 +25 +Connector_FFC-FPC +TE_2-84952-5_1x25-1MP_P1.0mm_Horizontal +TE FPC connector, 25 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +27 +26 +Connector_FFC-FPC +TE_2-84952-6_1x26-1MP_P1.0mm_Horizontal +TE FPC connector, 26 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +28 +27 +Connector_FFC-FPC +TE_2-84952-7_1x27-1MP_P1.0mm_Horizontal +TE FPC connector, 27 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +29 +28 +Connector_FFC-FPC +TE_2-84952-8_1x28-1MP_P1.0mm_Horizontal +TE FPC connector, 28 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +30 +29 +Connector_FFC-FPC +TE_2-84952-9_1x29-1MP_P1.0mm_Horizontal +TE FPC connector, 29 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +31 +30 +Connector_FFC-FPC +TE_2-84953-0_1x20-1MP_P1.0mm_Horizontal +TE FPC connector, 20 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +22 +21 +Connector_FFC-FPC +TE_2-84953-1_1x21-1MP_P1.0mm_Horizontal +TE FPC connector, 21 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +23 +22 +Connector_FFC-FPC +TE_2-84953-2_1x22-1MP_P1.0mm_Horizontal +TE FPC connector, 22 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +24 +23 +Connector_FFC-FPC +TE_2-84953-3_1x23-1MP_P1.0mm_Horizontal +TE FPC connector, 23 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +25 +24 +Connector_FFC-FPC +TE_2-84953-4_1x24-1MP_P1.0mm_Horizontal +TE FPC connector, 24 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +26 +25 +Connector_FFC-FPC +TE_2-84953-5_1x25-1MP_P1.0mm_Horizontal +TE FPC connector, 25 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +27 +26 +Connector_FFC-FPC +TE_2-84953-6_1x26-1MP_P1.0mm_Horizontal +TE FPC connector, 26 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +28 +27 +Connector_FFC-FPC +TE_2-84953-7_1x27-1MP_P1.0mm_Horizontal +TE FPC connector, 27 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +29 +28 +Connector_FFC-FPC +TE_2-84953-8_1x28-1MP_P1.0mm_Horizontal +TE FPC connector, 28 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +30 +29 +Connector_FFC-FPC +TE_2-84953-9_1x29-1MP_P1.0mm_Horizontal +TE FPC connector, 29 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +31 +30 +Connector_FFC-FPC +TE_3-84952-0_1x30-1MP_P1.0mm_Horizontal +TE FPC connector, 30 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +32 +31 +Connector_FFC-FPC +TE_3-84953-0_1x30-1MP_P1.0mm_Horizontal +TE FPC connector, 30 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +32 +31 +Connector_FFC-FPC +TE_84952-4_1x04-1MP_P1.0mm_Horizontal +TE FPC connector, 04 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +6 +5 +Connector_FFC-FPC +TE_84952-5_1x05-1MP_P1.0mm_Horizontal +TE FPC connector, 05 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +7 +6 +Connector_FFC-FPC +TE_84952-6_1x06-1MP_P1.0mm_Horizontal +TE FPC connector, 06 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +8 +7 +Connector_FFC-FPC +TE_84952-7_1x07-1MP_P1.0mm_Horizontal +TE FPC connector, 07 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +9 +8 +Connector_FFC-FPC +TE_84952-8_1x08-1MP_P1.0mm_Horizontal +TE FPC connector, 08 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +10 +9 +Connector_FFC-FPC +TE_84952-9_1x09-1MP_P1.0mm_Horizontal +TE FPC connector, 09 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +11 +10 +Connector_FFC-FPC +TE_84953-4_1x04-1MP_P1.0mm_Horizontal +TE FPC connector, 04 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +6 +5 +Connector_FFC-FPC +TE_84953-5_1x05-1MP_P1.0mm_Horizontal +TE FPC connector, 05 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +7 +6 +Connector_FFC-FPC +TE_84953-6_1x06-1MP_P1.0mm_Horizontal +TE FPC connector, 06 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +8 +7 +Connector_FFC-FPC +TE_84953-7_1x07-1MP_P1.0mm_Horizontal +TE FPC connector, 07 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +9 +8 +Connector_FFC-FPC +TE_84953-8_1x08-1MP_P1.0mm_Horizontal +TE FPC connector, 08 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +10 +9 +Connector_FFC-FPC +TE_84953-9_1x09-1MP_P1.0mm_Horizontal +TE FPC connector, 09 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +11 +10 +Connector_FFC-FPC +Wuerth_68611214422_1x12-1MP_P1.0mm_Horizontal +http://katalog.we-online.de/em/datasheet/68611214422.pdf +Wuerth FPC 68611214422 connector 12 bottom-side contacts 1.0mm pitch 1.0mm height SMT +0 +14 +13 +Connector_Harwin +Harwin_Gecko-G125-FVX0605L0X_2x03_P1.25mm_Vertical +Harwin Gecko Connector, 6 pins, dual row female, vertical entry, PN:G125-FVX0605L0X +connector harwin gecko +0 +6 +6 +Connector_Harwin +Harwin_Gecko-G125-FVX1005L0X_2x05_P1.25mm_Vertical +Harwin Gecko Connector, 10 pins, dual row female, vertical entry, PN:G125-FVX1005L0X +connector harwin gecko +0 +10 +10 +Connector_Harwin +Harwin_Gecko-G125-FVX1205L0X_2x06_P1.25mm_Vertical +Harwin Gecko Connector, 12 pins, dual row female, vertical entry, PN:G125-FVX1205L0X +connector harwin gecko +0 +12 +12 +Connector_Harwin +Harwin_Gecko-G125-FVX1605L0X_2x08_P1.25mm_Vertical +Harwin Gecko Connector, 16 pins, dual row female, vertical entry, PN:G125-FVX1605L0X +connector harwin gecko +0 +16 +16 +Connector_Harwin +Harwin_Gecko-G125-FVX2005L0X_2x10_P1.25mm_Vertical +Harwin Gecko Connector, 20 pins, dual row female, vertical entry, PN:G125-FVX2005L0X +connector harwin gecko +0 +20 +20 +Connector_Harwin +Harwin_Gecko-G125-FVX2605L0X_2x13_P1.25mm_Vertical +Harwin Gecko Connector, 26 pins, dual row female, vertical entry, PN:G125-FVX2605L0X +connector harwin gecko +0 +26 +26 +Connector_Harwin +Harwin_Gecko-G125-FVX3405L0X_2x17_P1.25mm_Vertical +Harwin Gecko Connector, 34 pins, dual row female, vertical entry, PN:G125-FVX3405L0X +connector harwin gecko +0 +34 +34 +Connector_Harwin +Harwin_Gecko-G125-FVX5005L0X_2x25_P1.25mm_Vertical +Harwin Gecko Connector, 50 pins, dual row female, vertical entry, PN:G125-FVX5005L0X +connector harwin gecko +0 +50 +50 +Connector_Harwin +Harwin_Gecko-G125-MVX0605L0X_2x03_P1.25mm_Vertical +Harwin Gecko Connector, 6 pins, dual row male, vertical entry, no latches, PN:G125-MVX0605L0X +connector harwin gecko +0 +6 +6 +Connector_Harwin +Harwin_Gecko-G125-MVX0605L1X_2x03_P1.25mm_Vertical +Harwin Gecko Connector, 6 pins, dual row male, vertical entry, with latches, PN:G125-MVX0605L1X +connector harwin gecko +0 +6 +6 +Connector_Harwin +Harwin_Gecko-G125-MVX1005L0X_2x05_P1.25mm_Vertical +Harwin Gecko Connector, 10 pins, dual row male, vertical entry, no latches, PN:G125-MVX1005L0X +connector harwin gecko +0 +10 +10 +Connector_Harwin +Harwin_Gecko-G125-MVX1005L1X_2x05_P1.25mm_Vertical +Harwin Gecko Connector, 10 pins, dual row male, vertical entry, with latches, PN:G125-MVX1005L1X +connector harwin gecko +0 +10 +10 +Connector_Harwin +Harwin_Gecko-G125-MVX1205L0X_2x06_P1.25mm_Vertical +Harwin Gecko Connector, 12 pins, dual row male, vertical entry, no latches, PN:G125-MVX1205L0X +connector harwin gecko +0 +12 +12 +Connector_Harwin +Harwin_Gecko-G125-MVX1205L1X_2x06_P1.25mm_Vertical +Harwin Gecko Connector, 12 pins, dual row male, vertical entry, with latches, PN:G125-MVX1205L1X +connector harwin gecko +0 +12 +12 +Connector_Harwin +Harwin_Gecko-G125-MVX1605L0X_2x08_P1.25mm_Vertical +Harwin Gecko Connector, 16 pins, dual row male, vertical entry, no latches, PN:G125-MVX1605L0X +connector harwin gecko +0 +16 +16 +Connector_Harwin +Harwin_Gecko-G125-MVX1605L1X_2x08_P1.25mm_Vertical +Harwin Gecko Connector, 16 pins, dual row male, vertical entry, with latches, PN:G125-MVX1605L1X +connector harwin gecko +0 +16 +16 +Connector_Harwin +Harwin_Gecko-G125-MVX2005L0X_2x10_P1.25mm_Vertical +Harwin Gecko Connector, 20 pins, dual row male, vertical entry, no latches, PN:G125-MVX2005L0X +connector harwin gecko +0 +20 +20 +Connector_Harwin +Harwin_Gecko-G125-MVX2005L1X_2x10_P1.25mm_Vertical +Harwin Gecko Connector, 20 pins, dual row male, vertical entry, with latches, PN:G125-MVX2005L1X +connector harwin gecko +0 +20 +20 +Connector_Harwin +Harwin_Gecko-G125-MVX2605L0X_2x13_P1.25mm_Vertical +Harwin Gecko Connector, 26 pins, dual row male, vertical entry, no latches, PN:G125-MVX2605L0X +connector harwin gecko +0 +26 +26 +Connector_Harwin +Harwin_Gecko-G125-MVX2605L1X_2x13_P1.25mm_Vertical +Harwin Gecko Connector, 26 pins, dual row male, vertical entry, with latches, PN:G125-MVX2605L1X +connector harwin gecko +0 +26 +26 +Connector_Harwin +Harwin_Gecko-G125-MVX3405L0X_2x17_P1.25mm_Vertical +Harwin Gecko Connector, 34 pins, dual row male, vertical entry, no latches, PN:G125-MVX3405L0X +connector harwin gecko +0 +34 +34 +Connector_Harwin +Harwin_Gecko-G125-MVX3405L1X_2x17_P1.25mm_Vertical +Harwin Gecko Connector, 34 pins, dual row male, vertical entry, with latches, PN:G125-MVX3405L1X +connector harwin gecko +0 +34 +34 +Connector_Harwin +Harwin_Gecko-G125-MVX5005L0X_2x25_P1.25mm_Vertical +Harwin Gecko Connector, 50 pins, dual row male, vertical entry, no latches, PN:G125-MVX5005L0X +connector harwin gecko +0 +50 +50 +Connector_Harwin +Harwin_Gecko-G125-MVX5005L1X_2x25_P1.25mm_Vertical +Harwin Gecko Connector, 50 pins, dual row male, vertical entry, with latches, PN:G125-MVX5005L1X +connector harwin gecko +0 +50 +50 +Connector_Harwin +Harwin_LTek-Male_2x02_P2.00mm_Vertical +Harwin LTek Connector, 4 pins, single row male, vertical entry +connector harwin ltek M80 +0 +4 +4 +Connector_Harwin +Harwin_LTek-Male_2x02_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 4 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +8 +4 +Connector_Harwin +Harwin_LTek-Male_2x03_P2.00mm_Vertical +Harwin LTek Connector, 6 pins, single row male, vertical entry +connector harwin ltek M80 +0 +6 +6 +Connector_Harwin +Harwin_LTek-Male_2x03_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 6 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +10 +6 +Connector_Harwin +Harwin_LTek-Male_2x04_P2.00mm_Vertical +Harwin LTek Connector, 8 pins, single row male, vertical entry +connector harwin ltek M80 +0 +8 +8 +Connector_Harwin +Harwin_LTek-Male_2x04_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 8 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +12 +8 +Connector_Harwin +Harwin_LTek-Male_2x05_P2.00mm_Vertical +Harwin LTek Connector, 10 pins, single row male, vertical entry +connector harwin ltek M80 +0 +10 +10 +Connector_Harwin +Harwin_LTek-Male_2x05_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 10 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +14 +10 +Connector_Harwin +Harwin_LTek-Male_2x06_P2.00mm_Vertical +Harwin LTek Connector, 12 pins, single row male, vertical entry +connector harwin ltek M80 +0 +12 +12 +Connector_Harwin +Harwin_LTek-Male_2x06_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 12 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +16 +12 +Connector_Harwin +Harwin_LTek-Male_2x07_P2.00mm_Vertical +Harwin LTek Connector, 14 pins, single row male, vertical entry +connector harwin ltek M80 +0 +14 +14 +Connector_Harwin +Harwin_LTek-Male_2x07_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 14 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +18 +14 +Connector_Harwin +Harwin_LTek-Male_2x08_P2.00mm_Vertical +Harwin LTek Connector, 16 pins, single row male, vertical entry +connector harwin ltek M80 +0 +16 +16 +Connector_Harwin +Harwin_LTek-Male_2x08_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 16 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +20 +16 +Connector_Harwin +Harwin_LTek-Male_2x09_P2.00mm_Vertical +Harwin LTek Connector, 18 pins, single row male, vertical entry +connector harwin ltek M80 +0 +18 +18 +Connector_Harwin +Harwin_LTek-Male_2x09_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 18 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +22 +18 +Connector_Harwin +Harwin_LTek-Male_2x10_P2.00mm_Vertical +Harwin LTek Connector, 20 pins, single row male, vertical entry +connector harwin ltek M80 +0 +20 +20 +Connector_Harwin +Harwin_LTek-Male_2x10_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 20 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +24 +20 +Connector_Harwin +Harwin_LTek-Male_2x13_P2.00mm_Vertical +Harwin LTek Connector, 26 pins, single row male, vertical entry +connector harwin ltek M80 +0 +26 +26 +Connector_Harwin +Harwin_LTek-Male_2x13_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 26 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +30 +26 +Connector_Harwin +Harwin_LTek-Male_2x17_P2.00mm_Vertical +Harwin LTek Connector, 34 pins, single row male, vertical entry +connector harwin ltek M80 +0 +34 +34 +Connector_Harwin +Harwin_LTek-Male_2x17_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 34 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +38 +34 +Connector_Harwin +Harwin_LTek-Male_2x22_P2.00mm_Vertical +Harwin LTek Connector, 44 pins, single row male, vertical entry +connector harwin ltek M80 +0 +44 +44 +Connector_Harwin +Harwin_LTek-Male_2x22_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 44 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +48 +44 +Connector_Harwin +Harwin_LTek-Male_02_P2.00mm_Vertical +Harwin LTek Connector, 2 pins, single row male, vertical entry +connector harwin ltek M80 +0 +2 +2 +Connector_Harwin +Harwin_LTek-Male_02_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 2 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +6 +2 +Connector_Harwin +Harwin_LTek-Male_03_P2.00mm_Vertical +Harwin LTek Connector, 3 pins, single row male, vertical entry +connector harwin ltek M80 +0 +3 +3 +Connector_Harwin +Harwin_LTek-Male_03_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 3 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +7 +3 +Connector_Harwin +Harwin_LTek-Male_04_P2.00mm_Vertical +Harwin LTek Connector, 4 pins, single row male, vertical entry +connector harwin ltek M80 +0 +4 +4 +Connector_Harwin +Harwin_LTek-Male_04_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 4 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +8 +4 +Connector_Harwin +Harwin_LTek-Male_05_P2.00mm_Vertical +Harwin LTek Connector, 5 pins, single row male, vertical entry +connector harwin ltek M80 +0 +5 +5 +Connector_Harwin +Harwin_LTek-Male_05_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 5 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +9 +5 +Connector_Harwin +Harwin_LTek-Male_06_P2.00mm_Vertical +Harwin LTek Connector, 6 pins, single row male, vertical entry +connector harwin ltek M80 +0 +6 +6 +Connector_Harwin +Harwin_LTek-Male_06_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 6 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +10 +6 +Connector_Harwin +Harwin_LTek-Male_07_P2.00mm_Vertical +Harwin LTek Connector, 7 pins, single row male, vertical entry +connector harwin ltek M80 +0 +7 +7 +Connector_Harwin +Harwin_LTek-Male_07_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 7 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +11 +7 +Connector_Harwin +Harwin_LTek-Male_17_P2.00mm_Vertical +Harwin LTek Connector, 17 pins, single row male, vertical entry +connector harwin ltek M80 +0 +17 +17 +Connector_Harwin +Harwin_LTek-Male_17_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 17 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +21 +17 +Connector_Harwin +Harwin_LTek-Male_22_P2.00mm_Vertical +Harwin LTek Connector, 22 pins, single row male, vertical entry +connector harwin ltek M80 +0 +22 +22 +Connector_Harwin +Harwin_LTek-Male_22_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 22 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +26 +22 +Connector_Harwin +Harwin_M20-89003xx_1x03_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89003xx, 3 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +4 +3 +Connector_Harwin +Harwin_M20-89004xx_1x04_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89004xx, 4 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +5 +4 +Connector_Harwin +Harwin_M20-89005xx_1x05_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89005xx, 5 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +6 +5 +Connector_Harwin +Harwin_M20-89006xx_1x06_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89006xx, 6 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +7 +6 +Connector_Harwin +Harwin_M20-89007xx_1x07_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89007xx, 7 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +8 +7 +Connector_Harwin +Harwin_M20-89008xx_1x08_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89008xx, 8 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +9 +8 +Connector_Harwin +Harwin_M20-89009xx_1x09_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89009xx, 9 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +10 +9 +Connector_Harwin +Harwin_M20-89010xx_1x10_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89010xx, 10 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +11 +10 +Connector_Harwin +Harwin_M20-89011xx_1x11_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89011xx, 11 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +12 +11 +Connector_Harwin +Harwin_M20-89012xx_1x12_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89012xx, 12 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +13 +12 +Connector_Harwin +Harwin_M20-89013xx_1x13_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89013xx, 13 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +14 +13 +Connector_Harwin +Harwin_M20-89014xx_1x14_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89014xx, 14 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +15 +14 +Connector_Harwin +Harwin_M20-89015xx_1x15_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89015xx, 15 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +16 +15 +Connector_Harwin +Harwin_M20-89016xx_1x16_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89016xx, 16 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +17 +16 +Connector_Harwin +Harwin_M20-89017xx_1x17_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89017xx, 17 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +18 +17 +Connector_Harwin +Harwin_M20-89018xx_1x18_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89018xx, 18 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +19 +18 +Connector_Harwin +Harwin_M20-89019xx_1x19_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89019xx, 19 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +20 +19 +Connector_Harwin +Harwin_M20-89020xx_1x20_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89020xx, 20 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +21 +20 +Connector_Harwin +Harwin_M20-7810245_2x02_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810245, 2 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +4 +4 +Connector_Harwin +Harwin_M20-7810345_2x03_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810345, 3 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +6 +6 +Connector_Harwin +Harwin_M20-7810445_2x04_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810445, 4 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +8 +8 +Connector_Harwin +Harwin_M20-7810545_2x05_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810545, 5 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +10 +10 +Connector_Harwin +Harwin_M20-7810645_2x06_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810645, 6 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +12 +12 +Connector_Harwin +Harwin_M20-7810745_2x07_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810745, 7 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +14 +14 +Connector_Harwin +Harwin_M20-7810845_2x08_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810845, 8 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +16 +16 +Connector_Harwin +Harwin_M20-7810945_2x09_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810945, 9 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +18 +18 +Connector_Harwin +Harwin_M20-7811045_2x10_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7811045, 10 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +20 +20 +Connector_Harwin +Harwin_M20-7811245_2x12_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7811245, 12 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +24 +24 +Connector_Harwin +Harwin_M20-7811545_2x15_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7811545, 15 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +30 +30 +Connector_Harwin +Harwin_M20-7812045_2x20_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7812045, 20 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +40 +40 +Connector_HDMI +HDMI_A_Contact_Technology_HDMI-19APL2_Horizontal +HDMI Contact Technology Type A http://www.contactswitch.com/en/download.aspx?id=1449 +HDMI Contact Technology Type A +0 +23 +20 +Connector_HDMI +HDMI_Micro-D_Molex_46765-0x01 +HDMI, Micro, Type D, SMD, 0.4mm pitch, 19 ckt, right angle (http://www.molex.com/pdm_docs/sd/467651301_sd.pdf) +hdmi micro type d right angle smd +0 +23 +20 +Connector_HDMI +HDMI_Micro-D_Molex_46765-1x01 +HDMI, Micro, Type D, THT, 0.4mm pitch, 19 ckt, right angle (http://www.molex.com/pdm_docs/sd/467651301_sd.pdf) +hdmi micro type d right angle tht +0 +23 +20 +Connector_HDMI +HDMI_Micro-D_Molex_46765-2x0x +HDMI, Micro, Type D, THT/SMD hybrid, 0.4mm pitch, 19 ckt, right angle (http://www.molex.com/pdm_docs/sd/467651301_sd.pdf) +hdmi micro type d right angle tht smd hybrid +0 +23 +20 +Connector_Hirose +Hirose_BM24_BM24-40DP-2-0.35V_2x20_P0.35mm_PowerPin2_Vertical +Hirose BM24 series connector, BM24-40DP/2-0.35V (https://www.hirose.com/product/en/download_file/key_name/BM24/category/Catalog/doc_file_id/47680/?file_category_id=4&item_id=50&is_series=1) +connector Hirose BM24 40pin header +0 +44 +42 +Connector_Hirose +Hirose_BM24_BM24-40DS-2-0.35V_2x20_P0.35mm_PowerPin2_Vertical +Hirose BM24 series connector, BM24-40DS/2-0.35V (https://www.hirose.com/product/en/download_file/key_name/BM24/category/Catalog/doc_file_id/47680/?file_category_id=4&item_id=50&is_series=1) +connector Hirose 40pin receptacle vertical +0 +42 +42 +Connector_Hirose +Hirose_DF13-02P-1.25DSA_1x02_P1.25mm_Vertical +Molex DF13 through hole, DF13-02P-1.25DSA, 2 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +2 +2 +Connector_Hirose +Hirose_DF13-02P-1.25DS_1x02_P1.25mm_Horizontal +Molex DF13 through hole, DF13-02P-1.25DS, 2 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +2 +2 +Connector_Hirose +Hirose_DF13-03P-1.25DSA_1x03_P1.25mm_Vertical +Molex DF13 through hole, DF13-03P-1.25DSA, 3 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +3 +3 +Connector_Hirose +Hirose_DF13-03P-1.25DS_1x03_P1.25mm_Horizontal +Molex DF13 through hole, DF13-03P-1.25DS, 3 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +3 +3 +Connector_Hirose +Hirose_DF13-04P-1.25DSA_1x04_P1.25mm_Vertical +Molex DF13 through hole, DF13-04P-1.25DSA, 4 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +4 +4 +Connector_Hirose +Hirose_DF13-04P-1.25DS_1x04_P1.25mm_Horizontal +Molex DF13 through hole, DF13-04P-1.25DS, 4 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +4 +4 +Connector_Hirose +Hirose_DF13-05P-1.25DSA_1x05_P1.25mm_Vertical +Molex DF13 through hole, DF13-05P-1.25DSA, 5 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +5 +5 +Connector_Hirose +Hirose_DF13-05P-1.25DS_1x05_P1.25mm_Horizontal +Molex DF13 through hole, DF13-05P-1.25DS, 5 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +5 +5 +Connector_Hirose +Hirose_DF13-06P-1.25DSA_1x06_P1.25mm_Vertical +Molex DF13 through hole, DF13-06P-1.25DSA, 6 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +6 +6 +Connector_Hirose +Hirose_DF13-06P-1.25DS_1x06_P1.25mm_Horizontal +Molex DF13 through hole, DF13-06P-1.25DS, 6 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +6 +6 +Connector_Hirose +Hirose_DF13-07P-1.25DSA_1x07_P1.25mm_Vertical +Molex DF13 through hole, DF13-07P-1.25DSA, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +7 +7 +Connector_Hirose +Hirose_DF13-07P-1.25DS_1x07_P1.25mm_Horizontal +Molex DF13 through hole, DF13-07P-1.25DS, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +7 +7 +Connector_Hirose +Hirose_DF13-08P-1.25DSA_1x08_P1.25mm_Vertical +Molex DF13 through hole, DF13-08P-1.25DSA, 8 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +8 +8 +Connector_Hirose +Hirose_DF13-08P-1.25DS_1x08_P1.25mm_Horizontal +Molex DF13 through hole, DF13-08P-1.25DS, 8 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +8 +8 +Connector_Hirose +Hirose_DF13-09P-1.25DSA_1x09_P1.25mm_Vertical +Molex DF13 through hole, DF13-09P-1.25DSA, 9 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +9 +9 +Connector_Hirose +Hirose_DF13-09P-1.25DS_1x09_P1.25mm_Horizontal +Molex DF13 through hole, DF13-09P-1.25DS, 9 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +9 +9 +Connector_Hirose +Hirose_DF13-10P-1.25DSA_1x10_P1.25mm_Vertical +Molex DF13 through hole, DF13-10P-1.25DSA, 10 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +10 +10 +Connector_Hirose +Hirose_DF13-10P-1.25DS_1x10_P1.25mm_Horizontal +Molex DF13 through hole, DF13-10P-1.25DS, 10 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +10 +10 +Connector_Hirose +Hirose_DF13-11P-1.25DSA_1x11_P1.25mm_Vertical +Molex DF13 through hole, DF13-11P-1.25DSA, 11 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +11 +11 +Connector_Hirose +Hirose_DF13-11P-1.25DS_1x11_P1.25mm_Horizontal +Molex DF13 through hole, DF13-11P-1.25DS, 11 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +11 +11 +Connector_Hirose +Hirose_DF13-12P-1.25DSA_1x12_P1.25mm_Vertical +Molex DF13 through hole, DF13-12P-1.25DSA, 12 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +12 +12 +Connector_Hirose +Hirose_DF13-12P-1.25DS_1x12_P1.25mm_Horizontal +Molex DF13 through hole, DF13-12P-1.25DS, 12 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +12 +12 +Connector_Hirose +Hirose_DF13-13P-1.25DSA_1x13_P1.25mm_Vertical +Molex DF13 through hole, DF13-13P-1.25DSA, 13 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +13 +13 +Connector_Hirose +Hirose_DF13-14P-1.25DSA_1x14_P1.25mm_Vertical +Molex DF13 through hole, DF13-14P-1.25DSA, 14 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +14 +14 +Connector_Hirose +Hirose_DF13-14P-1.25DS_1x14_P1.25mm_Horizontal +Molex DF13 through hole, DF13-14P-1.25DS, 14 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +14 +14 +Connector_Hirose +Hirose_DF13-15P-1.25DSA_1x15_P1.25mm_Vertical +Molex DF13 through hole, DF13-15P-1.25DSA, 15 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose side entry +0 +15 +15 +Connector_Hirose +Hirose_DF13-15P-1.25DS_1x15_P1.25mm_Horizontal +Molex DF13 through hole, DF13-15P-1.25DS, 15 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +15 +15 +Connector_Hirose +Hirose_DF13C_CL535-0402-2-51_1x02-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0402-2-51, 2 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +4 +3 +Connector_Hirose +Hirose_DF13C_CL535-0403-5-51_1x03-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0403-5-51, 3 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +5 +4 +Connector_Hirose +Hirose_DF13C_CL535-0404-8-51_1x04-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0404-8-51, 4 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +6 +5 +Connector_Hirose +Hirose_DF13C_CL535-0405-0-51_1x05-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0405-0-51, 5 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +7 +6 +Connector_Hirose +Hirose_DF13C_CL535-0406-3-51_1x06-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0406-3-51, 6 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +8 +7 +Connector_Hirose +Hirose_DF13C_CL535-0407-6-51_1x07-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0407-6-51, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +9 +8 +Connector_Hirose +Hirose_DF13C_CL535-0408-9-51_1x08-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0408-9-51, 8 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +10 +9 +Connector_Hirose +Hirose_DF13C_CL535-0409-1-51_1x09-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0409-1-51, 9 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +11 +10 +Connector_Hirose +Hirose_DF13C_CL535-0410-4-51_1x10-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0410-4-51, 10 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +12 +11 +Connector_Hirose +Hirose_DF13C_CL535-0411-3-51_1x11-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0411-3-51, 11 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +13 +12 +Connector_Hirose +Hirose_DF13C_CL535-0412-6-51_1x12-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0412-6-51, 12 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +14 +13 +Connector_Hirose +Hirose_DF13C_CL535-0414-1-51_1x14-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0414-1-51, 14 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +16 +15 +Connector_Hirose +Hirose_DF13C_CL535-0415-4-51_1x15-1MP_P1.25mm_Vertical +Molex DF13C SMD, CL535-0415-4-51, 15 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C side entry +0 +17 +16 +Connector_Hirose +Hirose_DF52-2S-0.8H_1x02-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-2S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +4 +3 +Connector_Hirose +Hirose_DF52-3S-0.8H_1x03-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-3S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +5 +4 +Connector_Hirose +Hirose_DF52-4S-0.8H_1x04-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-4S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +6 +5 +Connector_Hirose +Hirose_DF52-5S-0.8H_1x05-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-5S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +7 +6 +Connector_Hirose +Hirose_DF52-6S-0.8H_1x06-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-6S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +8 +7 +Connector_Hirose +Hirose_DF52-7S-0.8H_1x07-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-7S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +9 +8 +Connector_Hirose +Hirose_DF52-8S-0.8H_1x08-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-8S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +10 +9 +Connector_Hirose +Hirose_DF52-9S-0.8H_1x09-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-9S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +11 +10 +Connector_Hirose +Hirose_DF52-10S-0.8H_1x10-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-10S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +12 +11 +Connector_Hirose +Hirose_DF52-11S-0.8H_1x11-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-11S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +13 +12 +Connector_Hirose +Hirose_DF52-12S-0.8H_1x12-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-12S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +14 +13 +Connector_Hirose +Hirose_DF52-14S-0.8H_1x14-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-14S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +16 +15 +Connector_Hirose +Hirose_DF52-15S-0.8H_1x15-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-15S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +17 +16 +Connector_Hirose +Hirose_DF63-1P-3.96DSA_1x01_P3.96mm_Horizontal +Molex DF63 through hole, DF63-1P-3.96DSA, 1 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose top entry +0 +1 +1 +Connector_Hirose +Hirose_DF63-2P-3.96DSA_1x02_P3.96mm_Horizontal +Molex DF63 through hole, DF63-2P-3.96DSA, 2 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose top entry +0 +2 +2 +Connector_Hirose +Hirose_DF63-3P-3.96DSA_1x03_P3.96mm_Horizontal +Molex DF63 through hole, DF63-3P-3.96DSA, 3 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose top entry +0 +3 +3 +Connector_Hirose +Hirose_DF63-4P-3.96DSA_1x04_P3.96mm_Horizontal +Molex DF63 through hole, DF63-4P-3.96DSA, 4 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose top entry +0 +4 +4 +Connector_Hirose +Hirose_DF63-5P-3.96DSA_1x05_P3.96mm_Horizontal +Molex DF63 through hole, DF63-5P-3.96DSA, 5 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose top entry +0 +5 +5 +Connector_Hirose +Hirose_DF63-6P-3.96DSA_1x06_P3.96mm_Horizontal +Molex DF63 through hole, DF63-6P-3.96DSA, 6 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose top entry +0 +6 +6 +Connector_IDC +IDC-Header_2x03_P2.54mm_Horizontal +Through hole angled IDC box header, 2x03, 2.54mm pitch, double rows +Through hole IDC box header THT 2x03 2.54mm double row +0 +6 +6 +Connector_IDC +IDC-Header_2x03_P2.54mm_Vertical +Through hole straight IDC box header, 2x03, 2.54mm pitch, double rows +Through hole IDC box header THT 2x03 2.54mm double row +0 +6 +6 +Connector_IDC +IDC-Header_2x04_P2.54mm_Horizontal +Through hole angled IDC box header, 2x04, 2.54mm pitch, double rows +Through hole IDC box header THT 2x04 2.54mm double row +0 +8 +8 +Connector_IDC +IDC-Header_2x04_P2.54mm_Vertical +Through hole straight IDC box header, 2x04, 2.54mm pitch, double rows +Through hole IDC box header THT 2x04 2.54mm double row +0 +8 +8 +Connector_IDC +IDC-Header_2x05_P2.54mm_Horizontal +Through hole angled IDC box header, 2x05, 2.54mm pitch, double rows +Through hole IDC box header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +12 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Vertical +Through hole straight IDC box header, 2x05, 2.54mm pitch, double rows +Through hole IDC box header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +12 +10 +Connector_IDC +IDC-Header_2x06_P2.54mm_Horizontal +Through hole angled IDC box header, 2x06, 2.54mm pitch, double rows +Through hole IDC box header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Vertical +Through hole straight IDC box header, 2x06, 2.54mm pitch, double rows +Through hole IDC box header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x07_P2.54mm_Horizontal +Through hole angled IDC box header, 2x07, 2.54mm pitch, double rows +Through hole IDC box header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +16 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Vertical +Through hole straight IDC box header, 2x07, 2.54mm pitch, double rows +Through hole IDC box header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +16 +14 +Connector_IDC +IDC-Header_2x08_P2.54mm_Horizontal +Through hole angled IDC box header, 2x08, 2.54mm pitch, double rows +Through hole IDC box header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +18 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Vertical +Through hole straight IDC box header, 2x08, 2.54mm pitch, double rows +Through hole IDC box header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +18 +16 +Connector_IDC +IDC-Header_2x10_P2.54mm_Horizontal +Through hole angled IDC box header, 2x10, 2.54mm pitch, double rows +Through hole IDC box header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +22 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Vertical +Through hole straight IDC box header, 2x10, 2.54mm pitch, double rows +Through hole IDC box header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +22 +20 +Connector_IDC +IDC-Header_2x13_P2.54mm_Horizontal +Through hole angled IDC box header, 2x13, 2.54mm pitch, double rows +Through hole IDC box header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +28 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Vertical +Through hole straight IDC box header, 2x13, 2.54mm pitch, double rows +Through hole IDC box header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +28 +26 +Connector_IDC +IDC-Header_2x15_P2.54mm_Horizontal +Through hole angled IDC box header, 2x15, 2.54mm pitch, double rows +Through hole IDC box header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Vertical +Through hole straight IDC box header, 2x15, 2.54mm pitch, double rows +Through hole IDC box header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x17_P2.54mm_Horizontal +Through hole angled IDC box header, 2x17, 2.54mm pitch, double rows +Through hole IDC box header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +36 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Vertical +Through hole straight IDC box header, 2x17, 2.54mm pitch, double rows +Through hole IDC box header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +36 +34 +Connector_IDC +IDC-Header_2x20_P2.54mm_Horizontal +Through hole angled IDC box header, 2x20, 2.54mm pitch, double rows +Through hole IDC box header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +42 +41 +Connector_IDC +IDC-Header_2x20_P2.54mm_Vertical +Through hole straight IDC box header, 2x20, 2.54mm pitch, double rows +Through hole IDC box header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +42 +40 +Connector_IDC +IDC-Header_2x25_P2.54mm_Horizontal +Through hole angled IDC box header, 2x25, 2.54mm pitch, double rows +Through hole IDC box header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Vertical +Through hole straight IDC box header, 2x25, 2.54mm pitch, double rows +Through hole IDC box header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +52 +50 +Connector_IDC +IDC-Header_2x30_P2.54mm_Horizontal +Through hole angled IDC box header, 2x30, 2.54mm pitch, double rows +Through hole IDC box header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Vertical +Through hole straight IDC box header, 2x30, 2.54mm pitch, double rows +Through hole IDC box header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +62 +60 +Connector_IDC +IDC-Header_2x32_P2.54mm_Horizontal +Through hole angled IDC box header, 2x32, 2.54mm pitch, double rows +Through hole IDC box header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Vertical +Through hole straight IDC box header, 2x32, 2.54mm pitch, double rows +Through hole IDC box header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Vertical_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +66 +64 +Connector_JAE +JAE_LY20-4P-DLT1_2x02_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-4P-DLT1, 2 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +4 +4 +Connector_JAE +JAE_LY20-4P-DT1_2x02_P2.00mm_Vertical +Molex LY 20 series connector, LY20-4P-DT1, 2 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +4 +4 +Connector_JAE +JAE_LY20-6P-DLT1_2x03_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-6P-DLT1, 3 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +6 +6 +Connector_JAE +JAE_LY20-6P-DT1_2x03_P2.00mm_Vertical +Molex LY 20 series connector, LY20-6P-DT1, 3 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +6 +6 +Connector_JAE +JAE_LY20-8P-DLT1_2x04_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-8P-DLT1, 4 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +8 +8 +Connector_JAE +JAE_LY20-8P-DT1_2x04_P2.00mm_Vertical +Molex LY 20 series connector, LY20-8P-DT1, 4 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +8 +8 +Connector_JAE +JAE_LY20-10P-DLT1_2x05_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-10P-DLT1, 5 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +10 +10 +Connector_JAE +JAE_LY20-10P-DT1_2x05_P2.00mm_Vertical +Molex LY 20 series connector, LY20-10P-DT1, 5 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +10 +10 +Connector_JAE +JAE_LY20-12P-DLT1_2x06_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-12P-DLT1, 6 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +12 +12 +Connector_JAE +JAE_LY20-12P-DT1_2x06_P2.00mm_Vertical +Molex LY 20 series connector, LY20-12P-DT1, 6 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +12 +12 +Connector_JAE +JAE_LY20-14P-DLT1_2x07_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-14P-DLT1, 7 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +14 +14 +Connector_JAE +JAE_LY20-14P-DT1_2x07_P2.00mm_Vertical +Molex LY 20 series connector, LY20-14P-DT1, 7 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +14 +14 +Connector_JAE +JAE_LY20-16P-DLT1_2x08_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-16P-DLT1, 8 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +16 +16 +Connector_JAE +JAE_LY20-16P-DT1_2x08_P2.00mm_Vertical +Molex LY 20 series connector, LY20-16P-DT1, 8 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +16 +16 +Connector_JAE +JAE_LY20-18P-DLT1_2x09_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-18P-DLT1, 9 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +18 +18 +Connector_JAE +JAE_LY20-18P-DT1_2x09_P2.00mm_Vertical +Molex LY 20 series connector, LY20-18P-DT1, 9 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +18 +18 +Connector_JAE +JAE_LY20-20P-DLT1_2x10_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-20P-DLT1, 10 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +20 +20 +Connector_JAE +JAE_LY20-20P-DT1_2x10_P2.00mm_Vertical +Molex LY 20 series connector, LY20-20P-DT1, 10 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +20 +20 +Connector_JAE +JAE_LY20-22P-DLT1_2x11_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-22P-DLT1, 11 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +22 +22 +Connector_JAE +JAE_LY20-22P-DT1_2x11_P2.00mm_Vertical +Molex LY 20 series connector, LY20-22P-DT1, 11 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +22 +22 +Connector_JAE +JAE_LY20-24P-DLT1_2x12_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-24P-DLT1, 12 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +24 +24 +Connector_JAE +JAE_LY20-24P-DT1_2x12_P2.00mm_Vertical +Molex LY 20 series connector, LY20-24P-DT1, 12 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +24 +24 +Connector_JAE +JAE_LY20-26P-DLT1_2x13_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-26P-DLT1, 13 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +26 +26 +Connector_JAE +JAE_LY20-26P-DT1_2x13_P2.00mm_Vertical +Molex LY 20 series connector, LY20-26P-DT1, 13 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +26 +26 +Connector_JAE +JAE_LY20-28P-DLT1_2x14_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-28P-DLT1, 14 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +28 +28 +Connector_JAE +JAE_LY20-28P-DT1_2x14_P2.00mm_Vertical +Molex LY 20 series connector, LY20-28P-DT1, 14 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +28 +28 +Connector_JAE +JAE_LY20-30P-DLT1_2x15_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-30P-DLT1, 15 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +30 +30 +Connector_JAE +JAE_LY20-30P-DT1_2x15_P2.00mm_Vertical +Molex LY 20 series connector, LY20-30P-DT1, 15 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +30 +30 +Connector_JAE +JAE_LY20-32P-DLT1_2x16_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-32P-DLT1, 16 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +32 +32 +Connector_JAE +JAE_LY20-32P-DT1_2x16_P2.00mm_Vertical +Molex LY 20 series connector, LY20-32P-DT1, 16 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +32 +32 +Connector_JAE +JAE_LY20-34P-DLT1_2x17_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-34P-DLT1, 17 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +34 +34 +Connector_JAE +JAE_LY20-34P-DT1_2x17_P2.00mm_Vertical +Molex LY 20 series connector, LY20-34P-DT1, 17 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +34 +34 +Connector_JAE +JAE_LY20-36P-DLT1_2x18_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-36P-DLT1, 18 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +36 +36 +Connector_JAE +JAE_LY20-36P-DT1_2x18_P2.00mm_Vertical +Molex LY 20 series connector, LY20-36P-DT1, 18 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +36 +36 +Connector_JAE +JAE_LY20-38P-DLT1_2x19_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-38P-DLT1, 19 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +38 +38 +Connector_JAE +JAE_LY20-38P-DT1_2x19_P2.00mm_Vertical +Molex LY 20 series connector, LY20-38P-DT1, 19 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +38 +38 +Connector_JAE +JAE_LY20-40P-DLT1_2x20_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-40P-DLT1, 20 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +40 +40 +Connector_JAE +JAE_LY20-40P-DT1_2x20_P2.00mm_Vertical +Molex LY 20 series connector, LY20-40P-DT1, 20 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +40 +40 +Connector_JAE +JAE_LY20-42P-DLT1_2x21_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-42P-DLT1, 21 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +42 +42 +Connector_JAE +JAE_LY20-42P-DT1_2x21_P2.00mm_Vertical +Molex LY 20 series connector, LY20-42P-DT1, 21 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +42 +42 +Connector_JAE +JAE_LY20-44P-DLT1_2x22_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-44P-DLT1, 22 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +44 +44 +Connector_JAE +JAE_LY20-44P-DT1_2x22_P2.00mm_Vertical +Molex LY 20 series connector, LY20-44P-DT1, 22 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +44 +44 +Connector_JST +JST_ACH_BM01B-ACHSS-A-GAN-ETF_1x01-1MP_P1.20mm_Vertical +JST ACH series connector, BM01B-ACHSS-A-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +3 +2 +Connector_JST +JST_ACH_BM02B-ACHSS-GAN-ETF_1x02-1MP_P1.20mm_Vertical +JST ACH series connector, BM02B-ACHSS-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +4 +3 +Connector_JST +JST_ACH_BM03B-ACHSS-GAN-ETF_1x03-1MP_P1.20mm_Vertical +JST ACH series connector, BM03B-ACHSS-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +5 +4 +Connector_JST +JST_ACH_BM04B-ACHSS-A-GAN-ETF_1x04-1MP_P1.20mm_Vertical +JST ACH series connector, BM04B-ACHSS-A-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +6 +5 +Connector_JST +JST_ACH_BM05B-ACHSS-A-GAN-ETF_1x05-1MP_P1.20mm_Vertical +JST ACH series connector, BM05B-ACHSS-A-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +7 +6 +Connector_JST +JST_AUH_BM03B-AUHKS-GA-TB_1x03-1MP_P1.50mm_Vertical +JST AUH series connector, BM03B-AUHKS-GA-TB (http://www.jst-mfg.com/product/pdf/eng/eAUH.pdf), generated with kicad-footprint-generator +connector JST AUH side entry +0 +5 +4 +Connector_JST +JST_AUH_BM05B-AUHKS-GA-TB_1x05-1MP_P1.50mm_Vertical +JST AUH series connector, BM05B-AUHKS-GA-TB (http://www.jst-mfg.com/product/pdf/eng/eAUH.pdf), generated with kicad-footprint-generator +connector JST AUH side entry +0 +7 +6 +Connector_JST +JST_EH_B2B-EH-A_1x02_P2.50mm_Vertical +JST EH series connector, B2B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +2 +2 +Connector_JST +JST_EH_B3B-EH-A_1x03_P2.50mm_Vertical +JST EH series connector, B3B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +3 +3 +Connector_JST +JST_EH_B4B-EH-A_1x04_P2.50mm_Vertical +JST EH series connector, B4B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +4 +4 +Connector_JST +JST_EH_B5B-EH-A_1x05_P2.50mm_Vertical +JST EH series connector, B5B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +5 +5 +Connector_JST +JST_EH_B6B-EH-A_1x06_P2.50mm_Vertical +JST EH series connector, B6B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +6 +6 +Connector_JST +JST_EH_B7B-EH-A_1x07_P2.50mm_Vertical +JST EH series connector, B7B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +7 +7 +Connector_JST +JST_EH_B8B-EH-A_1x08_P2.50mm_Vertical +JST EH series connector, B8B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +8 +8 +Connector_JST +JST_EH_B9B-EH-A_1x09_P2.50mm_Vertical +JST EH series connector, B9B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +9 +9 +Connector_JST +JST_EH_B10B-EH-A_1x10_P2.50mm_Vertical +JST EH series connector, B10B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +10 +10 +Connector_JST +JST_EH_B11B-EH-A_1x11_P2.50mm_Vertical +JST EH series connector, B11B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +11 +11 +Connector_JST +JST_EH_B12B-EH-A_1x12_P2.50mm_Vertical +JST EH series connector, B12B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +12 +12 +Connector_JST +JST_EH_B13B-EH-A_1x13_P2.50mm_Vertical +JST EH series connector, B13B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +13 +13 +Connector_JST +JST_EH_B14B-EH-A_1x14_P2.50mm_Vertical +JST EH series connector, B14B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +14 +14 +Connector_JST +JST_EH_B15B-EH-A_1x15_P2.50mm_Vertical +JST EH series connector, B15B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +15 +15 +Connector_JST +JST_EH_S2B-EH_1x02_P2.50mm_Horizontal +JST EH series connector, S2B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +2 +2 +Connector_JST +JST_EH_S3B-EH_1x03_P2.50mm_Horizontal +JST EH series connector, S3B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +3 +3 +Connector_JST +JST_EH_S4B-EH_1x04_P2.50mm_Horizontal +JST EH series connector, S4B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +4 +4 +Connector_JST +JST_EH_S5B-EH_1x05_P2.50mm_Horizontal +JST EH series connector, S5B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +5 +5 +Connector_JST +JST_EH_S6B-EH_1x06_P2.50mm_Horizontal +JST EH series connector, S6B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +6 +6 +Connector_JST +JST_EH_S7B-EH_1x07_P2.50mm_Horizontal +JST EH series connector, S7B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +7 +7 +Connector_JST +JST_EH_S8B-EH_1x08_P2.50mm_Horizontal +JST EH series connector, S8B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +8 +8 +Connector_JST +JST_EH_S9B-EH_1x09_P2.50mm_Horizontal +JST EH series connector, S9B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +9 +9 +Connector_JST +JST_EH_S10B-EH_1x10_P2.50mm_Horizontal +JST EH series connector, S10B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +10 +10 +Connector_JST +JST_EH_S11B-EH_1x11_P2.50mm_Horizontal +JST EH series connector, S11B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +11 +11 +Connector_JST +JST_EH_S12B-EH_1x12_P2.50mm_Horizontal +JST EH series connector, S12B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +12 +12 +Connector_JST +JST_EH_S13B-EH_1x13_P2.50mm_Horizontal +JST EH series connector, S13B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +13 +13 +Connector_JST +JST_EH_S14B-EH_1x14_P2.50mm_Horizontal +JST EH series connector, S14B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +14 +14 +Connector_JST +JST_EH_S15B-EH_1x15_P2.50mm_Horizontal +JST EH series connector, S15B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +15 +15 +Connector_JST +JST_GH_BM02B-GHS-TBT_1x02-1MP_P1.25mm_Vertical +JST GH series connector, BM02B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +4 +3 +Connector_JST +JST_GH_BM03B-GHS-TBT_1x03-1MP_P1.25mm_Vertical +JST GH series connector, BM03B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +5 +4 +Connector_JST +JST_GH_BM04B-GHS-TBT_1x04-1MP_P1.25mm_Vertical +JST GH series connector, BM04B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +6 +5 +Connector_JST +JST_GH_BM05B-GHS-TBT_1x05-1MP_P1.25mm_Vertical +JST GH series connector, BM05B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +7 +6 +Connector_JST +JST_GH_BM06B-GHS-TBT_1x06-1MP_P1.25mm_Vertical +JST GH series connector, BM06B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +8 +7 +Connector_JST +JST_GH_BM07B-GHS-TBT_1x07-1MP_P1.25mm_Vertical +JST GH series connector, BM07B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +9 +8 +Connector_JST +JST_GH_BM08B-GHS-TBT_1x08-1MP_P1.25mm_Vertical +JST GH series connector, BM08B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +10 +9 +Connector_JST +JST_GH_BM09B-GHS-TBT_1x09-1MP_P1.25mm_Vertical +JST GH series connector, BM09B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +11 +10 +Connector_JST +JST_GH_BM10B-GHS-TBT_1x10-1MP_P1.25mm_Vertical +JST GH series connector, BM10B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +12 +11 +Connector_JST +JST_GH_BM11B-GHS-TBT_1x11-1MP_P1.25mm_Vertical +JST GH series connector, BM11B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +13 +12 +Connector_JST +JST_GH_BM12B-GHS-TBT_1x12-1MP_P1.25mm_Vertical +JST GH series connector, BM12B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +14 +13 +Connector_JST +JST_GH_BM13B-GHS-TBT_1x13-1MP_P1.25mm_Vertical +JST GH series connector, BM13B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +15 +14 +Connector_JST +JST_GH_BM14B-GHS-TBT_1x14-1MP_P1.25mm_Vertical +JST GH series connector, BM14B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +16 +15 +Connector_JST +JST_GH_BM15B-GHS-TBT_1x15-1MP_P1.25mm_Vertical +JST GH series connector, BM15B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +17 +16 +Connector_JST +JST_GH_SM02B-GHS-TB_1x02-1MP_P1.25mm_Horizontal +JST GH series connector, SM02B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +4 +3 +Connector_JST +JST_GH_SM03B-GHS-TB_1x03-1MP_P1.25mm_Horizontal +JST GH series connector, SM03B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +5 +4 +Connector_JST +JST_GH_SM04B-GHS-TB_1x04-1MP_P1.25mm_Horizontal +JST GH series connector, SM04B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +6 +5 +Connector_JST +JST_GH_SM05B-GHS-TB_1x05-1MP_P1.25mm_Horizontal +JST GH series connector, SM05B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +7 +6 +Connector_JST +JST_GH_SM06B-GHS-TB_1x06-1MP_P1.25mm_Horizontal +JST GH series connector, SM06B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +8 +7 +Connector_JST +JST_GH_SM07B-GHS-TB_1x07-1MP_P1.25mm_Horizontal +JST GH series connector, SM07B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +9 +8 +Connector_JST +JST_GH_SM08B-GHS-TB_1x08-1MP_P1.25mm_Horizontal +JST GH series connector, SM08B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +10 +9 +Connector_JST +JST_GH_SM09B-GHS-TB_1x09-1MP_P1.25mm_Horizontal +JST GH series connector, SM09B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +11 +10 +Connector_JST +JST_GH_SM10B-GHS-TB_1x10-1MP_P1.25mm_Horizontal +JST GH series connector, SM10B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +12 +11 +Connector_JST +JST_GH_SM11B-GHS-TB_1x11-1MP_P1.25mm_Horizontal +JST GH series connector, SM11B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +13 +12 +Connector_JST +JST_GH_SM12B-GHS-TB_1x12-1MP_P1.25mm_Horizontal +JST GH series connector, SM12B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +14 +13 +Connector_JST +JST_GH_SM13B-GHS-TB_1x13-1MP_P1.25mm_Horizontal +JST GH series connector, SM13B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +15 +14 +Connector_JST +JST_GH_SM14B-GHS-TB_1x14-1MP_P1.25mm_Horizontal +JST GH series connector, SM14B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +16 +15 +Connector_JST +JST_GH_SM15B-GHS-TB_1x15-1MP_P1.25mm_Horizontal +JST GH series connector, SM15B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +17 +16 +Connector_JST +JST_J2100_B06B-J21DK-GGXR_2x03_P2.50x4.00mm_Vertical +JST J2100 series connector, B06B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +8 +6 +Connector_JST +JST_J2100_B08B-J21DK-GGXR_2x04_P2.50x4.00mm_Vertical +JST J2100 series connector, B08B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +10 +8 +Connector_JST +JST_J2100_B10B-J21DK-GGXR_2x05_P2.50x4.00mm_Vertical +JST J2100 series connector, B10B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +12 +10 +Connector_JST +JST_J2100_B12B-J21DK-GGXR_2x06_P2.50x4.00mm_Vertical +JST J2100 series connector, B12B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +14 +12 +Connector_JST +JST_J2100_B16B-J21DK-GGXR_2x08_P2.50x4.00mm_Vertical +JST J2100 series connector, B16B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +18 +16 +Connector_JST +JST_J2100_B20B-J21DK-GGXR_2x10_P2.50x4.00mm_Vertical +JST J2100 series connector, B20B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +22 +20 +Connector_JST +JST_J2100_S06B-J21DK-GGXR_2x03_P2.50mm_Horizontal +JST J2100 series connector, S06B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +7 +6 +Connector_JST +JST_J2100_S08B-J21DK-GGXR_2x04_P2.50mm_Horizontal +JST J2100 series connector, S08B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +10 +8 +Connector_JST +JST_J2100_S10B-J21DK-GGXR_2x05_P2.50mm_Horizontal +JST J2100 series connector, S10B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +12 +10 +Connector_JST +JST_J2100_S12B-J21DK-GGXR_2x06_P2.50mm_Horizontal +JST J2100 series connector, S12B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +14 +12 +Connector_JST +JST_J2100_S16B-J21DK-GGXR_2x08_P2.50mm_Horizontal +JST J2100 series connector, S16B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +18 +16 +Connector_JST +JST_J2100_S20B-J21DK-GGXR_2x10_P2.50mm_Horizontal +JST J2100 series connector, S20B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +22 +20 +Connector_JST +JST_JWPF_B02B-JWPF-SK-R_1x02_P2.00mm_Vertical +JST JWPF series connector, B02B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +2 +2 +Connector_JST +JST_JWPF_B03B-JWPF-SK-R_1x03_P2.00mm_Vertical +JST JWPF series connector, B03B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +3 +3 +Connector_JST +JST_JWPF_B04B-JWPF-SK-R_1x04_P2.00mm_Vertical +JST JWPF series connector, B04B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +4 +4 +Connector_JST +JST_JWPF_B06B-JWPF-SK-R_2x03_P2.00mm_Vertical +JST JWPF series connector, B06B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +6 +6 +Connector_JST +JST_JWPF_B08B-JWPF-SK-R_2x04_P2.00mm_Vertical +JST JWPF series connector, B08B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +8 +8 +Connector_JST +JST_LEA_SM02B-LEASS-TF_1x02-1MP_P4.20mm_Horizontal +JST LEA series connector, SM02B-LEASS-TF (http://www.jst-mfg.com/product/pdf/eng/eLEA.pdf), generated with kicad-footprint-generator +connector JST LEA top entry +0 +4 +3 +Connector_JST +JST_NV_B02P-NV_1x02_P5.00mm_Vertical +JST NV series connector, B02P-NV (http://www.jst-mfg.com/product/pdf/eng/eNV.pdf), generated with kicad-footprint-generator +connector JST NV side entry +0 +2 +2 +Connector_JST +JST_NV_B03P-NV_1x03_P5.00mm_Vertical +JST NV series connector, B03P-NV (http://www.jst-mfg.com/product/pdf/eng/eNV.pdf), generated with kicad-footprint-generator +connector JST NV side entry +0 +3 +3 +Connector_JST +JST_NV_B04P-NV_1x04_P5.00mm_Vertical +JST NV series connector, B04P-NV (http://www.jst-mfg.com/product/pdf/eng/eNV.pdf), generated with kicad-footprint-generator +connector JST NV side entry +0 +4 +4 +Connector_JST +JST_PHD_B8B-PHDSS_2x04_P2.00mm_Vertical +JST PHD series connector, B8B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +8 +8 +Connector_JST +JST_PHD_B10B-PHDSS_2x05_P2.00mm_Vertical +JST PHD series connector, B10B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +10 +10 +Connector_JST +JST_PHD_B12B-PHDSS_2x06_P2.00mm_Vertical +JST PHD series connector, B12B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +12 +12 +Connector_JST +JST_PHD_B14B-PHDSS_2x07_P2.00mm_Vertical +JST PHD series connector, B14B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +14 +14 +Connector_JST +JST_PHD_B16B-PHDSS_2x08_P2.00mm_Vertical +JST PHD series connector, B16B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +16 +16 +Connector_JST +JST_PHD_B18B-PHDSS_2x09_P2.00mm_Vertical +JST PHD series connector, B18B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +18 +18 +Connector_JST +JST_PHD_B20B-PHDSS_2x10_P2.00mm_Vertical +JST PHD series connector, B20B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +20 +20 +Connector_JST +JST_PHD_B22B-PHDSS_2x11_P2.00mm_Vertical +JST PHD series connector, B22B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +22 +22 +Connector_JST +JST_PHD_B24B-PHDSS_2x12_P2.00mm_Vertical +JST PHD series connector, B24B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +24 +24 +Connector_JST +JST_PHD_B26B-PHDSS_2x13_P2.00mm_Vertical +JST PHD series connector, B26B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +26 +26 +Connector_JST +JST_PHD_B28B-PHDSS_2x14_P2.00mm_Vertical +JST PHD series connector, B28B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +28 +28 +Connector_JST +JST_PHD_B30B-PHDSS_2x15_P2.00mm_Vertical +JST PHD series connector, B30B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +30 +30 +Connector_JST +JST_PHD_B32B-PHDSS_2x16_P2.00mm_Vertical +JST PHD series connector, B32B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +32 +32 +Connector_JST +JST_PHD_B34B-PHDSS_2x17_P2.00mm_Vertical +JST PHD series connector, B34B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +34 +34 +Connector_JST +JST_PHD_S8B-PHDSS_2x04_P2.00mm_Horizontal +JST PHD series connector, S8B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +8 +8 +Connector_JST +JST_PHD_S10B-PHDSS_2x05_P2.00mm_Horizontal +JST PHD series connector, S10B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +10 +10 +Connector_JST +JST_PHD_S12B-PHDSS_2x06_P2.00mm_Horizontal +JST PHD series connector, S12B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +12 +12 +Connector_JST +JST_PHD_S14B-PHDSS_2x07_P2.00mm_Horizontal +JST PHD series connector, S14B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +14 +14 +Connector_JST +JST_PHD_S16B-PHDSS_2x08_P2.00mm_Horizontal +JST PHD series connector, S16B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +16 +16 +Connector_JST +JST_PHD_S18B-PHDSS_2x09_P2.00mm_Horizontal +JST PHD series connector, S18B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +18 +18 +Connector_JST +JST_PHD_S20B-PHDSS_2x10_P2.00mm_Horizontal +JST PHD series connector, S20B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +20 +20 +Connector_JST +JST_PHD_S22B-PHDSS_2x11_P2.00mm_Horizontal +JST PHD series connector, S22B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +22 +22 +Connector_JST +JST_PHD_S24B-PHDSS_2x12_P2.00mm_Horizontal +JST PHD series connector, S24B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +24 +24 +Connector_JST +JST_PHD_S26B-PHDSS_2x13_P2.00mm_Horizontal +JST PHD series connector, S26B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +26 +26 +Connector_JST +JST_PHD_S28B-PHDSS_2x14_P2.00mm_Horizontal +JST PHD series connector, S28B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +28 +28 +Connector_JST +JST_PHD_S30B-PHDSS_2x15_P2.00mm_Horizontal +JST PHD series connector, S30B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +30 +30 +Connector_JST +JST_PHD_S32B-PHDSS_2x16_P2.00mm_Horizontal +JST PHD series connector, S32B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +32 +32 +Connector_JST +JST_PHD_S34B-PHDSS_2x17_P2.00mm_Horizontal +JST PHD series connector, S34B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +34 +34 +Connector_JST +JST_PH_B2B-PH-K_1x02_P2.00mm_Vertical +JST PH series connector, B2B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +2 +2 +Connector_JST +JST_PH_B2B-PH-SM4-TB_1x02-1MP_P2.00mm_Vertical +JST PH series connector, B2B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +4 +3 +Connector_JST +JST_PH_B3B-PH-K_1x03_P2.00mm_Vertical +JST PH series connector, B3B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +3 +3 +Connector_JST +JST_PH_B3B-PH-SM4-TB_1x03-1MP_P2.00mm_Vertical +JST PH series connector, B3B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +5 +4 +Connector_JST +JST_PH_B4B-PH-K_1x04_P2.00mm_Vertical +JST PH series connector, B4B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +4 +4 +Connector_JST +JST_PH_B4B-PH-SM4-TB_1x04-1MP_P2.00mm_Vertical +JST PH series connector, B4B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +6 +5 +Connector_JST +JST_PH_B5B-PH-K_1x05_P2.00mm_Vertical +JST PH series connector, B5B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +5 +5 +Connector_JST +JST_PH_B5B-PH-SM4-TB_1x05-1MP_P2.00mm_Vertical +JST PH series connector, B5B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +7 +6 +Connector_JST +JST_PH_B6B-PH-K_1x06_P2.00mm_Vertical +JST PH series connector, B6B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +6 +6 +Connector_JST +JST_PH_B6B-PH-SM4-TB_1x06-1MP_P2.00mm_Vertical +JST PH series connector, B6B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +8 +7 +Connector_JST +JST_PH_B7B-PH-K_1x07_P2.00mm_Vertical +JST PH series connector, B7B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +7 +7 +Connector_JST +JST_PH_B7B-PH-SM4-TB_1x07-1MP_P2.00mm_Vertical +JST PH series connector, B7B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +9 +8 +Connector_JST +JST_PH_B8B-PH-K_1x08_P2.00mm_Vertical +JST PH series connector, B8B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +8 +8 +Connector_JST +JST_PH_B8B-PH-SM4-TB_1x08-1MP_P2.00mm_Vertical +JST PH series connector, B8B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +10 +9 +Connector_JST +JST_PH_B9B-PH-K_1x09_P2.00mm_Vertical +JST PH series connector, B9B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +9 +9 +Connector_JST +JST_PH_B9B-PH-SM4-TB_1x09-1MP_P2.00mm_Vertical +JST PH series connector, B9B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +11 +10 +Connector_JST +JST_PH_B10B-PH-K_1x10_P2.00mm_Vertical +JST PH series connector, B10B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +10 +10 +Connector_JST +JST_PH_B10B-PH-SM4-TB_1x10-1MP_P2.00mm_Vertical +JST PH series connector, B10B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +12 +11 +Connector_JST +JST_PH_B11B-PH-K_1x11_P2.00mm_Vertical +JST PH series connector, B11B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +11 +11 +Connector_JST +JST_PH_B11B-PH-SM4-TB_1x11-1MP_P2.00mm_Vertical +JST PH series connector, B11B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +13 +12 +Connector_JST +JST_PH_B12B-PH-K_1x12_P2.00mm_Vertical +JST PH series connector, B12B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +12 +12 +Connector_JST +JST_PH_B12B-PH-SM4-TB_1x12-1MP_P2.00mm_Vertical +JST PH series connector, B12B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +14 +13 +Connector_JST +JST_PH_B13B-PH-K_1x13_P2.00mm_Vertical +JST PH series connector, B13B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +13 +13 +Connector_JST +JST_PH_B13B-PH-SM4-TB_1x13-1MP_P2.00mm_Vertical +JST PH series connector, B13B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +15 +14 +Connector_JST +JST_PH_B14B-PH-K_1x14_P2.00mm_Vertical +JST PH series connector, B14B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +14 +14 +Connector_JST +JST_PH_B14B-PH-SM4-TB_1x14-1MP_P2.00mm_Vertical +JST PH series connector, B14B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +16 +15 +Connector_JST +JST_PH_B15B-PH-K_1x15_P2.00mm_Vertical +JST PH series connector, B15B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +15 +15 +Connector_JST +JST_PH_B15B-PH-SM4-TB_1x15-1MP_P2.00mm_Vertical +JST PH series connector, B15B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +17 +16 +Connector_JST +JST_PH_B16B-PH-K_1x16_P2.00mm_Vertical +JST PH series connector, B16B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +16 +16 +Connector_JST +JST_PH_B16B-PH-SM4-TB_1x16-1MP_P2.00mm_Vertical +JST PH series connector, B16B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +18 +17 +Connector_JST +JST_PH_S2B-PH-K_1x02_P2.00mm_Horizontal +JST PH series connector, S2B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +2 +2 +Connector_JST +JST_PH_S2B-PH-SM4-TB_1x02-1MP_P2.00mm_Horizontal +JST PH series connector, S2B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +4 +3 +Connector_JST +JST_PH_S3B-PH-K_1x03_P2.00mm_Horizontal +JST PH series connector, S3B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +3 +3 +Connector_JST +JST_PH_S3B-PH-SM4-TB_1x03-1MP_P2.00mm_Horizontal +JST PH series connector, S3B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +5 +4 +Connector_JST +JST_PH_S4B-PH-K_1x04_P2.00mm_Horizontal +JST PH series connector, S4B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +4 +4 +Connector_JST +JST_PH_S4B-PH-SM4-TB_1x04-1MP_P2.00mm_Horizontal +JST PH series connector, S4B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +6 +5 +Connector_JST +JST_PH_S5B-PH-K_1x05_P2.00mm_Horizontal +JST PH series connector, S5B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +5 +5 +Connector_JST +JST_PH_S5B-PH-SM4-TB_1x05-1MP_P2.00mm_Horizontal +JST PH series connector, S5B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +7 +6 +Connector_JST +JST_PH_S6B-PH-K_1x06_P2.00mm_Horizontal +JST PH series connector, S6B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +6 +6 +Connector_JST +JST_PH_S6B-PH-SM4-TB_1x06-1MP_P2.00mm_Horizontal +JST PH series connector, S6B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +8 +7 +Connector_JST +JST_PH_S7B-PH-K_1x07_P2.00mm_Horizontal +JST PH series connector, S7B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +7 +7 +Connector_JST +JST_PH_S7B-PH-SM4-TB_1x07-1MP_P2.00mm_Horizontal +JST PH series connector, S7B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +9 +8 +Connector_JST +JST_PH_S8B-PH-K_1x08_P2.00mm_Horizontal +JST PH series connector, S8B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +8 +8 +Connector_JST +JST_PH_S8B-PH-SM4-TB_1x08-1MP_P2.00mm_Horizontal +JST PH series connector, S8B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +10 +9 +Connector_JST +JST_PH_S9B-PH-K_1x09_P2.00mm_Horizontal +JST PH series connector, S9B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +9 +9 +Connector_JST +JST_PH_S9B-PH-SM4-TB_1x09-1MP_P2.00mm_Horizontal +JST PH series connector, S9B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +11 +10 +Connector_JST +JST_PH_S10B-PH-K_1x10_P2.00mm_Horizontal +JST PH series connector, S10B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +10 +10 +Connector_JST +JST_PH_S10B-PH-SM4-TB_1x10-1MP_P2.00mm_Horizontal +JST PH series connector, S10B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +12 +11 +Connector_JST +JST_PH_S11B-PH-K_1x11_P2.00mm_Horizontal +JST PH series connector, S11B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +11 +11 +Connector_JST +JST_PH_S11B-PH-SM4-TB_1x11-1MP_P2.00mm_Horizontal +JST PH series connector, S11B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +13 +12 +Connector_JST +JST_PH_S12B-PH-K_1x12_P2.00mm_Horizontal +JST PH series connector, S12B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +12 +12 +Connector_JST +JST_PH_S12B-PH-SM4-TB_1x12-1MP_P2.00mm_Horizontal +JST PH series connector, S12B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +14 +13 +Connector_JST +JST_PH_S13B-PH-K_1x13_P2.00mm_Horizontal +JST PH series connector, S13B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +13 +13 +Connector_JST +JST_PH_S13B-PH-SM4-TB_1x13-1MP_P2.00mm_Horizontal +JST PH series connector, S13B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +15 +14 +Connector_JST +JST_PH_S14B-PH-K_1x14_P2.00mm_Horizontal +JST PH series connector, S14B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +14 +14 +Connector_JST +JST_PH_S14B-PH-SM4-TB_1x14-1MP_P2.00mm_Horizontal +JST PH series connector, S14B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +16 +15 +Connector_JST +JST_PH_S15B-PH-K_1x15_P2.00mm_Horizontal +JST PH series connector, S15B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +15 +15 +Connector_JST +JST_PH_S15B-PH-SM4-TB_1x15-1MP_P2.00mm_Horizontal +JST PH series connector, S15B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +17 +16 +Connector_JST +JST_PH_S16B-PH-K_1x16_P2.00mm_Horizontal +JST PH series connector, S16B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +16 +16 +Connector_JST +JST_PUD_B08B-PUDSS_2x04_P2.00mm_Vertical +JST PUD series connector, B08B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +8 +8 +Connector_JST +JST_PUD_B10B-PUDSS_2x05_P2.00mm_Vertical +JST PUD series connector, B10B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +10 +10 +Connector_JST +JST_PUD_B12B-PUDSS_2x06_P2.00mm_Vertical +JST PUD series connector, B12B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +12 +12 +Connector_JST +JST_PUD_B14B-PUDSS_2x07_P2.00mm_Vertical +JST PUD series connector, B14B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +14 +14 +Connector_JST +JST_PUD_B16B-PUDSS_2x08_P2.00mm_Vertical +JST PUD series connector, B16B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +16 +16 +Connector_JST +JST_PUD_B18B-PUDSS_2x09_P2.00mm_Vertical +JST PUD series connector, B18B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +18 +18 +Connector_JST +JST_PUD_B20B-PUDSS_2x10_P2.00mm_Vertical +JST PUD series connector, B20B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +20 +20 +Connector_JST +JST_PUD_B22B-PUDSS_2x11_P2.00mm_Vertical +JST PUD series connector, B22B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +22 +22 +Connector_JST +JST_PUD_B24B-PUDSS_2x12_P2.00mm_Vertical +JST PUD series connector, B24B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +24 +24 +Connector_JST +JST_PUD_B26B-PUDSS_2x13_P2.00mm_Vertical +JST PUD series connector, B26B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +26 +26 +Connector_JST +JST_PUD_B28B-PUDSS_2x14_P2.00mm_Vertical +JST PUD series connector, B28B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +28 +28 +Connector_JST +JST_PUD_B30B-PUDSS_2x15_P2.00mm_Vertical +JST PUD series connector, B30B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +30 +30 +Connector_JST +JST_PUD_B32B-PUDSS_2x16_P2.00mm_Vertical +JST PUD series connector, B32B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +32 +32 +Connector_JST +JST_PUD_B34B-PUDSS_2x17_P2.00mm_Vertical +JST PUD series connector, B34B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +34 +34 +Connector_JST +JST_PUD_B36B-PUDSS_2x18_P2.00mm_Vertical +JST PUD series connector, B36B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +36 +36 +Connector_JST +JST_PUD_B38B-PUDSS_2x19_P2.00mm_Vertical +JST PUD series connector, B38B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +38 +38 +Connector_JST +JST_PUD_B40B-PUDSS_2x20_P2.00mm_Vertical +JST PUD series connector, B40B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +40 +40 +Connector_JST +JST_PUD_S08B-PUDSS-1_2x04_P2.00mm_Horizontal +JST PUD series connector, S08B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +8 +8 +Connector_JST +JST_PUD_S10B-PUDSS-1_2x05_P2.00mm_Horizontal +JST PUD series connector, S10B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +10 +10 +Connector_JST +JST_PUD_S12B-PUDSS-1_2x06_P2.00mm_Horizontal +JST PUD series connector, S12B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +12 +12 +Connector_JST +JST_PUD_S14B-PUDSS-1_2x07_P2.00mm_Horizontal +JST PUD series connector, S14B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +14 +14 +Connector_JST +JST_PUD_S16B-PUDSS-1_2x08_P2.00mm_Horizontal +JST PUD series connector, S16B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +16 +16 +Connector_JST +JST_PUD_S18B-PUDSS-1_2x09_P2.00mm_Horizontal +JST PUD series connector, S18B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +18 +18 +Connector_JST +JST_PUD_S20B-PUDSS-1_2x10_P2.00mm_Horizontal +JST PUD series connector, S20B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +20 +20 +Connector_JST +JST_PUD_S22B-PUDSS-1_2x11_P2.00mm_Horizontal +JST PUD series connector, S22B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +22 +22 +Connector_JST +JST_PUD_S24B-PUDSS-1_2x12_P2.00mm_Horizontal +JST PUD series connector, S24B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +24 +24 +Connector_JST +JST_PUD_S26B-PUDSS-1_2x13_P2.00mm_Horizontal +JST PUD series connector, S26B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +26 +26 +Connector_JST +JST_PUD_S28B-PUDSS-1_2x14_P2.00mm_Horizontal +JST PUD series connector, S28B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +28 +28 +Connector_JST +JST_PUD_S30B-PUDSS-1_2x15_P2.00mm_Horizontal +JST PUD series connector, S30B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +30 +30 +Connector_JST +JST_PUD_S32B-PUDSS-1_2x16_P2.00mm_Horizontal +JST PUD series connector, S32B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +32 +32 +Connector_JST +JST_PUD_S34B-PUDSS-1_2x17_P2.00mm_Horizontal +JST PUD series connector, S34B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +34 +34 +Connector_JST +JST_PUD_S36B-PUDSS-1_2x18_P2.00mm_Horizontal +JST PUD series connector, S36B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +36 +36 +Connector_JST +JST_PUD_S38B-PUDSS-1_2x19_P2.00mm_Horizontal +JST PUD series connector, S38B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +38 +38 +Connector_JST +JST_PUD_S40B-PUDSS-1_2x20_P2.00mm_Horizontal +JST PUD series connector, S40B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +40 +40 +Connector_JST +JST_SFH_SM02B-SFHRS-TF_1x02-1MP_P4.20mm_Horizontal +JST SFH series connector, SM02B-SFHRS-TF (http://www.jst-mfg.com/product/pdf/eng/eSFH.pdf), generated with kicad-footprint-generator +connector JST SFH horizontal +0 +4 +3 +Connector_JST +JST_SHL_SM02B-SHLS-TF_1x02-1MP_P1.00mm_Horizontal +JST SHL series connector, SM02B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +4 +3 +Connector_JST +JST_SHL_SM05B-SHLS-TF_1x05-1MP_P1.00mm_Horizontal +JST SHL series connector, SM05B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +7 +6 +Connector_JST +JST_SHL_SM06B-SHLS-TF_1x06-1MP_P1.00mm_Horizontal +JST SHL series connector, SM06B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +8 +7 +Connector_JST +JST_SHL_SM07B-SHLS-TF_1x07-1MP_P1.00mm_Horizontal +JST SHL series connector, SM07B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +9 +8 +Connector_JST +JST_SHL_SM08B-SHLS-TF_1x08-1MP_P1.00mm_Horizontal +JST SHL series connector, SM08B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +10 +9 +Connector_JST +JST_SHL_SM10B-SHLS-TF_1x10-1MP_P1.00mm_Horizontal +JST SHL series connector, SM10B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +12 +11 +Connector_JST +JST_SHL_SM11B-SHLS-TF_1x11-1MP_P1.00mm_Horizontal +JST SHL series connector, SM11B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +13 +12 +Connector_JST +JST_SHL_SM12B-SHLS-TF_1x12-1MP_P1.00mm_Horizontal +JST SHL series connector, SM12B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +14 +13 +Connector_JST +JST_SHL_SM14B-SHLS-TF_1x14-1MP_P1.00mm_Horizontal +JST SHL series connector, SM14B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +16 +15 +Connector_JST +JST_SHL_SM16B-SHLS-TF_1x16-1MP_P1.00mm_Horizontal +JST SHL series connector, SM16B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +18 +17 +Connector_JST +JST_SHL_SM20B-SHLS-TF_1x20-1MP_P1.00mm_Horizontal +JST SHL series connector, SM20B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +22 +21 +Connector_JST +JST_SHL_SM22B-SHLS-TF_1x22-1MP_P1.00mm_Horizontal +JST SHL series connector, SM22B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +24 +23 +Connector_JST +JST_SHL_SM26B-SHLS-TF_1x26-1MP_P1.00mm_Horizontal +JST SHL series connector, SM26B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +28 +27 +Connector_JST +JST_SHL_SM30B-SHLS-TF_1x30-1MP_P1.00mm_Horizontal +JST SHL series connector, SM30B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +32 +31 +Connector_JST +JST_SH_BM02B-SRSS-TB_1x02-1MP_P1.00mm_Vertical +JST SH series connector, BM02B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +4 +3 +Connector_JST +JST_SH_BM03B-SRSS-TB_1x03-1MP_P1.00mm_Vertical +JST SH series connector, BM03B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +5 +4 +Connector_JST +JST_SH_BM04B-SRSS-TB_1x04-1MP_P1.00mm_Vertical +JST SH series connector, BM04B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +6 +5 +Connector_JST +JST_SH_BM05B-SRSS-TB_1x05-1MP_P1.00mm_Vertical +JST SH series connector, BM05B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +7 +6 +Connector_JST +JST_SH_BM06B-SRSS-TB_1x06-1MP_P1.00mm_Vertical +JST SH series connector, BM06B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +8 +7 +Connector_JST +JST_SH_BM07B-SRSS-TB_1x07-1MP_P1.00mm_Vertical +JST SH series connector, BM07B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +9 +8 +Connector_JST +JST_SH_BM08B-SRSS-TB_1x08-1MP_P1.00mm_Vertical +JST SH series connector, BM08B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +10 +9 +Connector_JST +JST_SH_BM09B-SRSS-TB_1x09-1MP_P1.00mm_Vertical +JST SH series connector, BM09B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +11 +10 +Connector_JST +JST_SH_BM10B-SRSS-TB_1x10-1MP_P1.00mm_Vertical +JST SH series connector, BM10B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +12 +11 +Connector_JST +JST_SH_BM11B-SRSS-TB_1x11-1MP_P1.00mm_Vertical +JST SH series connector, BM11B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +13 +12 +Connector_JST +JST_SH_BM12B-SRSS-TB_1x12-1MP_P1.00mm_Vertical +JST SH series connector, BM12B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +14 +13 +Connector_JST +JST_SH_BM13B-SRSS-TB_1x13-1MP_P1.00mm_Vertical +JST SH series connector, BM13B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +15 +14 +Connector_JST +JST_SH_BM14B-SRSS-TB_1x14-1MP_P1.00mm_Vertical +JST SH series connector, BM14B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +16 +15 +Connector_JST +JST_SH_BM15B-SRSS-TB_1x15-1MP_P1.00mm_Vertical +JST SH series connector, BM15B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +17 +16 +Connector_JST +JST_SH_SM02B-SRSS-TB_1x02-1MP_P1.00mm_Horizontal +JST SH series connector, SM02B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +4 +3 +Connector_JST +JST_SH_SM03B-SRSS-TB_1x03-1MP_P1.00mm_Horizontal +JST SH series connector, SM03B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +5 +4 +Connector_JST +JST_SH_SM04B-SRSS-TB_1x04-1MP_P1.00mm_Horizontal +JST SH series connector, SM04B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +6 +5 +Connector_JST +JST_SH_SM05B-SRSS-TB_1x05-1MP_P1.00mm_Horizontal +JST SH series connector, SM05B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +7 +6 +Connector_JST +JST_SH_SM06B-SRSS-TB_1x06-1MP_P1.00mm_Horizontal +JST SH series connector, SM06B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +8 +7 +Connector_JST +JST_SH_SM07B-SRSS-TB_1x07-1MP_P1.00mm_Horizontal +JST SH series connector, SM07B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +9 +8 +Connector_JST +JST_SH_SM08B-SRSS-TB_1x08-1MP_P1.00mm_Horizontal +JST SH series connector, SM08B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +10 +9 +Connector_JST +JST_SH_SM09B-SRSS-TB_1x09-1MP_P1.00mm_Horizontal +JST SH series connector, SM09B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +11 +10 +Connector_JST +JST_SH_SM10B-SRSS-TB_1x10-1MP_P1.00mm_Horizontal +JST SH series connector, SM10B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +12 +11 +Connector_JST +JST_SH_SM11B-SRSS-TB_1x11-1MP_P1.00mm_Horizontal +JST SH series connector, SM11B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +13 +12 +Connector_JST +JST_SH_SM12B-SRSS-TB_1x12-1MP_P1.00mm_Horizontal +JST SH series connector, SM12B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +14 +13 +Connector_JST +JST_SH_SM13B-SRSS-TB_1x13-1MP_P1.00mm_Horizontal +JST SH series connector, SM13B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +15 +14 +Connector_JST +JST_SH_SM14B-SRSS-TB_1x14-1MP_P1.00mm_Horizontal +JST SH series connector, SM14B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +16 +15 +Connector_JST +JST_SH_SM15B-SRSS-TB_1x15-1MP_P1.00mm_Horizontal +JST SH series connector, SM15B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +17 +16 +Connector_JST +JST_SH_SM20B-SRSS-TB_1x20-1MP_P1.00mm_Horizontal +JST SH series connector, SM20B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +22 +21 +Connector_JST +JST_SUR_BM02B-SURS-TF_1x02-1MP_P0.80mm_Vertical +JST SUR series connector, BM02B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +4 +3 +Connector_JST +JST_SUR_BM03B-SURS-TF_1x03-1MP_P0.80mm_Vertical +JST SUR series connector, BM03B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +5 +4 +Connector_JST +JST_SUR_BM04B-SURS-TF_1x04-1MP_P0.80mm_Vertical +JST SUR series connector, BM04B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +6 +5 +Connector_JST +JST_SUR_BM05B-SURS-TF_1x05-1MP_P0.80mm_Vertical +JST SUR series connector, BM05B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +7 +6 +Connector_JST +JST_SUR_BM06B-SURS-TF_1x06-1MP_P0.80mm_Vertical +JST SUR series connector, BM06B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +8 +7 +Connector_JST +JST_SUR_BM08B-SURS-TF_1x08-1MP_P0.80mm_Vertical +JST SUR series connector, BM08B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +10 +9 +Connector_JST +JST_SUR_BM10B-SURS-TF_1x10-1MP_P0.80mm_Vertical +JST SUR series connector, BM10B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +12 +11 +Connector_JST +JST_SUR_BM12B-SURS-TF_1x12-1MP_P0.80mm_Vertical +JST SUR series connector, BM12B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +14 +13 +Connector_JST +JST_SUR_BM14B-SURS-TF_1x14-1MP_P0.80mm_Vertical +JST SUR series connector, BM14B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +16 +15 +Connector_JST +JST_SUR_BM15B-SURS-TF_1x15-1MP_P0.80mm_Vertical +JST SUR series connector, BM15B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +17 +16 +Connector_JST +JST_SUR_BM16B-SURS-TF_1x16-1MP_P0.80mm_Vertical +JST SUR series connector, BM16B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +18 +17 +Connector_JST +JST_SUR_BM17B-SURS-TF_1x17-1MP_P0.80mm_Vertical +JST SUR series connector, BM17B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +19 +18 +Connector_JST +JST_SUR_BM20B-SURS-TF_1x20-1MP_P0.80mm_Vertical +JST SUR series connector, BM20B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +22 +21 +Connector_JST +JST_SUR_SM02B-SURS-TF_1x02-1MP_P0.80mm_Horizontal +JST SUR series connector, SM02B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +4 +3 +Connector_JST +JST_SUR_SM03B-SURS-TF_1x03-1MP_P0.80mm_Horizontal +JST SUR series connector, SM03B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +5 +4 +Connector_JST +JST_SUR_SM04B-SURS-TF_1x04-1MP_P0.80mm_Horizontal +JST SUR series connector, SM04B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +6 +5 +Connector_JST +JST_SUR_SM05B-SURS-TF_1x05-1MP_P0.80mm_Horizontal +JST SUR series connector, SM05B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +7 +6 +Connector_JST +JST_SUR_SM06B-SURS-TF_1x06-1MP_P0.80mm_Horizontal +JST SUR series connector, SM06B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +8 +7 +Connector_JST +JST_SUR_SM08B-SURS-TF_1x08-1MP_P0.80mm_Horizontal +JST SUR series connector, SM08B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +10 +9 +Connector_JST +JST_SUR_SM10B-SURS-TF_1x10-1MP_P0.80mm_Horizontal +JST SUR series connector, SM10B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +12 +11 +Connector_JST +JST_SUR_SM12B-SURS-TF_1x12-1MP_P0.80mm_Horizontal +JST SUR series connector, SM12B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +14 +13 +Connector_JST +JST_SUR_SM14B-SURS-TF_1x14-1MP_P0.80mm_Horizontal +JST SUR series connector, SM14B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +16 +15 +Connector_JST +JST_SUR_SM15B-SURS-TF_1x15-1MP_P0.80mm_Horizontal +JST SUR series connector, SM15B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +17 +16 +Connector_JST +JST_SUR_SM16B-SURS-TF_1x16-1MP_P0.80mm_Horizontal +JST SUR series connector, SM16B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +18 +17 +Connector_JST +JST_SUR_SM17B-SURS-TF_1x17-1MP_P0.80mm_Horizontal +JST SUR series connector, SM17B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +19 +18 +Connector_JST +JST_SUR_SM20B-SURS-TF_1x20-1MP_P0.80mm_Horizontal +JST SUR series connector, SM20B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +22 +21 +Connector_JST +JST_SUR_SM22B-SURS-TF_1x22-1MP_P0.80mm_Horizontal +JST SUR series connector, SM22B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +24 +23 +Connector_JST +JST_VH_B2P-VH-B_1x02_P3.96mm_Vertical +JST VH PBT series connector, B2P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +2 +2 +Connector_JST +JST_VH_B2P-VH-FB-B_1x02_P3.96mm_Vertical +JST VH series connector, B2P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +2 +2 +Connector_JST +JST_VH_B2P-VH_1x02_P3.96mm_Vertical +JST VH series connector, B2P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +2 +2 +Connector_JST +JST_VH_B2PS-VH_1x02_P3.96mm_Horizontal +JST VH series connector, B2PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +2 +2 +Connector_JST +JST_VH_B3P-VH-B_1x03_P3.96mm_Vertical +JST VH PBT series connector, B3P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +3 +3 +Connector_JST +JST_VH_B3P-VH-FB-B_1x03_P3.96mm_Vertical +JST VH series connector, B3P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +3 +3 +Connector_JST +JST_VH_B3P-VH_1x03_P3.96mm_Vertical +JST VH series connector, B3P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +3 +3 +Connector_JST +JST_VH_B3PS-VH_1x03_P3.96mm_Horizontal +JST VH series connector, B3PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +3 +3 +Connector_JST +JST_VH_B4P-VH-B_1x04_P3.96mm_Vertical +JST VH PBT series connector, B4P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +4 +4 +Connector_JST +JST_VH_B4P-VH-FB-B_1x04_P3.96mm_Vertical +JST VH series connector, B4P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +4 +4 +Connector_JST +JST_VH_B4P-VH_1x04_P3.96mm_Vertical +JST VH series connector, B4P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +4 +4 +Connector_JST +JST_VH_B4PS-VH_1x04_P3.96mm_Horizontal +JST VH series connector, B4PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +4 +4 +Connector_JST +JST_VH_B5P-VH-B_1x05_P3.96mm_Vertical +JST VH PBT series connector, B5P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +5 +5 +Connector_JST +JST_VH_B5P-VH-FB-B_1x05_P3.96mm_Vertical +JST VH series connector, B5P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +5 +5 +Connector_JST +JST_VH_B5P-VH_1x05_P3.96mm_Vertical +JST VH series connector, B5P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +5 +5 +Connector_JST +JST_VH_B5PS-VH_1x05_P3.96mm_Horizontal +JST VH series connector, B5PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +5 +5 +Connector_JST +JST_VH_B6P-VH-B_1x06_P3.96mm_Vertical +JST VH PBT series connector, B6P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +6 +6 +Connector_JST +JST_VH_B6P-VH-FB-B_1x06_P3.96mm_Vertical +JST VH series connector, B6P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +6 +6 +Connector_JST +JST_VH_B6P-VH_1x06_P3.96mm_Vertical +JST VH series connector, B6P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +6 +6 +Connector_JST +JST_VH_B6PS-VH_1x06_P3.96mm_Horizontal +JST VH series connector, B6PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +6 +6 +Connector_JST +JST_VH_B7P-VH-B_1x07_P3.96mm_Vertical +JST VH PBT series connector, B7P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +7 +7 +Connector_JST +JST_VH_B7P-VH-FB-B_1x07_P3.96mm_Vertical +JST VH series connector, B7P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +7 +7 +Connector_JST +JST_VH_B7P-VH_1x07_P3.96mm_Vertical +JST VH series connector, B7P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +7 +7 +Connector_JST +JST_VH_B7PS-VH_1x07_P3.96mm_Horizontal +JST VH series connector, B7PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +7 +7 +Connector_JST +JST_VH_B8P-VH-B_1x08_P3.96mm_Vertical +JST VH PBT series connector, B8P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +8 +8 +Connector_JST +JST_VH_B8P-VH-FB-B_1x08_P3.96mm_Vertical +JST VH series connector, B8P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +8 +8 +Connector_JST +JST_VH_B8P-VH_1x08_P3.96mm_Vertical +JST VH series connector, B8P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +8 +8 +Connector_JST +JST_VH_B8PS-VH_1x08_P3.96mm_Horizontal +JST VH series connector, B8PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +8 +8 +Connector_JST +JST_VH_B9P-VH-B_1x09_P3.96mm_Vertical +JST VH PBT series connector, B9P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +9 +9 +Connector_JST +JST_VH_B9P-VH-FB-B_1x09_P3.96mm_Vertical +JST VH series connector, B9P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +9 +9 +Connector_JST +JST_VH_B9P-VH_1x09_P3.96mm_Vertical +JST VH series connector, B9P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +9 +9 +Connector_JST +JST_VH_B9PS-VH_1x09_P3.96mm_Horizontal +JST VH series connector, B9PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +9 +9 +Connector_JST +JST_VH_B10P-VH-B_1x10_P3.96mm_Vertical +JST VH PBT series connector, B10P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +10 +10 +Connector_JST +JST_VH_B10P-VH-FB-B_1x10_P3.96mm_Vertical +JST VH series connector, B10P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +10 +10 +Connector_JST +JST_VH_B10P-VH_1x10_P3.96mm_Vertical +JST VH series connector, B10P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +10 +10 +Connector_JST +JST_VH_B10PS-VH_1x10_P3.96mm_Horizontal +JST VH series connector, B10PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +10 +10 +Connector_JST +JST_VH_B11P-VH-B_1x11_P3.96mm_Vertical +JST VH PBT series connector, B11P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +11 +11 +Connector_JST +JST_VH_S2P-VH_1x02_P3.96mm_Horizontal +JST VH series connector, S2P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +2 +2 +Connector_JST +JST_VH_S3P-VH_1x03_P3.96mm_Horizontal +JST VH series connector, S3P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +3 +3 +Connector_JST +JST_VH_S4P-VH_1x04_P3.96mm_Horizontal +JST VH series connector, S4P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +4 +4 +Connector_JST +JST_VH_S5P-VH_1x05_P3.96mm_Horizontal +JST VH series connector, S5P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +5 +5 +Connector_JST +JST_VH_S6P-VH_1x06_P3.96mm_Horizontal +JST VH series connector, S6P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +6 +6 +Connector_JST +JST_VH_S7P-VH_1x07_P3.96mm_Horizontal +JST VH series connector, S7P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +7 +7 +Connector_JST +JST_XAG_SM05B-XAGKS-BN-TB_1x05-1MP_P2.50mm_Horizontal +JST XAG series connector, SM05B-XAGKS-BN-TB (http://www.jst-mfg.com/product/pdf/eng/eXAG.pdf), generated with kicad-footprint-generator +connector JST XAG top entry +0 +7 +6 +Connector_JST +JST_XH_B1B-XH-AM_1x01_P2.50mm_Vertical +JST XH series connector, B1B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +1 +1 +Connector_JST +JST_XH_B2B-XH-AM_1x02_P2.50mm_Vertical +JST XH series connector, B2B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +2 +2 +Connector_JST +JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical +JST XH series connector, B2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +2 +2 +Connector_JST +JST_XH_B3B-XH-AM_1x03_P2.50mm_Vertical +JST XH series connector, B3B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +3 +3 +Connector_JST +JST_XH_B3B-XH-A_1x03_P2.50mm_Vertical +JST XH series connector, B3B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +3 +3 +Connector_JST +JST_XH_B4B-XH-AM_1x04_P2.50mm_Vertical +JST XH series connector, B4B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +4 +4 +Connector_JST +JST_XH_B4B-XH-A_1x04_P2.50mm_Vertical +JST XH series connector, B4B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +4 +4 +Connector_JST +JST_XH_B5B-XH-AM_1x05_P2.50mm_Vertical +JST XH series connector, B5B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +5 +5 +Connector_JST +JST_XH_B5B-XH-A_1x05_P2.50mm_Vertical +JST XH series connector, B5B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +5 +5 +Connector_JST +JST_XH_B6B-XH-AM_1x06_P2.50mm_Vertical +JST XH series connector, B6B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +6 +6 +Connector_JST +JST_XH_B6B-XH-A_1x06_P2.50mm_Vertical +JST XH series connector, B6B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +6 +6 +Connector_JST +JST_XH_B7B-XH-AM_1x07_P2.50mm_Vertical +JST XH series connector, B7B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +7 +7 +Connector_JST +JST_XH_B7B-XH-A_1x07_P2.50mm_Vertical +JST XH series connector, B7B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +7 +7 +Connector_JST +JST_XH_B8B-XH-AM_1x08_P2.50mm_Vertical +JST XH series connector, B8B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +8 +8 +Connector_JST +JST_XH_B8B-XH-A_1x08_P2.50mm_Vertical +JST XH series connector, B8B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +8 +8 +Connector_JST +JST_XH_B9B-XH-AM_1x09_P2.50mm_Vertical +JST XH series connector, B9B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +9 +9 +Connector_JST +JST_XH_B9B-XH-A_1x09_P2.50mm_Vertical +JST XH series connector, B9B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +9 +9 +Connector_JST +JST_XH_B10B-XH-AM_1x10_P2.50mm_Vertical +JST XH series connector, B10B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry boss +0 +10 +10 +Connector_JST +JST_XH_B10B-XH-A_1x10_P2.50mm_Vertical +JST XH series connector, B10B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +10 +10 +Connector_JST +JST_XH_B11B-XH-A_1x11_P2.50mm_Vertical +JST XH series connector, B11B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +11 +11 +Connector_JST +JST_XH_B12B-XH-AM_1x12_P2.50mm_Vertical +JST XH series connector, B12B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry boss +0 +12 +12 +Connector_JST +JST_XH_B12B-XH-A_1x12_P2.50mm_Vertical +JST XH series connector, B12B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +12 +12 +Connector_JST +JST_XH_B13B-XH-A_1x13_P2.50mm_Vertical +JST XH series connector, B13B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +13 +13 +Connector_JST +JST_XH_B14B-XH-A_1x14_P2.50mm_Vertical +JST XH series connector, B14B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +14 +14 +Connector_JST +JST_XH_B15B-XH-A_1x15_P2.50mm_Vertical +JST XH series connector, B15B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +15 +15 +Connector_JST +JST_XH_B16B-XH-A_1x16_P2.50mm_Vertical +JST XH series connector, B16B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +16 +16 +Connector_JST +JST_XH_B20B-XH-A_1x20_P2.50mm_Vertical +JST XH series connector, B20B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +20 +20 +Connector_JST +JST_XH_S2B-XH-A-1_1x02_P2.50mm_Horizontal +JST XH series connector, S2B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +2 +2 +Connector_JST +JST_XH_S2B-XH-A_1x02_P2.50mm_Horizontal +JST XH series connector, S2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +2 +2 +Connector_JST +JST_XH_S3B-XH-A-1_1x03_P2.50mm_Horizontal +JST XH series connector, S3B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +3 +3 +Connector_JST +JST_XH_S3B-XH-A_1x03_P2.50mm_Horizontal +JST XH series connector, S3B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +3 +3 +Connector_JST +JST_XH_S4B-XH-A-1_1x04_P2.50mm_Horizontal +JST XH series connector, S4B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +4 +4 +Connector_JST +JST_XH_S4B-XH-A_1x04_P2.50mm_Horizontal +JST XH series connector, S4B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +4 +4 +Connector_JST +JST_XH_S5B-XH-A-1_1x05_P2.50mm_Horizontal +JST XH series connector, S5B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +5 +5 +Connector_JST +JST_XH_S5B-XH-A_1x05_P2.50mm_Horizontal +JST XH series connector, S5B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +5 +5 +Connector_JST +JST_XH_S6B-XH-A-1_1x06_P2.50mm_Horizontal +JST XH series connector, S6B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +6 +6 +Connector_JST +JST_XH_S6B-XH-A_1x06_P2.50mm_Horizontal +JST XH series connector, S6B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +6 +6 +Connector_JST +JST_XH_S7B-XH-A-1_1x07_P2.50mm_Horizontal +JST XH series connector, S7B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +7 +7 +Connector_JST +JST_XH_S7B-XH-A_1x07_P2.50mm_Horizontal +JST XH series connector, S7B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +7 +7 +Connector_JST +JST_XH_S8B-XH-A-1_1x08_P2.50mm_Horizontal +JST XH series connector, S8B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +8 +8 +Connector_JST +JST_XH_S8B-XH-A_1x08_P2.50mm_Horizontal +JST XH series connector, S8B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +8 +8 +Connector_JST +JST_XH_S9B-XH-A-1_1x09_P2.50mm_Horizontal +JST XH series connector, S9B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +9 +9 +Connector_JST +JST_XH_S9B-XH-A_1x09_P2.50mm_Horizontal +JST XH series connector, S9B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +9 +9 +Connector_JST +JST_XH_S10B-XH-A-1_1x10_P2.50mm_Horizontal +JST XH series connector, S10B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +10 +10 +Connector_JST +JST_XH_S10B-XH-A_1x10_P2.50mm_Horizontal +JST XH series connector, S10B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +10 +10 +Connector_JST +JST_XH_S11B-XH-A-1_1x11_P2.50mm_Horizontal +JST XH series connector, S11B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +11 +11 +Connector_JST +JST_XH_S11B-XH-A_1x11_P2.50mm_Horizontal +JST XH series connector, S11B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +11 +11 +Connector_JST +JST_XH_S12B-XH-A-1_1x12_P2.50mm_Horizontal +JST XH series connector, S12B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +12 +12 +Connector_JST +JST_XH_S12B-XH-A_1x12_P2.50mm_Horizontal +JST XH series connector, S12B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +12 +12 +Connector_JST +JST_XH_S13B-XH-A-1_1x13_P2.50mm_Horizontal +JST XH series connector, S13B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +13 +13 +Connector_JST +JST_XH_S13B-XH-A_1x13_P2.50mm_Horizontal +JST XH series connector, S13B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +13 +13 +Connector_JST +JST_XH_S14B-XH-A-1_1x14_P2.50mm_Horizontal +JST XH series connector, S14B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +14 +14 +Connector_JST +JST_XH_S14B-XH-A_1x14_P2.50mm_Horizontal +JST XH series connector, S14B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +14 +14 +Connector_JST +JST_XH_S15B-XH-A-1_1x15_P2.50mm_Horizontal +JST XH series connector, S15B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +15 +15 +Connector_JST +JST_XH_S15B-XH-A_1x15_P2.50mm_Horizontal +JST XH series connector, S15B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +15 +15 +Connector_JST +JST_XH_S16B-XH-A_1x16_P2.50mm_Horizontal +JST XH series connector, S16B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +16 +16 +Connector_JST +JST_ZE_B02B-ZESK-1D_1x02_P1.50mm_Vertical +JST ZE series connector, B02B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +2 +2 +Connector_JST +JST_ZE_B03B-ZESK-1D_1x03_P1.50mm_Vertical +JST ZE series connector, B03B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +3 +3 +Connector_JST +JST_ZE_B03B-ZESK-D_1x03_P1.50mm_Vertical +JST ZE series connector, B03B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +3 +3 +Connector_JST +JST_ZE_B04B-ZESK-1D_1x04_P1.50mm_Vertical +JST ZE series connector, B04B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +4 +4 +Connector_JST +JST_ZE_B04B-ZESK-D_1x04_P1.50mm_Vertical +JST ZE series connector, B04B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +4 +4 +Connector_JST +JST_ZE_B05B-ZESK-1D_1x05_P1.50mm_Vertical +JST ZE series connector, B05B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +5 +5 +Connector_JST +JST_ZE_B05B-ZESK-D_1x05_P1.50mm_Vertical +JST ZE series connector, B05B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +5 +5 +Connector_JST +JST_ZE_B06B-ZESK-1D_1x06_P1.50mm_Vertical +JST ZE series connector, B06B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +6 +6 +Connector_JST +JST_ZE_B06B-ZESK-D_1x06_P1.50mm_Vertical +JST ZE series connector, B06B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +6 +6 +Connector_JST +JST_ZE_B07B-ZESK-1D_1x07_P1.50mm_Vertical +JST ZE series connector, B07B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +7 +7 +Connector_JST +JST_ZE_B07B-ZESK-D_1x07_P1.50mm_Vertical +JST ZE series connector, B07B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +7 +7 +Connector_JST +JST_ZE_B08B-ZESK-1D_1x08_P1.50mm_Vertical +JST ZE series connector, B08B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +8 +8 +Connector_JST +JST_ZE_B08B-ZESK-D_1x08_P1.50mm_Vertical +JST ZE series connector, B08B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +8 +8 +Connector_JST +JST_ZE_B09B-ZESK-1D_1x09_P1.50mm_Vertical +JST ZE series connector, B09B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +9 +9 +Connector_JST +JST_ZE_B09B-ZESK-D_1x09_P1.50mm_Vertical +JST ZE series connector, B09B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +9 +9 +Connector_JST +JST_ZE_B10B-ZESK-1D_1x10_P1.50mm_Vertical +JST ZE series connector, B10B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +10 +10 +Connector_JST +JST_ZE_B10B-ZESK-D_1x10_P1.50mm_Vertical +JST ZE series connector, B10B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +10 +10 +Connector_JST +JST_ZE_B11B-ZESK-1D_1x11_P1.50mm_Vertical +JST ZE series connector, B11B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +11 +11 +Connector_JST +JST_ZE_B11B-ZESK-D_1x11_P1.50mm_Vertical +JST ZE series connector, B11B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +11 +11 +Connector_JST +JST_ZE_B12B-ZESK-1D_1x12_P1.50mm_Vertical +JST ZE series connector, B12B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +12 +12 +Connector_JST +JST_ZE_B12B-ZESK-D_1x12_P1.50mm_Vertical +JST ZE series connector, B12B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +12 +12 +Connector_JST +JST_ZE_B13B-ZESK-1D_1x13_P1.50mm_Vertical +JST ZE series connector, B13B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +13 +13 +Connector_JST +JST_ZE_B13B-ZESK-D_1x13_P1.50mm_Vertical +JST ZE series connector, B13B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +13 +13 +Connector_JST +JST_ZE_B14B-ZESK-1D_1x14_P1.50mm_Vertical +JST ZE series connector, B14B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +14 +14 +Connector_JST +JST_ZE_B14B-ZESK-D_1x14_P1.50mm_Vertical +JST ZE series connector, B14B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +14 +14 +Connector_JST +JST_ZE_B15B-ZESK-1D_1x15_P1.50mm_Vertical +JST ZE series connector, B15B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +15 +15 +Connector_JST +JST_ZE_B15B-ZESK-D_1x15_P1.50mm_Vertical +JST ZE series connector, B15B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +15 +15 +Connector_JST +JST_ZE_B16B-ZESK-1D_1x16_P1.50mm_Vertical +JST ZE series connector, B16B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +16 +16 +Connector_JST +JST_ZE_B16B-ZESK-D_1x16_P1.50mm_Vertical +JST ZE series connector, B16B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +16 +16 +Connector_JST +JST_ZE_BM02B-ZESS-TBT_1x02-1MP_P1.50mm_Vertical +JST ZE series connector, BM02B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +4 +3 +Connector_JST +JST_ZE_BM03B-ZESS-TBT_1x03-1MP_P1.50mm_Vertical +JST ZE series connector, BM03B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +5 +4 +Connector_JST +JST_ZE_BM04B-ZESS-TBT_1x04-1MP_P1.50mm_Vertical +JST ZE series connector, BM04B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +6 +5 +Connector_JST +JST_ZE_BM05B-ZESS-TBT_1x05-1MP_P1.50mm_Vertical +JST ZE series connector, BM05B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +7 +6 +Connector_JST +JST_ZE_BM06B-ZESS-TBT_1x06-1MP_P1.50mm_Vertical +JST ZE series connector, BM06B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +8 +7 +Connector_JST +JST_ZE_BM07B-ZESS-TBT_1x07-1MP_P1.50mm_Vertical +JST ZE series connector, BM07B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +9 +8 +Connector_JST +JST_ZE_BM08B-ZESS-TBT_1x08-1MP_P1.50mm_Vertical +JST ZE series connector, BM08B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +10 +9 +Connector_JST +JST_ZE_BM09B-ZESS-TBT_1x09-1MP_P1.50mm_Vertical +JST ZE series connector, BM09B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +11 +10 +Connector_JST +JST_ZE_BM10B-ZESS-TBT_1x10-1MP_P1.50mm_Vertical +JST ZE series connector, BM10B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +12 +11 +Connector_JST +JST_ZE_BM11B-ZESS-TBT_1x11-1MP_P1.50mm_Vertical +JST ZE series connector, BM11B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +13 +12 +Connector_JST +JST_ZE_BM12B-ZESS-TBT_1x12-1MP_P1.50mm_Vertical +JST ZE series connector, BM12B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +14 +13 +Connector_JST +JST_ZE_BM13B-ZESS-TBT_1x13-1MP_P1.50mm_Vertical +JST ZE series connector, BM13B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +15 +14 +Connector_JST +JST_ZE_BM14B-ZESS-TBT_1x14-1MP_P1.50mm_Vertical +JST ZE series connector, BM14B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +16 +15 +Connector_JST +JST_ZE_BM15B-ZESS-TBT_1x15-1MP_P1.50mm_Vertical +JST ZE series connector, BM15B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +17 +16 +Connector_JST +JST_ZE_BM16B-ZESS-TBT_1x16-1MP_P1.50mm_Vertical +JST ZE series connector, BM16B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +18 +17 +Connector_JST +JST_ZE_S02B-ZESK-2D_1x02_P1.50mm_Horizontal +JST ZE series connector, S02B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +2 +2 +Connector_JST +JST_ZE_S03B-ZESK-2D_1x03_P1.50mm_Horizontal +JST ZE series connector, S03B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +3 +3 +Connector_JST +JST_ZE_S04B-ZESK-2D_1x04_P1.50mm_Horizontal +JST ZE series connector, S04B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +4 +4 +Connector_JST +JST_ZE_S05B-ZESK-2D_1x05_P1.50mm_Horizontal +JST ZE series connector, S05B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +5 +5 +Connector_JST +JST_ZE_S06B-ZESK-2D_1x06_P1.50mm_Horizontal +JST ZE series connector, S06B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +6 +6 +Connector_JST +JST_ZE_S07B-ZESK-2D_1x07_P1.50mm_Horizontal +JST ZE series connector, S07B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +7 +7 +Connector_JST +JST_ZE_S08B-ZESK-2D_1x08_P1.50mm_Horizontal +JST ZE series connector, S08B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +8 +8 +Connector_JST +JST_ZE_S09B-ZESK-2D_1x09_P1.50mm_Horizontal +JST ZE series connector, S09B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +9 +9 +Connector_JST +JST_ZE_S10B-ZESK-2D_1x10_P1.50mm_Horizontal +JST ZE series connector, S10B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +10 +10 +Connector_JST +JST_ZE_S11B-ZESK-2D_1x11_P1.50mm_Horizontal +JST ZE series connector, S11B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +11 +11 +Connector_JST +JST_ZE_S12B-ZESK-2D_1x12_P1.50mm_Horizontal +JST ZE series connector, S12B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +12 +12 +Connector_JST +JST_ZE_S13B-ZESK-2D_1x13_P1.50mm_Horizontal +JST ZE series connector, S13B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +13 +13 +Connector_JST +JST_ZE_S14B-ZESK-2D_1x14_P1.50mm_Horizontal +JST ZE series connector, S14B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +14 +14 +Connector_JST +JST_ZE_S15B-ZESK-2D_1x15_P1.50mm_Horizontal +JST ZE series connector, S15B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +15 +15 +Connector_JST +JST_ZE_S16B-ZESK-2D_1x16_P1.50mm_Horizontal +JST ZE series connector, S16B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +16 +16 +Connector_JST +JST_ZE_SM02B-ZESS-TB_1x02-1MP_P1.50mm_Horizontal +JST ZE series connector, SM02B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +4 +3 +Connector_JST +JST_ZE_SM03B-ZESS-TB_1x03-1MP_P1.50mm_Horizontal +JST ZE series connector, SM03B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +5 +4 +Connector_JST +JST_ZE_SM04B-ZESS-TB_1x04-1MP_P1.50mm_Horizontal +JST ZE series connector, SM04B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +6 +5 +Connector_JST +JST_ZE_SM05B-ZESS-TB_1x05-1MP_P1.50mm_Horizontal +JST ZE series connector, SM05B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +7 +6 +Connector_JST +JST_ZE_SM06B-ZESS-TB_1x06-1MP_P1.50mm_Horizontal +JST ZE series connector, SM06B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +8 +7 +Connector_JST +JST_ZE_SM07B-ZESS-TB_1x07-1MP_P1.50mm_Horizontal +JST ZE series connector, SM07B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +9 +8 +Connector_JST +JST_ZE_SM08B-ZESS-TB_1x08-1MP_P1.50mm_Horizontal +JST ZE series connector, SM08B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +10 +9 +Connector_JST +JST_ZE_SM09B-ZESS-TB_1x09-1MP_P1.50mm_Horizontal +JST ZE series connector, SM09B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +11 +10 +Connector_JST +JST_ZE_SM10B-ZESS-TB_1x10-1MP_P1.50mm_Horizontal +JST ZE series connector, SM10B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +12 +11 +Connector_JST +JST_ZE_SM11B-ZESS-TB_1x11-1MP_P1.50mm_Horizontal +JST ZE series connector, SM11B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +13 +12 +Connector_JST +JST_ZE_SM12B-ZESS-TB_1x12-1MP_P1.50mm_Horizontal +JST ZE series connector, SM12B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +14 +13 +Connector_JST +JST_ZE_SM13B-ZESS-TB_1x13-1MP_P1.50mm_Horizontal +JST ZE series connector, SM13B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +15 +14 +Connector_JST +JST_ZE_SM14B-ZESS-TB_1x14-1MP_P1.50mm_Horizontal +JST ZE series connector, SM14B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +16 +15 +Connector_JST +JST_ZE_SM15B-ZESS-TB_1x15-1MP_P1.50mm_Horizontal +JST ZE series connector, SM15B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +17 +16 +Connector_JST +JST_ZE_SM16B-ZESS-TB_1x16-1MP_P1.50mm_Horizontal +JST ZE series connector, SM16B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +18 +17 +Connector_Molex +Molex_CLIK-Mate_502382-0270_1x02-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0270 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502382-0370_1x03-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0370 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502382-0470_1x04-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0470 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502382-0570_1x05-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0570 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502382-0670_1x06-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0670 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502382-0770_1x07-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0770 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502382-0870_1x08-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0870 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502382-0970_1x09-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0970 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502382-1070_1x10-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1070 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502382-1170_1x11-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1170 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_502382-1270_1x12-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1270 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502382-1370_1x13-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1370 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502382-1470_1x14-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1470 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502382-1570_1x15-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1570 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502386-0270_1x02-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0270 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502386-0370_1x03-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0370 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502386-0470_1x04-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0470 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502386-0570_1x05-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0570 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502386-0670_1x06-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0670 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502386-0770_1x07-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0770 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502386-0870_1x08-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0870 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502386-0970_1x09-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0970 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502386-1070_1x10-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1070 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502386-1170_1x11-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1170 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_502386-1270_1x12-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1270 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502386-1370_1x13-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1370 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502386-1470_1x14-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1470 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502386-1570_1x15-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1570 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502443-0270_1x02-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0270 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502443-0370_1x03-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0370 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502443-0470_1x04-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0470 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502443-0570_1x05-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0570 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502443-0670_1x06-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0670 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502443-0770_1x07-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0770 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502443-0870_1x08-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0870 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502443-0970_1x09-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0970 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502443-1270_1x12-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1270 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502443-1370_1x13-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1370 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502443-1470_1x14-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1470 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502443-1570_1x15-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1570 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502494-0270_1x02-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0270 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502494-0370_1x03-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0370 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502494-0470_1x04-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0470 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502494-0670_1x06-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0670 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0870 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502494-1070_1x10-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1070 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502494-1270_1x12-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1270 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502494-1370_1x13-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1370 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502494-1470_1x14-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1470 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502494-1570_1x15-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1570 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502585-0270_1x02-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0270 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502585-0370_1x03-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0370 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502585-0470_1x04-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0470 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502585-0570_1x05-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0570 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502585-0670_1x06-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0670 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502585-0770_1x07-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0770 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502585-0870_1x08-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0870 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502585-0970_1x09-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0970 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502585-1070_1x10-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1070 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502585-1170_1x11-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1170 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_502585-1270_1x12-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1270 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502585-1370_1x13-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1370 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502585-1470_1x14-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1470 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502585-1570_1x15-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1570 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_505405-0270_1x02-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0270 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_505405-0370_1x03-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0370 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_505405-0470_1x04-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0470 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_505405-0570_1x05-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0570 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_505405-0670_1x06-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0670 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_505405-0770_1x07-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0770 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_505405-0870_1x08-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0870 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_505405-0970_1x09-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0970 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_505405-1070_1x10-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1070 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_505405-1170_1x11-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1170 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_505405-1270_1x12-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1270 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_505405-1370_1x13-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1370 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_505405-1470_1x14-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1470 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_505405-1570_1x15-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1570 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +17 +16 +Connector_Molex +Molex_KK-254_AE-6410-02A_1x02_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-02A example for new part number: 22-27-2021, 2 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +2 +2 +Connector_Molex +Molex_KK-254_AE-6410-03A_1x03_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-03A example for new part number: 22-27-2031, 3 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +3 +3 +Connector_Molex +Molex_KK-254_AE-6410-04A_1x04_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-04A example for new part number: 22-27-2041, 4 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +4 +4 +Connector_Molex +Molex_KK-254_AE-6410-05A_1x05_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-05A example for new part number: 22-27-2051, 5 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +5 +5 +Connector_Molex +Molex_KK-254_AE-6410-06A_1x06_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-06A example for new part number: 22-27-2061, 6 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +6 +6 +Connector_Molex +Molex_KK-254_AE-6410-07A_1x07_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-07A example for new part number: 22-27-2071, 7 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +7 +7 +Connector_Molex +Molex_KK-254_AE-6410-08A_1x08_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-08A example for new part number: 22-27-2081, 8 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +8 +8 +Connector_Molex +Molex_KK-254_AE-6410-09A_1x09_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-09A example for new part number: 22-27-2091, 9 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +9 +9 +Connector_Molex +Molex_KK-254_AE-6410-10A_1x10_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-10A example for new part number: 22-27-2101, 10 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +10 +10 +Connector_Molex +Molex_KK-254_AE-6410-11A_1x11_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-11A example for new part number: 22-27-2111, 11 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +11 +11 +Connector_Molex +Molex_KK-254_AE-6410-12A_1x12_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-12A example for new part number: 22-27-2121, 12 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +12 +12 +Connector_Molex +Molex_KK-254_AE-6410-13A_1x13_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-13A example for new part number: 22-27-2131, 13 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +13 +13 +Connector_Molex +Molex_KK-254_AE-6410-14A_1x14_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-14A example for new part number: 22-27-2141, 14 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +14 +14 +Connector_Molex +Molex_KK-254_AE-6410-15A_1x15_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-15A example for new part number: 22-27-2151, 15 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +15 +15 +Connector_Molex +Molex_KK-254_AE-6410-16A_1x16_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-16A example for new part number: 22-27-2161, 16 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 side entry +0 +16 +16 +Connector_Molex +Molex_Mega-Fit_76825-0002_2x01_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0002 (compatible alternatives: 172064-0002, 172064-1002), 1 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +2 +2 +Connector_Molex +Molex_Mega-Fit_76825-0004_2x02_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0004 (compatible alternatives: 172064-0004, 172064-1004), 2 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +4 +4 +Connector_Molex +Molex_Mega-Fit_76825-0006_2x03_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0006 (compatible alternatives: 172064-0006, 172064-1006), 3 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +6 +6 +Connector_Molex +Molex_Mega-Fit_76825-0008_2x04_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0008 (compatible alternatives: 172064-0008, 172064-1008), 4 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +8 +8 +Connector_Molex +Molex_Mega-Fit_76825-0010_2x05_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0010 (compatible alternatives: 172064-0010, 172064-1010), 5 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +10 +10 +Connector_Molex +Molex_Mega-Fit_76825-0012_2x06_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0012 (compatible alternatives: 172064-0012, 172064-1012), 6 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +12 +12 +Connector_Molex +Molex_Mega-Fit_76829-0002_2x01_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0002 (compatible alternatives: 172065-0002, 172065-1002), 1 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +2 +2 +Connector_Molex +Molex_Mega-Fit_76829-0004_2x02_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0004 (compatible alternatives: 172065-0004, 172065-1004), 2 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Mega-Fit_76829-0006_2x03_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0006 (compatible alternatives: 172065-0006, 172065-1006), 3 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Mega-Fit_76829-0008_2x04_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0008 (compatible alternatives: 172065-0008, 172065-1008), 4 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Mega-Fit_76829-0010_2x05_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0010 (compatible alternatives: 172065-0010, 172065-1010), 5 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +10 +10 +Connector_Molex +Molex_Mega-Fit_76829-0012_2x06_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0012 (compatible alternatives: 172065-0012, 172065-1012), 6 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +12 +12 +Connector_Molex +Molex_Mega-Fit_76829-0102_2x01_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0102 (compatible alternatives: 172065-0202, 172065-0302), 1 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +2 +2 +Connector_Molex +Molex_Mega-Fit_76829-0104_2x02_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0104 (compatible alternatives: 172065-0204, 172065-0304), 2 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Mega-Fit_76829-0106_2x03_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0106 (compatible alternatives: 172065-0206, 172065-0306), 3 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Mega-Fit_76829-0108_2x04_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0108 (compatible alternatives: 172065-0208, 172065-0308), 4 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Mega-Fit_76829-0110_2x05_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0110 (compatible alternatives: 172065-0210, 172065-0310), 5 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +10 +10 +Connector_Molex +Molex_Mega-Fit_76829-0112_2x06_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0112 (compatible alternatives: 172065-0212, 172065-0312), 6 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0200_2x01_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0200 (compatible alternatives: 43045-0201, 43045-0202), 1 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0210_2x01-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0210 (compatible alternatives: 43045-0211, 43045-0209), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +4 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0212_2x01_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0212 (compatible alternatives: 43045-0213, 43045-0224), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0215_2x01_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0215 (compatible alternatives: 43045-0216, 43045-0217), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0218_2x01-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0218 (compatible alternatives: 43045-0219, 43045-0220), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0400_2x02_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0400 (compatible alternatives: 43045-0401, 43045-0402), 2 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0410_2x02-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0410 (compatible alternatives: 43045-0411, 43045-0409), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +6 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0412_2x02_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0412 (compatible alternatives: 43045-0413, 43045-0424), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0415_2x02_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0415 (compatible alternatives: 43045-0416, 43045-0417), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0418_2x02-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0418 (compatible alternatives: 43045-0419, 43045-0420), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0600_2x03_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0600 (compatible alternatives: 43045-0601, 43045-0602), 3 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0610_2x03-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0610 (compatible alternatives: 43045-0611, 43045-0609), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +8 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0612_2x03_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0612 (compatible alternatives: 43045-0613, 43045-0624), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0615_2x03_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0615 (compatible alternatives: 43045-0616, 43045-0617), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0618_2x03-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0618 (compatible alternatives: 43045-0619, 43045-0620), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0800_2x04_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0800 (compatible alternatives: 43045-0801, 43045-0802), 4 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0810_2x04-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0810 (compatible alternatives: 43045-0811, 43045-0809), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +10 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0812_2x04_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0812 (compatible alternatives: 43045-0813, 43045-0824), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0815_2x04_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0815 (compatible alternatives: 43045-0816, 43045-0817), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0818_2x04-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0818 (compatible alternatives: 43045-0819, 43045-0820), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1000_2x05_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1000 (compatible alternatives: 43045-1001, 43045-1002), 5 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1010_2x05-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1010 (compatible alternatives: 43045-1011, 43045-1009), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +12 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1012_2x05_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1012 (compatible alternatives: 43045-1013, 43045-1024), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1015_2x05_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1015 (compatible alternatives: 43045-1016, 43045-1017), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1018_2x05-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1018 (compatible alternatives: 43045-1019, 43045-1020), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1200_2x06_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1200 (compatible alternatives: 43045-1201, 43045-1202), 6 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1210_2x06-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1210 (compatible alternatives: 43045-1211, 43045-1209), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +14 +13 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1212_2x06_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1212 (compatible alternatives: 43045-1213, 43045-1224), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1215_2x06_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1215 (compatible alternatives: 43045-1216, 43045-1217), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1218_2x06-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1218 (compatible alternatives: 43045-1219, 43045-1220), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +14 +13 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1400_2x07_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1400 (compatible alternatives: 43045-1401, 43045-1402), 7 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +14 +14 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1410_2x07-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1410 (compatible alternatives: 43045-1411, 43045-1409), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +16 +15 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1412_2x07_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1412 (compatible alternatives: 43045-1413, 43045-1424), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +14 +14 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1415_2x07_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1415 (compatible alternatives: 43045-1416, 43045-1417), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +14 +14 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1418_2x07-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1418 (compatible alternatives: 43045-1419, 43045-1420), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +16 +15 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1600_2x08_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1600 (compatible alternatives: 43045-1601, 43045-1602), 8 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +16 +16 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1610_2x08-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1610 (compatible alternatives: 43045-1611, 43045-1609), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +18 +17 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1612_2x08_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1612 (compatible alternatives: 43045-1613, 43045-1624), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +16 +16 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1615_2x08_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1615 (compatible alternatives: 43045-1616, 43045-1617), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +16 +16 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1618_2x08-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1618 (compatible alternatives: 43045-1619, 43045-1620), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +18 +17 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1800_2x09_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1800 (compatible alternatives: 43045-1801, 43045-1802), 9 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +18 +18 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1810_2x09-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1810 (compatible alternatives: 43045-1811, 43045-1809), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +20 +19 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1812_2x09_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1812 (compatible alternatives: 43045-1813, 43045-1824), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +18 +18 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1815_2x09_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1815 (compatible alternatives: 43045-1816, 43045-1817), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +18 +18 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1818_2x09-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1818 (compatible alternatives: 43045-1819, 43045-1820), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +20 +19 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2000_2x10_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2000 (compatible alternatives: 43045-2001, 43045-2002), 10 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +20 +20 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2010_2x10-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2010 (compatible alternatives: 43045-2011, 43045-2009), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +22 +21 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2012_2x10_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2012 (compatible alternatives: 43045-2013, 43045-2024), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +20 +20 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2015_2x10_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2015 (compatible alternatives: 43045-2016, 43045-2017), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +20 +20 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2018_2x10-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2018 (compatible alternatives: 43045-2019, 43045-2020), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +22 +21 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2200_2x11_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2200 (compatible alternatives: 43045-2201, 43045-2202), 11 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +22 +22 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2210_2x11-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2210 (compatible alternatives: 43045-2211, 43045-2209), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +24 +23 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2212_2x11_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2212 (compatible alternatives: 43045-2213, 43045-2224), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +22 +22 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2215_2x11_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2215 (compatible alternatives: 43045-2216, 43045-2217), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +22 +22 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2218_2x11-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2218 (compatible alternatives: 43045-2219, 43045-2220), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +24 +23 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2400_2x12_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2400 (compatible alternatives: 43045-2401, 43045-2402), 12 Pins per row (https://www.molex.com/pdm_docs/sd/430450200_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +24 +24 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2410_2x12-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2410 (compatible alternatives: 43045-2411, 43045-2409), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +26 +25 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2412_2x12_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2412 (compatible alternatives: 43045-2413, 43045-2424), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +24 +24 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2415_2x12_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2415 (compatible alternatives: 43045-2416, 43045-2417), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +24 +24 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2418_2x12-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2418 (compatible alternatives: 43045-2419, 43045-2420), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +26 +25 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0200_1x02_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0200 (compatible alternatives: 43650-0201, 43650-0202), 2 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0215_1x02_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0215 (compatible alternatives: 43650-0216, 43650-0217), 2 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0300_1x03_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0300 (compatible alternatives: 43650-0301, 43650-0302), 3 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +3 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0315_1x03_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0315 (compatible alternatives: 43650-0316, 43650-0317), 3 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +3 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0400_1x04_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0400 (compatible alternatives: 43650-0401, 43650-0402), 4 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0415_1x04_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0415 (compatible alternatives: 43650-0416, 43650-0417), 4 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0500_1x05_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0500 (compatible alternatives: 43650-0501, 43650-0502), 5 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +5 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0515_1x05_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0515 (compatible alternatives: 43650-0516, 43650-0517), 5 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +5 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0600_1x06_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0600 (compatible alternatives: 43650-0601, 43650-0602), 6 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0615_1x06_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0615 (compatible alternatives: 43650-0616, 43650-0617), 6 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0700_1x07_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0700 (compatible alternatives: 43650-0701, 43650-0702), 7 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +7 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0715_1x07_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0715 (compatible alternatives: 43650-0716, 43650-0717), 7 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +7 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0800_1x08_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0800 (compatible alternatives: 43650-0801, 43650-0802), 8 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0815_1x08_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0815 (compatible alternatives: 43650-0816, 43650-0817), 8 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0900_1x09_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0900 (compatible alternatives: 43650-0901, 43650-0902), 9 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +9 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0915_1x09_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0915 (compatible alternatives: 43650-0916, 43650-0917), 9 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +9 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1000_1x10_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-1000 (compatible alternatives: 43650-1001, 43650-1002), 10 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1015_1x10_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-1015 (compatible alternatives: 43650-1016, 43650-1017), 10 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1100_1x11_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-1100 (compatible alternatives: 43650-1101, 43650-1102), 11 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +11 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1115_1x11_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-1115 (compatible alternatives: 43650-1116, 43650-1117), 11 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +11 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1200_1x12_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-1200 (compatible alternatives: 43650-1201, 43650-1202), 12 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1215_1x12_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-1215 (compatible alternatives: 43650-1216, 43650-1217), 12 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Latch_53253-0270_1x02_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0270 (compatible alternatives: 53253-0250), 2 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Latch_53253-0370_1x03_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0370 (compatible alternatives: 53253-0350), 3 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +3 +3 +Connector_Molex +Molex_Micro-Latch_53253-0470_1x04_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0470 (compatible alternatives: 53253-0450), 4 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Latch_53253-0570_1x05_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0570 (compatible alternatives: 53253-0550), 5 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +5 +5 +Connector_Molex +Molex_Micro-Latch_53253-0670_1x06_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0670 (compatible alternatives: 53253-0650), 6 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Latch_53253-0770_1x07_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0770 (compatible alternatives: 53253-0750), 7 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +7 +7 +Connector_Molex +Molex_Micro-Latch_53253-0870_1x08_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0870 (compatible alternatives: 53253-0850), 8 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Latch_53253-0970_1x09_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0970 (compatible alternatives: 53253-0950), 9 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +9 +9 +Connector_Molex +Molex_Micro-Latch_53253-1070_1x10_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1070 (compatible alternatives: 53253-1050), 10 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Latch_53253-1170_1x11_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1170 (compatible alternatives: 53253-1150), 11 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +11 +11 +Connector_Molex +Molex_Micro-Latch_53253-1270_1x12_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1270 (compatible alternatives: 53253-1250), 12 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Latch_53253-1370_1x13_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1370 (compatible alternatives: 53253-1350), 13 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +13 +13 +Connector_Molex +Molex_Micro-Latch_53253-1470_1x14_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1470 (compatible alternatives: 53253-1450), 14 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +14 +14 +Connector_Molex +Molex_Micro-Latch_53253-1570_1x15_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1570 (compatible alternatives: 53253-1550), 15 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +15 +15 +Connector_Molex +Molex_Micro-Latch_53254-0270_1x02_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0270 (compatible alternatives: 53254-0250), 2 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +2 +2 +Connector_Molex +Molex_Micro-Latch_53254-0370_1x03_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0370 (compatible alternatives: 53254-0350), 3 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +3 +3 +Connector_Molex +Molex_Micro-Latch_53254-0470_1x04_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0470 (compatible alternatives: 53254-0450), 4 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +4 +4 +Connector_Molex +Molex_Micro-Latch_53254-0570_1x05_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0570 (compatible alternatives: 53254-0550), 5 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +5 +5 +Connector_Molex +Molex_Micro-Latch_53254-0670_1x06_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0670 (compatible alternatives: 53254-0650), 6 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +6 +6 +Connector_Molex +Molex_Micro-Latch_53254-0770_1x07_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0770 (compatible alternatives: 53254-0750), 7 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +7 +7 +Connector_Molex +Molex_Micro-Latch_53254-0870_1x08_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0870 (compatible alternatives: 53254-0850), 8 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +8 +8 +Connector_Molex +Molex_Micro-Latch_53254-0970_1x09_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0970 (compatible alternatives: 53254-0950), 9 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +9 +9 +Connector_Molex +Molex_Micro-Latch_53254-1070_1x10_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1070 (compatible alternatives: 53254-1050), 10 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +10 +10 +Connector_Molex +Molex_Micro-Latch_53254-1170_1x11_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1170 (compatible alternatives: 53254-1150), 11 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +11 +11 +Connector_Molex +Molex_Micro-Latch_53254-1270_1x12_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1270 (compatible alternatives: 53254-1250), 12 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +12 +12 +Connector_Molex +Molex_Micro-Latch_53254-1370_1x13_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1370 (compatible alternatives: 53254-1350), 13 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +13 +13 +Connector_Molex +Molex_Micro-Latch_53254-1470_1x14_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1470 (compatible alternatives: 53254-1450), 14 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +14 +14 +Connector_Molex +Molex_Micro-Latch_53254-1570_1x15_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1570 (compatible alternatives: 53254-1550), 15 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +15 +15 +Connector_Molex +Molex_MicroClasp_55932-0210_1x02_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0210, with PCB locator, 2 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +2 +2 +Connector_Molex +Molex_MicroClasp_55932-0230_1x02_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0230, 2 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +2 +2 +Connector_Molex +Molex_MicroClasp_55932-0310_1x03_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0310, with PCB locator, 3 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +3 +3 +Connector_Molex +Molex_MicroClasp_55932-0330_1x03_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0330, 3 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +3 +3 +Connector_Molex +Molex_MicroClasp_55932-0410_1x04_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0410, with PCB locator, 4 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +4 +4 +Connector_Molex +Molex_MicroClasp_55932-0430_1x04_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0430, 4 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +4 +4 +Connector_Molex +Molex_MicroClasp_55932-0510_1x05_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0510, with PCB locator, 5 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +5 +5 +Connector_Molex +Molex_MicroClasp_55932-0530_1x05_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0530, 5 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +5 +5 +Connector_Molex +Molex_MicroClasp_55932-0610_1x06_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0610, with PCB locator, 6 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +6 +6 +Connector_Molex +Molex_MicroClasp_55932-0630_1x06_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0630, 6 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +6 +6 +Connector_Molex +Molex_MicroClasp_55932-0710_1x07_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0710, with PCB locator, 7 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +7 +7 +Connector_Molex +Molex_MicroClasp_55932-0730_1x07_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0730, 7 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +7 +7 +Connector_Molex +Molex_MicroClasp_55932-0810_1x08_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0810, with PCB locator, 8 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +8 +8 +Connector_Molex +Molex_MicroClasp_55932-0830_1x08_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0830, 8 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +8 +8 +Connector_Molex +Molex_MicroClasp_55932-0910_1x09_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0910, with PCB locator, 9 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +9 +9 +Connector_Molex +Molex_MicroClasp_55932-0930_1x09_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0930, 9 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +9 +9 +Connector_Molex +Molex_MicroClasp_55932-1010_1x10_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1010, with PCB locator, 10 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +10 +10 +Connector_Molex +Molex_MicroClasp_55932-1030_1x10_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1030, 10 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +10 +10 +Connector_Molex +Molex_MicroClasp_55932-1110_1x11_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1110, with PCB locator, 11 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +11 +11 +Connector_Molex +Molex_MicroClasp_55932-1130_1x11_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1130, 11 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +11 +11 +Connector_Molex +Molex_MicroClasp_55932-1210_1x12_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1210, with PCB locator, 12 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +12 +12 +Connector_Molex +Molex_MicroClasp_55932-1230_1x12_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1230, 12 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +12 +12 +Connector_Molex +Molex_MicroClasp_55932-1310_1x13_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1310, with PCB locator, 13 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +13 +13 +Connector_Molex +Molex_MicroClasp_55932-1330_1x13_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1330, 13 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +13 +13 +Connector_Molex +Molex_MicroClasp_55932-1410_1x14_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1410, with PCB locator, 14 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +14 +14 +Connector_Molex +Molex_MicroClasp_55932-1430_1x14_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1430, 14 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +14 +14 +Connector_Molex +Molex_MicroClasp_55932-1510_1x15_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1510, with PCB locator, 15 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +15 +15 +Connector_Molex +Molex_MicroClasp_55932-1530_1x15_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1530, 15 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +15 +15 +Connector_Molex +Molex_Mini-Fit_Jr_5566-02A2_2x01_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-02A2, example for new mpn: 39-28-902x, 1 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5566-02A_2x01_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-02A, example for new mpn: 39-28-x02x, 1 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5566-04A2_2x02_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-04A2, example for new mpn: 39-28-904x, 2 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5566-04A_2x02_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-04A, example for new mpn: 39-28-x04x, 2 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5566-06A2_2x03_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-06A2, example for new mpn: 39-28-906x, 3 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5566-06A_2x03_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-06A, example for new mpn: 39-28-x06x, 3 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5566-08A2_2x04_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-08A2, example for new mpn: 39-28-908x, 4 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5566-08A_2x04_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-08A, example for new mpn: 39-28-x08x, 4 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5566-10A2_2x05_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-10A2, example for new mpn: 39-28-910x, 5 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5566-10A_2x05_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-10A, example for new mpn: 39-28-x10x, 5 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5566-12A2_2x06_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-12A2, example for new mpn: 39-28-912x, 6 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5566-12A_2x06_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-12A, example for new mpn: 39-28-x12x, 6 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5566-14A2_2x07_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-14A2, example for new mpn: 39-28-914x, 7 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5566-14A_2x07_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-14A, example for new mpn: 39-28-x14x, 7 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5566-16A2_2x08_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-16A2, example for new mpn: 39-28-916x, 8 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5566-16A_2x08_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-16A, example for new mpn: 39-28-x16x, 8 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5566-18A2_2x09_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-18A2, example for new mpn: 39-28-918x, 9 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5566-18A_2x09_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-18A, example for new mpn: 39-28-x18x, 9 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5566-20A2_2x10_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-20A2, example for new mpn: 39-28-920x, 10 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5566-20A_2x10_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-20A, example for new mpn: 39-28-x20x, 10 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5566-22A2_2x11_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-22A2, example for new mpn: 39-28-922x, 11 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5566-22A_2x11_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-22A, example for new mpn: 39-28-x22x, 11 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5566-24A2_2x12_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-24A2, example for new mpn: 39-28-924x, 12 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Jr_5566-24A_2x12_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-24A, example for new mpn: 39-28-x24x, 12 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Jr_5569-02A1_2x01_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-02A1, example for new mpn: 39-29-4029, 1 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5569-02A2_2x01_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-02A2, example for new mpn: 39-30-0020, 1 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5569-04A1_2x02_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-04A1, example for new mpn: 39-29-4049, 2 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5569-04A2_2x02_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-04A2, example for new mpn: 39-30-0040, 2 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5569-06A1_2x03_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-06A1, example for new mpn: 39-29-4069, 3 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5569-06A2_2x03_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-06A2, example for new mpn: 39-30-0060, 3 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5569-08A1_2x04_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-08A1, example for new mpn: 39-29-4089, 4 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5569-08A2_2x04_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-08A2, example for new mpn: 39-30-0080, 4 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5569-10A1_2x05_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-10A1, example for new mpn: 39-29-4109, 5 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5569-10A2_2x05_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-10A2, example for new mpn: 39-30-0100, 5 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5569-12A1_2x06_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-12A1, example for new mpn: 39-29-4129, 6 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5569-12A2_2x06_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-12A2, example for new mpn: 39-30-0120, 6 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5569-14A1_2x07_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-14A1, example for new mpn: 39-29-4149, 7 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5569-14A2_2x07_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-14A2, example for new mpn: 39-30-0140, 7 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5569-16A1_2x08_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-16A1, example for new mpn: 39-29-4169, 8 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5569-16A2_2x08_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-16A2, example for new mpn: 39-30-0160, 8 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5569-18A1_2x09_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-18A1, example for new mpn: 39-29-4189, 9 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5569-18A2_2x09_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-18A2, example for new mpn: 39-30-0180, 9 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5569-20A1_2x10_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-20A1, example for new mpn: 39-29-4209, 10 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5569-20A2_2x10_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-20A2, example for new mpn: 39-30-0200, 10 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5569-22A1_2x11_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-22A1, example for new mpn: 39-29-4229, 11 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5569-22A2_2x11_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-22A2, example for new mpn: 39-30-0220, 11 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5569-24A1_2x12_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-24A1, example for new mpn: 39-29-4249, 12 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Jr_5569-24A2_2x12_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-24A2, example for new mpn: 39-30-0240, 12 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Sr_42819-22XX_1x02_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-22XX, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +6 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42819-22XX_1x02_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-22XX, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +32 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42819-32XX_1x03_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-32XX, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +8 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42819-32XX_1x03_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-32XX, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +47 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42819-42XX_1x04_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-42XX, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +10 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42819-42XX_1x04_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-42XX, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +62 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42819-52XX_1x05_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-52XX, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +12 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42819-52XX_1x05_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-52XX, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +77 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42819-62XX_1x06_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-62XX, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +14 +6 +Connector_Molex +Molex_Mini-Fit_Sr_42819-62XX_1x06_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-62XX, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +92 +6 +Connector_Molex +Molex_Mini-Fit_Sr_42820-22XX_1x02_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-22XX, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +6 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42820-22XX_1x02_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-22XX, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +32 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42820-32XX_1x03_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-32XX, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +8 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42820-32XX_1x03_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-32XX, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +47 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42820-42XX_1x04_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-42XX, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +10 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42820-42XX_1x04_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-42XX, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +62 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42820-52XX_1x05_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-52XX, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +12 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42820-52XX_1x05_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-52XX, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +77 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42820-62XX_1x06_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-62XX, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +14 +6 +Connector_Molex +Molex_Mini-Fit_Sr_42820-62XX_1x06_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-62XX, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +92 +6 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx06_2x03_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx06, 3 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +14 +6 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx06_2x03_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx06, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +92 +6 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx08_2x04_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx08, 4 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +18 +8 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx08_2x04_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx08, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +122 +8 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx10_2x05_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx10, 5 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +22 +10 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx10_2x05_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx10, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +152 +10 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx12_2x06_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +26 +12 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx12_2x06_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx12, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +182 +12 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx14_2x07_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx14, 7 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +30 +14 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx14_2x07_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx14, With thermal vias in pads, 7 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +212 +14 +Connector_Molex +Molex_Nano-Fit_105309-xx02_1x02_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx02, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +2 +2 +Connector_Molex +Molex_Nano-Fit_105309-xx03_1x03_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx03, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +3 +3 +Connector_Molex +Molex_Nano-Fit_105309-xx04_1x04_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx04, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105309-xx05_1x05_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx05, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +5 +5 +Connector_Molex +Molex_Nano-Fit_105309-xx06_1x06_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx06, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105309-xx07_1x07_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx07, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +7 +7 +Connector_Molex +Molex_Nano-Fit_105309-xx08_1x08_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx08, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105310-xx04_2x02_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx04, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105310-xx06_2x03_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx06, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105310-xx08_2x04_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx08, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105310-xx10_2x05_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx10, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +10 +10 +Connector_Molex +Molex_Nano-Fit_105310-xx12_2x06_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +12 +12 +Connector_Molex +Molex_Nano-Fit_105310-xx14_2x07_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx14, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +14 +14 +Connector_Molex +Molex_Nano-Fit_105310-xx16_2x08_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx16, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +16 +16 +Connector_Molex +Molex_Nano-Fit_105313-xx02_1x02_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx02, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +2 +2 +Connector_Molex +Molex_Nano-Fit_105313-xx03_1x03_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx03, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +3 +3 +Connector_Molex +Molex_Nano-Fit_105313-xx04_1x04_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx04, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105313-xx05_1x05_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx05, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +5 +5 +Connector_Molex +Molex_Nano-Fit_105313-xx06_1x06_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx06, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105313-xx07_1x07_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx07, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +7 +7 +Connector_Molex +Molex_Nano-Fit_105313-xx08_1x08_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx08, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105314-xx04_2x02_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx04, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105314-xx06_2x03_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx06, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105314-xx08_2x04_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx08, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105314-xx10_2x05_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx10, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +10 +10 +Connector_Molex +Molex_Nano-Fit_105314-xx12_2x06_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +12 +12 +Connector_Molex +Molex_Nano-Fit_105314-xx14_2x07_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx14, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +14 +14 +Connector_Molex +Molex_Nano-Fit_105314-xx16_2x08_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx16, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +16 +16 +Connector_Molex +Molex_Panelmate_53780-0270_1x02-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0270 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +4 +3 +Connector_Molex +Molex_Panelmate_53780-0370_1x03-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0370 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +5 +4 +Connector_Molex +Molex_Panelmate_53780-0470_1x04-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0470 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +6 +5 +Connector_Molex +Molex_Panelmate_53780-0570_1x05-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0570 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +7 +6 +Connector_Molex +Molex_Panelmate_53780-0670_1x06-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0670 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +8 +7 +Connector_Molex +Molex_Panelmate_53780-0770_1x07-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0770 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +9 +8 +Connector_Molex +Molex_Panelmate_53780-0870_1x08-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0870 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +10 +9 +Connector_Molex +Molex_Panelmate_53780-0970_1x09-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0970 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +11 +10 +Connector_Molex +Molex_Panelmate_53780-1070_1x10-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1070 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +12 +11 +Connector_Molex +Molex_Panelmate_53780-1270_1x12-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1270 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +14 +13 +Connector_Molex +Molex_Panelmate_53780-1470_1x14-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1470 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +16 +15 +Connector_Molex +Molex_Panelmate_53780-1570_1x15-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1570 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +17 +16 +Connector_Molex +Molex_Panelmate_53780-1870_1x18-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1870 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +20 +19 +Connector_Molex +Molex_Panelmate_53780-3070_1x30-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-3070 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +32 +31 +Connector_Molex +Molex_Pico-Clasp_202396-0207_1x02-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0207 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +4 +3 +Connector_Molex +Molex_Pico-Clasp_202396-0307_1x03-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0307 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +5 +4 +Connector_Molex +Molex_Pico-Clasp_202396-0407_1x04-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0407 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +6 +5 +Connector_Molex +Molex_Pico-Clasp_202396-0507_1x05-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0507 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +7 +6 +Connector_Molex +Molex_Pico-Clasp_202396-0607_1x06-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0607 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +8 +7 +Connector_Molex +Molex_Pico-Clasp_202396-0707_1x07-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0707 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +9 +8 +Connector_Molex +Molex_Pico-Clasp_202396-0807_1x08-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0807 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +10 +9 +Connector_Molex +Molex_Pico-Clasp_202396-0907_1x09-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0907 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +11 +10 +Connector_Molex +Molex_Pico-Clasp_202396-1007_1x10-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1007 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +12 +11 +Connector_Molex +Molex_Pico-Clasp_202396-1107_1x11-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1107 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +13 +12 +Connector_Molex +Molex_Pico-Clasp_202396-1207_1x12-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1207 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +14 +13 +Connector_Molex +Molex_Pico-Clasp_202396-1307_1x13-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1307 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +15 +14 +Connector_Molex +Molex_Pico-Clasp_202396-1407_1x14-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1407 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +16 +15 +Connector_Molex +Molex_Pico-Clasp_202396-1507_1x15-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1507 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +17 +16 +Connector_Molex +Molex_Pico-Clasp_501331-0207_1x02-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0207 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +4 +3 +Connector_Molex +Molex_Pico-Clasp_501331-0307_1x03-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0307 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +5 +4 +Connector_Molex +Molex_Pico-Clasp_501331-0407_1x04-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0407 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +6 +5 +Connector_Molex +Molex_Pico-Clasp_501331-0507_1x05-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0507 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +7 +6 +Connector_Molex +Molex_Pico-Clasp_501331-0607_1x06-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0607 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +8 +7 +Connector_Molex +Molex_Pico-Clasp_501331-0707_1x07-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0707 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +9 +8 +Connector_Molex +Molex_Pico-Clasp_501331-0807_1x08-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0807 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +10 +9 +Connector_Molex +Molex_Pico-Clasp_501331-0907_1x09-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0907 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +11 +10 +Connector_Molex +Molex_Pico-Clasp_501331-1007_1x10-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1007 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +12 +11 +Connector_Molex +Molex_Pico-Clasp_501331-1107_1x11-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1107 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +13 +12 +Connector_Molex +Molex_Pico-Clasp_501331-1207_1x12-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1207 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +14 +13 +Connector_Molex +Molex_Pico-Clasp_501331-1307_1x13-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1307 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +15 +14 +Connector_Molex +Molex_Pico-Clasp_501331-1407_1x14-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1407 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +16 +15 +Connector_Molex +Molex_Pico-Clasp_501331-1507_1x15-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1507 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +17 +16 +Connector_Molex +Molex_Pico-EZmate_78171-0002_1x02-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0002 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +4 +3 +Connector_Molex +Molex_Pico-EZmate_78171-0003_1x03-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0003 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +5 +4 +Connector_Molex +Molex_Pico-EZmate_78171-0004_1x04-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0004 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +6 +5 +Connector_Molex +Molex_Pico-EZmate_78171-0005_1x05-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0005 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +7 +6 +Connector_Molex +Molex_Pico-EZmate_Slim_202656-0021_1x02-1MP_P1.20mm_Vertical +Molex Pico-EZmate_Slim series connector, 202656-0021 (http://www.molex.com/pdm_docs/sd/2026560021_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate_Slim side entry +0 +4 +3 +Connector_Molex +Molex_Pico-Lock_504050-0491_1x04-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0491 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +6 +5 +Connector_Molex +Molex_Pico-Lock_504050-0591_1x05-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0591 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +7 +6 +Connector_Molex +Molex_Pico-Lock_504050-0691_1x06-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0691 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +8 +7 +Connector_Molex +Molex_Pico-Lock_504050-0791_1x07-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0791 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +9 +8 +Connector_Molex +Molex_Pico-Lock_504050-0891_1x08-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0891 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +10 +9 +Connector_Molex +Molex_Pico-Lock_504050-1091_1x10-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-1091 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +12 +11 +Connector_Molex +Molex_Pico-Lock_504050-1291_1x12-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-1291 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock top entry +0 +14 +13 +Connector_Molex +Molex_PicoBlade_53047-0210_1x02_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0210, 2 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +2 +2 +Connector_Molex +Molex_PicoBlade_53047-0310_1x03_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0310, 3 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +3 +3 +Connector_Molex +Molex_PicoBlade_53047-0410_1x04_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0410, 4 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +4 +4 +Connector_Molex +Molex_PicoBlade_53047-0510_1x05_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0510, 5 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +5 +5 +Connector_Molex +Molex_PicoBlade_53047-0610_1x06_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0610, 6 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +6 +6 +Connector_Molex +Molex_PicoBlade_53047-0710_1x07_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0710, 7 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +7 +7 +Connector_Molex +Molex_PicoBlade_53047-0810_1x08_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0810, 8 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +8 +8 +Connector_Molex +Molex_PicoBlade_53047-0910_1x09_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0910, 9 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +9 +9 +Connector_Molex +Molex_PicoBlade_53047-1010_1x10_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1010, 10 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +10 +10 +Connector_Molex +Molex_PicoBlade_53047-1110_1x11_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1110, 11 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +11 +11 +Connector_Molex +Molex_PicoBlade_53047-1210_1x12_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1210, 12 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +12 +12 +Connector_Molex +Molex_PicoBlade_53047-1310_1x13_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1310, 13 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +13 +13 +Connector_Molex +Molex_PicoBlade_53047-1410_1x14_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1410, 14 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +14 +14 +Connector_Molex +Molex_PicoBlade_53047-1510_1x15_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1510, 15 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +15 +15 +Connector_Molex +Molex_PicoBlade_53048-0210_1x02_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0210, 2 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +2 +2 +Connector_Molex +Molex_PicoBlade_53048-0310_1x03_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0310, 3 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +3 +3 +Connector_Molex +Molex_PicoBlade_53048-0410_1x04_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0410, 4 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +4 +4 +Connector_Molex +Molex_PicoBlade_53048-0510_1x05_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0510, 5 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +5 +5 +Connector_Molex +Molex_PicoBlade_53048-0610_1x06_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0610, 6 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +6 +6 +Connector_Molex +Molex_PicoBlade_53048-0710_1x07_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0710, 7 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +7 +7 +Connector_Molex +Molex_PicoBlade_53048-0810_1x08_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0810, 8 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +8 +8 +Connector_Molex +Molex_PicoBlade_53048-0910_1x09_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0910, 9 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +9 +9 +Connector_Molex +Molex_PicoBlade_53048-1010_1x10_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1010, 10 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +10 +10 +Connector_Molex +Molex_PicoBlade_53048-1110_1x11_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1110, 11 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +11 +11 +Connector_Molex +Molex_PicoBlade_53048-1210_1x12_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1210, 12 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +12 +12 +Connector_Molex +Molex_PicoBlade_53048-1310_1x13_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1310, 13 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +13 +13 +Connector_Molex +Molex_PicoBlade_53048-1410_1x14_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1410, 14 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +14 +14 +Connector_Molex +Molex_PicoBlade_53048-1510_1x15_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1510, 15 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +15 +15 +Connector_Molex +Molex_PicoBlade_53261-0271_1x02-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0271 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +4 +3 +Connector_Molex +Molex_PicoBlade_53261-0371_1x03-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0371 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +5 +4 +Connector_Molex +Molex_PicoBlade_53261-0471_1x04-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0471 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +6 +5 +Connector_Molex +Molex_PicoBlade_53261-0571_1x05-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0571 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +7 +6 +Connector_Molex +Molex_PicoBlade_53261-0671_1x06-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0671 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +8 +7 +Connector_Molex +Molex_PicoBlade_53261-0771_1x07-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0771 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +9 +8 +Connector_Molex +Molex_PicoBlade_53261-0871_1x08-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0871 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +10 +9 +Connector_Molex +Molex_PicoBlade_53261-0971_1x09-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0971 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +11 +10 +Connector_Molex +Molex_PicoBlade_53261-1071_1x10-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1071 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +12 +11 +Connector_Molex +Molex_PicoBlade_53261-1171_1x11-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1171 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +13 +12 +Connector_Molex +Molex_PicoBlade_53261-1271_1x12-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1271 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +14 +13 +Connector_Molex +Molex_PicoBlade_53261-1371_1x13-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1371 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +15 +14 +Connector_Molex +Molex_PicoBlade_53261-1471_1x14-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1471 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +16 +15 +Connector_Molex +Molex_PicoBlade_53261-1571_1x15-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1571 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +17 +16 +Connector_Molex +Molex_PicoBlade_53261-1771_1x17-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1771 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +19 +18 +Connector_Molex +Molex_PicoBlade_53398-0271_1x02-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0271 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +4 +3 +Connector_Molex +Molex_PicoBlade_53398-0371_1x03-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0371 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +5 +4 +Connector_Molex +Molex_PicoBlade_53398-0471_1x04-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0471 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +6 +5 +Connector_Molex +Molex_PicoBlade_53398-0571_1x05-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0571 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +7 +6 +Connector_Molex +Molex_PicoBlade_53398-0671_1x06-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0671 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +8 +7 +Connector_Molex +Molex_PicoBlade_53398-0771_1x07-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0771 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +9 +8 +Connector_Molex +Molex_PicoBlade_53398-0871_1x08-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0871 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +10 +9 +Connector_Molex +Molex_PicoBlade_53398-0971_1x09-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0971 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +11 +10 +Connector_Molex +Molex_PicoBlade_53398-1071_1x10-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1071 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +12 +11 +Connector_Molex +Molex_PicoBlade_53398-1171_1x11-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1171 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +13 +12 +Connector_Molex +Molex_PicoBlade_53398-1271_1x12-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1271 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +14 +13 +Connector_Molex +Molex_PicoBlade_53398-1371_1x13-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1371 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +15 +14 +Connector_Molex +Molex_PicoBlade_53398-1471_1x14-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1471 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +16 +15 +Connector_Molex +Molex_PicoBlade_53398-1571_1x15-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1571 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +17 +16 +Connector_Molex +Molex_Picoflex_90325-0004_2x02_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0004, 4 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +4 +4 +Connector_Molex +Molex_Picoflex_90325-0006_2x03_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0006, 6 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +6 +6 +Connector_Molex +Molex_Picoflex_90325-0008_2x04_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0008, 8 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +8 +8 +Connector_Molex +Molex_Picoflex_90325-0010_2x05_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0010, 10 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +10 +10 +Connector_Molex +Molex_Picoflex_90325-0012_2x06_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0012, 12 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +12 +12 +Connector_Molex +Molex_Picoflex_90325-0014_2x07_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0014, 14 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +14 +14 +Connector_Molex +Molex_Picoflex_90325-0016_2x08_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0016, 16 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +16 +16 +Connector_Molex +Molex_Picoflex_90325-0018_2x09_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0018, 18 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +18 +18 +Connector_Molex +Molex_Picoflex_90325-0020_2x10_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0020, 20 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +20 +20 +Connector_Molex +Molex_Picoflex_90325-0022_2x11_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0022, 22 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +22 +22 +Connector_Molex +Molex_Picoflex_90325-0024_2x12_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0024, 24 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +24 +24 +Connector_Molex +Molex_Picoflex_90325-0026_2x13_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0026, 26 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +26 +26 +Connector_Molex +Molex_Picoflex_90814-0004_2x02_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0004, 4 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +4 +4 +Connector_Molex +Molex_Picoflex_90814-0006_2x03_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0006, 6 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +6 +6 +Connector_Molex +Molex_Picoflex_90814-0008_2x04_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0008, 8 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +8 +8 +Connector_Molex +Molex_Picoflex_90814-0010_2x05_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0010, 10 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +10 +10 +Connector_Molex +Molex_Picoflex_90814-0012_2x06_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0012, 12 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +12 +12 +Connector_Molex +Molex_Picoflex_90814-0014_2x07_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0014, 14 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +14 +14 +Connector_Molex +Molex_Picoflex_90814-0016_2x08_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0016, 16 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +16 +16 +Connector_Molex +Molex_Picoflex_90814-0018_2x09_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0018, 18 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +18 +18 +Connector_Molex +Molex_Picoflex_90814-0020_2x10_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0020, 20 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +20 +20 +Connector_Molex +Molex_Picoflex_90814-0022_2x11_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0022, 22 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +22 +22 +Connector_Molex +Molex_Picoflex_90814-0024_2x12_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0024, 24 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +24 +24 +Connector_Molex +Molex_Picoflex_90814-0026_2x13_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0026, 26 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +26 +26 +Connector_Molex +Molex_Sabre_43160-0102_1x02_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +4 +2 +Connector_Molex +Molex_Sabre_43160-0102_1x02_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +30 +2 +Connector_Molex +Molex_Sabre_43160-0103_1x03_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +6 +3 +Connector_Molex +Molex_Sabre_43160-0103_1x03_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +45 +3 +Connector_Molex +Molex_Sabre_43160-0104_1x04_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +8 +4 +Connector_Molex +Molex_Sabre_43160-0104_1x04_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +60 +4 +Connector_Molex +Molex_Sabre_43160-0105_1x05_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +10 +5 +Connector_Molex +Molex_Sabre_43160-0105_1x05_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +75 +5 +Connector_Molex +Molex_Sabre_43160-0106_1x06_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +12 +6 +Connector_Molex +Molex_Sabre_43160-0106_1x06_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +90 +6 +Connector_Molex +Molex_Sabre_43160-1102_1x02_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +6 +2 +Connector_Molex +Molex_Sabre_43160-1102_1x02_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +32 +2 +Connector_Molex +Molex_Sabre_43160-1103_1x03_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +8 +3 +Connector_Molex +Molex_Sabre_43160-1103_1x03_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +47 +3 +Connector_Molex +Molex_Sabre_43160-1104_1x04_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +10 +4 +Connector_Molex +Molex_Sabre_43160-1104_1x04_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +62 +4 +Connector_Molex +Molex_Sabre_43160-1105_1x05_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +12 +5 +Connector_Molex +Molex_Sabre_43160-1105_1x05_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +77 +5 +Connector_Molex +Molex_Sabre_43160-1106_1x06_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +14 +6 +Connector_Molex +Molex_Sabre_43160-1106_1x06_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +92 +6 +Connector_Molex +Molex_Sabre_43160-2102_1x02_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +6 +2 +Connector_Molex +Molex_Sabre_43160-2102_1x02_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +32 +2 +Connector_Molex +Molex_Sabre_43160-2103_1x03_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +8 +3 +Connector_Molex +Molex_Sabre_43160-2103_1x03_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +47 +3 +Connector_Molex +Molex_Sabre_43160-2104_1x04_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +10 +4 +Connector_Molex +Molex_Sabre_43160-2104_1x04_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +62 +4 +Connector_Molex +Molex_Sabre_43160-2105_1x05_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +12 +5 +Connector_Molex +Molex_Sabre_43160-2105_1x05_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +77 +5 +Connector_Molex +Molex_Sabre_43160-2106_1x06_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +14 +6 +Connector_Molex +Molex_Sabre_43160-2106_1x06_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +92 +6 +Connector_Molex +Molex_Sabre_46007-1102_1x02_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +4 +2 +Connector_Molex +Molex_Sabre_46007-1102_1x02_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +30 +2 +Connector_Molex +Molex_Sabre_46007-1103_1x03_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +6 +3 +Connector_Molex +Molex_Sabre_46007-1103_1x03_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +45 +3 +Connector_Molex +Molex_Sabre_46007-1104_1x04_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +8 +4 +Connector_Molex +Molex_Sabre_46007-1104_1x04_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +60 +4 +Connector_Molex +Molex_Sabre_46007-1105_1x05_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +10 +5 +Connector_Molex +Molex_Sabre_46007-1105_1x05_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +75 +5 +Connector_Molex +Molex_Sabre_46007-1106_1x06_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +12 +6 +Connector_Molex +Molex_Sabre_46007-1106_1x06_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +90 +6 +Connector_Molex +Molex_SlimStack_52991-0200_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0200, 20 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_52991-0300_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0300, 30 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_52991-0400_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0400, 40 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_52991-0500_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0500, 50 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_52991-0600_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0600, 60 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_52991-0700_2x35_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0700, 70 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +70 +70 +Connector_Molex +Molex_SlimStack_52991-0800_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0800, 80 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_54722-0164_2x08_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0164, 16 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +16 +16 +Connector_Molex +Molex_SlimStack_54722-0204_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0204, 20 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_54722-0224_2x11_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0224, 22 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_54722-0244_2x12_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0244, 24 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_54722-0304_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0304, 30 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_54722-0344_2x17_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0344, 34 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_54722-0404_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0404, 40 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_54722-0504_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0504, 50 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_54722-0604_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0604, 60 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_54722-0804_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0804, 80 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_55560-0161_2x08_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0161, 16 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +16 +16 +Connector_Molex +Molex_SlimStack_55560-0201_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0201, 20 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_55560-0221_2x11_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0221, 22 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_55560-0241_2x12_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0241, 24 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_55560-0301_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0301, 30 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_55560-0341_2x17_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0341, 34 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_55560-0401_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0401, 40 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_55560-0501_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0501, 50 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_55560-0601_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0601, 60 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_55560-0801_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0801, 80 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_501920-3001_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 501920-3001, 30 Pins (http://www.molex.com/pdm_docs/sd/5019204001_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_501920-4001_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 501920-4001, 40 Pins (http://www.molex.com/pdm_docs/sd/5019204001_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_501920-5001_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 501920-5001, 50 Pins (http://www.molex.com/pdm_docs/sd/5019204001_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_502426-0810_2x04_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-0810, 8 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +8 +8 +Connector_Molex +Molex_SlimStack_502426-1410_2x07_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-1410, 14 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +14 +14 +Connector_Molex +Molex_SlimStack_502426-2010_2x10_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2010, 20 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_502426-2210_2x11_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2210, 22 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_502426-2410_2x12_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2410, 24 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_502426-2610_2x13_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2610, 26 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +26 +26 +Connector_Molex +Molex_SlimStack_502426-3010_2x15_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-3010, 30 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_502426-3210_2x16_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-3210, 32 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +32 +32 +Connector_Molex +Molex_SlimStack_502426-3410_2x17_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-3410, 34 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_502426-4010_2x20_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-4010, 40 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_502426-4410_2x22_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-4410, 44 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +44 +44 +Connector_Molex +Molex_SlimStack_502426-5010_2x25_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-5010, 50 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_502426-6010_2x30_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-6010, 60 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_502426-6410_2x32_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-6410, 64 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +64 +64 +Connector_Molex +Molex_SlimStack_502426-8010_2x40_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-8010, 80 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_502430-0820_2x04_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-0820, 8 Pins (http://www.molex.com/pdm_docs/sd/5024300820_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +8 +8 +Connector_Molex +Molex_SlimStack_502430-1410_2x07_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-1410, 14 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +14 +14 +Connector_Molex +Molex_SlimStack_502430-2010_2x10_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2010, 20 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_502430-2210_2x11_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2210, 22 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_502430-2410_2x12_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2410, 24 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_502430-2610_2x13_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2610, 26 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +26 +26 +Connector_Molex +Molex_SlimStack_502430-3010_2x15_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-3010, 30 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_502430-3210_2x16_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-3210, 32 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +32 +32 +Connector_Molex +Molex_SlimStack_502430-3410_2x17_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-3410, 34 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_502430-4010_2x20_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-4010, 40 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_502430-4410_2x22_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-4410, 44 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +44 +44 +Connector_Molex +Molex_SlimStack_502430-5010_2x25_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-5010, 50 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_502430-6010_2x30_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-6010, 60 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_502430-6410_2x32_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-6410, 64 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +64 +64 +Connector_Molex +Molex_SlimStack_502430-8010_2x40_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-8010, 80 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SPOX_5267-02A_1x02_P2.50mm_Vertical +Molex SPOX Connector System, 5267-02A, 2 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +2 +2 +Connector_Molex +Molex_SPOX_5267-03A_1x03_P2.50mm_Vertical +Molex SPOX Connector System, 5267-03A, 3 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +3 +3 +Connector_Molex +Molex_SPOX_5267-04A_1x04_P2.50mm_Vertical +Molex SPOX Connector System, 5267-04A, 4 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +4 +4 +Connector_Molex +Molex_SPOX_5267-05A_1x05_P2.50mm_Vertical +Molex SPOX Connector System, 5267-05A, 5 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +5 +5 +Connector_Molex +Molex_SPOX_5267-06A_1x06_P2.50mm_Vertical +Molex SPOX Connector System, 5267-06A, 6 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +6 +6 +Connector_Molex +Molex_SPOX_5267-07A_1x07_P2.50mm_Vertical +Molex SPOX Connector System, 5267-07A, 7 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +7 +7 +Connector_Molex +Molex_SPOX_5267-08A_1x08_P2.50mm_Vertical +Molex SPOX Connector System, 5267-08A, 8 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +8 +8 +Connector_Molex +Molex_SPOX_5267-09A_1x09_P2.50mm_Vertical +Molex SPOX Connector System, 5267-09A, 9 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +9 +9 +Connector_Molex +Molex_SPOX_5267-10A_1x10_P2.50mm_Vertical +Molex SPOX Connector System, 5267-10A, 10 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +10 +10 +Connector_Molex +Molex_SPOX_5267-11A_1x11_P2.50mm_Vertical +Molex SPOX Connector System, 5267-11A, 11 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +11 +11 +Connector_Molex +Molex_SPOX_5267-12A_1x12_P2.50mm_Vertical +Molex SPOX Connector System, 5267-12A, 12 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +12 +12 +Connector_Molex +Molex_SPOX_5267-13A_1x13_P2.50mm_Vertical +Molex SPOX Connector System, 5267-13A, 13 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +13 +13 +Connector_Molex +Molex_SPOX_5267-14A_1x14_P2.50mm_Vertical +Molex SPOX Connector System, 5267-14A, 14 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +14 +14 +Connector_Molex +Molex_SPOX_5267-15A_1x15_P2.50mm_Vertical +Molex SPOX Connector System, 5267-15A, 15 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +15 +15 +Connector_Multicomp +Multicomp_MC9A12-1034_2x05_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +10 +10 +Connector_Multicomp +Multicomp_MC9A12-1434_2x07_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +14 +14 +Connector_Multicomp +Multicomp_MC9A12-1634_2x08_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +16 +16 +Connector_Multicomp +Multicomp_MC9A12-2034_2x10_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +20 +20 +Connector_Multicomp +Multicomp_MC9A12-2634_2x13_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +26 +26 +Connector_Multicomp +Multicomp_MC9A12-3434_2x17_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +34 +34 +Connector_Multicomp +Multicomp_MC9A12-4034_2x20_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +40 +40 +Connector_Multicomp +Multicomp_MC9A12-5034_2x25_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +50 +50 +Connector_Multicomp +Multicomp_MC9A12-6034_2x30_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +60 +60 +Connector_Multicomp +Multicomp_MC9A12-6434_2x32_P2.54mm_Vertical +http://www.farnell.com/datasheets/1520732.pdf +connector multicomp MC9A MC9A12 +0 +64 +64 +Connector_Multicomp +Multicomp_MC9A22-1034_2x05_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +10 +10 +Connector_Multicomp +Multicomp_MC9A22-1434_2x07_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +14 +14 +Connector_Multicomp +Multicomp_MC9A22-1634_2x08_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +16 +16 +Connector_Multicomp +Multicomp_MC9A22-2034_2x10_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +20 +20 +Connector_Multicomp +Multicomp_MC9A22-2634_2x13_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +26 +26 +Connector_Multicomp +Multicomp_MC9A22-3434_2x17_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +34 +34 +Connector_Multicomp +Multicomp_MC9A22-4034_2x20_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +40 +40 +Connector_Multicomp +Multicomp_MC9A22-5034_2x25_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +50 +50 +Connector_Multicomp +Multicomp_MC9A22-6034_2x30_P2.54mm_Horizontal +http://www.farnell.com/cad/360651.pdf +connector multicomp MC9A MC9A22 +0 +60 +60 +Connector_PCBEdge +4UCON_10156_2x40_P1.27mm_Socket_Horizontal +4UCON 10156 Card edge socket with 80 contacts (40 each side), through-hole, http://www.4uconnector.com/online/object/4udrawing/10156.pdf +4UCON 10156 Card edge socket with 80 contacts +0 +80 +80 +Connector_PCBEdge +BUS_AT +AT ISA 16 bits Bus Edge Connector +BUS ISA AT Edge connector +0 +98 +98 +Connector_PCBEdge +BUS_PCI +PCI bus Edge Connector +PCI bus Edge Connector +0 +240 +120 +Connector_PCBEdge +BUS_PCIexpress +PCIexpress Bus Edge Connector +PCIexpress Bus Edge Connector +0 +70 +36 +Connector_PCBEdge +Samtec_MECF-05-0_-L-DV_2x05_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +8 +8 +Connector_PCBEdge +Samtec_MECF-05-0_-NP-L-DV_2x05_P1.27mm_Edge +Highspeed card edge connector for PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +10 +10 +Connector_PCBEdge +Samtec_MECF-05-01-L-DV-WT_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +10 +8 +Connector_PCBEdge +Samtec_MECF-05-01-L-DV_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +8 +8 +Connector_PCBEdge +Samtec_MECF-05-01-NP-L-DV-WT_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +12 +10 +Connector_PCBEdge +Samtec_MECF-05-01-NP-L-DV_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +10 +10 +Connector_PCBEdge +Samtec_MECF-05-02-L-DV-WT_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +10 +8 +Connector_PCBEdge +Samtec_MECF-05-02-L-DV_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +8 +8 +Connector_PCBEdge +Samtec_MECF-05-02-NP-L-DV-WT_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +12 +10 +Connector_PCBEdge +Samtec_MECF-05-02-NP-L-DV_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +10 +10 +Connector_PCBEdge +Samtec_MECF-08-0_-L-DV_2x08_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +14 +14 +Connector_PCBEdge +Samtec_MECF-08-0_-NP-L-DV_2x08_P1.27mm_Edge +Highspeed card edge connector for PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +16 +16 +Connector_PCBEdge +Samtec_MECF-08-01-L-DV-WT_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +16 +14 +Connector_PCBEdge +Samtec_MECF-08-01-L-DV_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +14 +14 +Connector_PCBEdge +Samtec_MECF-08-01-NP-L-DV-WT_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +18 +16 +Connector_PCBEdge +Samtec_MECF-08-01-NP-L-DV_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +16 +16 +Connector_PCBEdge +Samtec_MECF-08-02-L-DV-WT_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +16 +14 +Connector_PCBEdge +Samtec_MECF-08-02-L-DV_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +14 +14 +Connector_PCBEdge +Samtec_MECF-08-02-NP-L-DV-WT_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +18 +16 +Connector_PCBEdge +Samtec_MECF-08-02-NP-L-DV_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +16 +16 +Connector_PCBEdge +Samtec_MECF-20-0_-L-DV_2x20_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +38 +38 +Connector_PCBEdge +Samtec_MECF-20-0_-NP-L-DV_2x20_P1.27mm_Edge +Highspeed card edge connector for PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +40 +40 +Connector_PCBEdge +Samtec_MECF-20-01-L-DV-WT_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +40 +38 +Connector_PCBEdge +Samtec_MECF-20-01-L-DV_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +38 +38 +Connector_PCBEdge +Samtec_MECF-20-01-NP-L-DV-WT_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +42 +40 +Connector_PCBEdge +Samtec_MECF-20-01-NP-L-DV_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +40 +40 +Connector_PCBEdge +Samtec_MECF-20-02-L-DV-WT_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +40 +38 +Connector_PCBEdge +Samtec_MECF-20-02-L-DV_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +38 +38 +Connector_PCBEdge +Samtec_MECF-20-02-NP-L-DV-WT_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +42 +40 +Connector_PCBEdge +Samtec_MECF-20-02-NP-L-DV_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +40 +40 +Connector_PCBEdge +Samtec_MECF-30-0_-L-DV_2x30_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +58 +58 +Connector_PCBEdge +Samtec_MECF-30-0_-NP-L-DV_2x30_P1.27mm_Edge +Highspeed card edge connector for PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +60 +60 +Connector_PCBEdge +Samtec_MECF-30-01-L-DV-WT_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +60 +58 +Connector_PCBEdge +Samtec_MECF-30-01-L-DV_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +58 +58 +Connector_PCBEdge +Samtec_MECF-30-01-NP-L-DV-WT_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +62 +60 +Connector_PCBEdge +Samtec_MECF-30-01-NP-L-DV_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +60 +60 +Connector_PCBEdge +Samtec_MECF-30-02-L-DV-WT_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +60 +58 +Connector_PCBEdge +Samtec_MECF-30-02-L-DV_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +58 +58 +Connector_PCBEdge +Samtec_MECF-30-02-NP-L-DV-WT_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +62 +60 +Connector_PCBEdge +Samtec_MECF-30-02-NP-L-DV_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +60 +60 +Connector_PCBEdge +Samtec_MECF-40-0_-L-DV_2x40_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +78 +78 +Connector_PCBEdge +Samtec_MECF-40-0_-NP-L-DV_2x40_P1.27mm_Edge +Highspeed card edge connector for PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +80 +80 +Connector_PCBEdge +Samtec_MECF-40-01-L-DV-WT_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +80 +78 +Connector_PCBEdge +Samtec_MECF-40-01-L-DV_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +78 +78 +Connector_PCBEdge +Samtec_MECF-40-01-NP-L-DV-WT_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +82 +80 +Connector_PCBEdge +Samtec_MECF-40-01-NP-L-DV_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +80 +80 +Connector_PCBEdge +Samtec_MECF-40-02-L-DV-WT_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +80 +78 +Connector_PCBEdge +Samtec_MECF-40-02-L-DV_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +78 +78 +Connector_PCBEdge +Samtec_MECF-40-02-NP-L-DV-WT_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +82 +80 +Connector_PCBEdge +Samtec_MECF-40-02-NP-L-DV_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +80 +80 +Connector_PCBEdge +Samtec_MECF-50-0_-L-DV_2x50_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +98 +98 +Connector_PCBEdge +Samtec_MECF-50-0_-NP-L-DV_2x50_P1.27mm_Edge +Highspeed card edge connector for PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +100 +100 +Connector_PCBEdge +Samtec_MECF-50-01-L-DV-WT_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +100 +98 +Connector_PCBEdge +Samtec_MECF-50-01-L-DV_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +98 +98 +Connector_PCBEdge +Samtec_MECF-50-01-NP-L-DV-WT_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +102 +100 +Connector_PCBEdge +Samtec_MECF-50-01-NP-L-DV_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +100 +100 +Connector_PCBEdge +Samtec_MECF-50-02-L-DV-WT_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +100 +98 +Connector_PCBEdge +Samtec_MECF-50-02-L-DV_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +98 +98 +Connector_PCBEdge +Samtec_MECF-50-02-NP-L-DV-WT_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +102 +100 +Connector_PCBEdge +Samtec_MECF-50-02-NP-L-DV_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +100 +100 +Connector_PCBEdge +Samtec_MECF-60-0_-L-DV_2x60_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +116 +116 +Connector_PCBEdge +Samtec_MECF-60-0_-NP-L-DV_2x60_P1.27mm_Edge +Highspeed card edge connector for PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +120 +120 +Connector_PCBEdge +Samtec_MECF-60-01-L-DV-WT_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +118 +116 +Connector_PCBEdge +Samtec_MECF-60-01-L-DV_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +116 +116 +Connector_PCBEdge +Samtec_MECF-60-01-NP-L-DV-WT_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +122 +120 +Connector_PCBEdge +Samtec_MECF-60-01-NP-L-DV_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +120 +120 +Connector_PCBEdge +Samtec_MECF-60-02-L-DV-WT_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +118 +116 +Connector_PCBEdge +Samtec_MECF-60-02-L-DV_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +116 +116 +Connector_PCBEdge +Samtec_MECF-60-02-NP-L-DV-WT_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +122 +120 +Connector_PCBEdge +Samtec_MECF-60-02-NP-L-DV_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +120 +120 +Connector_PCBEdge +Samtec_MECF-70-0_-L-DV_2x70_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +136 +136 +Connector_PCBEdge +Samtec_MECF-70-0_-NP-L-DV_2x70_P1.27mm_Edge +Highspeed card edge connector for PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +140 +140 +Connector_PCBEdge +Samtec_MECF-70-01-L-DV-WT_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +138 +136 +Connector_PCBEdge +Samtec_MECF-70-01-L-DV_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +136 +136 +Connector_PCBEdge +Samtec_MECF-70-01-NP-L-DV-WT_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +142 +140 +Connector_PCBEdge +Samtec_MECF-70-01-NP-L-DV_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +140 +140 +Connector_PCBEdge +Samtec_MECF-70-02-L-DV-WT_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +138 +136 +Connector_PCBEdge +Samtec_MECF-70-02-L-DV_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +136 +136 +Connector_PCBEdge +Samtec_MECF-70-02-NP-L-DV-WT_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +142 +140 +Connector_PCBEdge +Samtec_MECF-70-02-NP-L-DV_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +140 +140 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_2-G-7,62_1x02_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/2-G-7,62; number of pins: 02; pin pitch: 7.62mm; Angled || order number: 1766233 12A 630V +phoenix_contact connector GMSTBA_01x02_G_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_2-G_1x02_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/2-G; number of pins: 02; pin pitch: 7.50mm; Angled || order number: 1766343 12A 630V +phoenix_contact connector GMSTBA_01x02_G_7.50mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_3-G-7,62_1x03_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/3-G-7,62; number of pins: 03; pin pitch: 7.62mm; Angled || order number: 1766246 12A 630V +phoenix_contact connector GMSTBA_01x03_G_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_3-G_1x03_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/3-G; number of pins: 03; pin pitch: 7.50mm; Angled || order number: 1766356 12A 630V +phoenix_contact connector GMSTBA_01x03_G_7.50mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_4-G-7,62_1x04_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/4-G-7,62; number of pins: 04; pin pitch: 7.62mm; Angled || order number: 1766259 12A 630V +phoenix_contact connector GMSTBA_01x04_G_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_4-G_1x04_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/4-G; number of pins: 04; pin pitch: 7.50mm; Angled || order number: 1766369 12A 630V +phoenix_contact connector GMSTBA_01x04_G_7.50mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_5-G-7,62_1x05_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/5-G-7,62; number of pins: 05; pin pitch: 7.62mm; Angled || order number: 1766262 12A 630V +phoenix_contact connector GMSTBA_01x05_G_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_5-G_1x05_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/5-G; number of pins: 05; pin pitch: 7.50mm; Angled || order number: 1766372 12A 630V +phoenix_contact connector GMSTBA_01x05_G_7.50mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_6-G-7,62_1x06_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/6-G-7,62; number of pins: 06; pin pitch: 7.62mm; Angled || order number: 1766275 12A 630V +phoenix_contact connector GMSTBA_01x06_G_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_6-G_1x06_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/6-G; number of pins: 06; pin pitch: 7.50mm; Angled || order number: 1766385 12A 630V +phoenix_contact connector GMSTBA_01x06_G_7.50mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_7-G-7,62_1x07_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/7-G-7,62; number of pins: 07; pin pitch: 7.62mm; Angled || order number: 1766288 12A 630V +phoenix_contact connector GMSTBA_01x07_G_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_7-G_1x07_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/7-G; number of pins: 07; pin pitch: 7.50mm; Angled || order number: 1766398 12A 630V +phoenix_contact connector GMSTBA_01x07_G_7.50mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_8-G-7,62_1x08_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/8-G-7,62; number of pins: 08; pin pitch: 7.62mm; Angled || order number: 1766291 12A 630V +phoenix_contact connector GMSTBA_01x08_G_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_8-G_1x08_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/8-G; number of pins: 08; pin pitch: 7.50mm; Angled || order number: 1766408 12A 630V +phoenix_contact connector GMSTBA_01x08_G_7.50mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_9-G-7,62_1x09_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/9-G-7,62; number of pins: 09; pin pitch: 7.62mm; Angled || order number: 1766301 12A 630V +phoenix_contact connector GMSTBA_01x09_G_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_9-G_1x09_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/9-G; number of pins: 09; pin pitch: 7.50mm; Angled || order number: 1766411 12A 630V +phoenix_contact connector GMSTBA_01x09_G_7.50mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_10-G-7,62_1x10_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/10-G-7,62; number of pins: 10; pin pitch: 7.62mm; Angled || order number: 1766314 12A 630V +phoenix_contact connector GMSTBA_01x10_G_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_10-G_1x10_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/10-G; number of pins: 10; pin pitch: 7.50mm; Angled || order number: 1766424 12A 630V +phoenix_contact connector GMSTBA_01x10_G_7.50mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_11-G-7,62_1x11_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/11-G-7,62; number of pins: 11; pin pitch: 7.62mm; Angled || order number: 1766327 12A 630V +phoenix_contact connector GMSTBA_01x11_G_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_11-G_1x11_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/11-G; number of pins: 11; pin pitch: 7.50mm; Angled || order number: 1766437 12A 630V +phoenix_contact connector GMSTBA_01x11_G_7.50mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_12-G-7,62_1x12_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/12-G-7,62; number of pins: 12; pin pitch: 7.62mm; Angled || order number: 1766330 12A 630V +phoenix_contact connector GMSTBA_01x12_G_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_12-G_1x12_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/12-G; number of pins: 12; pin pitch: 7.50mm; Angled || order number: 1766440 12A 630V +phoenix_contact connector GMSTBA_01x12_G_7.50mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_2-G-7,62_1x02_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/2-G-7,62; number of pins: 02; pin pitch: 7.62mm; Vertical || order number: 1766770 12A 630V +phoenix_contact connector GMSTBVA_01x02_G_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_2-G_1x02_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/2-G; number of pins: 02; pin pitch: 7.50mm; Vertical || order number: 1766660 12A 630V +phoenix_contact connector GMSTBVA_01x02_G_7.50mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_3-G-7,62_1x03_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/3-G-7,62; number of pins: 03; pin pitch: 7.62mm; Vertical || order number: 1766783 12A 630V +phoenix_contact connector GMSTBVA_01x03_G_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_3-G_1x03_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/3-G; number of pins: 03; pin pitch: 7.50mm; Vertical || order number: 1766673 12A 630V +phoenix_contact connector GMSTBVA_01x03_G_7.50mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_4-G-7,62_1x04_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/4-G-7,62; number of pins: 04; pin pitch: 7.62mm; Vertical || order number: 1766796 12A 630V +phoenix_contact connector GMSTBVA_01x04_G_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_4-G_1x04_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/4-G; number of pins: 04; pin pitch: 7.50mm; Vertical || order number: 1766686 12A 630V +phoenix_contact connector GMSTBVA_01x04_G_7.50mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_5-G-7,62_1x05_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/5-G-7,62; number of pins: 05; pin pitch: 7.62mm; Vertical || order number: 1766806 12A 630V +phoenix_contact connector GMSTBVA_01x05_G_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_5-G_1x05_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/5-G; number of pins: 05; pin pitch: 7.50mm; Vertical || order number: 1766699 12A 630V +phoenix_contact connector GMSTBVA_01x05_G_7.50mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_6-G-7,62_1x06_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/6-G-7,62; number of pins: 06; pin pitch: 7.62mm; Vertical || order number: 1766819 12A 630V +phoenix_contact connector GMSTBVA_01x06_G_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_6-G_1x06_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/6-G; number of pins: 06; pin pitch: 7.50mm; Vertical || order number: 1766709 12A 630V +phoenix_contact connector GMSTBVA_01x06_G_7.50mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_7-G-7,62_1x07_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/7-G-7,62; number of pins: 07; pin pitch: 7.62mm; Vertical || order number: 1766822 12A 630V +phoenix_contact connector GMSTBVA_01x07_G_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_7-G_1x07_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/7-G; number of pins: 07; pin pitch: 7.50mm; Vertical || order number: 1766712 12A 630V +phoenix_contact connector GMSTBVA_01x07_G_7.50mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_8-G-7,62_1x08_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/8-G-7,62; number of pins: 08; pin pitch: 7.62mm; Vertical || order number: 1766835 12A 630V +phoenix_contact connector GMSTBVA_01x08_G_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_8-G_1x08_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/8-G; number of pins: 08; pin pitch: 7.50mm; Vertical || order number: 1766725 12A 630V +phoenix_contact connector GMSTBVA_01x08_G_7.50mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_9-G-7,62_1x09_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/9-G-7,62; number of pins: 09; pin pitch: 7.62mm; Vertical || order number: 1766848 12A 630V +phoenix_contact connector GMSTBVA_01x09_G_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_9-G_1x09_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/9-G; number of pins: 09; pin pitch: 7.50mm; Vertical || order number: 1766738 12A 630V +phoenix_contact connector GMSTBVA_01x09_G_7.50mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_10-G-7,62_1x10_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/10-G-7,62; number of pins: 10; pin pitch: 7.62mm; Vertical || order number: 1766851 12A 630V +phoenix_contact connector GMSTBVA_01x10_G_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_10-G_1x10_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/10-G; number of pins: 10; pin pitch: 7.50mm; Vertical || order number: 1766741 12A 630V +phoenix_contact connector GMSTBVA_01x10_G_7.50mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_11-G-7,62_1x11_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/11-G-7,62; number of pins: 11; pin pitch: 7.62mm; Vertical || order number: 1766864 12A 630V +phoenix_contact connector GMSTBVA_01x11_G_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_11-G_1x11_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/11-G; number of pins: 11; pin pitch: 7.50mm; Vertical || order number: 1766754 12A 630V +phoenix_contact connector GMSTBVA_01x11_G_7.50mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_12-G-7,62_1x12_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/12-G-7,62; number of pins: 12; pin pitch: 7.62mm; Vertical || order number: 1766877 12A 630V +phoenix_contact connector GMSTBVA_01x12_G_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_12-G_1x12_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/12-G; number of pins: 12; pin pitch: 7.50mm; Vertical || order number: 1766767 12A 630V +phoenix_contact connector GMSTBVA_01x12_G_7.50mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_2-GF-7,62_1x02_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829154 12A 630V +phoenix_contact connector GMSTBV_01x02_GF_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_2-GF-7,62_1x02_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829154 12A 630V +phoenix_contact connector GMSTBV_01x02_GF_7.62mm_MH +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_3-GF-7,62_1x03_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829167 12A 630V +phoenix_contact connector GMSTBV_01x03_GF_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_3-GF-7,62_1x03_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829167 12A 630V +phoenix_contact connector GMSTBV_01x03_GF_7.62mm_MH +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_4-GF-7,62_1x04_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829170 12A 630V +phoenix_contact connector GMSTBV_01x04_GF_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_4-GF-7,62_1x04_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829170 12A 630V +phoenix_contact connector GMSTBV_01x04_GF_7.62mm_MH +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_5-GF-7,62_1x05_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829183 12A 630V +phoenix_contact connector GMSTBV_01x05_GF_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_5-GF-7,62_1x05_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829183 12A 630V +phoenix_contact connector GMSTBV_01x05_GF_7.62mm_MH +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_6-GF-7,62_1x06_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829196 12A 630V +phoenix_contact connector GMSTBV_01x06_GF_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_6-GF-7,62_1x06_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829196 12A 630V +phoenix_contact connector GMSTBV_01x06_GF_7.62mm_MH +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_7-GF-7,62_1x07_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829206 12A 630V +phoenix_contact connector GMSTBV_01x07_GF_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_7-GF-7,62_1x07_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829206 12A 630V +phoenix_contact connector GMSTBV_01x07_GF_7.62mm_MH +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_8-GF-7,62_1x08_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829219 12A 630V +phoenix_contact connector GMSTBV_01x08_GF_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_8-GF-7,62_1x08_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829219 12A 630V +phoenix_contact connector GMSTBV_01x08_GF_7.62mm_MH +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_9-GF-7,62_1x09_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829222 12A 630V +phoenix_contact connector GMSTBV_01x09_GF_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_9-GF-7,62_1x09_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829222 12A 630V +phoenix_contact connector GMSTBV_01x09_GF_7.62mm_MH +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_10-GF-7,62_1x10_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829235 12A 630V +phoenix_contact connector GMSTBV_01x10_GF_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_10-GF-7,62_1x10_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829235 12A 630V +phoenix_contact connector GMSTBV_01x10_GF_7.62mm_MH +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_11-GF-7,62_1x11_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829248 12A 630V +phoenix_contact connector GMSTBV_01x11_GF_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_11-GF-7,62_1x11_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829248 12A 630V +phoenix_contact connector GMSTBV_01x11_GF_7.62mm_MH +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_12-GF-7,62_1x12_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829251 12A 630V +phoenix_contact connector GMSTBV_01x12_GF_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_12-GF-7,62_1x12_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829251 12A 630V +phoenix_contact connector GMSTBV_01x12_GF_7.62mm_MH +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_2-GF-7,62_1x02_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806229 12A 630V +phoenix_contact connector GMSTB_01x02_GF_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_2-GF-7,62_1x02_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806229 12A 630V +phoenix_contact connector GMSTB_01x02_GF_7.62mm_MH +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_3-GF-7,62_1x03_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806232 12A 630V +phoenix_contact connector GMSTB_01x03_GF_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_3-GF-7,62_1x03_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806232 12A 630V +phoenix_contact connector GMSTB_01x03_GF_7.62mm_MH +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_4-GF-7,62_1x04_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806245 12A 630V +phoenix_contact connector GMSTB_01x04_GF_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_4-GF-7,62_1x04_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806245 12A 630V +phoenix_contact connector GMSTB_01x04_GF_7.62mm_MH +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_5-GF-7,62_1x05_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806258 12A 630V +phoenix_contact connector GMSTB_01x05_GF_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_5-GF-7,62_1x05_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806258 12A 630V +phoenix_contact connector GMSTB_01x05_GF_7.62mm_MH +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_6-GF-7,62_1x06_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806261 12A 630V +phoenix_contact connector GMSTB_01x06_GF_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_6-GF-7,62_1x06_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806261 12A 630V +phoenix_contact connector GMSTB_01x06_GF_7.62mm_MH +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_7-GF-7,62_1x07_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806274 12A 630V +phoenix_contact connector GMSTB_01x07_GF_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_7-GF-7,62_1x07_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806274 12A 630V +phoenix_contact connector GMSTB_01x07_GF_7.62mm_MH +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_8-GF-7,62_1x08_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806287 12A 630V +phoenix_contact connector GMSTB_01x08_GF_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_8-GF-7,62_1x08_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806287 12A 630V +phoenix_contact connector GMSTB_01x08_GF_7.62mm_MH +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_9-GF-7,62_1x09_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806290 12A 630V +phoenix_contact connector GMSTB_01x09_GF_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_9-GF-7,62_1x09_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806290 12A 630V +phoenix_contact connector GMSTB_01x09_GF_7.62mm_MH +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_10-GF-7,62_1x10_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806300 12A 630V +phoenix_contact connector GMSTB_01x10_GF_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_10-GF-7,62_1x10_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806300 12A 630V +phoenix_contact connector GMSTB_01x10_GF_7.62mm_MH +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_11-GF-7,62_1x11_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806313 12A 630V +phoenix_contact connector GMSTB_01x11_GF_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_11-GF-7,62_1x11_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806313 12A 630V +phoenix_contact connector GMSTB_01x11_GF_7.62mm_MH +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_12-GF-7,62_1x12_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806326 12A 630V +phoenix_contact connector GMSTB_01x12_GF_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_12-GF-7,62_1x12_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806326 12A 630V +phoenix_contact connector GMSTB_01x12_GF_7.62mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-G-3.5_1x02_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/2-G-3.5; number of pins: 02; pin pitch: 3.50mm; Vertical || order number: 1843606 8A 160V +phoenix_contact connector MCV_01x02_G_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-G-3.81_1x02_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/2-G-3.81; number of pins: 02; pin pitch: 3.81mm; Vertical || order number: 1803426 8A 160V +phoenix_contact connector MCV_01x02_G_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.5_1x02_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843224 8A 160V +phoenix_contact connector MCV_01x02_GF_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.5_1x02_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843224 8A 160V +phoenix_contact connector MCV_01x02_GF_3.5mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.81_1x02_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830596 8A 160V +phoenix_contact connector MCV_01x02_GF_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.81_1x02_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830596 8A 160V +phoenix_contact connector MCV_01x02_GF_3.81mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-G-3.5_1x03_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/3-G-3.5; number of pins: 03; pin pitch: 3.50mm; Vertical || order number: 1843619 8A 160V +phoenix_contact connector MCV_01x03_G_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-G-3.81_1x03_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/3-G-3.81; number of pins: 03; pin pitch: 3.81mm; Vertical || order number: 1803439 8A 160V +phoenix_contact connector MCV_01x03_G_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.5_1x03_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843237 8A 160V +phoenix_contact connector MCV_01x03_GF_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.5_1x03_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843237 8A 160V +phoenix_contact connector MCV_01x03_GF_3.5mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.81_1x03_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830606 8A 160V +phoenix_contact connector MCV_01x03_GF_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.81_1x03_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830606 8A 160V +phoenix_contact connector MCV_01x03_GF_3.81mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-G-3.5_1x04_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/4-G-3.5; number of pins: 04; pin pitch: 3.50mm; Vertical || order number: 1843622 8A 160V +phoenix_contact connector MCV_01x04_G_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-G-3.81_1x04_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/4-G-3.81; number of pins: 04; pin pitch: 3.81mm; Vertical || order number: 1803442 8A 160V +phoenix_contact connector MCV_01x04_G_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.5_1x04_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843240 8A 160V +phoenix_contact connector MCV_01x04_GF_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.5_1x04_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843240 8A 160V +phoenix_contact connector MCV_01x04_GF_3.5mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.81_1x04_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830619 8A 160V +phoenix_contact connector MCV_01x04_GF_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.81_1x04_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830619 8A 160V +phoenix_contact connector MCV_01x04_GF_3.81mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-G-3.5_1x05_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/5-G-3.5; number of pins: 05; pin pitch: 3.50mm; Vertical || order number: 1843635 8A 160V +phoenix_contact connector MCV_01x05_G_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-G-3.81_1x05_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/5-G-3.81; number of pins: 05; pin pitch: 3.81mm; Vertical || order number: 1803455 8A 160V +phoenix_contact connector MCV_01x05_G_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.5_1x05_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843253 8A 160V +phoenix_contact connector MCV_01x05_GF_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.5_1x05_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843253 8A 160V +phoenix_contact connector MCV_01x05_GF_3.5mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.81_1x05_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830622 8A 160V +phoenix_contact connector MCV_01x05_GF_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.81_1x05_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830622 8A 160V +phoenix_contact connector MCV_01x05_GF_3.81mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-G-3.5_1x06_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/6-G-3.5; number of pins: 06; pin pitch: 3.50mm; Vertical || order number: 1843648 8A 160V +phoenix_contact connector MCV_01x06_G_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-G-3.81_1x06_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/6-G-3.81; number of pins: 06; pin pitch: 3.81mm; Vertical || order number: 1803468 8A 160V +phoenix_contact connector MCV_01x06_G_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.5_1x06_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843266 8A 160V +phoenix_contact connector MCV_01x06_GF_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.5_1x06_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843266 8A 160V +phoenix_contact connector MCV_01x06_GF_3.5mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.81_1x06_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830635 8A 160V +phoenix_contact connector MCV_01x06_GF_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.81_1x06_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830635 8A 160V +phoenix_contact connector MCV_01x06_GF_3.81mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-G-3.5_1x07_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/7-G-3.5; number of pins: 07; pin pitch: 3.50mm; Vertical || order number: 1843651 8A 160V +phoenix_contact connector MCV_01x07_G_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-G-3.81_1x07_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/7-G-3.81; number of pins: 07; pin pitch: 3.81mm; Vertical || order number: 1803471 8A 160V +phoenix_contact connector MCV_01x07_G_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.5_1x07_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843279 8A 160V +phoenix_contact connector MCV_01x07_GF_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.5_1x07_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843279 8A 160V +phoenix_contact connector MCV_01x07_GF_3.5mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.81_1x07_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830648 8A 160V +phoenix_contact connector MCV_01x07_GF_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.81_1x07_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830648 8A 160V +phoenix_contact connector MCV_01x07_GF_3.81mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-G-3.5_1x08_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/8-G-3.5; number of pins: 08; pin pitch: 3.50mm; Vertical || order number: 1843664 8A 160V +phoenix_contact connector MCV_01x08_G_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-G-3.81_1x08_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/8-G-3.81; number of pins: 08; pin pitch: 3.81mm; Vertical || order number: 1803484 8A 160V +phoenix_contact connector MCV_01x08_G_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.5_1x08_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843282 8A 160V +phoenix_contact connector MCV_01x08_GF_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.5_1x08_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843282 8A 160V +phoenix_contact connector MCV_01x08_GF_3.5mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.81_1x08_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830651 8A 160V +phoenix_contact connector MCV_01x08_GF_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.81_1x08_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830651 8A 160V +phoenix_contact connector MCV_01x08_GF_3.81mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-G-3.5_1x09_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/9-G-3.5; number of pins: 09; pin pitch: 3.50mm; Vertical || order number: 1843677 8A 160V +phoenix_contact connector MCV_01x09_G_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-G-3.81_1x09_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/9-G-3.81; number of pins: 09; pin pitch: 3.81mm; Vertical || order number: 1803497 8A 160V +phoenix_contact connector MCV_01x09_G_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.5_1x09_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843295 8A 160V +phoenix_contact connector MCV_01x09_GF_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.5_1x09_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843295 8A 160V +phoenix_contact connector MCV_01x09_GF_3.5mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.81_1x09_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830664 8A 160V +phoenix_contact connector MCV_01x09_GF_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.81_1x09_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830664 8A 160V +phoenix_contact connector MCV_01x09_GF_3.81mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-G-3.5_1x10_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-3.5; number of pins: 10; pin pitch: 3.50mm; Vertical || order number: 1843680 8A 160V +phoenix_contact connector MCV_01x10_G_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-G-3.81_1x10_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-3.81; number of pins: 10; pin pitch: 3.81mm; Vertical || order number: 1803507 8A 160V +phoenix_contact connector MCV_01x10_G_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.5_1x10_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843305 8A 160V +phoenix_contact connector MCV_01x10_GF_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.5_1x10_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843305 8A 160V +phoenix_contact connector MCV_01x10_GF_3.5mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.81_1x10_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830677 8A 160V +phoenix_contact connector MCV_01x10_GF_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.81_1x10_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830677 8A 160V +phoenix_contact connector MCV_01x10_GF_3.81mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-G-3.5_1x11_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/11-G-3.5; number of pins: 11; pin pitch: 3.50mm; Vertical || order number: 1843693 8A 160V +phoenix_contact connector MCV_01x11_G_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-G-3.81_1x11_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/11-G-3.81; number of pins: 11; pin pitch: 3.81mm; Vertical || order number: 1803510 8A 160V +phoenix_contact connector MCV_01x11_G_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.5_1x11_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843318 8A 160V +phoenix_contact connector MCV_01x11_GF_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.5_1x11_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843318 8A 160V +phoenix_contact connector MCV_01x11_GF_3.5mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.81_1x11_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830680 8A 160V +phoenix_contact connector MCV_01x11_GF_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.81_1x11_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830680 8A 160V +phoenix_contact connector MCV_01x11_GF_3.81mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-G-3.5_1x12_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/12-G-3.5; number of pins: 12; pin pitch: 3.50mm; Vertical || order number: 1843703 8A 160V +phoenix_contact connector MCV_01x12_G_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-G-3.81_1x12_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/12-G-3.81; number of pins: 12; pin pitch: 3.81mm; Vertical || order number: 1803523 8A 160V +phoenix_contact connector MCV_01x12_G_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.5_1x12_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843321 8A 160V +phoenix_contact connector MCV_01x12_GF_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.5_1x12_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843321 8A 160V +phoenix_contact connector MCV_01x12_GF_3.5mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.81_1x12_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830693 8A 160V +phoenix_contact connector MCV_01x12_GF_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.81_1x12_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830693 8A 160V +phoenix_contact connector MCV_01x12_GF_3.81mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-G-3.5_1x13_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/13-G-3.5; number of pins: 13; pin pitch: 3.50mm; Vertical || order number: 1843716 8A 160V +phoenix_contact connector MCV_01x13_G_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-G-3.81_1x13_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/13-G-3.81; number of pins: 13; pin pitch: 3.81mm; Vertical || order number: 1803536 8A 160V +phoenix_contact connector MCV_01x13_G_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.5_1x13_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843334 8A 160V +phoenix_contact connector MCV_01x13_GF_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.5_1x13_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843334 8A 160V +phoenix_contact connector MCV_01x13_GF_3.5mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.81_1x13_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830703 8A 160V +phoenix_contact connector MCV_01x13_GF_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.81_1x13_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830703 8A 160V +phoenix_contact connector MCV_01x13_GF_3.81mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-G-3.5_1x14_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/14-G-3.5; number of pins: 14; pin pitch: 3.50mm; Vertical || order number: 1843729 8A 160V +phoenix_contact connector MCV_01x14_G_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-G-3.81_1x14_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/14-G-3.81; number of pins: 14; pin pitch: 3.81mm; Vertical || order number: 1803549 8A 160V +phoenix_contact connector MCV_01x14_G_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.5_1x14_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843347 8A 160V +phoenix_contact connector MCV_01x14_GF_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.5_1x14_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843347 8A 160V +phoenix_contact connector MCV_01x14_GF_3.5mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.81_1x14_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830716 8A 160V +phoenix_contact connector MCV_01x14_GF_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.81_1x14_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830716 8A 160V +phoenix_contact connector MCV_01x14_GF_3.81mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-G-3.5_1x15_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/15-G-3.5; number of pins: 15; pin pitch: 3.50mm; Vertical || order number: 1843732 8A 160V +phoenix_contact connector MCV_01x15_G_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-G-3.81_1x15_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/15-G-3.81; number of pins: 15; pin pitch: 3.81mm; Vertical || order number: 1803552 8A 160V +phoenix_contact connector MCV_01x15_G_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.5_1x15_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843350 8A 160V +phoenix_contact connector MCV_01x15_GF_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.5_1x15_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843350 8A 160V +phoenix_contact connector MCV_01x15_GF_3.5mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.81_1x15_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830729 8A 160V +phoenix_contact connector MCV_01x15_GF_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.81_1x15_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830729 8A 160V +phoenix_contact connector MCV_01x15_GF_3.81mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-G-3.5_1x16_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/16-G-3.5; number of pins: 16; pin pitch: 3.50mm; Vertical || order number: 1843745 8A 160V +phoenix_contact connector MCV_01x16_G_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-G-3.81_1x16_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/16-G-3.81; number of pins: 16; pin pitch: 3.81mm; Vertical || order number: 1803565 8A 160V +phoenix_contact connector MCV_01x16_G_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.5_1x16_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843363 8A 160V +phoenix_contact connector MCV_01x16_GF_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.5_1x16_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843363 8A 160V +phoenix_contact connector MCV_01x16_GF_3.5mm_MH +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.81_1x16_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830732 8A 160V +phoenix_contact connector MCV_01x16_GF_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.81_1x16_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830732 8A 160V +phoenix_contact connector MCV_01x16_GF_3.81mm_MH +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-G-3.5_1x02_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/2-G-3.5; number of pins: 02; pin pitch: 3.50mm; Angled || order number: 1844210 8A 160V +phoenix_contact connector MC_01x02_G_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-G-3.81_1x02_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/2-G-3.81; number of pins: 02; pin pitch: 3.81mm; Angled || order number: 1803277 8A 160V +phoenix_contact connector MC_01x02_G_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.5_1x02_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843790 8A 160V +phoenix_contact connector MC_01x02_GF_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.5_1x02_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843790 8A 160V +phoenix_contact connector MC_01x02_GF_3.5mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.81_1x02_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827868 8A 160V +phoenix_contact connector MC_01x02_GF_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.81_1x02_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827868 8A 160V +phoenix_contact connector MC_01x02_GF_3.81mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-G-3.5_1x03_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/3-G-3.5; number of pins: 03; pin pitch: 3.50mm; Angled || order number: 1844223 8A 160V +phoenix_contact connector MC_01x03_G_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-G-3.81_1x03_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/3-G-3.81; number of pins: 03; pin pitch: 3.81mm; Angled || order number: 1803280 8A 160V +phoenix_contact connector MC_01x03_G_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.5_1x03_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843800 8A 160V +phoenix_contact connector MC_01x03_GF_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.5_1x03_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843800 8A 160V +phoenix_contact connector MC_01x03_GF_3.5mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.81_1x03_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827871 8A 160V +phoenix_contact connector MC_01x03_GF_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.81_1x03_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827871 8A 160V +phoenix_contact connector MC_01x03_GF_3.81mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-G-3.5_1x04_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/4-G-3.5; number of pins: 04; pin pitch: 3.50mm; Angled || order number: 1844236 8A 160V +phoenix_contact connector MC_01x04_G_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-G-3.81_1x04_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/4-G-3.81; number of pins: 04; pin pitch: 3.81mm; Angled || order number: 1803293 8A 160V +phoenix_contact connector MC_01x04_G_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.5_1x04_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843813 8A 160V +phoenix_contact connector MC_01x04_GF_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.5_1x04_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843813 8A 160V +phoenix_contact connector MC_01x04_GF_3.5mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.81_1x04_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827884 8A 160V +phoenix_contact connector MC_01x04_GF_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.81_1x04_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827884 8A 160V +phoenix_contact connector MC_01x04_GF_3.81mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-G-3.5_1x05_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/5-G-3.5; number of pins: 05; pin pitch: 3.50mm; Angled || order number: 1844249 8A 160V +phoenix_contact connector MC_01x05_G_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-G-3.81_1x05_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/5-G-3.81; number of pins: 05; pin pitch: 3.81mm; Angled || order number: 1803303 8A 160V +phoenix_contact connector MC_01x05_G_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.5_1x05_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843826 8A 160V +phoenix_contact connector MC_01x05_GF_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.5_1x05_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843826 8A 160V +phoenix_contact connector MC_01x05_GF_3.5mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.81_1x05_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827897 8A 160V +phoenix_contact connector MC_01x05_GF_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.81_1x05_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827897 8A 160V +phoenix_contact connector MC_01x05_GF_3.81mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-G-3.5_1x06_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/6-G-3.5; number of pins: 06; pin pitch: 3.50mm; Angled || order number: 1844252 8A 160V +phoenix_contact connector MC_01x06_G_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-G-3.81_1x06_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/6-G-3.81; number of pins: 06; pin pitch: 3.81mm; Angled || order number: 1803316 8A 160V +phoenix_contact connector MC_01x06_G_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.5_1x06_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843839 8A 160V +phoenix_contact connector MC_01x06_GF_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.5_1x06_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843839 8A 160V +phoenix_contact connector MC_01x06_GF_3.5mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.81_1x06_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827907 8A 160V +phoenix_contact connector MC_01x06_GF_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.81_1x06_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827907 8A 160V +phoenix_contact connector MC_01x06_GF_3.81mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-G-3.5_1x07_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/7-G-3.5; number of pins: 07; pin pitch: 3.50mm; Angled || order number: 1844265 8A 160V +phoenix_contact connector MC_01x07_G_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-G-3.81_1x07_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/7-G-3.81; number of pins: 07; pin pitch: 3.81mm; Angled || order number: 1803329 8A 160V +phoenix_contact connector MC_01x07_G_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.5_1x07_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843842 8A 160V +phoenix_contact connector MC_01x07_GF_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.5_1x07_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843842 8A 160V +phoenix_contact connector MC_01x07_GF_3.5mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.81_1x07_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827910 8A 160V +phoenix_contact connector MC_01x07_GF_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.81_1x07_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827910 8A 160V +phoenix_contact connector MC_01x07_GF_3.81mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-G-3.5_1x08_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/8-G-3.5; number of pins: 08; pin pitch: 3.50mm; Angled || order number: 1844278 8A 160V +phoenix_contact connector MC_01x08_G_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-G-3.81_1x08_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/8-G-3.81; number of pins: 08; pin pitch: 3.81mm; Angled || order number: 1803332 8A 160V +phoenix_contact connector MC_01x08_G_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.5_1x08_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843855 8A 160V +phoenix_contact connector MC_01x08_GF_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.5_1x08_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843855 8A 160V +phoenix_contact connector MC_01x08_GF_3.5mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.81_1x08_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827923 8A 160V +phoenix_contact connector MC_01x08_GF_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.81_1x08_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827923 8A 160V +phoenix_contact connector MC_01x08_GF_3.81mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-G-3.5_1x09_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/9-G-3.5; number of pins: 09; pin pitch: 3.50mm; Angled || order number: 1844281 8A 160V +phoenix_contact connector MC_01x09_G_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-G-3.81_1x09_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/9-G-3.81; number of pins: 09; pin pitch: 3.81mm; Angled || order number: 1803345 8A 160V +phoenix_contact connector MC_01x09_G_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.5_1x09_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843868 8A 160V +phoenix_contact connector MC_01x09_GF_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.5_1x09_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843868 8A 160V +phoenix_contact connector MC_01x09_GF_3.5mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.81_1x09_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827936 8A 160V +phoenix_contact connector MC_01x09_GF_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.81_1x09_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827936 8A 160V +phoenix_contact connector MC_01x09_GF_3.81mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-G-3.5_1x10_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/10-G-3.5; number of pins: 10; pin pitch: 3.50mm; Angled || order number: 1844294 8A 160V +phoenix_contact connector MC_01x10_G_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-G-3.81_1x10_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/10-G-3.81; number of pins: 10; pin pitch: 3.81mm; Angled || order number: 1803358 8A 160V +phoenix_contact connector MC_01x10_G_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.5_1x10_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843871 8A 160V +phoenix_contact connector MC_01x10_GF_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.5_1x10_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843871 8A 160V +phoenix_contact connector MC_01x10_GF_3.5mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.81_1x10_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827949 8A 160V +phoenix_contact connector MC_01x10_GF_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.81_1x10_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827949 8A 160V +phoenix_contact connector MC_01x10_GF_3.81mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-G-3.5_1x11_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/11-G-3.5; number of pins: 11; pin pitch: 3.50mm; Angled || order number: 1844304 8A 160V +phoenix_contact connector MC_01x11_G_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-G-3.81_1x11_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/11-G-3.81; number of pins: 11; pin pitch: 3.81mm; Angled || order number: 1803361 8A 160V +phoenix_contact connector MC_01x11_G_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.5_1x11_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843884 8A 160V +phoenix_contact connector MC_01x11_GF_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.5_1x11_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843884 8A 160V +phoenix_contact connector MC_01x11_GF_3.5mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.81_1x11_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827952 8A 160V +phoenix_contact connector MC_01x11_GF_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.81_1x11_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827952 8A 160V +phoenix_contact connector MC_01x11_GF_3.81mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-G-3.5_1x12_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/12-G-3.5; number of pins: 12; pin pitch: 3.50mm; Angled || order number: 1844317 8A 160V +phoenix_contact connector MC_01x12_G_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-G-3.81_1x12_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/12-G-3.81; number of pins: 12; pin pitch: 3.81mm; Angled || order number: 1803374 8A 160V +phoenix_contact connector MC_01x12_G_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.5_1x12_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843897 8A 160V +phoenix_contact connector MC_01x12_GF_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.5_1x12_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843897 8A 160V +phoenix_contact connector MC_01x12_GF_3.5mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.81_1x12_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827965 8A 160V +phoenix_contact connector MC_01x12_GF_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.81_1x12_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827965 8A 160V +phoenix_contact connector MC_01x12_GF_3.81mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-G-3.5_1x13_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/13-G-3.5; number of pins: 13; pin pitch: 3.50mm; Angled || order number: 1844320 8A 160V +phoenix_contact connector MC_01x13_G_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-G-3.81_1x13_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/13-G-3.81; number of pins: 13; pin pitch: 3.81mm; Angled || order number: 1803387 8A 160V +phoenix_contact connector MC_01x13_G_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.5_1x13_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843907 8A 160V +phoenix_contact connector MC_01x13_GF_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.5_1x13_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843907 8A 160V +phoenix_contact connector MC_01x13_GF_3.5mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.81_1x13_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827978 8A 160V +phoenix_contact connector MC_01x13_GF_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.81_1x13_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827978 8A 160V +phoenix_contact connector MC_01x13_GF_3.81mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-G-3.5_1x14_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/14-G-3.5; number of pins: 14; pin pitch: 3.50mm; Angled || order number: 1844333 8A 160V +phoenix_contact connector MC_01x14_G_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-G-3.81_1x14_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/14-G-3.81; number of pins: 14; pin pitch: 3.81mm; Angled || order number: 1803390 8A 160V +phoenix_contact connector MC_01x14_G_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.5_1x14_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843910 8A 160V +phoenix_contact connector MC_01x14_GF_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.5_1x14_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843910 8A 160V +phoenix_contact connector MC_01x14_GF_3.5mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.81_1x14_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827981 8A 160V +phoenix_contact connector MC_01x14_GF_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.81_1x14_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827981 8A 160V +phoenix_contact connector MC_01x14_GF_3.81mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-G-3.5_1x15_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/15-G-3.5; number of pins: 15; pin pitch: 3.50mm; Angled || order number: 1844346 8A 160V +phoenix_contact connector MC_01x15_G_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-G-3.81_1x15_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/15-G-3.81; number of pins: 15; pin pitch: 3.81mm; Angled || order number: 1803400 8A 160V +phoenix_contact connector MC_01x15_G_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.5_1x15_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843923 8A 160V +phoenix_contact connector MC_01x15_GF_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.5_1x15_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843923 8A 160V +phoenix_contact connector MC_01x15_GF_3.5mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.81_1x15_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827994 8A 160V +phoenix_contact connector MC_01x15_GF_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.81_1x15_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827994 8A 160V +phoenix_contact connector MC_01x15_GF_3.81mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-G-3.5_1x16_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/16-G-3.5; number of pins: 16; pin pitch: 3.50mm; Angled || order number: 1844359 8A 160V +phoenix_contact connector MC_01x16_G_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-G-3.81_1x16_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/16-G-3.81; number of pins: 16; pin pitch: 3.81mm; Angled || order number: 1803413 8A 160V +phoenix_contact connector MC_01x16_G_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.5_1x16_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843936 8A 160V +phoenix_contact connector MC_01x16_GF_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.5_1x16_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843936 8A 160V +phoenix_contact connector MC_01x16_GF_3.5mm_MH +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.81_1x16_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Angled; threaded flange || order number: 1828003 8A 160V +phoenix_contact connector MC_01x16_GF_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.81_1x16_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1828003 8A 160V +phoenix_contact connector MC_01x16_GF_3.81mm_MH +0 +16 +16 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_2-G-5.08_1x02_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/2-G-5.08; number of pins: 02; pin pitch: 5.08mm; Vertical || order number: 1836299 8A 320V +phoenix_contact connector MCV_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_2-GF-5.08_1x02_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847615 8A 320V +phoenix_contact connector MCV_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_2-GF-5.08_1x02_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847615 8A 320V +phoenix_contact connector MCV_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_3-G-5.08_1x03_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/3-G-5.08; number of pins: 03; pin pitch: 5.08mm; Vertical || order number: 1836309 8A 320V +phoenix_contact connector MCV_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_3-GF-5.08_1x03_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847628 8A 320V +phoenix_contact connector MCV_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_3-GF-5.08_1x03_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847628 8A 320V +phoenix_contact connector MCV_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_4-G-5.08_1x04_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/4-G-5.08; number of pins: 04; pin pitch: 5.08mm; Vertical || order number: 1836312 8A 320V +phoenix_contact connector MCV_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_4-GF-5.08_1x04_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847631 8A 320V +phoenix_contact connector MCV_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_4-GF-5.08_1x04_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847631 8A 320V +phoenix_contact connector MCV_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_5-G-5.08_1x05_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/5-G-5.08; number of pins: 05; pin pitch: 5.08mm; Vertical || order number: 1836325 8A 320V +phoenix_contact connector MCV_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_5-GF-5.08_1x05_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847644 8A 320V +phoenix_contact connector MCV_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_5-GF-5.08_1x05_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847644 8A 320V +phoenix_contact connector MCV_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_6-G-5.08_1x06_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/6-G-5.08; number of pins: 06; pin pitch: 5.08mm; Vertical || order number: 1836338 8A 320V +phoenix_contact connector MCV_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_6-GF-5.08_1x06_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847657 8A 320V +phoenix_contact connector MCV_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_6-GF-5.08_1x06_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847657 8A 320V +phoenix_contact connector MCV_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_7-G-5.08_1x07_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/7-G-5.08; number of pins: 07; pin pitch: 5.08mm; Vertical || order number: 1836341 8A 320V +phoenix_contact connector MCV_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_7-GF-5.08_1x07_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847660 8A 320V +phoenix_contact connector MCV_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_7-GF-5.08_1x07_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847660 8A 320V +phoenix_contact connector MCV_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_8-G-5.08_1x08_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/8-G-5.08; number of pins: 08; pin pitch: 5.08mm; Vertical || order number: 1836354 8A 320V +phoenix_contact connector MCV_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_8-GF-5.08_1x08_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847673 8A 320V +phoenix_contact connector MCV_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_8-GF-5.08_1x08_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847673 8A 320V +phoenix_contact connector MCV_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_9-G-5.08_1x09_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/9-G-5.08; number of pins: 09; pin pitch: 5.08mm; Vertical || order number: 1836367 8A 320V +phoenix_contact connector MCV_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_9-GF-5.08_1x09_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847686 8A 320V +phoenix_contact connector MCV_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_9-GF-5.08_1x09_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847686 8A 320V +phoenix_contact connector MCV_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_10-G-5.08_1x10_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-5.08; number of pins: 10; pin pitch: 5.08mm; Vertical || order number: 1836370 8A 320V +phoenix_contact connector MCV_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_10-GF-5.08_1x10_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847699 8A 320V +phoenix_contact connector MCV_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_10-GF-5.08_1x10_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847699 8A 320V +phoenix_contact connector MCV_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_11-G-5.08_1x11_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/11-G-5.08; number of pins: 11; pin pitch: 5.08mm; Vertical || order number: 1836383 8A 320V +phoenix_contact connector MCV_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_11-GF-5.08_1x11_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847709 8A 320V +phoenix_contact connector MCV_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_11-GF-5.08_1x11_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847709 8A 320V +phoenix_contact connector MCV_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_12-G-5.08_1x12_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/12-G-5.08; number of pins: 12; pin pitch: 5.08mm; Vertical || order number: 1836396 8A 320V +phoenix_contact connector MCV_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_12-GF-5.08_1x12_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847712 8A 320V +phoenix_contact connector MCV_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_12-GF-5.08_1x12_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847712 8A 320V +phoenix_contact connector MCV_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_2-G-5.08_1x02_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/2-G-5.08; number of pins: 02; pin pitch: 5.08mm; Angled || order number: 1836189 8A 320V +phoenix_contact connector MC_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_2-GF-5.08_1x02_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847466 8A 320V +phoenix_contact connector MC_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_2-GF-5.08_1x02_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847466 8A 320V +phoenix_contact connector MC_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_3-G-5.08_1x03_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/3-G-5.08; number of pins: 03; pin pitch: 5.08mm; Angled || order number: 1836192 8A 320V +phoenix_contact connector MC_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_3-GF-5.08_1x03_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847479 8A 320V +phoenix_contact connector MC_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_3-GF-5.08_1x03_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847479 8A 320V +phoenix_contact connector MC_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_4-G-5.08_1x04_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/4-G-5.08; number of pins: 04; pin pitch: 5.08mm; Angled || order number: 1836202 8A 320V +phoenix_contact connector MC_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_4-GF-5.08_1x04_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847482 8A 320V +phoenix_contact connector MC_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_4-GF-5.08_1x04_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847482 8A 320V +phoenix_contact connector MC_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_5-G-5.08_1x05_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/5-G-5.08; number of pins: 05; pin pitch: 5.08mm; Angled || order number: 1836215 8A 320V +phoenix_contact connector MC_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_5-GF-5.08_1x05_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847495 8A 320V +phoenix_contact connector MC_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_5-GF-5.08_1x05_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847495 8A 320V +phoenix_contact connector MC_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_6-G-5.08_1x06_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/6-G-5.08; number of pins: 06; pin pitch: 5.08mm; Angled || order number: 1836228 8A 320V +phoenix_contact connector MC_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_6-GF-5.08_1x06_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847505 8A 320V +phoenix_contact connector MC_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_6-GF-5.08_1x06_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847505 8A 320V +phoenix_contact connector MC_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_7-G-5.08_1x07_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/7-G-5.08; number of pins: 07; pin pitch: 5.08mm; Angled || order number: 1836231 8A 320V +phoenix_contact connector MC_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_7-GF-5.08_1x07_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847518 8A 320V +phoenix_contact connector MC_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_7-GF-5.08_1x07_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847518 8A 320V +phoenix_contact connector MC_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_8-G-5.08_1x08_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/8-G-5.08; number of pins: 08; pin pitch: 5.08mm; Angled || order number: 1836244 8A 320V +phoenix_contact connector MC_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_8-GF-5.08_1x08_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847521 8A 320V +phoenix_contact connector MC_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_8-GF-5.08_1x08_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847521 8A 320V +phoenix_contact connector MC_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_9-G-5.08_1x09_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/9-G-5.08; number of pins: 09; pin pitch: 5.08mm; Angled || order number: 1836257 8A 320V +phoenix_contact connector MC_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_9-GF-5.08_1x09_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847534 8A 320V +phoenix_contact connector MC_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_9-GF-5.08_1x09_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847534 8A 320V +phoenix_contact connector MC_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_10-G-5.08_1x10_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/10-G-5.08; number of pins: 10; pin pitch: 5.08mm; Angled || order number: 1836260 8A 320V +phoenix_contact connector MC_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_10-GF-5.08_1x10_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847547 8A 320V +phoenix_contact connector MC_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_10-GF-5.08_1x10_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847547 8A 320V +phoenix_contact connector MC_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_11-G-5.08_1x11_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/11-G-5.08; number of pins: 11; pin pitch: 5.08mm; Angled || order number: 1836273 8A 320V +phoenix_contact connector MC_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_11-GF-5.08_1x11_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847550 8A 320V +phoenix_contact connector MC_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_11-GF-5.08_1x11_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847550 8A 320V +phoenix_contact connector MC_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_12-G-5.08_1x12_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/12-G-5.08; number of pins: 12; pin pitch: 5.08mm; Angled || order number: 1836286 8A 320V +phoenix_contact connector MC_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_12-GF-5.08_1x12_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847563 8A 320V +phoenix_contact connector MC_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_12-GF-5.08_1x12_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847563 8A 320V +phoenix_contact connector MC_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_2-G-5,08_1x02_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/2-G-5,08; number of pins: 02; pin pitch: 5.08mm; Angled || order number: 1757242 12A || order number: 1923869 16A (HC) +phoenix_contact connector MSTBA_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_2-G_1x02_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/2-G; number of pins: 02; pin pitch: 5.00mm; Angled || order number: 1757475 12A || order number: 1923759 16A (HC) +phoenix_contact connector MSTBA_01x02_G_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_3-G-5,08_1x03_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/3-G-5,08; number of pins: 03; pin pitch: 5.08mm; Angled || order number: 1757255 12A || order number: 1923872 16A (HC) +phoenix_contact connector MSTBA_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_3-G_1x03_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/3-G; number of pins: 03; pin pitch: 5.00mm; Angled || order number: 1757488 12A || order number: 1923762 16A (HC) +phoenix_contact connector MSTBA_01x03_G_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_4-G-5,08_1x04_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/4-G-5,08; number of pins: 04; pin pitch: 5.08mm; Angled || order number: 1757268 12A || order number: 1923885 16A (HC) +phoenix_contact connector MSTBA_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_4-G_1x04_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/4-G; number of pins: 04; pin pitch: 5.00mm; Angled || order number: 1757491 12A || order number: 1923775 16A (HC) +phoenix_contact connector MSTBA_01x04_G_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_5-G-5,08_1x05_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/5-G-5,08; number of pins: 05; pin pitch: 5.08mm; Angled || order number: 1757271 12A || order number: 1923898 16A (HC) +phoenix_contact connector MSTBA_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_5-G_1x05_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/5-G; number of pins: 05; pin pitch: 5.00mm; Angled || order number: 1757501 12A || order number: 1923788 16A (HC) +phoenix_contact connector MSTBA_01x05_G_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_6-G-5,08_1x06_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/6-G-5,08; number of pins: 06; pin pitch: 5.08mm; Angled || order number: 1757284 12A || order number: 1923908 16A (HC) +phoenix_contact connector MSTBA_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_6-G_1x06_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/6-G; number of pins: 06; pin pitch: 5.00mm; Angled || order number: 1757514 12A || order number: 1923791 16A (HC) +phoenix_contact connector MSTBA_01x06_G_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_7-G-5,08_1x07_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/7-G-5,08; number of pins: 07; pin pitch: 5.08mm; Angled || order number: 1757297 12A || order number: 1923911 16A (HC) +phoenix_contact connector MSTBA_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_7-G_1x07_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/7-G; number of pins: 07; pin pitch: 5.00mm; Angled || order number: 1757493 12A || order number: 1923801 16A (HC) +phoenix_contact connector MSTBA_01x07_G_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_8-G-5,08_1x08_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/8-G-5,08; number of pins: 08; pin pitch: 5.08mm; Angled || order number: 1757307 12A || order number: 1923924 16A (HC) +phoenix_contact connector MSTBA_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_8-G_1x08_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/8-G; number of pins: 08; pin pitch: 5.00mm; Angled || order number: 1757527 12A || order number: 1923814 16A (HC) +phoenix_contact connector MSTBA_01x08_G_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_9-G-5,08_1x09_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/9-G-5,08; number of pins: 09; pin pitch: 5.08mm; Angled || order number: 1757310 12A || order number: 1923937 16A (HC) +phoenix_contact connector MSTBA_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_9-G_1x09_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/9-G; number of pins: 09; pin pitch: 5.00mm; Angled || order number: 1757530 12A || order number: 1923827 16A (HC) +phoenix_contact connector MSTBA_01x09_G_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_10-G-5,08_1x10_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/10-G-5,08; number of pins: 10; pin pitch: 5.08mm; Angled || order number: 1757323 12A || order number: 1923940 16A (HC) +phoenix_contact connector MSTBA_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_10-G_1x10_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/10-G; number of pins: 10; pin pitch: 5.00mm; Angled || order number: 1757543 12A || order number: 1923830 16A (HC) +phoenix_contact connector MSTBA_01x10_G_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_11-G-5,08_1x11_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/11-G-5,08; number of pins: 11; pin pitch: 5.08mm; Angled || order number: 1757336 12A || order number: 1923953 16A (HC) +phoenix_contact connector MSTBA_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_11-G_1x11_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/11-G; number of pins: 11; pin pitch: 5.00mm; Angled || order number: 1757556 12A || order number: 1923843 16A (HC) +phoenix_contact connector MSTBA_01x11_G_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_12-G-5,08_1x12_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/12-G-5,08; number of pins: 12; pin pitch: 5.08mm; Angled || order number: 1757349 12A || order number: 1923966 16A (HC) +phoenix_contact connector MSTBA_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_12-G_1x12_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/12-G; number of pins: 12; pin pitch: 5.00mm; Angled || order number: 1757569 12A || order number: 1923856 16A (HC) +phoenix_contact connector MSTBA_01x12_G_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_13-G-5,08_1x13_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/13-G-5,08; number of pins: 13; pin pitch: 5.08mm; Angled || order number: 1757352 12A +phoenix_contact connector MSTBA_01x13_G_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_13-G_1x13_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/13-G; number of pins: 13; pin pitch: 5.00mm; Angled || order number: 1757572 12A +phoenix_contact connector MSTBA_01x13_G_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_14-G-5,08_1x14_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/14-G-5,08; number of pins: 14; pin pitch: 5.08mm; Angled || order number: 1757365 12A +phoenix_contact connector MSTBA_01x14_G_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_14-G_1x14_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/14-G; number of pins: 14; pin pitch: 5.00mm; Angled || order number: 1757585 12A +phoenix_contact connector MSTBA_01x14_G_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_15-G-5,08_1x15_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/15-G-5,08; number of pins: 15; pin pitch: 5.08mm; Angled || order number: 1757378 12A +phoenix_contact connector MSTBA_01x15_G_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_15-G_1x15_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/15-G; number of pins: 15; pin pitch: 5.00mm; Angled || order number: 1757598 12A +phoenix_contact connector MSTBA_01x15_G_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_16-G-5,08_1x16_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/16-G-5,08; number of pins: 16; pin pitch: 5.08mm; Angled || order number: 1757381 12A +phoenix_contact connector MSTBA_01x16_G_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_16-G_1x16_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/16-G; number of pins: 16; pin pitch: 5.00mm; Angled || order number: 1757608 12A +phoenix_contact connector MSTBA_01x16_G_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_2-G-5,08_1x02_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/2-G-5,08; number of pins: 02; pin pitch: 5.08mm; Vertical || order number: 1755736 12A || order number: 1924305 16A (HC) +phoenix_contact connector MSTBVA_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_2-G_1x02_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/2-G; number of pins: 02; pin pitch: 5.00mm; Vertical || order number: 1755516 12A || order number: 1924198 16A (HC) +phoenix_contact connector MSTBVA_01x02_G_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_3-G-5,08_1x03_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/3-G-5,08; number of pins: 03; pin pitch: 5.08mm; Vertical || order number: 1755749 12A || order number: 1924318 16A (HC) +phoenix_contact connector MSTBVA_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_3-G_1x03_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/3-G; number of pins: 03; pin pitch: 5.00mm; Vertical || order number: 1755529 12A || order number: 1924208 16A (HC) +phoenix_contact connector MSTBVA_01x03_G_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_4-G-5,08_1x04_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/4-G-5,08; number of pins: 04; pin pitch: 5.08mm; Vertical || order number: 1755752 12A || order number: 1924321 16A (HC) +phoenix_contact connector MSTBVA_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_4-G_1x04_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/4-G; number of pins: 04; pin pitch: 5.00mm; Vertical || order number: 1755532 12A || order number: 1924211 16A (HC) +phoenix_contact connector MSTBVA_01x04_G_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_5-G-5,08_1x05_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/5-G-5,08; number of pins: 05; pin pitch: 5.08mm; Vertical || order number: 1755765 12A || order number: 1924334 16A (HC) +phoenix_contact connector MSTBVA_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_5-G_1x05_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/5-G; number of pins: 05; pin pitch: 5.00mm; Vertical || order number: 1755545 12A || order number: 1924224 16A (HC) +phoenix_contact connector MSTBVA_01x05_G_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_6-G-5,08_1x06_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/6-G-5,08; number of pins: 06; pin pitch: 5.08mm; Vertical || order number: 1755778 12A || order number: 1924347 16A (HC) +phoenix_contact connector MSTBVA_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_6-G_1x06_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/6-G; number of pins: 06; pin pitch: 5.00mm; Vertical || order number: 1755558 12A || order number: 1924237 16A (HC) +phoenix_contact connector MSTBVA_01x06_G_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_7-G-5,08_1x07_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/7-G-5,08; number of pins: 07; pin pitch: 5.08mm; Vertical || order number: 1755781 12A || order number: 1924350 16A (HC) +phoenix_contact connector MSTBVA_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_7-G_1x07_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/7-G; number of pins: 07; pin pitch: 5.00mm; Vertical || order number: 1755561 12A || order number: 1924240 16A (HC) +phoenix_contact connector MSTBVA_01x07_G_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_8-G-5,08_1x08_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/8-G-5,08; number of pins: 08; pin pitch: 5.08mm; Vertical || order number: 1755794 12A || order number: 1924363 16A (HC) +phoenix_contact connector MSTBVA_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_8-G_1x08_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/8-G; number of pins: 08; pin pitch: 5.00mm; Vertical || order number: 1755574 12A || order number: 1924253 16A (HC) +phoenix_contact connector MSTBVA_01x08_G_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_9-G-5,08_1x09_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/9-G-5,08; number of pins: 09; pin pitch: 5.08mm; Vertical || order number: 1755804 12A || order number: 1924376 16A (HC) +phoenix_contact connector MSTBVA_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_9-G_1x09_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/9-G; number of pins: 09; pin pitch: 5.00mm; Vertical || order number: 1755587 12A || order number: 1924266 16A (HC) +phoenix_contact connector MSTBVA_01x09_G_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_10-G-5,08_1x10_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/10-G-5,08; number of pins: 10; pin pitch: 5.08mm; Vertical || order number: 1755817 12A || order number: 1924389 16A (HC) +phoenix_contact connector MSTBVA_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_10-G_1x10_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/10-G; number of pins: 10; pin pitch: 5.00mm; Vertical || order number: 1755503 12A || order number: 1924279 16A (HC) +phoenix_contact connector MSTBVA_01x10_G_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_11-G-5,08_1x11_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/11-G-5,08; number of pins: 11; pin pitch: 5.08mm; Vertical || order number: 1755820 12A || order number: 1924392 16A (HC) +phoenix_contact connector MSTBVA_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_11-G_1x11_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/11-G; number of pins: 11; pin pitch: 5.00mm; Vertical || order number: 1755590 12A || order number: 1924282 16A (HC) +phoenix_contact connector MSTBVA_01x11_G_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_12-G-5,08_1x12_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/12-G-5,08; number of pins: 12; pin pitch: 5.08mm; Vertical || order number: 1755833 12A || order number: 1924402 16A (HC) +phoenix_contact connector MSTBVA_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_12-G_1x12_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/12-G; number of pins: 12; pin pitch: 5.00mm; Vertical || order number: 1755600 12A || order number: 1924295 16A (HC) +phoenix_contact connector MSTBVA_01x12_G_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_13-G-5,08_1x13_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/13-G-5,08; number of pins: 13; pin pitch: 5.08mm; Vertical || order number: 1755846 12A +phoenix_contact connector MSTBVA_01x13_G_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_13-G_1x13_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/13-G; number of pins: 13; pin pitch: 5.00mm; Vertical || order number: 1755613 12A +phoenix_contact connector MSTBVA_01x13_G_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_14-G-5,08_1x14_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/14-G-5,08; number of pins: 14; pin pitch: 5.08mm; Vertical || order number: 1755859 12A +phoenix_contact connector MSTBVA_01x14_G_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_14-G_1x14_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/14-G; number of pins: 14; pin pitch: 5.00mm; Vertical || order number: 1755626 12A +phoenix_contact connector MSTBVA_01x14_G_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_15-G-5,08_1x15_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/15-G-5,08; number of pins: 15; pin pitch: 5.08mm; Vertical || order number: 1755862 12A +phoenix_contact connector MSTBVA_01x15_G_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_15-G_1x15_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/15-G; number of pins: 15; pin pitch: 5.00mm; Vertical || order number: 1755639 12A +phoenix_contact connector MSTBVA_01x15_G_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_16-G-5,08_1x16_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/16-G-5,08; number of pins: 16; pin pitch: 5.08mm; Vertical || order number: 1755875 12A +phoenix_contact connector MSTBVA_01x16_G_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_16-G_1x16_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/16-G; number of pins: 16; pin pitch: 5.00mm; Vertical || order number: 1755642 12A +phoenix_contact connector MSTBVA_01x16_G_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF-5,08_1x02_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777073 12A || order number: 1924525 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF-5,08_1x02_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777073 12A || order number: 1924525 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF_1x02_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776883 12A || order number: 1924415 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF_1x02_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776883 12A || order number: 1924415 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.00mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF-5,08_1x03_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777086 12A || order number: 1924538 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF-5,08_1x03_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777086 12A || order number: 1924538 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF_1x03_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776896 12A || order number: 1924428 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF_1x03_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776896 12A || order number: 1924428 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.00mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF-5,08_1x04_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777099 12A || order number: 1924541 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF-5,08_1x04_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777099 12A || order number: 1924541 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF_1x04_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776906 12A || order number: 1924431 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF_1x04_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776906 12A || order number: 1924431 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.00mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF-5,08_1x05_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777109 12A || order number: 1924554 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF-5,08_1x05_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777109 12A || order number: 1924554 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF_1x05_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776919 12A || order number: 1924444 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF_1x05_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776919 12A || order number: 1924444 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.00mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF-5,08_1x06_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777112 12A || order number: 1924567 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF-5,08_1x06_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777112 12A || order number: 1924567 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF_1x06_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776922 12A || order number: 1924457 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF_1x06_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776922 12A || order number: 1924457 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.00mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF-5,08_1x07_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777125 12A || order number: 1924570 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF-5,08_1x07_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777125 12A || order number: 1924570 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF_1x07_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776935 12A || order number: 1924460 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF_1x07_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776935 12A || order number: 1924460 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.00mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF-5,08_1x08_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777138 12A || order number: 1924583 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF-5,08_1x08_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777138 12A || order number: 1924583 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF_1x08_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776948 12A || order number: 1924473 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF_1x08_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776948 12A || order number: 1924473 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.00mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF-5,08_1x09_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777141 12A || order number: 1924596 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF-5,08_1x09_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777141 12A || order number: 1924596 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF_1x09_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776951 12A || order number: 1924486 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF_1x09_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776951 12A || order number: 1924486 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.00mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF-5,08_1x10_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777154 12A || order number: 1924606 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF-5,08_1x10_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777154 12A || order number: 1924606 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF_1x10_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776964 12A || order number: 1924499 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF_1x10_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776964 12A || order number: 1924499 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.00mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF-5,08_1x11_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777167 12A || order number: 1924619 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF-5,08_1x11_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777167 12A || order number: 1924619 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF_1x11_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776977 12A || order number: 1924509 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF_1x11_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776977 12A || order number: 1924509 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.00mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF-5,08_1x12_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777170 12A || order number: 1924622 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF-5,08_1x12_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777170 12A || order number: 1924622 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF_1x12_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776980 12A || order number: 1924512 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF_1x12_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776980 12A || order number: 1924512 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.00mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF-5,08_1x13_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777183 12A +phoenix_contact connector MSTBV_01x13_GF_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF-5,08_1x13_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777183 12A +phoenix_contact connector MSTBV_01x13_GF_5.08mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF_1x13_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776993 12A +phoenix_contact connector MSTBV_01x13_GF_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF_1x13_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776993 12A +phoenix_contact connector MSTBV_01x13_GF_5.00mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF-5,08_1x14_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777196 12A +phoenix_contact connector MSTBV_01x14_GF_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF-5,08_1x14_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777196 12A +phoenix_contact connector MSTBV_01x14_GF_5.08mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF_1x14_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776002 12A +phoenix_contact connector MSTBV_01x14_GF_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF_1x14_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776002 12A +phoenix_contact connector MSTBV_01x14_GF_5.00mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF-5,08_1x15_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777206 12A +phoenix_contact connector MSTBV_01x15_GF_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF-5,08_1x15_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777206 12A +phoenix_contact connector MSTBV_01x15_GF_5.08mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF_1x15_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776015 12A +phoenix_contact connector MSTBV_01x15_GF_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF_1x15_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776015 12A +phoenix_contact connector MSTBV_01x15_GF_5.00mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF-5,08_1x16_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777219 12A +phoenix_contact connector MSTBV_01x16_GF_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF-5,08_1x16_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777219 12A +phoenix_contact connector MSTBV_01x16_GF_5.08mm_MH +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF_1x16_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776028 12A +phoenix_contact connector MSTBV_01x16_GF_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF_1x16_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776028 12A +phoenix_contact connector MSTBV_01x16_GF_5.00mm_MH +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF-5,08_1x02_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776508 12A || order number: 1924088 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF-5,08_1x02_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776508 12A || order number: 1924088 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF_1x02_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776692 12A || order number: 1923979 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF_1x02_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776692 12A || order number: 1923979 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.00mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF-5,08_1x03_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776511 12A || order number: 1924091 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF-5,08_1x03_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776511 12A || order number: 1924091 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF_1x03_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776702 12A || order number: 1923982 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF_1x03_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776702 12A || order number: 1923982 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.00mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF-5,08_1x04_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776524 12A || order number: 1924101 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF-5,08_1x04_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776524 12A || order number: 1924101 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF_1x04_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776715 12A || order number: 1923995 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF_1x04_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776715 12A || order number: 1923995 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.00mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF-5,08_1x05_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776537 12A || order number: 1924114 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF-5,08_1x05_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776537 12A || order number: 1924114 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF_1x05_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776728 12A || order number: 1924004 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF_1x05_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776728 12A || order number: 1924004 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.00mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF-5,08_1x06_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776540 12A || order number: 1924127 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF-5,08_1x06_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776540 12A || order number: 1924127 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF_1x06_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776731 12A || order number: 1924017 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF_1x06_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776731 12A || order number: 1924017 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.00mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF-5,08_1x07_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776553 12A || order number: 1924130 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF-5,08_1x07_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776553 12A || order number: 1924130 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF_1x07_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776744 12A || order number: 1924020 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF_1x07_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776744 12A || order number: 1924020 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.00mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF-5,08_1x08_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776566 12A || order number: 1924143 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF-5,08_1x08_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776566 12A || order number: 1924143 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF_1x08_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776757 12A || order number: 1924033 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF_1x08_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776757 12A || order number: 1924033 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.00mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF-5,08_1x09_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776579 12A || order number: 1924156 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF-5,08_1x09_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776579 12A || order number: 1924156 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF_1x09_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776760 12A || order number: 1924046 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF_1x09_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776760 12A || order number: 1924046 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.00mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF-5,08_1x10_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776582 12A || order number: 1924169 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF-5,08_1x10_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776582 12A || order number: 1924169 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF_1x10_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776773 12A || order number: 1924059 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF_1x10_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776773 12A || order number: 1924059 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.00mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF-5,08_1x11_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776595 12A || order number: 1924172 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF-5,08_1x11_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776595 12A || order number: 1924172 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF_1x11_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776786 12A || order number: 1924062 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF_1x11_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776786 12A || order number: 1924062 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.00mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF-5,08_1x12_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776605 12A || order number: 1924185 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF-5,08_1x12_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776605 12A || order number: 1924185 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF_1x12_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776799 12A || order number: 1924075 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF_1x12_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776799 12A || order number: 1924075 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.00mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF-5,08_1x13_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776618 12A +phoenix_contact connector MSTB_01x13_GF_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF-5,08_1x13_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776618 12A +phoenix_contact connector MSTB_01x13_GF_5.08mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF_1x13_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776809 12A +phoenix_contact connector MSTB_01x13_GF_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF_1x13_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776809 12A +phoenix_contact connector MSTB_01x13_GF_5.00mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF-5,08_1x14_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776621 12A +phoenix_contact connector MSTB_01x14_GF_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF-5,08_1x14_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776621 12A +phoenix_contact connector MSTB_01x14_GF_5.08mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF_1x14_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776812 12A +phoenix_contact connector MSTB_01x14_GF_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF_1x14_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776812 12A +phoenix_contact connector MSTB_01x14_GF_5.00mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF-5,08_1x15_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776634 12A +phoenix_contact connector MSTB_01x15_GF_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF-5,08_1x15_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776634 12A +phoenix_contact connector MSTB_01x15_GF_5.08mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF_1x15_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776825 12A +phoenix_contact connector MSTB_01x15_GF_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF_1x15_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776825 12A +phoenix_contact connector MSTB_01x15_GF_5.00mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF-5,08_1x16_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776647 12A +phoenix_contact connector MSTB_01x16_GF_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF-5,08_1x16_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776647 12A +phoenix_contact connector MSTB_01x16_GF_5.08mm_MH +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF_1x16_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776838 12A +phoenix_contact connector MSTB_01x16_GF_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF_1x16_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776838 12A +phoenix_contact connector MSTB_01x16_GF_5.00mm_MH +0 +16 +16 +Connector_Pin +Pin_D0.7mm_L6.5mm_W1.8mm_FlatFork +solder Pin_ with flat fork, hole diameter 0.7mm, length 6.5mm, width 1.8mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D0.9mm_L10.0mm_W2.4mm_FlatFork +solder Pin_ with flat fork, hole diameter 0.9mm, length 10.0mm, width 2.4mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.0mm_L10.0mm +solder Pin_ diameter 1.0mm, hole diameter 1.0mm (press fit), length 10.0mm +solder Pin_ press fit +0 +1 +1 +Connector_Pin +Pin_D1.0mm_L10.0mm_LooseFit +solder Pin_ diameter 1.0mm, hole diameter 1.2mm (loose fit), length 10.0mm +solder Pin_ loose fit +0 +1 +1 +Connector_Pin +Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork +solder Pin_ with flat fork, hole diameter 1.1mm, length 8.5mm, width 2.5mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.1mm_L10.2mm_W3.5mm_Flat +solder Pin_ with flat with hole, hole diameter 1.1mm, length 10.2mm, width 3.5mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.2mm_L10.2mm_W2.9mm_FlatFork +solder Pin_ with flat with fork, hole diameter 1.2mm, length 11.3mm, width 3.0mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.2mm_L11.3mm_W3.0mm_Flat +solder Pin_ with flat with hole, hole diameter 1.2mm, length 11.3mm, width 3.0mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L10.0mm_W3.5mm_Flat +solder Pin_ with flat with hole, hole diameter 1.3mm, length 10.0mm, width 3.5mm, e.g. Ettinger 13.13.865, https://katalog.ettinger.de/#p=434 +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L11.0mm +solder Pin_ diameter 1.3mm, hole diameter 1.3mm, length 11.0mm +solder Pin_ pressfit +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L11.0mm_LooseFit +solder Pin_ diameter 1.3mm, hole diameter 1.5mm (loose fit), length 11.0mm +solder Pin_ loose fit +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L11.3mm_W2.8mm_Flat +solder Pin_ with flat with hole, hole diameter 1.3mm, length 11.3mm, width 2.8mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.4mm_L8.5mm_W2.8mm_FlatFork +solder Pin_ with flat with fork, hole diameter 1.4mm, length 8.5mm, width 2.8mm, e.g. Ettinger 13.13.890, https://katalog.ettinger.de/#p=434 +solder Pin_ with flat fork +0 +1 +1 +Connector_PinHeader_1.00mm +PinHeader_1x01_P1.00mm_Horizontal +Through hole angled pin header, 1x01, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x01 1.00mm single row +0 +1 +1 +Connector_PinHeader_1.00mm +PinHeader_1x01_P1.00mm_Vertical +Through hole straight pin header, 1x01, 1.00mm pitch, single row +Through hole pin header THT 1x01 1.00mm single row +0 +1 +1 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Horizontal +Through hole angled pin header, 1x02, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x02 1.00mm single row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Vertical +Through hole straight pin header, 1x02, 1.00mm pitch, single row +Through hole pin header THT 1x02 1.00mm single row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 1.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 1.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Horizontal +Through hole angled pin header, 1x03, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x03 1.00mm single row +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Vertical +Through hole straight pin header, 1x03, 1.00mm pitch, single row +Through hole pin header THT 1x03 1.00mm single row +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 1.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 1.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Horizontal +Through hole angled pin header, 1x04, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x04 1.00mm single row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Vertical +Through hole straight pin header, 1x04, 1.00mm pitch, single row +Through hole pin header THT 1x04 1.00mm single row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 1.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 1.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Horizontal +Through hole angled pin header, 1x05, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x05 1.00mm single row +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Vertical +Through hole straight pin header, 1x05, 1.00mm pitch, single row +Through hole pin header THT 1x05 1.00mm single row +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 1.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 1.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Horizontal +Through hole angled pin header, 1x06, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x06 1.00mm single row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Vertical +Through hole straight pin header, 1x06, 1.00mm pitch, single row +Through hole pin header THT 1x06 1.00mm single row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 1.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 1.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Horizontal +Through hole angled pin header, 1x07, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x07 1.00mm single row +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Vertical +Through hole straight pin header, 1x07, 1.00mm pitch, single row +Through hole pin header THT 1x07 1.00mm single row +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 1.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 1.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Horizontal +Through hole angled pin header, 1x08, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x08 1.00mm single row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Vertical +Through hole straight pin header, 1x08, 1.00mm pitch, single row +Through hole pin header THT 1x08 1.00mm single row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 1.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 1.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Horizontal +Through hole angled pin header, 1x09, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x09 1.00mm single row +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Vertical +Through hole straight pin header, 1x09, 1.00mm pitch, single row +Through hole pin header THT 1x09 1.00mm single row +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 1.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 1.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Horizontal +Through hole angled pin header, 1x10, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x10 1.00mm single row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Vertical +Through hole straight pin header, 1x10, 1.00mm pitch, single row +Through hole pin header THT 1x10 1.00mm single row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 1.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 1.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Horizontal +Through hole angled pin header, 1x11, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x11 1.00mm single row +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Vertical +Through hole straight pin header, 1x11, 1.00mm pitch, single row +Through hole pin header THT 1x11 1.00mm single row +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 1.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 1.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Horizontal +Through hole angled pin header, 1x12, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x12 1.00mm single row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Vertical +Through hole straight pin header, 1x12, 1.00mm pitch, single row +Through hole pin header THT 1x12 1.00mm single row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 1.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 1.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Horizontal +Through hole angled pin header, 1x13, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x13 1.00mm single row +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Vertical +Through hole straight pin header, 1x13, 1.00mm pitch, single row +Through hole pin header THT 1x13 1.00mm single row +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 1.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 1.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Horizontal +Through hole angled pin header, 1x14, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x14 1.00mm single row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Vertical +Through hole straight pin header, 1x14, 1.00mm pitch, single row +Through hole pin header THT 1x14 1.00mm single row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 1.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 1.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Horizontal +Through hole angled pin header, 1x15, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x15 1.00mm single row +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Vertical +Through hole straight pin header, 1x15, 1.00mm pitch, single row +Through hole pin header THT 1x15 1.00mm single row +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 1.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 1.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Horizontal +Through hole angled pin header, 1x16, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x16 1.00mm single row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Vertical +Through hole straight pin header, 1x16, 1.00mm pitch, single row +Through hole pin header THT 1x16 1.00mm single row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 1.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 1.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Horizontal +Through hole angled pin header, 1x17, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x17 1.00mm single row +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Vertical +Through hole straight pin header, 1x17, 1.00mm pitch, single row +Through hole pin header THT 1x17 1.00mm single row +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 1.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 1.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Horizontal +Through hole angled pin header, 1x18, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x18 1.00mm single row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Vertical +Through hole straight pin header, 1x18, 1.00mm pitch, single row +Through hole pin header THT 1x18 1.00mm single row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 1.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 1.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Horizontal +Through hole angled pin header, 1x19, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x19 1.00mm single row +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Vertical +Through hole straight pin header, 1x19, 1.00mm pitch, single row +Through hole pin header THT 1x19 1.00mm single row +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 1.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 1.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Horizontal +Through hole angled pin header, 1x20, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x20 1.00mm single row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Vertical +Through hole straight pin header, 1x20, 1.00mm pitch, single row +Through hole pin header THT 1x20 1.00mm single row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 1.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 1.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Horizontal +Through hole angled pin header, 1x21, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x21 1.00mm single row +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Vertical +Through hole straight pin header, 1x21, 1.00mm pitch, single row +Through hole pin header THT 1x21 1.00mm single row +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 1.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 1.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Horizontal +Through hole angled pin header, 1x22, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x22 1.00mm single row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Vertical +Through hole straight pin header, 1x22, 1.00mm pitch, single row +Through hole pin header THT 1x22 1.00mm single row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 1.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 1.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Horizontal +Through hole angled pin header, 1x23, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x23 1.00mm single row +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Vertical +Through hole straight pin header, 1x23, 1.00mm pitch, single row +Through hole pin header THT 1x23 1.00mm single row +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 1.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 1.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Horizontal +Through hole angled pin header, 1x24, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x24 1.00mm single row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Vertical +Through hole straight pin header, 1x24, 1.00mm pitch, single row +Through hole pin header THT 1x24 1.00mm single row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 1.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 1.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Horizontal +Through hole angled pin header, 1x25, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x25 1.00mm single row +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Vertical +Through hole straight pin header, 1x25, 1.00mm pitch, single row +Through hole pin header THT 1x25 1.00mm single row +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 1.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 1.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Horizontal +Through hole angled pin header, 1x26, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x26 1.00mm single row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Vertical +Through hole straight pin header, 1x26, 1.00mm pitch, single row +Through hole pin header THT 1x26 1.00mm single row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 1.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 1.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Horizontal +Through hole angled pin header, 1x27, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x27 1.00mm single row +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Vertical +Through hole straight pin header, 1x27, 1.00mm pitch, single row +Through hole pin header THT 1x27 1.00mm single row +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 1.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 1.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Horizontal +Through hole angled pin header, 1x28, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x28 1.00mm single row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Vertical +Through hole straight pin header, 1x28, 1.00mm pitch, single row +Through hole pin header THT 1x28 1.00mm single row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 1.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 1.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Horizontal +Through hole angled pin header, 1x29, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x29 1.00mm single row +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Vertical +Through hole straight pin header, 1x29, 1.00mm pitch, single row +Through hole pin header THT 1x29 1.00mm single row +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 1.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 1.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Horizontal +Through hole angled pin header, 1x30, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x30 1.00mm single row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Vertical +Through hole straight pin header, 1x30, 1.00mm pitch, single row +Through hole pin header THT 1x30 1.00mm single row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 1.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 1.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Horizontal +Through hole angled pin header, 1x31, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x31 1.00mm single row +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Vertical +Through hole straight pin header, 1x31, 1.00mm pitch, single row +Through hole pin header THT 1x31 1.00mm single row +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 1.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 1.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Horizontal +Through hole angled pin header, 1x32, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x32 1.00mm single row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Vertical +Through hole straight pin header, 1x32, 1.00mm pitch, single row +Through hole pin header THT 1x32 1.00mm single row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 1.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 1.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Horizontal +Through hole angled pin header, 1x33, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x33 1.00mm single row +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Vertical +Through hole straight pin header, 1x33, 1.00mm pitch, single row +Through hole pin header THT 1x33 1.00mm single row +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 1.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 1.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Horizontal +Through hole angled pin header, 1x34, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x34 1.00mm single row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Vertical +Through hole straight pin header, 1x34, 1.00mm pitch, single row +Through hole pin header THT 1x34 1.00mm single row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 1.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 1.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Horizontal +Through hole angled pin header, 1x35, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x35 1.00mm single row +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Vertical +Through hole straight pin header, 1x35, 1.00mm pitch, single row +Through hole pin header THT 1x35 1.00mm single row +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 1.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 1.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Horizontal +Through hole angled pin header, 1x36, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x36 1.00mm single row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Vertical +Through hole straight pin header, 1x36, 1.00mm pitch, single row +Through hole pin header THT 1x36 1.00mm single row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 1.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 1.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Horizontal +Through hole angled pin header, 1x37, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x37 1.00mm single row +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Vertical +Through hole straight pin header, 1x37, 1.00mm pitch, single row +Through hole pin header THT 1x37 1.00mm single row +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 1.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 1.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Horizontal +Through hole angled pin header, 1x38, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x38 1.00mm single row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Vertical +Through hole straight pin header, 1x38, 1.00mm pitch, single row +Through hole pin header THT 1x38 1.00mm single row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 1.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 1.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Horizontal +Through hole angled pin header, 1x39, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x39 1.00mm single row +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Vertical +Through hole straight pin header, 1x39, 1.00mm pitch, single row +Through hole pin header THT 1x39 1.00mm single row +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 1.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 1.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Horizontal +Through hole angled pin header, 1x40, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x40 1.00mm single row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Vertical +Through hole straight pin header, 1x40, 1.00mm pitch, single row +Through hole pin header THT 1x40 1.00mm single row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 1.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 1.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x01_P1.00mm_Horizontal +Through hole angled pin header, 2x01, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x01 1.00mm double row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_2x01_P1.00mm_Vertical +Through hole straight pin header, 2x01, 1.00mm pitch, double rows +Through hole pin header THT 2x01 1.00mm double row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_2x01_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x01 1.00mm double row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_2x02_P1.00mm_Horizontal +Through hole angled pin header, 2x02, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x02 1.00mm double row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_2x02_P1.00mm_Vertical +Through hole straight pin header, 2x02, 1.00mm pitch, double rows +Through hole pin header THT 2x02 1.00mm double row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_2x02_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x02 1.00mm double row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_2x03_P1.00mm_Horizontal +Through hole angled pin header, 2x03, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x03 1.00mm double row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_2x03_P1.00mm_Vertical +Through hole straight pin header, 2x03, 1.00mm pitch, double rows +Through hole pin header THT 2x03 1.00mm double row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_2x03_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x03 1.00mm double row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_2x04_P1.00mm_Horizontal +Through hole angled pin header, 2x04, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x04 1.00mm double row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_2x04_P1.00mm_Vertical +Through hole straight pin header, 2x04, 1.00mm pitch, double rows +Through hole pin header THT 2x04 1.00mm double row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_2x04_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x04 1.00mm double row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_2x05_P1.00mm_Horizontal +Through hole angled pin header, 2x05, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x05 1.00mm double row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_2x05_P1.00mm_Vertical +Through hole straight pin header, 2x05, 1.00mm pitch, double rows +Through hole pin header THT 2x05 1.00mm double row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_2x05_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x05 1.00mm double row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_2x06_P1.00mm_Horizontal +Through hole angled pin header, 2x06, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x06 1.00mm double row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_2x06_P1.00mm_Vertical +Through hole straight pin header, 2x06, 1.00mm pitch, double rows +Through hole pin header THT 2x06 1.00mm double row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_2x06_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x06 1.00mm double row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_2x07_P1.00mm_Horizontal +Through hole angled pin header, 2x07, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x07 1.00mm double row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_2x07_P1.00mm_Vertical +Through hole straight pin header, 2x07, 1.00mm pitch, double rows +Through hole pin header THT 2x07 1.00mm double row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_2x07_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x07 1.00mm double row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_2x08_P1.00mm_Horizontal +Through hole angled pin header, 2x08, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x08 1.00mm double row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_2x08_P1.00mm_Vertical +Through hole straight pin header, 2x08, 1.00mm pitch, double rows +Through hole pin header THT 2x08 1.00mm double row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_2x08_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x08 1.00mm double row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_2x09_P1.00mm_Horizontal +Through hole angled pin header, 2x09, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x09 1.00mm double row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_2x09_P1.00mm_Vertical +Through hole straight pin header, 2x09, 1.00mm pitch, double rows +Through hole pin header THT 2x09 1.00mm double row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_2x09_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x09 1.00mm double row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_2x10_P1.00mm_Horizontal +Through hole angled pin header, 2x10, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x10 1.00mm double row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_2x10_P1.00mm_Vertical +Through hole straight pin header, 2x10, 1.00mm pitch, double rows +Through hole pin header THT 2x10 1.00mm double row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_2x10_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x10 1.00mm double row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_2x11_P1.00mm_Horizontal +Through hole angled pin header, 2x11, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x11 1.00mm double row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_2x11_P1.00mm_Vertical +Through hole straight pin header, 2x11, 1.00mm pitch, double rows +Through hole pin header THT 2x11 1.00mm double row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_2x11_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x11 1.00mm double row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_2x12_P1.00mm_Horizontal +Through hole angled pin header, 2x12, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x12 1.00mm double row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_2x12_P1.00mm_Vertical +Through hole straight pin header, 2x12, 1.00mm pitch, double rows +Through hole pin header THT 2x12 1.00mm double row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_2x12_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x12 1.00mm double row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_2x13_P1.00mm_Horizontal +Through hole angled pin header, 2x13, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x13 1.00mm double row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_2x13_P1.00mm_Vertical +Through hole straight pin header, 2x13, 1.00mm pitch, double rows +Through hole pin header THT 2x13 1.00mm double row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_2x13_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x13 1.00mm double row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_2x14_P1.00mm_Horizontal +Through hole angled pin header, 2x14, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x14 1.00mm double row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_2x14_P1.00mm_Vertical +Through hole straight pin header, 2x14, 1.00mm pitch, double rows +Through hole pin header THT 2x14 1.00mm double row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_2x14_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x14 1.00mm double row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_2x15_P1.00mm_Horizontal +Through hole angled pin header, 2x15, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x15 1.00mm double row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_2x15_P1.00mm_Vertical +Through hole straight pin header, 2x15, 1.00mm pitch, double rows +Through hole pin header THT 2x15 1.00mm double row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_2x15_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x15 1.00mm double row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_2x16_P1.00mm_Horizontal +Through hole angled pin header, 2x16, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x16 1.00mm double row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_2x16_P1.00mm_Vertical +Through hole straight pin header, 2x16, 1.00mm pitch, double rows +Through hole pin header THT 2x16 1.00mm double row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_2x16_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x16 1.00mm double row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_2x17_P1.00mm_Horizontal +Through hole angled pin header, 2x17, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x17 1.00mm double row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_2x17_P1.00mm_Vertical +Through hole straight pin header, 2x17, 1.00mm pitch, double rows +Through hole pin header THT 2x17 1.00mm double row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_2x17_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x17 1.00mm double row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_2x18_P1.00mm_Horizontal +Through hole angled pin header, 2x18, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x18 1.00mm double row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_2x18_P1.00mm_Vertical +Through hole straight pin header, 2x18, 1.00mm pitch, double rows +Through hole pin header THT 2x18 1.00mm double row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_2x18_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x18 1.00mm double row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_2x19_P1.00mm_Horizontal +Through hole angled pin header, 2x19, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x19 1.00mm double row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_2x19_P1.00mm_Vertical +Through hole straight pin header, 2x19, 1.00mm pitch, double rows +Through hole pin header THT 2x19 1.00mm double row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_2x19_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x19 1.00mm double row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_2x20_P1.00mm_Horizontal +Through hole angled pin header, 2x20, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x20 1.00mm double row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x20_P1.00mm_Vertical +Through hole straight pin header, 2x20, 1.00mm pitch, double rows +Through hole pin header THT 2x20 1.00mm double row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x20_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x20 1.00mm double row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x21_P1.00mm_Horizontal +Through hole angled pin header, 2x21, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x21 1.00mm double row +0 +42 +42 +Connector_PinHeader_1.00mm +PinHeader_2x21_P1.00mm_Vertical +Through hole straight pin header, 2x21, 1.00mm pitch, double rows +Through hole pin header THT 2x21 1.00mm double row +0 +42 +42 +Connector_PinHeader_1.00mm +PinHeader_2x21_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x21 1.00mm double row +0 +42 +42 +Connector_PinHeader_1.00mm +PinHeader_2x22_P1.00mm_Horizontal +Through hole angled pin header, 2x22, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x22 1.00mm double row +0 +44 +44 +Connector_PinHeader_1.00mm +PinHeader_2x22_P1.00mm_Vertical +Through hole straight pin header, 2x22, 1.00mm pitch, double rows +Through hole pin header THT 2x22 1.00mm double row +0 +44 +44 +Connector_PinHeader_1.00mm +PinHeader_2x22_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x22 1.00mm double row +0 +44 +44 +Connector_PinHeader_1.00mm +PinHeader_2x23_P1.00mm_Horizontal +Through hole angled pin header, 2x23, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x23 1.00mm double row +0 +46 +46 +Connector_PinHeader_1.00mm +PinHeader_2x23_P1.00mm_Vertical +Through hole straight pin header, 2x23, 1.00mm pitch, double rows +Through hole pin header THT 2x23 1.00mm double row +0 +46 +46 +Connector_PinHeader_1.00mm +PinHeader_2x23_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x23 1.00mm double row +0 +46 +46 +Connector_PinHeader_1.00mm +PinHeader_2x24_P1.00mm_Horizontal +Through hole angled pin header, 2x24, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x24 1.00mm double row +0 +48 +48 +Connector_PinHeader_1.00mm +PinHeader_2x24_P1.00mm_Vertical +Through hole straight pin header, 2x24, 1.00mm pitch, double rows +Through hole pin header THT 2x24 1.00mm double row +0 +48 +48 +Connector_PinHeader_1.00mm +PinHeader_2x24_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x24 1.00mm double row +0 +48 +48 +Connector_PinHeader_1.00mm +PinHeader_2x25_P1.00mm_Horizontal +Through hole angled pin header, 2x25, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x25 1.00mm double row +0 +50 +50 +Connector_PinHeader_1.00mm +PinHeader_2x25_P1.00mm_Vertical +Through hole straight pin header, 2x25, 1.00mm pitch, double rows +Through hole pin header THT 2x25 1.00mm double row +0 +50 +50 +Connector_PinHeader_1.00mm +PinHeader_2x25_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x25 1.00mm double row +0 +50 +50 +Connector_PinHeader_1.00mm +PinHeader_2x26_P1.00mm_Horizontal +Through hole angled pin header, 2x26, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x26 1.00mm double row +0 +52 +52 +Connector_PinHeader_1.00mm +PinHeader_2x26_P1.00mm_Vertical +Through hole straight pin header, 2x26, 1.00mm pitch, double rows +Through hole pin header THT 2x26 1.00mm double row +0 +52 +52 +Connector_PinHeader_1.00mm +PinHeader_2x26_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x26 1.00mm double row +0 +52 +52 +Connector_PinHeader_1.00mm +PinHeader_2x27_P1.00mm_Horizontal +Through hole angled pin header, 2x27, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x27 1.00mm double row +0 +54 +54 +Connector_PinHeader_1.00mm +PinHeader_2x27_P1.00mm_Vertical +Through hole straight pin header, 2x27, 1.00mm pitch, double rows +Through hole pin header THT 2x27 1.00mm double row +0 +54 +54 +Connector_PinHeader_1.00mm +PinHeader_2x27_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x27 1.00mm double row +0 +54 +54 +Connector_PinHeader_1.00mm +PinHeader_2x28_P1.00mm_Horizontal +Through hole angled pin header, 2x28, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x28 1.00mm double row +0 +56 +56 +Connector_PinHeader_1.00mm +PinHeader_2x28_P1.00mm_Vertical +Through hole straight pin header, 2x28, 1.00mm pitch, double rows +Through hole pin header THT 2x28 1.00mm double row +0 +56 +56 +Connector_PinHeader_1.00mm +PinHeader_2x28_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x28 1.00mm double row +0 +56 +56 +Connector_PinHeader_1.00mm +PinHeader_2x29_P1.00mm_Horizontal +Through hole angled pin header, 2x29, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x29 1.00mm double row +0 +58 +58 +Connector_PinHeader_1.00mm +PinHeader_2x29_P1.00mm_Vertical +Through hole straight pin header, 2x29, 1.00mm pitch, double rows +Through hole pin header THT 2x29 1.00mm double row +0 +58 +58 +Connector_PinHeader_1.00mm +PinHeader_2x29_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x29 1.00mm double row +0 +58 +58 +Connector_PinHeader_1.00mm +PinHeader_2x30_P1.00mm_Horizontal +Through hole angled pin header, 2x30, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x30 1.00mm double row +0 +60 +60 +Connector_PinHeader_1.00mm +PinHeader_2x30_P1.00mm_Vertical +Through hole straight pin header, 2x30, 1.00mm pitch, double rows +Through hole pin header THT 2x30 1.00mm double row +0 +60 +60 +Connector_PinHeader_1.00mm +PinHeader_2x30_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x30 1.00mm double row +0 +60 +60 +Connector_PinHeader_1.00mm +PinHeader_2x31_P1.00mm_Horizontal +Through hole angled pin header, 2x31, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x31 1.00mm double row +0 +62 +62 +Connector_PinHeader_1.00mm +PinHeader_2x31_P1.00mm_Vertical +Through hole straight pin header, 2x31, 1.00mm pitch, double rows +Through hole pin header THT 2x31 1.00mm double row +0 +62 +62 +Connector_PinHeader_1.00mm +PinHeader_2x31_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x31 1.00mm double row +0 +62 +62 +Connector_PinHeader_1.00mm +PinHeader_2x32_P1.00mm_Horizontal +Through hole angled pin header, 2x32, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x32 1.00mm double row +0 +64 +64 +Connector_PinHeader_1.00mm +PinHeader_2x32_P1.00mm_Vertical +Through hole straight pin header, 2x32, 1.00mm pitch, double rows +Through hole pin header THT 2x32 1.00mm double row +0 +64 +64 +Connector_PinHeader_1.00mm +PinHeader_2x32_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x32 1.00mm double row +0 +64 +64 +Connector_PinHeader_1.00mm +PinHeader_2x33_P1.00mm_Horizontal +Through hole angled pin header, 2x33, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x33 1.00mm double row +0 +66 +66 +Connector_PinHeader_1.00mm +PinHeader_2x33_P1.00mm_Vertical +Through hole straight pin header, 2x33, 1.00mm pitch, double rows +Through hole pin header THT 2x33 1.00mm double row +0 +66 +66 +Connector_PinHeader_1.00mm +PinHeader_2x33_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x33 1.00mm double row +0 +66 +66 +Connector_PinHeader_1.00mm +PinHeader_2x34_P1.00mm_Horizontal +Through hole angled pin header, 2x34, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x34 1.00mm double row +0 +68 +68 +Connector_PinHeader_1.00mm +PinHeader_2x34_P1.00mm_Vertical +Through hole straight pin header, 2x34, 1.00mm pitch, double rows +Through hole pin header THT 2x34 1.00mm double row +0 +68 +68 +Connector_PinHeader_1.00mm +PinHeader_2x34_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x34 1.00mm double row +0 +68 +68 +Connector_PinHeader_1.00mm +PinHeader_2x35_P1.00mm_Horizontal +Through hole angled pin header, 2x35, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x35 1.00mm double row +0 +70 +70 +Connector_PinHeader_1.00mm +PinHeader_2x35_P1.00mm_Vertical +Through hole straight pin header, 2x35, 1.00mm pitch, double rows +Through hole pin header THT 2x35 1.00mm double row +0 +70 +70 +Connector_PinHeader_1.00mm +PinHeader_2x35_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x35 1.00mm double row +0 +70 +70 +Connector_PinHeader_1.00mm +PinHeader_2x36_P1.00mm_Horizontal +Through hole angled pin header, 2x36, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x36 1.00mm double row +0 +72 +72 +Connector_PinHeader_1.00mm +PinHeader_2x36_P1.00mm_Vertical +Through hole straight pin header, 2x36, 1.00mm pitch, double rows +Through hole pin header THT 2x36 1.00mm double row +0 +72 +72 +Connector_PinHeader_1.00mm +PinHeader_2x36_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x36 1.00mm double row +0 +72 +72 +Connector_PinHeader_1.00mm +PinHeader_2x37_P1.00mm_Horizontal +Through hole angled pin header, 2x37, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x37 1.00mm double row +0 +74 +74 +Connector_PinHeader_1.00mm +PinHeader_2x37_P1.00mm_Vertical +Through hole straight pin header, 2x37, 1.00mm pitch, double rows +Through hole pin header THT 2x37 1.00mm double row +0 +74 +74 +Connector_PinHeader_1.00mm +PinHeader_2x37_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x37 1.00mm double row +0 +74 +74 +Connector_PinHeader_1.00mm +PinHeader_2x38_P1.00mm_Horizontal +Through hole angled pin header, 2x38, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x38 1.00mm double row +0 +76 +76 +Connector_PinHeader_1.00mm +PinHeader_2x38_P1.00mm_Vertical +Through hole straight pin header, 2x38, 1.00mm pitch, double rows +Through hole pin header THT 2x38 1.00mm double row +0 +76 +76 +Connector_PinHeader_1.00mm +PinHeader_2x38_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x38 1.00mm double row +0 +76 +76 +Connector_PinHeader_1.00mm +PinHeader_2x39_P1.00mm_Horizontal +Through hole angled pin header, 2x39, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x39 1.00mm double row +0 +78 +78 +Connector_PinHeader_1.00mm +PinHeader_2x39_P1.00mm_Vertical +Through hole straight pin header, 2x39, 1.00mm pitch, double rows +Through hole pin header THT 2x39 1.00mm double row +0 +78 +78 +Connector_PinHeader_1.00mm +PinHeader_2x39_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x39 1.00mm double row +0 +78 +78 +Connector_PinHeader_1.00mm +PinHeader_2x40_P1.00mm_Horizontal +Through hole angled pin header, 2x40, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x40 1.00mm double row +0 +80 +80 +Connector_PinHeader_1.00mm +PinHeader_2x40_P1.00mm_Vertical +Through hole straight pin header, 2x40, 1.00mm pitch, double rows +Through hole pin header THT 2x40 1.00mm double row +0 +80 +80 +Connector_PinHeader_1.00mm +PinHeader_2x40_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x40 1.00mm double row +0 +80 +80 +Connector_PinHeader_1.27mm +PinHeader_1x01_P1.27mm_Horizontal +Through hole angled pin header, 1x01, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x01 1.27mm single row +0 +1 +1 +Connector_PinHeader_1.27mm +PinHeader_1x01_P1.27mm_Vertical +Through hole straight pin header, 1x01, 1.27mm pitch, single row +Through hole pin header THT 1x01 1.27mm single row +0 +1 +1 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Horizontal +Through hole angled pin header, 1x02, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x02 1.27mm single row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Vertical +Through hole straight pin header, 1x02, 1.27mm pitch, single row +Through hole pin header THT 1x02 1.27mm single row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 1.27mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 1.27mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Horizontal +Through hole angled pin header, 1x03, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x03 1.27mm single row +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Vertical +Through hole straight pin header, 1x03, 1.27mm pitch, single row +Through hole pin header THT 1x03 1.27mm single row +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 1.27mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 1.27mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Horizontal +Through hole angled pin header, 1x04, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x04 1.27mm single row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Vertical +Through hole straight pin header, 1x04, 1.27mm pitch, single row +Through hole pin header THT 1x04 1.27mm single row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 1.27mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 1.27mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Horizontal +Through hole angled pin header, 1x05, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x05 1.27mm single row +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Vertical +Through hole straight pin header, 1x05, 1.27mm pitch, single row +Through hole pin header THT 1x05 1.27mm single row +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 1.27mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 1.27mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Horizontal +Through hole angled pin header, 1x06, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x06 1.27mm single row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Vertical +Through hole straight pin header, 1x06, 1.27mm pitch, single row +Through hole pin header THT 1x06 1.27mm single row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 1.27mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 1.27mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Horizontal +Through hole angled pin header, 1x07, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x07 1.27mm single row +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Vertical +Through hole straight pin header, 1x07, 1.27mm pitch, single row +Through hole pin header THT 1x07 1.27mm single row +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 1.27mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 1.27mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Horizontal +Through hole angled pin header, 1x08, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x08 1.27mm single row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Vertical +Through hole straight pin header, 1x08, 1.27mm pitch, single row +Through hole pin header THT 1x08 1.27mm single row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 1.27mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 1.27mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Horizontal +Through hole angled pin header, 1x09, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x09 1.27mm single row +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Vertical +Through hole straight pin header, 1x09, 1.27mm pitch, single row +Through hole pin header THT 1x09 1.27mm single row +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 1.27mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 1.27mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Horizontal +Through hole angled pin header, 1x10, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x10 1.27mm single row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Vertical +Through hole straight pin header, 1x10, 1.27mm pitch, single row +Through hole pin header THT 1x10 1.27mm single row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 1.27mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 1.27mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Horizontal +Through hole angled pin header, 1x11, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x11 1.27mm single row +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Vertical +Through hole straight pin header, 1x11, 1.27mm pitch, single row +Through hole pin header THT 1x11 1.27mm single row +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 1.27mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 1.27mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Horizontal +Through hole angled pin header, 1x12, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x12 1.27mm single row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Vertical +Through hole straight pin header, 1x12, 1.27mm pitch, single row +Through hole pin header THT 1x12 1.27mm single row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 1.27mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 1.27mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Horizontal +Through hole angled pin header, 1x13, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x13 1.27mm single row +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Vertical +Through hole straight pin header, 1x13, 1.27mm pitch, single row +Through hole pin header THT 1x13 1.27mm single row +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 1.27mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 1.27mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Horizontal +Through hole angled pin header, 1x14, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x14 1.27mm single row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Vertical +Through hole straight pin header, 1x14, 1.27mm pitch, single row +Through hole pin header THT 1x14 1.27mm single row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 1.27mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 1.27mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Horizontal +Through hole angled pin header, 1x15, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x15 1.27mm single row +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Vertical +Through hole straight pin header, 1x15, 1.27mm pitch, single row +Through hole pin header THT 1x15 1.27mm single row +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 1.27mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 1.27mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Horizontal +Through hole angled pin header, 1x16, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x16 1.27mm single row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Vertical +Through hole straight pin header, 1x16, 1.27mm pitch, single row +Through hole pin header THT 1x16 1.27mm single row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 1.27mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 1.27mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Horizontal +Through hole angled pin header, 1x17, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x17 1.27mm single row +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Vertical +Through hole straight pin header, 1x17, 1.27mm pitch, single row +Through hole pin header THT 1x17 1.27mm single row +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 1.27mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 1.27mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Horizontal +Through hole angled pin header, 1x18, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x18 1.27mm single row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Vertical +Through hole straight pin header, 1x18, 1.27mm pitch, single row +Through hole pin header THT 1x18 1.27mm single row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 1.27mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 1.27mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Horizontal +Through hole angled pin header, 1x19, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x19 1.27mm single row +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Vertical +Through hole straight pin header, 1x19, 1.27mm pitch, single row +Through hole pin header THT 1x19 1.27mm single row +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 1.27mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 1.27mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Horizontal +Through hole angled pin header, 1x20, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x20 1.27mm single row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Vertical +Through hole straight pin header, 1x20, 1.27mm pitch, single row +Through hole pin header THT 1x20 1.27mm single row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 1.27mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 1.27mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Horizontal +Through hole angled pin header, 1x21, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x21 1.27mm single row +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Vertical +Through hole straight pin header, 1x21, 1.27mm pitch, single row +Through hole pin header THT 1x21 1.27mm single row +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 1.27mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 1.27mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Horizontal +Through hole angled pin header, 1x22, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x22 1.27mm single row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Vertical +Through hole straight pin header, 1x22, 1.27mm pitch, single row +Through hole pin header THT 1x22 1.27mm single row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 1.27mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 1.27mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Horizontal +Through hole angled pin header, 1x23, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x23 1.27mm single row +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Vertical +Through hole straight pin header, 1x23, 1.27mm pitch, single row +Through hole pin header THT 1x23 1.27mm single row +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 1.27mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 1.27mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Horizontal +Through hole angled pin header, 1x24, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x24 1.27mm single row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Vertical +Through hole straight pin header, 1x24, 1.27mm pitch, single row +Through hole pin header THT 1x24 1.27mm single row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 1.27mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 1.27mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Horizontal +Through hole angled pin header, 1x25, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x25 1.27mm single row +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Vertical +Through hole straight pin header, 1x25, 1.27mm pitch, single row +Through hole pin header THT 1x25 1.27mm single row +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 1.27mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 1.27mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Horizontal +Through hole angled pin header, 1x26, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x26 1.27mm single row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Vertical +Through hole straight pin header, 1x26, 1.27mm pitch, single row +Through hole pin header THT 1x26 1.27mm single row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 1.27mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 1.27mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Horizontal +Through hole angled pin header, 1x27, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x27 1.27mm single row +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Vertical +Through hole straight pin header, 1x27, 1.27mm pitch, single row +Through hole pin header THT 1x27 1.27mm single row +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 1.27mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 1.27mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Horizontal +Through hole angled pin header, 1x28, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x28 1.27mm single row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Vertical +Through hole straight pin header, 1x28, 1.27mm pitch, single row +Through hole pin header THT 1x28 1.27mm single row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 1.27mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 1.27mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Horizontal +Through hole angled pin header, 1x29, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x29 1.27mm single row +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Vertical +Through hole straight pin header, 1x29, 1.27mm pitch, single row +Through hole pin header THT 1x29 1.27mm single row +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 1.27mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 1.27mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Horizontal +Through hole angled pin header, 1x30, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x30 1.27mm single row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Vertical +Through hole straight pin header, 1x30, 1.27mm pitch, single row +Through hole pin header THT 1x30 1.27mm single row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 1.27mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 1.27mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Horizontal +Through hole angled pin header, 1x31, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x31 1.27mm single row +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Vertical +Through hole straight pin header, 1x31, 1.27mm pitch, single row +Through hole pin header THT 1x31 1.27mm single row +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 1.27mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 1.27mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Horizontal +Through hole angled pin header, 1x32, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x32 1.27mm single row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Vertical +Through hole straight pin header, 1x32, 1.27mm pitch, single row +Through hole pin header THT 1x32 1.27mm single row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 1.27mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 1.27mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Horizontal +Through hole angled pin header, 1x33, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x33 1.27mm single row +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Vertical +Through hole straight pin header, 1x33, 1.27mm pitch, single row +Through hole pin header THT 1x33 1.27mm single row +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 1.27mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 1.27mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Horizontal +Through hole angled pin header, 1x34, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x34 1.27mm single row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Vertical +Through hole straight pin header, 1x34, 1.27mm pitch, single row +Through hole pin header THT 1x34 1.27mm single row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 1.27mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 1.27mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Horizontal +Through hole angled pin header, 1x35, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x35 1.27mm single row +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Vertical +Through hole straight pin header, 1x35, 1.27mm pitch, single row +Through hole pin header THT 1x35 1.27mm single row +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 1.27mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 1.27mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Horizontal +Through hole angled pin header, 1x36, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x36 1.27mm single row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Vertical +Through hole straight pin header, 1x36, 1.27mm pitch, single row +Through hole pin header THT 1x36 1.27mm single row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 1.27mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 1.27mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Horizontal +Through hole angled pin header, 1x37, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x37 1.27mm single row +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Vertical +Through hole straight pin header, 1x37, 1.27mm pitch, single row +Through hole pin header THT 1x37 1.27mm single row +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 1.27mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 1.27mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Horizontal +Through hole angled pin header, 1x38, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x38 1.27mm single row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Vertical +Through hole straight pin header, 1x38, 1.27mm pitch, single row +Through hole pin header THT 1x38 1.27mm single row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 1.27mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 1.27mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Horizontal +Through hole angled pin header, 1x39, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x39 1.27mm single row +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Vertical +Through hole straight pin header, 1x39, 1.27mm pitch, single row +Through hole pin header THT 1x39 1.27mm single row +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 1.27mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 1.27mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Horizontal +Through hole angled pin header, 1x40, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x40 1.27mm single row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Vertical +Through hole straight pin header, 1x40, 1.27mm pitch, single row +Through hole pin header THT 1x40 1.27mm single row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 1.27mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 1.27mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x01_P1.27mm_Horizontal +Through hole angled pin header, 2x01, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x01 1.27mm double row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_2x01_P1.27mm_Vertical +Through hole straight pin header, 2x01, 1.27mm pitch, double rows +Through hole pin header THT 2x01 1.27mm double row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_2x01_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x01 1.27mm double row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_2x02_P1.27mm_Horizontal +Through hole angled pin header, 2x02, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x02 1.27mm double row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_2x02_P1.27mm_Vertical +Through hole straight pin header, 2x02, 1.27mm pitch, double rows +Through hole pin header THT 2x02 1.27mm double row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_2x02_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x02 1.27mm double row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_2x03_P1.27mm_Horizontal +Through hole angled pin header, 2x03, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_2x03_P1.27mm_Vertical +Through hole straight pin header, 2x03, 1.27mm pitch, double rows +Through hole pin header THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_2x03_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x03 1.27mm double row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_2x04_P1.27mm_Horizontal +Through hole angled pin header, 2x04, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_2x04_P1.27mm_Vertical +Through hole straight pin header, 2x04, 1.27mm pitch, double rows +Through hole pin header THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_2x04_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x04 1.27mm double row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_2x05_P1.27mm_Horizontal +Through hole angled pin header, 2x05, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_2x05_P1.27mm_Vertical +Through hole straight pin header, 2x05, 1.27mm pitch, double rows +Through hole pin header THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_2x05_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x05 1.27mm double row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_2x06_P1.27mm_Horizontal +Through hole angled pin header, 2x06, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_2x06_P1.27mm_Vertical +Through hole straight pin header, 2x06, 1.27mm pitch, double rows +Through hole pin header THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_2x06_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x06 1.27mm double row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_2x07_P1.27mm_Horizontal +Through hole angled pin header, 2x07, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_2x07_P1.27mm_Vertical +Through hole straight pin header, 2x07, 1.27mm pitch, double rows +Through hole pin header THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_2x07_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x07 1.27mm double row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_2x08_P1.27mm_Horizontal +Through hole angled pin header, 2x08, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_2x08_P1.27mm_Vertical +Through hole straight pin header, 2x08, 1.27mm pitch, double rows +Through hole pin header THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_2x08_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x08 1.27mm double row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_2x09_P1.27mm_Horizontal +Through hole angled pin header, 2x09, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_2x09_P1.27mm_Vertical +Through hole straight pin header, 2x09, 1.27mm pitch, double rows +Through hole pin header THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_2x09_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x09 1.27mm double row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_2x10_P1.27mm_Horizontal +Through hole angled pin header, 2x10, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_2x10_P1.27mm_Vertical +Through hole straight pin header, 2x10, 1.27mm pitch, double rows +Through hole pin header THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_2x10_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x10 1.27mm double row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_2x11_P1.27mm_Horizontal +Through hole angled pin header, 2x11, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_2x11_P1.27mm_Vertical +Through hole straight pin header, 2x11, 1.27mm pitch, double rows +Through hole pin header THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_2x11_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x11 1.27mm double row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_2x12_P1.27mm_Horizontal +Through hole angled pin header, 2x12, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_2x12_P1.27mm_Vertical +Through hole straight pin header, 2x12, 1.27mm pitch, double rows +Through hole pin header THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_2x12_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x12 1.27mm double row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_2x13_P1.27mm_Horizontal +Through hole angled pin header, 2x13, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_2x13_P1.27mm_Vertical +Through hole straight pin header, 2x13, 1.27mm pitch, double rows +Through hole pin header THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_2x13_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x13 1.27mm double row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_2x14_P1.27mm_Horizontal +Through hole angled pin header, 2x14, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_2x14_P1.27mm_Vertical +Through hole straight pin header, 2x14, 1.27mm pitch, double rows +Through hole pin header THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_2x14_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x14 1.27mm double row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_2x15_P1.27mm_Horizontal +Through hole angled pin header, 2x15, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_2x15_P1.27mm_Vertical +Through hole straight pin header, 2x15, 1.27mm pitch, double rows +Through hole pin header THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_2x15_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x15 1.27mm double row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_2x16_P1.27mm_Horizontal +Through hole angled pin header, 2x16, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_2x16_P1.27mm_Vertical +Through hole straight pin header, 2x16, 1.27mm pitch, double rows +Through hole pin header THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_2x16_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x16 1.27mm double row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_2x17_P1.27mm_Horizontal +Through hole angled pin header, 2x17, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_2x17_P1.27mm_Vertical +Through hole straight pin header, 2x17, 1.27mm pitch, double rows +Through hole pin header THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_2x17_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x17 1.27mm double row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_2x18_P1.27mm_Horizontal +Through hole angled pin header, 2x18, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_2x18_P1.27mm_Vertical +Through hole straight pin header, 2x18, 1.27mm pitch, double rows +Through hole pin header THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_2x18_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x18 1.27mm double row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_2x19_P1.27mm_Horizontal +Through hole angled pin header, 2x19, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_2x19_P1.27mm_Vertical +Through hole straight pin header, 2x19, 1.27mm pitch, double rows +Through hole pin header THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_2x19_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x19 1.27mm double row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_2x20_P1.27mm_Horizontal +Through hole angled pin header, 2x20, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x20_P1.27mm_Vertical +Through hole straight pin header, 2x20, 1.27mm pitch, double rows +Through hole pin header THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x20_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x20 1.27mm double row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x21_P1.27mm_Horizontal +Through hole angled pin header, 2x21, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinHeader_1.27mm +PinHeader_2x21_P1.27mm_Vertical +Through hole straight pin header, 2x21, 1.27mm pitch, double rows +Through hole pin header THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinHeader_1.27mm +PinHeader_2x21_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x21 1.27mm double row +0 +42 +42 +Connector_PinHeader_1.27mm +PinHeader_2x22_P1.27mm_Horizontal +Through hole angled pin header, 2x22, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinHeader_1.27mm +PinHeader_2x22_P1.27mm_Vertical +Through hole straight pin header, 2x22, 1.27mm pitch, double rows +Through hole pin header THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinHeader_1.27mm +PinHeader_2x22_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x22 1.27mm double row +0 +44 +44 +Connector_PinHeader_1.27mm +PinHeader_2x23_P1.27mm_Horizontal +Through hole angled pin header, 2x23, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinHeader_1.27mm +PinHeader_2x23_P1.27mm_Vertical +Through hole straight pin header, 2x23, 1.27mm pitch, double rows +Through hole pin header THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinHeader_1.27mm +PinHeader_2x23_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x23 1.27mm double row +0 +46 +46 +Connector_PinHeader_1.27mm +PinHeader_2x24_P1.27mm_Horizontal +Through hole angled pin header, 2x24, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinHeader_1.27mm +PinHeader_2x24_P1.27mm_Vertical +Through hole straight pin header, 2x24, 1.27mm pitch, double rows +Through hole pin header THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinHeader_1.27mm +PinHeader_2x24_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x24 1.27mm double row +0 +48 +48 +Connector_PinHeader_1.27mm +PinHeader_2x25_P1.27mm_Horizontal +Through hole angled pin header, 2x25, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinHeader_1.27mm +PinHeader_2x25_P1.27mm_Vertical +Through hole straight pin header, 2x25, 1.27mm pitch, double rows +Through hole pin header THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinHeader_1.27mm +PinHeader_2x25_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x25 1.27mm double row +0 +50 +50 +Connector_PinHeader_1.27mm +PinHeader_2x26_P1.27mm_Horizontal +Through hole angled pin header, 2x26, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinHeader_1.27mm +PinHeader_2x26_P1.27mm_Vertical +Through hole straight pin header, 2x26, 1.27mm pitch, double rows +Through hole pin header THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinHeader_1.27mm +PinHeader_2x26_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x26 1.27mm double row +0 +52 +52 +Connector_PinHeader_1.27mm +PinHeader_2x27_P1.27mm_Horizontal +Through hole angled pin header, 2x27, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinHeader_1.27mm +PinHeader_2x27_P1.27mm_Vertical +Through hole straight pin header, 2x27, 1.27mm pitch, double rows +Through hole pin header THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinHeader_1.27mm +PinHeader_2x27_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x27 1.27mm double row +0 +54 +54 +Connector_PinHeader_1.27mm +PinHeader_2x28_P1.27mm_Horizontal +Through hole angled pin header, 2x28, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinHeader_1.27mm +PinHeader_2x28_P1.27mm_Vertical +Through hole straight pin header, 2x28, 1.27mm pitch, double rows +Through hole pin header THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinHeader_1.27mm +PinHeader_2x28_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x28 1.27mm double row +0 +56 +56 +Connector_PinHeader_1.27mm +PinHeader_2x29_P1.27mm_Horizontal +Through hole angled pin header, 2x29, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinHeader_1.27mm +PinHeader_2x29_P1.27mm_Vertical +Through hole straight pin header, 2x29, 1.27mm pitch, double rows +Through hole pin header THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinHeader_1.27mm +PinHeader_2x29_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x29 1.27mm double row +0 +58 +58 +Connector_PinHeader_1.27mm +PinHeader_2x30_P1.27mm_Horizontal +Through hole angled pin header, 2x30, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinHeader_1.27mm +PinHeader_2x30_P1.27mm_Vertical +Through hole straight pin header, 2x30, 1.27mm pitch, double rows +Through hole pin header THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinHeader_1.27mm +PinHeader_2x30_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x30 1.27mm double row +0 +60 +60 +Connector_PinHeader_1.27mm +PinHeader_2x31_P1.27mm_Horizontal +Through hole angled pin header, 2x31, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinHeader_1.27mm +PinHeader_2x31_P1.27mm_Vertical +Through hole straight pin header, 2x31, 1.27mm pitch, double rows +Through hole pin header THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinHeader_1.27mm +PinHeader_2x31_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x31 1.27mm double row +0 +62 +62 +Connector_PinHeader_1.27mm +PinHeader_2x32_P1.27mm_Horizontal +Through hole angled pin header, 2x32, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinHeader_1.27mm +PinHeader_2x32_P1.27mm_Vertical +Through hole straight pin header, 2x32, 1.27mm pitch, double rows +Through hole pin header THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinHeader_1.27mm +PinHeader_2x32_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x32 1.27mm double row +0 +64 +64 +Connector_PinHeader_1.27mm +PinHeader_2x33_P1.27mm_Horizontal +Through hole angled pin header, 2x33, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinHeader_1.27mm +PinHeader_2x33_P1.27mm_Vertical +Through hole straight pin header, 2x33, 1.27mm pitch, double rows +Through hole pin header THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinHeader_1.27mm +PinHeader_2x33_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x33 1.27mm double row +0 +66 +66 +Connector_PinHeader_1.27mm +PinHeader_2x34_P1.27mm_Horizontal +Through hole angled pin header, 2x34, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinHeader_1.27mm +PinHeader_2x34_P1.27mm_Vertical +Through hole straight pin header, 2x34, 1.27mm pitch, double rows +Through hole pin header THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinHeader_1.27mm +PinHeader_2x34_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x34 1.27mm double row +0 +68 +68 +Connector_PinHeader_1.27mm +PinHeader_2x35_P1.27mm_Horizontal +Through hole angled pin header, 2x35, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinHeader_1.27mm +PinHeader_2x35_P1.27mm_Vertical +Through hole straight pin header, 2x35, 1.27mm pitch, double rows +Through hole pin header THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinHeader_1.27mm +PinHeader_2x35_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x35 1.27mm double row +0 +70 +70 +Connector_PinHeader_1.27mm +PinHeader_2x36_P1.27mm_Horizontal +Through hole angled pin header, 2x36, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinHeader_1.27mm +PinHeader_2x36_P1.27mm_Vertical +Through hole straight pin header, 2x36, 1.27mm pitch, double rows +Through hole pin header THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinHeader_1.27mm +PinHeader_2x36_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x36 1.27mm double row +0 +72 +72 +Connector_PinHeader_1.27mm +PinHeader_2x37_P1.27mm_Horizontal +Through hole angled pin header, 2x37, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinHeader_1.27mm +PinHeader_2x37_P1.27mm_Vertical +Through hole straight pin header, 2x37, 1.27mm pitch, double rows +Through hole pin header THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinHeader_1.27mm +PinHeader_2x37_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x37 1.27mm double row +0 +74 +74 +Connector_PinHeader_1.27mm +PinHeader_2x38_P1.27mm_Horizontal +Through hole angled pin header, 2x38, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinHeader_1.27mm +PinHeader_2x38_P1.27mm_Vertical +Through hole straight pin header, 2x38, 1.27mm pitch, double rows +Through hole pin header THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinHeader_1.27mm +PinHeader_2x38_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x38 1.27mm double row +0 +76 +76 +Connector_PinHeader_1.27mm +PinHeader_2x39_P1.27mm_Horizontal +Through hole angled pin header, 2x39, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinHeader_1.27mm +PinHeader_2x39_P1.27mm_Vertical +Through hole straight pin header, 2x39, 1.27mm pitch, double rows +Through hole pin header THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinHeader_1.27mm +PinHeader_2x39_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x39 1.27mm double row +0 +78 +78 +Connector_PinHeader_1.27mm +PinHeader_2x40_P1.27mm_Horizontal +Through hole angled pin header, 2x40, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinHeader_1.27mm +PinHeader_2x40_P1.27mm_Vertical +Through hole straight pin header, 2x40, 1.27mm pitch, double rows +Through hole pin header THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinHeader_1.27mm +PinHeader_2x40_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x40 1.27mm double row +0 +80 +80 +Connector_PinHeader_2.00mm +PinHeader_1x01_P2.00mm_Horizontal +Through hole angled pin header, 1x01, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinHeader_2.00mm +PinHeader_1x01_P2.00mm_Vertical +Through hole straight pin header, 1x01, 2.00mm pitch, single row +Through hole pin header THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Horizontal +Through hole angled pin header, 1x02, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Vertical +Through hole straight pin header, 1x02, 2.00mm pitch, single row +Through hole pin header THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 2.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 2.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Horizontal +Through hole angled pin header, 1x03, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Vertical +Through hole straight pin header, 1x03, 2.00mm pitch, single row +Through hole pin header THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 2.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 2.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Horizontal +Through hole angled pin header, 1x04, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Vertical +Through hole straight pin header, 1x04, 2.00mm pitch, single row +Through hole pin header THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 2.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 2.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Horizontal +Through hole angled pin header, 1x05, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Vertical +Through hole straight pin header, 1x05, 2.00mm pitch, single row +Through hole pin header THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 2.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 2.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Horizontal +Through hole angled pin header, 1x06, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Vertical +Through hole straight pin header, 1x06, 2.00mm pitch, single row +Through hole pin header THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 2.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 2.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Horizontal +Through hole angled pin header, 1x07, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Vertical +Through hole straight pin header, 1x07, 2.00mm pitch, single row +Through hole pin header THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 2.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 2.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Horizontal +Through hole angled pin header, 1x08, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Vertical +Through hole straight pin header, 1x08, 2.00mm pitch, single row +Through hole pin header THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 2.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 2.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Horizontal +Through hole angled pin header, 1x09, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Vertical +Through hole straight pin header, 1x09, 2.00mm pitch, single row +Through hole pin header THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 2.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 2.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Horizontal +Through hole angled pin header, 1x10, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Vertical +Through hole straight pin header, 1x10, 2.00mm pitch, single row +Through hole pin header THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 2.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 2.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Horizontal +Through hole angled pin header, 1x11, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Vertical +Through hole straight pin header, 1x11, 2.00mm pitch, single row +Through hole pin header THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 2.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 2.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Horizontal +Through hole angled pin header, 1x12, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Vertical +Through hole straight pin header, 1x12, 2.00mm pitch, single row +Through hole pin header THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 2.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 2.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Horizontal +Through hole angled pin header, 1x13, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Vertical +Through hole straight pin header, 1x13, 2.00mm pitch, single row +Through hole pin header THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 2.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 2.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Horizontal +Through hole angled pin header, 1x14, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Vertical +Through hole straight pin header, 1x14, 2.00mm pitch, single row +Through hole pin header THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 2.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 2.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Horizontal +Through hole angled pin header, 1x15, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Vertical +Through hole straight pin header, 1x15, 2.00mm pitch, single row +Through hole pin header THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 2.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 2.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Horizontal +Through hole angled pin header, 1x16, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Vertical +Through hole straight pin header, 1x16, 2.00mm pitch, single row +Through hole pin header THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 2.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 2.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Horizontal +Through hole angled pin header, 1x17, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Vertical +Through hole straight pin header, 1x17, 2.00mm pitch, single row +Through hole pin header THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 2.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 2.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Horizontal +Through hole angled pin header, 1x18, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Vertical +Through hole straight pin header, 1x18, 2.00mm pitch, single row +Through hole pin header THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 2.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 2.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Horizontal +Through hole angled pin header, 1x19, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Vertical +Through hole straight pin header, 1x19, 2.00mm pitch, single row +Through hole pin header THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 2.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 2.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Horizontal +Through hole angled pin header, 1x20, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Vertical +Through hole straight pin header, 1x20, 2.00mm pitch, single row +Through hole pin header THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 2.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 2.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Horizontal +Through hole angled pin header, 1x21, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Vertical +Through hole straight pin header, 1x21, 2.00mm pitch, single row +Through hole pin header THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 2.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 2.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Horizontal +Through hole angled pin header, 1x22, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Vertical +Through hole straight pin header, 1x22, 2.00mm pitch, single row +Through hole pin header THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 2.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 2.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Horizontal +Through hole angled pin header, 1x23, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Vertical +Through hole straight pin header, 1x23, 2.00mm pitch, single row +Through hole pin header THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 2.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 2.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Horizontal +Through hole angled pin header, 1x24, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Vertical +Through hole straight pin header, 1x24, 2.00mm pitch, single row +Through hole pin header THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 2.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 2.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Horizontal +Through hole angled pin header, 1x25, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Vertical +Through hole straight pin header, 1x25, 2.00mm pitch, single row +Through hole pin header THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 2.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 2.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Horizontal +Through hole angled pin header, 1x26, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Vertical +Through hole straight pin header, 1x26, 2.00mm pitch, single row +Through hole pin header THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 2.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 2.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Horizontal +Through hole angled pin header, 1x27, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Vertical +Through hole straight pin header, 1x27, 2.00mm pitch, single row +Through hole pin header THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 2.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 2.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Horizontal +Through hole angled pin header, 1x28, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Vertical +Through hole straight pin header, 1x28, 2.00mm pitch, single row +Through hole pin header THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 2.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 2.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Horizontal +Through hole angled pin header, 1x29, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Vertical +Through hole straight pin header, 1x29, 2.00mm pitch, single row +Through hole pin header THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 2.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 2.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Horizontal +Through hole angled pin header, 1x30, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Vertical +Through hole straight pin header, 1x30, 2.00mm pitch, single row +Through hole pin header THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 2.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 2.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Horizontal +Through hole angled pin header, 1x31, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Vertical +Through hole straight pin header, 1x31, 2.00mm pitch, single row +Through hole pin header THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 2.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 2.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Horizontal +Through hole angled pin header, 1x32, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Vertical +Through hole straight pin header, 1x32, 2.00mm pitch, single row +Through hole pin header THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 2.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 2.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Horizontal +Through hole angled pin header, 1x33, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Vertical +Through hole straight pin header, 1x33, 2.00mm pitch, single row +Through hole pin header THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 2.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 2.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Horizontal +Through hole angled pin header, 1x34, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Vertical +Through hole straight pin header, 1x34, 2.00mm pitch, single row +Through hole pin header THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 2.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 2.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Horizontal +Through hole angled pin header, 1x35, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Vertical +Through hole straight pin header, 1x35, 2.00mm pitch, single row +Through hole pin header THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 2.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 2.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Horizontal +Through hole angled pin header, 1x36, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Vertical +Through hole straight pin header, 1x36, 2.00mm pitch, single row +Through hole pin header THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 2.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 2.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Horizontal +Through hole angled pin header, 1x37, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Vertical +Through hole straight pin header, 1x37, 2.00mm pitch, single row +Through hole pin header THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 2.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 2.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Horizontal +Through hole angled pin header, 1x38, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Vertical +Through hole straight pin header, 1x38, 2.00mm pitch, single row +Through hole pin header THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 2.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 2.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Horizontal +Through hole angled pin header, 1x39, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Vertical +Through hole straight pin header, 1x39, 2.00mm pitch, single row +Through hole pin header THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 2.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 2.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Horizontal +Through hole angled pin header, 1x40, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Vertical +Through hole straight pin header, 1x40, 2.00mm pitch, single row +Through hole pin header THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 2.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 2.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x01_P2.00mm_Horizontal +Through hole angled pin header, 2x01, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_2x01_P2.00mm_Vertical +Through hole straight pin header, 2x01, 2.00mm pitch, double rows +Through hole pin header THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_2x01_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x01 2.00mm double row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_2x02_P2.00mm_Horizontal +Through hole angled pin header, 2x02, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_2x02_P2.00mm_Vertical +Through hole straight pin header, 2x02, 2.00mm pitch, double rows +Through hole pin header THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_2x02_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x02 2.00mm double row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_2x03_P2.00mm_Horizontal +Through hole angled pin header, 2x03, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_2x03_P2.00mm_Vertical +Through hole straight pin header, 2x03, 2.00mm pitch, double rows +Through hole pin header THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_2x03_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x03 2.00mm double row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_2x04_P2.00mm_Horizontal +Through hole angled pin header, 2x04, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_2x04_P2.00mm_Vertical +Through hole straight pin header, 2x04, 2.00mm pitch, double rows +Through hole pin header THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_2x04_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x04 2.00mm double row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_2x05_P2.00mm_Horizontal +Through hole angled pin header, 2x05, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_2x05_P2.00mm_Vertical +Through hole straight pin header, 2x05, 2.00mm pitch, double rows +Through hole pin header THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_2x05_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x05 2.00mm double row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_2x06_P2.00mm_Horizontal +Through hole angled pin header, 2x06, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_2x06_P2.00mm_Vertical +Through hole straight pin header, 2x06, 2.00mm pitch, double rows +Through hole pin header THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_2x06_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x06 2.00mm double row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_2x07_P2.00mm_Horizontal +Through hole angled pin header, 2x07, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_2x07_P2.00mm_Vertical +Through hole straight pin header, 2x07, 2.00mm pitch, double rows +Through hole pin header THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_2x07_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x07 2.00mm double row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_2x08_P2.00mm_Horizontal +Through hole angled pin header, 2x08, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_2x08_P2.00mm_Vertical +Through hole straight pin header, 2x08, 2.00mm pitch, double rows +Through hole pin header THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_2x08_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x08 2.00mm double row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_2x09_P2.00mm_Horizontal +Through hole angled pin header, 2x09, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_2x09_P2.00mm_Vertical +Through hole straight pin header, 2x09, 2.00mm pitch, double rows +Through hole pin header THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_2x09_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x09 2.00mm double row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_2x10_P2.00mm_Horizontal +Through hole angled pin header, 2x10, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_2x10_P2.00mm_Vertical +Through hole straight pin header, 2x10, 2.00mm pitch, double rows +Through hole pin header THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_2x10_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x10 2.00mm double row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_2x11_P2.00mm_Horizontal +Through hole angled pin header, 2x11, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_2x11_P2.00mm_Vertical +Through hole straight pin header, 2x11, 2.00mm pitch, double rows +Through hole pin header THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_2x11_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x11 2.00mm double row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_2x12_P2.00mm_Horizontal +Through hole angled pin header, 2x12, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_2x12_P2.00mm_Vertical +Through hole straight pin header, 2x12, 2.00mm pitch, double rows +Through hole pin header THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_2x12_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x12 2.00mm double row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_2x13_P2.00mm_Horizontal +Through hole angled pin header, 2x13, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_2x13_P2.00mm_Vertical +Through hole straight pin header, 2x13, 2.00mm pitch, double rows +Through hole pin header THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_2x13_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x13 2.00mm double row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_2x14_P2.00mm_Horizontal +Through hole angled pin header, 2x14, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_2x14_P2.00mm_Vertical +Through hole straight pin header, 2x14, 2.00mm pitch, double rows +Through hole pin header THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_2x14_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x14 2.00mm double row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_2x15_P2.00mm_Horizontal +Through hole angled pin header, 2x15, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_2x15_P2.00mm_Vertical +Through hole straight pin header, 2x15, 2.00mm pitch, double rows +Through hole pin header THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_2x15_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x15 2.00mm double row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_2x16_P2.00mm_Horizontal +Through hole angled pin header, 2x16, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_2x16_P2.00mm_Vertical +Through hole straight pin header, 2x16, 2.00mm pitch, double rows +Through hole pin header THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_2x16_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x16 2.00mm double row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_2x17_P2.00mm_Horizontal +Through hole angled pin header, 2x17, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_2x17_P2.00mm_Vertical +Through hole straight pin header, 2x17, 2.00mm pitch, double rows +Through hole pin header THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_2x17_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x17 2.00mm double row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_2x18_P2.00mm_Horizontal +Through hole angled pin header, 2x18, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_2x18_P2.00mm_Vertical +Through hole straight pin header, 2x18, 2.00mm pitch, double rows +Through hole pin header THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_2x18_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x18 2.00mm double row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_2x19_P2.00mm_Horizontal +Through hole angled pin header, 2x19, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_2x19_P2.00mm_Vertical +Through hole straight pin header, 2x19, 2.00mm pitch, double rows +Through hole pin header THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_2x19_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x19 2.00mm double row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_2x20_P2.00mm_Horizontal +Through hole angled pin header, 2x20, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x20_P2.00mm_Vertical +Through hole straight pin header, 2x20, 2.00mm pitch, double rows +Through hole pin header THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x20_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x20 2.00mm double row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x21_P2.00mm_Horizontal +Through hole angled pin header, 2x21, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinHeader_2.00mm +PinHeader_2x21_P2.00mm_Vertical +Through hole straight pin header, 2x21, 2.00mm pitch, double rows +Through hole pin header THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinHeader_2.00mm +PinHeader_2x21_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x21 2.00mm double row +0 +42 +42 +Connector_PinHeader_2.00mm +PinHeader_2x22_P2.00mm_Horizontal +Through hole angled pin header, 2x22, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinHeader_2.00mm +PinHeader_2x22_P2.00mm_Vertical +Through hole straight pin header, 2x22, 2.00mm pitch, double rows +Through hole pin header THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinHeader_2.00mm +PinHeader_2x22_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x22 2.00mm double row +0 +44 +44 +Connector_PinHeader_2.00mm +PinHeader_2x23_P2.00mm_Horizontal +Through hole angled pin header, 2x23, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinHeader_2.00mm +PinHeader_2x23_P2.00mm_Vertical +Through hole straight pin header, 2x23, 2.00mm pitch, double rows +Through hole pin header THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinHeader_2.00mm +PinHeader_2x23_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x23 2.00mm double row +0 +46 +46 +Connector_PinHeader_2.00mm +PinHeader_2x24_P2.00mm_Horizontal +Through hole angled pin header, 2x24, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinHeader_2.00mm +PinHeader_2x24_P2.00mm_Vertical +Through hole straight pin header, 2x24, 2.00mm pitch, double rows +Through hole pin header THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinHeader_2.00mm +PinHeader_2x24_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x24 2.00mm double row +0 +48 +48 +Connector_PinHeader_2.00mm +PinHeader_2x25_P2.00mm_Horizontal +Through hole angled pin header, 2x25, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinHeader_2.00mm +PinHeader_2x25_P2.00mm_Vertical +Through hole straight pin header, 2x25, 2.00mm pitch, double rows +Through hole pin header THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinHeader_2.00mm +PinHeader_2x25_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x25 2.00mm double row +0 +50 +50 +Connector_PinHeader_2.00mm +PinHeader_2x26_P2.00mm_Horizontal +Through hole angled pin header, 2x26, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinHeader_2.00mm +PinHeader_2x26_P2.00mm_Vertical +Through hole straight pin header, 2x26, 2.00mm pitch, double rows +Through hole pin header THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinHeader_2.00mm +PinHeader_2x26_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x26 2.00mm double row +0 +52 +52 +Connector_PinHeader_2.00mm +PinHeader_2x27_P2.00mm_Horizontal +Through hole angled pin header, 2x27, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinHeader_2.00mm +PinHeader_2x27_P2.00mm_Vertical +Through hole straight pin header, 2x27, 2.00mm pitch, double rows +Through hole pin header THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinHeader_2.00mm +PinHeader_2x27_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x27 2.00mm double row +0 +54 +54 +Connector_PinHeader_2.00mm +PinHeader_2x28_P2.00mm_Horizontal +Through hole angled pin header, 2x28, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinHeader_2.00mm +PinHeader_2x28_P2.00mm_Vertical +Through hole straight pin header, 2x28, 2.00mm pitch, double rows +Through hole pin header THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinHeader_2.00mm +PinHeader_2x28_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x28 2.00mm double row +0 +56 +56 +Connector_PinHeader_2.00mm +PinHeader_2x29_P2.00mm_Horizontal +Through hole angled pin header, 2x29, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinHeader_2.00mm +PinHeader_2x29_P2.00mm_Vertical +Through hole straight pin header, 2x29, 2.00mm pitch, double rows +Through hole pin header THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinHeader_2.00mm +PinHeader_2x29_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x29 2.00mm double row +0 +58 +58 +Connector_PinHeader_2.00mm +PinHeader_2x30_P2.00mm_Horizontal +Through hole angled pin header, 2x30, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinHeader_2.00mm +PinHeader_2x30_P2.00mm_Vertical +Through hole straight pin header, 2x30, 2.00mm pitch, double rows +Through hole pin header THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinHeader_2.00mm +PinHeader_2x30_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x30 2.00mm double row +0 +60 +60 +Connector_PinHeader_2.00mm +PinHeader_2x31_P2.00mm_Horizontal +Through hole angled pin header, 2x31, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinHeader_2.00mm +PinHeader_2x31_P2.00mm_Vertical +Through hole straight pin header, 2x31, 2.00mm pitch, double rows +Through hole pin header THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinHeader_2.00mm +PinHeader_2x31_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x31 2.00mm double row +0 +62 +62 +Connector_PinHeader_2.00mm +PinHeader_2x32_P2.00mm_Horizontal +Through hole angled pin header, 2x32, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinHeader_2.00mm +PinHeader_2x32_P2.00mm_Vertical +Through hole straight pin header, 2x32, 2.00mm pitch, double rows +Through hole pin header THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinHeader_2.00mm +PinHeader_2x32_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x32 2.00mm double row +0 +64 +64 +Connector_PinHeader_2.00mm +PinHeader_2x33_P2.00mm_Horizontal +Through hole angled pin header, 2x33, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinHeader_2.00mm +PinHeader_2x33_P2.00mm_Vertical +Through hole straight pin header, 2x33, 2.00mm pitch, double rows +Through hole pin header THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinHeader_2.00mm +PinHeader_2x33_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x33 2.00mm double row +0 +66 +66 +Connector_PinHeader_2.00mm +PinHeader_2x34_P2.00mm_Horizontal +Through hole angled pin header, 2x34, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinHeader_2.00mm +PinHeader_2x34_P2.00mm_Vertical +Through hole straight pin header, 2x34, 2.00mm pitch, double rows +Through hole pin header THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinHeader_2.00mm +PinHeader_2x34_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x34 2.00mm double row +0 +68 +68 +Connector_PinHeader_2.00mm +PinHeader_2x35_P2.00mm_Horizontal +Through hole angled pin header, 2x35, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinHeader_2.00mm +PinHeader_2x35_P2.00mm_Vertical +Through hole straight pin header, 2x35, 2.00mm pitch, double rows +Through hole pin header THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinHeader_2.00mm +PinHeader_2x35_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x35 2.00mm double row +0 +70 +70 +Connector_PinHeader_2.00mm +PinHeader_2x36_P2.00mm_Horizontal +Through hole angled pin header, 2x36, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinHeader_2.00mm +PinHeader_2x36_P2.00mm_Vertical +Through hole straight pin header, 2x36, 2.00mm pitch, double rows +Through hole pin header THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinHeader_2.00mm +PinHeader_2x36_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x36 2.00mm double row +0 +72 +72 +Connector_PinHeader_2.00mm +PinHeader_2x37_P2.00mm_Horizontal +Through hole angled pin header, 2x37, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinHeader_2.00mm +PinHeader_2x37_P2.00mm_Vertical +Through hole straight pin header, 2x37, 2.00mm pitch, double rows +Through hole pin header THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinHeader_2.00mm +PinHeader_2x37_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x37 2.00mm double row +0 +74 +74 +Connector_PinHeader_2.00mm +PinHeader_2x38_P2.00mm_Horizontal +Through hole angled pin header, 2x38, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinHeader_2.00mm +PinHeader_2x38_P2.00mm_Vertical +Through hole straight pin header, 2x38, 2.00mm pitch, double rows +Through hole pin header THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinHeader_2.00mm +PinHeader_2x38_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x38 2.00mm double row +0 +76 +76 +Connector_PinHeader_2.00mm +PinHeader_2x39_P2.00mm_Horizontal +Through hole angled pin header, 2x39, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinHeader_2.00mm +PinHeader_2x39_P2.00mm_Vertical +Through hole straight pin header, 2x39, 2.00mm pitch, double rows +Through hole pin header THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinHeader_2.00mm +PinHeader_2x39_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x39 2.00mm double row +0 +78 +78 +Connector_PinHeader_2.00mm +PinHeader_2x40_P2.00mm_Horizontal +Through hole angled pin header, 2x40, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinHeader_2.00mm +PinHeader_2x40_P2.00mm_Vertical +Through hole straight pin header, 2x40, 2.00mm pitch, double rows +Through hole pin header THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinHeader_2.00mm +PinHeader_2x40_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x40 2.00mm double row +0 +80 +80 +Connector_PinHeader_2.54mm +PinHeader_1x01_P2.54mm_Horizontal +Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinHeader_2.54mm +PinHeader_1x01_P2.54mm_Vertical +Through hole straight pin header, 1x01, 2.54mm pitch, single row +Through hole pin header THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Horizontal +Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Vertical +Through hole straight pin header, 1x02, 2.54mm pitch, single row +Through hole pin header THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 2.54mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 2.54mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Horizontal +Through hole angled pin header, 1x03, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Vertical +Through hole straight pin header, 1x03, 2.54mm pitch, single row +Through hole pin header THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 2.54mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 2.54mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Horizontal +Through hole angled pin header, 1x04, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Vertical +Through hole straight pin header, 1x04, 2.54mm pitch, single row +Through hole pin header THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 2.54mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 2.54mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Horizontal +Through hole angled pin header, 1x05, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Vertical +Through hole straight pin header, 1x05, 2.54mm pitch, single row +Through hole pin header THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 2.54mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 2.54mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Horizontal +Through hole angled pin header, 1x06, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Vertical +Through hole straight pin header, 1x06, 2.54mm pitch, single row +Through hole pin header THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 2.54mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 2.54mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Horizontal +Through hole angled pin header, 1x07, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Vertical +Through hole straight pin header, 1x07, 2.54mm pitch, single row +Through hole pin header THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 2.54mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 2.54mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Horizontal +Through hole angled pin header, 1x08, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Vertical +Through hole straight pin header, 1x08, 2.54mm pitch, single row +Through hole pin header THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 2.54mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 2.54mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Horizontal +Through hole angled pin header, 1x09, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Vertical +Through hole straight pin header, 1x09, 2.54mm pitch, single row +Through hole pin header THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 2.54mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 2.54mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Horizontal +Through hole angled pin header, 1x10, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Vertical +Through hole straight pin header, 1x10, 2.54mm pitch, single row +Through hole pin header THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 2.54mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 2.54mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Horizontal +Through hole angled pin header, 1x11, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Vertical +Through hole straight pin header, 1x11, 2.54mm pitch, single row +Through hole pin header THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 2.54mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 2.54mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Horizontal +Through hole angled pin header, 1x12, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Vertical +Through hole straight pin header, 1x12, 2.54mm pitch, single row +Through hole pin header THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 2.54mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 2.54mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Horizontal +Through hole angled pin header, 1x13, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Vertical +Through hole straight pin header, 1x13, 2.54mm pitch, single row +Through hole pin header THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 2.54mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 2.54mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Horizontal +Through hole angled pin header, 1x14, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Vertical +Through hole straight pin header, 1x14, 2.54mm pitch, single row +Through hole pin header THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 2.54mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 2.54mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Horizontal +Through hole angled pin header, 1x15, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Vertical +Through hole straight pin header, 1x15, 2.54mm pitch, single row +Through hole pin header THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 2.54mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 2.54mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Horizontal +Through hole angled pin header, 1x16, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Vertical +Through hole straight pin header, 1x16, 2.54mm pitch, single row +Through hole pin header THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 2.54mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 2.54mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Horizontal +Through hole angled pin header, 1x17, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Vertical +Through hole straight pin header, 1x17, 2.54mm pitch, single row +Through hole pin header THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 2.54mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 2.54mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Horizontal +Through hole angled pin header, 1x18, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Vertical +Through hole straight pin header, 1x18, 2.54mm pitch, single row +Through hole pin header THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 2.54mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 2.54mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Horizontal +Through hole angled pin header, 1x19, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Vertical +Through hole straight pin header, 1x19, 2.54mm pitch, single row +Through hole pin header THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 2.54mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 2.54mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Horizontal +Through hole angled pin header, 1x20, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Vertical +Through hole straight pin header, 1x20, 2.54mm pitch, single row +Through hole pin header THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 2.54mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 2.54mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Horizontal +Through hole angled pin header, 1x21, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Vertical +Through hole straight pin header, 1x21, 2.54mm pitch, single row +Through hole pin header THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 2.54mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 2.54mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Horizontal +Through hole angled pin header, 1x22, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Vertical +Through hole straight pin header, 1x22, 2.54mm pitch, single row +Through hole pin header THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 2.54mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 2.54mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Horizontal +Through hole angled pin header, 1x23, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Vertical +Through hole straight pin header, 1x23, 2.54mm pitch, single row +Through hole pin header THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 2.54mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 2.54mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Horizontal +Through hole angled pin header, 1x24, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Vertical +Through hole straight pin header, 1x24, 2.54mm pitch, single row +Through hole pin header THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 2.54mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 2.54mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Horizontal +Through hole angled pin header, 1x25, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Vertical +Through hole straight pin header, 1x25, 2.54mm pitch, single row +Through hole pin header THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 2.54mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 2.54mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Horizontal +Through hole angled pin header, 1x26, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Vertical +Through hole straight pin header, 1x26, 2.54mm pitch, single row +Through hole pin header THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 2.54mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 2.54mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Horizontal +Through hole angled pin header, 1x27, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Vertical +Through hole straight pin header, 1x27, 2.54mm pitch, single row +Through hole pin header THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 2.54mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 2.54mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Horizontal +Through hole angled pin header, 1x28, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Vertical +Through hole straight pin header, 1x28, 2.54mm pitch, single row +Through hole pin header THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 2.54mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 2.54mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Horizontal +Through hole angled pin header, 1x29, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Vertical +Through hole straight pin header, 1x29, 2.54mm pitch, single row +Through hole pin header THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 2.54mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 2.54mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Horizontal +Through hole angled pin header, 1x30, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Vertical +Through hole straight pin header, 1x30, 2.54mm pitch, single row +Through hole pin header THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 2.54mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 2.54mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Horizontal +Through hole angled pin header, 1x31, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Vertical +Through hole straight pin header, 1x31, 2.54mm pitch, single row +Through hole pin header THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 2.54mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 2.54mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Horizontal +Through hole angled pin header, 1x32, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Vertical +Through hole straight pin header, 1x32, 2.54mm pitch, single row +Through hole pin header THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 2.54mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 2.54mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Horizontal +Through hole angled pin header, 1x33, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Vertical +Through hole straight pin header, 1x33, 2.54mm pitch, single row +Through hole pin header THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 2.54mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 2.54mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Horizontal +Through hole angled pin header, 1x34, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Vertical +Through hole straight pin header, 1x34, 2.54mm pitch, single row +Through hole pin header THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 2.54mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 2.54mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Horizontal +Through hole angled pin header, 1x35, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Vertical +Through hole straight pin header, 1x35, 2.54mm pitch, single row +Through hole pin header THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 2.54mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 2.54mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Horizontal +Through hole angled pin header, 1x36, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Vertical +Through hole straight pin header, 1x36, 2.54mm pitch, single row +Through hole pin header THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 2.54mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 2.54mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Horizontal +Through hole angled pin header, 1x37, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Vertical +Through hole straight pin header, 1x37, 2.54mm pitch, single row +Through hole pin header THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 2.54mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 2.54mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Horizontal +Through hole angled pin header, 1x38, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Vertical +Through hole straight pin header, 1x38, 2.54mm pitch, single row +Through hole pin header THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 2.54mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 2.54mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Horizontal +Through hole angled pin header, 1x39, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Vertical +Through hole straight pin header, 1x39, 2.54mm pitch, single row +Through hole pin header THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 2.54mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 2.54mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Horizontal +Through hole angled pin header, 1x40, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Vertical +Through hole straight pin header, 1x40, 2.54mm pitch, single row +Through hole pin header THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 2.54mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 2.54mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x01_P2.54mm_Horizontal +Through hole angled pin header, 2x01, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_2x01_P2.54mm_Vertical +Through hole straight pin header, 2x01, 2.54mm pitch, double rows +Through hole pin header THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_2x01_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x01 2.54mm double row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_2x02_P2.54mm_Horizontal +Through hole angled pin header, 2x02, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_2x02_P2.54mm_Vertical +Through hole straight pin header, 2x02, 2.54mm pitch, double rows +Through hole pin header THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_2x02_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x02 2.54mm double row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_2x03_P2.54mm_Horizontal +Through hole angled pin header, 2x03, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_2x03_P2.54mm_Vertical +Through hole straight pin header, 2x03, 2.54mm pitch, double rows +Through hole pin header THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_2x03_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x03 2.54mm double row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_2x04_P2.54mm_Horizontal +Through hole angled pin header, 2x04, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_2x04_P2.54mm_Vertical +Through hole straight pin header, 2x04, 2.54mm pitch, double rows +Through hole pin header THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_2x04_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x04 2.54mm double row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_2x05_P2.54mm_Horizontal +Through hole angled pin header, 2x05, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_2x05_P2.54mm_Vertical +Through hole straight pin header, 2x05, 2.54mm pitch, double rows +Through hole pin header THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_2x05_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x05 2.54mm double row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_2x06_P2.54mm_Horizontal +Through hole angled pin header, 2x06, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_2x06_P2.54mm_Vertical +Through hole straight pin header, 2x06, 2.54mm pitch, double rows +Through hole pin header THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_2x06_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x06 2.54mm double row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_2x07_P2.54mm_Horizontal +Through hole angled pin header, 2x07, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_2x07_P2.54mm_Vertical +Through hole straight pin header, 2x07, 2.54mm pitch, double rows +Through hole pin header THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_2x07_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x07 2.54mm double row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_2x08_P2.54mm_Horizontal +Through hole angled pin header, 2x08, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_2x08_P2.54mm_Vertical +Through hole straight pin header, 2x08, 2.54mm pitch, double rows +Through hole pin header THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_2x08_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x08 2.54mm double row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_2x09_P2.54mm_Horizontal +Through hole angled pin header, 2x09, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_2x09_P2.54mm_Vertical +Through hole straight pin header, 2x09, 2.54mm pitch, double rows +Through hole pin header THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_2x09_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x09 2.54mm double row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_2x10_P2.54mm_Horizontal +Through hole angled pin header, 2x10, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_2x10_P2.54mm_Vertical +Through hole straight pin header, 2x10, 2.54mm pitch, double rows +Through hole pin header THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_2x10_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x10 2.54mm double row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_2x11_P2.54mm_Horizontal +Through hole angled pin header, 2x11, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_2x11_P2.54mm_Vertical +Through hole straight pin header, 2x11, 2.54mm pitch, double rows +Through hole pin header THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_2x11_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x11 2.54mm double row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_2x12_P2.54mm_Horizontal +Through hole angled pin header, 2x12, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_2x12_P2.54mm_Vertical +Through hole straight pin header, 2x12, 2.54mm pitch, double rows +Through hole pin header THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_2x12_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x12 2.54mm double row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_2x13_P2.54mm_Horizontal +Through hole angled pin header, 2x13, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_2x13_P2.54mm_Vertical +Through hole straight pin header, 2x13, 2.54mm pitch, double rows +Through hole pin header THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_2x13_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x13 2.54mm double row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_2x14_P2.54mm_Horizontal +Through hole angled pin header, 2x14, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_2x14_P2.54mm_Vertical +Through hole straight pin header, 2x14, 2.54mm pitch, double rows +Through hole pin header THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_2x14_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x14 2.54mm double row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_2x15_P2.54mm_Horizontal +Through hole angled pin header, 2x15, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_2x15_P2.54mm_Vertical +Through hole straight pin header, 2x15, 2.54mm pitch, double rows +Through hole pin header THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_2x15_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x15 2.54mm double row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_2x16_P2.54mm_Horizontal +Through hole angled pin header, 2x16, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_2x16_P2.54mm_Vertical +Through hole straight pin header, 2x16, 2.54mm pitch, double rows +Through hole pin header THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_2x16_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x16 2.54mm double row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_2x17_P2.54mm_Horizontal +Through hole angled pin header, 2x17, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_2x17_P2.54mm_Vertical +Through hole straight pin header, 2x17, 2.54mm pitch, double rows +Through hole pin header THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_2x17_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x17 2.54mm double row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_2x18_P2.54mm_Horizontal +Through hole angled pin header, 2x18, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_2x18_P2.54mm_Vertical +Through hole straight pin header, 2x18, 2.54mm pitch, double rows +Through hole pin header THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_2x18_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x18 2.54mm double row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_2x19_P2.54mm_Horizontal +Through hole angled pin header, 2x19, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_2x19_P2.54mm_Vertical +Through hole straight pin header, 2x19, 2.54mm pitch, double rows +Through hole pin header THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_2x19_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x19 2.54mm double row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_2x20_P2.54mm_Horizontal +Through hole angled pin header, 2x20, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x20_P2.54mm_Vertical +Through hole straight pin header, 2x20, 2.54mm pitch, double rows +Through hole pin header THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x20_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x20 2.54mm double row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x21_P2.54mm_Horizontal +Through hole angled pin header, 2x21, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinHeader_2.54mm +PinHeader_2x21_P2.54mm_Vertical +Through hole straight pin header, 2x21, 2.54mm pitch, double rows +Through hole pin header THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinHeader_2.54mm +PinHeader_2x21_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x21 2.54mm double row +0 +42 +42 +Connector_PinHeader_2.54mm +PinHeader_2x22_P2.54mm_Horizontal +Through hole angled pin header, 2x22, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinHeader_2.54mm +PinHeader_2x22_P2.54mm_Vertical +Through hole straight pin header, 2x22, 2.54mm pitch, double rows +Through hole pin header THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinHeader_2.54mm +PinHeader_2x22_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x22 2.54mm double row +0 +44 +44 +Connector_PinHeader_2.54mm +PinHeader_2x23_P2.54mm_Horizontal +Through hole angled pin header, 2x23, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinHeader_2.54mm +PinHeader_2x23_P2.54mm_Vertical +Through hole straight pin header, 2x23, 2.54mm pitch, double rows +Through hole pin header THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinHeader_2.54mm +PinHeader_2x23_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x23 2.54mm double row +0 +46 +46 +Connector_PinHeader_2.54mm +PinHeader_2x24_P2.54mm_Horizontal +Through hole angled pin header, 2x24, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinHeader_2.54mm +PinHeader_2x24_P2.54mm_Vertical +Through hole straight pin header, 2x24, 2.54mm pitch, double rows +Through hole pin header THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinHeader_2.54mm +PinHeader_2x24_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x24 2.54mm double row +0 +48 +48 +Connector_PinHeader_2.54mm +PinHeader_2x25_P2.54mm_Horizontal +Through hole angled pin header, 2x25, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinHeader_2.54mm +PinHeader_2x25_P2.54mm_Vertical +Through hole straight pin header, 2x25, 2.54mm pitch, double rows +Through hole pin header THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinHeader_2.54mm +PinHeader_2x25_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x25 2.54mm double row +0 +50 +50 +Connector_PinHeader_2.54mm +PinHeader_2x26_P2.54mm_Horizontal +Through hole angled pin header, 2x26, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinHeader_2.54mm +PinHeader_2x26_P2.54mm_Vertical +Through hole straight pin header, 2x26, 2.54mm pitch, double rows +Through hole pin header THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinHeader_2.54mm +PinHeader_2x26_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x26 2.54mm double row +0 +52 +52 +Connector_PinHeader_2.54mm +PinHeader_2x27_P2.54mm_Horizontal +Through hole angled pin header, 2x27, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinHeader_2.54mm +PinHeader_2x27_P2.54mm_Vertical +Through hole straight pin header, 2x27, 2.54mm pitch, double rows +Through hole pin header THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinHeader_2.54mm +PinHeader_2x27_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x27 2.54mm double row +0 +54 +54 +Connector_PinHeader_2.54mm +PinHeader_2x28_P2.54mm_Horizontal +Through hole angled pin header, 2x28, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinHeader_2.54mm +PinHeader_2x28_P2.54mm_Vertical +Through hole straight pin header, 2x28, 2.54mm pitch, double rows +Through hole pin header THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinHeader_2.54mm +PinHeader_2x28_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x28 2.54mm double row +0 +56 +56 +Connector_PinHeader_2.54mm +PinHeader_2x29_P2.54mm_Horizontal +Through hole angled pin header, 2x29, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinHeader_2.54mm +PinHeader_2x29_P2.54mm_Vertical +Through hole straight pin header, 2x29, 2.54mm pitch, double rows +Through hole pin header THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinHeader_2.54mm +PinHeader_2x29_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x29 2.54mm double row +0 +58 +58 +Connector_PinHeader_2.54mm +PinHeader_2x30_P2.54mm_Horizontal +Through hole angled pin header, 2x30, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinHeader_2.54mm +PinHeader_2x30_P2.54mm_Vertical +Through hole straight pin header, 2x30, 2.54mm pitch, double rows +Through hole pin header THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinHeader_2.54mm +PinHeader_2x30_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x30 2.54mm double row +0 +60 +60 +Connector_PinHeader_2.54mm +PinHeader_2x31_P2.54mm_Horizontal +Through hole angled pin header, 2x31, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinHeader_2.54mm +PinHeader_2x31_P2.54mm_Vertical +Through hole straight pin header, 2x31, 2.54mm pitch, double rows +Through hole pin header THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinHeader_2.54mm +PinHeader_2x31_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x31 2.54mm double row +0 +62 +62 +Connector_PinHeader_2.54mm +PinHeader_2x32_P2.54mm_Horizontal +Through hole angled pin header, 2x32, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinHeader_2.54mm +PinHeader_2x32_P2.54mm_Vertical +Through hole straight pin header, 2x32, 2.54mm pitch, double rows +Through hole pin header THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinHeader_2.54mm +PinHeader_2x32_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x32 2.54mm double row +0 +64 +64 +Connector_PinHeader_2.54mm +PinHeader_2x33_P2.54mm_Horizontal +Through hole angled pin header, 2x33, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinHeader_2.54mm +PinHeader_2x33_P2.54mm_Vertical +Through hole straight pin header, 2x33, 2.54mm pitch, double rows +Through hole pin header THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinHeader_2.54mm +PinHeader_2x33_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x33 2.54mm double row +0 +66 +66 +Connector_PinHeader_2.54mm +PinHeader_2x34_P2.54mm_Horizontal +Through hole angled pin header, 2x34, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinHeader_2.54mm +PinHeader_2x34_P2.54mm_Vertical +Through hole straight pin header, 2x34, 2.54mm pitch, double rows +Through hole pin header THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinHeader_2.54mm +PinHeader_2x34_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x34 2.54mm double row +0 +68 +68 +Connector_PinHeader_2.54mm +PinHeader_2x35_P2.54mm_Horizontal +Through hole angled pin header, 2x35, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinHeader_2.54mm +PinHeader_2x35_P2.54mm_Vertical +Through hole straight pin header, 2x35, 2.54mm pitch, double rows +Through hole pin header THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinHeader_2.54mm +PinHeader_2x35_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x35 2.54mm double row +0 +70 +70 +Connector_PinHeader_2.54mm +PinHeader_2x36_P2.54mm_Horizontal +Through hole angled pin header, 2x36, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinHeader_2.54mm +PinHeader_2x36_P2.54mm_Vertical +Through hole straight pin header, 2x36, 2.54mm pitch, double rows +Through hole pin header THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinHeader_2.54mm +PinHeader_2x36_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x36 2.54mm double row +0 +72 +72 +Connector_PinHeader_2.54mm +PinHeader_2x37_P2.54mm_Horizontal +Through hole angled pin header, 2x37, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinHeader_2.54mm +PinHeader_2x37_P2.54mm_Vertical +Through hole straight pin header, 2x37, 2.54mm pitch, double rows +Through hole pin header THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinHeader_2.54mm +PinHeader_2x37_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x37 2.54mm double row +0 +74 +74 +Connector_PinHeader_2.54mm +PinHeader_2x38_P2.54mm_Horizontal +Through hole angled pin header, 2x38, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinHeader_2.54mm +PinHeader_2x38_P2.54mm_Vertical +Through hole straight pin header, 2x38, 2.54mm pitch, double rows +Through hole pin header THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinHeader_2.54mm +PinHeader_2x38_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x38 2.54mm double row +0 +76 +76 +Connector_PinHeader_2.54mm +PinHeader_2x39_P2.54mm_Horizontal +Through hole angled pin header, 2x39, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinHeader_2.54mm +PinHeader_2x39_P2.54mm_Vertical +Through hole straight pin header, 2x39, 2.54mm pitch, double rows +Through hole pin header THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinHeader_2.54mm +PinHeader_2x39_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x39 2.54mm double row +0 +78 +78 +Connector_PinHeader_2.54mm +PinHeader_2x40_P2.54mm_Horizontal +Through hole angled pin header, 2x40, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinHeader_2.54mm +PinHeader_2x40_P2.54mm_Vertical +Through hole straight pin header, 2x40, 2.54mm pitch, double rows +Through hole pin header THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinHeader_2.54mm +PinHeader_2x40_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x40 2.54mm double row +0 +80 +80 +Connector_PinSocket_1.00mm +PinSocket_1x02_P1.00mm_Vertical +Through hole straight socket strip, 1x02, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x02 1.00mm single row +0 +2 +2 +Connector_PinSocket_1.00mm +PinSocket_1x02_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x02 1.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_1.00mm +PinSocket_1x02_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x02 1.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_1.00mm +PinSocket_1x03_P1.00mm_Vertical +Through hole straight socket strip, 1x03, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x03 1.00mm single row +0 +3 +3 +Connector_PinSocket_1.00mm +PinSocket_1x03_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x03 1.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_1.00mm +PinSocket_1x03_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x03 1.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_1.00mm +PinSocket_1x04_P1.00mm_Vertical +Through hole straight socket strip, 1x04, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x04 1.00mm single row +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_1x04_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x04 1.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_1x04_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x04 1.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_1x05_P1.00mm_Vertical +Through hole straight socket strip, 1x05, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x05 1.00mm single row +0 +5 +5 +Connector_PinSocket_1.00mm +PinSocket_1x05_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x05 1.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_1.00mm +PinSocket_1x05_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x05 1.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_1.00mm +PinSocket_1x06_P1.00mm_Vertical +Through hole straight socket strip, 1x06, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x06 1.00mm single row +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_1x06_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x06 1.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_1x06_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x06 1.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_1x07_P1.00mm_Vertical +Through hole straight socket strip, 1x07, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x07 1.00mm single row +0 +7 +7 +Connector_PinSocket_1.00mm +PinSocket_1x07_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x07 1.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_1.00mm +PinSocket_1x07_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x07 1.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_1.00mm +PinSocket_1x08_P1.00mm_Vertical +Through hole straight socket strip, 1x08, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x08 1.00mm single row +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_1x08_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x08 1.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_1x08_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x08 1.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_1x09_P1.00mm_Vertical +Through hole straight socket strip, 1x09, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x09 1.00mm single row +0 +9 +9 +Connector_PinSocket_1.00mm +PinSocket_1x09_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x09 1.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_1.00mm +PinSocket_1x09_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x09 1.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_1.00mm +PinSocket_1x10_P1.00mm_Vertical +Through hole straight socket strip, 1x10, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x10 1.00mm single row +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_1x10_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x10 1.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_1x10_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x10 1.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_1x11_P1.00mm_Vertical +Through hole straight socket strip, 1x11, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x11 1.00mm single row +0 +11 +11 +Connector_PinSocket_1.00mm +PinSocket_1x11_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x11 1.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_1.00mm +PinSocket_1x11_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x11 1.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_1.00mm +PinSocket_1x12_P1.00mm_Vertical +Through hole straight socket strip, 1x12, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x12 1.00mm single row +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_1x12_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x12 1.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_1x12_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x12 1.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_1x13_P1.00mm_Vertical +Through hole straight socket strip, 1x13, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x13 1.00mm single row +0 +13 +13 +Connector_PinSocket_1.00mm +PinSocket_1x13_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x13 1.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_1.00mm +PinSocket_1x13_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x13 1.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_1.00mm +PinSocket_1x14_P1.00mm_Vertical +Through hole straight socket strip, 1x14, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x14 1.00mm single row +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_1x14_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x14 1.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_1x14_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x14 1.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_1x15_P1.00mm_Vertical +Through hole straight socket strip, 1x15, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x15 1.00mm single row +0 +15 +15 +Connector_PinSocket_1.00mm +PinSocket_1x15_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x15 1.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_1.00mm +PinSocket_1x15_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x15 1.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_1.00mm +PinSocket_1x16_P1.00mm_Vertical +Through hole straight socket strip, 1x16, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x16 1.00mm single row +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_1x16_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x16 1.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_1x16_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x16 1.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_1x17_P1.00mm_Vertical +Through hole straight socket strip, 1x17, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x17 1.00mm single row +0 +17 +17 +Connector_PinSocket_1.00mm +PinSocket_1x17_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x17 1.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_1.00mm +PinSocket_1x17_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x17 1.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_1.00mm +PinSocket_1x18_P1.00mm_Vertical +Through hole straight socket strip, 1x18, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x18 1.00mm single row +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_1x18_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x18 1.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_1x18_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x18 1.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_1x19_P1.00mm_Vertical +Through hole straight socket strip, 1x19, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x19 1.00mm single row +0 +19 +19 +Connector_PinSocket_1.00mm +PinSocket_1x19_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x19 1.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_1.00mm +PinSocket_1x19_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x19 1.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_1.00mm +PinSocket_1x20_P1.00mm_Vertical +Through hole straight socket strip, 1x20, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x20 1.00mm single row +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_1x20_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x20 1.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_1x20_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x20 1.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_1x21_P1.00mm_Vertical +Through hole straight socket strip, 1x21, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x21 1.00mm single row +0 +21 +21 +Connector_PinSocket_1.00mm +PinSocket_1x21_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x21 1.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_1.00mm +PinSocket_1x21_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x21 1.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_1.00mm +PinSocket_1x22_P1.00mm_Vertical +Through hole straight socket strip, 1x22, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x22 1.00mm single row +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_1x22_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x22 1.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_1x22_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x22 1.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_1x23_P1.00mm_Vertical +Through hole straight socket strip, 1x23, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x23 1.00mm single row +0 +23 +23 +Connector_PinSocket_1.00mm +PinSocket_1x23_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x23 1.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_1.00mm +PinSocket_1x23_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x23 1.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_1.00mm +PinSocket_1x24_P1.00mm_Vertical +Through hole straight socket strip, 1x24, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x24 1.00mm single row +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_1x24_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x24 1.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_1x24_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x24 1.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_1x25_P1.00mm_Vertical +Through hole straight socket strip, 1x25, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x25 1.00mm single row +0 +25 +25 +Connector_PinSocket_1.00mm +PinSocket_1x25_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x25 1.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_1.00mm +PinSocket_1x25_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x25 1.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_1.00mm +PinSocket_1x26_P1.00mm_Vertical +Through hole straight socket strip, 1x26, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x26 1.00mm single row +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_1x26_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x26 1.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_1x26_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x26 1.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_1x27_P1.00mm_Vertical +Through hole straight socket strip, 1x27, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x27 1.00mm single row +0 +27 +27 +Connector_PinSocket_1.00mm +PinSocket_1x27_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x27 1.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_1.00mm +PinSocket_1x27_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x27 1.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_1.00mm +PinSocket_1x28_P1.00mm_Vertical +Through hole straight socket strip, 1x28, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x28 1.00mm single row +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_1x28_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x28 1.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_1x28_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x28 1.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_1x29_P1.00mm_Vertical +Through hole straight socket strip, 1x29, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x29 1.00mm single row +0 +29 +29 +Connector_PinSocket_1.00mm +PinSocket_1x29_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x29 1.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_1.00mm +PinSocket_1x29_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x29 1.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_1.00mm +PinSocket_1x30_P1.00mm_Vertical +Through hole straight socket strip, 1x30, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x30 1.00mm single row +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_1x30_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x30 1.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_1x30_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x30 1.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_1x31_P1.00mm_Vertical +Through hole straight socket strip, 1x31, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x31 1.00mm single row +0 +31 +31 +Connector_PinSocket_1.00mm +PinSocket_1x31_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x31 1.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_1.00mm +PinSocket_1x31_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x31 1.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_1.00mm +PinSocket_1x32_P1.00mm_Vertical +Through hole straight socket strip, 1x32, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x32 1.00mm single row +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_1x32_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x32 1.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_1x32_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x32 1.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_1x33_P1.00mm_Vertical +Through hole straight socket strip, 1x33, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x33 1.00mm single row +0 +33 +33 +Connector_PinSocket_1.00mm +PinSocket_1x33_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x33 1.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_1.00mm +PinSocket_1x33_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x33 1.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_1.00mm +PinSocket_1x34_P1.00mm_Vertical +Through hole straight socket strip, 1x34, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x34 1.00mm single row +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_1x34_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x34 1.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_1x34_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x34 1.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_1x35_P1.00mm_Vertical +Through hole straight socket strip, 1x35, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x35 1.00mm single row +0 +35 +35 +Connector_PinSocket_1.00mm +PinSocket_1x35_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x35 1.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_1.00mm +PinSocket_1x35_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x35 1.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_1.00mm +PinSocket_1x36_P1.00mm_Vertical +Through hole straight socket strip, 1x36, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x36 1.00mm single row +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_1x36_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x36 1.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_1x36_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x36 1.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_1x37_P1.00mm_Vertical +Through hole straight socket strip, 1x37, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x37 1.00mm single row +0 +37 +37 +Connector_PinSocket_1.00mm +PinSocket_1x37_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x37 1.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_1.00mm +PinSocket_1x37_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x37 1.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_1.00mm +PinSocket_1x38_P1.00mm_Vertical +Through hole straight socket strip, 1x38, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x38 1.00mm single row +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_1x38_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x38 1.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_1x38_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x38 1.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_1x39_P1.00mm_Vertical +Through hole straight socket strip, 1x39, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x39 1.00mm single row +0 +39 +39 +Connector_PinSocket_1.00mm +PinSocket_1x39_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x39 1.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_1.00mm +PinSocket_1x39_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x39 1.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_1.00mm +PinSocket_1x40_P1.00mm_Vertical +Through hole straight socket strip, 1x40, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x40 1.00mm single row +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_1x40_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x40 1.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_1x40_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x40 1.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_2x02_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x02 1.00mm double row +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_2x03_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x03 1.00mm double row +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_2x04_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x04 1.00mm double row +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_2x05_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x05 1.00mm double row +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_2x06_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x06 1.00mm double row +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_2x07_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x07 1.00mm double row +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_2x08_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x08 1.00mm double row +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_2x09_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x09 1.00mm double row +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_2x10_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x10 1.00mm double row +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_2x11_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x11 1.00mm double row +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_2x12_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x12 1.00mm double row +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_2x13_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x13 1.00mm double row +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_2x14_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x14 1.00mm double row +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_2x15_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x15 1.00mm double row +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_2x16_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x16 1.00mm double row +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_2x17_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x17 1.00mm double row +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_2x18_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x18 1.00mm double row +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_2x19_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x19 1.00mm double row +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_2x20_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x20 1.00mm double row +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_2x21_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x21 1.00mm double row +0 +42 +42 +Connector_PinSocket_1.00mm +PinSocket_2x22_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x22 1.00mm double row +0 +44 +44 +Connector_PinSocket_1.00mm +PinSocket_2x23_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x23 1.00mm double row +0 +46 +46 +Connector_PinSocket_1.00mm +PinSocket_2x24_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x24 1.00mm double row +0 +48 +48 +Connector_PinSocket_1.00mm +PinSocket_2x25_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x25 1.00mm double row +0 +50 +50 +Connector_PinSocket_1.00mm +PinSocket_2x26_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x26 1.00mm double row +0 +52 +52 +Connector_PinSocket_1.00mm +PinSocket_2x27_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x27 1.00mm double row +0 +54 +54 +Connector_PinSocket_1.00mm +PinSocket_2x28_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x28 1.00mm double row +0 +56 +56 +Connector_PinSocket_1.00mm +PinSocket_2x29_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x29 1.00mm double row +0 +58 +58 +Connector_PinSocket_1.00mm +PinSocket_2x30_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x30 1.00mm double row +0 +60 +60 +Connector_PinSocket_1.00mm +PinSocket_2x31_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x31 1.00mm double row +0 +62 +62 +Connector_PinSocket_1.00mm +PinSocket_2x32_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x32 1.00mm double row +0 +64 +64 +Connector_PinSocket_1.00mm +PinSocket_2x33_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x33 1.00mm double row +0 +66 +66 +Connector_PinSocket_1.00mm +PinSocket_2x34_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x34 1.00mm double row +0 +68 +68 +Connector_PinSocket_1.00mm +PinSocket_2x35_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x35 1.00mm double row +0 +70 +70 +Connector_PinSocket_1.00mm +PinSocket_2x36_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x36 1.00mm double row +0 +72 +72 +Connector_PinSocket_1.00mm +PinSocket_2x37_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x37 1.00mm double row +0 +74 +74 +Connector_PinSocket_1.00mm +PinSocket_2x38_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x38 1.00mm double row +0 +76 +76 +Connector_PinSocket_1.00mm +PinSocket_2x39_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x39 1.00mm double row +0 +78 +78 +Connector_PinSocket_1.00mm +PinSocket_2x40_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x40 1.00mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_1x01_P1.27mm_Vertical +Through hole straight socket strip, 1x01, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x01 1.27mm single row +0 +1 +1 +Connector_PinSocket_1.27mm +PinSocket_1x02_P1.27mm_Vertical +Through hole straight socket strip, 1x02, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x02 1.27mm single row +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_1x02_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x02 1.27mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_1x02_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x02 1.27mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_1x03_P1.27mm_Vertical +Through hole straight socket strip, 1x03, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x03 1.27mm single row +0 +3 +3 +Connector_PinSocket_1.27mm +PinSocket_1x03_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x03 1.27mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_1.27mm +PinSocket_1x03_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x03 1.27mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_1.27mm +PinSocket_1x04_P1.27mm_Vertical +Through hole straight socket strip, 1x04, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x04 1.27mm single row +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_1x04_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x04 1.27mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_1x04_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x04 1.27mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_1x05_P1.27mm_Vertical +Through hole straight socket strip, 1x05, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x05 1.27mm single row +0 +5 +5 +Connector_PinSocket_1.27mm +PinSocket_1x05_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x05 1.27mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_1.27mm +PinSocket_1x05_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x05 1.27mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_1.27mm +PinSocket_1x06_P1.27mm_Vertical +Through hole straight socket strip, 1x06, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x06 1.27mm single row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_1x06_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x06 1.27mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_1x06_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x06 1.27mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_1x07_P1.27mm_Vertical +Through hole straight socket strip, 1x07, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x07 1.27mm single row +0 +7 +7 +Connector_PinSocket_1.27mm +PinSocket_1x07_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x07 1.27mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_1.27mm +PinSocket_1x07_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x07 1.27mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_1.27mm +PinSocket_1x08_P1.27mm_Vertical +Through hole straight socket strip, 1x08, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x08 1.27mm single row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_1x08_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x08 1.27mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_1x08_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x08 1.27mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_1x09_P1.27mm_Vertical +Through hole straight socket strip, 1x09, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x09 1.27mm single row +0 +9 +9 +Connector_PinSocket_1.27mm +PinSocket_1x09_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x09 1.27mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_1.27mm +PinSocket_1x09_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x09 1.27mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_1.27mm +PinSocket_1x10_P1.27mm_Vertical +Through hole straight socket strip, 1x10, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x10 1.27mm single row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_1x10_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x10 1.27mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_1x10_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x10 1.27mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_1x11_P1.27mm_Vertical +Through hole straight socket strip, 1x11, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x11 1.27mm single row +0 +11 +11 +Connector_PinSocket_1.27mm +PinSocket_1x11_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x11 1.27mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_1.27mm +PinSocket_1x11_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x11 1.27mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_1.27mm +PinSocket_1x12_P1.27mm_Vertical +Through hole straight socket strip, 1x12, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x12 1.27mm single row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_1x12_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x12 1.27mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_1x12_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x12 1.27mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_1x13_P1.27mm_Vertical +Through hole straight socket strip, 1x13, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x13 1.27mm single row +0 +13 +13 +Connector_PinSocket_1.27mm +PinSocket_1x13_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x13 1.27mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_1.27mm +PinSocket_1x13_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x13 1.27mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_1.27mm +PinSocket_1x14_P1.27mm_Vertical +Through hole straight socket strip, 1x14, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x14 1.27mm single row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_1x14_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x14 1.27mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_1x14_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x14 1.27mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_1x15_P1.27mm_Vertical +Through hole straight socket strip, 1x15, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x15 1.27mm single row +0 +15 +15 +Connector_PinSocket_1.27mm +PinSocket_1x15_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x15 1.27mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_1.27mm +PinSocket_1x15_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x15 1.27mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_1.27mm +PinSocket_1x16_P1.27mm_Vertical +Through hole straight socket strip, 1x16, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x16 1.27mm single row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_1x16_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x16 1.27mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_1x16_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x16 1.27mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_1x17_P1.27mm_Vertical +Through hole straight socket strip, 1x17, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x17 1.27mm single row +0 +17 +17 +Connector_PinSocket_1.27mm +PinSocket_1x17_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x17 1.27mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_1.27mm +PinSocket_1x17_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x17 1.27mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_1.27mm +PinSocket_1x18_P1.27mm_Vertical +Through hole straight socket strip, 1x18, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x18 1.27mm single row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_1x18_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x18 1.27mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_1x18_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x18 1.27mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_1x19_P1.27mm_Vertical +Through hole straight socket strip, 1x19, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x19 1.27mm single row +0 +19 +19 +Connector_PinSocket_1.27mm +PinSocket_1x19_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x19 1.27mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_1.27mm +PinSocket_1x19_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x19 1.27mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_1.27mm +PinSocket_1x20_P1.27mm_Vertical +Through hole straight socket strip, 1x20, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x20 1.27mm single row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_1x20_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x20 1.27mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_1x20_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x20 1.27mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_1x21_P1.27mm_Vertical +Through hole straight socket strip, 1x21, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x21 1.27mm single row +0 +21 +21 +Connector_PinSocket_1.27mm +PinSocket_1x21_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x21 1.27mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_1.27mm +PinSocket_1x21_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x21 1.27mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_1.27mm +PinSocket_1x22_P1.27mm_Vertical +Through hole straight socket strip, 1x22, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x22 1.27mm single row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_1x22_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x22 1.27mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_1x22_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x22 1.27mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_1x23_P1.27mm_Vertical +Through hole straight socket strip, 1x23, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x23 1.27mm single row +0 +23 +23 +Connector_PinSocket_1.27mm +PinSocket_1x23_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x23 1.27mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_1.27mm +PinSocket_1x23_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x23 1.27mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_1.27mm +PinSocket_1x24_P1.27mm_Vertical +Through hole straight socket strip, 1x24, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x24 1.27mm single row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_1x24_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x24 1.27mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_1x24_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x24 1.27mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_1x25_P1.27mm_Vertical +Through hole straight socket strip, 1x25, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x25 1.27mm single row +0 +25 +25 +Connector_PinSocket_1.27mm +PinSocket_1x25_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x25 1.27mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_1.27mm +PinSocket_1x25_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x25 1.27mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_1.27mm +PinSocket_1x26_P1.27mm_Vertical +Through hole straight socket strip, 1x26, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x26 1.27mm single row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_1x26_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x26 1.27mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_1x26_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x26 1.27mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_1x27_P1.27mm_Vertical +Through hole straight socket strip, 1x27, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x27 1.27mm single row +0 +27 +27 +Connector_PinSocket_1.27mm +PinSocket_1x27_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x27 1.27mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_1.27mm +PinSocket_1x27_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x27 1.27mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_1.27mm +PinSocket_1x28_P1.27mm_Vertical +Through hole straight socket strip, 1x28, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x28 1.27mm single row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_1x28_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x28 1.27mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_1x28_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x28 1.27mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_1x29_P1.27mm_Vertical +Through hole straight socket strip, 1x29, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x29 1.27mm single row +0 +29 +29 +Connector_PinSocket_1.27mm +PinSocket_1x29_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x29 1.27mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_1.27mm +PinSocket_1x29_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x29 1.27mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_1.27mm +PinSocket_1x30_P1.27mm_Vertical +Through hole straight socket strip, 1x30, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x30 1.27mm single row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_1x30_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x30 1.27mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_1x30_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x30 1.27mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_1x31_P1.27mm_Vertical +Through hole straight socket strip, 1x31, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x31 1.27mm single row +0 +31 +31 +Connector_PinSocket_1.27mm +PinSocket_1x31_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x31 1.27mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_1.27mm +PinSocket_1x31_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x31 1.27mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_1.27mm +PinSocket_1x32_P1.27mm_Vertical +Through hole straight socket strip, 1x32, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x32 1.27mm single row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_1x32_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x32 1.27mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_1x32_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x32 1.27mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_1x33_P1.27mm_Vertical +Through hole straight socket strip, 1x33, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x33 1.27mm single row +0 +33 +33 +Connector_PinSocket_1.27mm +PinSocket_1x33_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x33 1.27mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_1.27mm +PinSocket_1x33_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x33 1.27mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_1.27mm +PinSocket_1x34_P1.27mm_Vertical +Through hole straight socket strip, 1x34, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x34 1.27mm single row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_1x34_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x34 1.27mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_1x34_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x34 1.27mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_1x35_P1.27mm_Vertical +Through hole straight socket strip, 1x35, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x35 1.27mm single row +0 +35 +35 +Connector_PinSocket_1.27mm +PinSocket_1x35_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x35 1.27mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_1.27mm +PinSocket_1x35_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x35 1.27mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_1.27mm +PinSocket_1x36_P1.27mm_Vertical +Through hole straight socket strip, 1x36, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x36 1.27mm single row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_1x36_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x36 1.27mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_1x36_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x36 1.27mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_1x37_P1.27mm_Vertical +Through hole straight socket strip, 1x37, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x37 1.27mm single row +0 +37 +37 +Connector_PinSocket_1.27mm +PinSocket_1x37_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x37 1.27mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_1.27mm +PinSocket_1x37_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x37 1.27mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_1.27mm +PinSocket_1x38_P1.27mm_Vertical +Through hole straight socket strip, 1x38, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x38 1.27mm single row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_1x38_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x38 1.27mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_1x38_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x38 1.27mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_1x39_P1.27mm_Vertical +Through hole straight socket strip, 1x39, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x39 1.27mm single row +0 +39 +39 +Connector_PinSocket_1.27mm +PinSocket_1x39_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x39 1.27mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_1.27mm +PinSocket_1x39_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x39 1.27mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_1.27mm +PinSocket_1x40_P1.27mm_Vertical +Through hole straight socket strip, 1x40, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x40 1.27mm single row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_1x40_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x40 1.27mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_1x40_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x40 1.27mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x01_P1.27mm_Vertical +Through hole straight socket strip, 2x01, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x01 1.27mm double row +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_2x01_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x01, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x01 1.27mm double row +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_2x02_P1.27mm_Vertical +Through hole straight socket strip, 2x02, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x02 1.27mm double row +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_2x02_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x02 1.27mm double row +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_2x03_P1.27mm_Horizontal +Through hole angled socket strip, 2x03, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_2x03_P1.27mm_Vertical +Through hole straight socket strip, 2x03, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_2x03_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x03 1.27mm double row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_2x04_P1.27mm_Horizontal +Through hole angled socket strip, 2x04, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_2x04_P1.27mm_Vertical +Through hole straight socket strip, 2x04, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_2x04_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x04 1.27mm double row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_2x05_P1.27mm_Horizontal +Through hole angled socket strip, 2x05, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_2x05_P1.27mm_Vertical +Through hole straight socket strip, 2x05, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_2x05_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x05 1.27mm double row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_2x06_P1.27mm_Horizontal +Through hole angled socket strip, 2x06, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_2x06_P1.27mm_Vertical +Through hole straight socket strip, 2x06, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_2x06_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x06 1.27mm double row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_2x07_P1.27mm_Horizontal +Through hole angled socket strip, 2x07, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_2x07_P1.27mm_Vertical +Through hole straight socket strip, 2x07, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_2x07_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x07 1.27mm double row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_2x08_P1.27mm_Horizontal +Through hole angled socket strip, 2x08, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_2x08_P1.27mm_Vertical +Through hole straight socket strip, 2x08, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_2x08_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x08 1.27mm double row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_2x09_P1.27mm_Horizontal +Through hole angled socket strip, 2x09, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_2x09_P1.27mm_Vertical +Through hole straight socket strip, 2x09, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_2x09_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x09 1.27mm double row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_2x10_P1.27mm_Horizontal +Through hole angled socket strip, 2x10, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_2x10_P1.27mm_Vertical +Through hole straight socket strip, 2x10, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_2x10_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x10 1.27mm double row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_2x11_P1.27mm_Horizontal +Through hole angled socket strip, 2x11, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_2x11_P1.27mm_Vertical +Through hole straight socket strip, 2x11, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_2x11_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x11 1.27mm double row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_2x12_P1.27mm_Horizontal +Through hole angled socket strip, 2x12, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_2x12_P1.27mm_Vertical +Through hole straight socket strip, 2x12, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_2x12_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x12 1.27mm double row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_2x13_P1.27mm_Horizontal +Through hole angled socket strip, 2x13, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_2x13_P1.27mm_Vertical +Through hole straight socket strip, 2x13, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_2x13_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x13 1.27mm double row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_2x14_P1.27mm_Horizontal +Through hole angled socket strip, 2x14, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_2x14_P1.27mm_Vertical +Through hole straight socket strip, 2x14, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_2x14_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x14 1.27mm double row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_2x15_P1.27mm_Horizontal +Through hole angled socket strip, 2x15, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_2x15_P1.27mm_Vertical +Through hole straight socket strip, 2x15, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_2x15_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x15 1.27mm double row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_2x16_P1.27mm_Horizontal +Through hole angled socket strip, 2x16, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_2x16_P1.27mm_Vertical +Through hole straight socket strip, 2x16, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_2x16_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x16 1.27mm double row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_2x17_P1.27mm_Horizontal +Through hole angled socket strip, 2x17, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_2x17_P1.27mm_Vertical +Through hole straight socket strip, 2x17, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_2x17_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x17 1.27mm double row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_2x18_P1.27mm_Horizontal +Through hole angled socket strip, 2x18, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_2x18_P1.27mm_Vertical +Through hole straight socket strip, 2x18, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_2x18_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x18 1.27mm double row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_2x19_P1.27mm_Horizontal +Through hole angled socket strip, 2x19, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_2x19_P1.27mm_Vertical +Through hole straight socket strip, 2x19, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_2x19_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x19 1.27mm double row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_2x20_P1.27mm_Horizontal +Through hole angled socket strip, 2x20, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x20_P1.27mm_Vertical +Through hole straight socket strip, 2x20, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x20_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x20 1.27mm double row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x21_P1.27mm_Horizontal +Through hole angled socket strip, 2x21, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinSocket_1.27mm +PinSocket_2x21_P1.27mm_Vertical +Through hole straight socket strip, 2x21, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinSocket_1.27mm +PinSocket_2x21_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x21 1.27mm double row +0 +42 +42 +Connector_PinSocket_1.27mm +PinSocket_2x22_P1.27mm_Horizontal +Through hole angled socket strip, 2x22, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinSocket_1.27mm +PinSocket_2x22_P1.27mm_Vertical +Through hole straight socket strip, 2x22, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinSocket_1.27mm +PinSocket_2x22_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x22 1.27mm double row +0 +44 +44 +Connector_PinSocket_1.27mm +PinSocket_2x23_P1.27mm_Horizontal +Through hole angled socket strip, 2x23, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinSocket_1.27mm +PinSocket_2x23_P1.27mm_Vertical +Through hole straight socket strip, 2x23, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinSocket_1.27mm +PinSocket_2x23_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x23 1.27mm double row +0 +46 +46 +Connector_PinSocket_1.27mm +PinSocket_2x24_P1.27mm_Horizontal +Through hole angled socket strip, 2x24, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinSocket_1.27mm +PinSocket_2x24_P1.27mm_Vertical +Through hole straight socket strip, 2x24, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinSocket_1.27mm +PinSocket_2x24_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x24 1.27mm double row +0 +48 +48 +Connector_PinSocket_1.27mm +PinSocket_2x25_P1.27mm_Horizontal +Through hole angled socket strip, 2x25, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinSocket_1.27mm +PinSocket_2x25_P1.27mm_Vertical +Through hole straight socket strip, 2x25, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinSocket_1.27mm +PinSocket_2x25_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x25 1.27mm double row +0 +50 +50 +Connector_PinSocket_1.27mm +PinSocket_2x26_P1.27mm_Horizontal +Through hole angled socket strip, 2x26, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinSocket_1.27mm +PinSocket_2x26_P1.27mm_Vertical +Through hole straight socket strip, 2x26, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinSocket_1.27mm +PinSocket_2x26_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x26 1.27mm double row +0 +52 +52 +Connector_PinSocket_1.27mm +PinSocket_2x27_P1.27mm_Horizontal +Through hole angled socket strip, 2x27, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinSocket_1.27mm +PinSocket_2x27_P1.27mm_Vertical +Through hole straight socket strip, 2x27, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinSocket_1.27mm +PinSocket_2x27_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x27 1.27mm double row +0 +54 +54 +Connector_PinSocket_1.27mm +PinSocket_2x28_P1.27mm_Horizontal +Through hole angled socket strip, 2x28, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinSocket_1.27mm +PinSocket_2x28_P1.27mm_Vertical +Through hole straight socket strip, 2x28, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinSocket_1.27mm +PinSocket_2x28_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x28 1.27mm double row +0 +56 +56 +Connector_PinSocket_1.27mm +PinSocket_2x29_P1.27mm_Horizontal +Through hole angled socket strip, 2x29, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinSocket_1.27mm +PinSocket_2x29_P1.27mm_Vertical +Through hole straight socket strip, 2x29, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinSocket_1.27mm +PinSocket_2x29_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x29 1.27mm double row +0 +58 +58 +Connector_PinSocket_1.27mm +PinSocket_2x30_P1.27mm_Horizontal +Through hole angled socket strip, 2x30, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinSocket_1.27mm +PinSocket_2x30_P1.27mm_Vertical +Through hole straight socket strip, 2x30, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinSocket_1.27mm +PinSocket_2x30_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x30 1.27mm double row +0 +60 +60 +Connector_PinSocket_1.27mm +PinSocket_2x31_P1.27mm_Horizontal +Through hole angled socket strip, 2x31, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinSocket_1.27mm +PinSocket_2x31_P1.27mm_Vertical +Through hole straight socket strip, 2x31, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinSocket_1.27mm +PinSocket_2x31_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x31 1.27mm double row +0 +62 +62 +Connector_PinSocket_1.27mm +PinSocket_2x32_P1.27mm_Horizontal +Through hole angled socket strip, 2x32, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinSocket_1.27mm +PinSocket_2x32_P1.27mm_Vertical +Through hole straight socket strip, 2x32, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinSocket_1.27mm +PinSocket_2x32_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x32 1.27mm double row +0 +64 +64 +Connector_PinSocket_1.27mm +PinSocket_2x33_P1.27mm_Horizontal +Through hole angled socket strip, 2x33, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinSocket_1.27mm +PinSocket_2x33_P1.27mm_Vertical +Through hole straight socket strip, 2x33, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinSocket_1.27mm +PinSocket_2x33_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x33 1.27mm double row +0 +66 +66 +Connector_PinSocket_1.27mm +PinSocket_2x34_P1.27mm_Horizontal +Through hole angled socket strip, 2x34, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinSocket_1.27mm +PinSocket_2x34_P1.27mm_Vertical +Through hole straight socket strip, 2x34, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinSocket_1.27mm +PinSocket_2x34_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x34 1.27mm double row +0 +68 +68 +Connector_PinSocket_1.27mm +PinSocket_2x35_P1.27mm_Horizontal +Through hole angled socket strip, 2x35, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinSocket_1.27mm +PinSocket_2x35_P1.27mm_Vertical +Through hole straight socket strip, 2x35, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinSocket_1.27mm +PinSocket_2x35_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x35 1.27mm double row +0 +70 +70 +Connector_PinSocket_1.27mm +PinSocket_2x36_P1.27mm_Horizontal +Through hole angled socket strip, 2x36, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinSocket_1.27mm +PinSocket_2x36_P1.27mm_Vertical +Through hole straight socket strip, 2x36, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinSocket_1.27mm +PinSocket_2x36_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x36 1.27mm double row +0 +72 +72 +Connector_PinSocket_1.27mm +PinSocket_2x37_P1.27mm_Horizontal +Through hole angled socket strip, 2x37, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinSocket_1.27mm +PinSocket_2x37_P1.27mm_Vertical +Through hole straight socket strip, 2x37, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinSocket_1.27mm +PinSocket_2x37_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x37 1.27mm double row +0 +74 +74 +Connector_PinSocket_1.27mm +PinSocket_2x38_P1.27mm_Horizontal +Through hole angled socket strip, 2x38, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinSocket_1.27mm +PinSocket_2x38_P1.27mm_Vertical +Through hole straight socket strip, 2x38, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinSocket_1.27mm +PinSocket_2x38_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x38 1.27mm double row +0 +76 +76 +Connector_PinSocket_1.27mm +PinSocket_2x39_P1.27mm_Horizontal +Through hole angled socket strip, 2x39, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinSocket_1.27mm +PinSocket_2x39_P1.27mm_Vertical +Through hole straight socket strip, 2x39, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinSocket_1.27mm +PinSocket_2x39_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x39 1.27mm double row +0 +78 +78 +Connector_PinSocket_1.27mm +PinSocket_2x40_P1.27mm_Horizontal +Through hole angled socket strip, 2x40, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_2x40_P1.27mm_Vertical +Through hole straight socket strip, 2x40, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_2x40_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x40 1.27mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_2x41_P1.27mm_Horizontal +Through hole angled socket strip, 2x41, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x41 1.27mm double row +0 +82 +82 +Connector_PinSocket_1.27mm +PinSocket_2x42_P1.27mm_Horizontal +Through hole angled socket strip, 2x42, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x42 1.27mm double row +0 +84 +84 +Connector_PinSocket_1.27mm +PinSocket_2x43_P1.27mm_Horizontal +Through hole angled socket strip, 2x43, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x43 1.27mm double row +0 +86 +86 +Connector_PinSocket_1.27mm +PinSocket_2x44_P1.27mm_Horizontal +Through hole angled socket strip, 2x44, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x44 1.27mm double row +0 +88 +88 +Connector_PinSocket_1.27mm +PinSocket_2x45_P1.27mm_Horizontal +Through hole angled socket strip, 2x45, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x45 1.27mm double row +0 +90 +90 +Connector_PinSocket_1.27mm +PinSocket_2x46_P1.27mm_Horizontal +Through hole angled socket strip, 2x46, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x46 1.27mm double row +0 +92 +92 +Connector_PinSocket_1.27mm +PinSocket_2x47_P1.27mm_Horizontal +Through hole angled socket strip, 2x47, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x47 1.27mm double row +0 +94 +94 +Connector_PinSocket_1.27mm +PinSocket_2x48_P1.27mm_Horizontal +Through hole angled socket strip, 2x48, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x48 1.27mm double row +0 +96 +96 +Connector_PinSocket_1.27mm +PinSocket_2x49_P1.27mm_Horizontal +Through hole angled socket strip, 2x49, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x49 1.27mm double row +0 +98 +98 +Connector_PinSocket_1.27mm +PinSocket_2x50_P1.27mm_Horizontal +Through hole angled socket strip, 2x50, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x50 1.27mm double row +0 +100 +100 +Connector_PinSocket_2.00mm +PinSocket_1x01_P2.00mm_Horizontal +Through hole angled socket strip, 1x01, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinSocket_2.00mm +PinSocket_1x01_P2.00mm_Vertical +Through hole straight socket strip, 1x01, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Horizontal +Through hole angled socket strip, 1x02, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Vertical +Through hole straight socket strip, 1x02, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x02 2.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x02 2.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Horizontal +Through hole angled socket strip, 1x03, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Vertical +Through hole straight socket strip, 1x03, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x03 2.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x03 2.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Horizontal +Through hole angled socket strip, 1x04, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Vertical +Through hole straight socket strip, 1x04, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x04 2.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x04 2.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Horizontal +Through hole angled socket strip, 1x05, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Vertical +Through hole straight socket strip, 1x05, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x05 2.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x05 2.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Horizontal +Through hole angled socket strip, 1x06, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Vertical +Through hole straight socket strip, 1x06, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x06 2.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x06 2.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Horizontal +Through hole angled socket strip, 1x07, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Vertical +Through hole straight socket strip, 1x07, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x07 2.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x07 2.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Horizontal +Through hole angled socket strip, 1x08, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Vertical +Through hole straight socket strip, 1x08, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x08 2.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x08 2.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Horizontal +Through hole angled socket strip, 1x09, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Vertical +Through hole straight socket strip, 1x09, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x09 2.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x09 2.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Horizontal +Through hole angled socket strip, 1x10, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Vertical +Through hole straight socket strip, 1x10, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x10 2.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x10 2.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Horizontal +Through hole angled socket strip, 1x11, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Vertical +Through hole straight socket strip, 1x11, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x11 2.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x11 2.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Horizontal +Through hole angled socket strip, 1x12, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Vertical +Through hole straight socket strip, 1x12, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x12 2.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x12 2.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Horizontal +Through hole angled socket strip, 1x13, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Vertical +Through hole straight socket strip, 1x13, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x13 2.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x13 2.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Horizontal +Through hole angled socket strip, 1x14, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Vertical +Through hole straight socket strip, 1x14, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x14 2.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x14 2.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Horizontal +Through hole angled socket strip, 1x15, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Vertical +Through hole straight socket strip, 1x15, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x15 2.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x15 2.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Horizontal +Through hole angled socket strip, 1x16, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Vertical +Through hole straight socket strip, 1x16, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x16 2.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x16 2.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Horizontal +Through hole angled socket strip, 1x17, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Vertical +Through hole straight socket strip, 1x17, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x17 2.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x17 2.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Horizontal +Through hole angled socket strip, 1x18, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Vertical +Through hole straight socket strip, 1x18, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x18 2.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x18 2.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Horizontal +Through hole angled socket strip, 1x19, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Vertical +Through hole straight socket strip, 1x19, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x19 2.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x19 2.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Horizontal +Through hole angled socket strip, 1x20, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Vertical +Through hole straight socket strip, 1x20, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x20 2.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x20 2.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Horizontal +Through hole angled socket strip, 1x21, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Vertical +Through hole straight socket strip, 1x21, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x21 2.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x21 2.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Horizontal +Through hole angled socket strip, 1x22, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Vertical +Through hole straight socket strip, 1x22, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x22 2.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x22 2.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Horizontal +Through hole angled socket strip, 1x23, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Vertical +Through hole straight socket strip, 1x23, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x23 2.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x23 2.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Horizontal +Through hole angled socket strip, 1x24, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Vertical +Through hole straight socket strip, 1x24, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x24 2.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x24 2.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Horizontal +Through hole angled socket strip, 1x25, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Vertical +Through hole straight socket strip, 1x25, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x25 2.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x25 2.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Horizontal +Through hole angled socket strip, 1x26, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Vertical +Through hole straight socket strip, 1x26, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x26 2.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x26 2.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Horizontal +Through hole angled socket strip, 1x27, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Vertical +Through hole straight socket strip, 1x27, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x27 2.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x27 2.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Horizontal +Through hole angled socket strip, 1x28, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Vertical +Through hole straight socket strip, 1x28, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x28 2.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x28 2.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Horizontal +Through hole angled socket strip, 1x29, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Vertical +Through hole straight socket strip, 1x29, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x29 2.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x29 2.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Horizontal +Through hole angled socket strip, 1x30, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Vertical +Through hole straight socket strip, 1x30, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x30 2.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x30 2.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Horizontal +Through hole angled socket strip, 1x31, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Vertical +Through hole straight socket strip, 1x31, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x31 2.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x31 2.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Horizontal +Through hole angled socket strip, 1x32, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Vertical +Through hole straight socket strip, 1x32, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x32 2.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x32 2.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Horizontal +Through hole angled socket strip, 1x33, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Vertical +Through hole straight socket strip, 1x33, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x33 2.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x33 2.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Horizontal +Through hole angled socket strip, 1x34, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Vertical +Through hole straight socket strip, 1x34, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x34 2.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x34 2.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Horizontal +Through hole angled socket strip, 1x35, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Vertical +Through hole straight socket strip, 1x35, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x35 2.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x35 2.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Horizontal +Through hole angled socket strip, 1x36, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Vertical +Through hole straight socket strip, 1x36, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x36 2.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x36 2.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Horizontal +Through hole angled socket strip, 1x37, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Vertical +Through hole straight socket strip, 1x37, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x37 2.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x37 2.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Horizontal +Through hole angled socket strip, 1x38, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Vertical +Through hole straight socket strip, 1x38, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x38 2.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x38 2.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Horizontal +Through hole angled socket strip, 1x39, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Vertical +Through hole straight socket strip, 1x39, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x39 2.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x39 2.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Horizontal +Through hole angled socket strip, 1x40, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Vertical +Through hole straight socket strip, 1x40, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x40 2.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x40 2.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x01_P2.00mm_Horizontal +Through hole angled socket strip, 2x01, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_2x01_P2.00mm_Vertical +Through hole straight socket strip, 2x01, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_2x01_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x01, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x01 2.00mm double row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_2x02_P2.00mm_Horizontal +Through hole angled socket strip, 2x02, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_2x02_P2.00mm_Vertical +Through hole straight socket strip, 2x02, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_2x02_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x02 2.00mm double row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_2x03_P2.00mm_Horizontal +Through hole angled socket strip, 2x03, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_2x03_P2.00mm_Vertical +Through hole straight socket strip, 2x03, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_2x03_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x03 2.00mm double row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_2x04_P2.00mm_Horizontal +Through hole angled socket strip, 2x04, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_2x04_P2.00mm_Vertical +Through hole straight socket strip, 2x04, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_2x04_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x04 2.00mm double row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_2x05_P2.00mm_Horizontal +Through hole angled socket strip, 2x05, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_2x05_P2.00mm_Vertical +Through hole straight socket strip, 2x05, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_2x05_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x05 2.00mm double row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_2x06_P2.00mm_Horizontal +Through hole angled socket strip, 2x06, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_2x06_P2.00mm_Vertical +Through hole straight socket strip, 2x06, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_2x06_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x06 2.00mm double row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_2x07_P2.00mm_Horizontal +Through hole angled socket strip, 2x07, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_2x07_P2.00mm_Vertical +Through hole straight socket strip, 2x07, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_2x07_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x07 2.00mm double row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_2x08_P2.00mm_Horizontal +Through hole angled socket strip, 2x08, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_2x08_P2.00mm_Vertical +Through hole straight socket strip, 2x08, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_2x08_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x08 2.00mm double row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_2x09_P2.00mm_Horizontal +Through hole angled socket strip, 2x09, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_2x09_P2.00mm_Vertical +Through hole straight socket strip, 2x09, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_2x09_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x09 2.00mm double row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_2x10_P2.00mm_Horizontal +Through hole angled socket strip, 2x10, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_2x10_P2.00mm_Vertical +Through hole straight socket strip, 2x10, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_2x10_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x10 2.00mm double row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_2x11_P2.00mm_Horizontal +Through hole angled socket strip, 2x11, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_2x11_P2.00mm_Vertical +Through hole straight socket strip, 2x11, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_2x11_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x11 2.00mm double row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_2x12_P2.00mm_Horizontal +Through hole angled socket strip, 2x12, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_2x12_P2.00mm_Vertical +Through hole straight socket strip, 2x12, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_2x12_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x12 2.00mm double row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_2x13_P2.00mm_Horizontal +Through hole angled socket strip, 2x13, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_2x13_P2.00mm_Vertical +Through hole straight socket strip, 2x13, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_2x13_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x13 2.00mm double row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_2x14_P2.00mm_Horizontal +Through hole angled socket strip, 2x14, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_2x14_P2.00mm_Vertical +Through hole straight socket strip, 2x14, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_2x14_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x14 2.00mm double row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_2x15_P2.00mm_Horizontal +Through hole angled socket strip, 2x15, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_2x15_P2.00mm_Vertical +Through hole straight socket strip, 2x15, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_2x15_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x15 2.00mm double row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_2x16_P2.00mm_Horizontal +Through hole angled socket strip, 2x16, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_2x16_P2.00mm_Vertical +Through hole straight socket strip, 2x16, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_2x16_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x16 2.00mm double row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_2x17_P2.00mm_Horizontal +Through hole angled socket strip, 2x17, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_2x17_P2.00mm_Vertical +Through hole straight socket strip, 2x17, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_2x17_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x17 2.00mm double row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_2x18_P2.00mm_Horizontal +Through hole angled socket strip, 2x18, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_2x18_P2.00mm_Vertical +Through hole straight socket strip, 2x18, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_2x18_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x18 2.00mm double row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_2x19_P2.00mm_Horizontal +Through hole angled socket strip, 2x19, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_2x19_P2.00mm_Vertical +Through hole straight socket strip, 2x19, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_2x19_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x19 2.00mm double row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_2x20_P2.00mm_Horizontal +Through hole angled socket strip, 2x20, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x20_P2.00mm_Vertical +Through hole straight socket strip, 2x20, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x20_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x20 2.00mm double row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x21_P2.00mm_Horizontal +Through hole angled socket strip, 2x21, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinSocket_2.00mm +PinSocket_2x21_P2.00mm_Vertical +Through hole straight socket strip, 2x21, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinSocket_2.00mm +PinSocket_2x21_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x21 2.00mm double row +0 +42 +42 +Connector_PinSocket_2.00mm +PinSocket_2x22_P2.00mm_Horizontal +Through hole angled socket strip, 2x22, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinSocket_2.00mm +PinSocket_2x22_P2.00mm_Vertical +Through hole straight socket strip, 2x22, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinSocket_2.00mm +PinSocket_2x22_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x22 2.00mm double row +0 +44 +44 +Connector_PinSocket_2.00mm +PinSocket_2x23_P2.00mm_Horizontal +Through hole angled socket strip, 2x23, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinSocket_2.00mm +PinSocket_2x23_P2.00mm_Vertical +Through hole straight socket strip, 2x23, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinSocket_2.00mm +PinSocket_2x23_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x23 2.00mm double row +0 +46 +46 +Connector_PinSocket_2.00mm +PinSocket_2x24_P2.00mm_Horizontal +Through hole angled socket strip, 2x24, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinSocket_2.00mm +PinSocket_2x24_P2.00mm_Vertical +Through hole straight socket strip, 2x24, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinSocket_2.00mm +PinSocket_2x24_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x24 2.00mm double row +0 +48 +48 +Connector_PinSocket_2.00mm +PinSocket_2x25_P2.00mm_Horizontal +Through hole angled socket strip, 2x25, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinSocket_2.00mm +PinSocket_2x25_P2.00mm_Vertical +Through hole straight socket strip, 2x25, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinSocket_2.00mm +PinSocket_2x25_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x25 2.00mm double row +0 +50 +50 +Connector_PinSocket_2.00mm +PinSocket_2x26_P2.00mm_Horizontal +Through hole angled socket strip, 2x26, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinSocket_2.00mm +PinSocket_2x26_P2.00mm_Vertical +Through hole straight socket strip, 2x26, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinSocket_2.00mm +PinSocket_2x26_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x26 2.00mm double row +0 +52 +52 +Connector_PinSocket_2.00mm +PinSocket_2x27_P2.00mm_Horizontal +Through hole angled socket strip, 2x27, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinSocket_2.00mm +PinSocket_2x27_P2.00mm_Vertical +Through hole straight socket strip, 2x27, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinSocket_2.00mm +PinSocket_2x27_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x27 2.00mm double row +0 +54 +54 +Connector_PinSocket_2.00mm +PinSocket_2x28_P2.00mm_Horizontal +Through hole angled socket strip, 2x28, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinSocket_2.00mm +PinSocket_2x28_P2.00mm_Vertical +Through hole straight socket strip, 2x28, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinSocket_2.00mm +PinSocket_2x28_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x28 2.00mm double row +0 +56 +56 +Connector_PinSocket_2.00mm +PinSocket_2x29_P2.00mm_Horizontal +Through hole angled socket strip, 2x29, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinSocket_2.00mm +PinSocket_2x29_P2.00mm_Vertical +Through hole straight socket strip, 2x29, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinSocket_2.00mm +PinSocket_2x29_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x29 2.00mm double row +0 +58 +58 +Connector_PinSocket_2.00mm +PinSocket_2x30_P2.00mm_Horizontal +Through hole angled socket strip, 2x30, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinSocket_2.00mm +PinSocket_2x30_P2.00mm_Vertical +Through hole straight socket strip, 2x30, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinSocket_2.00mm +PinSocket_2x30_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x30 2.00mm double row +0 +60 +60 +Connector_PinSocket_2.00mm +PinSocket_2x31_P2.00mm_Horizontal +Through hole angled socket strip, 2x31, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinSocket_2.00mm +PinSocket_2x31_P2.00mm_Vertical +Through hole straight socket strip, 2x31, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinSocket_2.00mm +PinSocket_2x31_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x31 2.00mm double row +0 +62 +62 +Connector_PinSocket_2.00mm +PinSocket_2x32_P2.00mm_Horizontal +Through hole angled socket strip, 2x32, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinSocket_2.00mm +PinSocket_2x32_P2.00mm_Vertical +Through hole straight socket strip, 2x32, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinSocket_2.00mm +PinSocket_2x32_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x32 2.00mm double row +0 +64 +64 +Connector_PinSocket_2.00mm +PinSocket_2x33_P2.00mm_Horizontal +Through hole angled socket strip, 2x33, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinSocket_2.00mm +PinSocket_2x33_P2.00mm_Vertical +Through hole straight socket strip, 2x33, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinSocket_2.00mm +PinSocket_2x33_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x33 2.00mm double row +0 +66 +66 +Connector_PinSocket_2.00mm +PinSocket_2x34_P2.00mm_Horizontal +Through hole angled socket strip, 2x34, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinSocket_2.00mm +PinSocket_2x34_P2.00mm_Vertical +Through hole straight socket strip, 2x34, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinSocket_2.00mm +PinSocket_2x34_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x34 2.00mm double row +0 +68 +68 +Connector_PinSocket_2.00mm +PinSocket_2x35_P2.00mm_Horizontal +Through hole angled socket strip, 2x35, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinSocket_2.00mm +PinSocket_2x35_P2.00mm_Vertical +Through hole straight socket strip, 2x35, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinSocket_2.00mm +PinSocket_2x35_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x35 2.00mm double row +0 +70 +70 +Connector_PinSocket_2.00mm +PinSocket_2x36_P2.00mm_Horizontal +Through hole angled socket strip, 2x36, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinSocket_2.00mm +PinSocket_2x36_P2.00mm_Vertical +Through hole straight socket strip, 2x36, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinSocket_2.00mm +PinSocket_2x36_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x36 2.00mm double row +0 +72 +72 +Connector_PinSocket_2.00mm +PinSocket_2x37_P2.00mm_Horizontal +Through hole angled socket strip, 2x37, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinSocket_2.00mm +PinSocket_2x37_P2.00mm_Vertical +Through hole straight socket strip, 2x37, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinSocket_2.00mm +PinSocket_2x37_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x37 2.00mm double row +0 +74 +74 +Connector_PinSocket_2.00mm +PinSocket_2x38_P2.00mm_Horizontal +Through hole angled socket strip, 2x38, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinSocket_2.00mm +PinSocket_2x38_P2.00mm_Vertical +Through hole straight socket strip, 2x38, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinSocket_2.00mm +PinSocket_2x38_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x38 2.00mm double row +0 +76 +76 +Connector_PinSocket_2.00mm +PinSocket_2x39_P2.00mm_Horizontal +Through hole angled socket strip, 2x39, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinSocket_2.00mm +PinSocket_2x39_P2.00mm_Vertical +Through hole straight socket strip, 2x39, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinSocket_2.00mm +PinSocket_2x39_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x39 2.00mm double row +0 +78 +78 +Connector_PinSocket_2.00mm +PinSocket_2x40_P2.00mm_Horizontal +Through hole angled socket strip, 2x40, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinSocket_2.00mm +PinSocket_2x40_P2.00mm_Vertical +Through hole straight socket strip, 2x40, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinSocket_2.00mm +PinSocket_2x40_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x40 2.00mm double row +0 +80 +80 +Connector_PinSocket_2.54mm +PinSocket_1x01_P2.54mm_Horizontal +Through hole angled socket strip, 1x01, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinSocket_2.54mm +PinSocket_1x01_P2.54mm_Vertical +Through hole straight socket strip, 1x01, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Horizontal +Through hole angled socket strip, 1x02, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Vertical +Through hole straight socket strip, 1x02, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x02 2.54mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x02 2.54mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Horizontal +Through hole angled socket strip, 1x03, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Vertical +Through hole straight socket strip, 1x03, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x03 2.54mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x03 2.54mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Horizontal +Through hole angled socket strip, 1x04, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Vertical +Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x04 2.54mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x04 2.54mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Horizontal +Through hole angled socket strip, 1x05, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Vertical +Through hole straight socket strip, 1x05, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x05 2.54mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x05 2.54mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Horizontal +Through hole angled socket strip, 1x06, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Vertical +Through hole straight socket strip, 1x06, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x06 2.54mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x06 2.54mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Horizontal +Through hole angled socket strip, 1x07, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Vertical +Through hole straight socket strip, 1x07, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x07 2.54mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x07 2.54mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Horizontal +Through hole angled socket strip, 1x08, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Vertical +Through hole straight socket strip, 1x08, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x08 2.54mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x08 2.54mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Horizontal +Through hole angled socket strip, 1x09, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Vertical +Through hole straight socket strip, 1x09, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x09 2.54mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x09 2.54mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Horizontal +Through hole angled socket strip, 1x10, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Vertical +Through hole straight socket strip, 1x10, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x10 2.54mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x10 2.54mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Horizontal +Through hole angled socket strip, 1x11, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Vertical +Through hole straight socket strip, 1x11, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x11 2.54mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x11 2.54mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Horizontal +Through hole angled socket strip, 1x12, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Vertical +Through hole straight socket strip, 1x12, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x12 2.54mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x12 2.54mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Horizontal +Through hole angled socket strip, 1x13, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Vertical +Through hole straight socket strip, 1x13, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x13 2.54mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x13 2.54mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Horizontal +Through hole angled socket strip, 1x14, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Vertical +Through hole straight socket strip, 1x14, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x14 2.54mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x14 2.54mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Horizontal +Through hole angled socket strip, 1x15, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Vertical +Through hole straight socket strip, 1x15, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x15 2.54mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x15 2.54mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Horizontal +Through hole angled socket strip, 1x16, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Vertical +Through hole straight socket strip, 1x16, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x16 2.54mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x16 2.54mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Horizontal +Through hole angled socket strip, 1x17, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Vertical +Through hole straight socket strip, 1x17, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x17 2.54mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x17 2.54mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Horizontal +Through hole angled socket strip, 1x18, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Vertical +Through hole straight socket strip, 1x18, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x18 2.54mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x18 2.54mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Horizontal +Through hole angled socket strip, 1x19, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Vertical +Through hole straight socket strip, 1x19, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x19 2.54mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x19 2.54mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Horizontal +Through hole angled socket strip, 1x20, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Vertical +Through hole straight socket strip, 1x20, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x20 2.54mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x20 2.54mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Horizontal +Through hole angled socket strip, 1x21, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Vertical +Through hole straight socket strip, 1x21, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x21 2.54mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x21 2.54mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Horizontal +Through hole angled socket strip, 1x22, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Vertical +Through hole straight socket strip, 1x22, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x22 2.54mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x22 2.54mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Horizontal +Through hole angled socket strip, 1x23, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Vertical +Through hole straight socket strip, 1x23, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x23 2.54mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x23 2.54mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Horizontal +Through hole angled socket strip, 1x24, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Vertical +Through hole straight socket strip, 1x24, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x24 2.54mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x24 2.54mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Horizontal +Through hole angled socket strip, 1x25, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Vertical +Through hole straight socket strip, 1x25, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x25 2.54mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x25 2.54mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Horizontal +Through hole angled socket strip, 1x26, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Vertical +Through hole straight socket strip, 1x26, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x26 2.54mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x26 2.54mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Horizontal +Through hole angled socket strip, 1x27, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Vertical +Through hole straight socket strip, 1x27, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x27 2.54mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x27 2.54mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Horizontal +Through hole angled socket strip, 1x28, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Vertical +Through hole straight socket strip, 1x28, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x28 2.54mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x28 2.54mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Horizontal +Through hole angled socket strip, 1x29, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Vertical +Through hole straight socket strip, 1x29, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x29 2.54mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x29 2.54mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Horizontal +Through hole angled socket strip, 1x30, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Vertical +Through hole straight socket strip, 1x30, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x30 2.54mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x30 2.54mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Horizontal +Through hole angled socket strip, 1x31, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Vertical +Through hole straight socket strip, 1x31, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x31 2.54mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x31 2.54mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Horizontal +Through hole angled socket strip, 1x32, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Vertical +Through hole straight socket strip, 1x32, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x32 2.54mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x32 2.54mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Horizontal +Through hole angled socket strip, 1x33, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Vertical +Through hole straight socket strip, 1x33, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x33 2.54mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x33 2.54mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Horizontal +Through hole angled socket strip, 1x34, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Vertical +Through hole straight socket strip, 1x34, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x34 2.54mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x34 2.54mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Horizontal +Through hole angled socket strip, 1x35, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Vertical +Through hole straight socket strip, 1x35, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x35 2.54mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x35 2.54mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Horizontal +Through hole angled socket strip, 1x36, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Vertical +Through hole straight socket strip, 1x36, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x36 2.54mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x36 2.54mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Horizontal +Through hole angled socket strip, 1x37, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Vertical +Through hole straight socket strip, 1x37, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x37 2.54mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x37 2.54mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Horizontal +Through hole angled socket strip, 1x38, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Vertical +Through hole straight socket strip, 1x38, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x38 2.54mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x38 2.54mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Horizontal +Through hole angled socket strip, 1x39, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Vertical +Through hole straight socket strip, 1x39, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x39 2.54mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x39 2.54mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Horizontal +Through hole angled socket strip, 1x40, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Vertical +Through hole straight socket strip, 1x40, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x40 2.54mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x40 2.54mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x01_P2.54mm_Horizontal +Through hole angled socket strip, 2x01, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_2x01_P2.54mm_Vertical +Through hole straight socket strip, 2x01, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_2x01_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x01, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x01 2.54mm double row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_2x02_P2.54mm_Horizontal +Through hole angled socket strip, 2x02, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_2x02_P2.54mm_Vertical +Through hole straight socket strip, 2x02, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_2x02_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x02 2.54mm double row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_2x03_P2.54mm_Horizontal +Through hole angled socket strip, 2x03, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_2x03_P2.54mm_Vertical +Through hole straight socket strip, 2x03, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_2x03_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x03 2.54mm double row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_2x04_P2.54mm_Horizontal +Through hole angled socket strip, 2x04, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_2x04_P2.54mm_Vertical +Through hole straight socket strip, 2x04, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_2x04_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x04 2.54mm double row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_2x05_P2.54mm_Horizontal +Through hole angled socket strip, 2x05, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_2x05_P2.54mm_Vertical +Through hole straight socket strip, 2x05, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_2x05_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x05 2.54mm double row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_2x06_P2.54mm_Horizontal +Through hole angled socket strip, 2x06, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_2x06_P2.54mm_Vertical +Through hole straight socket strip, 2x06, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_2x06_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x06 2.54mm double row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_2x07_P2.54mm_Horizontal +Through hole angled socket strip, 2x07, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_2x07_P2.54mm_Vertical +Through hole straight socket strip, 2x07, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_2x07_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x07 2.54mm double row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_2x08_P2.54mm_Horizontal +Through hole angled socket strip, 2x08, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_2x08_P2.54mm_Vertical +Through hole straight socket strip, 2x08, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_2x08_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x08 2.54mm double row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_2x09_P2.54mm_Horizontal +Through hole angled socket strip, 2x09, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_2x09_P2.54mm_Vertical +Through hole straight socket strip, 2x09, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_2x09_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x09 2.54mm double row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_2x10_P2.54mm_Horizontal +Through hole angled socket strip, 2x10, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_2x10_P2.54mm_Vertical +Through hole straight socket strip, 2x10, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_2x10_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x10 2.54mm double row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_2x11_P2.54mm_Horizontal +Through hole angled socket strip, 2x11, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_2x11_P2.54mm_Vertical +Through hole straight socket strip, 2x11, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_2x11_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x11 2.54mm double row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_2x12_P2.54mm_Horizontal +Through hole angled socket strip, 2x12, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_2x12_P2.54mm_Vertical +Through hole straight socket strip, 2x12, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_2x12_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x12 2.54mm double row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_2x13_P2.54mm_Horizontal +Through hole angled socket strip, 2x13, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_2x13_P2.54mm_Vertical +Through hole straight socket strip, 2x13, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_2x13_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x13 2.54mm double row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_2x14_P2.54mm_Horizontal +Through hole angled socket strip, 2x14, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_2x14_P2.54mm_Vertical +Through hole straight socket strip, 2x14, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_2x14_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x14 2.54mm double row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_2x15_P2.54mm_Horizontal +Through hole angled socket strip, 2x15, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_2x15_P2.54mm_Vertical +Through hole straight socket strip, 2x15, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_2x15_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x15 2.54mm double row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_2x16_P2.54mm_Horizontal +Through hole angled socket strip, 2x16, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_2x16_P2.54mm_Vertical +Through hole straight socket strip, 2x16, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_2x16_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x16 2.54mm double row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_2x17_P2.54mm_Horizontal +Through hole angled socket strip, 2x17, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_2x17_P2.54mm_Vertical +Through hole straight socket strip, 2x17, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_2x17_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x17 2.54mm double row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_2x18_P2.54mm_Horizontal +Through hole angled socket strip, 2x18, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_2x18_P2.54mm_Vertical +Through hole straight socket strip, 2x18, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_2x18_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x18 2.54mm double row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_2x19_P2.54mm_Horizontal +Through hole angled socket strip, 2x19, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_2x19_P2.54mm_Vertical +Through hole straight socket strip, 2x19, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_2x19_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x19 2.54mm double row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_2x20_P2.54mm_Horizontal +Through hole angled socket strip, 2x20, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x20_P2.54mm_Vertical +Through hole straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x20_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x20 2.54mm double row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x21_P2.54mm_Horizontal +Through hole angled socket strip, 2x21, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinSocket_2.54mm +PinSocket_2x21_P2.54mm_Vertical +Through hole straight socket strip, 2x21, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinSocket_2.54mm +PinSocket_2x21_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x21 2.54mm double row +0 +42 +42 +Connector_PinSocket_2.54mm +PinSocket_2x22_P2.54mm_Horizontal +Through hole angled socket strip, 2x22, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinSocket_2.54mm +PinSocket_2x22_P2.54mm_Vertical +Through hole straight socket strip, 2x22, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinSocket_2.54mm +PinSocket_2x22_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x22 2.54mm double row +0 +44 +44 +Connector_PinSocket_2.54mm +PinSocket_2x23_P2.54mm_Horizontal +Through hole angled socket strip, 2x23, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinSocket_2.54mm +PinSocket_2x23_P2.54mm_Vertical +Through hole straight socket strip, 2x23, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinSocket_2.54mm +PinSocket_2x23_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x23 2.54mm double row +0 +46 +46 +Connector_PinSocket_2.54mm +PinSocket_2x24_P2.54mm_Horizontal +Through hole angled socket strip, 2x24, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinSocket_2.54mm +PinSocket_2x24_P2.54mm_Vertical +Through hole straight socket strip, 2x24, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinSocket_2.54mm +PinSocket_2x24_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x24 2.54mm double row +0 +48 +48 +Connector_PinSocket_2.54mm +PinSocket_2x25_P2.54mm_Horizontal +Through hole angled socket strip, 2x25, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinSocket_2.54mm +PinSocket_2x25_P2.54mm_Vertical +Through hole straight socket strip, 2x25, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinSocket_2.54mm +PinSocket_2x25_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x25 2.54mm double row +0 +50 +50 +Connector_PinSocket_2.54mm +PinSocket_2x26_P2.54mm_Horizontal +Through hole angled socket strip, 2x26, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinSocket_2.54mm +PinSocket_2x26_P2.54mm_Vertical +Through hole straight socket strip, 2x26, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinSocket_2.54mm +PinSocket_2x26_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x26 2.54mm double row +0 +52 +52 +Connector_PinSocket_2.54mm +PinSocket_2x27_P2.54mm_Horizontal +Through hole angled socket strip, 2x27, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinSocket_2.54mm +PinSocket_2x27_P2.54mm_Vertical +Through hole straight socket strip, 2x27, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinSocket_2.54mm +PinSocket_2x27_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x27 2.54mm double row +0 +54 +54 +Connector_PinSocket_2.54mm +PinSocket_2x28_P2.54mm_Horizontal +Through hole angled socket strip, 2x28, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinSocket_2.54mm +PinSocket_2x28_P2.54mm_Vertical +Through hole straight socket strip, 2x28, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinSocket_2.54mm +PinSocket_2x28_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x28 2.54mm double row +0 +56 +56 +Connector_PinSocket_2.54mm +PinSocket_2x29_P2.54mm_Horizontal +Through hole angled socket strip, 2x29, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinSocket_2.54mm +PinSocket_2x29_P2.54mm_Vertical +Through hole straight socket strip, 2x29, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinSocket_2.54mm +PinSocket_2x29_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x29 2.54mm double row +0 +58 +58 +Connector_PinSocket_2.54mm +PinSocket_2x30_P2.54mm_Horizontal +Through hole angled socket strip, 2x30, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinSocket_2.54mm +PinSocket_2x30_P2.54mm_Vertical +Through hole straight socket strip, 2x30, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinSocket_2.54mm +PinSocket_2x30_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x30 2.54mm double row +0 +60 +60 +Connector_PinSocket_2.54mm +PinSocket_2x31_P2.54mm_Horizontal +Through hole angled socket strip, 2x31, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinSocket_2.54mm +PinSocket_2x31_P2.54mm_Vertical +Through hole straight socket strip, 2x31, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinSocket_2.54mm +PinSocket_2x31_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x31 2.54mm double row +0 +62 +62 +Connector_PinSocket_2.54mm +PinSocket_2x32_P2.54mm_Horizontal +Through hole angled socket strip, 2x32, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinSocket_2.54mm +PinSocket_2x32_P2.54mm_Vertical +Through hole straight socket strip, 2x32, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinSocket_2.54mm +PinSocket_2x32_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x32 2.54mm double row +0 +64 +64 +Connector_PinSocket_2.54mm +PinSocket_2x33_P2.54mm_Horizontal +Through hole angled socket strip, 2x33, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinSocket_2.54mm +PinSocket_2x33_P2.54mm_Vertical +Through hole straight socket strip, 2x33, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinSocket_2.54mm +PinSocket_2x33_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x33 2.54mm double row +0 +66 +66 +Connector_PinSocket_2.54mm +PinSocket_2x34_P2.54mm_Horizontal +Through hole angled socket strip, 2x34, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinSocket_2.54mm +PinSocket_2x34_P2.54mm_Vertical +Through hole straight socket strip, 2x34, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinSocket_2.54mm +PinSocket_2x34_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x34 2.54mm double row +0 +68 +68 +Connector_PinSocket_2.54mm +PinSocket_2x35_P2.54mm_Horizontal +Through hole angled socket strip, 2x35, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinSocket_2.54mm +PinSocket_2x35_P2.54mm_Vertical +Through hole straight socket strip, 2x35, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinSocket_2.54mm +PinSocket_2x35_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x35 2.54mm double row +0 +70 +70 +Connector_PinSocket_2.54mm +PinSocket_2x36_P2.54mm_Horizontal +Through hole angled socket strip, 2x36, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinSocket_2.54mm +PinSocket_2x36_P2.54mm_Vertical +Through hole straight socket strip, 2x36, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinSocket_2.54mm +PinSocket_2x36_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x36 2.54mm double row +0 +72 +72 +Connector_PinSocket_2.54mm +PinSocket_2x37_P2.54mm_Horizontal +Through hole angled socket strip, 2x37, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinSocket_2.54mm +PinSocket_2x37_P2.54mm_Vertical +Through hole straight socket strip, 2x37, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinSocket_2.54mm +PinSocket_2x37_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x37 2.54mm double row +0 +74 +74 +Connector_PinSocket_2.54mm +PinSocket_2x38_P2.54mm_Horizontal +Through hole angled socket strip, 2x38, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinSocket_2.54mm +PinSocket_2x38_P2.54mm_Vertical +Through hole straight socket strip, 2x38, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinSocket_2.54mm +PinSocket_2x38_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x38 2.54mm double row +0 +76 +76 +Connector_PinSocket_2.54mm +PinSocket_2x39_P2.54mm_Horizontal +Through hole angled socket strip, 2x39, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinSocket_2.54mm +PinSocket_2x39_P2.54mm_Vertical +Through hole straight socket strip, 2x39, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinSocket_2.54mm +PinSocket_2x39_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x39 2.54mm double row +0 +78 +78 +Connector_PinSocket_2.54mm +PinSocket_2x40_P2.54mm_Horizontal +Through hole angled socket strip, 2x40, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinSocket_2.54mm +PinSocket_2x40_P2.54mm_Vertical +Through hole straight socket strip, 2x40, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinSocket_2.54mm +PinSocket_2x40_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x40 2.54mm double row +0 +80 +80 +Connector_RJ +RJ12_Amphenol_54601 +RJ12 connector https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/c-bmj-0082.pdf +RJ12 connector +0 +6 +6 +Connector_RJ +RJ45_Amphenol_54602-x08_Horizontal +8 Pol Shallow Latch Connector, Modjack, RJ45 (https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/c-bmj-0102.pdf) +RJ45 +0 +8 +8 +Connector_RJ +RJ45_Amphenol_RJHSE538X +Shielded, 2 LED, https://www.amphenolcanada.com/ProductSearch/drawings/AC/RJHSE538X.pdf +RJ45 8p8c ethernet cat5 +0 +14 +13 +Connector_RJ +RJ45_Amphenol_RJHSE5380 +Shielded, https://www.amphenolcanada.com/ProductSearch/drawings/AC/RJHSE538X.pdf +RJ45 8p8c ethernet cat5 +0 +10 +9 +Connector_RJ +RJ45_Amphenol_RJHSE5380-08 +Shielded, https://www.amphenolcanada.com/ProductSearch/drawings/AC/RJHSE538X08.pdf +RJ45 8p8c ethernet cat5 +0 +68 +65 +Connector_RJ +RJ45_Amphenol_RJMG1BD3B8K1ANR +1 Port RJ45 Magjack Connector Through Hole 10/100 Base-T, AutoMDIX, https://www.amphenolcanada.com/ProductSearch/Drawings/AC/RJMG1BD3B8K1ANR.PDF +RJ45 Magjack +0 +14 +13 +Connector_RJ +RJ45_BEL_SS74301-00x_Vertical +https://belfuse.com/resources/drawings/stewartconnector/dr-stw-ss-74301-001-ss-74301-002-ss-74301-005.pdf +RJ45 Vertical Shield LED Green Yellow +0 +14 +13 +Connector_RJ +RJ45_Cetus_J1B1211CCD_Horizontal +1 Port RJ45 Magjack Connector Through Hole 10/100 Base-T, Cetus, used and distributed by WIZnet (https://wizwiki.net/wiki/lib/exe/fetch.php?media=products:wiz550web:wiz550webds_kr:j1b1211ccd.pdf) +RJ45 Magjack +0 +14 +13 +Connector_RJ +RJ45_Hanrun_HR911105A +http://www.kosmodrom.com.ua/pdf/HR911105A.pdf +RJ45 Magjack +0 +14 +13 +Connector_RJ +RJ45_OST_PJ012-8P8CX_Vertical +RJ45 vertical connector http://www.on-shore.com/wp-content/uploads/2015/09/PJ012-8P8CX.pdf +RJ45 PJ012 +0 +8 +8 +Connector_RJ +RJ45_Plug_Metz_AJP92A8813 +plug, ethernet, 8P8C, RJ45 Plug +AJP92A8813 8P8C RJ45 ethernet plug +0 +8 +8 +Connector_RJ +RJ45_Wuerth_7499010121A_Horizontal +10/100Base-TX RJ45 ethernet magnetic transformer connector horizontal https://katalog.we-online.de/pbs/datasheet/7499010121A.pdf +RJ45 ethernet magnetic +0 +12 +12 +Connector_RJ +RJ45_Wuerth_7499151120_Horizontal +Wuerth 7499151120, LAN-Transformer WE-RJ45LAN 10/100/1000 BaseT, Dual Ethernet Jack (http://katalog.we-online.de/pbs/datasheet/7499151120.pdf) +ethernet lan connector +0 +32 +29 +Connector_Samtec +Samtec_FMC_ASP-134602-01_10x40_P1.27mm_Vertical +https://www.marutsu.co.jp/contents/shop/marutsu/ds/asp-134602-01.pdf +FMC HPC +0 +400 +400 +Connector_Samtec +Samtec_FMC_ASP-134604-01_4x40_Vertical +http://www.samtec.com/standards/vita.aspx +FMC LPC VITA +0 +162 +160 +Connector_Samtec +Samtec_LSHM-105-xx.x-x-DV-N_2x05_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-105-xx.x-x-DV-N, 5 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +10 +10 +Connector_Samtec +Samtec_LSHM-105-xx.x-x-DV-S_2x05-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-105-xx.x-x-DV-S, 5 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +12 +11 +Connector_Samtec +Samtec_LSHM-110-xx.x-x-DV-N_2x10_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-110-xx.x-x-DV-N, 10 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +20 +20 +Connector_Samtec +Samtec_LSHM-110-xx.x-x-DV-S_2x10-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-110-xx.x-x-DV-S, 10 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +22 +21 +Connector_Samtec +Samtec_LSHM-120-xx.x-x-DV-N_2x20_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-120-xx.x-x-DV-N, 20 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +40 +40 +Connector_Samtec +Samtec_LSHM-120-xx.x-x-DV-S_2x20-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-120-xx.x-x-DV-S, 20 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +42 +41 +Connector_Samtec +Samtec_LSHM-130-xx.x-x-DV-N_2x30_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-130-xx.x-x-DV-N, 30 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +60 +60 +Connector_Samtec +Samtec_LSHM-130-xx.x-x-DV-S_2x30-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-130-xx.x-x-DV-S, 30 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +62 +61 +Connector_Samtec +Samtec_LSHM-140-xx.x-x-DV-N_2x40_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-140-xx.x-x-DV-N, 40 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +80 +80 +Connector_Samtec +Samtec_LSHM-140-xx.x-x-DV-S_2x40-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-140-xx.x-x-DV-S, 40 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +82 +81 +Connector_Samtec +Samtec_LSHM-150-xx.x-x-DV-N_2x50_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-150-xx.x-x-DV-N, 50 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +100 +100 +Connector_Samtec +Samtec_LSHM-150-xx.x-x-DV-S_2x50-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-150-xx.x-x-DV-S, 50 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +102 +101 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV-BE-LC_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV-BE-LC, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV-BE_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV-BE, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV-LC_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV-LC, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV-BE-LC_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV-BE-LC, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV-BE_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV-BE, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV-LC_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV-LC, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-A_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-A, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-BE-A_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-BE-A, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-BE-LC_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-BE-LC, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-BE_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-BE, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-LC_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-LC, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-A_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-A, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-BE-A_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-BE-A, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-BE-LC_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-BE-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-BE_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-BE, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-LC_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-A_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-A, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-BE-A_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE-A, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-BE-LC_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE-LC, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-BE_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-LC_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-LC, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-A_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-A, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-BE-A_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-BE-A, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-BE-LC_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-BE-LC, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-BE_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-BE, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-LC_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-LC, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-A_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-A, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-BE-A_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-BE-A, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-BE-LC_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-BE-LC, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-BE_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-BE, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-LC_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-LC, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-A_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-A, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-BE-A_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-BE-A, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-BE-LC_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-BE-LC, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-BE_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-BE, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-LC_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-LC, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-A_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-A, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-BE-A_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-BE-A, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-BE-LC_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-BE-LC, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-BE_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-BE, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-LC_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-LC, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-A_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-A, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-BE-A_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-BE-A, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-BE-LC_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-BE-LC, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-BE_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-BE, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-LC_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-LC, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-A_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-A, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-BE-A_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-BE-A, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-BE-LC_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-BE-LC, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-BE_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-BE, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-LC_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-LC, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-A_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-A, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-BE-A_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-BE-A, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-BE-LC_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-BE-LC, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-BE_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-BE, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-LC_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-LC, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-A_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-A, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-BE-A_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-BE-A, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-BE-LC_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-BE-LC, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-BE_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-BE, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-LC_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-LC, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-A_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-A, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-BE-A_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-BE-A, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-BE-LC_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-BE-LC, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-BE_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-BE, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-LC_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-LC, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-A_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-A, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-BE-A_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-BE-A, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-BE-LC_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-BE-LC, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-BE_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-BE, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-LC_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-LC, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-A_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-A, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-BE-A_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-BE-A, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-BE-LC_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-BE-LC, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-BE_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-BE, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-LC_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-LC, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-A_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-A, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-BE-A_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-BE-A, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-BE-LC_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-BE-LC, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-BE_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-BE, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-LC_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-LC, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-A_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-A, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-BE-A_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-BE-A, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-BE-LC_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-BE-LC, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-BE_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-BE, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-LC_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-LC, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-A_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-A, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-BE-A_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-BE-A, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-BE-LC_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-BE-LC, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-BE_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-BE, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-LC_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-LC, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-A_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-A, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-BE-A_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-BE-A, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-BE-LC_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-BE-LC, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-BE_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-BE, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-LC_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-LC, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-A_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-A, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-BE-A_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-BE-A, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-BE-LC_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-BE-LC, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-BE_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-BE, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-LC_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-LC, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-A_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-A, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-BE-A_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-BE-A, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-BE-LC_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-BE-LC, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-BE_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-BE, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-LC_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-LC, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-A_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-A, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-BE-A_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-BE-A, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-BE-LC_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-BE-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-BE_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-BE, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-LC_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-A_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-A, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-BE-A_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-BE-A, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-BE-LC_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-BE-LC, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-BE_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-BE, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-LC_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-LC, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-A_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-A, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-BE-A_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-BE-A, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-BE-LC_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-BE-LC, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-BE_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-BE, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-LC_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-LC, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-A_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-A, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-BE-A_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-BE-A, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-BE-LC_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-BE-LC, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-BE_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-BE, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-LC_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-LC, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-A_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-A, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-BE-A_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-BE-A, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-BE-LC_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-BE-LC, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-BE_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-BE, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-LC_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-LC, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-A_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-A, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-BE-A_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-BE-A, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-BE-LC_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-BE-LC, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-BE_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-BE, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-LC_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-LC, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-A_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-A, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-BE-A_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-BE-A, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-BE-LC_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-BE-LC, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-BE_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-BE, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-LC_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-LC, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-A_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-A, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-BE-A_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-BE-A, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-BE-LC_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-BE-LC, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-BE_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-BE, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-LC_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-LC, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-A_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-A, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-BE-A_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-BE-A, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-BE-LC_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-BE-LC, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-BE_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-BE, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-LC_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-LC, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-A_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-A, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-BE-A_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-BE-A, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-BE-LC_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-BE-LC, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-BE_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-BE, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-LC_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-LC, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-A_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-A, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-BE-A_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-BE-A, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-BE-LC_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-BE-LC, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-BE_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-BE, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-LC_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-LC, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-A_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-A, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-BE-A_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-BE-A, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-BE-LC_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-BE-LC, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-BE_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-BE, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-LC_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-LC, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-A_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-A, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-BE-A_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-BE-A, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-BE-LC_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-BE-LC, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-BE_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-BE, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-LC_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-LC, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-A_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-A, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-BE-A_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-BE-A, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-BE-LC_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-BE-LC, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-BE_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-BE, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-LC_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-LC, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-A_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-A, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-BE-A_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-BE-A, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-BE-LC_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-BE-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-BE_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-BE, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-LC_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-A_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-A, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-BE-A_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-BE-A, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-BE-LC_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-BE-LC, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-BE_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-BE, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-LC_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-LC, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-A_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-A, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-BE-A_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-BE-A, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-BE-LC_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-BE-LC, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-BE_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-BE, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-LC_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-LC, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-A_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-A, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-BE-A_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-BE-A, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-BE-LC_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-BE-LC, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-BE_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-BE, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-LC_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-LC, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-A_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-A, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-BE-A_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-BE-A, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-BE-LC_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-BE-LC, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-BE_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-BE, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-LC_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-LC, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-A_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-A, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-BE-A_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-BE-A, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-BE-LC_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-BE-LC, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-BE_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-BE, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-LC_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-LC, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-A_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-A, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-BE-A_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-BE-A, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-BE-LC_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-BE-LC, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-BE_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-BE, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-LC_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-LC, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-A_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-A, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-BE-A_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-BE-A, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-BE-LC_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-BE-LC, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-BE_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-BE, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-LC_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-LC, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-A_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-A, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-BE-A_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-BE-A, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-BE-LC_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-BE-LC, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-BE_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-BE, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-LC_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-LC, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-A_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-A, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-BE-A_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-BE-A, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-BE-LC_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-BE-LC, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-BE_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-BE, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-LC_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-LC, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-A_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-A, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-BE-A_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-BE-A, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-BE-LC_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-BE-LC, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-BE_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-BE, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-LC_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-LC, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-A_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-A, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-BE-A_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-BE-A, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-BE-LC_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-BE-LC, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-BE_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-BE, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-LC_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-LC, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-A_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-A, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-BE-A_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-BE-A, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-BE-LC_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-BE-LC, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-BE_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-BE, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-LC_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-LC, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_THT +Samtec_HLE-104-02-xx-DV-PE-LC_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xx-DV-PE-LC, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_THT +Samtec_HLE-104-02-xx-DV-PE_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xx-DV-PE (compatible alternatives: HLE-104-02-xx-DV-PE-BE), 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_THT +Samtec_HLE-104-02-xx-DV-TE_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xx-DV-TE, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_THT +Samtec_HLE-105-02-xx-DV-PE-LC_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xx-DV-PE-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_THT +Samtec_HLE-105-02-xx-DV-PE_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xx-DV-PE (compatible alternatives: HLE-105-02-xx-DV-PE-BE), 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_THT +Samtec_HLE-105-02-xx-DV-TE_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xx-DV-TE, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_THT +Samtec_HLE-106-02-xx-DV-PE-LC_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xx-DV-PE-LC, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_THT +Samtec_HLE-106-02-xx-DV-PE_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xx-DV-PE (compatible alternatives: HLE-106-02-xx-DV-PE-BE), 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_THT +Samtec_HLE-106-02-xx-DV-TE_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xx-DV-TE, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_THT +Samtec_HLE-107-02-xx-DV-PE-LC_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xx-DV-PE-LC, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_THT +Samtec_HLE-107-02-xx-DV-PE_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xx-DV-PE (compatible alternatives: HLE-107-02-xx-DV-PE-BE), 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_THT +Samtec_HLE-107-02-xx-DV-TE_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xx-DV-TE, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_THT +Samtec_HLE-108-02-xx-DV-PE-LC_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xx-DV-PE-LC, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_THT +Samtec_HLE-108-02-xx-DV-PE_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xx-DV-PE (compatible alternatives: HLE-108-02-xx-DV-PE-BE), 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_THT +Samtec_HLE-108-02-xx-DV-TE_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xx-DV-TE, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_THT +Samtec_HLE-109-02-xx-DV-PE-LC_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-PE-LC, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_THT +Samtec_HLE-109-02-xx-DV-PE_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-PE (compatible alternatives: HLE-109-02-xx-DV-PE-BE), 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_THT +Samtec_HLE-109-02-xx-DV-TE_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-TE, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_THT +Samtec_HLE-110-02-xx-DV-PE-LC_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xx-DV-PE-LC, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_THT +Samtec_HLE-110-02-xx-DV-PE_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xx-DV-PE (compatible alternatives: HLE-110-02-xx-DV-PE-BE), 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_THT +Samtec_HLE-110-02-xx-DV-TE_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xx-DV-TE, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_THT +Samtec_HLE-111-02-xx-DV-PE-LC_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xx-DV-PE-LC, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_THT +Samtec_HLE-111-02-xx-DV-PE_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xx-DV-PE (compatible alternatives: HLE-111-02-xx-DV-PE-BE), 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_THT +Samtec_HLE-111-02-xx-DV-TE_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xx-DV-TE, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_THT +Samtec_HLE-112-02-xx-DV-PE-LC_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xx-DV-PE-LC, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_THT +Samtec_HLE-112-02-xx-DV-PE_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xx-DV-PE (compatible alternatives: HLE-112-02-xx-DV-PE-BE), 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_THT +Samtec_HLE-112-02-xx-DV-TE_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xx-DV-TE, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_THT +Samtec_HLE-113-02-xx-DV-PE-LC_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xx-DV-PE-LC, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_THT +Samtec_HLE-113-02-xx-DV-PE_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xx-DV-PE (compatible alternatives: HLE-113-02-xx-DV-PE-BE), 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_THT +Samtec_HLE-113-02-xx-DV-TE_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xx-DV-TE, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_THT +Samtec_HLE-114-02-xx-DV-PE-LC_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xx-DV-PE-LC, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_THT +Samtec_HLE-114-02-xx-DV-PE_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xx-DV-PE (compatible alternatives: HLE-114-02-xx-DV-PE-BE), 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_THT +Samtec_HLE-114-02-xx-DV-TE_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xx-DV-TE, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_THT +Samtec_HLE-115-02-xx-DV-PE-LC_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xx-DV-PE-LC, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_THT +Samtec_HLE-115-02-xx-DV-PE_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xx-DV-PE (compatible alternatives: HLE-115-02-xx-DV-PE-BE), 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_THT +Samtec_HLE-115-02-xx-DV-TE_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xx-DV-TE, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_THT +Samtec_HLE-116-02-xx-DV-PE-LC_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xx-DV-PE-LC, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_THT +Samtec_HLE-116-02-xx-DV-PE_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xx-DV-PE (compatible alternatives: HLE-116-02-xx-DV-PE-BE), 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_THT +Samtec_HLE-116-02-xx-DV-TE_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xx-DV-TE, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_THT +Samtec_HLE-117-02-xx-DV-PE-LC_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xx-DV-PE-LC, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_THT +Samtec_HLE-117-02-xx-DV-PE_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xx-DV-PE (compatible alternatives: HLE-117-02-xx-DV-PE-BE), 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_THT +Samtec_HLE-117-02-xx-DV-TE_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xx-DV-TE, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_THT +Samtec_HLE-118-02-xx-DV-PE-LC_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xx-DV-PE-LC, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_THT +Samtec_HLE-118-02-xx-DV-PE_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xx-DV-PE (compatible alternatives: HLE-118-02-xx-DV-PE-BE), 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_THT +Samtec_HLE-118-02-xx-DV-TE_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xx-DV-TE, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_THT +Samtec_HLE-119-02-xx-DV-PE-LC_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xx-DV-PE-LC, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_THT +Samtec_HLE-119-02-xx-DV-PE_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xx-DV-PE (compatible alternatives: HLE-119-02-xx-DV-PE-BE), 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_THT +Samtec_HLE-119-02-xx-DV-TE_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xx-DV-TE, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_THT +Samtec_HLE-120-02-xx-DV-PE-LC_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xx-DV-PE-LC, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_THT +Samtec_HLE-120-02-xx-DV-PE_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xx-DV-PE (compatible alternatives: HLE-120-02-xx-DV-PE-BE), 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_THT +Samtec_HLE-120-02-xx-DV-TE_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xx-DV-TE, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_THT +Samtec_HLE-121-02-xx-DV-PE-LC_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xx-DV-PE-LC, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_THT +Samtec_HLE-121-02-xx-DV-PE_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xx-DV-PE (compatible alternatives: HLE-121-02-xx-DV-PE-BE), 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_THT +Samtec_HLE-121-02-xx-DV-TE_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xx-DV-TE, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_THT +Samtec_HLE-122-02-xx-DV-PE-LC_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xx-DV-PE-LC, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_THT +Samtec_HLE-122-02-xx-DV-PE_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xx-DV-PE (compatible alternatives: HLE-122-02-xx-DV-PE-BE), 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_THT +Samtec_HLE-122-02-xx-DV-TE_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xx-DV-TE, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_THT +Samtec_HLE-123-02-xx-DV-PE-LC_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xx-DV-PE-LC, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_THT +Samtec_HLE-123-02-xx-DV-PE_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xx-DV-PE (compatible alternatives: HLE-123-02-xx-DV-PE-BE), 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_THT +Samtec_HLE-123-02-xx-DV-TE_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xx-DV-TE, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_THT +Samtec_HLE-124-02-xx-DV-PE-LC_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xx-DV-PE-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_THT +Samtec_HLE-124-02-xx-DV-PE_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xx-DV-PE (compatible alternatives: HLE-124-02-xx-DV-PE-BE), 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_THT +Samtec_HLE-124-02-xx-DV-TE_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xx-DV-TE, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_THT +Samtec_HLE-125-02-xx-DV-PE-LC_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xx-DV-PE-LC, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_THT +Samtec_HLE-125-02-xx-DV-PE_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xx-DV-PE (compatible alternatives: HLE-125-02-xx-DV-PE-BE), 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_THT +Samtec_HLE-125-02-xx-DV-TE_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xx-DV-TE, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_THT +Samtec_HLE-126-02-xx-DV-PE-LC_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xx-DV-PE-LC, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_THT +Samtec_HLE-126-02-xx-DV-PE_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xx-DV-PE (compatible alternatives: HLE-126-02-xx-DV-PE-BE), 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_THT +Samtec_HLE-126-02-xx-DV-TE_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xx-DV-TE, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_THT +Samtec_HLE-127-02-xx-DV-PE-LC_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xx-DV-PE-LC, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_THT +Samtec_HLE-127-02-xx-DV-PE_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xx-DV-PE (compatible alternatives: HLE-127-02-xx-DV-PE-BE), 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_THT +Samtec_HLE-127-02-xx-DV-TE_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xx-DV-TE, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_THT +Samtec_HLE-128-02-xx-DV-PE-LC_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xx-DV-PE-LC, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_THT +Samtec_HLE-128-02-xx-DV-PE_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xx-DV-PE (compatible alternatives: HLE-128-02-xx-DV-PE-BE), 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_THT +Samtec_HLE-128-02-xx-DV-TE_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xx-DV-TE, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_THT +Samtec_HLE-129-02-xx-DV-PE-LC_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xx-DV-PE-LC, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_THT +Samtec_HLE-129-02-xx-DV-PE_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xx-DV-PE (compatible alternatives: HLE-129-02-xx-DV-PE-BE), 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_THT +Samtec_HLE-129-02-xx-DV-TE_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xx-DV-TE, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_THT +Samtec_HLE-130-02-xx-DV-PE-LC_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xx-DV-PE-LC, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_THT +Samtec_HLE-130-02-xx-DV-PE_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xx-DV-PE (compatible alternatives: HLE-130-02-xx-DV-PE-BE), 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_THT +Samtec_HLE-130-02-xx-DV-TE_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xx-DV-TE, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_THT +Samtec_HLE-131-02-xx-DV-PE-LC_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xx-DV-PE-LC, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_THT +Samtec_HLE-131-02-xx-DV-PE_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xx-DV-PE (compatible alternatives: HLE-131-02-xx-DV-PE-BE), 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_THT +Samtec_HLE-131-02-xx-DV-TE_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xx-DV-TE, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_THT +Samtec_HLE-132-02-xx-DV-PE-LC_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xx-DV-PE-LC, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_THT +Samtec_HLE-132-02-xx-DV-PE_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xx-DV-PE (compatible alternatives: HLE-132-02-xx-DV-PE-BE), 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_THT +Samtec_HLE-132-02-xx-DV-TE_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xx-DV-TE, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_THT +Samtec_HLE-133-02-xx-DV-PE-LC_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xx-DV-PE-LC, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_THT +Samtec_HLE-133-02-xx-DV-PE_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xx-DV-PE (compatible alternatives: HLE-133-02-xx-DV-PE-BE), 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_THT +Samtec_HLE-133-02-xx-DV-TE_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xx-DV-TE, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_THT +Samtec_HLE-134-02-xx-DV-PE-LC_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xx-DV-PE-LC, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_THT +Samtec_HLE-134-02-xx-DV-PE_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xx-DV-PE (compatible alternatives: HLE-134-02-xx-DV-PE-BE), 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_THT +Samtec_HLE-134-02-xx-DV-TE_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xx-DV-TE, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_THT +Samtec_HLE-135-02-xx-DV-PE-LC_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xx-DV-PE-LC, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_THT +Samtec_HLE-135-02-xx-DV-PE_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xx-DV-PE (compatible alternatives: HLE-135-02-xx-DV-PE-BE), 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_THT +Samtec_HLE-135-02-xx-DV-TE_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xx-DV-TE, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_THT +Samtec_HLE-136-02-xx-DV-PE-LC_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xx-DV-PE-LC, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_THT +Samtec_HLE-136-02-xx-DV-PE_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xx-DV-PE (compatible alternatives: HLE-136-02-xx-DV-PE-BE), 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_THT +Samtec_HLE-136-02-xx-DV-TE_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xx-DV-TE, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_THT +Samtec_HLE-137-02-xx-DV-PE-LC_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xx-DV-PE-LC, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_THT +Samtec_HLE-137-02-xx-DV-PE_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xx-DV-PE (compatible alternatives: HLE-137-02-xx-DV-PE-BE), 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_THT +Samtec_HLE-137-02-xx-DV-TE_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xx-DV-TE, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_THT +Samtec_HLE-138-02-xx-DV-PE-LC_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xx-DV-PE-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_THT +Samtec_HLE-138-02-xx-DV-PE_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xx-DV-PE (compatible alternatives: HLE-138-02-xx-DV-PE-BE), 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_THT +Samtec_HLE-138-02-xx-DV-TE_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xx-DV-TE, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_THT +Samtec_HLE-139-02-xx-DV-PE-LC_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xx-DV-PE-LC, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_THT +Samtec_HLE-139-02-xx-DV-PE_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xx-DV-PE (compatible alternatives: HLE-139-02-xx-DV-PE-BE), 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_THT +Samtec_HLE-139-02-xx-DV-TE_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xx-DV-TE, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_THT +Samtec_HLE-140-02-xx-DV-PE-LC_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xx-DV-PE-LC, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_THT +Samtec_HLE-140-02-xx-DV-PE_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xx-DV-PE (compatible alternatives: HLE-140-02-xx-DV-PE-BE), 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_THT +Samtec_HLE-140-02-xx-DV-TE_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xx-DV-TE, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_THT +Samtec_HLE-141-02-xx-DV-PE-LC_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xx-DV-PE-LC, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_THT +Samtec_HLE-141-02-xx-DV-PE_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xx-DV-PE (compatible alternatives: HLE-141-02-xx-DV-PE-BE), 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_THT +Samtec_HLE-141-02-xx-DV-TE_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xx-DV-TE, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_THT +Samtec_HLE-142-02-xx-DV-PE-LC_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xx-DV-PE-LC, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_THT +Samtec_HLE-142-02-xx-DV-PE_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xx-DV-PE (compatible alternatives: HLE-142-02-xx-DV-PE-BE), 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_THT +Samtec_HLE-142-02-xx-DV-TE_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xx-DV-TE, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_THT +Samtec_HLE-143-02-xx-DV-PE-LC_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xx-DV-PE-LC, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_THT +Samtec_HLE-143-02-xx-DV-PE_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xx-DV-PE (compatible alternatives: HLE-143-02-xx-DV-PE-BE), 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_THT +Samtec_HLE-143-02-xx-DV-TE_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xx-DV-TE, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_THT +Samtec_HLE-144-02-xx-DV-PE-LC_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xx-DV-PE-LC, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_THT +Samtec_HLE-144-02-xx-DV-PE_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xx-DV-PE (compatible alternatives: HLE-144-02-xx-DV-PE-BE), 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_THT +Samtec_HLE-144-02-xx-DV-TE_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xx-DV-TE, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_THT +Samtec_HLE-145-02-xx-DV-PE-LC_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xx-DV-PE-LC, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_THT +Samtec_HLE-145-02-xx-DV-PE_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xx-DV-PE (compatible alternatives: HLE-145-02-xx-DV-PE-BE), 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_THT +Samtec_HLE-145-02-xx-DV-TE_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xx-DV-TE, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_THT +Samtec_HLE-146-02-xx-DV-PE-LC_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xx-DV-PE-LC, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_THT +Samtec_HLE-146-02-xx-DV-PE_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xx-DV-PE (compatible alternatives: HLE-146-02-xx-DV-PE-BE), 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_THT +Samtec_HLE-146-02-xx-DV-TE_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xx-DV-TE, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_THT +Samtec_HLE-147-02-xx-DV-PE-LC_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xx-DV-PE-LC, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_THT +Samtec_HLE-147-02-xx-DV-PE_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xx-DV-PE (compatible alternatives: HLE-147-02-xx-DV-PE-BE), 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_THT +Samtec_HLE-147-02-xx-DV-TE_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xx-DV-TE, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_THT +Samtec_HLE-148-02-xx-DV-PE-LC_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xx-DV-PE-LC, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_THT +Samtec_HLE-148-02-xx-DV-PE_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xx-DV-PE (compatible alternatives: HLE-148-02-xx-DV-PE-BE), 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_THT +Samtec_HLE-148-02-xx-DV-TE_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xx-DV-TE, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_THT +Samtec_HLE-149-02-xx-DV-PE-LC_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xx-DV-PE-LC, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_THT +Samtec_HLE-149-02-xx-DV-PE_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xx-DV-PE (compatible alternatives: HLE-149-02-xx-DV-PE-BE), 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_THT +Samtec_HLE-149-02-xx-DV-TE_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xx-DV-TE, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_THT +Samtec_HLE-150-02-xx-DV-PE-LC_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xx-DV-PE-LC, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_THT +Samtec_HLE-150-02-xx-DV-PE_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xx-DV-PE (compatible alternatives: HLE-150-02-xx-DV-PE-BE), 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_THT +Samtec_HLE-150-02-xx-DV-TE_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xx-DV-TE, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_SATA_SAS +SAS-mini_TEConnectivity_1888174_Vertical +36pin mini SAS connector, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1888174&DocType=Customer+Drawing&DocLang=English +SAS mini connector +0 +44 +44 +Connector_SATA_SAS +SATA_Amphenol_10029364-001LF_Horizontal +https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10029364.pdf +SATA +0 +24 +23 +Connector_TE-Connectivity +TE_AMPSEAL_1-776087-x_3Rows_23_P0.4mm_Horizontal +Connector +TE 776087 +0 +23 +23 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770182-x_3x03_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770182-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +9 +9 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770186-x_3x04_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770186-x, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +12 +12 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770190-x_3x05_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770190-x, 5 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +15 +15 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770621-x_2x06_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770621-x, 6 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +12 +12 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770858-x_2x05_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770858-x, 5 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +10 +10 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770866-x_1x02_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770866-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +2 +2 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770870-x_1x03_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770870-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +3 +3 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770874-x_2x02_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770874-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +4 +4 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770875-x_2x03_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770875-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +6 +6 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770966-x_1x02_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770966-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +2 +2 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770967-x_1x03_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770967-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +3 +3 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770968-x_2x02_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770968-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +4 +4 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770969-x_2x03_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770969-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +6 +6 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770970-x_2x04_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770970-x, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +8 +8 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770971-x_2x05_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770971-x, 5 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +10 +10 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770972-x_2x06_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770972-x, 6 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +12 +12 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770973-x_2x07_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770973-x, 7 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +14 +14 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770974-x_2x08_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770974-x, 8 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +16 +16 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794067-x_2x07_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794067-x, 7 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +14 +14 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794068-x_2x08_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794068-x, 8 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +16 +16 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794069-x_2x09_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794069-x, 9 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +18 +18 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794070-x_2x10_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794070-x, 10 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +20 +20 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794071-x_2x11_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794071-x, 11 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +22 +22 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794072-x_2x12_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794072-x, 12 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +24 +24 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794073-x_2x04_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794073-x, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +8 +8 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794105-x_2x09_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794105-x, 9 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +18 +18 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794106-x_2x10_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794106-x, 10 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +20 +20 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794107-x_2x11_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794107-x, 11 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +22 +22 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794108-x_2x12_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794108-x, 12 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +24 +24 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794374-x_1x01_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794374-x, 1 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +1 +1 +Connector_USB +USB3_A_Molex_48393-001 +USB 3.0, type A, right angle (http://www.molex.com/pdm_docs/sd/483930003_sd.pdf) +USB 3.0 type A right angle +0 +13 +10 +Connector_USB +USB3_A_Plug_Wuerth_692112030100_Horizontal +USB type A Plug, Horizontal, http://katalog.we-online.de/em/datasheet/692112030100.pdf +usb A plug horizontal +0 +11 +10 +Connector_USB +USB_A_CNCTech_1001-011-01101_Horizontal +http://cnctech.us/pdfs/1001-011-01101.pdf +USB-A +0 +6 +5 +Connector_USB +USB_A_Wuerth_61400826021_Horizontal_Stacked +Stacked USB A connector http://katalog.we-online.de/em/datasheet/61400826021.pdf +Wuerth stacked USB_A +0 +12 +9 +Connector_USB +USB_B_Amphenol_MUSB-D511_Vertical_Rugged +A,phenol MUSB_D511, USB B female connector, straight, rugged, https://www.amphenolcanada.com/ProductSearch/drawings/AC/MUSBD511XX.pdf +USB_B_MUSB_Straight female connector straight rugged MUSB D511 +0 +6 +5 +Connector_USB +USB_B_OST_USB-B1HSxx_Horizontal +USB B receptacle, Horizontal, through-hole, http://www.on-shore.com/wp-content/uploads/2015/09/usb-b1hsxx.pdf +USB-B receptacle horizontal through-hole +0 +6 +5 +Connector_USB +USB_B_TE_5787834_Vertical +http://www.mouser.com/ds/2/418/NG_CD_5787834_A4-669110.pdf +USB_B USB B vertical female connector +0 +6 +5 +Connector_USB +USB_C_Plug_Molex_105444 +Universal Serial Bus (USB) Shielded I/O Plug, Type C, Right Angle, Surface Mount, http://www.molex.com/pdm_docs/sd/1054440001_sd.pdf +USB Type-C Plug Edge Mount +0 +24 +23 +Connector_USB +USB_C_Receptacle_Amphenol_12401548E4-2A +USB TYPE C, RA RCPT PCB, Hybrid, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401548E4%7e2A +USB C Type-C Receptacle Hybrid +0 +28 +25 +Connector_USB +USB_C_Receptacle_Amphenol_12401548E4-2A_CircularHoles +USB TYPE C, RA RCPT PCB, Hybrid, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401548E4%7e2A +USB C Type-C Receptacle Hybrid +0 +28 +25 +Connector_USB +USB_C_Receptacle_Amphenol_12401610E4-2A +USB TYPE C, RA RCPT PCB, SMT, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401610E4%7e2A +USB C Type-C Receptacle SMD +0 +28 +25 +Connector_USB +USB_C_Receptacle_Amphenol_12401610E4-2A_CircularHoles +USB TYPE C, RA RCPT PCB, SMT, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401610E4%7e2A +USB C Type-C Receptacle SMD +0 +28 +25 +Connector_USB +USB_C_Receptacle_GCT_USB4085 +USB 2.0 Type C Receptacle, https://gct.co/Files/Drawings/USB4085.pdf +USB Type-C Receptacle Through-hole Right angle +0 +20 +17 +Connector_USB +USB_C_Receptacle_JAE_DX07S024WJ1R350 +http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ117219.pdf +USB C Type-C Receptacle SMD +0 +30 +25 +Connector_USB +USB_C_Receptacle_JAE_DX07S024WJ3R400 +USB TYPE C, VERT RCPT PCB, SMT, http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ117928.pdf +USB C Type-C Receptacle SMD +0 +28 +25 +Connector_USB +USB_Micro-B_Amphenol_10103594-0001LF_Horizontal +Micro USB Type B 10103594-0001LF, http://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10103594.pdf +USB USB_B USB_micro USB_OTG +0 +17 +6 +Connector_USB +USB_Micro-B_GCT_USB3076-30-A +GCT Micro USB https://gct.co/files/drawings/usb3076.pdf +Micro-USB SMD Typ-B GCT +0 +11 +6 +Connector_USB +USB_Micro-B_Molex-105017-0001 +http://www.molex.com/pdm_docs/sd/1050170001_sd.pdf +Micro-USB SMD Typ-B +0 +13 +6 +Connector_USB +USB_Micro-B_Molex-105133-0001 +Molex Vertical Micro USB Typ-B (http://www.molex.com/pdm_docs/sd/1051330001_sd.pdf) +Micro-USB SMD Typ-B Vertical +0 +8 +6 +Connector_USB +USB_Micro-B_Molex-105133-0031 +Molex Vertical Micro USB Typ-B (http://www.molex.com/pdm_docs/sd/1051330031_sd.pdf) +Micro-USB SMD Typ-B Vertical +0 +8 +6 +Connector_USB +USB_Micro-B_Molex_47346-0001 +Micro USB B receptable with flange, bottom-mount, SMD, right-angle (http://www.molex.com/pdm_docs/sd/473460001_sd.pdf) +Micro B USB SMD +0 +11 +6 +Connector_USB +USB_Micro-B_Tensility_54-00023_Vertical +http://www.tensility.com/pdffiles/54-00023.pdf +usb mini receptacle vertical +0 +7 +6 +Connector_USB +USB_Micro-B_Tensility_54-00023_Vertical_CircularHoles +http://www.tensility.com/pdffiles/54-00023.pdf +usb mini receptacle vertical +0 +7 +6 +Connector_USB +USB_Micro-B_Wuerth_614105150721_Vertical +USB Micro-B receptacle, through-hole, vertical, http://katalog.we-online.de/em/datasheet/614105150721.pdf +usb micro receptacle vertical +0 +7 +6 +Connector_USB +USB_Micro-B_Wuerth_614105150721_Vertical_CircularHoles +USB Micro-B receptacle, through-hole, vertical, http://katalog.we-online.de/em/datasheet/614105150721.pdf +usb micro receptacle vertical +0 +7 +6 +Connector_USB +USB_Micro-B_Wuerth_629105150521 +USB Micro-B receptacle, http://www.mouser.com/ds/2/445/629105150521-469306.pdf +usb micro receptacle +0 +9 +6 +Connector_USB +USB_Micro-B_Wuerth_629105150521_CircularHoles +USB Micro-B receptacle, http://www.mouser.com/ds/2/445/629105150521-469306.pdf +usb micro receptacle +0 +9 +6 +Connector_USB +USB_Mini-B_AdamTech_MUSB-B5-S-VT-TSMT-1_SMD_Vertical +http://www.adam-tech.com/upload/MUSB-B5-S-VT-TSMT-1.pdf +USB Mini-B +0 +7 +6 +Connector_USB +USB_Mini-B_Lumberg_2486_01_Horizontal +USB Mini-B 5-pin SMD connector, http://downloads.lumberg.com/datenblaetter/en/2486_01.pdf +USB USB_B USB_Mini connector +0 +9 +6 +Connector_Wago +Wago_734-132_1x02_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-132 , 2 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +2 +2 +Connector_Wago +Wago_734-133_1x03_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-133 , 3 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +3 +3 +Connector_Wago +Wago_734-134_1x04_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-134 , 4 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +4 +4 +Connector_Wago +Wago_734-135_1x05_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-135 , 5 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +5 +5 +Connector_Wago +Wago_734-136_1x06_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-136 , 6 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +6 +6 +Connector_Wago +Wago_734-137_1x07_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-137 , 7 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +7 +7 +Connector_Wago +Wago_734-138_1x08_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-138 , 8 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +8 +8 +Connector_Wago +Wago_734-139_1x09_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-139 , 9 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +9 +9 +Connector_Wago +Wago_734-140_1x10_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-140 , 10 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +10 +10 +Connector_Wago +Wago_734-141_1x11_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-141 , 11 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +11 +11 +Connector_Wago +Wago_734-142_1x12_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-142 , 12 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +12 +12 +Connector_Wago +Wago_734-143_1x13_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-143 , 13 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +13 +13 +Connector_Wago +Wago_734-144_1x14_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-144 , 14 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +14 +14 +Connector_Wago +Wago_734-146_1x16_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-146 , 16 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +16 +16 +Connector_Wago +Wago_734-148_1x18_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-148 , 18 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +18 +18 +Connector_Wago +Wago_734-150_1x20_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-150 , 20 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +20 +20 +Connector_Wago +Wago_734-154_1x24_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-154 , 24 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +24 +24 +Connector_Wago +Wago_734-162_1x02_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-162 , 2 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +2 +2 +Connector_Wago +Wago_734-163_1x03_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-163 , 3 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +3 +3 +Connector_Wago +Wago_734-164_1x04_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-164 , 4 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +4 +4 +Connector_Wago +Wago_734-165_1x05_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-165 , 5 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +5 +5 +Connector_Wago +Wago_734-166_1x06_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-166 , 6 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +6 +6 +Connector_Wago +Wago_734-167_1x07_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-167 , 7 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +7 +7 +Connector_Wago +Wago_734-168_1x08_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-168 , 8 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +8 +8 +Connector_Wago +Wago_734-169_1x09_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-169 , 9 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +9 +9 +Connector_Wago +Wago_734-170_1x10_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-170 , 10 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +10 +10 +Connector_Wago +Wago_734-171_1x11_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-171 , 11 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +11 +11 +Connector_Wago +Wago_734-172_1x12_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-172 , 12 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +12 +12 +Connector_Wago +Wago_734-173_1x13_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-173 , 13 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +13 +13 +Connector_Wago +Wago_734-174_1x14_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-174 , 14 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +14 +14 +Connector_Wago +Wago_734-176_1x16_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-176 , 16 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +16 +16 +Connector_Wago +Wago_734-178_1x18_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-178 , 18 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +18 +18 +Connector_Wago +Wago_734-180_1x20_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-180 , 20 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +20 +20 +Connector_Wago +Wago_734-184_1x24_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-184 , 24 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +24 +24 +Connector_Wire +SolderWirePad_1x01_Drill0.8mm +Wire solder connection +connector +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_Drill1.2mm +Wire solder connection +connector +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_Drill1.5mm +Wire solder connection +connector +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_Drill1mm +Wire solder connection +connector +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_Drill2.5mm +Wire solder connection +connector +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_Drill2mm +Wire solder connection +connector +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_SMD_5x10mm +Wire Pad, Square, SMD Pad, 5mm x 10mm, +MesurementPoint Square SMDPad 5mmx10mm +0 +1 +1 +Connector_Wire +SolderWirePad_1x02_P3.81mm_Drill0.8mm +Wire solder connection +connector +0 +2 +2 +Connector_Wire +SolderWirePad_1x02_P3.81mm_Drill1.2mm +Wire solder connection +connector +0 +2 +2 +Connector_Wire +SolderWirePad_1x02_P3.81mm_Drill1mm +Wire solder connection +connector +0 +2 +2 +Connector_Wire +SolderWirePad_1x02_P5.08mm_Drill1.5mm +Wire solder connection +connector +0 +2 +2 +Connector_Wire +SolderWirePad_1x02_P7.62mm_Drill2.5mm +Wire solder connection +connector +0 +2 +2 +Connector_Wire +SolderWirePad_1x02_P7.62mm_Drill2mm +Wire solder connection +connector +0 +2 +2 +Connector_Wire +SolderWirePad_1x03_P3.81mm_Drill1.2mm +Wire solder connection +connector +0 +3 +3 +Connector_Wire +SolderWirePad_1x03_P3.175mm_Drill0.8mm +Wire solder connection +connector +0 +3 +3 +Connector_Wire +SolderWirePad_1x03_P3.175mm_Drill1mm +Wire solder connection +connector +0 +3 +3 +Connector_Wire +SolderWirePad_1x03_P4.445mm_Drill1.5mm +Wire solder connection +connector +0 +3 +3 +Connector_Wire +SolderWirePad_1x03_P5.715mm_Drill2mm +Wire solder connection +connector +0 +3 +3 +Connector_Wire +SolderWirePad_1x03_P7.62mm_Drill2.5mm +Wire solder connection +connector +0 +3 +3 +Connector_Wire +SolderWirePad_1x04_P3.81mm_Drill1.2mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_1x04_P3.81mm_Drill1mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_1x04_P3.175mm_Drill0.8mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_1x04_P5.08mm_Drill1.5mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_1x04_P6.35mm_Drill2mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_1x04_P7.62mm_Drill2.5mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_2x02_P2.54mm_Drill0.8mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_2x02_P3.81mm_Drill1.2mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_2x02_P3.81mm_Drill1mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_2x02_P5.08mm_Drill1.5mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_2x02_P6.35mm_Drill2mm +Wire solder connection +connector +0 +4 +4 +Connector_Wire +SolderWirePad_2x02_P7.62mm_Drill2.5mm +Wire solder connection +connector +0 +4 +4 +Converter_ACDC +Converter_ACDC_Hahn_HS-400xx_THT +ACDC-Converter, 3W, Hahn-HS-400xx, THT https://www.schukat.com/schukat/schukat_cms_de.nsf/index/FrameView?OpenDocument&art=HS40009&wg=M7942 +Hahn ACDC-Converter THT +0 +4 +4 +Converter_ACDC +Converter_ACDC_HiLink_HLK-PMxx +ACDC-Converter, 3W, HiLink, HLK-PMxx, THT, http://www.hlktech.net/product_detail.php?ProId=54 +ACDC-Converter 3W THT HiLink board mount module +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-02-xx_SMD +ACDC-Converter, 3W, Meanwell, IRM-02, SMD, https://www.meanwell.com/Upload/PDF/IRM-02/IRM-02-SPEC.PDF +ACDC-Converter 3W +0 +14 +14 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-02-xx_THT +ACDC-Converter, 2W, Meanwell, IRM-02, THT, https://www.meanwell.co.uk/media/productPDF/IRM-02-spec.pdf +ACDC-Converter 2W THT +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-03-xx_SMD +ACDC-Converter, 3W, Meanwell, IRM-03, SMD, http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-03 +ACDC-Converter 3W +0 +14 +14 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-03-xx_THT +ACDC-Converter, 2W, Meanwell, IRM-02, THT, https://www.meanwell.co.uk/media/productPDF/IRM-02-spec.pdf +ACDC-Converter 2W THT +0 +5 +5 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-05-xx_THT +http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-05 +ACDC-Converter 5W Meanwell IRM-05 +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-10-xx_THT +http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-10 +ACDC-Converter 10W Meanwell IRM-10 +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-20-xx_THT +ACDC-Converter, 20W, Meanwell, IRM-20, THT http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-20 +ACDC-Converter 20W Meanwell IRM-20 +0 +4 +4 +Converter_ACDC +Converter_ACDC_RECOM_RAC01-xxSGB_THT +https://www.recom-power.com/pdf/Powerline-AC-DC/RAC01-GB.pdf +recom power ac dc rac01xxgb rac01-05sgb rac01-12sgb +0 +4 +4 +Converter_ACDC +Converter_ACDC_RECOM_RAC04-xxSGx_THT +https://www.recom-power.com/pdf/Powerline-AC-DC/RAC04-GA.pdf +recom power ac dc +0 +5 +5 +Converter_ACDC +Converter_ACDC_RECOM_RAC05-xxSK_THT +https://www.recom-power.com/pdf/Powerline-AC-DC/RAC05-K.pdf +recom power ac dc +0 +5 +5 +Converter_ACDC +Converter_ACDC_TRACO_TMLM-04_THT +ACDC-Converter, TRACO, TMLM Series 04 https://www.tracopower.com/products/tmlm.pdf +ACDC-Converter TRACO TMLM Series 04 +0 +7 +7 +Converter_ACDC +Converter_ACDC_TRACO_TMLM-05_THT +ACDC-Converter, TRACO TMLM 05,https://www.tracopower.com/products/tmlm.pdf +ACDC-Converter TRACO TMLM 05 +0 +4 +4 +Converter_ACDC +Converter_ACDC_TRACO_TMLM-10-20_THT +ACDC-Converter, TRACO TMLM 10, TRACO TMLM 20, https://www.tracopower.com/products/tmlm.pdf +ACDC-Converter TRACO TMLM 10 and TMLM 20 +0 +4 +4 +Converter_ACDC +Converter_ACDC_Vigortronix_VTX-214-010-xxx_THT +Vigortronix VTX-214-010-xxx serie of ACDC converter, http://www.vigortronix.com/10WattACDCPCBPowerModule.aspx +Vigortronix VTX-214-010-xxx serie of ACDC converter +0 +4 +4 +Converter_ACDC +Converter_ACDC_Vigortronix_VTX-214-015-1xx_THT +Vigortronix VTX-214-010-xxx serie of ACDC converter, http://www.vigortronix.com/10WattACDCPCBPowerModule.aspx +Vigortronix VTX-214-010-xxx serie of ACDC converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_Artesyn_ATA_SMD +DCDC-Converter, Artesyn, ATA Series, 3W Single and Dual Output, 1500VDC Isolation, 24.0x13.7x8.0mm https://www.artesyn.com/power/assets/ata_series_ds_01apr2015_79c25814fd.pdf https://www.artesyn.com/power/assets/trn_dc-dc_ata_3w_series_releas1430412818_techref.pdf +DCDC SMD +0 +7 +7 +Converter_DCDC +Converter_DCDC_Bothhand_CFUDxxxx_THT +DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), +DCDC-Converter BOTHHAND Type CFxxxx-Serie +0 +10 +10 +Converter_DCDC +Converter_DCDC_Bothhand_CFUSxxxxEH_THT +DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), +DCDC-Converter BOTHHAND Type CFxxxx-Serie +0 +9 +9 +Converter_DCDC +Converter_DCDC_Bothhand_CFUSxxxx_THT +DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), +DCDC-Converter BOTHHAND Type CFxxxx-Serie +0 +8 +8 +Converter_DCDC +Converter_DCDC_Cincon_EC5BExx_Dual_THT +DCDC-Converter, CINCON, EC5BExx, 18-36VDC to Dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf +DCDC-Converter CINCON EC5BExx 18-36VDC to Dual output +0 +6 +6 +Converter_DCDC +Converter_DCDC_Cincon_EC5BExx_Single_THT +DCDC-Converter, CINCON, EC5BExx, 18-36VDC to dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf +DCDC-Converter CINCON EC5BExx 18-36VDC to dual output +0 +4 +4 +Converter_DCDC +Converter_DCDC_Cincon_EC6Cxx_Dual-Triple_THT +DCDC-Converter, CINCON, EC6Cxx, dual or tripple output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/C%20CASE/SPEC-EC6C-V12.pdf +DCDC-Converter CINCON EC6Cxx dual or tripple output +0 +7 +7 +Converter_DCDC +Converter_DCDC_Cincon_EC6Cxx_Single_THT +DCDC-Converter, CINCON, EC6Cxx, single output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/C%20CASE/SPEC-EC6C-V12.pdf +DCDC-Converter CINCON EC6Cxx single output +0 +6 +6 +Converter_DCDC +Converter_DCDC_MeanWell_NID30_THT +Meanwell DCDC non-isolated converter SIP module, http://www.meanwell.com/webapp/product/search.aspx?prod=nid30 +DCDC non-isolated converter +0 +11 +11 +Converter_DCDC +Converter_DCDC_MeanWell_NID60_THT +MeanWell NID60, http://www.meanwell.com/Upload/PDF/NID60/NID60-SPEC.PDF +MeanWell NID60 +0 +11 +11 +Converter_DCDC +Converter_DCDC_muRata_CRE1xxxxxx3C_THT +Isolated 1W single output DC/DC, http://power.murata.com/data/power/ncl/kdc_cre1.pdf +Isolated 1W single output DC/DC +0 +4 +4 +Converter_DCDC +Converter_DCDC_muRata_CRE1xxxxxxDC_THT +Isloated DC-DC, http://power.murata.com/data/power/ncl/kdc_cre1.pdf +Isloated DC-DC +0 +4 +4 +Converter_DCDC +Converter_DCDC_muRata_CRE1xxxxxxSC_THT +http://power.murata.com/data/power/ncl/kdc_cre1.pdf +murata dc-dc transformer +0 +4 +4 +Converter_DCDC +Converter_DCDC_Murata_NCS1SxxxxSC_THT +Murata NCS1SxxxxSC https://power.murata.com/data/power/ncl/kdc_ncs1.pdf (Script generated with StandardBox.py) (Murata NCS1SxxxxSC https://power.murata.com/data/power/ncl/kdc_ncs1.pdf) +Murata NCS1SxxxxSC +0 +5 +5 +Converter_DCDC +Converter_DCDC_muRata_NMAxxxxDC_THT +Isolated 1W DCDC-Converter, http://power.murata.com/data/power/ncl/kdc_nma.pdf +Isolated 1W DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_muRata_NMAxxxxSC_THT +muRata NMAxxxxSC footprint based on SIP7, http://power.murata.com/data/power/ncl/kdc_nma.pdf +muRata NMAxxxxSC DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_muRata_NXE2SxxxxMC_THT +Isolated 2W Single Output SM DC/DC Converters, http://power.murata.com/data/power/ncl/kdc_nxe2.pdf +Isolated 2W Single Output SM DC/DC Converters +0 +5 +5 +Converter_DCDC +Converter_DCDC_muRata_OKI-78SR_Horizontal +https://power.murata.com/data/power/oki-78sr.pdf +78sr3.3 78sr5 78sr9 78sr12 78srXX +0 +3 +3 +Converter_DCDC +Converter_DCDC_muRata_OKI-78SR_Vertical +https://power.murata.com/data/power/oki-78sr.pdf +78sr3.3 78sr5 78sr9 78sr12 78srXX +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78B-2.0_THT +DCDC-Converter, RECOM, RECOM_R-78B-2.0, SIP-3, pitch 2.54mm, package size 11.5x8.5x17.5mm^3, https://www.recom-power.com/pdf/Innoline/R-78Bxx-2.0.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78E-0.5_THT +DCDC-Converter, RECOM, RECOM_R-78E-0.5, SIP-3, pitch 2.54mm, package size 11.6x8.5x10.4mm^3, https://www.recom-power.com/pdf/Innoline/R-78Exx-0.5.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78HB-0.5L_THT +DCDC-Converter, RECOM, RECOM_R-78HB-0.5L, SIP-3, Horizontally Mounted, pitch 2.54mm, package size 11.5x8.5x17.5mm^3, https://www.recom-power.com/pdf/Innoline/R-78HBxx-0.5_L.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78HB-0.5_THT +DCDC-Converter, RECOM, RECOM_R-78HB-0.5, SIP-3, pitch 2.54mm, package size 11.5x8.5x17.5mm^3, https://www.recom-power.com/pdf/Innoline/R-78HBxx-0.5_L.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78S-0.1_THT +DCDC-Converter, RECOM, RECOM_R-78S-0.1, SIP-4, pitch 2.54mm, package size 11.6x8.5x10.4mm^3, https://www.recom-power.com/pdf/Innoline/R-78Sxx-0.1.pdf +dc-dc recom buck sip-4 pitch 2.54mm +0 +4 +4 +Converter_DCDC +Converter_DCDC_RECOM_R5xxxDA_THT +DCDC-Converter, RECOM, RECOM_R5xxxDA, SIP-12, Horizontally Mounted, pitch 2.54mm, package size 32.2x9.1x15mm^3, https://www.recom-power.com/pdf/Innoline/R-5xxxPA_DA.pdf +dc-dc recom buck sip-12 pitch 2.54mm +0 +12 +12 +Converter_DCDC +Converter_DCDC_RECOM_R5xxxPA_THT +DCDC-Converter, RECOM, RECOM_R5xxxPA, SIP-12, pitch 2.54mm, package size 32.2x9.1x15mm^3, https://www.recom-power.com/pdf/Innoline/R-5xxxPA_DA.pdf +dc-dc recom buck sip-12 pitch 2.54mm +0 +12 +12 +Converter_DCDC +Converter_DCDC_RECOM_RPMx.x-x.0 +https://www.recom-power.com/pdf/Innoline/RPM-6.0.pdf +dc-dc recom buck lga-25 pitch 2.29mm +0 +25 +25 +Converter_DCDC +Converter_DCDC_TRACO_TEN10-xxxx_Dual_THT +DCDC-Converter, TRACO, TEN10-xxxx, single output, https://assets.tracopower.com/20171102100522/TEN10/documents/ten10-datasheet.pdf +DCDC-Converter TRACO TEN10-xxxx single output +0 +5 +5 +Converter_DCDC +Converter_DCDC_TRACO_TEN10-xxxx_Single_THT +DCDC-Converter, TRACO, TEN10-xxxx, single output, https://assets.tracopower.com/20171102100522/TEN10/documents/ten10-datasheet.pdf +DCDC-Converter TRACO TEN10-xxxx single output +0 +4 +4 +Converter_DCDC +Converter_DCDC_TRACO_TEN10-xxxx_THT +DCDC-Converter, TRACO, TEN10-xxxx, https://assets.tracopower.com/20171102100522/TEN10/documents/ten10-datasheet.pdf +DCDC-Converter TRACO TEN10-xxxx +0 +4 +4 +Converter_DCDC +Converter_DCDC_TRACO_TEN20-xxxx-N4_THT +DCDC-Converter TRACO TEN20 Generic, https://assets.tracopower.com/20171102100522/TEN20/documents/ten20-datasheet.pdf +DCDC-Converter TRACO TEN20 Generic +0 +5 +5 +Converter_DCDC +Converter_DCDC_TRACO_TEN20-xxxx_THT +DCDC-Converter TRACO TEN20 Generic, https://assets.tracopower.com/20171102100522/TEN20/documents/ten20-datasheet.pdf +DCDC-Converter TRACO TEN20 Generic +0 +6 +6 +Converter_DCDC +Converter_DCDC_TRACO_TMR-1-xxxx_Dual_THT +DCDC-Converter, TRACO, TMR 1-xxxx, Dual output, Rev. March 21.2016 +DCDC-Converter TRACO TMR1-xxxx Dual_output +0 +5 +5 +Converter_DCDC +Converter_DCDC_TRACO_TMR-1-xxxx_Single_THT +DCDC-Converter, TRACO, TMR 1-xxxx, Single output, Rev. March 21.2016 +DCDC-Converter TRACO TMR1-xxxx Single_output +0 +4 +4 +Converter_DCDC +Converter_DCDC_TRACO_TMR-1SM_SMD +http://assets.tracopower.com/TMR1SM/documents/tmr1sm-datasheet.pdf +DCDC SMD TRACO TMR-1SM +0 +7 +7 +Converter_DCDC +Converter_DCDC_TRACO_TMR-2xxxxWI_THT +https://www.tracopower.com/products/tmr2wi.pdf +DCDC-Converter TRACO TMRxxxxWI Single/Dual_output +0 +7 +7 +Converter_DCDC +Converter_DCDC_TRACO_TMR-xxxx_THT +DCDC-Converter, TRACO, TMR xxxx, Single/Dual output, http://www.datasheetlib.com/datasheet/135136/tmr-2-2410e_traco-power.html?page=3#datasheet +DCDC-Converter TRACO TMRxxxx Single/Dual_output +0 +7 +7 +Converter_DCDC +Converter_DCDC_TRACO_TSR-1_THT +DCDC-Converter, TRACO, TSR 1-xxxx +DCDC-Converter TRACO TSR-1 +0 +3 +3 +Converter_DCDC +Converter_DCDC_XP_POWER-IA48xxD_THT +XP_POWER IA48xxD, DIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IA48xxD DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IA48xxS_THT +XP_POWER IA48xxS, SIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IA48xxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-IAxxxxD_THT +XP_POWER IAxxxxD, DIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IAxxxxD DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IAxxxxS_THT +XP_POWER IAxxxxS, SIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IAxxxxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxDH_THT +XP_POWER IHxxxxDH, DIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxDH DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxD_THT +XP_POWER IHxxxxD, DIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxD DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxSH_THT +XP_POWER IHxxxxSH, SIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxSH SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxS_THT +XP_POWER IHxxxxS, SIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-ISU02_SMD +DCDC-Converter, XP POWER, ISU02 Series, 2W Single and Dual Output, 1500VDC Isolation, 19.0x17.0x8.7mm https://www.xppower.com/Portals/0/pdfs/SF_ISU02.pdf +DCDC SMD XP POWER ISU02 +0 +7 +7 +Converter_DCDC +Converter_DCDC_XP_POWER-ITQxxxxS-H_THT +XP_POWER ITQxxxxS-H, SIP, (https://www.xppower.com/pdfs/SF_ITQ.pdf), generated with kicad-footprint-generator +XP_POWER ITQxxxxS-H SIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-ITXxxxxSA_THT +XP_POWER ITXxxxxSA, SIP, (https://www.xppower.com/pdfs/SF_ITX.pdf), generated with kicad-footprint-generator +XP_POWER ITXxxxxSA SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-ITxxxxxS_THT +XP_POWER ITxxxxxS, SIP, (https://www.xppower.com/pdfs/SF_ITX.pdf https://www.xppower.com/pdfs/SF_ITQ.pdf), generated with kicad-footprint-generator +XP_POWER ITxxxxxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER_JTExxxxDxx_THT +DCDC-Converter, XP POWER, Type JTE06 Series, Dual Output +DCDC-Converter XP_POWER JTE06 Dual +0 +8 +8 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Horizontal +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter +['AT310'] +0 +2 +2 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Horizontal_1EP_style1 +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter +['AT310'] +0 +3 +3 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Horizontal_1EP_style2 +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter +['AT310'] +0 +5 +3 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Vertical +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter +['AT310'] +0 +2 +2 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +2 +2 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style1 +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +3 +3 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style2 +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +5 +3 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Vertical +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +2 +2 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Horizontal +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +2 +2 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Horizontal_1EP_style1 +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +3 +3 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Horizontal_1EP_style2 +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +5 +3 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Vertical +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +2 +2 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Horizontal +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +2 +2 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Horizontal_1EP_style1 +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +3 +3 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Horizontal_1EP_style2 +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +5 +3 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Vertical +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +2 +2 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Horizontal +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +2 +2 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Horizontal_1EP_style1 +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +3 +3 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Horizontal_1EP_style2 +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +5 +3 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Vertical +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +2 +2 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Horizontal +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +2 +2 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Horizontal_1EP_style1 +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +3 +3 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Horizontal_1EP_style2 +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +5 +3 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Vertical +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +2 +2 +Crystal +Crystal_HC18-U_Horizontal +Crystal THT HC-18/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC18-U_Horizontal_1EP_style1 +Crystal THT HC-18/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC18-U_Horizontal_1EP_style2 +Crystal THT HC-18/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC18-U_Vertical +Crystal THT HC-18/U, http://5hertz.com/pdfs/04404_D.pdf +THT crystalHC-18/U +0 +2 +2 +Crystal +Crystal_HC33-U_Horizontal +Crystal THT HC-33/U http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC33-U_Horizontal_1EP_style1 +Crystal THT HC-33/U http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC33-U_Horizontal_1EP_style2 +Crystal THT HC-33/U http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC33-U_Vertical +Crystal THT HC-33/U, http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystalHC-33/U +0 +2 +2 +Crystal +Crystal_HC35-U +Crystal, Quarz, HC35/U, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/TO71xx.pdf +Crystal Quarz HC35/U +0 +3 +3 +Crystal +Crystal_HC49-4H_Vertical +Crystal THT HC-49-4H http://5hertz.com/pdfs/04404_D.pdf +THT crystalHC-49-4H +0 +2 +2 +Crystal +Crystal_HC49-U-3Pin_Vertical +Crystal THT HC-49/U, 3pin-version, http://www.raltron.com/products/pdfspecs/crystal_hc_49_45_51.pdf +THT crystalHC-49/U +0 +3 +3 +Crystal +Crystal_HC49-U_Horizontal +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC49-U_Horizontal_1EP_style1 +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC49-U_Horizontal_1EP_style2 +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC49-U_Vertical +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystalHC-49/U +0 +2 +2 +Crystal +Crystal_HC50_Horizontal +Crystal THT HC-50 http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC50_Horizontal_1EP_style1 +Crystal THT HC-50 http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC50_Horizontal_1EP_style2 +Crystal THT HC-50 http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC50_Vertical +Crystal THT HC-50, http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystalHC-50 +0 +2 +2 +Crystal +Crystal_HC51-U_Vertical +Crystal THT HC-51/U, http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystalHC-51/U +0 +2 +2 +Crystal +Crystal_HC51_Horizontal +Crystal THT HC-51 http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC51_Horizontal_1EP_style1 +Crystal THT HC-51 http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC51_Horizontal_1EP_style2 +Crystal THT HC-51 http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-6mm_Horizontal +Crystal THT HC-51/6mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC52-6mm_Horizontal_1EP_style1 +Crystal THT HC-51/6mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC52-6mm_Horizontal_1EP_style2 +Crystal THT HC-51/6mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-6mm_Vertical +Crystal THT HC-52/6mm, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystalHC-49/U +0 +2 +2 +Crystal +Crystal_HC52-8mm_Horizontal +Crystal THT HC-51/8mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC52-8mm_Horizontal_1EP_style1 +Crystal THT HC-51/8mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC52-8mm_Horizontal_1EP_style2 +Crystal THT HC-51/8mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-8mm_Vertical +Crystal THT HC-52/8mm, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystalHC-49/U +0 +2 +2 +Crystal +Crystal_HC52-U-3Pin_Vertical +Crystal THT HC-52/U, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystalHC-52/U +0 +3 +3 +Crystal +Crystal_HC52-U_Horizontal +Crystal THT HC-51/U http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC52-U_Horizontal_1EP_style1 +Crystal THT HC-51/U http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC52-U_Horizontal_1EP_style2 +Crystal THT HC-51/U http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-U_Vertical +Crystal THT HC-52/U, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal HC-52/U +0 +2 +2 +Crystal +Crystal_Round_D1.0mm_Vertical +Crystal THT DS10 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +2 +2 +Crystal +Crystal_Round_D1.5mm_Vertical +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +2 +2 +Crystal +Crystal_Round_D2.0mm_Vertical +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +2 +2 +Crystal +Crystal_Round_D3.0mm_Vertical +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +2 +2 +Crystal +Crystal_SMD_0603-2Pin_6.0x3.5mm +SMD Crystal SERIES SMD0603/2 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-2.pdf, 6.0x3.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_0603-2Pin_6.0x3.5mm_HandSoldering +SMD Crystal SERIES SMD0603/2 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-2.pdf, hand-soldering, 6.0x3.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_0603-4Pin_6.0x3.5mm +SMD Crystal SERIES SMD0603/4 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-4.pdf, 6.0x3.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_0603-4Pin_6.0x3.5mm_HandSoldering +SMD Crystal SERIES SMD0603/4 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-4.pdf, hand-soldering, 6.0x3.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_2012-2Pin_2.0x1.2mm +SMD Crystal 2012/2 http://txccrystal.com/images/pdf/9ht11.pdf, 2.0x1.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_2012-2Pin_2.0x1.2mm_HandSoldering +SMD Crystal 2012/2 http://txccrystal.com/images/pdf/9ht11.pdf, hand-soldering, 2.0x1.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_2016-4Pin_2.0x1.6mm +SMD Crystal SERIES SMD2016/4 http://www.q-crystal.com/upload/5/2015552223166229.pdf, 2.0x1.6mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_2520-4Pin_2.5x2.0mm +SMD Crystal SERIES SMD2520/4 http://www.newxtal.com/UploadFiles/Images/2012-11-12-09-29-09-776.pdf, 2.5x2.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_3215-2Pin_3.2x1.5mm +SMD Crystal FC-135 https://support.epson.biz/td/api/doc_check.php?dl=brief_FC-135R_en.pdf +SMD SMT Crystal +0 +2 +2 +Crystal +Crystal_SMD_3225-4Pin_3.2x2.5mm +SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_3225-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_5032-2Pin_5.0x3.2mm +SMD Crystal SERIES SMD2520/2 http://www.icbase.com/File/PDF/HKC/HKC00061008.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_5032-2Pin_5.0x3.2mm_HandSoldering +SMD Crystal SERIES SMD2520/2 http://www.icbase.com/File/PDF/HKC/HKC00061008.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_5032-4Pin_5.0x3.2mm +SMD Crystal SERIES SMD2520/4 http://www.icbase.com/File/PDF/HKC/HKC00061008.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_7050-2Pin_7.0x5.0mm +SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_7050-2Pin_7.0x5.0mm_HandSoldering +SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_7050-4Pin_7.0x5.0mm +SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM3-2Pin_5.0x3.2mm +Abracon Miniature Ceramic Smd Crystal ABM3 http://www.abracon.com/Resonators/abm3.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_Abracon_ABM3-2Pin_5.0x3.2mm_HandSoldering +Abracon Miniature Ceramic Smd Crystal ABM3 http://www.abracon.com/Resonators/abm3.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_Abracon_ABM3B-4Pin_5.0x3.2mm +Abracon Miniature Ceramic Smd Crystal ABM3B http://www.abracon.com/Resonators/abm3b.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM3C-4Pin_5.0x3.2mm +Abracon Miniature Ceramic Smd Crystal ABM3C http://www.abracon.com/Resonators/abm3c.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM7-2Pin_6.0x3.5mm +SMD Crystal Abracon ABM7, https://abracon.com/Resonators/abm7.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_Abracon_ABM8G-4Pin_3.2x2.5mm +Abracon Miniature Ceramic Smd Crystal ABM8G http://www.abracon.com/Resonators/ABM8G.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM10-4Pin_2.5x2.0mm +Abracon Miniature Ceramic Smd Crystal ABM10 http://www.abracon.com/Resonators/ABM10.pdf +SMD SMT crystal Abracon ABM10 +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABS25-4Pin_8.0x3.8mm +Abracon Miniature Ceramic SMD Crystal ABS25 https://abracon.com/Resonators/abs25.pdf, 8.0x3.8mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_ECS_CSM3X-2Pin_7.6x4.1mm +http://www.ecsxtal.com/store/pdf/CSM-3X.pdf +Crystal CSM-3X +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_EQ161-2Pin_3.2x1.5mm +SMD Crystal EuroQuartz EQ161 series http://cdn-reichelt.de/documents/datenblatt/B400/PG32768C.pdf, 3.2x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_EQ161-2Pin_3.2x1.5mm_HandSoldering +SMD Crystal EuroQuartz EQ161 series http://cdn-reichelt.de/documents/datenblatt/B400/PG32768C.pdf, hand-soldering, 3.2x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_MJ-4Pin_5.0x3.2mm +SMD Crystal EuroQuartz MJ series http://cdn-reichelt.de/documents/datenblatt/B400/MJ.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MJ-4Pin_5.0x3.2mm_HandSoldering +SMD Crystal EuroQuartz MJ series http://cdn-reichelt.de/documents/datenblatt/B400/MJ.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MQ-4Pin_7.0x5.0mm +SMD Crystal EuroQuartz MQ series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MQ-4Pin_7.0x5.0mm_HandSoldering +SMD Crystal EuroQuartz MQ series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MQ2-2Pin_7.0x5.0mm +SMD Crystal EuroQuartz MQ2 series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_MQ2-2Pin_7.0x5.0mm_HandSoldering +SMD Crystal EuroQuartz MQ2 series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_MT-4Pin_3.2x2.5mm +SMD Crystal EuroQuartz MT series http://cdn-reichelt.de/documents/datenblatt/B400/MT.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MT-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal EuroQuartz MT series http://cdn-reichelt.de/documents/datenblatt/B400/MT.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_X22-4Pin_2.5x2.0mm +SMD Crystal EuroQuartz X22 series http://cdn-reichelt.de/documents/datenblatt/B400/DS_X22.pdf, 2.5x2.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_X22-4Pin_2.5x2.0mm_HandSoldering +SMD Crystal EuroQuartz X22 series http://cdn-reichelt.de/documents/datenblatt/B400/DS_X22.pdf, hand-soldering, 2.5x2.0mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_FOX_FE-2Pin_7.5x5.0mm +crystal Ceramic Resin Sealed SMD http://www.foxonline.com/pdfs/fe.pdf, 7.5x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_FOX_FE-2Pin_7.5x5.0mm_HandSoldering +crystal Ceramic Resin Sealed SMD http://www.foxonline.com/pdfs/fe.pdf, hand-soldering, 7.5x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_FOX_FQ7050-2Pin_7.0x5.0mm +FOX SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_FOX_FQ7050-2Pin_7.0x5.0mm_HandSoldering +FOX SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_FOX_FQ7050-4Pin_7.0x5.0mm +FOX SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_FrontierElectronics_FM206 +SMD Watch Crystal FrontierElectronics FM206 6.0mm length 1.9mm diameter http://www.chinafronter.com/wp-content/uploads/2013/12/FM206.pdf +['FM206'] +0 +3 +3 +Crystal +Crystal_SMD_G8-2Pin_3.2x1.5mm +SMD Crystal G8, 3.2x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_G8-2Pin_3.2x1.5mm_HandSoldering +SMD Crystal G8, hand-soldering, 3.2x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_HC49-SD +SMD Crystal HC-49-SD http://cdn-reichelt.de/documents/datenblatt/B400/xxx-HC49-SMD.pdf, 11.4x4.7mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_HC49-SD_HandSoldering +SMD Crystal HC-49-SD http://cdn-reichelt.de/documents/datenblatt/B400/xxx-HC49-SMD.pdf, hand-soldering, 11.4x4.7mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC1V-T1A-2Pin_8.0x3.7mm +SMD Crystal MicroCrystal CC1V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC1V-T1A.pdf, 8.0x3.7mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC1V-T1A-2Pin_8.0x3.7mm_HandSoldering +SMD Crystal MicroCrystal CC1V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC1V-T1A.pdf, hand-soldering, 8.0x3.7mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC4V-T1A-2Pin_5.0x1.9mm +SMD Crystal MicroCrystal CC4V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC4V-T1A.pdf, 5.0x1.9mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC4V-T1A-2Pin_5.0x1.9mm_HandSoldering +SMD Crystal MicroCrystal CC4V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC4V-T1A.pdf, hand-soldering, 5.0x1.9mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC5V-T1A-2Pin_4.1x1.5mm +SMD Crystal MicroCrystal CC5V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC5V-T1A.pdf, 4.1x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC5V-T1A-2Pin_4.1x1.5mm_HandSoldering +SMD Crystal MicroCrystal CC5V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC5V-T1A.pdf, hand-soldering, 4.1x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC7V-T1A-2Pin_3.2x1.5mm +SMD Crystal MicroCrystal CC7V-T1A/CM7V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC1V-T1A.pdf, 3.2x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC7V-T1A-2Pin_3.2x1.5mm_HandSoldering +SMD Crystal MicroCrystal CC7V-T1A/CM7V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC1V-T1A.pdf, hand-soldering, 3.2x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC8V-T1A-2Pin_2.0x1.2mm +SMD Crystal MicroCrystal CC8V-T1A/CM8V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC8V-T1A.pdf, 2.0x1.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC8V-T1A-2Pin_2.0x1.2mm_HandSoldering +SMD Crystal MicroCrystal CC8V-T1A/CM8V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC8V-T1A.pdf, hand-soldering, 2.0x1.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CM9V-T1A-2Pin_1.6x1.0mm +SMD Crystal MicroCrystal CM9V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CM9V-T1A.pdf, 1.6x1.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CM9V-T1A-2Pin_1.6x1.0mm_HandSoldering +SMD Crystal MicroCrystal CM9V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CM9V-T1A.pdf, hand-soldering, 1.6x1.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_MS1V-T1K +SMD Watch Crystal MicroCrystal MS1V-T1K 6.1mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/MS1V-T1K.pdf +['MS1V-T1K'] +0 +3 +3 +Crystal +Crystal_SMD_MicroCrystal_MS3V-T1R +SMD Watch Crystal MicroCrystal MS3V-T1R 5.2mm length 1.4mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/MS3V-T1R.pdf +['MS3V-T1R'] +0 +3 +3 +Crystal +Crystal_SMD_Qantek_QC5CB-2Pin_5x3.2mm +SMD Crystal Qantek QC5CB, https://www.qantek.com/tl_files/products/crystals/QC5CB.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_FA238-4Pin_3.2x2.5mm +crystal Epson Toyocom FA-238 https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_FA238-4Pin_3.2x2.5mm_HandSoldering +crystal Epson Toyocom FA-238 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_FA238V-4Pin_3.2x2.5mm +crystal Epson Toyocom FA-238 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_FA238V-4Pin_3.2x2.5mm_HandSoldering +crystal Epson Toyocom FA-238 series http://www.mouser.com/ds/2/137/1721499-465440.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA406-4Pin_11.7x4.0mm +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, 11.7x4.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA406-4Pin_11.7x4.0mm_HandSoldering +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, hand-soldering, 11.7x4.0mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA505-2Pin_12.7x5.1mm +SMD Crystal Seiko Epson MC-505 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, 12.7x5.1mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MA505-2Pin_12.7x5.1mm_HandSoldering +SMD Crystal Seiko Epson MC-505 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, hand-soldering, 12.7x5.1mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MA506-4Pin_12.7x5.1mm +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, 12.7x5.1mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA506-4Pin_12.7x5.1mm_HandSoldering +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, hand-soldering, 12.7x5.1mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC146-4Pin_6.7x1.5mm +SMD Crystal Seiko Epson MC-146 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, 6.7x1.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC146-4Pin_6.7x1.5mm_HandSoldering +SMD Crystal Seiko Epson MC-146 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, hand-soldering, 6.7x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC156-4Pin_7.1x2.5mm +SMD Crystal Seiko Epson MC-156 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, 7.1x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC156-4Pin_7.1x2.5mm_HandSoldering +SMD Crystal Seiko Epson MC-156 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, hand-soldering, 7.1x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC306-4Pin_8.0x3.2mm +SMD Crystal Seiko Epson MC-306 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, 8.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC306-4Pin_8.0x3.2mm_HandSoldering +SMD Crystal Seiko Epson MC-306 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, hand-soldering, 8.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC405-2Pin_9.6x4.1mm +SMD Crystal Seiko Epson MC-405 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, 9.6x4.1mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MC405-2Pin_9.6x4.1mm_HandSoldering +SMD Crystal Seiko Epson MC-405 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, hand-soldering, 9.6x4.1mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MC406-4Pin_9.6x4.1mm +SMD Crystal Seiko Epson MC-406 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, 9.6x4.1mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC406-4Pin_9.6x4.1mm_HandSoldering +SMD Crystal Seiko Epson MC-406 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, hand-soldering, 9.6x4.1mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm +crystal Epson Toyocom TSX-3225 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm_HandSoldering +crystal Epson Toyocom TSX-3225 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_TXC_7A-2Pin_5x3.2mm +SMD Crystal TXC 7A http://txccrystal.com/images/pdf/7a.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_TXC_7M-4Pin_3.2x2.5mm +SMD Crystal TXC 7M http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_TXC_7M-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal TXC 7M http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_TXC_9HT11-2Pin_2.0x1.2mm +SMD Crystal TXC 9HT11 http://txccrystal.com/images/pdf/9ht11.pdf, 2.0x1.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_TXC_9HT11-2Pin_2.0x1.2mm_HandSoldering +SMD Crystal TXC 9HT11 http://txccrystal.com/images/pdf/9ht11.pdf, hand-soldering, 2.0x1.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_TXC_AX_8045-2Pin_8.0x4.5mm +http://www.txccrystal.com/images/pdf/ax-automotive.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Resonator-2Pin_W6.0mm_H3.0mm +Ceramic Resomator/Filter 6.0x3.0mm^2, length*width=6.0x3.0mm^2 package, package length=6.0mm, package width=3.0mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-2Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter 7.0x2.5mm^2, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-2Pin_W8.0mm_H3.5mm +Ceramic Resomator/Filter 8.0x3.5mm^2, length*width=8.0x3.5mm^2 package, package length=8.0mm, package width=3.5mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-2Pin_W10.0mm_H5.0mm +Ceramic Resomator/Filter 10.0x5.0 RedFrequency MG/MT/MX series, http://www.red-frequency.com/download/datenblatt/redfrequency-datenblatt-ir-zta.pdf, length*width=10.0x5.0mm^2 package, package length=10.0mm, package width=5.0mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-3Pin_W6.0mm_H3.0mm +Ceramic Resomator/Filter 6.0x3.0mm^2, length*width=6.0x3.0mm^2 package, package length=6.0mm, package width=3.0mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator-3Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter 7.0x2.5mm^2, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator-3Pin_W8.0mm_H3.5mm +Ceramic Resomator/Filter 8.0x3.5mm^2, length*width=8.0x3.5mm^2 package, package length=8.0mm, package width=3.5mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator-3Pin_W10.0mm_H5.0mm +Ceramic Resomator/Filter 10.0x5.0mm^2 RedFrequency MG/MT/MX series, http://www.red-frequency.com/download/datenblatt/redfrequency-datenblatt-ir-zta.pdf, length*width=10.0x5.0mm^2 package, package length=10.0mm, package width=5.0mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator_muRata_CSTLSxxxG-3Pin_W8.0mm_H3.0mm +Ceramic Resomator/Filter Murata CSTLSxxxG, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/timingdevice/ceralock/p17e.ashx, length*width=8.0x3.0mm^2 package, package length=8.0mm, package width=3.0mm, 3 pins +THT ceramic resonator filter CSTLSxxxG +0 +3 +3 +Crystal +Resonator_muRata_CSTLSxxxX-3Pin_W5.5mm_H3.0mm +Ceramic Resomator/Filter Murata CSTLSxxxX, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/timingdevice/ceralock/p17e.ashx, length*width=5.5x3.0mm^2 package, package length=5.5mm, package width=3.0mm, 3 pins +THT ceramic resonator filter CSTLSxxxX +0 +3 +3 +Crystal +Resonator_muRata_DSN6-3Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter Murata DSN6, http://cdn-reichelt.de/documents/datenblatt/B400/DSN6NC51H.pdf, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins +THT ceramic resonator filter DSN6 +0 +3 +3 +Crystal +Resonator_muRata_DSS6-3Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter Murata DSS6, http://cdn-reichelt.de/documents/datenblatt/B400/DSN6NC51H.pdf, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins +THT ceramic resonator filter DSS6 +0 +3 +3 +Crystal +Resonator_SMD-3Pin_7.2x3.0mm +SMD Resomator/Filter 7.2x3.0mm, Murata CSTCC8M00G53-R0; 8MHz resonator, SMD, Farnell (Element 14) #1170435, http://www.farnell.com/datasheets/19296.pdf?_ga=1.247244932.122297557.1475167906, 7.2x3.0mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD-3Pin_7.2x3.0mm_HandSoldering +SMD Resomator/Filter 7.2x3.0mm, Murata CSTCC8M00G53-R0; 8MHz resonator, SMD, Farnell (Element 14) #1170435, http://www.farnell.com/datasheets/19296.pdf?_ga=1.247244932.122297557.1475167906, hand-soldering, 7.2x3.0mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_SMD_muRata_CDSCB-2Pin_4.5x2.0mm +SMD Resomator/Filter Murata CDSCB, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 4.5x2.0mm^2 package +SMD SMT ceramic resonator filter filter +0 +2 +2 +Crystal +Resonator_SMD_muRata_CDSCB-2Pin_4.5x2.0mm_HandSoldering +SMD Resomator/Filter Murata CDSCB, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 4.5x2.0mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +2 +2 +Crystal +Resonator_SMD_muRata_CSTxExxV-3Pin_3.0x1.1mm +SMD Resomator/Filter Murata CSTCE, https://www.murata.com/en-eu/products/productdata/8801162264606/SPEC-CSTNE16M0VH3C000R0.pdf +SMD SMT ceramic resonator filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_CSTxExxV-3Pin_3.0x1.1mm_HandSoldering +SMD Resomator/Filter Murata CSTCE, https://www.murata.com/en-eu/products/productdata/8801162264606/SPEC-CSTNE16M0VH3C000R0.pdf +SMD SMT ceramic resonator filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFECV-3Pin_6.9x2.9mm +SMD Resomator/Filter Murata SFECV, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 6.9x2.9mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFECV-3Pin_6.9x2.9mm_HandSoldering +SMD Resomator/Filter Murata SFECV, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 6.9x2.9mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFSKA-3Pin_7.9x3.8mm +SMD Resomator/Filter Murata SFSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFSKA-3Pin_7.9x3.8mm_HandSoldering +SMD Resomator/Filter Murata SFSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_SMD_muRata_TPSKA-3Pin_7.9x3.8mm +SMD Resomator/Filter Murata TPSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_TPSKA-3Pin_7.9x3.8mm_HandSoldering +SMD Resomator/Filter Murata TPSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Diode_SMD +Diode_Bridge_Diotec_ABS +SMD diode bridge ABS (Diotec), see https://diotec.com/tl_files/diotec/files/pdf/datasheets/abs2.pdf +ABS MBLS +0 +4 +4 +Diode_SMD +Diode_Bridge_Diotec_MicroDil_3.0x3.0x1.8mm +SMD package Diotec Diotec MicroDil, body 3.0x3.0x1.8mm (e.g. diode bridge), see https://diotec.com/tl_files/diotec/files/pdf/datasheets/mys40.pdf +Diotec MicroDil diode bridge +0 +4 +4 +Diode_SMD +Diode_Bridge_Diotec_SO-DIL-Slim +SMD diode bridge Diotec SO-DIL Slim, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40fs.pdf +DFS SO-DIL Slim +0 +4 +4 +Diode_SMD +Diode_Bridge_Vishay_DFS +SMD diode bridge DFS, see http://www.vishay.com/docs/88854/padlayouts.pdf +DFS +0 +4 +4 +Diode_SMD +Diode_Bridge_Vishay_DFSFlat +SMD diode bridge Low Profile DFS "Flat", see http://www.vishay.com/docs/88874/dfl15005.pdf +DFS +0 +4 +4 +Diode_SMD +Diode_Bridge_Vishay_MBLS +SMD diode bridge MBLS, see http://www.vishay.com/docs/89959/mbl104s.pdf http://www.vishay.com/docs/88854/padlayouts.pdf +DFS +0 +4 +4 +Diode_SMD +D_0201_0603Metric +Diode SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +diode +0 +4 +2 +Diode_SMD +D_0402_1005Metric +Diode SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_0603_1608Metric +Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_0603_1608Metric_Castellated +Diode SMD 0603 (1608 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_0805_2012Metric +Diode SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_0805_2012Metric_Castellated +Diode SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Diode SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_01005_0402Metric +Diode SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +diode +0 +4 +2 +Diode_SMD +D_1206_3216Metric +Diode SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1206_3216Metric_Castellated +Diode SMD 1206 (3216 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Diode SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_1210_3225Metric +Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1210_3225Metric_Castellated +Diode SMD 1210 (3225 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_1806_4516Metric +Diode SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1806_4516Metric_Castellated +Diode SMD 1806 (4516 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Diode SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_1812_4532Metric +Diode SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1812_4532Metric_Castellated +Diode SMD 1812 (4532 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Diode SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2010_5025Metric +Diode SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2010_5025Metric_Castellated +Diode SMD 2010 (5025 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Diode SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2114_3652Metric +Diode SMD 2114 (3652 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2114_3652Metric_Castellated +Diode SMD 2114 (3652 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2114_3652Metric_Pad1.85x3.75mm_HandSolder +Diode SMD 2114 (3652 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2512_6332Metric +Diode SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2512_6332Metric_Castellated +Diode SMD 2512 (6332 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Diode SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2816_7142Metric +Diode SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2816_7142Metric_Castellated +Diode SMD 2816 (7142 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Diode SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_3220_8050Metric +Diode SMD 3220 (8050 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_3220_8050Metric_Castellated +Diode SMD 3220 (8050 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_3220_8050Metric_Pad2.65x5.15mm_HandSolder +Diode SMD 3220 (8050 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_MELF +Diode, MELF,, +Diode MELF +0 +2 +2 +Diode_SMD +D_MELF-RM10_Universal_Handsoldering +Diode, Universal, MELF, RM10, Handsoldering, SMD, Thruhole, +Diode Universal MELF RM10 Handsoldering SMD Thruhole +0 +2 +2 +Diode_SMD +D_MELF_Handsoldering +Diode MELF Handsoldering +Diode MELF Handsoldering +0 +2 +2 +Diode_SMD +D_MicroMELF +Diode, MicroMELF, http://www.vishay.com/docs/85597/bzm55-se.pdf +MicroMELF Diode +0 +2 +2 +Diode_SMD +D_MicroMELF_Hadsoldering +Diode, MicroMELF, hand-soldering, http://www.vishay.com/docs/85597/bzm55-se.pdf +MicroMELF Diode +0 +2 +2 +Diode_SMD +D_MiniMELF +Diode Mini-MELF +Diode Mini-MELF +0 +2 +2 +Diode_SMD +D_MiniMELF_Handsoldering +Diode Mini-MELF Handsoldering +Diode Mini-MELF Handsoldering +0 +2 +2 +Diode_SMD +D_PowerDI-123 +http://www.diodes.com/_files/datasheets/ds30497.pdf +PowerDI diode vishay +0 +2 +2 +Diode_SMD +D_Powermite2_AK +Microsemi Powermite 2 SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5341) +PowerMite2 +0 +2 +2 +Diode_SMD +D_Powermite2_KA +Microsemi Powermite 2 SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5341) +PowerMite2 +0 +2 +2 +Diode_SMD +D_Powermite3 +Microsemi Powermite 3 SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5340) +PowerMite3 +0 +3 +3 +Diode_SMD +D_Powermite_AK +Microsemi Powermite SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5339, https://www.onsemi.com/pub/Collateral/457-04.PDF) +Powermite +0 +2 +2 +Diode_SMD +D_Powermite_KA +Microsemi Powermite SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5339, https://www.onsemi.com/pub/Collateral/457-04.PDF) +Powermite +0 +2 +2 +Diode_SMD +D_QFN_3.3x3.3mm_P0.65mm +QFN, diode, 3.3x3.3x1mm (https://www.wolfspeed.com/media/downloads/846/C3D1P7060Q.pdf) +diode qfn 3.3 +0 +3 +2 +Diode_SMD +D_SC-80 +JEITA SC-80 +SC-80 +0 +2 +2 +Diode_SMD +D_SC-80_HandSoldering +JEITA SC-80 +SC-80 +0 +2 +2 +Diode_SMD +D_SMA +Diode SMA (DO-214AC) +Diode SMA (DO-214AC) +0 +2 +2 +Diode_SMD +D_SMA-SMB_Universal_Handsoldering +Diode, Universal, SMA (DO-214AC) or SMB (DO-214AA), Handsoldering, +Diode Universal SMA (DO-214AC) SMB (DO-214AA) Handsoldering +0 +2 +2 +Diode_SMD +D_SMA_Handsoldering +Diode SMA (DO-214AC) Handsoldering +Diode SMA (DO-214AC) Handsoldering +0 +2 +2 +Diode_SMD +D_SMB +Diode SMB (DO-214AA) +Diode SMB (DO-214AA) +0 +2 +2 +Diode_SMD +D_SMB-SMC_Universal_Handsoldering +Diode, Universal, SMB(DO-214AA) or SMC (DO-214AB), Handsoldering, +Diode Universal SMB(DO-214AA) SMC (DO-214AB) Handsoldering +0 +2 +2 +Diode_SMD +D_SMB_Handsoldering +Diode SMB (DO-214AA) Handsoldering +Diode SMB (DO-214AA) Handsoldering +0 +2 +2 +Diode_SMD +D_SMB_Modified +Diode SMB (DO-214AA) Modified (http://www.littelfuse.com/~/media/electronics/datasheets/sidactors/littelfuse_sidactor_battrax_positive_negative_modified_do_214_datasheet.pdf.pdf) +Diode SMB (DO-214AA) +0 +3 +3 +Diode_SMD +D_SMC +Diode SMC (DO-214AB) +Diode SMC (DO-214AB) +0 +2 +2 +Diode_SMD +D_SMC-RM10_Universal_Handsoldering +Diode, Universal, SMC (DO-214AB), RM10, Handsoldering, SMD, Thruhole +Diode Universal SMC (DO-214AB) RM10 Handsoldering SMD Thruhole +0 +2 +2 +Diode_SMD +D_SMC_Handsoldering +Diode SMC (DO-214AB) Handsoldering +Diode SMC (DO-214AB) Handsoldering +0 +2 +2 +Diode_SMD +D_SOD-110 +SOD-110 +SOD-110 +0 +2 +2 +Diode_SMD +D_SOD-123 +SOD-123 +SOD-123 +0 +2 +2 +Diode_SMD +D_SOD-123F +D_SOD-123F +D_SOD-123F +0 +2 +2 +Diode_SMD +D_SOD-323 +SOD-323 +SOD-323 +0 +2 +2 +Diode_SMD +D_SOD-323F +SOD-323F http://www.nxp.com/documents/outline_drawing/SOD323F.pdf +SOD-323F +0 +2 +2 +Diode_SMD +D_SOD-323_HandSoldering +SOD-323 +SOD-323 +0 +2 +2 +Diode_SMD +D_SOD-523 +http://www.diodes.com/datasheets/ap02001.pdf p.144 +Diode SOD523 +0 +2 +2 +Diode_SMD +D_SOT-23_ANK +SOT-23, Single Diode +SOT-23 +0 +3 +2 +Diode_SMD +D_SOT-23_NKA +SOT-23, Single Diode +SOT-23 +0 +3 +2 +Diode_SMD +D_TUMD2 +ROHM - TUMD2 +TUMD2 +0 +2 +2 +Diode_SMD +Littelfuse_PolyZen-LS +http://m.littelfuse.com/~/media/electronics/datasheets/polyzen_devices/littelfuse_polyzen_standard_polyzen_catalog_datasheet.pdf.pdf +Diode Polymer Protected Zener Diode Littelfuse LS +0 +3 +3 +Diode_THT +Diode_Bridge_15.1x15.1x6.3mm_P10.9mm +Single phase bridge rectifier case 15.1x15.1mm, pitch 10.9mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/pb1000.pdf +Diode Bridge PB10xxS +0 +4 +4 +Diode_THT +Diode_Bridge_15.2x15.2x6.3mm_P10.9mm +Single phase bridge rectifier case 15.2x15.2mm, pitch 10.9mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/kbpc600.pdf +Diode Bridge KBPC6xx +0 +4 +4 +Diode_THT +Diode_Bridge_15.7x15.7x6.3mm_P10.8mm +Single phase bridge rectifier case 15.7x15.7 +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_16.7x16.7x6.3mm_P10.8mm +Single phase bridge rectifier case 16.7x16.7 +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_19.0x3.5x10.0mm_P5.0mm +Vishay GBU rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88606/g3sba20.pdf +Vishay GBU rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_19.0x19.0x6.8mm_P12.7mm +Single phase bridge rectifier case 19x19mm, pitch 12.7mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/pb1000.pdf +Diode Bridge PB10xx +0 +4 +4 +Diode_THT +Diode_Bridge_28.6x28.6x7.3mm_P18.0mm_P11.6mm +Single phase bridge rectifier case 28.6x28.6mm, pitch 18.0mm & 11.6mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/kbpc1500fw.pdf +Diode Bridge KBPCxxxxWP +0 +4 +4 +Diode_THT +Diode_Bridge_32.0x5.6x17.0mm_P10.0mm_P7.5mm +Diotec 32x5.6x17mm rectifier package, 7.5mm/10mm pitch, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40c3700.pdf +Diotec rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_DIP-4_W5.08mm_P2.54mm +4-lead dip package for diode bridges, row spacing 5.08mm, pin-spacing 2.54mm, see http://www.vishay.com/docs/88898/b2m.pdf +DIL DIP PDIP 5.08mm 2.54 +0 +4 +4 +Diode_THT +Diode_Bridge_DIP-4_W7.62mm_P5.08mm +4-lead dip package for diode bridges, row spacing 7.62 mm (300 mils), see http://cdn-reichelt.de/documents/datenblatt/A400/HDBL101G_20SERIES-TSC.pdf +DIL DIP PDIP 5.08mm 7.62mm 300mil +0 +4 +4 +Diode_THT +Diode_Bridge_Round_D8.9mm +4-lead round diode bridge package, diameter 8.9mm, pin pitch 5.08mm, see http://cdn-reichelt.de/documents/datenblatt/A400/W005M-W10M_SEP.PDF +diode bridge 8.9mm 8.85mm WOB pitch 5.08mm +0 +4 +4 +Diode_THT +Diode_Bridge_Round_D9.0mm +4-lead round diode bridge package, diameter 9.0mm, pin pitch 5.0mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40r.pdf +diode bridge 9.0mm 8.85mm WOB pitch 5.0mm +0 +4 +4 +Diode_THT +Diode_Bridge_Round_D9.8mm +4-lead round diode bridge package, diameter 9.8mm, pin pitch 5.08mm, see http://www.vishay.com/docs/88769/woo5g.pdf +diode bridge 9.8mm WOG pitch 5.08mm +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_GBL +Vishay GBL rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88609/gbl005.pdf +Vishay GBL rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_GBU +Vishay GBU rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88606/g3sba20.pdf +Vishay GBU rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBL +Vishay KBL rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88655/kbl005.pdf +Vishay KBL rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBPC1 +Single phase bridge rectifier case KBPC1, see http://www.vishay.com/docs/93585/vs-kbpc1series.pdf +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBPC6 +Single phase bridge rectifier case KBPC6, see http://www.vishay.com/docs/93585/vs-kbpc1series.pdf +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBU +Vishay KBU rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88656/kbu4.pdf +Vishay KBU rectifier diode bridge +0 +4 +4 +Diode_THT +D_5KPW_P7.62mm_Vertical_AnodeUp +Diode, 5KPW series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9*8mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KPW series Axial Vertical pin pitch 7.62mm length 9mm diameter 8mm +0 +2 +2 +Diode_THT +D_5KPW_P7.62mm_Vertical_KathodeUp +Diode, 5KPW series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9*8mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KPW series Axial Vertical pin pitch 7.62mm length 9mm diameter 8mm +0 +2 +2 +Diode_THT +D_5KPW_P12.70mm_Horizontal +Diode, 5KPW series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9*8mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KPW series Axial Horizontal pin pitch 12.7mm length 9mm diameter 8mm +0 +2 +2 +Diode_THT +D_5KP_P7.62mm_Vertical_AnodeUp +Diode, 5KP series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Vertical pin pitch 7.62mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5KP_P7.62mm_Vertical_KathodeUp +Diode, 5KP series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Vertical pin pitch 7.62mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5KP_P10.16mm_Horizontal +Diode, 5KP series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Horizontal pin pitch 10.16mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5KP_P12.70mm_Horizontal +Diode, 5KP series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Horizontal pin pitch 12.7mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5W_P5.08mm_Vertical_AnodeUp +Diode, 5W series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Vertical pin pitch 5.08mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_5W_P5.08mm_Vertical_KathodeUp +Diode, 5W series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Vertical pin pitch 5.08mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_5W_P10.16mm_Horizontal +Diode, 5W series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Horizontal pin pitch 10.16mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_5W_P12.70mm_Horizontal +Diode, 5W series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Horizontal pin pitch 12.7mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_A-405_P2.54mm_Vertical_AnodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P2.54mm_Vertical_KathodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P5.08mm_Vertical_AnodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P5.08mm_Vertical_KathodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P7.62mm_Horizontal +Diode, A-405 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Horizontal pin pitch 7.62mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P10.16mm_Horizontal +Diode, A-405 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Horizontal pin pitch 10.16mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P12.70mm_Horizontal +Diode, A-405 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Horizontal pin pitch 12.7mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-15_P2.54mm_Vertical_AnodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 2.54mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P2.54mm_Vertical_KathodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 2.54mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P3.81mm_Vertical_AnodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 3.81mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P3.81mm_Vertical_KathodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 3.81mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P5.08mm_Vertical_AnodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 5.08mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P5.08mm_Vertical_KathodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 5.08mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P10.16mm_Horizontal +Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P12.70mm_Horizontal +Diode, DO-15 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Horizontal pin pitch 12.7mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P15.24mm_Horizontal +Diode, DO-15 series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Horizontal pin pitch 15.24mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-27_P5.08mm_Vertical_AnodeUp +Diode, DO-27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Vertical pin pitch 5.08mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-27_P5.08mm_Vertical_KathodeUp +Diode, DO-27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Vertical pin pitch 5.08mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-27_P12.70mm_Horizontal +Diode, DO-27 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Horizontal pin pitch 12.7mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-27_P15.24mm_Horizontal +Diode, DO-27 series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Horizontal pin pitch 15.24mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P2.54mm_Vertical_AnodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 2.54mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P2.54mm_Vertical_KathodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 2.54mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P5.08mm_Vertical_AnodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 5.08mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P5.08mm_Vertical_KathodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 5.08mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P7.62mm_Horizontal +Diode, DO-34_SOD68 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Horizontal pin pitch 7.62mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P10.16mm_Horizontal +Diode, DO-34_SOD68 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Horizontal pin pitch 10.16mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P12.70mm_Horizontal +Diode, DO-34_SOD68 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Horizontal pin pitch 12.7mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P2.54mm_Vertical_AnodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 2.54mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P2.54mm_Vertical_KathodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 2.54mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P3.81mm_Vertical_AnodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 3.81mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P3.81mm_Vertical_KathodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 3.81mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P5.08mm_Vertical_AnodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 5.08mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P5.08mm_Vertical_KathodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 5.08mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P7.62mm_Horizontal +Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Horizontal pin pitch 7.62mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P10.16mm_Horizontal +Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Horizontal pin pitch 10.16mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P12.70mm_Horizontal +Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Horizontal pin pitch 12.7mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P2.54mm_Vertical_AnodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P2.54mm_Vertical_KathodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P3.81mm_Vertical_AnodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=5.2*2.7mm^2, , https://www.diodes.com/assets/Package-Files/DO-41-Plastic.pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 3.81mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P3.81mm_Vertical_KathodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=5.2*2.7mm^2, , https://www.diodes.com/assets/Package-Files/DO-41-Plastic.pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 3.81mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P5.08mm_Vertical_AnodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P5.08mm_Vertical_KathodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P7.62mm_Horizontal +Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Horizontal pin pitch 7.62mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P10.16mm_Horizontal +Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Horizontal pin pitch 10.16mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P12.70mm_Horizontal +Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Horizontal pin pitch 12.7mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-201AD_P3.81mm_Vertical_AnodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 3.81mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P3.81mm_Vertical_KathodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 3.81mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P5.08mm_Vertical_AnodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 5.08mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P5.08mm_Vertical_KathodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 5.08mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P12.70mm_Horizontal +Diode, DO-201AD series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Horizontal pin pitch 12.7mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P15.24mm_Horizontal +Diode, DO-201AD series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Horizontal pin pitch 15.24mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AE_P3.81mm_Vertical_AnodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 3.81mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P3.81mm_Vertical_KathodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 3.81mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P5.08mm_Vertical_AnodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 5.08mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P5.08mm_Vertical_KathodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 5.08mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P12.70mm_Horizontal +Diode, DO-201AE series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Horizontal pin pitch 12.7mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P15.24mm_Horizontal +Diode, DO-201AE series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Horizontal pin pitch 15.24mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201_P3.81mm_Vertical_AnodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 3.81mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P3.81mm_Vertical_KathodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 3.81mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P5.08mm_Vertical_AnodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 5.08mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P5.08mm_Vertical_KathodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 5.08mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P12.70mm_Horizontal +Diode, DO-201 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Horizontal pin pitch 12.7mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P15.24mm_Horizontal +Diode, DO-201 series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Horizontal pin pitch 15.24mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_P600_R-6_P7.62mm_Vertical_AnodeUp +Diode, P600_R-6 series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Vertical pin pitch 7.62mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_P600_R-6_P7.62mm_Vertical_KathodeUp +Diode, P600_R-6 series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Vertical pin pitch 7.62mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_P600_R-6_P12.70mm_Horizontal +Diode, P600_R-6 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Horizontal pin pitch 12.7mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_P600_R-6_P20.00mm_Horizontal +Diode, P600_R-6 series, Axial, Horizontal, pin pitch=20mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Horizontal pin pitch 20mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_T-1_P2.54mm_Vertical_AnodeUp +Diode, T-1 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Vertical pin pitch 2.54mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P2.54mm_Vertical_KathodeUp +Diode, T-1 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Vertical pin pitch 2.54mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P5.08mm_Horizontal +Diode, T-1 series, Axial, Horizontal, pin pitch=5.08mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Horizontal pin pitch 5.08mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P10.16mm_Horizontal +Diode, T-1 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Horizontal pin pitch 10.16mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P12.70mm_Horizontal +Diode, T-1 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Horizontal pin pitch 12.7mm length 3.2mm diameter 2.6mm +0 +2 +2 +Display +Adafruit_SSD1306 +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI https://learn.adafruit.com/monochrome-oled-breakouts/downloads +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI +0 +8 +8 +Display +Adafruit_SSD1306_No_Mounting_Holes +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI https://learn.adafruit.com/monochrome-oled-breakouts/downloads +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI +0 +8 +8 +Display +AG12864E +STN/FSTN LCD 128x64 dot https://www.digchip.com/datasheets/parts/datasheet/1121/AG-12864E-pdf.php +AG12864E Graphics Display 128x64 Ampire +0 +24 +20 +Display +CR2013-MI2120 +CR2013-MI2120 ILI9341 LCD Breakout http://pan.baidu.com/s/11Y990 +CR2013-MI2120 ILI9341 LCD Breakout +0 +18 +14 +Display +EA-eDIP128B-XXX +LCD-graphical display with LED backlight 128x64 RS-232 I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip128-6e.pdf +LCD-graphical display with LED backlight 128x64 RS-232 I2C or SPI +0 +32 +32 +Display +EA_DOGS104X-A +LCD 4x10 character 3.3V VDD I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/doma/dogs104e.pdf +LCD 4x10 character 3.3V VDD I2C or SPI +0 +14 +14 +Display +EA_DOGXL160-7 +Grapchical,Display,LCD,160x104 http://www.lcd-module.com/eng/pdf/grafik/dogxl160-7e.pdf +EA_DOGXL160-7 +0 +22 +22 +Display +EA_DOGXL160-7_Backlight +Grapchical,Display,LCD,160x104 http://www.lcd-module.com/eng/pdf/grafik/dogxl160-7e.pdf +EA_DOGXL160-7_Backlight +0 +22 +22 +Display +EA_eDIP160-XXX +LCD-graphical display with LED backlight 160x104 RS-232 I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip160-7e.pdf +LCD-graphical display with LED backlight 160x104 RS-232 I2C or SPI +0 +40 +40 +Display +EA_eDIP240-XXX +LCD graphical display LED backlight 240x128 http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip240-7e.pdf +LCD graphical display LED backlight 240x128 +0 +40 +40 +Display +EA_eDIP320X-XXX +LCD display 320x340 RS-232 I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip320-8e.pdf +LCD display 320x340 RS-232 I2C or SPI +0 +48 +48 +Display +EA_eDIPTFT32-XXX +TFT-graphic display 320x240 16 bit colour with led backlight http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft32-ae.pdf +TFT-graphic display 320x240 16 bit colour with led backlight +0 +40 +40 +Display +EA_eDIPTFT43-ATC +http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft43-ae.pdf +TFT graphical display 480x272 16-bit colour with LED backlight +0 +40 +40 +Display +EA_eDIPTFT43-XXX +TFT graphical display 480x272 16-bit colour with LED backlight http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft43-ae.pdf +TFT graphical display 480x272 16-bit colour with LED backlight +0 +40 +40 +Display +EA_eDIPTFT57-XXX +http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft57-ae.pdf +TFT-graphic display 640x480 16 bit colour +0 +48 +48 +Display +EA_eDIPTFT70-ATC +TFT-graphical display 800x480 16-bit colours with capacitive touch panel http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft70-ae.pdf +TFT-graphical display 800x480 16-bit colours with capacitive touch panel +0 +48 +48 +Display +EA_eDIPTFT70-XXX +TFT-graphical display 800x480 16-bit colours http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft70-ae.pdf +TFT-graphical display 800x480 16-bit colours and touch display +0 +48 +48 +Display +EA_T123X-I2C +http://www.lcd-module.de/pdf/doma/t123-i2c.pdf +3 Line 12 character wide alpha numeric LCD +0 +6 +6 +Display +HDSM-441B_HDSM-443B +2 Digit 7 segemnt blue LED, right hand decimal, https://docs.broadcom.com/docs/AV02-1589EN +2 Digit 7 segment blue LED +0 +10 +10 +Display +HDSM-541B_HDSM-543B +2 digit 7 segement blue LED with right hand decimal, https://docs.broadcom.com/docs/AV02-1588EN +2 digit 7 segement blue LED with right hand decimal +0 +10 +10 +Display +HDSP-48xx +10-Element Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Bar Graph Array +0 +20 +20 +Display +HDSP-4830 +10-Element Red Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Bar Graph Array +0 +20 +20 +Display +HDSP-4832 +10-Element Red Yellow Green Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Yellow Green Bar Graph Array +0 +20 +20 +Display +HDSP-4836 +10-Element Red Yellow Green Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Yellow Green Bar Graph Array +0 +20 +20 +Display +HDSP-4840 +10-Element Yellow Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Yellow Bar Graph Array +0 +20 +20 +Display +HDSP-4850 +10-Element Green Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Green Bar Graph Array +0 +20 +20 +Display +HLCP-J100 +10-Element Red Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Bar Graph Array +0 +20 +20 +Display +HY1602E +http://www.icbank.com/data/ICBShop/board/HY1602E.pdf +LCD 16x2 Alphanumeric 16pin +0 +20 +16 +Display +LCD-016N002L +16 x 2 Character LCD, http://www.vishay.com/product?docid=37299 +LCD-016N002L 16 x 2 Character LCD +0 +24 +20 +Display +LM16255 +LCD LM16255 16x2 character http://www.datasheetlib.com/datasheet/259542/lm16255_sharp-electronics.html +LCD 12x2 +0 +14 +14 +Display +NHD-0420H1Z +NHD-0420H1Z LCD http://www.newhavendisplay.com/specs/NHD-0420H1Z-FSW-GBW-33V3.pdf +NHD-0420H1Z LCD +0 +16 +16 +Display +RC1602A +http://www.raystar-optronics.com/down.php?ProID=18 +LCD 16x2 Alphanumeric 16pin +0 +22 +18 +Display +WC1602A +LCD 16x2 http://www.wincomlcd.com/pdf/WC1602A-SFYLYHTC06.pdf +LCD 16x2 Alphanumeric 16pin +0 +20 +16 +Display_7Segment +7SEGMENT-LED__HDSM531_HDSM533_SMD +7-Segment Display, HDSM53x, https://docs.broadcom.com/docs/AV02-0713EN +7segment LED HDSM531 HDSM533 +0 +10 +10 +Display_7Segment +7SegmentLED_LTS6760_LTS6780 +7-Segment Display, LTS67x0, http://optoelectronics.liteon.com/upload/download/DS30-2001-355/S6760jd.pdf +7Segment LED LTS6760 LTS6780 +0 +10 +10 +Display_7Segment +AD-121F2 +Single Digit 7-segment RGB LED Display, 1-inch digit height, common anode, http://usasyck.com/products/AD-121F2_cat_e.pdf +RGB LED digit +0 +22 +22 +Display_7Segment +AFF_2x7SEG-DIGIT_10mm +Afficheur 7 segments 10mm DIGIT +AFFICHEUR +0 +16 +16 +Display_7Segment +CA56-12CGKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12CGKWA(Ver.9A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12EWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CA56-12EWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SEKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12SEKWA(Ver.7A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SRWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CA56-12SRWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SURKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12SURKWA(Ver.8A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SYKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12SYKWA(Ver.6A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CC56-12GWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CA56-11GWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CC56-12YWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CC56-12YWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +DA04-11CGKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11CGKWA(Ver.6A).pdf +Dubble digit green 7 segment LED display +0 +16 +16 +Display_7Segment +DA04-11SEKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11SEKWA(Ver.9A).pdf +Dubble digit super bright orange 7 segment LED display +0 +16 +16 +Display_7Segment +DA04-11SURKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11SURKWA(Ver.10A).pdf +Dubble digit hyper red 7 segment LED display +0 +16 +16 +Display_7Segment +DA04-11SYKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11SYKWA(Ver.6A).pdf +Dubble digit super bright yellow 7 segment LED display +0 +16 +16 +Display_7Segment +DA56-11CGKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11CGKWA(Ver.16A).pdf +Double digit seven segment green LED display +0 +18 +18 +Display_7Segment +DA56-11SEKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11SEKWA(Ver.9A).pdf +Double digit seven segment super bright orange LED display +0 +18 +18 +Display_7Segment +DA56-11SURKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11SURKWA(Ver.11A).pdf +Double digit seven segment hyper red LED display +0 +18 +18 +Display_7Segment +DA56-11SYKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11SYKWA(Ver.11A).pdf +Double digit seven segment super bright yellow LED display +0 +18 +18 +Display_7Segment +DE113-XX-XX +http://www.display-elektronik.de/filter/DE113-RS-20_635.pdf +3 1/5 digit LOW BAT + 7-Segment LCD +0 +40 +40 +Display_7Segment +DE114-RS-20 +http://www.display-elektronik.de/filter/DE113-RS-20_635.pdf +3 1/5 digit reflective LCD LOW-BAT + 7-Segment +0 +40 +40 +Display_7Segment +DE122-XX-XX +http://www.display-elektronik.de/filter/DE122-RS-20_635.pdf +6 digit 7 segment LCD +0 +50 +50 +Display_7Segment +DE170-XX-XX +http://www.display-elektronik.de/filter/DE170-RS-20_75.pdf +3 1/5 digit reflective arrow bat + 7 segment LCD +0 +40 +40 +Display_7Segment +ELD_426XXXX +http://www.everlight.com/file/ProductFile/D426SYGWA-S530-E2.pdf +Double digit 7 segment brilliant yellow green LED +0 +10 +10 +Display_7Segment +HDSP-7401 +One digit 7 segment yellow, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment yellow +0 +10 +10 +Display_7Segment +HDSP-7507 ++-1 overflow 7 segment high efficiency red, https://docs.broadcom.com/docs/AV02-2553EN ++-1 overflow 7 segment high efficiency red +0 +10 +10 +Display_7Segment +HDSP-7801 +One digit 7 segment green, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment green +0 +10 +10 +Display_7Segment +HDSP-7807 ++-1 overflow 7 segment green, https://docs.broadcom.com/docs/AV02-2553EN ++-1 overflow 7 segment green +0 +10 +10 +Display_7Segment +HDSP-A151 +One digit 7 segment red, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment high efficiency red +0 +10 +10 +Display_7Segment +HDSP-A401 +One digit 7 segment orange, common anode, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment orange common anode +0 +10 +10 +Display_7Segment +KCSC02-105 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-105(Ver.9A).pdf +Single digit 7 segement hyper red LED +0 +10 +10 +Display_7Segment +KCSC02-106 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-106(Ver.10A).pdf +Single digit 7 segement super bright orange LED +0 +10 +10 +Display_7Segment +KCSC02-107 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-107(Ver.9A).pdf +Single digit 7 segement super bright yellow LED +0 +10 +10 +Display_7Segment +KCSC02-123 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-123(Ver.10A).pdf +Single digit 7 segement super bright yellow LED +0 +10 +10 +Display_7Segment +KCSC02-136 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-136(Ver.6B).pdf +Single digit 7 segement super bright yellow LED +0 +10 +10 +Display_7Segment +MAN71A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment red LED with right dot +0 +14 +14 +Display_7Segment +MAN72A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment red LED with left dot +0 +14 +14 +Display_7Segment +MAN73A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +Overflow +- 1 red LED +0 +14 +14 +Display_7Segment +MAN3410A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment green LED with dot +0 +14 +14 +Display_7Segment +MAN3420A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment green LED with left dot +0 +14 +14 +Display_7Segment +MAN3610A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment orange LED with right dot +0 +14 +14 +Display_7Segment +MAN3620A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment orange LED with left dot +0 +14 +14 +Display_7Segment +MAN3630A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +Overflow +- 1 orange LED +0 +14 +14 +Display_7Segment +MAN3810A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment yellow LED with right dot +0 +14 +14 +Display_7Segment +MAN3820A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment yellow LED with left dot +0 +14 +14 +Display_7Segment +SA15-11xxx +http://www.kingbrightusa.com/images/catalog/SPEC/SA15-11SRWA.pdf +SA15-11xxx single digit 7 segment display 38.1mm 1.5inch +0 +10 +10 +Display_7Segment +SBC18-11SURKCGKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/SBC18-11SURKCGKWA(Ver.6A).pdf +single digit 7 segemnt red/green LED +0 +10 +10 +Fiducial +Fiducial_0.5mm_Mask1.5mm +Circular Fiducial, 0.5mm bare copper, 1.5mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_0.5mm_Mask1mm +Circular Fiducial, 0.5mm bare copper, 1mm soldermask opening (Level C) +fiducial +0 +1 +0 +Fiducial +Fiducial_0.75mm_Mask1.5mm +Circular Fiducial, 0.75mm bare copper, 1.5mm soldermask opening (Level B) +fiducial +0 +1 +0 +Fiducial +Fiducial_0.75mm_Mask2.25mm +Circular Fiducial, 0.75mm bare copper, 2.25mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_1.5mm_Mask3mm +Circular Fiducial, 1.5mm bare copper, 3mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_1.5mm_Mask4.5mm +Circular Fiducial, 1.5mm bare copper, 4.5mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_1mm_Mask2mm +Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A) +fiducial +0 +1 +0 +Fiducial +Fiducial_1mm_Mask3mm +Circular Fiducial, 1mm bare copper, 3mm soldermask opening (recommended) +fiducial +0 +1 +0 +Filter +Filter_1109-5_1.1x0.9mm +5-pin SAW filter package - 1.1x0.9 mm Body; (see https://www.murata.com/~/media/webrenewal/support/library/catalog/products/filter/rf/p73e.ashx?la=en-gb) +Filter 5 +0 +5 +5 +Filter +Filter_1411-5_1.4x1.1mm +5-pin filter package - 1.4x1.1 mm Body; (see https://global.kyocera.com/prdct/electro/product/pdf/sf14_tdlte.pdf) +Filter 5 +0 +5 +5 +Filter +Filter_Bourns_SRF0905_6.0x9.2mm +https://www.bourns.com/docs/Product-Datasheets/SRF0905.pdf +Line Filter +0 +4 +4 +Filter +Filter_Mini-Circuits_FV1206 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206.pdf +Mini-Circuits Filter SMD 1206 +0 +6 +4 +Filter +Filter_Mini-Circuits_FV1206-1 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-1.pdf +Mini-Circuits Filter SMD 1206 +0 +6 +6 +Filter +Filter_Mini-Circuits_FV1206-4 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-4.pdf +Mini-Circuits Filter SMD 1206 +0 +8 +4 +Filter +Filter_Mini-Circuits_FV1206-5 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-5.pdf +Mini-Circuits Filter SMD 1206 +0 +8 +4 +Filter +Filter_Mini-Circuits_FV1206-6 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-6.pdf +Mini-Circuits Filter SMD 1206 +0 +14 +8 +Filter +Filter_Mini-Circuits_FV1206-7 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-7.pdf +Mini-Circuits Filter SMD 1206 +0 +5 +3 +Filter +Filter_Murata_BNX025 +https://www.murata.com/en-us/products/productdata/8796778004510/QNFH9101.pdf?1496719830000 +EMI Filter +0 +6 +4 +Filter +Filter_Murata_BNX025_ThermalVias +https://www.murata.com/en-us/products/productdata/8796778004510/QNFH9101.pdf?1496719830000 +EMI Filter +0 +19 +4 +Fuse +Fuseholder_Blade_ATO_Littelfuse_Pudenz_2_Pin +Fuseholder ATO Blade littelfuse Pudenz 2 Pin +Fuseholder ATO Blade littelfuse Pudenz 2 Pin +0 +2 +2 +Fuse +Fuseholder_Blade_Mini_Keystone_3568 +fuse holder, car blade fuse mini, http://www.keyelco.com/product-pdf.cfm?p=306 +car blade fuse mini +0 +4 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Bulgin_FX0456_Vertical_Closed +Fuseholder, 5x20, closed, vertical, Bulgin, FX0456, https://www.bulgin.com/products/pub/media/bulgin/data/Fuseholders.pdf +Fuseholder 5x20 closed vertical Bulgin FX0456 Sicherungshalter +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Bulgin_FX0457_Horizontal_Closed +Fuseholder, 5x20, closed, horizontal, Bulgin, FX0457, Sicherungshalter, +Fuseholder 5x20 closed horizontal Bulgin FX0457 Sicherungshalter +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_EATON_H15-V-1_Vertical_Closed +PCB fuse holders for 5 mm x 20 mm fuses; 250V; 10A (http://www.cooperindustries.com/content/dam/public/bussmann/Electronics/Resources/product-datasheets/bus-elx-ds-4426-h15.pdf) +fuse holder vertical 5x20mm +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_EATON_HBV_Vertical_Closed +5 mm x 20 mm fuse holders; Vertical w/ Stability Pins; 250V; 6.3-16A (http://www.cooperindustries.com/content/dam/public/bussmann/Electronics/Resources/product-datasheets/Bus_Elx_DS_2118_HB_PCB_Series.pdf) +fuse holder vertical 5x20mm +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_EATON_HBW_Vertical_Closed +5 mm x 20 mm fuse holders; Vertical w/o Stability Pins; 250V; 6.3-16A (http://www.cooperindustries.com/content/dam/public/bussmann/Electronics/Resources/product-datasheets/Bus_Elx_DS_2118_HB_PCB_Series.pdf) +fuse holder vertical 5x20mm +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_0031_8201_Horizontal_Open +Fuseholder horizontal open 5x20 Schurter 0031.8201, https://www.schurter.com/en/datasheet/typ_OGN.pdf +Fuseholder horizontal open 5x20 Schurter 0031.8201 +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_FAB_0031-355x_Horizontal_Closed +Fuseholder 5x20mm horizontal Shurter model FAB, Suitable for order numbers 0031.3551 and 0031.3558 (https://www.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FAB.pdf) +Fuseholder 5x20mm closed horizontal +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_FPG4_Vertical_Closed +Shock-Safe Fuseholder, 5 x 20 mm, Slotted Cap/Fingergrip, vertical, IEC 60335-1; 250VAC/10A VDE; 500V/16A UL/CSA (https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FPG4.pdf) +fuse holder vertical 5x20mm +0 +4 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_FUP_0031.2510_Horizontal_Closed +Shock-Safe closed Fuseholder, Schurter FUP Series, 5.0 x 20mm, Slotted Cap, horizontal, 500 VAC 4W/16A (VDE), 600V 30A (UL/CSA), order numbers: 0031.2510 (0031.2500 + 0031.2323), http://www.schurter.ch/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FUP.pdf +Fuseholder 5x20mm horizontal closed +0 +3 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Stelvio-Kontek_PTF78_Horizontal_Open +https://www.tme.eu/en/Document/3b48dbe2b9714a62652c97b08fcd464b/PTF78.pdf +Fuseholder horizontal open 5x20 Stelvio-Kontek PTF/78 +0 +2 +2 +Fuse +Fuseholder_Cylinder-6.3x32mm_Schurter_0031-8002_Horizontal_Open +Fuseholder, horizontal, open, 6.3x32, Schurter, 0031.8002, https://www.schurter.com/en/datasheet/typ_OG__Holder__6.3x32.pdf +Fuseholder horizontal open 6.3x32 Schurter 0031.8002 +0 +2 +2 +Fuse +Fuseholder_Cylinder-6.3x32mm_Schurter_FUP_0031.2520_Horizontal_Closed +Shock-Safe closed Fuseholder, Schurter FUP Series, 6.3 x 32 mm, Slotted Cap, horizontal, 500 VAC 4W/16A (VDE), 600V 30A (UL/CSA), order numbers: 0031.2520 (0031.2500 + 0031.2321), http://www.schurter.ch/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FUP.pdf +Fuseholder 6.3x32mm horizontal closed +0 +3 +2 +Fuse +Fuseholder_TR5_Littelfuse_No560_No460 +Fuse, Fuseholder, TR5, Littelfuse/Wickmann, No. 460, No560, https://www.littelfuse.com/~/media/electronics/datasheets/fuse_holders/littelfuse_fuse_holder_559_560_datasheet.pdf.pdf +Fuse Fuseholder TR5 Littelfuse/Wickmann No. 460 No560 +0 +2 +2 +Fuse +Fuse_0201_0603Metric +Fuse SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Fuse +Fuse_0402_1005Metric +Fuse SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_0603_1608Metric +Fuse SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Fuse SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_0805_2012Metric +Fuse SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Fuse SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_01005_0402Metric +Fuse SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Fuse +Fuse_1206_3216Metric +Fuse SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Fuse SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_1210_3225Metric +Fuse SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Fuse SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_1806_4516Metric +Fuse SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Fuse SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_1812_4532Metric +Fuse SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Fuse SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_2010_5025Metric +Fuse SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Fuse SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_2512_6332Metric +Fuse SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Fuse SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_2816_7142Metric +Fuse SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Fuse SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_2920_7451Metric +Fuse SMD 2920 (7451 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://www.megastar.com/products/fusetronic/polyswitch/PDF/smd2920.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Fuse +Fuse_2920_7451Metric_Pad2.10x5.45mm_HandSolder +Fuse SMD 2920 (7451 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://www.megastar.com/products/fusetronic/polyswitch/PDF/smd2920.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0005FF_L8.3mm_W3.8mm +Fuse 0ZRE0005FF, BelFuse, Radial Leaded PTC, https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0008FF_L8.3mm_W3.8mm +Fuse 0ZRE0008FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0012FF_L8.3mm_W3.8mm +Fuse 0ZRE0012FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0016FF_L9.9mm_W3.8mm +Fuse 0ZRE0016FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0025FF_L9.6mm_W3.8mm +Fuse 0ZRE0025FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0033FF_L11.4mm_W3.8mm +Fuse 0ZRE0033FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0040FF_L11.5mm_W3.8mm +Fuse 0ZRE0040FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0055FF_L14.0mm_W4.1mm +Fuse 0ZRE0055FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0075FF_L11.5mm_W4.8mm +Fuse 0ZRE0075FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0100FF_L18.7mm_W5.1mm +Fuse 0ZRE0100FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0125FF_L21.2mm_W5.3mm +Fuse 0ZRE0125FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0150FF_L23.4mm_W5.3mm +Fuse 0ZRE0150FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0200FF_L24.9mm_W6.1mm +Fuse 0ZRE0200FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_Blade_ATO_directSolder +car blade fuse direct solder +car blade fuse +0 +2 +2 +Fuse +Fuse_Blade_Mini_directSolder +car blade fuse mini, direct solder +car blade fuse mini +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG300 +PTC Resettable Fuse, Ihold = 3.0A, Itrip=5.1A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG400 +PTC Resettable Fuse, Ihold = 4.0A, Itrip=6.8A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG500 +PTC Resettable Fuse, Ihold = 5.0A, Itrip=8.5A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG600 +PTC Resettable Fuse, Ihold = 6.0A, Itrip=10.2A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG650 +PTC Resettable Fuse, Ihold = 6.5A, Itrip=11.1A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG700 +PTC Resettable Fuse, Ihold = 7.0A, Itrip=11.9A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG800 +PTC Resettable Fuse, Ihold = 8.0A, Itrip=13.6A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG900 +PTC Resettable Fuse, Ihold = 9.0A, Itrip=15.3A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG1000 +PTC Resettable Fuse, Ihold = 10.0A, Itrip=17.0A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG1100 +PTC Resettable Fuse, Ihold = 11.0A, Itrip=18.7A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT050 +PTC Resettable Fuse, Ihold = 0.5A, Itrip=0.92A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT070 +PTC Resettable Fuse, Ihold = 0.7A, Itrip=1.4A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT100 +PTC Resettable Fuse, Ihold = 1.0A, Itrip=1.8A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT200 +PTC Resettable Fuse, Ihold = 2.0A, Itrip=3.8A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT300 +PTC Resettable Fuse, Ihold = 3.0A, Itrip=6.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT400 +PTC Resettable Fuse, Ihold = 4.0A, Itrip=7.5A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT500 +PTC Resettable Fuse, Ihold = 5.0A, Itrip=9.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT550 +PTC Resettable Fuse, Ihold = 5.5A, Itrip=10.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT600 +PTC Resettable Fuse, Ihold = 6.0A, Itrip=10.8A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT650 +PTC Resettable Fuse, Ihold = 6.5A, Itrip=12.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT700 +PTC Resettable Fuse, Ihold = 7.0A, Itrip=13.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT750 +PTC Resettable Fuse, Ihold = 7.5A, Itrip=13.1A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT800 +PTC Resettable Fuse, Ihold = 8.0A, Itrip=15.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT900 +PTC Resettable Fuse, Ihold = 9.0A, Itrip=16.5A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT1000 +PTC Resettable Fuse, Ihold = 10.0A, Itrip=18.5A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT1100 +PTC Resettable Fuse, Ihold = 11.0A, Itrip=20.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT1300 +PTC Resettable Fuse, Ihold = 13.0A, Itrip=24.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-SM_7.98x5.44mm +https://www.bourns.com/docs/Product-Datasheets/mfsm.pdf +bourns ptc resettable fuse polyfuse MF-SM MF-SMHT +0 +2 +2 +Fuse +Fuse_Bourns_MF-SM_9.5x6.71mm +https://www.bourns.com/docs/Product-Datasheets/mfsm.pdf +bourns ptc resettable fuse polyfuse MF-SM MF-SMHT +0 +2 +2 +Fuse +Fuse_Littelfuse-LVR100 +Littelfuse, resettable fuse, PTC, polyswitch LVR100, Ih 1A http://www.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_lvr_catalog_datasheet.pdf.pdf +LVR100 PTC resettable polyswitch +0 +2 +2 +Fuse +Fuse_Littelfuse-LVR125 +Littelfuse, resettable fuse, PTC, polyswitch LVR125, Ih 1.25A, http://www.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_lvr_catalog_datasheet.pdf.pdf +LVR125 PTC resettable polyswitch +0 +2 +2 +Fuse +Fuse_Littelfuse-LVR200 +Littelfuse, resettable fuse, PTC, polyswitch LVR200, Ih 2A, http://www.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_lvr_catalog_datasheet.pdf.pdf +LVR200 PTC resettable polyswitch +0 +2 +2 +Fuse +Fuse_Littelfuse_395Series +Fuse, TE5, Littelfuse/Wickmann, No. 460, No560, +Fuse TE5 Littelfuse/Wickmann No. 460 No560 +0 +2 +2 +Fuse +Fuse_SunFuse-6HP +SunFuse Ceramic Slow Blow Fuse 6H_6HP.PDF +UL/CSA 6x32mm Ceramic Slow Blow Fuse +0 +2 +2 +Heatsink +Heatsink_35x26mm_1xFixation3mm_Fischer-SK486-35 +Heatsink, 35mm x 26mm, 1x Fixation 3mm, Fischer SK486-35 +heatsink +0 +1 +1 +Heatsink +Heatsink_38x38mm_SpringFixation +Heatsink, 38x38mm, Spring Fixation, diagonal, +heatsink +0 +4 +1 +Heatsink +Heatsink_62x40mm_2xFixation3mm +Heatsink, 62 x 40mm, 2x 3mm Drills, +heatsink +0 +2 +1 +Heatsink +Heatsink_125x35x50mm_3xFixationM3 +Heatsink, 125x35x50mm, 3 fixation holes 3.2mm +heatsink +0 +0 +0 +Heatsink +Heatsink_Aavid-TV5G_TO220_Horizontal +Heatsink TV5G TO-220 Horizontal, https://www.shopaavid.com/Product/TV-5G +Heatsink TV5G TO-220 Horizontal +0 +0 +0 +Heatsink +Heatsink_AAVID_573300D00010G_TO-263 +Heatsink, 12.70mm x 26.16mm x 10.16, SMD, 18K/W, TO-263, D2 Pak, https://www.shopaavid.com/Product/573300D00000G +Heatsink AAVID TO-263 D2 Pak +0 +2 +1 +Heatsink +Heatsink_Fischer_FK24413D2PAK_26x13mm +26x13 mm SMD heatsink for TO-252 TO-263 TO-268, https://www.fischerelektronik.de/pim/upload/fischerData/cadpdf/base/fk_244_13_d2_pak.pdf +heatsink TO-252 TO-263 TO-268 +0 +2 +1 +Heatsink +Heatsink_Fischer_SK104-STC-STIC_35x13mm_2xDrill2.5mm +Heatsink, 35mm x 13mm, 2x Fixation 2,5mm Drill, Soldering, Fischer SK104-STC-STIC, +Heatsink fischer TO-220 +0 +2 +1 +Heatsink +Heatsink_Fischer_SK104-STCB_35x13mm__2xDrill3.5mm_ScrewM3 +Heatsink, 35mm x 13mm, 2x Fixation 2,5mm Drill, Soldering, Fischer SK104-STC-STIC, +Heatsink fischer TO-220 +0 +2 +1 +Heatsink +Heatsink_Fischer_SK129-STS_42x25mm_2xDrill2.5mm +Heatsink, Fischer SK129 +heatsink fischer +0 +2 +1 +Heatsink +Heatsink_SheetType_50x7mm_2Fixations +Heatsink, Sheet type, 50x7mm, 2 fixations (solder), +Heatsink sheet +0 +2 +1 +Heatsink +Heatsink_Stonecold_HS-132_32x14mm_2xFixation1.5mm +Heatsink, StoneCold HS +heatsink +0 +2 +1 +Inductor_SMD +L_6.3x6.3_H3 +Choke, SMD, 6.3x6.3mm 3mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_7.3x7.3_H3.5 +Choke, SMD, 7.3x7.3mm 3.5mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_7.3x7.3_H4.5 +Choke, SMD, 7.3x7.3mm 4.5mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_10.4x10.4_H4.8 +Choke, SMD, 10.4x10.4mm 4.8mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_12x12mm_H4.5mm +Choke, SMD, 12x12mm 4.5mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_12x12mm_H6mm +Choke, SMD, 12x12mm 6mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_12x12mm_H8mm +Choke, SMD, 12x12mm 8mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_0201_0603Metric +Inductor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +inductor +0 +4 +2 +Inductor_SMD +L_0402_1005Metric +Inductor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0603_1608Metric +Inductor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0805_2012Metric +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_01005_0402Metric +Inductor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +inductor +0 +4 +2 +Inductor_SMD +L_1206_3216Metric +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1210_3225Metric +Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1806_4516Metric +Inductor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Capacitor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1812_4532Metric +Inductor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Capacitor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2010_5025Metric +Inductor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Capacitor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2512_6332Metric +Inductor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Capacitor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2816_7142Metric +Inductor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Capacitor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_Abracon_ASPI-3012S +smd shielded power inductor http://www.abracon.com/Magnetics/power/ASPI-3012S.pdf +inductor abracon smd shielded +0 +2 +2 +Inductor_SMD +L_Bourns-SRN1060 +Bourns SRN1060 series SMD inductor https://www.bourns.com/docs/Product-Datasheets/SRN1060.pdf +Bourns SRN1060 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN4018 +Bourns SRN4018 series SMD inductor, https://www.bourns.com/docs/Product-Datasheets/SRN4018.pdf +Bourns SRN4018 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN6028 +Bourns SRN6028 series SMD inductor +Bourns SRN6028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRR1005 +Bourns SRR1005 series SMD inductor +Bourns SRR1005 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU8043 +Bourns SRU8043 series SMD inductor +Bourns SRU8043 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SDR1806 +https://www.bourns.com/docs/Product-Datasheets/SDR1806.pdf +Bourns SDR1806 +0 +2 +2 +Inductor_SMD +L_Bourns_SRN6045TA +http://www.bourns.com/docs/product-datasheets/srn6045ta.pdf +Semi-shielded Power Inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP1245A +Bourns SRP1245A series SMD inductor http://www.bourns.com/docs/Product-Datasheets/SRP1245A.pdf +Bourns SRP1245A SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP2313AA +Bourns SRR1260 series SMD inductor http://www.bourns.com/docs/product-datasheets/srp2313aa.pdf +Bourns SRR1260 SMD inductor +0 +4 +2 +Inductor_SMD +L_Bourns_SRR1210A +Bourns SRR1210A series SMD inductor https://www.bourns.com/docs/Product-Datasheets/SRR1210A.pdf +Bourns SRR1210A SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRR1260 +Bourns SRR1260 series SMD inductor http://www.bourns.com/docs/Product-Datasheets/SRR1260.pdf +Bourns SRR1260 SMD inductor +0 +2 +2 +Inductor_SMD +L_Coilcraft_LPS4018 +SMD Inductor Coilcraft LPS4018 https://www.coilcraft.com/misc/lps4018d.html +L Coilcraft LPS4018 +0 +14 +2 +Inductor_SMD +L_Coilcraft_LPS5030 +Shielded Power Inductor SMD, Coilcraft LPS5030, https://www.coilcraft.com/pdfs/lps5030.pdf, StepUp generated footprint +inductor +0 +2 +2 +Inductor_SMD +L_Coilcraft_XAL5030 +L_Coilcraft_XAL5030 +L Coilcraft XAL5030 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4020 +L_Coilcraft_XxL4020 https://www.coilcraft.com/pdfs/xfl4020.pdf +L Coilcraft XxL4020 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4030 +L_Coilcraft_XxL4030 https://www.coilcraft.com/pdfs/xfl4030.pdf +L Coilcraft XxL4030 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4040 +L_Coilcraft_XxL4040 https://www.coilcraft.com/pdfs/xal4000.pdf +L Coilcraft XxL4040 +0 +2 +2 +Inductor_SMD +L_CommonMode_Wuerth_WE-SL2 +http://katalog.we-online.de/en/pbs/WE-SL2?sid=5fbec16187#vs_t1:c1_ct:1 +Wuerth WE-SL2 +0 +4 +4 +Inductor_SMD +L_Fastron_PISN +Choke, Drossel, PISN, SMD, Fastron, +Choke Drossel PISN SMD Fastron +0 +2 +2 +Inductor_SMD +L_Fastron_PISN_Handsoldering +Choke, Drossel, PISN, SMD, Fastron, +Choke Drossel PISN SMD Fastron +0 +2 +2 +Inductor_SMD +L_Fastron_PISR +Choke, Drossel, PISR, Fastron, SMD, +Choke Drossel PISR Fastron SMD +0 +2 +2 +Inductor_SMD +L_Fastron_PISR_Handsoldering +Choke, Drossel, PISR, Fastron, SMD, +Choke Drossel PISR Fastron SMD +0 +2 +2 +Inductor_SMD +L_Murata_DEM35xxC +https://www.murata.com/~/media/webrenewal/products/inductor/chip/tokoproducts/wirewoundferritetypeforpl/m_dem3518c.ashx +Inductor SMD DEM35xxC +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_1turn_HDM0131A +Neosid, Air-Coil, SML, 1turn, HDM0131A, +Neosid Air-Coil SML 1turn HDM0131A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_2turn_HAM0231A +Neosid, Air-Coil, SML, 2turn, HAM0231A, +Neosid Air-Coil SML 2turn HAM0231A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_2turn_HDM0231A +Neosid, Air-Coil, SML, 2turn, HDM0231A, +Neosid Air-Coil SML 2turn HDM0231A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_3turn_HAM0331A +Neosid, Air-Coil, SML, 2turn, HAM0331A, +Neosid Air-Coil SML 3turn HAM0331A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_3turn_HDM0331A +Neosid, Air-Coil, SML, 3turn, HDM0331A, +Neosid Air-Coil SML 3turn HDM0331A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_4turn_HAM0431A +Neosid, Air-Coil, SML, 4turn, HAM0431A, +Neosid Air-Coil SML 4turn HAM0431A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_4turn_HDM0431A +Neosid, Air-Coil, SML, 4turn, HDM0431A, +Neosid Air-Coil SML 4turn HDM0431A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_5turn_HAM0531A +Neosid, Air-Coil, SML, 5turn, HAM0531A, +Neosid Air-Coil SML 5turn HAM0531A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_5turn_HDM0531A +Neosid, Air-Coil, SML, 5turn, HDM0531A, +Neosid Air-Coil SML 5turn HDM0531A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6-10turn_HAM0631A-HAM1031A +Neosid, Air-Coil, SML, 6-10turn, HAM0631A-HAM1031A, +Neosid Air-Coil SML 6-10turn HAM0631A-HAM1031A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6-10turn_HDM0431A-HDM1031A +Neosid, Air-Coil, SML, 6-10turn, HDM0431A-HDM1031A, +Neosid Air-Coil SML 6-10turn HDM0431A-HDM1031A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6turn_HAM0631A +Neosid, Air-Coil, SML, 6turn, HAM0631A, +Neosid Air-Coil SML 6turn HAM0631A +0 +2 +2 +Inductor_SMD +L_Neosid_MicroCoil_Ms36-L +Neosid, Micro Coil, Inductor, Ms36-L, SMD, Festinduktivitaet, anti clockwise, +Neosid Micro Coil Inductor Ms36-L SMD Festinduktivitaet anti clockwise +0 +2 +2 +Inductor_SMD +L_Neosid_Ms42 +Neosid, Inductor, SMs42, Festinduktivitaet, SMD, magneticaly shielded, +Neosid Inductor SMs42 Festinduktivitaet SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_Ms50 +Neosid, Power Inductor, Ms50, SMD, Festinduktivitaet, +Neosid Power Inductor Ms50 SMD Festinduktivitaet +0 +2 +2 +Inductor_SMD +L_Neosid_Ms50T +Neosid, Power Inductor, Ms50T, SMD, Festinduktivitaet, high temperature, +Neosid Power Inductor Ms50T SMD Festinduktivitaet high temperature +0 +2 +2 +Inductor_SMD +L_Neosid_Ms85 +Neosid, Ms85, Ms85T, SMD Inductor, Festinduktivitaet, SMD, +Neosid Ms85 Ms85T SMD Inductor Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms85T +Neosid, Ms85, Ms85T, SMD Inductor, Festinduktivitaet, SMD, +Neosid Ms85 Ms85T SMD Inductor Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95 +Neosid,Inductor,Ms95, Ms95a, Ms95T, Festinduktivitaet, SMD, +NeosidInductorMs95 Ms95a Ms95T Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95a +Neosid,Inductor,Ms95, Ms95a, Ms95T, Festinduktivitaet, SMD, +NeosidInductorMs95 Ms95a Ms95T Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95T +Neosid,Inductor,Ms95, Ms95a, Ms95T, Festinduktivitaet, SMD, +NeosidInductorMs95 Ms95a Ms95T Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE95H +Neosid, Inductor,SM-NE95H, Festinduktivitaet, SMD, +Neosid Inductor SM-NE95H Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE127 +Neosid, Inductor, SM-NE127, Festinduktivitaet, SMD, +Neosid Inductor SM-NE127 Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE127_HandSoldering +Neosid, Inductor, SM-NE127, Festinduktivitaet, SMD, +Neosid Inductor SM-NE127 Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE150 +Neosid, Inductor, SM-NE150, Festinduktivitaet, SMD, +Neosid Inductor SM-NE150 Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0512H +Neosid, Inductor, PIC0512H, Power Inductor, Festinduktivitaet, SMD, +Neosid Inductor PIC0512H Power Inductor Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0602H +Neosid, Power Inductor, SM-PIC0602H, Festinduktivitaet, SMD, +Neosid Power Inductor SM-PIC0602H Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0612H +Neosid, Power Inductor, SM-PIC0612H, Festinduktivitaet, SMD, +Neosid Power Inductor SM-PIC0612H Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC1004H +Neosid, Inductor, SM-PIC1004H, Festinduktivitaet, SMD, +Neosid Inductor SM-PIC1004H Festinduktivitaet SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SMS-ME3010 +Neosid, Inductor, SMS-ME3010, Festinduktivitaet, SMD, magnetically shielded, +Neosid Inductor SMS-ME3010 Festinduktivitaet SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMS-ME3015 +Neosid, Power Inductor, SMS-ME3015, Festinduktivitaet, SMD, magnetically shielded, +Neosid Power Inductor SMS-ME3015 Festinduktivitaet SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs42 +Neosid, Inductor, SMs42, Festinduktivitaet, SMD, magneticaly shielded, +Neosid Inductor SMs42 Festinduktivitaet SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs50 +Neosid, Inductor, SMs50, Festinduktivitaet, SMD, magneticaly shielded, +Neosid Inductor SMs50 Festinduktivitaet SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs85 +Neosid, Inductor, SMs85, Festinduktivitaet, SMD, magnetically shielded, +Neosid Inductor SMs85 Festinduktivitaet SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs95_SMs95p +Neosid, Inductor, SMs95, Festinduktivitaet, SMD, magnetically shielded, +Neosid Inductor SMs95 Festinduktivitaet SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Pulse_PA4320 +Inductor SMD Pulse PA4320 http://productfinder.pulseeng.com/products/datasheets/P787.pdf +Inductor SMD Pulse PA4320 +0 +2 +2 +Inductor_SMD +L_Sagami_CER1242B +Inductor, Sagami, h=4.5mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CER1257B +Inductor, Sagami, h=6.0mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CER1277B +Inductor, Sagami, h=8.0mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CWR1242C +Sagami power inductor, CWR1242C, H=4.5mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_Sagami_CWR1257C +Sagami power inductor, CWR1242C, H=6.0mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_Sagami_CWR1277C +Sagami power inductor, CWR1242C, H=7.7mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_SigTra_SC3316F +http://www.signaltransformer.com/sites/all/pdf/smd/P080_SC3316F.pdf +Choke +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-1616 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-1616, 1.6mmx1.6mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-2020 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-2020, 2.0mmx2.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-3030 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-3030, 3.0mmx3.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-4040 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-4040, 4.0mmx4.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-5050 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-5050, 5.0mmx5.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-20xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-20xx, 2.0mmx2.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-20xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-20xx, 2.0mmx2.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-24xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-24xx, 2.4mmx2.4mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-24xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-24xx, 2.4mmx2.4mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-30xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-30xx, 3.0mmx3.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-30xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-30xx, 3.0mmx3.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-40xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-40xx, 4.0mmx4.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-40xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-40xx, 4.0mmx4.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-50xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-50xx, 4.9mmx4.9mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-50xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-50xx, 4.9mmx4.9mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-60xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-60xx, 6.0mmx6.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-60xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-60xx, 6.0mmx6.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-80xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-80xx, 8.0mmx8.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-80xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-80xx, 8.0mmx8.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_TDK_VLF10040 +Inductor,TDK, TDK-VLP-8040, 8.6mmx8.6mm +inductor TDK VLP smd VLF10040 +0 +2 +2 +Inductor_SMD +L_TDK_VLP8040 +Inductor,TDK, TDK-VLP-8040, 8.6mmx8.6mm +inductor TDK VLP smd VLP8040 +0 +2 +2 +Inductor_SMD +L_TracoPower_TCK-141 +Choke, SMD, 4.0x4.0mm 2.1mm height, https://www.tracopower.com/products/tck141.pdf +Choke SMD +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-1212 +Inductor, Vishay, IHLP series, 3.0mmx3.0mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-1616 +Inductor, Vishay, IHLP series, 4.1mmx4.1mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-2020 +Inductor, Vishay, IHLP series, 5.1mmx5.1mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-2525 +Inductor, Vishay, IHLP series, 6.3mmx6.3mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-4040 +Inductor, Vishay, IHLP series, 10.2mmx10.2mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-5050 +Inductor, Vishay, IHLP series, 12.7mmx12.7mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-6767 +Inductor, Vishay, IHLP series, 17.0mmx17.0mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-3825 +Inductor, Vishay, Vishay_IHSM-3825, http://www.vishay.com/docs/34018/ihsm3825.pdf, 11.2mmx6.3mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-4825 +Inductor, Vishay, Vishay_IHSM-4825, http://www.vishay.com/docs/34019/ihsm4825.pdf, 13.7mmx6.3mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-5832 +Inductor, Vishay, Vishay_IHSM-5832, http://www.vishay.com/docs/34020/ihsm5832.pdf, 16.3mmx8.1mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-7832 +Inductor, Vishay, Vishay_IHSM-7832, http://www.vishay.com/docs/34021/ihsm7832.pdf, 19.8mmx8.1mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1030 +Inductor, Wuerth Elektronik, Wuerth_HCI-1030, 10.6mmx10.6mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1040 +Inductor, Wuerth Elektronik, Wuerth_HCI-1040, 10.2mmx10.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1050 +Inductor, Wuerth Elektronik, Wuerth_HCI-1050, 10.2mmx10.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1335 +Inductor, Wuerth Elektronik, Wuerth_HCI-1335, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1350 +Inductor, Wuerth Elektronik, Wuerth_HCI-1350, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1365 +Inductor, Wuerth Elektronik, Wuerth_HCI-1365, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1890 +Inductor, Wuerth Elektronik, Wuerth_HCI-1890, 18.2mmx18.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-2212 +Inductor, Wuerth Elektronik, Wuerth_HCI-2212, 22.5mmx22.0mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-5040 +Inductor, Wuerth Elektronik, Wuerth_HCI-5040, 5.5mmx5.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7030 +Inductor, Wuerth Elektronik, Wuerth_HCI-7030, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7040 +Inductor, Wuerth Elektronik, Wuerth_HCI-7040, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7050 +Inductor, Wuerth Elektronik, Wuerth_HCI-7050, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1050 +Inductor, Wuerth Elektronik, Wuerth_HCM-1050, 10.2mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1052 +Inductor, Wuerth Elektronik, Wuerth_HCM-1052, 10.5mmx10.3mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1070 +Inductor, Wuerth Elektronik, Wuerth_HCM-1070, 10.1mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1078 +Inductor, Wuerth Elektronik, Wuerth_HCM-1078, 9.4mmx6.2mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1190 +Inductor, Wuerth Elektronik, Wuerth_HCM-1190, 10.5mmx11.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1240 +Inductor, Wuerth Elektronik, Wuerth_HCM-1240, 10.0mmx11.8mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1350 +Inductor, Wuerth Elektronik, Wuerth_HCM-1350, 13.5mmx13.3mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1390 +Inductor, Wuerth Elektronik, Wuerth_HCM-1390, 12.5mmx13.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-7050 +Inductor, Wuerth Elektronik, Wuerth_HCM-7050, 7.2mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-7070 +Inductor, Wuerth Elektronik, Wuerth_HCM-7070, 7.4mmx7.2mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-1610 +Inductor, Wuerth Elektronik, Wuerth_MAPI-1610, 1.6mmx1.6mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2010 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2010, 2.0mmx1.6mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2506 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2506, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2508 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2508, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2510 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2510, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2512 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2512, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3010 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3010, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3012 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3012, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3015 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3015, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3020 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3020, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-4020 +Inductor, Wuerth Elektronik, Wuerth_MAPI-4020, 4.0mmx4.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-4030 +Inductor, Wuerth Elektronik, Wuerth_MAPI-4030, 4.0mmx4.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-DD-Typ-L-Typ-XL-Typ-XXL +Choke, Double, Doppeldrossel, SMD, , Wuerth, WE-DD, Typ L, Typ XL, Typ XXL, +Choke Double Doppeldrossel SMD Wuerth WE-DD TypL TypXL TypXXL +0 +4 +4 +Inductor_SMD +L_Wuerth_WE-DD-Typ-M-Typ-S +Choke, Double, Doppeldrossel, SMD, , Wuerth, WE-DD, Typ M, Typ S, +Choke Double Doppeldrossel SMD Wuerth WE-DD TypM TypS +0 +4 +4 +Inductor_SMD +L_Wuerth_WE-PD-Typ-7345 +Choke, Drossel, WE-PD Typ LS, Wuerth, SMD, +Choke Drossel WE-PDTypLS Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-LS +Choke, Drossel, WE-PD Typ LS, Wuerth, SMD, +Choke Drossel WE-PDTypLS Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-LS_Handsoldering +Choke, Drossel, WE-PD Typ LS, Wuerth, SMD, Handsoldering, +Choke Drossel WE-PDTypLS Wuerth SMD Handsoldering +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-M-Typ-S +Choke, Drossel, WE-PD, Typ M, Typ S, Wuerth, SMD, +Choke Drossel WE-PD TypM TypS Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-M-Typ-S_Handsoldering +Choke, Drossel, WE-PD, Typ M, Typ S, Wuerth, SMD, Handsoldering, +Choke Drossel WE-PD TypM TypS Wuerth SMD Handsoldering +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-L +Choke, Drossel, WE-PD2, Typ L, Wuerth, SMD, +Choke Drossel WE-PD2 TypL Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-MS +Choke, Drossel, WE-PD2, Typ MS, Wuerth, SMD, +Choke Drossel WE-PD2 TypMS Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-XL +Choke, Drossel, WE-PD2, Typ XL, Wuerth, SMD, +Choke Drossel WE-PD2 TypXL Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD4-Typ-X +Choke, Drossel, WE-PD4, Typ X, Wuerth, SMD, +Choke Drossel WE-PD4 TypX Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PDF +Choke, Drossel, WE-PDF, Wuerth, SMD, +Choke Drossel WE-PDF Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PDF_Handsoldering +Choke, Drossel, WE-PDF, Handsoldering, Wuerth, SMD, +Choke Drossel WE-PDF Handsoldering Wuerth SMD +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-TPC-3816 +Inductor, WE-TPC, Wuerth, SMD, http://katalog.we-online.de/pbs/datasheet/744031220.pdf +Inductor WE-TPC Wuerth SMD +0 +10 +2 +Inductor_THT +Choke_EPCOS_B82722A +Current-Compensated Ring Core Double Chokes, EPCOS, B82722A, 22.3mmx22.7mm, https://en.tdk.eu/inf/30/db/ind_2008/b82722a_j.pdf +chokes epcos tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN102-04-14.0x14.0mm +Current-compensated Chokes, Scaffner, RN102-04, 14.0mmx14.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN112-04-17.7x17.1mm +Current-compensated Chokes, Scaffner, RN112-04, 17.7mmx17.1mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN114-04-22.5x21.5mm +Current-compensated Chokes, Scaffner, RN114-04, 22.5mmx21.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN116-04-22.5x21.5mm +Current-compensated Chokes, Scaffner, RN116-04, 22.5mmx21.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN122-04-28.0x27.0mm +Current-compensated Chokes, Scaffner, RN122-04, 28.0mmx27.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN142-04-33.1x32.5mm +Current-compensated Chokes, Scaffner, RN142-04, 33.1mmx32.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN143-04-33.1x32.5mm +Current-compensated Chokes, Scaffner, RN143-04, 33.1mmx32.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN152-04-43.0x41.8mm +Current-compensated Chokes, Scaffner, RN152-04, 43.0mmx41.8mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN202-04-8.8x18.2mm +Current-compensated Chokes, Scaffner, RN202-04, 8.8mmx18.2mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN204-04-9.0x14.0mm +Current-compensated Chokes, Scaffner, RN204-04, 9.0mmx14.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN212-04-12.5x18.0mm +Current-compensated Chokes, Scaffner, RN212-04, 12.5mmx18.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN214-04-15.5x23.0mm +Current-compensated Chokes, Scaffner, RN214-04, 15.5mmx23.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN216-04-15.5x23.0mm +Current-compensated Chokes, Scaffner, RN216-04, 15.5mmx23.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN222-04-18.0x31.0mm +Current-compensated Chokes, Scaffner, RN222-04, 18.0mmx31.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN232-04-18.0x31.0mm +Current-compensated Chokes, Scaffner, RN232-04, 18.0mmx31.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN242-04-18.0x31.0mm +Current-compensated Chokes, Scaffner, RN242-04, 18.0mmx31.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +L_Axial_L5.0mm_D3.6mm_P10.00mm_Horizontal_Murata_BL01RN1A2A2 +Inductor, Murata BL01RN1A2A2, Axial, Horizontal, pin pitch=10.00mm, length*diameter=5*3.6mm, https://www.murata.com/en-global/products/productdetail?partno=BL01RN1A2A2%23 +inductor axial horizontal +0 +2 +2 +Inductor_THT +L_Axial_L5.3mm_D2.2mm_P2.54mm_Vertical_Vishay_IM-1 +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.3*2.2mm^2, Vishay, IM-1, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Vertical pin pitch 2.54mm length 5.3mm diameter 2.2mm Vishay IM-1 +0 +2 +2 +Inductor_THT +L_Axial_L5.3mm_D2.2mm_P7.62mm_Horizontal_Vishay_IM-1 +Inductor, Axial series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=5.3*2.2mm^2, Vishay, IM-1, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Horizontal pin pitch 7.62mm length 5.3mm diameter 2.2mm Vishay IM-1 +0 +2 +2 +Inductor_THT +L_Axial_L5.3mm_D2.2mm_P10.16mm_Horizontal_Vishay_IM-1 +Inductor, Axial series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.3*2.2mm^2, Vishay, IM-1, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Horizontal pin pitch 10.16mm length 5.3mm diameter 2.2mm Vishay IM-1 +0 +2 +2 +Inductor_THT +L_Axial_L6.6mm_D2.7mm_P2.54mm_Vertical_Vishay_IM-2 +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=6.6*2.7mm^2, Vishay, IM-2, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Vertical pin pitch 2.54mm length 6.6mm diameter 2.7mm Vishay IM-2 +0 +2 +2 +Inductor_THT +L_Axial_L6.6mm_D2.7mm_P10.16mm_Horizontal_Vishay_IM-2 +Inductor, Axial series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=6.6*2.7mm^2, Vishay, IM-2, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Horizontal pin pitch 10.16mm length 6.6mm diameter 2.7mm Vishay IM-2 +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P2.54mm_Vertical_Fastron_MICC +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 2.54mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P5.08mm_Vertical_Fastron_MICC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P10.16mm_Horizontal_Fastron_MICC +Inductor, Axial series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 10.16mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P12.70mm_Horizontal_Fastron_MICC +Inductor, Axial series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 12.7mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P2.54mm_Vertical_Fastron_SMCC +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Vertical pin pitch 2.54mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P5.08mm_Vertical_Fastron_SMCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P12.70mm_Horizontal_Fastron_SMCC +Inductor, Axial series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Horizontal pin pitch 12.7mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P15.24mm_Horizontal_Fastron_SMCC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L11.0mm_D4.5mm_P5.08mm_Vertical_Fastron_MECC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=11*4.5mm^2, Fastron, MECC, http://www.fastrongroup.com/image-show/21/MECC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 11mm diameter 4.5mm Fastron MECC +0 +2 +2 +Inductor_THT +L_Axial_L11.0mm_D4.5mm_P7.62mm_Vertical_Fastron_MECC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=11*4.5mm^2, Fastron, MECC, http://www.fastrongroup.com/image-show/21/MECC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 11mm diameter 4.5mm Fastron MECC +0 +2 +2 +Inductor_THT +L_Axial_L11.0mm_D4.5mm_P15.24mm_Horizontal_Fastron_MECC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=11*4.5mm^2, Fastron, MECC, http://www.fastrongroup.com/image-show/21/MECC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 11mm diameter 4.5mm Fastron MECC +0 +2 +2 +Inductor_THT +L_Axial_L12.0mm_D5.0mm_P5.08mm_Vertical_Fastron_MISC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=12*5mm^2, Fastron, MISC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MISC.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 12mm diameter 5mm Fastron MISC +0 +2 +2 +Inductor_THT +L_Axial_L12.0mm_D5.0mm_P7.62mm_Vertical_Fastron_MISC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=12*5mm^2, Fastron, MISC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MISC.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 12mm diameter 5mm Fastron MISC +0 +2 +2 +Inductor_THT +L_Axial_L12.0mm_D5.0mm_P15.24mm_Horizontal_Fastron_MISC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=12*5mm^2, Fastron, MISC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MISC.pdf +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 12mm diameter 5mm Fastron MISC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P5.08mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P7.62mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P20.32mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P25.40mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L13.0mm_D4.5mm_P5.08mm_Vertical_Fastron_HCCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=13*4.5mm^2, Fastron, HCCC, http://www.fastrongroup.com/image-show/19/HCCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 13mm diameter 4.5mm Fastron HCCC +0 +2 +2 +Inductor_THT +L_Axial_L13.0mm_D4.5mm_P7.62mm_Vertical_Fastron_HCCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=13*4.5mm^2, Fastron, HCCC, http://www.fastrongroup.com/image-show/19/HCCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 13mm diameter 4.5mm Fastron HCCC +0 +2 +2 +Inductor_THT +L_Axial_L13.0mm_D4.5mm_P15.24mm_Horizontal_Fastron_HCCC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=13*4.5mm^2, Fastron, HCCC, http://www.fastrongroup.com/image-show/19/HCCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 13mm diameter 4.5mm Fastron HCCC +0 +2 +2 +Inductor_THT +L_Axial_L14.0mm_D4.5mm_P5.08mm_Vertical_Fastron_LACC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=14*4.5mm^2, Fastron, LACC, http://www.fastrongroup.com/image-show/20/LACC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 14mm diameter 4.5mm Fastron LACC +0 +2 +2 +Inductor_THT +L_Axial_L14.0mm_D4.5mm_P7.62mm_Vertical_Fastron_LACC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=14*4.5mm^2, Fastron, LACC, http://www.fastrongroup.com/image-show/20/LACC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 14mm diameter 4.5mm Fastron LACC +0 +2 +2 +Inductor_THT +L_Axial_L14.0mm_D4.5mm_P15.24mm_Horizontal_Fastron_LACC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=14*4.5mm^2, Fastron, LACC, http://www.fastrongroup.com/image-show/20/LACC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 14mm diameter 4.5mm Fastron LACC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P5.08mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P7.62mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P20.32mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P25.40mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P5.08mm_Vertical_Fastron_VHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P7.62mm_Vertical_Fastron_VHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P20.32mm_Horizontal_Fastron_VHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P25.40mm_Horizontal_Fastron_VHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P5.08mm_Vertical_Fastron_XHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P7.62mm_Vertical_Fastron_XHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P20.32mm_Horizontal_Fastron_XHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P25.40mm_Horizontal_Fastron_XHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D9.5mm_P5.08mm_Vertical_Vishay_IM-10-37 +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=16*9.5mm^2, Vishay, IM-10-37, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 16mm diameter 9.5mm Vishay IM-10-37 +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D9.5mm_P20.32mm_Horizontal_Vishay_IM-10-37 +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=16*9.5mm^2, Vishay, IM-10-37, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 16mm diameter 9.5mm Vishay IM-10-37 +0 +2 +2 +Inductor_THT +L_Axial_L17.5mm_D12.0mm_P7.62mm_Vertical_Vishay_IM-10-46 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=17.5*12mm^2, Vishay, IM-10-46, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 17.5mm diameter 12mm Vishay IM-10-46 +0 +2 +2 +Inductor_THT +L_Axial_L17.5mm_D12.0mm_P20.32mm_Horizontal_Vishay_IM-10-46 +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=17.5*12mm^2, Vishay, IM-10-46, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 17.5mm diameter 12mm Vishay IM-10-46 +0 +2 +2 +Inductor_THT +L_Axial_L20.0mm_D8.0mm_P5.08mm_Vertical +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=20*8mm^2 +Inductor Axial series Axial Vertical pin pitch 5.08mm length 20mm diameter 8mm +0 +2 +2 +Inductor_THT +L_Axial_L20.0mm_D8.0mm_P7.62mm_Vertical +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=20*8mm^2 +Inductor Axial series Axial Vertical pin pitch 7.62mm length 20mm diameter 8mm +0 +2 +2 +Inductor_THT +L_Axial_L20.0mm_D8.0mm_P25.40mm_Horizontal +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=20*8mm^2 +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 20mm diameter 8mm +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.1mm_P7.62mm_Vertical_Vishay_IHA-101 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=20.32*12.07mm^2, Vishay, IHA-101, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 20.32mm diameter 12.07mm Vishay IHA-101 +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.1mm_P28.50mm_Horizontal_Vishay_IHA-101 +Inductor, Axial series, Axial, Horizontal, pin pitch=28.5mm, , length*diameter=20.32*12.07mm^2, Vishay, IHA-101, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 28.5mm length 20.32mm diameter 12.07mm Vishay IHA-101 +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.7mm_P7.62mm_Vertical_Vishay_IHA-201 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=20.32*12.7mm^2, Vishay, IHA-201, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 20.32mm diameter 12.7mm Vishay IHA-201 +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.7mm_P25.40mm_Horizontal_Vishay_IHA-201 +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=20.32*12.7mm^2, Vishay, IHA-201, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 20.32mm diameter 12.7mm Vishay IHA-201 +0 +2 +2 +Inductor_THT +L_Axial_L23.4mm_D12.7mm_P7.62mm_Vertical_Vishay_IHA-203 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=23.37*12.7mm^2, Vishay, IHA-203, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 23.37mm diameter 12.7mm Vishay IHA-203 +0 +2 +2 +Inductor_THT +L_Axial_L23.4mm_D12.7mm_P32.00mm_Horizontal_Vishay_IHA-203 +Inductor, Axial series, Axial, Horizontal, pin pitch=32mm, , length*diameter=23.37*12.7mm^2, Vishay, IHA-203, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 32mm length 23.37mm diameter 12.7mm Vishay IHA-203 +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.1mm_P5.08mm_Vertical_Vishay_IM-10-28 +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=24*7.1mm^2, Vishay, IM-10-28, http://www.vishay.com/docs/34035/im10.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 24mm diameter 7.1mm Vishay IM-10-28 +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.1mm_P30.48mm_Horizontal_Vishay_IM-10-28 +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=24*7.1mm^2, Vishay, IM-10-28, http://www.vishay.com/docs/34035/im10.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 24mm diameter 7.1mm Vishay IM-10-28 +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.5mm_P5.08mm_Vertical_Fastron_MESC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=24*7.5mm^2, Fastron, MESC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MESC.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 24mm diameter 7.5mm Fastron MESC +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.5mm_P7.62mm_Vertical_Fastron_MESC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=24*7.5mm^2, Fastron, MESC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MESC.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 24mm diameter 7.5mm Fastron MESC +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.5mm_P27.94mm_Horizontal_Fastron_MESC +Inductor, Axial series, Axial, Horizontal, pin pitch=27.94mm, , length*diameter=24*7.5mm^2, Fastron, MESC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MESC.pdf +Inductor Axial series Axial Horizontal pin pitch 27.94mm length 24mm diameter 7.5mm Fastron MESC +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D9.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=26*9mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 26mm diameter 9mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D9.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26*9mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26mm diameter 9mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D9.0mm_P30.48mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=26*9mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 26mm diameter 9mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D10.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=26*10mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 26mm diameter 10mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D10.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26*10mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26mm diameter 10mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D10.0mm_P30.48mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=26*10mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 26mm diameter 10mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D11.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=26*11mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 26mm diameter 11mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D11.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26*11mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26mm diameter 11mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D11.0mm_P30.48mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=26*11mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 26mm diameter 11mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D12.1mm_P7.62mm_Vertical_Vishay_IHA-103 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26.67*12.07mm^2, Vishay, IHA-103, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26.67mm diameter 12.07mm Vishay IHA-103 +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D12.1mm_P35.00mm_Horizontal_Vishay_IHA-103 +Inductor, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=26.67*12.07mm^2, Vishay, IHA-103, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 35mm length 26.67mm diameter 12.07mm Vishay IHA-103 +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D14.0mm_P7.62mm_Vertical_Vishay_IHA-104 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26.67*13.97mm^2, Vishay, IHA-104, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26.67mm diameter 13.97mm Vishay IHA-104 +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D14.0mm_P35.00mm_Horizontal_Vishay_IHA-104 +Inductor, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=26.67*13.97mm^2, Vishay, IHA-104, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 35mm length 26.67mm diameter 13.97mm Vishay IHA-104 +0 +2 +2 +Inductor_THT +L_Axial_L29.9mm_D14.0mm_P7.62mm_Vertical_Vishay_IHA-105 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=29.85*13.97mm^2, Vishay, IHA-105, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 29.85mm diameter 13.97mm Vishay IHA-105 +0 +2 +2 +Inductor_THT +L_Axial_L29.9mm_D14.0mm_P38.00mm_Horizontal_Vishay_IHA-105 +Inductor, Axial series, Axial, Horizontal, pin pitch=38mm, , length*diameter=29.85*13.97mm^2, Vishay, IHA-105, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 38mm length 29.85mm diameter 13.97mm Vishay IHA-105 +0 +2 +2 +Inductor_THT +L_Axial_L30.0mm_D8.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=30*8mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 30mm diameter 8mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L30.0mm_D8.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=30*8mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 30mm diameter 8mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L30.0mm_D8.0mm_P35.56mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=35.56mm, , length*diameter=30*8mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 35.56mm length 30mm diameter 8mm Fastron 77A +0 +2 +2 +Inductor_THT +L_CommonMode_Toroid_Vertical_L19.3mm_W10.8mm_Px6.35mm_Py15.24mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=6.35*15.24mm^2, , length*width=19.304*10.795mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 6.35*15.24mm^2 length 19.304mm width 10.795mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L21.0mm_W10.0mm_Px5.08mm_Py12.70mm_muRATA_5100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=5.08*12.70mm^2, , length*width=21*10mm^2, muRATA, 5100, http://www.murata-ps.com/data/magnetics/kmp_5100.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 5.08*12.70mm^2 length 21mm width 10mm muRATA 5100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L24.0mm_W16.3mm_Px10.16mm_Py20.32mm_muRATA_5200 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=10.16*20.32mm^2, , length*width=24*16.3mm^2, muRATA, 5200, http://www.murata-ps.com/data/magnetics/kmp_5200.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 10.16*20.32mm^2 length 24mm width 16.3mm muRATA 5200 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L30.5mm_W15.2mm_Px10.16mm_Py20.32mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=10.16*20.32mm^2, , length*width=30.479999999999997*15.239999999999998mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 10.16*20.32mm^2 length 30.479999999999997mm width 15.239999999999998mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L34.3mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=34.29*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 34.29mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L36.8mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=36.83*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 36.83mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L38.1mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=38.099999999999994*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 38.099999999999994mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L39.4mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=39.37*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 39.37mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L41.9mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=41.91*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 41.91mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L43.2mm_W22.9mm_Px17.78mm_Py30.48mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=17.78*30.48mm^2, , length*width=43.18*22.86mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 17.78*30.48mm^2 length 43.18mm width 22.86mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-L +Wuerth, WE-CMB, Bauform L, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-M +Wuerth, WE-CMB, Bauform M, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-S +Wuerth, WE-CMB, Bauform S, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-XL +Wuerth, WE-CMB, Bauform XL, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-XS +Wuerth, WE-CMB, Bauform XS, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-XXL +Wuerth, WE-CMB, Bauform XXL, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM120 +Lodestone Pacific, 30.48mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM160 +Lodestone Pacific, 40.64mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM254 +Lodestone Pacific, 64.51mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM280 +Lodestone Pacific, 71.12mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Radial_D6.0mm_P4.00mm +Inductor, Radial series, Radial, pin pitch=4.00mm, , diameter=6.0mm, http://www.abracon.com/Magnetics/radial/AIUR-07.pdf +Inductor Radial series Radial pin pitch 4.00mm diameter 6.0mm +0 +2 +2 +Inductor_THT +L_Radial_D7.0mm_P3.00mm +Inductor, Radial series, Radial, pin pitch=3.00mm, , diameter=7mm, http://www.abracon.com/Magnetics/radial/AIUR-16.pdf +Inductor Radial series Radial pin pitch 3.00mm diameter 7mm +0 +2 +2 +Inductor_THT +L_Radial_D7.2mm_P3.00mm_MuRATA_1700 +Inductor, Radial series, Radial, pin pitch=3.00mm, , diameter=7.2mm, MuRATA, 1700, http://www.murata-ps.com/data/magnetics/kmp_1700.pdf +Inductor Radial series Radial pin pitch 3.00mm diameter 7.2mm MuRATA 1700 +0 +2 +2 +Inductor_THT +L_Radial_D7.5mm_P3.50mm_Fastron_07P +Inductor, Radial series, Radial, pin pitch=3.50mm, , diameter=7.5mm, Fastron, 07P, http://www.fastrongroup.com/image-show/39/07P.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 3.50mm diameter 7.5mm Fastron 07P +0 +2 +2 +Inductor_THT +L_Radial_D7.5mm_P5.00mm_Fastron_07P +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=7.5mm, Fastron, 07P, http://www.fastrongroup.com/image-show/39/07P.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 7.5mm Fastron 07P +0 +2 +2 +Inductor_THT +L_Radial_D7.8mm_P5.00mm_Fastron_07HCP +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=7.8mm, Fastron, 07HCP, http://www.abracon.com/Magnetics/radial/AISR875.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 7.8mm Fastron 07HCP +0 +2 +2 +Inductor_THT +L_Radial_D8.7mm_P5.00mm_Fastron_07HCP +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=8.7mm, Fastron, 07HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_07HCP.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 8.7mm Fastron 07HCP +0 +2 +2 +Inductor_THT +L_Radial_D9.5mm_P5.00mm_Fastron_07HVP +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=9.5mm, Fastron, 07HVP, http://www.fastrongroup.com/image-show/107/07HVP%2007HVP_T.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 9.5mm Fastron 07HVP +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Fastron_07M +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Fastron, 07M, http://www.fastrongroup.com/image-show/37/07M.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 10mm Fastron 07M +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Fastron_07P +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Fastron, 07P, http://www.fastrongroup.com/image-show/37/07M.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 10mm Fastron 07P +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Neosid_SD12k_style3 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10.0mm, Neosid, SD12k, style3, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12k.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 10.0mm Neosid SD12k style3 +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Neosid_SD12_style3 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10.0mm, Neosid, SD12, style3, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 10.0mm Neosid SD12 style3 +0 +2 +2 +Inductor_THT +L_Radial_D10.5mm_P5.00mm_Abacron_AISR-01 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10.5mm, Abacron, AISR-01, http://www.abracon.com/Magnetics/radial/AISR-01.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 10.5mm Abacron AISR-01 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P5.00mm_Fastron_11P +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=12.0mm, Fastron, 11P, http://cdn-reichelt.de/documents/datenblatt/B400/DS_11P.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 12.0mm Fastron 11P +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P5.00mm_Neosid_SD12k_style2 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=12.0mm, Neosid, SD12k, style2, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12k.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 12.0mm Neosid SD12k style2 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P5.00mm_Neosid_SD12_style2 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=12.0mm, Neosid, SD12, style2, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 12.0mm Neosid SD12 style2 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P6.00mm_MuRATA_1900R +Inductor, Radial series, Radial, pin pitch=6.00mm, , diameter=12.0mm, MuRATA, 1900R, http://www.murata-ps.com/data/magnetics/kmp_1900r.pdf +Inductor Radial series Radial pin pitch 6.00mm diameter 12.0mm MuRATA 1900R +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P10.00mm_Neosid_SD12k_style1 +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=12.0mm, Neosid, SD12k, style1, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12k.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 12.0mm Neosid SD12k style1 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P10.00mm_Neosid_SD12_style1 +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=12.0mm, Neosid, SD12, style1, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 12.0mm Neosid SD12 style1 +0 +2 +2 +Inductor_THT +L_Radial_D12.5mm_P7.00mm_Fastron_09HCP +Inductor, Radial series, Radial, pin pitch=7.00mm, , diameter=12.5mm, Fastron, 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf +Inductor Radial series Radial pin pitch 7.00mm diameter 12.5mm Fastron 09HCP +0 +2 +2 +Inductor_THT +L_Radial_D12.5mm_P9.00mm_Fastron_09HCP +Inductor, Radial series, Radial, pin pitch=9.00mm, , diameter=12.5mm, Fastron, 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf +Inductor Radial series Radial pin pitch 9.00mm diameter 12.5mm Fastron 09HCP +0 +2 +2 +Inductor_THT +L_Radial_D13.5mm_P7.00mm_Fastron_09HCP +Inductor, Radial series, Radial, pin pitch=7.00mm, , diameter=13.5mm, Fastron, 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf +Inductor Radial series Radial pin pitch 7.00mm diameter 13.5mm Fastron 09HCP +0 +2 +2 +Inductor_THT +L_Radial_D14.2mm_P10.00mm_Neosid_SD14 +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=14.2mm, Neosid, SD14, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd14.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 14.2mm Neosid SD14 +0 +2 +2 +Inductor_THT +L_Radial_D16.8mm_P11.43mm_Vishay_IHB-1 +Inductor, Radial series, Radial, pin pitch=11.43mm, , diameter=16.8mm, Vishay, IHB-1, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 11.43mm diameter 16.8mm Vishay IHB-1 +0 +2 +2 +Inductor_THT +L_Radial_D16.8mm_P12.07mm_Vishay_IHB-1 +Inductor, Radial series, Radial, pin pitch=12.07mm, , diameter=16.8mm, Vishay, IHB-1, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 12.07mm diameter 16.8mm Vishay IHB-1 +0 +2 +2 +Inductor_THT +L_Radial_D16.8mm_P12.70mm_Vishay_IHB-1 +Inductor, Radial series, Radial, pin pitch=12.70mm, , diameter=16.8mm, Vishay, IHB-1, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 12.70mm diameter 16.8mm Vishay IHB-1 +0 +2 +2 +Inductor_THT +L_Radial_D18.0mm_P10.00mm +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=18mm, http://www.abracon.com/Magnetics/radial/AIUR-15.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 18mm +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P14.61mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=14.61mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 14.61mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P15.00mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=15.00mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 15.00mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P15.24mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=15.24mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 15.24mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P15.75mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=15.75mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 15.75mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P19.00mm +Inductor, Radial series, Radial, pin pitch=19.00mm, , diameter=21mm, http://www.abracon.com/Magnetics/radial/AIRD02.pdf +Inductor Radial series Radial pin pitch 19.00mm diameter 21mm +0 +2 +2 +Inductor_THT +L_Radial_D24.0mm_P24.00mm +Inductor, Radial series, Radial, pin pitch=24.00mm, , diameter=24mm +Inductor Radial series Radial pin pitch 24.00mm diameter 24mm +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P22.90mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=22.90mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 22.90mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.10mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.10mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.10mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.40mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.40mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.40mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.70mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.70mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.70mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.90mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.90mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.90mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D27.9mm_P18.29mm_Vishay_IHB-3 +Inductor, Radial series, Radial, pin pitch=18.29mm, , diameter=27.9mm, Vishay, IHB-3, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 18.29mm diameter 27.9mm Vishay IHB-3 +0 +2 +2 +Inductor_THT +L_Radial_D27.9mm_P19.05mm_Vishay_IHB-3 +Inductor, Radial series, Radial, pin pitch=19.05mm, , diameter=27.9mm, Vishay, IHB-3, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 19.05mm diameter 27.9mm Vishay IHB-3 +0 +2 +2 +Inductor_THT +L_Radial_D27.9mm_P20.07mm_Vishay_IHB-3 +Inductor, Radial series, Radial, pin pitch=20.07mm, , diameter=27.9mm, Vishay, IHB-3, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 20.07mm diameter 27.9mm Vishay IHB-3 +0 +2 +2 +Inductor_THT +L_Radial_D28.0mm_P29.20mm +Inductor, Radial series, Radial, pin pitch=29.20mm, , diameter=28mm +Inductor Radial series Radial pin pitch 29.20mm diameter 28mm +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P28.30mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=28.30mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 28.30mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P28.50mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=28.50mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 28.50mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P28.80mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=28.80mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 28.80mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P29.00mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=29.00mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 29.00mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P29.30mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=29.30mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 29.30mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P26.16mm_Vishay_IHB-5 +Inductor, Radial series, Radial, pin pitch=26.16mm, , diameter=40.64mm, Vishay, IHB-5, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 26.16mm diameter 40.64mm Vishay IHB-5 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P27.18mm_Vishay_IHB-4 +Inductor, Radial series, Radial, pin pitch=27.18mm, , diameter=40.64mm, Vishay, IHB-4, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 27.18mm diameter 40.64mm Vishay IHB-4 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P27.94mm_Vishay_IHB-4 +Inductor, Radial series, Radial, pin pitch=27.94mm, , diameter=40.64mm, Vishay, IHB-4, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 27.94mm diameter 40.64mm Vishay IHB-4 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P27.94mm_Vishay_IHB-5 +Inductor, Radial series, Radial, pin pitch=27.94mm, , diameter=40.64mm, Vishay, IHB-5, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 27.94mm diameter 40.64mm Vishay IHB-5 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P28.70mm_Vishay_IHB-5 +Inductor, Radial series, Radial, pin pitch=28.70mm, , diameter=40.64mm, Vishay, IHB-5, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 28.70mm diameter 40.64mm Vishay IHB-5 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P33.27mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=33.27mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 33.27mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P34.29mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=34.29mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 34.29mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P35.81mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=35.81mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 35.81mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P36.32mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=36.32mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 36.32mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P38.86mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=38.86mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 38.86mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_L7.5mm_W4.6mm_P5.00mm_Neosid_SD75 +Inductor, Radial series, Radial, pin pitch=5.00mm, , length*width=7.5*4.6mm^2, Neosid, SD75, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd75.pdf +Inductor Radial series Radial pin pitch 5.00mm length 7.5mm width 4.6mm Neosid SD75 +0 +2 +2 +Inductor_THT +L_Radial_L8.0mm_W8.0mm_P5.00mm_Neosid_NE-CPB-07E +Inductor, Radial series, Radial, pin pitch=5.00mm, , length*width=8*8mm^2, Neosid, NE-CPB-07E, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB07E.pdf +Inductor Radial series Radial pin pitch 5.00mm length 8mm width 8mm Neosid NE-CPB-07E +0 +2 +2 +Inductor_THT +L_Radial_L8.0mm_W8.0mm_P5.00mm_Neosid_SD8 +Inductor, Radial series, Radial, pin pitch=5.00mm, , length*width=8*8mm^2, Neosid, SD8, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd8.pdf +Inductor Radial series Radial pin pitch 5.00mm length 8mm width 8mm Neosid SD8 +0 +2 +2 +Inductor_THT +L_Radial_L9.1mm_W9.1mm_Px6.35mm_Py6.35mm_Pulse_LP-25 +Inductor, Radial series, Radial, pin pitch=6.35*6.35mm^2, , length*width=9.14*9.14mm^2, Pulse, LP-25, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 6.35*6.35mm^2 length 9.14mm width 9.14mm Pulse LP-25 +0 +2 +2 +Inductor_THT +L_Radial_L10.2mm_W10.2mm_Px7.62mm_Py7.62mm_Pulse_LP-30 +Inductor, Radial series, Radial, pin pitch=7.62*7.62mm^2, , length*width=10.16*10.16mm^2, Pulse, LP-30, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 7.62*7.62mm^2 length 10.16mm width 10.16mm Pulse LP-30 +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.3mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.3mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.3mm +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.5mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.5mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.5mm +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.7mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.7mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.7mm +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.8mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.8mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.8mm +0 +2 +2 +Inductor_THT +L_Radial_L12.6mm_W12.6mm_Px9.52mm_Py9.52mm_Pulse_LP-37 +Inductor, Radial series, Radial, pin pitch=9.52*9.52mm^2, , length*width=12.57*12.57mm^2, Pulse, LP-37, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 9.52*9.52mm^2 length 12.57mm width 12.57mm Pulse LP-37 +0 +2 +2 +Inductor_THT +L_Radial_L16.1mm_W16.1mm_Px7.62mm_Py12.70mm_Pulse_LP-44 +Inductor, Radial series, Radial, pin pitch=7.62*12.70mm^2, , length*width=16.13*16.13mm^2, Pulse, LP-44, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 7.62*12.70mm^2 length 16.13mm width 16.13mm Pulse LP-44 +0 +2 +2 +Inductor_THT +L_SELF1408 +Self Ferrite 14 - 08 +SELF +0 +7 +3 +Inductor_THT +L_SELF1418 +Self Ferrite 14 - 18 +SELF +0 +10 +4 +Inductor_THT +L_Toroid_Horizontal_D3.2mm_P6.40mm_Diameter3-5mm_Amidon-T12 +L_Toroid, Horizontal series, Radial, pin pitch=6.40mm, , diameter=3.175mm, Diameter3-5mm, Amidon-T12 +L_Toroid Horizontal series Radial pin pitch 6.40mm diameter 3.175mm Diameter3-5mm Amidon-T12 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D4.1mm_P8.00mm_Diameter4-5mm_Amidon-T16 +L_Toroid, Horizontal series, Radial, pin pitch=8.00mm, , diameter=4.064mm, Diameter4-5mm, Amidon-T16 +L_Toroid Horizontal series Radial pin pitch 8.00mm diameter 4.064mm Diameter4-5mm Amidon-T16 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D5.1mm_P9.00mm_Diameter6-5mm_Amidon-T20 +L_Toroid, Horizontal series, Radial, pin pitch=9.00mm, , diameter=5.08mm, Diameter6-5mm, Amidon-T20 +L_Toroid Horizontal series Radial pin pitch 9.00mm diameter 5.08mm Diameter6-5mm Amidon-T20 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D6.5mm_P10.00mm_Diameter7-5mm_Amidon-T25 +L_Toroid, Horizontal series, Radial, pin pitch=10.00mm, , diameter=6.476999999999999mm, Diameter7-5mm, Amidon-T25 +L_Toroid Horizontal series Radial pin pitch 10.00mm diameter 6.476999999999999mm Diameter7-5mm Amidon-T25 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D7.8mm_P13.00mm_Diameter9-5mm_Amidon-T30 +L_Toroid, Horizontal series, Radial, pin pitch=13.00mm, , diameter=7.7978mm, Diameter9-5mm, Amidon-T30 +L_Toroid Horizontal series Radial pin pitch 13.00mm diameter 7.7978mm Diameter9-5mm Amidon-T30 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D9.5mm_P15.00mm_Diameter10-5mm_Amidon-T37 +L_Toroid, Horizontal series, Radial, pin pitch=15.00mm, , diameter=9.524999999999999mm, Diameter10-5mm, Amidon-T37 +L_Toroid Horizontal series Radial pin pitch 15.00mm diameter 9.524999999999999mm Diameter10-5mm Amidon-T37 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D11.2mm_P17.00mm_Diameter12-5mm_Amidon-T44 +L_Toroid, Horizontal series, Radial, pin pitch=17.00mm, , diameter=11.176mm, Diameter12-5mm, Amidon-T44 +L_Toroid Horizontal series Radial pin pitch 17.00mm diameter 11.176mm Diameter12-5mm Amidon-T44 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D12.7mm_P20.00mm_Diameter14-5mm_Amidon-T50 +L_Toroid, Horizontal series, Radial, pin pitch=20.00mm, , diameter=12.7mm, Diameter14-5mm, Amidon-T50 +L_Toroid Horizontal series Radial pin pitch 20.00mm diameter 12.7mm Diameter14-5mm Amidon-T50 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D16.8mm_P14.70mm_Vishay_TJ3 +L_Toroid, Horizontal series, Radial, pin pitch=14.70mm, , diameter=16.8mm, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 14.70mm diameter 16.8mm Vishay TJ3 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D16.8mm_P14.70mm_Vishay_TJ3_BigPads +L_Toroid, Horizontal series, Radial, pin pitch=14.70mm, , diameter=16.8mm, Vishay, TJ3, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 14.70mm diameter 16.8mm Vishay TJ3 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D17.3mm_P15.24mm_Bourns_2000 +L_Toroid, Horizontal series, Radial, pin pitch=15.24mm, , diameter=17.3mm, Bourns, 2000, http://www.bourns.com/docs/Product-Datasheets/2000_series.pdf?sfvrsn=5 +L_Toroid Horizontal series Radial pin pitch 15.24mm diameter 17.3mm Bourns 2000 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D21.8mm_P19.10mm_Bourns_2100 +L_Toroid, Horizontal series, Radial, pin pitch=19.10mm, , diameter=21.8mm, Bourns, 2100, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 19.10mm diameter 21.8mm Bourns 2100 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D21.8mm_P19.60mm_Bourns_2100 +L_Toroid, Horizontal series, Radial, pin pitch=19.60mm, , diameter=21.8mm, Bourns, 2100, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 19.60mm diameter 21.8mm Bourns 2100 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D22.4mm_P19.80mm_Vishay_TJ4 +L_Toroid, Horizontal series, Radial, pin pitch=19.80mm, , diameter=22.4mm, Vishay, TJ4, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 19.80mm diameter 22.4mm Vishay TJ4 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D24.1mm_P21.80mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=21.80mm, , diameter=24.1mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 21.80mm diameter 24.1mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D24.1mm_P23.10mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=23.10mm, , diameter=24.1mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 23.10mm diameter 24.1mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D25.4mm_P22.90mm_Vishay_TJ5 +L_Toroid, Horizontal series, Radial, pin pitch=22.90mm, , diameter=25.4mm, Vishay, TJ5, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 22.90mm diameter 25.4mm Vishay TJ5 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D25.4mm_P22.90mm_Vishay_TJ5_BigPads +L_Toroid, Horizontal series, Radial, pin pitch=22.90mm, , diameter=25.4mm, Vishay, TJ5, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 22.90mm diameter 25.4mm Vishay TJ5 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D26.0mm_P5.08mm +inductor 26mm diameter toroid +SELF INDUCTOR +0 +3 +2 +Inductor_THT +L_Toroid_Horizontal_D28.0mm_P25.10mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=25.10mm, , diameter=28mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 25.10mm diameter 28mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D28.0mm_P26.67mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=26.67mm, , diameter=28mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 26.67mm diameter 28mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D32.5mm_P28.90mm_Bourns_2300 +L_Toroid, Horizontal series, Radial, pin pitch=28.90mm, , diameter=32.5mm, Bourns, 2300, http://www.bourns.com/docs/Product-Datasheets/2300_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 28.90mm diameter 32.5mm Bourns 2300 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D32.5mm_P30.00mm_Bourns_2300 +L_Toroid, Horizontal series, Radial, pin pitch=30.00mm, , diameter=32.5mm, Bourns, 2300, http://www.bourns.com/docs/Product-Datasheets/2300_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 30.00mm diameter 32.5mm Bourns 2300 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D35.1mm_P31.00mm_Vishay_TJ6 +L_Toroid, Horizontal series, Radial, pin pitch=31.00mm, , diameter=35.1mm, Vishay, TJ6, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 31.00mm diameter 35.1mm Vishay TJ6 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D40.0mm_P48.26mm +L_Toroid, Horizontal series, Radial, pin pitch=48.26mm, , diameter=40mm +L_Toroid Horizontal series Radial pin pitch 48.26mm diameter 40mm +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D41.9mm_P37.60mm_Vishay_TJ7 +L_Toroid, Horizontal series, Radial, pin pitch=37.60mm, , diameter=41.9mm, Vishay, TJ7, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 37.60mm diameter 41.9mm Vishay TJ7 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D49.3mm_P44.60mm_Vishay_TJ8 +L_Toroid, Horizontal series, Radial, pin pitch=44.60mm, , diameter=49.3mm, Vishay, TJ8, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 44.60mm diameter 49.3mm Vishay TJ8 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D69.1mm_P63.20mm_Vishay_TJ9 +L_Toroid, Horizontal series, Radial, pin pitch=63.20mm, , diameter=69.1mm, Vishay, TJ9, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 63.20mm diameter 69.1mm Vishay TJ9 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L10.0mm_W5.0mm_P5.08mm +L_Toroid, Vertical series, Radial, pin pitch=5.08mm, , length*width=10*5mm^2 +L_Toroid Vertical series Radial pin pitch 5.08mm length 10mm width 5mm +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L13.0mm_W6.5mm_P5.60mm +L_Toroid, Vertical series, Radial, pin pitch=5.60mm, , length*width=13*6.5mm^2 +L_Toroid Vertical series Radial pin pitch 5.60mm length 13mm width 6.5mm +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L14.0mm_W5.6mm_P5.30mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=5.30mm, , length*width=14*5.6mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 5.30mm length 14mm width 5.6mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L14.0mm_W6.3mm_P4.57mm_Pulse_A +L_Toroid, Vertical series, Radial, pin pitch=4.57mm, , length*width=13.97*6.35mm^2, Pulse, A, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 4.57mm length 13.97mm width 6.35mm Pulse A +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L14.7mm_W8.6mm_P5.58mm_Pulse_KM-1 +L_Toroid, Vertical series, Radial, pin pitch=5.58mm, , length*width=14.73*8.64mm^2, Pulse, KM-1, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 5.58mm length 14.73mm width 8.64mm Pulse KM-1 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.0mm_W8.0mm_P7.62mm +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=16*8mm^2 +L_Toroid Vertical series Radial pin pitch 7.62mm length 16mm width 8mm +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.3mm_W7.1mm_P7.11mm_Pulse_H +L_Toroid, Vertical series, Radial, pin pitch=7.11mm, , length*width=16.26*7.11mm^2, Pulse, H, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.11mm length 16.26mm width 7.11mm Pulse H +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.4mm_W7.6mm_P6.60mm_Vishay_TJ3 +L_Toroid, Vertical series, Radial, pin pitch=6.60mm, , length*width=16.4*7.6mm^2, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 6.60mm length 16.4mm width 7.6mm Vishay TJ3 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.5mm_W11.4mm_P7.62mm_Pulse_KM-2 +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=16.51*11.43mm^2, Pulse, KM-2, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.62mm length 16.51mm width 11.43mm Pulse KM-2 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.8mm_W9.2mm_P7.10mm_Vishay_TJ3 +L_Toroid, Vertical series, Radial, pin pitch=7.10mm, , length*width=16.8*9.2mm^2, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 7.10mm length 16.8mm width 9.2mm Vishay TJ3 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.8mm_W9.2mm_P7.10mm_Vishay_TJ3_BigPads +L_Toroid, Vertical series, Radial, pin pitch=7.10mm, , length*width=16.8*9.2mm^2, Vishay, TJ3, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 7.10mm length 16.8mm width 9.2mm Vishay TJ3 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L17.8mm_W8.1mm_P7.62mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=17.8*8.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 7.62mm length 17.8mm width 8.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L17.8mm_W9.7mm_P7.11mm_Pulse_B +L_Toroid, Vertical series, Radial, pin pitch=7.11mm, , length*width=17.78*9.65mm^2, Pulse, B, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.11mm length 17.78mm width 9.65mm Pulse B +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L19.1mm_W8.1mm_P7.10mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=7.10mm, , length*width=19.1*8.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 7.10mm length 19.1mm width 8.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W8.4mm_P8.38mm_Pulse_G +L_Toroid, Vertical series, Radial, pin pitch=8.38mm, , length*width=21.59*8.38mm^2, Pulse, G, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 8.38mm length 21.59mm width 8.38mm Pulse G +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W9.1mm_P8.40mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=8.40mm, , length*width=21.6*9.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 8.40mm length 21.6mm width 9.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W9.5mm_P7.11mm_Pulse_C +L_Toroid, Vertical series, Radial, pin pitch=7.11mm, , length*width=21.59*9.53mm^2, Pulse, C, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.11mm length 21.59mm width 9.53mm Pulse C +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W11.4mm_P7.62mm_Pulse_KM-3 +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=21.59*11.43mm^2, Pulse, KM-3, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.62mm length 21.59mm width 11.43mm Pulse KM-3 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L22.4mm_W10.2mm_P7.90mm_Vishay_TJ4 +L_Toroid, Vertical series, Radial, pin pitch=7.90mm, , length*width=22.4*10.2mm^2, Vishay, TJ4, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 7.90mm length 22.4mm width 10.2mm Vishay TJ4 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L24.6mm_W15.5mm_P11.44mm_Pulse_KM-4 +L_Toroid, Vertical series, Radial, pin pitch=11.44mm, , length*width=24.64*15.5mm^2, Pulse, KM-4, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 11.44mm length 24.64mm width 15.5mm Pulse KM-4 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L25.4mm_W14.7mm_P12.20mm_Vishay_TJ5 +L_Toroid, Vertical series, Radial, pin pitch=12.20mm, , length*width=25.4*14.7mm^2, Vishay, TJ5, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 12.20mm length 25.4mm width 14.7mm Vishay TJ5 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L25.4mm_W14.7mm_P12.20mm_Vishay_TJ5_BigPads +L_Toroid, Vertical series, Radial, pin pitch=12.20mm, , length*width=25.4*14.7mm^2, Vishay, TJ5, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 12.20mm length 25.4mm width 14.7mm Vishay TJ5 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L26.7mm_W14.0mm_P10.16mm_Pulse_D +L_Toroid, Vertical series, Radial, pin pitch=10.16mm, , length*width=26.67*13.97mm^2, Pulse, D, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 10.16mm length 26.67mm width 13.97mm Pulse D +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L28.6mm_W14.3mm_P11.43mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=11.43mm, , length*width=28.6*14.3mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 11.43mm length 28.6mm width 14.3mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L31.8mm_W15.9mm_P13.50mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=13.50mm, , length*width=31.8*15.9mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 13.50mm length 31.8mm width 15.9mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L33.0mm_W17.8mm_P12.70mm_Pulse_KM-5 +L_Toroid, Vertical series, Radial, pin pitch=12.70mm, , length*width=33.02*17.78mm^2, Pulse, KM-5, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 12.70mm length 33.02mm width 17.78mm Pulse KM-5 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L35.1mm_W21.1mm_P18.50mm_Vishay_TJ6 +L_Toroid, Vertical series, Radial, pin pitch=18.50mm, , length*width=35.1*21.1mm^2, Vishay, TJ6, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 18.50mm length 35.1mm width 21.1mm Vishay TJ6 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L35.6mm_W17.8mm_P12.70mm_Pulse_E +L_Toroid, Vertical series, Radial, pin pitch=12.70mm, , length*width=35.56*17.78mm^2, Pulse, E, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 12.70mm length 35.56mm width 17.78mm Pulse E +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L41.9mm_W17.8mm_P12.70mm_Pulse_F +L_Toroid, Vertical series, Radial, pin pitch=12.70mm, , length*width=41.91*17.78mm^2, Pulse, F, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 12.70mm length 41.91mm width 17.78mm Pulse F +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L41.9mm_W19.1mm_P15.80mm_Vishay_TJ7 +L_Toroid, Vertical series, Radial, pin pitch=15.80mm, , length*width=41.9*19.1mm^2, Vishay, TJ7, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 15.80mm length 41.9mm width 19.1mm Vishay TJ7 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L46.0mm_W19.1mm_P21.80mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=21.80mm, , length*width=46*19.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 21.80mm length 46mm width 19.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L48.8mm_W25.4mm_P20.80mm_Vishay_TJ8 +L_Toroid, Vertical series, Radial, pin pitch=20.80mm, , length*width=48.8*25.4mm^2, Vishay, TJ8, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 20.80mm length 48.8mm width 25.4mm Vishay TJ8 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L54.0mm_W23.8mm_P20.10mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=20.10mm, , length*width=54*23.8mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 20.10mm length 54mm width 23.8mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L67.6mm_W36.1mm_P31.80mm_Vishay_TJ9 +L_Toroid, Vertical series, Radial, pin pitch=31.80mm, , length*width=67.6*36.1mm^2, Vishay, TJ9, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 31.80mm length 67.6mm width 36.1mm Vishay TJ9 +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged2Bar_Pad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, bridged with 2 copper strips +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged2Bar_RoundedPad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, bridged with 2 copper strips +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged_Pad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, bridged with 1 copper strip +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged_RoundedPad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, bridged with 1 copper strip +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Open_Pad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, open +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Open_RoundedPad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, open +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Open_TrianglePad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open +solder jumper open +0 +2 +2 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_Pad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_Pad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_RoundedPad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_RoundedPad1.0x1.5mm_NumberLabels +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_Pad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_Pad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm_NumberLabels +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_Pad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm Pads, 0.3mm gap, open +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_Pad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, open, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_RoundedPad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, open +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_RoundedPad1.0x1.5mm_NumberLabels +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, open, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P2.0mm_Open_TrianglePad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open +solder jumper open +0 +5 +3 +Jumper +SolderJumper-3_P2.0mm_Open_TrianglePad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open, labeled with numbers +solder jumper open +0 +5 +3 +LED_SMD +LED-APA102-2020 +http://www.led-color.com/upload/201604/APA102-2020%20SMD%20LED.pdf +LED RGB SPI +0 +8 +6 +LED_SMD +LED-L1T2_LUMILEDS +http://www.lumileds.com/uploads/438/DS133-pdf +LUMILEDS LUXEON TX L1T2 LED +0 +3 +3 +LED_SMD +LED_1W_3W_R8 +https://www.gme.cz/data/attachments/dsh.518-234.1.pdf +LED 1W 3W 5W +0 +3 +3 +LED_SMD +LED_0201_0603Metric +LED SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +LED +0 +4 +2 +LED_SMD +LED_0402_1005Metric +LED SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_0603_1608Metric +LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_0603_1608Metric_Castellated +LED SMD 0603 (1608 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_0603_1608Metric_Pad1.05x0.95mm_HandSolder +LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_0805_2012Metric +LED SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_0805_2012Metric_Castellated +LED SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_0805_2012Metric_Pad1.15x1.40mm_HandSolder +LED SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_01005_0402Metric +LED SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +LED +0 +4 +2 +LED_SMD +LED_1206_3216Metric +LED SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_1206_3216Metric_Castellated +LED SMD 1206 (3216 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1206_3216Metric_Pad1.42x1.75mm_HandSolder +LED SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_1206_3216Metric_ReverseMount_Hole1.8x2.4mm +LED SMD 1206 (3216 Metric), reverse mount, square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode reverse +0 +2 +2 +LED_SMD +LED_1210_3225Metric +LED SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_1210_3225Metric_Castellated +LED SMD 1210 (3225 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1210_3225Metric_Pad1.42x2.65mm_HandSolder +LED SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_1806_4516Metric +LED SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_1806_4516Metric_Castellated +LED SMD 1806 (4516 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1806_4516Metric_Pad1.57x1.80mm_HandSolder +LED SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_1812_4532Metric +LED SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_1812_4532Metric_Castellated +LED SMD 1812 (4532 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1812_4532Metric_Pad1.30x3.40mm_HandSolder +LED SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_2010_5025Metric +LED SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_2010_5025Metric_Castellated +LED SMD 2010 (5025 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_2010_5025Metric_Pad1.52x2.65mm_HandSolder +LED SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_2512_6332Metric +LED SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_2512_6332Metric_Castellated +LED SMD 2512 (6332 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_2512_6332Metric_Pad1.52x3.35mm_HandSolder +LED SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_2816_7142Metric +LED SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +LED_SMD +LED_2816_7142Metric_Castellated +LED SMD 2816 (7142 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_2816_7142Metric_Pad3.20x4.45mm_HandSolder +LED SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_Avago_PLCC4_3.2x2.8mm_CW +https://docs.broadcom.com/docs/AV02-4186EN +LED Avago PLCC-4 ASMB-MTB0-0A3A2 +0 +4 +4 +LED_SMD +LED_Avago_PLCC6_3x2.8mm +https://docs.broadcom.com/docs/AV02-3793EN +LED Avago PLCC-6 ASMT-YTB7-0AA02 +0 +6 +6 +LED_SMD +LED_Cree-PLCC4_2x2mm_CW +2.0mm x 2.0mm PLCC4 LED, http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/HB/Data-Sheets/CLMVBFKA.pdf +LED Cree PLCC-4 +0 +4 +4 +LED_SMD +LED_Cree-PLCC4_3.2x2.8mm_CCW +3.2mm x 2.8mm PLCC4 LED, http://www.cree.com/led-components/media/documents/CLV1AFKB(874).pdf +LED Cree PLCC-4 +0 +4 +4 +LED_SMD +LED_Cree-PLCC4_5x5mm_CW +5.0mm x 5.0mm PLCC4 LED +LED Cree PLCC-4 +0 +4 +4 +LED_SMD +LED_Cree-PLCC6_4.7x1.5mm +4.7mm x 1.5mm PLCC6 LED, http://www.cree.com/led-components/media/documents/1381-QLS6AFKW.pdf +LED Cree PLCC-6 +0 +6 +6 +LED_SMD +LED_Cree-XB +http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/XLampXBD.pdf +LED Cree XB +0 +5 +3 +LED_SMD +LED_Cree-XH +http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds-XHB.pdf +LED Cree XH +0 +8 +2 +LED_SMD +LED_Cree-XHP35 +http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds--XHP35.pdf +LED Cree XHP35 +0 +6 +3 +LED_SMD +LED_Cree-XHP50_6V +Cree XHP50, 6V footprint, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP50.pdf +LED Cree XHP50 +0 +17 +3 +LED_SMD +LED_Cree-XHP50_12V +Cree XHP50, 12V footprint, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP50.pdf +LED XHP50 Cree +0 +15 +3 +LED_SMD +LED_Cree-XHP70_6V +Cree XHP70 LED, 6V version, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP70.pdf +LED Cree XHP70 +0 +17 +3 +LED_SMD +LED_Cree-XHP70_12V +Cree XHP70 LED, 12V version, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP70.pdf +LED Cree XHP70 +0 +15 +3 +LED_SMD +LED_Cree-XP +LED Cree-XP http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/XLampXPE2.pdf +LED Cree XP +0 +6 +3 +LED_SMD +LED_Cree-XP-G +LED Cree-XP-G http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/XLampXPG.pdf +LED Cree XP-G +0 +6 +3 +LED_SMD +LED_Cree-XQ +LED Cree-XQ http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds-XQB.pdf +LED Cree XQ +0 +2 +2 +LED_SMD +LED_Cree-XQ_HandSoldering +LED Cree-XQ handsoldering pads http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds-XQB.pdf +LED Cree XQ +0 +2 +2 +LED_SMD +LED_Inolux_IN-PI554FCH_PLCC4_5.0x5.0mm_P3.2mm +http://www.inolux-corp.com/datasheet/SMDLED/Addressable%20LED/IN-PI554FCH.pdf +RGB LED NeoPixel addressable +0 +4 +4 +LED_SMD +LED_Kingbright_AAA3528ESGCT +Kingbright, dual LED, 3.5 x 2.8 mm Surface Mount LED Lamp (http://www.kingbrightusa.com/images/catalog/SPEC/AAA3528ESGCT.pdf) +dual led smd +0 +4 +4 +LED_SMD +LED_Kingbright_APFA3010_3x1.5mm_Horizontal +LED RGB, APFA3010, http://www.kingbrightusa.com/images/catalog/SPEC/APFA3010LSEEZGKQBKC.pdf +LED RGB APFA3010 KINGBRIGHT 3x1.5mm +0 +4 +4 +LED_SMD +LED_miniPLCC_2315 +https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DAV02-2205EN_DS_ASMT-TxBM_2014-05-09.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430858274704&ssbinary=true +LED +0 +2 +2 +LED_SMD +LED_miniPLCC_2315_Handsoldering +https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DAV02-2205EN_DS_ASMT-TxBM_2014-05-09.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430858274704&ssbinary=true +LED +0 +2 +2 +LED_SMD +LED_PLCC-2 +LED PLCC-2 SMD package +LED PLCC-2 SMD +0 +2 +2 +LED_SMD +LED_PLCC_2835 +http://www.everlight.com/file/ProductFile/67-21S-KK2C-H4040QAR32835Z15-2T.pdf +LED +0 +2 +2 +LED_SMD +LED_PLCC_2835_Handsoldering +http://www.everlight.com/file/ProductFile/67-21S-KK2C-H4040QAR32835Z15-2T.pdf +LED +0 +2 +2 +LED_SMD +LED_RGB_1210 +RGB LED 3.2x2.7mm http://www.avagotech.com/docs/AV02-0610EN +LED 3227 +0 +4 +4 +LED_SMD +LED_RGB_5050-6 +http://cdn.sparkfun.com/datasheets/Components/LED/5060BRG4.pdf +RGB LED 5050-6 +0 +6 +6 +LED_SMD +LED_RGB_Cree-PLCC-6_6x5mm_P2.1mm +http://www.farnell.com/datasheets/2003905.pdf +LED RGB PLCC-6 CLP6C-FBK +0 +6 +6 +LED_SMD +LED_RGB_Getian_GT-P6PRGB4303 +https://www.gme.sk/img/cache/doc/518/177/vykonova-led-getian-gt-p6prgb4303-datasheet-1.pdf +LED RGB +0 +7 +7 +LED_SMD +LED_RGB_PLCC-6 +RGB LED PLCC-6 +RGB LED PLCC-6 +0 +6 +6 +LED_SMD +LED_ROHM_SMLVN6 +https://www.rohm.com/datasheet/SMLVN6RGB1U +LED ROHM SMLVN6 +0 +6 +6 +LED_SMD +LED_SK6805_PLCC4_2.4x2.7mm_P1.3mm +https://cdn-shop.adafruit.com/product-files/3484/3484_Datasheet.pdf +LED RGB NeoPixel Nano +0 +4 +4 +LED_SMD +LED_SK6812MINI_PLCC4_3.5x3.5mm_P1.75mm +https://cdn-shop.adafruit.com/product-files/2686/SK6812MINI_REV.01-1-2.pdf +LED RGB NeoPixel Mini +0 +4 +4 +LED_SMD +LED_SK6812_PLCC4_5.0x5.0mm_P3.2mm +https://cdn-shop.adafruit.com/product-files/1138/SK6812+LED+datasheet+.pdf +LED RGB NeoPixel +0 +4 +4 +LED_SMD +LED_WS2812B_PLCC4_5.0x5.0mm_P3.2mm +https://cdn-shop.adafruit.com/datasheets/WS2812B.pdf +LED RGB NeoPixel +0 +4 +4 +LED_SMD +LED_WS2812_PLCC6_5.0x5.0mm_P1.6mm +https://cdn-shop.adafruit.com/datasheets/WS2812.pdf +LED RGB NeoPixel +0 +6 +6 +LED_THT +LED_BL-FL7680RGB +'Piranha' RGB LED, through hole, common anode, 7.62x7.62mm, BGRA pin order, https://cdn-shop.adafruit.com/datasheets/BL-FL7680RGB.pdf +RGB LED Piranha Super-Flux BetLux +0 +4 +4 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O1.27mm_Z1.6mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O1.27mm_Z4.9mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O1.27mm_Z8.2mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O3.81mm_Z1.6mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O3.81mm_Z4.9mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O3.81mm_Z8.2mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O6.35mm_Z1.6mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O6.35mm_Z4.9mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O6.35mm_Z8.2mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W3.3mm_H2.4mm +LED, Round, Rectangular size 3.3x2.4mm^2 diameter 1.8mm, 2 pins +LED Round Rectangular size 3.3x2.4mm^2 diameter 1.8mm 2 pins +0 +2 +2 +LED_THT +LED_D2.0mm_W4.0mm_H2.8mm_FlatTop +LED, Round, FlatTop, Rectangular size 4.0x2.8mm^2 diameter 2.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-1034IDT(Ver.9A).pdf +LED Round FlatTop Rectangular size 4.0x2.8mm^2 diameter 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D2.0mm_W4.8mm_H2.5mm_FlatTop +LED, Round, FlatTop, Rectangular size 4.8x2.5mm^2 diameter 2.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-13GD(Ver.11B).pdf +LED Round FlatTop Rectangular size 4.8x2.5mm^2 diameter 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm +LED, diameter 3.0mm, 2 pins +LED diameter 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm-3 +LED, diameter 3.0mm, 2 pins, diameter 3.0mm, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-3VSURKCGKC(Ver.8A).pdf +LED diameter 3.0mm 2 pins diameter 3.0mm 3 pins +0 +3 +3 +LED_THT +LED_D3.0mm_Clear +IR-LED, diameter 3.0mm, 2 pins, color: clear +IR infrared LED diameter 3.0mm 2 pins clear +0 +2 +2 +LED_THT +LED_D3.0mm_FlatTop +LED, Round, FlatTop, diameter 3.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-47XEC(Ver.9A).pdf +LED Round FlatTop diameter 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm_Clear +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm_IRBlack +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm_IRGrey +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z6.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z10.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O3.81mm_Z2.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O3.81mm_Z6.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O3.81mm_Z10.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O6.35mm_Z2.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O6.35mm_Z6.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O6.35mm_Z10.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_IRBlack +IR-ED, diameter 3.0mm, 2 pins, color: black +IR infrared LED diameter 3.0mm 2 pins black +0 +2 +2 +LED_THT +LED_D3.0mm_IRGrey +IR-LED, diameter 3.0mm, 2 pins, color: grey +IR infrared LED diameter 3.0mm 2 pins grey +0 +2 +2 +LED_THT +LED_D4.0mm +LED, diameter 4.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-43GD(Ver.12B).pdf +LED diameter 4.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm-3 +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-59EGC(Ver.17A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins +0 +3 +3 +LED_THT +LED_D5.0mm-3_Horizontal_O3.81mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 3 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 3 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +3 +3 +LED_THT +LED_D5.0mm-4_RGB +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, diameter 5.0mm, 4 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-154A4SUREQBFZGEW(Ver.9A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins diameter 5.0mm 4 pins RGB RGBLED +0 +4 +4 +LED_THT +LED_D5.0mm-4_RGB_Staggered_Pins +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, diameter 5.0mm, 4 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-154A4SUREQBFZGEW(Ver.9A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins diameter 5.0mm 4 pins RGB RGBLED +0 +4 +4 +LED_THT +LED_D5.0mm-4_RGB_Wide_Pins +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, diameter 5.0mm, 4 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-154A4SUREQBFZGEW(Ver.9A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins diameter 5.0mm 4 pins RGB RGBLED +0 +4 +4 +LED_THT +LED_D5.0mm_Clear +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_FlatTop +LED, Round, FlatTop, diameter 5.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-483GDT(Ver.15B).pdf +LED Round FlatTop diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm_Clear +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm_IRBlack +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm_IRGrey +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z9.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z15.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O3.81mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O3.81mm_Z9.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O3.81mm_Z15.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O6.35mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O6.35mm_Z9.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O6.35mm_Z15.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_IRBlack +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_IRGrey +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D8.0mm +LED, diameter 8.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LED8MMGE_LED8MMGN_LED8MMRT%23KIN.pdf +LED diameter 8.0mm 2 pins +0 +2 +2 +LED_THT +LED_D8.0mm-3 +LED, diameter 8.0mm, 2 pins, diameter 8.0mm, 3 pins +LED diameter 8.0mm 2 pins diameter 8.0mm 3 pins +0 +3 +3 +LED_THT +LED_D10.0mm +LED, diameter 10.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LED10-4500RT%23KIN.pdf +LED diameter 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D10.0mm-3 +LED, diameter 10.0mm, 2 pins, diameter 10.0mm, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-819EGW(Ver.14A).pdf +LED diameter 10.0mm 2 pins diameter 10.0mm 3 pins +0 +3 +3 +LED_THT +LED_D20.0mm +LED, diameter 20.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/DLC2-6GD%28V6%29.pdf +LED diameter 20.0mm 2 pins +0 +2 +2 +LED_THT +LED_Oval_W5.2mm_H3.8mm +LED_Oval, Oval, Oval size 5.2x3.8mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-5603QBC-D(Ver.12B).pdf +LED_Oval Oval Oval size 5.2x3.8mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.0mm_H2.0mm +LED_Rectangular, Rectangular, Rectangular size 3.0x2.0mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 3.0x2.0mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.9mm_H1.8mm +LED_Rectangular, Rectangular, Rectangular size 3.9x1.8mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-2774GD(Ver.7B).pdf +LED_Rectangular Rectangular Rectangular size 3.9x1.8mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.9mm_H1.8mm_FlatTop +LED_Rectangular, Rectangular, Rectangular size 3.9x1.8mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-2774GD(Ver.7B).pdf +LED_Rectangular Rectangular Rectangular size 3.9x1.8mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.9mm_H1.9mm +LED_Rectangular, Rectangular, Rectangular size 3.9x1.9mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-144GDT(Ver.14B).pdf +LED_Rectangular Rectangular Rectangular size 3.9x1.9mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm-3Pins +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 3 pins +0 +3 +3 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O1.27mm_Z1.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O1.27mm_Z3.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O1.27mm_Z5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O3.81mm_Z1.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O3.81mm_Z3.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O3.81mm_Z5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O6.35mm_Z1.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O6.35mm_Z3.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O6.35mm_Z5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x5.0mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 5.0x5.0mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W7.62mm_H4.55mm_P5.08mm_R3 +Datasheet can be found at https://www.gme.cz/data/attachments/dsh.511-795.1.pdf +LED automotive super flux 7.62mm +0 +4 +2 +LED_THT +LED_SideEmitter_Rectangular_W4.5mm_H1.6mm +LED_SideEmitter_Rectangular, Rectangular, SideEmitter, Rectangular size 4.5x1.6mm^2, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LED15MMGE_LED15MMGN%23KIN.pdf +LED_SideEmitter_Rectangular Rectangular SideEmitter Rectangular size 4.5x1.6mm^2 2 pins +0 +2 +2 +LED_THT +LED_VCCLite_5381H1_6.35x6.35mm +Red 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Red 5381 Series LED +0 +2 +2 +LED_THT +LED_VCCLite_5381H3_6.35x6.35mm +Amber 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Amber 5381 Series LED +0 +2 +2 +LED_THT +LED_VCCLite_5381H5_6.35x6.35mm +Green 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Green 5381 Series LED +0 +2 +2 +LED_THT +LED_VCCLite_5381H7_6.35x6.35mm +Yellow 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Yellow 5381 Series LED +0 +2 +2 +Module +A20_OLINUXINO_LIME2 +A20 Olinuxino LIME2, 1.2GHz, 512-1024MB RAM, Micro-SD, NAND or eMMC, 1000Mbit Ethernet +A20 Olimex Olinuxino LIME2 development board +0 +180 +180 +Module +Adafruit_HUZZAH_ESP8266_breakout +32-bit microcontroller module with WiFi, https://www.adafruit.com/product/2471 +ESP8266 WiFi microcontroller +0 +20 +20 +Module +Adafruit_HUZZAH_ESP8266_breakout_WithMountingHoles +32-bit microcontroller module with WiFi, https://www.adafruit.com/product/2471 +ESP8266 WiFi microcontroller +0 +20 +20 +Module +Arduino_Nano +Arduino Nano, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino Nano +0 +30 +30 +Module +Arduino_Nano_WithMountingHoles +Arduino Nano, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino Nano +0 +30 +30 +Module +Arduino_UNO_R2 +Arduino UNO R2, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R2 +0 +30 +30 +Module +Arduino_UNO_R2_WithMountingHoles +Arduino UNO R2, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R2 +0 +30 +30 +Module +Arduino_UNO_R3 +Arduino UNO R3, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R3 +0 +32 +32 +Module +Arduino_UNO_R3_WithMountingHoles +Arduino UNO R3, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R3 +0 +32 +32 +Module +BeagleBoard_PocketBeagle +PocketBeagle, https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#71_Expansion_Header_Connectors +PocketBeagle +0 +72 +72 +Module +Maple_Mini +Maple Mini, http://docs.leaflabs.com/static.leaflabs.com/pub/leaflabs/maple-docs/0.0.12/hardware/maple-mini.html +Maple Mini +0 +40 +40 +Module +Onion_Omega2+ +https://onion.io/omega2/ +Omega Onion module +0 +32 +32 +Module +Pololu_Breakout-16_15.2x20.3mm +Pololu Breakout 16-pin 15.2x20.3mm 0.6x0.8\ +Pololu Breakout +0 +16 +16 +Module +Raspberry_Pi_Zero_Socketed_THT_FaceDown_MountingHoles +Raspberry Pi Zero using through hole straight pin socket, 2x20, 2.54mm pitch, https://www.raspberrypi.org/documentation/hardware/raspberrypi/mechanical/rpi_MECH_Zero_1p2.pdf +raspberry pi zero through hole +0 +40 +40 +Module +ST_Morpho_Connector_144_STLink +ST Morpho Connector 144 With STLink +ST Morpho Connector 144 STLink +0 +148 +148 +Module +ST_Morpho_Connector_144_STLink_MountingHoles +ST Morpho Connector 144 With STLink +ST Morpho Connector 144 STLink +0 +148 +148 +Module +WEMOS_D1_mini_light +16-pin module, column spacing 22.86 mm (900 mils), https://wiki.wemos.cc/products:d1:d1_mini, https://c1.staticflickr.com/1/734/31400410271_f278b087db_z.jpg +ESP8266 WiFi microcontroller +0 +16 +16 +MountingHole +MountingHole_2.1mm +Mounting Hole 2.1mm, no annular +mounting hole 2.1mm no annular +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2 +Mounting Hole 2.2mm, no annular, M2 +mounting hole 2.2mm no annular m2 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_DIN965 +Mounting Hole 2.2mm, no annular, M2, DIN965 +mounting hole 2.2mm no annular m2 din965 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_DIN965_Pad +Mounting Hole 2.2mm, M2, DIN965 +mounting hole 2.2mm m2 din965 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_ISO7380 +Mounting Hole 2.2mm, no annular, M2, ISO7380 +mounting hole 2.2mm no annular m2 iso7380 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_ISO7380_Pad +Mounting Hole 2.2mm, M2, ISO7380 +mounting hole 2.2mm m2 iso7380 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_ISO14580 +Mounting Hole 2.2mm, no annular, M2, ISO14580 +mounting hole 2.2mm no annular m2 iso14580 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_ISO14580_Pad +Mounting Hole 2.2mm, M2, ISO14580 +mounting hole 2.2mm m2 iso14580 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_Pad +Mounting Hole 2.2mm, M2 +mounting hole 2.2mm m2 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_Pad_Via +Mounting Hole 2.2mm, M2 +mounting hole 2.2mm m2 +0 +9 +1 +MountingHole +MountingHole_2.5mm +Mounting Hole 2.5mm, no annular +mounting hole 2.5mm no annular +0 +0 +0 +MountingHole +MountingHole_2.5mm_Pad +Mounting Hole 2.5mm +mounting hole 2.5mm +0 +1 +1 +MountingHole +MountingHole_2.5mm_Pad_Via +Mounting Hole 2.5mm +mounting hole 2.5mm +0 +9 +1 +MountingHole +MountingHole_2.7mm +Mounting Hole 2.7mm, no annular +mounting hole 2.7mm no annular +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5 +Mounting Hole 2.7mm, no annular, M2.5 +mounting hole 2.7mm no annular m2.5 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_DIN965 +Mounting Hole 2.7mm, no annular, M2.5, DIN965 +mounting hole 2.7mm no annular m2.5 din965 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_DIN965_Pad +Mounting Hole 2.7mm, M2.5, DIN965 +mounting hole 2.7mm m2.5 din965 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO7380 +Mounting Hole 2.7mm, no annular, M2.5, ISO7380 +mounting hole 2.7mm no annular m2.5 iso7380 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_ISO7380_Pad +Mounting Hole 2.7mm, M2.5, ISO7380 +mounting hole 2.7mm m2.5 iso7380 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO14580 +Mounting Hole 2.7mm, no annular, M2.5, ISO14580 +mounting hole 2.7mm no annular m2.5 iso14580 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_ISO14580_Pad +Mounting Hole 2.7mm, M2.5, ISO14580 +mounting hole 2.7mm m2.5 iso14580 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_Pad +Mounting Hole 2.7mm, M2.5 +mounting hole 2.7mm m2.5 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_Pad_Via +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +9 +1 +MountingHole +MountingHole_2.7mm_Pad +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +1 +1 +MountingHole +MountingHole_2.7mm_Pad_Via +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +9 +1 +MountingHole +MountingHole_2mm +Mounting Hole 2mm, no annular +mounting hole 2mm no annular +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3 +Mounting Hole 3.2mm, no annular, M3 +mounting hole 3.2mm no annular m3 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_DIN965 +Mounting Hole 3.2mm, no annular, M3, DIN965 +mounting hole 3.2mm no annular m3 din965 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_DIN965_Pad +Mounting Hole 3.2mm, M3, DIN965 +mounting hole 3.2mm m3 din965 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_ISO7380 +Mounting Hole 3.2mm, no annular, M3, ISO7380 +mounting hole 3.2mm no annular m3 iso7380 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_ISO7380_Pad +Mounting Hole 3.2mm, M3, ISO7380 +mounting hole 3.2mm m3 iso7380 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_ISO14580 +Mounting Hole 3.2mm, no annular, M3, ISO14580 +mounting hole 3.2mm no annular m3 iso14580 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_ISO14580_Pad +Mounting Hole 3.2mm, M3, ISO14580 +mounting hole 3.2mm m3 iso14580 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_Pad +Mounting Hole 3.2mm, M3 +mounting hole 3.2mm m3 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_Pad_Via +Mounting Hole 3.2mm, M3 +mounting hole 3.2mm m3 +0 +9 +1 +MountingHole +MountingHole_3.5mm +Mounting Hole 3.5mm, no annular +mounting hole 3.5mm no annular +0 +0 +0 +MountingHole +MountingHole_3.5mm_Pad +Mounting Hole 3.5mm +mounting hole 3.5mm +0 +1 +1 +MountingHole +MountingHole_3.5mm_Pad_Via +Mounting Hole 3.5mm +mounting hole 3.5mm +0 +9 +1 +MountingHole +MountingHole_3.7mm +Mounting Hole 3.7mm, no annular +mounting hole 3.7mm no annular +0 +0 +0 +MountingHole +MountingHole_3.7mm_Pad +Mounting Hole 3.7mm +mounting hole 3.7mm +0 +1 +1 +MountingHole +MountingHole_3.7mm_Pad_Via +Mounting Hole 3.7mm +mounting hole 3.7mm +0 +9 +1 +MountingHole +MountingHole_3mm +Mounting Hole 3mm, no annular +mounting hole 3mm no annular +0 +0 +0 +MountingHole +MountingHole_3mm_Pad +Mounting Hole 3mm +mounting hole 3mm +0 +1 +1 +MountingHole +MountingHole_3mm_Pad_Via +Mounting Hole 3mm +mounting hole 3mm +0 +9 +1 +MountingHole +MountingHole_4.3mm_M4 +Mounting Hole 4.3mm, no annular, M4 +mounting hole 4.3mm no annular m4 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_DIN965 +Mounting Hole 4.3mm, no annular, M4, DIN965 +mounting hole 4.3mm no annular m4 din965 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_DIN965_Pad +Mounting Hole 4.3mm, M4, DIN965 +mounting hole 4.3mm m4 din965 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_ISO7380 +Mounting Hole 4.3mm, no annular, M4, ISO7380 +mounting hole 4.3mm no annular m4 iso7380 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_ISO7380_Pad +Mounting Hole 4.3mm, M4, ISO7380 +mounting hole 4.3mm m4 iso7380 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_ISO14580 +Mounting Hole 4.3mm, no annular, M4, ISO14580 +mounting hole 4.3mm no annular m4 iso14580 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_ISO14580_Pad +Mounting Hole 4.3mm, M4, ISO14580 +mounting hole 4.3mm m4 iso14580 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_Pad +Mounting Hole 4.3mm, M4 +mounting hole 4.3mm m4 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_Pad_Via +Mounting Hole 4.3mm, M4 +mounting hole 4.3mm m4 +0 +9 +1 +MountingHole +MountingHole_4.3x6.2mm_M4_Pad +Mounting Hole 4.3x6.2mm, M4 +mounting hole 4.3x6.2mm m4 +0 +1 +1 +MountingHole +MountingHole_4.3x6.2mm_M4_Pad_Via +Mounting Hole 4.3x6.2mm, M4 +mounting hole 4.3x6.2mm m4 +0 +17 +1 +MountingHole +MountingHole_4.5mm +Mounting Hole 4.5mm, no annular +mounting hole 4.5mm no annular +0 +0 +0 +MountingHole +MountingHole_4.5mm_Pad +Mounting Hole 4.5mm +mounting hole 4.5mm +0 +1 +1 +MountingHole +MountingHole_4.5mm_Pad_Via +Mounting Hole 4.5mm +mounting hole 4.5mm +0 +9 +1 +MountingHole +MountingHole_4mm +Mounting Hole 4mm, no annular +mounting hole 4mm no annular +0 +0 +0 +MountingHole +MountingHole_4mm_Pad +Mounting Hole 4mm +mounting hole 4mm +0 +1 +1 +MountingHole +MountingHole_4mm_Pad_Via +Mounting Hole 4mm +mounting hole 4mm +0 +9 +1 +MountingHole +MountingHole_5.3mm_M5 +Mounting Hole 5.3mm, no annular, M5 +mounting hole 5.3mm no annular m5 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_DIN965 +Mounting Hole 5.3mm, no annular, M5, DIN965 +mounting hole 5.3mm no annular m5 din965 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_DIN965_Pad +Mounting Hole 5.3mm, M5, DIN965 +mounting hole 5.3mm m5 din965 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_ISO7380 +Mounting Hole 5.3mm, no annular, M5, ISO7380 +mounting hole 5.3mm no annular m5 iso7380 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_ISO7380_Pad +Mounting Hole 5.3mm, M5, ISO7380 +mounting hole 5.3mm m5 iso7380 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_ISO14580 +Mounting Hole 5.3mm, no annular, M5, ISO14580 +mounting hole 5.3mm no annular m5 iso14580 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_ISO14580_Pad +Mounting Hole 5.3mm, M5, ISO14580 +mounting hole 5.3mm m5 iso14580 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_Pad +Mounting Hole 5.3mm, M5 +mounting hole 5.3mm m5 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_Pad_Via +Mounting Hole 5.3mm, M5 +mounting hole 5.3mm m5 +0 +9 +1 +MountingHole +MountingHole_5.5mm +Mounting Hole 5.5mm, no annular +mounting hole 5.5mm no annular +0 +0 +0 +MountingHole +MountingHole_5.5mm_Pad +Mounting Hole 5.5mm +mounting hole 5.5mm +0 +1 +1 +MountingHole +MountingHole_5.5mm_Pad_Via +Mounting Hole 5.5mm +mounting hole 5.5mm +0 +9 +1 +MountingHole +MountingHole_5mm +Mounting Hole 5mm, no annular +mounting hole 5mm no annular +0 +0 +0 +MountingHole +MountingHole_5mm_Pad +Mounting Hole 5mm +mounting hole 5mm +0 +1 +1 +MountingHole +MountingHole_5mm_Pad_Via +Mounting Hole 5mm +mounting hole 5mm +0 +9 +1 +MountingHole +MountingHole_6.4mm_M6 +Mounting Hole 6.4mm, no annular, M6 +mounting hole 6.4mm no annular m6 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_DIN965 +Mounting Hole 6.4mm, no annular, M6, DIN965 +mounting hole 6.4mm no annular m6 din965 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_DIN965_Pad +Mounting Hole 6.4mm, M6, DIN965 +mounting hole 6.4mm m6 din965 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_ISO7380 +Mounting Hole 6.4mm, no annular, M6, ISO7380 +mounting hole 6.4mm no annular m6 iso7380 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_ISO7380_Pad +Mounting Hole 6.4mm, M6, ISO7380 +mounting hole 6.4mm m6 iso7380 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_ISO14580 +Mounting Hole 6.4mm, no annular, M6, ISO14580 +mounting hole 6.4mm no annular m6 iso14580 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_ISO14580_Pad +Mounting Hole 6.4mm, M6, ISO14580 +mounting hole 6.4mm m6 iso14580 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_Pad +Mounting Hole 6.4mm, M6 +mounting hole 6.4mm m6 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_Pad_Via +Mounting Hole 6.4mm, M6 +mounting hole 6.4mm m6 +0 +9 +1 +MountingHole +MountingHole_6.5mm +Mounting Hole 6.5mm, no annular +mounting hole 6.5mm no annular +0 +0 +0 +MountingHole +MountingHole_6.5mm_Pad +Mounting Hole 6.5mm +mounting hole 6.5mm +0 +1 +1 +MountingHole +MountingHole_6.5mm_Pad_Via +Mounting Hole 6.5mm +mounting hole 6.5mm +0 +9 +1 +MountingHole +MountingHole_6mm +Mounting Hole 6mm, no annular +mounting hole 6mm no annular +0 +0 +0 +MountingHole +MountingHole_6mm_Pad +Mounting Hole 6mm +mounting hole 6mm +0 +1 +1 +MountingHole +MountingHole_6mm_Pad_Via +Mounting Hole 6mm +mounting hole 6mm +0 +9 +1 +MountingHole +MountingHole_8.4mm_M8 +Mounting Hole 8.4mm, no annular, M8 +mounting hole 8.4mm no annular m8 +0 +0 +0 +MountingHole +MountingHole_8.4mm_M8_Pad +Mounting Hole 8.4mm, M8 +mounting hole 8.4mm m8 +0 +1 +1 +MountingHole +MountingHole_8.4mm_M8_Pad_Via +Mounting Hole 8.4mm, M8 +mounting hole 8.4mm m8 +0 +9 +1 +NetTie +NetTie-2_SMD_Pad0.5mm +Net tie, 2 pin, 0.5mm square SMD pads +net tie +0 +2 +2 +NetTie +NetTie-2_SMD_Pad2.0mm +Net tie, 2 pin, 2.0mm square SMD pads +net tie +0 +2 +2 +NetTie +NetTie-2_THT_Pad0.3mm +Net tie, 2 pin, 0.3mm round THT pads +net tie +0 +2 +2 +NetTie +NetTie-2_THT_Pad1.0mm +Net tie, 2 pin, 1.0mm round THT pads +net tie +0 +2 +2 +NetTie +NetTie-3_SMD_Pad0.5mm +Net tie, 3 pin, 0.5mm square SMD pads +net tie +0 +3 +3 +NetTie +NetTie-3_SMD_Pad2.0mm +Net tie, 3 pin, 2.0mm square SMD pads +net tie +0 +3 +3 +NetTie +NetTie-3_THT_Pad0.3mm +Net tie, 3 pin, 0.3mm round THT pads +net tie +0 +3 +3 +NetTie +NetTie-3_THT_Pad1.0mm +Net tie, 3 pin, 1.0mm round THT pads +net tie +0 +3 +3 +NetTie +NetTie-4_SMD_Pad0.5mm +Net tie, 4 pin, 0.5mm square SMD pads +net tie +0 +4 +4 +NetTie +NetTie-4_SMD_Pad2.0mm +Net tie, 4 pin, 2.0mm square SMD pads +net tie +0 +4 +4 +NetTie +NetTie-4_THT_Pad0.3mm +Net tie, 4 pin, 0.3mm round THT pads +net tie +0 +4 +4 +NetTie +NetTie-4_THT_Pad1.0mm +Net tie, 4 pin, 1.0mm round THT pads +net tie +0 +4 +4 +OptoDevice +ADNS-9800 +Laser Gaming Sensor ADNS-9800 +MOUSE MOUSE_SENSOR LASER_GAMING_SENSOR +0 +16 +16 +OptoDevice +AGILENT_HFBR-152x +Fiberoptic Transmitter TX, HFBR series (https://docs.broadcom.com/docs/AV02-3283EN) +Fiberoptic Transmitter +0 +6 +6 +OptoDevice +AGILENT_HFBR-252x +Fiberoptic Receiver RX, HFBR series (https://docs.broadcom.com/docs/AV02-3283EN) +Fiberoptic Transmitter +0 +6 +6 +OptoDevice +AMS_TSL2550_SMD +http://ams.com/eng/content/download/250130/975613/142977 +TSL2550 ambient light sensor +0 +4 +4 +OptoDevice +Broadcom_AFBR-16xxZ_Horizontal +Fiber Optic Transmitter and Receiver, https://docs.broadcom.com/docs/AV02-4369EN +Fiber Optic Transmitter and Receiver +0 +6 +6 +OptoDevice +Broadcom_AFBR-16xxZ_Tilted +Fiber Optic Transmitter and Receiver, https://docs.broadcom.com/docs/AV02-4369EN +Fiber Optic Transmitter and Receiver +0 +6 +6 +OptoDevice +Broadcom_AFBR-16xxZ_Vertical +Fiber Optic Transmitter and Receiver, https://docs.broadcom.com/docs/AV02-4369EN +Fiber Optic Transmitter and Receiver +0 +6 +6 +OptoDevice +Broadcom_APDS-9301 +ambient light sensor, i2c interface, 6-pin chipled package, https://docs.broadcom.com/docs/AV02-2315EN +ambient light sensor chipled +0 +6 +6 +OptoDevice +Broadcom_DFN-6_2x2mm_P0.65mm +Broadcom DFN, 6 Pin (https://docs.broadcom.com/docs/AV02-4755EN), generated with kicad-footprint-generator ipc_noLead_generator.py +Broadcom DFN NoLead +0 +6 +6 +OptoDevice +Broadcom_LGA-8_2x2mm_P0.53mm +Broadcom LGA, 8 Pin (https://docs.broadcom.com/docs/AV02-4755EN), generated with kicad-footprint-generator ipc_noLead_generator.py +Broadcom LGA NoLead +0 +8 +8 +OptoDevice +Everlight_ITR8307 +package for Everlight ITR8307 with PCB cutout, light-direction upwards, see http://www.everlight.com/file/ProductFile/ITR8307.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Everlight_ITR8307F43 +package for Everlight ITR8307/F43, see https://everlighteurope.com/index.php?controller=attachment&id_attachment=5385 +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Everlight_ITR8307_Reverse +package for Everlight ITR8307 with PCB cutout, light-direction downwards, see http://www.everlight.com/file/ProductFile/ITR8307.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Finder_34.81 +Relay SPST, Finder Type 34.81 (opto relays/coupler), vertical/standing form, see https://gfinder.findernet.com/public/attachments/34/EN/S34USAEN.pdf +Relay SPST Finder +0 +4 +4 +OptoDevice +Hamamatsu_C12880 +Hamamatsu spectrometer, see http://www.hamamatsu.com/resources/pdf/ssd/c12880ma_kacc1226e.pdf +opto spectrometer Hamamatsu +0 +10 +10 +OptoDevice +Hamamatsu_S13360-30CS +SiPM, 2pin +Hamamatsu SiPM +0 +2 +2 +OptoDevice +Kingbright_KPS-5130 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KPS-5130PD7C(Ver.14).pdf +KPS-5130 photodiode RGB sensor +0 +4 +4 +OptoDevice +Kingbright_KRC011_Horizontal +Subminiature Reflective Optical Sensor, http://www.kingbright.com/attachments/file/psearch/000/00/00/KRC011(Ver.15).pdf +Subminiature Reflective Optical Sensor +0 +4 +4 +OptoDevice +Kingbright_KRC011_Vertical +Subminiature Reflective Optical Sensor, http://www.kingbright.com/attachments/file/psearch/000/00/00/KRC011(Ver.15).pdf +Subminiature Reflective Optical Sensor +0 +4 +4 +OptoDevice +Kodenshi_LG206D +http://kodenshi.co.jp/products/pdf/sensor/photointerrupter_ic/LG206D.pdf +Photointerrupter infrared LED with photo IC +0 +5 +5 +OptoDevice +Kodenshi_LG206L +http://kodenshi.co.jp/products/pdf/sensor/photointerrupter_ic/LG205L.pdf +Photointerrupter infrared LED with photo IC +0 +5 +5 +OptoDevice +Kodenshi_SG105 +package for Kodenshi SG-105 with PCB cutout, light-direction upwards, see http://www.kodenshi.co.jp/products/pdf/sensor/photointerrupter_ref/SG-105.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Kodenshi_SG105F +package for Kodenshi SG-105F, see http://www.kodenshi.co.jp/products/pdf/sensor/photointerrupter_ref/SG-105F.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Kodenshi_SG105_Reverse +package for Kodenshi SG-105 with PCB cutout, light-direction downwards, see http://www.kodenshi.co.jp/products/pdf/sensor/photointerrupter_ref/SG-105.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +LaserDiode_TO3.3-D3.3-3 +Laser Diode, TO-3.3mm, 3pin +Laser Diode TO3.3 +0 +3 +3 +OptoDevice +LaserDiode_TO5-D9-3 +Laser Diode, TO5-like (D=9mm), 3pin +Laser Diode TO5-like +0 +3 +3 +OptoDevice +LaserDiode_TO18-D5.6-3 +Laser Diode, TO18-like (D=5.6mm), 3pin +Laser Diode TO18-like +0 +3 +3 +OptoDevice +LaserDiode_TO38ICut-3 +Laser Diode, TO-38-ICut, 3pin +Laser Diode TO38-ICut +0 +3 +3 +OptoDevice +LaserDiode_TO56-3 +Laser Diode, TO-56, 3pin +Laser Diode TO56 +0 +3 +3 +OptoDevice +Lite-On_LTR-303ALS-01 +ambient light sensor, i2c interface, 6-pin chipled package, http://optoelectronics.liteon.com/upload/download/DS86-2013-0004/LTR-303ALS-01_DS_V1.pdf +ambient light sensor chipled +0 +6 +6 +OptoDevice +Luna_NSL-32 +Optoisolator with LED and photoresistor +optoisolator +0 +4 +4 +OptoDevice +Maxim_OLGA-14_3.3x5.6mm_P0.8mm +https://pdfserv.maximintegrated.com/land_patterns/90-0602.PDF +OLGA-14 OESIP-14 +0 +14 +14 +OptoDevice +OnSemi_CASE100CY +OnSemi CASE 100CY, light-direction upwards, see http://www.onsemi.com/pub/Collateral/QRE1113-D.PDF +refective opto couple photo coupler +0 +4 +4 +OptoDevice +ONSemi_QSE15x +3 Lead Plastic Package +ONSemi QSE158 QSE159 +0 +3 +3 +OptoDevice +Osram_BPW82 +PhotoDiode, BPW82, RM2.54 +PhotoDiode BPW82 RM2.54 +0 +2 +2 +OptoDevice +Osram_DIL2_4.3x4.65mm_P5.08mm +PhotoDiode, plastic DIL, 4.3x4.65mm², RM5.08 +PhotoDiode plastic DIL RM5.08 +0 +2 +2 +OptoDevice +Osram_LPT80A +PhotoTransistor, sidelooker package, RM2.54 +PhotoTransistor sidelooker package RM2.54 +0 +2 +2 +OptoDevice +Osram_SFH9x0x +package for Osram SFH9x0x series of reflective photo interrupters/couplers, see http://www.osram-os.com/Graphics/XPic6/00200860_0.pdf +reflective photo interrupter SMD +0 +6 +6 +OptoDevice +Osram_SFH205 +PhotoDiode, SFH205, RM2.54 +PhotoDiode SFH205 RM2.54 +0 +2 +2 +OptoDevice +Osram_SFH225 +PhotoDiode, SFH225, RM2.54 +PhotoDiode SFH225 RM2.54 +0 +2 +2 +OptoDevice +Osram_SMD-DIL2_4.5x4.0mm +PhotoDiode, plastic SMD DIL, 4.5x4mm² +PhotoDiode plastic SMD DIL +0 +2 +2 +OptoDevice +Osram_SMD-SmartDIL +PhotoDiode, plastic SMD SmatDIL +PhotoDiode plastic SMD SmatDIL +0 +3 +3 +OptoDevice +Panasonic_APV-AQY_SSOP-4_4.45x2.65mm_P1.27mm +https://www.panasonic-electric-works.com/cps/rde/xbcr/pew_eu_en/technical_information_photomos_en.pdf +SSOP4 APV21 AQY22 +0 +4 +4 +OptoDevice +PerkinElmer_VTL5C +Axial Vactrol (http://www.qsl.net/wa1ion/vactrol/vactrol.pdf) +vactrol +0 +4 +4 +OptoDevice +PerkinElmer_VTL5Cx2 +Axial Vactrol (http://www.qsl.net/wa1ion/vactrol/vactrol.pdf) +vactrol +0 +5 +5 +OptoDevice +R_LDR_4.9x4.2mm_P2.54mm_Vertical +Resistor, LDR 4.9x4.2mm +Resistor LDR4.9x4.2 +0 +2 +2 +OptoDevice +R_LDR_5.0x4.1mm_P3mm_Vertical +Resistor, LDR 5x4.1mm, see http://cdn-reichelt.de/documents/datenblatt/A500/A90xxxx%23PE.pdf +Resistor LDR5x4.1mm +0 +2 +2 +OptoDevice +R_LDR_5.1x4.3mm_P3.4mm_Vertical +Resistor, LDR 5.1x3.4mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR5.1x3.4mm +0 +2 +2 +OptoDevice +R_LDR_5.2x5.2mm_P3.5mm_Horizontal +Resistor, LDR 5.2x5.2, upright, see http://cdn-reichelt.de/documents/datenblatt/A500/M996011A.pdf +Resistor LDR5.2x5.2 +0 +2 +2 +OptoDevice +R_LDR_7x6mm_P5.1mm_Vertical +Resistor, LDR 7x6mm +Resistor LDR7x6mm +0 +2 +2 +OptoDevice +R_LDR_10x8.5mm_P7.6mm_Vertical +Resistor, LDR 10x8.5mm +Resistor LDR10.8.5mm +0 +2 +2 +OptoDevice +R_LDR_11x9.4mm_P8.2mm_Vertical +Resistor, LDR 11x9.4mm +Resistor LDR11x9.4mm +0 +2 +2 +OptoDevice +R_LDR_12x10.8mm_P9.0mm_Vertical +Resistor, LDR 12x10.8mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR12x10.8mm +0 +2 +2 +OptoDevice +R_LDR_D6.4mm_P3.4mm_Vertical +Resistor, LDR D=6.4mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDRD=6.4mm +0 +2 +2 +OptoDevice +R_LDR_D13.8mm_P9.0mm_Vertical +Resistor, diameter 13.8mm pitch 9mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR +0 +2 +2 +OptoDevice +R_LDR_D20mm_P17.5mm_Vertical +Resistor, LDR 20mm diameter, pin pitch 17.5mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR +0 +2 +2 +OptoDevice +Sharp_GP2Y0A41SK0F +http://www.sharp-world.com/products/device/lineup/data/pdf/datasheet/gp2y0a41sk_e.pdf +Distance Sensor Sharp +0 +2 +2 +OptoDevice +Sharp_IS471F +Sharp OPIC IS471F, see http://pdf.datasheetcatalog.com/datasheet/Sharp/mXvrzty.pdf +Sharp OPIC IS471F +0 +4 +4 +OptoDevice +Sharp_IS485 +Sharp OPIC, IS485, IS486, see http://microrato.ua.pt/main/Actividades/Estagios/Docs/IS485_6.pdf +Sharp OPIC IS485 IS486 +0 +3 +3 +OptoDevice +Siemens_SFH900 +package for Siemens SFH900 reflex photo interrupter/coupler/object detector, see https://www.batronix.com/pdf/sfh900.pdf +Siemens SFH900 reflex photo interrupter coupler object detector +0 +3 +3 +OptoDevice +Toshiba_TORX170_TORX173_TORX193_TORX194 +Fiberoptic Reciver, RX, Toshiba, Toslink, TORX170, TORX173, TORX193, TORX194 +Fiberoptic Reciver RX Toshiba Toslink TORX170 TORX173 TORX193 TORX194 +0 +6 +6 +OptoDevice +Toshiba_TOTX170_TOTX173_TOTX193_TOTX194 +Fiberoptic Reciver, RX, Toshiba, Toslink, TORX170, TORX173, TORX193, TORX194 +Fiberoptic Reciver RX Toshiba Toslink TORX170 TORX173 TORX193 TORX194 +0 +6 +6 +OptoDevice +Vishay_CAST-3Pin +IR Receiver Vishay TSOP-xxxx, CAST package, see https://www.vishay.com/docs/82493/tsop311.pdf +IRReceiverVishayTSOP-xxxx CAST +0 +3 +3 +OptoDevice +Vishay_CNY70 +package for Vishay CNY70 refective photo coupler/interrupter +Vishay CNY70 refective photo coupler +0 +4 +4 +OptoDevice +Vishay_MINICAST-3Pin +IR Receiver Vishay TSOP-xxxx, MINICAST package, see https://www.vishay.com/docs/82669/tsop32s40f.pdf +IR Receiver Vishay TSOP-xxxx MINICAST +0 +3 +3 +OptoDevice +Vishay_MINIMOLD-3Pin +IR Receiver Vishay TSOP-xxxx, MINIMOLD package, see https://www.vishay.com/docs/82742/tsop331.pdf +IR Receiver Vishay TSOP-xxxx MINIMOLD +0 +3 +3 +OptoDevice +Vishay_MOLD-3Pin +IR Receiver Vishay TSOP-xxxx, MOLD package, see https://www.vishay.com/docs/82669/tsop32s40f.pdf +IR Receiver Vishay TSOP-xxxx MOLD +0 +3 +3 +Oscillator +Oscillator_DIP-8 +Oscillator, DIP8,http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_DIP-8_LargePads +Oscillator, DIP8, Large Pads, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_DIP-14 +Oscillator, DIP14, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_DIP-14_LargePads +Oscillator, DIP14, Large Pads, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_OCXO_Morion_MV267 +http://www.morion.com.ru/catalog_pdf/MV267.pdf +OCXO +0 +5 +5 +Oscillator +Oscillator_OCXO_Morion_MV317 +https://www.morion-us.com/catalog_pdf/mv317.pdf +OCXO +0 +5 +5 +Oscillator +Oscillator_SeikoEpson_SG-8002DB +14-lead dip package, row spacing 7.62 mm (300 mils) +DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Oscillator +Oscillator_SeikoEpson_SG-8002DC +8-lead dip package, row spacing 7.62 mm (300 mils) +DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ABLNO +https://abracon.com/Precisiontiming/ABLNO.pdf +VCXO XO +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASCO-4Pin_1.6x1.2mm +Miniature Crystal Clock Oscillator Abracon ASCO series, https://abracon.com/Oscillators/ASCO.pdf, 1.6x1.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm +Miniature Crystal Clock Oscillator Abracon ASE series, http://www.abracon.com/Oscillators/ASEseries.pdf, 3.2x2.5mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm_HandSoldering +Miniature Crystal Clock Oscillator Abracon ASE series, http://www.abracon.com/Oscillators/ASEseries.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASV-4Pin_7.0x5.1mm +Miniature Crystal Clock Oscillator Abracon ASV series, http://www.abracon.com/Oscillators/ASV.pdf, 7.0x5.1mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASV-4Pin_7.0x5.1mm_HandSoldering +Miniature Crystal Clock Oscillator Abracon ASV series, http://www.abracon.com/Oscillators/ASV.pdf, hand-soldering, 7.0x5.1mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_ECS_2520MV-xxx-xx-4Pin_2.5x2.0mm +Miniature Crystal Clock Oscillator ECS 2520MV series, https://www.ecsxtal.com/store/pdf/ECS-2520MV.pdf +Miniature Crystal Clock Oscillator ECS 2520MV series SMD SMT HCMOS +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO32-4Pin_3.2x2.5mm +Miniature Crystal Clock Oscillator EuroQuartz XO32 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO32.pdf, 3.2x2.5mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO32-4Pin_3.2x2.5mm_HandSoldering +Miniature Crystal Clock Oscillator EuroQuartz XO32 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO32.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO53-4Pin_5.0x3.2mm +Miniature Crystal Clock Oscillator EuroQuartz XO53 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO53.pdf, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO53-4Pin_5.0x3.2mm_HandSoldering +Miniature Crystal Clock Oscillator EuroQuartz XO53 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO53.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO91-4Pin_7.0x5.0mm +Miniature Crystal Clock Oscillator EuroQuartz XO91 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO91.pdf, 7.0x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO91-4Pin_7.0x5.0mm_HandSoldering +Miniature Crystal Clock Oscillator EuroQuartz XO91 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO91.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS1-6Pin_14.8x9.1mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S1-KHZ/LHZ, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 14.8x9.1mm^2 package +SMD SMT crystal oscillator +0 +6 +6 +Oscillator +Oscillator_SMD_Fordahl_DFAS2-4Pin_7.3x5.1mm +Mminiature Crystal Clock Oscillator TXCO Fordahl DFA S2-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 7.3x5.1mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS2-4Pin_7.3x5.1mm_HandSoldering +Mminiature Crystal Clock Oscillator TXCO Fordahl DFA S2-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 7.3x5.1mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS3-4Pin_9.1x7.2mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S3-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 9.1x7.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS3-4Pin_9.1x7.2mm_HandSoldering +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S3-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 9.1x7.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS7-4Pin_19.9x12.9mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S7-K/L, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 19.9x12.9mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS7-4Pin_19.9x12.9mm_HandSoldering +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S7-K/L, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 19.9x12.9mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS11-4Pin_7.0x5.0mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S11-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 7.0x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS11-4Pin_7.0x5.0mm_HandSoldering +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S11-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS15-4Pin_5.0x3.2mm +Ultraminiature Crystal Clock Oscillator TXCO Fordahl DFA S15-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS15-4Pin_5.0x3.2mm_HandSoldering +Ultraminiature Crystal Clock Oscillator TXCO Fordahl DFA S15-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_IQD_IQXO70-4Pin_7.5x5.0mm +IQD Crystal Clock Oscillator IQXO-70, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 7.5x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_IQD_IQXO70-4Pin_7.5x5.0mm_HandSoldering +IQD Crystal Clock Oscillator IQXO-70, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 7.5x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Kyocera_2520-6Pin_2.5x2.0mm +https://global.kyocera.com/prdct/electro/product/pdf/kt2520_e.pdf +2.5mm 2mm SMD +0 +6 +6 +Oscillator +Oscillator_SMD_OCXO_ConnorWinfield_OH300 +http://www.conwin.com/datasheets/cx/cx282.pdf +OCXO +0 +7 +7 +Oscillator +Oscillator_SMD_SeikoEpson_SG210-4Pin_2.5x2.0mm +SMD Crystal Oscillator Seiko Epson SG-210 https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-210SED, 2.5x2.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG210-4Pin_2.5x2.0mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-210 https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-210SED, hand-soldering, 2.5x2.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG3030CM +SMD Crystal Oscillator Seiko Epson SG-3030CM package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CA-4Pin_7.0x5.0mm +SMD Crystal Oscillator Seiko Epson SG-8002CA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 7.0x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CA-4Pin_7.0x5.0mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002CA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CE-4Pin_3.2x2.5mm +SMD Crystal Oscillator Seiko Epson SG-8002CE https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 3.2x2.5mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CE-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002CE https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JA-4Pin_14.0x8.7mm +SMD Crystal Oscillator Seiko Epson SG-8002JA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 14.0x8.7mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JA-4Pin_14.0x8.7mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002JA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 14.0x8.7mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JC-4Pin_10.5x5.0mm +SMD Crystal Oscillator Seiko Epson SG-8002JC https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 10.5x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JC-4Pin_10.5x5.0mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002JC https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 10.5x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002LB-4Pin_5.0x3.2mm +SMD Crystal Oscillator Seiko Epson SG-8002LB https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002LB-4Pin_5.0x3.2mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002LB https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SI570_SI571_HandSoldering +SI570, SI571, Programmable oscillator, Standard +SI570 SI571 Programmable oscillator Standard +0 +8 +8 +Oscillator +Oscillator_SMD_SI570_SI571_Standard +SI570, SI571, Programmable oscillator, Standard +SI570 SI571 Programmable oscillator Standard +0 +8 +8 +Oscillator +Oscillator_SMD_Silicon_Labs_LGA-6_2.5x3.2mm_P1.25mm +Silicon_Labs LGA, 6 Pin (https://www.silabs.com/documents/public/data-sheets/si512-13.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +Silicon_Labs LGA NoLead +0 +6 +6 +Oscillator +Oscillator_SMD_TCXO_G158 +TCXO +TCXO +0 +4 +4 +Oscillator +Oscillator_SMD_TXC_7C-4Pin_5.0x3.2mm +Miniature Crystal Clock Oscillator TXC 7C series, http://www.txccorp.com/download/products/osc/7C_o.pdf, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_TXC_7C-4Pin_5.0x3.2mm_HandSoldering +Miniature Crystal Clock Oscillator TXC 7C series, http://www.txccorp.com/download/products/osc/7C_o.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Package_BGA +BGA-9_1.6x1.6mm_Layout3x3_P0.5mm +BGA-9, http://www.ti.com/lit/ds/symlink/bq27421-g1.pdf +BGA-9 +0 +9 +9 +Package_BGA +BGA-16_1.92x1.92mm_Layout4x4_P0.5mm +BGA-16, http://www.st.com/content/ccc/resource/technical/document/datasheet/group2/bc/cd/62/9e/8f/30/47/69/CD00151267/files/CD00151267.pdf/jcr:content/translations/en.CD00151267.pdf +BGA-16 +0 +16 +16 +Package_BGA +BGA-25_6.35x6.35mm_Layout5x5_P1.27mm +BGA-25, http://cds.linear.com/docs/en/datasheet/4624fc.pdf +BGA-25 uModule +0 +25 +25 +Package_BGA +BGA-36_3.396x3.466mm_Layout6x6_P0.4mm_Ball0.25mm_Pad0.2mm_NSMD +Altera V36, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00486-00.pdf +Altera BGA-36 V36 VBGA +0 +36 +36 +Package_BGA +BGA-48_8.0x9.0mm_Layout6x8_P0.8mm +BGA-48 - pitch 0.8 mm +BGA-48 +0 +48 +48 +Package_BGA +BGA-64_9.0x9.0mm_Layout10x10_P0.8mm +BGA-64, 10x10 raster, 9x9mm package, pitch 0.8mm +BGA-64 +0 +64 +64 +Package_BGA +BGA-68_5.0x5.0mm_Layout9x9_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-68, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00344-01.pdf +Altera BGA-68 M68 MBGA +0 +68 +68 +Package_BGA +BGA-81_4.496x4.377mm_Layout9x9_P0.4mm_Ball0.25mm_Pad0.2mm_NSMD +Altera V81, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00478-01.pdf +Altera VBGA V81 BGA-81 +0 +81 +81 +Package_BGA +BGA-90_8.0x13.0mm_Layout2x3x15_P0.8mm +BGA-90, http://www.issi.com/WW/pdf/42-45S32800J.pdf +BGA-90 +0 +90 +90 +Package_BGA +BGA-96_9.0x13.0mm_Layout2x3x16_P0.8mm +BGA-96, http://www.mouser.com/ds/2/198/43-46TR16640B-81280BL-706483.pdf +BGA-96 +0 +96 +96 +Package_BGA +BGA-100_6.0x6.0mm_Layout11x11_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-100, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00345-01.pdf +Altera BGA-100 M100 MBGA +0 +100 +100 +Package_BGA +BGA-100_11.0x11.0mm_Layout10x10_P1.0mm_Ball0.5mm_Pad0.4mm_NSMD +BGA-100, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00223-02.pdf +BGA-100 +0 +100 +100 +Package_BGA +BGA-121_9.0x9.0mm_Layout11x11_P0.8mm_Ball0.4mm_Pad0.35mm_NSMD +121-ball, 0.8mm BGA (based on http://www.latticesemi.com/view_document?document_id=213) +BGA 0.8mm 9mm 121 +0 +121 +121 +Package_BGA +BGA-121_12.0x12.0mm_Layout11x11_P1.0mm +BGA-121, http://cds.linear.com/docs/en/packaging/05081891_A_bga121.pdf +BGA-121 +0 +121 +121 +Package_BGA +BGA-132_12x18mm_Layout11x17_P0.5mm +BGA-132 11x17 12x18mm 0.5pitch +BGA-132 +0 +132 +132 +Package_BGA +BGA-144_7.0x7.0mm_Layout13x13_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-144, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00346-00.pdf +Altera BGA-144 M144 MBGA +0 +144 +144 +Package_BGA +BGA-144_13.0x13.0mm_Layout12x12_P1.0mm +BGA-144, http://www.topline.tv/drawings/pdf/BGA%201,0mm%20pitch/LBGA144T1.0-DC128.pdf +BGA-144 +0 +144 +144 +Package_BGA +BGA-152_14x18mm_Layout13x17_P0.5mm +BGA-152_14x18mm_Layout13x17_P0.5mm +VBGA-152 +0 +152 +152 +Package_BGA +BGA-153_8.0x8.0mm_Layout15x15_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-153, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00471-00.pdf +Altera BGA-153 M153 MBGA +0 +153 +153 +Package_BGA +BGA-169_11.0x11.0mm_Layout13x13_P0.8mm_Ball0.5mm_Pad0.4mm_NSMD +Altera U169, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00470-01.pdf +Altera UBGA U169 BGA-169 +0 +169 +169 +Package_BGA +BGA-256_11.0x11.0mm_Layout20x20_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-256, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00348-01.pdf +Altera BGA-256 M256 MBGA +0 +256 +256 +Package_BGA +BGA-256_14.0x14.0mm_Layout16x16_P0.8mm_Ball0.45mm_Pad0.32mm_NSMD +BGA-256, dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf +BGA-256 +0 +256 +256 +Package_BGA +BGA-256_17.0x17.0mm_Layout16x16_P1.0mm_Ball0.5mm_Pad0.4mm_NSMD +BGA-256, dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf +BGA-256 +0 +256 +256 +Package_BGA +BGA-324_15.0x15.0mm_Layout18x18_P0.8mm_Ball0.5mm_Pad0.4mm_NSMD +Altera U324, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00474-02.pdf +Altera UBGA U324 BGA-324 +0 +324 +324 +Package_BGA +BGA-324_19.0x19.0mm_Layout18x18_P1.0mm_Ball0.5mm_Pad0.4mm_NSMD +BGA-324, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00233-03.pdf +BGA-324 +0 +324 +324 +Package_BGA +BGA-352_35.0x35.0mm_Layout26x26_P1.27mm +BGA-352, https://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/b352p05.pdf +BGA-352 +0 +352 +352 +Package_BGA +BGA-400_21.0x21.0mm_Layout20x20_P1.0mm +BGA-400, https://www.xilinx.com/support/documentation/package_specs/fg400.pdf +BGA-400 +0 +400 +400 +Package_BGA +BGA-484_23.0x23.0mm_Layout22x22_P1.0mm +BGA-484, https://www.xilinx.com/support/documentation/package_specs/fg484.pdf +BGA-484 +0 +484 +484 +Package_BGA +BGA-624_21.0x21.0mm_Layout25x25_P0.8mm +BGA-624, 25x25 grid, 21x21mm package, pitch 0.8mm; https://www.nxp.com/docs/en/package-information/SOT1529-1.pdf +BGA 624 0.8 +0 +624 +624 +Package_BGA +BGA-625_21.0x21.0mm_Layout25x25_P0.8mm +BGA-625 +BGA-625 +0 +625 +625 +Package_BGA +BGA-672_27.0x27.0mm_Layout26x26_P1.0mm_Ball0.6mm_Pad0.5mm_NSMD +Altera BGA-672, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00472-00.pdf +Altera BGA-672 F672 FBGA +0 +672 +672 +Package_BGA +BGA-676_27.0x27.0mm_Layout26x26_P1.0mm_Ball0.6mm_Pad0.5mm_NSMD +XILINX BGA-676, https://www.xilinx.com/support/documentation/package_specs/fg676.pdf +XILINX BGA-676 FG676/FGG676 +0 +676 +676 +Package_BGA +BGA-1023_33.0x33.0mm_Layout32x32_P1.0mm +BGA-1023 +BGA-1023 +0 +1023 +1023 +Package_BGA +BGA-1156_35.0x35.0mm_Layout34x34_P1.0mm +BGA-1156 +BGA-1156 +0 +1156 +1156 +Package_BGA +BGA-1295_37.5x37.5mm_Layout36x36_P1.0mm +BGA-1295 +BGA-1295 +0 +1295 +1295 +Package_BGA +FB-BGA-484_23.0x23.0mm_Layout22x22_P1.0mm +Xilinx FB-484, https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf +FB-BGA-484 +0 +484 +484 +Package_BGA +FBGA-78_7.5x11mm_Layout2x3x13_P0.8mm +FBGA-78, https://www.skhynix.com/product/filedata/fileDownload.do?seq=7687 +FBGA-78 +0 +78 +78 +Package_BGA +Fujitsu_WLP-15_2.28x3.092mm_Layout3x5_P0.4mm +WLP-15, 3x5 raster, 2.28x3.092mm package, pitch 0.4mm; http://www.fujitsu.com/global/documents/products/devices/semiconductor/fram/lineup/MB85RS1MT-DS501-00022-7v0-E.pdf +BGA 8 0.4 +0 +8 +8 +Package_BGA +Lattice_caBGA-381_17.0x17.0mm_Layout20x20_P0.8mm_Ball0.4mm_Pad0.4mm_NSMD +Lattice caBGA-381 footprint for ECP5 FPGAs, based on http://www.latticesemi.com/view_document?document_id=213 +BGA 381 0.8 +0 +381 +381 +Package_BGA +Lattice_caBGA-381_17.0x17.0mm_Layout20x20_P0.8mm_Ball0.4mm_Pad0.6mm_SMD +Lattice caBGA-381 footprint for ECP5 FPGAs, based on http://www.latticesemi.com/view_document?document_id=213 +BGA 381 0.8 +0 +381 +381 +Package_BGA +LFBGA-100_10x10mm_Layout10x10_P0.8mm +LFBGA-100, 10x10 raster, 10x10mm package, pitch 0.8mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf +BGA 100 0.8 +0 +100 +100 +Package_BGA +LFBGA-144_10x10mm_Layout12x12_P0.8mm +LFBGA-144, 12x12 raster, 10x10mm package, pitch 0.8mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf +BGA 144 0.8 +0 +144 +144 +Package_BGA +LFBGA-169_16x12mm_Layout28x14_P0.5mm_Ball0.3_Pad0.3mm_NSMD +https://4donline.ihs.com/images/VipMasterIC/IC/SGST/SGSTS20279/SGSTS20279-1.pdf?hkey=EF798316E3902B6ED9A73243A3159BB0 +eMMC Flash LFBGA169 +0 +169 +169 +Package_BGA +Linear_BGA-133_15.0x15.0_Layout12x12_P1.27mm +Analog Devices (Linear Tech), 133-pin BGA uModule, 15.0x15.0x4.92mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf +133 pin bga +0 +134 +134 +Package_BGA +Maxim_WLP-12 +Maxim_WLP-12 W121B2+1 http://pdfserv.maximintegrated.com/package_dwgs/21-0009.PDF +Maxim_WLP-12 +0 +12 +12 +Package_BGA +Texas_DSBGA-5_0.822x1.116mm_Layout2x1x2_P0.4mm +Texas Instruments, DSBGA, 0.822x1.116mm, 5 bump 2x1x2 array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/opa330.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YFF S-XBGA-N5 +0 +10 +5 +Package_BGA +Texas_DSBGA-6_0.9x1.4mm_Layout2x3_P0.5mm +Texas Instruments, DSBGA, 0.9x1.4mm, 6 bump 2x3 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/ts5a3159a.pdf) +Texas Instruments DSBGA BGA YZP R-XBGA-N6 +0 +12 +6 +Package_BGA +Texas_DSBGA-8_0.9x1.9mm_Layout2x4_P0.5mm +Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 2x4 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0102.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YZP R-XBGA-N8 +0 +16 +8 +Package_BGA +Texas_DSBGA-8_1.43x1.41mm_Layout3x3_P0.5mm +Texas Instruments, DSBGA, 1.43x1.41mm, 8 bump 3x3 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lmc555.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YZP R-XBGA-N8 +0 +16 +8 +Package_BGA +Texas_DSBGA-8_1.5195x1.5195mm_Layout3x3_P0.5mm +Texas Instruments, DSBGA, 1.5195x1.5195x0.600mm, 8 ball 3x3 area grid, YZR pad definition (http://www.ti.com/lit/ml/mxbg270/mxbg270.pdf) +BGA 8 0.5 +0 +8 +8 +Package_BGA +Texas_DSBGA-9_1.4715x1.4715mm_Layout3x3_P0.5mm +Texas Instruments, DSBGA, 1.4715x1.4715mm, 9 bump 3x3 array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YZR0009 +0 +18 +9 +Package_BGA +Texas_DSBGA-10_1.36x1.86mm_Layout3x4_P0.5mm +Texas Instruments, DSBGA, 1.36x1.86mm, 10 bump 3x4 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA +0 +20 +10 +Package_BGA +Texas_DSBGA-12_1.36x1.86mm_Layout3x4_P0.5mm +Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 3x4 (area) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA +0 +24 +12 +Package_BGA +Texas_DSBGA-28_1.9x3.0mm_Layout4x7_P0.4mm +Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/bq51050b.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +BGA 28 0.4 +0 +28 +28 +Package_BGA +Texas_DSBGA-49_3.33x3.488mm_Layout7x7_P0.4mm +Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/msp430f2234.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +texas dsbga 49 +0 +49 +49 +Package_BGA +Texas_DSBGA-64_3.415x3.535mm_Layout8x8_P0.4mm +Texas Instruments, DSBGA, 3.415x3.535x0.625mm, 64 ball 8x8 area grid, NSMD pad definition (http://www.ti.com/lit/ds/slas718g/slas718g.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +texas dsbga 64 +0 +64 +64 +Package_BGA +Texas_MicroStar_Junior_BGA-12_2.0x2.5mm_Layout4x3_P0.5mm +Texas Instruments, BGA Microstar Junior, 2x2.5mm, 12 bump 4x3 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf) +Texas_Junior_BGA-12 +0 +12 +12 +Package_BGA +Texas_MicroStar_Junior_BGA-80_5.0x5.0mm_Layout9x9_P0.5mm +Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf) +Texas_Junior_BGA-80 +0 +80 +80 +Package_BGA +Texas_MicroStar_Junior_BGA-113_7.0x7.0mm_Layout12x12_P0.5mm +Texas Instruments, BGA Microstar Junior, 7x7mm, 113 ball 12x12 grid, NSMD pad definition (http://www.ti.com/lit/ml/mpbg674/mpbg674.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf) +Texas_Junior_BGA-113 +0 +113 +113 +Package_BGA +TFBGA-64_5x5mm_Layout8x8_P0.5mm +TFBGA-64, 8x8 raster, 5x5mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf +BGA 64 0.5 +0 +64 +64 +Package_BGA +TFBGA-100_8x8mm_Layout10x10_P0.8mm +TFBGA-100, 10x10 raster, 8x8mm package, pitch 0.8mm; see section 6.2 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf +BGA 100 0.8 +0 +100 +100 +Package_BGA +TFBGA-100_9.0x9.0mm_Layout10x10_P0.8mm +TFBGA-100, 10x10, 9x9mm package, pitch 0.8mm +TFBGA-100 +0 +100 +100 +Package_BGA +TFBGA-121_10x10mm_Layout11x11_P0.8mm +TFBGA-121, 11x11 raster, 10x10mm package, pitch 0.8mm; http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#p495 +BGA 121 0.8 +0 +121 +121 +Package_BGA +TFBGA-216_13x13mm_Layout15x15_P0.8mm +TFBGA-216, 15x15 raster, 13x13mm package, pitch 0.8mm; see section 6.8 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf +BGA 216 0.8 +0 +216 +216 +Package_BGA +TFBGA-265_14x14mm_Layout17x17_P0.8mm +TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.8mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf +BGA 265 0.8 +0 +265 +265 +Package_BGA +UCBGA-36_2.5x2.5mm_Layout6x6_P0.4mm +UCBGA-36, 6x6 raster, 2.5x2.5mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 +BGA 36 0.4 +0 +36 +36 +Package_BGA +UCBGA-49_3x3mm_Layout7x7_P0.4mm +UCBGA-49, 7x7 raster, 3x3mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 +BGA 49 0.4 +0 +49 +49 +Package_BGA +UCBGA-81_4x4mm_Layout9x9_P0.4mm +UCBGA-81, 9x9 raster, 4x4mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 +BGA 81 0.4 +0 +81 +81 +Package_BGA +UFBGA-15_3.0x3.0mm_Layout4x4_P0.65mm +UFBGA-15, 4x4, 3x3mm package, pitch 0.65mm +UFBGA-15 +0 +15 +15 +Package_BGA +UFBGA-32_4.0x4.0mm_Layout6x6_P0.5mm +UFBGA-32, 6x6, 4x4mm package, pitch 0.5mm +UFBGA-32 +0 +32 +32 +Package_BGA +UFBGA-64_5x5mm_Layout8x8_P0.5mm +UFBGA-64, 8x8 raster, 5x5mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf +BGA 64 0.5 +0 +64 +64 +Package_BGA +UFBGA-100_7x7mm_Layout12x12_P0.5mm +UFBGA-100, 12x12 raster, 7x7mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf +BGA 100 0.5 +0 +100 +100 +Package_BGA +UFBGA-132_7x7mm_Layout12x12_P0.5mm +UFBGA-132, 12x12 raster, 7x7mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf +BGA 132 0.5 +0 +132 +132 +Package_BGA +UFBGA-132_7x7mm_P0.5mm +UFBGA 132 Pins, 0.5mm Pitch, 0.3mm Ball, http://www.st.com/resource/en/datasheet/stm32l486qg.pdf +ufbga bga small-pitch +0 +132 +132 +Package_BGA +UFBGA-144_7x7mm_Layout12x12_P0.5mm +UFBGA-144, 12x12 raster, 7x7mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf +BGA 144 0.5 +0 +144 +144 +Package_BGA +UFBGA-144_10x10mm_Layout12x12_P0.8mm +UFBGA-144, 12x12 raster, 10x10mm package, pitch 0.8mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf +BGA 144 0.8 +0 +144 +144 +Package_BGA +UFBGA-169_7x7mm_Layout13x13_P0.5mm +UFBGA-169, 13x13 raster, 7x7mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf +BGA 169 0.5 +0 +169 +169 +Package_BGA +UFBGA-201_10x10mm_Layout15x15_P0.65mm +UFBGA-201, 15x15 raster, 10x10mm package, pitch 0.65mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf +BGA 201 0.65 +0 +201 +201 +Package_BGA +VFBGA-49_5.0x5.0mm_Layout7x7_P0.65mm +VFBGA-49, 7x7, 5x5mm package, pitch 0.65mm +VFBGA-49 +0 +49 +49 +Package_BGA +VFBGA-100_7.0x7.0mm_Layout10x10_P0.65mm +VFBGA-100, 10x10, 7x7mm package, pitch 0.65mm +VFBGA-100 +0 +100 +100 +Package_BGA +WLP-4_0.73x0.73mm_Layout2x2_P0.35mm_Ball0.22mm_Pad0.2mm_NSMD +WLP-4, 2x2 raster, 0.73x0.73mm package, pitch 0.35mm; https://datasheets.maximintegrated.com/en/ds/MAX40200.pdf +BGA 4 0.35 +0 +4 +4 +Package_BGA +WLP-4_0.83x0.83mm_P0.4mm +WLP-4_0.83x0.83mm_P0.4mm https://pdfserv.maximintegrated.com/package_dwgs/21-100107.PDF, https://www.maximintegrated.com/en/app-notes/index.mvp/id/1891 +WLP-4 +0 +4 +4 +Package_BGA +WLP-4_0.86x0.86mm_P0.4mm +WLP-4_0.86x0.86mm_P0.4mm https://pdfserv.maximintegrated.com/package_dwgs/21-0612.PDF, https://www.maximintegrated.com/en/app-notes/index.mvp/id/1891 +WLP-4 +0 +4 +4 +Package_BGA +XBGA-121_10x10mm_Layout11x11_P0.8mm +XBGA-121, 11x11 raster, 10x10mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf +BGA 121 0.8 +0 +121 +121 +Package_BGA +XFBGA-36_3.5x3.5mm_Layout6x6_P0.5mm +XFBGA-36, https://www.nxp.com/docs/en/package-information/SOT1555-1.pdf +XFBGA-36 +0 +36 +36 +Package_BGA +XFBGA-64_5.0x5.0mm_Layout8x8_P0.5mm +XFBGA-64, https://www.nxp.com/docs/en/package-information/SOT1555-1.pdf +XFBGA-64 +0 +64 +64 +Package_BGA +XFBGA-121_8x8mm_Layout11x11_P0.65mm +XFBGA-121, https://www.nxp.com/docs/en/package-information/SOT1533-1.pdf +XFBGA-121 +0 +121 +121 +Package_CSP +Analog_LFCSP-8-1EP_3x3mm_P0.5mm_EP1.53x1.85mm +LFCSP, exposed pad, Analog Devices (http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5542.pdf) +LFCSP 8 0.5 +0 +12 +5 +Package_CSP +LFCSP-8-1EP_3x2mm_P0.5mm_EP1.6x1.65mm +LFCSP 8pin Pitch 0.5mm, http://www.analog.com/media/en/package-pcb-resources/package/57080735642908cp_8_4.pdf +LFCSP 8pin thermal pad 3x2mm Pitch 0.5mm +0 +9 +9 +Package_CSP +LFCSP-8-1EP_3x3mm_P0.5mm_EP1.45x1.74mm +LFCSP, 8 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-8/CP_8_13.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +13 +9 +Package_CSP +LFCSP-8_2x2mm_P0.5mm +LFCSP 8pin Pitch 0.5mm, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_8_6.pdf +LFCSP 8pin 2x2mm Pitch 0.5mm +0 +8 +8 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_22.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +21 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm_ThermalVias +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_22.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +26 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.854x1.854mm +16-Lead Lead Frame Chip Scale Package, 3x3mm, 0.5mm pitch, 1.854mm thermal pad (CP-16-22, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_16_22.pdf) +LFCSP 16 0.5 +0 +21 +17 +Package_CSP +LFCSP-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm +LFCSP, 16 pin, 4x4mm, 2.1mm sq pad (http://www.analog.com/media/en/technical-documentation/data-sheets/ADG633.pdf) +LFCSP 16 0.65 +0 +21 +17 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.1x2.1mm +20-Lead Frame Chip Scale Package - 4x4x0.9 mm Body [LFCSP], (see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_20_6.pdf) +LFCSP 0.5 +0 +25 +21 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +LFCSP, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +25 +21 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +LFCSP, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +35 +21 +Package_CSP +LFCSP-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +LFCSP, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_24_7.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +29 +25 +Package_CSP +LFCSP-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +LFCSP, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_24_7.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +39 +25 +Package_CSP +LFCSP-32-1EP_5x5mm_P0.5mm_EP3.25x3.25mm +32-Lead Frame Chip Scale Package LFCSP (5mm x 5mm); (see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-32/CP_32_27.pdf +LFCSP 0.5 +0 +37 +33 +Package_CSP +LFCSP-72-1EP_10x10mm_P0.5mm_EP5.3x5.3mm +LFCSP, 72 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1452_1451_1450.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +82 +73 +Package_CSP +LFCSP-72-1EP_10x10mm_P0.5mm_EP5.3x5.3mm_ThermalVias +LFCSP, 72 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1452_1451_1450.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +99 +73 +Package_CSP +LFCSP-72-1EP_10x10mm_P0.5mm_EP6.15x6.15mm +72-Lead Frame Chip Scale Package - 10x10x0.9 mm Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf) +LFCSP 0.5 +0 +77 +73 +Package_CSP +LFCSP-VQ-24-1EP_4x4mm_P0.5mm_EP2.642x2.642mm +LFCSP VQ, 24 pin, exposed pad, 4x4mm body, pitch 0.5mm (http://www.analog.com/media/en/package-pcb-resources/package/56702234806764cp_24_3.pdf, http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5801.pdf) +LFCSP 0.5 +0 +29 +25 +Package_CSP +LFCSP-VQ-48-1EP_7x7mm_P0.5mm +LFCSP VQ, 48 pin, exposed pad, 7x7mm body (http://www.analog.com/media/en/technical-documentation/data-sheets/AD7951.pdf, http://www.analog.com/en/design-center/packaging-quality-symbols-footprints/symbols-and-footprints/AD7951.html) +LFCSP 48 +0 +49 +49 +Package_CSP +pSemi_CSP-16_1.64x2.04mm_P0.4mm +pSemi CSP-16 1.64x2.04x0.285mm (http://www.psemi.com/pdf/datasheets/pe29101ds.pdf, http://www.psemi.com/pdf/app_notes/an77.pdf) +psemi csp 16 +0 +16 +16 +Package_CSP +pSemi_CSP-16_1.64x2.04mm_P0.4mm_Pad0.18mm +pSemi CSP-16 1.64x2.04x0.285mm (http://www.psemi.com/pdf/datasheets/pe29101ds.pdf, http://www.psemi.com/pdf/app_notes/an77.pdf) +psemi csp 16 +0 +16 +16 +Package_CSP +ST_WLCSP-25_Die425 +WLCSP-25, 5x5 raster, 2.097x2.493mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l031f6.pdf +BGA 25 0.4 +0 +25 +25 +Package_CSP +ST_WLCSP-25_Die444 +WLCSP-25, 5x5 raster, 2.423x2.325mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f031k6.pdf +BGA 25 0.4 +0 +25 +25 +Package_CSP +ST_WLCSP-25_Die457 +WLCSP-25, 5x5 raster, 2.133x2.070mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf +BGA 25 0.4 +0 +25 +25 +Package_CSP +ST_WLCSP-36_Die417 +WLCSP-36, 6x6 raster, 2.61x2.88mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l052t8.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-36_Die440 +WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-36_Die445 +WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-36_Die458 +WLCSP-36, 6x6 raster, 2.553x2.579mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-49_Die423 +WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f401vc.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die431 +WLCSP-49, 7x7 raster, 2.999x3.185mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die433 +WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; see section 7.1.1 of http://www.st.com/resource/en/datasheet/stm32f401ce.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die435 +WLCSP-49, 7x7 raster, 3.141x3.127mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die438 +WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303r8.pdf +BGA 49 0.5 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die439 +WLCSP-49, 7x7 raster, 3.417x3.151mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die447 +WLCSP-49, 7x7 raster, 3.294x3.258mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l072kz.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die448 +WLCSP-49, 7x7 raster, 3.277x3.109mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f071v8.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-63_Die427 +WLCSP-63, 7x9 raster, 3.228x4.164mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l151cc.pdf +BGA 63 0.4 +0 +63 +63 +Package_CSP +ST_WLCSP-64_Die414 +WLCSP-64, 8x8 raster, 4.466x4.395mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf +BGA 64 0.5 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die427 +WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die435 +WLCSP-64, 8x8 raster, 3.141x3.127mm package, pitch 0.35mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00257211.pdf +BGA 64 0.35 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die436 +WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zd.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die441 +WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00213872.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die442 +WLCSP-64, 8x8 raster, 3.347x3.585mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f091vb.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die462 +WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00340475.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-66_Die411 +WLCSP-66, 9x9 raster, 3.639x3.971mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf +BGA 66 0.4 +0 +66 +66 +Package_CSP +ST_WLCSP-66_Die432 +WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f378vc.pdf +BGA 66 0.4 +0 +66 +66 +Package_CSP +ST_WLCSP-72_Die415 +WLCSP-72, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf +BGA 72 0.4 +0 +72 +72 +Package_CSP +ST_WLCSP-81_Die415 +WLCSP-81, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf +BGA 81 0.4 +0 +81 +81 +Package_CSP +ST_WLCSP-81_Die421 +WLCSP-81, 9x9 raster, 3.693x3.815mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf +BGA 81 0.4 +0 +81 +81 +Package_CSP +ST_WLCSP-81_Die463 +WLCSP-81, 9x9 raster, 4.039x3.951mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00282249.pdf +BGA 81 0.4 +0 +81 +81 +Package_CSP +ST_WLCSP-90_Die413 +WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f405og.pdf +BGA 90 0.4 +0 +90 +90 +Package_CSP +ST_WLCSP-100_Die422 +WLCSP-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f302vc.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-100_Die446 +WLCSP-100, 10x10 raster, 4.775x5.041mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303zd.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-100_Die452 +WLCSP-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.7 of http://www.st.com/resource/en/datasheet/DM00330506.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-100_Die461 +WLCSP-100, 10x10 raster, 4.618x4.142mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00284211.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-104_Die437 +WLCSP-104, 9x12 raster, 4.095x5.094mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152ze.pdf +BGA 104 0.4 +0 +104 +104 +Package_CSP +ST_WLCSP-143_Die419 +WLCSP-143, 11x13 raster, 4.521x5.547mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf +BGA 143 0.4 +0 +143 +143 +Package_CSP +ST_WLCSP-143_Die449 +WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf +BGA 143 0.4 +0 +143 +143 +Package_CSP +ST_WLCSP-144_Die470 +WLCSP-144, 12x12 raster, 5.24x5.24mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf +BGA 144 0.4 +0 +144 +144 +Package_CSP +ST_WLCSP-168_Die434 +WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf +BGA 168 0.4 +0 +168 +168 +Package_CSP +ST_WLCSP-180_Die451 +WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.4mm; see section 6.6 of http://www.st.com/resource/en/datasheet/DM00273119.pdf +BGA 180 0.4 +0 +180 +180 +Package_CSP +WLCSP-6_1.4x1.0mm_P0.4mm +6pin Pitch 0.4mm +6pin Pitch 0.4mm WLCSP +0 +6 +6 +Package_CSP +WLCSP-8_1.58x1.63x0.35mm_Layout3x5_P0.35x0.4mm_Ball0.25mm_Pad0.25mm_NSMD +WLCSP/XFBGA 8-pin package, staggered pins, http://www.adestotech.com/wp-content/uploads/DS-AT25DF041B_040.pdf +WLCSP WLCSP-8 XFBGA XFBGA-8 CSP BGA Chip-Scale Glass-Top +0 +8 +8 +Package_CSP +WLCSP-12_1.56x1.56mm_P0.4mm +WLCSP 12 1.56x1.56 https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMM150-DS001-01.pdf +BMM150 WLCSP +0 +12 +12 +Package_CSP +WLCSP-12_1.403x1.555mm_P0.4mm_Stagger +WLCSP-12, 6x4 raster staggered array, 1.403x1.555mm package, pitch 0.4mm; http://ww1.microchip.com/downloads/en/devicedoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=208 +CSP 12 0.2x0.346333 +0 +12 +12 +Package_CSP +WLCSP-16_4x4_B2.17x2.32mm_P0.5mm +WLCSP-16, http://www.nxp.com/documents/data_sheet/LPC1102_1104.pdf, http://www.nxp.com/assets/documents/data/en/application-notes/AN3846.pdf +WLCSP-16 NXP +0 +16 +16 +Package_CSP +WLCSP-20_1.934x2.434mm_Layout4x5_P0.4mm +WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf +BGA 20 0.4 +0 +20 +20 +Package_CSP +WLCSP-20_1.994x1.94mm_Layout4x5_P0.4mm +WLCSP-20, https://www.nxp.com/docs/en/package-information/98ASA00539D.pdf +WLCSP-20 +0 +20 +20 +Package_CSP +WLCSP-20_1.994x1.609mm_Layout5x4_P0.4mm +WLCSP-20, https://www.nxp.com/docs/en/package-information/98ASA00676D.pdf +WLCSP-20 +0 +20 +20 +Package_CSP +WLCSP-36_2.82x2.67mm_Layout6x6_P0.4mm +WLCSP-36, https://www.nxp.com/docs/en/package-information/98ASA00949D.pdf +WLCSP-36 +0 +36 +36 +Package_CSP +WLCSP-36_2.374x2.459mm_Layout6x6_P0.35mm +WLCSP-36, https://www.nxp.com/docs/en/package-information/98ASA00604D.pdf +WLCSP-36 +0 +36 +36 +Package_CSP +WLCSP-56_3.170x3.444mm_Layout7x8_P0.4mm +WLCSP-56, 7x8 raster, 3.170x3.444mm package, pitch 0.4mm; see section 48.2.4 of http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001479B.pdf +BGA 56 0.4 +0 +56 +56 +Package_CSP +WLCSP-81_4.41x3.76mm_P0.4mm +WLCSP-81, 9x9, 0.4mm Pitch, http://www.st.com/content/ccc/resource/technical/document/technical_note/92/30/3c/a1/4c/bb/43/6f/DM00103228.pdf/files/DM00103228.pdf/jcr:content/translations/en.DM00103228.pdf +WLCSP ST +0 +81 +81 +Package_DFN_QFN +AMS_QFN-4-1EP_2x2mm_P0.95mm_EP0.7x1.6mm +UFD Package, 4-Lead Plastic QFN (2mm x 2mm), http://ams.com/eng/content/download/950231/2267959/483138 +QFN 0.95 +0 +6 +5 +Package_DFN_QFN +Cypress_QFN-56-1EP_8x8mm_P0.5mm_EP6.22x6.22mm_ThermalVias +56-Lead Plastic Quad Flat, No Lead Package (ML) - 8x8x0.9 mm Body [QFN] (see datasheet at http://www.cypress.com/file/138911/download and app note at http://www.cypress.com/file/140006/download) +QFN 0.5 +0 +87 +57 +Package_DFN_QFN +DFN-6-1EP_1.2x1.2mm_P0.4mm_EP0.3x0.94mm_PullBack +DFN, 6 Pin (http://www.onsemi.com/pub/Collateral/NCP133-D.PDF), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +DFN DFN_QFN +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_2x1.8mm_P0.5mm_EP1.2x1.6mm +DFN, 6 Pin (https://www.diodes.com/assets/Package-Files/U-DFN2018-6.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +DFN DFN_QFN +0 +11 +7 +Package_DFN_QFN +DFN-6-1EP_2x2mm_P0.5mm_EP0.61x1.42mm +DC6 Package; 6-Lead Plastic DFN (2mm x 2mm) (see Linear Technology DFN_6_05-08-1703.pdf) +DFN 0.5 +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_2x2mm_P0.65mm_EP1x1.6mm +6-Lead Plastic Dual Flat, No Lead Package (MA) - 2x2x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.65 +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_3x2mm_P0.5mm_EP1.65x1.35mm +DFN, 6 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-dfn/(DCB6)%20DFN%2005-08-1715%20Rev%20A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +DFN DFN_QFN +0 +11 +7 +Package_DFN_QFN +DFN-6-1EP_3x3mm_P0.95mm_EP1.7x2.6mm +DFN6 3*3 MM, 0.95 PITCH; CASE 506AH-01 (see ON Semiconductor 506AH.PDF) +DFN 0.95 +0 +13 +7 +Package_DFN_QFN +DFN-6-1EP_3x3mm_P1mm_EP1.5x2.4mm +DFN, 6 Pin (https://www.silabs.com/documents/public/data-sheets/Si7020-A20.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +DFN DFN_QFN +0 +11 +7 +Package_DFN_QFN +DFN-6_1.3x1.2mm_P0.4mm +6-Lead Plastic DFN (1.3mm x 1.2mm) +DFN 0.4 +0 +6 +6 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.3mm +DFN, 8 Pin (https://www.onsemi.com/pub/Collateral/NB3N551-D.PDF#page=7), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.5mm +DFN, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8127-AVR-8-bit-Microcontroller-ATtiny4-ATtiny5-ATtiny9-ATtiny10_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +DFN DFN_QFN +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP1.05x1.75mm +DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF) +DFN 0.5 +0 +11 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.45mm_EP0.64x1.38mm +DC8 Package 8-Lead Plastic DFN (2mm x 2mm) (see Linear Technology DFN_8_05-08-1719.pdf) +DFN 0.45 +0 +11 +9 +Package_DFN_QFN +DFN-8-1EP_2x3mm_P0.5mm_EP0.61x2.2mm +DDB Package; 8-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_8_05-08-1702.pdf) +DFN 0.5 +0 +12 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.5mm +8-Lead Plastic Dual Flat, No Lead Package (8MA2) - 2x3x0.6 mm Body [UDFN] (see Atmel-8815-SEEPROM-AT24CS01-02-Datasheet.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.36x1.46mm +8-Lead Plastic Dual Flat, No Lead Package (8MA2) - 2x3x0.6 mm Body (http://ww1.microchip.com/downloads/en/DeviceDoc/20005010F.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.75x1.45mm +8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.45mm_EP1.66x1.36mm +DCB Package 8-Lead Plastic DFN (2mm x 3mm) (see Linear Technology DFN_8_05-08-1718.pdf) +DFN 0.45 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x3mm_P0.5mm_EP1.66x2.38mm +DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x3mm_P0.65mm_EP1.7x2.05mm +DFN, 8 Pin (http://www.ixysic.com/home/pdfs.nsf/www/IX4426-27-28.pdf/$file/IX4426-27-28.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +DFN DFN_QFN +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x3mm_P0.65mm_EP1.55x2.4mm +8-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.65 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_4x4mm_P0.8mm_EP2.5x3.6mm +8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.8 +0 +15 +9 +Package_DFN_QFN +DFN-8-1EP_4x4mm_P0.8mm_EP2.39x2.21mm +8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN] (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF) +DFN 0.8 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_6x5mm_P1.27mm_EP2x2mm +DD Package; 8-Lead Plastic DFN (6mm x 5mm) (see http://www.everspin.com/file/236/download) +dfn +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_6x5mm_P1.27mm_EP4x4mm +DD Package; 8-Lead Plastic DFN (6mm x 5mm) (see http://www.everspin.com/file/236/download) +dfn +0 +25 +9 +Package_DFN_QFN +DFN-8_2x2mm_P0.5mm +DFN8 2x2, 0.5P; No exposed pad - Ref http://pdfserv.maximintegrated.com/land_patterns/90-0349.PDF +DFN 0.5 +0 +8 +8 +Package_DFN_QFN +DFN-10-1EP_2x3mm_P0.5mm_EP0.64x2.4mm +DDB Package; 10-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_10_05-08-1722.pdf) +DFN 0.5 +0 +13 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm +10-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +15 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.75x2.7mm +10-Lead Plastic Dual Flat No-Lead Package, 3x3mm Body (see Atmel Appnote 8826) +DFN 0.5 +0 +15 +11 +Package_DFN_QFN +DFN-10_2x2mm_P0.4mm +10-Lead Plastic DFN (2mm x 2mm) 0.40mm pitch +DFN 10 0.4mm +0 +10 +10 +Package_DFN_QFN +DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm +DDB Package; 12-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_12_05-08-1723.pdf) +DFN 0.45 +0 +15 +13 +Package_DFN_QFN +DFN-12-1EP_3x3mm_P0.5mm_EP2.05x2.86mm +10-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +17 +13 +Package_DFN_QFN +DFN-12-1EP_3x3mm_P0.45mm_EP1.66x2.38mm +DD Package; 12-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_12_05-08-1725.pdf) +DFN 0.45 +0 +17 +13 +Package_DFN_QFN +DFN-12-1EP_3x4mm_P0.5mm_EP1.7x3.3mm +DE/UE Package; 12-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_12_05-08-1695.pdf) +DFN 0.5 +0 +21 +13 +Package_DFN_QFN +DFN-12-1EP_4x4mm_P0.5mm_EP2.66x3.38mm +DF Package; 12-Lead Plastic DFN (4mm x 4mm) (see Linear Technology 05081733_A_DF12.pdf) +DFN 0.5 +0 +21 +13 +Package_DFN_QFN +DFN-12-1EP_4x4mm_P0.65mm_EP2.64x3.54mm +DFN12, 4x4, 0.65P; CASE 506CE (see ON Semiconductor 506CE.PDF) +DFN 0.65 +0 +21 +13 +Package_DFN_QFN +DFN-14-1EP_3x3mm_P0.4mm_EP1.78x2.35mm +DD Package; 14-Lead Plastic DFN (3mm x 3mm) (http://pdfserv.maximintegrated.com/land_patterns/90-0063.PDF) +DFN 0.40 +0 +19 +15 +Package_DFN_QFN +DFN-14-1EP_3x4.5mm_P0.65mm_EP1.65x4.25mm +14-lead very thin plastic quad flat, 3.0x4.5mm size, 0.65mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/14L_VDFN_4_5x3_0mm_JHA_C041198A.pdf) +VDFN DFN 0.65mm +0 +23 +15 +Package_DFN_QFN +DFN-14-1EP_3x4.5mm_P0.65mm_EP1.65x4.25mm_ThermalVias +14-lead very thin plastic quad flat, 3.0x4.5mm size, 0.65mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/14L_VDFN_4_5x3_0mm_JHA_C041198A.pdf) +VDFN DFN 0.65mm +0 +33 +15 +Package_DFN_QFN +DFN-14-1EP_3x4mm_P0.5mm_EP1.7x3.3mm +DE Package; 14-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_14_05-08-1708.pdf) +DFN 0.5 +0 +23 +15 +Package_DFN_QFN +DFN-14-1EP_4x4mm_P0.5mm_EP2.86x3.6mm +DFN14, 4x4, 0.5P; CASE 506CM (see ON Semiconductor 506CM.PDF) +DFN 0.5 +0 +23 +15 +Package_DFN_QFN +DFN-16-1EP_3x4mm_P0.45mm_EP1.7x3.3mm +DE Package; 16-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_16_05-08-1732.pdf) +DFN 0.45 +0 +25 +17 +Package_DFN_QFN +DFN-16-1EP_3x5mm_P0.5mm_EP1.66x4.4mm +DHC Package; 16-Lead Plastic DFN (5mm x 3mm) (see Linear Technology DFN_16_05-08-1706.pdf) +DFN 0.5 +0 +27 +17 +Package_DFN_QFN +DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm +DHD Package; 16-Lead Plastic DFN (5mm x 4mm) (see Linear Technology 05081707_A_DHD16.pdf) +DFN 0.5 +0 +25 +17 +Package_DFN_QFN +DFN-16-1EP_5x5mm_P0.5mm_EP3.46x4mm +DH Package; 16-Lead Plastic DFN (5mm x 5mm) (see Linear Technology DFN_16_05-08-1709.pdf) +DFN 0.5 +0 +26 +17 +Package_DFN_QFN +DFN-18-1EP_3x5mm_P0.5mm_EP1.66x4.4mm +DHC Package; 18-Lead Plastic DFN (5mm x 3mm) (see Linear Technology 05081955_0_DHC18.pdf) +DFN 0.5 +0 +29 +19 +Package_DFN_QFN +DFN-18-1EP_4x5mm_P0.5mm_EP2.44x4.34mm +DHD Package; 18-Lead Plastic DFN (5mm x 4mm) (see Linear Technology DFN_18_05-08-1778.pdf) +DFN 0.5 +0 +27 +19 +Package_DFN_QFN +DFN-20-1EP_5x6mm_P0.5mm_EP3.24x4.24mm +DFN20, 6x5, 0.5P; CASE 505AB (see ON Semiconductor 505AB.PDF) +DFN 0.5 +0 +33 +21 +Package_DFN_QFN +DFN-22-1EP_5x6mm_P0.5mm_EP3.14x4.3mm +DFN22 6*5*0.9 MM, 0.5 P; CASE 506AF\xe2\x88\x9201 (see ON Semiconductor 506AF.PDF) +DFN 0.5 +0 +35 +23 +Package_DFN_QFN +DFN-24-1EP_4x7mm_P0.5mm_EP2.64x6.44mm +DKD Package; 24-Lead Plastic DFN (7mm x 4mm) (see Linear Technology DFN_24_05-08-1864.pdf) +DFN 0.5 +0 +35 +25 +Package_DFN_QFN +DFN-32-1EP_4x7mm_P0.4mm_EP2.64x6.44mm +DKD Package; 32-Lead Plastic DFN (7mm x 4mm) (see Linear Technology DFN_32_05-08-1734.pdf) +DFN 0.4 +0 +43 +33 +Package_DFN_QFN +DFN-44-1EP_5x8.9mm_P0.4mm_EP3.7x8.4mm +DFN44 8.9x5, 0.4P; CASE 506BU-01 (see ON Semiconductor 506BU.PDF) +DFN 0.4 +0 +63 +45 +Package_DFN_QFN +DFN-S-8-1EP_6x5mm_P1.27mm +8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [DFN-S] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 1.27 +0 +16 +9 +Package_DFN_QFN +Diodes_DFN1006-3 +DFN package size 1006 3 pins +DFN package size 1006 3 pins +0 +3 +3 +Package_DFN_QFN +Infineon_MLPQ-16-14-1EP_4x4mm_P0.5mm +MLPQ 32 leads, 7x7mm, 0.127mm stencil (https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +mlpq 32 7x7mm +0 +19 +15 +Package_DFN_QFN +Infineon_MLPQ-40-32-1EP_7x7mm_P0.5mm +MLPQ 32 leads, 7x7mm, 0.127mm stencil (https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +mlpq 32 7x7mm +0 +76 +33 +Package_DFN_QFN +Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_EP5.55x5.55mm +MLPQ 48 leads, 7x7mm (https://www.infineon.com/dgdl/irs2093mpbf.pdf?fileId=5546d462533600a401535675fb892793) +mlpq 32 7x7mm +0 +113 +49 +Package_DFN_QFN +Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_Pad5.15x5.15mm +MLPQ 48 leads, 7x7mm (https://www.infineon.com/dgdl/irs2052mpbf.pdf?fileId=5546d462533600a401535675d3b32788) +mlpq 32 7x7mm +0 +117 +49 +Package_DFN_QFN +Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_Pad5.55x5.55mm +MLPQ 48 leads, 7x7mm (https://www.infineon.com/dgdl/irs2093mpbf.pdf?fileId=5546d462533600a401535675fb892793) +mlpq 32 7x7mm +0 +117 +49 +Package_DFN_QFN +Infineon_PQFN-22-15-4EP_6x5mm_P0.65mm +PQFN 22 leads, 5x6mm, 0.127mm stencil (https://www.infineon.com/dgdl/ir4301.pdf?fileId=5546d462533600a4015355d5fc691819, https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +pqfn 22 5x6mm +0 +56 +15 +Package_DFN_QFN +Infineon_PQFN-44-31-5EP_7x7mm_P0.5mm +PQFN 44 leads, 7x7mm, 0.127mm stencil (https://www.infineon.com/dgdl/ir4302.pdf?fileId=5546d462533600a4015355d602a9181d, https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +pqfn 44 7x7mm +0 +125 +27 +Package_DFN_QFN +Linear_DE14MA +14-Lead Plastic DFN, 4mm x 3mm (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-dfn/05081731_C_DE14MA.pdf) +DFN 0.5 +0 +14 +14 +Package_DFN_QFN +Linear_UGK52_QFN-46-52 +Linear UKG52(46) package, QFN-52-1EP variant (see http://cds.linear.com/docs/en/datasheet/3886fe.pdf) +QFN 0.5 +0 +62 +47 +Package_DFN_QFN +Micrel_MLF-8-1EP_2x2mm_P0.5mm_EP0.8x1.3mm_ThermalVias +http://ww1.microchip.com/downloads/en/DeviceDoc/mic2290.pdf +mlf 8 2x2 mm +0 +14 +9 +Package_DFN_QFN +Microchip_8E-16 +16-Lead Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN Microchip 8E 16 +0 +20 +17 +Package_DFN_QFN +Microchip_DRQFN-44-1EP_5x5mm_P0.7mm_EP2.65x2.65mm +QFN, 44 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/44L_VQFN_5x5mm_Dual_Row_%5BS3B%5D_C04-21399a.pdf) +QFN dual row +0 +49 +45 +Package_DFN_QFN +Microchip_DRQFN-44-1EP_5x5mm_P0.7mm_EP2.65x2.65mm_ThermalVias +QFN, 44 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/44L_VQFN_5x5mm_Dual_Row_%5BS3B%5D_C04-21399a.pdf) +QFN dual row +0 +59 +45 +Package_DFN_QFN +Microchip_DRQFN-64-1EP_7x7mm_P0.65mm_EP4.1x4.1mm +QFN, 64 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_7x7_Dual_Row_%5BSVB%5D_C04-21420a.pdf) +QFN dual row +0 +74 +65 +Package_DFN_QFN +Microchip_DRQFN-64-1EP_7x7mm_P0.65mm_EP4.1x4.1mm_ThermalVias +QFN, 64 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_7x7_Dual_Row_%5BSVB%5D_C04-21420a.pdf) +QFN dual row +0 +91 +65 +Package_DFN_QFN +Microsemi_QFN-40-32-2EP_6x8mm_P0.5mm +40-Lead (32-Lead Populated) Plastic Quad Flat, No Lead Package - 6x8x0.9mm Body (https://www.microsemi.com/document-portal/doc_download/131677-pd70224-data-sheet) +QFN 0.5 +0 +92 +34 +Package_DFN_QFN +Mini-Circuits_DL805 +https://ww2.minicircuits.com/case_style/DL805.pdf +RF Switch +0 +11 +9 +Package_DFN_QFN +Mini-Circuits_FG873-4_3x3mm +Mini Circuits Case style FG (https://ww2.minicircuits.com/case_style/FG873.pdf) +FG873 +0 +4 +4 +Package_DFN_QFN +MLF-6-1EP_1.6x1.6mm_P0.5mm_EP0.5x1.26mm +MLF, 6 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/mic5353.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +MLF DFN_QFN +0 +9 +7 +Package_DFN_QFN +MLF-8-1EP_3x3mm_P0.65mm_EP1.55x2.3mm +8-Pin ePad 3mm x 3mm MLF - 3x3x0.85 mm Body (see Microchip datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf) +DFN MLF 0.65 +0 +12 +9 +Package_DFN_QFN +MLF-8-1EP_3x3mm_P0.65mm_EP1.55x2.3mm_ThermalVias +8-Pin ePad 3mm x 3mm MLF - 3x3x0.85 mm Body (see Microchip datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf) +DFN MLF 0.65 +0 +15 +9 +Package_DFN_QFN +MLF-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +MLF, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=263), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +MLF DFN_QFN +0 +25 +21 +Package_DFN_QFN +MLF-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +MLF, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=263), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +MLF DFN_QFN +0 +30 +21 +Package_DFN_QFN +MLPQ-16-1EP_4x4mm_P0.65mm_EP2.8x2.8mm +Micro Leadframe Package, 16 pin with exposed pad +MLPQ- 0.65 +0 +21 +17 +Package_DFN_QFN +Nordic_AQFN-73-1EP_7x7mm_P0.5mm +http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52%2Fdita%2Fnrf52%2Fchips%2Fnrf52840.html +AQFN 7mm +0 +78 +74 +Package_DFN_QFN +OnSemi_DFN-8_2x2mm_P0.5mm +DFN8 2x2, 0.5P (https://www.onsemi.com/pub/Collateral/511AT.PDF) +DFN 0.5 +0 +8 +8 +Package_DFN_QFN +OnSemi_VCT-28_3.5x3.5mm_P0.4mm +OnSemi VCT, 28 Pin (http://www.onsemi.com/pub/Collateral/601AE.PDF), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +OnSemi VCT DFN_QFN +0 +28 +28 +Package_DFN_QFN +Panasonic_HQFN-16-1EP_4x4mm_P0.65mm_EP2.9x2.9mm +Panasonic HQFN-16, 4x4x0.85mm (https://industrial.panasonic.com/content/data/SC/ds/ds7/c0/PKG_HQFN016-A-0404XZL_EN.pdf) +panasonic hqfn +0 +37 +17 +Package_DFN_QFN +Panasonic_HSON-8_8x8mm_P2.00mm +Panasonic HSON-8, 8x8x1.25mm (https://industrial.panasonic.com/content/data/SC/ds/ds7/c0/PKG_HSON008-A-0808XXI_EN.pdf) +panasonic hson +0 +27 +9 +Package_DFN_QFN +QFN-12-1EP_3x3mm_P0.5mm_EP1.65x1.65mm +QFN, 12 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_12_%2005-08-1855.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +17 +13 +Package_DFN_QFN +QFN-12-1EP_3x3mm_P0.5mm_EP1.65x1.65mm_ThermalVias +QFN, 12 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_12_%2005-08-1855.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +22 +13 +Package_DFN_QFN +QFN-12-1EP_3x3mm_P0.51mm_EP1.45x1.45mm +QFN, 12 Pin (https://ww2.minicircuits.com/case_style/DQ1225.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +17 +13 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm +QFN, 16 Pin (https://www.st.com/content/ccc/resource/technical/document/datasheet/4a/50/94/16/69/af/4b/58/DM00047334.pdf/files/DM00047334.pdf/jcr:content/translations/en.DM00047334.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm_ThermalVias +QFN, 16 Pin (http://www.cypress.com/file/46236/download), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.9x1.9mm +QFN, 16 Pin (https://www.nxp.com/docs/en/package-information/98ASA00525D.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.9x1.9mm_ThermalVias +QFN, 16 Pin (https://www.nxp.com/docs/en/package-information/98ASA00525D.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +26 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm +QFN, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm_ThermalVias +QFN, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +26 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.5mm_EP2.45x2.45mm +QFN, 16 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/isl8117.pdf#page=22), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.5mm_EP2.45x2.45mm_ThermalVias +QFN, 16 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/isl8117.pdf#page=22), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm +QFN, 16 Pin (http://www.thatcorp.com/datashts/THAT_1580_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm_ThermalVias +QFN, 16 Pin (http://www.thatcorp.com/datashts/THAT_1580_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm +QFN, 16 Pin (https://www.allegromicro.com/~/media/Files/Datasheets/A4403-Datasheet.ashx), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_PullBack +QFN, 16 Pin (https://ams.com/documents/20143/36005/AS5055A_DS000304_2-00.pdf#page=24), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_PullBack_ThermalVias +QFN, 16 Pin (https://ams.com/documents/20143/36005/AS5055A_DS000304_2-00.pdf#page=24), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_ThermalVias +QFN, 16 Pin (https://www.allegromicro.com/~/media/Files/Datasheets/A4403-Datasheet.ashx), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.15x2.15mm +QFN, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/4001f.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.15x2.15mm_ThermalVias +QFN, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/4001f.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_5x5mm_P0.8mm_EP2.7x2.7mm +QFN, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_5x5mm_P0.8mm_EP2.7x2.7mm_ThermalVias +QFN, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.4mm_EP1.65x1.65mm +QFN, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3553fc.pdf#page=34), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.4mm_EP1.65x1.65mm_ThermalVias +QFN, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3553fc.pdf#page=34), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.45mm_EP1.6x1.6mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=212), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.45mm_EP1.6x1.6mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=212), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm_ThermalVias +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +32 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=274), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=274), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=164), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=164), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_4x5mm_P0.5mm_EP2.65x3.65mm +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1711.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +27 +21 +Package_DFN_QFN +QFN-20-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1711.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +40 +21 +Package_DFN_QFN +QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=276), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=276), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +35 +21 +Package_DFN_QFN +QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm +QFN, 24 Pin (https://www.invensense.com/wp-content/uploads/2015/02/PS-MPU-9250A-01-v1.1.pdf#page=39), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm_ThermalVias +QFN, 24 Pin (https://www.invensense.com/wp-content/uploads/2015/02/PS-MPU-9250A-01-v1.1.pdf#page=39), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +34 +25 +Package_DFN_QFN +QFN-24-1EP_3x4mm_P0.4mm_EP1.65x2.65mm +QFN, 24 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +25 +Package_DFN_QFN +QFN-24-1EP_3x4mm_P0.4mm_EP1.65x2.65mm_ThermalVias +QFN, 24 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +38 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +QFN, 24 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=278), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +QFN, 24 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=278), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.6mm +QFN, 24 Pin (https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.6mm_ThermalVias +QFN, 24 Pin (https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm +QFN, 24 Pin (http://www.alfarzpp.lv/eng/sc/AS3330.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm_ThermalVias +QFN, 24 Pin (http://www.alfarzpp.lv/eng/sc/AS3330.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm +QFN, 24 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/hmc431.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_ThermalVias +QFN, 24 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/hmc431.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.65x2.65mm +QFN, 24 Pin (http://www.cypress.com/file/46236/download), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.65x2.65mm_ThermalVias +QFN, 24 Pin (http://www.cypress.com/file/46236/download), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_24_05-08-1696.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +25 +Package_DFN_QFN +QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_24_05-08-1696.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +44 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.2x3.2mm +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UH24)%20QFN%2005-08-1747%20Rev%20A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.2x3.2mm_ThermalVias +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UH24)%20QFN%2005-08-1747%20Rev%20A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +51 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.4x3.4mm +QFN, 24 Pin (http://www.thatcorp.com/datashts/THAT_5173_Datasheet.pdf#page=17), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.4x3.4mm_ThermalVias +QFN, 24 Pin (http://www.thatcorp.com/datashts/THAT_5173_Datasheet.pdf#page=17), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.6x3.6mm +QFN, 24 Pin (https://www.nxp.com/docs/en/package-information/98ASA00734D.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +34 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.6x3.6mm_ThermalVias +QFN, 24 Pin (https://www.nxp.com/docs/en/package-information/98ASA00734D.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +67 +25 +Package_DFN_QFN +QFN-28-1EP_3x6mm_P0.5mm_EP1.7x4.75mm +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081926_0_UDE28.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +37 +29 +Package_DFN_QFN +QFN-28-1EP_3x6mm_P0.5mm_EP1.7x4.75mm_ThermalVias +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081926_0_UDE28.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +53 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.4x2.4mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=280), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +33 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.4x2.4mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=280), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +43 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf#page=16), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +33 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf#page=16), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +43 +29 +Package_DFN_QFN +QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm +QFN, 28 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/3555fe.pdf#page=32), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +35 +29 +Package_DFN_QFN +QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias +QFN, 28 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/3555fe.pdf#page=32), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +48 +29 +Package_DFN_QFN +QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=283), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +38 +29 +Package_DFN_QFN +QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=283), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +55 +29 +Package_DFN_QFN +QFN-28-1EP_5x6mm_P0.5mm_EP3.65x4.65mm +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081932_0_UHE28.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +41 +29 +Package_DFN_QFN +QFN-28-1EP_5x6mm_P0.5mm_EP3.65x4.65mm_ThermalVias +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081932_0_UHE28.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +62 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm +QFN, 28 Pin (https://www.semtech.com/uploads/documents/sx1272.pdf#page=125), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +38 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm_ThermalVias +QFN, 28 Pin (https://www.semtech.com/uploads/documents/sx1272.pdf#page=125), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +71 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.25x4.25mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=289), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +38 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.25x4.25mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=289), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +71 +29 +Package_DFN_QFN +QFN-28_4x4mm_P0.5mm +QFN, 28 Pin (http://www.st.com/resource/en/datasheet/stm32f031k6.pdf#page=90), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +28 +28 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8153-8-and-16-bit-avr-microcontroller-xmega-e-atxmega8e5-atxmega16e5-atxmega32e5_datasheet.pdf (Page 70)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +37 +33 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8153-8-and-16-bit-avr-microcontroller-xmega-e-atxmega8e5-atxmega16e5-atxmega32e5_datasheet.pdf (Page 70)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +47 +33 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.65x2.65mm +QFN, 32 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/l32.4x4a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +37 +33 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.65x2.65mm_ThermalVias +QFN, 32 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/l32.4x4a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf (Page 20)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf (Page 20)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.6x3.6mm +QFN, 32 Pin (http://infocenter.nordicsemi.com/pdf/nRF52810_PS_v1.1.pdf (Page 468)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.6x3.6mm_ThermalVias +QFN, 32 Pin (http://infocenter.nordicsemi.com/pdf/nRF52810_PS_v1.1.pdf (Page 468)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.45x3.45mm +QFN, 32 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_32_05-08-1693.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.45x3.45mm_ThermalVias +QFN, 32 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_32_05-08-1693.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.65x3.65mm +QFN, 32 Pin (https://www.exar.com/ds/mxl7704.pdf (Page 35)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.65x3.65mm_ThermalVias +QFN, 32 Pin (https://www.exar.com/ds/mxl7704.pdf (Page 35)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.7x4.7mm +QFN, 32 Pin (https://www.nxp.com/docs/en/data-sheet/LPC111X.pdf (Page 108)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +49 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.7x4.7mm_ThermalVias +QFN, 32 Pin (https://www.nxp.com/docs/en/data-sheet/LPC111X.pdf (Page 108)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +75 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.65x4.65mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8209-8-bit%20AVR%20ATmega16M1-32M1-64M1_Datasheet.pdf (Page 426)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +49 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.65x4.65mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8209-8-bit%20AVR%20ATmega16M1-32M1-64M1_Datasheet.pdf (Page 426)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +75 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP5.4x5.4mm +QFN, 32 Pin (http://www.thatcorp.com/datashts/THAT_5171_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +49 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP5.4x5.4mm_ThermalVias +QFN, 32 Pin (http://www.thatcorp.com/datashts/THAT_5171_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +75 +33 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.1mm +QFN, 36 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf (page 43)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +46 +37 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.1mm_ThermalVias +QFN, 36 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf (page 43)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +56 +37 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.6mm +QFN, 36 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UHE36)%20QFN%2005-08-1876%20Rev%20%C3%98.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +49 +37 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.6mm_ThermalVias +QFN, 36 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UHE36)%20QFN%2005-08-1876%20Rev%20%C3%98.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +56 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm +QFN, 36 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/36L_QFN_6x6_with_3_7x3_7_EP_Punch_Dimpled_4E_C04-0241A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +46 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm_ThermalVias +QFN, 36 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/36L_QFN_6x6_with_3_7x3_7_EP_Punch_Dimpled_4E_C04-0241A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +63 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP4.1x4.1mm +QFN, 36 Pin (www.st.com/resource/en/datasheet/stm32f101t6.pdf (page 72)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +46 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP4.1x4.1mm_ThermalVias +QFN, 36 Pin (www.st.com/resource/en/datasheet/stm32f101t6.pdf (page 72)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +63 +37 +Package_DFN_QFN +QFN-38-1EP_4x6mm_P0.4mm_EP2.65x4.65mm +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1750.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +47 +39 +Package_DFN_QFN +QFN-38-1EP_4x6mm_P0.4mm_EP2.65x4.65mm_ThermalVias +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1750.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +56 +39 +Package_DFN_QFN +QFN-38-1EP_5x7mm_P0.5mm_EP3.15x5.15mm +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1701.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +54 +39 +Package_DFN_QFN +QFN-38-1EP_5x7mm_P0.5mm_EP3.15x5.15mm_ThermalVias +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1701.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +63 +39 +Package_DFN_QFN +QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=297), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +50 +41 +Package_DFN_QFN +QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm_ThermalVias +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=297), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +67 +41 +Package_DFN_QFN +QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=295), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +57 +41 +Package_DFN_QFN +QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm_ThermalVias +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=295), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +83 +41 +Package_DFN_QFN +QFN-42-1EP_5x6mm_P0.4mm_EP3.7x4.7mm +QFN, 42 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081875_0_UHE42.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +55 +43 +Package_DFN_QFN +QFN-42-1EP_5x6mm_P0.4mm_EP3.7x4.7mm_ThermalVias +QFN, 42 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081875_0_UHE42.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +76 +43 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.2x5.2mm +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/2512S.pdf#page=17), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +61 +45 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.2x5.2mm_ThermalVias +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/2512S.pdf#page=17), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +87 +45 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm +QFN, 44 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_44_05-08-1763.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +61 +45 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm_ThermalVias +QFN, 44 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_44_05-08-1763.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +87 +45 +Package_DFN_QFN +QFN-44-1EP_8x8mm_P0.65mm_EP6.45x6.45mm +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf#page=152), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +70 +45 +Package_DFN_QFN +QFN-44-1EP_8x8mm_P0.65mm_EP6.45x6.45mm_ThermalVias +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf#page=152), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +107 +45 +Package_DFN_QFN +QFN-44-1EP_9x9mm_P0.65mm_EP7.5x7.5mm +44-Lead Plastic Quad Flat, No Lead Package - 9x9 mm Body [QFN]; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf +QFN 0.65 +0 +49 +45 +Package_DFN_QFN +QFN-44-1EP_9x9mm_P0.65mm_EP7.5x7.5mm_ThermalVias +44-Lead Plastic Quad Flat, No Lead Package - 9x9 mm Body [QFN] with thermal vias; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf +QFN 0.65 +0 +55 +45 +Package_DFN_QFN +QFN-48-1EP_5x5mm_P0.35mm_EP3.7x3.7mm +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_5x5mm_P0.35mm_EP3.7x3.7mm_ThermalVias +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +75 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm +QFN, 48 Pin (https://static.dev.sifive.com/SiFive-FE310-G000-datasheet-v1p5.pdf#page=20), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm_ThermalVias +QFN, 48 Pin (https://static.dev.sifive.com/SiFive-FE310-G000-datasheet-v1p5.pdf#page=20), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.3x4.3mm +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.3x4.3mm_ThermalVias +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +75 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.6x4.6mm +QFN, 48 Pin (http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.3.pdf#page=67), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.6x4.6mm_ThermalVias +QFN, 48 Pin (http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.3.pdf#page=67), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.66x4.66mm +QFN, 48 Pin (https://www.onsemi.com/pub/Collateral/485BA.PDF), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.66x4.66mm_ThermalVias +QFN, 48 Pin (https://www.onsemi.com/pub/Collateral/485BA.PDF), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mm +QFN, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2041_datasheet.pdf#page=62), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mm_ThermalVias +QFN, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2041_datasheet.pdf#page=62), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm +QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm_ThermalVias +QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm +QFN, 48 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_48_05-08-1704.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm_ThermalVias +QFN, 48 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_48_05-08-1704.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.45x5.45mm +QFN, 48 Pin (http://www.thatcorp.com/datashts/THAT_626x_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.45x5.45mm_ThermalVias +QFN, 48 Pin (http://www.thatcorp.com/datashts/THAT_626x_Datasheet.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +49 +Package_DFN_QFN +QFN-52-1EP_7x8mm_P0.5mm_EP5.41x6.45mm +QFN, 52 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_52_05-08-1729.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +73 +53 +Package_DFN_QFN +QFN-52-1EP_7x8mm_P0.5mm_EP5.41x6.45mm_ThermalVias +QFN, 52 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_52_05-08-1729.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +104 +53 +Package_DFN_QFN +QFN-56-1EP_7x7mm_P0.4mm_EP5.6x5.6mm +QFN, 56 Pin (http://www.cypress.com/file/416486/download#page=40), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_7x7mm_P0.4mm_EP5.6x5.6mm_ThermalVias +QFN, 56 Pin (http://www.cypress.com/file/416486/download#page=40), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +99 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm +QFN, 56 Pin (http://www.ti.com/lit/an/scea032/scea032.pdf#page=4), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm_ThermalVias +QFN, 56 Pin (http://www.ti.com/lit/an/scea032/scea032.pdf#page=4), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +99 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm_ThermalVias_TopTented +QFN, 56 Pin top tented version (manually modified). For information see: http://www.cypress.com/file/138911/download +QFN DFN_QFN +0 +115 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP5.6x5.6mm +QFN, 56 Pin (http://www.ti.com/lit/ds/symlink/tlc5957.pdf#page=23), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP5.6x5.6mm_ThermalVias +QFN, 56 Pin (http://www.ti.com/lit/ds/symlink/tlc5957.pdf#page=23), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +99 +57 +Package_DFN_QFN +QFN-64-1EP_8x8mm_P0.4mm_EP6.5x6.5mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_8x8_with%206_5x6_5%20EP_JXX_C04-0437A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_8x8mm_P0.4mm_EP6.5x6.5mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_8x8_with%206_5x6_5%20EP_JXX_C04-0437A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP4.7x4.7mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/60001477A.pdf (page 1083)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +74 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP4.7x4.7mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/60001477A.pdf (page 1083)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +91 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP5.4x5.4mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/70593d.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +81 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP5.4x5.4mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/70593d.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +107 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/tusb8041.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +81 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm_ThermalVias +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/tusb8041.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +107 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002304A.pdf (page 43)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002304A.pdf (page 43)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +127 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.5x7.5mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc7593.pdf (page 432)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +101 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.5x7.5mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc7593.pdf (page 432)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +151 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.15x7.15mm +QFN, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/229321fa.pdf#page=27), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.15x7.15mm_ThermalVias +QFN, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/229321fa.pdf#page=27), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.25x7.25mm +64-Lead Plastic Quad Flat No-Lead Package, 9x9mm Body (see Atmel Appnote 8826) +QFN 0.5 +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.35x7.35mm +64-Lead Plastic Quad Flat, No Lead Package (MR) - 9x9x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.65x7.65mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2549-8-bit-AVR-Microcontroller-ATmega640-1280-1281-2560-2561_datasheet.pdf (page 415)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +101 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.65x7.65mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2549-8-bit-AVR-Microcontroller-ATmega640-1280-1281-2560-2561_datasheet.pdf (page 415)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +151 +65 +Package_DFN_QFN +QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm +QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +85 +69 +Package_DFN_QFN +QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm_ThermalVias +QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +111 +69 +Package_DFN_QFN +QFN-76-1EP_9x9mm_P0.4mm_EP3.8x3.8mm +QFN, 76 Pin (https://www.marvell.com/documents/bqcwxsoiqfjkcjdjhkvc/#page=19), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +86 +77 +Package_DFN_QFN +QFN-76-1EP_9x9mm_P0.4mm_EP3.8x3.8mm_ThermalVias +QFN, 76 Pin (https://www.marvell.com/documents/bqcwxsoiqfjkcjdjhkvc/#page=19), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +103 +77 +Package_DFN_QFN +Qorvo_DFN-8-1EP_2x2mm_P0.5mm +DFN 8 2x2mm, 0.5mm http://www.qorvo.com/products/d/da000896 +DFN 0.5 Qorvo 2x2mm +0 +9 +9 +Package_DFN_QFN +ROHM_DFN0604-3 +DFN package size 0604 3 pins +DFN package size 0604 3 pins +0 +3 +3 +Package_DFN_QFN +SiliconLabs_QFN-20-1EP_3x3mm_P0.5mm +20-Lead Plastic Quad Flat, No Lead Package - 3x3 mm Body [QFN] with corner pads; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf +QFN 0.5 +0 +25 +21 +Package_DFN_QFN +SiliconLabs_QFN-20-1EP_3x3mm_P0.5mm_ThermalVias +20-Lead Plastic Quad Flat, No Lead Package - 3x3 mm Body [QFN] with corner pads and thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf +QFN 0.5 +0 +31 +21 +Package_DFN_QFN +ST_UFQFPN-20_3x3mm_P0.5mm +UFQFPN 20-lead, 3 x 3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package (http://www.st.com/resource/en/datasheet/stm8s003f3.pdf) +UFQFPN 0.5 +0 +40 +20 +Package_DFN_QFN +ST_UQFN-6L_1.5x1.7mm_Pitch0.5mm +ST UQFN 6 pin 0.5mm Pitch http://www.st.com/resource/en/datasheet/ecmf02-2amx6.pdf +UQFN DFN 0.5 ST +0 +6 +6 +Package_DFN_QFN +TDFN-8-1EP_3x2mm_P0.5mm_EP1.80x1.65mm +8-lead plastic dual flat, 2x3x0.75mm size, 0.5mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MN_C04-0129E-MN.pdf) +TDFN DFN 0.5mm +0 +12 +9 +Package_DFN_QFN +TDFN-8-1EP_3x2mm_P0.5mm_EP1.80x1.65mm_ThermalVias +8-lead plastic dual flat, 2x3x0.75mm size, 0.5mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MN_C04-0129E-MN.pdf) +TDFN DFN 0.5mm +0 +17 +9 +Package_DFN_QFN +TDFN-12_2x3mm_P0.5mm +TDFN, 12 Pads, No exposed, http://www.st.com/resource/en/datasheet/stm6600.pdf +DFN +0 +12 +12 +Package_DFN_QFN +Texas_MOF0009A +Texas Instruments, QFM MOF0009A, 6x8x2mm (http://www.ti.com/lit/ml/mpsi063a/mpsi063a.pdf) +ti qfm mof0009a +0 +24 +9 +Package_DFN_QFN +Texas_R-PUQFN-N10 +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=MPQF186&fileType=pdf +Texas_R-PUQFN-N10 +0 +10 +10 +Package_DFN_QFN +Texas_R-PWQFN-N28_EP2.1x3.1mm +QFN, 28 Pin (http://www.ti.com/lit/ds/symlink/tps51363.pdf#page=29), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +33 +29 +Package_DFN_QFN +Texas_R-PWQFN-N28_EP2.1x3.1mm_ThermalVias +QFN, 28 Pin (http://www.ti.com/lit/ds/symlink/tps51363.pdf#page=29), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +43 +29 +Package_DFN_QFN +Texas_RGE0024H_EP2.7x2.7mm +Texas QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_RGE0024H_EP2.7x2.7mm_ThermalVias +Texas QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_RUM0016A_EP2.6x2.6mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/lmh0074.pdf#page=13), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +Texas_RUM0016A_EP2.6x2.6mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/lmh0074.pdf#page=13), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_RWH0032A +Texas Instruments, RWH0032A, 8x8x0.9mm (http://www.ti.com/lit/ds/snosd10c/snosd10c.pdf) +ti rwh0032a +0 +71 +33 +Package_DFN_QFN +Texas_RWH0032A_ThermalVias +Texas Instruments, RWH0032A, 8x8x0.9mm (http://www.ti.com/lit/ds/snosd10c/snosd10c.pdf) +ti rwh0032a +0 +94 +33 +Package_DFN_QFN +Texas_R_PUQFN-N12 +Texas_R_PUQFN-N12 http://www.ti.com/lit/ds/symlink/txb0104.pdf +Texas_R_PUQFN-N12 +0 +13 +12 +Package_DFN_QFN +Texas_S-PDSO-N10_EP1.2x2mm +DFN, 10 Pin (http://www.ti.com/lit/ds/symlink/tps7a91.pdf#page=30), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +15 +11 +Package_DFN_QFN +Texas_S-PDSO-N10_EP1.2x2mm_ThermalVias +DFN, 10 Pin (http://www.ti.com/lit/ds/symlink/tps7a91.pdf#page=30), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +22 +11 +Package_DFN_QFN +Texas_S-PVQFN-N14 +Texas_S-PVQFN-N14 http://www.ti.com/lit/ds/symlink/txb0104.pdf +Texas_S-PVQFN-N14_4.3x4.3_Pitch0.5mm_ThermalPad +0 +19 +15 +Package_DFN_QFN +Texas_S-PVQFN-N14_ThermalVias +Texas_S-PVQFN-N14_ThermalVias http://www.ti.com/lit/ds/symlink/txb0104.pdf +Texas_S-PVQFN-N14_ThermalVias +0 +24 +15 +Package_DFN_QFN +Texas_S-PVQFN-N16_EP2.7x2.7mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/msp430g2001.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +26 +17 +Package_DFN_QFN +Texas_S-PVQFN-N16_EP2.7x2.7mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/msp430g2001.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.4x2.4mm +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/cc1101.pdf#page=101), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.4x2.4mm_ThermalVias +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/cc1101.pdf#page=101), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +35 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.7x2.7mm +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/drv8662.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.7x2.7mm_ThermalVias +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/drv8662.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +35 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP3.15x3.15mm +QFN, 20 Pin (www.ti.com/lit/ds/symlink/tps7a7200.pdf#page=36), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP3.15x3.15mm_ThermalVias +QFN, 20 Pin (www.ti.com/lit/ds/symlink/tps7a7200.pdf#page=36), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +21 +Package_DFN_QFN +Texas_S-PVQFN-N24_EP2.1x2.1mm +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5720.pdf#page=111), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_S-PVQFN-N24_EP2.1x2.1mm_ThermalVias +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5720.pdf#page=111), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_S-PVQFN-N32_EP3.45x3.45mm +QFN, 32 Pin (http://www.ti.com/lit/ds/symlink/msp430f1122.pdf#page=46), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +Texas_S-PVQFN-N32_EP3.45x3.45mm_ThermalVias +QFN, 32 Pin (http://www.ti.com/lit/ds/symlink/msp430f1122.pdf#page=46), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +Texas_S-PVQFN-N36_EP4.4x4.4mm +QFN, 36 Pin (http://www.ti.com/lit/ds/slvsba5d/slvsba5d.pdf#page=31), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +46 +37 +Package_DFN_QFN +Texas_S-PVQFN-N36_EP4.4x4.4mm_ThermalVias +QFN, 36 Pin (http://www.ti.com/lit/ds/slvsba5d/slvsba5d.pdf#page=31), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +79 +37 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP2.9x2.9mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5731.pdf#page=114), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +45 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP2.9x2.9mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5731.pdf#page=114), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +55 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP3.52x2.62mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/drv8308.pdf#page=56), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP3.52x2.62mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/drv8308.pdf#page=56), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +60 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.6x4.6mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/dac7750.pdf#page=55), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +50 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.6x4.6mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/dac7750.pdf#page=55), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +83 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.15x4.15mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430g2755.pdf#page=70), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +50 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.15x4.15mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430g2755.pdf#page=70), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +83 +41 +Package_DFN_QFN +Texas_S-PVQFN-N48_EP5.15x5.15mm +QFN, 48 Pin (http://www.ti.com/lit/ds/symlink/msp430f5232.pdf#page=112), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +65 +49 +Package_DFN_QFN +Texas_S-PVQFN-N48_EP5.15x5.15mm_ThermalVias +QFN, 48 Pin (http://www.ti.com/lit/ds/symlink/msp430f5232.pdf#page=112), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +111 +49 +Package_DFN_QFN +Texas_S-PVQFN-N64_EP4.25x4.25mm +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/msp430f5217.pdf#page=117), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +69 +65 +Package_DFN_QFN +Texas_S-PVQFN-N64_EP4.25x4.25mm_ThermalVias +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/msp430f5217.pdf#page=117), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +Texas_S-PWQFN-N16_EP2.1x2.1mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/drv8801.pdf#page=31), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +Texas_S-PWQFN-N16_EP2.1x2.1mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/drv8801.pdf#page=31), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_S-PWQFN-N20 +20-Pin Plastic Quad Flatpack No-Lead Package, Body 3.0x3.0x0.8mm, Texas Instruments (http://www.ti.com/lit/ds/symlink/tps22993.pdf) +QFN 0.4 +0 +24 +20 +Package_DFN_QFN +Texas_S-PWQFN-N24_EP2.7x2.7mm +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/bq25601.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_S-PWQFN-N24_EP2.7x2.7mm_ThermalVias +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/bq25601.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_S-PWQFN-N100_EP5.5x5.5mm +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/lit/ds/sllse76m/sllse76m.pdf +MultiRow QFN +0 +114 +105 +Package_DFN_QFN +Texas_S-PWQFN-N100_EP5.5x5.5mm_ThermalVias +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/lit/ds/sllse76m/sllse76m.pdf +MultiRow QFN +0 +131 +105 +Package_DFN_QFN +Texas_VQFN-RHL-20 +http://www.ti.com/lit/ds/symlink/bq51050b.pdf +RHL0020A +0 +33 +21 +Package_DFN_QFN +Texas_VQFN-RHL-20_ThermalVias +http://www.ti.com/lit/ds/symlink/bq51050b.pdf +RHL0020A +0 +41 +21 +Package_DFN_QFN +Texas_WQFN-MR-100_3x3-DapStencil +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=mpqf258&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=LPPD235&fileType=pdf +MultiRow QFN +0 +113 +105 +Package_DFN_QFN +Texas_WQFN-MR-100_ThermalVias_3x3-DapStencil +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=mpqf258&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=LPPD235&fileType=pdf +MultiRow QFN +0 +126 +105 +Package_DFN_QFN +Texas_X2QFN-12_1.6x1.6mm_P0.4mm +Texas X2QFN, 12 Pin (http://www.ti.com/lit/ml/mpqf391c/mpqf391c.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +Texas X2QFN DFN_QFN +0 +12 +12 +Package_DFN_QFN +TQFN-16-1EP_3x3mm_P0.5mm_EP1.23x1.23mm +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0136.PDF (T1633-5), https://pdfserv.maximintegrated.com/land_patterns/90-0032.PDF), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +TQFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +TQFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_PullBack +TQFN, 24 Pin (https://ams.com/documents/20143/36005/AS1115_DS000206_1-00.pdf/3d3e6d35-b184-1329-adf9-2d769eb2404f), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +TQFN DFN_QFN +0 +29 +25 +Package_DFN_QFN +TQFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_PullBack_ThermalVias +TQFN, 24 Pin (https://ams.com/documents/20143/36005/AS1115_DS000206_1-00.pdf/3d3e6d35-b184-1329-adf9-2d769eb2404f), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +TQFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +UDFN-4_1x1mm_P0.65mm +UDFN-4_1x1mm_P0.65mm +UDFN-4_1x1mm_P0.65mm +0 +16 +5 +Package_DFN_QFN +UDFN-10_1.35x2.6mm_P0.5mm +http://www.st.com/content/ccc/resource/technical/document/datasheet/f2/11/8a/ed/40/31/40/56/DM00088292.pdf/files/DM00088292.pdf/jcr:content/translations/en.DM00088292.pdf +UDFN 0.5 uQFN +0 +10 +10 +Package_DFN_QFN +UQFN-10_1.3x1.8mm_P0.4mm +UQFN, 10 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001725D.pdf (Page 9)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +UQFN DFN_QFN +0 +10 +10 +Package_DFN_QFN +UQFN-10_1.4x1.8mm_P0.4mm +UQFN 10pin, https://www.onsemi.com/pub/Collateral/488AT.PDF +UQFN-10_1.4x1.8mm_P0.4mm +0 +10 +10 +Package_DFN_QFN +UQFN-10_1.6x2.1mm_P0.5mm +UQFN, 10 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001725D.pdf (Page 12)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +UQFN DFN_QFN +0 +10 +10 +Package_DFN_QFN +UQFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm +16-Lead Ultra Thin Quad Flat, No Lead Package (UC) - 3x3x0.5 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +21 +17 +Package_DFN_QFN +UQFN-16-1EP_4x4mm_P0.65mm_EP2.6x2.6mm +UQFN, 16 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/16L_UQFN_4x4x0_5mm_JQ_C04257A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +UQFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +UQFN-16-1EP_4x4mm_P0.65mm_EP2.6x2.6mm_ThermalVias +UQFN, 16 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/16L_UQFN_4x4x0_5mm_JQ_C04257A.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +UQFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +UQFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm +16-Lead Ultra Thin Plastic Quad Flat, No Lead Package (JQ) - 4x4x0.5 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.65 +0 +21 +17 +Package_DFN_QFN +UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=332), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +25 +21 +Package_DFN_QFN +UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm_ThermalVias +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=332), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +30 +21 +Package_DFN_QFN +UQFN-20-1EP_4x4mm_P0.5mm_EP2.8x2.8mm +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/40001839B.pdf#page=464), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +25 +21 +Package_DFN_QFN +UQFN-20-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_ThermalVias +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/40001839B.pdf#page=464), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +35 +21 +Package_DFN_QFN +UQFN-28-1EP_4x4mm_P0.4mm_EP2.35x2.35mm +UQFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=338), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +33 +29 +Package_DFN_QFN +UQFN-28-1EP_4x4mm_P0.4mm_EP2.35x2.35mm_ThermalVias +UQFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=338), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +43 +29 +Package_DFN_QFN +UQFN-40-1EP_5x5mm_P0.4mm_EP3.8x3.8mm +UQFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=345), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +50 +41 +Package_DFN_QFN +UQFN-40-1EP_5x5mm_P0.4mm_EP3.8x3.8mm_ThermalVias +UQFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=345), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +67 +41 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.45x4.45mm +UQFN, 48 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=347), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +58 +49 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.45x4.45mm_ThermalVias +UQFN, 48 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=347), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +75 +49 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.62x4.62mm +UQFN, 48 Pin (https://github.com/KiCad/kicad-symbols/pull/1189#issuecomment-449506354), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +UQFN DFN_QFN +0 +53 +49 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.62x4.62mm_ThermalVias +UQFN, 48 Pin (https://github.com/KiCad/kicad-symbols/pull/1189#issuecomment-449506354), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +UQFN DFN_QFN +0 +75 +49 +Package_DFN_QFN +VDFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.7mm +8-Lead Very Thin Dual Flatpack No-Lead (LZ) - 2x3x0.9 mm Body [VDFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +11 +9 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.8x1.8mm +VQFN, 16 Pin (https://www.st.com/resource/en/datasheet/stspin220.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.8x1.8mm_ThermalVias +VQFN, 16 Pin (https://www.st.com/resource/en/datasheet/stspin220.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +26 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm +VQFN, 16 Pin (http://www.ti.com/lit/ds/sbos354a/sbos354a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm_ThermalVias +VQFN, 16 Pin (http://www.ti.com/lit/ds/sbos354a/sbos354a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +26 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm +VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/tlv62095.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm_ThermalVias +VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/tlv62095.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +26 +17 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.4mm_EP1.7x1.7mm +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/20%20Lead%20VQFN%203x3x0_9mm_1_7EP%20U2B%20C04-21496a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.4mm_EP1.7x1.7mm_ThermalVias +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/20%20Lead%20VQFN%203x3x0_9mm_1_7EP%20U2B%20C04-21496a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +30 +21 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.45mm_EP1.55x1.55mm +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=264), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +25 +21 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.45mm_EP1.55x1.55mm_ThermalVias +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=264), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +30 +21 +Package_DFN_QFN +VQFN-24-1EP_4x4mm_P0.5mm_EP2.45x2.45mm +VQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430f1101a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +34 +25 +Package_DFN_QFN +VQFN-24-1EP_4x4mm_P0.5mm_EP2.45x2.45mm_ThermalVias +VQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430f1101a.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +39 +25 +Package_DFN_QFN +VQFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm +VQFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-9505-AT42-QTouch-BSW-AT42QT1060_Datasheet.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +33 +29 +Package_DFN_QFN +VQFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm_ThermalVias +VQFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-9505-AT42-QTouch-BSW-AT42QT1060_Datasheet.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +43 +29 +Package_DFN_QFN +VQFN-28-1EP_4x5mm_P0.5mm_EP2.55x3.55mm +VQFN, 28 Pin (http://www.ti.com/lit/ds/symlink/lm5175.pdf#page=37), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +35 +29 +Package_DFN_QFN +VQFN-28-1EP_4x5mm_P0.5mm_EP2.55x3.55mm_ThermalVias +VQFN, 28 Pin (http://www.ti.com/lit/ds/symlink/lm5175.pdf#page=37), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VQFN DFN_QFN +0 +48 +29 +Package_DFN_QFN +VQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +VQFN, 32 Pin (http://ww1.microchip.com/downloads/en/devicedoc/atmel-9520-at42-qtouch-bsw-at42qt1110_datasheet.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +37 +33 +Package_DFN_QFN +VQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm_ThermalVias +VQFN, 32 Pin (http://ww1.microchip.com/downloads/en/devicedoc/atmel-9520-at42-qtouch-bsw-at42qt1110_datasheet.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +47 +33 +Package_DFN_QFN +WDFN-8-1EP_2x2.2mm_P0.5mm_EP0.80x0.54 +https://www.onsemi.com/pub/Collateral/511BN.PDF +WDFN-8 1EP 2.2X2.0 0.5P +0 +9 +9 +Package_DFN_QFN +WDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm +WDFN, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MNY_C04-0129E-MNY.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WDFN DFN_QFN +0 +13 +9 +Package_DFN_QFN +WDFN-8_2x2mm_P0.5mm +DFN8 2x2, 0.5P; No exposed pad (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF) +DFN 0.5 +0 +8 +8 +Package_DFN_QFN +WDFN-12-1EP_3x3mm_P0.45mm_EP1.7x2.5mm +WDFN, 12 Pin (https://www.diodes.com/assets/Datasheets/PAM2306.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WDFN DFN_QFN +0 +17 +13 +Package_DFN_QFN +WQFN-14-1EP_2.5x2.5mm_P0.5mm_EP1.45x1.45mm +WQFN, 14 Pin (https://www.onsemi.com/pub/Collateral/FUSB302B-D.PDF#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +19 +15 +Package_DFN_QFN +WQFN-14-1EP_2.5x2.5mm_P0.5mm_EP1.45x1.45mm_ThermalVias +WQFN, 14 Pin (https://www.onsemi.com/pub/Collateral/FUSB302B-D.PDF#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +24 +15 +Package_DFN_QFN +WQFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm +WQFN, 16 Pin (https://www.onsemi.com/pub/Collateral/FUSB307B-D.PDF#page=56), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +21 +17 +Package_DFN_QFN +WQFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm_ThermalVias +WQFN, 16 Pin (https://www.onsemi.com/pub/Collateral/FUSB307B-D.PDF#page=56), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +26 +17 +Package_DFN_QFN +WQFN-16-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +WQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=59), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +21 +17 +Package_DFN_QFN +WQFN-16-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +WQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=59), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +31 +17 +Package_DFN_QFN +WQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x2.9mm +http://www.onsemi.com/pub/Collateral/510CD.PDF +WQFN-20 4.5mm 2.5mm 0.5mm +0 +24 +21 +Package_DFN_QFN +WQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +QFN, 32-Leads, Body 5x5x0.8mm, Pitch 0.5mm, Thermal Pad 3.1x3.1mm; (see Texas Instruments LM25119 http://www.ti.com/lit/ds/symlink/lm25119.pdf) +WQFN 0.5 +0 +37 +33 +Package_DIP +DIP-4_W7.62mm +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_LongPads +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_SMDSocket_SmallPads +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_Socket +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_Socket_LongPads +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +4 +4 +Package_DIP +DIP-4_W8.89mm_SMDSocket_LongPads +4-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +4 +4 +Package_DIP +DIP-4_W10.16mm +4-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +4 +4 +Package_DIP +DIP-4_W10.16mm_LongPads +4-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +4 +4 +Package_DIP +DIP-5-6_W7.62mm +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_LongPads +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_SMDSocket_SmallPads +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_Socket +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_Socket_LongPads +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +5 +5 +Package_DIP +DIP-5-6_W8.89mm_SMDSocket_LongPads +5-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +5 +5 +Package_DIP +DIP-5-6_W10.16mm +5-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +5 +5 +Package_DIP +DIP-5-6_W10.16mm_LongPads +5-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +5 +5 +Package_DIP +DIP-6_W7.62mm +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_LongPads +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_SMDSocket_SmallPads +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_Socket +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_Socket_LongPads +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +6 +6 +Package_DIP +DIP-6_W8.89mm_SMDSocket_LongPads +6-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +6 +6 +Package_DIP +DIP-6_W10.16mm +6-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +6 +6 +Package_DIP +DIP-6_W10.16mm_LongPads +6-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +6 +6 +Package_DIP +DIP-8-N6_W7.62mm +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), missing pin 6 +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +DIP-8-N7_W7.62mm +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), missing pin 7 +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +DIP-8_W7.62mm +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_LongPads +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_SMDSocket_SmallPads +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_Socket +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_Socket_LongPads +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +8 +8 +Package_DIP +DIP-8_W8.89mm_SMDSocket_LongPads +8-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +8 +8 +Package_DIP +DIP-8_W10.16mm +8-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +8 +8 +Package_DIP +DIP-8_W10.16mm_LongPads +8-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +8 +8 +Package_DIP +DIP-10_W7.62mm +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_LongPads +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_SMDSocket_SmallPads +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_Socket +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_Socket_LongPads +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +10 +10 +Package_DIP +DIP-10_W8.89mm_SMDSocket_LongPads +10-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +10 +10 +Package_DIP +DIP-10_W10.16mm +10-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +10 +10 +Package_DIP +DIP-10_W10.16mm_LongPads +10-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +10 +10 +Package_DIP +DIP-12_W7.62mm +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_LongPads +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_SMDSocket_SmallPads +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_Socket +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_Socket_LongPads +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +12 +12 +Package_DIP +DIP-12_W8.89mm_SMDSocket_LongPads +12-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +12 +12 +Package_DIP +DIP-12_W10.16mm +12-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +12 +12 +Package_DIP +DIP-12_W10.16mm_LongPads +12-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +12 +12 +Package_DIP +DIP-14_W7.62mm +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_LongPads +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_SMDSocket_SmallPads +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_Socket +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_Socket_LongPads +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +14 +14 +Package_DIP +DIP-14_W8.89mm_SMDSocket_LongPads +14-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +14 +14 +Package_DIP +DIP-14_W10.16mm +14-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +14 +14 +Package_DIP +DIP-14_W10.16mm_LongPads +14-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +14 +14 +Package_DIP +DIP-16_W7.62mm +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_LongPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_SMDSocket_SmallPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_Socket +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_Socket_LongPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +16 +16 +Package_DIP +DIP-16_W8.89mm_SMDSocket_LongPads +16-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +16 +16 +Package_DIP +DIP-16_W10.16mm +16-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +16 +16 +Package_DIP +DIP-16_W10.16mm_LongPads +16-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +16 +16 +Package_DIP +DIP-18_W7.62mm +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_LongPads +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_SMDSocket_SmallPads +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_Socket +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_Socket_LongPads +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +18 +18 +Package_DIP +DIP-18_W8.89mm_SMDSocket_LongPads +18-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +18 +18 +Package_DIP +DIP-20_W7.62mm +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_LongPads +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_SMDSocket_SmallPads +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_Socket +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_Socket_LongPads +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +20 +20 +Package_DIP +DIP-20_W8.89mm_SMDSocket_LongPads +20-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +20 +20 +Package_DIP +DIP-22_W7.62mm +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_LongPads +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_SMDSocket_SmallPads +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_Socket +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_Socket_LongPads +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +22 +22 +Package_DIP +DIP-22_W8.89mm_SMDSocket_LongPads +22-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +22 +22 +Package_DIP +DIP-22_W10.16mm +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_LongPads +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_SMDSocket_SmallPads +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil SMDSocket SmallPads +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_Socket +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_Socket_LongPads +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket LongPads +0 +22 +22 +Package_DIP +DIP-22_W11.43mm_SMDSocket_LongPads +22-lead though-hole mounted DIP package, row spacing 11.43 mm (450 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 11.43mm 450mil SMDSocket LongPads +0 +22 +22 +Package_DIP +DIP-24_W7.62mm +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_LongPads +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_SMDSocket_SmallPads +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_Socket +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_Socket_LongPads +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +24 +24 +Package_DIP +DIP-24_W8.89mm_SMDSocket_LongPads +24-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +24 +24 +Package_DIP +DIP-24_W10.16mm +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_LongPads +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_SMDSocket_SmallPads +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil SMDSocket SmallPads +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_Socket +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_Socket_LongPads +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket LongPads +0 +24 +24 +Package_DIP +DIP-24_W11.43mm_SMDSocket_LongPads +24-lead though-hole mounted DIP package, row spacing 11.43 mm (450 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 11.43mm 450mil SMDSocket LongPads +0 +24 +24 +Package_DIP +DIP-24_W15.24mm +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_LongPads +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_SMDSocket_SmallPads +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_Socket +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_Socket_LongPads +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +24 +24 +Package_DIP +DIP-24_W16.51mm_SMDSocket_LongPads +24-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +24 +24 +Package_DIP +DIP-28_W7.62mm +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_LongPads +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_SMDSocket_SmallPads +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_Socket +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_Socket_LongPads +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +28 +28 +Package_DIP +DIP-28_W8.89mm_SMDSocket_LongPads +28-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +28 +28 +Package_DIP +DIP-28_W15.24mm +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_LongPads +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_SMDSocket_SmallPads +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_Socket +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_Socket_LongPads +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +28 +28 +Package_DIP +DIP-28_W16.51mm_SMDSocket_LongPads +28-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +28 +28 +Package_DIP +DIP-32_W7.62mm +32-lead dip package, row spacing 7.62 mm (300 mils) +DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +32 +32 +Package_DIP +DIP-32_W15.24mm +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_LongPads +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_SMDSocket_SmallPads +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_Socket +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_Socket_LongPads +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +32 +32 +Package_DIP +DIP-32_W16.51mm_SMDSocket_LongPads +32-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +32 +32 +Package_DIP +DIP-40_W15.24mm +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_LongPads +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_SMDSocket_SmallPads +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_Socket +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_Socket_LongPads +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +40 +40 +Package_DIP +DIP-40_W16.51mm_SMDSocket_LongPads +40-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +40 +40 +Package_DIP +DIP-40_W25.4mm +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils) +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_LongPads +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil LongPads +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_SMDSocket_SmallPads +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil SMDSocket SmallPads +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_Socket +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_Socket_LongPads +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket LongPads +0 +40 +40 +Package_DIP +DIP-40_W26.67mm_SMDSocket_LongPads +40-lead though-hole mounted DIP package, row spacing 26.67 mm (1050 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 26.669999999999998mm 1050mil SMDSocket LongPads +0 +40 +40 +Package_DIP +DIP-42_W15.24mm +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_LongPads +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_SMDSocket_SmallPads +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_Socket +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_Socket_LongPads +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +42 +42 +Package_DIP +DIP-42_W16.51mm_SMDSocket_LongPads +42-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +42 +42 +Package_DIP +DIP-48_W15.24mm +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_LongPads +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_SMDSocket_SmallPads +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_Socket +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_Socket_LongPads +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +48 +48 +Package_DIP +DIP-48_W16.51mm_SMDSocket_LongPads +48-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +48 +48 +Package_DIP +DIP-64_W15.24mm +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_LongPads +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_SMDSocket_SmallPads +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_Socket +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_Socket_LongPads +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +64 +64 +Package_DIP +DIP-64_W16.51mm_SMDSocket_LongPads +64-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +64 +64 +Package_DIP +DIP-64_W22.86mm +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils) +THT DIP DIL PDIP 2.54mm 22.86mm 900mil +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_LongPads +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), LongPads +THT DIP DIL PDIP 2.54mm 22.86mm 900mil LongPads +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_SMDSocket_SmallPads +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 22.86mm 900mil SMDSocket SmallPads +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_Socket +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), Socket +THT DIP DIL PDIP 2.54mm 22.86mm 900mil Socket +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_Socket_LongPads +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 22.86mm 900mil Socket LongPads +0 +64 +64 +Package_DIP +DIP-64_W24.13mm_SMDSocket_LongPads +64-lead though-hole mounted DIP package, row spacing 24.13 mm (950 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 24.13mm 950mil SMDSocket LongPads +0 +64 +64 +Package_DIP +DIP-64_W25.4mm +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils) +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_LongPads +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil LongPads +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_SMDSocket_SmallPads +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil SMDSocket SmallPads +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_Socket +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_Socket_LongPads +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket LongPads +0 +64 +64 +Package_DIP +DIP-64_W26.67mm_SMDSocket_LongPads +64-lead though-hole mounted DIP package, row spacing 26.67 mm (1050 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 26.669999999999998mm 1050mil SMDSocket LongPads +0 +64 +64 +Package_DIP +Fairchild_LSOP-8 +8-Lead, 300\" Wide, Surface Mount Package (https://www.fairchildsemi.com/package-drawings/ML/MLSOP08A.pdf) +LSOP 2.54mm 300mil +0 +8 +8 +Package_DIP +PowerIntegrations_eDIP-12B +Power Integrations eDIP-12B, see https://www.power.com/sites/default/files/product-docs/linkswitch-pl_family_datasheet.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +11 +11 +Package_DIP +PowerIntegrations_PDIP-8B +Power Integrations variant of 8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads, see https://www.power.com/sites/default/files/product-docs/lnk520.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +7 +7 +Package_DIP +PowerIntegrations_PDIP-8C +Power Integrations variant of 8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads, see https://ac-dc.power.com/sites/default/files/product-docs/tinyswitch-iii_family_datasheet.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +7 +7 +Package_DIP +PowerIntegrations_SDIP-10C +PowerIntegrations variant of 10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads, see https://www.power.com/sites/default/files/product-docs/tophx_family_datasheet.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +9 +9 +Package_DIP +PowerIntegrations_SMD-8 +PowerIntegrations variant of 8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://www.power.com/sites/default/files/product-docs/lnk520.pdf +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +PowerIntegrations_SMD-8B +PowerIntegrations variant of 8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://www.power.com/sites/default/files/product-docs/lnk520.pdf +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +PowerIntegrations_SMD-8C +PowerIntegrations variant of 8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://ac-dc.power.com/sites/default/files/product-docs/tinyswitch-iii_family_datasheet.pdf +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +SMDIP-4_W7.62mm +4-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Package_DIP +SMDIP-4_W9.53mm +4-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +4 +4 +Package_DIP +SMDIP-4_W9.53mm_Clearance8mm +4-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +4 +4 +Package_DIP +SMDIP-4_W11.48mm +4-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +4 +4 +Package_DIP +SMDIP-6_W7.62mm +6-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +6 +6 +Package_DIP +SMDIP-6_W9.53mm +6-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +6 +6 +Package_DIP +SMDIP-6_W9.53mm_Clearance8mm +6-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +6 +6 +Package_DIP +SMDIP-6_W11.48mm +6-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +6 +6 +Package_DIP +SMDIP-8_W7.62mm +8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +SMDIP-8_W9.53mm +8-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +8 +8 +Package_DIP +SMDIP-8_W9.53mm_Clearance8mm +8-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +8 +8 +Package_DIP +SMDIP-8_W11.48mm +8-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +8 +8 +Package_DIP +SMDIP-10_W7.62mm +10-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +10 +10 +Package_DIP +SMDIP-10_W9.53mm +10-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +10 +10 +Package_DIP +SMDIP-10_W9.53mm_Clearance8mm +10-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +10 +10 +Package_DIP +SMDIP-10_W11.48mm +10-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +10 +10 +Package_DIP +SMDIP-12_W7.62mm +12-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +12 +12 +Package_DIP +SMDIP-12_W9.53mm +12-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +12 +12 +Package_DIP +SMDIP-12_W9.53mm_Clearance8mm +12-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +12 +12 +Package_DIP +SMDIP-12_W11.48mm +12-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +12 +12 +Package_DIP +SMDIP-14_W7.62mm +14-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +14 +14 +Package_DIP +SMDIP-14_W9.53mm +14-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +14 +14 +Package_DIP +SMDIP-14_W9.53mm_Clearance8mm +14-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +14 +14 +Package_DIP +SMDIP-14_W11.48mm +14-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +14 +14 +Package_DIP +SMDIP-16_W7.62mm +16-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +16 +16 +Package_DIP +SMDIP-16_W9.53mm +16-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +16 +16 +Package_DIP +SMDIP-16_W9.53mm_Clearance8mm +16-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +16 +16 +Package_DIP +SMDIP-16_W11.48mm +16-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +16 +16 +Package_DIP +SMDIP-18_W7.62mm +18-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +18 +18 +Package_DIP +SMDIP-18_W9.53mm +18-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +18 +18 +Package_DIP +SMDIP-18_W9.53mm_Clearance8mm +18-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +18 +18 +Package_DIP +SMDIP-18_W11.48mm +18-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +18 +18 +Package_DIP +SMDIP-20_W7.62mm +20-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +20 +20 +Package_DIP +SMDIP-20_W9.53mm +20-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +20 +20 +Package_DIP +SMDIP-20_W9.53mm_Clearance8mm +20-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +20 +20 +Package_DIP +SMDIP-20_W11.48mm +20-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +20 +20 +Package_DIP +SMDIP-22_W7.62mm +22-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +22 +22 +Package_DIP +SMDIP-22_W9.53mm +22-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +22 +22 +Package_DIP +SMDIP-22_W9.53mm_Clearance8mm +22-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +22 +22 +Package_DIP +SMDIP-22_W11.48mm +22-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +22 +22 +Package_DIP +SMDIP-24_W7.62mm +24-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +24 +24 +Package_DIP +SMDIP-24_W9.53mm +24-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +24 +24 +Package_DIP +SMDIP-24_W11.48mm +24-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +24 +24 +Package_DIP +SMDIP-24_W15.24mm +24-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +24 +24 +Package_DIP +SMDIP-28_W15.24mm +28-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +28 +28 +Package_DIP +SMDIP-32_W7.62mm +32-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +32 +32 +Package_DIP +SMDIP-32_W9.53mm +32-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +32 +32 +Package_DIP +SMDIP-32_W11.48mm +32-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +32 +32 +Package_DIP +SMDIP-32_W15.24mm +32-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +32 +32 +Package_DIP +SMDIP-40_W15.24mm +40-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +40 +40 +Package_DIP +SMDIP-40_W25.24mm +40-lead surface-mounted (SMD) DIP package, row spacing 25.24 mm (993 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 25.24mm 993mil +0 +40 +40 +Package_DIP +SMDIP-42_W15.24mm +42-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +42 +42 +Package_DIP +SMDIP-48_W15.24mm +48-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +48 +48 +Package_DIP +SMDIP-64_W15.24mm +64-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +64 +64 +Package_DIP +Toshiba_11-7A9 +Toshiba 11-7A9 package, like 6-lead dip package with missing pin 5, row spacing 7.62 mm (300 mils), https://toshiba.semicon-storage.com/info/docget.jsp?did=1421&prodName=TLP3021(S) +Toshiba 11-7A9 DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +5 +5 +Package_DIP +Vishay_HVM-DIP-3_W7.62mm +3-lead though-hole mounted high-volatge DIP package (based on standard DIP-4), row spacing 7.62 mm (300 mils), see https://www.vishay.com/docs/91361/hexdip.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Vishay HVMDIP HEXDIP +0 +4 +3 +Package_DirectFET +DirectFET_L8 +DirectFET L8 https://www.infineon.com/dgdl/Infineon-AN-1035-AN-v29_00-EN.pdf?fileId=5546d462533600a40153559159020f76 +DirectFET L8 +0 +15 +3 +Package_DirectFET +DirectFET_ME +IRF DirectFET_ME http://www.irf.com/technical-info/appnotes/an-1035.pdf +DirectFET ME Mosfet Infenion +0 +10 +3 +Package_DirectFET +DirectFET_MN +DirectFET MN https://www.infineon.com/dgdl/irf6646pbf.pdf?fileId=5546d462533600a4015355ec5f071a55 +DirectFET MN Mosfet Infenion +0 +7 +3 +Package_DirectFET +DirectFET_MP +DirectFET MP https://www.infineon.com/dgdl/irf6633pbf.pdf?fileId=5546d462533600a4015355e8dfe91a3b +DirectFET MP Mosfet Infenion +0 +7 +3 +Package_DirectFET +DirectFET_MT +DirectFET MT https://www.infineon.com/dgdl/irf6613pbf.pdf?fileId=5546d462533600a4015355e82b9b1a0d +DirectFET MT Mosfet Infenion +0 +7 +3 +Package_DirectFET +DirectFET_MX +DirectFET MX https://www.infineon.com/dgdl/irf8302mpbf.pdf?fileId=5546d462533600a40153560d16e41d5b +DirectFET MX Infenion Mosfet +0 +7 +3 +Package_DirectFET +DirectFET_MZ +DirectFET MZ https://www.infineon.com/dgdl/irf6668pbf.pdf?fileId=5546d462533600a4015355ec96b91a64 +DirectFET MZ Infenion Mosfet +0 +7 +3 +Package_DirectFET +DirectFET_S1 +DirectFET S1 https://www.infineon.com/dgdl/irf6810spbf.pdf?fileId=5546d462533600a4015355f0ab331ab4 +DirectFET S1 Infenion Mosfet +0 +6 +3 +Package_DirectFET +DirectFET_S2 +DirectFET S2 https://www.infineon.com/dgdl/Infineon-AN-1035-AN-v29_00-EN.pdf?fileId=5546d462533600a40153559159020f76 +DirectFET S2 Infenion Mosfet +0 +7 +3 +Package_DirectFET +DirectFET_SH +IRF DirectFET_SH https://www.infineon.com/dgdl/irf6655pbf.pdf?fileId=5546d462533600a4015355ec76961a5b +DirectFET SH Mosfet Infenion +0 +6 +3 +Package_DirectFET +DirectFET_SJ +DirectFET SJ https://www.infineon.com/dgdl/irf6810spbf.pdf?fileId=5546d462533600a4015355f0ab331ab4 +DirectFET SJ Infenion Mosfet +0 +7 +3 +Package_DirectFET +DirectFET_SQ +DirectFET SQ https://www.infineon.com/dgdl/irf8327spbf.pdf?fileId=5546d462533600a40153560d40c41d65 +DirectFET SQ Infenion Mosfet +0 +6 +3 +Package_DirectFET +DirectFET_ST +DirectFET ST https://www.infineon.com/dgdl/irf6722spbf.pdf?fileId=5546d462533600a4015355ed44531a90 +DirectFET ST Infenion Mosfet +0 +7 +3 +Package_LCC +PLCC-20 +PLCC, 20 pins, surface mount +plcc smt +0 +20 +20 +Package_LCC +PLCC-20_SMD-Socket +PLCC, 20 pins, surface mount +plcc smt +0 +20 +20 +Package_LCC +PLCC-20_THT-Socket +PLCC, 20 pins, through hole +plcc leaded +0 +20 +20 +Package_LCC +PLCC-28 +PLCC, 28 pins, surface mount +plcc smt +0 +28 +28 +Package_LCC +PLCC-28_SMD-Socket +PLCC, 28 pins, surface mount +plcc smt +0 +28 +28 +Package_LCC +PLCC-28_THT-Socket +PLCC, 28 pins, through hole +plcc leaded +0 +28 +28 +Package_LCC +PLCC-32_11.4x14.0mm_P1.27mm +PLCC, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc0015.pdf), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +32 +32 +Package_LCC +PLCC-44 +PLCC, 44 pins, surface mount +plcc smt +0 +44 +44 +Package_LCC +PLCC-44_16.6x16.6mm_P1.27mm +PLCC, 44 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +44 +44 +Package_LCC +PLCC-44_SMD-Socket +PLCC, 44 pins, surface mount +plcc smt +0 +44 +44 +Package_LCC +PLCC-44_THT-Socket +PLCC, 44 pins, through hole +plcc leaded +0 +44 +44 +Package_LCC +PLCC-52 +PLCC, 52 pins, surface mount +plcc smt +0 +52 +52 +Package_LCC +PLCC-52_SMD-Socket +PLCC, 52 pins, surface mount +plcc smt +0 +52 +52 +Package_LCC +PLCC-52_THT-Socket +PLCC, 52 pins, through hole +plcc leaded +0 +52 +52 +Package_LCC +PLCC-68 +PLCC, 68 pins, surface mount +plcc smt +0 +68 +68 +Package_LCC +PLCC-68_24.2x24.2mm_P1.27mm +PLCC, 68 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +68 +68 +Package_LCC +PLCC-68_SMD-Socket +PLCC, 68 pins, surface mount +plcc smt +0 +68 +68 +Package_LCC +PLCC-68_THT-Socket +PLCC, 68 pins, through hole +plcc leaded +0 +68 +68 +Package_LCC +PLCC-84 +PLCC, 84 pins, surface mount +plcc smt +0 +84 +84 +Package_LCC +PLCC-84_29.3x29.3mm_P1.27mm +PLCC, 84 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +84 +84 +Package_LCC +PLCC-84_SMD-Socket +PLCC, 84 pins, surface mount +plcc smt +0 +84 +84 +Package_LCC +PLCC-84_THT-Socket +PLCC, 84 pins, through hole +plcc leaded +0 +84 +84 +Package_LGA +AMS_LGA-10-1EP_2.7x4mm_P0.6mm +LGA-10, http://ams.com/eng/content/download/951091/2269479/471718 +lga land grid array +0 +13 +11 +Package_LGA +AMS_LGA-20_4.7x4.5mm_P0.65mm +http://ams.com/eng/content/download/1008631/2361759/498838 +AMS LGA +0 +20 +20 +Package_LGA +Bosch_LGA-8_2.5x2.5mm_P0.65mm_ClockwisePinNumbering +LGA-8 +lga land grid array +0 +8 +8 +Package_LGA +Bosch_LGA-8_2x2.5mm_P0.65mm_ClockwisePinNumbering +LGA-8, https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMP280-DS001-18.pdf +lga land grid array +0 +8 +8 +Package_LGA +Bosch_LGA-8_3x3mm_P0.8mm_ClockwisePinNumbering +Bosch LGA, 8 Pin (https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BME680-DS001-00.pdf#page=44), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +Bosch LGA LGA +0 +8 +8 +Package_LGA +Bosch_LGA-14_3x2.5mm_P0.5mm +LGA-14 Bosch https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMI160-DS000-07.pdf +lga land grid array +0 +14 +14 +Package_LGA +LGA-8_3x5mm_P1.25mm +LGA-8 +lga land grid array +0 +8 +8 +Package_LGA +LGA-12_2x2mm_P0.5mm +LGA12 +lga land grid array +0 +12 +12 +Package_LGA +LGA-14_2x2mm_P0.35mm_LayoutBorder3x4y +LGA, 14 Pin (http://www.st.com/resource/en/datasheet/lis2dh.pdf), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +LGA LGA +0 +14 +14 +Package_LGA +LGA-14_3x2.5mm_P0.5mm_LayoutBorder3x4y +LGA, 14 Pin (http://www.st.com/resource/en/datasheet/lsm6ds3.pdf), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +LGA LGA +0 +14 +14 +Package_LGA +LGA-14_3x5mm_P0.8mm_LayoutBorder1x6y +LGA, 14 Pin (http://www.st.com/resource/en/datasheet/lsm303dlhc.pdf), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +LGA LGA +0 +14 +14 +Package_LGA +LGA-16_3x3mm_P0.5mm +http://www.memsic.com/userfiles/files/DataSheets/Magnetic-Sensors-Datasheets/MMC5883MA-RevC.pdf +lga land grid array +0 +16 +16 +Package_LGA +LGA-16_3x3mm_P0.5mm_LayoutBorder3x5y +LGA, 16 Pin (http://www.st.com/resource/en/datasheet/lis331hh.pdf), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +LGA LGA +0 +16 +16 +Package_LGA +LGA-16_4x4mm_P0.65mm_LayoutBorder4x4y +LGA, 16 Pin (http://www.st.com/resource/en/datasheet/l3gd20.pdf), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +LGA LGA +0 +16 +16 +Package_LGA +LGA-24L_3x3.5mm_P0.43mm +LGA 24L 3x3.5mm Pitch 0.43mm +LGA 24L 3x3.5mm Pitch 0.43mm +0 +24 +24 +Package_LGA +LGA-28_5.2x3.8mm_P0.5mm +LGA 28 5.2x3.8mm Pitch 0.5mm +LGA 28 5.2x3.8mm Pitch 0.5mm +0 +28 +28 +Package_LGA +Linear_LGA-133_15.0x15.0_Layout12x12_P1.27mm +Analog Devices (Linear Tech), 133-pin LGA uModule, 15.0x15.0x4.32mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf +133 pin lga +0 +133 +133 +Package_LGA +NXP_MPL115A1_LGA-8_3x5mm_P1.25mm +NXP MPL115A1 LGA, 8 Pin (https://www.nxp.com/docs/en/data-sheet/MPL115A1.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +NXP LGA NoLead +0 +8 +8 +Package_LGA +ST_HLGA-10_2.5x2.5mm_P0.6mm_LayoutBorder3x2y +ST HLGA, 10 Pin (https://www.st.com/resource/en/datasheet/lps25hb.pdf#page=46), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +ST HLGA LGA +0 +10 +10 +Package_LGA +Texas_SIL0008D_MicroSiP-8-1EP_2.8x3mm_P0.65mm_EP1.1x1.9mm +Texas SIL0008D MicroSiP, 8 Pin (http://www.ti.com/lit/ds/symlink/tps82130.pdf#page=19), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas MicroSiP NoLead +0 +12 +9 +Package_LGA +Texas_SIL0008D_MicroSiP-8-1EP_2.8x3mm_P0.65mm_EP1.1x1.9mm_ThermalVias +Texas SIL0008D MicroSiP, 8 Pin (http://www.ti.com/lit/ds/symlink/tps82130.pdf#page=19), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas MicroSiP NoLead +0 +16 +9 +Package_LGA +Texas_SIL0010A_MicroSiP-10-1EP_3.8x3mm_P0.6mm_EP0.7x2.9mm_ThermalVias +Texas SIL0010A MicroSiP, 10 Pin (http://www.ti.com/lit/ml/mpds579b/mpds579b.pdf), generated with kicad-footprint-generator ipc_lga_layoutBorder_generator.py +Texas MicroSiP LGA +0 +18 +11 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP4x4mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00482-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +154 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP4x4mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00482-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +171 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP5x5mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00476-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +161 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP5x5mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00476-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +187 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP6.61x5.615mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00485-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +165 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP6.61x5.615mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00485-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +196 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP7.2x6.35mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00487-01.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +175 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP7.2x6.35mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00487-01.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +218 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP8.93x8.7mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00479-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +194 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP8.93x8.7mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00479-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +259 +145 +Package_QFP +HTQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm +64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad +HTQFP-64 Pitch 0.5 +0 +69 +65 +Package_QFP +HTQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm_Mask4.4x4.4mm_ThermalVias +64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad +HTQFP-64 Pitch 0.5 +0 +135 +65 +Package_QFP +LQFP-32_5x5mm_P0.5mm +LQFP, 32 Pin (https://www.nxp.com/docs/en/package-information/SOT401-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +32 +32 +Package_QFP +LQFP-32_7x7mm_P0.8mm +LQFP, 32 Pin (https://www.nxp.com/docs/en/package-information/SOT358-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +32 +32 +Package_QFP +LQFP-36_7x7mm_P0.65mm +LQFP, 36 Pin (https://www.onsemi.com/pub/Collateral/561AV.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +36 +36 +Package_QFP +LQFP-44_10x10mm_P0.8mm +LQFP, 44 Pin (https://www.nxp.com/files-static/shared/doc/package_info/98ASS23225W.pdf?&fsrch=1), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +44 +44 +Package_QFP +LQFP-48-1EP_7x7mm_P0.5mm_EP3.6x3.6mm +LQFP, 48 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/LTC7810.pdf), generated with kicad-footprint-generator ipc_qfp_generator.py +LQFP QFP +0 +58 +49 +Package_QFP +LQFP-48-1EP_7x7mm_P0.5mm_EP3.6x3.6mm_ThermalVias +LQFP, 48 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/LTC7810.pdf), generated with kicad-footprint-generator ipc_qfp_generator.py +LQFP QFP +0 +75 +49 +Package_QFP +LQFP-48_7x7mm_P0.5mm +LQFP, 48 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2358-16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +48 +48 +Package_QFP +LQFP-52-1EP_10x10mm_P0.65mm_EP4.8x4.8mm +LQFP, 52 Pin (https://www.onsemi.com/pub/Collateral/848H-01.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +62 +53 +Package_QFP +LQFP-52-1EP_10x10mm_P0.65mm_EP4.8x4.8mm_ThermalVias +LQFP, 52 Pin (https://www.onsemi.com/pub/Collateral/848H-01.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +95 +53 +Package_QFP +LQFP-52_10x10mm_P0.65mm +LQFP, 52 Pin (https://www.nxp.com/docs/en/package-information/98ARL10526D.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +52 +52 +Package_QFP +LQFP-52_14x14mm_P1mm +LQFP, 52 Pin (http://www.holtek.com/documents/10179/116711/HT1632Cv170.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +52 +52 +Package_QFP +LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm +LQFP, 64 Pin (https://www.nxp.com/files-static/shared/doc/package_info/98ARH98426A.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +90 +65 +Package_QFP +LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm_ThermalVias +LQFP, 64 Pin (https://www.nxp.com/files-static/shared/doc/package_info/98ARH98426A.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +127 +65 +Package_QFP +LQFP-64_7x7mm_P0.4mm +LQFP, 64 Pin (https://www.nxp.com/docs/en/package-information/SOT414-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +64 +64 +Package_QFP +LQFP-64_10x10mm_P0.5mm +LQFP, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +64 +64 +Package_QFP +LQFP-64_14x14mm_P0.8mm +LQFP, 64 Pin (https://www.nxp.com/docs/en/package-information/SOT791-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +64 +64 +Package_QFP +LQFP-80_10x10mm_P0.4mm +LQFP, 80 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/q80.10x10.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +80 +80 +Package_QFP +LQFP-80_12x12mm_P0.5mm +LQFP, 80 Pin (https://www.nxp.com/docs/en/package-information/SOT315-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +80 +80 +Package_QFP +LQFP-80_14x14mm_P0.65mm +LQFP, 80 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +80 +80 +Package_QFP +LQFP-100_14x14mm_P0.5mm +LQFP, 100 Pin (https://www.nxp.com/docs/en/package-information/SOT407-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +100 +100 +Package_QFP +LQFP-128_14x14mm_P0.4mm +LQFP, 128 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/q128.14x14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +128 +128 +Package_QFP +LQFP-128_14x20mm_P0.5mm +LQFP, 128 Pin (https://www.nxp.com/docs/en/package-information/SOT425-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +128 +128 +Package_QFP +LQFP-144_20x20mm_P0.5mm +LQFP, 144 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=425), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +144 +144 +Package_QFP +LQFP-160_24x24mm_P0.5mm +LQFP, 160 Pin (https://www.nxp.com/docs/en/package-information/SOT435-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +160 +160 +Package_QFP +LQFP-176_20x20mm_P0.4mm +LQFP, 176 Pin (https://www.onsemi.com/pub/Collateral/566DB.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +176 +176 +Package_QFP +LQFP-176_24x24mm_P0.5mm +LQFP, 176 Pin (https://www.st.com/resource/en/datasheet/stm32f207vg.pdf#page=163), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +176 +176 +Package_QFP +LQFP-208_28x28mm_P0.5mm +LQFP, 208 Pin (https://www.nxp.com/docs/en/package-information/SOT459-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +208 +208 +Package_QFP +LQFP-216_24x24mm_P0.4mm +LQFP, 216 Pin (https://www.onsemi.com/pub/Collateral/561BE.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +216 +216 +Package_QFP +MQFP-44_10x10mm_P0.8mm +MQFP, 44 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ad7722.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MQFP QFP +0 +44 +44 +Package_QFP +PQFP-44_10x10mm_P0.8mm +44-Lead Plastic Quad Flatpack - 10x10x2.5mm Body (http://www.onsemi.com/pub/Collateral/122BK.PDF) +PQFP 0.8 +0 +44 +44 +Package_QFP +PQFP-80_14x20mm_P0.8mm +PQFP80 14x20 / QIP80E CASE 122BS (see ON Semiconductor 122BS.PDF) +QFP 0.8 +0 +80 +80 +Package_QFP +PQFP-100_14x20mm_P0.65mm +PQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +PQFP QFP +0 +100 +100 +Package_QFP +PQFP-112_20x20mm_P0.65mm +PQFP, 112 pins, 20mm sq body, 0.65mm pitch (http://cache.freescale.com/files/shared/doc/package_info/98ASS23330W.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf) +PQFP 112 +0 +112 +112 +Package_QFP +PQFP-132_24x24mm_P0.635mm +PQFP, 132 pins, 24mm sq body, 0.635mm pitch (https://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-02-databook.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf) +PQFP 132 +0 +132 +132 +Package_QFP +PQFP-132_24x24mm_P0.635mm_i386 +PQFP, 132 pins, 24mm sq body, 0.635mm pitch, Intel 386EX (https://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-02-databook.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf) +PQFP 132 Intel 386EX +0 +132 +132 +Package_QFP +PQFP-144_28x28mm_P0.65mm +PQFP, 144 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +PQFP QFP +0 +144 +144 +Package_QFP +PQFP-160_28x28mm_P0.65mm +PQFP, 160 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +PQFP QFP +0 +160 +160 +Package_QFP +PQFP-208_28x28mm_P0.5mm +PQFP, 208 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +PQFP QFP +0 +208 +208 +Package_QFP +PQFP-240_32.1x32.1mm_P0.5mm +PQFP, 240 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +PQFP QFP +0 +240 +240 +Package_QFP +PQFP-256_28x28mm_P0.4mm +PQFP256 28x28 / QFP256J CASE 122BX (see ON Semiconductor 122BX.PDF) +QFP 0.4 +0 +256 +256 +Package_QFP +TQFP-32_7x7mm_P0.8mm +32-Lead Plastic Thin Quad Flatpack (PT) - 7x7x1.0 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +32 +32 +Package_QFP +TQFP-44-1EP_10x10mm_P0.8mm_EP4.5x4.5mm +44-Lead Plastic Thin Quad Flatpack (MW) - 10x10x1.0 mm Body [TQFP] With 4.5x4.5 mm Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +54 +45 +Package_QFP +TQFP-44_10x10mm_P0.8mm +44-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1.0 mm Body [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +44 +44 +Package_QFP +TQFP-48-1EP_7x7mm_P0.5mm_EP3.5x3.5mm +48-Lead Thin Quad Flatpack (PT) - 7x7x1.0 mm Body [TQFP] With Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.5 +0 +53 +49 +Package_QFP +TQFP-48-1EP_7x7mm_P0.5mm_EP5x5mm +TQFP, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf (page 45)), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +65 +49 +Package_QFP +TQFP-48-1EP_7x7mm_P0.5mm_EP5x5mm_ThermalVias +TQFP, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf (page 45)), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +91 +49 +Package_QFP +TQFP-48_7x7mm_P0.5mm +48 LEAD TQFP 7x7mm (see MICREL TQFP7x7-48LD-PL-1.pdf) +QFP 0.5 +0 +48 +48 +Package_QFP +TQFP-52-1EP_10x10mm_P0.65mm_EP6.5x6.5mm +TQFP, 52 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/tqfp_edsv/sv_52_1.pdf), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +78 +53 +Package_QFP +TQFP-52-1EP_10x10mm_P0.65mm_EP6.5x6.5mm_ThermalVias +TQFP, 52 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/tqfp_edsv/sv_52_1.pdf), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +79 +53 +Package_QFP +TQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm +64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [TQFP] thermal pad +QFP 0.5 +0 +90 +65 +Package_QFP +TQFP-64_7x7mm_P0.4mm +TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 932BH.PDF) +QFP 0.4 +0 +64 +64 +Package_QFP +TQFP-64_10x10mm_P0.5mm +TQFP, 64 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +64 +64 +Package_QFP +TQFP-64_14x14mm_P0.8mm +64-Lead Plastic Thin Quad Flatpack (PF) - 14x14x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +64 +64 +Package_QFP +TQFP-80-1EP_14x14mm_P0.65mm_EP9.5x9.5mm +80-Lead Plastic Thin Quad Flatpack (PF) - 14x14mm body, 9.5mm sq thermal pad (http://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf) +QFP 0.65 +0 +85 +81 +Package_QFP +TQFP-80_12x12mm_P0.5mm +80-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.5 +0 +80 +80 +Package_QFP +TQFP-80_14x14mm_P0.65mm +80-Lead Plastic Thin Quad Flatpack (PF) - 14x14x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.65 +0 +80 +80 +Package_QFP +TQFP-100-1EP_14x14mm_P0.5mm_EP5x5mm +100-Lead Plastic Thin Quad Flatpack (PF) - 14x14x1 mm Body 2.00 mm Footprint with Exposed Pad [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.5 +0 +117 +101 +Package_QFP +TQFP-100_12x12mm_P0.4mm +100-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.4 +0 +100 +100 +Package_QFP +TQFP-100_14x14mm_P0.5mm +TQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +100 +100 +Package_QFP +TQFP-120_14x14mm_P0.4mm +TQFP120 14x14 / TQFP120 CASE 932AZ (see ON Semiconductor 932AZ.PDF) +QFP 0.4 +0 +120 +120 +Package_QFP +TQFP-128_14x14mm_P0.4mm +TQFP128 14x14 / TQFP128 CASE 932BB (see ON Semiconductor 932BB.PDF) +QFP 0.4 +0 +128 +128 +Package_QFP +TQFP-144_16x16mm_P0.4mm +144-Lead Plastic Thin Quad Flatpack (PH) - 16x16x1 mm Body, 2.00 mm Footprint [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.4 +0 +144 +144 +Package_QFP +TQFP-144_20x20mm_P0.5mm +TQFP, 144 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +144 +144 +Package_QFP +TQFP-176_24x24mm_P0.5mm +TQFP, 176 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +176 +176 +Package_QFP +VQFP-80_14x14mm_P0.65mm +VQFP, 80 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +VQFP QFP +0 +80 +80 +Package_QFP +VQFP-100_14x14mm_P0.5mm +VQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +VQFP QFP +0 +100 +100 +Package_QFP +VQFP-128_14x14mm_P0.4mm +VQFP, 128 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +VQFP QFP +0 +128 +128 +Package_QFP +VQFP-176_20x20mm_P0.4mm +VQFP, 176 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py +VQFP QFP +0 +176 +176 +Package_SIP +PowerIntegrations_eSIP-7C +eSIP-7C Vertical Flat Package with Heatsink Tab, https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf +Power Integrations E Package +0 +6 +6 +Package_SIP +PowerIntegrations_eSIP-7F +eSIP-7F Flat Package with Heatsink Tab https://ac-dc.power.com/sites/default/files/product-docs/linkswitch-ph_family_datasheet.pdf +Power Integrations L Package +0 +6 +6 +Package_SIP +Sanyo_STK4xx-15_59.2x8.0mm_P2.54mm +Sanyo SIP-15, 59.2mm x 8.0mm bosy size, STK-433E STK-435E STK-436E (http://datasheet.octopart.com/STK430-Sanyo-datasheet-107060.pdf) +Sanyo SIP-15 +0 +15 +15 +Package_SIP +Sanyo_STK4xx-15_78.0x8.0mm_P2.54mm +Sanyo SIP-15, 78.0mm x 8.0mm bosy size, STK-437E STK-439E STK-441E STK-443E (http://datasheet.octopart.com/STK430-Sanyo-datasheet-107060.pdf) +Sanyo SIP-15 +0 +15 +15 +Package_SIP +SIP-8_19x3mm_P2.54mm +SIP 8-pin (http://www.njr.com/semicon/PDF/package/SIP8_E.pdf) +SIP8 +0 +8 +8 +Package_SIP +SIP-9_21.54x3mm_P2.54mm +SIP 9-pin () +SIP8 +0 +9 +9 +Package_SIP +SIP3_11.6x8.5mm +RECOM,R78EXX,https://www.recom-power.com/pdf/Innoline/R-78Exx-0.5.pdf +SIP3 Regulator Module +0 +3 +3 +Package_SIP +SIP4_Sharp-SSR_P7.62mm_Angled +SIP4 Footprint for SSR made by Sharp +Solid State relais SSR Sharp +0 +4 +4 +Package_SIP +SIP4_Sharp-SSR_P7.62mm_Angled_NoHole +SIP4 Footprint for SSR made by Sharp +Solid State relais SSR Sharp +0 +4 +4 +Package_SIP +SIP4_Sharp-SSR_P7.62mm_Straight +SIP4 Footprint for SSR made by Sharp +Solid State relais SSR Sharp +0 +4 +4 +Package_SIP +SIP9_Housing +SIP9 +SIP9 +0 +9 +9 +Package_SIP +SIP9_Housing_BigPads +SIP9, large pads +SIP9 +0 +9 +9 +Package_SIP +SLA704XM +SIP SLA704XM (http://www.sumzi.com/upload/files/2007/07/2007073114282034189.PDF) +SIP +0 +18 +18 +Package_SIP +STK672-040-E +SIP-22 (http://www.onsemi.com/pub_link/Collateral/EN5227-D.PDF) +SIP-22 +0 +22 +22 +Package_SIP +STK672-080-E +SIP-15 (http://www.onsemi.com/pub_link/Collateral/EN6507-D.PDF) +SIP-15 +0 +15 +15 +Package_SO +Diodes_PSOP-8 +8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Datasheets/AP2204.pdf) +SSOP 0.50 exposed pad +0 +12 +9 +Package_SO +Diodes_SO-8EP +8-Lead Plastic SO, Exposed Die Pad (see https://www.diodes.com/assets/Package-Files/SO-8EP.pdf) +SO exposed pad +0 +9 +9 +Package_SO +ETSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3x4.2mm +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body with Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +27 +21 +Package_SO +HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm +HSOP, 8 Pin (https://www.st.com/resource/en/datasheet/l5973d.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOP SO +0 +13 +9 +Package_SO +HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm_ThermalVias +HSOP, 8 Pin (https://www.st.com/resource/en/datasheet/l5973d.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOP SO +0 +20 +9 +Package_SO +HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown +HSOP 11.0x15.9mm Pitch 1.27mm Slug Down (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 1.27mm +0 +23 +21 +Package_SO +HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown_ThermalVias +HSOP 11.0x15.9mm Pitch 1.27mm Slug Down Thermal Vias (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 1.27mm +0 +45 +21 +Package_SO +HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugUp +HSOP 11.0x15.9mm Pitch 1.27mm Slug Up (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 1.27mm +0 +20 +20 +Package_SO +HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugDown +HSOP 11.0x15.9mm Pitch 0.65mm Slug Down (PowerSO-36) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/vn808cm-32-e.pdf, http://www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 0.65mm +0 +39 +37 +Package_SO +HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugDown_ThermalVias +HSOP 11.0x15.9mm Pitch 0.65mm Slug Down Thermal Vias (PowerSO-36) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/vn808cm-32-e.pdf, http://www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 0.65mm +0 +61 +37 +Package_SO +HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugUp +HSOP 11.0x15.9mm Pitch 0.65mm Slug Up (PowerSO-36) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/vn808cm-32-e.pdf, http://www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 0.65mm +0 +36 +36 +Package_SO +HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.2mm +HTSOP, 8 Pin (https://media.digikey.com/pdf/Data%20Sheets/Rohm%20PDFs/BD9G341EFJ.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSOP SO +0 +13 +9 +Package_SO +HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.2mm_ThermalVias +HTSOP, 8 Pin (https://media.digikey.com/pdf/Data%20Sheets/Rohm%20PDFs/BD9G341EFJ.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSOP SO +0 +20 +9 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm +16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad; (http://www.ti.com/lit/ds/symlink/drv8833.pdf) +SSOP 0.65 +0 +29 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm_ThermalVias +16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8833.pdf) +SSOP 0.65 +0 +27 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3x3mm_ThermalVias +16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf) +SSOP 0.65 +0 +46 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3x3mm +HTSSOP, 16 Pin (https://www.st.com/resource/en/datasheet/stp08cp05.pdf#page=20), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +21 +17 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [HTSSOP], with thermal pad with vias +HTSSOP 0.65 +0 +29 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.4x3.7mm +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/bq24006.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +24 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=37&zoom=160,-90,3), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +26 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm_ThermalVias +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=37&zoom=160,-90,3), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +42 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm_ThermalVias_HandSolder +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=37&zoom=160,-90,3), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +42 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_ThermalVias +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [HTSSOP], with thermal pad with vias +HTSSOP 0.65 +0 +45 +21 +Package_SO +HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.2x5mm +HTSSOP, 24 Pin (https://www.st.com/resource/en/datasheet/stp16cp05.pdf#page=25), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +31 +25 +Package_SO +HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.4x4.68mm +HTSSOP, 24 Pin (http://www.ti.com/lit/ds/symlink/tps703.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +28 +25 +Package_SO +HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.4x4.68mm_ThermalVias +HTSSOP, 24 Pin (http://www.ti.com/lit/ds/symlink/tps703.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +47 +25 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +39 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_Mask2.4x6.17mm +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +40 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_Mask2.4x6.17mm_ThermalVias +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +55 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_ThermalVias +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +58 +29 +Package_SO +HTSSOP-32-1EP_6.1x11mm_P0.65mm_EP5.2x11mm_Mask4.11x4.36mm +HTSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf) +SSOP 0.65 PowerPAD +0 +43 +33 +Package_SO +HTSSOP-32-1EP_6.1x11mm_P0.65mm_EP5.2x11mm_Mask4.11x4.36mm_ThermalVias +HTSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf) +SSOP 0.65 PowerPAD +0 +83 +33 +Package_SO +HTSSOP-38-1EP_6.1x12.5mm_P0.65mm_EP5.2x12.5mm_Mask3.39x6.35mm +HTSSOP, 38 Pin (http://www.ti.com/lit/ds/symlink/tlc5951.pdf#page=47&zoom=140,-67,15), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +46 +39 +Package_SO +HTSSOP-38-1EP_6.1x12.5mm_P0.65mm_EP5.2x12.5mm_Mask3.39x6.35mm_ThermalVias +HTSSOP, 38 Pin (http://www.ti.com/lit/ds/symlink/tlc5951.pdf#page=47&zoom=140,-67,15), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +87 +39 +Package_SO +HTSSOP-56-1EP_6.1x14mm_P0.5mm_EP3.61x6.35mm +HTSSOP56: plastic thin shrink small outline package http://www.ti.com/lit/ds/symlink/drv8301.pdf +HTSSOP 0.5 +0 +72 +57 +Package_SO +Infineon_PG-DSO-8-43 +Infineon_PG-DSO-8-43 +DSO DSO-8 SOIC SOIC-8 +0 +12 +9 +Package_SO +Infineon_PG-DSO-12-9 +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/) +PG-DSO +0 +23 +13 +Package_SO +Infineon_PG-DSO-12-9_ThermalVias +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/) +PG-DSO +0 +42 +13 +Package_SO +Infineon_PG-DSO-12-11 +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/) +PG-DSO +0 +23 +13 +Package_SO +Infineon_PG-DSO-12-11_ThermalVias +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/) +PG-DSO +0 +42 +13 +Package_SO +Infineon_PG-DSO-20-30 +Infineon SO package 20pin, exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/) +DSO-20 +0 +31 +21 +Package_SO +Infineon_PG-DSO-20-30_ThermalVias +Infineon SO package 20pin, exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/) +DSO-20 +0 +45 +21 +Package_SO +Infineon_PG-DSO-20-32 +Infineon SO package 20pin without exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-32/) +DSO-20 +0 +20 +20 +Package_SO +Infineon_PG-TSDSO-14-22 +Infineon_PG-TSDSO-14-22 +Infineon TSDSO 14-22 +0 +17 +15 +Package_SO +Linear_MSOP-12-16-1EP_3x4mm_P0.5mm +12-Lead Plastic Micro Small Outline Package (MS) [MSOP], variant of MSOP-16 (see http://cds.linear.com/docs/en/datasheet/3630fd.pdf) +SSOP 0.5 +0 +15 +13 +Package_SO +Linear_MSOP-12-16_3x4mm_P0.5mm +12-Lead Plastic Micro Small Outline Package (MS) [MSOP], variant of MSOP-16 (see https://www.analog.com/media/en/technical-documentation/data-sheets/3748fb.pdf) +SSOP 0.5 +0 +12 +12 +Package_SO +MFSOP6-4_4.4x3.6mm_P1.27mm +https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.4pin%20MFSOP6.html +MFSOP 4 pin SMD +0 +4 +4 +Package_SO +MFSOP6-5_4.4x3.6mm_P1.27mm +https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.5pin%20MFSOP6.html +MFSOP 4 pin SMD +0 +5 +5 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.68x1.88mm +MS8E Package; 8-Lead Plastic MSOP, Exposed Die Pad (see Linear Technology 05081662_K_MS8E.pdf) +SSOP 0.65 +0 +13 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.73x1.85mm +MSOP, 8 Pin (http://www.ti.com/lit/ds/symlink/lm25085.pdf#page=32), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +13 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.73x1.85mm_ThermalVias +MSOP, 8 Pin (http://www.ti.com/lit/ds/symlink/lm25085.pdf#page=32), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +18 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.95x2.15mm +MSOP, 8 Pin (http://www.st.com/resource/en/datasheet/pm8834.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +13 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.95x2.15mm_ThermalVias +MSOP, 8 Pin (http://www.st.com/resource/en/datasheet/pm8834.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +18 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP2.5x3mm_Mask1.73x2.36mm +MSOP, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf#page=15), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +14 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP2.5x3mm_Mask1.73x2.36mm_ThermalVias +MSOP, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf#page=15), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +19 +9 +Package_SO +MSOP-8_3x3mm_P0.65mm +8-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +8 +8 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm +MSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +15 +11 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm_ThermalVias +MSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +20 +11 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.73x1.98mm +MSOP, 10 Pin (www.allegromicro.com/~/media/Files/Datasheets/A4952-3-Datasheet.ashx?la=en#page=10), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +15 +11 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.73x1.98mm_ThermalVias +MSOP, 10 Pin (www.allegromicro.com/~/media/Files/Datasheets/A4952-3-Datasheet.ashx?la=en#page=10), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +20 +11 +Package_SO +MSOP-10_3x3mm_P0.5mm +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +10 +10 +Package_SO +MSOP-12-1EP_3x4mm_P0.65mm_EP1.65x2.85mm +MSOP, 12 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3652fe.pdf#page=24), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +17 +13 +Package_SO +MSOP-12-1EP_3x4mm_P0.65mm_EP1.65x2.85mm_ThermalVias +MSOP, 12 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3652fe.pdf#page=24), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +24 +13 +Package_SO +MSOP-12-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +19 +13 +Package_SO +MSOP-12-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm_ThermalVias +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +25 +13 +Package_SO +MSOP-12-16_3x4mm_P0.5mm +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +12 +12 +Package_SO +MSOP-12_3x4mm_P0.65mm +MSOP, 12 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/6957fb.pdf#page=36), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +12 +12 +Package_SO +MSOP-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm +MSOP, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf#page=23), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +21 +17 +Package_SO +MSOP-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm_ThermalVias +MSOP, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf#page=23), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +28 +17 +Package_SO +MSOP-16_3x4mm_P0.5mm +MSOP, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/436412f.pdf#page=22), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +16 +16 +Package_SO +OnSemi_Micro8 +ON Semiconductor Micro8 (Case846A-02): https://www.onsemi.com/pub/Collateral/846A-02.PDF +micro8 +0 +8 +8 +Package_SO +PowerIntegrations_eSOP-12B +eSOP-12B SMT Flat Package with Heatsink Tab, see https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf +Power Integrations K Package +0 +12 +12 +Package_SO +PowerIntegrations_SO-8 +Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://ac-dc.power.com/sites/default/files/product-docs/senzero_family_datasheet.pdf +SOIC 1.27 +0 +8 +8 +Package_SO +PowerIntegrations_SO-8B +Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf +SOIC 1.27 +0 +7 +7 +Package_SO +PowerIntegrations_SO-8C +Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf +SOIC 1.27 +0 +7 +7 +Package_SO +PowerPAK_SO-8_Dual +PowerPAK SO-8 Dual (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72600/72600.pdf) +PowerPAK SO-8 Dual +0 +10 +6 +Package_SO +PowerPAK_SO-8_Single +PowerPAK SO-8 Single (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72599/72599.pdf) +PowerPAK SO-8 Single +0 +9 +5 +Package_SO +PSOP-44_16.9x27.17mm_P1.27mm +PSOP44: plastic thin shrink small outline package; 44 leads; body width 16.90 mm +PSOP 1.27 +0 +44 +44 +Package_SO +QSOP-16_3.9x4.9mm_P0.635mm +16-Lead Plastic Shrink Small Outline Narrow Body (QR)-.150" Body [QSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.635 +0 +16 +16 +Package_SO +QSOP-20_3.9x8.7mm_P0.635mm +20-Lead Plastic Shrink Small Outline Narrow Body (http://www.analog.com/media/en/technical-documentation/data-sheets/ADuM7640_7641_7642_7643.pdf) +QSOP 0.635 +0 +20 +20 +Package_SO +QSOP-24_3.9x8.7mm_P0.635mm +24-Lead Plastic Shrink Small Outline Narrow Body (QR)-.150" Body [QSOP] (see Microchip Packaging Specification 00000049CH.pdf) +QSOP 0.635 +0 +24 +24 +Package_SO +SO-4_4.4x2.3mm_P1.27mm +4-Lead Plastic Small Outline (SO), see http://datasheet.octopart.com/OPIA403BTRE-Optek-datasheet-5328560.pdf +SO SOIC 1.27 +0 +4 +4 +Package_SO +SO-4_4.4x3.6mm_P2.54mm +4-Lead Plastic Small Outline (SO), see https://www.elpro.org/de/index.php?controller=attachment&id_attachment=339 +SO SOIC 2.54 +0 +4 +4 +Package_SO +SO-4_4.4x4.3mm_P2.54mm +4-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/docs/AV02-0173EN +SO SOIC 2.54 +0 +4 +4 +Package_SO +SO-4_7.6x3.6mm_P2.54mm +4-Lead Plastic Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf) +SO SOIC 2.54 +0 +4 +4 +Package_SO +SO-5_4.4x3.6mm_P1.27mm +5-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SO SOIC 1.27 +0 +5 +5 +Package_SO +SO-6L_10x3.84mm_P1.27mm +6-pin plasic small outline 7,5mm long https://toshiba.semicon-storage.com/info/docget.jsp?did=53548&prodName=TLP2770 +SO-6L +0 +6 +6 +Package_SO +SO-6_4.4x3.6mm_P1.27mm +6-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SO SOIC 1.27 +0 +6 +6 +Package_SO +SO-8_3.9x4.9mm_P1.27mm +SO, 8 Pin (https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +8 +8 +Package_SO +SO-8_5.3x6.2mm_P1.27mm +8-Lead Plastic Small Outline, 5.3x6.2mm Body (http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf) +SOIC 1.27 +0 +8 +8 +Package_SO +SO-20_12.8x7.5mm_P1.27mm +SO-20, 12.8x7.5mm, https://www.nxp.com/docs/en/data-sheet/SA605.pdf +S0-20 +0 +20 +20 +Package_SO +SOIC-4_4.55x2.6mm_P1.27mm +SOIC, 4 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=12884&prodName=TLP291), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +4 +4 +Package_SO +SOIC-4_4.55x3.7mm_P2.54mm +SOIC, 6 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=11791&prodName=TLP185), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +4 +4 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm_ThermalVias +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm +SOIC, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm_ThermalVias +SOIC, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.81mm +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.81mm_ThermalVias +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm +SOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lm5017.pdf#page=31), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +14 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm_ThermalVias +SOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lm5017.pdf#page=31), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +23 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm +SOIC, 8 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/hip2100.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm_ThermalVias +SOIC, 8 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/hip2100.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-N7_3.9x4.9mm_P1.27mm +8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], pin 7 removed (Microchip Packaging Specification 00000049BS.pdf, http://www.onsemi.com/pub/Collateral/NCP1207B.PDF) +SOIC 1.27 +0 +7 +7 +Package_SO +SOIC-8_3.9x4.9mm_P1.27mm +8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf) +SOIC 1.27 +0 +8 +8 +Package_SO +SOIC-14W_7.5x9.0mm_P1.27mm +14-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body (http://www.ti.com/lit/ds/symlink/lm1877.pdf) +SOIC 1.27 +0 +14 +14 +Package_SO +SOIC-14_3.9x8.7mm_P1.27mm +14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +14 +14 +Package_SO +SOIC-16W-12_7.5x10.3mm_P1.27mm +SOIC-16 With 12 Pin Placed - Wide, 7.50 mm Body [SOIC] (https://docs.broadcom.com/docs/AV02-0169EN) +SOIC 1.27 16 12 Wide +0 +12 +12 +Package_SO +SOIC-16W_5.3x10.2mm_P1.27mm +16-Lead Plastic Small Outline (SO) - Wide, 5.3 mm Body (http://www.ti.com/lit/ml/msop002a/msop002a.pdf) +SOIC 1.27 +0 +16 +16 +Package_SO +SOIC-16W_7.5x10.3mm_P1.27mm +16-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +16 +16 +Package_SO +SOIC-16W_7.5x12.8mm_P1.27mm +16-Lead Plastic Small Outline (SO) - Wide, 7.50 mm x 12.8 mm Body (http://www.analog.com/media/en/technical-documentation/data-sheets/ADuM6000.PDF) +SOIC 1.27 +0 +16 +16 +Package_SO +SOIC-16_3.9x9.9mm_P1.27mm +16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +16 +16 +Package_SO +SOIC-16_4.55x10.3mm_P1.27mm +SOIC, 16 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=12858&prodName=TLP291-4), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +16 +16 +Package_SO +SOIC-18W_7.5x11.6mm_P1.27mm +18-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +18 +18 +Package_SO +SOIC-20W_7.5x12.8mm_P1.27mm +20-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +20 +20 +Package_SO +SOIC-24W_7.5x15.4mm_P1.27mm +24-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +24 +24 +Package_SO +SOIC-28W_7.5x17.9mm_P1.27mm +28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +28 +28 +Package_SO +SOIC-28W_7.5x18.7mm_P1.27mm +28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm X 18.7 mm Body [SOIC] (https://www.akm.com/akm/en/file/datasheet/AK5394AVS.pdf) +SOIC 1.27 +0 +28 +28 +Package_SO +SOIJ-8_5.3x5.3mm_P1.27mm +8-Lead Plastic Small Outline (SM) - Medium, 5.28 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +8 +8 +Package_SO +SOJ-36_10.16x23.49mm_P1.27mm +SOJ, 36 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOJ SO +0 +36 +36 +Package_SO +SOP-4_3.8x4.1mm_P2.54mm +SOP, 4 Pin (http://www.ixysic.com/home/pdfs.nsf/www/CPC1017N.pdf/$file/CPC1017N.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +4 +4 +Package_SO +SOP-4_4.4x2.6mm_P1.27mm +SOP, 4 Pin (http://www.vishay.com/docs/83510/tcmt1100.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +4 +4 +Package_SO +SOP-8_3.76x4.96mm_P1.27mm +SOP, 8 Pin (https://ww2.minicircuits.com/case_style/XX211.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +8 +8 +Package_SO +SOP-8_6.62x9.15mm_P2.54mm +SOP, 8 Pin (http://www.ti.com/lit/ds/symlink/iso1050.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +8 +8 +Package_SO +SOP-16_4.4x10.4mm_P1.27mm +16-Lead Plastic Small Outline http://www.vishay.com/docs/49633/sg2098.pdf +SOP 1.27 +0 +16 +16 +Package_SO +SOP-16_4.55x10.3mm_P1.27mm +SOP, 16 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=12855&prodName=TLP290-4), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +16 +16 +Package_SO +SOP-18_7x12.5mm_P1.27mm +SOP, 18 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=30523), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +18 +18 +Package_SO +SSO-4_6.7x5.1mm_P2.54mm_Clearance8mm +4-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/84299/vor1142b4.pdf +SSO Stretched SO SOIC 2.54 +0 +4 +4 +Package_SO +SSO-6_6.8x4.6mm_P1.27mm_Clearance7mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC 1.27 +0 +6 +6 +Package_SO +SSO-6_6.8x4.6mm_P1.27mm_Clearance8mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC 1.27 +0 +6 +6 +Package_SO +SSO-8_6.7x9.8mm_P2.54mm_Clearance8mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf +SSO Stretched SO SOIC Pitch 2.54 +0 +8 +8 +Package_SO +SSO-8_6.8x5.9mm_P1.27mm_Clearance7mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSO-8_6.8x5.9mm_P1.27mm_Clearance8mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSO-8_9.6x6.3mm_P1.27mm_Clearance10.5mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSO-8_13.6x6.3mm_P1.27mm_Clearance14.2mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSOP-8_2.95x2.8mm_P0.65mm +SSOP-8 2.9 x2.8mm Pitch 0.65mm +SSOP-8 2.95x2.8mm Pitch 0.65mm +0 +8 +8 +Package_SO +SSOP-8_3.9x5.05mm_P1.27mm +SSOP, 8 Pin (http://www.fujitsu.com/downloads/MICRO/fsa/pdf/products/memory/fram/MB85RS16-DS501-00014-6v0-E.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +8 +8 +Package_SO +SSOP-8_3.95x5.21x3.27mm_P1.27mm +SSOP-8 3.95x5.21x3.27mm Pitch 1.27mm +SSOP-8 3.95x5.21x3.27mm 1.27mm +0 +8 +8 +Package_SO +SSOP-8_5.25x5.24mm_P1.27mm +SSOP, 8 Pin (http://www.fujitsu.com/ca/en/Images/MB85RS2MT-DS501-00023-1v0-E.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +8 +8 +Package_SO +SSOP-10_3.9x4.9mm_P1.00mm +10-Lead SSOP, 3.9 x 4.9mm body, 1.00mm pitch (http://www.st.com/resource/en/datasheet/viper01.pdf) +SSOP 3.9 4.9 1.00 +0 +10 +10 +Package_SO +SSOP-14_5.3x6.2mm_P0.65mm +SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot337-1_po.pdf) +SSOP 0.65 +0 +14 +14 +Package_SO +SSOP-16_3.9x4.9mm_P0.635mm +SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot519-1_po.pdf) +SSOP 0.635 +0 +16 +16 +Package_SO +SSOP-16_4.4x5.2mm_P0.65mm +SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot369-1_po.pdf) +SSOP 0.65 +0 +16 +16 +Package_SO +SSOP-16_5.3x6.2mm_P0.65mm +SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot338-1_po.pdf) +SSOP 0.65 +0 +16 +16 +Package_SO +SSOP-18_4.4x6.5mm_P0.65mm +SSOP18: plastic shrink small outline package; 18 leads; body width 4.4 mm (http://toshiba.semicon-storage.com/info/docget.jsp?did=30523&prodName=TBD62783APG) +SSOP 0.65 +0 +18 +18 +Package_SO +SSOP-20_3.9x8.7mm_P0.635mm +SSOP20: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635; (see http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT231X.pdf) +SSOP 0.635 +0 +20 +20 +Package_SO +SSOP-20_4.4x6.5mm_P0.65mm +SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot266-1_po.pdf) +SSOP 0.65 +0 +20 +20 +Package_SO +SSOP-20_5.3x7.2mm_P0.65mm +20-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +20 +20 +Package_SO +SSOP-24_3.9x8.7mm_P0.635mm +SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot556-1_po.pdf) +SSOP 0.635 +0 +24 +24 +Package_SO +SSOP-24_5.3x8.2mm_P0.65mm +24-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +24 +24 +Package_SO +SSOP-28_3.9x9.9mm_P0.635mm +SSOP28: plastic shrink small outline package; 28 leads; body width 3.9 mm; lead pitch 0.635; (see http://cds.linear.com/docs/en/datasheet/38901fb.pdf) +SSOP 0.635 +0 +28 +28 +Package_SO +SSOP-28_5.3x10.2mm_P0.65mm +28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +28 +28 +Package_SO +SSOP-32_11.305x20.495mm_P1.27mm +SSOP, 32 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +32 +32 +Package_SO +SSOP-44_5.3x12.8mm_P0.5mm +44-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (http://cds.linear.com/docs/en/datasheet/680313fa.pdf) +SSOP 0.5 +0 +44 +44 +Package_SO +SSOP-48_7.5x15.9mm_P0.635mm +SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf) +SSOP 0.635 +0 +48 +48 +Package_SO +SSOP-56_7.5x18.5mm_P0.635mm +SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot371-1_po.pdf) +SSOP 0.635 +0 +56 +56 +Package_SO +ST_MultiPowerSO-30 +MultiPowerSO-30 3EP 16.0x17.2mm Pitch 1mm (http://www.st.com/resource/en/datasheet/vnh2sp30-e.pdf) +MultiPowerSO-30 3EP 16.0x17.2mm Pitch 1mm +0 +33 +33 +Package_SO +ST_PowerSSO-24_SlugDown +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7266p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm +0 +25 +25 +Package_SO +ST_PowerSSO-24_SlugDown_ThermalVias +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7266p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm +0 +38 +25 +Package_SO +ST_PowerSSO-24_SlugUp +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7266p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm +0 +24 +24 +Package_SO +ST_PowerSSO-36_SlugDown +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7492p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm +0 +37 +37 +Package_SO +ST_PowerSSO-36_SlugDown_ThermalVias +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7492p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm +0 +50 +37 +Package_SO +ST_PowerSSO-36_SlugUp +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7492p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm +0 +36 +36 +Package_SO +Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm +Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf) +HSOP 1.27 +0 +11 +9 +Package_SO +Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm_ThermalVias +Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf) +HSOP 1.27 +0 +20 +9 +Package_SO +Texas_HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.4x3.1mm_ThermalVias +8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf +HTSOP 1.27 +0 +18 +9 +Package_SO +Texas_PWP0020A +20-Pin Thermally Enhanced Thin Shrink Small-Outline Package, Body 4.4x6.5x1.1mm, Pad 3.0x4.2mm, Texas Instruments (see http://www.ti.com/lit/ds/symlink/lm5118.pdf) +PWP HTSSOP 0.65mm +0 +25 +21 +Package_SO +Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm +HSOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28, http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOIC SO +0 +16 +9 +Package_SO +Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm_ThermalVias +HSOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28, http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOIC SO +0 +23 +9 +Package_SO +Texas_R-PDSO-N5 +Plastic Small outline http://www.ti.com/lit/ml/mpds158c/mpds158c.pdf +SOT23 R-PDSO-N5 +0 +5 +5 +Package_SO +TI_SO-PowerPAD-8 +8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf) +SSOP 0.50 exposed pad +0 +12 +9 +Package_SO +TI_SO-PowerPAD-8_ThermalVias +8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, thermal vias with large copper area, as proposed in http://www.ti.com/lit/ds/symlink/tps5430.pdf +HTSOP 1.27 +0 +19 +9 +Package_SO +TSOP-5_1.65x3.05mm_P0.95mm +TSOP-5 package (comparable to TSOT-23), https://www.vishay.com/docs/71200/71200.pdf +Jedec MO-193C TSOP-5L +0 +5 +5 +Package_SO +TSOP-6_1.65x3.05mm_P0.95mm +TSOP-6 package (comparable to TSOT-23), https://www.vishay.com/docs/71200/71200.pdf +Jedec MO-193C TSOP-6L +0 +6 +6 +Package_SO +TSOP-I-28_11.8x8mm_P0.55mm +TSOP I, 28 pins, 18.8x8mm body, 0.55mm pitch, IPC-calculated pads (http://ww1.microchip.com/downloads/en/devicedoc/doc0807.pdf) +TSOP I 28 pins +0 +28 +28 +Package_SO +TSOP-I-32_11.8x8mm_P0.5mm +TSOP-I, 32 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSOP-I SO +0 +32 +32 +Package_SO +TSOP-I-32_18.4x8mm_P0.5mm +TSOP I, 32 pins, 18.4x8mm body (https://www.micron.com/~/media/documents/products/technical-note/nor-flash/tn1225_land_pad_design.pdf, http://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/f32pm25.pdf) +TSOP I 32 +0 +32 +32 +Package_SO +TSOP-I-32_18.4x8mm_P0.5mm_Reverse +TSOP I, 32 pins, 18.4x8mm body (http://www.futurlec.com/Datasheet/Memory/628128.pdf), reverse mount +TSOP I 32 reverse +0 +32 +32 +Package_SO +TSOP-I-48_18.4x12mm_P0.5mm +TSOP I, 32 pins, 18.4x8mm body (https://www.micron.com/~/media/documents/products/technical-note/nor-flash/tn1225_land_pad_design.pdf) +TSOP I 32 +0 +48 +48 +Package_SO +TSOP-I-56_18.4x14mm_P0.5mm +TSOP I, 32 pins, 18.4x8mm body (https://www.micron.com/~/media/documents/products/technical-note/nor-flash/tn1225_land_pad_design.pdf) +TSOP I 32 +0 +56 +56 +Package_SO +TSOP-II-32_21.0x10.2mm_P1.27mm +32-lead plastic TSOP; Type II +TSOP-II 32 +0 +32 +32 +Package_SO +TSOP-II-44_10.16x18.41mm_P0.8mm +TSOP-II, 44 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSOP-II SO +0 +44 +44 +Package_SO +TSOP-II-54_22.2x10.16mm_P0.8mm +54-lead TSOP typ II package +TSOPII TSOP2 +0 +54 +54 +Package_SO +TSSOP-8_3x3mm_P0.65mm +TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot505-1_po.pdf) +SSOP 0.65 +0 +8 +8 +Package_SO +TSSOP-8_4.4x3mm_P0.65mm +8-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +8 +8 +Package_SO +TSSOP-10_3x3mm_P0.5mm +TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot552-1_po.pdf) +SSOP 0.5 +0 +10 +10 +Package_SO +TSSOP-14-1EP_4.4x5mm_P0.65mm +14-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] with exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf) +SSOP 0.65 exposed pad +0 +18 +15 +Package_SO +TSSOP-14_4.4x5mm_P0.65mm +14-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +14 +14 +Package_SO +TSSOP-16-1EP_4.4x5mm_P0.65mm +FE Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad Variation BB; (see Linear Technology 1956f.pdf) +SSOP 0.65 +0 +24 +17 +Package_SO +TSSOP-16_4.4x5mm_P0.65mm +16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +16 +16 +Package_SO +TSSOP-20_4.4x6.5mm_P0.65mm +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +20 +20 +Package_SO +TSSOP-24_4.4x7.8mm_P0.65mm +TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot355-1_po.pdf) +SSOP 0.65 +0 +24 +24 +Package_SO +TSSOP-28-1EP_4.4x9.7mm_P0.65mm +TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; Exposed Pad Variation; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot361-1_po.pdf) +SSOP 0.65 +0 +36 +29 +Package_SO +TSSOP-28_4.4x9.7mm_P0.65mm +TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot361-1_po.pdf) +SSOP 0.65 +0 +28 +28 +Package_SO +TSSOP-30_4.4x7.8mm_P0.5mm +TSSOP30: plastic thin shrink small outline package; 30 leads; body width 4.4 mm (http://www.ti.com/lit/ds/symlink/bq78350.pdf) +SSOP 0.5 +0 +30 +30 +Package_SO +TSSOP-32_6.1x11mm_P0.65mm +TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf) +SSOP 0.65 +0 +32 +32 +Package_SO +TSSOP-38_4.4x9.7mm_P0.5mm +TSSOP38: plastic thin shrink small outline package; 38 leads; body width 4.4 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot510-1_po.pdf) +SSOP 0.5 +0 +38 +38 +Package_SO +TSSOP-38_6.1x12.5mm_P0.65mm +TSSOP38: plastic thin shrink small outline package; 38 leads; body width 6.1 mm (http://www.ti.com/lit/ds/symlink/msp430g2744.pdf) +SSOP 0.65 +0 +38 +38 +Package_SO +TSSOP-44_4.4x11.2mm_P0.5mm +TSSOP44: plastic thin shrink small outline package; 44 leads; body width 4.4 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot510-1_po.pdf) +SSOP 0.5 +0 +44 +44 +Package_SO +TSSOP-48_6.1x12.5mm_P0.5mm +TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot362-1_po.pdf) +SSOP 0.5 +0 +48 +48 +Package_SO +TSSOP-56_6.1x14mm_P0.5mm +TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot364-1_po.pdf) +SSOP 0.5 +0 +56 +56 +Package_SO +Vishay_PowerPAK_1212-8_Dual +PowerPAK 1212-8 Dual (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72598/72598.pdf) +Vishay_PowerPAK_1212-8_Dual +0 +6 +6 +Package_SO +Vishay_PowerPAK_1212-8_Single +PowerPAK 1212-8 Single (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72597/72597.pdf) +Vishay PowerPAK 1212-8 Single +0 +5 +5 +Package_SO +VSO-40_7.6x15.4mm_P0.762mm +VSO40: plastic very small outline package; 40 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot158-1_po.pdf) +SSOP 0.762 +0 +40 +40 +Package_SO +VSO-56_11.1x21.5mm_P0.75mm +VSO56: plastic very small outline package; 56 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot190-1_po.pdf) +SSOP 0.75 +0 +56 +56 +Package_SO +VSSOP-8_2.3x2mm_P0.5mm +VSSOP-8 2.3x2mm Pitch 0.5mm +VSSOP-8 2.3x2mm Pitch 0.5mm +0 +8 +8 +Package_SO +VSSOP-8_2.4x2.1mm_P0.5mm +http://www.ti.com/lit/ml/mpds050d/mpds050d.pdf +VSSOP DCU R-PDSO-G8 Pitch0.5mm +0 +8 +8 +Package_SO +VSSOP-8_3.0x3.0mm_P0.65mm +VSSOP-8 3.0 x 3.0, http://www.ti.com/lit/ds/symlink/lm75b.pdf +VSSOP-8 3.0 x 3.0 +0 +8 +8 +Package_SO +VSSOP-10_3x3mm_P0.5mm +VSSOP, 10 Pin (http://www.ti.com/lit/ds/symlink/ads1115.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +VSSOP SO +0 +10 +10 +Package_SO +Zetex_SM8 +Zetex, SMD, 8 pin package (http://datasheet.octopart.com/ZDT6758TA-Zetex-datasheet-68057.pdf) +Zetex SM8 +0 +8 +8 +Package_SON +Diodes_PowerDI3333-8 +Diodes Incorporated PowerDI3333-8, Plastic Dual Flat No Lead Package, 3.3x3.3x0.8mm Body, https://www.diodes.com/assets/Package-Files/PowerDI3333-8.pdf +PowerDI 0.65 +0 +13 +5 +Package_SON +Fairchild_DualPower33-6_3x3mm +Fairchild Power33 MOSFET package, 3x3mm (see https://www.fairchildsemi.com/datasheets/FD/FDMC8032L.pdf) +mosfet +0 +18 +6 +Package_SON +Fairchild_MicroPak-6_1.0x1.45mm_P0.5mm +Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm https://www.nxp.com/docs/en/application-note/AN10343.pdff +Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm +0 +6 +6 +Package_SON +Fairchild_MicroPak2-6_1.0x1.0mm_P0.35mm +Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch 0.35mm https://www.nxp.com/docs/en/application-note/AN10343.pdff +Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch 0.35mm +0 +6 +6 +Package_SON +NXP_XSON-16 +http://www.nxp.com/documents/outline_drawing/SOT1341-1.pdf +NXP XSON SOT-1341 +0 +16 +16 +Package_SON +ROHM_VML0806 +VML0806, Rohm (http://rohmfs.rohm.com/en/techdata_basic/transistor/soldering_condition/VML0806_Soldering_Condition.pdf, http://rohmfs.rohm.com/en/products/databook/package/spec/discrete/vml0806_tr-e.pdf) +ROHM VML0806 +0 +3 +3 +Package_SON +SON-8-1EP_3x2mm_P0.5mm_EP1.4x1.6mm +SON, 8 Pin (http://www.fujitsu.com/downloads/MICRO/fsa/pdf/products/memory/fram/MB85RS16-DS501-00014-6v0-E.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +SON DFN_QFN +0 +13 +9 +Package_SON +Texas_DQK +Texas WSON-6 DQK, http://www.ti.com/lit/ds/symlink/csd16301q2.pdf +Texas WSON6 2x2mm +0 +10 +8 +Package_SON +Texas_DRC0010J +Texas DRC0010J, VSON10 3x3mm Body, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/tps63000.pdf +Texas VSON10 3x3mm +0 +17 +11 +Package_SON +Texas_DRC0010J_ThermalVias +Texas DRC0010J, VSON10 3x3mm Body, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/tps63000.pdf +Texas VSON10 3x3mm +0 +21 +11 +Package_SON +Texas_DSC0010J +3x3mm Body, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 DSC0010J WSON +0 +33 +11 +Package_SON +Texas_DSC0010J_ThermalVias +3x3mm Body, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 DSC0010J WSON +0 +39 +11 +Package_SON +Texas_PWSON-N6 +Plastic Small Outline No-Lead http://www.ti.com/lit/ml/mpds176e/mpds176e.pdf +Plastic Small Outline No-Lead +0 +7 +7 +Package_SON +Texas_R-PWSON-N12_EP0.4x2mm +http://www.ti.com/lit/ds/symlink/tpd6f003.pdf +WSON SMD +0 +16 +13 +Package_SON +Texas_S-PDSO-N12 +http://www.ti.com/lit/ds/symlink/bq27441-g1.pdf +SON thermal pads +0 +44 +13 +Package_SON +Texas_S-PVSON-N8 +8-Lead Plastic VSON, 3x3mm Body, 0.65mm Pitch, S-PVSON-N8, http://www.ti.com/lit/ds/symlink/opa2333.pdf +DFN 0.65 S-PVSON-N8 +0 +21 +9 +Package_SON +Texas_S-PVSON-N8_ThermalVias +8-Lead Plastic VSON, 3x3mm Body, 0.65mm Pitch, S-PVSON-N8, http://www.ti.com/lit/ds/symlink/opa2333.pdf +DFN 0.65 S-PVSON-N8 +0 +27 +9 +Package_SON +Texas_S-PVSON-N10 +3x3mm Body, 0.5mm Pitch, S-PVSON-N10, DRC, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 S-PVSON-N10 DRC +0 +33 +11 +Package_SON +Texas_S-PVSON-N10_ThermalVias +3x3mm Body, 0.5mm Pitch, S-PVSON-N10, DRC, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 S-PVSON-N10 DRC +0 +39 +11 +Package_SON +Texas_S-PWSON-N8_EP1.2x2mm +WSON, 8 Pin (http://www.ti.com/lit/ds/symlink/lp2951.pdf#page=27), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WSON DFN_QFN +0 +11 +9 +Package_SON +Texas_S-PWSON-N8_EP1.2x2mm_ThermalVias +WSON, 8 Pin (http://www.ti.com/lit/ds/symlink/lp2951.pdf#page=27), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WSON DFN_QFN +0 +18 +9 +Package_SON +Texas_S-PWSON-N10 +3x3mm Body, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf +0.5 S-PWSON-N10 DSC +0 +41 +11 +Package_SON +Texas_S-PWSON-N10_ThermalVias +3x3mm Body, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf +0.5 S-PWSON-N10 DSC +0 +47 +11 +Package_SON +Texas_X2SON-4_1x1mm_P0.65mm +X2SON 5 pin 1x1mm package (Reference Datasheet: http://www.ti.com/lit/ds/sbvs193d/sbvs193d.pdf Reference part: TPS383x) [StepUp generated footprint] +X2SON +0 +13 +5 +Package_SON +USON-10_2.5x1.0mm_P0.5mm +USON-10 2.5x1.0mm_ Pitch 0.5mm http://www.ti.com/lit/ds/symlink/tpd4e02b04.pdf +USON-10 2.5x1.0mm Pitch 0.5mm +0 +10 +10 +Package_SON +USON-20_2x4mm_P0.4mm +USON-20 2x4mm Pitch 0.4mm http://www.ti.com/lit/ds/symlink/txb0108.pdf +USON-20 2x4mm Pitch 0.4mm +0 +20 +20 +Package_SON +VSON-8_3.3x3.3mm_P0.65mm_NexFET +8-Lead Plastic Dual Flat, No Lead Package (MF) - 3.3x3.3x1 mm Body [VSON] http://www.ti.com/lit/ds/symlink/csd87334q3d.pdf +VSON 0.65 +0 +12 +5 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm +VSON, 10 Pin (http://rohmfs.rohm.com/en/products/databook/datasheet/ic/power/switching_regulator/bd8314nuv-e.pdf (Page 20)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VSON +0 +15 +11 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm_ThermalVias +VSON, 10 Pin (http://rohmfs.rohm.com/en/products/databook/datasheet/ic/power/switching_regulator/bd8314nuv-e.pdf (Page 20)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +VSON +0 +18 +11 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm http://chip.tomsk.ru/chip/chipdoc.nsf/Package/D8A64DD165C2AAD9472579400024FC41!OpenDocument +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm +0 +21 +11 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm_ThermalVias +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm http://chip.tomsk.ru/chip/chipdoc.nsf/Package/D8A64DD165C2AAD9472579400024FC41!OpenDocument +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm +0 +27 +11 +Package_SON +VSONP-8-1EP_5x6_P1.27mm +SON, 8-Leads, Body 5x6x1mm, Pitch 1.27mm; (see Texas Instruments CSD18531Q5A http://www.ti.com/lit/ds/symlink/csd18531q5a.pdf) +VSONP 1.27 +0 +13 +3 +Package_SON +WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm +WSON, 6 Pin (http://www.ti.com/lit/ds/symlink/tps61040.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +9 +7 +Package_SON +WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm_ThermalVias +WSON, 6 Pin (http://www.ti.com/lit/ds/symlink/tps61040.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +12 +7 +Package_SON +WSON-6-1EP_3x3mm_P0.95mm +WSON6 3*3 MM, 0.95 PITCH; http://www.ti.com/lit/ds/symlink/lmr62421.pdf +WSON6 0.95 +0 +10 +7 +Package_SON +WSON-6_1.5x1.5mm_P0.5mm +WSON6, http://www.ti.com/lit/ds/symlink/tlv702.pdf +WSON6_1.5x1.5mm_P0.5mm +0 +6 +6 +Package_SON +WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm +8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf +WSON 8 1EP +0 +11 +9 +Package_SON +WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm_ThermalVias +8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf +WSON 8 1EP ThermalVias +0 +14 +9 +Package_SON +WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm +8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf +WSON 8 1EP +0 +13 +9 +Package_SON +WSON-8-1EP_6x5mm_P1.27mm_EP3.4x4.3mm +WSON, 8 Pin (http://www.winbond.com/resource-files/w25q32jv%20revg%2003272018%20plus.pdf (page 68)), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WSON DFN_QFN +0 +13 +9 +Package_SON +WSON-8-1EP_6x5mm_P1.27mm_EP3.4x4mm +WSON, 8 Pin (http://ww1.microchip.com/downloads/en/AppNotes/S72030.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WSON DFN_QFN +0 +13 +9 +Package_SON +WSON-8_4x4mm_P0.8mm +http://www.ti.com/lit/ml/mpds406/mpds406.pdf +WSON8_4x4mm_P0.8mm +0 +9 +9 +Package_SON +WSON-10-1EP_2x3mm_P0.5mm_EP0.84x2.4mm +WSON-10 package 2x3mm body, pitch 0.5mm, see http://www.ti.com/lit/ds/symlink/tps62177.pdf +WSON 0.5 +0 +14 +11 +Package_SON +WSON-10-1EP_2x3mm_P0.5mm_EP0.84x2.4mm_ThermalVias +WSON-10 package 2x3mm body, pitch 0.5mm, thermal vias and counter-pad, see http://www.ti.com/lit/ds/symlink/tps62177.pdf +WSON 0.5 thermal vias +0 +17 +11 +Package_SON +WSON-10-1EP_4x3mm_P0.5mm_EP2.2x2mm +10-Lead Plastic WSON, 4x3mm Body, 0.5mm Pitch (http://www.ti.com/lit/ds/symlink/lm4990.pdf) +WSON 0.5 +0 +15 +11 +Package_SON +WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65 +WSON-12 http://www.ti.com/lit/ds/symlink/lm27762.pdf +WSON-12 +0 +15 +13 +Package_SON +WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65_ThermalVias +WSON-12 http://www.ti.com/lit/ds/symlink/lm27762.pdf +WSON-12 +0 +19 +13 +Package_SON +WSON-12-1EP_4x4mm_P0.5mm_EP2.6x3mm +WSON, 12 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=62), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +17 +13 +Package_SON +WSON-12-1EP_4x4mm_P0.5mm_EP2.6x3mm_ThermalVias +WSON, 12 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=62), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +27 +13 +Package_SON +WSON-14-1EP_4.0x4.0mm_P0.5mm_EP2.6x2.6mm +14-Lead Plastic Dual Flat, No Lead Package - 4.0x4.0x0.8 mm Body [WSON], http://www.ti.com/lit/ml/mpds421/mpds421.pdf +NHL014B +0 +19 +15 +Package_SON +WSON-16_3.3x1.35_P0.4mm +WSON-16 3.3 x 1.35mm Pitch 0.4mm http://www.chip.tomsk.ru/chip/chipdoc.nsf/Package/C67E729A4D6C883A4725793E004C8739!OpenDocument +WSON-16 3.3 x 1.35mm Pitch 0.4mm +0 +20 +17 +Package_SON +X2SON-8_1.4x1mm_P0.35mm +X2SON-8 1.4x1mm Pitch0.35mm http://www.ti.com/lit/ds/symlink/pca9306.pdf +X2SON-8 1.4x1mm Pitch0.35mm +0 +8 +8 +Package_TO_SOT_SMD +Analog_KS-4 +Analog Devices KS-4, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sc70ks/ks_4.pdf +Analog Devices KS-4 (like EIAJ SC-82) +0 +4 +4 +Package_TO_SOT_SMD +ATPAK-2 +ATPAK SMD package, http://www.onsemi.com/pub/Collateral/ENA2192-D.PDF +ATPAK +0 +7 +3 +Package_TO_SOT_SMD +Diodes_SOT-553 +Diodes SOT-553, https://www.diodes.com/assets/Package-Files/SOT553.pdf +SOT-553 +0 +5 +5 +Package_TO_SOT_SMD +HVSOF5 +HVSOF5, http://rohmfs.rohm.com/en/techdata_basic/ic/package/hvsof5_1-e.pdf +HVSOF5 +0 +9 +5 +Package_TO_SOT_SMD +HVSOF6 +HVSOF6, http://rohmfs.rohm.com/en/techdata_basic/ic/package/hvsof6_1-e.pdf, http://rohmfs.rohm.com/en/products/databook/datasheet/ic/audio_video/video_amplifier/bh76106hfv-e.pdf +HVSOF6 +0 +7 +7 +Package_TO_SOT_SMD +Infineon_PG-HDSOP-10-1 +Infineon PG-HDSOP-10-1 (DDPAK), 20.96x6.5x2.3mm, slug up (https://www.infineon.com/cms/en/product/packages/PG-HDSOP/PG-HDSOP-10-1/) +hdsop 10 ddpak +0 +10 +10 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-1 +Infineon HSOF-8-1 power mosfet http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-1/ +mosfet hsof +0 +54 +3 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-1_ThermalVias +HSOF-8-1 power mosfet http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-1/ +mosfet hsof thermal vias +0 +57 +3 +Package_TO_SOT_SMD +Infineon_PG-TO-220-7Lead_TabPin8 +Infineon PG-TO-220-7, Tab as Pin 8, see e.g. https://www.infineon.com/dgdl/Infineon-BTS50055-1TMC-DS-v01_00-EN.pdf?fileId=5546d4625a888733015aa9b0007235e9 +Infineon PG-TO-220-7 +0 +12 +8 +Package_TO_SOT_SMD +LFPAK33 +LFPAK33 SOT-1210 https://assets.nexperia.com/documents/outline-drawing/SOT1210.pdf +LFPAK33 SOT-1210 +0 +21 +5 +Package_TO_SOT_SMD +LFPAK56 +LFPAK56 https://assets.nexperia.com/documents/outline-drawing/SOT669.pdf +LFPAK56 SOT-669 Power-SO8 +0 +19 +5 +Package_TO_SOT_SMD +LFPAK56_ThermalVias-1 +LFPAK56 https://assets.nexperia.com/documents/outline-drawing/SOT669.pdf +LFPAK56 SOT669 Thermal Vias 0.4mm Power-SO8 +0 +63 +5 +Package_TO_SOT_SMD +LFPAK56_ThermalVias-2 +LFPAK56 https://assets.nexperia.com/documents/outline-drawing/SOT669.pdf +LFPAK56 SOT669 Thermical Vias Power-SO8 +0 +30 +5 +Package_TO_SOT_SMD +OnSemi_ECH8 +On Semiconductor ECH8, https://www.onsemi.com/pub/Collateral/318BF.PDF +ECH8 SOT28-FL SOT-28-FL +0 +8 +8 +Package_TO_SOT_SMD +PowerMacro_M234_NoHole +TO-50-4 Power Macro Package Style M234 +TO-50-4 Power Macro Package Style M234 +0 +4 +4 +Package_TO_SOT_SMD +PowerMacro_M234_WithHole +TO-50-4 Power Macro Package Style M234 +TO-50-4 Power Macro Package Style M234 +0 +4 +4 +Package_TO_SOT_SMD +PQFN_8x8 +Low profile 8x8mm PQFN package e.g. https://www.fairchildsemi.com/datasheets/FD/FDMT80080DC.pdf +pqfn vdfn mosfet +0 +16 +3 +Package_TO_SOT_SMD +Rohm_HRP7 +Rohm HRP7 SMD package, http://rohmfs.rohm.com/en/techdata_basic/ic/package/hrp7_1-e.pdf, http://rohmfs.rohm.com/en/products/databook/datasheet/ic/motor/dc/bd621x-e.pdf +Rohm HRP7 SMD +0 +69 +7 +Package_TO_SOT_SMD +SC-59 +SC-59, https://lib.chipdip.ru/images/import_diod/original/SOT-23_SC-59.jpg +SC-59 +0 +3 +3 +Package_TO_SOT_SMD +SC-59_Handsoldering +SC-59, hand-soldering varaint, https://lib.chipdip.ru/images/import_diod/original/SOT-23_SC-59.jpg +SC-59 hand-soldering +0 +3 +3 +Package_TO_SOT_SMD +SC-70-8 +SC70-8 +SC70-8 +0 +8 +8 +Package_TO_SOT_SMD +SC-70-8_Handsoldering +SC70-8, Handsoldering +SC70-8 Handsoldering +0 +8 +8 +Package_TO_SOT_SMD +SC-82AA +SC-82AA +SC-82AA +0 +4 +4 +Package_TO_SOT_SMD +SC-82AA_Handsoldering +SC-82AA +SC-82AA +0 +4 +4 +Package_TO_SOT_SMD +SC-82AB +SC-82AB +SC-82AB +0 +4 +4 +Package_TO_SOT_SMD +SC-82AB_Handsoldering +SC-82AB +SC-82AB +0 +4 +4 +Package_TO_SOT_SMD +SOT-23 +SOT-23, Standard +SOT-23 +0 +3 +3 +Package_TO_SOT_SMD +SOT-23-5 +5-pin SOT23 package +SOT-23-5 +0 +5 +5 +Package_TO_SOT_SMD +SOT-23-5_HandSoldering +5-pin SOT23 package +SOT-23-5 hand-soldering +0 +5 +5 +Package_TO_SOT_SMD +SOT-23-6 +6-pin SOT-23 package +SOT-23-6 +0 +6 +6 +Package_TO_SOT_SMD +SOT-23-6_Handsoldering +6-pin SOT-23 package, Handsoldering +SOT-23-6 Handsoldering +0 +6 +6 +Package_TO_SOT_SMD +SOT-23-8 +8-pin SOT-23 package, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sot-23rj/rj_8.pdf +SOT-23-8 +0 +8 +8 +Package_TO_SOT_SMD +SOT-23-8_Handsoldering +8-pin SOT-23 package, Handsoldering, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sot-23rj/rj_8.pdf +SOT-23-8 Handsoldering +0 +8 +8 +Package_TO_SOT_SMD +SOT-23W +SOT-23W http://www.allegromicro.com/~/media/Files/Datasheets/A112x-Datasheet.ashx?la=en&hash=7BC461E058CC246E0BAB62433B2F1ECA104CA9D3 +SOT-23W +0 +3 +3 +Package_TO_SOT_SMD +SOT-23W_Handsoldering +SOT-23W http://www.allegromicro.com/~/media/Files/Datasheets/A112x-Datasheet.ashx?la=en&hash=7BC461E058CC246E0BAB62433B2F1ECA104CA9D3 +SOT-23W for handsoldering +0 +3 +3 +Package_TO_SOT_SMD +SOT-23_Handsoldering +SOT-23, Handsoldering +SOT-23 +0 +3 +3 +Package_TO_SOT_SMD +SOT-89-3 +SOT-89-3 +SOT-89-3 +0 +6 +3 +Package_TO_SOT_SMD +SOT-89-3_Handsoldering +SOT-89-3 Handsoldering +SOT-89-3 Handsoldering +0 +5 +3 +Package_TO_SOT_SMD +SOT-89-5 +SOT-89-5, Housing,http://www.e-devices.ricoh.co.jp/en/products/product_power/pkg/sot-89-5.pdf +SOT-89-5 Housing +0 +9 +5 +Package_TO_SOT_SMD +SOT-89-5_Handsoldering +SOT89-5, Housing,http://www.e-devices.ricoh.co.jp/en/products/product_power/pkg/sot-89-5.pdf +SOT89-5 Housing +0 +9 +5 +Package_TO_SOT_SMD +SOT-143 +SOT-143 +SOT-143 +0 +4 +4 +Package_TO_SOT_SMD +SOT-143R_Reverse +SOT-143R Reverse +SOT-143R Reverse +0 +4 +4 +Package_TO_SOT_SMD +SOT-143R_Reverse_Handsoldering +SOT-143R Reverse Handsoldering +SOT-143 Reverse Handsoldering +0 +4 +4 +Package_TO_SOT_SMD +SOT-143_Handsoldering +SOT-143 Handsoldering +SOT-143 Handsoldering +0 +4 +4 +Package_TO_SOT_SMD +SOT-223 +module CMS SOT223 4 pins +CMS SOT +0 +4 +4 +Package_TO_SOT_SMD +SOT-223-3_TabPin2 +module CMS SOT223 4 pins +CMS SOT +0 +4 +3 +Package_TO_SOT_SMD +SOT-223-5 +module CMS SOT223 5 pins, http://ww1.microchip.com/downloads/en/DeviceDoc/51751a.pdf +CMS SOT +0 +5 +5 +Package_TO_SOT_SMD +SOT-223-6 +module CMS SOT223 6 pins, http://www.ti.com/lit/ds/symlink/tps737.pdf +CMS SOT +0 +6 +6 +Package_TO_SOT_SMD +SOT-223-6_TabPin3 +module CMS SOT223 6 pins, http://www.ti.com/lit/ds/symlink/tps737.pdf +CMS SOT +0 +6 +5 +Package_TO_SOT_SMD +SOT-223-8 +module CMS SOT223 8 pins, https://www.diodes.com/assets/Datasheets/ZXSBMR16PT8.pdf +CMS SOT +0 +8 +8 +Package_TO_SOT_SMD +SOT-323_SC-70 +SOT-323, SC-70 +SOT-323 SC-70 +0 +3 +3 +Package_TO_SOT_SMD +SOT-323_SC-70_Handsoldering +SOT-323, SC-70 Handsoldering +SOT-323 SC-70 Handsoldering +0 +3 +3 +Package_TO_SOT_SMD +SOT-343_SC-70-4 +SOT-343, SC-70-4 +SOT-343 SC-70-4 +0 +4 +4 +Package_TO_SOT_SMD +SOT-343_SC-70-4_Handsoldering +SOT-343, SC-70-4, Handsoldering +SOT-343 SC-70-4 Handsoldering +0 +4 +4 +Package_TO_SOT_SMD +SOT-353_SC-70-5 +SOT-353, SC-70-5 +SOT-353 SC-70-5 +0 +5 +5 +Package_TO_SOT_SMD +SOT-353_SC-70-5_Handsoldering +SOT-353, SC-70-5, Handsoldering +SOT-353 SC-70-5 Handsoldering +0 +5 +5 +Package_TO_SOT_SMD +SOT-363_SC-70-6 +SOT-363, SC-70-6 +SOT-363 SC-70-6 +0 +6 +6 +Package_TO_SOT_SMD +SOT-363_SC-70-6_Handsoldering +SOT-363, SC-70-6, Handsoldering +SOT-363 SC-70-6 Handsoldering +0 +6 +6 +Package_TO_SOT_SMD +SOT-383F +8-pin SOT-383F, http://www.mouser.com/ds/2/80/CPDVR085V0C-HF-RevB-10783.pdf +SOT-383F +0 +9 +9 +Package_TO_SOT_SMD +SOT-383FL +8-pin SOT-383FL package, http://www.onsemi.com/pub_link/Collateral/ENA2267-D.PDF +SOT-383FL +0 +8 +8 +Package_TO_SOT_SMD +SOT-416 +SOT-416, https://www.nxp.com/docs/en/package-information/SOT416.pdf +SOT-416 +0 +3 +3 +Package_TO_SOT_SMD +SOT-543 +SOT-543 4 lead surface package +SOT-543 SC-107A EMD4 +0 +4 +4 +Package_TO_SOT_SMD +SOT-553 +SOT553 +SOT-553 +0 +5 +5 +Package_TO_SOT_SMD +SOT-563 +SOT563 +SOT-563 +0 +6 +6 +Package_TO_SOT_SMD +SOT-665 +SOT665 +SOT-665 +0 +5 +5 +Package_TO_SOT_SMD +SOT-666 +SOT666 +SOT-666 +0 +6 +6 +Package_TO_SOT_SMD +SOT-723 +http://toshiba.semicon-storage.com/info/docget.jsp?did=5879&prodName=RN1104MFV +sot 723 +0 +3 +3 +Package_TO_SOT_SMD +SOT-883 +SOT-883, https://assets.nexperia.com/documents/outline-drawing/SOT883.pdf +SOT-883 +0 +3 +3 +Package_TO_SOT_SMD +SOT-886 +SOT-886 +SOT-886 +0 +6 +6 +Package_TO_SOT_SMD +SOT-963 +SOT 963 6 pins package 1x0.8mm pitch 0.35mm +SOT 963 6 pins package 1x0.8mm pitch 0.35mm +0 +6 +6 +Package_TO_SOT_SMD +SOT-1123 +SOT-1123 small outline transistor (see http://www.onsemi.com/pub/Collateral/NST3906F3-D.PDF) +SOT-1123 transistor +0 +3 +3 +Package_TO_SOT_SMD +SOT-1333-1 +SOT-1333-1 +SOT-1333-1 +0 +9 +9 +Package_TO_SOT_SMD +SOT-1334-1 +SOT-1334-1 +SOT-1334-1 +0 +14 +14 +Package_TO_SOT_SMD +SuperSOT-3 +3-pin SuperSOT package https://www.fairchildsemi.com/package-drawings/MA/MA03B.pdf +SuperSOT-3 SSOT-3 +0 +3 +3 +Package_TO_SOT_SMD +SuperSOT-6 +6-pin SuperSOT package http://www.mouser.com/ds/2/149/FMB5551-889214.pdf +SuperSOT-6 SSOT-6 +0 +6 +6 +Package_TO_SOT_SMD +SuperSOT-8 +8-pin SuperSOT package, http://www.icbank.com/icbank_data/semi_package/ssot8_dim.pdf +SuperSOT-8 SSOT-8 +0 +8 +8 +Package_TO_SOT_SMD +TDSON-8-1 +Power MOSFET package, TDSON-8-1, SuperS08, SON-8_5x6mm +tdson +0 +13 +5 +Package_TO_SOT_SMD +TDSON-8-1_HandSoldering +Power MOSFET package, TDSON-8-1, SuperS08, SON-8_5x6mm +tdson +0 +13 +5 +Package_TO_SOT_SMD +Texas_DRT-3 +Texas Instrument DRT-3 1x0.8mm Pitch 0.7mm http://www.ti.com/lit/ds/symlink/tpd2eusb30.pdf +DRT-3 1x0.8mm Pitch 0.7mm +0 +3 +3 +Package_TO_SOT_SMD +Texas_R-PDSO-G6 +R-PDSO-G6, http://www.ti.com/lit/ds/slis144b/slis144b.pdf +R-PDSO-G6 SC-70-6 +0 +6 +6 +Package_TO_SOT_SMD +TO-50-3_LongPad-NoHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-3_LongPad-WithHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-3_ShortPad-NoHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-3_ShortPad-WithHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-4_LongPad-NoHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-50-4_LongPad-WithHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-50-4_ShortPad-NoHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-50-4_ShortPad-WithHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-252-2 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-3-1/ +DPAK TO-252 DPAK-3 TO-252-3 SOT-428 +0 +7 +3 +Package_TO_SOT_SMD +TO-252-2_TabPin1 +TO-252-2, tab to pin 1 https://www.wolfspeed.com/media/downloads/87/CSD01060.pdf +TO-252-2 diode +0 +7 +2 +Package_TO_SOT_SMD +TO-252-3_TabPin2 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-3-1/ +DPAK TO-252 DPAK-3 TO-252-3 SOT-428 +0 +8 +3 +Package_TO_SOT_SMD +TO-252-3_TabPin4 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-3-1/ +DPAK TO-252 DPAK-3 TO-252-3 SOT-428 +0 +8 +4 +Package_TO_SOT_SMD +TO-252-4 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ +DPAK TO-252 DPAK-5 TO-252-5 +0 +9 +5 +Package_TO_SOT_SMD +TO-252-5_TabPin3 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ +DPAK TO-252 DPAK-5 TO-252-5 +0 +10 +5 +Package_TO_SOT_SMD +TO-252-5_TabPin6 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ +DPAK TO-252 DPAK-5 TO-252-5 +0 +10 +6 +Package_TO_SOT_SMD +TO-263-2 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 +0 +7 +3 +Package_TO_SOT_SMD +TO-263-2_TabPin1 +TO-263 / D2PAK / DDPAK SMD package, tab to pin 1, https://www.wolfspeed.com/media/downloads/137/C3D06060G.pdf +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 diode +0 +7 +2 +Package_TO_SOT_SMD +TO-263-3_TabPin2 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 +0 +8 +3 +Package_TO_SOT_SMD +TO-263-3_TabPin4 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 +0 +8 +4 +Package_TO_SOT_SMD +TO-263-4 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ +D2PAK DDPAK TO-263 D2PAK-5 TO-263-5 SOT-426 +0 +9 +5 +Package_TO_SOT_SMD +TO-263-5_TabPin3 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ +D2PAK DDPAK TO-263 D2PAK-5 TO-263-5 SOT-426 +0 +10 +5 +Package_TO_SOT_SMD +TO-263-5_TabPin6 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ +D2PAK DDPAK TO-263 D2PAK-5 TO-263-5 SOT-426 +0 +10 +6 +Package_TO_SOT_SMD +TO-263-6 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ +D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 +0 +11 +7 +Package_TO_SOT_SMD +TO-263-7_TabPin4 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ +D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 +0 +12 +7 +Package_TO_SOT_SMD +TO-263-7_TabPin8 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ +D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 +0 +12 +8 +Package_TO_SOT_SMD +TO-263-9_TabPin5 +TO-263 / D2PAK / DDPAK SMD package, http://www.ti.com/lit/ds/symlink/lm4755.pdf +D2PAK DDPAK TO-263 D2PAK-9 TO-263-9 +0 +14 +9 +Package_TO_SOT_SMD +TO-263-9_TabPin10 +TO-263 / D2PAK / DDPAK SMD package, http://www.ti.com/lit/ds/symlink/lm4755.pdf +D2PAK DDPAK TO-263 D2PAK-9 TO-263-9 +0 +14 +10 +Package_TO_SOT_SMD +TO-268-2 +TO-268/D3PAK SMD package, http://www.icbank.com/icbank_data/semi_package/to268aa_dim.pdf +D3PAK TO-268 D3PAK-3 TO-268-3 +0 +7 +3 +Package_TO_SOT_SMD +TO-269AA +SMD package TO-269AA (e.g. diode bridge), see http://www.vishay.com/docs/88854/padlayouts.pdf +TO-269AA MBS diode bridge +0 +4 +4 +Package_TO_SOT_SMD +TO-277A +Thermal enhanced ultra thin SMD package; 3 leads; body: 5.8 x 4.3 x 0.78 mm +TO-277A SOT-1289 +0 +12 +3 +Package_TO_SOT_SMD +TO-277B +TO-227B https://media.digikey.com/pdf/Data%20Sheets/Littelfuse%20PDFs/DST2050S.pdf +TO-277B +0 +9 +3 +Package_TO_SOT_SMD +TSOT-23 +3-pin TSOT23 package, http://www.analog.com.tw/pdf/All_In_One.pdf +TSOT-23 +0 +3 +3 +Package_TO_SOT_SMD +TSOT-23-5 +5-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_5_05-08-1635.pdf +TSOT-23-5 +0 +5 +5 +Package_TO_SOT_SMD +TSOT-23-5_HandSoldering +5-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_5_05-08-1635.pdf +TSOT-23-5 Hand-soldering +0 +5 +5 +Package_TO_SOT_SMD +TSOT-23-6 +6-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_6_05-08-1636.pdf +TSOT-23-6 MK06A TSOT-6 +0 +6 +6 +Package_TO_SOT_SMD +TSOT-23-6_HandSoldering +6-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_6_05-08-1636.pdf +TSOT-23-6 MK06A TSOT-6 Hand-soldering +0 +6 +6 +Package_TO_SOT_SMD +TSOT-23-8 +8-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_8_05-08-1637.pdf +TSOT-23-8 +0 +8 +8 +Package_TO_SOT_SMD +TSOT-23-8_HandSoldering +8-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_8_05-08-1637.pdf +TSOT-23-8 Hand-soldering +0 +8 +8 +Package_TO_SOT_SMD +TSOT-23_HandSoldering +5-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_5_05-08-1635.pdf +TSOT-23 Hand-soldering +0 +3 +3 +Package_TO_SOT_SMD +Vishay_PowerPAK_SC70-6L_Dual +Vishay PowerPAK SC70 dual transistor package http://www.vishay.com/docs/70487/70487.pdf +powerpak sc70 sc-70 dual +0 +8 +6 +Package_TO_SOT_SMD +Vishay_PowerPAK_SC70-6L_Single +Vishay PowerPAK SC70 single transistor package http://www.vishay.com/docs/70486/70486.pdf +powerpak sc70 sc-70 +0 +10 +3 +Package_TO_SOT_SMD +VSOF5 +VSOF5 +VSOF5 +0 +5 +5 +Package_TO_SOT_THT +Fairchild_TO-220F-6L +Fairchild TO-220F-6L, http://www.mouser.com/ds/2/149/FSL136MRT-113334.pdf +Fairchild TO-220F-6L +0 +6 +6 +Package_TO_SOT_THT +Heraeus_TO-92-2 +TO-92 2-pin variant by Heraeus, drill 0.75mm (http://www.produktinfo.conrad.com/datenblaetter/175000-199999/181293-da-01-de-TO92_Temperatursensor_PT1000_32209225.pdf) +to-92 +0 +2 +2 +Package_TO_SOT_THT +NEC_Molded_7x4x9mm +Molded Japan Transistor Package 7x4x9mm^3, http://rtellason.com/transdata/2sb734.pdf +Japan transistor +0 +3 +3 +Package_TO_SOT_THT +PowerIntegrations_TO-220-7C +Non Isolated Modified TO-220 7pin Package, see http://www.farnell.com/datasheets/5793.pdf +Power Integration Y Package +0 +6 +6 +Package_TO_SOT_THT +SIPAK-1EP_Horizontal_TabDown +SIPAK, Horizontal, RM 2.286mm +SIPAK Horizontal RM 2.286mm +0 +4 +4 +Package_TO_SOT_THT +SIPAK_Vertical +SIPAK, Vertical, RM 2.286mm +SIPAK Vertical RM 2.286mm +0 +3 +3 +Package_TO_SOT_THT +SOD-70_P2.54mm +Plastic near cylindrical package Sod-70 see: https://www.nxp.com/docs/en/data-sheet/KTY81_SER.pdf [StepUp generated footprint] +Sod-70 +0 +2 +2 +Package_TO_SOT_THT +SOD-70_P5.08mm +Plastic near cylindrical package Sod-70 see: https://www.nxp.com/docs/en/data-sheet/KTY81_SER.pdf [StepUp generated footprint] +Sod-70 +0 +2 +2 +Package_TO_SOT_THT +SOT-227 +SOT-227 / SOT-227B / ISOTOP, M4 mounting screws (https://www.vishay.com/docs/95423/sot227g2.pdf, https://www.vishay.com/docs/95793/vs-fc420sa10.pdf) +sot 227 isotop +0 +8 +4 +Package_TO_SOT_THT +TO-3 +Transistor TO-3 +TR TO-3 TO3 TO-204 +0 +4 +3 +Package_TO_SOT_THT +TO-3P-3_Horizontal_TabDown +TO-3P-3, Horizontal, RM 5.45mm, , see https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.TO-3P(N).html +TO-3P-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3P-3_Horizontal_TabUp +TO-3P-3, Horizontal, RM 5.45mm, , see https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.TO-3P(N).html +TO-3P-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3P-3_Vertical +TO-3P-3, Vertical, RM 5.45mm, , see https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.TO-3P(N).html +TO-3P-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3PB-3_Horizontal_TabDown +TO-3PB-3, Horizontal, RM 5.45mm, , see http://www.onsemi.com/pub/Collateral/340AC.PDF +TO-3PB-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3PB-3_Horizontal_TabUp +TO-3PB-3, Horizontal, RM 5.45mm, , see http://www.onsemi.com/pub/Collateral/340AC.PDF +TO-3PB-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3PB-3_Vertical +TO-3PB-3, Vertical, RM 5.45mm, , see http://www.onsemi.com/pub/Collateral/340AC.PDF +TO-3PB-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-5-2 +TO-5-2 +TO-5-2 +0 +2 +2 +Package_TO_SOT_THT +TO-5-2_Window +TO-5-2_Window, Window +TO-5-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-5-3 +TO-5-3 +TO-5-3 +0 +3 +3 +Package_TO_SOT_THT +TO-5-3_Window +TO-5-3_Window, Window +TO-5-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-5-4 +TO-5-4 +TO-5-4 +0 +4 +4 +Package_TO_SOT_THT +TO-5-4_Window +TO-5-4_Window, Window +TO-5-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-5-6 +TO-5-6 +TO-5-6 +0 +6 +6 +Package_TO_SOT_THT +TO-5-6_Window +TO-5-6_Window, Window +TO-5-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-5-8 +TO-5-8 +TO-5-8 +0 +8 +8 +Package_TO_SOT_THT +TO-5-8_PD5.08 +TO-5-8_PD5.08 +TO-5-8_PD5.08 +0 +8 +8 +Package_TO_SOT_THT +TO-5-8_PD5.08_Window +TO-5-8_PD5.08_Window, Window +TO-5-8_PD5.08_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-5-8_Window +TO-5-8_Window, Window +TO-5-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-5-10 +TO-5-10 +TO-5-10 +0 +10 +10 +Package_TO_SOT_THT +TO-5-10_Window +TO-5-10_Window, Window +TO-5-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-8-2 +TO-8-2 +TO-8-2 +0 +2 +2 +Package_TO_SOT_THT +TO-8-2_Window +TO-8-2_Window, Window +TO-8-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-8-3 +TO-8-3 +TO-8-3 +0 +3 +3 +Package_TO_SOT_THT +TO-8-3_Window +TO-8-3_Window, Window +TO-8-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-11-2 +TO-11-2 +TO-11-2 +0 +2 +2 +Package_TO_SOT_THT +TO-11-2_Window +TO-11-2_Window, Window +TO-11-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-11-3 +TO-11-3 +TO-11-3 +0 +3 +3 +Package_TO_SOT_THT +TO-11-3_Window +TO-11-3_Window, Window +TO-11-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-12-4 +TO-12-4 +TO-12-4 +0 +4 +4 +Package_TO_SOT_THT +TO-12-4_Window +TO-12-4_Window, Window +TO-12-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-17-4 +TO-17-4 +TO-17-4 +0 +4 +4 +Package_TO_SOT_THT +TO-17-4_Window +TO-17-4_Window, Window +TO-17-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-18-2 +TO-18-2 +TO-18-2 +0 +2 +2 +Package_TO_SOT_THT +TO-18-2_Lens +TO-18-2_Lens, Lens +TO-18-2_Lens Lens +0 +2 +2 +Package_TO_SOT_THT +TO-18-2_Window +TO-18-2_Window, Window +TO-18-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-18-3 +TO-18-3 +TO-18-3 +0 +3 +3 +Package_TO_SOT_THT +TO-18-3_Lens +TO-18-3_Lens, Lens +TO-18-3_Lens Lens +0 +3 +3 +Package_TO_SOT_THT +TO-18-3_Window +TO-18-3_Window, Window +TO-18-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-18-4 +TO-18-4 +TO-18-4 +0 +4 +4 +Package_TO_SOT_THT +TO-18-4_Lens +TO-18-4_Lens, Lens +TO-18-4_Lens Lens +0 +4 +4 +Package_TO_SOT_THT +TO-18-4_Window +TO-18-4_Window, Window +TO-18-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-33-4 +TO-33-4 +TO-33-4 +0 +4 +4 +Package_TO_SOT_THT +TO-33-4_Window +TO-33-4_Window, Window +TO-33-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-38-2 +TO-38-2 +TO-38-2 +0 +2 +2 +Package_TO_SOT_THT +TO-38-2_Window +TO-38-2_Window, Window +TO-38-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-38-3 +TO-38-3 +TO-38-3 +0 +3 +3 +Package_TO_SOT_THT +TO-38-3_Window +TO-38-3_Window, Window +TO-38-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-39-2 +TO-39-2 +TO-39-2 +0 +2 +2 +Package_TO_SOT_THT +TO-39-2_Window +TO-39-2_Window, Window +TO-39-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-39-3 +TO-39-3 +TO-39-3 +0 +3 +3 +Package_TO_SOT_THT +TO-39-3_Window +TO-39-3_Window, Window +TO-39-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-39-4 +TO-39-4 +TO-39-4 +0 +4 +4 +Package_TO_SOT_THT +TO-39-4_Window +TO-39-4_Window, Window +TO-39-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-39-6 +TO-39-6 +TO-39-6 +0 +6 +6 +Package_TO_SOT_THT +TO-39-6_Window +TO-39-6_Window, Window +TO-39-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-39-8 +TO-39-8 +TO-39-8 +0 +8 +8 +Package_TO_SOT_THT +TO-39-8_Window +TO-39-8_Window, Window +TO-39-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-39-10 +TO-39-10 +TO-39-10 +0 +10 +10 +Package_TO_SOT_THT +TO-39-10_Window +TO-39-10_Window, Window +TO-39-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-46-2 +TO-46-2 +TO-46-2 +0 +2 +2 +Package_TO_SOT_THT +TO-46-2_Pin2Center +TO-46-2, Pin2 at center of package, Thorlabs photodiodes +TO-46-2 Thorlabs +0 +2 +2 +Package_TO_SOT_THT +TO-46-2_Pin2Center_Window +TO-46-2, Pin2 at center of package, Thorlabs photodiodes +TO-46-2 Thorlabs +0 +2 +2 +Package_TO_SOT_THT +TO-46-2_Window +TO-46-2_Window, Window +TO-46-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-46-3 +TO-46-3 +TO-46-3 +0 +3 +3 +Package_TO_SOT_THT +TO-46-3_Pin2Center +TO-46-3, Pin2 at center of package, Thorlabs photodiodes, https://www.thorlabs.de/drawings/374b6862eb3b5a04-9360B5F6-5056-2306-D912111C06C3F830/FDGA05-SpecSheet.pdf +TO-46-3 Thorlabs +0 +3 +3 +Package_TO_SOT_THT +TO-46-3_Pin2Center_Window +TO-46-3, Pin2 at center of package, Thorlabs photodiodes, https://www.thorlabs.de/drawings/374b6862eb3b5a04-9360B5F6-5056-2306-D912111C06C3F830/FDGA05-SpecSheet.pdf +TO-46-3 Thorlabs +0 +3 +3 +Package_TO_SOT_THT +TO-46-3_Window +TO-46-3_Window, Window +TO-46-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-46-4 +TO-46-4 +TO-46-4 +0 +4 +4 +Package_TO_SOT_THT +TO-46-4_Window +TO-46-4_Window, Window +TO-46-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-52-2 +TO-52-2 +TO-52-2 +0 +2 +2 +Package_TO_SOT_THT +TO-52-2_Window +TO-52-2_Window, Window +TO-52-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-52-3 +TO-52-3 +TO-52-3 +0 +3 +3 +Package_TO_SOT_THT +TO-52-3_Window +TO-52-3_Window, Window +TO-52-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-72-4 +TO-72-4 +TO-72-4 +0 +4 +4 +Package_TO_SOT_THT +TO-72-4_Window +TO-72-4_Window, Window +TO-72-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-75-6 +TO-75-6 +TO-75-6 +0 +6 +6 +Package_TO_SOT_THT +TO-75-6_Window +TO-75-6_Window, Window +TO-75-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-78-6 +TO-78-6 +TO-78-6 +0 +6 +6 +Package_TO_SOT_THT +TO-78-6_Window +TO-78-6_Window, Window +TO-78-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-78-8 +TO-78-8 +TO-78-8 +0 +8 +8 +Package_TO_SOT_THT +TO-78-8_Window +TO-78-8_Window, Window +TO-78-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-78-10 +TO-78-10 +TO-78-10 +0 +10 +10 +Package_TO_SOT_THT +TO-78-10_Window +TO-78-10_Window, Window +TO-78-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-92 +TO-92 leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92-2 +TO-92 2-pin leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 diode SOD70 +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_Horizontal1 +2-pin TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 temperature sensor diode +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_Horizontal2 +2-pin TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 temperature sensor diode +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_W4.0mm_Horizontal_FlatSideDown +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_W4.0mm_Horizontal_FlatSideUp +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_Wide +TO-92 2-pin leads in-line, wide, drill 0.75mm +to-92 sc-43 sc-43a sot54 PA33 diode SOD70 +0 +2 +2 +Package_TO_SOT_THT +TO-92Flat +TO-92Flat package, often used for hall sensors, drill 0.75mm (see e.g. http://www.ti.com/lit/ds/symlink/drv5023.pdf) +to-92Flat hall sensor +0 +3 +3 +Package_TO_SOT_THT +TO-92L +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Molded Narrow transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_HandSolder +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm, hand-soldering variant with enlarged pads (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_Inline +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Inline Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_Inline_Wide +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Inline Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_Wide +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Molded Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92Mini-2 +TO-92Mini package, drill 0.6mm (https://media.digikey.com/pdf/Data%20Sheets/Infineon%20PDFs/KT,KTY.pdf) +to-92Mini transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92S +TO-92S package, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf) +to-92S transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92S-2 +TO-92S package, 2-pin, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf) +to-92S transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92S_Wide +TO-92S_Wide package, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf) +TO-92S_Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_HandSolder +TO-92 leads molded, narrow, drill 0.75mm, handsoldering variant with enlarged pads (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Horizontal1 +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Horizontal2 +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline +TO-92 leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_Horizontal1 +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_Horizontal2 +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_W4.0mm_Horizontal_FlatSideDown +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_W4.0mm_Horizontal_FlatSideUp +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_Wide +TO-92 leads in-line, wide, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_W4.0mm_StaggerEven_Horizontal_FlatSideDown +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_W4.0mm_StaggerEven_Horizontal_FlatSideUp +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Wide +TO-92 leads molded, wide, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-99-6 +TO-99-6 +TO-99-6 +0 +6 +6 +Package_TO_SOT_THT +TO-99-6_Window +TO-99-6_Window, Window +TO-99-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-99-8 +TO-99-8 +TO-99-8 +0 +8 +8 +Package_TO_SOT_THT +TO-99-8_Window +TO-99-8_Window, Window +TO-99-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-100-10 +TO-100-10 +TO-100-10 +0 +10 +10 +Package_TO_SOT_THT +TO-100-10_Window +TO-100-10_Window, Window +TO-100-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-126-2_Horizontal_TabDown +TO-126-2, Horizontal, RM 5.08mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-126-2_Horizontal_TabUp +TO-126-2, Horizontal, RM 5.08mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-126-2_Vertical +TO-126-2, Vertical, RM 5.08mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-2 Vertical RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-126-3_Horizontal_TabDown +TO-126-3, Horizontal, RM 2.54mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-126-3_Horizontal_TabUp +TO-126-3, Horizontal, RM 2.54mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-126-3_Vertical +TO-126-3, Vertical, RM 2.54mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-3 Vertical RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-218-2_Horizontal_TabDown +TO-218-2, Horizontal, RM 10.95mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-2 Horizontal RM 10.95mm SOT-93 +0 +2 +2 +Package_TO_SOT_THT +TO-218-2_Horizontal_TabUp +TO-218-2, Horizontal, RM 10.95mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-2 Horizontal RM 10.95mm SOT-93 +0 +2 +2 +Package_TO_SOT_THT +TO-218-2_Vertical +TO-218-2, Vertical, RM 10.95mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-2 Vertical RM 10.95mm SOT-93 +0 +2 +2 +Package_TO_SOT_THT +TO-218-3_Horizontal_TabDown +TO-218-3, Horizontal, RM 5.475mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-3 Horizontal RM 5.475mm SOT-93 +0 +3 +3 +Package_TO_SOT_THT +TO-218-3_Horizontal_TabUp +TO-218-3, Horizontal, RM 5.475mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-3 Horizontal RM 5.475mm SOT-93 +0 +3 +3 +Package_TO_SOT_THT +TO-218-3_Vertical +TO-218-3, Vertical, RM 5.475mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-3 Vertical RM 5.475mm SOT-93 +0 +3 +3 +Package_TO_SOT_THT +TO-220-2_Horizontal_TabDown +TO-220-2, Horizontal, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF +TO-220-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220-2_Horizontal_TabUp +TO-220-2, Horizontal, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF +TO-220-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220-2_Vertical +TO-220-2, Vertical, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF +TO-220-2 Vertical RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220-3_Horizontal_TabDown +TO-220-3, Horizontal, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf +TO-220-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220-3_Horizontal_TabUp +TO-220-3, Horizontal, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf +TO-220-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220-3_Vertical +TO-220-3, Vertical, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf +TO-220-3 Vertical RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220-4_Horizontal_TabDown +TO-220-4, Horizontal, RM 2.54mm +TO-220-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_Horizontal_TabUp +TO-220-4, Horizontal, RM 2.54mm +TO-220-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerEven_Lead3.8mm_Vertical +TO-220-4, Vertical, RM 2.54mm, staggered type-2 +TO-220-4 Vertical RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerEven_Lead5.84mm_TabDown +TO-220-4, Horizontal, RM 2.54mm, staggered type-2 +TO-220-4 Horizontal RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-4, Vertical, RM 2.54mm, staggered type-1 +TO-220-4 Vertical RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerOdd_Lead5.84mm_TabDown +TO-220-4, Horizontal, RM 2.54mm, staggered type-1 +TO-220-4 Horizontal RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_Vertical +TO-220-4, Vertical, RM 2.54mm +TO-220-4 Vertical RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220-5_Horizontal_TabDown +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421_straight_lead.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_Horizontal_TabUp +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421_straight_lead.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.7mm_StaggerEven_Lead3.8mm_Vertical +TO-220-5, Vertical, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-2, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Vertical RM 1.7mm Pentawatt Multiwatt-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.7mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-5, Vertical, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-1, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Vertical RM 1.7mm Pentawatt Multiwatt-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.8mm_StaggerEven_Lead7.13mm_TabDown +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-2, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.8mm_StaggerOdd_Lead7.13mm_TabDown +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-1, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_Vertical +TO-220-5, Vertical, RM 1.7mm, Pentawatt, Multiwatt-5, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421_straight_lead.pdf +TO-220-5 Vertical RM 1.7mm Pentawatt Multiwatt-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220-7_P2.54x3.7mm_StaggerEven_Lead3.8mm_Vertical +TO-220-7, Vertical, RM 1.27mm, Multiwatt-7, staggered type-2 +TO-220-7 Vertical RM 1.27mm Multiwatt-7 staggered type-2 +0 +7 +7 +Package_TO_SOT_THT +TO-220-7_P2.54x3.7mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-7, Vertical, RM 1.27mm, Multiwatt-7, staggered type-1 +TO-220-7 Vertical RM 1.27mm Multiwatt-7 staggered type-1 +0 +7 +7 +Package_TO_SOT_THT +TO-220-7_P2.54x3.8mm_StaggerEven_Lead5.85mm_TabDown +TO-220-7, Horizontal, RM 1.27mm, Multiwatt-7, staggered type-2 +TO-220-7 Horizontal RM 1.27mm Multiwatt-7 staggered type-2 +0 +7 +7 +Package_TO_SOT_THT +TO-220-7_P2.54x3.8mm_StaggerOdd_Lead5.85mm_TabDown +TO-220-7, Horizontal, RM 1.27mm, Multiwatt-7, staggered type-1 +TO-220-7 Horizontal RM 1.27mm Multiwatt-7 staggered type-1 +0 +7 +7 +Package_TO_SOT_THT +TO-220-8_Vertical +TO-220-8 (Multiwatt8), Vertical, 2.54mm Pitch (http://www.st.com/resource/en/datasheet/tda7264.pdf) +TO-220-9 Vertical 2.54mm Pitch Multiwatt 8 +0 +8 +8 +Package_TO_SOT_THT +TO-220-9_P1.94x3.7mm_StaggerEven_Lead3.8mm_Vertical +TO-220-9, Vertical, RM 0.97mm, Multiwatt-9, staggered type-2 +TO-220-9 Vertical RM 0.97mm Multiwatt-9 staggered type-2 +0 +9 +9 +Package_TO_SOT_THT +TO-220-9_P1.94x3.7mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-9, Vertical, RM 0.97mm, Multiwatt-9, staggered type-1 +TO-220-9 Vertical RM 0.97mm Multiwatt-9 staggered type-1 +0 +9 +9 +Package_TO_SOT_THT +TO-220-9_P1.94x3.8mm_StaggerEven_Lead5.85mm_TabDown +TO-220-9, Horizontal, RM 0.97mm, Multiwatt-9, staggered type-2 +TO-220-9 Horizontal RM 0.97mm Multiwatt-9 staggered type-2 +0 +9 +9 +Package_TO_SOT_THT +TO-220-9_P1.94x3.8mm_StaggerOdd_Lead5.85mm_TabDown +TO-220-9, Horizontal, RM 0.97mm, Multiwatt-9, staggered type-1 +TO-220-9 Horizontal RM 0.97mm Multiwatt-9 staggered type-1 +0 +9 +9 +Package_TO_SOT_THT +TO-220-11_P3.4x2.54mm_StaggerEven_Lead5.84mm_TabDown +TO-220-11, Horizontal, RM 1.7mm, staggered type-2, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Horizontal RM 1.7mm staggered type-2 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x2.54mm_StaggerOdd_Lead5.84mm_TabDown +TO-220-11, Horizontal, RM 1.7mm, staggered type-1, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Horizontal RM 1.7mm staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x5.08mm_StaggerEven_Lead4.58mm_Vertical +TO-220-11, Vertical, RM 1.7mm, staggered type-2, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Vertical RM 1.7mm staggered type-2 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x5.08mm_StaggerOdd_Lead4.85mm_Vertical +TO-220-11, Vertical, RM 1.7mm, staggered type-1, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Vertical RM 1.7mm staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x5.08mm_StaggerOdd_Lead8.45mm_TabDown +TO-220-11, Horizontal, RM 1.7mm, staggered type-1, see http://www.ti.com/lit/ds/symlink/lmd18200.pdf +TO-220-11 Horizontal RM 1.7mm staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerEven_Lead4.58mm_Vertical +TO-220-15, Vertical, RM 1.27mm, staggered type-2, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Vertical RM 1.27mm staggered type-2 +0 +15 +15 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerEven_Lead5.84mm_TabDown +TO-220-15, Horizontal, RM 1.27mm, staggered type-2, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Horizontal RM 1.27mm staggered type-2 +0 +15 +15 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerOdd_Lead4.58mm_Vertical +TO-220-15, Vertical, RM 1.27mm, staggered type-1, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Vertical RM 1.27mm staggered type-1 +0 +15 +15 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerOdd_Lead5.84mm_TabDown +TO-220-15, Horizontal, RM 1.27mm, staggered type-1, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Horizontal RM 1.27mm staggered type-1 +0 +15 +15 +Package_TO_SOT_THT +TO-220F-2_Horizontal_TabDown +TO-220F-2, Horizontal, RM 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf +TO-220F-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220F-2_Horizontal_TabUp +TO-220F-2, Horizontal, RM 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf +TO-220F-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220F-2_Vertical +TO-220F-2, Vertical, RM 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf +TO-220F-2 Vertical RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220F-3_Horizontal_TabDown +TO-220F-3, Horizontal, RM 2.54mm, see http://www.st.com/resource/en/datasheet/stp20nm60.pdf +TO-220F-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220F-3_Horizontal_TabUp +TO-220F-3, Horizontal, RM 2.54mm, see http://www.st.com/resource/en/datasheet/stp20nm60.pdf +TO-220F-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220F-3_Vertical +TO-220F-3, Vertical, RM 2.54mm, see http://www.st.com/resource/en/datasheet/stp20nm60.pdf +TO-220F-3 Vertical RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220F-4_Horizontal_TabDown +TO-220F-4, Horizontal, RM 2.54mm, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_Horizontal_TabUp +TO-220F-4, Horizontal, RM 2.54mm, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x2.05mm_StaggerEven_Lead1.85mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-2, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x2.05mm_StaggerOdd_Lead1.85mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-1, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-2, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-1, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_Vertical +TO-220F-4, Vertical, RM 2.54mm, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220F-5_Horizontal_TabDown +TO-220F-5, Horizontal, RM 1.7mm, PentawattF-, MultiwattF-5 +TO-220F-5 Horizontal RM 1.7mm PentawattF- MultiwattF-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_Horizontal_TabUp +TO-220F-5, Horizontal, RM 1.7mm, PentawattF-, MultiwattF-5 +TO-220F-5 Horizontal RM 1.7mm PentawattF- MultiwattF-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x2.06mm_StaggerEven_Lead1.86mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-2 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x2.06mm_StaggerOdd_Lead1.86mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-1 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-2 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-1 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-7_P2.54x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-7, Vertical, RM 1.27mm, staggered type-2 +TO-220F-7 Vertical RM 1.27mm staggered type-2 +0 +7 +7 +Package_TO_SOT_THT +TO-220F-7_P2.54x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-7, Vertical, RM 1.27mm, staggered type-1 +TO-220F-7 Vertical RM 1.27mm staggered type-1 +0 +7 +7 +Package_TO_SOT_THT +TO-220F-9_P1.8x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-9, Vertical, RM 0.9mm, staggered type-2 +TO-220F-9 Vertical RM 0.9mm staggered type-2 +0 +9 +9 +Package_TO_SOT_THT +TO-220F-9_P1.8x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-9, Vertical, RM 0.9mm, staggered type-1 +TO-220F-9 Vertical RM 0.9mm staggered type-1 +0 +9 +9 +Package_TO_SOT_THT +TO-220F-11_P3.4x5.08mm_StaggerEven_Lead5.08mm_Vertical +TO-220F-11, Vertical, RM 1.7mm, MultiwattF-11, staggered type-2, see http://www.ti.com/lit/ds/symlink/lm3886.pdf +TO-220F-11 Vertical RM 1.7mm MultiwattF-11 staggered type-2 +0 +11 +11 +Package_TO_SOT_THT +TO-220F-11_P3.4x5.08mm_StaggerOdd_Lead5.08mm_Vertical +TO-220F-11, Vertical, RM 1.7mm, MultiwattF-11, staggered type-1, see http://www.ti.com/lit/ds/symlink/lm3886.pdf +TO-220F-11 Vertical RM 1.7mm MultiwattF-11 staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220F-15_P2.54x5.08mm_StaggerEven_Lead5.08mm_Vertical +TO-220F-15, Vertical, RM 1.27mm, MultiwattF-15, staggered type-2 +TO-220F-15 Vertical RM 1.27mm MultiwattF-15 staggered type-2 +0 +15 +15 +Package_TO_SOT_THT +TO-220F-15_P2.54x5.08mm_StaggerOdd_Lead5.08mm_Vertical +TO-220F-15, Vertical, RM 1.27mm, MultiwattF-15, staggered type-1 +TO-220F-15 Vertical RM 1.27mm MultiwattF-15 staggered type-1 +0 +15 +15 +Package_TO_SOT_THT +TO-247-2_Horizontal_TabDown +TO-247-2, Horizontal, RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-247-2_Horizontal_TabUp +TO-247-2, Horizontal, RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-247-2_Vertical +TO-247-2, Vertical, RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-2 Vertical RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-247-3_Horizontal_TabDown +TO-247-3, Horizontal, RM 5.45mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-247-3_Horizontal_TabUp +TO-247-3, Horizontal, RM 5.45mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-247-3_Vertical +TO-247-3, Vertical, RM 5.45mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-247-4_Horizontal_TabDown +TO-247-4, Horizontal, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-247-4_Horizontal_TabUp +TO-247-4, Horizontal, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-247-4_Vertical +TO-247-4, Vertical, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-4 Vertical RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-247-5_Horizontal_TabDown +TO-247-5, Horizontal, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf +TO-247-5 Horizontal RM 2.54mm +0 +5 +5 +Package_TO_SOT_THT +TO-247-5_Horizontal_TabUp +TO-247-5, Horizontal, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf +TO-247-5 Horizontal RM 2.54mm +0 +5 +5 +Package_TO_SOT_THT +TO-247-5_Vertical +TO-247-5, Vertical, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf +TO-247-5 Vertical RM 2.54mm +0 +5 +5 +Package_TO_SOT_THT +TO-251-2-1EP_Horizontal_TabDown +TO-251-2, Horizontal, RM 4.58mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-2 Horizontal RM 4.58mm IPAK +0 +3 +3 +Package_TO_SOT_THT +TO-251-2_Vertical +TO-251-2, Vertical, RM 4.58mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-2 Vertical RM 4.58mm IPAK +0 +2 +2 +Package_TO_SOT_THT +TO-251-3-1EP_Horizontal_TabDown +TO-251-3, Horizontal, RM 2.29mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-3 Horizontal RM 2.29mm IPAK +0 +4 +4 +Package_TO_SOT_THT +TO-251-3_Vertical +TO-251-3, Vertical, RM 2.29mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-3 Vertical RM 2.29mm IPAK +0 +3 +3 +Package_TO_SOT_THT +TO-262-3-1EP_Horizontal_TabDown +TO-262-3, Horizontal, RM 2.54mm, IIPAK, I2PAK, see http://www.onsemi.com/pub/Collateral/EN8586-D.PDF +TO-262-3 Horizontal RM 2.54mm IIPAK I2PAK +0 +4 +4 +Package_TO_SOT_THT +TO-262-3_Vertical +TO-262-3, Vertical, RM 2.54mm, IIPAK, I2PAK, see http://www.onsemi.com/pub/Collateral/EN8586-D.PDF +TO-262-3 Vertical RM 2.54mm IIPAK I2PAK +0 +3 +3 +Package_TO_SOT_THT +TO-262-5-1EP_Horizontal_TabDown +TO-262-5, Horizontal, RM 1.7mm, IIPAK, I2PAK, see http://pdf.datasheetcatalog.com/datasheet/irf/iris4011.pdf +TO-262-5 Horizontal RM 1.7mm IIPAK I2PAK +0 +6 +6 +Package_TO_SOT_THT +TO-262-5_Vertical +TO-262-5, Vertical, RM 1.7mm, IIPAK, I2PAK, see http://pdf.datasheetcatalog.com/datasheet/irf/iris4011.pdf +TO-262-5 Vertical RM 1.7mm IIPAK I2PAK +0 +5 +5 +Package_TO_SOT_THT +TO-264-2_Horizontal_TabDown +TO-264-2, Horizontal, RM 10.9mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-264-2_Horizontal_TabUp +TO-264-2, Horizontal, RM 10.9mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-264-2_Vertical +TO-264-2, Vertical, RM 10.9mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-2 Vertical RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-264-3_Horizontal_TabDown +TO-264-3, Horizontal, RM 5.45mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-264-3_Horizontal_TabUp +TO-264-3, Horizontal, RM 5.45mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-264-3_Vertical +TO-264-3, Vertical, RM 5.45mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-264-5_Horizontal_TabDown +TO-264-5, Horizontal, RM 3.81mm, see https://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF +TO-264-5 Horizontal RM 3.81mm +0 +5 +5 +Package_TO_SOT_THT +TO-264-5_Horizontal_TabUp +TO-264-5, Horizontal, RM 3.81mm, see https://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF +TO-264-5 Horizontal RM 3.81mm +0 +5 +5 +Package_TO_SOT_THT +TO-264-5_Vertical +TO-264-5, Vertical, RM 3.81mm, see https://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF +TO-264-5 Vertical RM 3.81mm +0 +5 +5 +Potentiometer_SMD +Potentiometer_ACP_CA6-VSMD_Vertical +Potentiometer, vertical, ACP CA6-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/06/01-ACP-CA6.pdf +Potentiometer vertical ACP CA6-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA6-VSMD_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA6-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/06/01-ACP-CA6.pdf +Potentiometer vertical hole ACP CA6-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA9-VSMD_Vertical +Potentiometer, vertical, ACP CA9-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical ACP CA9-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA9-VSMD_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA9-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical hole ACP CA9-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA14-VSMD_Vertical +Potentiometer, vertical, ACP CA14-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical ACP CA14-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA14-VSMD_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA14-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical hole ACP CA14-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214G_Horizontal +Potentiometer, horizontal, Bourns 3214G, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer horizontal Bourns 3214G +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214J_Horizontal +Potentiometer, horizontal, Bourns 3214J, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer horizontal Bourns 3214J +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214W_Vertical +Potentiometer, vertical, Bourns 3214W, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer vertical Bourns 3214W +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214X_Vertical +Potentiometer, vertical, Bourns 3214X, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer vertical Bourns 3214X +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224G_Horizontal +Potentiometer, horizontal, Bourns 3224G, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer horizontal Bourns 3224G +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224J_Horizontal +Potentiometer, horizontal, Bourns 3224J, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer horizontal Bourns 3224J +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224W_Vertical +Potentiometer, vertical, Bourns 3224W, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer vertical Bourns 3224W +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224X_Vertical +Potentiometer, vertical, Bourns 3224X, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer vertical Bourns 3224X +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3269P_Horizontal +Potentiometer, horizontal, Bourns 3269P, https://www.bourns.com/docs/Product-Datasheets/3269.pdf +Potentiometer horizontal Bourns 3269P +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3269W_Vertical +Potentiometer, vertical, Bourns 3269W, https://www.bourns.com/docs/Product-Datasheets/3269.pdf +Potentiometer vertical Bourns 3269W +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3269X_Horizontal +Potentiometer, horizontal, Bourns 3269X, https://www.bourns.com/docs/Product-Datasheets/3269.pdf +Potentiometer horizontal Bourns 3269X +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314G_Vertical +Potentiometer, vertical, Bourns 3314G, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical Bourns 3314G +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314J_Vertical +Potentiometer, vertical, Bourns 3314J, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical Bourns 3314J +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314R-1_Vertical_Hole +Potentiometer, vertical, shaft hole, Bourns 3314R-1, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical hole Bourns 3314R-1 +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314R-GM5_Vertical +Potentiometer, vertical, Bourns 3314R-GM5, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical Bourns 3314R-GM5 +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314S_Horizontal +Potentiometer, horizontal, Bourns 3314S, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer horizontal Bourns 3314S +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_PRS11S_Vertical +Potentiometer, vertical, Bourns PRS11S, http://www.bourns.com/docs/Product-Datasheets/PRS11S.pdf +Potentiometer vertical Bourns PRS11S +0 +5 +5 +Potentiometer_SMD +Potentiometer_Bourns_TC33X_Vertical +Potentiometer, Bourns, TC33X, Vertical, https://www.bourns.com/pdfs/TC33.pdf +Potentiometer Bourns TC33X Vertical +0 +3 +3 +Potentiometer_SMD +Potentiometer_Vishay_TS53YJ_Vertical +Potentiometer, vertical, Vishay TS53YJ, https://www.vishay.com/docs/51008/ts53.pdf +Potentiometer vertical Vishay TS53YJ +0 +3 +3 +Potentiometer_SMD +Potentiometer_Vishay_TS53YL_Vertical +Potentiometer, vertical, Vishay TS53YL, https://www.vishay.com/docs/51008/ts53.pdf +Potentiometer vertical Vishay TS53YL +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA6-H2,5_Horizontal +Potentiometer, horizontal, ACP CA6-H2,5, http://www.acptechnologies.com/wp-content/uploads/2017/06/01-ACP-CA6.pdf +Potentiometer horizontal ACP CA6-H2,5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-H2,5_Horizontal +Potentiometer, horizontal, ACP CA9-H2,5, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer horizontal ACP CA9-H2,5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-H3,8_Horizontal +Potentiometer, horizontal, ACP CA9-H3,8, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer horizontal ACP CA9-H3,8 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-H5_Horizontal +Potentiometer, horizontal, ACP CA9-H5, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer horizontal ACP CA9-H5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-V10_Vertical +Potentiometer, vertical, ACP CA9-V10, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical ACP CA9-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-V10_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA9-V10, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical hole ACP CA9-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14-H2,5_Horizontal +Potentiometer, horizontal, ACP CA14-H2,5, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer horizontal ACP CA14-H2,5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14-H4_Horizontal +Potentiometer, horizontal, ACP CA14-H4, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer horizontal ACP CA14-H4 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14-H5_Horizontal +Potentiometer, horizontal, ACP CA14-H5, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer horizontal ACP CA14-H5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14V-15_Vertical +Potentiometer, vertical, ACP CA14V-15, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical ACP CA14V-15 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14V-15_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA14V-15, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical hole ACP CA14V-15 +0 +3 +3 +Potentiometer_THT +Potentiometer_Alpha_RD901F-40-00D_Single_Vertical +Potentiometer, vertical, 9mm, single, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles +Potentiometer, vertical, 9mm, single, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alpha_RD902F-40-00D_Dual_Vertical +Potentiometer, vertical, 9mm, dual, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm dual +0 +8 +6 +Potentiometer_THT +Potentiometer_Alpha_RD902F-40-00D_Dual_Vertical_CircularHoles +Potentiometer, vertical, 9mm, dual, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm dual +0 +8 +6 +Potentiometer_THT +Potentiometer_Alps_RK09K_Single_Horizontal +Potentiometer, horizontal, Alps RK09K Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09K/RK09K_list.html +Potentiometer horizontal Alps RK09K Single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alps_RK09K_Single_Vertical +Potentiometer, vertical, Alps RK09K Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09K/RK09K_list.html +Potentiometer vertical Alps RK09K Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK09L_Double_Horizontal +Potentiometer, horizontal, Alps RK09L Double, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer horizontal Alps RK09L Double +0 +8 +6 +Potentiometer_THT +Potentiometer_Alps_RK09L_Double_Vertical +Potentiometer, vertical, Alps RK09L Double, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer vertical Alps RK09L Double +0 +6 +6 +Potentiometer_THT +Potentiometer_Alps_RK09L_Single_Horizontal +Potentiometer, horizontal, Alps RK09L Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer horizontal Alps RK09L Single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alps_RK09L_Single_Vertical +Potentiometer, vertical, Alps RK09L Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer vertical Alps RK09L Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK09Y11_Single_Horizontal +Potentiometer, horizontal, Alps RK09Y11 Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09Y11/RK09Y11_list.html +Potentiometer horizontal Alps RK09Y11 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK097_Dual_Horizontal +Potentiometer, horizontal, Alps RK097 Dual, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK097/RK097_list.html +Potentiometer horizontal Alps RK097 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Alps_RK097_Single_Horizontal +Potentiometer, horizontal, Alps RK097 Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK097/RK097_list.html +Potentiometer horizontal Alps RK097 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK163_Dual_Horizontal +Potentiometer, horizontal, Alps RK163 Dual, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK16/RK16_list.html +Potentiometer horizontal Alps RK163 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Alps_RK163_Single_Horizontal +Potentiometer, horizontal, Alps RK163 Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK16/RK16_list.html +Potentiometer horizontal Alps RK163 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3005_Horizontal +Potentiometer, horizontal, Bourns 3005, http://www.bourns.com/docs/Product-Datasheets/3005.pdf +Potentiometer horizontal Bourns 3005 +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3006P_Horizontal +Potentiometer, horizontal, Bourns 3006P, https://www.bourns.com/docs/Product-Datasheets/3006.pdf +Potentiometer horizontal Bourns 3006P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3006W_Horizontal +Potentiometer, horizontal, Bourns 3006W, https://www.bourns.com/docs/Product-Datasheets/3006.pdf +Potentiometer horizontal Bourns 3006W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3006Y_Horizontal +Potentiometer, horizontal, Bourns 3006Y, https://www.bourns.com/docs/Product-Datasheets/3006.pdf +Potentiometer horizontal Bourns 3006Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3009P_Horizontal +Potentiometer, horizontal, Bourns 3009P, http://www.bourns.com/docs/Product-Datasheets/3009.pdf +Potentiometer horizontal Bourns 3009P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3009Y_Horizontal +Potentiometer, horizontal, Bourns 3009Y, http://www.bourns.com/docs/Product-Datasheets/3009.pdf +Potentiometer horizontal Bourns 3009Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266P_Horizontal +Potentiometer, horizontal, Bourns 3266P, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer horizontal Bourns 3266P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266W_Vertical +Potentiometer, vertical, Bourns 3266W, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer vertical Bourns 3266W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266X_Horizontal +Potentiometer, horizontal, Bourns 3266X, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer horizontal Bourns 3266X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266Y_Vertical +Potentiometer, vertical, Bourns 3266Y, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer vertical Bourns 3266Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266Z_Horizontal +Potentiometer, horizontal, Bourns 3266Z, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer horizontal Bourns 3266Z +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296P_Horizontal +Potentiometer, horizontal, Bourns 3296P, https://www.bourns.com/pdfs/3296.pdf +Potentiometer horizontal Bourns 3296P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296W_Vertical +Potentiometer, vertical, Bourns 3296W, https://www.bourns.com/pdfs/3296.pdf +Potentiometer vertical Bourns 3296W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296X_Horizontal +Potentiometer, horizontal, Bourns 3296X, https://www.bourns.com/pdfs/3296.pdf +Potentiometer horizontal Bourns 3296X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296Y_Vertical +Potentiometer, vertical, Bourns 3296Y, https://www.bourns.com/pdfs/3296.pdf +Potentiometer vertical Bourns 3296Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296Z_Horizontal +Potentiometer, horizontal, Bourns 3296Z, https://www.bourns.com/pdfs/3296.pdf +Potentiometer horizontal Bourns 3296Z +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299P_Horizontal +Potentiometer, horizontal, Bourns 3299P, https://www.bourns.com/pdfs/3299.pdf +Potentiometer horizontal Bourns 3299P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299W_Vertical +Potentiometer, vertical, Bourns 3299W, https://www.bourns.com/pdfs/3299.pdf +Potentiometer vertical Bourns 3299W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299X_Horizontal +Potentiometer, horizontal, Bourns 3299X, https://www.bourns.com/pdfs/3299.pdf +Potentiometer horizontal Bourns 3299X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299Y_Vertical +Potentiometer, vertical, Bourns 3299Y, https://www.bourns.com/pdfs/3299.pdf +Potentiometer vertical Bourns 3299Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299Z_Horizontal +Potentiometer, horizontal, Bourns 3299Z, https://www.bourns.com/pdfs/3299.pdf +Potentiometer horizontal Bourns 3299Z +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339H_Vertical +Potentiometer, vertical, Bourns 3339H, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer vertical Bourns 3339H +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339P_Vertical +Potentiometer, vertical, Bourns 3339P, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer vertical Bourns 3339P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339P_Vertical_HandSoldering +Potentiometer, vertical, Bourns 3339P, hand-soldering, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer vertical Bourns 3339P hand-soldering +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339S_Horizontal +Potentiometer, horizontal, Bourns 3339S, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer horizontal Bourns 3339S +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339W_Horizontal +Potentiometer, horizontal, Bourns 3339W, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer horizontal Bourns 3339W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386C_Horizontal +Potentiometer, horizontal, Bourns 3386C, https://www.bourns.com/pdfs/3386.pdf +Potentiometer horizontal Bourns 3386C +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386F_Vertical +Potentiometer, vertical, Bourns 3386F, https://www.bourns.com/pdfs/3386.pdf +Potentiometer vertical Bourns 3386F +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386P_Vertical +Potentiometer, vertical, Bourns 3386P, https://www.bourns.com/pdfs/3386.pdf +Potentiometer vertical Bourns 3386P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386X_Horizontal +Potentiometer, horizontal, Bourns 3386X, https://www.bourns.com/pdfs/3386.pdf +Potentiometer horizontal Bourns 3386X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_PTA1543_Single_Slide +Bourns single-gang slide potentiometer, 15.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 15.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA2043_Single_Slide +Bourns single-gang slide potentiometer, 20.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 20.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA3043_Single_Slide +Bourns single-gang slide potentiometer, 30.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 30.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA4543_Single_Slide +Bourns single-gang slide potentiometer, 45.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 45.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA6043_Single_Slide +Bourns single-gang slide potentiometer, 60.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 60.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTV09A-1_Single_Vertical +Potentiometer, vertical, Bourns PTV09A-1 Single, http://www.bourns.com/docs/Product-Datasheets/ptv09.pdf +Potentiometer vertical Bourns PTV09A-1 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_PTV09A-2_Single_Horizontal +Potentiometer, horizontal, Bourns PTV09A-2 Single, http://www.bourns.com/docs/Product-Datasheets/ptv09.pdf +Potentiometer horizontal Bourns PTV09A-2 Single +0 +5 +3 +Potentiometer_THT +Potentiometer_Omeg_PC16BU_Horizontal +Potentiometer, horizontal, Omeg PC16BU, http://www.omeg.co.uk/pc6bubrc.htm +Potentiometer horizontal Omeg PC16BU +0 +3 +3 +Potentiometer_THT +Potentiometer_Omeg_PC16BU_Vertical +Potentiometer, vertical, Omeg PC16BU, http://www.omeg.co.uk/pc6bubrc.htm +Potentiometer vertical Omeg PC16BU +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PC-16_Dual_Horizontal +Potentiometer, horizontal, Piher PC-16 Dual, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer horizontal Piher PC-16 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Piher_PC-16_Single_Horizontal +Potentiometer, horizontal, Piher PC-16 Single, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer horizontal Piher PC-16 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PC-16_Single_Vertical +Potentiometer, vertical, Piher PC-16 Single, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer vertical Piher PC-16 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PC-16_Triple_Horizontal +Potentiometer, horizontal, Piher PC-16 Triple, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer horizontal Piher PC-16 Triple +0 +9 +9 +Potentiometer_THT +Potentiometer_Piher_PT-6-H_Horizontal +Potentiometer, horizontal, Piher PT-6-H, http://www.piher-nacesa.com/pdf/11-PT6v03.pdf +Potentiometer horizontal Piher PT-6-H +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-6-V_Vertical +Potentiometer, vertical, Piher PT-6-V, http://www.piher-nacesa.com/pdf/11-PT6v03.pdf +Potentiometer vertical Piher PT-6-V +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-6-V_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-6-V, http://www.piher-nacesa.com/pdf/11-PT6v03.pdf +Potentiometer vertical hole Piher PT-6-V +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-H01_Horizontal +Potentiometer, horizontal, Piher PT-10-H01, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer horizontal Piher PT-10-H01 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-H05_Horizontal +Potentiometer, horizontal, Piher PT-10-H05, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer horizontal Piher PT-10-H05 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-V05_Vertical +Potentiometer, vertical, Piher PT-10-V05, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer vertical Piher PT-10-V05 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-V10_Vertical +Potentiometer, vertical, Piher PT-10-V10, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer vertical Piher PT-10-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-V10_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-10-V10, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer vertical hole Piher PT-10-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H01_Horizontal +Potentiometer, horizontal, Piher PT-15-H01, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H01 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H05_Horizontal +Potentiometer, horizontal, Piher PT-15-H05, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H05 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H06_Horizontal +Potentiometer, horizontal, Piher PT-15-H06, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H06 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H25_Horizontal +Potentiometer, horizontal, Piher PT-15-H25, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H25 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V02_Vertical +Potentiometer, vertical, Piher PT-15-V02, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical Piher PT-15-V02 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V02_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-15-V02, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical hole Piher PT-15-V02 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V15_Vertical +Potentiometer, vertical, Piher PT-15-V15, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical Piher PT-15-V15 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V15_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-15-V15, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical hole Piher PT-15-V15 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_T-16H_Double_Horizontal +Potentiometer, horizontal, Piher T-16H Double, http://www.piher-nacesa.com/pdf/22-T16v03.pdf +Potentiometer horizontal Piher T-16H Double +0 +6 +6 +Potentiometer_THT +Potentiometer_Piher_T-16H_Single_Horizontal +Potentiometer, horizontal, Piher T-16H Single, http://www.piher-nacesa.com/pdf/22-T16v03.pdf +Potentiometer horizontal Piher T-16H Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_T-16L_Single_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher T-16L Single, http://www.piher-nacesa.com/pdf/22-T16v03.pdf +Potentiometer vertical hole Piher T-16L Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Runtron_RM-063_Horizontal +Potentiometer, horizontal, Trimmer, RM-063 http://www.runtron.com/down/PDF%20Datasheet/Carbon%20Film%20Potentiometer/RM065%20RM063.pdf +Potentiometer Trimmer RM-063 +0 +3 +3 +Potentiometer_THT +Potentiometer_Runtron_RM-065_Vertical +Potentiometer, vertical, Trimmer, RM-065 http://www.runtron.com/down/PDF%20Datasheet/Carbon%20Film%20Potentiometer/RM065%20RM063.pdf +Potentiometer Trimmer RM-065 +0 +3 +3 +Potentiometer_THT +Potentiometer_TT_P0915N +http://www.ttelectronics.com/sites/default/files/download-files/Datasheet_PanelPot_P09xSeries.pdf +potentiometer vertical TT P0915N single +0 +5 +3 +Potentiometer_THT +Potentiometer_Vishay_43_Horizontal +Potentiometer, horizontal, Vishay 43, http://www.vishay.com/docs/57026/43.pdf +Potentiometer horizontal Vishay 43 +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_148-149_Dual_Horizontal +Potentiometer, horizontal, Vishay 148-149 Dual, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148-149 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Vishay_148-149_Single_Horizontal +Potentiometer, horizontal, Vishay 148-149 Single, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148-149 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_148-149_Single_Vertical +Potentiometer, vertical, Vishay 148-149 Single, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer vertical Vishay 148-149 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_148E-149E_Dual_Horizontal +Potentiometer, horizontal, Vishay 148E-149E Dual, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148E-149E Dual +0 +10 +6 +Potentiometer_THT +Potentiometer_Vishay_148E-149E_Single_Horizontal +Potentiometer, horizontal, Vishay 148E-149E Single, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148E-149E Single +0 +7 +3 +Potentiometer_THT +Potentiometer_Vishay_248BH-249BH_Single_Horizontal +Potentiometer, horizontal, Vishay 248BH-249BH Single, http://www.vishay.com/docs/57054/248249.pdf +Potentiometer horizontal Vishay 248BH-249BH Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_248GJ-249GJ_Single_Horizontal +Potentiometer, horizontal, Vishay 248GJ-249GJ Single, http://www.vishay.com/docs/57054/248249.pdf +Potentiometer horizontal Vishay 248GJ-249GJ Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_248GJ-249GJ_Single_Vertical +Potentiometer, vertical, Vishay 248GJ-249GJ Single, http://www.vishay.com/docs/57054/248249.pdf +Potentiometer vertical Vishay 248GJ-249GJ Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T7-YA_Single_Vertical +Potentiometer, vertical, Vishay T7-YA Single, http://www.vishay.com/docs/51015/t7.pdf +Potentiometer vertical Vishay T7-YA Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T73XW_Horizontal +Potentiometer, horizontal, Vishay T73XW, http://www.vishay.com/docs/51016/t73.pdf +Potentiometer horizontal Vishay T73XW +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T73XX_Horizontal +Potentiometer, horizontal, Vishay T73XX, http://www.vishay.com/docs/51016/t73.pdf +Potentiometer horizontal Vishay T73XX +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T73YP_Vertical +Potentiometer, vertical, Vishay T73YP, http://www.vishay.com/docs/51016/t73.pdf +Potentiometer vertical Vishay T73YP +0 +3 +3 +Relay_SMD +Relay_DPDT_AXICOM_IMSeries_JLeg +http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Specification+Or+Standard%7F108-98001%7FW5%7Fpdf%7FEnglish%7FENG_SS_108-98001_W5.pdf +AXICOM IM-Series Relay J JLeg +0 +8 +8 +Relay_SMD +Relay_DPDT_FRT5_SMD +IM Signal Relay DPDT FRT5 narrow footprint, SMD version of package +Relay DPDT IM-relay FRT5 +0 +10 +10 +Relay_SMD +Relay_DPDT_Omron_G6H-2F +package for Omron G6H-2F relais, see http://cdn-reichelt.de/documents/datenblatt/C300/G6H%23OMR.pdf +Omron G6H-2F relais +0 +10 +10 +Relay_SMD +Relay_DPDT_Omron_G6K-2F +Omron G6K-2F relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2F relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6K-2F-Y +Omron G6K-2F-Y relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2F-Y relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6K-2G +Omron G6K-2G relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2G relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6K-2G-Y +Omron G6K-2G-Y relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2G-Y relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6S-2F +Relay Omron G6S-2F, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6S-2F +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6S-2G +Relay Omron G6S-2G, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6S-2G +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6SK-2F +Relay Omron G6SK-2F, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6SK-2F +0 +10 +10 +Relay_SMD +Relay_DPDT_Omron_G6SK-2G +Relay Omron G6SK-2G, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6SK-2G +0 +10 +10 +Relay_SMD +Relay_SPDT_AXICOM_HF3Series_50ohms_Pitch1.27mm +hiqsdr.com/images/3/3e/Axicom-HF3.pdf +AXICOM HF3-Series Relay Pitch 1.27mm 50ohms +0 +16 +16 +Relay_SMD +Relay_SPDT_AXICOM_HF3Series_75ohms_Pitch1.27mm +hiqsdr.com/images/3/3e/Axicom-HF3.pdf +AXICOM HF3-Series Relay Pitch 1.27mm 75ohm +0 +16 +16 +Relay_THT +Relay_1-Form-A_Schrack-RYII_RM5mm +Relay, 1-Form-A, Schrack-RYII, RM5mm, SPST-NO +Relay 1-Form-A Schrack-RYII RM5mm SPST-NO +0 +4 +4 +Relay_THT +Relay_1-Form-B_Schrack-RYII_RM5mm +Relay, 1-Form-B, Schrack-RYII, RM5mm, SPST-NC +Relay 1-Form-B Schrack-RYII RM5mm SPST-NC +0 +4 +4 +Relay_THT +Relay_1-Form-C_Schrack-RYII_RM3.2mm +Relay, 1-Form-C, Schrack-RYII, RM3.2mm, SPDT +Relay 1-Form-C Schrack-RYII RM3.2mm SPDT +0 +5 +5 +Relay_THT +Relay_DPDT_AXICOM_IMSeries_Pitch3.2mm +AXICOM IM-Series Relays, DPDR, Pitch 3.2mm, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Specification+Or+Standard%7F108-98001%7FV%7Fpdf%7FEnglish%7FENG_SS_108-98001_V_IM_0614_v1.pdf%7F4-1462039-1 +AXICOM IM-Series Relay DPDR Pitch 3.2mm +0 +8 +8 +Relay_THT +Relay_DPDT_AXICOM_IMSeries_Pitch5.08mm +AXICOM IM-Series Relays, DPDR, Pitch 5.08 +AXICOM IM-Series Relay DPDR Pitch 5.08 +0 +8 +8 +Relay_THT +Relay_DPDT_Finder_30.22 +Finder 32.21-x000 Relay, DPDT, https://gfinder.findernet.com/public/attachments/30/EN/S30EN.pdf +AXICOM IM-Series Relay SPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Finder_40.52 +Relay DPDT Finder 40.52, Pitch 5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.52 Pitch 5mm +0 +8 +8 +Relay_THT +Relay_DPDT_FRT5 +IM Signal Relay DPDT FRT5 narrow footprint +Relay DPDT IM-relay FRT5 +0 +10 +10 +Relay_THT +Relay_DPDT_Fujitsu_FTR-F1C +https://www.fujitsu.com/downloads/MICRO/fcai/relays/ftr-f1.pdf +relay dpdt fujitsu tht +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G5V-2 +http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5v2.pdf +Omron G5V-2 Relay DPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6H-2 +Omron relay G6H-2, see http://cdn-reichelt.de/documents/datenblatt/C300/G6H%23OMR.pdf +Omron relay G6H-2 +0 +10 +10 +Relay_THT +Relay_DPDT_Omron_G6K-2P +Omron G6K-2P relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2P relay +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6K-2P-Y +Omron G6K-2P-Y relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2P-Y relay +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6S-2 +Relay Omron G6S-2, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6S-2 +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6SK-2 +Relay Omron G6SK-2, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6SK-2 +0 +10 +10 +Relay_THT +Relay_DPDT_Panasonic_JW2 +Panasonic Relay DPDT, http://www3.panasonic.biz/ac/e_download/control/relay/power/catalog/mech_eng_jw.pdf?via=ok +Panasonic Relay DPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Schrack-RT2-FormC-Dual-Coil_RM5mm +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Form C http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Data+Sheet%7FRT2_bistable%7F1116%7Fpdf%7FEnglish%7FENG_DS_RT2_bistable_1116.pdf%7F1-1415537-8 +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Relay +0 +9 +9 +Relay_THT +Relay_DPDT_Schrack-RT2-FormC_RM5mm +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Form C http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=RT2_reflow&DocType=DS&DocLang=EN +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Relay +0 +8 +8 +Relay_THT +Relay_DPST_Fujitsu_FTR-F1A +https://www.fujitsu.com/downloads/MICRO/fcai/relays/ftr-f1.pdf +relay dpst fujitsu tht +0 +6 +6 +Relay_THT +Relay_DPST_Schrack-RT2-FormA_RM5mm +Relay DPST Schrack-RT2 RM5mm 16A 250V AC Form A http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=RT2_reflow&DocType=DS&DocLang=EN +Relay DPST Schrack-RT2 RM5mm 16A 250V AC Relay +0 +6 +6 +Relay_THT +Relay_Socket_DPDT_Finder_96.12 +https://gfinder.findernet.com/public/attachments/56/DE/S56DE.pdf +Relay socket DPDT Finder 96.12 56.32 +0 +8 +8 +Relay_THT +Relay_SPDT_Finder_32.21-x000 +Finder 32.21-x000 Relay, SPDT, https://gfinder.findernet.com/assets/Series/355/S32EN.pdf +AXICOM IM-Series Relay SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_34.51_Horizontal +Relay SPDT, Finder Type34.51, horizontal form, see https://gfinder.findernet.com/public/attachments/34/EN/S34USAEN.pdf +Relay SPDT Finder +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_34.51_Vertical +Relay SPDT, Finder Type34.51, vertical/standing form, see https://gfinder.findernet.com/public/attachments/34/EN/S34USAEN.pdf +Relay SPDT Finder +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.11 +Relay SPDT Finder 40.11, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay SPDT Finder 40.11 +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.31 +Relay DPDT Finder 40.31, Pitch 3.5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.31 Pitch 3.5mm +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.41 +Relay DPDT Finder 40.41, Pitch 3.5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.41 Pitch 3.5mm +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.51 +Relay DPDT Finder 40.51, Pitch 5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.51 Pitch 5mm +0 +5 +5 +Relay_THT +Relay_SPDT_HJR-4102 +IM Signal Relay SPDT HJR-4102 +Relay SPDT IM-relay HJR-4102 +0 +6 +6 +Relay_THT +Relay_SPDT_HsinDa_Y14 +http://www.hsinda.com.cn/en/ProductShow.asp?ID=208 +Relay Y14 +0 +6 +6 +Relay_THT +Relay_SPDT_Omron-G5LE-1 +Omron Relay SPDT, http://www.omron.com/ecb/products/pdf/en-g5le.pdf +Omron Relay SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_Omron-G5Q-1 +Relay SPDT Omron Serie G5Q, http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5q.pdf +Relay SPDT Omron Serie G5Q +0 +5 +5 +Relay_THT +Relay_SPDT_Omron_G5V-1 +Relay Omron G5V-1, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5v_1.pdf +Relay Omron G5V-1 +0 +6 +6 +Relay_THT +Relay_SPDT_Omron_G6E +Relay SPDT Omron Serie G6E +Relay SPDT Omron Serie G6E 1x um +0 +5 +5 +Relay_THT +Relay_SPDT_Omron_G6EK +Relay SPDT Omron Serie G6EK, see http://www.logosfoundation.org/instrum_gwr/pi/Omron_G6E_134P.pdf +Relay SPDT Omron Serie G6EK +0 +6 +6 +Relay_THT +Relay_SPDT_Panasonic_JW1_FormC +Panasonic Relay SPDT, http://www3.panasonic.biz/ac/e_download/control/relay/power/catalog/mech_eng_jw.pdf?via=ok +Panasonic Relay SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_PotterBrumfield_T9AP5D52_12V30A +Relay SPDT Potter&Brumfield T9AP5D52 12V 30A 1xUn Connector Fast ON Only Dummy for Space NO Pads +Relay SPDT Potter&Brumfield T9AP5D52 12V 30A 1xUm Connector Fast ON Flachsteckeranschluss Only Dummy for Space NO Pads +0 +0 +0 +Relay_THT +Relay_SPDT_SANYOU_SRD_Series_Form_C +relay Sanyou SRD series Form C http://www.sanyourelay.ca/public/products/pdf/SRD.pdf +relay Sanyu SRD form C +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RP-II-1-16A-FormC_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Form C http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Relay +0 +8 +5 +Relay_THT +Relay_SPDT_Schrack-RP-II-1-FormC_RM3.5mm +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RP-II-1-FormC_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RT1-16A-FormC_RM5mm +Relay SPST Schrack-RT1 RM5mm 16A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM5mm 16A 250V AC Relay +0 +8 +5 +Relay_THT +Relay_SPDT_Schrack-RT1-FormC_RM3.5mm +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RT1-FormC_RM5mm +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_StandexMeder_SIL_Form1C +Standex-Meder SIL-relais, Form 1C, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_SIL.pdf +Standex Meder SIL reed relais +0 +5 +5 +Relay_THT +Relay_SPST_Finder_32.21-x300 +Finder 32.21-x300 Relay, SPST, https://gfinder.findernet.com/assets/Series/355/S32EN.pdf +Finder 32.21-x300 Relay SPST +0 +4 +4 +Relay_THT +Relay_SPST_Omron-G5Q-1A +Relay SPST-NO Omron Serie G5Q, http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5q.pdf +Relay SPST-NO Omron Serie G5Q +0 +4 +4 +Relay_THT +Relay_SPST_Panasonic_JW1_FormA +Panasonic Relay SPST, http://www3.panasonic.biz/ac/e_download/control/relay/power/catalog/mech_eng_jw.pdf?via=ok +Panasonic Relay SPST +0 +4 +4 +Relay_THT +Relay_SPST_PotterBrumfield_T9AP1D52_12V30A +Relay SPST Potter&Brumfield T9AP1D52 12V 30A 1xEin Connector Fast ON Only Dummy for Space NO Pads +Relau SPST Potter&Brumfield T9AP1D52 12V 30A 1xEin Connector Fast ON Flachsteckeranschluss Only Dummy for Space NO Pads +0 +0 +0 +Relay_THT +Relay_SPST_SANYOU_SRD_Series_Form_A +relay Sanyou SRD series Form A http://www.sanyourelay.ca/public/products/pdf/SRD.pdf +relay Sanyu SRD form A +0 +4 +4 +Relay_THT +Relay_SPST_SANYOU_SRD_Series_Form_B +relay Sanyou SRD series Form B opener http://www.sanyourelay.ca/public/products/pdf/SRD.pdf +relay Sanyu SRD form B opener +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RP-II-1-16A-FormA_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Form A http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Relay +0 +6 +4 +Relay_THT +Relay_SPST_Schrack-RP-II-1-FormA_RM3.5mm +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Form A +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RP-II-1-FormA_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Form A http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RP3SL-1coil_RM5mm +Relay SPST Schrack-RP3SL, 1-coil-version, RM5mm 16A 250V AC Form A http://www.alliedelec.com/m/d/543c6bed18bf23a83ae5238947033ee0.pdf +Relay SPST Schrack-RP3SL RM5mm 16A 250V AC Relay +0 +6 +4 +Relay_THT +Relay_SPST_Schrack-RP3SL_RM5mm +Relay SPST Schrack-RP3SL RM5mm 16A 250V AC Form A http://www.alliedelec.com/m/d/543c6bed18bf23a83ae5238947033ee0.pdf +Relay SPST Schrack-RP3SL RM5mm 16A 250V AC Relay +0 +7 +5 +Relay_THT +Relay_SPST_Schrack-RT1-16A-FormA_RM5mm +Relay SPST Schrack-RT2 RM5mm 16A 250V AC Form C http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=RT2_reflow&DocType=DS&DocLang=EN +Relay SPST Schrack-RT2 RM5mm 16A 250V AC Relay +0 +6 +4 +Relay_THT +Relay_SPST_Schrack-RT1-FormA_RM3.5mm +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Form A +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RT1-FormA_RM5mm +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_StandexMeder_MS_Form1AB +Standex-Meder MS SIL-relais, Form 1A/1B, see https://standexelectronics.com/de/produkte/ms-reed-relais/ +Standex Meder MS SIL reed relais +0 +4 +4 +Relay_THT +Relay_SPST_StandexMeder_SIL_Form1A +Standex-Meder SIL-relais, Form 1A, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_SIL.pdf +Standex Meder SIL reed relais +0 +4 +4 +Relay_THT +Relay_SPST_StandexMeder_SIL_Form1B +Standex-Meder SIL-relais, Form 1B, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_SIL.pdf +Standex Meder SIL reed relais +0 +4 +4 +Relay_THT +Relay_SPST_TE_PCH-1xxx2M +Miniature PCB Relay, PCH Series, 1 Form A (NO), SPST http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Data+Sheet%7FPCH_series_relay_data_sheet_E%7F1215%7Fpdf%7FEnglish%7FENG_DS_PCH_series_relay_data_sheet_E_1215.pdf +Relay SPST NO +0 +4 +4 +Relay_THT +Relay_SPST_TE_PCN-1xxD3MHZ +https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1461491%7FG2%7Fpdf%7FEnglish%7FENG_CD_1461491_G2.pdf%7F3-1461491-0 +SPST relay slim +0 +4 +4 +Relay_THT +Relay_StandexMeder_DIP_HighProfile +package for Standex Meder DIP reed relay series, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_DIP.pdf +DIL DIP PDIP 2.54mm 7.62mm 300mil reed relay +0 +8 +8 +Relay_THT +Relay_StandexMeder_DIP_LowProfile +package for Standex Meder DIP reed relay series, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_DIP.pdf +DIL DIP PDIP 2.54mm 7.62mm 300mil reed relay +0 +8 +8 +Relay_THT +Relay_StandexMeder_UMS +Standex-Meder SIL-relais, UMS, see http://cdn-reichelt.de/documents/datenblatt/C300/UMS05_1A80_75L_DB.pdf +Standex Meder SIL reed relais +0 +4 +4 +Resistor_SMD +R_0201_0603Metric +Resistor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Resistor_SMD +R_0402_1005Metric +Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0603_1608Metric +Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0612_1632Metric +Resistor SMD 0612 (1632 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0612_1632Metric_Pad1.18x3.40mm_HandSolder +Resistor SMD 0612 (1632 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0805_2012Metric +Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0815_2038Metric +Resistor SMD 0815 (2038 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.yageo.com/documents/recent/PYu-PRPFPH_521_RoHS_L_0.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0815_2038Metric_Pad1.53x4.00mm_HandSolder +Resistor SMD 0815 (2038 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.yageo.com/documents/recent/PYu-PRPFPH_521_RoHS_L_0.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_01005_0402Metric +Resistor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Resistor_SMD +R_1020_2550Metric +Resistor SMD 1020 (2550 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1020_2550Metric_Pad1.33x5.20mm_HandSolder +Resistor SMD 1020 (2550 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1206_3216Metric +Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1210_3225Metric +Resistor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Resistor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1218_3246Metric +Resistor SMD 1218 (3246 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1218_3246Metric_Pad1.22x4.75mm_HandSolder +Resistor SMD 1218 (3246 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1806_4516Metric +Resistor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Resistor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1812_4532Metric +Resistor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Resistor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2010_5025Metric +Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2512_6332Metric +Resistor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Resistor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2816_7142Metric +Resistor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Resistor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_4020_10251Metric +Resistor SMD 4020 (10251 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_4020_10251Metric_Pad1.65x5.30mm_HandSolder +Resistor SMD 4020 (10251 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_Array_Concave_2x0603 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Concave_4x0402 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA04P (see cra04p.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Concave_4x0603 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_2x0402 +Chip Resistor Network, ROHM MNR02 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x0603 +Chip Resistor Network, ROHM MNR12 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x0606 +Precision Thin Film Chip Resistor Array, VISHAY (see http://www.vishay.com/docs/28770/acasat.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x1206 +Chip Resistor Network, ROHM MNR32 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_4x0402 +Chip Resistor Network, ROHM MNR04 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x0603 +Chip Resistor Network, ROHM MNR14 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x0612 +Precision Thin Film Chip Resistor Array, VISHAY (see http://www.vishay.com/docs/28770/acasat.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x1206 +Chip Resistor Network, ROHM MNR34 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_5x0603 +Chip Resistor Network, ROHM MNR15 (see mnr_g.pdf) +resistor array +0 +10 +10 +Resistor_SMD +R_Array_Convex_5x1206 +Chip Resistor Network, ROHM MNR35 (see mnr_g.pdf) +resistor array +0 +10 +10 +Resistor_SMD +R_Array_Convex_8x0602 +Chip Resistor Network, ROHM MNR18 (see mnr_g.pdf) +resistor array +0 +16 +16 +Resistor_SMD +R_Cat16-2 +SMT resistor net, Bourns CAT16 series, 2 way +SMT resistor net Bourns CAT16 series 2 way +0 +4 +4 +Resistor_SMD +R_Cat16-4 +SMT resistor net, Bourns CAT16 series, 4 way +SMT resistor net Bourns CAT16 series 4 way +0 +8 +8 +Resistor_SMD +R_Cat16-8 +SMT resistor net, Bourns CAT16 series, 8 way +SMT resistor net Bourns CAT16 series 8 way +0 +16 +16 +Resistor_SMD +R_MELF_MMB-0207 +Resistor, MELF, MMB-0207, http://www.vishay.com/docs/28713/melfprof.pdf +MELF Resistor +0 +2 +2 +Resistor_SMD +R_MicroMELF_MMU-0102 +Resistor, MicroMELF, MMU-0102, http://www.vishay.com/docs/28713/melfprof.pdf +MicroMELF Resistor +0 +2 +2 +Resistor_SMD +R_MiniMELF_MMA-0204 +Resistor, MiniMELF, MMA-0204, http://www.vishay.com/docs/28713/melfprof.pdf +MiniMELF Resistor +0 +2 +2 +Resistor_SMD +R_Shunt_Ohmite_LVK12 +4 contact shunt resistor +shunt resistor 4 contacts +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK20 +4 contacts shunt resistor, https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK24 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK25 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T1.19mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 1.19mm, 5 to 200 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T2.21mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.21mm, 1 to 4.9 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T2.66mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.66mm, 0.5 to 0.99 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSKW0612 +https://www.vishay.com/docs/30332/wskw0612.pdf +4-Terminal SMD Shunt +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSR2_WSR3 +Power Metal Strip Resistors 0.005 to 0.2, https://www.vishay.com/docs/30101/wsr.pdf +SMD Shunt Resistor +0 +2 +2 +Resistor_SMD +R_Shunt_Vishay_WSR2_WSR3_KelvinConnection +Power Metal Strip Resistors 0.005 to 0.2, https://www.vishay.com/docs/30101/wsr.pdf +SMD Shunt Resistor +0 +4 +2 +Resistor_THT +R_Array_SIP4 +4-pin Resistor SIP pack +R +0 +4 +4 +Resistor_THT +R_Array_SIP5 +5-pin Resistor SIP pack +R +0 +5 +5 +Resistor_THT +R_Array_SIP6 +6-pin Resistor SIP pack +R +0 +6 +6 +Resistor_THT +R_Array_SIP7 +7-pin Resistor SIP pack +R +0 +7 +7 +Resistor_THT +R_Array_SIP8 +8-pin Resistor SIP pack +R +0 +8 +8 +Resistor_THT +R_Array_SIP9 +9-pin Resistor SIP pack +R +0 +9 +9 +Resistor_THT +R_Array_SIP10 +10-pin Resistor SIP pack +R +0 +10 +10 +Resistor_THT +R_Array_SIP11 +11-pin Resistor SIP pack +R +0 +11 +11 +Resistor_THT +R_Array_SIP12 +12-pin Resistor SIP pack +R +0 +12 +12 +Resistor_THT +R_Array_SIP13 +13-pin Resistor SIP pack +R +0 +13 +13 +Resistor_THT +R_Array_SIP14 +14-pin Resistor SIP pack +R +0 +14 +14 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical +Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P2.54mm_Vertical +Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=2.54mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Vertical pin pitch 2.54mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal +Resistor, Axial_DIN0204 series, Axial, Horizontal, pin pitch=5.08mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Horizontal pin pitch 5.08mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical +Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=5.08mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Vertical pin pitch 5.08mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal +Resistor, Axial_DIN0204 series, Axial, Horizontal, pin pitch=7.62mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Horizontal pin pitch 7.62mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical +Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P5.08mm_Vertical +Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=5.08mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Vertical pin pitch 5.08mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal +Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal +Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P15.24mm_Horizontal +Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=15.24mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Horizontal pin pitch 15.24mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P2.54mm_Vertical +Resistor, Axial_DIN0309 series, Axial, Vertical, pin pitch=2.54mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Vertical pin pitch 2.54mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P5.08mm_Vertical +Resistor, Axial_DIN0309 series, Axial, Vertical, pin pitch=5.08mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Vertical pin pitch 5.08mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P12.70mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=12.7mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 12.7mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=15.24mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 15.24mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P20.32mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=20.32mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 20.32mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P25.40mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=25.4mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 25.4mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P5.08mm_Vertical +Resistor, Axial_DIN0411 series, Axial, Vertical, pin pitch=5.08mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Vertical pin pitch 5.08mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P7.62mm_Vertical +Resistor, Axial_DIN0411 series, Axial, Vertical, pin pitch=7.62mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Vertical pin pitch 7.62mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P12.70mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=12.7mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 12.7mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P15.24mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=15.24mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 15.24mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P20.32mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=20.32mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 20.32mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P25.40mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=25.4mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 25.4mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P5.08mm_Vertical +Resistor, Axial_DIN0414 series, Axial, Vertical, pin pitch=5.08mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Vertical pin pitch 5.08mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P7.62mm_Vertical +Resistor, Axial_DIN0414 series, Axial, Vertical, pin pitch=7.62mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Vertical pin pitch 7.62mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P15.24mm_Horizontal +Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=15.24mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Horizontal pin pitch 15.24mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P20.32mm_Horizontal +Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=20.32mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Horizontal pin pitch 20.32mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P25.40mm_Horizontal +Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=25.4mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Horizontal pin pitch 25.4mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P5.08mm_Vertical +Resistor, Axial_DIN0516 series, Axial, Vertical, pin pitch=5.08mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Vertical pin pitch 5.08mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0516 series, Axial, Vertical, pin pitch=7.62mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Vertical pin pitch 7.62mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P20.32mm_Horizontal +Resistor, Axial_DIN0516 series, Axial, Horizontal, pin pitch=20.32mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Horizontal pin pitch 20.32mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0516 series, Axial, Horizontal, pin pitch=25.4mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Horizontal pin pitch 25.4mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0516 series, Axial, Horizontal, pin pitch=30.48mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Horizontal pin pitch 30.48mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P5.08mm_Vertical +Resistor, Axial_DIN0614 series, Axial, Vertical, pin pitch=5.08mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Vertical pin pitch 5.08mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P7.62mm_Vertical +Resistor, Axial_DIN0614 series, Axial, Vertical, pin pitch=7.62mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Vertical pin pitch 7.62mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P15.24mm_Horizontal +Resistor, Axial_DIN0614 series, Axial, Horizontal, pin pitch=15.24mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Horizontal pin pitch 15.24mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P20.32mm_Horizontal +Resistor, Axial_DIN0614 series, Axial, Horizontal, pin pitch=20.32mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Horizontal pin pitch 20.32mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P25.40mm_Horizontal +Resistor, Axial_DIN0614 series, Axial, Horizontal, pin pitch=25.4mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Horizontal pin pitch 25.4mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P5.08mm_Vertical +Resistor, Axial_DIN0617 series, Axial, Vertical, pin pitch=5.08mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Vertical pin pitch 5.08mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0617 series, Axial, Vertical, pin pitch=7.62mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Vertical pin pitch 7.62mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P20.32mm_Horizontal +Resistor, Axial_DIN0617 series, Axial, Horizontal, pin pitch=20.32mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Horizontal pin pitch 20.32mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0617 series, Axial, Horizontal, pin pitch=25.4mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Horizontal pin pitch 25.4mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0617 series, Axial, Horizontal, pin pitch=30.48mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Horizontal pin pitch 30.48mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0918 series, Axial, Vertical, pin pitch=7.62mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Vertical pin pitch 7.62mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P22.86mm_Horizontal +Resistor, Axial_DIN0918 series, Axial, Horizontal, pin pitch=22.86mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Horizontal pin pitch 22.86mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0918 series, Axial, Horizontal, pin pitch=25.4mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Horizontal pin pitch 25.4mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0918 series, Axial, Horizontal, pin pitch=30.48mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Horizontal pin pitch 30.48mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0922_L20.0mm_D9.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0922 series, Axial, Vertical, pin pitch=7.62mm, 5W, length*diameter=20*9mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0922 series Axial Vertical pin pitch 7.62mm 5W length 20mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0922_L20.0mm_D9.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0922 series, Axial, Horizontal, pin pitch=25.4mm, 5W, length*diameter=20*9mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0922 series Axial Horizontal pin pitch 25.4mm 5W length 20mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0922_L20.0mm_D9.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0922 series, Axial, Horizontal, pin pitch=30.48mm, 5W, length*diameter=20*9mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0922 series Axial Horizontal pin pitch 30.48mm 5W length 20mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P5.08mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=5.08mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 5.08mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P7.62mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=7.62mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 7.62mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P22.40mm +Resistor, Axial_Power series, Box, pin pitch=22.4mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 22.4mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P25.40mm +Resistor, Axial_Power series, Box, pin pitch=25.4mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 25.4mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P30.48mm +Resistor, Axial_Power series, Box, pin pitch=30.48mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 30.48mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W6.4mm_P27.94mm +Resistor, Axial_Power series, Box, pin pitch=27.94mm, 5W, length*width*height=25*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 27.94mm 5W length 25mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W6.4mm_P30.48mm +Resistor, Axial_Power series, Box, pin pitch=30.48mm, 5W, length*width*height=25*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 30.48mm 5W length 25mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P7.62mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=7.62mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 7.62mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P10.16mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=10.16mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 10.16mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P27.94mm +Resistor, Axial_Power series, Box, pin pitch=27.94mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 27.94mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P30.48mm +Resistor, Axial_Power series, Box, pin pitch=30.48mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 30.48mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W6.4mm_P40.64mm +Resistor, Axial_Power series, Box, pin pitch=40.64mm, 7W, length*width*height=38*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 40.64mm 7W length 38mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W6.4mm_P45.72mm +Resistor, Axial_Power series, Box, pin pitch=45.72mm, 7W, length*width*height=38*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 45.72mm 7W length 38mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W9.0mm_P40.64mm +Resistor, Axial_Power series, Box, pin pitch=40.64mm, 9W, length*width*height=38*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 40.64mm 9W length 38mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W9.0mm_P45.72mm +Resistor, Axial_Power series, Box, pin pitch=45.72mm, 9W, length*width*height=38*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 45.72mm 9W length 38mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P7.62mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=7.62mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 7.62mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P10.16mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=10.16mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 10.16mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P55.88mm +Resistor, Axial_Power series, Box, pin pitch=55.88mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 55.88mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P60.96mm +Resistor, Axial_Power series, Box, pin pitch=60.96mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 60.96mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L50.0mm_W9.0mm_P55.88mm +Resistor, Axial_Power series, Box, pin pitch=55.88mm, 11W, length*width*height=50*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 55.88mm 11W length 50mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L50.0mm_W9.0mm_P60.96mm +Resistor, Axial_Power series, Box, pin pitch=60.96mm, 11W, length*width*height=50*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 60.96mm 11W length 50mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L60.0mm_W14.0mm_P10.16mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=10.16mm, 25W, length*width*height=60*14*14mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 10.16mm 25W length 60mm width 14mm height 14mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L60.0mm_W14.0mm_P66.04mm +Resistor, Axial_Power series, Box, pin pitch=66.04mm, 25W, length*width*height=60*14*14mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 66.04mm 25W length 60mm width 14mm height 14mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L60.0mm_W14.0mm_P71.12mm +Resistor, Axial_Power series, Box, pin pitch=71.12mm, 25W, length*width*height=60*14*14mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 71.12mm 25W length 60mm width 14mm height 14mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L75.0mm_W9.0mm_P81.28mm +Resistor, Axial_Power series, Box, pin pitch=81.28mm, 17W, length*width*height=75*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 81.28mm 17W length 75mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L75.0mm_W9.0mm_P86.36mm +Resistor, Axial_Power series, Box, pin pitch=86.36mm, 17W, length*width*height=75*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 86.36mm 17W length 75mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Shunt_L22.2mm_W8.0mm_PS14.30mm_P25.40mm +Resistor, Axial_Shunt series, Box, pin pitch=25.4mm, 3W, length*width*height=22.2*8*8mm^3, shunt pin pitch = 14.30mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 25.4mm 3W length 22.2mm width 8mm height 8mm shunt pin pitch 14.30mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L22.2mm_W9.5mm_PS14.30mm_P25.40mm +Resistor, Axial_Shunt series, Box, pin pitch=25.4mm, 5W, length*width*height=22.2*9.5*9.5mm^3, shunt pin pitch = 14.30mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 25.4mm 5W length 22.2mm width 9.5mm height 9.5mm shunt pin pitch 14.30mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L35.3mm_W9.5mm_PS25.40mm_P38.10mm +Resistor, Axial_Shunt series, Box, pin pitch=38.1mm, 7W, length*width*height=35.3*9.5*9.5mm^3, shunt pin pitch = 25.40mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 38.1mm 7W length 35.3mm width 9.5mm height 9.5mm shunt pin pitch 25.40mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L47.6mm_W9.5mm_PS34.93mm_P50.80mm +Resistor, Axial_Shunt series, Box, pin pitch=50.8mm, 10W, length*width*height=47.6*9.5*9.5mm^3, shunt pin pitch = 34.93mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 50.8mm 10W length 47.6mm width 9.5mm height 9.5mm shunt pin pitch 34.93mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L47.6mm_W12.7mm_PS34.93mm_P50.80mm +Resistor, Axial_Shunt series, Box, pin pitch=50.8mm, 15W, length*width*height=47.6*12.7*12.7mm^3, shunt pin pitch = 34.93mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 50.8mm 15W length 47.6mm width 12.7mm height 12.7mm shunt pin pitch 34.93mm +0 +4 +4 +Resistor_THT +R_Bare_Metal_Element_L12.4mm_W4.8mm_P11.40mm +Resistor, Bare_Metal_Element series, Bare Metal Strip/Wire, Horizontal, pin pitch=11.4mm, 1W, length*width=12.4*4.8mm^2, https://www.bourns.com/pdfs/PWR4412-2S.pdf +Resistor Bare_Metal_Element series Bare Metal Strip Wire Horizontal pin pitch 11.4mm 1W length 12.4mm width 4.8mm +0 +2 +2 +Resistor_THT +R_Bare_Metal_Element_L16.3mm_W4.8mm_P15.30mm +Resistor, Bare_Metal_Element series, Bare Metal Strip/Wire, Horizontal, pin pitch=15.3mm, 3W, length*width=16.3*4.8mm^2, https://www.bourns.com/pdfs/PWR4412-2S.pdf +Resistor Bare_Metal_Element series Bare Metal Strip Wire Horizontal pin pitch 15.3mm 3W length 16.3mm width 4.8mm +0 +2 +2 +Resistor_THT +R_Bare_Metal_Element_L21.3mm_W4.8mm_P20.30mm +Resistor, Bare_Metal_Element series, Bare Metal Strip/Wire, Horizontal, pin pitch=20.3mm, 5W, length*width=21.3*4.8mm^2, https://www.bourns.com/pdfs/PWR4412-2S.pdf +Resistor Bare_Metal_Element series Bare Metal Strip Wire Horizontal pin pitch 20.3mm 5W length 21.3mm width 4.8mm +0 +2 +2 +Resistor_THT +R_Box_L8.4mm_W2.5mm_P5.08mm +Resistor, Box series, Radial, pin pitch=5.08mm, 0.5W = 1/2W, length*width=8.38*2.54mm^2, http://www.vishay.com/docs/60051/cns020.pdf +Resistor Box series Radial pin pitch 5.08mm 0.5W = 1/2W length 8.38mm width 2.54mm +0 +2 +2 +Resistor_THT +R_Box_L13.0mm_W4.0mm_P9.00mm +Resistor, Box series, Radial, pin pitch=9.00mm, 2W, length*width=13.0*4.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf +Resistor Box series Radial pin pitch 9.00mm 2W length 13.0mm width 4.0mm +0 +2 +2 +Resistor_THT +R_Box_L14.0mm_W5.0mm_P9.00mm +Resistor, Box series, Radial, pin pitch=9.00mm, 5W, length*width=14.0*5.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf +Resistor Box series Radial pin pitch 9.00mm 5W length 14.0mm width 5.0mm +0 +2 +2 +Resistor_THT +R_Box_L26.0mm_W5.0mm_P20.00mm +Resistor, Box series, Radial, pin pitch=20.00mm, 10W, length*width=26.0*5.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf +Resistor Box series Radial pin pitch 20.00mm 10W length 26.0mm width 5.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm +Resistor, Radial_Power series, Radial, pin pitch=2.40*2.30mm^2, 7W, length*width=7*8mm^2, http://www.vitrohm.com/content/files/vitrohm_series_kv_-_201601.pdf +Resistor Radial_Power series Radial pin pitch 2.40*2.30mm^2 7W length 7mm width 8mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L9.0mm_W10.0mm_Px2.70mm_Py2.30mm +Resistor, Radial_Power series, Radial, pin pitch=2.70*2.30mm^2, 17W, length*width=9*10mm^2, http://www.vitrohm.com/content/files/vitrohm_series_kv_-_201601.pdf +Resistor Radial_Power series Radial pin pitch 2.70*2.30mm^2 17W length 9mm width 10mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L11.0mm_W7.0mm_P5.00mm +Resistor, Radial_Power series, Radial, pin pitch=5.00mm, 2W, length*width=11.0*7.0mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 5.00mm 2W length 11.0mm width 7.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L12.0mm_W8.0mm_P5.00mm +Resistor, Radial_Power series, Radial, pin pitch=5.00mm, 3W, length*width=12.0*8.0mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 5.00mm 3W length 12.0mm width 8.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L13.0mm_W9.0mm_P5.00mm +Resistor, Radial_Power series, Radial, pin pitch=5.00mm, 7W, length*width=13.0*9.0mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 5.00mm 7W length 13.0mm width 9.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L16.1mm_W9.0mm_P7.37mm +Resistor, Radial_Power series, Radial, pin pitch=7.37mm, 10W, length*width=16.1*9mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 7.37mm 10W length 16.1mm width 9mm +0 +2 +2 +RF_Antenna +Coilcraft_MA5532-AE_RFID +RFID Transponder Coil +antenna rfid coilcraft +0 +2 +2 +RF_Antenna +Pulse_W3011 +Pulse RF Antenna, 4mm Clearance +antenna rf +0 +3 +2 +RF_Antenna +Texas_SWRA117D_2.4GHz_Left +http://www.ti.com/lit/an/swra117d/swra117d.pdf +PCB antenna +0 +2 +2 +RF_Antenna +Texas_SWRA117D_2.4GHz_Right +http://www.ti.com/lit/an/swra117d/swra117d.pdf +PCB antenna +0 +2 +2 +RF_Module +Ai-Thinker-Ra-01-LoRa +Ai Thinker Ra-01 LoRa +LoRa Ra-01 +0 +16 +16 +RF_Module +BLE112-A +Class 4 Bluetooth Module with on-board antenna +Bluetooth Module +0 +30 +30 +RF_Module +CMWX1ZZABZ +https://wireless.murata.com/RFM/data/type_abz.pdf +iot lora sigfox +0 +57 +57 +RF_Module +CYBLE-21Pin-10x10mm +Cypress EZ-BLE PRoC Module (Bluetooth Smart) 21 Pin Module +Cypress BT Bluetooth +0 +21 +21 +RF_Module +DecaWave_DWM1001 +https://www.decawave.com/sites/default/files/dwm1001_datasheet.pdf +UWB module +0 +34 +34 +RF_Module +Digi_XBee_SMT +http://www.digi.com/resources/documentation/digidocs/pdfs/90002126.pdf http://ftp1.digi.com/support/documentation/90001020_F.pdf +Digi XBee SMT RF +0 +37 +37 +RF_Module +DWM1000 +IEEE802.15.4-2011 UWB +UWB Module +0 +24 +24 +RF_Module +E18-MS1-PCB +http://www.cdebyte.com/en/downpdf.aspx?id=122 +Zigbee +0 +24 +24 +RF_Module +E73-2G4M04S +http://www.cdebyte.com/en/downpdf.aspx?id=243 +BLE BLE5 nRF52832 +0 +44 +44 +RF_Module +ESP-07 +Wi-Fi Module, http://wiki.ai-thinker.com/_media/esp8266/docs/a007ps01a2_esp-07_product_specification_v1.2.pdf +Wi-Fi Module +0 +16 +16 +RF_Module +ESP-12E +Wi-Fi Module, http://wiki.ai-thinker.com/_media/esp8266/docs/aithinker_esp_12f_datasheet_en.pdf +Wi-Fi Module +0 +22 +22 +RF_Module +ESP-WROOM-02 +http://espressif.com/sites/default/files/documentation/0c-esp-wroom-02_datasheet_en.pdf +ESP WROOM-02 espressif esp8266ex +0 +19 +19 +RF_Module +ESP32-WROOM-32 +Single 2.4 GHz Wi-Fi and Bluetooth combo chip https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32_datasheet_en.pdf +Single 2.4 GHz Wi-Fi and Bluetooth combo chip +0 +39 +39 +RF_Module +ESP32-WROOM-32U +Single 2.4 GHz Wi-Fi and Bluetooth combo chip with U.FL connector, https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32d_esp32-wroom-32u_datasheet_en.pdf +Single 2.4 GHz Wi-Fi and Bluetooth combo chip +0 +39 +39 +RF_Module +Garmin_M8-35_9.8x14.0mm_Layout6x6_P1.5mm +D52M ANT SoC Module https://www.thisisant.com/assets/resources/D00001687_D52_Module_Datasheet.v.2.3_(Garmin).pdf +RF SoC Radio ANT Bluetooth BLE D52 nRF52 Garmin Canada Dynastream Nordic +0 +35 +35 +RF_Module +HOPERF_RFM9XW_SMD +Low Power Long Range Transceiver Module SMD-16 (https://www.hoperf.com/data/upload/portal/20181127/5bfcbea20e9ef.pdf) +LoRa Low Power Long Range Transceiver Module +0 +16 +16 +RF_Module +HOPERF_RFM9XW_THT + Low Power Long Range Transceiver Module SMD-16 http://www.hoperf.com/upload/rf/RFM95_96_97_98W.pdf + Low Power Long Range Transceiver Module +0 +16 +16 +RF_Module +HOPERF_RFM69HW +Radio, RF, Module, http://www.hoperf.com/upload/rf/RFM69HW-V1.3.pdf +Radio RF Module +0 +16 +16 +RF_Module +IQRF_TRx2DA_KON-SIM-01 +8 pin SIM connector for IQRF TR-x2DA(T) modules, http://iqrf.org/weben/downloads.php?id=104 +IQRF_KON-SIM-01 IQRF_TRx2DA +0 +10 +8 +RF_Module +IQRF_TRx2D_KON-SIM-01 +8 pin SIM connector for IQRF TR-x2D(C)(T) modules, http://iqrf.org/weben/downloads.php?id=104 +IQRF_KON-SIM-01 IQRF_TRx2D IQRF_TRx2DC +0 +10 +8 +RF_Module +Laird_BL652 +Bluetooth v4.2 + NFC module +Bluetooth BLE NFC +0 +39 +39 +RF_Module +Microchip_RN4871 +Microchip RN4871 footprint +RN4871 BLE +0 +16 +16 +RF_Module +MOD-nRF8001 +BLE module, https://www.olimex.com/Products/Modules/RF/MOD-nRF8001/ +BLE module +0 +11 +11 +RF_Module +MonoWireless_TWE-L-WX +https://www.mono-wireless.com/jp/products/TWE-LITE/MW-PDS-TWELITE-JP.pdf +TWE-L-WX +0 +32 +32 +RF_Module +nRF24L01_Breakout +nRF24L01 breakout board +nRF24L01 adapter breakout +0 +8 +8 +RF_Module +Particle_P1 +https://docs.particle.io/datasheets/p1-datasheet/ +Particle P1 +0 +75 +75 +RF_Module +RFDigital_RFD77101 +RFDigital RFD77101 Simblee +RFDigital RFD77101 Simblee +0 +48 +45 +RF_Module +RN42 +Class 2 Bluetooth Module with on-board antenna +Bluetooth Module +0 +36 +33 +RF_Module +RN42N +Class 2 Bluetooth Module without antenna +Bluetooth Module +0 +39 +36 +RF_Module +RN2483 +Low-Power Long Range LoRa Transceiver Module +rf module lora lorawan +0 +47 +47 +RF_Module +ST_SPBTLE +Bluetooth Low Energy Module +ble module st bluetooth +0 +11 +11 +RF_Module +Taiyo-Yuden_EYSGJNZWY +Taiyo Yuden NRF51822 Module Bluetooth https://www.yuden.co.jp/wireless_module/document/datareport2/en/TY_BLE_EYSGJNZ_DataReport_V1_9_20180530E.pdf +Taiyo Yuden NRF51822 Module Bluetooth +0 +30 +28 +RF_Module +TD1205 +https://github.com/Telecom-Design/Documentation_TD_RF_Module/blob/master/TD1205%20Datasheet.pdf +SIGFOX Module +0 +9 +9 +RF_Module +TD1208 +https://github.com/Telecom-Design/Documentation_TD_RF_Module/blob/master/TD1208%20Datasheet.pdf +SIGFOX Module +0 +25 +25 +RF_Module +ZETA-433-SO_SMD +RF transceiver SMD style https://www.rfsolutions.co.uk/downloads/1456219226DS-ZETA.pdf +RF transceiver SMD style +0 +12 +12 +RF_Module +ZETA-433-SO_THT +RF transceiver THT style https://www.rfsolutions.co.uk/downloads/1456219226DS-ZETA.pdf +RF transceiver SMD style +0 +12 +12 +RF_Shielding +Laird_Technologies_97-2002_25.40x25.40mm +Laird Technologies 97-2002 EZ PEEL Shielding Cabinet One Piece SMD 25.40x25.40mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +8 +1 +RF_Shielding +Laird_Technologies_97-2003_12.70x13.37mm +Laird Technologies 97-2003 EZ PEEL Shielding Cabinet One Piece SMD 12.70x13.37mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +8 +1 +RF_Shielding +Laird_Technologies_BMI-S-101_13.66x12.70mm +Laird Technologies BMI-S-101 Shielding Cabinet One Piece SMD 13.66x12.70mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-102_16.50x16.50mm +Laird Technologies BMI-S-102 Shielding Cabinet One Piece SMD 16.50x16.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-103_26.21x26.21mm +Laird Technologies BMI-S-103 Shielding Cabinet One Piece SMD 26.21x26.21mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +24 +1 +RF_Shielding +Laird_Technologies_BMI-S-104_32.00x32.00mm +Laird Technologies BMI-S-104 Shielding Cabinet One Piece SMD 32.00x32.00mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-105_38.10x25.40mm +Laird Technologies BMI-S-105 Shielding Cabinet One Piece SMD 38.10x25.40mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-106_36.83x33.68mm +Laird Technologies BMI-S-106 Shielding Cabinet One Piece SMD 36.83x33.68mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-107_44.37x44.37mm +Laird Technologies BMI-S-107 Shielding Cabinet One Piece SMD 44.37x44.37mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +36 +1 +RF_Shielding +Laird_Technologies_BMI-S-201-F_13.66x12.70mm +Laird Technologies BMI-S-201-F Shielding Cabinet Two Piece SMD 13.66x12.70mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-202-F_16.50x16.50mm +Laird Technologies BMI-S-202-F Shielding Cabinet Two Piece SMD 16.50x16.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-203-F_26.21x26.21mm +Laird Technologies BMI-S-203-F Shielding Cabinet Two Piece SMD 26.21x26.21mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +24 +1 +RF_Shielding +Laird_Technologies_BMI-S-204-F_32.00x32.00mm +Laird Technologies BMI-S-204-F Shielding Cabinet Two Piece SMD 32.00x32.00mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-205-F_38.10x25.40mm +Laird Technologies BMI-S-205-F Shielding Cabinet Two Piece SMD 38.10x25.40mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-206-F_36.83x33.68mm +Laird Technologies BMI-S-206-F Shielding Cabinet Two Piece SMD 36.83x33.68mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-207-F_44.37x44.37mm +Laird Technologies BMI-S-207-F Shielding Cabinet Two Piece SMD 44.37x44.37mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +36 +1 +RF_Shielding +Laird_Technologies_BMI-S-208-F_39.60x39.60mm +Laird Technologies BMI-S-208-F Shielding Cabinet Two Piece SMD 39.60x39.60mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +32 +1 +RF_Shielding +Laird_Technologies_BMI-S-209-F_29.36x18.50mm +Laird Technologies BMI-S-209-F Shielding Cabinet Two Piece SMD 29.36x18.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +20 +1 +RF_Shielding +Laird_Technologies_BMI-S-210-F_44.00x30.50mm +Laird Technologies BMI-S-210-F Shielding Cabinet Two Piece SMD 44.00x30.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +32 +1 +RF_Shielding +Wuerth_36103205_20x20mm +WE-SHC Shielding Cabinet SMD 20x20mm +Shielding Cabinet +0 +20 +1 +RF_Shielding +Wuerth_36103255_25x25mm +WE-SHC Shielding Cabinet SMD 25x25mm +Shielding Cabinet +0 +24 +1 +RF_Shielding +Wuerth_36103305_30x30mm +WE-SHC Shielding Cabinet SMD 30x30mm +Shielding Cabinet +0 +28 +1 +RF_Shielding +Wuerth_36103505_50x50mm +WE-SHC Shielding Cabinet SMD 50x50mm +Shielding Cabinet +0 +44 +1 +RF_Shielding +Wuerth_36103605_60x60mm +WE-SHC Shielding Cabinet SMD 60x60mm +Shielding Cabinet +0 +52 +1 +RF_Shielding +Wuerth_36503205_20x20mm +WE-SHC Shielding Cabinet THT 21x21mm +Shielding Cabinet +0 +16 +1 +RF_Shielding +Wuerth_36503255_25x25mm +WE-SHC Shielding Cabinet THT 26x26mm +Shielding Cabinet +0 +20 +1 +RF_Shielding +Wuerth_36503305_30x30mm +WE-SHC Shielding Cabinet THT 31x31mm +Shielding Cabinet +0 +24 +1 +RF_Shielding +Wuerth_36503505_50x50mm +WE-SHC Shielding Cabinet THT 51x51mm +Shielding Cabinet +0 +40 +1 +RF_Shielding +Wuerth_36503605_60x60mm +WE-SHC Shielding Cabinet THT 61x61mm +Shielding Cabinet +0 +48 +1 +Rotary_Encoder +RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm +Alps rotary encoder, EC12E... with switch, vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E... with switch, vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC11E_Vertical_H20mm +Alps rotary encoder, EC12E... without switch (pins are dummy), vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +4 +Rotary_Encoder +RotaryEncoder_Alps_EC11E_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E... without switch (pins are dummy), vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +4 +Rotary_Encoder +RotaryEncoder_Alps_EC12E-Switch_Vertical_H20mm +Alps rotary encoder, EC12E... with switch, vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html & http://cdn-reichelt.de/documents/datenblatt/F100/402097STEC12E08.PDF +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC12E-Switch_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E... with switch, vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html & http://cdn-reichelt.de/documents/datenblatt/F100/402097STEC12E08.PDF +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC12E_Vertical_H20mm +Alps rotary encoder, EC12E..., vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html +rotary encoder +0 +5 +4 +Rotary_Encoder +RotaryEncoder_Alps_EC12E_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E..., vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html +rotary encoder +0 +5 +4 +Sensor_Audio +Infineon_PG-LLGA-5-1 +Infineon_PG-LLGA-5-1 StepUp generated footprint, https://www.infineon.com/cms/en/product/packages/PG-LLGA/PG-LLGA-5-1/ +infineon mems microphone +0 +15 +5 +Sensor_Audio +ST_HLGA-6_3.76x4.72mm_P1.65mm +http://www.st.com/content/ccc/resource/technical/document/datasheet/group3/27/62/48/98/44/54/4d/36/DM00303211/files/DM00303211.pdf/jcr:content/translations/en.DM00303211.pdf +HLGA Sensor Audio +0 +6 +6 +Sensor_Current +AKM_CQ_7 +AKM Current Sensor, 7 pin, THT (http://www.akm.com/akm/en/file/datasheet/CQ-236B.pdf) +akm current sensor tht +0 +39 +7 +Sensor_Current +AKM_CQ_7S +AKM Current Sensor, 7 pin, SMD (http://www.akm.com/akm/en/file/datasheet/CQ-236B.pdf) +akm current sensor smd +0 +19 +7 +Sensor_Current +AKM_CQ_VSOP-24_5.6x7.9mm_P0.65mm +AKM VSOP-24 current sensor, 5.6x7.9mm body, 0.65mm pitch (http://www.akm.com/akm/en/file/datasheet/CQ-330J.pdf) +akm vsop 24 +0 +10 +10 +Sensor_Current +AKM_CZ_SSOP-10_6.5x8.1mm_P0.95mm +AKM CZ-381x current sensor, 6.5x8.1mm body, 0.95mm pitch (http://www.akm.com/akm/en/product/detail/0009/) +akm cz-381x 10 +0 +10 +10 +Sensor_Current +Allegro_CB_PFF +Allegro MicroSystems, CB-PFF Package (http://www.allegromicro.com/en/Products/Current-Sensor-ICs/Fifty-To-Two-Hundred-Amp-Integrated-Conductor-Sensor-ICs/ACS758.aspx) !PADS 4-5 DO NOT MATCH DATASHEET! +Allegro CB-PFF +0 +37 +5 +Sensor_Current +Allegro_CB_PSF +Allegro MicroSystems, CB-PSF Package (http://www.allegromicro.com/en/Products/Current-Sensor-ICs/Fifty-To-Two-Hundred-Amp-Integrated-Conductor-Sensor-ICs/ACS758.aspx) +Allegro CB-PSF +0 +5 +5 +Sensor_Current +Allegro_CB_PSS +Allegro MicroSystems, CB-PSS Package (http://www.allegromicro.com/en/Products/Current-Sensor-ICs/Fifty-To-Two-Hundred-Amp-Integrated-Conductor-Sensor-ICs/ACS758.aspx) +Allegro CB-PSS +0 +5 +5 +Sensor_Current +Allegro_PSOF-7_4.8x6.4mm_P1.60mm +Allegro Microsystems PSOF-7, 4.8x6.4mm Body, 1.60mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS780-Datasheet.ashx) +Allegro PSOF-7 +0 +7 +7 +Sensor_Current +Allegro_QFN-12-10-1EP_3x3mm_P0.5mm +Allegro Microsystems 12-Lead (10-Lead Populated) Quad Flat Pack, 3x3mm Body, 0.5mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS711-Datasheet.ashx) +Allegro QFN 0.5 +0 +14 +10 +Sensor_Current +Allegro_QSOP-24_3.9x8.7mm_P0.635mm +Allegro Microsystems 24-Lead Plastic Shrink Small Outline Narrow Body Body [QSOP] (http://www.allegromicro.com/~/media/Files/Datasheets/ACS726-Datasheet.ashx?la=en) +Allegro QSOP 0.635 +0 +24 +24 +Sensor_Current +Allegro_SIP-3 +Allegro Microsystems SIP-3, 1.27mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/A1369-Datasheet.ashx) +Allegro SIP-3 +0 +3 +3 +Sensor_Current +Allegro_SIP-4 +Allegro Microsystems SIP-4, 1.27mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/A1363-Datasheet.ashx) +Allegro SIP-4 +0 +4 +4 +Sensor_Current +Diodes_SIP-3_4.1x1.5mm_P1.27mm +Diodes SIP-3 Bulk Pack, 1.27mm Pitch (https://www.diodes.com/assets/Package-Files/SIP-3-Bulk-Pack.pdf) +Diodes SIP-3 Bulk Pack +0 +3 +3 +Sensor_Current +Diodes_SIP-3_4.1x1.5mm_P2.65mm +Diodes SIP-3 Ammo Pack, 2.65mm Pitch (https://www.diodes.com/assets/Package-Files/SIP-3-Ammo-Pack.pdf) +Diodes SIP-3 Ammo Pack +0 +3 +3 +Sensor_Current +LEM_HO8-NP +LEM HO 8/15/25-NP Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/ho-np-0000_series.pdf) +current transducer +0 +13 +13 +Sensor_Current +LEM_HO8-NSM +LEM HO 8/15/25-NSM Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/ho-nsm-0000_series.pdf) +current transducer +0 +13 +13 +Sensor_Current +LEM_HO40-NP +LEM HO 40/60/120/150-NP Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/ho-np_0100__1100_series.pdf) +current transducer +0 +13 +13 +Sensor_Current +LEM_HTFS +LEM HTFS x00-P current transducer (https://www.lem.com/sites/default/files/products_datasheets/htfs_200_800-p.pdf) +HTFS current transducer +0 +4 +4 +Sensor_Current +LEM_HX02-P +LEM HX02-P hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%202_6-p_e%20v5.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX03-P-SP2 +LEM HX03-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX04-P +LEM HX04-P hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%202_6-p_e%20v5.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX05-NP +LEM HX05-NP hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%205_15-np_e%20v10.pdf) +hall current +0 +8 +8 +Sensor_Current +LEM_HX05-P-SP2 +LEM HX05-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX06-P +LEM HX06-P hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%202_6-p_e%20v5.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX10-NP +LEM HX10-NP hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%205_15-np_e%20v10.pdf) +hall current +0 +8 +8 +Sensor_Current +LEM_HX10-P-SP2 +LEM HX10-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX15-NP +LEM HX15-NP hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%205_15-np_e%20v10.pdf) +hall current +0 +8 +8 +Sensor_Current +LEM_HX15-P-SP2 +LEM HX15-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX20-P-SP2 +LEM HX20-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX25-P-SP2 +LEM HX25-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX50-P-SP2 +LEM HX50-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_LA25-P +LEM Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/la_25-p.pdf) +current transducer +0 +3 +3 +Sensor_Current +LEM_LTSR-NP +LEM current transducer LEM_LTSR-NP 5V supply voltage series https://www.lem.com/sites/default/files/products_datasheets/ltsr_6-np.pdf +Current transducer +0 +10 +10 +Sensor_Pressure +Freescale_98ARH99066A +https://www.nxp.com/docs/en/data-sheet/MPXH6250A.pdf +sensor pressure ssop 98ARH99066A +0 +8 +8 +Sensor_Pressure +Freescale_98ARH99089A +https://www.nxp.com/docs/en/data-sheet/MPXH6250A.pdf +sensor pressure ssop 98ARH99089A +0 +8 +8 +Sensor_Pressure +Honeywell_40PCxxxG1A +https://www.honeywellscportal.com/index.php?ci_id=138832 +pressure sensor automotive honeywell +0 +3 +3 +Sensor_Voltage +LEM_LV25-P +LEM LV25-P Voltage transducer, https://www.lem.com/sites/default/files/products_datasheets/lv_25-p.pdf +LEM Hall Effect Voltage transducer +0 +5 +5 +SLC_Free_SMD +boardside + + +0 +20 +20 +Socket +3M_Textool_240-1288-00-0602J_2x20_P2.54mm +3M 40-pin zero insertion force socket, though-hole, row spacing 25.4 mm (1000 mils) +THT DIP DIL ZIF 25.4mm 1000mil Socket +0 +40 +40 +Socket +DIP_Socket-14_W4.3_W5.08_W7.62_W10.16_W10.9_3M_214-3339-00-0602J +3M 14-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +14 +14 +Socket +DIP_Socket-16_W4.3_W5.08_W7.62_W10.16_W10.9_3M_216-3340-00-0602J +3M 16-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +16 +16 +Socket +DIP_Socket-18_W4.3_W5.08_W7.62_W10.16_W10.9_3M_218-3341-00-0602J +3M 18-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +18 +18 +Socket +DIP_Socket-20_W4.3_W5.08_W7.62_W10.16_W10.9_3M_220-3342-00-0602J +3M 20-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +20 +20 +Socket +DIP_Socket-22_W6.9_W7.62_W10.16_W12.7_W13.5_3M_222-3343-00-0602J +3M 22-pin zero insertion force socket, through-hole, row spacing 10.16 mm (400 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 10.16mm 400mil Socket +0 +22 +22 +Socket +DIP_Socket-24_W4.3_W5.08_W7.62_W10.16_W10.9_3M_224-5248-00-0602J +3M 24-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +24 +24 +Socket +DIP_Socket-24_W11.9_W12.7_W15.24_W17.78_W18.5_3M_224-1275-00-0602J +3M 24-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +24 +24 +Socket +DIP_Socket-28_W6.9_W7.62_W10.16_W12.7_W13.5_3M_228-4817-00-0602J +3M 28-pin zero insertion force socket, through-hole, row spacing 10.16 mm (400 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 10.16mm 400mil Socket +0 +28 +28 +Socket +DIP_Socket-28_W11.9_W12.7_W15.24_W17.78_W18.5_3M_228-1277-00-0602J +3M 28-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +28 +28 +Socket +DIP_Socket-32_W11.9_W12.7_W15.24_W17.78_W18.5_3M_232-1285-00-0602J +3M 32-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +32 +32 +Socket +DIP_Socket-40_W11.9_W12.7_W15.24_W17.78_W18.5_3M_240-1280-00-0602J +3M 40-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +40 +40 +Socket +DIP_Socket-40_W22.1_W22.86_W25.4_W27.94_W28.7_3M_240-3639-00-0602J +3M 40-pin zero insertion force socket, through-hole, row spacing 25.4 mm (1000 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 25.4mm 1000mil Socket +0 +40 +40 +Socket +DIP_Socket-42_W11.9_W12.7_W15.24_W17.78_W18.5_3M_242-1281-00-0602J +3M 42-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +42 +42 +Socket +Wells_648-0482211SA01 +https://www.farnell.com/cad/316865.pdf?_ga=2.37208032.177107060.1530611323-249019997.1498114824 +48pin TSOP Socket +0 +48 +48 +Symbol +CE-Logo_8.5x6mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_11.2x8mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_16.8x12mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_28x20mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_42x30mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_56.1x40mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +ESD-Logo_6.6x6mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_8.9x8mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_13.2x12mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_22x20mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_33x30mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_44.1x40mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +FCC-Logo_7.3x6mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_9.6x8mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_14.6x12mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_24.2x20mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_36.3x30mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_48.3x40mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +KiCad-Logo2_5mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_5mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_6mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_6mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_8mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_8mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_12mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_12mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_20mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_20mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_30mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_30mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_40mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_40mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_5mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_5mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_6mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_6mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_8mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_8mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_12mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_12mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_20mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_20mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_30mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_30mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_40mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_40mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +OSHW-Logo2_7.3x6mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_7.3x6mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_9.8x8mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_9.8x8mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_14.6x12mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_14.6x12mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_24.3x20mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_24.3x20mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_36.5x30mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_36.5x30mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_48.7x40mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_48.7x40mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo_5.7x6mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_5.7x6mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_7.5x8mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_7.5x8mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_11.4x12mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_11.4x12mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_19x20mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_19x20mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_28.5x30mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_28.5x30mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_38.1x40mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_38.1x40mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Symbol_6.7x6mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_6.7x6mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_8.9x8mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_8.9x8mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_13.4x12mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_13.4x12mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_22.3x20mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_22.3x20mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_33.5x30mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_33.5x30mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_44.5x40mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_44.5x40mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +Polarity_Center_Negative_6mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_8mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_12mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_20mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_30mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_40mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Positive_6mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_8mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_12mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_20mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_30mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_40mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +RoHS-Logo_6mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_8mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_12mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_20mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_30mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_40mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +Symbol_Attention_CopperTop_Big +Symbol, Attention, Copper Top, Big, +Symbol, Attention, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_Attention_CopperTop_Small +Symbol, Attention, Copper Top, Small, +Symbol, Attention, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_Barrel_Polarity +Barrel connector polarity indicator +barrel polarity +0 +0 +0 +Symbol +Symbol_CC-Attribution_CopperTop_Big +Symbol, CC-Attribution, Copper Top, Big, +Symbol, CC-Attribution, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-Attribution_CopperTop_Small +Symbol, CC-Share Alike, Copper Top, Small, +Symbol, CC-Share Alike, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CC-Noncommercial_CopperTop_Big +Symbol, CC-Noncommercial, Copper Top, Big, +Symbol, CC-Noncommercial, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-Noncommercial_CopperTop_Small +Symbol, CC-Noncommercial Alike, Copper Top, Small, +Symbol, CC-Noncommercial Alike, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CC-PublicDomain_CopperTop_Big +Symbol, CC-PublicDomain, Copper Top, Big, +Symbol, CC-PublicDomain, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-PublicDomain_CopperTop_Small +Symbol, CC-Public Domain, Copper Top, Small, +Symbol, CC-Public Domain, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CC-PublicDomain_SilkScreenTop_Big +Symbol, CC-PublicDomain, SilkScreen Top, Big, +Symbol, CC-PublicDomain, SilkScreen Top, Big, +0 +0 +0 +Symbol +Symbol_CC-ShareAlike_CopperTop_Big +Symbol, CC-Share Alike, Copper Top, Big, +Symbol, CC-Share Alike, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-ShareAlike_CopperTop_Small +Symbol, CC-Share Alike, Copper Top, Small, +Symbol, CC-Share Alike, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommonsPublicDomain_CopperTop_Small +Symbol, Creative Commons Public Domain, CopperTop, Small, +Symbol, Creative Commons Public Domain, CopperTop, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommonsPublicDomain_SilkScreenTop_Small +Symbol, Creative Commons Public Domain, SilkScreenTop, Small, +Symbol, Creative Commons Public Domain, SilkScreen Top, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommons_CopperTop_Type1_Big +Symbol, Creative Commons, CopperTop, Type 1, Big, +Symbol, Creative Commons, CopperTop, Type 1, Big, +0 +0 +0 +Symbol +Symbol_CreativeCommons_CopperTop_Type2_Big +Symbol, Creative Commons, CopperTop, Type 2, Big, +Symbol, Creative Commons, CopperTop, Type 2, Big, +0 +0 +0 +Symbol +Symbol_CreativeCommons_CopperTop_Type2_Small +Symbol, Creative Commons, CopperTop, Type 2, Small, +Symbol, Creative Commons, CopperTop, Type 2, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommons_SilkScreenTop_Type2_Big +Symbol, Creative Commons, SilkScreen Top, Type 2, Big, +Symbol, Creative Commons, SilkScreen Top, Type 2, Big, +0 +0 +0 +Symbol +Symbol_Danger_CopperTop_Big +Symbol, Danger, CopperTop, Big, +Symbol, Danger, CopperTop, Big, +0 +0 +0 +Symbol +Symbol_Danger_CopperTop_Small +Symbol, Danger, Copper Top, Small, +Symbol, Danger, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_ESD-Logo-Text_CopperTop + + +0 +0 +0 +Symbol +Symbol_ESD-Logo_CopperTop +ESD-Logo, similar JEDEC-14, without text, ohne Text, Copper Top, +ESD-Logo, similar JEDEC-14, without text, ohne Text, Copper Top, +0 +0 +0 +Symbol +Symbol_GNU-GPL_CopperTop_Big +Symbol, GNU-GPL, Copper Top, Big, +Symbol, GNU-GPL, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_GNU-GPL_CopperTop_Small +Symbol, GNU-GPL, Copper Top, Small, +Symbol, GNU-GPL, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_GNU-Logo_CopperTop +GNU-Logo, GNU-Head, GNU-Kopf, Copper Top, +GNU-Logo, GNU-Head, GNU-Kopf, Copper Top, +0 +0 +0 +Symbol +Symbol_GNU-Logo_SilkscreenTop +GNU-Logo, GNU-Head, GNU-Kopf, Silkscreen, +GNU-Logo, GNU-Head, GNU-Kopf, Silkscreen, +0 +0 +0 +Symbol +Symbol_HighVoltage_Type1_CopperTop_Big +Symbol, HighVoltage, Type1, Copper Top, Big, +Symbol, HighVoltage, Type1, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_Highvoltage_Type1_CopperTop_Small +Symbol, Highvoltage, Type 1, Copper Top, Small, +Symbol, Highvoltage, Type 1, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_HighVoltage_Type2_CopperTop_Big +Symbol, HighVoltage, Type2, Copper Top, Big, +Symbol, HighVoltage, Type2, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_Highvoltage_Type2_CopperTop_Small +Symbol, Highvoltage, Type 2, Copper Top, Small, +Symbol, Highvoltage, Type 2, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_HighVoltage_Type2_CopperTop_VerySmall +Symbol, High Voltage, Type 2, Copper Top, Very Small, +Symbol, High Voltage, Type 2, Copper Top, Very Small, +0 +0 +0 +Symbol +WEEE-Logo_4.2x6mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_5.6x8mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_8.4x12mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_14x20mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_21x30mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_28.1x40mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +TerminalBlock +TerminalBlock_Altech_AK300-2_P5.00mm +Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf +Altech AK300 terminal block pitch 5.0mm +0 +2 +2 +TerminalBlock +TerminalBlock_Altech_AK300-3_P5.00mm +Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf +Altech AK300 terminal block pitch 5.0mm +0 +3 +3 +TerminalBlock +TerminalBlock_Altech_AK300-4_P5.00mm +Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf +Altech AK300 terminal block pitch 5.0mm +0 +4 +4 +TerminalBlock +TerminalBlock_bornier-2_P5.08mm +simple 2-pin terminal block, pitch 5.08mm, revamped version of bornier2 +terminal block bornier2 +0 +2 +2 +TerminalBlock +TerminalBlock_bornier-3_P5.08mm +simple 3-pin terminal block, pitch 5.08mm, revamped version of bornier3 +terminal block bornier3 +0 +3 +3 +TerminalBlock +TerminalBlock_bornier-4_P5.08mm +simple 4-pin terminal block, pitch 5.08mm, revamped version of bornier4 +terminal block bornier4 +0 +4 +4 +TerminalBlock +TerminalBlock_bornier-5_P5.08mm +simple 5-pin terminal block, pitch 5.08mm, revamped version of bornier5 +terminal block bornier5 +0 +5 +5 +TerminalBlock +TerminalBlock_bornier-6_P5.08mm +simple 6pin terminal block, pitch 5.08mm, revamped version of bornier6 +terminal block bornier6 +0 +6 +6 +TerminalBlock +TerminalBlock_Wuerth_691311400102_P7.62mm +https://katalog.we-online.de/em/datasheet/6913114001xx.pdf +Wuerth WR-TBL Series 3114 terminal block pitch 7.62mm +0 +2 +2 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x02_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 19963, 2 pins, pitch 3.5mm, size 7.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/19963.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 19963 pitch 3.5mm size 7.7x7mm^2 drill 1.2mm pad 2.4mm +0 +2 +2 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x02_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10693, vertical (cable from top), 2 pins, pitch 3.5mm, size 8x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10693.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10693 vertical pitch 3.5mm size 8x8.3mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x03_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 20193, 3 pins, pitch 3.5mm, size 11.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/20193.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 20193 pitch 3.5mm size 11.2x7mm^2 drill 1.2mm pad 2.4mm +0 +3 +3 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x03_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10694, vertical (cable from top), 3 pins, pitch 3.5mm, size 11.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10694.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10694 vertical pitch 3.5mm size 11.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x04_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 20001, 4 pins, pitch 3.5mm, size 14.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/20001.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 20001 pitch 3.5mm size 14.7x7mm^2 drill 1.2mm pad 2.4mm +0 +4 +4 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x04_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10695, vertical (cable from top), 4 pins, pitch 3.5mm, size 15x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10695.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10695 vertical pitch 3.5mm size 15x8.3mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x05_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 20223, 5 pins, pitch 3.5mm, size 18.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/20223.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 20223 pitch 3.5mm size 18.2x7mm^2 drill 1.2mm pad 2.4mm +0 +5 +5 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x05_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10696, vertical (cable from top), 5 pins, pitch 3.5mm, size 18.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10696.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10696 vertical pitch 3.5mm size 18.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x06_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 19964, 6 pins, pitch 3.5mm, size 21.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/19964.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 19964 pitch 3.5mm size 21.7x7mm^2 drill 1.2mm pad 2.4mm +0 +6 +6 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x06_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10697, vertical (cable from top), 6 pins, pitch 3.5mm, size 22x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10697.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10697 vertical pitch 3.5mm size 22x8.3mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x07_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10684, 7 pins, pitch 3.5mm, size 25.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10684.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10684 pitch 3.5mm size 25.2x7mm^2 drill 1.2mm pad 2.4mm +0 +7 +7 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x07_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10698, vertical (cable from top), 7 pins, pitch 3.5mm, size 25.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10698.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10698 vertical pitch 3.5mm size 25.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x08_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 19965, 8 pins, pitch 3.5mm, size 28.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/19965.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 19965 pitch 3.5mm size 28.7x7mm^2 drill 1.2mm pad 2.4mm +0 +8 +8 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x08_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10699, vertical (cable from top), 8 pins, pitch 3.5mm, size 29x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10699.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10699 vertical pitch 3.5mm size 29x8.3mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x09_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10686, 9 pins, pitch 3.5mm, size 32.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10686.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10686 pitch 3.5mm size 32.2x7mm^2 drill 1.2mm pad 2.4mm +0 +9 +9 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x09_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10700, vertical (cable from top), 9 pins, pitch 3.5mm, size 32.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10700.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10700 vertical pitch 3.5mm size 32.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x10_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10687, 10 pins, pitch 3.5mm, size 35.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10687.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10687 pitch 3.5mm size 35.7x7mm^2 drill 1.2mm pad 2.4mm +0 +10 +10 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x10_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10701, vertical (cable from top), 10 pins, pitch 3.5mm, size 36x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10701.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10701 vertical pitch 3.5mm size 36x8.3mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x11_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10688, 11 pins, pitch 3.5mm, size 39.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10688.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10688 pitch 3.5mm size 39.2x7mm^2 drill 1.2mm pad 2.4mm +0 +11 +11 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x11_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10702, vertical (cable from top), 11 pins, pitch 3.5mm, size 39.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10702.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10702 vertical pitch 3.5mm size 39.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x12_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10689, 12 pins, pitch 3.5mm, size 42.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10689.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10689 pitch 3.5mm size 42.7x7mm^2 drill 1.2mm pad 2.4mm +0 +12 +12 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x12_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10703, vertical (cable from top), 12 pins, pitch 3.5mm, size 43x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10703.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10703 vertical pitch 3.5mm size 43x8.3mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x13_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10690, 13 pins, pitch 3.5mm, size 46.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10690.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10690 pitch 3.5mm size 46.2x7mm^2 drill 1.2mm pad 2.4mm +0 +13 +13 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x13_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10704, vertical (cable from top), 13 pins, pitch 3.5mm, size 46.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10704.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10704 vertical pitch 3.5mm size 46.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x14_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10691, 14 pins, pitch 3.5mm, size 49.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10691.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10691 pitch 3.5mm size 49.7x7mm^2 drill 1.2mm pad 2.4mm +0 +14 +14 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x14_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10705, vertical (cable from top), 14 pins, pitch 3.5mm, size 50x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10705.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10705 vertical pitch 3.5mm size 50x8.3mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x15_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10692, 15 pins, pitch 3.5mm, size 53.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10692.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10692 pitch 3.5mm size 53.2x7mm^2 drill 1.2mm pad 2.4mm +0 +15 +15 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x15_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10706, vertical (cable from top), 15 pins, pitch 3.5mm, size 53.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10706.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10706 vertical pitch 3.5mm size 53.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-02_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +2 +2 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-03_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +3 +3 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-04_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +4 +4 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-05_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +5 +5 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-06_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +6 +6 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-07_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +7 +7 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-08_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +8 +8 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-09_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +9 +9 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-10_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +10 +10 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-11_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +11 +11 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-12_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +12 +12 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-13_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +13 +13 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-14_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +14 +14 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-15_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +15 +15 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-16_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +16 +16 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-17_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +17 +17 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-18_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +18 +18 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-19_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +19 +19 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-20_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +20 +20 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-21_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +21 +21 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-22_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +22 +22 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-23_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +23 +23 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-24_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +24 +24 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-25_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +25 +25 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-26_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +26 +26 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-27_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +27 +27 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-28_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +28 +28 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-29_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +29 +29 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-30_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +30 +30 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360271_1x01_Horizontal_ScrewM3.0_Boxed +single screw terminal block Metz Connect 360271, block size 9x7.3mm^2, drill diamater 1.5mm, 1 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 134, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360271 size 9x7.3mm^2 drill 1.5mm pad 3mm +0 +1 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360272_1x01_Horizontal_ScrewM2.6 +single screw terminal block Metz Connect 360272, block size 4x4mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 131, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360272 size 4x4mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360273_1x01_Horizontal_ScrewM2.6_WireProtection +single screw terminal block Metz Connect 360273, block size 5x4mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 131, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360273 size 5x4mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360291_1x01_Horizontal_ScrewM3.0_Boxed +single screw terminal block Metz Connect 360291, block size 9x7.3mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 133, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360291 size 9x7.3mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360322_1x01_Horizontal_ScrewM3.0_WireProtection +single screw terminal block Metz Connect 360322, block size 6x4mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 133, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360322 size 6x4mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360381_1x01_Horizontal_ScrewM3.0 +single screw terminal block Metz Connect 360381, block size 5x5mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 133, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360381 size 5x5mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360410_1x01_Horizontal_ScrewM3.0 +single screw terminal block Metz Connect 360410, block size 5x5mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 132, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360410 size 5x5mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360425_1x01_Horizontal_ScrewM4.0_Boxed +single screw terminal block Metz Connect 360425, block size 9x9mm^2, drill diamater 1.6mm, 4 pads, pad diameter 3.2mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 134, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360425 size 9x9mm^2 drill 1.6mm pad 3.2mm +0 +4 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05502HBWC_1x02_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05502HBWC, 2 pins, pitch 5mm, size 10x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05502HBWC pitch 5mm size 10x10.5mm^2 drill 1.4mm pad 2.8mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05503HBWC_1x03_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05503HBWC, 3 pins, pitch 5mm, size 15x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05503HBWC pitch 5mm size 15x10.5mm^2 drill 1.4mm pad 2.8mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05504HBWC_1x04_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05504HBWC, 4 pins, pitch 5mm, size 20x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05504HBWC pitch 5mm size 20x10.5mm^2 drill 1.4mm pad 2.8mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05505HBWC_1x05_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05505HBWC, 5 pins, pitch 5mm, size 25x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05505HBWC pitch 5mm size 25x10.5mm^2 drill 1.4mm pad 2.8mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05506HBWC_1x06_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05506HBWC, 6 pins, pitch 5mm, size 30x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05506HBWC pitch 5mm size 30x10.5mm^2 drill 1.4mm pad 2.8mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type055_RT01502HDWU_1x02_P5.00mm_Horizontal +terminal block Metz Connect Type055_RT01502HDWU, 2 pins, pitch 5mm, size 10x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310551_RT015xxHDWU_OFF-022723S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type055_RT01502HDWU pitch 5mm size 10x8mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type055_RT01503HDWU_1x03_P5.00mm_Horizontal +terminal block Metz Connect Type055_RT01503HDWU, 3 pins, pitch 5mm, size 15x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310551_RT015xxHDWU_OFF-022723S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type055_RT01503HDWU pitch 5mm size 15x8mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type055_RT01504HDWU_1x04_P5.00mm_Horizontal +terminal block Metz Connect Type055_RT01504HDWU, 4 pins, pitch 5mm, size 20x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310551_RT015xxHDWU_OFF-022723S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type055_RT01504HDWU pitch 5mm size 20x8mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06302HBWC_1x02_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06302HBWC, 2 pins, pitch 3.5mm, size 7x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06302HBWC pitch 3.5mm size 7x6.5mm^2 drill 1.2mm pad 2.3mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06303HBWC_1x03_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06303HBWC, 3 pins, pitch 3.5mm, size 10.5x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06303HBWC pitch 3.5mm size 10.5x6.5mm^2 drill 1.2mm pad 2.3mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06304HBWC_1x04_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06304HBWC, 4 pins, pitch 3.5mm, size 14x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06304HBWC pitch 3.5mm size 14x6.5mm^2 drill 1.2mm pad 2.3mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06305HBWC_1x05_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06305HBWC, 5 pins, pitch 3.5mm, size 17.5x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06305HBWC pitch 3.5mm size 17.5x6.5mm^2 drill 1.2mm pad 2.3mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06306HBWC_1x06_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06306HBWC, 6 pins, pitch 3.5mm, size 21x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06306HBWC pitch 3.5mm size 21x6.5mm^2 drill 1.2mm pad 2.3mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01902HDWC_1x02_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01902HDWC, 2 pins, pitch 10mm, size 15.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01902HDWC pitch 10mm size 15.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01903HDWC_1x03_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01903HDWC, 3 pins, pitch 10mm, size 25.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01903HDWC pitch 10mm size 25.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01904HDWC_1x04_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01904HDWC, 4 pins, pitch 10mm, size 35.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01904HDWC pitch 10mm size 35.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01905HDWC_1x05_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01905HDWC, 5 pins, pitch 10mm, size 45.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01905HDWC pitch 10mm size 45.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type073_RT02602HBLU_1x02_P5.08mm_Horizontal +terminal block Metz Connect Type073_RT02602HBLU, 2 pins, pitch 5.08mm, size 10.2x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310731_RT026xxHBLU_OFF-022792U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type073_RT02602HBLU pitch 5.08mm size 10.2x11mm^2 drill 1.4mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type073_RT02603HBLU_1x03_P5.08mm_Horizontal +terminal block Metz Connect Type073_RT02603HBLU, 3 pins, pitch 5.08mm, size 15.2x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310731_RT026xxHBLU_OFF-022792U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type073_RT02603HBLU pitch 5.08mm size 15.2x11mm^2 drill 1.4mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03402HBLC_1x02_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03402HBLC, 2 pins, pitch 3.81mm, size 7.51x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03402HBLC pitch 3.81mm size 7.51x7.3mm^2 drill 0.7mm pad 1.4mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03403HBLC_1x03_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03403HBLC, 3 pins, pitch 3.81mm, size 11.3x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03403HBLC pitch 3.81mm size 11.3x7.3mm^2 drill 0.7mm pad 1.4mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03404HBLC_1x04_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03404HBLC, 4 pins, pitch 3.81mm, size 15.1x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03404HBLC pitch 3.81mm size 15.1x7.3mm^2 drill 0.7mm pad 1.4mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03405HBLC_1x05_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03405HBLC, 5 pins, pitch 3.81mm, size 18.9x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03405HBLC pitch 3.81mm size 18.9x7.3mm^2 drill 0.7mm pad 1.4mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03406HBLC_1x06_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03406HBLC, 6 pins, pitch 3.81mm, size 22.8x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03406HBLC pitch 3.81mm size 22.8x7.3mm^2 drill 0.7mm pad 1.4mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03502HBLU_1x02_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03502HBLU, 2 pins, pitch 5mm, size 10x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03502HBLU pitch 5mm size 10x8.3mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03503HBLU_1x03_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03503HBLU, 3 pins, pitch 5mm, size 15x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03503HBLU pitch 5mm size 15x8.3mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03504HBLU_1x04_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03504HBLU, 4 pins, pitch 5mm, size 20x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03504HBLU pitch 5mm size 20x8.3mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03505HBLU_1x05_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03505HBLU, 5 pins, pitch 5mm, size 25x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03505HBLU pitch 5mm size 25x8.3mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03506HBLU_1x06_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03506HBLU, 6 pins, pitch 5mm, size 30x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03506HBLU pitch 5mm size 30x8.3mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01602HBWC_1x02_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01602HBWC, 2 pins, pitch 5.08mm, size 10.2x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01602HBWC pitch 5.08mm size 10.2x8mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01603HBWC_1x03_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01603HBWC, 3 pins, pitch 5.08mm, size 15.2x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01603HBWC pitch 5.08mm size 15.2x8mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01604HBWC_1x04_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01604HBWC, 4 pins, pitch 5.08mm, size 20.3x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01604HBWC pitch 5.08mm size 20.3x8mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01605HBWC_1x05_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01605HBWC, 5 pins, pitch 5.08mm, size 25.4x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01605HBWC pitch 5.08mm size 25.4x8mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01606HBWC_1x06_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01606HBWC, 6 pins, pitch 5.08mm, size 30.5x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01606HBWC pitch 5.08mm size 30.5x8mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13702HBWC_1x02_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13702HBWC, 2 pins, pitch 7.5mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13702HBWC pitch 7.5mm size 15x9mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13703HBWC_1x03_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13703HBWC, 3 pins, pitch 7.5mm, size 22.5x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13703HBWC pitch 7.5mm size 22.5x9mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13704HBWC_1x04_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13704HBWC, 4 pins, pitch 7.5mm, size 30x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13704HBWC pitch 7.5mm size 30x9mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13705HBWC_1x05_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13705HBWC, 5 pins, pitch 7.5mm, size 37.5x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13705HBWC pitch 7.5mm size 37.5x9mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13706HBWC_1x06_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13706HBWC, 6 pins, pitch 7.5mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13706HBWC pitch 7.5mm size 45x9mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02702HBLC_1x02_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02702HBLC, 2 pins, pitch 7.5mm, size 15x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02702HBLC pitch 7.5mm size 15x11mm^2 drill 1.4mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02703HBLC_1x03_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02703HBLC, 3 pins, pitch 7.5mm, size 22.5x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02703HBLC pitch 7.5mm size 22.5x11mm^2 drill 1.4mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02704HBLC_1x04_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02704HBLC, 4 pins, pitch 7.5mm, size 30x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02704HBLC pitch 7.5mm size 30x11mm^2 drill 1.4mm pad 2.6mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02705HBLC_1x05_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02705HBLC, 5 pins, pitch 7.5mm, size 37.5x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02705HBLC pitch 7.5mm size 37.5x11mm^2 drill 1.4mm pad 2.6mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02706HBLC_1x06_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02706HBLC, 6 pins, pitch 7.5mm, size 45x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02706HBLC pitch 7.5mm size 45x11mm^2 drill 1.4mm pad 2.6mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04502UBLC_1x02_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04502UBLC, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 10x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04502UBLC 45Degree pitch 5mm size 10x12.5mm^2 drill 1.4mm pad 2.7mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04503UBLC_1x03_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04503UBLC, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 15x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04503UBLC 45Degree pitch 5mm size 15x12.5mm^2 drill 1.4mm pad 2.7mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04504UBLC_1x04_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04504UBLC, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 20x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04504UBLC 45Degree pitch 5mm size 20x12.5mm^2 drill 1.4mm pad 2.7mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04505UBLC_1x05_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04505UBLC, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 25x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04505UBLC 45Degree pitch 5mm size 25x12.5mm^2 drill 1.4mm pad 2.7mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04506UBLC_1x06_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04506UBLC, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 30x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04506UBLC 45Degree pitch 5mm size 30x12.5mm^2 drill 1.4mm pad 2.7mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type701_RT11L02HGLU_1x02_P6.35mm_Horizontal +terminal block Metz Connect Type701_RT11L02HGLU, 2 pins, pitch 6.35mm, size 12.7x12.5mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317011_RT11LxxHGLU_OFF-022798U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type701_RT11L02HGLU pitch 6.35mm size 12.7x12.5mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type701_RT11L03HGLU_1x03_P6.35mm_Horizontal +terminal block Metz Connect Type701_RT11L03HGLU, 3 pins, pitch 6.35mm, size 19x12.5mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317011_RT11LxxHGLU_OFF-022798U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type701_RT11L03HGLU pitch 6.35mm size 19x12.5mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type703_RT10N02HGLU_1x02_P9.52mm_Horizontal +terminal block Metz Connect Type703_RT10N02HGLU, 2 pins, pitch 9.52mm, size 19x12.5mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317031_RT10NxxHGLU_OFF-022897S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type703_RT10N02HGLU pitch 9.52mm size 19x12.5mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type703_RT10N03HGLU_1x03_P9.52mm_Horizontal +terminal block Metz Connect Type703_RT10N03HGLU, 3 pins, pitch 9.52mm, size 28.6x12.5mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317031_RT10NxxHGLU_OFF-022897S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type703_RT10N03HGLU pitch 9.52mm size 28.6x12.5mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Philmore +TerminalBlock_Philmore_TB132_1x02_P5.00mm_Horizontal +Terminal Block Philmore , 2 pins, pitch 5mm, size 10x10.2mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.philmore-datak.com/mc/Page%20197.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Philmore +THT Terminal Block Philmore pitch 5mm size 10x10.2mm^2 drill 1.2mm pad 2.4mm +0 +2 +2 +TerminalBlock_Philmore +TerminalBlock_Philmore_TB133_1x03_P5.00mm_Horizontal +Terminal Block Philmore , 3 pins, pitch 5mm, size 15x10.2mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.philmore-datak.com/mc/Page%20197.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Philmore +THT Terminal Block Philmore pitch 5mm size 15x10.2mm^2 drill 1.2mm pad 2.4mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-2-5.08_1x02_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-2-5.08, 2 pins, pitch 5.08mm, size 10.2x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-2-5.08 pitch 5.08mm size 10.2x9.8mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-2_1x02_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-2, 2 pins, pitch 5mm, size 10x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-2 pitch 5mm size 10x9.8mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-3-5.08_1x03_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-3-5.08, 3 pins, pitch 5.08mm, size 15.2x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-3-5.08 pitch 5.08mm size 15.2x9.8mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-3_1x03_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-3, 3 pins, pitch 5mm, size 15x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-3 pitch 5mm size 15x9.8mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-4-5.08_1x04_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-4-5.08, 4 pins, pitch 5.08mm, size 20.3x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-4-5.08 pitch 5.08mm size 20.3x9.8mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-4_1x04_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-4, 4 pins, pitch 5mm, size 20x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-4 pitch 5mm size 20x9.8mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-5-5.08_1x05_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-5-5.08, 5 pins, pitch 5.08mm, size 25.4x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-5-5.08 pitch 5.08mm size 25.4x9.8mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-5_1x05_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-5, 5 pins, pitch 5mm, size 25x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-5 pitch 5mm size 25x9.8mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-6-5.08_1x06_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-6-5.08, 6 pins, pitch 5.08mm, size 30.5x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-6-5.08 pitch 5.08mm size 30.5x9.8mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-6_1x06_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-6, 6 pins, pitch 5mm, size 30x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-6 pitch 5mm size 30x9.8mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-7-5.08_1x07_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-7-5.08, 7 pins, pitch 5.08mm, size 35.6x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-7-5.08 pitch 5.08mm size 35.6x9.8mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-7_1x07_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-7, 7 pins, pitch 5mm, size 35x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-7 pitch 5mm size 35x9.8mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-8-5.08_1x08_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-8-5.08, 8 pins, pitch 5.08mm, size 40.6x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-8-5.08 pitch 5.08mm size 40.6x9.8mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-8_1x08_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-8, 8 pins, pitch 5mm, size 40x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-8 pitch 5mm size 40x9.8mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-9-5.08_1x09_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-9-5.08, 9 pins, pitch 5.08mm, size 45.7x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-9-5.08 pitch 5.08mm size 45.7x9.8mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-9_1x09_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-9, 9 pins, pitch 5mm, size 45x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-9 pitch 5mm size 45x9.8mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-10-5.08_1x10_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-10-5.08, 10 pins, pitch 5.08mm, size 50.8x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-10-5.08 pitch 5.08mm size 50.8x9.8mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-10_1x10_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-10, 10 pins, pitch 5mm, size 50x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-10 pitch 5mm size 50x9.8mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-11-5.08_1x11_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-11-5.08, 11 pins, pitch 5.08mm, size 55.9x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-11-5.08 pitch 5.08mm size 55.9x9.8mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-11_1x11_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-11, 11 pins, pitch 5mm, size 55x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-11 pitch 5mm size 55x9.8mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-12-5.08_1x12_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-12-5.08, 12 pins, pitch 5.08mm, size 61x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-12-5.08 pitch 5.08mm size 61x9.8mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-12_1x12_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-12, 12 pins, pitch 5mm, size 60x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-12 pitch 5mm size 60x9.8mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-13-5.08_1x13_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-13-5.08, 13 pins, pitch 5.08mm, size 66x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-13-5.08 pitch 5.08mm size 66x9.8mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-13_1x13_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-13, 13 pins, pitch 5mm, size 65x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-13 pitch 5mm size 65x9.8mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-14-5.08_1x14_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-14-5.08, 14 pins, pitch 5.08mm, size 71.1x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-14-5.08 pitch 5.08mm size 71.1x9.8mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-14_1x14_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-14, 14 pins, pitch 5mm, size 70x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-14 pitch 5mm size 70x9.8mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-15-5.08_1x15_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-15-5.08, 15 pins, pitch 5.08mm, size 76.2x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-15-5.08 pitch 5.08mm size 76.2x9.8mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-15_1x15_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-15, 15 pins, pitch 5mm, size 75x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-15 pitch 5mm size 75x9.8mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-16-5.08_1x16_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-16-5.08, 16 pins, pitch 5.08mm, size 81.3x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-16-5.08 pitch 5.08mm size 81.3x9.8mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-16_1x16_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-16, 16 pins, pitch 5mm, size 80x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-16 pitch 5mm size 80x9.8mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-2-5.08_1x02_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-2-5.08, 2 pins, pitch 5.08mm, size 10.2x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-2-5.08 pitch 5.08mm size 10.2x11.2mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-3-5.08_1x03_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-3-5.08, 3 pins, pitch 5.08mm, size 15.2x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-3-5.08 pitch 5.08mm size 15.2x11.2mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-4-5.08_1x04_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-4-5.08, 4 pins, pitch 5.08mm, size 20.3x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-4-5.08 pitch 5.08mm size 20.3x11.2mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-5-5.08_1x05_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-5-5.08, 5 pins, pitch 5.08mm, size 25.4x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-5-5.08 pitch 5.08mm size 25.4x11.2mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-6-5.08_1x06_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-6-5.08, 6 pins, pitch 5.08mm, size 30.5x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-6-5.08 pitch 5.08mm size 30.5x11.2mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-7-5.08_1x07_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-7-5.08, 7 pins, pitch 5.08mm, size 35.6x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-7-5.08 pitch 5.08mm size 35.6x11.2mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-8-5.08_1x08_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-8-5.08, 8 pins, pitch 5.08mm, size 40.6x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-8-5.08 pitch 5.08mm size 40.6x11.2mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-9-5.08_1x09_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-9-5.08, 9 pins, pitch 5.08mm, size 45.7x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-9-5.08 pitch 5.08mm size 45.7x11.2mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-10-5.08_1x10_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-10-5.08, 10 pins, pitch 5.08mm, size 50.8x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-10-5.08 pitch 5.08mm size 50.8x11.2mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-11-5.08_1x11_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-11-5.08, 11 pins, pitch 5.08mm, size 55.9x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-11-5.08 pitch 5.08mm size 55.9x11.2mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-12-5.08_1x12_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-12-5.08, 12 pins, pitch 5.08mm, size 61x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-12-5.08 pitch 5.08mm size 61x11.2mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-13-5.08_1x13_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-13-5.08, 13 pins, pitch 5.08mm, size 66x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-13-5.08 pitch 5.08mm size 66x11.2mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-14-5.08_1x14_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-14-5.08, 14 pins, pitch 5.08mm, size 71.1x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-14-5.08 pitch 5.08mm size 71.1x11.2mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-15-5.08_1x15_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-15-5.08, 15 pins, pitch 5.08mm, size 76.2x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-15-5.08 pitch 5.08mm size 76.2x11.2mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-16-5.08_1x16_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-16-5.08, 16 pins, pitch 5.08mm, size 81.3x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-16-5.08 pitch 5.08mm size 81.3x11.2mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-2-2.54_1x02_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-2-2.54, 2 pins, pitch 2.54mm, size 5.54x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725656-920552.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-2-2.54 pitch 2.54mm size 5.54x6.2mm^2 drill 1.1mm pad 2.2mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-3-2.54_1x03_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-3-2.54, 3 pins, pitch 2.54mm, size 8.08x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725656-920552.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-3-2.54 pitch 2.54mm size 8.08x6.2mm^2 drill 1.1mm pad 2.2mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-4-2.54_1x04_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-4-2.54, 4 pins, pitch 2.54mm, size 10.6x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-4-2.54 pitch 2.54mm size 10.6x6.2mm^2 drill 1.1mm pad 2.2mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-5-2.54_1x05_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-5-2.54, 5 pins, pitch 2.54mm, size 13.2x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-5-2.54 pitch 2.54mm size 13.2x6.2mm^2 drill 1.1mm pad 2.2mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-6-2.54_1x06_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-6-2.54, 6 pins, pitch 2.54mm, size 15.7x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-6-2.54 pitch 2.54mm size 15.7x6.2mm^2 drill 1.1mm pad 2.2mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-7-2.54_1x07_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-7-2.54, 7 pins, pitch 2.54mm, size 18.2x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-7-2.54 pitch 2.54mm size 18.2x6.2mm^2 drill 1.1mm pad 2.2mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-8-2.54_1x08_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-8-2.54, 8 pins, pitch 2.54mm, size 20.8x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-8-2.54 pitch 2.54mm size 20.8x6.2mm^2 drill 1.1mm pad 2.2mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-9-2.54_1x09_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-9-2.54, 9 pins, pitch 2.54mm, size 23.3x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-9-2.54 pitch 2.54mm size 23.3x6.2mm^2 drill 1.1mm pad 2.2mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-10-2.54_1x10_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-10-2.54, 10 pins, pitch 2.54mm, size 25.9x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-10-2.54 pitch 2.54mm size 25.9x6.2mm^2 drill 1.1mm pad 2.2mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-11-2.54_1x11_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-11-2.54, 11 pins, pitch 2.54mm, size 28.4x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-11-2.54 pitch 2.54mm size 28.4x6.2mm^2 drill 1.1mm pad 2.2mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-12-2.54_1x12_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-12-2.54, 12 pins, pitch 2.54mm, size 30.9x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-12-2.54 pitch 2.54mm size 30.9x6.2mm^2 drill 1.1mm pad 2.2mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-2-3.5-H_1x02_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-2-3.5-H, 2 pins, pitch 3.5mm, size 7x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-2-3.5-H pitch 3.5mm size 7x7.6mm^2 drill 1.2mm pad 2.4mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-2-5.0-H_1x02_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-2-5.0-H, 2 pins, pitch 5mm, size 10x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-2-5.0-H pitch 5mm size 10x9mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-3-3.5-H_1x03_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-3-3.5-H, 3 pins, pitch 3.5mm, size 10.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-3-3.5-H pitch 3.5mm size 10.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-3-5.0-H_1x03_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-3-5.0-H, 3 pins, pitch 5mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-3-5.0-H pitch 5mm size 15x9mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-4-3.5-H_1x04_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-4-3.5-H, 4 pins, pitch 3.5mm, size 14x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-4-3.5-H pitch 3.5mm size 14x7.6mm^2 drill 1.2mm pad 2.4mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-4-5.0-H_1x04_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-4-5.0-H, 4 pins, pitch 5mm, size 20x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-4-5.0-H pitch 5mm size 20x9mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-5-3.5-H_1x05_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-5-3.5-H, 5 pins, pitch 3.5mm, size 17.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-5-3.5-H pitch 3.5mm size 17.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-5-5.0-H_1x05_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-5-5.0-H, 5 pins, pitch 5mm, size 25x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-5-5.0-H pitch 5mm size 25x9mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-6-3.5-H_1x06_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-6-3.5-H, 6 pins, pitch 3.5mm, size 21x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-6-3.5-H pitch 3.5mm size 21x7.6mm^2 drill 1.2mm pad 2.4mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-6-5.0-H_1x06_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-6-5.0-H, 6 pins, pitch 5mm, size 30x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-6-5.0-H pitch 5mm size 30x9mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-7-3.5-H_1x07_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-7-3.5-H, 7 pins, pitch 3.5mm, size 24.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-7-3.5-H pitch 3.5mm size 24.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-7-5.0-H_1x07_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-7-5.0-H, 7 pins, pitch 5mm, size 35x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-7-5.0-H pitch 5mm size 35x9mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-8-3.5-H_1x08_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-8-3.5-H, 8 pins, pitch 3.5mm, size 28x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-8-3.5-H pitch 3.5mm size 28x7.6mm^2 drill 1.2mm pad 2.4mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-8-5.0-H_1x08_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-8-5.0-H, 8 pins, pitch 5mm, size 40x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-8-5.0-H pitch 5mm size 40x9mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-9-3.5-H_1x09_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-9-3.5-H, 9 pins, pitch 3.5mm, size 31.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-9-3.5-H pitch 3.5mm size 31.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-9-5.0-H_1x09_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-9-5.0-H, 9 pins, pitch 5mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-9-5.0-H pitch 5mm size 45x9mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-10-3.5-H_1x10_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-10-3.5-H, 10 pins, pitch 3.5mm, size 35x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-10-3.5-H pitch 3.5mm size 35x7.6mm^2 drill 1.2mm pad 2.4mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-10-5.0-H_1x10_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-10-5.0-H, 10 pins, pitch 5mm, size 50x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-10-5.0-H pitch 5mm size 50x9mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-11-3.5-H_1x11_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-11-3.5-H, 11 pins, pitch 3.5mm, size 38.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-11-3.5-H pitch 3.5mm size 38.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-11-5.0-H_1x11_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-11-5.0-H, 11 pins, pitch 5mm, size 55x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-11-5.0-H pitch 5mm size 55x9mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-12-3.5-H_1x12_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-12-3.5-H, 12 pins, pitch 3.5mm, size 42x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-12-3.5-H pitch 3.5mm size 42x7.6mm^2 drill 1.2mm pad 2.4mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-12-5.0-H_1x12_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-12-5.0-H, 12 pins, pitch 5mm, size 60x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-12-5.0-H pitch 5mm size 60x9mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-13-3.5-H_1x13_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-13-3.5-H, 13 pins, pitch 3.5mm, size 45.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-13-3.5-H pitch 3.5mm size 45.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-13-5.0-H_1x13_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-13-5.0-H, 13 pins, pitch 5mm, size 65x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-13-5.0-H pitch 5mm size 65x9mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-14-3.5-H_1x14_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-14-3.5-H, 14 pins, pitch 3.5mm, size 49x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-14-3.5-H pitch 3.5mm size 49x7.6mm^2 drill 1.2mm pad 2.4mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-14-5.0-H_1x14_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-14-5.0-H, 14 pins, pitch 5mm, size 70x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-14-5.0-H pitch 5mm size 70x9mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-15-3.5-H_1x15_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-15-3.5-H, 15 pins, pitch 3.5mm, size 52.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-15-3.5-H pitch 3.5mm size 52.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-15-5.0-H_1x15_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-15-5.0-H, 15 pins, pitch 5mm, size 75x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-15-5.0-H pitch 5mm size 75x9mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-16-3.5-H_1x16_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-16-3.5-H, 16 pins, pitch 3.5mm, size 56x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-16-3.5-H pitch 3.5mm size 56x7.6mm^2 drill 1.2mm pad 2.4mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-16-5.0-H_1x16_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-16-5.0-H, 16 pins, pitch 5mm, size 80x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-16-5.0-H pitch 5mm size 80x9mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-2,5-V-SMD_1x02-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 2 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814702/pdf +PhoenixContact PTSM0.5 2 2.5mm vertical SMD spring clamp terminal block connector +0 +4 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-2.5-H-THR_1x02_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-2-2.5-H-THR, 2 pins, pitch 2.5mm, size 7.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-2-2.5-H-THR pitch 2.5mm size 7.2x10mm^2 drill 1.2mm pad 3mm +0 +4 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-2.5-V-THR_1x02_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-2-2.5-V-THR, vertical (cable from top), 2 pins, pitch 2.5mm, size 5.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-2-2.5-V-THR vertical pitch 2.5mm size 5.5x5mm^2 drill 1.2mm pad 2mm +0 +4 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-HV-2.5-SMD_1x02-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 2 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778696/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +4 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-2,5-V-SMD_1x03-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 3 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814715/pdf +PhoenixContact PTSM0.5 3 2.5mm vertical SMD spring clamp terminal block connector +0 +5 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-2.5-H-THR_1x03_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-3-2.5-H-THR, 3 pins, pitch 2.5mm, size 9.7x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-3-2.5-H-THR pitch 2.5mm size 9.7x10mm^2 drill 1.2mm pad 3mm +0 +6 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-2.5-V-THR_1x03_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-3-2.5-V-THR, vertical (cable from top), 3 pins, pitch 2.5mm, size 8x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-3-2.5-V-THR vertical pitch 2.5mm size 8x5mm^2 drill 1.2mm pad 2mm +0 +6 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-HV-2.5-SMD_1x03-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 3 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778706/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +5 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-2,5-V-SMD_1x04-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 4 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814728/pdf +PhoenixContact PTSM0.5 4 2.5mm vertical SMD spring clamp terminal block connector +0 +6 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-2.5-H-THR_1x04_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-4-2.5-H-THR, 4 pins, pitch 2.5mm, size 12.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-4-2.5-H-THR pitch 2.5mm size 12.2x10mm^2 drill 1.2mm pad 3mm +0 +8 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-2.5-V-THR_1x04_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-4-2.5-V-THR, vertical (cable from top), 4 pins, pitch 2.5mm, size 10.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-4-2.5-V-THR vertical pitch 2.5mm size 10.5x5mm^2 drill 1.2mm pad 2mm +0 +8 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-HV-2.5-SMD_1x04-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 4 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778719/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +4 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-2,5-V-SMD_1x05-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 5 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814731/pdf +PhoenixContact PTSM0.5 5 2.5mm vertical SMD spring clamp terminal block connector +0 +7 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-2.5-H-THR_1x05_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-5-2.5-H-THR, 5 pins, pitch 2.5mm, size 14.7x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-5-2.5-H-THR pitch 2.5mm size 14.7x10mm^2 drill 1.2mm pad 3mm +0 +10 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-2.5-V-THR_1x05_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-5-2.5-V-THR, vertical (cable from top), 5 pins, pitch 2.5mm, size 13x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-5-2.5-V-THR vertical pitch 2.5mm size 13x5mm^2 drill 1.2mm pad 2mm +0 +10 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-HV-2.5-SMD_1x05-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 5 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778722/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +7 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-2,5-V-SMD_1x06-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 6 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814744/pdf +PhoenixContact PTSM0.5 6 2.5mm vertical SMD spring clamp terminal block connector +0 +8 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-2.5-H-THR_1x06_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-6-2.5-H-THR, 6 pins, pitch 2.5mm, size 17.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-6-2.5-H-THR pitch 2.5mm size 17.2x10mm^2 drill 1.2mm pad 3mm +0 +12 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-2.5-V-THR_1x06_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-6-2.5-V-THR, vertical (cable from top), 6 pins, pitch 2.5mm, size 15.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-6-2.5-V-THR vertical pitch 2.5mm size 15.5x5mm^2 drill 1.2mm pad 2mm +0 +12 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-HV-2.5-SMD_1x06-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 6 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778735/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +8 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-2,5-V-SMD_1x07-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 7 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814757/pdf +PhoenixContact PTSM0.5 7 2.5mm vertical SMD spring clamp terminal block connector +0 +9 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-2.5-H-THR_1x07_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-7-2.5-H-THR, 7 pins, pitch 2.5mm, size 19.7x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-7-2.5-H-THR pitch 2.5mm size 19.7x10mm^2 drill 1.2mm pad 3mm +0 +14 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-2.5-V-THR_1x07_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-7-2.5-V-THR, vertical (cable from top), 7 pins, pitch 2.5mm, size 18x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-7-2.5-V-THR vertical pitch 2.5mm size 18x5mm^2 drill 1.2mm pad 2mm +0 +14 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-HV-2.5-SMD_1x07-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 7 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778748/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +9 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-2,5-V-SMD_1x08-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 8 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814760/pdf +PhoenixContact PTSM0.5 8 2.5mm vertical SMD spring clamp terminal block connector +0 +10 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-2.5-H-THR_1x08_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-8-2.5-H-THR, 8 pins, pitch 2.5mm, size 22.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-8-2.5-H-THR pitch 2.5mm size 22.2x10mm^2 drill 1.2mm pad 3mm +0 +16 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-2.5-V-THR_1x08_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-8-2.5-V-THR, vertical (cable from top), 8 pins, pitch 2.5mm, size 20.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-8-2.5-V-THR vertical pitch 2.5mm size 20.5x5mm^2 drill 1.2mm pad 2mm +0 +16 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-HV-2.5-SMD_1x08-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 8 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778751/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +10 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00001_1x02_P5.00mm_Horizontal +terminal block RND 205-00001, 2 pins, pitch 5mm, size 10x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00001 pitch 5mm size 10x9mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00002_1x03_P5.00mm_Horizontal +terminal block RND 205-00002, 3 pins, pitch 5mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00002 pitch 5mm size 15x9mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00003_1x04_P5.00mm_Horizontal +terminal block RND 205-00003, 4 pins, pitch 5mm, size 20x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00003 pitch 5mm size 20x9mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00004_1x05_P5.00mm_Horizontal +terminal block RND 205-00004, 5 pins, pitch 5mm, size 25x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00004 pitch 5mm size 25x9mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00005_1x06_P5.00mm_Horizontal +terminal block RND 205-00005, 6 pins, pitch 5mm, size 30x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00005 pitch 5mm size 30x9mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00006_1x07_P5.00mm_Horizontal +terminal block RND 205-00006, 7 pins, pitch 5mm, size 35x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00006 pitch 5mm size 35x9mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00007_1x08_P5.00mm_Horizontal +terminal block RND 205-00007, 8 pins, pitch 5mm, size 40x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00007 pitch 5mm size 40x9mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00008_1x09_P5.00mm_Horizontal +terminal block RND 205-00008, 9 pins, pitch 5mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00008 pitch 5mm size 45x9mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00009_1x10_P5.00mm_Horizontal +terminal block RND 205-00009, 10 pins, pitch 5mm, size 50x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00009 pitch 5mm size 50x9mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00010_1x11_P5.00mm_Horizontal +terminal block RND 205-00010, 11 pins, pitch 5mm, size 55x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00010 pitch 5mm size 55x9mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00011_1x12_P5.00mm_Horizontal +terminal block RND 205-00011, 12 pins, pitch 5mm, size 60x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00011 pitch 5mm size 60x9mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00012_1x02_P5.00mm_Horizontal +terminal block RND 205-00012, 2 pins, pitch 5mm, size 10x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00012 pitch 5mm size 10x7.6mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00013_1x03_P5.00mm_Horizontal +terminal block RND 205-00013, 3 pins, pitch 5mm, size 15x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00013 pitch 5mm size 15x7.6mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00014_1x04_P5.00mm_Horizontal +terminal block RND 205-00014, 4 pins, pitch 5mm, size 20x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00014 pitch 5mm size 20x7.6mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00015_1x05_P5.00mm_Horizontal +terminal block RND 205-00015, 5 pins, pitch 5mm, size 25x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00015 pitch 5mm size 25x7.6mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00016_1x06_P5.00mm_Horizontal +terminal block RND 205-00016, 6 pins, pitch 5mm, size 30x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00016 pitch 5mm size 30x7.6mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00017_1x07_P5.00mm_Horizontal +terminal block RND 205-00017, 7 pins, pitch 5mm, size 35x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00017 pitch 5mm size 35x7.6mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00018_1x08_P5.00mm_Horizontal +terminal block RND 205-00018, 8 pins, pitch 5mm, size 40x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00018 pitch 5mm size 40x7.6mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00019_1x09_P5.00mm_Horizontal +terminal block RND 205-00019, 9 pins, pitch 5mm, size 45x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00019 pitch 5mm size 45x7.6mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00020_1x10_P5.00mm_Horizontal +terminal block RND 205-00020, 10 pins, pitch 5mm, size 50x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00020 pitch 5mm size 50x7.6mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00021_1x11_P5.00mm_Horizontal +terminal block RND 205-00021, 11 pins, pitch 5mm, size 55x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00021 pitch 5mm size 55x7.6mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00022_1x12_P5.00mm_Horizontal +terminal block RND 205-00022, 12 pins, pitch 5mm, size 60x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00022 pitch 5mm size 60x7.6mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00023_1x02_P10.00mm_Horizontal +terminal block RND 205-00023, 2 pins, pitch 10mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00023 pitch 10mm size 15x9mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00024_1x03_P10.00mm_Horizontal +terminal block RND 205-00024, 3 pins, pitch 10mm, size 25x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00024 pitch 10mm size 25x9mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00025_1x04_P10.00mm_Horizontal +terminal block RND 205-00025, 4 pins, pitch 10mm, size 35x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00025 pitch 10mm size 35x9mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00026_1x05_P10.00mm_Horizontal +terminal block RND 205-00026, 5 pins, pitch 10mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00026 pitch 10mm size 45x9mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00027_1x06_P10.00mm_Horizontal +terminal block RND 205-00027, 6 pins, pitch 10mm, size 55x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00027 pitch 10mm size 55x9mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00028_1x07_P10.00mm_Horizontal +terminal block RND 205-00028, 7 pins, pitch 10mm, size 65x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00028 pitch 10mm size 65x9mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00029_1x08_P10.00mm_Horizontal +terminal block RND 205-00029, 8 pins, pitch 10mm, size 75x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00029 pitch 10mm size 75x9mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00030_1x09_P10.00mm_Horizontal +terminal block RND 205-00030, 9 pins, pitch 10mm, size 85x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00030 pitch 10mm size 85x9mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00031_1x10_P10.00mm_Horizontal +terminal block RND 205-00031, 10 pins, pitch 10mm, size 95x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00031 pitch 10mm size 95x9mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00032_1x11_P10.00mm_Horizontal +terminal block RND 205-00032, 11 pins, pitch 10mm, size 105x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00032 pitch 10mm size 105x9mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00033_1x12_P10.00mm_Horizontal +terminal block RND 205-00033, 12 pins, pitch 10mm, size 115x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00033 pitch 10mm size 115x9mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00045_1x02_P5.00mm_Horizontal +terminal block RND 205-00045, 2 pins, pitch 5mm, size 10x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00045 pitch 5mm size 10x8.1mm^2 drill 1.1mm pad 2.1mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00046_1x03_P5.00mm_Horizontal +terminal block RND 205-00046, 3 pins, pitch 5mm, size 15x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00046 pitch 5mm size 15x8.1mm^2 drill 1.1mm pad 2.1mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00047_1x04_P5.00mm_Horizontal +terminal block RND 205-00047, 4 pins, pitch 5mm, size 20x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00047 pitch 5mm size 20x8.1mm^2 drill 1.1mm pad 2.1mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00048_1x05_P5.00mm_Horizontal +terminal block RND 205-00048, 5 pins, pitch 5mm, size 25x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00048 pitch 5mm size 25x8.1mm^2 drill 1.1mm pad 2.1mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00049_1x06_P5.00mm_Horizontal +terminal block RND 205-00049, 6 pins, pitch 5mm, size 30x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00049 pitch 5mm size 30x8.1mm^2 drill 1.1mm pad 2.1mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00050_1x07_P5.00mm_Horizontal +terminal block RND 205-00050, 7 pins, pitch 5mm, size 35x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00050 pitch 5mm size 35x8.1mm^2 drill 1.1mm pad 2.1mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00051_1x08_P5.00mm_Horizontal +terminal block RND 205-00051, 8 pins, pitch 5mm, size 40x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00051 pitch 5mm size 40x8.1mm^2 drill 1.1mm pad 2.1mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00052_1x09_P5.00mm_Horizontal +terminal block RND 205-00052, 9 pins, pitch 5mm, size 45x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00052 pitch 5mm size 45x8.1mm^2 drill 1.1mm pad 2.1mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00053_1x10_P5.00mm_Horizontal +terminal block RND 205-00053, 10 pins, pitch 5mm, size 50x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00053 pitch 5mm size 50x8.1mm^2 drill 1.1mm pad 2.1mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00054_1x11_P5.00mm_Horizontal +terminal block RND 205-00054, 11 pins, pitch 5mm, size 55x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00054 pitch 5mm size 55x8.1mm^2 drill 1.1mm pad 2.1mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00055_1x12_P5.00mm_Horizontal +terminal block RND 205-00055, 12 pins, pitch 5mm, size 60x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00055 pitch 5mm size 60x8.1mm^2 drill 1.1mm pad 2.1mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00056_1x02_P5.00mm_45Degree +terminal block RND 205-00056, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 10x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00056 45Degree pitch 5mm size 10x12.6mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00057_1x03_P5.00mm_45Degree +terminal block RND 205-00057, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 15x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00057 45Degree pitch 5mm size 15x12.6mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00058_1x04_P5.00mm_45Degree +terminal block RND 205-00058, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 20x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00058 45Degree pitch 5mm size 20x12.6mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00059_1x05_P5.00mm_45Degree +terminal block RND 205-00059, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 25x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00059 45Degree pitch 5mm size 25x12.6mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00060_1x06_P5.00mm_45Degree +terminal block RND 205-00060, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 30x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00060 45Degree pitch 5mm size 30x12.6mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00061_1x07_P5.00mm_45Degree +terminal block RND 205-00061, 45Degree (cable under 45degree), 7 pins, pitch 5mm, size 35x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00061 45Degree pitch 5mm size 35x12.6mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00062_1x08_P5.00mm_45Degree +terminal block RND 205-00062, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 40x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00062 45Degree pitch 5mm size 40x12.6mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00063_1x09_P5.00mm_45Degree +terminal block RND 205-00063, 45Degree (cable under 45degree), 9 pins, pitch 5mm, size 45x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00063 45Degree pitch 5mm size 45x12.6mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00064_1x10_P5.00mm_45Degree +terminal block RND 205-00064, 45Degree (cable under 45degree), 10 pins, pitch 5mm, size 50x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00064 45Degree pitch 5mm size 50x12.6mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00065_1x11_P5.00mm_45Degree +terminal block RND 205-00065, 45Degree (cable under 45degree), 11 pins, pitch 5mm, size 55x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00065 45Degree pitch 5mm size 55x12.6mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00066_1x12_P5.00mm_45Degree +terminal block RND 205-00066, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 60x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00066 45Degree pitch 5mm size 60x12.6mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00067_1x02_P7.50mm_Horizontal +terminal block RND 205-00067, 2 pins, pitch 7.5mm, size 15x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00067 pitch 7.5mm size 15x10.3mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00068_1x03_P7.50mm_Horizontal +terminal block RND 205-00068, 3 pins, pitch 7.5mm, size 22.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00068 pitch 7.5mm size 22.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00069_1x04_P7.50mm_Horizontal +terminal block RND 205-00069, 4 pins, pitch 7.5mm, size 30x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00069 pitch 7.5mm size 30x10.3mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00070_1x05_P7.50mm_Horizontal +terminal block RND 205-00070, 5 pins, pitch 7.5mm, size 37.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00070 pitch 7.5mm size 37.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00071_1x06_P7.50mm_Horizontal +terminal block RND 205-00071, 6 pins, pitch 7.5mm, size 45x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00071 pitch 7.5mm size 45x10.3mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00072_1x07_P7.50mm_Horizontal +terminal block RND 205-00072, 7 pins, pitch 7.5mm, size 52.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00072 pitch 7.5mm size 52.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00073_1x08_P7.50mm_Horizontal +terminal block RND 205-00073, 8 pins, pitch 7.5mm, size 60x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00073 pitch 7.5mm size 60x10.3mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00074_1x09_P7.50mm_Horizontal +terminal block RND 205-00074, 9 pins, pitch 7.5mm, size 67.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00074 pitch 7.5mm size 67.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00075_1x10_P7.50mm_Horizontal +terminal block RND 205-00075, 10 pins, pitch 7.5mm, size 75x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00075 pitch 7.5mm size 75x10.3mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00076_1x11_P7.50mm_Horizontal +terminal block RND 205-00076, 11 pins, pitch 7.5mm, size 82.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00076 pitch 7.5mm size 82.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00077_1x12_P7.50mm_Horizontal +terminal block RND 205-00077, 12 pins, pitch 7.5mm, size 90x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00077 pitch 7.5mm size 90x10.3mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00078_1x02_P10.00mm_Horizontal +terminal block RND 205-00078, 2 pins, pitch 10mm, size 15x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00078 pitch 10mm size 15x10.3mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00079_1x03_P10.00mm_Horizontal +terminal block RND 205-00079, 3 pins, pitch 10mm, size 25x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00079 pitch 10mm size 25x10.3mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00080_1x04_P10.00mm_Horizontal +terminal block RND 205-00080, 4 pins, pitch 10mm, size 35x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00080 pitch 10mm size 35x10.3mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00081_1x05_P10.00mm_Horizontal +terminal block RND 205-00081, 5 pins, pitch 10mm, size 45x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00081 pitch 10mm size 45x10.3mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00082_1x06_P10.00mm_Horizontal +terminal block RND 205-00082, 6 pins, pitch 10mm, size 55x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00082 pitch 10mm size 55x10.3mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00083_1x07_P10.00mm_Horizontal +terminal block RND 205-00083, 7 pins, pitch 10mm, size 65x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00083 pitch 10mm size 65x10.3mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00084_1x08_P10.00mm_Horizontal +terminal block RND 205-00084, 8 pins, pitch 10mm, size 75x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00084 pitch 10mm size 75x10.3mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00085_1x09_P10.00mm_Horizontal +terminal block RND 205-00085, 9 pins, pitch 10mm, size 85x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00085 pitch 10mm size 85x10.3mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00086_1x10_P10.00mm_Horizontal +terminal block RND 205-00086, 10 pins, pitch 10mm, size 95x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00086 pitch 10mm size 95x10.3mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00087_1x11_P10.00mm_Horizontal +terminal block RND 205-00087, 11 pins, pitch 10mm, size 105x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00087 pitch 10mm size 105x10.3mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00088_1x12_P10.00mm_Horizontal +terminal block RND 205-00088, 12 pins, pitch 10mm, size 115x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00088 pitch 10mm size 115x10.3mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00232_1x02_P5.08mm_Horizontal +terminal block RND 205-00232, 2 pins, pitch 5.08mm, size 10.2x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00232 pitch 5.08mm size 10.2x8.45mm^2 drill 1.1mm pad 2.1mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00233_1x03_P5.08mm_Horizontal +terminal block RND 205-00233, 3 pins, pitch 5.08mm, size 15.2x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00233 pitch 5.08mm size 15.2x8.45mm^2 drill 1.1mm pad 2.1mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00234_1x04_P5.08mm_Horizontal +terminal block RND 205-00234, 4 pins, pitch 5.08mm, size 20.3x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00234 pitch 5.08mm size 20.3x8.45mm^2 drill 1.1mm pad 2.1mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00235_1x05_P5.08mm_Horizontal +terminal block RND 205-00235, 5 pins, pitch 5.08mm, size 25.4x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00235 pitch 5.08mm size 25.4x8.45mm^2 drill 1.1mm pad 2.1mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00236_1x06_P5.08mm_Horizontal +terminal block RND 205-00236, 6 pins, pitch 5.08mm, size 30.5x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00236 pitch 5.08mm size 30.5x8.45mm^2 drill 1.1mm pad 2.1mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00237_1x07_P5.08mm_Horizontal +terminal block RND 205-00237, 7 pins, pitch 5.08mm, size 35.6x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00237 pitch 5.08mm size 35.6x8.45mm^2 drill 1.1mm pad 2.1mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00238_1x08_P5.08mm_Horizontal +terminal block RND 205-00238, 8 pins, pitch 5.08mm, size 40.6x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00238 pitch 5.08mm size 40.6x8.45mm^2 drill 1.1mm pad 2.1mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00239_1x09_P5.08mm_Horizontal +terminal block RND 205-00239, 9 pins, pitch 5.08mm, size 45.7x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00239 pitch 5.08mm size 45.7x8.45mm^2 drill 1.1mm pad 2.1mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00240_1x10_P5.08mm_Horizontal +terminal block RND 205-00240, 10 pins, pitch 5.08mm, size 50.8x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00240 pitch 5.08mm size 50.8x8.45mm^2 drill 1.1mm pad 2.1mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00241_1x02_P10.16mm_Horizontal +terminal block RND 205-00241, 2 pins, pitch 10.2mm, size 15.2x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00241 pitch 10.2mm size 15.2x8.3mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00242_1x03_P10.16mm_Horizontal +terminal block RND 205-00242, 3 pins, pitch 10.2mm, size 25.4x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00242 pitch 10.2mm size 25.4x8.3mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00243_1x04_P10.16mm_Horizontal +terminal block RND 205-00243, 4 pins, pitch 10.2mm, size 35.6x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00243 pitch 10.2mm size 35.6x8.3mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00244_1x05_P10.16mm_Horizontal +terminal block RND 205-00244, 5 pins, pitch 10.2mm, size 45.7x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00244 pitch 10.2mm size 45.7x8.3mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00245_1x06_P10.16mm_Horizontal +terminal block RND 205-00245, 6 pins, pitch 10.2mm, size 55.9x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00245 pitch 10.2mm size 55.9x8.3mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00246_1x07_P10.16mm_Horizontal +terminal block RND 205-00246, 7 pins, pitch 10.2mm, size 66x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00246 pitch 10.2mm size 66x8.3mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00247_1x08_P10.16mm_Horizontal +terminal block RND 205-00247, 8 pins, pitch 10.2mm, size 76.2x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00247 pitch 10.2mm size 76.2x8.3mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00248_1x09_P10.16mm_Horizontal +terminal block RND 205-00248, 9 pins, pitch 10.2mm, size 86.4x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00248 pitch 10.2mm size 86.4x8.3mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00249_1x10_P10.16mm_Horizontal +terminal block RND 205-00249, 10 pins, pitch 10.2mm, size 96.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00249 pitch 10.2mm size 96.5x8.3mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00250_1x11_P10.16mm_Horizontal +terminal block RND 205-00250, 11 pins, pitch 10.2mm, size 107x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00250 pitch 10.2mm size 107x8.3mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00251_1x12_P10.16mm_Horizontal +terminal block RND 205-00251, 12 pins, pitch 10.2mm, size 117x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00251 pitch 10.2mm size 117x8.3mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00276_1x02_P5.00mm_Vertical +terminal block RND 205-00078, vertical (cable from top), 2 pins, pitch 5mm, size 10x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00078 vertical pitch 5mm size 10x10mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00277_1x03_P5.00mm_Vertical +terminal block RND 205-00079, vertical (cable from top), 3 pins, pitch 5mm, size 15x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00079 vertical pitch 5mm size 15x10mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00278_1x04_P5.00mm_Vertical +terminal block RND 205-00080, vertical (cable from top), 4 pins, pitch 5mm, size 20x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00080 vertical pitch 5mm size 20x10mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00279_1x05_P5.00mm_Vertical +terminal block RND 205-00081, vertical (cable from top), 5 pins, pitch 5mm, size 25x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00081 vertical pitch 5mm size 25x10mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00280_1x06_P5.00mm_Vertical +terminal block RND 205-00082, vertical (cable from top), 6 pins, pitch 5mm, size 30x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00082 vertical pitch 5mm size 30x10mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00281_1x07_P5.00mm_Vertical +terminal block RND 205-00083, vertical (cable from top), 7 pins, pitch 5mm, size 35x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00083 vertical pitch 5mm size 35x10mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00282_1x08_P5.00mm_Vertical +terminal block RND 205-00084, vertical (cable from top), 8 pins, pitch 5mm, size 40x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00084 vertical pitch 5mm size 40x10mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00283_1x09_P5.00mm_Vertical +terminal block RND 205-00085, vertical (cable from top), 9 pins, pitch 5mm, size 45x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00085 vertical pitch 5mm size 45x10mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00284_1x10_P5.00mm_Vertical +terminal block RND 205-00086, vertical (cable from top), 10 pins, pitch 5mm, size 50x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00086 vertical pitch 5mm size 50x10mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00285_1x11_P5.00mm_Vertical +terminal block RND 205-00087, vertical (cable from top), 11 pins, pitch 5mm, size 55x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00087 vertical pitch 5mm size 55x10mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00286_1x12_P5.00mm_Vertical +terminal block RND 205-00088, vertical (cable from top), 12 pins, pitch 5mm, size 60x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00088 vertical pitch 5mm size 60x10mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00287_1x02_P5.08mm_Horizontal +terminal block RND 205-00287, 2 pins, pitch 5.08mm, size 10.2x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00287 pitch 5.08mm size 10.2x10.6mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00288_1x03_P5.08mm_Horizontal +terminal block RND 205-00288, 3 pins, pitch 5.08mm, size 15.2x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00288 pitch 5.08mm size 15.2x10.6mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00289_1x04_P5.08mm_Horizontal +terminal block RND 205-00289, 4 pins, pitch 5.08mm, size 20.3x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00289 pitch 5.08mm size 20.3x10.6mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00290_1x05_P5.08mm_Horizontal +terminal block RND 205-00290, 5 pins, pitch 5.08mm, size 25.4x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00290 pitch 5.08mm size 25.4x10.6mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00291_1x06_P5.08mm_Horizontal +terminal block RND 205-00291, 6 pins, pitch 5.08mm, size 30.5x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00291 pitch 5.08mm size 30.5x10.6mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00292_1x07_P5.08mm_Horizontal +terminal block RND 205-00292, 7 pins, pitch 5.08mm, size 35.6x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00292 pitch 5.08mm size 35.6x10.6mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00293_1x08_P5.08mm_Horizontal +terminal block RND 205-00293, 8 pins, pitch 5.08mm, size 40.6x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00293 pitch 5.08mm size 40.6x10.6mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00294_1x09_P5.08mm_Horizontal +terminal block RND 205-00294, 9 pins, pitch 5.08mm, size 45.7x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00294 pitch 5.08mm size 45.7x10.6mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00295_1x10_P5.08mm_Horizontal +terminal block RND 205-00295, 10 pins, pitch 5.08mm, size 50.8x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00295 pitch 5.08mm size 50.8x10.6mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00296_1x11_P5.08mm_Horizontal +terminal block RND 205-00296, 11 pins, pitch 5.08mm, size 55.9x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00296 pitch 5.08mm size 55.9x10.6mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00297_1x12_P5.08mm_Horizontal +terminal block RND 205-00297, 12 pins, pitch 5.08mm, size 61x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00297 pitch 5.08mm size 61x10.6mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00298_1x02_P10.00mm_Horizontal +terminal block RND 205-00298, 2 pins, pitch 10mm, size 15x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00298 pitch 10mm size 15x8.1mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00299_1x03_P10.00mm_Horizontal +terminal block RND 205-00299, 3 pins, pitch 10mm, size 25x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00299 pitch 10mm size 25x8.1mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00300_1x04_P10.00mm_Horizontal +terminal block RND 205-00300, 4 pins, pitch 10mm, size 35x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00300 pitch 10mm size 35x8.1mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00301_1x05_P10.00mm_Horizontal +terminal block RND 205-00301, 5 pins, pitch 10mm, size 45x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00301 pitch 10mm size 45x8.1mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00302_1x06_P10.00mm_Horizontal +terminal block RND 205-00302, 6 pins, pitch 10mm, size 55x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00302 pitch 10mm size 55x8.1mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00303_1x07_P10.00mm_Horizontal +terminal block RND 205-00303, 7 pins, pitch 10mm, size 65x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00303 pitch 10mm size 65x8.1mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00304_1x08_P10.00mm_Horizontal +terminal block RND 205-00304, 8 pins, pitch 10mm, size 75x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00304 pitch 10mm size 75x8.1mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00305_1x09_P10.00mm_Horizontal +terminal block RND 205-00305, 9 pins, pitch 10mm, size 85x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00305 pitch 10mm size 85x8.1mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00306_1x10_P10.00mm_Horizontal +terminal block RND 205-00306, 10 pins, pitch 10mm, size 95x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00306 pitch 10mm size 95x8.1mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00307_1x11_P10.00mm_Horizontal +terminal block RND 205-00307, 11 pins, pitch 10mm, size 105x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00307 pitch 10mm size 105x8.1mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00308_1x12_P10.00mm_Horizontal +terminal block RND 205-00308, 12 pins, pitch 10mm, size 115x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00308 pitch 10mm size 115x8.1mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_1-282834-0_1x10_P2.54mm_Horizontal +Terminal Block TE 1-282834-0, 10 pins, pitch 2.54mm, size 25.86x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 1-282834-0 pitch 2.54mm size 25.86x6.5mm^2 drill 1.1mm pad 2.1mm +0 +10 +10 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_1-282834-1_1x11_P2.54mm_Horizontal +Terminal Block TE 1-282834-1, 11 pins, pitch 2.54mm, size 28.4x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 1-282834-1 pitch 2.54mm size 28.4x6.5mm^2 drill 1.1mm pad 2.1mm +0 +11 +11 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_1-282834-2_1x12_P2.54mm_Horizontal +Terminal Block TE 1-282834-2, 12 pins, pitch 2.54mm, size 30.94x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 1-282834-2 pitch 2.54mm size 30.94x6.5mm^2 drill 1.1mm pad 2.1mm +0 +12 +12 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-2_1x02_P2.54mm_Horizontal +Terminal Block TE 282834-2, 2 pins, pitch 2.54mm, size 5.54x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-2 pitch 2.54mm size 5.54x6.5mm^2 drill 1.1mm pad 2.1mm +0 +2 +2 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-3_1x03_P2.54mm_Horizontal +Terminal Block TE 282834-3, 3 pins, pitch 2.54mm, size 8.08x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-3 pitch 2.54mm size 8.08x6.5mm^2 drill 1.1mm pad 2.1mm +0 +3 +3 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-4_1x04_P2.54mm_Horizontal +Terminal Block TE 282834-4, 4 pins, pitch 2.54mm, size 10.620000000000001x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-4 pitch 2.54mm size 10.620000000000001x6.5mm^2 drill 1.1mm pad 2.1mm +0 +4 +4 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-5_1x05_P2.54mm_Horizontal +Terminal Block TE 282834-5, 5 pins, pitch 2.54mm, size 13.16x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-5 pitch 2.54mm size 13.16x6.5mm^2 drill 1.1mm pad 2.1mm +0 +5 +5 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-6_1x06_P2.54mm_Horizontal +Terminal Block TE 282834-6, 6 pins, pitch 2.54mm, size 15.7x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-6 pitch 2.54mm size 15.7x6.5mm^2 drill 1.1mm pad 2.1mm +0 +6 +6 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-7_1x07_P2.54mm_Horizontal +Terminal Block TE 282834-7, 7 pins, pitch 2.54mm, size 18.240000000000002x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-7 pitch 2.54mm size 18.240000000000002x6.5mm^2 drill 1.1mm pad 2.1mm +0 +7 +7 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-8_1x08_P2.54mm_Horizontal +Terminal Block TE 282834-8, 8 pins, pitch 2.54mm, size 20.78x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-8 pitch 2.54mm size 20.78x6.5mm^2 drill 1.1mm pad 2.1mm +0 +8 +8 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-9_1x09_P2.54mm_Horizontal +Terminal Block TE 282834-9, 9 pins, pitch 2.54mm, size 23.32x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-9 pitch 2.54mm size 23.32x6.5mm^2 drill 1.1mm pad 2.1mm +0 +9 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-101_1x01_P5.00mm_45Degree +Terminal Block WAGO 236-101, 45Degree (cable under 45degree), 1 pins, pitch 5mm, size 6.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-101 45Degree pitch 5mm size 6.5x14mm^2 drill 1mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-102_1x02_P5.00mm_45Degree +Terminal Block WAGO 236-102, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 11.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-102 45Degree pitch 5mm size 11.5x14mm^2 drill 1mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-103_1x03_P5.00mm_45Degree +Terminal Block WAGO 236-103, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 16.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-103 45Degree pitch 5mm size 16.5x14mm^2 drill 1mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-104_1x04_P5.00mm_45Degree +Terminal Block WAGO 236-104, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 21.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-104 45Degree pitch 5mm size 21.5x14mm^2 drill 1mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-105_1x05_P5.00mm_45Degree +Terminal Block WAGO 236-105, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 26.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-105 45Degree pitch 5mm size 26.5x14mm^2 drill 1mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-106_1x06_P5.00mm_45Degree +Terminal Block WAGO 236-106, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 31.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-106 45Degree pitch 5mm size 31.5x14mm^2 drill 1mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-107_1x07_P5.00mm_45Degree +Terminal Block WAGO 236-107, 45Degree (cable under 45degree), 7 pins, pitch 5mm, size 36.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-107 45Degree pitch 5mm size 36.5x14mm^2 drill 1mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-108_1x08_P5.00mm_45Degree +Terminal Block WAGO 236-108, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 41.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-108 45Degree pitch 5mm size 41.5x14mm^2 drill 1mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-109_1x09_P5.00mm_45Degree +Terminal Block WAGO 236-109, 45Degree (cable under 45degree), 9 pins, pitch 5mm, size 46.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-109 45Degree pitch 5mm size 46.5x14mm^2 drill 1mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-110_1x10_P5.00mm_45Degree +Terminal Block WAGO 236-110, 45Degree (cable under 45degree), 10 pins, pitch 5mm, size 51.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-110 45Degree pitch 5mm size 51.5x14mm^2 drill 1mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-112_1x12_P5.00mm_45Degree +Terminal Block WAGO 236-112, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 61.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-112 45Degree pitch 5mm size 61.5x14mm^2 drill 1mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-116_1x16_P5.00mm_45Degree +Terminal Block WAGO 236-116, 45Degree (cable under 45degree), 16 pins, pitch 5mm, size 81.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-116 45Degree pitch 5mm size 81.5x14mm^2 drill 1mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-124_1x24_P5.00mm_45Degree +Terminal Block WAGO 236-124, 45Degree (cable under 45degree), 24 pins, pitch 5mm, size 122x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-124 45Degree pitch 5mm size 122x14mm^2 drill 1mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-201_1x01_P7.50mm_45Degree +Terminal Block WAGO 236-201, 45Degree (cable under 45degree), 1 pins, pitch 7.5mm, size 9x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-201 45Degree pitch 7.5mm size 9x14mm^2 drill 1mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-202_1x02_P7.50mm_45Degree +Terminal Block WAGO 236-202, 45Degree (cable under 45degree), 2 pins, pitch 7.5mm, size 16.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-202 45Degree pitch 7.5mm size 16.5x14mm^2 drill 1mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-203_1x03_P7.50mm_45Degree +Terminal Block WAGO 236-203, 45Degree (cable under 45degree), 3 pins, pitch 7.5mm, size 24x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-203 45Degree pitch 7.5mm size 24x14mm^2 drill 1mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-204_1x04_P7.50mm_45Degree +Terminal Block WAGO 236-204, 45Degree (cable under 45degree), 4 pins, pitch 7.5mm, size 31.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-204 45Degree pitch 7.5mm size 31.5x14mm^2 drill 1mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-205_1x05_P7.50mm_45Degree +Terminal Block WAGO 236-205, 45Degree (cable under 45degree), 5 pins, pitch 7.5mm, size 39x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-205 45Degree pitch 7.5mm size 39x14mm^2 drill 1mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-206_1x06_P7.50mm_45Degree +Terminal Block WAGO 236-206, 45Degree (cable under 45degree), 6 pins, pitch 7.5mm, size 46.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-206 45Degree pitch 7.5mm size 46.5x14mm^2 drill 1mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-207_1x07_P7.50mm_45Degree +Terminal Block WAGO 236-207, 45Degree (cable under 45degree), 7 pins, pitch 7.5mm, size 54x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-207 45Degree pitch 7.5mm size 54x14mm^2 drill 1mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-208_1x08_P7.50mm_45Degree +Terminal Block WAGO 236-208, 45Degree (cable under 45degree), 8 pins, pitch 7.5mm, size 61.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-208 45Degree pitch 7.5mm size 61.5x14mm^2 drill 1mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-209_1x09_P7.50mm_45Degree +Terminal Block WAGO 236-209, 45Degree (cable under 45degree), 9 pins, pitch 7.5mm, size 69x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-209 45Degree pitch 7.5mm size 69x14mm^2 drill 1mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-210_1x10_P7.50mm_45Degree +Terminal Block WAGO 236-210, 45Degree (cable under 45degree), 10 pins, pitch 7.5mm, size 76.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-210 45Degree pitch 7.5mm size 76.5x14mm^2 drill 1mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-212_1x12_P7.50mm_45Degree +Terminal Block WAGO 236-212, 45Degree (cable under 45degree), 12 pins, pitch 7.5mm, size 91.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-212 45Degree pitch 7.5mm size 91.5x14mm^2 drill 1mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-216_1x16_P7.50mm_45Degree +Terminal Block WAGO 236-216, 45Degree (cable under 45degree), 16 pins, pitch 7.5mm, size 122x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-216 45Degree pitch 7.5mm size 122x14mm^2 drill 1mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-224_1x24_P7.50mm_45Degree +Terminal Block WAGO 236-224, 45Degree (cable under 45degree), 24 pins, pitch 7.5mm, size 182x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-224 45Degree pitch 7.5mm size 182x14mm^2 drill 1mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-301_1x01_P10.00mm_45Degree +Terminal Block WAGO 236-301, 45Degree (cable under 45degree), 1 pins, pitch 10mm, size 11.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-301 45Degree pitch 10mm size 11.5x14mm^2 drill 1mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-302_1x02_P10.00mm_45Degree +Terminal Block WAGO 236-302, 45Degree (cable under 45degree), 2 pins, pitch 10mm, size 21.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-302 45Degree pitch 10mm size 21.5x14mm^2 drill 1mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-303_1x03_P10.00mm_45Degree +Terminal Block WAGO 236-303, 45Degree (cable under 45degree), 3 pins, pitch 10mm, size 31.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-303 45Degree pitch 10mm size 31.5x14mm^2 drill 1mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-304_1x04_P10.00mm_45Degree +Terminal Block WAGO 236-304, 45Degree (cable under 45degree), 4 pins, pitch 10mm, size 41.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-304 45Degree pitch 10mm size 41.5x14mm^2 drill 1mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-305_1x05_P10.00mm_45Degree +Terminal Block WAGO 236-305, 45Degree (cable under 45degree), 5 pins, pitch 10mm, size 51.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-305 45Degree pitch 10mm size 51.5x14mm^2 drill 1mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-306_1x06_P10.00mm_45Degree +Terminal Block WAGO 236-306, 45Degree (cable under 45degree), 6 pins, pitch 10mm, size 61.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-306 45Degree pitch 10mm size 61.5x14mm^2 drill 1mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-307_1x07_P10.00mm_45Degree +Terminal Block WAGO 236-307, 45Degree (cable under 45degree), 7 pins, pitch 10mm, size 71.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-307 45Degree pitch 10mm size 71.5x14mm^2 drill 1mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-308_1x08_P10.00mm_45Degree +Terminal Block WAGO 236-308, 45Degree (cable under 45degree), 8 pins, pitch 10mm, size 81.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-308 45Degree pitch 10mm size 81.5x14mm^2 drill 1mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-309_1x09_P10.00mm_45Degree +Terminal Block WAGO 236-309, 45Degree (cable under 45degree), 9 pins, pitch 10mm, size 91.5x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-309 45Degree pitch 10mm size 91.5x14mm^2 drill 1mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-310_1x10_P10.00mm_45Degree +Terminal Block WAGO 236-310, 45Degree (cable under 45degree), 10 pins, pitch 10mm, size 102x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-310 45Degree pitch 10mm size 102x14mm^2 drill 1mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-312_1x12_P10.00mm_45Degree +Terminal Block WAGO 236-312, 45Degree (cable under 45degree), 12 pins, pitch 10mm, size 122x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-312 45Degree pitch 10mm size 122x14mm^2 drill 1mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-316_1x16_P10.00mm_45Degree +Terminal Block WAGO 236-316, 45Degree (cable under 45degree), 16 pins, pitch 10mm, size 162x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-316 45Degree pitch 10mm size 162x14mm^2 drill 1mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-324_1x24_P10.00mm_45Degree +Terminal Block WAGO 236-324, 45Degree (cable under 45degree), 24 pins, pitch 10mm, size 242x14mm^2, drill diamater 1mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-324 45Degree pitch 10mm size 242x14mm^2 drill 1mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-101_1x01_P5.00mm_45Degree +Terminal Block WAGO 804-101, 45Degree (cable under 45degree), 1 pins, pitch 5mm, size 6.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-101 45Degree pitch 5mm size 6.5x15mm^2 drill 1.2mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-102_1x02_P5.00mm_45Degree +Terminal Block WAGO 804-102, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 11.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-102 45Degree pitch 5mm size 11.5x15mm^2 drill 1.2mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-103_1x03_P5.00mm_45Degree +Terminal Block WAGO 804-103, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 16.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-103 45Degree pitch 5mm size 16.5x15mm^2 drill 1.2mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-104_1x04_P5.00mm_45Degree +Terminal Block WAGO 804-104, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 21.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-104 45Degree pitch 5mm size 21.5x15mm^2 drill 1.2mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-105_1x05_P5.00mm_45Degree +Terminal Block WAGO 804-105, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 26.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-105 45Degree pitch 5mm size 26.5x15mm^2 drill 1.2mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-106_1x06_P5.00mm_45Degree +Terminal Block WAGO 804-106, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 31.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-106 45Degree pitch 5mm size 31.5x15mm^2 drill 1.2mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-107_1x07_P5.00mm_45Degree +Terminal Block WAGO 804-107, 45Degree (cable under 45degree), 7 pins, pitch 5mm, size 36.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-107 45Degree pitch 5mm size 36.5x15mm^2 drill 1.2mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-108_1x08_P5.00mm_45Degree +Terminal Block WAGO 804-108, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 41.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-108 45Degree pitch 5mm size 41.5x15mm^2 drill 1.2mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-109_1x09_P5.00mm_45Degree +Terminal Block WAGO 804-109, 45Degree (cable under 45degree), 9 pins, pitch 5mm, size 46.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-109 45Degree pitch 5mm size 46.5x15mm^2 drill 1.2mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-110_1x10_P5.00mm_45Degree +Terminal Block WAGO 804-110, 45Degree (cable under 45degree), 10 pins, pitch 5mm, size 51.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-110 45Degree pitch 5mm size 51.5x15mm^2 drill 1.2mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-112_1x12_P5.00mm_45Degree +Terminal Block WAGO 804-112, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 61.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-112 45Degree pitch 5mm size 61.5x15mm^2 drill 1.2mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-116_1x16_P5.00mm_45Degree +Terminal Block WAGO 804-116, 45Degree (cable under 45degree), 16 pins, pitch 5mm, size 81.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-116 45Degree pitch 5mm size 81.5x15mm^2 drill 1.2mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-124_1x24_P5.00mm_45Degree +Terminal Block WAGO 804-124, 45Degree (cable under 45degree), 24 pins, pitch 5mm, size 122x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-124 45Degree pitch 5mm size 122x15mm^2 drill 1.2mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-301_1x01_P7.50mm_45Degree +Terminal Block WAGO 804-301, 45Degree (cable under 45degree), 1 pins, pitch 7.5mm, size 6.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-301 45Degree pitch 7.5mm size 6.5x15mm^2 drill 1.2mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-302_1x02_P7.50mm_45Degree +Terminal Block WAGO 804-302, 45Degree (cable under 45degree), 2 pins, pitch 7.5mm, size 14x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-302 45Degree pitch 7.5mm size 14x15mm^2 drill 1.2mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-303_1x03_P7.50mm_45Degree +Terminal Block WAGO 804-303, 45Degree (cable under 45degree), 3 pins, pitch 7.5mm, size 21.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-303 45Degree pitch 7.5mm size 21.5x15mm^2 drill 1.2mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-304_1x04_P7.50mm_45Degree +Terminal Block WAGO 804-304, 45Degree (cable under 45degree), 4 pins, pitch 7.5mm, size 29x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-304 45Degree pitch 7.5mm size 29x15mm^2 drill 1.2mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-305_1x05_P7.50mm_45Degree +Terminal Block WAGO 804-305, 45Degree (cable under 45degree), 5 pins, pitch 7.5mm, size 36.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-305 45Degree pitch 7.5mm size 36.5x15mm^2 drill 1.2mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-306_1x06_P7.50mm_45Degree +Terminal Block WAGO 804-306, 45Degree (cable under 45degree), 6 pins, pitch 7.5mm, size 44x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-306 45Degree pitch 7.5mm size 44x15mm^2 drill 1.2mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-307_1x07_P7.50mm_45Degree +Terminal Block WAGO 804-307, 45Degree (cable under 45degree), 7 pins, pitch 7.5mm, size 51.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-307 45Degree pitch 7.5mm size 51.5x15mm^2 drill 1.2mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-308_1x08_P7.50mm_45Degree +Terminal Block WAGO 804-308, 45Degree (cable under 45degree), 8 pins, pitch 7.5mm, size 59x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-308 45Degree pitch 7.5mm size 59x15mm^2 drill 1.2mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-309_1x09_P7.50mm_45Degree +Terminal Block WAGO 804-309, 45Degree (cable under 45degree), 9 pins, pitch 7.5mm, size 66.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-309 45Degree pitch 7.5mm size 66.5x15mm^2 drill 1.2mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-310_1x10_P7.50mm_45Degree +Terminal Block WAGO 804-310, 45Degree (cable under 45degree), 10 pins, pitch 7.5mm, size 74x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-310 45Degree pitch 7.5mm size 74x15mm^2 drill 1.2mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-312_1x12_P7.50mm_45Degree +Terminal Block WAGO 804-312, 45Degree (cable under 45degree), 12 pins, pitch 7.5mm, size 89x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-312 45Degree pitch 7.5mm size 89x15mm^2 drill 1.2mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-316_1x16_P7.50mm_45Degree +Terminal Block WAGO 804-316, 45Degree (cable under 45degree), 16 pins, pitch 7.5mm, size 119x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-316 45Degree pitch 7.5mm size 119x15mm^2 drill 1.2mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-324_1x24_P7.50mm_45Degree +Terminal Block WAGO 804-324, 45Degree (cable under 45degree), 24 pins, pitch 7.5mm, size 179x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-324 45Degree pitch 7.5mm size 179x15mm^2 drill 1.2mm pad 3mm +0 +48 +24 +TestPoint +TestPoint_2Pads_Pitch2.54mm_Drill0.8mm +Test point with 2 pins, pitch 2.54mm, drill diameter 0.8mm +CONN DEV +0 +2 +2 +TestPoint +TestPoint_2Pads_Pitch5.08mm_Drill1.3mm +Test point with 2 pads, pitch 5.08mm, hole diameter 1.3mm, wire diameter 1.0mm +CONN DEV +0 +2 +2 +TestPoint +TestPoint_Bridge_Pitch2.0mm_Drill0.7mm +wire loop as test point, pitch 2.0mm, hole diameter 0.7mm, wire diameter 0.5mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch2.54mm_Drill0.7mm +wire loop as test point, pitch 2.0mm, hole diameter 0.7mm, wire diameter 0.5mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch2.54mm_Drill1.0mm +wire loop as test point, pitch 2.54mm, hole diameter 1.0mm, wire diameter 0.8mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch2.54mm_Drill1.3mm +wire loop as test point, pitch 2.54mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch3.81mm_Drill1.3mm +wire loop as test point, pitch 3.81mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch5.08mm_Drill0.7mm +wire loop as test point, pitch 5.08mm, hole diameter 0.7mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch5.08mm_Drill1.3mm +wire loop as test point, pitch 5.08mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch6.35mm_Drill1.3mm +wire loop as test point, pitch 6.35mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch7.62mm_Drill1.3mm +wire loop as test point, pitch 7.62mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Keystone_5000-5004_Miniature +Keystone Miniature THM Test Point 5000-5004, http://www.keyelco.com/product-pdf.cfm?p=1309 +Through Hole Mount Test Points +0 +1 +1 +TestPoint +TestPoint_Keystone_5005-5009_Compact +Keystone Miniature THM Test Point 5005-5009, http://www.keyelco.com/product-pdf.cfm?p=1314 +Through Hole Mount Test Points +0 +1 +1 +TestPoint +TestPoint_Keystone_5010-5014_Multipurpose +Keystone Miniature THM Test Point 5010-5014, http://www.keyelco.com/product-pdf.cfm?p=1319 +Through Hole Mount Test Points +0 +1 +1 +TestPoint +TestPoint_Keystone_5015_Micro-Minature +SMT Test Point- Micro Miniature 5015, http://www.keyelco.com/product-pdf.cfm?p=1353 +Test Point +0 +1 +1 +TestPoint +TestPoint_Keystone_5019_Minature +SMT Test Point- Micro Miniature 5019, http://www.keyelco.com/product-pdf.cfm?p=1357 +Test Point +0 +1 +1 +TestPoint +TestPoint_Loop_D1.80mm_Drill1.0mm_Beaded +wire loop with bead as test point, loop diameter 1.8mm, hole diameter 1.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.50mm_Drill1.0mm +wire loop as test point, loop diameter 2.5mm, hole diameter 1.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.50mm_Drill1.0mm_LowProfile +low profile wire loop as test point, loop diameter 2.5mm, hole diameter 1.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.50mm_Drill1.85mm +wire loop as test point, loop diameter 2.5mm, hole diameter 1.85mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.54mm_Drill1.5mm_Beaded +wire loop with bead as test point, loop diameter2.548mm, hole diameter 1.5mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.60mm_Drill0.9mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 0.9mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.60mm_Drill1.4mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 1.4mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.60mm_Drill1.6mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 1.6mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.50mm_Drill0.9mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 0.9mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.50mm_Drill1.4mm_Beaded +wire loop with bead as test point, loop diameter 3.5mm, hole diameter 1.4mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.80mm_Drill2.0mm +wire loop as test point, loop diameter 3.8mm, hole diameter 2.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.80mm_Drill2.5mm +wire loop as test point, loop diameter 3.8mm, hole diameter 2.5mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.80mm_Drill2.8mm +wire loop as test point, loop diameter 3.8mm, hole diameter 2.8mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Pad_1.0x1.0mm +SMD rectangular pad as test Point, square 1.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_1.5x1.5mm +SMD rectangular pad as test Point, square 1.5mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_2.0x2.0mm +SMD rectangular pad as test Point, square 2.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_2.5x2.5mm +SMD rectangular pad as test Point, square 2.5mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_3.0x3.0mm +SMD rectangular pad as test Point, square 3.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_4.0x4.0mm +SMD rectangular pad as test Point, square 4.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_D1.0mm +SMD pad as test Point, diameter 1.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D1.5mm +SMD pad as test Point, diameter 1.5mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D2.0mm +SMD pad as test Point, diameter 2.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D2.5mm +SMD pad as test Point, diameter 2.5mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D3.0mm +SMD pad as test Point, diameter 3.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D4.0mm +SMD pad as test Point, diameter 4.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D2.0mm +Plated Hole as test Point, diameter 2.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D3.0mm +Plated Hole as test Point, diameter 3.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D4.0mm +Plated Hole as test Point, diameter 4.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D5.0mm +Plated Hole as test Point, diameter 5.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_THTPad_1.0x1.0mm_Drill0.5mm +THT rectangular pad as test Point, square 1.0mm side length, hole diameter 0.5mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_1.5x1.5mm_Drill0.7mm +THT rectangular pad as test Point, square 1.5mm side length, hole diameter 0.7mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_2.0x2.0mm_Drill1.0mm +THT rectangular pad as test Point, square 2.0mm_Drill1.0mm side length, hole diameter 1.0mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_2.5x2.5mm_Drill1.2mm +THT rectangular pad as test Point, square 2.5mm side length, hole diameter 1.2mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_3.0x3.0mm_Drill1.5mm +THT rectangular pad as test Point, square 3.0mm side length, hole diameter 1.5mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_4.0x4.0mm_Drill2.0mm +THT rectangular pad as test Point, square 4.0mm side length, hole diameter 2.0mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_D1.0mm_Drill0.5mm +THT pad as test Point, diameter 1.0mm, hole diameter 0.5mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D1.5mm_Drill0.7mm +THT pad as test Point, diameter 1.5mm, hole diameter 0.7mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D2.0mm_Drill1.0mm +THT pad as test Point, diameter 2.0mm, hole diameter 1.0mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D2.5mm_Drill1.2mm +THT pad as test Point, diameter 2.5mm, hole diameter 1.2mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D3.0mm_Drill1.5mm +THT pad as test Point, diameter 3.0mm, hole diameter 1.5mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D4.0mm_Drill2.0mm +THT pad as test Point, diameter 4.0mm, hole diameter 2.0mm +test point THT pad +0 +1 +1 +Transformer_SMD +Pulse_P0926NL +SMT Gate Drive Transformer, 1:1:1, 8.0x6.3x5.3mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa0926nl +0 +6 +6 +Transformer_SMD +Pulse_PA1323NL +SMT Gate Drive Transformer, 1:1, 9.5x7.1x5.3mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa1323nl +0 +6 +6 +Transformer_SMD +Pulse_PA2001NL +SMT Gate Drive Transformer, 1:1, 8.6x6.7x2.5mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2001nl pe-68386nl +0 +4 +4 +Transformer_SMD +Pulse_PA2002NL-PA2008NL-PA2009NL +SMT Gate Drive Transformer, 1:1:1 or 2:1:1 or 2.5:1:1 or 1:1, 9.0x8.6x7.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2002nl pa2008nl pa2009nl p0544nl pa0184nl pa0297nl pa0510nl +0 +6 +6 +Transformer_SMD +Pulse_PA2004NL +SMT Gate Drive Transformer, 1:1:1, 8.6x6.7x3.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2004nl pa0264nl +0 +6 +6 +Transformer_SMD +Pulse_PA2005NL +SMT Gate Drive Transformer, 1:1:1, 11.8x8.8x4.0mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2005nl pa0173nl +0 +6 +6 +Transformer_SMD +Pulse_PA2006NL +SMT Gate Drive Transformer, 1:1, 11.8x8.8x4.0mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2006nl pa0186nl +0 +4 +4 +Transformer_SMD +Pulse_PA2007NL +SMT Gate Drive Transformer, 1:1, 9.0x8.6x7.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2007nl +0 +4 +4 +Transformer_SMD +Pulse_PA2777NL +SMT Gate Drive Transformer, 1:1, 7.1x6.1x5.5mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa2777nl +0 +8 +8 +Transformer_SMD +Pulse_PA3493NL +SMT Gate Drive Transformer, 1.25:1, 10.9x9.7x2.7mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa3493nl +0 +4 +4 +Transformer_SMD +Transformer_Coilcraft_CST1 +Current sense transformer, SMD, 8.0x8.13x5.3mm (https://www.coilcraft.com/pdfs/cst.pdf) +Transformer current sense SMD +0 +8 +8 +Transformer_SMD +Transformer_Coilcraft_CST2 +Current sense transformer, SMD, 8.0x8.13x5.3mm (https://www.coilcraft.com/pdfs/cst.pdf) +Transformer current sense SMD +0 +8 +8 +Transformer_SMD +Transformer_Coilcraft_CST2010 +Current sense transformer, SMD, 14.55x19.91x10.50mm (https://www.coilcraft.com/pdfs/cst2010.pdf) +Transformer current sense SMD +0 +12 +12 +Transformer_SMD +Transformer_CurrentSense_8.4x7.2mm +Transformer current sense SMD 8.4x7.2mm +Transformer current sense SMD +0 +8 +8 +Transformer_SMD +Transformer_Ethernet_Bel_S558-5999-T7-F +Ethernet Transformer, Bel S558-5999-T7-F, https://www.belfuse.com/resources/ICMs/lan-/S558-5999-T7-F.pdf +Ethernet Transformer +0 +16 +16 +Transformer_SMD +Transformer_Ethernet_Bourns_PT61017PEL +https://www.bourns.com/docs/Product-Datasheets/PT61017PEL.pdf +Transformer Ethernet Single Center-Tap +0 +16 +16 +Transformer_SMD +Transformer_Ethernet_HALO_TG111-MSC13 +Transformer Ethernet SMD, https://www.haloelectronics.com/pdf/discrete-genesus.pdf +Transformer Ethernet SMD +0 +24 +24 +Transformer_SMD +Transformer_MACOM_SM-22 +https://cdn.macom.com/datasheets/ETC1-1-13.pdf +RF Transformer +0 +5 +5 +Transformer_SMD +Transformer_NF_ETAL_P2781 +NF-Transformer, ETAL, P2781, SMD, +NF-Transformer ETAL P2781 SMD +0 +8 +7 +Transformer_SMD +Transformer_NF_ETAL_P2781_HandSoldering +NF-Transformer, ETAL, P2781, SMD, Handsoldering +NF-Transformer ETAL P2781 SMD Handsoldering +0 +8 +7 +Transformer_SMD +Transformer_NF_ETAL_P3000 +NF-Reansformer, ETAL, P3000, SMD, +NF-Reansformer ETAL P3000 SMD +0 +15 +13 +Transformer_SMD +Transformer_NF_ETAL_P3000_HandSoldering +NF-Reansformer, ETAL, P3000, SMD, Handsoldering, +NF-Reansformer ETAL P3000 SMD Handsoldering +0 +15 +13 +Transformer_SMD +Transformer_NF_ETAL_P3181 +NF-Transformer, ETAL, P3181, SMD, +NF-Transformer ETAL P3181 SMD +0 +7 +6 +Transformer_SMD +Transformer_NF_ETAL_P3181_HandSoldering +NF-Transformer, ETAL, P3181, SMD, Hand Soldering, +NF-Transformer ETAL P3181 SMD Hand Soldering +0 +7 +6 +Transformer_SMD +Transformer_NF_ETAL_P3188 +NF-Transformer, ETAL, P3188, SMD, +NF-Transformer ETAL P3188 SMD +0 +8 +6 +Transformer_SMD +Transformer_NF_ETAL_P3188_HandSoldering +NF-Transformer, ETAL, P3188, SMD, Handsoldering, +NF-Transformer ETAL P3188 SMD Handsoldering +0 +8 +6 +Transformer_SMD +Transformer_NF_ETAL_P3191 +NF-Transformer, ETAL, P3191, SMD, +NF-Transformer ETAL P3191 SMD +0 +8 +6 +Transformer_SMD +Transformer_NF_ETAL_P3191_HandSoldering +NF-Transformer, ETAL, P3191, SMD, Handsoldering, +NF-Transformer ETAL P3191 SMD Handsoldering +0 +8 +6 +Transformer_SMD +Transformer_Pulse_H1100NL +For H1100NL, H1101NL, H1102NL, H1121NL, H1183NL, H1199NL, HX1188NL, HX1198NL and H1302NL. https://productfinder.pulseeng.com/doc_type/WEB301/doc_num/H1102NL/doc_part/H1102NL.pdf +H1100NL H1101NL H1102NL H1121NL H1183NL H1199NL HX1188NL HX1198NL H1302N +0 +16 +16 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D9.0mm_Amidon-T30 +Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 9mm, Amidon T30, +Autotransformer Toroid horizontal laying 1 Tap Diameter 9mm Amidon T30 +0 +3 +3 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D10.5mm_Amidon-T37 +Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 10,5mm, Amidon T37, +Autotransformer Toroid horizontal laying 1 Tap Diameter 10 5mm Amidon T37 +0 +3 +3 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D12.5mm_Amidon-T44 +Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 12,5mm, Amidon T44, +Autotransformer Toroid horizontal laying 1 Tap Diameter 12 5mm Amidon T44 +0 +3 +3 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D14.0mm_Amidon-T50 +Choke, Inductance, Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 14mm, Amidon T50, +Choke Inductance Autotransformer Toroid horizontal laying 1 Tap Diameter 14mm Amidon T50 +0 +3 +3 +Transformer_THT +Autotransformer_ZS1052-AC +Ignition coil for xenon flash, http://www.excelitas.com/downloads/ZS1052ACH.pdf +ignition coil autotransformer +0 +3 +3 +Transformer_THT +Transformer_37x44 +transformer 37x44mm² +transformer 37x44mm² +0 +12 +4 +Transformer_THT +Transformer_Breve_TEZ-22x24 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +7 +7 +Transformer_THT +Transformer_Breve_TEZ-28x33 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +9 +9 +Transformer_THT +Transformer_Breve_TEZ-35x42 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +9 +9 +Transformer_THT +Transformer_Breve_TEZ-38x45 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +9 +9 +Transformer_THT +Transformer_Breve_TEZ-44x52 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +10 +10 +Transformer_THT +Transformer_Breve_TEZ-47x57 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +13 +13 +Transformer_THT +Transformer_CHK_EI30-2VA_1xSec +Trafo, Printtrafo, CHK, EI30, 2VA, 1x Sec,http://www.eratransformers.com/downloads/030-7585.0.pdf +Trafo Printtrafo CHK EI30 2VA 1x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI30-2VA_2xSec +Trafo, Printtrafo, CHK, EI30, 2VA, 2x Sec, +Trafo Printtrafo CHK EI30 2VA 2x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI30-2VA_Neutral +Trafo, Printtrafo, CHK, EI30, 2VA, neutral, +Trafo Printtrafo CHK EI30 2VA neutral +0 +10 +10 +Transformer_THT +Transformer_CHK_EI38-3VA_1xSec +Trafo, Printtrafo, CHK, EI38, 3VA, 1x Sec, http://www.eratransformers.com/product-detail/20 +Trafo Printtrafo CHK EI38 3VA 1x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI38-3VA_2xSec +Trafo, Printtrafo, CHK, EI38, 3VA, 2x Sec, http://www.eratransformers.com/product-detail/20 +Trafo Printtrafo CHK EI38 3VA 2x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI38-3VA_Neutral +Trafo, Printtrafo, CHK, EI38, 3VA, neutral, http://www.eratransformers.com/product-detail/20 +Trafo Printtrafo CHK EI42 3VA neutral +0 +10 +10 +Transformer_THT +Transformer_CHK_EI42-5VA_1xSec +Trafo, Printtrafo, CHK, EI42, 5VA, 1x Sec, +Trafo Printtrafo CHK EI42 5VA 1x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI42-5VA_2xSec +Trafo, Printtrafo, CHK, EI42, 5VA, 2x Sec, +Trafo Printtrafo CHK EI42 5VA 2x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI42-5VA_Neutral +Trafo, Printtrafo, CHK, EI42, 5VA, neutral, +Trafo Printtrafo CHK EI42 5VA neutral +0 +10 +10 +Transformer_THT +Transformer_CHK_EI48-8VA_1xSec +Trafo, Printtrafo, CHK, EI48, 8VA, 1x Sec, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 8VA 1x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-8VA_2xSec +Trafo, Printtrafo, CHK, EI48, 8VA, 2x Sec, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 8VA 2x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-8VA_Neutral +Trafo, Printtrafo, CHK, EI48, 8VA, neutral, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 8VA neutral +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-10VA_1xSec +Trafo, Printtrafo, CHK, EI48, 10VA, 1x Sec, +Trafo Printtrafo CHK EI48 10VA 1x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-10VA_2xSec +Trafo, Printtrafo, CHK, EI48, 10VA, 2x Sec, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 10VA 2x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-10VA_Neutral +Trafo, Printtrafo, CHK, EI48, 10VA, neutral, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 10VA neutral +0 +12 +12 +Transformer_THT +Transformer_CHK_EI54-12VA_1xSec +Trafo, Printtrafo, CHK, EI54, 12VA, 1x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 12VA 1x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-12VA_2xSec +Trafo, Printtrafo, CHK, EI54, 12VA, 2x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 12VA 2x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-12VA_Neutral +Trafo, Printtrafo, CHK, EI54, 12VA, neutral,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 12VA neutral +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-16VA_1xSec +Trafo, Printtrafo, CHK, EI54, 16VA, 1x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 16VA 1x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-16VA_2xSec +Trafo, Printtrafo, CHK, EI54, 16VA, 2x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 16VA 2x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-16VA_Neutral +Trafo, Printtrafo, CHK, EI54, 16VA, neutral,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 16VA neutral +0 +14 +14 +Transformer_THT +Transformer_CHK_UI30-4VA_Flat +Trafo, Flattrafo, CHK, UI30, 4VA, +Trafo Flattrafo CHK UI30 4VA +0 +16 +16 +Transformer_THT +Transformer_CHK_UI39-10VA_Flat +Trafo, Flattrafo, CHK, UI39, 10VA, +Trafo Flattrafo CHK UI39 10VA +0 +20 +20 +Transformer_THT +Transformer_Coilcraft_Q4434-B_Rhombus-T1311 +Transformator, Transformer, Flyback, Coilcraft Q4434-B, Rgombus T1311, +Transformator Transformer Flyback Coilcraft Q4434-B Rgombus T1311 +0 +8 +8 +Transformer_THT +Transformer_EPCOS_B66359A1013T_Horizontal +Transformer, Transformator, ETD29, 13 Pin, Horizontal, EPCOS-B66359A1013T, +Transformer Transformator ETD29 13 Pin Horizontal EPCOS-B66359A1013T +0 +13 +13 +Transformer_THT +Transformer_EPCOS_B66359J1014T_Vertical +Transformer, Transformator, ETD29, 14 Pin, Vertical, EPCOS-B66359J1014T, +Transformer Transformator ETD29 14 Pin Vertical EPCOS-B66359J1014T +0 +14 +14 +Transformer_THT +Transformer_Microphone_Lundahl_LL1538 +AUDIO TRAFO LUNDAHL, https://www.lundahltransformers.com/wp-content/uploads/datasheets/1538_8xl.pdf +AUDIO TRAFO LUNDAHL +0 +7 +7 +Transformer_THT +Transformer_Microphone_Lundahl_LL1587 +AUDIO TRAFO LUNDAHL, https://www.lundahltransformers.com/wp-content/uploads/datasheets/1587.pdf +AUDIO TRAFO LUNDAHL +0 +7 +7 +Transformer_THT +Transformer_Myrra_74040_Horizontal +Transformer, Transformator, ETD29, 13 Pin, Horizontal, Myrra-74040, +Transformer Transformator ETD29 13 Pin Horizontal Myrra-74040 +0 +13 +13 +Transformer_THT +Transformer_Myrra_EF20_7408x +EF20 flyback transformer,http://myrra.com/wp-content/uploads/2017/09/Datasheet-74087-74088-74089-rev-A.pdf +transformer flyback SMPS +0 +9 +9 +Transformer_THT +Transformer_NF_ETAL_1-1_P1200 +NF-Transformer, 1:1, ETAL P1200,http://www.etalgroup.com/sites/default/files/products/P1200_April_2005.pdf +NF-Transformer 1to1 ETAL P1200 +0 +4 +4 +Transformer_THT +Transformer_NF_ETAL_P1165 +NF-Transformer, ETAL, P1165,http://www.etalgroup.com/sites/default/files/products/P1165_February_2006.pdf +NF-Transformer ETAL P1165 +0 +4 +4 +Transformer_THT +Transformer_NF_ETAL_P3324 +NF-Transformer, ETAL P3324,http://www.etalgroup.com/sites/default/files/products/P3324_April_2005.pdf +NF-Transformer ETAL P3324 +0 +4 +4 +Transformer_THT +Transformer_NF_ETAL_P3356 +NF-Transformer, ETAL P3356, http://www.etalgroup.com/sites/default/files/products/P3356_December_2005.pdf +NF-Transformer ETAL P3356 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D9.0mm_Amidon-T30 +Transformer, Toroid, horizontal, laying, Diameter 9mm, Amidon, T30, +Transformer Toroid horizontal laying Diameter 9mm Amidon T30 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D10.5mm_Amidon-T37 +Transformer, Toroid, horizontal, laying, Diameter 10,5mm, Amidon T37, +Transformer Toroid horizontal laying Diameter 10 5mm Amidon T37 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D12.5mm_Amidon-T44 +Transformer, Toroid, horizontal, laying, Diameter 12,5mm, Amidon T44, +Transformer Toroid horizontal laying Diameter 12 5mm Amidon T44 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D14.0mm_Amidon-T50 +Transformer, Toroid, horizontal, laying, Diameter 14mm, Amidon T50, +Transformer Toroid horizontal laying Diameter 14mm Amidon T50 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D18.0mm +Transformer, Toroid, tapped, horizontal, laying, Diameter 18mm, +Transformer Toroid tapped horizontal laying Diameter 18mm +0 +5 +4 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D9.0mm_Amidon-T30 +Transformer, Toroid, tapped, horizontal, laying, Diameter 9mm, Amidon, T30, +Transformer Toroid tapped horizontal laying Diameter 9mm Amidon T30 +0 +6 +6 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D10.5mm_Amidon-T37 +Transformer, Toroid, tapped, horizontal, laying, Diameter 10,5mm, Amidon, T37, +Transformer Toroid tapped horizontal laying Diameter 10 5mm Amidon T37 +0 +6 +6 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D12.5mm_Amidon-T44 +Transformer, Toroid, tapped, horizontal, laying, Diameter 12,5mm, Amidon, T44, +Transformer Toroid tapped horizontal laying Diameter 12 5mm Amidon T44 +0 +6 +6 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D14.0mm_Amidon-T50 +Transformer, Toroid, tapped, horizontal, laying, Diameter 14mm, Amidon T50, +Transformer Toroid tapped horizontal laying Diameter 14mm Amidon T50 +0 +6 +6 +Valve +Valve_ECC-83-1 +Valve ECC-83-1 round pins +Valve ECC-83-1 round pins +0 +9 +9 +Valve +Valve_ECC-83-2 +Valve ECC-83-2 flat pins +Valve ECC-83-2 flat pins +0 +10 +9 +Valve +Valve_EURO +Valve Euro +Valve Euro +0 +7 +5 +Valve +Valve_Glimm +Valve Glimm +Valve Glimm +0 +2 +2 +Valve +Valve_Mini_G +Valve mini G +Valve mini G +0 +9 +7 +Valve +Valve_Mini_P +Valve mini P +Valve mini P +0 +7 +7 +Valve +Valve_Mini_Pentode_Linear +Mini-Pentode, 5-pin, e.g. JAN6418 +Valve Mini-Pentode 5-pin JAN6418 +0 +5 +5 +Valve +Valve_Noval_G +Valve NOVAL G +Valve NOVAL G +0 +11 +9 +Valve +Valve_Noval_P +Valve NOVAL P +Valve NOVAL P +0 +9 +9 +Valve +Valve_Octal +8-pin round valve +valve +0 +9 +8 +Varistor +RV_Disc_D7mm_W3.4mm_P5mm +Varistor, diameter 7mm, width 3.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.5mm_P5mm +Varistor, diameter 7mm, width 3.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.6mm_P5mm +Varistor, diameter 7mm, width 3.6mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.7mm_P5mm +Varistor, diameter 7mm, width 3.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.8mm_P5mm +Varistor, diameter 7mm, width 3.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.9mm_P5mm +Varistor, diameter 7mm, width 3.9mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.2mm_P5mm +Varistor, diameter 7mm, width 4.2mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.3mm_P5mm +Varistor, diameter 7mm, width 4.3mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.5mm_P5mm +Varistor, diameter 7mm, width 4.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.8mm_P5mm +Varistor, diameter 7mm, width 4.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.9mm_P5mm +Varistor, diameter 7mm, width 4.9mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4mm_P5mm +Varistor, diameter 7mm, width 4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.1mm_P5mm +Varistor, diameter 7mm, width 5.1mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.4mm_P5mm +Varistor, diameter 7mm, width 5.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.5mm_P5mm +Varistor, diameter 7mm, width 5.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.7mm_P5mm +Varistor, diameter 7mm, width 5.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.3mm_P5mm +Varistor, diameter 9mm, width 3.3mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.4mm_P5mm +Varistor, diameter 9mm, width 3.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.5mm_P5mm +Varistor, diameter 9mm, width 3.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.6mm_P5mm +Varistor, diameter 9mm, width 3.6mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.7mm_P5mm +Varistor, diameter 9mm, width 3.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.8mm_P5mm +Varistor, diameter 9mm, width 3.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.9mm_P5mm +Varistor, diameter 9mm, width 3.9mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.1mm_P5mm +Varistor, diameter 9mm, width 4.1mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.2mm_P5mm +Varistor, diameter 9mm, width 4.2mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.4mm_P5mm +Varistor, diameter 9mm, width 4.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.5mm_P5mm +Varistor, diameter 9mm, width 4.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.8mm_P5mm +Varistor, diameter 9mm, width 4.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4mm_P5mm +Varistor, diameter 9mm, width 4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.2mm_P5mm +Varistor, diameter 9mm, width 5.2mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.4mm_P5mm +Varistor, diameter 9mm, width 5.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.5mm_P5mm +Varistor, diameter 9mm, width 5.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.7mm_P5mm +Varistor, diameter 9mm, width 5.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W3.9mm_P7.5mm +Varistor, diameter 12mm, width 3.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.2mm_P7.5mm +Varistor, diameter 12mm, width 4.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.3mm_P7.5mm +Varistor, diameter 12mm, width 4.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.4mm_P7.5mm +Varistor, diameter 12mm, width 4.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.5mm_P7.5mm +Varistor, diameter 12mm, width 4.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.6mm_P7.5mm +Varistor, diameter 12mm, width 4.6mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.7mm_P7.5mm +Varistor, diameter 12mm, width 4.7mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.8mm_P7.5mm +Varistor, diameter 12mm, width 4.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4mm_P7.5mm +Varistor, diameter 12mm, width 4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5.1mm_P7.5mm +Varistor, diameter 12mm, width 5.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5.4mm_P7.5mm +Varistor, diameter 12mm, width 5.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5.8mm_P7.5mm +Varistor, diameter 12mm, width 5.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5mm_P7.5mm +Varistor, diameter 12mm, width 5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.1mm_P7.5mm +Varistor, diameter 12mm, width 6.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.2mm_P7.5mm +Varistor, diameter 12mm, width 6.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.3mm_P7.5mm +Varistor, diameter 12mm, width 6.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.7mm_P7.5mm +Varistor, diameter 12mm, width 6.7mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W7.1mm_P7.5mm +Varistor, diameter 12mm, width 7.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W7.5mm_P7.5mm +Varistor, diameter 12mm, width 7.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W7.9mm_P7.5mm +Varistor, diameter 12mm, width 7.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W3.9mm_P7.5mm +Varistor, diameter 15.5mm, width 3.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.2mm_P7.5mm +Varistor, diameter 15.5mm, width 4.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.3mm_P7.5mm +Varistor, diameter 15.5mm, width 4.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.4mm_P7.5mm +Varistor, diameter 15.5mm, width 4.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.5mm_P7.5mm +Varistor, diameter 15.5mm, width 4.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.6mm_P7.5mm +Varistor, diameter 15.5mm, width 4.6mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.7mm_P7.5mm +Varistor, diameter 15.5mm, width 4.7mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.8mm_P7.5mm +Varistor, diameter 15.5mm, width 4.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.9mm_P7.5mm +Varistor, diameter 15.5mm, width 4.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4mm_P7.5mm +Varistor, diameter 15.5mm, width 4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5.2mm_P7.5mm +Varistor, diameter 15.5mm, width 5.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5.4mm_P7.5mm +Varistor, diameter 15.5mm, width 5.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5.9mm_P7.5mm +Varistor, diameter 15.5mm, width 5.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5mm_P7.5mm +Varistor, diameter 15.5mm, width 5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.1mm_P7.5mm +Varistor, diameter 15.5mm, width 6.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.3mm_P7.5mm +Varistor, diameter 15.5mm, width 6.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.4mm_P7.5mm +Varistor, diameter 15.5mm, width 6.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.8mm_P7.5mm +Varistor, diameter 15.5mm, width 6.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W7.2mm_P7.5mm +Varistor, diameter 15.5mm, width 7.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W7.5mm_P7.5mm +Varistor, diameter 15.5mm, width 7.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W8mm_P7.5mm +Varistor, diameter 15.5mm, width 8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W11mm_P7.5mm +Varistor, diameter 15.5mm, width 11mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.3mm_P10mm +Varistor, diameter 21.5mm, width 4.3mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.4mm_P10mm +Varistor, diameter 21.5mm, width 4.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.5mm_P10mm +Varistor, diameter 21.5mm, width 4.5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.6mm_P10mm +Varistor, diameter 21.5mm, width 4.6mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.7mm_P10mm +Varistor, diameter 21.5mm, width 4.7mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.8mm_P10mm +Varistor, diameter 21.5mm, width 4.8mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.9mm_P10mm +Varistor, diameter 21.5mm, width 4.9mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.1mm_P10mm +Varistor, diameter 21.5mm, width 5.1mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.3mm_P10mm +Varistor, diameter 21.5mm, width 5.3mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.4mm_P10mm +Varistor, diameter 21.5mm, width 5.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.6mm_P10mm +Varistor, diameter 21.5mm, width 5.6mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.8mm_P10mm +Varistor, diameter 21.5mm, width 5.8mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5mm_P10mm +Varistor, diameter 21.5mm, width 5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.1mm_P7.5mm +varistor +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.3mm_P10mm +Varistor, diameter 21.5mm, width 6.3mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.5mm_P10mm +Varistor, diameter 21.5mm, width 6.5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.7mm_P10mm +Varistor, diameter 21.5mm, width 6.7mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.8mm_P10mm +Varistor, diameter 21.5mm, width 6.8mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W7.1mm_P10mm +Varistor, diameter 21.5mm, width 7.1mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W7.5mm_P10mm +Varistor, diameter 21.5mm, width 7.5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W7.9mm_P10mm +Varistor, diameter 21.5mm, width 7.9mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W8.4mm_P10mm +Varistor, diameter 21.5mm, width 8.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W11.4mm_P10mm +Varistor, diameter 21.5mm, width 11.4mm, pitch 10mm +varistor SIOV +0 +2 +2 diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/fp-lib-table b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/fp-lib-table new file mode 100644 index 0000000..750e6f2 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/fp-lib-table @@ -0,0 +1,3 @@ +(fp_lib_table + (lib (name SLC_Free_PCB)(type KiCad)(uri "$(KIPRJMOD)/SLC_Free_PCB.pretty")(options "")(descr "")) +) diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_Mask.gbs b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_Mask.gbs new file mode 100644 index 0000000..1a9066c --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_Mask.gbs @@ -0,0 +1,208 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4-e60b266~84~ubuntu19.04.1* +G04 #@! TF.CreationDate,2019-08-18T21:03:41+02:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534c435f-4672-4656-955f-5043422e6b69,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Bot* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.4-e60b266~84~ubuntu19.04.1) date 2019-08-18 21:03:41* +%MOMM*% +%LPD*% +G04 APERTURE LIST* +%ADD10O,2.000000X2.000000*% +%ADD11C,2.000000*% +%ADD12C,3.400000*% +%ADD13O,4.100000X3.100000*% +%ADD14R,4.100000X3.100000*% +%ADD15O,1.778000X3.454400*% +%ADD16O,1.422400X2.743200*% +%ADD17O,1.625600X3.149600*% +%ADD18R,2.800000X2.800000*% +%ADD19O,2.800000X2.800000*% +%ADD20R,2.000000X2.000000*% +G04 APERTURE END LIST* +D10* +X152981500Y-122110000D03* +D11* +X152981500Y-114490000D03* +D12* +X95430000Y-96890000D03* +D13* +X108230000Y-94790000D03* +X108230000Y-98990000D03* +X102730000Y-94790000D03* +D14* +X102730000Y-98990000D03* +D12* +X95420000Y-108380000D03* +X95420000Y-116780000D03* +D13* +X108220000Y-108380000D03* +X108220000Y-112580000D03* +X108220000Y-116780000D03* +X102720000Y-108380000D03* +X102720000Y-112580000D03* +D14* +X102720000Y-116780000D03* +D10* +X182400000Y-94270000D03* +D11* +X172240000Y-94270000D03* +X141150000Y-96050000D03* +X141150000Y-98550000D03* +D10* +X147925000Y-93480000D03* +D11* +X147925000Y-101100000D03* +D10* +X144810000Y-101090000D03* +D11* +X144810000Y-93470000D03* +D10* +X168395000Y-90375000D03* +D11* +X160775000Y-90375000D03* +D10* +X156250000Y-93505000D03* +D11* +X156250000Y-101125000D03* +D10* +X162650000Y-93205000D03* +D11* +X162650000Y-100825000D03* +D10* +X124050000Y-118950000D03* +D11* +X124050000Y-111330000D03* +D10* +X131275000Y-114200000D03* +D11* +X131275000Y-121820000D03* +D10* +X128725000Y-121820000D03* +D11* +X128725000Y-114200000D03* +D10* +X133725000Y-121820000D03* +D11* +X133725000Y-114200000D03* +D10* +X137325000Y-114200000D03* +D11* +X137325000Y-121820000D03* +D10* +X140725000Y-121820000D03* +D11* +X140725000Y-114200000D03* +D10* +X138300300Y-101079400D03* +D11* +X138300300Y-93459400D03* +D10* +X129075000Y-102170000D03* +D11* +X129075000Y-94550000D03* +D10* +X126200000Y-94080000D03* +D11* +X126200000Y-101700000D03* +X126500000Y-104900000D03* +X129000000Y-104900000D03* +X144075000Y-119575000D03* +X144075000Y-117075000D03* +X150275000Y-117075000D03* +X150275000Y-119575000D03* +X188320000Y-115620000D03* +X185820000Y-115620000D03* +X182400000Y-102570000D03* +X184900000Y-102570000D03* +X159356900Y-98500000D03* +X159356900Y-96000000D03* +X153130000Y-93800000D03* +X153130000Y-96300000D03* +X133347300Y-97538000D03* +X133347300Y-100038000D03* +D15* +X115150000Y-115190000D03* +X117690000Y-115190000D03* +X120230000Y-115190000D03* +X171574300Y-115457200D03* +X174114300Y-115457200D03* +X176654300Y-115457200D03* +D16* +X133347300Y-103848000D03* +X135887300Y-103848000D03* +X138427300Y-103848000D03* +X140967300Y-103848000D03* +X143507300Y-103848000D03* +X146047300Y-103848000D03* +X148587300Y-103848000D03* +X151127300Y-103848000D03* +X153667300Y-103848000D03* +X156207300Y-103848000D03* +X158747300Y-103848000D03* +X161287300Y-103848000D03* +X163827300Y-103848000D03* +X166367300Y-103848000D03* +X166367300Y-111468000D03* +X163827300Y-111468000D03* +X161287300Y-111468000D03* +X158747300Y-111468000D03* +X156207300Y-111468000D03* +X153667300Y-111468000D03* +X143507300Y-111468000D03* +X146047300Y-111468000D03* +X140967300Y-111468000D03* +X138427300Y-111468000D03* +X151127300Y-111468000D03* +X148587300Y-111468000D03* +X135887300Y-111468000D03* +X133347300Y-111468000D03* +D17* +X183817100Y-120586600D03* +X181277100Y-120586600D03* +X178737100Y-120586600D03* +X176197100Y-120586600D03* +X173657100Y-120586600D03* +X157578900Y-90309800D03* +X155038900Y-90309800D03* +X152498900Y-90309800D03* +X149958900Y-90309800D03* +X147418900Y-90309800D03* +X144878900Y-90309800D03* +X142338900Y-90309800D03* +X139798900Y-90309800D03* +X137258900Y-90309800D03* +X134718900Y-90309800D03* +X132178900Y-90309800D03* +X129638900Y-90309800D03* +X127098900Y-90309800D03* +X124558900Y-90309800D03* +X122018900Y-90309800D03* +X119478900Y-90309800D03* +X169593100Y-120586600D03* +X167053100Y-120586600D03* +X164513100Y-120586600D03* +X161973100Y-120586600D03* +X159433100Y-120586600D03* +X156893100Y-120586600D03* +D18* +X183730000Y-90700000D03* +D19* +X173570000Y-90700000D03* +D18* +X182250000Y-105440000D03* +D19* +X182250000Y-115600000D03* +X189140000Y-106300000D03* +D18* +X189140000Y-96140000D03* +D20* +X184900000Y-98160000D03* +D11* +X182400000Y-98160000D03* +X187650000Y-109790000D03* +D20* +X187650000Y-112290000D03* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_Paste.gbp b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_Paste.gbp new file mode 100644 index 0000000..a230cf0 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_Paste.gbp @@ -0,0 +1,14 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4-e60b266~84~ubuntu19.04.1* +G04 #@! TF.CreationDate,2019-08-18T21:03:41+02:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534c435f-4672-4656-955f-5043422e6b69,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Paste,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.4-e60b266~84~ubuntu19.04.1) date 2019-08-18 21:03:41* +%MOMM*% +%LPD*% +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_SilkS.gbo b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_SilkS.gbo new file mode 100644 index 0000000..43a8d79 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Kicad_Layout_PCB_Files/gerber/SLC_Free_PCB-B_SilkS.gbo @@ -0,0 +1,14 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4-e60b266~84~ubuntu19.04.1* +G04 #@! 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a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx new file mode 100644 index 0000000..893334f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.cmx @@ -0,0 +1,27 @@ +<CMX_DB> + <CMX_PROJECT NAME="SLC_Free_Open_Source" LEGACY_PSOC_PROJECT="TRUE" VERSION="Generated by PSoC Designer 5.3.2710" VENDOR="" AUTOASSIGN_PINS="" HYBRID_PROJECT="FALSE" LEGACY_CHIP_NAME="CY8C24423B"> + <BASEPROJ_FILE_PATH PATH="CY8C24423B" BASEPROJ_PSOC_PART="" BASEPROJ_BASE_DEVICE=""/> + <CMX_MAKER_APPLICATION NAME=""/> + <CMX_CONSTANT_LIST/> + <PROJECT_COMPONENTS> + <PROJECT_CREATION> + <COMPONENT NAME="PSoC Designer Core" VERSION="5.3.2710"/> + <COMPONENT NAME="PSoC Designer Documentation" VERSION="5.3.2710"/> + <COMPONENT NAME="PSoC Designer Content" VERSION="5.3.2710"/> + <COMPONENT NAME="ImageCraft Compiler" VERSION="5.3.2710"/> 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0000000..4ade9fc --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep @@ -0,0 +1 @@ +<?xml version="1.0"?><PSOC_WND_PERSIST><APP_EDITOR_SETTINGS><OPEN_FILE PATH=".\main.c" /><EDITOR_TABGROUP SPLIT="Horizontal"><FILE PATH="" /><FILE PATH=".\SLC_Free_Open_Source.soc" /><FILE PATH=".\main.c" ACTIVE="true" /></EDITOR_TABGROUP></APP_EDITOR_SETTINGS><DEBUGGER_SETTINGS><TRACE_MODE VALUE="PCOnly" /><EVENT NUMBER="0" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="1" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="2" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="3" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="4" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="5" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="6" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="7" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="8" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="9" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="10" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="11" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="12" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="13" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="14" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="15" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="16" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="17" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="18" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="19" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="20" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="21" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="22" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="23" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="24" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="25" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="26" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="27" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="28" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="29" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="30" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="31" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="32" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="33" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="34" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="35" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="36" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="37" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="38" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="39" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="40" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="41" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="42" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="43" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="44" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="45" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="46" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="47" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="48" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="49" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="50" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="51" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="52" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="53" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="54" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="55" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="56" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="57" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="58" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="59" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="60" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="61" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="62" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="63" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><GLOBAL_EVENT_CONTROL THREAD8="8 Bit Thread - Active" THREAD16="16 Bit Thread - Active" LOGIC="State Logic - Active" /><MEMWIN_TABGROUP SPLIT="Horizontal"><VIEW BANK="RAM" TITLE="RAM" COLUMNS="8" /><VIEW BANK="FLASH" TITLE="FLASH" COLUMNS="8" /><VIEW BANK="IO Bank 0" TITLE="IO Bank 0" COLUMNS="1" /><VIEW BANK="IO Bank 1" TITLE="IO Bank 1" COLUMNS="1" /></MEMWIN_TABGROUP></DEBUGGER_SETTINGS></PSOC_WND_PERSIST> \ No newline at end of file diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt new file mode 100644 index 0000000..4efa188 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/BuildMsg.txt @@ -0,0 +1,154 @@ +Starting MAKE... +creating project.mk + +lib/adcinc.asm + +lib/adcincint.asm + +lib/amux4_0.asm + +lib/amux4_1.asm + +lib/dac6_vgnd.asm + +lib/dac9_ia.asm + +lib/insamp.asm + +lib/lcd.asm + +CAUTION lib/psocconfig.asm is older than PSoCConfig.xml or missing + +CAUTION you may need to generate source in PSoC Designer + +lib/psocconfig.asm + +lib/psocconfigtbl.asm + +lib/pwm8_heater.asm + +lib/pwm8_heaterint.asm + +lib/pwm8_nb_out.asm + +lib/pwm8_nb_outint.asm + +lib/pwm8_vout.asm + +lib/pwm8_voutint.asm + +lib/sleeptimer.asm + +lib/sleeptimerint.asm + +./boot.asm + +Linking.. + +symbol ADCINC_bGetData is unused + +symbol SleepTimer_bGetTickCntr is unused + +symbol PWM8_Heater_bReadCounter is unused + +symbol ADCINC_iGetData is unused + +symbol SleepTimer_iGetTickCntr is unused + +symbol SleepTimer_lGetTickCntr is unused + +symbol PWM8_Vout_EnableInt is unused + +symbol PWM8_Vout_Stop is unused + +symbol LCD_DrawBG is unused + +symbol SleepTimer_TickWait is unused + +symbol PWM8_Vout_bReadPulseWidth is unused + +symbol PWM8_NB_Out_EnableInt is unused + +symbol SleepTimer_SetTimer is unused + +symbol SleepTimer_SyncWait is unused + +symbol LCD_DrawVBG is unused + +symbol LCD_InitVBG is unused + +symbol ADCINC_Stop is unused + +symbol PWM8_Heater_EnableInt is unused + +symbol PWM8_NB_Out_Stop is unused + +symbol ADCINC_fClearFlag is unused + +symbol INSAMP_Stop is unused + +symbol SleepTimer_bGetTimer is unused + +symbol PWM8_Heater_Stop is unused + +symbol PWM8_NB_Out_bReadPulseWidth is unused + +symbol _LCD_DrawVBG is unused + +symbol SleepTimer_Stop is unused + +symbol AMUX4_0_Stop is unused + +symbol AMUX4_1_Stop is unused + +symbol PWM8_Vout_WritePeriod is unused + +symbol DAC9_Ia_Stop is unused + +symbol ADCINC_WritePulseWidth is unused + +symbol ADCINC_fIsDataAvailable is unused + +symbol PWM8_Heater_bReadPulseWidth is unused + +symbol SleepTimer_DisableInt is unused + +symbol LCD_PrHexInt is unused + +symbol PWM8_Vout_bReadCounter is unused + +symbol DAC9_Ia_WriteBlind is unused + +symbol ADCINC_cClearFlagGetData is unused + +symbol AMUX4_0_Start is unused + +symbol AMUX4_1_Start is unused + +symbol ADCINC_StopADC is unused + +symbol PWM8_NB_Out_WritePeriod is unused + +symbol DAC6_VGND_Stop is unused + +symbol PWM8_Heater_WritePeriod is unused + +symbol PWM8_NB_Out_bReadCounter is unused + +symbol INSAMP_SetGain is unused + +symbol DAC6_VGND_WriteBlind is unused + +603 bytes unused code deleted + +no worthwhile duplicate found + + ROM 92% full. 3758 out of 4096 bytes used (does not include absolute areas). + + RAM 37% full. 94 bytes used (does not include stack usage). + +Built with ICCM8C STD V7.05.00 + + +SLC_Free_Open_Source - 0 error(s) 0 warning(s) 12:56:12 + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml new file mode 100644 index 0000000..45cfc87 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/PSocConfig.xml @@ -0,0 +1,657 @@ +<PSOC_DEVICE_DB> + <PSOC_CONFIG_LIST> + <PSOC_CONFIG NAME="slc_free_28_pin_feb_16_2013" BASE_DEVICE="CY8C24423B" SOURCE_GEN_TIME="1541509742" CONFIG_SAVE_TIME="1541522468" CONFIG_SAVE_DATE="Tue Nov 06 17:41:08 2018 +" VERSION="4.0" DESCRIPTION="" PACKAGE_TYPE="PDIP" PACKAGE_SHAPE="2" LOOP_CONFIG_INIT="Enable" UM_INT_GEN_CONTROL="Disable" CONFIG_NAME_PREPEND="Disable" DESIGN_VERSION="" DOC_FILENAME="" DEVICE_DISPLAY_NAME="CY8C24423A-24PXI" PSOC_EXPRESS_PROJECT="FALSE"> + <DESIGN_FILE_LIST/> + <USER_MODULE_LIST> + <USER_MODULE NAME="ADCINC" INSTANCE_NAME="ADCINC" VERSION="1.20"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="2" NAME="ADC1" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="ADC" TYPE="ANALOG_SC" LOCATION="1 1"> + <REGISTER_LIST> + <REGISTER NAME="CR0" ADDR="84" VALUE="90" DATASHEET_NAME="ASD11CR0"/> + <REGISTER NAME="CR1" ADDR="85" VALUE="0" DATASHEET_NAME="ASD11CR1"/> + <REGISTER NAME="CR2" ADDR="86" VALUE="60" DATASHEET_NAME="ASD11CR2"/> + <REGISTER NAME="CR3" ADDR="87" VALUE="f8" DATASHEET_NAME="ASD11CR3"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <BLOCK_LIST> + <BLOCK NAME="PWM" TYPE="DIGITAL" LOCATION="0"> + <REGISTER_LIST> + <REGISTER NAME="CONTROL_0" ADDR="23" VALUE="0" DATASHEET_NAME="DBB00CR0"/> + <REGISTER NAME="DATA_0" ADDR="20" VALUE="0" DATASHEET_NAME="DBB00DR0"/> + <REGISTER NAME="DATA_1" ADDR="21" VALUE="0" DATASHEET_NAME="DBB00DR1"/> + <REGISTER NAME="DATA_2" ADDR="22" VALUE="1" DATASHEET_NAME="DBB00DR2"/> + <REGISTER NAME="DIG_BasicFunction" ADDR="120" VALUE="31" DATASHEET_NAME="DBB00FN"/> + <REGISTER NAME="DIG_Input" ADDR="121" VALUE="16" DATASHEET_NAME="DBB00IN"/> + <REGISTER NAME="DIG_Output" ADDR="122" VALUE="40" DATASHEET_NAME="DBB00OU"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST> + <RESOURCE NAME="ACmpColBus" TYPE="ANALOG_COMPARATOR_OUTPUT" DEVICE_RESOURCE_NAME="ComparatorBus_1"/> + <RESOURCE NAME="DecimatorAnalog" TYPE="DECIMATOR_COLUMN" DEVICE_RESOURCE_NAME="DecimatorColumn"/> + <RESOURCE NAME="DecimatorDigital" TYPE="DECIMATOR_CLOCK" DEVICE_RESOURCE_NAME="DecimatorClock"/> + </RESOURCE_LIST> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="ClockPhase" VALUE="Normal"/> + <PARAMETER NAME="Data Clock" VALUE="VC2"/> + <PARAMETER NAME="DataFormat" VALUE="Unsigned"/> + <PARAMETER NAME="IntDispatchMode" VALUE="ActiveStatus"/> + <PARAMETER NAME="NegInput" VALUE=""/> + <PARAMETER NAME="NegInput " VALUE="ACB00"/> + <PARAMETER NAME="NegInputGain" VALUE="Disconnected"/> + <PARAMETER NAME="PWM Output" VALUE="None"/> + <PARAMETER NAME="PosInput" VALUE="ACB01"/> + <PARAMETER NAME="PosInput " VALUE=""/> + <PARAMETER NAME="PulseWidth" VALUE="1"/> + <PARAMETER NAME="Resolution" VALUE="8 Bit"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="AMUX4" INSTANCE_NAME="AMUX4_0" VERSION="1.50"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="-1" NAME="AMUX424" LOCKED="FALSE"> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="Analog Column Mux" VALUE="AInMux_0"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="AMUX4" INSTANCE_NAME="AMUX4_1" VERSION="1.50"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="-1" NAME="AMUX424" LOCKED="FALSE"> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="Analog Column Mux" VALUE="AInMux_0"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="DAC6" INSTANCE_NAME="DAC6_VGND" VERSION="4.3"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="4" NAME="DAC62627" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="DAC" TYPE="ANALOG_SC" LOCATION="1 0"> + <REGISTER_LIST> + <REGISTER NAME="CR0" ADDR="80" VALUE="80" DATASHEET_NAME="ASC10CR0"/> + <REGISTER NAME="CR1" ADDR="81" VALUE="40" DATASHEET_NAME="ASC10CR1"/> + <REGISTER NAME="CR2" ADDR="82" VALUE="a0" DATASHEET_NAME="ASC10CR2"/> + <REGISTER NAME="CR3" ADDR="83" VALUE="30" DATASHEET_NAME="ASC10CR3"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="AnalogBus" VALUE="AnalogOutBus_0"/> + <PARAMETER NAME="ClockPhase" VALUE="Normal"/> + <PARAMETER NAME="DataFormat" VALUE="OffsetBinary"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="DAC9" INSTANCE_NAME="DAC9_Ia" VERSION="2.2"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="3" NAME="DAC92627" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="MSB" TYPE="ANALOG_SCA" LOCATION="2 1"> + <REGISTER_LIST> + <REGISTER NAME="CR0" ADDR="94" VALUE="a0" DATASHEET_NAME="ASC21CR0"/> + <REGISTER NAME="CR1" ADDR="95" VALUE="41" DATASHEET_NAME="ASC21CR1"/> + <REGISTER NAME="CR2" ADDR="96" VALUE="a0" DATASHEET_NAME="ASC21CR2"/> + <REGISTER NAME="CR3" ADDR="97" VALUE="34" DATASHEET_NAME="ASC21CR3"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + <BLOCK NAME="LSB" TYPE="ANALOG_SC" LOCATION="2 0"> + <REGISTER_LIST> + <REGISTER NAME="CR0" ADDR="90" VALUE="80" DATASHEET_NAME="ASD20CR0"/> + <REGISTER NAME="CR1" ADDR="91" VALUE="80" DATASHEET_NAME="ASD20CR1"/> + <REGISTER NAME="CR2" ADDR="92" VALUE="20" DATASHEET_NAME="ASD20CR2"/> + <REGISTER NAME="CR3" ADDR="93" VALUE="30" DATASHEET_NAME="ASD20CR3"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="AnalogBus" VALUE="AnalogOutBus_1"/> + <PARAMETER NAME="ClockPhase" VALUE="Normal"/> + <PARAMETER NAME="DataFormat" VALUE="OffsetBinary"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="INSAMP" INSTANCE_NAME="INSAMP" VERSION="2.2"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="1" NAME="IA227" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="NON_INV" TYPE="ANALOG_CT" LOCATION="0 1"> + <REGISTER_LIST> + <REGISTER NAME="CR0" ADDR="75" VALUE="1c" DATASHEET_NAME="ACB01CR0"/> + <REGISTER NAME="CR1" ADDR="76" VALUE="21" DATASHEET_NAME="ACB01CR1"/> + <REGISTER NAME="CR2" ADDR="77" VALUE="20" DATASHEET_NAME="ACB01CR2"/> + <REGISTER NAME="CR3" ADDR="74" VALUE="0" DATASHEET_NAME="ACB01CR3"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + <BLOCK NAME="INV" TYPE="ANALOG_CT" LOCATION="0 0"> + <REGISTER_LIST> + <REGISTER NAME="CR0" ADDR="71" VALUE="dd" DATASHEET_NAME="ACB00CR0"/> + <REGISTER NAME="CR1" ADDR="72" VALUE="21" DATASHEET_NAME="ACB00CR1"/> + <REGISTER NAME="CR2" ADDR="73" VALUE="20" DATASHEET_NAME="ACB00CR2"/> + <REGISTER NAME="CR3" ADDR="70" VALUE="0" DATASHEET_NAME="ACB00CR3"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="AnalogBus" VALUE="Disable"/> + <PARAMETER NAME="Gain" VALUE="8.000"/> + <PARAMETER NAME="Reference" VALUE="AGND"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="LCD" INSTANCE_NAME="LCD" VERSION="1.60"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="-1" NAME="LCD27" LOCKED="FALSE"> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="BarGraph" VALUE="Enable"/> + <PARAMETER NAME="LCDPort" VALUE="Port_2"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="PWM8" INSTANCE_NAME="PWM8_Heater" VERSION="2.60"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="5" NAME="PWM0827" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="PWM8" TYPE="DIGITAL" LOCATION="1"> + <REGISTER_LIST> + <REGISTER NAME="CONTROL_0" ADDR="27" VALUE="0" DATASHEET_NAME="DBB01CR0"/> + <REGISTER NAME="DATA_0" ADDR="24" VALUE="0" DATASHEET_NAME="DBB01DR0"/> + <REGISTER NAME="DATA_1" ADDR="25" VALUE="ff" DATASHEET_NAME="DBB01DR1"/> + <REGISTER NAME="DATA_2" ADDR="26" VALUE="0" DATASHEET_NAME="DBB01DR2"/> + <REGISTER NAME="DIG_BasicFunction" ADDR="124" VALUE="31" DATASHEET_NAME="DBB01FN"/> + <REGISTER NAME="DIG_Input" ADDR="125" VALUE="11" DATASHEET_NAME="DBB01IN"/> + <REGISTER NAME="DIG_Output" ADDR="126" VALUE="44" DATASHEET_NAME="DBB01OU"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="Clock" VALUE="VC3"/> + <PARAMETER NAME="ClockSync" VALUE="Sync to SysClk"/> + <PARAMETER NAME="CompareOut" VALUE="Row_0_Output_0"/> + <PARAMETER NAME="CompareType" VALUE="Less Than"/> + <PARAMETER NAME="Enable" VALUE="High"/> + <PARAMETER NAME="IntDispatchMode" VALUE="ActiveStatus"/> + <PARAMETER NAME="InterruptAPI" VALUE="Enable"/> + <PARAMETER NAME="InterruptType" VALUE="Terminal Count"/> + <PARAMETER NAME="InvertEnable" VALUE="Normal"/> + <PARAMETER NAME="Period" VALUE="255"/> + <PARAMETER NAME="PulseWidth" VALUE="0"/> + <PARAMETER NAME="TerminalCountOut" VALUE="None"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="PWM8" INSTANCE_NAME="PWM8_NB_Out" VERSION="2.60"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="0" NAME="PWM0827" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="PWM8" TYPE="DIGITAL" LOCATION="3"> + <REGISTER_LIST> + <REGISTER NAME="CONTROL_0" ADDR="2f" VALUE="0" DATASHEET_NAME="DCB03CR0"/> + <REGISTER NAME="DATA_0" ADDR="2c" VALUE="0" DATASHEET_NAME="DCB03DR0"/> + <REGISTER NAME="DATA_1" ADDR="2d" VALUE="ff" DATASHEET_NAME="DCB03DR1"/> + <REGISTER NAME="DATA_2" ADDR="2e" VALUE="0" DATASHEET_NAME="DCB03DR2"/> + <REGISTER NAME="DIG_BasicFunction" ADDR="12c" VALUE="31" DATASHEET_NAME="DCB03FN"/> + <REGISTER NAME="DIG_Input" ADDR="12d" VALUE="14" DATASHEET_NAME="DCB03IN"/> + <REGISTER NAME="DIG_Output" ADDR="12e" VALUE="6" DATASHEET_NAME="DCB03OU"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="Clock" VALUE="SysClk*2"/> + <PARAMETER NAME="ClockSync" VALUE="Unsynchronized"/> + <PARAMETER NAME="CompareOut" VALUE="Row_0_Output_2"/> + <PARAMETER NAME="CompareType" VALUE="Less Than"/> + <PARAMETER NAME="Enable" VALUE="High"/> + <PARAMETER NAME="IntDispatchMode" VALUE="ActiveStatus"/> + <PARAMETER NAME="InterruptAPI" VALUE="Enable"/> + <PARAMETER NAME="InterruptType" VALUE="Terminal Count"/> + <PARAMETER NAME="InvertEnable" VALUE="Normal"/> + <PARAMETER NAME="Period" VALUE="255"/> + <PARAMETER NAME="PulseWidth" VALUE="0"/> + <PARAMETER NAME="TerminalCountOut" VALUE="None"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="PWM8" INSTANCE_NAME="PWM8_Vout" VERSION="2.60"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="6" NAME="PWM0827" LOCKED="FALSE"> + <BLOCK_LIST> + <BLOCK NAME="PWM8" TYPE="DIGITAL" LOCATION="2"> + <REGISTER_LIST> + <REGISTER NAME="CONTROL_0" ADDR="2b" VALUE="0" DATASHEET_NAME="DCB02CR0"/> + <REGISTER NAME="DATA_0" ADDR="28" VALUE="0" DATASHEET_NAME="DCB02DR0"/> + <REGISTER NAME="DATA_1" ADDR="29" VALUE="ff" DATASHEET_NAME="DCB02DR1"/> + <REGISTER NAME="DATA_2" ADDR="2a" VALUE="0" DATASHEET_NAME="DCB02DR2"/> + <REGISTER NAME="DIG_BasicFunction" ADDR="128" VALUE="31" DATASHEET_NAME="DCB02FN"/> + <REGISTER NAME="DIG_Input" ADDR="129" VALUE="14" DATASHEET_NAME="DCB02IN"/> + <REGISTER NAME="DIG_Output" ADDR="12a" VALUE="5" DATASHEET_NAME="DCB02OU"/> + </REGISTER_LIST> + <INPUT_LIST/> + </BLOCK> + </BLOCK_LIST> + <RESOURCE_LIST/> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="Clock" VALUE="SysClk*2"/> + <PARAMETER NAME="ClockSync" VALUE="Unsynchronized"/> + <PARAMETER NAME="CompareOut" VALUE="Row_0_Output_1"/> + <PARAMETER NAME="CompareType" VALUE="Less Than"/> + <PARAMETER NAME="Enable" VALUE="High"/> + <PARAMETER NAME="IntDispatchMode" VALUE="ActiveStatus"/> + <PARAMETER NAME="InterruptAPI" VALUE="Enable"/> + <PARAMETER NAME="InterruptType" VALUE="Terminal Count"/> + <PARAMETER NAME="InvertEnable" VALUE="Normal"/> + <PARAMETER NAME="Period" VALUE="255"/> + <PARAMETER NAME="PulseWidth" VALUE="0"/> + <PARAMETER NAME="TerminalCountOut" VALUE="None"/> + </PARAMETER_LIST> + </USER_MODULE> + <USER_MODULE NAME="SleepTimer" INSTANCE_NAME="SleepTimer" VERSION="1.0"> + <SHAPE SHAPE_TYPE="BLOCKLIST" COLOR_INDEX="7" NAME="SleepTimer27" LOCKED="FALSE"> + <RESOURCE_LIST> + <RESOURCE NAME="SLEEPINT" TYPE="SLEEP_INTERRUPT" DEVICE_RESOURCE_NAME="SleepInterrupt"/> + </RESOURCE_LIST> + </SHAPE> + <PARAMETER_LIST> + <PARAMETER NAME="IntDispatchMode" VALUE="ActiveStatus"/> + <PARAMETER NAME="TickCounterSize" VALUE="4 Bytes"/> + </PARAMETER_LIST> + </USER_MODULE> + </USER_MODULE_LIST> + <USER_MODULE_GROUP_LIST/> + <DEVICE_DATA> + <GLOBAL_RESOURCE_LIST> + <RESOURCE NAME="32K_Select" VALUE="Internal"/> + <RESOURCE NAME="AGndBypass" VALUE="Disable"/> + <RESOURCE NAME="A_Buff_Power" VALUE="High"/> + <RESOURCE NAME="Analog Power" VALUE="SC On/Ref High"/> + <RESOURCE NAME="CPU_Clock" VALUE="SysClk/2"/> + <RESOURCE NAME="LVDThrottleBack" VALUE="Disable"/> + <RESOURCE NAME="Op-Amp Bias" VALUE="Low"/> + <RESOURCE NAME="PLL_Mode" VALUE="Disable"/> + <RESOURCE NAME="Power Setting [ Vcc / SysClk freq ]" VALUE="5.0V / 24MHz"/> + <RESOURCE NAME="Ref Mux" VALUE="(1.6 BandGap)+/-(1.6 BandGap)"/> + <RESOURCE NAME="Sleep_Timer" VALUE="512_Hz"/> + <RESOURCE NAME="SwitchModePump" VALUE="OFF"/> + <RESOURCE NAME="SysClk Source" VALUE="Internal"/> + <RESOURCE NAME="SysClk*2 Disable" VALUE="No"/> + <RESOURCE NAME="Trip Voltage [LVD (SMP)]" VALUE="4.73V (4.82V)"/> + <RESOURCE NAME="VC1= SysClk/N" VALUE="1"/> + <RESOURCE NAME="VC2= VC1/N" VALUE="12"/> + <RESOURCE NAME="VC3 Divider" VALUE="48"/> + <RESOURCE NAME="VC3 Source" VALUE="SysClk/1"/> + <RESOURCE NAME="Watchdog Enable" VALUE="Disable"/> + </GLOBAL_RESOURCE_LIST> + <RESERVED_RESOURCE_LIST> + <RESOURCE NAME="" VALUE="" TYPE=""/> + <RESOURCE NAME="24MHz_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="32KHz_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="ASD11-ASC10" VALUE="" TYPE="DIRECT_INPUT"/> + <RESOURCE NAME="ASD20-ASC21" VALUE="" TYPE="DIRECT_INPUT"/> + <RESOURCE NAME="AnalogClock_0_Select" VALUE="" TYPE="ANALOG_CLOCK_SELECT"/> + <RESOURCE NAME="AnalogClock_1_Select" VALUE="" TYPE="ANALOG_CLOCK_SELECT"/> + <RESOURCE NAME="AnalogColumn_Clock_0" VALUE="VC2" TYPE="ANALOG_COLUMN_CLOCK_MUX"/> + <RESOURCE NAME="AnalogColumn_Clock_1" VALUE="VC2" TYPE="ANALOG_COLUMN_CLOCK_MUX"/> + <RESOURCE NAME="AnalogColumn_InputMUX_0" VALUE="Port_0_3" TYPE="COLUMN_INPUT"/> + <RESOURCE NAME="AnalogColumn_InputMUX_1" VALUE="Port_0_4" TYPE="COLUMN_INPUT"/> + <RESOURCE NAME="AnalogColumn_InputSelect_1" VALUE="AnalogColumn_InputMUX_1" TYPE="COLUMN_INPUT_SELECT"/> + <RESOURCE NAME="AnalogColumn_Modulator_0" VALUE="None" TYPE="ANALOG_MODULATOR"/> + <RESOURCE NAME="AnalogColumn_Modulator_1" VALUE="None" TYPE="ANALOG_MODULATOR"/> + <RESOURCE NAME="AnalogComparatorControl_0" VALUE="" TYPE="ANALOG_COMPARATOR_CONTROL"/> + <RESOURCE NAME="AnalogComparatorControl_1" VALUE="" TYPE="ANALOG_COMPARATOR_CONTROL"/> + <RESOURCE NAME="AnalogInterruptSource_Col_0" VALUE="" TYPE="ANALOG_INTERRUPT_SOURCE"/> + <RESOURCE NAME="AnalogInterruptSource_Col_1" VALUE="" TYPE="ANALOG_INTERRUPT_SOURCE"/> + <RESOURCE NAME="AnalogLUT_0" VALUE="A" TYPE="ANALOG_LUT"/> + <RESOURCE NAME="AnalogLUT_1" VALUE="A" TYPE="ANALOG_LUT"/> + <RESOURCE NAME="AnalogOutBuf_0" VALUE="Port_0_3" TYPE="ANALOG_DRIVER"/> + <RESOURCE NAME="AnalogOutBuf_1" VALUE="Port_0_5" TYPE="ANALOG_DRIVER"/> + <RESOURCE NAME="AnalogOutBus_0" VALUE="ASC10" TYPE="ANALOG_COLUMN_OUTPUT"/> + <RESOURCE NAME="AnalogOutBus_1" VALUE="ASC21" TYPE="ANALOG_COLUMN_OUTPUT"/> + <RESOURCE NAME="AnalogPhiClock_Col_0" VALUE="" TYPE="ANALOG_PHI_CLOCK"/> + <RESOURCE NAME="AnalogPhiClock_Col_1" VALUE="" TYPE="ANALOG_PHI_CLOCK"/> + <RESOURCE NAME="ComparatorBus_0" VALUE="" TYPE="ANALOG_COMPARATOR_OUTPUT"/> + <RESOURCE NAME="ComparatorBus_1" VALUE="ACB01" TYPE="ANALOG_COMPARATOR_OUTPUT"/> + <RESOURCE NAME="ComparatorClock" VALUE="" TYPE="COMPARATOR_CLOCK"/> + <RESOURCE NAME="ComparatorGate_0" VALUE="None" TYPE="COMPARATOR_ENABLE"/> + <RESOURCE NAME="ComparatorGate_1" VALUE="None" TYPE="COMPARATOR_ENABLE"/> + <RESOURCE NAME="DBB00-DBB01" VALUE="" TYPE="DIRECT_INPUT"/> + <RESOURCE NAME="DBB01-DCB02" VALUE="" TYPE="DIRECT_INPUT"/> + <RESOURCE NAME="DCB02-DCB03" VALUE="" TYPE="DIRECT_INPUT"/> + <RESOURCE NAME="DecimatorClock" VALUE="DBB00" TYPE="DECIMATOR_CLOCK"/> + <RESOURCE NAME="DecimatorColumn" VALUE="ComparatorBus_1" TYPE="DECIMATOR_COLUMN"/> + <RESOURCE NAME="GlobalEven_0_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_1_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_2_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_3_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_4_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_5_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_6_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalEven_7_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalInEven_0" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_1" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_2" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_3" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_4" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_5" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_6" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInEven_7" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_0" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_1" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_2" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_3" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_4" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_5" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_6" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalInOdd_7" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOdd_0_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_1_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_2_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_3_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_4_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_5_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_6_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOdd_7_Interconnect" VALUE="NC" TYPE="GLOBAL_BUS_SHORT"/> + <RESOURCE NAME="GlobalOutEven_0" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_1" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_2" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_3" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_4" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_5" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_6" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutEven_7" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_0" VALUE="Row_0_Output_0_Drive_2" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_1" VALUE="Row_0_Output_1_Drive_2" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_2" VALUE="Row_0_Output_2_Drive_2" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_3" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_4" VALUE="Row_0_Output_0_Drive_3" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_5" VALUE="Row_0_Output_1_Drive_3" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_6" VALUE="Row_0_Output_2_Drive_3" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="GlobalOutOdd_7" VALUE="" TYPE="GLOBAL_BUS"/> + <RESOURCE NAME="I2CController" VALUE="" TYPE="I2C_CONTROLLER"/> + <RESOURCE NAME="Port_0_0" VALUE="AnalogInput" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogInput"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_0_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_0_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_0_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_1" VALUE="AnalogInput" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogInput"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_1_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_1_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_1_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_2" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_0_2_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_0_2_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_2_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_3" VALUE="AnalogOutBuf_0" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogOutBuf_0"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_3_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_3_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_3_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_4" VALUE="AnalogInput" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogInput"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_4_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_4_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_4_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_5" VALUE="AnalogOutBuf_1" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogOutBuf_1"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_5_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_5_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_5_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_6" VALUE="AnalogInput" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogInput"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_6_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_6_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_6_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_0_7" VALUE="AnalogInput" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="AnalogInput"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_0_7_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_0_7_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_0_7_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_0" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_1_0_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_1_0_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_0_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_1" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_1_1_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_1_1_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_1_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_2" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_1_2_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_1_2_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_2_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_3" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_1_3_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_1_3_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_3_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_4" VALUE="GlobalOutOdd_4" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="GlobalOutOdd_4"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_1_4_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_1_4_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_4_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_5" VALUE="GlobalOutOdd_5" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="GlobalOutOdd_5"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_1_5_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_1_5_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_5_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_6" VALUE="GlobalOutOdd_6" TYPE="PIN"> + <PIN_VALUE_LIST> + <PIN_VALUE NAME="GlobalOutOdd_6"/> + </PIN_VALUE_LIST> + </RESOURCE> + <RESOURCE NAME="Port_1_6_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_1_6_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_6_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_1_7" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_1_7_Drive" VALUE="High Z Analog" TYPE="PIN"/> + <RESOURCE NAME="Port_1_7_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_1_7_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_0" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_0_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_0_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_0_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_1" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_1_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_1_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_1_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_2" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_2_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_2_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_2_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_3" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_3_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_3_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_3_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_4" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_4_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_4_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_4_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_5" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_5_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_5_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_5_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_6" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_6_Drive" VALUE="Strong" TYPE="PIN"/> + <RESOURCE NAME="Port_2_6_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_6_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Port_2_7" VALUE="StdCPU" TYPE="PIN"/> + <RESOURCE NAME="Port_2_7_Drive" VALUE="High Z" TYPE="PIN"/> + <RESOURCE NAME="Port_2_7_InitialValue" VALUE="0" TYPE="PIN"/> + <RESOURCE NAME="Port_2_7_Interrupt" VALUE="DisableInt" TYPE="PIN"/> + <RESOURCE NAME="Row_0_Broadcast" VALUE="None" TYPE="ROW_BROADCAST"/> + <RESOURCE NAME="Row_0_Input_0" VALUE="GlobalInEven_0" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Input_0_Sync" VALUE="SysClk_Sync" TYPE="ROW_INPUT_SYNC"/> + <RESOURCE NAME="Row_0_Input_1" VALUE="GlobalInEven_1" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Input_1_Sync" VALUE="SysClk_Sync" TYPE="ROW_INPUT_SYNC"/> + <RESOURCE NAME="Row_0_Input_2" VALUE="GlobalInEven_2" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Input_2_Sync" VALUE="SysClk_Sync" TYPE="ROW_INPUT_SYNC"/> + <RESOURCE NAME="Row_0_Input_3" VALUE="GlobalInEven_3" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Input_3_Sync" VALUE="SysClk_Sync" TYPE="ROW_INPUT_SYNC"/> + <RESOURCE NAME="Row_0_LogicTable_Input_0" VALUE="Row_0_Output_0" TYPE="ROW_LOGIC_TABLE_INPUT_MUX"/> + <RESOURCE NAME="Row_0_LogicTable_Input_1" VALUE="Row_0_Output_1" TYPE="ROW_LOGIC_TABLE_INPUT_MUX"/> + <RESOURCE NAME="Row_0_LogicTable_Input_2" VALUE="Row_0_Output_2" TYPE="ROW_LOGIC_TABLE_INPUT_MUX"/> + <RESOURCE NAME="Row_0_LogicTable_Input_3" VALUE="Row_0_Output_3" TYPE="ROW_LOGIC_TABLE_INPUT_MUX"/> + <RESOURCE NAME="Row_0_LogicTable_Select_0" VALUE="A" TYPE="ROW_LOGIC_TABLE_SELECT"/> + <RESOURCE NAME="Row_0_LogicTable_Select_1" VALUE="A" TYPE="ROW_LOGIC_TABLE_SELECT"/> + <RESOURCE NAME="Row_0_LogicTable_Select_2" VALUE="A" TYPE="ROW_LOGIC_TABLE_SELECT"/> + <RESOURCE NAME="Row_0_LogicTable_Select_3" VALUE="A" TYPE="ROW_LOGIC_TABLE_SELECT"/> + <RESOURCE NAME="Row_0_Output_0" VALUE="DBB01" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Output_0_Drive_0" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_0_Drive_1" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_0_Drive_2" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_0_Drive_3" VALUE="GlobalOutOdd_4" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_1" VALUE="DCB02" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Output_1_Drive_0" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_1_Drive_1" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_1_Drive_2" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_1_Drive_3" VALUE="GlobalOutOdd_5" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_2" VALUE="DCB03" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Output_2_Drive_0" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_2_Drive_1" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_2_Drive_2" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_2_Drive_3" VALUE="GlobalOutOdd_6" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_3" VALUE="" TYPE="ROW_BUS"/> + <RESOURCE NAME="Row_0_Output_3_Drive_0" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_3_Drive_1" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_3_Drive_2" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="Row_0_Output_3_Drive_3" VALUE="Off" TYPE="ROW_OUTPUT_DRIVE"/> + <RESOURCE NAME="SleepInterrupt" VALUE="" TYPE="SLEEP_INTERRUPT"/> + <RESOURCE NAME="SysClk*2_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="SysClk_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="VC1_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="VC2_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="VC3Interrupt" VALUE="" TYPE="DIVIDER_INTERRUPT"/> + <RESOURCE NAME="VC3_Global_Drive" VALUE="DriveOff" TYPE="GLOBAL_BUS_OSCILLATOR_DRIVE"/> + <RESOURCE NAME="VT" VALUE="" TYPE="TEMPERATURE_VOLTAGE"/> + </RESERVED_RESOURCE_LIST> + <GLOBAL_REGISTER_LIST> + <REGISTER NAME="AnalogClockSelect1" VALUE="0" ADDR="161" DATASHEET_NAME="CLK_CR1"/> + <REGISTER NAME="AnalogClockSelect2" VALUE="0" ADDR="169" DATASHEET_NAME="CLK_CR2"/> + <REGISTER NAME="AnalogColumnClockSelect" VALUE="5" ADDR="160" DATASHEET_NAME="CLK_CR0"/> + <REGISTER NAME="AnalogColumnInputSelect" VALUE="9" ADDR="60" DATASHEET_NAME="AMX_IN"/> + <REGISTER NAME="AnalogComparatorControl1" VALUE="0" ADDR="66" DATASHEET_NAME="CMP_CR1"/> + <REGISTER NAME="AnalogIOControl_0" VALUE="29" ADDR="162" DATASHEET_NAME="ABF_CR0"/> + <REGISTER NAME="AnalogLUTControl0" VALUE="33" ADDR="167" DATASHEET_NAME="ALT_CR0"/> + <REGISTER NAME="AnalogLUTControl1" VALUE="0" ADDR="168" DATASHEET_NAME="ALT_CR1"/> + <REGISTER NAME="AnalogModulatorControl_0" VALUE="0" ADDR="163" DATASHEET_NAME="AMD_CR0"/> + <REGISTER NAME="AnalogModulatorControl_1" VALUE="0" ADDR="166" DATASHEET_NAME="AMD_CR1"/> + <REGISTER NAME="AnalogReferenceControl" VALUE="3f" ADDR="63" DATASHEET_NAME="ARF_CR"/> + <REGISTER NAME="AnalogSyncControl" VALUE="0" ADDR="65" DATASHEET_NAME="ASY_CR"/> + <REGISTER NAME="DecimatorControl_0" VALUE="2" ADDR="e6" DATASHEET_NAME="DEC_CR0"/> + <REGISTER NAME="DecimatorControl_1" VALUE="2" ADDR="e7" DATASHEET_NAME="DEC_CR1"/> + <REGISTER NAME="GlobalDigitalInterconnect_Drive_Even_Input" VALUE="0" ADDR="1d1" DATASHEET_NAME="GDI_E_IN"/> + <REGISTER NAME="GlobalDigitalInterconnect_Drive_Even_Output" VALUE="0" ADDR="1d3" DATASHEET_NAME="GDI_E_OU"/> + <REGISTER NAME="GlobalDigitalInterconnect_Drive_Odd_Input" VALUE="0" ADDR="1d0" DATASHEET_NAME="GDI_O_IN"/> + <REGISTER NAME="GlobalDigitalInterconnect_Drive_Odd_Output" VALUE="0" ADDR="1d2" DATASHEET_NAME="GDI_O_OU"/> + <REGISTER NAME="I2CConfig" VALUE="0" ADDR="d6" DATASHEET_NAME="I2CCFG"/> + <REGISTER NAME="OscillatorControl_1" VALUE="10b" ADDR="1e1" DATASHEET_NAME="OSC_CR1"/> + <REGISTER NAME="OscillatorControl_2" VALUE="0" ADDR="1e2" DATASHEET_NAME="OSC_CR2"/> + <REGISTER NAME="OscillatorControl_3" VALUE="12f" ADDR="1df" DATASHEET_NAME="OSC_CR3"/> + <REGISTER NAME="OscillatorControl_4" VALUE="0" ADDR="1de" DATASHEET_NAME="OSC_CR4"/> + <REGISTER NAME="OscillatorGlobalBusEnableControl" VALUE="0" ADDR="1dd" DATASHEET_NAME="OSC_GO_EN"/> + <REGISTER NAME="Port_0_Data" VALUE="0" ADDR="0" DATASHEET_NAME="PRT0DR"/> + <REGISTER NAME="Port_0_DriveMode_0" VALUE="4" ADDR="100" DATASHEET_NAME="PRT0DM0"/> + <REGISTER NAME="Port_0_DriveMode_1" VALUE="fb" ADDR="101" DATASHEET_NAME="PRT0DM1"/> + <REGISTER NAME="Port_0_DriveMode_2" VALUE="fb" ADDR="3" DATASHEET_NAME="PRT0DM2"/> + <REGISTER NAME="Port_0_GlobalSelect" VALUE="0" ADDR="2" DATASHEET_NAME="PRT0GS"/> + <REGISTER NAME="Port_0_IntCtrl_0" VALUE="0" ADDR="102" DATASHEET_NAME="PRT0IC0"/> + <REGISTER NAME="Port_0_IntCtrl_1" VALUE="0" ADDR="103" DATASHEET_NAME="PRT0IC1"/> + <REGISTER NAME="Port_0_IntEn" VALUE="0" ADDR="1" DATASHEET_NAME="PRT0IE"/> + <REGISTER NAME="Port_1_Data" VALUE="0" ADDR="4" DATASHEET_NAME="PRT1DR"/> + <REGISTER NAME="Port_1_DriveMode_0" VALUE="70" ADDR="104" DATASHEET_NAME="PRT1DM0"/> + <REGISTER NAME="Port_1_DriveMode_1" VALUE="8f" ADDR="105" DATASHEET_NAME="PRT1DM1"/> + <REGISTER NAME="Port_1_DriveMode_2" VALUE="8f" ADDR="7" DATASHEET_NAME="PRT1DM2"/> + <REGISTER NAME="Port_1_GlobalSelect" VALUE="70" ADDR="6" DATASHEET_NAME="PRT1GS"/> + <REGISTER NAME="Port_1_IntCtrl_0" VALUE="0" ADDR="106" DATASHEET_NAME="PRT1IC0"/> + <REGISTER NAME="Port_1_IntCtrl_1" VALUE="0" ADDR="107" DATASHEET_NAME="PRT1IC1"/> + <REGISTER NAME="Port_1_IntEn" VALUE="0" ADDR="5" DATASHEET_NAME="PRT1IE"/> + <REGISTER NAME="Port_2_Data" VALUE="0" ADDR="8" DATASHEET_NAME="PRT2DR"/> + <REGISTER NAME="Port_2_DriveMode_0" VALUE="7f" ADDR="108" DATASHEET_NAME="PRT2DM0"/> + <REGISTER NAME="Port_2_DriveMode_1" VALUE="80" ADDR="109" DATASHEET_NAME="PRT2DM1"/> + <REGISTER NAME="Port_2_DriveMode_2" VALUE="0" ADDR="b" DATASHEET_NAME="PRT2DM2"/> + <REGISTER NAME="Port_2_GlobalSelect" VALUE="0" ADDR="a" DATASHEET_NAME="PRT2GS"/> + <REGISTER NAME="Port_2_IntCtrl_0" VALUE="0" ADDR="10a" DATASHEET_NAME="PRT2IC0"/> + <REGISTER NAME="Port_2_IntCtrl_1" VALUE="0" ADDR="10b" DATASHEET_NAME="PRT2IC1"/> + <REGISTER NAME="Port_2_IntEn" VALUE="0" ADDR="9" DATASHEET_NAME="PRT2IE"/> + <REGISTER NAME="Row_0_InputMux" VALUE="0" ADDR="b0" DATASHEET_NAME="RDI0RI"/> + <REGISTER NAME="Row_0_InputSync" VALUE="0" ADDR="b1" DATASHEET_NAME="RDI0SYN"/> + <REGISTER NAME="Row_0_LogicInputAMux" VALUE="0" ADDR="b2" DATASHEET_NAME="RDI0IS"/> + <REGISTER NAME="Row_0_LogicSelect_0" VALUE="33" ADDR="b3" DATASHEET_NAME="RDI0LT0"/> + <REGISTER NAME="Row_0_LogicSelect_1" VALUE="33" ADDR="b4" DATASHEET_NAME="RDI0LT1"/> + <REGISTER NAME="Row_0_OutputDrive_0" VALUE="88" ADDR="b5" DATASHEET_NAME="RDI0SRO0"/> + <REGISTER NAME="Row_0_OutputDrive_1" VALUE="8" ADDR="b6" DATASHEET_NAME="RDI0SRO1"/> + </GLOBAL_REGISTER_LIST> + <PIN_DESC_LIST> + <PIN_DESC PIN_NUMBER="1" PIN_LABEL="P0[7]" PIN_SELECT="AnalogInput" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_0_7" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="2" PIN_LABEL="P0[5]" PIN_SELECT="AnalogOutBuf_1" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="AnalogOutBuf_1" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="3" PIN_LABEL="P0[3]" PIN_SELECT="AnalogOutBuf_0" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="AnalogOutBuf_0" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="4" PIN_LABEL="P0[1]" PIN_SELECT="AnalogInput" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_0_1" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="5" PIN_LABEL="P2[7]" PIN_SELECT="StdCPU" PIN_DRIVE="High Z" PIN_DATA="" PIN_CUSTOM_NAME="MISO" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="6" PIN_LABEL="P2[5]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDRS" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="7" PIN_LABEL="P2[3]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDD7" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="8" PIN_LABEL="P2[1]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDD5" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="9" PIN_LABEL="SMP" PIN_SELECT="" PIN_DRIVE="" PIN_DATA="" PIN_CUSTOM_NAME="" PIN_INTERRUPT=""/> + <PIN_DESC PIN_NUMBER="10" PIN_LABEL="P1[7]" PIN_SELECT="StdCPU" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="CLK" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="11" PIN_LABEL="P1[5]" PIN_SELECT="GlobalOutOdd_5" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="Port_1_5" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="12" PIN_LABEL="P1[3]" PIN_SELECT="StdCPU" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="CS" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="13" PIN_LABEL="P1[1]" PIN_SELECT="StdCPU" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_1_1" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="14" PIN_LABEL="VSS" PIN_SELECT="" PIN_DRIVE="" PIN_DATA="" PIN_CUSTOM_NAME="" PIN_INTERRUPT=""/> + <PIN_DESC PIN_NUMBER="15" PIN_LABEL="P1[0]" PIN_SELECT="StdCPU" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_1_0" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="16" PIN_LABEL="P1[2]" PIN_SELECT="StdCPU" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_1_2" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="17" PIN_LABEL="P1[4]" PIN_SELECT="GlobalOutOdd_4" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="Port_1_4" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="18" PIN_LABEL="P1[6]" PIN_SELECT="GlobalOutOdd_6" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="Port_1_6" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="19" PIN_LABEL="XRES" PIN_SELECT="" PIN_DRIVE="" PIN_DATA="" PIN_CUSTOM_NAME="" PIN_INTERRUPT=""/> + <PIN_DESC PIN_NUMBER="20" PIN_LABEL="P2[0]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDD4" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="21" PIN_LABEL="P2[2]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDD6" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="22" PIN_LABEL="P2[4]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDE" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="23" PIN_LABEL="P2[6]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="LCDRW" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="24" PIN_LABEL="P0[0]" PIN_SELECT="AnalogInput" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_0_0" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="25" PIN_LABEL="P0[2]" PIN_SELECT="StdCPU" PIN_DRIVE="Strong" PIN_DATA="" PIN_CUSTOM_NAME="Port_0_2" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="26" PIN_LABEL="P0[4]" PIN_SELECT="AnalogInput" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_0_4" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="27" PIN_LABEL="P0[6]" PIN_SELECT="AnalogInput" PIN_DRIVE="High Z Analog" PIN_DATA="" PIN_CUSTOM_NAME="Port_0_6" PIN_INTERRUPT="DisableInt"/> + <PIN_DESC PIN_NUMBER="28" PIN_LABEL="VDD" PIN_SELECT="" PIN_DRIVE="" PIN_DATA="" PIN_CUSTOM_NAME="" PIN_INTERRUPT=""/> + </PIN_DESC_LIST> + </DEVICE_DATA> + <CONFIG_PREFERENCES> + <SELECTED_USER_MODULE_LIST/> + </CONFIG_PREFERENCES> + </PSOC_CONFIG> + </PSOC_CONFIG_LIST> +</PSOC_DEVICE_DB> diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc new file mode 100644 index 0000000..81f24c3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/SLC_Free_Open_Source.soc @@ -0,0 +1,102 @@ +<!--Project DB Ver 2.03 02/12/02--> +<PSOC_PROJECT> + <!--We define a configuration as a customer designed architectural arrangement of our User Modules.--> + <CONFIGURATION ATTR="This is an attr"> + <PLACED_USER_MODULE_LIST> + </PLACED_USER_MODULE_LIST> + </CONFIGURATION> + <APPLICATION> + <FILE_LIST> + <SOURCE_FILE_LIST> + <SOURCE_FILE NAME="main.c" TYPE="UserSourceModule" LANGUAGE="C"/> + <SOURCE_FILE NAME="flashsecurity.txt" TYPE="TextFile" LANGUAGE="" OVERLAY_NAME=""/> + <SOURCE_FILE NAME="psocapi.h" TYPE="LibraryIncludeFile" LANGUAGE="C" OVERLAY_NAME="" FILEMODTIME="216169440" LIBTIME="1" USER_FILE="FALSE" PATH_IN_TREE=""/> + <SOURCE_FILE NAME="psocapi.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" FILEMODTIME="216169440" LIBTIME="3" USER_FILE="FALSE" PATH_IN_TREE=""/> + <SOURCE_FILE NAME="memory.inc" TYPE="UserIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE"/> + <SOURCE_FILE NAME="adcinc.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="adcinc.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="adcinc.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="adcincint.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="amux4_0.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="amux4_0.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="amux4_0.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="amux4_1.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="amux4_1.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="amux4_1.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="dac6_vgnd.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="dac6_vgnd.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="dac6_vgnd.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="dac9_ia.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="dac9_ia.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="dac9_ia.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="insamp.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="insamp.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="insamp.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="lcd.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="lcd.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="lcd.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_heaterint.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_heater.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_heater.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_heater.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_nb_outint.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_nb_out.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_nb_out.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_nb_out.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_voutint.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_vout.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_vout.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="pwm8_vout.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="sleeptimer.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="sleeptimer.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="sleeptimer.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="sleeptimerint.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="839738659" LIBTIME="1996219444"/> + <SOURCE_FILE NAME="psocconfigtbl.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="137551440" LIBTIME="162545664"/> + <SOURCE_FILE NAME="psocgpioint.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="137551440" LIBTIME="168168000"/> + <SOURCE_FILE NAME="psocgpioint.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="137551440" LIBTIME="168168000"/> + <SOURCE_FILE NAME="psocconfig.asm" TYPE="LibrarySource" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="137551440" LIBTIME="168168547"/> + <SOURCE_FILE NAME="boot.asm" TYPE="UserSourceModule" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE=""/> + <SOURCE_FILE NAME="globalparams.inc" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="137551440" LIBTIME="168167443"/> + <SOURCE_FILE NAME="globalparams.h" TYPE="LibraryIncludeFile" LANGUAGE="ASM" OVERLAY_NAME="" USER_FILE="FALSE" PATH_IN_TREE="" FILEMODTIME="137551440" LIBTIME="168167443"/> + </SOURCE_FILE_LIST> + <LIB_FILE_LIST> + <LIB_FILE NAME="libPSoC.a" TYPE="UserLibrary"> + </LIB_FILE> + </LIB_FILE_LIST> + </FILE_LIST> + <BUILD_SETTINGS> + <BUILD COMPILER="IMAGECRAFT" INCLUDE_PATH="C:\PROGRA~2\Cypress\PSOCDE~1\5.4\Common\CYPRES~1\tools\include\CY8C24~1"/> + </BUILD_SETTINGS> + <MISC> + <WINDOWPOSITIONS> + <WINDOWPOSITION x="0" y="0" cx="100" cy="1000"> + </WINDOWPOSITION> + </WINDOWPOSITIONS> + <OPEN_WINDOWS> + <WINDOW NAME="xxx"> + </WINDOW> + </OPEN_WINDOWS> + </MISC> + </APPLICATION> + <PROJECT_SETTINGS> + <SECTION SECTION_NAME="Linker Settings" VENDOR="HI-TECH" LIB_PATH="" LIBS="" OPTIONS=""/> + <SECTION SECTION_NAME="Linker Settings" VENDOR="IMAGECRAFT" LIB_PATH="" LIBS="" RELOC_ADDR_START="336" ENABLE_ALIGN_SHIFT="0" ENABLE_24MHZ_WARNING="0" ALLOW_24MHZSHIFTOPTS="0"/> + <SECTION SECTION_NAME="Linker Settings" VENDOR="ImageCraftPro" LIB_PATH="" LIBS="" RELOC_ADDR_START="336" ENABLE_ALIGN_SHIFT="0" ENABLE_24MHZ_WARNING="0" ALLOW_24MHZSHIFTOPTS="0"/> + <SECTION SECTION_NAME="Compiler Settings" VENDOR="HI-TECH" ADDITIONAL_INCLUDE_PATH="" MACRO_DEFINES="" MACRO_UNDEFINES="" OPTIONS="" ATTR_GLOBAL_OPT="1" ASSEMBLER_OPT="1" OPTIMIZATIONS="9" WARNING_LEVEL="9" INHERIT="0"/> + <SECTION SECTION_NAME="Compiler Settings" VENDOR="IMAGECRAFT" ADDITIONAL_INCLUDE_PATH="" MACRO_DEFINES="" MACRO_UNDEFINES="" ENABLE_CODE_COMPRESSOR="1" ENABLE_UM_DEAD_CODE_ELIM="1" ENABLE_MAC="1" ENABLE_MATH_OPTIMIZE="1" ENABLE_PAGING="0" STACKPAGE_OFFSET="0" CSFLOW="1" MAC_ALLOWED="1" USE_CONST_AS_FLASH="1" INHERIT="0"/> + <SECTION SECTION_NAME="Compiler Settings" VENDOR="ImageCraftPro" ADDITIONAL_INCLUDE_PATH="" MACRO_DEFINES="" MACRO_UNDEFINES="" ENABLE_CODE_COMPRESSOR="0" ENABLE_UM_DEAD_CODE_ELIM="0" ENABLE_MAC="1" ENABLE_MATH_OPTIMIZE="0" ENABLE_PAGING="1" STACKPAGE_OFFSET="0" CSFLOW="0" MAC_ALLOWED="1" USE_CONST_AS_FLASH="1" ENABLE_PRO_OPTS="1" ELIM_USER_UNUSED_CODE="1" PRO_OPT_FOR_SPEED="0" INHERIT="-1"/> + <SECTION SECTION_NAME="Programmer Settings" RESET_DEVPROGRAMMER="1"/> + <SECTION SECTION_NAME="Device Editor Settings" CONFIGINIT_TYPE_LOOP="1" ENABLE_INTERRUPT_GEN_CTRL="0" ENABLE_CONFIGNAME_PREPEND="0" GENERATE_APP="1" UPDATE_ENABLED="1" LOCK_EXPRESS_RESOURCES="1" GENPROJECT_DISABLED="0"/> + <SECTION SECTION_NAME="Debugger Settings" RESET_ICEPOWERPOD_ENABLE="0" PODSUPPLY_VOLTAGE="0" ICE_PORT="ICE 0, Cube ( SN: 0734C128 )" PODCLOCK_FREQUENCY="50"/> + </PROJECT_SETTINGS> +</PSOC_PROJECT> +<!--Files Types: + MainDirectory, + UserSourceModule, + UserIncludeFile + UserLibrary, + LibrarySource, + IntermediateBuild, + IntermediateError, + IntermediateDebug +--> diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.asm new file mode 100644 index 0000000..9079121 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.asm @@ -0,0 +1,398 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.asm +;; Version: 1.1, Updated on 2006/02/03 at 09:10:49 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler source for the ADCINC A/D Converter +;; User Module with 1st-order modulator. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API +;; function returns. Even though these registers may be preserved now, +;; there is no guarantee they will be preserved in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" + +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export ADCINC_Start +export _ADCINC_Start +export ADCINC_SetPower +export _ADCINC_SetPower +export ADCINC_Stop +export _ADCINC_Stop +export ADCINC_GetSamples +export _ADCINC_GetSamples +export ADCINC_StopADC +export _ADCINC_StopADC +export ADCINC_fIsDataAvailable +export _ADCINC_fIsDataAvailable +export ADCINC_iClearFlagGetData +export _ADCINC_iClearFlagGetData +export ADCINC_wClearFlagGetData +export _ADCINC_wClearFlagGetData +export ADCINC_cClearFlagGetData +export _ADCINC_cClearFlagGetData +export ADCINC_bClearFlagGetData +export _ADCINC_bClearFlagGetData +export ADCINC_iGetData +export _ADCINC_iGetData +export ADCINC_wGetData +export _ADCINC_wGetData +export ADCINC_bGetData +export _ADCINC_bGetData +export ADCINC_cGetData +export _ADCINC_cGetData +export ADCINC_fClearFlag +export _ADCINC_fClearFlag +export ADCINC_WritePulseWidth +export _ADCINC_WritePulseWidth + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Start +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +; and starts the PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Start: +_ADCINC_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + or reg[DEC_CR1],c0h + call ADCINC_SetPower + ADCINC_RESET_INTEGRATOR_M + mov reg[ADCINC_PWMdr1],ffh + or reg[ADCINC_PWMcr0],01h ; start PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_SetPower +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_SetPower: +_ADCINC_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Set up Stack frame + and A,03h ; Ensure value is legal + push A + mov A,reg[ADCINC_AtoDcr3] ; First SC block: + and A,~03h ; clear power bits to zero + or A,[ X ] ; establish new value + mov reg[ADCINC_AtoDcr3],A ; change the actual setting + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Stop +; +; DESCRIPTION: Removes power from the module's analog PSoc block. +; and turns off PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Stop: +_ADCINC_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + and reg[ADCINC_AtoDcr3], ~03h + and reg[ADCINC_PWMcr0], ~01h ; stop PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_GetSamples +; +; DESCRIPTION: Activates interrupts for this user module and begins sampling. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: A register contain number of samples +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_GetSamples: +_ADCINC_GetSamples: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >ADCINC_fMode + ADCINC_ENABLE_INTEGRATOR_M + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + mov [ADCINC_bNumSamples],A + mov A, reg[ADCINC_PWMdr2] + jnz .SkipPulseWrite + mov reg[ADCINC_PWMdr2], 1 +.SkipPulseWrite: + ADCINC_STARTADC_M ;enable interrupt + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_StopADC +; +; DESCRIPTION: Shuts down the A/D is an orderly manner. The interrupt +; is disabled but the PWM output is still active. +; Integrator is reset +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_StopADC: +_ADCINC_StopADC: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + ADCINC_RESET_INTEGRATOR_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fIsDataAvailable +; +; DESCRIPTION: Returns the status of the A/D Data +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall BOOL DataAvailable returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fIsDataAvailable: +_ADCINC_fIsDataAvailable: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fIsDataAvailable_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iClearFlagGetData +; ADCINC_wClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +; Flag is checked after trandfer to insure valid data. +; available. Also clears the DATA_READY flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iClearFlagGetData: +_ADCINC_iClearFlagGetData: + ADCINC_wClearFlagGetData: +_ADCINC_wClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_iClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_cClearFlagGetData +; ADCINC_bClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_cClearFlagGetData: +_ADCINC_cClearFlagGetData: + ADCINC_bClearFlagGetData: +_ADCINC_bClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_bClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iGetData +; ADCINC_wGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult is returned in the X,A registers +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iGetData: +_ADCINC_iGetData: + ADCINC_wGetData: +_ADCINC_wGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_wGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_bGetData +; ADCINC_cGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall CHAR cData returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_bGetData: +_ADCINC_bGetData: + ADCINC_cGetData: +_ADCINC_cGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_cGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fClearFlag +; +; DESCRIPTION: Clears the data ready flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The DATA_READY flag is cleared. +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fClearFlag: +_ADCINC_fClearFlag: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fClearFlag_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_WritePulseWidth +; +; DESCRIPTION: +; Write the 8-bit period value into the compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_WritePulseWidth: +_ADCINC_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_WritePulseWidth_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File ADCINC.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.h new file mode 100644 index 0000000..1b30f54 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.h @@ -0,0 +1,91 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: ADCINC.h +// Version: 1.20, Updated on 2015/3/4 at 22:21:26 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: C declarations for the ADCINC User Module with +// a 1st-order modulator. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef ADCINC_INCLUDE +#define ADCINC_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 ADCINC_Start +#pragma fastcall16 ADCINC_SetPower +#pragma fastcall16 ADCINC_Stop +#pragma fastcall16 ADCINC_GetSamples +#pragma fastcall16 ADCINC_StopADC +#pragma fastcall16 ADCINC_fIsDataAvailable +#pragma fastcall16 ADCINC_iClearFlagGetData +#pragma fastcall16 ADCINC_wClearFlagGetData +#pragma fastcall16 ADCINC_cClearFlagGetData +#pragma fastcall16 ADCINC_bClearFlagGetData +#pragma fastcall16 ADCINC_iGetData +#pragma fastcall16 ADCINC_wGetData +#pragma fastcall16 ADCINC_cGetData +#pragma fastcall16 ADCINC_bGetData +#pragma fastcall16 ADCINC_fClearFlag +#pragma fastcall16 ADCINC_WritePulseWidth + +//------------------------------------------------- +// Prototypes of the ADCINC API. +//------------------------------------------------- +extern void ADCINC_Start(BYTE bPower); +extern void ADCINC_SetPower(BYTE bPower); +extern void ADCINC_Stop(void); +extern void ADCINC_GetSamples(BYTE bNumSamples); +extern void ADCINC_StopADC(void); +extern BYTE ADCINC_fIsDataAvailable(void); +extern INT ADCINC_iClearFlagGetData(void); +extern WORD ADCINC_wClearFlagGetData(void); +extern CHAR ADCINC_cClearFlagGetData(void); +extern BYTE ADCINC_bClearFlagGetData(void); +extern INT ADCINC_iGetData(void); +extern WORD ADCINC_wGetData(void); +extern CHAR ADCINC_cGetData(void); +extern BYTE ADCINC_bGetData(void); +extern BYTE ADCINC_fClearFlag(void); +extern void ADCINC_WritePulseWidth(BYTE bPulseWidthValue); + +//------------------------------------------------- +// Defines for ADCINC API's. +//------------------------------------------------- +#define ADCINC_OFF 0 +#define ADCINC_LOWPOWER 1 +#define ADCINC_MEDPOWER 2 +#define ADCINC_HIGHPOWER 3 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- +#pragma ioport ADCINC_PWMdr0: 0x020 //Period reg +BYTE ADCINC_PWMdr0; +#pragma ioport ADCINC_PWMdr1: 0x021 //1_ADDRh ; Down count reg +BYTE ADCINC_PWMdr1; +#pragma ioport ADCINC_PWMdr2: 0x022 //Compare reg +BYTE ADCINC_PWMdr2; +#pragma ioport ADCINC_PWMcr0: 0x023 //Control reg +BYTE ADCINC_PWMcr0; +#pragma ioport ADCINC_PWMfn: 0x120 //Function reg +BYTE ADCINC_PWMfn; +#pragma ioport ADCINC_PWMsl: 0x121 //Input select reg +BYTE ADCINC_PWMsl; +#pragma ioport ADCINC_PWMos: 0x122 //Output select reg +BYTE ADCINC_PWMos; +#pragma ioport ADCINC_AtoDcr0: 0x084 //SC Block Control Reg 0 +BYTE ADCINC_AtoDcr0; +#pragma ioport ADCINC_AtoDcr1: 0x085 //SC Block Control Reg 1 +BYTE ADCINC_AtoDcr1; +#pragma ioport ADCINC_AtoDcr2: 0x086 //SC Block Control Reg 2 +BYTE ADCINC_AtoDcr2; +#pragma ioport ADCINC_AtoDcr3: 0x087 //SC Block Control Reg 3 +BYTE ADCINC_AtoDcr3; + +#endif +// end of file ADCINC.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.inc new file mode 100644 index 0000000..39e4465 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcinc.inc @@ -0,0 +1,149 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.inc +;; Version: 1.20, Updated on 2015/3/4 at 22:21:26 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the ADCINC A/D Converter +;; User Module with a 1st-order modulator. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +;-------------------------------------------------- +; Constants for ADCINC API's. +;-------------------------------------------------- + +ADCINC_OFF: equ 00h +ADCINC_LOWPOWER: equ 01h +ADCINC_MEDPOWER: equ 02h +ADCINC_HIGHPOWER: equ 03h + +ADCINC_bNUMBITS: equ 08h +ADCINC_NoAZ: equ 1 +ADCINC_SIGNED_DATA: equ 0 +ADCINC_9_OR_MORE_BITS: equ ((08h - 1)& 08h) +ADCINC_8_OR_MORE_BITS: equ ((08h )& 08h) +;-------------------------------------------------- +; Register Address Constants for ADCINC +;-------------------------------------------------- +ADCINC_ISR_MASK: equ 01h +ADCINC_ISR_REG: equ 0e1h +ADCINC_CLR_REG: equ (((ADCINC_ISR_REG & 038h)/8)^0dfh) + +ADCINC_PWMdr0: equ 20h ; Period reg +ADCINC_PWMdr1: equ 21h ; Down count reg +ADCINC_PWMdr2: equ 22h ; Compare reg +ADCINC_PWMcr0: equ 23h ; Control reg +ADCINC_PWMfn: equ 20h ; Function reg +ADCINC_PWMsl: equ 21h ; Input select reg +ADCINC_PWMos: equ 22h ; Output select reg + +ADCINC_AtoDcr0: equ 84h ; SC Block Control Reg 0 +ADCINC_AtoDcr1: equ 85h ; SC Block Control Reg 1 +ADCINC_AtoDcr2: equ 86h ; SC Block Control Reg 2 +ADCINC_AtoDcr3: equ 87h ; SC Block Control Reg 3 + +HighByte: equ 0 +LowByte: equ 1 + +macro ADCINC_fIsDataAvailable_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] +endm + + +macro ADCINC_iGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_wGetData_M + ADCINC_iGetData_M +endm + + +macro ADCINC_cGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bGetData_M + ADCINC_cGetData_M +endm + + +macro ADCINC_fClearFlag_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] + mov [ADCINC_fStatus],00h +endm + + +macro ADCINC_iClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + .repeat: + mov [ADCINC_fStatus],00h + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] + cmp [ADCINC_fStatus],00h + .until: jnz .repeat +endm + + +macro ADCINC_wClearFlagGetData_M + ADCINC_iClearFlagGetData_M +endm + + +macro ADCINC_cClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov [ADCINC_fStatus],00h + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bClearFlagGetData_M + ADCINC_cClearFlagGetData_M +endm + +macro ADCINC_ENABLE_INTEGRATOR_M + and reg[ADCINC_AtoDcr3],~10h + IF ADCINC_NoAZ + and reg[ADCINC_AtoDcr2],~20h + ENDIF +endm + + +macro ADCINC_RESET_INTEGRATOR_M + IF ADCINC_NoAZ + or reg[ADCINC_AtoDcr2],20h + ENDIF + or reg[ADCINC_AtoDcr3],10h +endm + + +macro ADCINC_STARTADC_M + ;Enable PWM interrupt + mov reg[ADCINC_CLR_REG],~(ADCINC_ISR_MASK) + or reg[ADCINC_ISR_REG], (ADCINC_ISR_MASK) +endm + + +macro ADCINC_STOPADC_M + ;Disable PWM interrupt + and reg[ADCINC_ISR_REG],~(ADCINC_ISR_MASK) +endm + + +macro ADCINC_WritePulseWidth_M + mov reg[ADCINC_PWMdr2],A +endm + +; end of file ADCINC.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcincint.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcincint.asm new file mode 100644 index 0000000..e257f69 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/adcincint.asm @@ -0,0 +1,256 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINCINT.asm +;; Version: 1.20, Updated on 2015/3/4 at 22:21:26 +;; +;; DESCRIPTION: Assembler interrupt service routine for the ADCINC +;; A/D Converter User Module. This code works for both the +;; first and second-order modulator topologies. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export _ADCINC_ADConversion_ISR + +export _ADCINC_iResult +export ADCINC_iResult +export _ADCINC_fStatus +export ADCINC_fStatus +export _ADCINC_bState +export ADCINC_bState +export _ADCINC_fMode +export ADCINC_fMode +export _ADCINC_bNumSamples +export ADCINC_bNumSamples + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM(RAM,REL) + ADCINC_iResult: +_ADCINC_iResult: BLK 2 ;Calculated answer + iTemp: BLK 2 ;internal temp storage + ADCINC_fStatus: +_ADCINC_fStatus: BLK 1 ;ADC Status + ADCINC_bState: +_ADCINC_bState: BLK 1 ;State value of ADC count + ADCINC_fMode: +_ADCINC_fMode: BLK 1 ;Integrate and reset mode. + ADCINC_bNumSamples: +_ADCINC_bNumSamples: BLK 1 ;Number of samples to take. + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +AREA InterruptRAM (RAM, REL, CON) +ADC_Counter:: //ADC Counter +_ADC_Counter:: BLK 1 +Ri_Max_x1:: //Peak of Nermest AC coupled signal for temperature sensing +_Ri_Max_x1:: BLK 1 +Ri_Min_x1:: //Trough of Nermest AC coupled signal for temperature sensing +_Ri_Min_x1:: BLK 1 +ip_x1:: //Voltage Across Pump Current sense Resistor, it is in +_ip_x1:: BLK 1 +ADC_IF::// Byte value used to track which ADC sample last occurred, ADC_IF[0]=1 if Ri_Min,ADC_IF[1]=1 if Ri_Max,ADC_IF[2]=1 if VR +_ADC_IF:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _ADCINC_ADConversion_ISR +; +; DESCRIPTION: Perform final filter operations to produce output samples. +; +;----------------------------------------------------------------------------- +; +; The decimation rate is established by the PWM interrupt. Four timer +; clocks elapse for each modulator output (decimator input) since the +; phi1/phi2 generator divides by 4. This means the timer period and thus +; it's interrupt must equal 4 times the actual decimation rate. The +; decimator is ru for 2^(#bits-6). +; +_ADCINC_ADConversion_ISR: + dec [ADCINC_bState] +if1: + jc endif1 ; no underflow + reti +endif1: + cmp [ADCINC_fMode],0 +if2: + jnz endif2 ;leaving reset mode + push A ;read decimator + mov A, reg[DEC_DL] + mov [iTemp + LowByte],A + mov A, reg[DEC_DH] + mov [iTemp + HighByte], A + pop A + mov [ADCINC_fMode],1 + mov [ADCINC_bState],((1<<(ADCINC_bNUMBITS- 6))-1) + reti +endif2: + ;This code runs at end of integrate + ADCINC_RESET_INTEGRATOR_M + push A + mov A, reg[DEC_DL] + sub A,[iTemp + LowByte] + mov [iTemp +LowByte],A + mov A, reg[DEC_DH] + sbb A,[iTemp + HighByte] + asr A + rrc [iTemp + LowByte] + + ;Covert to Unipolar +IF ADCINC_9_OR_MORE_BITS + add A, (1<<(ADCINC_bNUMBITS - 9)) +ELSE + add [iTemp + LowByte], (1<<(ADCINC_bNUMBITS - 1)) ;work on lower Byte + adc A,0 +ENDIF + ;check for overflow +IF ADCINC_8_OR_MORE_BITS + cmp A,(1<<(ADCINC_bNUMBITS - 8)) +if3: + jnz endif3 ;overflow + dec A + mov [iTemp + LowByte],ffh +endif3: +ELSE + cmp [iTemp + LowByte],(1<<(ADCINC_bNUMBITS)) +if4: + jnz endif4 ;overflow + dec [iTemp + LowByte] +endif4: +ENDIF +IF ADCINC_SIGNED_DATA +IF ADCINC_9_OR_MORE_BITS + sub A,(1<<(ADCINC_bNUMBITS - 9)) +ELSE + sub [iTemp +LowByte],(1<<(ADCINC_bNUMBITS - 1)) + sbb A,0 +ENDIF +ENDIF + mov [ADCINC_iResult + LowByte],[iTemp +LowByte] + mov [ADCINC_iResult + HighByte],A + mov [ADCINC_fStatus],1 +ConversionReady: + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + //14Point7 ASM Code Start + mov A,[_ADC_Counter] + sub A,0 + JZ ADC_0 + + sub A,1 + JZ ADC_1 + + sub A,1 + JZ ADC_2 + + sub A,1 + JZ ADC_3 + + ADC_0: //Ri_Max, Peak of AC coupled Temperature sense signal + //and reg[PRT2DR],127 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_Ri_Max_x1],[ADCINC_iResult + LowByte] + mov [_ADC_Counter],1 + or [_ADC_IF],2 // Set ADC_IF[1] to indicate that new Ri_Max data is available + jmp Cont + + ADC_1://Ri_Min, Trough of AC coupled Temperature sense signal + mov reg[AMX_IN],15 //setup Mux so that Next ADC sample is a differential Ip Vs Ia (voltage across pump current sense resistor, P0[7] Vs P0[6] + //mov reg[AMX_IN],9 //cal lin + //or reg[PRT2DR],128 //set Ri_Out Pin + or reg[PRT0DR],4 //set Ri_Out Pin + mov [_Ri_Min_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],1 // Set ADC_IF[0] to indicate that new Ri_Min data is available + mov [_ADC_Counter],2 + + jmp Cont + + ADC_2://Voltage Across Pump Current sense resistor + //and reg[PRT2DR],127 //clear Ri_Out Pin, Next ADC sample is not the Ri_Min, but Ri_Out is cleared so that ~1khz AC signal is mantained + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],3 + jmp Cont + + ADC_3://Voltage Across Pump Current sense resistor again, this ADC sample is need to keep timing on the ~1khz AC Temperature Sense Signal so might as well get another Sample of VR + //or reg[PRT2DR],128 //Set Ri_Out Pin so that the next ADC sample will Acquire the Peak (Ri_Max) of AC coupled Temperature sense signal + or reg[PRT0DR],4 //set Ri_Out Pin + mov reg[AMX_IN],0 // Setup Mux so that Next ADC sample is differential Ri_in Vs Vref, P0[1] Vs P0[0] + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],0 + + Cont: + //14Point7 ASM Code End + + ; Sample data is now in iResult + ; + ; NOTE: This interrupt service routine has already + ; preserved the values of the A CPU register. If + ; you need to use the X register you must preserve + ; its value and restore it before the return from + ; interrupt. + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + pop A + cmp [ADCINC_bNumSamples],0 +if5: + jnz endif5 ; Number of samples is zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif5: + dec [ADCINC_bNumSamples] +if6: + jz endif6 ; count not zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif6: + ;All samples done + ADCINC_STOPADC_M + reti +; end of file ADCINCINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.asm new file mode 100644 index 0000000..b2cf2c8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.asm +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_0.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_0_InputSelect +export _AMUX4_0_InputSelect + +export AMUX4_0_Start +export _AMUX4_0_Start + +export AMUX4_0_Stop +export _AMUX4_0_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_InputSelect: +_AMUX4_0_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_0_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_0_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_0_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_0_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Start: +_AMUX4_0_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Stop: +_AMUX4_0_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_0.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.h new file mode 100644 index 0000000..0bd98e3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_0.h +// Version: 1.50, Updated on 2015/3/4 at 22:21:30 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_0_INCLUDE +#define AMUX4_0_INCLUDE + +#include <m8c.h> +//------------------------------------------------- +// Defines for AMUX4_0 API's. +//------------------------------------------------- +#define AMUX4_0_PORT0_0 0x00 +#define AMUX4_0_PORT0_2 0x01 +#define AMUX4_0_PORT0_4 0x02 +#define AMUX4_0_PORT0_6 0x03 + +#define AMUX4_0_PORT0_1 0x00 +#define AMUX4_0_PORT0_3 0x01 +#define AMUX4_0_PORT0_5 0x02 +#define AMUX4_0_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_0_InputSelect +#pragma fastcall16 AMUX4_0_Start +#pragma fastcall16 AMUX4_0_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_0 API. +//------------------------------------------------- + +extern void AMUX4_0_InputSelect(BYTE bChannel); +extern void AMUX4_0_Start(void); +extern void AMUX4_0_Stop(void); + +#endif +// end of file AMUX4_0.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.inc new file mode 100644 index 0000000..0074241 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_0.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.inc +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_0 API's. +;-------------------------------------------------- +AMUX4_0_MUX_COL: equ (0h & 03h) +AMUX4_0_COL_COUNT: equ (0h & 80h) +AMUX4_0_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_0_PORT0_0: equ 0h +AMUX4_0_PORT0_2: equ 1h +AMUX4_0_PORT0_4: equ 2h +AMUX4_0_PORT0_6: equ 3h + +AMUX4_0_PORT0_1: equ 0h +AMUX4_0_PORT0_3: equ 1h +AMUX4_0_PORT0_5: equ 2h +AMUX4_0_PORT0_7: equ 3h + +; end of file AMUX4_0.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.asm new file mode 100644 index 0000000..f3f8ab3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.asm +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_1.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_1_InputSelect +export _AMUX4_1_InputSelect + +export AMUX4_1_Start +export _AMUX4_1_Start + +export AMUX4_1_Stop +export _AMUX4_1_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_InputSelect: +_AMUX4_1_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_1_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_1_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_1_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_1_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Start: +_AMUX4_1_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Stop: +_AMUX4_1_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_1.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.h new file mode 100644 index 0000000..02b4e59 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_1.h +// Version: 1.50, Updated on 2015/3/4 at 22:21:30 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_1_INCLUDE +#define AMUX4_1_INCLUDE + +#include <m8c.h> +//------------------------------------------------- +// Defines for AMUX4_1 API's. +//------------------------------------------------- +#define AMUX4_1_PORT0_0 0x00 +#define AMUX4_1_PORT0_2 0x01 +#define AMUX4_1_PORT0_4 0x02 +#define AMUX4_1_PORT0_6 0x03 + +#define AMUX4_1_PORT0_1 0x00 +#define AMUX4_1_PORT0_3 0x01 +#define AMUX4_1_PORT0_5 0x02 +#define AMUX4_1_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_1_InputSelect +#pragma fastcall16 AMUX4_1_Start +#pragma fastcall16 AMUX4_1_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_1 API. +//------------------------------------------------- + +extern void AMUX4_1_InputSelect(BYTE bChannel); +extern void AMUX4_1_Start(void); +extern void AMUX4_1_Stop(void); + +#endif +// end of file AMUX4_1.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.inc new file mode 100644 index 0000000..5a2d762 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/amux4_1.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.inc +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_1 API's. +;-------------------------------------------------- +AMUX4_1_MUX_COL: equ (0h & 03h) +AMUX4_1_COL_COUNT: equ (0h & 80h) +AMUX4_1_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_1_PORT0_0: equ 0h +AMUX4_1_PORT0_2: equ 1h +AMUX4_1_PORT0_4: equ 2h +AMUX4_1_PORT0_6: equ 3h + +AMUX4_1_PORT0_1: equ 0h +AMUX4_1_PORT0_3: equ 1h +AMUX4_1_PORT0_5: equ 2h +AMUX4_1_PORT0_7: equ 3h + +; end of file AMUX4_1.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/boot.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/boot.asm new file mode 100644 index 0000000..accbadc --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/boot.asm @@ -0,0 +1,516 @@ +; Generated by PSoC Designer 5.4.3191 +; +;@Id: boot.tpl#903 @ +;============================================================================= +; FILENAME: boot.asm +; Version: 4.30 +; +; DESCRIPTION: +; M8C Boot Code for CY8C24xxxB microcontroller family. +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in +; the project's root directory to create BOOT.ASM. Any changes made to +; BOOT.ASM will be overwritten every time the project is generated; therefore +; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when +; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) +; are not accidentally modified. +; +;============================================================================= + +include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) +include "m8c.inc" ;Part specific file +include "m8ssc.inc" ;Part specific file +include "memory.inc" ;File generated by PSoC Designer (Project dependent) + +;-------------------------------------- +; Export Declarations +;-------------------------------------- + +export __Start +IF (TOOLCHAIN & HITECH) +ELSE +export __bss_start +export __data_start +export __idata_start +export __func_lit_start +export __text_start +ENDIF +export _bGetPowerSetting +export bGetPowerSetting + + +;-------------------------------------- +; Optimization flags +;-------------------------------------- +; +; To change the value of these flags, modify the file boot.tpl, not +; boot.asm. See the notes in the banner comment at the beginning of +; this file. + +; Optimization for Assembly language (only) projects and C-language projects +; that do not depend on the C compiler to initialize the values of RAM variables. +; Set to 1: Support for C Run-time Environment initialization +; Set to 0: Support for C not included. Faster start up, smaller code space. +; +IF (TOOLCHAIN & HITECH) +; The C compiler will customize the startup code - it's not required here + +C_LANGUAGE_SUPPORT: equ 0 +ELSE +C_LANGUAGE_SUPPORT: equ 1 +ENDIF + + +; The following equate is required for proper operation. Reseting its value +; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is +; selected. If the designer chooses to not wait then stabilization of the ECO +; and PLL_Lock must take place within user code. See the family data sheet for +; the requirements of starting the ECO and PLL lock mode. +; +; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before +; invoking main +; Set to 0: Boot code does not wait; clock may not have stabilized by +; the time code in main starts executing. +; +WAIT_FOR_32K: equ 1 + + +; For historical reasons, by default the boot code uses an lcall instruction +; to invoke the user's _main code. If _main executes a return instruction, +; boot provides an infinite loop. By changing the following equate from zero +; to 1, boot's lcall will be replaced by a ljmp instruction, saving two +; bytes on the stack which are otherwise required for the return address. If +; this option is enabled, _main must not return. (Beginning with the 4.2 +; release, the C compiler automatically places an infinite loop at the end +; of main, rather than a return instruction.) +; +ENABLE_LJMP_TO_MAIN: equ 0 + + +;----------------------------------------------------------------------------- +; Interrupt Vector Table +;----------------------------------------------------------------------------- +; +; Interrupt vector table entries are 4 bytes long. Each one contains +; a jump instruction to an ISR (Interrupt Service Routine), although +; very short ISRs could be encoded within the table itself. Normally, +; vector jump targets are modified automatically according to the user +; modules selected. This occurs when the 'Generate Application' opera- +; tion is run causing PSoC Designer to create boot.asm and the other +; configuration files. If you need to hard code a vector, update the +; file boot.tpl, not boot.asm. See the banner comment at the beginning +; of this file. +;----------------------------------------------------------------------------- + + AREA TOP (ROM, ABS, CON) + + org 0 ;Reset Interrupt Vector +IF (TOOLCHAIN & HITECH) +; jmp __Start ;C compiler fills in this vector +ELSE + jmp __Start ;First instruction executed following a Reset +ENDIF + ;@PSoC_BOOT_ISR_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + org 04h ;Low Voltage Detect (LVD) Interrupt Vector + halt ;Stop execution if power falls too low + + org 08h ;Analog Column 0 Interrupt Vector + // call void_handler + reti + + org 0Ch ;Analog Column 1 Interrupt Vector + // call void_handler + reti + + org 18h ;VC3 Interrupt Vector + // call void_handler + reti + + org 1Ch ;GPIO Interrupt Vector + // call void_handler + reti + + org 20h ;PSoC Block DBB00 Interrupt Vector + ljmp _ADCINC_ADConversion_ISR + reti + + org 24h ;PSoC Block DBB01 Interrupt Vector + ljmp _PWM8_Heater_ISR + reti + + org 28h ;PSoC Block DCB02 Interrupt Vector + ljmp _PWM8_Vout_ISR + reti + + org 2Ch ;PSoC Block DCB03 Interrupt Vector + ljmp _PWM8_NB_Out_ISR + reti + + org 60h ;PSoC I2C Interrupt Vector + // call void_handler + reti + + org 64h ;Sleep Timer Interrupt Vector + ljmp _SleepTimer_ISR + reti + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_ISR_UserCode_END@ + +;----------------------------------------------------------------------------- +; Start of Execution. +;----------------------------------------------------------------------------- +; The Supervisory ROM SWBootReset function has already completed the +; calibrate1 process, loading trim values for 5 volt operation. +; + +IF (TOOLCHAIN & HITECH) + AREA PD_startup(CODE, REL, CON) +ELSE + org 68h +ENDIF +__Start: + + ; initialize SMP values for voltage stabilization, if required, + ; leaving power-on reset (POR) level at the default (low) level, at + ; least for now. + ; + M8C_SetBank1 + mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST + M8C_SetBank0 + +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + M8C_EnableWatchDog +ENDIF + +IF ( SELECT_32K ) + or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project +ELSE + and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled +ENDIF + +IF (TOOLCHAIN & HITECH) + global __Lstackps + mov a,low __Lstackps + swap a,sp +ELSE + ;------------------ + ; Set up the stack + ;------------------ + mov A, __ramareas_end ; Set top of stack to end of used RAM + swap SP, A ; This is only temporary if going to LMM +ENDIF + + ;----------------------------------------------- + ; Set Power-related Trim & the AGND Bypass bit. + ;----------------------------------------------- +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + IF ( AGND_BYPASS ) + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; The 5V trim has already been set, but we need to update the AGNDBYP + ; bit in the write-only BDG_TR register. Recalculate the register + ; value using the proper trim values. + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ENDIF + ENDIF +ENDIF ; 5.0 V Operation + +IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ENDIF +ENDIF ; 3.3 Volt Operation + +IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 12MHZ operation *** + +IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 6MHZ operation *** + + mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations + mov [bSSC_KEYSP], 0 + + ;--------------------------------------- + ; Initialize Crystal Oscillator and PLL + ;--------------------------------------- + +IF ( SELECT_32K & WAIT_FOR_32K ) + ; If the user has requested the External Crystal Oscillator (ECO) then turn it + ; on and wait for it to stabilize and the system to switch over to it. The PLL + ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + ; the ECO to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor1s: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor1s ; Interrupt will latch but will not dispatch + ; since interrupts are not globally enabled +ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + ; Either no ECO, or waiting for stable clock is to be done in main + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the watch dog + +ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + +IF ( PLL_MODE ) + ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + mov reg[INT_VC], 0 ; Clear all pending interrupts + +.WaitFor16ms: + tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor16ms + M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + +IF ( WAIT_FOR_32K ) +ELSE ; !( WAIT_FOR_32K ) + ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. +ENDIF ;(WAIT_FOR_32K) +ENDIF ;(PLL_MODE) + + ;------------------------------------------------------- + ; Initialize Proper Drive Mode for External Clock Pin + ;------------------------------------------------------- + + ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + +IF (SYSCLK_SOURCE) + and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register +ENDIF + ; EXTCLK pin is now in proper drive mode to input the external clock signal + + ;------------------------ + ; Close CT leakage path. + ;------------------------ + mov reg[ACB00CR0], 05h + mov reg[ACB01CR0], 05h + + ;@PSoC_BOOT_LOADCFG_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_LOADCFG_UserCode_END@ + + ;------------------------- + ; Load Base Configuration + ;------------------------- + ; Load global parameter settings and load the user modules in the + ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + ; to minimize start up time; (2) We may still need to play with the + ; Sleep Timer. + ; + lcall LoadConfigInit + + ;----------------------------------- + ; Initialize C Run-Time Environment + ;----------------------------------- +IF ( C_LANGUAGE_SUPPORT ) + mov A,0 ; clear the 'bss' segment to zero + mov [__r0],<__bss_start +BssLoop: + cmp [__r0],<__bss_end + jz BssDone + mvi [__r0],A + jmp BssLoop +BssDone: + mov A,>__idata_start ; copy idata to data segment + mov X,<__idata_start + mov [__r0],<__data_start +IDataLoop: + cmp [__r0],<__data_end + jz C_RTE_Done + push A + romx + mvi [__r0],A + pop A + inc X + adc A,0 + jmp IDataLoop + +C_RTE_Done: + +ENDIF ; C_LANGUAGE_SUPPORT + + ;------------------------------- + ; Voltage Stabilization for SMP + ;------------------------------- + +IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation +IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + ; 5V before enabling the Precision Power-On Reset (PPOR). + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + or reg[INT_MSK0],INT_MSK0_SLEEP + M8C_SetBank1 + and reg[OSC_CR0], ~OSC_CR0_SLEEP + or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Restart the sleep timer + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor2ms: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor2ms ; Branch fails when 2 msec has passed +ENDIF ; SMP is operational +ENDIF ; 5.0V Operation + + ;------------------------------- + ; Set Power-On Reset (POR) Level + ;------------------------------- + ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + ; These values should not be changed from the settings here. See Section "POR and LVD" of + ; Technical Reference Manual #001-14463 for more information. + + M8C_SetBank1 + +IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + ; Yes, lowest trip already set +ELSE ; No, must adjust POR... +IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip +ELSE +IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + ELSE ; No, fast mode + IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + ELSE ; 24HMz ; + or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + ENDIF ; 24MHz + ENDIF ; Slow Mode +ENDIF ; 5.0V Operation +ENDIF ; 3.3V Operation +ENDIF ; 2.7V Operation + + M8C_SetBank0 + + ;---------------------------- + ; Wrap up and invoke "main" + ;---------------------------- + + ; Disable the Sleep interrupt that was used for timing above. In fact, + ; no interrupts should be enabled now, so may as well clear the register. + ; + mov reg[INT_MSK0],0 + + ; Everything has started OK. Now select requested CPU & sleep frequency. + ; + M8C_SetBank1 + mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) + M8C_SetBank0 + + ; Global Interrupt are NOT enabled, this should be done in main(). + ; LVD is set but will not occur unless Global Interrupts are enabled. + ; Global Interrupts should be enabled as soon as possible in main(). + ; + mov reg[INT_VC],0 ; Clear any pending interrupts which may + ; have been set during the boot process. +IF (TOOLCHAIN & HITECH) + ljmp startup ; Jump to C compiler startup code +ELSE +IF ENABLE_LJMP_TO_MAIN + ljmp _main ; goto main (no return) +ELSE + lcall _main ; call main +.Exit: + jmp .Exit ; Wait here after return till power-off or reset +ENDIF +ENDIF ; TOOLCHAIN + + ;--------------------------------- + ; Library Access to Global Parms + ;--------------------------------- + ; + bGetPowerSetting: +_bGetPowerSetting: + ; Returns value of POWER_SETTING in the A register. + ; No inputs. No Side Effects. + ; +IF (POWER_SETTING & POWER_SET_2V7) + mov A, POWER_SETTING | POWER_SET_SLOW_IMO +ELSE + mov A, POWER_SETTING ; Supply voltage and internal main osc +ENDIF + ret + +IF (TOOLCHAIN & HITECH) +ELSE + ;--------------------------------- + ; Order Critical RAM & ROM AREAs + ;--------------------------------- + ; 'TOP' is all that has been defined so far... + + ; ROM AREAs for C CONST, static & global items + ; + AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM +__idata_start: + + AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers +__func_lit_start: + + AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + AREA UserModules (ROM, REL, CON) ; User Module APIs + + ; CODE segment for general use + ; + AREA text (ROM, REL, CON) +__text_start: + + ; RAM area usage + ; + AREA data (RAM, REL, CON) ; initialized RAM +__data_start: + + AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + AREA bss (RAM, REL, CON) ; general use +__bss_start: + +ENDIF ; TOOLCHAIN + +; end of file boot.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.asm new file mode 100644 index 0000000..51833db --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.asm @@ -0,0 +1,284 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.asm +;; Version: 4.3, Updated on 2015/3/4 at 22:25:9 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: DAC6 User Module software implementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC6_VGND.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export DAC6_VGND_Start +export _DAC6_VGND_Start +export DAC6_VGND_SetPower +export _DAC6_VGND_SetPower + +export DAC6_VGND_WriteBlind +export _DAC6_VGND_WriteBlind +export DAC6_VGND_WriteStall +export _DAC6_VGND_WriteStall + +export DAC6_VGND_Stop +export _DAC6_VGND_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 1 Switched Cap Block configured as shown. This API depends +;; on knowing the exact personalization of CR0 and CR3 bitfields +;; for time efficiency. +;; +;; * For a Mask/Val pair, this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; BIT FIELD Mask/Val Function +;; ----------------- ----- -------------------- +;; CR0.FCap 80/1 Feedback cap size 32 +;; CR0.ClockPhase 40/0 Normal phase +;; CR0.ASign 20/* User parameter +;; CR0.ACap 1F/* User parameter +;; +;; CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; CR1.AMux E0/4 (SCB) VRef High +;; CR1.BCap 1F/0 Prune B-input branch +;; +;; CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; CR2.CmpBus 40/0 Comparator Bus Disable +;; CR2.AutoZero 20/1 Auto-Zero enabled on Phi 1 +;; CR2.CCap 1F/0 Prune C-input branch +;; +;; CR3.ARefSelect C0/0 Use AGND (to invert) +;; CR3.FSW1 20/1 Feedback Cap Used +;; CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; CR3.BSW 08/0 (SCB) Don't Care - this branch pruned +;; CR3.BMux 04/0 (SCB) Don't Care - this branch pruned +;; CR3.PWR 03/* User Parameter: Power, def=OFF +;; + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +cOFFSET: equ 31 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 ALWAYS looks + ; like this regardless of SC block type + ; or where the DAC gets mapped. + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Start +; FUNCTION NAME: DAC6_VGND_SetPower +; +; DESCRIPTION: +; Start / SetPower - Applies power setting to the module's SC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=High +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_Start: +_DAC6_VGND_Start: + DAC6_VGND_SetPower: +_DAC6_VGND_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_1 + and A, bPWRMASK + or A, bCR3 ; Set all other bits in addition to power + mov reg[DAC6_VGND_CR3], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteBlind +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks +; Lowest overhead, but output may not settle to correct value until the +; phi2 of next full cycle following the write. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_WriteBlind: +_DAC6_VGND_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc BlindPositive + ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted! + cpl A ; bit 0 is a "1" so, following 1 byte "inc" works + inc A ; (otherwise, we'd have to "add A, 2") + or A, 40h ; Make it negative by forcing sign bit + jmp BlindMagSet +BlindPositive: + nop + nop + nop + jmp BlindMagSet +BlindMagSet: + asr A ; Divide by two to finish up + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + mov reg[DAC6_VGND_CR0], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteStall +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with fast analog clocks or when the +; resulting interrupt latencies, comparable to the update period, +; can be tolerated comfortably. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_WriteStall: +_DAC6_VGND_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc StallPositive + cpl A ; "Invert" step of complement 2's complement + inc A ; "Add 1" step of complement 2's complement + or A, 40h ; Make it negative + jmp StallMagSet +StallPositive: + nop + nop + nop + jmp StallMagSet +StallMagSet: + asr A ; Divide by two to finish conversion + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + M8C_Stall + mov reg[DAC6_VGND_CR0], A + M8C_Unstall + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Stop +; +; DESCRIPTION: +; Turns off power to the SC block +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_Stop: +_DAC6_VGND_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC6_VGND_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC6_VGND.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.h new file mode 100644 index 0000000..a2842c8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.h @@ -0,0 +1,56 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC6_VGND.h +// Version: 4.3, Updated on 2015/3/4 at 22:25:9 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: DAC6 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC6_VGND_INCLUDE +#define DAC6_VGND_INCLUDE + +#include <M8C.h> + +//------------------------------------------------- +// Defines for DAC6_VGND API's. +//------------------------------------------------- +#define DAC6_VGND_OFF 0 +#define DAC6_VGND_LOWPOWER 1 +#define DAC6_VGND_MEDPOWER 2 +#define DAC6_VGND_HIGHPOWER 3 +#define DAC6_VGND_FULLPOWER 3 + +#pragma fastcall16 DAC6_VGND_Start +#pragma fastcall16 DAC6_VGND_SetPower +#pragma fastcall16 DAC6_VGND_WriteBlind +#pragma fastcall16 DAC6_VGND_WriteStall +#pragma fastcall16 DAC6_VGND_Stop + +//------------------------------------------------- +// Prototypes of the DAC6_VGND API. +//------------------------------------------------- +extern void DAC6_VGND_Start(BYTE bPowerSetting); +extern void DAC6_VGND_SetPower(BYTE bPowerSetting); +extern void DAC6_VGND_WriteBlind(CHAR cOutputValue); +extern void DAC6_VGND_WriteStall(CHAR cOutputValue); +extern void DAC6_VGND_Stop(void); + + +//------------------------------------------------- +// Register Addresses for DAC6_VGND +//------------------------------------------------- +#pragma ioport DAC6_VGND_CR0: 0x080 +BYTE DAC6_VGND_CR0; +#pragma ioport DAC6_VGND_CR1: 0x081 +BYTE DAC6_VGND_CR1; +#pragma ioport DAC6_VGND_CR2: 0x082 +BYTE DAC6_VGND_CR2; +#pragma ioport DAC6_VGND_CR3: 0x083 +BYTE DAC6_VGND_CR3; + +#endif +// end of file DAC6_VGND.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.inc new file mode 100644 index 0000000..83fe08c --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac6_vgnd.inc @@ -0,0 +1,49 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.inc +;; Version: 4.3, Updated on 2015/3/4 at 22:25:9 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the DAC6 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for DAC6_VGND API's +;-------------------------------------------------- +DAC6_VGND_OFF: equ 00h +DAC6_VGND_LOWPOWER: equ 01h +DAC6_VGND_MEDPOWER: equ 02h +DAC6_VGND_HIGHPOWER: equ 03h + +DAC6_VGND_OffsetBinary: equ 04h +DAC6_VGND_TwosComplement: equ 02h +DAC6_VGND_SignAndMagnitude: equ 01h +DAC6_VGND_RawRegister: equ 00h + +DAC6_VGND_DATAFORMAT: equ 7h +DAC6_VGND_OFFSETBINARY: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_OffsetBinary +DAC6_VGND_TWOSCOMPLEMENT: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_TwosComplement +DAC6_VGND_SIGNANDMAGNITUDE: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_SignAndMagnitude + +DAC6_VGND_PHASE_Normal: equ 0 +DAC6_VGND_PHASE_Swapped: equ 1 +DAC6_VGND_PHASE_SWAP: equ DAC6_VGND_PHASE_Normal + +IF DAC6_VGND_PHASE_SWAP + DAC6_VGND_CR0_HIBITS: equ C0h +ELSE + DAC6_VGND_CR0_HIBITS: equ 80h +ENDIF + + +;-------------------------------------------------- +; Register Address Constants for DAC6_VGND +;-------------------------------------------------- +DAC6_VGND_CR0: equ 80h +DAC6_VGND_CR1: equ 81h +DAC6_VGND_CR2: equ 82h +DAC6_VGND_CR3: equ 83h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.asm new file mode 100644 index 0000000..79bb7e5 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.asm @@ -0,0 +1,401 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.asm +;; Version: 2.2, Updated on 2015/3/4 at 22:25:15 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: DAC9 User Module software inplementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC9_Ia.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export DAC9_Ia_Start +export _DAC9_Ia_Start +export DAC9_Ia_SetPower +export _DAC9_Ia_SetPower + +export DAC9_Ia_WriteBlind +export _DAC9_Ia_WriteBlind +export DAC9_Ia_WriteBlind2B +export _DAC9_Ia_WriteBlind2B + +export DAC9_Ia_WriteStall +export _DAC9_Ia_WriteStall +export DAC9_Ia_WriteStall2B +export _DAC9_Ia_WriteStall2B + +export DAC9_Ia_Stop +export _DAC9_Ia_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 2 Switched Cap Blocks, LSB and MSB, configured as shown below. +;; This API depends on knowing the exact personalization of CR0 +;; and CR3 bitfields for time efficiency. +;; +;; * For a Mask/Val pair this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; Setting for output=AGND to OBUS when LSB in ASA10 and MSB in ASB20: +;; LSB.CR0=80 MSB.CR0=80 +;; LSB.CR1=40 MSB.CR1=81 +;; LSB.CR2=20 MSB.CR2=A0 +;; LSB.CR3=33 MSB.CR3=3B +;; +;; BIT FIELD Mask/Val Function +;; ----------------- -------- -------------------- +;; LSB.CR0.FCap 80/1 Feedback cap size 32 +;; LSB.CR0.ClockPhase 40/0 Normal phase +;; LSB.CR0.ASign 20/* User parameter +;; LSB.CR0.ACap 1F/* User parameter +;; +;; LSB.CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; LSB.CR1.BCap 1F/0 Prune B-input branch +;; +;; LSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; LSB.CR2.CmpBus 40/0 Comparator Bus Disabled +;; LSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; LSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; LSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; LSB.CR3.FSW1 20/1 Feedback Cap Used +;; LSB.CR3.FSW0 10/1 Feedback Cap Grounded for AZ +;; LSB.CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; LSB.CR3.PWR 03/* User Parameter: Power; default=OFF +;; +;; MSB.CR0.FCap 80/1 Feedback cap size 32 +;; MSB.CR0.ClockPhase 40/0 Normal phase +;; MSB.CR0.ASign 20/* User parameter +;; MSB.CR0.ACap 1F/* User parameter +;; +;; MSB.CR1.AMux E0/4 (SCB) VRef High +;; MSB.CR1.BCap 1F/1 Subrange LSB block output by BCap/FCap (1/32) +;; +;; MSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; MSB.CR2.CmpBus 40/0 Comparator Bus Disable +;; MSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; MSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; MSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; MSB.CR3.FSW1 20/1 Feedback Cap Used +;; MSB.CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; MSB.CR3.BSW 08/0 (SCB) why is this cont time instead of phi2?? +;; MSB.CR3.BMux 04/? (SCB) LSB block output; determined by placement +;; MSB.CR3.PWR 03/* User Parameter: Power, default=OFF + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +iOFFSET: equ 255 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 always looks like + ; this regardless of SC block type or location. +bSMMASK: equ 3Fh ; Sign and Magnitude bits mask +bSIGNMASK: equ 20h ; Sign bit mask +bMAGMASK: equ 1Fh ; Magnitude bits mask +bHIGHBITS: equ 80h ; Setting for FCap and ClockPhase +bHBMASK: equ C0h ; Mask for FCap and ClockPhase + + +;;--------------------------- + macro Stall +;;--------------------------- + mov reg[ASY_CR], 1 + endm + +;;--------------------------- + macro UnStall +;;--------------------------- + mov reg[ASY_CR], 0 + endm + + AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Start +; FUNCTION NAME: DAC9_Ia_SetPower +; +; DESCRIPTION: +; Applies power setting to the module's analog PSoC blocks. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=Full. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Start: +_DAC9_Ia_Start: + DAC9_Ia_SetPower: +_DAC9_Ia_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, bPWRMASK ; trim input to bits of interest + mov X, SP ; Set stack frame pointer + push A + ;; read CR3 registers, modify power bits & write back + mov A, reg[DAC9_Ia_MSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in MSB register image + mov reg[DAC9_Ia_MSB_CR3], A + mov A, reg[DAC9_Ia_LSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in LSB register image + mov reg[DAC9_Ia_LSB_CR3], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteBlind +; FUNCTION NAME: DAC9_Ia_WriteBlind2B +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks. +; Lowest overhead, but may cause glitches on the output. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteBlind: +_DAC9_Ia_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced using [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc BlindAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp BlindMagSet +BlindAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp BlindMagSet +BlindMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + pop A ; LSB: 76543210 (mag) + push X ; MSB + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + + ENDIF + + DAC9_Ia_WriteBlind2B: +_DAC9_Ia_WriteBlind2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + mov reg[DAC9_Ia_MSB_CR0],A + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteStall +; FUNCTION NAME: DAC9_Ia_WriteStall2B +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with faster analog clocks or when the +; effect of prolonging interrupt latencies can be safely tolerated. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteStall: +_DAC9_Ia_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced via [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc StallAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp StallMagSet +StallAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp StallMagSet +StallMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + + pop A ; LSB: 76543210 (mag) + push X ; MSB + + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + ENDIF + + DAC9_Ia_WriteStall2B: +_DAC9_Ia_WriteStall2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + M8C_Stall + mov reg[DAC9_Ia_MSB_CR0],A + M8C_Unstall + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Stop +; +; DESCRIPTION: +; Cuts power to the user module. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Stop: +_DAC9_Ia_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC9_Ia_MSB_CR3], ~bPWRMASK + and reg[DAC9_Ia_LSB_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC9_Ia.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.h new file mode 100644 index 0000000..9c1ce88 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.h @@ -0,0 +1,93 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC9_Ia.h +// Version: 2.2, Updated on 2015/3/4 at 22:25:15 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: DAC9 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC9_Ia_INCLUDE +#define DAC9_Ia_INCLUDE + +#include <m8c.h> + +//------------------------------------------------- +// Defines for DAC9_Ia API's. +//------------------------------------------------- +// Power Setting Defines +#define DAC9_Ia_OFF 0 +#define DAC9_Ia_LOWPOWER 1 +#define DAC9_Ia_MEDPOWER 2 +#define DAC9_Ia_HIGHPOWER 3 +#define DAC9_Ia_FULLPOWER 3 + +// Define constants for declaring function prototypes based on DataFormat parameter +#define DAC9_Ia_OffsetBinary 0x04 +#define DAC9_Ia_TwosComplement 0x02 +#define DAC9_Ia_SignAndMagnitude 0x01 +#define DAC9_Ia_RawRegister 0x00 +#define DAC9_Ia_DATAFORMAT 0x7 +#define DAC9_Ia_OFFSETBINARY DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +#define DAC9_Ia_TWOSCOMPLEMENT DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +#define DAC9_Ia_SIGNANDMAGNITUDE DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +// Declare function fastcall16 pragmas +#pragma fastcall16 DAC9_Ia_Start +#pragma fastcall16 DAC9_Ia_SetPower +#pragma fastcall16 DAC9_Ia_Stop + +//------------------------------------------------- +// Prototypes of the DAC9_Ia API. +//------------------------------------------------- +extern void DAC9_Ia_Start(BYTE bPowerSetting); +extern void DAC9_Ia_SetPower(BYTE bPowerSetting); +extern void DAC9_Ia_Stop(void); + +// Declare overloaded functions based on DataForamt parameter selected +#if DAC9_Ia_OFFSETBINARY + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(WORD wOutputValue); + extern void DAC9_Ia_WriteStall(WORD wOutputValue); +#else + #if DAC9_Ia_TWOSCOMPLEMENT + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(INT iOutputValue); + extern void DAC9_Ia_WriteStall(INT iOutputValue); + #else //DAC9_Ia_SIGNANDMAGNITUDE + #pragma fastcall16 DAC9_Ia_WriteBlind2B + #pragma fastcall16 DAC9_Ia_WriteStall2B + extern void DAC9_Ia_WriteBlind2B(BYTE bLSB, BYTE bMSB); + extern void DAC9_Ia_WriteStall2B(BYTE bLSB, BYTE bMSB); + #endif +#endif + +//------------------------------------------------- +// Hardware Addresses for DAC9_Ia +//------------------------------------------------- + +#pragma ioport DAC9_Ia_LSB_CR0: 0x090 // LSB Analog control register 0 +BYTE DAC9_Ia_LSB_CR0; +#pragma ioport DAC9_Ia_LSB_CR1: 0x091 // LSB Analog control register 1 +BYTE DAC9_Ia_LSB_CR1; +#pragma ioport DAC9_Ia_LSB_CR2: 0x092 // LSB Analog control register 2 +BYTE DAC9_Ia_LSB_CR2; +#pragma ioport DAC9_Ia_LSB_CR3: 0x093 // LSB Analog control register 3 +BYTE DAC9_Ia_LSB_CR3; + +#pragma ioport DAC9_Ia_MSB_CR0: 0x094 // MSB Analog control register 0 +BYTE DAC9_Ia_MSB_CR0; +#pragma ioport DAC9_Ia_MSB_CR1: 0x095 // MSB Analog control register 1 +BYTE DAC9_Ia_MSB_CR1; +#pragma ioport DAC9_Ia_MSB_CR2: 0x096 // MSB Analog control register 2 +BYTE DAC9_Ia_MSB_CR2; +#pragma ioport DAC9_Ia_MSB_CR3: 0x097 // MSB Analog control register 3 +BYTE DAC9_Ia_MSB_CR3; + +#endif +// end of file DAC9_Ia.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.inc new file mode 100644 index 0000000..acca678 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/dac9_ia.inc @@ -0,0 +1,68 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.inc +;; Version: 2.2, Updated on 2015/3/4 at 22:25:15 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the DAC9 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for DAC9_Ia API's +;-------------------------------------------------- +DAC9_Ia_OFF: equ 00h +DAC9_Ia_LOWPOWER: equ 01h +DAC9_Ia_MEDPOWER: equ 02h +DAC9_Ia_HIGHPOWER: equ 03h +DAC9_Ia_FULLPOWER: equ 03h + +DAC9_Ia_LSB_CR0: equ 90h +DAC9_Ia_LSB_CR1: equ 91h +DAC9_Ia_LSB_CR2: equ 92h +DAC9_Ia_LSB_CR3: equ 93h +DAC9_Ia_MSB_CR0: equ 94h +DAC9_Ia_MSB_CR1: equ 95h +DAC9_Ia_MSB_CR2: equ 96h +DAC9_Ia_MSB_CR3: equ 97h + +DAC9_Ia_OffsetBinary: equ 04h +DAC9_Ia_TwosComplement: equ 02h +DAC9_Ia_SignAndMagnitude: equ 01h +DAC9_Ia_RawRegister: equ 00h + +DAC9_Ia_DATAFORMAT: equ 7h +DAC9_Ia_OFFSETBINARY: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +DAC9_Ia_TWOSCOMPLEMENT: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +DAC9_Ia_SIGNANDMAGNITUDE: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +DAC9_Ia_PHASE_Normal: equ 0 +DAC9_Ia_PHASE_Swapped: equ 1 + +DAC9_Ia_PHASE_SWAP: equ DAC9_Ia_PHASE_Normal + +IF DAC9_Ia_PHASE_SWAP + DAC9_Ia_CR0_HIBITS: equ C0h +ELSE + DAC9_Ia_CR0_HIBITS: equ 80h +ENDIF + +;-------------------------------------------------- +; Register Address Constants for DAC9_Ia +;-------------------------------------------------- +DAC9_Ia_LSB_CR0: equ 90h ; LSB SC Block Control Register 0 +DAC9_Ia_LSB_CR1: equ 91h ; LSB SC Block Control Register 1 +DAC9_Ia_LSB_CR2: equ 92h ; LSB SC Block Control Register 2 +DAC9_Ia_LSB_CR3: equ 93h ; LSB SC Block Control Register 3 + +DAC9_Ia_MSB_CR0: equ 94h ; MSB SC Block Control Register 0 +DAC9_Ia_MSB_CR1: equ 95h ; MSB SC Block Control Register 1 +DAC9_Ia_MSB_CR2: equ 96h ; MSB SC Block Control Register 2 +DAC9_Ia_MSB_CR3: equ 97h ; MSB SC Block Control Register 3 + +; end of file DAC9_Ia.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.h new file mode 100644 index 0000000..4e48100 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.h @@ -0,0 +1,86 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.4.3191 +******************************************************************************/ +/****************************************************************************** +* This file contains defines to support oscillator register initialization +* for CY8C24423B +******************************************************************************/ + +#define CPU_CLOCK 0x3 //CPU clock value +#define CPU_CLOCK_MASK 0x7 //CPU clock mask +#define CPU_CLOCK_JUST 0x3 //CPU clock value justified +#define SELECT_32K 0x0 //32K select value +#define SELECT_32K_MASK 0x80 //32K select mask +#define SELECT_32K_JUST 0x0 //32K select value justified +#define PLL_MODE 0x0 //PLL mode value +#define PLL_MODE_MASK 0x40 //PLL mode mask +#define PLL_MODE_JUST 0x0 //PLL mode value justified +#define SLEEP_TIMER 0x0 //Sleep Timer value +#define SLEEP_TIMER_MASK 0x18 //Sleep Timer mask +#define SLEEP_TIMER_JUST 0x0 //Sleep Timer value justified +#define SWITCH_MODE_PUMP 0x1 //Switch Mode Pump value +#define SWITCH_MODE_PUMP_MASK 0x80 //Switch Mode Pump mask +#define SWITCH_MODE_PUMP_JUST 0x80 //Switch Mode Pump value justified +#define TRIP_VOLTAGE 0x6 //Trip Voltage +#define POWER_SETTING 0x10 //Power Setting [ Vcc / SysClk freq ] 0x10 = 5.0V / 24MHz + // 0x08 = 3.3V / 24MHz + // 0x09 = 3.3V / 12MHz +#define WATCHDOG_ENABLE 0x0 //Watchdog Enable 1 = Enable +#define CLOCK_DIV_VC1 0x0 // VC1 clock divider +#define CLOCK_DIV_VC1_MASK 0xf0 // VC1 clock divider mask +#define CLOCK_DIV_VC1_JUST 0x0 // jVC1 clock divider ustified +#define CLOCK_DIV_VC2 0xb // VC2 clock divider +#define CLOCK_DIV_VC2_MASK 0xf // VC2 clock divider mask +#define CLOCK_DIV_VC2_JUST 0xb // VC2 clock divider justified +#define CLOCK_INPUT_VC3 0x0 // VC3 clock source +#define CLOCK_INPUT_VC3_MASK 0x3 // VC3 clock source mask +#define CLOCK_INPUT_VC3_JUST 0x0 // VC3 clock source justified +#define CLOCK_DIV_VC3 0x2f // VC3 clock divider +#define CLOCK_DIV_VC3_MASK 0xff // VC3 clock divider mask +#define CLOCK_DIV_VC3_JUST 0x2f // VC3 clock divider justified +#define ANALOG_BUFFER_PWR 0x1 // Analog buffer power level +#define ANALOG_BUFFER_PWR_MASK 0x1 // Analog buffer power level mask +#define ANALOG_BUFFER_PWR_JUST 0x1 // Analog buffer power level justified +#define ANALOG_POWER 0x7 // Analog power control +#define ANALOG_POWER_MASK 0x7 // Analog power control mask +#define ANALOG_POWER_JUST 0x7 // Analog power control justified +#define OP_AMP_BIAS 0x0 // Op amp bias level +#define OP_AMP_BIAS_MASK 0x40 // Op amp bias level mask +#define OP_AMP_BIAS_JUST 0x0 // Op amp bias level justified +#define REF_MUX 0x7 // Ref mux setting +#define REF_MUX_MASK 0x38 // Ref mux setting mask +#define REF_MUX_JUST 0x38 // Ref mux setting justified +#define AGND_BYPASS 0x0 // AGndBypass setting +#define AGND_BYPASS_MASK 0x40 // AGndBypass setting mask +#define AGND_BYPASS_JUST 0x0 // AGndBypass setting justified +#define SYSCLK_SOURCE 0x0 // SysClk Source setting +#define SYSCLK_SOURCE_MASK 0x4 // SysClk Source setting mask +#define SYSCLK_SOURCE_JUST 0x0 // SysClk Source setting justified +#define SYSCLK_2_DISABLE 0x0 // SysClk*2 Disable setting +#define SYSCLK_2_DISABLE_MASK 0x1 // SysClk*2 Disable setting mask +#define SYSCLK_2_DISABLE_JUST 0x0 // SysClk*2 Disable setting justified +// +// register initial values +// +#define ANALOG_IO_CONTROL 0x29 //Analog IO Control register (ABF_CR) +#define PORT_0_GLOBAL_SELECT 0x0 //Port 0 global select register (PRT0GS) +#define PORT_0_DRIVE_0 0x4 //Port 0 drive mode 0 register (PRT0DM0) +#define PORT_0_DRIVE_1 0xfb //Port 0 drive mode 1 register (PRT0DM1) +#define PORT_0_DRIVE_2 0xfb //Port 0 drive mode 1 register (PRT0DM2) +#define PORT_0_INTENABLE 0x0 //Port 0 interrupt enable register (PRT0IE) +#define PORT_0_INTCTRL_0 0x0 //Port 0 interrupt control 0 register (PRT0IC0) +#define PORT_0_INTCTRL_1 0x0 //Port 0 interrupt control 1 register (PRT0IC1) +#define PORT_1_GLOBAL_SELECT 0x70 //Port 1 global select register (PRT1GS) +#define PORT_1_DRIVE_0 0x70 //Port 1 drive mode 0 register (PRT1DM0) +#define PORT_1_DRIVE_1 0x8f //Port 1 drive mode 1 register (PRT1DM1) +#define PORT_1_DRIVE_2 0x8f //Port 1 drive mode 2 register (PRT1DM2) +#define PORT_1_INTENABLE 0x0 //Port 1 interrupt enable register (PRT1IE) +#define PORT_1_INTCTRL_0 0x0 //Port 1 interrupt control 0 register (PRT1IC0) +#define PORT_1_INTCTRL_1 0x0 //Port 1 interrupt control 1 register (PRT1IC1) +#define PORT_2_GLOBAL_SELECT 0x0 //Port 2 global select register (PRT2GS) +#define PORT_2_DRIVE_0 0x7f //Port 2 drive mode 0 register (PRT2DM0) +#define PORT_2_DRIVE_1 0x80 //Port 2 drive mode 1 register (PRT2DM1) +#define PORT_2_DRIVE_2 0x0 //Port 2 drive mode 2 register (PRT2DM2) +#define PORT_2_INTENABLE 0x0 //Port 2 interrupt enable register (PRT2IE) +#define PORT_2_INTCTRL_0 0x0 //Port 2 interrupt control 0 register (PRT2IC0) +#define PORT_2_INTCTRL_1 0x0 //Port 2 interrupt control 1 register (PRT2IC1) diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.inc new file mode 100644 index 0000000..cb047f3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/globalparams.inc @@ -0,0 +1,118 @@ +; Generated by PSoC Designer 5.4.3191 +; +;============================================================================= +; FILENAME: GlobalParams.inc +; DATE: 2 August 2004 +; +; DESCRIPTION: +; Constants describing many of the global parameter settings. +; This file contains equates to support oscillator register initialization +; for the CY8C24423B +; +; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +;============================================================================= +; + +CPU_CLOCK: equ 3h ;CPU clock value +CPU_CLOCK_MASK: equ 7h ;CPU clock mask +CPU_CLOCK_JUST: equ 3h ;CPU clock value justified +SELECT_32K: equ 0h ;32K select value +SELECT_32K_MASK: equ 80h ;32K select mask +SELECT_32K_JUST: equ 0h ;32K select value justified +PLL_MODE: equ 0h ;PLL mode value +PLL_MODE_MASK: equ 40h ;PLL mode mask +PLL_MODE_JUST: equ 0h ;PLL mode value justified +SLEEP_TIMER: equ 0h ;Sleep Timer value +SLEEP_TIMER_MASK: equ 18h ;Sleep Timer mask +SLEEP_TIMER_JUST: equ 0h ;Sleep Timer value justified +SWITCH_MODE_PUMP: equ 1h ;Switch Mode Pump setting +SWITCH_MODE_PUMP_MASK: equ 80h ;Switch Mode Pump mask +SWITCH_MODE_PUMP_JUST: equ 80h ;Switch Mode Pump justified +LVD_TBEN: equ 0 ; Low Voltage Throttle-back enable value +LVD_TBEN_MASK: equ 8 ; Low Voltage Throttle-back enable mask +LVD_TBEN_JUST: equ 0 ; Low Voltage Throttle-back enable justified +TRIP_VOLTAGE: equ 6h ;Trip Voltage value +TRIP_VOLTAGE_MASK: equ 7h ;Trip Voltage mask +TRIP_VOLTAGE_JUST: equ 6h ;Trip Voltage justified + +POWER_SETTING: equ 10h +POWER_SET_5V0: equ 10h ; MASK for 5.0V operation, fast and slow +POWER_SET_5V0_24MHZ: equ 10h ; Power Setting value for 5.0V fast +POWER_SET_5V0_6MHZ: equ 11h ; Power Setting value for 5.0V slow +POWER_SET_3V3: equ 08h ; MASK for 3.3V operation, fast and slow +POWER_SET_3V3_24MHZ: equ 08h ; Power Setting value for 3.3V fast +POWER_SET_3V3_6MHZ: equ 09h ; Power Setting value for 3.3V slow +POWER_SET_2V7: equ 06h ; MASK for 2.7V operation, fast and slow +POWER_SET_2V7_12MHZ: equ 04h ; MASK for 2.7V, 12MHZ operation +POWER_SET_2V7_6MHZ: equ 02h ; MASK for 2.7V, 6MHZ operation +POWER_SET_SLOW_IMO: equ 01h ; MASK for slow Internal Main Oscillator (IMO) + +COMM_RX_PRESENT: equ 0 ;1 = TRUE +WATCHDOG_ENABLE: equ 0 ;Watchdog Enable 1 = Enable + +CLOCK_DIV_VC1: equ 0h ;VC1 clock divider +CLOCK_DIV_VC1_MASK: equ f0h ;VC1 clock divider mask +CLOCK_DIV_VC1_JUST: equ 0h ;VC1 clock divider justified +CLOCK_DIV_VC2: equ bh ;VC2 clock divider +CLOCK_DIV_VC2_MASK: equ fh ;VC2 clock divider mask +CLOCK_DIV_VC2_JUST: equ bh ;VC2 clock divider justified +CLOCK_INPUT_VC3: equ 0h ;VC3 clock source +CLOCK_INPUT_VC3_MASK: equ 3h ;VC3 clock source mask +CLOCK_INPUT_VC3_JUST: equ 0h ;VC3 clock source justified +CLOCK_DIV_VC3: equ 2fh ;VC3 clock divider +CLOCK_DIV_VC3_MASK: equ ffh ;VC3 clock divider mask +CLOCK_DIV_VC3_JUST: equ 2fh ;VC3 clock divider justified +ANALOG_BUFFER_PWR: equ 1h ;Analog buffer power level +ANALOG_BUFFER_PWR_MASK: equ 1h ;Analog buffer power level mask +ANALOG_BUFFER_PWR_JUST: equ 1h ;Analog buffer power level justified +ANALOG_POWER: equ 7h ;Analog power control +ANALOG_POWER_MASK: equ 7h ;Analog power control mask +ANALOG_POWER_JUST: equ 7h ;Analog power control justified +OP_AMP_BIAS: equ 0h ;Op amp bias level +OP_AMP_BIAS_MASK: equ 40h ;Op amp bias level mask +OP_AMP_BIAS_JUST: equ 0h ;Op amp bias level justified +REF_MUX: equ 7h ;Ref mux setting +REF_MUX_MASK: equ 38h ;Ref mux setting mask +REF_MUX_JUST: equ 38h ;Ref mux setting justified +AGND_BYPASS: equ 0h ;AGndBypass setting +AGND_BYPASS_MASK: equ 40h ;AGndBypass setting mask +AGND_BYPASS_JUST: equ 0h ;AGndBypass setting justified +SYSCLK_SOURCE: equ 0h ;SysClk Source setting +SYSCLK_SOURCE_MASK: equ 4h ;SysClk Source setting mask +SYSCLK_SOURCE_JUST: equ 0h ;SysClk Source setting justified +SYSCLK_2_DISABLE: equ 0h ;SysClk*2 Disable setting +SYSCLK_2_DISABLE_MASK: equ 1h ;SysClk*2 Disable setting mask +SYSCLK_2_DISABLE_JUST: equ 0h ;SysClk*2 Disable setting justified +; +; register initial values +; +ANALOG_IO_CONTROL: equ 29h ;Analog IO Control register (ABF_CR) +PORT_0_GLOBAL_SELECT: equ 0h ;Port 0 global select register (PRT0GS) +PORT_0_DRIVE_0: equ 4h ;Port 0 drive mode 0 register (PRT0DM0) +PORT_0_DRIVE_1: equ fbh ;Port 0 drive mode 1 register (PRT0DM1) +PORT_0_DRIVE_2: equ fbh ;Port 0 drive mode 2 register (PRT0DM2) +PORT_0_INTENABLE: equ 0h ;Port 0 interrupt enable register (PRT0IE) +PORT_0_INTCTRL_0: equ 0h ;Port 0 interrupt control 0 register (PRT0IC0) +PORT_0_INTCTRL_1: equ 0h ;Port 0 interrupt control 1 register (PRT0IC1) +PORT_1_GLOBAL_SELECT: equ 70h ;Port 1 global select register (PRT1GS) +PORT_1_DRIVE_0: equ 70h ;Port 1 drive mode 0 register (PRT1DM0) +PORT_1_DRIVE_1: equ 8fh ;Port 1 drive mode 1 register (PRT1DM1) +PORT_1_DRIVE_2: equ 8fh ;Port 1 drive mode 2 register (PRT1DM2) +PORT_1_INTENABLE: equ 0h ;Port 1 interrupt enable register (PRT1IE) +PORT_1_INTCTRL_0: equ 0h ;Port 1 interrupt control 0 register (PRT1IC0) +PORT_1_INTCTRL_1: equ 0h ;Port 1 interrupt control 1 register (PRT1IC1) +PORT_2_GLOBAL_SELECT: equ 0h ;Port 2 global select register (PRT2GS) +PORT_2_DRIVE_0: equ 7fh ;Port 2 drive mode 0 register (PRT2DM0) +PORT_2_DRIVE_1: equ 80h ;Port 2 drive mode 1 register (PRT2DM1) +PORT_2_DRIVE_2: equ 0h ;Port 2 drive mode 2 register (PRT2DM2) +PORT_2_INTENABLE: equ 0h ;Port 2 interrupt enable register (PRT2IE) +PORT_2_INTCTRL_0: equ 0h ;Port 2 interrupt control 0 register (PRT2IC0) +PORT_2_INTCTRL_1: equ 0h ;Port 2 interrupt control 1 register (PRT2IC1) + +; end of file GlobalParams.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.asm new file mode 100644 index 0000000..2f3183f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.asm @@ -0,0 +1,184 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.asm +;; Version: 2.2, Updated on 2015/3/4 at 22:26:35 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: +;; Assembler source code for a two-OpAmp Instrumentation Amplifier +;; topology in the 25/26xxx family of PSoC devices +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "INSAMP.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export INSAMP_Start +export _INSAMP_Start +export INSAMP_SetPower +export _INSAMP_SetPower + +export INSAMP_SetGain +export _INSAMP_SetGain + +export INSAMP_Stop +export _INSAMP_Stop + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +POWERMASK: equ 0x03 ; Power field mask for CR2 +GAINMASK: equ F0h ; Gain field mask for CR0 + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Start +; FUNCTION NAME: INSAMP_Setpower +; +; DESCRIPTION: +; Sets power to the analog blocks used in this module. All three blocks +; are set to the same power setting (which should be the same as the +; analog reference power global parameter for best operation!). Constants +; for proper values are defined in asm and C interface files. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPowerSetting in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Start: +_INSAMP_Start: + INSAMP_SetPower: +_INSAMP_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + + and A, POWERMASK ; mask A to protect unchanged bits + mov X, SP ; define temp store location + + push A ; put power value in temp store + mov A, reg[INSAMP_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_INV_CR2], A + + mov A, reg[INSAMP_NON_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_NON_INV_CR2], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_SetGain +; +; DESCRIPTION: +; Applies gain set values to the module's PSoC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bGain in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; The A register contains the gain setting per values in .inc file. +; Values in range of 00h to 07h, upper 4 bits only. +; Gain value applied to NON_INV block. +; Difference (E0h-gain value) applied to _INV block. +; + INSAMP_SetGain: +_INSAMP_SetGain: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, GAINMASK ; mask A to protect unchanged bits + mov X, SP ; set base address for local variable + + push A + mov A, reg[INSAMP_NON_INV_CR0] ; read gain value + and A, ~GAINMASK ; clear gain bits in A + or A, [X] ; combine gain value with balance of reg. + mov reg[INSAMP_NON_INV_CR0], A + + mov A, E0h ; load gain complement value + sub a, [X] ; calculate gain value for -INV block + push A + mov A, reg[INSAMP_INV_CR0] ; read gain complement value + and A, ~GAINMASK ; clear gain bits in A + or A, [X+1] ; combine gain value with balance of reg. + mov reg[INSAMP_INV_CR0], A + pop A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Stop +; +; DESCRIPTION: Turns off power to the two CT blocks +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Stop: +_INSAMP_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[INSAMP_NON_INV_CR2], ~POWERMASK + and reg[INSAMP_INV_CR2], ~POWERMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +; End of File INSAMP.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.h new file mode 100644 index 0000000..b189bf9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.h @@ -0,0 +1,72 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: INSAMP.h +// Version: 2.2, Updated on 2015/3/4 at 22:26:35 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: C declarations for a two-OpAmp Instrumentation Amplifier +// topology in the 22/24/27/28xxx family of PSoC devices +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef INSAMP_INCLUDE +#define INSAMP_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 INSAMP_Start +#pragma fastcall16 INSAMP_SetPower +#pragma fastcall16 INSAMP_SetGain +#pragma fastcall16 INSAMP_Stop + +//------------------------------------------------- +// Prototypes of the INSAMP API. +//------------------------------------------------- +extern void INSAMP_Start(BYTE bPower); +extern void INSAMP_SetPower(BYTE bPower); +extern void INSAMP_SetGain(BYTE bGain); +extern void INSAMP_Stop(void); + +//------------------------------------------------- +// Defines for INSAMP API's. +//------------------------------------------------- +#define INSAMP_OFF 0 +#define INSAMP_LOWPOWER 1 +#define INSAMP_MEDPOWER 2 +#define INSAMP_HIGHPOWER 3 + +#define INSAMP_G16_0 0x00 +#define INSAMP_G8_00 0x10 +#define INSAMP_G5_33 0x20 +#define INSAMP_G4_00 0x30 +#define INSAMP_G3_20 0x40 +#define INSAMP_G2_67 0x50 +#define INSAMP_G2_27 0x60 +#define INSAMP_G2_00 0x70 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- + +#pragma ioport INSAMP_INV_CR0: 0x071 +BYTE INSAMP_INV_CR0; +#pragma ioport INSAMP_INV_CR1: 0x072 +BYTE INSAMP_INV_CR1; +#pragma ioport INSAMP_INV_CR2: 0x073 +BYTE INSAMP_INV_CR2; +#pragma ioport INSAMP_INV_CR3: 0x070 +BYTE INSAMP_INV_CR3; + +#pragma ioport INSAMP_NON_INV_CR0: 0x075 +BYTE INSAMP_NON_INV_CR0; +#pragma ioport INSAMP_NON_INV_CR1: 0x076 +BYTE INSAMP_NON_INV_CR1; +#pragma ioport INSAMP_NON_INV_CR2: 0x077 +BYTE INSAMP_NON_INV_CR2; +#pragma ioport INSAMP_NON_INV_CR3: 0x074 +BYTE INSAMP_NON_INV_CR3; + +#endif +// end of file INSAMP.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.inc new file mode 100644 index 0000000..64dba84 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/insamp.inc @@ -0,0 +1,50 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.inc +;; Version: 2.2, Updated on 2015/3/4 at 22:26:35 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: +;; Assembler declarations for a two-OpAmp Instrumentation Amplifier +;; topology in the 22/24/27/28xxx family of PSoC devices +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for INSAMP API's. +;-------------------------------------------------- + +INSAMP_OFF: equ 0 +INSAMP_LOWPOWER: equ 1 +INSAMP_MEDPOWER: equ 2 +INSAMP_HIGHPOWER: equ 3 + +INSAMP_G16_0: equ 00h +INSAMP_G8_00: equ 10h +INSAMP_G5_33: equ 20h +INSAMP_G4_00: equ 30h +INSAMP_G3_20: equ 40h +INSAMP_G2_67: equ 50h +INSAMP_G2_27: equ 60h +INSAMP_G2_00: equ 70h + +;-------------------------------------------------- +; Register Address Constants for INSAMP +;-------------------------------------------------- + +INSAMP_INV_CR0: equ 0x71 ; CT Block Control Register 0 +INSAMP_INV_CR1: equ 0x72 ; CT Block Control Register 1 +INSAMP_INV_CR2: equ 0x73 ; CT Block Control Register 2 +INSAMP_INV_CR3: equ 0x70 ; CT Block Control Register 3 + +INSAMP_NON_INV_CR0: equ 0x75 ; CT Block Control Register 0 +INSAMP_NON_INV_CR1: equ 0x76 ; CT Block Control Register 1 +INSAMP_NON_INV_CR2: equ 0x77 ; CT Block Control Register 2 +INSAMP_NON_INV_CR3: equ 0x74 ; CT Block Control Register 3 + + +; end of file INSAMP.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.asm new file mode 100644 index 0000000..97add52 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.asm @@ -0,0 +1,1354 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.asm +;; Version: 1.60, Updated on 2015/3/4 at 22:26:36 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: LCD User Module software implementation file. +;; +;; This set of functions is written for the common 2 and 4 line +;; LCDs that use the Hitachi HD44780A controller. +;; +;; LCD connections to PSoC port +;; +;; PX.0 ==> LCD D4 +;; PX.1 ==> LCD D5 +;; PX.2 ==> LCD D6 +;; PX.3 ==> LCD D7 +;; PX.4 ==> LCD E +;; PX.5 ==> LCD RS +;; PX.6 ==> LCD R/W +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to preserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "LCD.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export LCD_Start +export _LCD_Start +export LCD_Init +export _LCD_Init + +export LCD_WriteData +export _LCD_WriteData + +export LCD_Control +export _LCD_Control + +export LCD_PrString +export _LCD_PrString + +export LCD_PrCString +export _LCD_PrCString + +export LCD_Position +export _LCD_Position + +export LCD_PrHexByte +export _LCD_PrHexByte + +export LCD_PrHexInt +export _LCD_PrHexInt + +export LCD_Delay50uTimes +export _LCD_Delay50uTimes + +export LCD_Delay50u +export _LCD_Delay50u + +;----------------------------------------------- +; If bargraph functions not required, don't +; export the function names. +;----------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) +export LCD_InitBG +export _LCD_InitBG + +export LCD_InitVBG +export _LCD_InitVBG + +; NOTE: The two functions, +; +; LCD_DrawVBG and +; LCD_DrawBG +; +; are implemented using both fastcall16 and legacy fastcall16 because they +; fall into a special and rare case where the calling sequences specified +; by the two disciplines are incompatible. The fastcall16 versions are +; provided for both C and Assembly users in all memory models. The legacy +; fastcall16 versions are provided only to support existing small memory +; model assembly language code---they do not work in the large memory +; model. +; +; ** The legacy fastcall16 versions are provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Their use is +; ** deprecated and their status is "No Further Maintenance". +; +; The fastcall16 versions of these functions are distinguished by a +; leading underscore in the name. The legacy fastcall16 names (which appear +; in this comment) do not have the leading underscore. Details on the +; calling sequence to be used for fastcall16 are given in the user module +; datasheet. +; +; Fastcall16 versions: +export _LCD_DrawVBG +export _LCD_DrawBG + +IF SYSTEM_SMALL_MEMORY_MODEL +; Legacy Fastcall versions: +export LCD_DrawVBG +export LCD_DrawBG +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +ENDIF ; BARGRAPH_ENABLE + +; +; The following functions are deprecated and will be eliminated in a future +; version of PSoC Designer. +; +export LCD_Write_Data +export _LCD_Write_Data + + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_E: equ 10h +LCD_RW: equ 40h +LCD_RS: equ 20h + +LCD_DATA_MASK: equ 0Fh +LCD_READY_BIT: equ 08h + +LCD_DATA_READ: equ ( LCD_E | LCD_RW | LCD_RS ) +LCD_CNTL_READ: equ ( LCD_E | LCD_RW ) +LCD_PORT_WRITE: equ 7Fh +LCD_PORT_MASK: equ 7Fh + +LCD_DISP_INC: equ 03h +LCD_DISP_OFF: equ 08h +LCD_DISP_ON: equ 0Ch +LCD_4BIT_2LINE: equ 2Ch + + +;----------------------------------------------- +; Bargraph definitions +;----------------------------------------------- + +LCD_BG_CHAR_WIDTH: equ 16 ; 16 characters in width +LCD_BG_SEG_WIDTH: equ 80 ; 16 * 5 = 80 +LCD_BG_COL_START: equ 0 ; Always start in the left most column + + ; Offsets for 2x16, 2x20, 4x20 + ; Change these values for a custom LCD + +LCD_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 +LCD_ROW3_OFFSET: equ 94h ; Address/command offset for row 1 +LCD_ROW4_OFFSET: equ D4h ; Address/command offset for row 2 + +LCD_BG_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_BG_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + +LCD_CG_RAM_OFFSET: equ 40h ; Offset to character RAM + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrCString +; +; DESCRIPTION: +; Print constant (ROM) string to LCD +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Pointer to String +; A contains MSB of string address +; X contains LSB of string address +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrCString: +_LCD_PrCString: + RAM_PROLOGUE RAM_USE_CLASS_1 + .Loop_PrCString: + push A ; Store ROM pointer + push X + romx ; Get character from ROM + jnz .LCD_PrCString_WR ; print character and advance pointer + pop X ; Restore the stack + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret ; Return + +.LCD_PrCString_WR: + call LCD_WriteData ; Write data to LCD + pop X ; Get ROM pointer + pop A + inc X ; Inc LSB of pointer + jnc .Loop_PrCString + inc A ; Inc MSB of pointer if LSB overflow + jmp .Loop_PrCString + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexByte +; +; DESCRIPTION: +; Print a byte in Hex (two characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => (BYTE) Data/char to be printed +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +.LITERAL +LCD_HEX_STR:: + DS "0123456789ABCDEF" +.ENDLITERAL +.SECTION + + LCD_PrHexByte: +_LCD_PrHexByte: + RAM_PROLOGUE RAM_USE_CLASS_1 + push A ; Save lower nibble + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + pop A ; Restore value + and A,0Fh ; Mask off lower nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexInt +; +; DESCRIPTION: +; Print an Int in Hex (four characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Integer value +; A contains LSB of Int +; X contains MSB of Int +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrHexInt: +_LCD_PrHexInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + swap A,X + call LCD_PrHexByte ; Print MSB + mov A,X ; Move LSB into position + call LCD_PrHexByte ; Print LSB + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrString +; +; DESCRIPTION: +; Print (RAM) ASCII string to LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X contains pointer to string +; X contains LSB of string pointer +; A contains MSB or page of string pointer (not used at this time) +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; IDX_PP +; +; + LCD_PrString: +_LCD_PrString: + RAM_PROLOGUE RAM_USE_CLASS_3 + RAM_SETPAGE_IDX A + .Loop_PrString: + mov A,[X] ; Get value pointed to by X + jz .End_LCD_PrString ; Check for end of string + ;LCD_writeData is known not to modify X so no need to preserve + call LCD_WriteData ; Write data to screen + inc X ; Advance pointer to next character + jmp .Loop_PrString ; Go get next character +.End_LCD_PrString: + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WriteData +; +; DESCRIPTION: +; Write a byte to the LCD's data register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains byte to be written to LCD data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WriteData: +_LCD_WriteData: + LCD_Write_Data: ; Do not use +_LCD_Write_Data: ; Do not use + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of character + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off high nibble + call LCD_WDATA_Nibble ; Write Upper nibble + pop A ; Retrieve copy of character + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WDATA_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Control +; +; DESCRIPTION: +; Write a byte to the LCD's control register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains data to be written to LCD control register. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_Control: +_LCD_Control: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of byte + asr A ; Shift Upper Nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off, just in case + call LCD_WCNTL_Nibble ; Write high nibble + pop A ; Restore copy of byte + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WCNTL_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WCNTL_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's command register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to command register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WCNTL_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Reset control lines + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in MSN + or A,LCD_E ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; OR in bit 7 just + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + nop + and A,(~LCD_PORT_MASK|LCD_DATA_MASK) ; Disable E signal and leave data on bus. + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WDATA_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's DATA register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +LCD_WDATA_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + or [Port_2_Data_SHADE],LCD_RS ; Raise RS to signify a Data Write + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in A[7:4] + or A,(LCD_E | LCD_RS) ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; Keep shadow in sync + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow in sync + NOP + and A,(~LCD_PORT_MASK|LCD_DATA_MASK|LCD_RS) ; Disable E signal and leave Data on bus + mov [Port_2_Data_SHADE],A ; keep shadow in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Check_Ready +; +; DESCRIPTION: +; Wait until LCD has completed last command. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD is not present, this routine may never return. +; +LCD_Check_Ready: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A ; Save Accumulator + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK ; Mask of all LCD bits + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Zero LCD port bits + + and [Port_2_DriveMode_0_SHADE],~LCD_DATA_MASK ; Clear out LCD mode bits. + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 ; Change port mode to read status + mov reg[LCD_PortMode0],A ; Setup LCD Port for reading + M8C_SetBank0 + + or [Port_2_Data_SHADE],LCD_RW ; Raise RW to signify Read operation + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + NOP + + push X ; Save 'X' register + mov X,255 ; 255 Attempts + +.LCD_RDY_LOOP: + or [Port_2_Data_SHADE], LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Wait 2 nops to make sure data is ready + nop + mov A,reg[LCD_Port] + +; The code below is used to work around the async read issue with the ICE with the +; 25/26xxx family of devices. It will help to eliminate "Invalid memory reference" +; errors. It is not required when running without the ICE or when using any other +; family besides the 25/26xxx family. If not using the ICE or with any other family +; the ICE_PORT_SYNC flag should be set to 0. +IF(ICE_PORT_SYNC) + mov reg[ 0xfa], A + mov A, reg[0xfa] +ENDIF + + push A + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Add delay for the slowest part and the + nop ; fastest PSoC + nop + ; Get the LSBs + or [Port_2_Data_SHADE],LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop + nop + + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_READY_BIT ; Check busy + + jz .UNLOCK + dec X + jnz .LCD_RDY_LOOP ; If LCD still busy, read again for 255 times +.UNLOCK: + pop X ; Restore 'X' register + + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Revert Data bit to Write mode + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_4 ; Restore Accumulator + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Start +; FUNCTION NAME: LCD_Init +; +; DESCRIPTION: +; Initialize LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; THEORY of OPERATION or PROCEDURE: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; This initialization is a bit long, but it should work for +; most 2 and 4 line LCDs. +; + LCD_Start: +_LCD_Start: + LCD_Init: +_LCD_Init: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + + and [Port_2_DriveMode_0_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Set LCD port for writing + and [Port_2_DriveMode_1_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + mov A,[Port_2_DriveMode_1_SHADE] + mov reg[LCD_PortMode1],A + M8C_SetBank0 + + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,82 ; Delay for 4.1 mSec (82 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + call LCD_Delay50u + call LCD_Delay50u + call LCD_Delay50u + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,02h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,08h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,01h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,06h + call LCD_Control + + mov A,0Eh + call LCD_Control + + mov A,LCD_4BIT_2LINE ; Setup for 4 bit interface, 2 line + call LCD_Control + + mov A,LCD_DISP_OFF + call LCD_Control + + mov A,LCD_DISP_ON + call LCD_Control + + mov A,LCD_DISP_INC + call LCD_Control + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Position +; +; DESCRIPTION: +; Position Cursor at Row and Col location +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Row 0 to 3 +; X => Col 0 to 39+ +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +.LITERAL +LCD_ROW_OFFSET:: + DB LCD_ROW1_OFFSET, LCD_ROW2_OFFSET, LCD_ROW3_OFFSET, LCD_ROW4_OFFSET +.ENDLITERAL + +.SECTION + LCD_Position: +_LCD_Position: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,03h ; Mask off 2 bits for row address 0 to 3 + push X ; Store COL + index LCD_ROW_OFFSET ; Get ROW memory offset from table + mov X,SP ; Get Stack pointer + add A,[X+(-1)] ; Add the COL to the display pointer + pop X + + call LCD_Control ; Write control byte + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50uTimes +; +; DESCRIPTION: +; Delay increments of 50uSeconds +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the delay multiplier +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; + LCD_Delay50uTimes: +_LCD_Delay50uTimes: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Delay50u + dec A + jnz LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50u +; +; DESCRIPTION: +; Delay 50uSec for any clock frequency from 1.5MHz to 24MHz +; Slower clock frequencies the delay will be; +; 1.5 +; -------------- * 50uSec +; clock_freq(MHz) +; +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; +.LITERAL + LCD_Delay50u_Table:: + DB 08h, 19h, 3Ah, 7Ch, 01h, 01h, 01h, 01h +; 3MHz, 6MHz, 12MHz, 24MHz, 1.5MHz, 750kHz, 188kHz, 94kHz +.ENDLITERAL +.SECTION + + LCD_Delay50u: + _LCD_Delay50u: ; [11] Call + RAM_PROLOGUE RAM_USE_CLASS_1 + push A + M8C_SetBank1 ; [4] + mov A, reg[OSC_CR0] ; [6] Get delay value + M8C_SetBank0 ; [4] + and A,07h ; [4] Mask off only the clock bits + cmp A,05h + jnc .Delay50u_End + index LCD_Delay50u_Table ; [13] Get delay value +.Delay50u_Loop: ; + dec A ; [4] + jnz .Delay50u_Loop ; [5] +.Delay50u_End: + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +;----------------------------------------------------------------------------- +; If bargraph is not enabled, the following functions are not required. +;----------------------------------------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a horizontal bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 39+ +; [x-1] => Length of bargraph in chars 1 to 40+ +; [X-2] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_COLX: equ 0 ; Stack position of Column +BG_CHAR_LENX: equ -1 ; Stack position of Length +BG_LENGTHX: equ -2 ; Stack position of bargraph pointer position + + +LCD_DrawBG: + push X + mov X,[X+BG_COLX] ; Row in A, Col in X + call LCD_Position ; Set cursor position + pop X ; Restore pointer + +.LCD_BG_LOOP1X: + cmp [X+BG_LENGTHX],00h ; Check for past end of BG + jnz .LCD_CHECK1X + mov A,00h ; Load empty character + jmp .LCD_BG_DOITX ; + +.LCD_CHECK1X: + cmp [X+BG_LENGTHX],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2X ; Note yet, use full character + mov A,[X+BG_LENGTHX] + sub [X+BG_LENGTHX],A + jmp .LCD_BG_DOITX + +.LCD_CHECK2X: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTHX],05h ; Subtract another 5 positions + +.LCD_BG_DOITX: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LENX] ; Dec Char count + jnz .LCD_BG_LOOP1X ; Do it all over again + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; Draw a horizontal bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 39+ +; [SP-5] => Length of bargraph in chars 1 to 40+ +; [SP-6] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_ROW: equ -3 +BG_COL: equ -4 ; Stack position of Column +BG_CHAR_LEN: equ -5 ; Stack position of Length +BG_LENGTH: equ -6 ; Stack position of bargraph pointer position + + +_LCD_DrawBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + push X + mov A,[X+BG_ROW] ; Row in A + mov X,[X+BG_COL] ; Col in X + RAM_EPILOGUE RAM_USE_CLASS_2 + call LCD_Position ; Set cursor position + RAM_PROLOGUE RAM_USE_CLASS_2 + pop X + +.LCD_BG_LOOP1: + cmp [X+BG_LENGTH],00h ; Check for past end of BG + jnz .LCD_CHECK1 + mov A,00h ; Load empty character + jmp .LCD_BG_DOIT ; + +.LCD_CHECK1: + cmp [X+BG_LENGTH],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2 ; Note yet, use full character + mov A,[X+BG_LENGTH] + sub [X+BG_LENGTH],A + jmp .LCD_BG_DOIT + +.LCD_CHECK2: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTH],05h ; Subtract another 5 positions + +.LCD_BG_DOIT: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LEN] ; Dec Char count + jnz .LCD_BG_LOOP1 ; Do it all over again + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a vertical bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 40+ +; [x-1] => Height of bargraph in chars 1 - 4 +; [X-2] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_COLX: equ 0 +VBG_CHAR_HEIGHTX: equ -1 +VBG_SEG_HEIGHTX: equ -2 + +LCD_DrawVBG: + + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOPX: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COLX] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHTX],00h ; Check for zero segs + jnz .VBG_NZ_SEGX + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHARX +.VBG_NZ_SEGX: + cmp [X+VBG_SEG_HEIGHTX],09h ; Check for full segment + jnc .VBG_FULL_SEGX + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHTX] + dec A + mov [X+VBG_SEG_HEIGHTX],00h ; Zero segment height + jmp .VBG_WRITE_CHARX + +.VBG_FULL_SEGX: ; Bargaph + sub [X+VBG_SEG_HEIGHTX],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHARX: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHTX] + jnz .VBG_LOOPX + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; Draw a vertical bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 40+ +; [SP-5] => Height of bargraph in chars 1 - 4 +; [SP-6] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_ROW: equ -3 +VBG_COL: equ -4 +VBG_CHAR_HEIGHT: equ -5 +VBG_SEG_HEIGHT: equ -6 + +_LCD_DrawVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + mov A, [X+VBG_ROW] + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOP: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COL] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHT],00h ; Check for zero segs + jnz .VBG_NZ_SEG + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHAR +.VBG_NZ_SEG: + cmp [X+VBG_SEG_HEIGHT],09h ; Check for full segment + jnc .VBG_FULL_SEG + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHT] + dec A + mov [X+VBG_SEG_HEIGHT],00h ; Zero segment height + jmp .VBG_WRITE_CHAR + +.VBG_FULL_SEG: ; Bargaph + sub [X+VBG_SEG_HEIGHT],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHAR: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHT] + jnz .VBG_LOOP + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitVBG +; +; DESCRIPTION: +; Initialize the vertical bargraph characters. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Stack offset constants +VBGDATA_CTR: equ 00h ; Char data count stack offset +VBG_BYTES: equ 01h ; Byte counter stack offset + + LCD_InitVBG: +_LCD_InitVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + push A ; Create 2 locations + push A + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+VBGDATA_CTR],01h ; Reset data counter + + .VBG_Loop1: ; loop once for each 8 characters + mov [X+VBG_BYTES],08h ; Load cycle pointer + .VBG_Loop2: ; Loop once for each line in character (8 times) + mov A,[X+VBGDATA_CTR] + cmp A,[X+VBG_BYTES] + jnc .VBG_SOLID + mov A,00h ; Empty line + jmp .VBG_Load ; Jump to load the bargraph +.VBG_SOLID: + mov A,FFh ; Load solid line +.VBG_Load: + call LCD_WriteData ; character data + dec [X+VBG_BYTES] ; Dec byte counter + jnz .VBG_Loop2 ; End Loop 2 + inc [X+VBGDATA_CTR] + cmp [X+VBGDATA_CTR],09h + jnz .VBG_Loop1 ; End Loop1 + + pop A + pop A + mov A,LCD_DISP_ON ; Turn on display, don't really + call LCD_Control ; need this. + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitBG +; +; DESCRIPTION: +; Initialize horizontal bargraph characters +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A = type 0 = full |||||||||........ +; 1 = single vertical line ..........|...... +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; THEORY of OPERATION or PROCEDURE: +; This function writes to the LCD character RAM to generate 8 custom +; characters used to generated one of two horizontal bargraphs. +; +.LITERAL + LCD_BG_TYPE1:: ; ....., |...., ||..., |||.., ||||., |||||, ||||| + DB 00h, 10h, 18h, 1Ch, 1Eh, 1Fh, 1Fh + LCD_BG_TYPE2:: ; ....., |...., .|..., ..|.., ...|., ....|, ..... + DB 00h, 10h, 08h, 04h, 02h, 01h, 00h +.ENDLITERAL + +.SECTION +; Stack offset constants +BGDATA_PTR: equ 00h ; Stack offsets +BGCHARS: equ 01h +BGTYPE: equ 02h + + LCD_InitBG: +_LCD_InitBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + add SP,3 + mov [X+BGTYPE],A ; Store the bargraph type + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+BGDATA_PTR],00h ; Reset pointer to BG data + + .BG_Loop1: + mov [X+BGCHARS],08h ; Load cycle pointer + .BG_Loop2: + mov A,[X+BGDATA_PTR] + cmp [X+BGTYPE],00h ; Check which bargraph + jnz .BG_OTHER + index LCD_BG_TYPE1 + jmp .BG_Load + .BG_OTHER: + index LCD_BG_TYPE2 + .BG_Load: + call LCD_WriteData + dec [X+BGCHARS] ; Character builder counter + jnz .BG_Loop2 + inc [X+BGDATA_PTR] ; Advance to next character + cmp [X+BGDATA_PTR],07h + jnz .BG_Loop1 + + add SP,-3 + mov A,LCD_DISP_ON + call LCD_Control + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +ENDIF + +; End of File LCD.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.h new file mode 100644 index 0000000..5182c6b --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.h @@ -0,0 +1,102 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: LCD.h +// Version: 1.60, Updated on 2015/3/4 at 22:26:36 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: LCD User Module C Language interface file. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef LCD_INCLUDE +#define LCD_INCLUDE + +#include <m8c.h> + +#define LCD_BARGRAPH_ENABLE 1 + +/* Create pragmas to support proper argument and return value passing */ +#pragma fastcall16 LCD_Start +#pragma fastcall16 LCD_Init +#pragma fastcall16 LCD_Control +#pragma fastcall16 LCD_WriteData +#pragma fastcall16 LCD_PrString +#pragma fastcall16 LCD_PrCString +#pragma fastcall16 LCD_PrHexByte +#pragma fastcall16 LCD_PrHexInt +#pragma fastcall16 LCD_Position +#pragma fastcall16 LCD_Delay50uTimes +#pragma fastcall16 LCD_Delay50u + +#if ( LCD_BARGRAPH_ENABLE ) +#pragma fastcall16 LCD_InitBG +#pragma fastcall16 LCD_DrawBG +#pragma fastcall16 LCD_InitVBG +#pragma fastcall16 LCD_DrawVBG +#endif + +//------------------------------------------------- +// Prototypes of the LCD API. +//------------------------------------------------- + +extern void LCD_Start(void); +extern void LCD_Init(void); +extern void LCD_Control(BYTE bData); +extern void LCD_WriteData(BYTE bData); +extern void LCD_PrString(char * sRamString); +extern void LCD_PrCString(const char * sRomString); +extern void LCD_Position(BYTE bRow, BYTE bCol); +extern void LCD_PrHexByte(BYTE bValue); +extern void LCD_PrHexInt(INT iValue); + +extern void LCD_Delay50uTimes(BYTE bTimes); +extern void LCD_Delay50u(void); + +// Do not use, will be removed in future version. +extern void LCD_Write_Data(BYTE bData); +#pragma fastcall16 LCD_Write_Data +// + + +#if ( LCD_BARGRAPH_ENABLE ) +extern void LCD_InitBG(BYTE bBGType); +extern void LCD_InitVBG(void); +extern void LCD_DrawVBG(BYTE bRow, BYTE bCol, BYTE bHeight, BYTE bPixelRowEnd); +extern void LCD_DrawBG(BYTE bRow, BYTE bCol, BYTE bLen, BYTE bPixelColEnd); + + +#define LCD_SOLID_BG 0x00 +#define LCD_LINE_BG 0x01 + + +#endif + +//------------------------------------------------- +// Defines for LCD API's. +//------------------------------------------------- +#define LCD_DISP_ON 0x0C +#define LCD_DISP_OFF 0x08 +#define LCD_DISP_BLANK 0x0A +#define LCD_DISP_CLEAR_HOME 0x01 +#define LCD_CURSOR_ON 0x0E +#define LCD_CURSOR_OFF 0x0C +#define LCD_CURSOR_WINK 0x0D +#define LCD_CURSOR_BLINK 0x0F +#define LCD_CURSOR_SH_LEFT 0x10 +#define LCD_CURSOR_SH_RIGHT 0x14 +#define LCD_CURSOR_HOME 0x02 +#define LCD_CURSOR_LEFT 0x04 +#define LCD_CURSOR_RIGHT 0x06 + +#define LCD_PORT_MASK 0x7F +//------------------------------------------------------ +// Register Address Constants for LCD +//------------------------------------------------------ + +#define LCD_Port PRT2DR +#define LCD_PortMode0 PRT2DM0 +#define LCD_PortMode1 PRT2DM1 + +#endif +// end of file LCD.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.inc new file mode 100644 index 0000000..6cd7809 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/lcd.inc @@ -0,0 +1,71 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.inc +;; Version: 1.60, Updated on 2015/3/4 at 22:26:36 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the LCD user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +; LCD connections to PSoC port +; +; PX.0 ==> LCD D4 +; PX.1 ==> LCD D5 +; PX.2 ==> LCD D6 +; PX.3 ==> LCD D7 +; PX.4 ==> LCD E +; PX.5 ==> LCD RS +; PX.6 ==> LCD R/W + + +include "m8c.inc" + +;------------------------------------------------------ +; Register Address Constants for LCD +;------------------------------------------------------ + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_BARGRAPH_ENABLE: equ 1 + + +;----------------------------------------------- +; Constants for LCD +;----------------------------------------------- +; LCD commands + +LCD_DISP_ON: equ 0Ch +LCD_DISP_OFF: equ 08h +LCD_CURSOR_ON: equ 0Eh +LCD_CURSOR_OFF: equ 0Ch +LCD_CURSOR_BLINK: equ 0Fh +LCD_CURSOR_WINK: equ 0Dh +LCD_CURSOR_SH_LEFT: equ 10h +LCD_CURSOR_SH_RIGHT: equ 14h +LCD_CURSOR_HOME: equ 02h +LCD_CURSOR_LEFT: equ 04h +LCD_CURSOR_RIGHT: equ 06h +LCD_DISP_CLEAR_HOME: equ 01h + +LCD_SOLID_BG: equ 00h +LCD_LINE_BG: equ 01h + +LCD_PORT_MASK: equ 7Fh + +ICE_PORT_SYNC: equ 0 ; This flag must be set to one to work around + ; the async read issue with the ICE with the + ; 25/26xxx family of devices. It will help + ; to eliminate "Invalid memory reference" errors. + ; It is not required when running without the ICE + ; or when using any other family besides the + ; 25/26xxx family. If not using the ICE, this flag + ; may be set to 0. + +; end of file LCD.inc + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfig.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfig.asm new file mode 100644 index 0000000..730bd94 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfig.asm @@ -0,0 +1,197 @@ +; Generated by PSoC Designer 5.4.3191 +; +;========================================================================== +; PSoCConfig.asm +; @PSOC_VERSION +; +; Version: 0.85 +; Revised: June 22, 2004 +; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +; +; This file is generated by the Device Editor on Application Generation. +; It contains code which loads the configuration data table generated in +; the file PSoCConfigTBL.asm +; +; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!! +; Edits to this file will not be preserved. +;========================================================================== +; +include "m8c.inc" +include "memory.inc" +include "GlobalParams.inc" + +export LoadConfigInit +export _LoadConfigInit +export LoadConfig_slc_free_28_pin_feb_16_2013 +export _LoadConfig_slc_free_28_pin_feb_16_2013 +export Port_2_Data_SHADE +export _Port_2_Data_SHADE +export Port_2_DriveMode_0_SHADE +export _Port_2_DriveMode_0_SHADE +export Port_2_DriveMode_1_SHADE +export _Port_2_DriveMode_1_SHADE + + +export NO_SHADOW +export _NO_SHADOW + +FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask +END_CONFIG_TABLE: equ ffh ;end of config table indicator + +AREA psoc_config(rom, rel) + +;--------------------------------------------------------------------------- +; LoadConfigInit - Establish the start-up configuration (except for a few +; parameters handled by boot code, like CPU speed). This +; function can be called from user code, but typically it +; is only called from boot. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfigInit: + LoadConfigInit: + RAM_PROLOGUE RAM_USE_CLASS_4 + + mov [Port_2_Data_SHADE], 0h + mov [Port_2_DriveMode_0_SHADE], 7fh + mov [Port_2_DriveMode_1_SHADE], 80h + + lcall LoadConfig_slc_free_28_pin_feb_16_2013 + lcall LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret + +;--------------------------------------------------------------------------- +; Load Configuration slc_free_28_pin_feb_16_2013 +; +; Load configuration registers for slc_free_28_pin_feb_16_2013. +; IO Bank 0 registers a loaded first,then those in IO Bank 1. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be +; modified as may the Page Pointer registers! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfig_slc_free_28_pin_feb_16_2013: + LoadConfig_slc_free_28_pin_feb_16_2013: + RAM_PROLOGUE RAM_USE_CLASS_4 + + push x + M8C_SetBank0 ; Force bank 0 + mov a, 0 ; Specify bank 0 + asr a ; Store in carry flag + ; Load bank 0 table: + mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + mov X, <LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + lcall LoadConfig ; Load the bank 0 values + + mov a, 1 ; Specify bank 1 + asr a ; Store in carry flag + ; Load bank 1 table: + mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + mov X, <LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + lcall LoadConfig ; Load the bank 1 values + + M8C_SetBank0 ; Force return to bank 0 + pop x + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret + + + + +;--------------------------------------------------------------------------- +; LoadConfig - Set IO registers as specified in ROM table of (address,value) +; pairs. Terminate on address=0xFF. +; +; INPUTS: [A,X] points to the table to be loaded +; Flag Register Carry bit encodes the Register Bank +; (Carry=0 => Bank 0; Carry=1 => Bank 1) +; +; RETURNS: nothing. +; +; STACK FRAME: X-4 I/O Bank 0/1 indicator +; X-3 Temporary store for register address +; X-2 LSB of config table address +; X-1 MSB of config table address +; +LoadConfig: + RAM_PROLOGUE RAM_USE_CLASS_2 + add SP, 2 ; Set up local vars + push X ; Save config table address on stack + push A + mov X, SP + mov [X-4], 0 ; Set default Destination to Bank 0 + jnc .BankSelectSaved ; Carry says Bank 0 is OK + mov [X-4], 1 ; No Carry: default to Bank 1 +.BankSelectSaved: + pop A + pop X + +LoadConfigLp: + M8C_SetBank0 ; Switch to bank 0 + M8C_ClearWDT ; Clear the watchdog for long inits + push X ; Preserve the config table address + push A + romx ; Load register address from table + cmp A, END_CONFIG_TABLE ; End of table? + jz EndLoadConfig ; Yes, go wrap it up + mov X, SP ; + tst [X-4], 1 ; Loading IO Bank 1? + jz .IOBankNowSet ; No, Bank 0 is fine + M8C_SetBank1 ; Yes, switch to Bank 1 +.IOBankNowSet: + mov [X-3], A ; Stash the register address + pop A ; Retrieve the table address + pop X + inc X ; Advance to the data byte + adc A, 0 + push X ; Save the config table address again + push A + romx ; load config data from the table + mov X, SP ; retrieve the register address + mov X, [X-3] + mov reg[X], A ; Configure the register + pop A ; retrieve the table address + pop X + inc X ; advance to next table entry + adc A, 0 + jmp LoadConfigLp ; loop to configure another register +EndLoadConfig: + add SP, -4 + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +AREA InterruptRAM(ram, rel) + +NO_SHADOW: +_NO_SHADOW: +; write only register shadows +_Port_2_Data_SHADE: +Port_2_Data_SHADE: BLK 1 +_Port_2_DriveMode_0_SHADE: +Port_2_DriveMode_0_SHADE: BLK 1 +_Port_2_DriveMode_1_SHADE: +Port_2_DriveMode_1_SHADE: BLK 1 + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfigtbl.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfigtbl.asm new file mode 100644 index 0000000..8def6a9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocconfigtbl.asm @@ -0,0 +1,193 @@ +; Generated by PSoC Designer 5.4.3191 +; +; ============================================================================= +; FILENAME: PSoCConfigTBL.asm +; +; Copyright (c) Cypress Semiconductor 2013. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +; +; ============================================================================= + +include "m8c.inc" +; Personalization tables +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered +AREA lit(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) + db 84h, 90h ;ADCINC_AtoDcr0(ASD11CR0) + db 85h, 00h ;ADCINC_AtoDcr1(ASD11CR1) + db 86h, 60h ;ADCINC_AtoDcr2(ASD11CR2) + db 87h, f8h ;ADCINC_AtoDcr3(ASD11CR3) +; Instance name ADCINC, Block Name PWM(DBB00) + db 23h, 00h ;ADCINC_PWMcr0(DBB00CR0) + db 21h, 00h ;ADCINC_PWMdr1(DBB00DR1) + db 22h, 01h ;ADCINC_PWMdr2(DBB00DR2) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) + db 80h, 80h ;DAC6_VGND_CR0(ASC10CR0) + db 81h, 40h ;DAC6_VGND_CR1(ASC10CR1) + db 82h, a0h ;DAC6_VGND_CR2(ASC10CR2) + db 83h, 30h ;DAC6_VGND_CR3(ASC10CR3) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) + db 90h, 80h ;DAC9_Ia_LSB_CR0(ASD20CR0) + db 91h, 80h ;DAC9_Ia_LSB_CR1(ASD20CR1) + db 92h, 20h ;DAC9_Ia_LSB_CR2(ASD20CR2) + db 93h, 30h ;DAC9_Ia_LSB_CR3(ASD20CR3) +; Instance name DAC9_Ia, Block Name MSB(ASC21) + db 94h, a0h ;DAC9_Ia_MSB_CR0(ASC21CR0) + db 95h, 41h ;DAC9_Ia_MSB_CR1(ASC21CR1) + db 96h, a0h ;DAC9_Ia_MSB_CR2(ASC21CR2) + db 97h, 34h ;DAC9_Ia_MSB_CR3(ASC21CR3) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) + db 71h, ddh ;INSAMP_INV_CR0(ACB00CR0) + db 72h, 21h ;INSAMP_INV_CR1(ACB00CR1) + db 73h, 20h ;INSAMP_INV_CR2(ACB00CR2) + db 70h, 00h ;INSAMP_INV_CR3(ACB00CR3) +; Instance name INSAMP, Block Name NON_INV(ACB01) + db 75h, 1ch ;INSAMP_NON_INV_CR0(ACB01CR0) + db 76h, 21h ;INSAMP_NON_INV_CR1(ACB01CR1) + db 77h, 20h ;INSAMP_NON_INV_CR2(ACB01CR2) + db 74h, 00h ;INSAMP_NON_INV_CR3(ACB01CR3) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 27h, 00h ;PWM8_Heater_CONTROL_REG(DBB01CR0) + db 25h, ffh ;PWM8_Heater_PERIOD_REG(DBB01DR1) + db 26h, 00h ;PWM8_Heater_COMPARE_REG(DBB01DR2) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2fh, 00h ;PWM8_NB_Out_CONTROL_REG(DCB03CR0) + db 2dh, ffh ;PWM8_NB_Out_PERIOD_REG(DCB03DR1) + db 2eh, 00h ;PWM8_NB_Out_COMPARE_REG(DCB03DR2) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 2bh, 00h ;PWM8_Vout_CONTROL_REG(DCB02CR0) + db 29h, ffh ;PWM8_Vout_PERIOD_REG(DCB02DR1) + db 2ah, 00h ;PWM8_Vout_COMPARE_REG(DCB02DR2) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 0 + db 60h, 09h ; AnalogColumnInputSelect register (AMX_IN) + db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1) + db 63h, 3fh ; AnalogReferenceControl register (ARF_CR) + db 65h, 00h ; AnalogSyncControl register (ASY_CR) + db e6h, 02h ; DecimatorControl_0 register (DEC_CR0) + db e7h, 02h ; DecimatorControl_1 register (DEC_CR1) + db d6h, 00h ; I2CConfig register (I2CCFG) + db b0h, 00h ; Row_0_InputMux register (RDI0RI) + db b1h, 00h ; Row_0_InputSync register (RDI0SYN) + db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS) + db b3h, 33h ; Row_0_LogicSelect_0 register (RDI0LT0) + db b4h, 33h ; Row_0_LogicSelect_1 register (RDI0LT1) + db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0) + db b6h, 08h ; Row_0_OutputDrive_1 register (RDI0SRO1) + db ffh +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) +; Instance name ADCINC, Block Name PWM(DBB00) + db 20h, 31h ;ADCINC_PWMfn(DBB00FN) + db 21h, 16h ;ADCINC_PWMsl(DBB00IN) + db 22h, 40h ;ADCINC_PWMos(DBB00OU) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) +; Instance name DAC9_Ia, Block Name MSB(ASC21) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) +; Instance name INSAMP, Block Name NON_INV(ACB01) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 24h, 31h ;PWM8_Heater_FUNC_REG(DBB01FN) + db 25h, 11h ;PWM8_Heater_INPUT_REG(DBB01IN) + db 26h, 44h ;PWM8_Heater_OUTPUT_REG(DBB01OU) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2ch, 31h ;PWM8_NB_Out_FUNC_REG(DCB03FN) + db 2dh, 14h ;PWM8_NB_Out_INPUT_REG(DCB03IN) + db 2eh, 06h ;PWM8_NB_Out_OUTPUT_REG(DCB03OU) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 28h, 31h ;PWM8_Vout_FUNC_REG(DCB02FN) + db 29h, 14h ;PWM8_Vout_INPUT_REG(DCB02IN) + db 2ah, 05h ;PWM8_Vout_OUTPUT_REG(DCB02OU) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 1 + db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1) + db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2) + db 60h, 05h ; AnalogColumnClockSelect register (CLK_CR0) + db 62h, 29h ; AnalogIOControl_0 register (ABF_CR0) + db 67h, 33h ; AnalogLUTControl0 register (ALT_CR0) + db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1) + db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0) + db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1) + db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN) + db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU) + db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN) + db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU) + db e1h, 0bh ; OscillatorControl_1 register (OSC_CR1) + db e2h, 00h ; OscillatorControl_2 register (OSC_CR2) + db dfh, 2fh ; OscillatorControl_3 register (OSC_CR3) + db deh, 00h ; OscillatorControl_4 register (OSC_CR4) + db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN) + db ffh +AREA psoc_config(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered: +; Ordered Global Register values + M8C_SetBank0 + mov reg[00h], 00h ; Port_0_Data register (PRT0DR) + M8C_SetBank1 + mov reg[00h], 04h ; Port_0_DriveMode_0 register (PRT0DM0) + mov reg[01h], fbh ; Port_0_DriveMode_1 register (PRT0DM1) + M8C_SetBank0 + mov reg[03h], fbh ; Port_0_DriveMode_2 register (PRT0DM2) + mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS) + M8C_SetBank1 + mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0) + mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1) + M8C_SetBank0 + mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE) + mov reg[04h], 00h ; Port_1_Data register (PRT1DR) + M8C_SetBank1 + mov reg[04h], 70h ; Port_1_DriveMode_0 register (PRT1DM0) + mov reg[05h], 8fh ; Port_1_DriveMode_1 register (PRT1DM1) + M8C_SetBank0 + mov reg[07h], 8fh ; Port_1_DriveMode_2 register (PRT1DM2) + mov reg[06h], 70h ; Port_1_GlobalSelect register (PRT1GS) + M8C_SetBank1 + mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0) + mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1) + M8C_SetBank0 + mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE) + mov reg[08h], 00h ; Port_2_Data register (PRT2DR) + M8C_SetBank1 + mov reg[08h], 7fh ; Port_2_DriveMode_0 register (PRT2DM0) + mov reg[09h], 80h ; Port_2_DriveMode_1 register (PRT2DM1) + M8C_SetBank0 + mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2) + mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS) + M8C_SetBank1 + mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0) + mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1) + M8C_SetBank0 + mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE) + M8C_SetBank0 + ret + + +; PSoC Configuration file trailer PsocConfig.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.h new file mode 100644 index 0000000..8560123 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.h @@ -0,0 +1,300 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.4.3191 +******************************************************************************/ +#include <m8c.h> +// AnalogOutBuf_0 address and mask defines +#pragma ioport AnalogOutBuf_0_Data_ADDR: 0x0 +BYTE AnalogOutBuf_0_Data_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_0_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_0_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_0_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_0_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_0_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_0_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_0_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_0_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_0_IntEn_ADDR; +#define AnalogOutBuf_0_MASK 0x8 +// AnalogOutBuf_1 address and mask defines +#pragma ioport AnalogOutBuf_1_Data_ADDR: 0x0 +BYTE AnalogOutBuf_1_Data_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_1_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_1_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_1_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_1_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_1_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_1_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_1_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_1_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_1_IntEn_ADDR; +#define AnalogOutBuf_1_MASK 0x20 +// CS address and mask defines +#pragma ioport CS_Data_ADDR: 0x4 +BYTE CS_Data_ADDR; +#pragma ioport CS_DriveMode_0_ADDR: 0x104 +BYTE CS_DriveMode_0_ADDR; +#pragma ioport CS_DriveMode_1_ADDR: 0x105 +BYTE CS_DriveMode_1_ADDR; +#pragma ioport CS_DriveMode_2_ADDR: 0x7 +BYTE CS_DriveMode_2_ADDR; +#pragma ioport CS_GlobalSelect_ADDR: 0x6 +BYTE CS_GlobalSelect_ADDR; +#pragma ioport CS_IntCtrl_0_ADDR: 0x106 +BYTE CS_IntCtrl_0_ADDR; +#pragma ioport CS_IntCtrl_1_ADDR: 0x107 +BYTE CS_IntCtrl_1_ADDR; +#pragma ioport CS_IntEn_ADDR: 0x5 +BYTE CS_IntEn_ADDR; +#define CS_MASK 0x8 +// CLK address and mask defines +#pragma ioport CLK_Data_ADDR: 0x4 +BYTE CLK_Data_ADDR; +#pragma ioport CLK_DriveMode_0_ADDR: 0x104 +BYTE CLK_DriveMode_0_ADDR; +#pragma ioport CLK_DriveMode_1_ADDR: 0x105 +BYTE CLK_DriveMode_1_ADDR; +#pragma ioport CLK_DriveMode_2_ADDR: 0x7 +BYTE CLK_DriveMode_2_ADDR; +#pragma ioport CLK_GlobalSelect_ADDR: 0x6 +BYTE CLK_GlobalSelect_ADDR; +#pragma ioport CLK_IntCtrl_0_ADDR: 0x106 +BYTE CLK_IntCtrl_0_ADDR; +#pragma ioport CLK_IntCtrl_1_ADDR: 0x107 +BYTE CLK_IntCtrl_1_ADDR; +#pragma ioport CLK_IntEn_ADDR: 0x5 +BYTE CLK_IntEn_ADDR; +#define CLK_MASK 0x80 +// LCDD4 address and mask defines +#pragma ioport LCDD4_Data_ADDR: 0x8 +BYTE LCDD4_Data_ADDR; +#pragma ioport LCDD4_DriveMode_0_ADDR: 0x108 +BYTE LCDD4_DriveMode_0_ADDR; +#pragma ioport LCDD4_DriveMode_1_ADDR: 0x109 +BYTE LCDD4_DriveMode_1_ADDR; +#pragma ioport LCDD4_DriveMode_2_ADDR: 0xb +BYTE LCDD4_DriveMode_2_ADDR; +#pragma ioport LCDD4_GlobalSelect_ADDR: 0xa +BYTE LCDD4_GlobalSelect_ADDR; +#pragma ioport LCDD4_IntCtrl_0_ADDR: 0x10a +BYTE LCDD4_IntCtrl_0_ADDR; +#pragma ioport LCDD4_IntCtrl_1_ADDR: 0x10b +BYTE LCDD4_IntCtrl_1_ADDR; +#pragma ioport LCDD4_IntEn_ADDR: 0x9 +BYTE LCDD4_IntEn_ADDR; +#define LCDD4_MASK 0x1 +// LCDD4 Shadow defines +// LCDD4_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD4_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD4_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD4_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD4_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD4_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD5 address and mask defines +#pragma ioport LCDD5_Data_ADDR: 0x8 +BYTE LCDD5_Data_ADDR; +#pragma ioport LCDD5_DriveMode_0_ADDR: 0x108 +BYTE LCDD5_DriveMode_0_ADDR; +#pragma ioport LCDD5_DriveMode_1_ADDR: 0x109 +BYTE LCDD5_DriveMode_1_ADDR; +#pragma ioport LCDD5_DriveMode_2_ADDR: 0xb +BYTE LCDD5_DriveMode_2_ADDR; +#pragma ioport LCDD5_GlobalSelect_ADDR: 0xa +BYTE LCDD5_GlobalSelect_ADDR; +#pragma ioport LCDD5_IntCtrl_0_ADDR: 0x10a +BYTE LCDD5_IntCtrl_0_ADDR; +#pragma ioport LCDD5_IntCtrl_1_ADDR: 0x10b +BYTE LCDD5_IntCtrl_1_ADDR; +#pragma ioport LCDD5_IntEn_ADDR: 0x9 +BYTE LCDD5_IntEn_ADDR; +#define LCDD5_MASK 0x2 +// LCDD5 Shadow defines +// LCDD5_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD5_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD5_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD5_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD5_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD5_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD6 address and mask defines +#pragma ioport LCDD6_Data_ADDR: 0x8 +BYTE LCDD6_Data_ADDR; +#pragma ioport LCDD6_DriveMode_0_ADDR: 0x108 +BYTE LCDD6_DriveMode_0_ADDR; +#pragma ioport LCDD6_DriveMode_1_ADDR: 0x109 +BYTE LCDD6_DriveMode_1_ADDR; +#pragma ioport LCDD6_DriveMode_2_ADDR: 0xb +BYTE LCDD6_DriveMode_2_ADDR; +#pragma ioport LCDD6_GlobalSelect_ADDR: 0xa +BYTE LCDD6_GlobalSelect_ADDR; +#pragma ioport LCDD6_IntCtrl_0_ADDR: 0x10a +BYTE LCDD6_IntCtrl_0_ADDR; +#pragma ioport LCDD6_IntCtrl_1_ADDR: 0x10b +BYTE LCDD6_IntCtrl_1_ADDR; +#pragma ioport LCDD6_IntEn_ADDR: 0x9 +BYTE LCDD6_IntEn_ADDR; +#define LCDD6_MASK 0x4 +// LCDD6 Shadow defines +// LCDD6_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD6_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD6_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD6_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD6_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD6_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD7 address and mask defines +#pragma ioport LCDD7_Data_ADDR: 0x8 +BYTE LCDD7_Data_ADDR; +#pragma ioport LCDD7_DriveMode_0_ADDR: 0x108 +BYTE LCDD7_DriveMode_0_ADDR; +#pragma ioport LCDD7_DriveMode_1_ADDR: 0x109 +BYTE LCDD7_DriveMode_1_ADDR; +#pragma ioport LCDD7_DriveMode_2_ADDR: 0xb +BYTE LCDD7_DriveMode_2_ADDR; +#pragma ioport LCDD7_GlobalSelect_ADDR: 0xa +BYTE LCDD7_GlobalSelect_ADDR; +#pragma ioport LCDD7_IntCtrl_0_ADDR: 0x10a +BYTE LCDD7_IntCtrl_0_ADDR; +#pragma ioport LCDD7_IntCtrl_1_ADDR: 0x10b +BYTE LCDD7_IntCtrl_1_ADDR; +#pragma ioport LCDD7_IntEn_ADDR: 0x9 +BYTE LCDD7_IntEn_ADDR; +#define LCDD7_MASK 0x8 +// LCDD7 Shadow defines +// LCDD7_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD7_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD7_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD7_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD7_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD7_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDE address and mask defines +#pragma ioport LCDE_Data_ADDR: 0x8 +BYTE LCDE_Data_ADDR; +#pragma ioport LCDE_DriveMode_0_ADDR: 0x108 +BYTE LCDE_DriveMode_0_ADDR; +#pragma ioport LCDE_DriveMode_1_ADDR: 0x109 +BYTE LCDE_DriveMode_1_ADDR; +#pragma ioport LCDE_DriveMode_2_ADDR: 0xb +BYTE LCDE_DriveMode_2_ADDR; +#pragma ioport LCDE_GlobalSelect_ADDR: 0xa +BYTE LCDE_GlobalSelect_ADDR; +#pragma ioport LCDE_IntCtrl_0_ADDR: 0x10a +BYTE LCDE_IntCtrl_0_ADDR; +#pragma ioport LCDE_IntCtrl_1_ADDR: 0x10b +BYTE LCDE_IntCtrl_1_ADDR; +#pragma ioport LCDE_IntEn_ADDR: 0x9 +BYTE LCDE_IntEn_ADDR; +#define LCDE_MASK 0x10 +// LCDE Shadow defines +// LCDE_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDE_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDE_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDE_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDE_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDE_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRS address and mask defines +#pragma ioport LCDRS_Data_ADDR: 0x8 +BYTE LCDRS_Data_ADDR; +#pragma ioport LCDRS_DriveMode_0_ADDR: 0x108 +BYTE LCDRS_DriveMode_0_ADDR; +#pragma ioport LCDRS_DriveMode_1_ADDR: 0x109 +BYTE LCDRS_DriveMode_1_ADDR; +#pragma ioport LCDRS_DriveMode_2_ADDR: 0xb +BYTE LCDRS_DriveMode_2_ADDR; +#pragma ioport LCDRS_GlobalSelect_ADDR: 0xa +BYTE LCDRS_GlobalSelect_ADDR; +#pragma ioport LCDRS_IntCtrl_0_ADDR: 0x10a +BYTE LCDRS_IntCtrl_0_ADDR; +#pragma ioport LCDRS_IntCtrl_1_ADDR: 0x10b +BYTE LCDRS_IntCtrl_1_ADDR; +#pragma ioport LCDRS_IntEn_ADDR: 0x9 +BYTE LCDRS_IntEn_ADDR; +#define LCDRS_MASK 0x20 +// LCDRS Shadow defines +// LCDRS_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRS_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRS_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRS_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRS_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRS_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRW address and mask defines +#pragma ioport LCDRW_Data_ADDR: 0x8 +BYTE LCDRW_Data_ADDR; +#pragma ioport LCDRW_DriveMode_0_ADDR: 0x108 +BYTE LCDRW_DriveMode_0_ADDR; +#pragma ioport LCDRW_DriveMode_1_ADDR: 0x109 +BYTE LCDRW_DriveMode_1_ADDR; +#pragma ioport LCDRW_DriveMode_2_ADDR: 0xb +BYTE LCDRW_DriveMode_2_ADDR; +#pragma ioport LCDRW_GlobalSelect_ADDR: 0xa +BYTE LCDRW_GlobalSelect_ADDR; +#pragma ioport LCDRW_IntCtrl_0_ADDR: 0x10a +BYTE LCDRW_IntCtrl_0_ADDR; +#pragma ioport LCDRW_IntCtrl_1_ADDR: 0x10b +BYTE LCDRW_IntCtrl_1_ADDR; +#pragma ioport LCDRW_IntEn_ADDR: 0x9 +BYTE LCDRW_IntEn_ADDR; +#define LCDRW_MASK 0x40 +// LCDRW Shadow defines +// LCDRW_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRW_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRW_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRW_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRW_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRW_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// MISO address and mask defines +#pragma ioport MISO_Data_ADDR: 0x8 +BYTE MISO_Data_ADDR; +#pragma ioport MISO_DriveMode_0_ADDR: 0x108 +BYTE MISO_DriveMode_0_ADDR; +#pragma ioport MISO_DriveMode_1_ADDR: 0x109 +BYTE MISO_DriveMode_1_ADDR; +#pragma ioport MISO_DriveMode_2_ADDR: 0xb +BYTE MISO_DriveMode_2_ADDR; +#pragma ioport MISO_GlobalSelect_ADDR: 0xa +BYTE MISO_GlobalSelect_ADDR; +#pragma ioport MISO_IntCtrl_0_ADDR: 0x10a +BYTE MISO_IntCtrl_0_ADDR; +#pragma ioport MISO_IntCtrl_1_ADDR: 0x10b +BYTE MISO_IntCtrl_1_ADDR; +#pragma ioport MISO_IntEn_ADDR: 0x9 +BYTE MISO_IntEn_ADDR; +#define MISO_MASK 0x80 +// MISO Shadow defines +// MISO_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define MISO_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// MISO_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define MISO_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// MISO_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define MISO_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.inc new file mode 100644 index 0000000..cb3be5c --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/psocgpioint.inc @@ -0,0 +1,578 @@ +; Generated by PSoC Designer 5.4.3191 +; +; AnalogOutBuf_0 address and mask equates +AnalogOutBuf_0_Data_ADDR: equ 0h +AnalogOutBuf_0_DriveMode_0_ADDR: equ 100h +AnalogOutBuf_0_DriveMode_1_ADDR: equ 101h +AnalogOutBuf_0_DriveMode_2_ADDR: equ 3h +AnalogOutBuf_0_GlobalSelect_ADDR: equ 2h +AnalogOutBuf_0_IntCtrl_0_ADDR: equ 102h +AnalogOutBuf_0_IntCtrl_1_ADDR: equ 103h +AnalogOutBuf_0_IntEn_ADDR: equ 1h +AnalogOutBuf_0_MASK: equ 8h +; AnalogOutBuf_1 address and mask equates +AnalogOutBuf_1_Data_ADDR: equ 0h +AnalogOutBuf_1_DriveMode_0_ADDR: equ 100h +AnalogOutBuf_1_DriveMode_1_ADDR: equ 101h +AnalogOutBuf_1_DriveMode_2_ADDR: equ 3h +AnalogOutBuf_1_GlobalSelect_ADDR: equ 2h +AnalogOutBuf_1_IntCtrl_0_ADDR: equ 102h +AnalogOutBuf_1_IntCtrl_1_ADDR: equ 103h +AnalogOutBuf_1_IntEn_ADDR: equ 1h +AnalogOutBuf_1_MASK: equ 20h +; CS address and mask equates +CS_Data_ADDR: equ 4h +CS_DriveMode_0_ADDR: equ 104h +CS_DriveMode_1_ADDR: equ 105h +CS_DriveMode_2_ADDR: equ 7h +CS_GlobalSelect_ADDR: equ 6h +CS_IntCtrl_0_ADDR: equ 106h +CS_IntCtrl_1_ADDR: equ 107h +CS_IntEn_ADDR: equ 5h +CS_MASK: equ 8h +; CLK address and mask equates +CLK_Data_ADDR: equ 4h +CLK_DriveMode_0_ADDR: equ 104h +CLK_DriveMode_1_ADDR: equ 105h +CLK_DriveMode_2_ADDR: equ 7h +CLK_GlobalSelect_ADDR: equ 6h +CLK_IntCtrl_0_ADDR: equ 106h +CLK_IntCtrl_1_ADDR: equ 107h +CLK_IntEn_ADDR: equ 5h +CLK_MASK: equ 80h +; LCDD4 address and mask equates +LCDD4_Data_ADDR: equ 8h +LCDD4_DriveMode_0_ADDR: equ 108h +LCDD4_DriveMode_1_ADDR: equ 109h +LCDD4_DriveMode_2_ADDR: equ bh +LCDD4_GlobalSelect_ADDR: equ ah +LCDD4_IntCtrl_0_ADDR: equ 10ah +LCDD4_IntCtrl_1_ADDR: equ 10bh +LCDD4_IntEn_ADDR: equ 9h +LCDD4_MASK: equ 1h +; LCDD4_Data access macros +; GetLCDD4_Data macro, return in a +macro GetLCDD4_Data + mov a,[Port_2_Data_SHADE] + and a, 1h +endm +; SetLCDD4_Data macro +macro SetLCDD4_Data + or [Port_2_Data_SHADE], 1h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_Data macro +macro ClearLCDD4_Data + and [Port_2_Data_SHADE], ~1h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD4_DriveMode_0 access macros +; GetLCDD4_DriveMode_0 macro, return in a +macro GetLCDD4_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 1h +endm +; SetLCDD4_DriveMode_0 macro +macro SetLCDD4_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 1h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_DriveMode_0 macro +macro ClearLCDD4_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~1h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD4_DriveMode_1 access macros +; GetLCDD4_DriveMode_1 macro, return in a +macro GetLCDD4_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 1h +endm +; SetLCDD4_DriveMode_1 macro +macro SetLCDD4_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 1h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_DriveMode_1 macro +macro ClearLCDD4_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~1h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD5 address and mask equates +LCDD5_Data_ADDR: equ 8h +LCDD5_DriveMode_0_ADDR: equ 108h +LCDD5_DriveMode_1_ADDR: equ 109h +LCDD5_DriveMode_2_ADDR: equ bh +LCDD5_GlobalSelect_ADDR: equ ah +LCDD5_IntCtrl_0_ADDR: equ 10ah +LCDD5_IntCtrl_1_ADDR: equ 10bh +LCDD5_IntEn_ADDR: equ 9h +LCDD5_MASK: equ 2h +; LCDD5_Data access macros +; GetLCDD5_Data macro, return in a +macro GetLCDD5_Data + mov a,[Port_2_Data_SHADE] + and a, 2h +endm +; SetLCDD5_Data macro +macro SetLCDD5_Data + or [Port_2_Data_SHADE], 2h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_Data macro +macro ClearLCDD5_Data + and [Port_2_Data_SHADE], ~2h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD5_DriveMode_0 access macros +; GetLCDD5_DriveMode_0 macro, return in a +macro GetLCDD5_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 2h +endm +; SetLCDD5_DriveMode_0 macro +macro SetLCDD5_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 2h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_DriveMode_0 macro +macro ClearLCDD5_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~2h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD5_DriveMode_1 access macros +; GetLCDD5_DriveMode_1 macro, return in a +macro GetLCDD5_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 2h +endm +; SetLCDD5_DriveMode_1 macro +macro SetLCDD5_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 2h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_DriveMode_1 macro +macro ClearLCDD5_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~2h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD6 address and mask equates +LCDD6_Data_ADDR: equ 8h +LCDD6_DriveMode_0_ADDR: equ 108h +LCDD6_DriveMode_1_ADDR: equ 109h +LCDD6_DriveMode_2_ADDR: equ bh +LCDD6_GlobalSelect_ADDR: equ ah +LCDD6_IntCtrl_0_ADDR: equ 10ah +LCDD6_IntCtrl_1_ADDR: equ 10bh +LCDD6_IntEn_ADDR: equ 9h +LCDD6_MASK: equ 4h +; LCDD6_Data access macros +; GetLCDD6_Data macro, return in a +macro GetLCDD6_Data + mov a,[Port_2_Data_SHADE] + and a, 4h +endm +; SetLCDD6_Data macro +macro SetLCDD6_Data + or [Port_2_Data_SHADE], 4h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_Data macro +macro ClearLCDD6_Data + and [Port_2_Data_SHADE], ~4h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD6_DriveMode_0 access macros +; GetLCDD6_DriveMode_0 macro, return in a +macro GetLCDD6_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 4h +endm +; SetLCDD6_DriveMode_0 macro +macro SetLCDD6_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 4h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_DriveMode_0 macro +macro ClearLCDD6_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~4h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD6_DriveMode_1 access macros +; GetLCDD6_DriveMode_1 macro, return in a +macro GetLCDD6_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 4h +endm +; SetLCDD6_DriveMode_1 macro +macro SetLCDD6_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 4h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_DriveMode_1 macro +macro ClearLCDD6_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~4h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD7 address and mask equates +LCDD7_Data_ADDR: equ 8h +LCDD7_DriveMode_0_ADDR: equ 108h +LCDD7_DriveMode_1_ADDR: equ 109h +LCDD7_DriveMode_2_ADDR: equ bh +LCDD7_GlobalSelect_ADDR: equ ah +LCDD7_IntCtrl_0_ADDR: equ 10ah +LCDD7_IntCtrl_1_ADDR: equ 10bh +LCDD7_IntEn_ADDR: equ 9h +LCDD7_MASK: equ 8h +; LCDD7_Data access macros +; GetLCDD7_Data macro, return in a +macro GetLCDD7_Data + mov a,[Port_2_Data_SHADE] + and a, 8h +endm +; SetLCDD7_Data macro +macro SetLCDD7_Data + or [Port_2_Data_SHADE], 8h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_Data macro +macro ClearLCDD7_Data + and [Port_2_Data_SHADE], ~8h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDD7_DriveMode_0 access macros +; GetLCDD7_DriveMode_0 macro, return in a +macro GetLCDD7_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 8h +endm +; SetLCDD7_DriveMode_0 macro +macro SetLCDD7_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 8h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_DriveMode_0 macro +macro ClearLCDD7_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~8h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDD7_DriveMode_1 access macros +; GetLCDD7_DriveMode_1 macro, return in a +macro GetLCDD7_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 8h +endm +; SetLCDD7_DriveMode_1 macro +macro SetLCDD7_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 8h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_DriveMode_1 macro +macro ClearLCDD7_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~8h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDE address and mask equates +LCDE_Data_ADDR: equ 8h +LCDE_DriveMode_0_ADDR: equ 108h +LCDE_DriveMode_1_ADDR: equ 109h +LCDE_DriveMode_2_ADDR: equ bh +LCDE_GlobalSelect_ADDR: equ ah +LCDE_IntCtrl_0_ADDR: equ 10ah +LCDE_IntCtrl_1_ADDR: equ 10bh +LCDE_IntEn_ADDR: equ 9h +LCDE_MASK: equ 10h +; LCDE_Data access macros +; GetLCDE_Data macro, return in a +macro GetLCDE_Data + mov a,[Port_2_Data_SHADE] + and a, 10h +endm +; SetLCDE_Data macro +macro SetLCDE_Data + or [Port_2_Data_SHADE], 10h + mov a, [Port_2_Data_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_Data macro +macro ClearLCDE_Data + and [Port_2_Data_SHADE], ~10h + mov a, [Port_2_Data_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDE_DriveMode_0 access macros +; GetLCDE_DriveMode_0 macro, return in a +macro GetLCDE_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 10h +endm +; SetLCDE_DriveMode_0 macro +macro SetLCDE_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 10h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_DriveMode_0 macro +macro ClearLCDE_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~10h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDE_DriveMode_1 access macros +; GetLCDE_DriveMode_1 macro, return in a +macro GetLCDE_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 10h +endm +; SetLCDE_DriveMode_1 macro +macro SetLCDE_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 10h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_DriveMode_1 macro +macro ClearLCDE_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~10h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDRS address and mask equates +LCDRS_Data_ADDR: equ 8h +LCDRS_DriveMode_0_ADDR: equ 108h +LCDRS_DriveMode_1_ADDR: equ 109h +LCDRS_DriveMode_2_ADDR: equ bh +LCDRS_GlobalSelect_ADDR: equ ah +LCDRS_IntCtrl_0_ADDR: equ 10ah +LCDRS_IntCtrl_1_ADDR: equ 10bh +LCDRS_IntEn_ADDR: equ 9h +LCDRS_MASK: equ 20h +; LCDRS_Data access macros +; GetLCDRS_Data macro, return in a +macro GetLCDRS_Data + mov a,[Port_2_Data_SHADE] + and a, 20h +endm +; SetLCDRS_Data macro +macro SetLCDRS_Data + or [Port_2_Data_SHADE], 20h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_Data macro +macro ClearLCDRS_Data + and [Port_2_Data_SHADE], ~20h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRS_DriveMode_0 access macros +; GetLCDRS_DriveMode_0 macro, return in a +macro GetLCDRS_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 20h +endm +; SetLCDRS_DriveMode_0 macro +macro SetLCDRS_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 20h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_DriveMode_0 macro +macro ClearLCDRS_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~20h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRS_DriveMode_1 access macros +; GetLCDRS_DriveMode_1 macro, return in a +macro GetLCDRS_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 20h +endm +; SetLCDRS_DriveMode_1 macro +macro SetLCDRS_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 20h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_DriveMode_1 macro +macro ClearLCDRS_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~20h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRW address and mask equates +LCDRW_Data_ADDR: equ 8h +LCDRW_DriveMode_0_ADDR: equ 108h +LCDRW_DriveMode_1_ADDR: equ 109h +LCDRW_DriveMode_2_ADDR: equ bh +LCDRW_GlobalSelect_ADDR: equ ah +LCDRW_IntCtrl_0_ADDR: equ 10ah +LCDRW_IntCtrl_1_ADDR: equ 10bh +LCDRW_IntEn_ADDR: equ 9h +LCDRW_MASK: equ 40h +; LCDRW_Data access macros +; GetLCDRW_Data macro, return in a +macro GetLCDRW_Data + mov a,[Port_2_Data_SHADE] + and a, 40h +endm +; SetLCDRW_Data macro +macro SetLCDRW_Data + or [Port_2_Data_SHADE], 40h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_Data macro +macro ClearLCDRW_Data + and [Port_2_Data_SHADE], ~40h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; LCDRW_DriveMode_0 access macros +; GetLCDRW_DriveMode_0 macro, return in a +macro GetLCDRW_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 40h +endm +; SetLCDRW_DriveMode_0 macro +macro SetLCDRW_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 40h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_DriveMode_0 macro +macro ClearLCDRW_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~40h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; LCDRW_DriveMode_1 access macros +; GetLCDRW_DriveMode_1 macro, return in a +macro GetLCDRW_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 40h +endm +; SetLCDRW_DriveMode_1 macro +macro SetLCDRW_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 40h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_DriveMode_1 macro +macro ClearLCDRW_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~40h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; MISO address and mask equates +MISO_Data_ADDR: equ 8h +MISO_DriveMode_0_ADDR: equ 108h +MISO_DriveMode_1_ADDR: equ 109h +MISO_DriveMode_2_ADDR: equ bh +MISO_GlobalSelect_ADDR: equ ah +MISO_IntCtrl_0_ADDR: equ 10ah +MISO_IntCtrl_1_ADDR: equ 10bh +MISO_IntEn_ADDR: equ 9h +MISO_MASK: equ 80h +; MISO_Data access macros +; GetMISO_Data macro, return in a +macro GetMISO_Data + mov a,[Port_2_Data_SHADE] + and a, 80h +endm +; SetMISO_Data macro +macro SetMISO_Data + or [Port_2_Data_SHADE], 80h + mov a, [Port_2_Data_SHADE] + mov reg[MISO_Data_ADDR], a +endm +; ClearMISO_Data macro +macro ClearMISO_Data + and [Port_2_Data_SHADE], ~80h + mov a, [Port_2_Data_SHADE] + mov reg[MISO_Data_ADDR], a +endm + +; MISO_DriveMode_0 access macros +; GetMISO_DriveMode_0 macro, return in a +macro GetMISO_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 80h +endm +; SetMISO_DriveMode_0 macro +macro SetMISO_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 80h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[MISO_Data_ADDR], a +endm +; ClearMISO_DriveMode_0 macro +macro ClearMISO_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~80h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[MISO_Data_ADDR], a +endm + +; MISO_DriveMode_1 access macros +; GetMISO_DriveMode_1 macro, return in a +macro GetMISO_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 80h +endm +; SetMISO_DriveMode_1 macro +macro SetMISO_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 80h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[MISO_Data_ADDR], a +endm +; ClearMISO_DriveMode_1 macro +macro ClearMISO_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~80h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[MISO_Data_ADDR], a +endm + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.asm new file mode 100644 index 0000000..7cb2f53 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Heater_EnableInt +export _PWM8_Heater_EnableInt +export PWM8_Heater_DisableInt +export _PWM8_Heater_DisableInt +export PWM8_Heater_Start +export _PWM8_Heater_Start +export PWM8_Heater_Stop +export _PWM8_Heater_Stop +export PWM8_Heater_WritePeriod +export _PWM8_Heater_WritePeriod +export PWM8_Heater_WritePulseWidth +export _PWM8_Heater_WritePulseWidth +export PWM8_Heater_bReadPulseWidth +export _PWM8_Heater_bReadPulseWidth +export PWM8_Heater_bReadCounter +export _PWM8_Heater_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Heater_ReadPulseWidth ; deprecated +export _bPWM8_Heater_ReadPulseWidth ; deprecated +export bPWM8_Heater_ReadCounter ; deprecated +export _bPWM8_Heater_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_EnableInt: +_PWM8_Heater_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_DisableInt: +_PWM8_Heater_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Start: +_PWM8_Heater_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Stop: +_PWM8_Heater_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePeriod: +_PWM8_Heater_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePulseWidth: +_PWM8_Heater_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadPulseWidth: +_PWM8_Heater_bReadPulseWidth: + bPWM8_Heater_ReadPulseWidth: ; this name deprecated +_bPWM8_Heater_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Heater_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadCounter: +_PWM8_Heater_bReadCounter: + bPWM8_Heater_ReadCounter: ; this name deprecated +_bPWM8_Heater_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Heater_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Heater_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Heater_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Heater_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Heater_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Heater_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Heater_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Heater_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Heater_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Heater.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.h new file mode 100644 index 0000000..025a621 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Heater.h +// Version: 2.60, Updated on 2015/3/4 at 22:26:52 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Heater_INCLUDE +#define PWM8_Heater_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 PWM8_Heater_EnableInt +#pragma fastcall16 PWM8_Heater_DisableInt +#pragma fastcall16 PWM8_Heater_Start +#pragma fastcall16 PWM8_Heater_Stop +#pragma fastcall16 PWM8_Heater_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Heater_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Heater_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Heater_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Heater_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Heater_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Heater API. +//------------------------------------------------- + +extern void PWM8_Heater_EnableInt(void); // Proxy Class 1 +extern void PWM8_Heater_DisableInt(void); // Proxy Class 1 +extern void PWM8_Heater_Start(void); // Proxy Class 1 +extern void PWM8_Heater_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Heater_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Heater_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Heater_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Heater_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Heater API's. +//-------------------------------------------------- + +#define PWM8_Heater_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Heater_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Heater_INT_MASK ( 0x02 ) + + +//-------------------------------------------------- +// Constants for PWM8_Heater user defined values +//-------------------------------------------------- + +#define PWM8_Heater_PERIOD ( 0xff ) +#define PWM8_Heater_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Heater +//------------------------------------------------- + +#pragma ioport PWM8_Heater_COUNTER_REG: 0x024 //DR0 Count register +BYTE PWM8_Heater_COUNTER_REG; +#pragma ioport PWM8_Heater_PERIOD_REG: 0x025 //DR1 Period register +BYTE PWM8_Heater_PERIOD_REG; +#pragma ioport PWM8_Heater_COMPARE_REG: 0x026 //DR2 Compare register +BYTE PWM8_Heater_COMPARE_REG; +#pragma ioport PWM8_Heater_CONTROL_REG: 0x027 //Control register +BYTE PWM8_Heater_CONTROL_REG; +#pragma ioport PWM8_Heater_FUNC_REG: 0x124 //Function register +BYTE PWM8_Heater_FUNC_REG; +#pragma ioport PWM8_Heater_INPUT_REG: 0x125 //Input register +BYTE PWM8_Heater_INPUT_REG; +#pragma ioport PWM8_Heater_OUTPUT_REG: 0x126 //Output register +BYTE PWM8_Heater_OUTPUT_REG; +#pragma ioport PWM8_Heater_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Heater_INT_REG; + + +//------------------------------------------------- +// PWM8_Heater Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Heater_Start_M \ + PWM8_Heater_CONTROL_REG |= PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_Stop_M \ + PWM8_Heater_CONTROL_REG &= ~PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_EnableInt_M \ + M8C_EnableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#define PWM8_Heater_DisableInt_M \ + M8C_DisableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#endif +// end of file PWM8_Heater.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.inc new file mode 100644 index 0000000..ecc67e8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heater.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.inc +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Heater API's. +;-------------------------------------------------- + +PWM8_Heater_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Heater_INT_REG: equ 0x0e1 +PWM8_Heater_INT_MASK: equ 0x02 + + +;-------------------------------------------------- +; Constants for PWM8_Heater user defined values +;-------------------------------------------------- + +PWM8_Heater_PERIOD: equ 0xff +PWM8_Heater_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Heater +;-------------------------------------------------- + +PWM8_Heater_COUNTER_REG: equ 0x24 ; DR0 Count register +PWM8_Heater_PERIOD_REG: equ 0x25 ; DR1 Period register +PWM8_Heater_COMPARE_REG: equ 0x26 ; DR2 Compare register +PWM8_Heater_CONTROL_REG: equ 0x27 ; Control register +PWM8_Heater_FUNC_REG: equ 0x24 ; Function register +PWM8_Heater_INPUT_REG: equ 0x25 ; Input register +PWM8_Heater_OUTPUT_REG: equ 0x26 ; Output register + + +;-------------------------------------------------- +; PWM8_Heater Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Heater_Start_M + or reg[PWM8_Heater_CONTROL_REG], PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_Stop_M + and reg[PWM8_Heater_CONTROL_REG], ~PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_EnableInt_M + M8C_EnableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + macro PWM8_Heater_DisableInt_M + M8C_DisableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + +; end of file PWM8_Heater.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heaterint.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heaterint.asm new file mode 100644 index 0000000..87fb557 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_heaterint.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_HeaterINT.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Heater_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Heater_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Heater_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_HeaterINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.asm new file mode 100644 index 0000000..d1fea45 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_NB_Out_EnableInt +export _PWM8_NB_Out_EnableInt +export PWM8_NB_Out_DisableInt +export _PWM8_NB_Out_DisableInt +export PWM8_NB_Out_Start +export _PWM8_NB_Out_Start +export PWM8_NB_Out_Stop +export _PWM8_NB_Out_Stop +export PWM8_NB_Out_WritePeriod +export _PWM8_NB_Out_WritePeriod +export PWM8_NB_Out_WritePulseWidth +export _PWM8_NB_Out_WritePulseWidth +export PWM8_NB_Out_bReadPulseWidth +export _PWM8_NB_Out_bReadPulseWidth +export PWM8_NB_Out_bReadCounter +export _PWM8_NB_Out_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_NB_Out_ReadPulseWidth ; deprecated +export _bPWM8_NB_Out_ReadPulseWidth ; deprecated +export bPWM8_NB_Out_ReadCounter ; deprecated +export _bPWM8_NB_Out_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_EnableInt: +_PWM8_NB_Out_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_DisableInt: +_PWM8_NB_Out_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Start: +_PWM8_NB_Out_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Stop: +_PWM8_NB_Out_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePeriod: +_PWM8_NB_Out_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePulseWidth: +_PWM8_NB_Out_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadPulseWidth: +_PWM8_NB_Out_bReadPulseWidth: + bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated +_bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_NB_Out_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadCounter: +_PWM8_NB_Out_bReadCounter: + bPWM8_NB_Out_ReadCounter: ; this name deprecated +_bPWM8_NB_Out_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_NB_Out_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_NB_Out_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_NB_Out_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_NB_Out_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_NB_Out_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_NB_Out_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_NB_Out_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_NB_Out.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.h new file mode 100644 index 0000000..47087f9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_NB_Out.h +// Version: 2.60, Updated on 2015/3/4 at 22:26:52 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_NB_Out_INCLUDE +#define PWM8_NB_Out_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 PWM8_NB_Out_EnableInt +#pragma fastcall16 PWM8_NB_Out_DisableInt +#pragma fastcall16 PWM8_NB_Out_Start +#pragma fastcall16 PWM8_NB_Out_Stop +#pragma fastcall16 PWM8_NB_Out_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_NB_Out_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_NB_Out_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_NB_Out_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_NB_Out_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_NB_Out_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_NB_Out API. +//------------------------------------------------- + +extern void PWM8_NB_Out_EnableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_DisableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_Start(void); // Proxy Class 1 +extern void PWM8_NB_Out_Stop(void); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadCounter(void); // Proxy Class 2 +extern void PWM8_NB_Out_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_NB_Out_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_NB_Out_ReadCounter(void); // Deprecated +extern BYTE bPWM8_NB_Out_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out API's. +//-------------------------------------------------- + +#define PWM8_NB_Out_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_NB_Out_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_NB_Out_INT_MASK ( 0x08 ) + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out user defined values +//-------------------------------------------------- + +#define PWM8_NB_Out_PERIOD ( 0xff ) +#define PWM8_NB_Out_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_NB_Out +//------------------------------------------------- + +#pragma ioport PWM8_NB_Out_COUNTER_REG: 0x02c //DR0 Count register +BYTE PWM8_NB_Out_COUNTER_REG; +#pragma ioport PWM8_NB_Out_PERIOD_REG: 0x02d //DR1 Period register +BYTE PWM8_NB_Out_PERIOD_REG; +#pragma ioport PWM8_NB_Out_COMPARE_REG: 0x02e //DR2 Compare register +BYTE PWM8_NB_Out_COMPARE_REG; +#pragma ioport PWM8_NB_Out_CONTROL_REG: 0x02f //Control register +BYTE PWM8_NB_Out_CONTROL_REG; +#pragma ioport PWM8_NB_Out_FUNC_REG: 0x12c //Function register +BYTE PWM8_NB_Out_FUNC_REG; +#pragma ioport PWM8_NB_Out_INPUT_REG: 0x12d //Input register +BYTE PWM8_NB_Out_INPUT_REG; +#pragma ioport PWM8_NB_Out_OUTPUT_REG: 0x12e //Output register +BYTE PWM8_NB_Out_OUTPUT_REG; +#pragma ioport PWM8_NB_Out_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_NB_Out_INT_REG; + + +//------------------------------------------------- +// PWM8_NB_Out Macro 'Functions' +//------------------------------------------------- + +#define PWM8_NB_Out_Start_M \ + PWM8_NB_Out_CONTROL_REG |= PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_Stop_M \ + PWM8_NB_Out_CONTROL_REG &= ~PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_EnableInt_M \ + M8C_EnableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#define PWM8_NB_Out_DisableInt_M \ + M8C_DisableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#endif +// end of file PWM8_NB_Out.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.inc new file mode 100644 index 0000000..71ffe9e --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_out.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.inc +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out API's. +;-------------------------------------------------- + +PWM8_NB_Out_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_NB_Out_INT_REG: equ 0x0e1 +PWM8_NB_Out_INT_MASK: equ 0x08 + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out user defined values +;-------------------------------------------------- + +PWM8_NB_Out_PERIOD: equ 0xff +PWM8_NB_Out_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_NB_Out +;-------------------------------------------------- + +PWM8_NB_Out_COUNTER_REG: equ 0x2c ; DR0 Count register +PWM8_NB_Out_PERIOD_REG: equ 0x2d ; DR1 Period register +PWM8_NB_Out_COMPARE_REG: equ 0x2e ; DR2 Compare register +PWM8_NB_Out_CONTROL_REG: equ 0x2f ; Control register +PWM8_NB_Out_FUNC_REG: equ 0x2c ; Function register +PWM8_NB_Out_INPUT_REG: equ 0x2d ; Input register +PWM8_NB_Out_OUTPUT_REG: equ 0x2e ; Output register + + +;-------------------------------------------------- +; PWM8_NB_Out Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_NB_Out_Start_M + or reg[PWM8_NB_Out_CONTROL_REG], PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_Stop_M + and reg[PWM8_NB_Out_CONTROL_REG], ~PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_EnableInt_M + M8C_EnableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + macro PWM8_NB_Out_DisableInt_M + M8C_DisableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + +; end of file PWM8_NB_Out.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_outint.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_outint.asm new file mode 100644 index 0000000..876acb1 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_nb_outint.asm @@ -0,0 +1,93 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_OutINT.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_NB_Out_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_NB_Out_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_NB_Out_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom assembly code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom assembly code above this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert a lcall to a C function below this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + + ;PRESERVE_CPU_CONTEXT + ;lcall _My_C_Function + ;RESTORE_CPU_CONTEXT + + ;--------------------------------------------------- + ; Insert a lcall to a C function above this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_NB_OutINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.asm new file mode 100644 index 0000000..5825a72 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Vout_EnableInt +export _PWM8_Vout_EnableInt +export PWM8_Vout_DisableInt +export _PWM8_Vout_DisableInt +export PWM8_Vout_Start +export _PWM8_Vout_Start +export PWM8_Vout_Stop +export _PWM8_Vout_Stop +export PWM8_Vout_WritePeriod +export _PWM8_Vout_WritePeriod +export PWM8_Vout_WritePulseWidth +export _PWM8_Vout_WritePulseWidth +export PWM8_Vout_bReadPulseWidth +export _PWM8_Vout_bReadPulseWidth +export PWM8_Vout_bReadCounter +export _PWM8_Vout_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Vout_ReadPulseWidth ; deprecated +export _bPWM8_Vout_ReadPulseWidth ; deprecated +export bPWM8_Vout_ReadCounter ; deprecated +export _bPWM8_Vout_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_EnableInt: +_PWM8_Vout_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_DisableInt: +_PWM8_Vout_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Start: +_PWM8_Vout_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Stop: +_PWM8_Vout_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePeriod: +_PWM8_Vout_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePulseWidth: +_PWM8_Vout_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadPulseWidth: +_PWM8_Vout_bReadPulseWidth: + bPWM8_Vout_ReadPulseWidth: ; this name deprecated +_bPWM8_Vout_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Vout_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadCounter: +_PWM8_Vout_bReadCounter: + bPWM8_Vout_ReadCounter: ; this name deprecated +_bPWM8_Vout_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Vout_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Vout_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Vout_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Vout_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Vout_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Vout_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Vout_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Vout_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Vout_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Vout.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.h new file mode 100644 index 0000000..22f5da4 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Vout.h +// Version: 2.60, Updated on 2015/3/4 at 22:26:52 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Vout_INCLUDE +#define PWM8_Vout_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 PWM8_Vout_EnableInt +#pragma fastcall16 PWM8_Vout_DisableInt +#pragma fastcall16 PWM8_Vout_Start +#pragma fastcall16 PWM8_Vout_Stop +#pragma fastcall16 PWM8_Vout_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Vout_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Vout_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Vout_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Vout_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Vout_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Vout API. +//------------------------------------------------- + +extern void PWM8_Vout_EnableInt(void); // Proxy Class 1 +extern void PWM8_Vout_DisableInt(void); // Proxy Class 1 +extern void PWM8_Vout_Start(void); // Proxy Class 1 +extern void PWM8_Vout_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Vout_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Vout_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Vout_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Vout_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Vout API's. +//-------------------------------------------------- + +#define PWM8_Vout_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Vout_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Vout_INT_MASK ( 0x04 ) + + +//-------------------------------------------------- +// Constants for PWM8_Vout user defined values +//-------------------------------------------------- + +#define PWM8_Vout_PERIOD ( 0xff ) +#define PWM8_Vout_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Vout +//------------------------------------------------- + +#pragma ioport PWM8_Vout_COUNTER_REG: 0x028 //DR0 Count register +BYTE PWM8_Vout_COUNTER_REG; +#pragma ioport PWM8_Vout_PERIOD_REG: 0x029 //DR1 Period register +BYTE PWM8_Vout_PERIOD_REG; +#pragma ioport PWM8_Vout_COMPARE_REG: 0x02a //DR2 Compare register +BYTE PWM8_Vout_COMPARE_REG; +#pragma ioport PWM8_Vout_CONTROL_REG: 0x02b //Control register +BYTE PWM8_Vout_CONTROL_REG; +#pragma ioport PWM8_Vout_FUNC_REG: 0x128 //Function register +BYTE PWM8_Vout_FUNC_REG; +#pragma ioport PWM8_Vout_INPUT_REG: 0x129 //Input register +BYTE PWM8_Vout_INPUT_REG; +#pragma ioport PWM8_Vout_OUTPUT_REG: 0x12a //Output register +BYTE PWM8_Vout_OUTPUT_REG; +#pragma ioport PWM8_Vout_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Vout_INT_REG; + + +//------------------------------------------------- +// PWM8_Vout Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Vout_Start_M \ + PWM8_Vout_CONTROL_REG |= PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_Stop_M \ + PWM8_Vout_CONTROL_REG &= ~PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_EnableInt_M \ + M8C_EnableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#define PWM8_Vout_DisableInt_M \ + M8C_DisableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#endif +// end of file PWM8_Vout.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.inc new file mode 100644 index 0000000..8187a55 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_vout.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.inc +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Vout API's. +;-------------------------------------------------- + +PWM8_Vout_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Vout_INT_REG: equ 0x0e1 +PWM8_Vout_INT_MASK: equ 0x04 + + +;-------------------------------------------------- +; Constants for PWM8_Vout user defined values +;-------------------------------------------------- + +PWM8_Vout_PERIOD: equ 0xff +PWM8_Vout_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Vout +;-------------------------------------------------- + +PWM8_Vout_COUNTER_REG: equ 0x28 ; DR0 Count register +PWM8_Vout_PERIOD_REG: equ 0x29 ; DR1 Period register +PWM8_Vout_COMPARE_REG: equ 0x2a ; DR2 Compare register +PWM8_Vout_CONTROL_REG: equ 0x2b ; Control register +PWM8_Vout_FUNC_REG: equ 0x28 ; Function register +PWM8_Vout_INPUT_REG: equ 0x29 ; Input register +PWM8_Vout_OUTPUT_REG: equ 0x2a ; Output register + + +;-------------------------------------------------- +; PWM8_Vout Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Vout_Start_M + or reg[PWM8_Vout_CONTROL_REG], PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_Stop_M + and reg[PWM8_Vout_CONTROL_REG], ~PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_EnableInt_M + M8C_EnableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + macro PWM8_Vout_DisableInt_M + M8C_DisableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + +; end of file PWM8_Vout.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_voutint.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_voutint.asm new file mode 100644 index 0000000..cf22c21 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/pwm8_voutint.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_VoutINT.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Vout_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Vout_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Vout_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_VoutINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.asm new file mode 100644 index 0000000..d36656d --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.asm @@ -0,0 +1,594 @@ +;;***************************************************************************** +;;***************************************************************************** +;; Filename: SleepTimer.asm +;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: SleepTimer User Module software implementation file for the +;; 22/24/27/29xxx families. +;; +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "m8c.inc" +include "memory.inc" +include "SleepTimer.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +;------------------------------------------------------------------- +; Declare the functions global for both assembler and C compiler. +; +; Note that there are two names for each API. First name is +; assembler reference. Name with underscore is name reference for +; C compiler. Calling function in C source code does not require +; the underscore. +;------------------------------------------------------------------- +export SleepTimer_EnableInt +export _SleepTimer_EnableInt +export SleepTimer_DisableInt +export _SleepTimer_DisableInt + +export SleepTimer_Start +export _SleepTimer_Start +export SleepTimer_Stop +export _SleepTimer_Stop + +export SleepTimer_TickWait +export _SleepTimer_TickWait + +export SleepTimer_SyncWait +export _SleepTimer_SyncWait + +export SleepTimer_SetInterval +export _SleepTimer_SetInterval + +export SleepTimer_bGetTickCntr +export _SleepTimer_bGetTickCntr + +export SleepTimer_SetTimer +export _SleepTimer_SetTimer + +export SleepTimer_bGetTimer +export _SleepTimer_bGetTimer + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +export SleepTimer_iGetTickCntr +export _SleepTimer_iGetTickCntr +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +export SleepTimer_lGetTickCntr +export _SleepTimer_lGetTickCntr +ENDIF + + +area text (ROM,REL) + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +; Counter LSB Offset if 4 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 4) +ST_LSB_OFFSET: equ 3 +ENDIF + +; Counter LSB Offset if 2 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 2) +ST_LSB_OFFSET: equ 1 +ENDIF + +; Counter LSB Offset if 1 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 1) +ST_LSB_OFFSET: equ 0 +ENDIF + + +area UserModules (ROM, REL, CON) + +;============================================================================= +;============================================================================= +; +; Low-Level Commands +; +;============================================================================= +;============================================================================= + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_EnableInt +; +; DESCRIPTION: +; Enables SleepTimer interrupts. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_EnableInt: +_SleepTimer_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_DisableInt +; +; DESCRIPTION: +; Disables the sleep timer. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_DisableInt: +_SleepTimer_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Start() +; +; DESCRIPTION: +; Clears all the variables. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Start: +_SleepTimer_Start: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov A,0 + mov [SleepTimer_fTick],A + mov [SleepTimer_bTimerValue],A + mov [SleepTimer_bCountDown],A + mov [SleepTimer_TickCount + ST_LSB_OFFSET],A ; Clear TickCount[0:7] +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 1],A ; Clear TickCount[8:15] +ENDIF + + +IF(SleepTimer_TICK_CNTR_SIZE & 4) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 2],A ; Clear TickCount[16:31] + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 3],A +ENDIF + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here as a place +; holder. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Stop: +_SleepTimer_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetInterval +; +; DESCRIPTION: +; Sets sleep timer interval +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Timer setting +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetInterval: +_SleepTimer_SetInterval: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,SleepTimer_CLOCK_MASK ; Mask off invalid data + mov X, SP + push A + M8C_SetBank1 + mov A, reg[OSC_CR0] ; Get current timer value + and A,~SleepTimer_CLOCK_MASK ; Zero out old timer value + or A, [X] ; Set new timer values + mov reg[OSC_CR0],A ; Write it + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_TickWait(BYTE bTicks) +; +; DESCRIPTION: +; Wait X Ticks and return +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Count down time +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_TickWait: +_SleepTimer_TickWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + +.WaitTick: + tst [SleepTimer_fTick],0xFF ; Check for tick + jz .WaitTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + dec A ; Dec the timer variable + jnz .WaitTick ; Loop until we count down to zero + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SyncWait(BYTE bCounts, BYTE fMode) +; +; DESCRIPTION: +; This function resets the SyncWait timer. If fMode = 0, the timer +; is set to the new value then exits the function immediatly. If fMode +; is set to 1, the firmware waits for the timer to expire before the +; timer is reset and and exits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= tCounts to wait +; X <= fMode fMode = 0 Just reload the value, do not wait +; fMode = 1 Wait for last value to count down to zero +; then reload. +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SyncWait: +_SleepTimer_SyncWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_bCountDown + swap A,X + AND A,SleepTimer_FORCE_RELOAD + jnz .ReloadIt + +.WaitLoop: + tst [SleepTimer_bCountDown],0xFF + jnz .WaitLoop + + +.ReloadIt: + swap A,X + mov [SleepTimer_bCountDown],A + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTickCntr +; +; DESCRIPTION: +; Returns the LSB of the tick Counter +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; LSB of lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTickCntr: +_SleepTimer_bGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetTimer +; +; DESCRIPTION: +; Set timer with parameter in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Value used to set Timer value +; +; RETURNS: +; None +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetTimer: +_SleepTimer_SetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov [SleepTimer_bTimerValue],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTimer +; +; DESCRIPTION: +; Returns timer value in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; None +; +; RETURNS: +; Return timer value in A +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTimer: +_SleepTimer_bGetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_bTimerValue] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_iGetTickCntr +; +; DESCRIPTION: +; Returns the least significant 16 bits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; (int)TickCount in A and X +; X <= MSB +; A <= LSB +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_iGetTickCntr: +_SleepTimer_iGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] ; Place LSB in A + mov X,[SleepTimer_TickCount + ST_LSB_OFFSET - 1] ; Place MSB in X + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_lGetTickCntr +; +; DESCRIPTION: +; Returns a pointer to TickCount +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; [A:X] => Pointer to 32 bit tick counter (X=LSB, A=MSB) +; +; RETURNS: +; Pointer to lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_lGetTickCntr: +_SleepTimer_lGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_PROLOGUE RAM_USE_CLASS_3 + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_SETPAGE_CUR >SleepTimer_TickCount + RAM_SETPAGE_IDX A + push A + mov A,[SleepTimer_TickCount + 0] + mov [X + 0],A + mov A,[SleepTimer_TickCount + 1] + mov [X + 1],A + mov A,[SleepTimer_TickCount + 2] + mov [X + 2],A + mov A,[SleepTimer_TickCount + 3] + mov [X + 3],A + pop A + + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION +ENDIF + + + + +; End of File SleepTimer.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.h new file mode 100644 index 0000000..c8f3854 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.h @@ -0,0 +1,78 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: SleepTimer.h +// Version: 1.0, Updated on 2015/3/4 at 22:26:59 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: SleepTimer User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef SleepTimer_INCLUDE +#define SleepTimer_INCLUDE + +#include <m8c.h> +#define SleepTimer_TICK_CNTR_SIZE 4 + +#pragma fastcall16 SleepTimer_EnableInt // Proxy 1 +#pragma fastcall16 SleepTimer_DisableInt // Proxy 1 +#pragma fastcall16 SleepTimer_Start // Proxy 1 +#pragma fastcall16 SleepTimer_Stop // Proxy 1 +#pragma fastcall16 SleepTimer_SetInterval // Proxy 1 +#pragma fastcall16 SleepTimer_SetTimer +#pragma fastcall16 SleepTimer_bGetTimer + +#pragma fastcall16 SleepTimer_SyncWait // Proxy 1 +#pragma fastcall16 SleepTimer_TickWait // Proxy 1 + +#pragma fastcall16 SleepTimer_bGetTickCntr // Proxy 2 + + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +#pragma fastcall16 SleepTimer_iGetTickCntr // Proxy 4 +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +#pragma fastcall16 SleepTimer_lGetTickCntr // Proxy 4 +#endif + +//------------------------------------------------- +// Prototypes of the SleepTimer API. +//------------------------------------------------- + +extern void SleepTimer_EnableInt(void); +extern void SleepTimer_DisableInt(void); +extern void SleepTimer_Start(void); +extern void SleepTimer_Stop(void); +extern void SleepTimer_SetInterval(BYTE bInterval); +extern void SleepTimer_SyncWait(BYTE bTicks, BYTE bMode); +extern void SleepTimer_TickWait(BYTE bTicks); +extern void SleepTimer_SetTimer(BYTE bNewTimerValue); +extern BYTE SleepTimer_bGetTimer( void ); + +extern BYTE SleepTimer_bGetTickCntr(void); + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +extern unsigned int SleepTimer_iGetTickCntr(void); +#define ST_INT_VALID +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +extern unsigned long * SleepTimer_lGetTickCntr(unsigned long * lptr); +#define ST_LONG_VALID +#endif + +// Frequency of sleep timer interrupts +#define SleepTimer_1_HZ 0x18 +#define SleepTimer_8_HZ 0x10 +#define SleepTimer_64_HZ 0x08 +#define SleepTimer_512_HZ 0x00 + +#define SleepTimer_FORCE_RELOAD 0x01 +#define SleepTimer_WAIT_RELOAD 0x00 +extern BYTE SleepTimer_fTick; + + +#endif +// end of file SleepTimer.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.inc new file mode 100644 index 0000000..2a11b3f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimer.inc @@ -0,0 +1,33 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimer.inc +;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the SleepTimer user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for SleepTimer API's. +;-------------------------------------------------- + +SleepTimer_INT_REG: equ 0x0e0 +SleepTimer_INT_MASK: equ 0x40 + +SleepTimer_TICK_CNTR_SIZE: equ 4h + +; Frequency of sleep timer interrupts +SleepTimer_1_HZ: equ 0x18 +SleepTimer_8_HZ: equ 0x10 +SleepTimer_64_HZ: equ 0x08 +SleepTimer_512_HZ: equ 0x00 +SleepTimer_CLOCK_MASK: equ 0x18 + +SleepTimer_FORCE_RELOAD: equ 0x01 +SleepTimer_WAIT_RELOAD: equ 0x00 diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimerint.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimerint.asm new file mode 100644 index 0000000..3176e77 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/backup/sleeptimerint.asm @@ -0,0 +1,143 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimerINT.asm +;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: SleepTimer Interrupt Service Routine. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "SleepTimer.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _SleepTimer_ISR + + +export SleepTimer_fTick +export _SleepTimer_fTick +export SleepTimer_bTimerValue +export _SleepTimer_bTimerValue +export SleepTimer_bCountDown +export _SleepTimer_bCountDown +export SleepTimer_TickCount +export _SleepTimer_TickCount + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM (RAM, REL, CON) + + SleepTimer_fTick: +_SleepTimer_fTick: BLK 1 + + SleepTimer_bTimerValue: +_SleepTimer_bTimerValue: BLK 1 + + SleepTimer_bCountDown: +_SleepTimer_bCountDown: BLK 1 + + SleepTimer_TickCount: +_SleepTimer_TickCount: BLK SleepTimer_TICK_CNTR_SIZE + + + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +Sleep_Counter:: // Sleep timer will trigger this ISR @ 512hz, Sleep Counter is used to count the number number of times this happens, Sleep Counter is used to figure how often certain routines should run +_Sleep_Counter:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL, CON) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _SleepTimer_ISR +; +; DESCRIPTION: +; interrupt handler for instance SleepTimer. +; +; This is a place holder function. If the user requires use of an interrupt +; handler for this function, then place code where specified. +;----------------------------------------------------------------------------- + +_SleepTimer_ISR: + + or [SleepTimer_fTick],0x01 ; Set tick flag + + ; Decrement CountDown (Sync counter) + tst [SleepTimer_bCountDown],0xFF + jz .DoTimer + dec [SleepTimer_bCountDown] + +.DoTimer: ; Decrement TimerValue, if required + tst [SleepTimer_bTimerValue],0xFF + jz .IncBigCounter + dec [SleepTimer_bTimerValue] + +.IncBigCounter: ; Increment big tick counter +IF (SleepTimer_TICK_CNTR_SIZE & 0x04) + inc [SleepTimer_TickCount+3] + jnc SleepTimer_SLEEP_ISR_END + + inc [SleepTimer_TickCount+2] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + +IF (SleepTimer_TICK_CNTR_SIZE & (0x04|0x02)) + inc [SleepTimer_TickCount+1] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + + inc [SleepTimer_TickCount+0] + +SleepTimer_SLEEP_ISR_END: + + ;@PSoC_UserCode_BODY_1@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + //14Point7 ASM Code Start + inc [Sleep_Counter] + //call LED7SEG_Update + //14Point7 ASM Code End + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + +; end of file SleepTimerINT.asm + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm new file mode 100644 index 0000000..accbadc --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.asm @@ -0,0 +1,516 @@ +; Generated by PSoC Designer 5.4.3191 +; +;@Id: boot.tpl#903 @ +;============================================================================= +; FILENAME: boot.asm +; Version: 4.30 +; +; DESCRIPTION: +; M8C Boot Code for CY8C24xxxB microcontroller family. +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in +; the project's root directory to create BOOT.ASM. Any changes made to +; BOOT.ASM will be overwritten every time the project is generated; therefore +; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when +; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) +; are not accidentally modified. +; +;============================================================================= + +include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) +include "m8c.inc" ;Part specific file +include "m8ssc.inc" ;Part specific file +include "memory.inc" ;File generated by PSoC Designer (Project dependent) + +;-------------------------------------- +; Export Declarations +;-------------------------------------- + +export __Start +IF (TOOLCHAIN & HITECH) +ELSE +export __bss_start +export __data_start +export __idata_start +export __func_lit_start +export __text_start +ENDIF +export _bGetPowerSetting +export bGetPowerSetting + + +;-------------------------------------- +; Optimization flags +;-------------------------------------- +; +; To change the value of these flags, modify the file boot.tpl, not +; boot.asm. See the notes in the banner comment at the beginning of +; this file. + +; Optimization for Assembly language (only) projects and C-language projects +; that do not depend on the C compiler to initialize the values of RAM variables. +; Set to 1: Support for C Run-time Environment initialization +; Set to 0: Support for C not included. Faster start up, smaller code space. +; +IF (TOOLCHAIN & HITECH) +; The C compiler will customize the startup code - it's not required here + +C_LANGUAGE_SUPPORT: equ 0 +ELSE +C_LANGUAGE_SUPPORT: equ 1 +ENDIF + + +; The following equate is required for proper operation. Reseting its value +; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is +; selected. If the designer chooses to not wait then stabilization of the ECO +; and PLL_Lock must take place within user code. See the family data sheet for +; the requirements of starting the ECO and PLL lock mode. +; +; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before +; invoking main +; Set to 0: Boot code does not wait; clock may not have stabilized by +; the time code in main starts executing. +; +WAIT_FOR_32K: equ 1 + + +; For historical reasons, by default the boot code uses an lcall instruction +; to invoke the user's _main code. If _main executes a return instruction, +; boot provides an infinite loop. By changing the following equate from zero +; to 1, boot's lcall will be replaced by a ljmp instruction, saving two +; bytes on the stack which are otherwise required for the return address. If +; this option is enabled, _main must not return. (Beginning with the 4.2 +; release, the C compiler automatically places an infinite loop at the end +; of main, rather than a return instruction.) +; +ENABLE_LJMP_TO_MAIN: equ 0 + + +;----------------------------------------------------------------------------- +; Interrupt Vector Table +;----------------------------------------------------------------------------- +; +; Interrupt vector table entries are 4 bytes long. Each one contains +; a jump instruction to an ISR (Interrupt Service Routine), although +; very short ISRs could be encoded within the table itself. Normally, +; vector jump targets are modified automatically according to the user +; modules selected. This occurs when the 'Generate Application' opera- +; tion is run causing PSoC Designer to create boot.asm and the other +; configuration files. If you need to hard code a vector, update the +; file boot.tpl, not boot.asm. See the banner comment at the beginning +; of this file. +;----------------------------------------------------------------------------- + + AREA TOP (ROM, ABS, CON) + + org 0 ;Reset Interrupt Vector +IF (TOOLCHAIN & HITECH) +; jmp __Start ;C compiler fills in this vector +ELSE + jmp __Start ;First instruction executed following a Reset +ENDIF + ;@PSoC_BOOT_ISR_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + org 04h ;Low Voltage Detect (LVD) Interrupt Vector + halt ;Stop execution if power falls too low + + org 08h ;Analog Column 0 Interrupt Vector + // call void_handler + reti + + org 0Ch ;Analog Column 1 Interrupt Vector + // call void_handler + reti + + org 18h ;VC3 Interrupt Vector + // call void_handler + reti + + org 1Ch ;GPIO Interrupt Vector + // call void_handler + reti + + org 20h ;PSoC Block DBB00 Interrupt Vector + ljmp _ADCINC_ADConversion_ISR + reti + + org 24h ;PSoC Block DBB01 Interrupt Vector + ljmp _PWM8_Heater_ISR + reti + + org 28h ;PSoC Block DCB02 Interrupt Vector + ljmp _PWM8_Vout_ISR + reti + + org 2Ch ;PSoC Block DCB03 Interrupt Vector + ljmp _PWM8_NB_Out_ISR + reti + + org 60h ;PSoC I2C Interrupt Vector + // call void_handler + reti + + org 64h ;Sleep Timer Interrupt Vector + ljmp _SleepTimer_ISR + reti + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_ISR_UserCode_END@ + +;----------------------------------------------------------------------------- +; Start of Execution. +;----------------------------------------------------------------------------- +; The Supervisory ROM SWBootReset function has already completed the +; calibrate1 process, loading trim values for 5 volt operation. +; + +IF (TOOLCHAIN & HITECH) + AREA PD_startup(CODE, REL, CON) +ELSE + org 68h +ENDIF +__Start: + + ; initialize SMP values for voltage stabilization, if required, + ; leaving power-on reset (POR) level at the default (low) level, at + ; least for now. + ; + M8C_SetBank1 + mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST + M8C_SetBank0 + +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + M8C_EnableWatchDog +ENDIF + +IF ( SELECT_32K ) + or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project +ELSE + and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled +ENDIF + +IF (TOOLCHAIN & HITECH) + global __Lstackps + mov a,low __Lstackps + swap a,sp +ELSE + ;------------------ + ; Set up the stack + ;------------------ + mov A, __ramareas_end ; Set top of stack to end of used RAM + swap SP, A ; This is only temporary if going to LMM +ENDIF + + ;----------------------------------------------- + ; Set Power-related Trim & the AGND Bypass bit. + ;----------------------------------------------- +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + IF ( AGND_BYPASS ) + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; The 5V trim has already been set, but we need to update the AGNDBYP + ; bit in the write-only BDG_TR register. Recalculate the register + ; value using the proper trim values. + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ENDIF + ENDIF +ENDIF ; 5.0 V Operation + +IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ENDIF +ENDIF ; 3.3 Volt Operation + +IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 12MHZ operation *** + +IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 6MHZ operation *** + + mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations + mov [bSSC_KEYSP], 0 + + ;--------------------------------------- + ; Initialize Crystal Oscillator and PLL + ;--------------------------------------- + +IF ( SELECT_32K & WAIT_FOR_32K ) + ; If the user has requested the External Crystal Oscillator (ECO) then turn it + ; on and wait for it to stabilize and the system to switch over to it. The PLL + ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + ; the ECO to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor1s: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor1s ; Interrupt will latch but will not dispatch + ; since interrupts are not globally enabled +ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + ; Either no ECO, or waiting for stable clock is to be done in main + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the watch dog + +ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + +IF ( PLL_MODE ) + ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + mov reg[INT_VC], 0 ; Clear all pending interrupts + +.WaitFor16ms: + tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor16ms + M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + +IF ( WAIT_FOR_32K ) +ELSE ; !( WAIT_FOR_32K ) + ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. +ENDIF ;(WAIT_FOR_32K) +ENDIF ;(PLL_MODE) + + ;------------------------------------------------------- + ; Initialize Proper Drive Mode for External Clock Pin + ;------------------------------------------------------- + + ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + +IF (SYSCLK_SOURCE) + and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register +ENDIF + ; EXTCLK pin is now in proper drive mode to input the external clock signal + + ;------------------------ + ; Close CT leakage path. + ;------------------------ + mov reg[ACB00CR0], 05h + mov reg[ACB01CR0], 05h + + ;@PSoC_BOOT_LOADCFG_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_LOADCFG_UserCode_END@ + + ;------------------------- + ; Load Base Configuration + ;------------------------- + ; Load global parameter settings and load the user modules in the + ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + ; to minimize start up time; (2) We may still need to play with the + ; Sleep Timer. + ; + lcall LoadConfigInit + + ;----------------------------------- + ; Initialize C Run-Time Environment + ;----------------------------------- +IF ( C_LANGUAGE_SUPPORT ) + mov A,0 ; clear the 'bss' segment to zero + mov [__r0],<__bss_start +BssLoop: + cmp [__r0],<__bss_end + jz BssDone + mvi [__r0],A + jmp BssLoop +BssDone: + mov A,>__idata_start ; copy idata to data segment + mov X,<__idata_start + mov [__r0],<__data_start +IDataLoop: + cmp [__r0],<__data_end + jz C_RTE_Done + push A + romx + mvi [__r0],A + pop A + inc X + adc A,0 + jmp IDataLoop + +C_RTE_Done: + +ENDIF ; C_LANGUAGE_SUPPORT + + ;------------------------------- + ; Voltage Stabilization for SMP + ;------------------------------- + +IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation +IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + ; 5V before enabling the Precision Power-On Reset (PPOR). + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + or reg[INT_MSK0],INT_MSK0_SLEEP + M8C_SetBank1 + and reg[OSC_CR0], ~OSC_CR0_SLEEP + or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Restart the sleep timer + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor2ms: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor2ms ; Branch fails when 2 msec has passed +ENDIF ; SMP is operational +ENDIF ; 5.0V Operation + + ;------------------------------- + ; Set Power-On Reset (POR) Level + ;------------------------------- + ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + ; These values should not be changed from the settings here. See Section "POR and LVD" of + ; Technical Reference Manual #001-14463 for more information. + + M8C_SetBank1 + +IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + ; Yes, lowest trip already set +ELSE ; No, must adjust POR... +IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip +ELSE +IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + ELSE ; No, fast mode + IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + ELSE ; 24HMz ; + or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + ENDIF ; 24MHz + ENDIF ; Slow Mode +ENDIF ; 5.0V Operation +ENDIF ; 3.3V Operation +ENDIF ; 2.7V Operation + + M8C_SetBank0 + + ;---------------------------- + ; Wrap up and invoke "main" + ;---------------------------- + + ; Disable the Sleep interrupt that was used for timing above. In fact, + ; no interrupts should be enabled now, so may as well clear the register. + ; + mov reg[INT_MSK0],0 + + ; Everything has started OK. Now select requested CPU & sleep frequency. + ; + M8C_SetBank1 + mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) + M8C_SetBank0 + + ; Global Interrupt are NOT enabled, this should be done in main(). + ; LVD is set but will not occur unless Global Interrupts are enabled. + ; Global Interrupts should be enabled as soon as possible in main(). + ; + mov reg[INT_VC],0 ; Clear any pending interrupts which may + ; have been set during the boot process. +IF (TOOLCHAIN & HITECH) + ljmp startup ; Jump to C compiler startup code +ELSE +IF ENABLE_LJMP_TO_MAIN + ljmp _main ; goto main (no return) +ELSE + lcall _main ; call main +.Exit: + jmp .Exit ; Wait here after return till power-off or reset +ENDIF +ENDIF ; TOOLCHAIN + + ;--------------------------------- + ; Library Access to Global Parms + ;--------------------------------- + ; + bGetPowerSetting: +_bGetPowerSetting: + ; Returns value of POWER_SETTING in the A register. + ; No inputs. No Side Effects. + ; +IF (POWER_SETTING & POWER_SET_2V7) + mov A, POWER_SETTING | POWER_SET_SLOW_IMO +ELSE + mov A, POWER_SETTING ; Supply voltage and internal main osc +ENDIF + ret + +IF (TOOLCHAIN & HITECH) +ELSE + ;--------------------------------- + ; Order Critical RAM & ROM AREAs + ;--------------------------------- + ; 'TOP' is all that has been defined so far... + + ; ROM AREAs for C CONST, static & global items + ; + AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM +__idata_start: + + AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers +__func_lit_start: + + AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + AREA UserModules (ROM, REL, CON) ; User Module APIs + + ; CODE segment for general use + ; + AREA text (ROM, REL, CON) +__text_start: + + ; RAM area usage + ; + AREA data (RAM, REL, CON) ; initialized RAM +__data_start: + + AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + AREA bss (RAM, REL, CON) ; general use +__bss_start: + +ENDIF ; TOOLCHAIN + +; end of file boot.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl new file mode 100644 index 0000000..7e9dbc7 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/boot.tpl @@ -0,0 +1,514 @@ +;@Id: boot.tpl#903 @ +;============================================================================= +; FILENAME: boot.asm +; Version: 4.30 +; +; DESCRIPTION: +; M8C Boot Code for CY8C24xxxB microcontroller family. +; +; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. +; +; NOTES: +; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in +; the project's root directory to create BOOT.ASM. Any changes made to +; BOOT.ASM will be overwritten every time the project is generated; therefore +; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when +; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) +; are not accidentally modified. +; +;============================================================================= + +include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) +include "m8c.inc" ;Part specific file +include "m8ssc.inc" ;Part specific file +include "memory.inc" ;File generated by PSoC Designer (Project dependent) + +;-------------------------------------- +; Export Declarations +;-------------------------------------- + +export __Start +IF (TOOLCHAIN & HITECH) +ELSE +export __bss_start +export __data_start +export __idata_start +export __func_lit_start +export __text_start +ENDIF +export _bGetPowerSetting +export bGetPowerSetting + + +;-------------------------------------- +; Optimization flags +;-------------------------------------- +; +; To change the value of these flags, modify the file boot.tpl, not +; boot.asm. See the notes in the banner comment at the beginning of +; this file. + +; Optimization for Assembly language (only) projects and C-language projects +; that do not depend on the C compiler to initialize the values of RAM variables. +; Set to 1: Support for C Run-time Environment initialization +; Set to 0: Support for C not included. Faster start up, smaller code space. +; +IF (TOOLCHAIN & HITECH) +; The C compiler will customize the startup code - it's not required here + +C_LANGUAGE_SUPPORT: equ 0 +ELSE +C_LANGUAGE_SUPPORT: equ 1 +ENDIF + + +; The following equate is required for proper operation. Reseting its value +; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is +; selected. If the designer chooses to not wait then stabilization of the ECO +; and PLL_Lock must take place within user code. See the family data sheet for +; the requirements of starting the ECO and PLL lock mode. +; +; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before +; invoking main +; Set to 0: Boot code does not wait; clock may not have stabilized by +; the time code in main starts executing. +; +WAIT_FOR_32K: equ 1 + + +; For historical reasons, by default the boot code uses an lcall instruction +; to invoke the user's _main code. If _main executes a return instruction, +; boot provides an infinite loop. By changing the following equate from zero +; to 1, boot's lcall will be replaced by a ljmp instruction, saving two +; bytes on the stack which are otherwise required for the return address. If +; this option is enabled, _main must not return. (Beginning with the 4.2 +; release, the C compiler automatically places an infinite loop at the end +; of main, rather than a return instruction.) +; +ENABLE_LJMP_TO_MAIN: equ 0 + + +;----------------------------------------------------------------------------- +; Interrupt Vector Table +;----------------------------------------------------------------------------- +; +; Interrupt vector table entries are 4 bytes long. Each one contains +; a jump instruction to an ISR (Interrupt Service Routine), although +; very short ISRs could be encoded within the table itself. Normally, +; vector jump targets are modified automatically according to the user +; modules selected. This occurs when the 'Generate Application' opera- +; tion is run causing PSoC Designer to create boot.asm and the other +; configuration files. If you need to hard code a vector, update the +; file boot.tpl, not boot.asm. See the banner comment at the beginning +; of this file. +;----------------------------------------------------------------------------- + + AREA TOP (ROM, ABS, CON) + + org 0 ;Reset Interrupt Vector +IF (TOOLCHAIN & HITECH) +; jmp __Start ;C compiler fills in this vector +ELSE + jmp __Start ;First instruction executed following a Reset +ENDIF + ;@PSoC_BOOT_ISR_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + org 04h ;Low Voltage Detect (LVD) Interrupt Vector + halt ;Stop execution if power falls too low + + org 08h ;Analog Column 0 Interrupt Vector + `@INTERRUPT_2` + reti + + org 0Ch ;Analog Column 1 Interrupt Vector + `@INTERRUPT_3` + reti + + org 18h ;VC3 Interrupt Vector + `@INTERRUPT_6` + reti + + org 1Ch ;GPIO Interrupt Vector + `@INTERRUPT_7` + reti + + org 20h ;PSoC Block DBB00 Interrupt Vector + `@INTERRUPT_8` + reti + + org 24h ;PSoC Block DBB01 Interrupt Vector + `@INTERRUPT_9` + reti + + org 28h ;PSoC Block DCB02 Interrupt Vector + `@INTERRUPT_10` + reti + + org 2Ch ;PSoC Block DCB03 Interrupt Vector + `@INTERRUPT_11` + reti + + org 60h ;PSoC I2C Interrupt Vector + `@INTERRUPT_24` + reti + + org 64h ;Sleep Timer Interrupt Vector + `@INTERRUPT_25` + reti + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_ISR_UserCode_END@ + +;----------------------------------------------------------------------------- +; Start of Execution. +;----------------------------------------------------------------------------- +; The Supervisory ROM SWBootReset function has already completed the +; calibrate1 process, loading trim values for 5 volt operation. +; + +IF (TOOLCHAIN & HITECH) + AREA PD_startup(CODE, REL, CON) +ELSE + org 68h +ENDIF +__Start: + + ; initialize SMP values for voltage stabilization, if required, + ; leaving power-on reset (POR) level at the default (low) level, at + ; least for now. + ; + M8C_SetBank1 + mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST + M8C_SetBank0 + +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + M8C_EnableWatchDog +ENDIF + +IF ( SELECT_32K ) + or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project +ELSE + and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled +ENDIF + +IF (TOOLCHAIN & HITECH) + global __Lstackps + mov a,low __Lstackps + swap a,sp +ELSE + ;------------------ + ; Set up the stack + ;------------------ + mov A, __ramareas_end ; Set top of stack to end of used RAM + swap SP, A ; This is only temporary if going to LMM +ENDIF + + ;----------------------------------------------- + ; Set Power-related Trim & the AGND Bypass bit. + ;----------------------------------------------- +M8C_ClearWDTAndSleep ; Clear WDT before enabling it. +IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + IF ( AGND_BYPASS ) + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; The 5V trim has already been set, but we need to update the AGNDBYP + ; bit in the write-only BDG_TR register. Recalculate the register + ; value using the proper trim values. + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + ENDIF + ENDIF +ENDIF ; 5.0 V Operation + +IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ELSE ; *** 12MHZ Main Oscillator *** + M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + ENDIF +ENDIF ; 3.3 Volt Operation + +IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 12MHZ operation *** + +IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + or reg[CPU_SCR1], CPU_SCR1_SLIMO + M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST +ENDIF ; *** 2.7 Volts / 6MHZ operation *** + + mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations + mov [bSSC_KEYSP], 0 + + ;--------------------------------------- + ; Initialize Crystal Oscillator and PLL + ;--------------------------------------- + +IF ( SELECT_32K & WAIT_FOR_32K ) + ; If the user has requested the External Crystal Oscillator (ECO) then turn it + ; on and wait for it to stabilize and the system to switch over to it. The PLL + ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + ; the ECO to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor1s: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor1s ; Interrupt will latch but will not dispatch + ; since interrupts are not globally enabled +ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + ; Either no ECO, or waiting for stable clock is to be done in main + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the watch dog + +ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + +IF ( PLL_MODE ) + ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + ; + M8C_SetBank1 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + mov reg[INT_VC], 0 ; Clear all pending interrupts + +.WaitFor16ms: + tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor16ms + M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + M8C_SetBank0 + +IF ( WAIT_FOR_32K ) +ELSE ; !( WAIT_FOR_32K ) + ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. +ENDIF ;(WAIT_FOR_32K) +ENDIF ;(PLL_MODE) + + ;------------------------------------------------------- + ; Initialize Proper Drive Mode for External Clock Pin + ;------------------------------------------------------- + + ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + +IF (SYSCLK_SOURCE) + and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register +ENDIF + ; EXTCLK pin is now in proper drive mode to input the external clock signal + + ;------------------------ + ; Close CT leakage path. + ;------------------------ + mov reg[ACB00CR0], 05h + mov reg[ACB01CR0], 05h + + ;@PSoC_BOOT_LOADCFG_UserCode_START@ + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_BOOT_LOADCFG_UserCode_END@ + + ;------------------------- + ; Load Base Configuration + ;------------------------- + ; Load global parameter settings and load the user modules in the + ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + ; to minimize start up time; (2) We may still need to play with the + ; Sleep Timer. + ; + lcall LoadConfigInit + + ;----------------------------------- + ; Initialize C Run-Time Environment + ;----------------------------------- +IF ( C_LANGUAGE_SUPPORT ) + mov A,0 ; clear the 'bss' segment to zero + mov [__r0],<__bss_start +BssLoop: + cmp [__r0],<__bss_end + jz BssDone + mvi [__r0],A + jmp BssLoop +BssDone: + mov A,>__idata_start ; copy idata to data segment + mov X,<__idata_start + mov [__r0],<__data_start +IDataLoop: + cmp [__r0],<__data_end + jz C_RTE_Done + push A + romx + mvi [__r0],A + pop A + inc X + adc A,0 + jmp IDataLoop + +C_RTE_Done: + +ENDIF ; C_LANGUAGE_SUPPORT + + ;------------------------------- + ; Voltage Stabilization for SMP + ;------------------------------- + +IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation +IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + ; 5V before enabling the Precision Power-On Reset (PPOR). + ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + or reg[INT_MSK0],INT_MSK0_SLEEP + M8C_SetBank1 + and reg[OSC_CR0], ~OSC_CR0_SLEEP + or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + M8C_SetBank0 + M8C_ClearWDTAndSleep ; Restart the sleep timer + mov reg[INT_VC], 0 ; Clear all pending interrupts +.WaitFor2ms: + tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + jz .WaitFor2ms ; Branch fails when 2 msec has passed +ENDIF ; SMP is operational +ENDIF ; 5.0V Operation + + ;------------------------------- + ; Set Power-On Reset (POR) Level + ;------------------------------- + ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + ; These values should not be changed from the settings here. See Section "POR and LVD" of + ; Technical Reference Manual #001-14463 for more information. + + M8C_SetBank1 + +IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + ; Yes, lowest trip already set +ELSE ; No, must adjust POR... +IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip +ELSE +IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + ELSE ; No, fast mode + IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + ELSE ; 24HMz ; + or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting + ENDIF ; 24MHz + ENDIF ; Slow Mode +ENDIF ; 5.0V Operation +ENDIF ; 3.3V Operation +ENDIF ; 2.7V Operation + + M8C_SetBank0 + + ;---------------------------- + ; Wrap up and invoke "main" + ;---------------------------- + + ; Disable the Sleep interrupt that was used for timing above. In fact, + ; no interrupts should be enabled now, so may as well clear the register. + ; + mov reg[INT_MSK0],0 + + ; Everything has started OK. Now select requested CPU & sleep frequency. + ; + M8C_SetBank1 + mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) + M8C_SetBank0 + + ; Global Interrupt are NOT enabled, this should be done in main(). + ; LVD is set but will not occur unless Global Interrupts are enabled. + ; Global Interrupts should be enabled as soon as possible in main(). + ; + mov reg[INT_VC],0 ; Clear any pending interrupts which may + ; have been set during the boot process. +IF (TOOLCHAIN & HITECH) + ljmp startup ; Jump to C compiler startup code +ELSE +IF ENABLE_LJMP_TO_MAIN + ljmp _main ; goto main (no return) +ELSE + lcall _main ; call main +.Exit: + jmp .Exit ; Wait here after return till power-off or reset +ENDIF +ENDIF ; TOOLCHAIN + + ;--------------------------------- + ; Library Access to Global Parms + ;--------------------------------- + ; + bGetPowerSetting: +_bGetPowerSetting: + ; Returns value of POWER_SETTING in the A register. + ; No inputs. No Side Effects. + ; +IF (POWER_SETTING & POWER_SET_2V7) + mov A, POWER_SETTING | POWER_SET_SLOW_IMO +ELSE + mov A, POWER_SETTING ; Supply voltage and internal main osc +ENDIF + ret + +IF (TOOLCHAIN & HITECH) +ELSE + ;--------------------------------- + ; Order Critical RAM & ROM AREAs + ;--------------------------------- + ; 'TOP' is all that has been defined so far... + + ; ROM AREAs for C CONST, static & global items + ; + AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM +__idata_start: + + AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers +__func_lit_start: + + AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + AREA UserModules (ROM, REL, CON) ; User Module APIs + + ; CODE segment for general use + ; + AREA text (ROM, REL, CON) +__text_start: + + ; RAM area usage + ; + AREA data (RAM, REL, CON) ; initialized RAM +__data_start: + + AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + AREA bss (RAM, REL, CON) ; general use +__bss_start: + +ENDIF ; TOOLCHAIN + +; end of file boot.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt new file mode 100644 index 0000000..d18eb25 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/flashsecurity.txt @@ -0,0 +1,28 @@ +; @Id: flashsecurity.txt#1 @ +; +; Edit this file to adjust the Flash security for this project. +; Flash security is provided by marking a 64 byte block with a character +; that corresponds to the type of security for that block, given: +; +; W: Full (Write protected) +; R: Field Upgrade (Read protected) +; U: Unprotected +; F: Factory + +; Note #1: Protection characters can be entered in upper or lower case. +; Note #2: Refer to the Flash Program Memory Protection section in the Data Sheet. + +; Comments may be added similar to an assembly language comment, by +; Using the semicolon (;) followed by your comment. The comment extends +; to the end of the line. + +; 0 40 80 C0 100 140 180 1C0 200 240 280 2C0 300 340 380 3C0 (+) Base Address + + W W W W W W W W W W W W W W W W ; Base Address 0 + W W W W W W W W W W W W W W W W ; Base Address 400 + W W W W W W W W W W W W W W W W ; Base Address 800 + W W W W W W W W W W W W W W W W ; Base Address C00 +; End 4K parts + + +; Copyright Cypress MicroSystems, 2002, All rights reserved. \ No newline at end of file diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm new file mode 100644 index 0000000..9079121 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.asm @@ -0,0 +1,398 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.asm +;; Version: 1.1, Updated on 2006/02/03 at 09:10:49 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler source for the ADCINC A/D Converter +;; User Module with 1st-order modulator. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API +;; function returns. Even though these registers may be preserved now, +;; there is no guarantee they will be preserved in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" + +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export ADCINC_Start +export _ADCINC_Start +export ADCINC_SetPower +export _ADCINC_SetPower +export ADCINC_Stop +export _ADCINC_Stop +export ADCINC_GetSamples +export _ADCINC_GetSamples +export ADCINC_StopADC +export _ADCINC_StopADC +export ADCINC_fIsDataAvailable +export _ADCINC_fIsDataAvailable +export ADCINC_iClearFlagGetData +export _ADCINC_iClearFlagGetData +export ADCINC_wClearFlagGetData +export _ADCINC_wClearFlagGetData +export ADCINC_cClearFlagGetData +export _ADCINC_cClearFlagGetData +export ADCINC_bClearFlagGetData +export _ADCINC_bClearFlagGetData +export ADCINC_iGetData +export _ADCINC_iGetData +export ADCINC_wGetData +export _ADCINC_wGetData +export ADCINC_bGetData +export _ADCINC_bGetData +export ADCINC_cGetData +export _ADCINC_cGetData +export ADCINC_fClearFlag +export _ADCINC_fClearFlag +export ADCINC_WritePulseWidth +export _ADCINC_WritePulseWidth + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Start +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +; and starts the PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Start: +_ADCINC_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + or reg[DEC_CR1],c0h + call ADCINC_SetPower + ADCINC_RESET_INTEGRATOR_M + mov reg[ADCINC_PWMdr1],ffh + or reg[ADCINC_PWMcr0],01h ; start PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_SetPower +; +; DESCRIPTION: Applies power setting to the module's analog PSoc block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: The A register contains the power setting. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_SetPower: +_ADCINC_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Set up Stack frame + and A,03h ; Ensure value is legal + push A + mov A,reg[ADCINC_AtoDcr3] ; First SC block: + and A,~03h ; clear power bits to zero + or A,[ X ] ; establish new value + mov reg[ADCINC_AtoDcr3],A ; change the actual setting + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_Stop +; +; DESCRIPTION: Removes power from the module's analog PSoc block. +; and turns off PWM +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_Stop: +_ADCINC_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + and reg[ADCINC_AtoDcr3], ~03h + and reg[ADCINC_PWMcr0], ~01h ; stop PWM + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_GetSamples +; +; DESCRIPTION: Activates interrupts for this user module and begins sampling. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: A register contain number of samples +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_GetSamples: +_ADCINC_GetSamples: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >ADCINC_fMode + ADCINC_ENABLE_INTEGRATOR_M + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + mov [ADCINC_bNumSamples],A + mov A, reg[ADCINC_PWMdr2] + jnz .SkipPulseWrite + mov reg[ADCINC_PWMdr2], 1 +.SkipPulseWrite: + ADCINC_STARTADC_M ;enable interrupt + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_StopADC +; +; DESCRIPTION: Shuts down the A/D is an orderly manner. The interrupt +; is disabled but the PWM output is still active. +; Integrator is reset +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_StopADC: +_ADCINC_StopADC: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_STOPADC_M + ADCINC_RESET_INTEGRATOR_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fIsDataAvailable +; +; DESCRIPTION: Returns the status of the A/D Data +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall BOOL DataAvailable returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fIsDataAvailable: +_ADCINC_fIsDataAvailable: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fIsDataAvailable_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iClearFlagGetData +; ADCINC_wClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +; Flag is checked after trandfer to insure valid data. +; available. Also clears the DATA_READY flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iClearFlagGetData: +_ADCINC_iClearFlagGetData: + ADCINC_wClearFlagGetData: +_ADCINC_wClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_iClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_cClearFlagGetData +; ADCINC_bClearFlagGetData +; +; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult returned in the X and A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_cClearFlagGetData: +_ADCINC_cClearFlagGetData: + ADCINC_bClearFlagGetData: +_ADCINC_bClearFlagGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_bClearFlagGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_iGetData +; ADCINC_wGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall int iResult is returned in the X,A registers +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_iGetData: +_ADCINC_iGetData: + ADCINC_wGetData: +_ADCINC_wGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_wGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_bGetData +; ADCINC_cGetData +; +; DESCRIPTION: Returns the data from the A/D. Does not check if data is +; available. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: fastcall CHAR cData returned in the A register +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_bGetData: +_ADCINC_bGetData: + ADCINC_cGetData: +_ADCINC_cGetData: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_cGetData_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_fClearFlag +; +; DESCRIPTION: Clears the data ready flag. +;----------------------------------------------------------------------------- +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The DATA_READY flag is cleared. +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_fClearFlag: +_ADCINC_fClearFlag: + RAM_PROLOGUE RAM_USE_CLASS_4 + ADCINC_fClearFlag_M + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: ADCINC_WritePulseWidth +; +; DESCRIPTION: +; Write the 8-bit period value into the compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + ADCINC_WritePulseWidth: +_ADCINC_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + ADCINC_WritePulseWidth_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File ADCINC.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h new file mode 100644 index 0000000..1b30f54 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.h @@ -0,0 +1,91 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: ADCINC.h +// Version: 1.20, Updated on 2015/3/4 at 22:21:26 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: C declarations for the ADCINC User Module with +// a 1st-order modulator. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef ADCINC_INCLUDE +#define ADCINC_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 ADCINC_Start +#pragma fastcall16 ADCINC_SetPower +#pragma fastcall16 ADCINC_Stop +#pragma fastcall16 ADCINC_GetSamples +#pragma fastcall16 ADCINC_StopADC +#pragma fastcall16 ADCINC_fIsDataAvailable +#pragma fastcall16 ADCINC_iClearFlagGetData +#pragma fastcall16 ADCINC_wClearFlagGetData +#pragma fastcall16 ADCINC_cClearFlagGetData +#pragma fastcall16 ADCINC_bClearFlagGetData +#pragma fastcall16 ADCINC_iGetData +#pragma fastcall16 ADCINC_wGetData +#pragma fastcall16 ADCINC_cGetData +#pragma fastcall16 ADCINC_bGetData +#pragma fastcall16 ADCINC_fClearFlag +#pragma fastcall16 ADCINC_WritePulseWidth + +//------------------------------------------------- +// Prototypes of the ADCINC API. +//------------------------------------------------- +extern void ADCINC_Start(BYTE bPower); +extern void ADCINC_SetPower(BYTE bPower); +extern void ADCINC_Stop(void); +extern void ADCINC_GetSamples(BYTE bNumSamples); +extern void ADCINC_StopADC(void); +extern BYTE ADCINC_fIsDataAvailable(void); +extern INT ADCINC_iClearFlagGetData(void); +extern WORD ADCINC_wClearFlagGetData(void); +extern CHAR ADCINC_cClearFlagGetData(void); +extern BYTE ADCINC_bClearFlagGetData(void); +extern INT ADCINC_iGetData(void); +extern WORD ADCINC_wGetData(void); +extern CHAR ADCINC_cGetData(void); +extern BYTE ADCINC_bGetData(void); +extern BYTE ADCINC_fClearFlag(void); +extern void ADCINC_WritePulseWidth(BYTE bPulseWidthValue); + +//------------------------------------------------- +// Defines for ADCINC API's. +//------------------------------------------------- +#define ADCINC_OFF 0 +#define ADCINC_LOWPOWER 1 +#define ADCINC_MEDPOWER 2 +#define ADCINC_HIGHPOWER 3 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- +#pragma ioport ADCINC_PWMdr0: 0x020 //Period reg +BYTE ADCINC_PWMdr0; +#pragma ioport ADCINC_PWMdr1: 0x021 //1_ADDRh ; Down count reg +BYTE ADCINC_PWMdr1; +#pragma ioport ADCINC_PWMdr2: 0x022 //Compare reg +BYTE ADCINC_PWMdr2; +#pragma ioport ADCINC_PWMcr0: 0x023 //Control reg +BYTE ADCINC_PWMcr0; +#pragma ioport ADCINC_PWMfn: 0x120 //Function reg +BYTE ADCINC_PWMfn; +#pragma ioport ADCINC_PWMsl: 0x121 //Input select reg +BYTE ADCINC_PWMsl; +#pragma ioport ADCINC_PWMos: 0x122 //Output select reg +BYTE ADCINC_PWMos; +#pragma ioport ADCINC_AtoDcr0: 0x084 //SC Block Control Reg 0 +BYTE ADCINC_AtoDcr0; +#pragma ioport ADCINC_AtoDcr1: 0x085 //SC Block Control Reg 1 +BYTE ADCINC_AtoDcr1; +#pragma ioport ADCINC_AtoDcr2: 0x086 //SC Block Control Reg 2 +BYTE ADCINC_AtoDcr2; +#pragma ioport ADCINC_AtoDcr3: 0x087 //SC Block Control Reg 3 +BYTE ADCINC_AtoDcr3; + +#endif +// end of file ADCINC.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc new file mode 100644 index 0000000..39e4465 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINC.inc @@ -0,0 +1,149 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINC.inc +;; Version: 1.20, Updated on 2015/3/4 at 22:21:26 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the ADCINC A/D Converter +;; User Module with a 1st-order modulator. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +;-------------------------------------------------- +; Constants for ADCINC API's. +;-------------------------------------------------- + +ADCINC_OFF: equ 00h +ADCINC_LOWPOWER: equ 01h +ADCINC_MEDPOWER: equ 02h +ADCINC_HIGHPOWER: equ 03h + +ADCINC_bNUMBITS: equ 08h +ADCINC_NoAZ: equ 1 +ADCINC_SIGNED_DATA: equ 0 +ADCINC_9_OR_MORE_BITS: equ ((08h - 1)& 08h) +ADCINC_8_OR_MORE_BITS: equ ((08h )& 08h) +;-------------------------------------------------- +; Register Address Constants for ADCINC +;-------------------------------------------------- +ADCINC_ISR_MASK: equ 01h +ADCINC_ISR_REG: equ 0e1h +ADCINC_CLR_REG: equ (((ADCINC_ISR_REG & 038h)/8)^0dfh) + +ADCINC_PWMdr0: equ 20h ; Period reg +ADCINC_PWMdr1: equ 21h ; Down count reg +ADCINC_PWMdr2: equ 22h ; Compare reg +ADCINC_PWMcr0: equ 23h ; Control reg +ADCINC_PWMfn: equ 20h ; Function reg +ADCINC_PWMsl: equ 21h ; Input select reg +ADCINC_PWMos: equ 22h ; Output select reg + +ADCINC_AtoDcr0: equ 84h ; SC Block Control Reg 0 +ADCINC_AtoDcr1: equ 85h ; SC Block Control Reg 1 +ADCINC_AtoDcr2: equ 86h ; SC Block Control Reg 2 +ADCINC_AtoDcr3: equ 87h ; SC Block Control Reg 3 + +HighByte: equ 0 +LowByte: equ 1 + +macro ADCINC_fIsDataAvailable_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] +endm + + +macro ADCINC_iGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_wGetData_M + ADCINC_iGetData_M +endm + + +macro ADCINC_cGetData_M + RAM_SETPAGE_CUR >ADCINC_iResult + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bGetData_M + ADCINC_cGetData_M +endm + + +macro ADCINC_fClearFlag_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov A,[ADCINC_fStatus] + mov [ADCINC_fStatus],00h +endm + + +macro ADCINC_iClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + .repeat: + mov [ADCINC_fStatus],00h + mov X,[(ADCINC_iResult + HighByte)] + mov A,[(ADCINC_iResult + LowByte)] + cmp [ADCINC_fStatus],00h + .until: jnz .repeat +endm + + +macro ADCINC_wClearFlagGetData_M + ADCINC_iClearFlagGetData_M +endm + + +macro ADCINC_cClearFlagGetData_M + RAM_SETPAGE_CUR >ADCINC_fStatus + mov [ADCINC_fStatus],00h + mov A,[(ADCINC_iResult + LowByte)] +endm + + +macro ADCINC_bClearFlagGetData_M + ADCINC_cClearFlagGetData_M +endm + +macro ADCINC_ENABLE_INTEGRATOR_M + and reg[ADCINC_AtoDcr3],~10h + IF ADCINC_NoAZ + and reg[ADCINC_AtoDcr2],~20h + ENDIF +endm + + +macro ADCINC_RESET_INTEGRATOR_M + IF ADCINC_NoAZ + or reg[ADCINC_AtoDcr2],20h + ENDIF + or reg[ADCINC_AtoDcr3],10h +endm + + +macro ADCINC_STARTADC_M + ;Enable PWM interrupt + mov reg[ADCINC_CLR_REG],~(ADCINC_ISR_MASK) + or reg[ADCINC_ISR_REG], (ADCINC_ISR_MASK) +endm + + +macro ADCINC_STOPADC_M + ;Disable PWM interrupt + and reg[ADCINC_ISR_REG],~(ADCINC_ISR_MASK) +endm + + +macro ADCINC_WritePulseWidth_M + mov reg[ADCINC_PWMdr2],A +endm + +; end of file ADCINC.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm new file mode 100644 index 0000000..e257f69 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/ADCINCINT.asm @@ -0,0 +1,256 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: ADCINCINT.asm +;; Version: 1.20, Updated on 2015/3/4 at 22:21:26 +;; +;; DESCRIPTION: Assembler interrupt service routine for the ADCINC +;; A/D Converter User Module. This code works for both the +;; first and second-order modulator topologies. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "ADCINC.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export _ADCINC_ADConversion_ISR + +export _ADCINC_iResult +export ADCINC_iResult +export _ADCINC_fStatus +export ADCINC_fStatus +export _ADCINC_bState +export ADCINC_bState +export _ADCINC_fMode +export ADCINC_fMode +export _ADCINC_bNumSamples +export ADCINC_bNumSamples + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM(RAM,REL) + ADCINC_iResult: +_ADCINC_iResult: BLK 2 ;Calculated answer + iTemp: BLK 2 ;internal temp storage + ADCINC_fStatus: +_ADCINC_fStatus: BLK 1 ;ADC Status + ADCINC_bState: +_ADCINC_bState: BLK 1 ;State value of ADC count + ADCINC_fMode: +_ADCINC_fMode: BLK 1 ;Integrate and reset mode. + ADCINC_bNumSamples: +_ADCINC_bNumSamples: BLK 1 ;Number of samples to take. + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +AREA InterruptRAM (RAM, REL, CON) +ADC_Counter:: //ADC Counter +_ADC_Counter:: BLK 1 +Ri_Max_x1:: //Peak of Nermest AC coupled signal for temperature sensing +_Ri_Max_x1:: BLK 1 +Ri_Min_x1:: //Trough of Nermest AC coupled signal for temperature sensing +_Ri_Min_x1:: BLK 1 +ip_x1:: //Voltage Across Pump Current sense Resistor, it is in +_ip_x1:: BLK 1 +ADC_IF::// Byte value used to track which ADC sample last occurred, ADC_IF[0]=1 if Ri_Min,ADC_IF[1]=1 if Ri_Max,ADC_IF[2]=1 if VR +_ADC_IF:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _ADCINC_ADConversion_ISR +; +; DESCRIPTION: Perform final filter operations to produce output samples. +; +;----------------------------------------------------------------------------- +; +; The decimation rate is established by the PWM interrupt. Four timer +; clocks elapse for each modulator output (decimator input) since the +; phi1/phi2 generator divides by 4. This means the timer period and thus +; it's interrupt must equal 4 times the actual decimation rate. The +; decimator is ru for 2^(#bits-6). +; +_ADCINC_ADConversion_ISR: + dec [ADCINC_bState] +if1: + jc endif1 ; no underflow + reti +endif1: + cmp [ADCINC_fMode],0 +if2: + jnz endif2 ;leaving reset mode + push A ;read decimator + mov A, reg[DEC_DL] + mov [iTemp + LowByte],A + mov A, reg[DEC_DH] + mov [iTemp + HighByte], A + pop A + mov [ADCINC_fMode],1 + mov [ADCINC_bState],((1<<(ADCINC_bNUMBITS- 6))-1) + reti +endif2: + ;This code runs at end of integrate + ADCINC_RESET_INTEGRATOR_M + push A + mov A, reg[DEC_DL] + sub A,[iTemp + LowByte] + mov [iTemp +LowByte],A + mov A, reg[DEC_DH] + sbb A,[iTemp + HighByte] + asr A + rrc [iTemp + LowByte] + + ;Covert to Unipolar +IF ADCINC_9_OR_MORE_BITS + add A, (1<<(ADCINC_bNUMBITS - 9)) +ELSE + add [iTemp + LowByte], (1<<(ADCINC_bNUMBITS - 1)) ;work on lower Byte + adc A,0 +ENDIF + ;check for overflow +IF ADCINC_8_OR_MORE_BITS + cmp A,(1<<(ADCINC_bNUMBITS - 8)) +if3: + jnz endif3 ;overflow + dec A + mov [iTemp + LowByte],ffh +endif3: +ELSE + cmp [iTemp + LowByte],(1<<(ADCINC_bNUMBITS)) +if4: + jnz endif4 ;overflow + dec [iTemp + LowByte] +endif4: +ENDIF +IF ADCINC_SIGNED_DATA +IF ADCINC_9_OR_MORE_BITS + sub A,(1<<(ADCINC_bNUMBITS - 9)) +ELSE + sub [iTemp +LowByte],(1<<(ADCINC_bNUMBITS - 1)) + sbb A,0 +ENDIF +ENDIF + mov [ADCINC_iResult + LowByte],[iTemp +LowByte] + mov [ADCINC_iResult + HighByte],A + mov [ADCINC_fStatus],1 +ConversionReady: + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + //14Point7 ASM Code Start + mov A,[_ADC_Counter] + sub A,0 + JZ ADC_0 + + sub A,1 + JZ ADC_1 + + sub A,1 + JZ ADC_2 + + sub A,1 + JZ ADC_3 + + ADC_0: //Ri_Max, Peak of AC coupled Temperature sense signal + //and reg[PRT2DR],127 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_Ri_Max_x1],[ADCINC_iResult + LowByte] + mov [_ADC_Counter],1 + or [_ADC_IF],2 // Set ADC_IF[1] to indicate that new Ri_Max data is available + jmp Cont + + ADC_1://Ri_Min, Trough of AC coupled Temperature sense signal + mov reg[AMX_IN],15 //setup Mux so that Next ADC sample is a differential Ip Vs Ia (voltage across pump current sense resistor, P0[7] Vs P0[6] + //mov reg[AMX_IN],9 //cal lin + //or reg[PRT2DR],128 //set Ri_Out Pin + or reg[PRT0DR],4 //set Ri_Out Pin + mov [_Ri_Min_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],1 // Set ADC_IF[0] to indicate that new Ri_Min data is available + mov [_ADC_Counter],2 + + jmp Cont + + ADC_2://Voltage Across Pump Current sense resistor + //and reg[PRT2DR],127 //clear Ri_Out Pin, Next ADC sample is not the Ri_Min, but Ri_Out is cleared so that ~1khz AC signal is mantained + and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],3 + jmp Cont + + ADC_3://Voltage Across Pump Current sense resistor again, this ADC sample is need to keep timing on the ~1khz AC Temperature Sense Signal so might as well get another Sample of VR + //or reg[PRT2DR],128 //Set Ri_Out Pin so that the next ADC sample will Acquire the Peak (Ri_Max) of AC coupled Temperature sense signal + or reg[PRT0DR],4 //set Ri_Out Pin + mov reg[AMX_IN],0 // Setup Mux so that Next ADC sample is differential Ri_in Vs Vref, P0[1] Vs P0[0] + mov [_ip_x1],[ADCINC_iResult + LowByte] + or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available + mov [_ADC_Counter],0 + + Cont: + //14Point7 ASM Code End + + ; Sample data is now in iResult + ; + ; NOTE: This interrupt service routine has already + ; preserved the values of the A CPU register. If + ; you need to use the X register you must preserve + ; its value and restore it before the return from + ; interrupt. + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + pop A + cmp [ADCINC_bNumSamples],0 +if5: + jnz endif5 ; Number of samples is zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif5: + dec [ADCINC_bNumSamples] +if6: + jz endif6 ; count not zero + mov [ADCINC_fMode],0 + mov [ADCINC_bState],0 + ADCINC_ENABLE_INTEGRATOR_M + reti +endif6: + ;All samples done + ADCINC_STOPADC_M + reti +; end of file ADCINCINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm new file mode 100644 index 0000000..b2cf2c8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.asm +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_0.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_0_InputSelect +export _AMUX4_0_InputSelect + +export AMUX4_0_Start +export _AMUX4_0_Start + +export AMUX4_0_Stop +export _AMUX4_0_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_InputSelect: +_AMUX4_0_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_0_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_0_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_0_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_0_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_0_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Start: +_AMUX4_0_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_0_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_0_Stop: +_AMUX4_0_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_0.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h new file mode 100644 index 0000000..0bd98e3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_0.h +// Version: 1.50, Updated on 2015/3/4 at 22:21:30 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_0_INCLUDE +#define AMUX4_0_INCLUDE + +#include <m8c.h> +//------------------------------------------------- +// Defines for AMUX4_0 API's. +//------------------------------------------------- +#define AMUX4_0_PORT0_0 0x00 +#define AMUX4_0_PORT0_2 0x01 +#define AMUX4_0_PORT0_4 0x02 +#define AMUX4_0_PORT0_6 0x03 + +#define AMUX4_0_PORT0_1 0x00 +#define AMUX4_0_PORT0_3 0x01 +#define AMUX4_0_PORT0_5 0x02 +#define AMUX4_0_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_0_InputSelect +#pragma fastcall16 AMUX4_0_Start +#pragma fastcall16 AMUX4_0_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_0 API. +//------------------------------------------------- + +extern void AMUX4_0_InputSelect(BYTE bChannel); +extern void AMUX4_0_Start(void); +extern void AMUX4_0_Stop(void); + +#endif +// end of file AMUX4_0.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc new file mode 100644 index 0000000..0074241 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_0.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_0.inc +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_0 API's. +;-------------------------------------------------- +AMUX4_0_MUX_COL: equ (0h & 03h) +AMUX4_0_COL_COUNT: equ (0h & 80h) +AMUX4_0_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_0_PORT0_0: equ 0h +AMUX4_0_PORT0_2: equ 1h +AMUX4_0_PORT0_4: equ 2h +AMUX4_0_PORT0_6: equ 3h + +AMUX4_0_PORT0_1: equ 0h +AMUX4_0_PORT0_3: equ 1h +AMUX4_0_PORT0_5: equ 2h +AMUX4_0_PORT0_7: equ 3h + +; end of file AMUX4_0.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm new file mode 100644 index 0000000..f3f8ab3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.asm @@ -0,0 +1,169 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.asm +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: AMux4 User Module software implementation file devices. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "AMUX4_1.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export AMUX4_1_InputSelect +export _AMUX4_1_InputSelect + +export AMUX4_1_Start +export _AMUX4_1_Start + +export AMUX4_1_Stop +export _AMUX4_1_Stop + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +MUXMASK: equ 03h + +AREA UserModules (ROM, REL) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_InputSelect +; +; DESCRIPTION: +; Place the signal from one of four port0 pins on the Analog Column bus. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the mux input control value +; +; Input Code +; Mux input 0,1 00h +; Mux input 2,3 01h +; Mux input 4,5 02h +; Mux input 6,7 03h +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_InputSelect: +_AMUX4_1_InputSelect: + RAM_PROLOGUE RAM_USE_CLASS_2 + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 +ENDIF + + and A, MUXMASK ; Mask off only valid port0 input bits + mov X,AMUX4_1_MUX_COL +.AMUX4_ShiftIt: ; Shift value to correct bit position for Mux + dec X + jc .AMUX4_SetIt + asl A + asl A + jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + +.AMUX4_SetIt: + mov X,SP ; Get current stack location + push A ; Save a to OR it to AMX_IN later +IF (AMUX4_1_COL_COUNT) + mov A, reg[ACE_AMX_IN] ; Get current value of mux control register +ELSE + mov A, reg[AMX_IN] ; Get current value of mux control register +ENDIF + and A,~AMUX4_1_MUX_MASK ; Mask off the bits for this Mux + or A,[X] ; OR in the mux control bits +IF (AMUX4_1_COL_COUNT) + mov reg[ACE_AMX_IN], A ; Get current value of mux control register +ELSE + mov reg[AMX_IN], A ; Write out mux value to mux control register +ENDIF + pop A ; Restore the stack + +IF (AMUX4_1_COL_COUNT) + M8C_SetBank0 +ENDIF + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Start +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Start: +_AMUX4_1_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: AMUX4_1_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here for +; future compatibility. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + AMUX4_1_Stop: +_AMUX4_1_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION +; End of File AMUX4_1.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h new file mode 100644 index 0000000..02b4e59 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.h @@ -0,0 +1,44 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: AMUX4_1.h +// Version: 1.50, Updated on 2015/3/4 at 22:21:30 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: AMux4 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef AMUX4_1_INCLUDE +#define AMUX4_1_INCLUDE + +#include <m8c.h> +//------------------------------------------------- +// Defines for AMUX4_1 API's. +//------------------------------------------------- +#define AMUX4_1_PORT0_0 0x00 +#define AMUX4_1_PORT0_2 0x01 +#define AMUX4_1_PORT0_4 0x02 +#define AMUX4_1_PORT0_6 0x03 + +#define AMUX4_1_PORT0_1 0x00 +#define AMUX4_1_PORT0_3 0x01 +#define AMUX4_1_PORT0_5 0x02 +#define AMUX4_1_PORT0_7 0x03 + + +#pragma fastcall16 AMUX4_1_InputSelect +#pragma fastcall16 AMUX4_1_Start +#pragma fastcall16 AMUX4_1_Stop + +//------------------------------------------------- +// Prototypes of the AMUX4_1 API. +//------------------------------------------------- + +extern void AMUX4_1_InputSelect(BYTE bChannel); +extern void AMUX4_1_Start(void); +extern void AMUX4_1_Stop(void); + +#endif +// end of file AMUX4_1.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc new file mode 100644 index 0000000..5a2d762 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/AMUX4_1.inc @@ -0,0 +1,30 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: AMUX4_1.inc +;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the MUX4 user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for AMUX4_1 API's. +;-------------------------------------------------- +AMUX4_1_MUX_COL: equ (0h & 03h) +AMUX4_1_COL_COUNT: equ (0h & 80h) +AMUX4_1_MUX_MASK: equ (03 << (0h<<1)) + +AMUX4_1_PORT0_0: equ 0h +AMUX4_1_PORT0_2: equ 1h +AMUX4_1_PORT0_4: equ 2h +AMUX4_1_PORT0_6: equ 3h + +AMUX4_1_PORT0_1: equ 0h +AMUX4_1_PORT0_3: equ 1h +AMUX4_1_PORT0_5: equ 2h +AMUX4_1_PORT0_7: equ 3h + +; end of file AMUX4_1.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm new file mode 100644 index 0000000..51833db --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.asm @@ -0,0 +1,284 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.asm +;; Version: 4.3, Updated on 2015/3/4 at 22:25:9 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: DAC6 User Module software implementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC6_VGND.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export DAC6_VGND_Start +export _DAC6_VGND_Start +export DAC6_VGND_SetPower +export _DAC6_VGND_SetPower + +export DAC6_VGND_WriteBlind +export _DAC6_VGND_WriteBlind +export DAC6_VGND_WriteStall +export _DAC6_VGND_WriteStall + +export DAC6_VGND_Stop +export _DAC6_VGND_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 1 Switched Cap Block configured as shown. This API depends +;; on knowing the exact personalization of CR0 and CR3 bitfields +;; for time efficiency. +;; +;; * For a Mask/Val pair, this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; BIT FIELD Mask/Val Function +;; ----------------- ----- -------------------- +;; CR0.FCap 80/1 Feedback cap size 32 +;; CR0.ClockPhase 40/0 Normal phase +;; CR0.ASign 20/* User parameter +;; CR0.ACap 1F/* User parameter +;; +;; CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; CR1.AMux E0/4 (SCB) VRef High +;; CR1.BCap 1F/0 Prune B-input branch +;; +;; CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; CR2.CmpBus 40/0 Comparator Bus Disable +;; CR2.AutoZero 20/1 Auto-Zero enabled on Phi 1 +;; CR2.CCap 1F/0 Prune C-input branch +;; +;; CR3.ARefSelect C0/0 Use AGND (to invert) +;; CR3.FSW1 20/1 Feedback Cap Used +;; CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; CR3.BSW 08/0 (SCB) Don't Care - this branch pruned +;; CR3.BMux 04/0 (SCB) Don't Care - this branch pruned +;; CR3.PWR 03/* User Parameter: Power, def=OFF +;; + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +cOFFSET: equ 31 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 ALWAYS looks + ; like this regardless of SC block type + ; or where the DAC gets mapped. + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Start +; FUNCTION NAME: DAC6_VGND_SetPower +; +; DESCRIPTION: +; Start / SetPower - Applies power setting to the module's SC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=High +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_Start: +_DAC6_VGND_Start: + DAC6_VGND_SetPower: +_DAC6_VGND_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_1 + and A, bPWRMASK + or A, bCR3 ; Set all other bits in addition to power + mov reg[DAC6_VGND_CR3], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteBlind +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks +; Lowest overhead, but output may not settle to correct value until the +; phi2 of next full cycle following the write. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC6_VGND_WriteBlind: +_DAC6_VGND_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc BlindPositive + ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted! + cpl A ; bit 0 is a "1" so, following 1 byte "inc" works + inc A ; (otherwise, we'd have to "add A, 2") + or A, 40h ; Make it negative by forcing sign bit + jmp BlindMagSet +BlindPositive: + nop + nop + nop + jmp BlindMagSet +BlindMagSet: + asr A ; Divide by two to finish up + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + mov reg[DAC6_VGND_CR0], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_WriteStall +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with fast analog clocks or when the +; resulting interrupt latencies, comparable to the update period, +; can be tolerated comfortably. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; The accumulator, A, contains the input in the appropriate format. +; The data format is determined by the setting of the DataFormat parameter +; in the Device Editor. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_WriteStall: +_DAC6_VGND_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_1 + IF DAC6_VGND_OFFSETBINARY + ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + ;; Following converts it to 2's complement: + sub A, cOFFSET ; Apply the offset + ENDIF + IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + ;; Data is a byte in standard 2's complement form with value in [-31..+31] + ;; Following converts it to Sign & Magnitude form "00smmmmm" + ;; where sign, "s", is 1 for negative numbers; 0 for positive + ;; and "m" is the magnitude. + asl A ; Multiply by 2 and put sign in Carry flag + jnc StallPositive + cpl A ; "Invert" step of complement 2's complement + inc A ; "Add 1" step of complement 2's complement + or A, 40h ; Make it negative + jmp StallMagSet +StallPositive: + nop + nop + nop + jmp StallMagSet +StallMagSet: + asr A ; Divide by two to finish conversion + ENDIF + + ;; Data is in Sign & Magnitude form. + ;; Set FCap and ClockPhase bits + or A, DAC6_VGND_CR0_HIBITS + M8C_Stall + mov reg[DAC6_VGND_CR0], A + M8C_Unstall + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC6_VGND_Stop +; +; DESCRIPTION: +; Turns off power to the SC block +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + + DAC6_VGND_Stop: +_DAC6_VGND_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC6_VGND_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC6_VGND.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h new file mode 100644 index 0000000..a2842c8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.h @@ -0,0 +1,56 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC6_VGND.h +// Version: 4.3, Updated on 2015/3/4 at 22:25:9 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: DAC6 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC6_VGND_INCLUDE +#define DAC6_VGND_INCLUDE + +#include <M8C.h> + +//------------------------------------------------- +// Defines for DAC6_VGND API's. +//------------------------------------------------- +#define DAC6_VGND_OFF 0 +#define DAC6_VGND_LOWPOWER 1 +#define DAC6_VGND_MEDPOWER 2 +#define DAC6_VGND_HIGHPOWER 3 +#define DAC6_VGND_FULLPOWER 3 + +#pragma fastcall16 DAC6_VGND_Start +#pragma fastcall16 DAC6_VGND_SetPower +#pragma fastcall16 DAC6_VGND_WriteBlind +#pragma fastcall16 DAC6_VGND_WriteStall +#pragma fastcall16 DAC6_VGND_Stop + +//------------------------------------------------- +// Prototypes of the DAC6_VGND API. +//------------------------------------------------- +extern void DAC6_VGND_Start(BYTE bPowerSetting); +extern void DAC6_VGND_SetPower(BYTE bPowerSetting); +extern void DAC6_VGND_WriteBlind(CHAR cOutputValue); +extern void DAC6_VGND_WriteStall(CHAR cOutputValue); +extern void DAC6_VGND_Stop(void); + + +//------------------------------------------------- +// Register Addresses for DAC6_VGND +//------------------------------------------------- +#pragma ioport DAC6_VGND_CR0: 0x080 +BYTE DAC6_VGND_CR0; +#pragma ioport DAC6_VGND_CR1: 0x081 +BYTE DAC6_VGND_CR1; +#pragma ioport DAC6_VGND_CR2: 0x082 +BYTE DAC6_VGND_CR2; +#pragma ioport DAC6_VGND_CR3: 0x083 +BYTE DAC6_VGND_CR3; + +#endif +// end of file DAC6_VGND.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc new file mode 100644 index 0000000..83fe08c --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC6_VGND.inc @@ -0,0 +1,49 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC6_VGND.inc +;; Version: 4.3, Updated on 2015/3/4 at 22:25:9 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the DAC6 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +;-------------------------------------------------- +; Constants for DAC6_VGND API's +;-------------------------------------------------- +DAC6_VGND_OFF: equ 00h +DAC6_VGND_LOWPOWER: equ 01h +DAC6_VGND_MEDPOWER: equ 02h +DAC6_VGND_HIGHPOWER: equ 03h + +DAC6_VGND_OffsetBinary: equ 04h +DAC6_VGND_TwosComplement: equ 02h +DAC6_VGND_SignAndMagnitude: equ 01h +DAC6_VGND_RawRegister: equ 00h + +DAC6_VGND_DATAFORMAT: equ 7h +DAC6_VGND_OFFSETBINARY: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_OffsetBinary +DAC6_VGND_TWOSCOMPLEMENT: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_TwosComplement +DAC6_VGND_SIGNANDMAGNITUDE: equ DAC6_VGND_DATAFORMAT & DAC6_VGND_SignAndMagnitude + +DAC6_VGND_PHASE_Normal: equ 0 +DAC6_VGND_PHASE_Swapped: equ 1 +DAC6_VGND_PHASE_SWAP: equ DAC6_VGND_PHASE_Normal + +IF DAC6_VGND_PHASE_SWAP + DAC6_VGND_CR0_HIBITS: equ C0h +ELSE + DAC6_VGND_CR0_HIBITS: equ 80h +ENDIF + + +;-------------------------------------------------- +; Register Address Constants for DAC6_VGND +;-------------------------------------------------- +DAC6_VGND_CR0: equ 80h +DAC6_VGND_CR1: equ 81h +DAC6_VGND_CR2: equ 82h +DAC6_VGND_CR3: equ 83h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm new file mode 100644 index 0000000..79bb7e5 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.asm @@ -0,0 +1,401 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.asm +;; Version: 2.2, Updated on 2015/3/4 at 22:25:15 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: DAC9 User Module software inplementation file. +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "DAC9_Ia.inc" +include "m8c.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export DAC9_Ia_Start +export _DAC9_Ia_Start +export DAC9_Ia_SetPower +export _DAC9_Ia_SetPower + +export DAC9_Ia_WriteBlind +export _DAC9_Ia_WriteBlind +export DAC9_Ia_WriteBlind2B +export _DAC9_Ia_WriteBlind2B + +export DAC9_Ia_WriteStall +export _DAC9_Ia_WriteStall +export DAC9_Ia_WriteStall2B +export _DAC9_Ia_WriteStall2B + +export DAC9_Ia_Stop +export _DAC9_Ia_Stop + +;; ----------------------------------------------------------------- +;; Register Definitions +;; ----------------------------------------------------------------- +;; +;; Uses 2 Switched Cap Blocks, LSB and MSB, configured as shown below. +;; This API depends on knowing the exact personalization of CR0 +;; and CR3 bitfields for time efficiency. +;; +;; * For a Mask/Val pair this simply indicates that the value is +;; determined by the user either through config-time parameteriza- +;; tion or run-time manipulation. +;; +;; Setting for output=AGND to OBUS when LSB in ASA10 and MSB in ASB20: +;; LSB.CR0=80 MSB.CR0=80 +;; LSB.CR1=40 MSB.CR1=81 +;; LSB.CR2=20 MSB.CR2=A0 +;; LSB.CR3=33 MSB.CR3=3B +;; +;; BIT FIELD Mask/Val Function +;; ----------------- -------- -------------------- +;; LSB.CR0.FCap 80/1 Feedback cap size 32 +;; LSB.CR0.ClockPhase 40/0 Normal phase +;; LSB.CR0.ASign 20/* User parameter +;; LSB.CR0.ACap 1F/* User parameter +;; +;; LSB.CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care +;; LSB.CR1.BCap 1F/0 Prune B-input branch +;; +;; LSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; LSB.CR2.CmpBus 40/0 Comparator Bus Disabled +;; LSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; LSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; LSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; LSB.CR3.FSW1 20/1 Feedback Cap Used +;; LSB.CR3.FSW0 10/1 Feedback Cap Grounded for AZ +;; LSB.CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned +;; LSB.CR3.PWR 03/* User Parameter: Power; default=OFF +;; +;; MSB.CR0.FCap 80/1 Feedback cap size 32 +;; MSB.CR0.ClockPhase 40/0 Normal phase +;; MSB.CR0.ASign 20/* User parameter +;; MSB.CR0.ACap 1F/* User parameter +;; +;; MSB.CR1.AMux E0/4 (SCB) VRef High +;; MSB.CR1.BCap 1F/1 Subrange LSB block output by BCap/FCap (1/32) +;; +;; MSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable +;; MSB.CR2.CmpBus 40/0 Comparator Bus Disable +;; MSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 +;; MSB.CR2.CCap 1F/0 Prune C-input branch +;; +;; MSB.CR3.ARefSelect C0/0 Use AGND (to invert) +;; MSB.CR3.FSW1 20/1 Feedback Cap Used +;; MSB.CR3.FSW2 10/1 Feedback Cap Grounded for AZ +;; MSB.CR3.BSW 08/0 (SCB) why is this cont time instead of phi2?? +;; MSB.CR3.BMux 04/? (SCB) LSB block output; determined by placement +;; MSB.CR3.PWR 03/* User Parameter: Power, default=OFF + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- +iOFFSET: equ 255 ; Conversion term for offset binary to 2's C +bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg +bCR3: equ 30h ; Except for power bits, CR3 always looks like + ; this regardless of SC block type or location. +bSMMASK: equ 3Fh ; Sign and Magnitude bits mask +bSIGNMASK: equ 20h ; Sign bit mask +bMAGMASK: equ 1Fh ; Magnitude bits mask +bHIGHBITS: equ 80h ; Setting for FCap and ClockPhase +bHBMASK: equ C0h ; Mask for FCap and ClockPhase + + +;;--------------------------- + macro Stall +;;--------------------------- + mov reg[ASY_CR], 1 + endm + +;;--------------------------- + macro UnStall +;;--------------------------- + mov reg[ASY_CR], 0 + endm + + AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Start +; FUNCTION NAME: DAC9_Ia_SetPower +; +; DESCRIPTION: +; Applies power setting to the module's analog PSoC blocks. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the power setting 0=Off, 1=Low, 2=Med, 3=Full. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Start: +_DAC9_Ia_Start: + DAC9_Ia_SetPower: +_DAC9_Ia_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, bPWRMASK ; trim input to bits of interest + mov X, SP ; Set stack frame pointer + push A + ;; read CR3 registers, modify power bits & write back + mov A, reg[DAC9_Ia_MSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in MSB register image + mov reg[DAC9_Ia_MSB_CR3], A + mov A, reg[DAC9_Ia_LSB_CR3] + and a, ~bPWRMASK ; clear old setting + or A, [X] ; set power in LSB register image + mov reg[DAC9_Ia_LSB_CR3], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteBlind +; FUNCTION NAME: DAC9_Ia_WriteBlind2B +; +; DESCRIPTION: +; Modify the DAC's update value without worrying about the clocks. +; Lowest overhead, but may cause glitches on the output. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteBlind: +_DAC9_Ia_WriteBlind: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced using [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc BlindAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp BlindMagSet +BlindAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp BlindMagSet +BlindMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + pop A ; LSB: 76543210 (mag) + push X ; MSB + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + + ENDIF + + DAC9_Ia_WriteBlind2B: +_DAC9_Ia_WriteBlind2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + mov reg[DAC9_Ia_MSB_CR0],A + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_WriteStall +; FUNCTION NAME: DAC9_Ia_WriteStall2B +; +; DESCRIPTION: +; Modify the DAC's update value, stalling the CPU if necessary. +; This routine should be used with faster analog clocks or when the +; effect of prolonging interrupt latencies can be safely tolerated. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the update value if data format is offset binary or +; For offset binary format: A contains the low byte; X the high byte. +; For twos complement format: A contains the low byte; X the high byte. +; For two-byte sign-and-magnitude format: +; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, +; where t=s\ (the inverted sign). +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_WriteStall: +_DAC9_Ia_WriteStall: + + RAM_PROLOGUE RAM_USE_CLASS_2 + IF DAC9_Ia_OFFSETBINARY + ;; Data is an unsigned byte value in [0..510] (511 unique values). + ;; Following converts it to 2's complement: + sub A, iOFFSET + swap A, X ; A <- upper, X <- lower + sbb A, 0 + swap A, X ; A <- lower, X <- upper + ENDIF + + IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + swap A, X ; A <- upper, X <- lower + push A ; Save Sign on stack - referenced via [X-N] + ; Sign is either FFh or 00h + dec A ; set or clear Carry Flag + ; A is now FEh(CF=0) or FFh(CF=1) + mov A,X ; MSB: 76543210 + jc StallAdjustCycles + cpl A ; change negative magnitude to positive + inc A ; offset for twos complement + jmp StallMagSet +StallAdjustCycles: + cpl A ; make cycles used for positive same as + cpl A ; cycles used for negative + jmp StallMagSet +StallMagSet: + push A ; MSB: 76543210 (mag) + asr A ; MSB: 77654321 + asr A ; MSB: 77765432 + asr A ; MSB: 77776543 + and A,bMAGMASK ; MSB: 00076543 + mov X,SP + and [X-2],bSIGNMASK + or A,[X-2] ; MSB: 00s76543 + mov X,A ; MSB + + pop A ; LSB: 76543210 (mag) + push X ; MSB + + asl A ; LSB: 65432100 + asl A ; LSB: 54321000 + and A,bMAGMASK ; LSB: 00021000 + mov X,SP + or A,[X-2] ; LSB: 00s21000 + xor A,bSIGNMASK ; LSB: 00t21000 + ; LSB in A + pop X ; MSB in X + add SP, -1 ; clean up stack - from saving the sign + ENDIF + + DAC9_Ia_WriteStall2B: +_DAC9_Ia_WriteStall2B: +; IF DAC9_Ia_SIGNANDMAGNITUDE + or A,bHIGHBITS ; LSB: 10t21000 + swap A,X ; LSB in X, MSB in A + or A,bHIGHBITS ; MSB: 10s76543 + M8C_Stall + mov reg[DAC9_Ia_MSB_CR0],A + M8C_Unstall + mov A,X ; LSB in A + mov reg[DAC9_Ia_LSB_CR0],A +; ENDIF + + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: DAC9_Ia_Stop +; +; DESCRIPTION: +; Cuts power to the user module. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + DAC9_Ia_Stop: +_DAC9_Ia_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[DAC9_Ia_MSB_CR3], ~bPWRMASK + and reg[DAC9_Ia_LSB_CR3], ~bPWRMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +; End of File DAC9_Ia.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h new file mode 100644 index 0000000..9c1ce88 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.h @@ -0,0 +1,93 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: DAC9_Ia.h +// Version: 2.2, Updated on 2015/3/4 at 22:25:15 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: DAC9 User Module C Language interface file. +// +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef DAC9_Ia_INCLUDE +#define DAC9_Ia_INCLUDE + +#include <m8c.h> + +//------------------------------------------------- +// Defines for DAC9_Ia API's. +//------------------------------------------------- +// Power Setting Defines +#define DAC9_Ia_OFF 0 +#define DAC9_Ia_LOWPOWER 1 +#define DAC9_Ia_MEDPOWER 2 +#define DAC9_Ia_HIGHPOWER 3 +#define DAC9_Ia_FULLPOWER 3 + +// Define constants for declaring function prototypes based on DataFormat parameter +#define DAC9_Ia_OffsetBinary 0x04 +#define DAC9_Ia_TwosComplement 0x02 +#define DAC9_Ia_SignAndMagnitude 0x01 +#define DAC9_Ia_RawRegister 0x00 +#define DAC9_Ia_DATAFORMAT 0x7 +#define DAC9_Ia_OFFSETBINARY DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +#define DAC9_Ia_TWOSCOMPLEMENT DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +#define DAC9_Ia_SIGNANDMAGNITUDE DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +// Declare function fastcall16 pragmas +#pragma fastcall16 DAC9_Ia_Start +#pragma fastcall16 DAC9_Ia_SetPower +#pragma fastcall16 DAC9_Ia_Stop + +//------------------------------------------------- +// Prototypes of the DAC9_Ia API. +//------------------------------------------------- +extern void DAC9_Ia_Start(BYTE bPowerSetting); +extern void DAC9_Ia_SetPower(BYTE bPowerSetting); +extern void DAC9_Ia_Stop(void); + +// Declare overloaded functions based on DataForamt parameter selected +#if DAC9_Ia_OFFSETBINARY + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(WORD wOutputValue); + extern void DAC9_Ia_WriteStall(WORD wOutputValue); +#else + #if DAC9_Ia_TWOSCOMPLEMENT + #pragma fastcall16 DAC9_Ia_WriteBlind + #pragma fastcall16 DAC9_Ia_WriteStall + extern void DAC9_Ia_WriteBlind(INT iOutputValue); + extern void DAC9_Ia_WriteStall(INT iOutputValue); + #else //DAC9_Ia_SIGNANDMAGNITUDE + #pragma fastcall16 DAC9_Ia_WriteBlind2B + #pragma fastcall16 DAC9_Ia_WriteStall2B + extern void DAC9_Ia_WriteBlind2B(BYTE bLSB, BYTE bMSB); + extern void DAC9_Ia_WriteStall2B(BYTE bLSB, BYTE bMSB); + #endif +#endif + +//------------------------------------------------- +// Hardware Addresses for DAC9_Ia +//------------------------------------------------- + +#pragma ioport DAC9_Ia_LSB_CR0: 0x090 // LSB Analog control register 0 +BYTE DAC9_Ia_LSB_CR0; +#pragma ioport DAC9_Ia_LSB_CR1: 0x091 // LSB Analog control register 1 +BYTE DAC9_Ia_LSB_CR1; +#pragma ioport DAC9_Ia_LSB_CR2: 0x092 // LSB Analog control register 2 +BYTE DAC9_Ia_LSB_CR2; +#pragma ioport DAC9_Ia_LSB_CR3: 0x093 // LSB Analog control register 3 +BYTE DAC9_Ia_LSB_CR3; + +#pragma ioport DAC9_Ia_MSB_CR0: 0x094 // MSB Analog control register 0 +BYTE DAC9_Ia_MSB_CR0; +#pragma ioport DAC9_Ia_MSB_CR1: 0x095 // MSB Analog control register 1 +BYTE DAC9_Ia_MSB_CR1; +#pragma ioport DAC9_Ia_MSB_CR2: 0x096 // MSB Analog control register 2 +BYTE DAC9_Ia_MSB_CR2; +#pragma ioport DAC9_Ia_MSB_CR3: 0x097 // MSB Analog control register 3 +BYTE DAC9_Ia_MSB_CR3; + +#endif +// end of file DAC9_Ia.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc new file mode 100644 index 0000000..acca678 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/DAC9_Ia.inc @@ -0,0 +1,68 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: DAC9_Ia.inc +;; Version: 2.2, Updated on 2015/3/4 at 22:25:15 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the DAC9 user module interface. +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for DAC9_Ia API's +;-------------------------------------------------- +DAC9_Ia_OFF: equ 00h +DAC9_Ia_LOWPOWER: equ 01h +DAC9_Ia_MEDPOWER: equ 02h +DAC9_Ia_HIGHPOWER: equ 03h +DAC9_Ia_FULLPOWER: equ 03h + +DAC9_Ia_LSB_CR0: equ 90h +DAC9_Ia_LSB_CR1: equ 91h +DAC9_Ia_LSB_CR2: equ 92h +DAC9_Ia_LSB_CR3: equ 93h +DAC9_Ia_MSB_CR0: equ 94h +DAC9_Ia_MSB_CR1: equ 95h +DAC9_Ia_MSB_CR2: equ 96h +DAC9_Ia_MSB_CR3: equ 97h + +DAC9_Ia_OffsetBinary: equ 04h +DAC9_Ia_TwosComplement: equ 02h +DAC9_Ia_SignAndMagnitude: equ 01h +DAC9_Ia_RawRegister: equ 00h + +DAC9_Ia_DATAFORMAT: equ 7h +DAC9_Ia_OFFSETBINARY: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_OffsetBinary +DAC9_Ia_TWOSCOMPLEMENT: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_TwosComplement +DAC9_Ia_SIGNANDMAGNITUDE: equ DAC9_Ia_DATAFORMAT & DAC9_Ia_SignAndMagnitude + +DAC9_Ia_PHASE_Normal: equ 0 +DAC9_Ia_PHASE_Swapped: equ 1 + +DAC9_Ia_PHASE_SWAP: equ DAC9_Ia_PHASE_Normal + +IF DAC9_Ia_PHASE_SWAP + DAC9_Ia_CR0_HIBITS: equ C0h +ELSE + DAC9_Ia_CR0_HIBITS: equ 80h +ENDIF + +;-------------------------------------------------- +; Register Address Constants for DAC9_Ia +;-------------------------------------------------- +DAC9_Ia_LSB_CR0: equ 90h ; LSB SC Block Control Register 0 +DAC9_Ia_LSB_CR1: equ 91h ; LSB SC Block Control Register 1 +DAC9_Ia_LSB_CR2: equ 92h ; LSB SC Block Control Register 2 +DAC9_Ia_LSB_CR3: equ 93h ; LSB SC Block Control Register 3 + +DAC9_Ia_MSB_CR0: equ 94h ; MSB SC Block Control Register 0 +DAC9_Ia_MSB_CR1: equ 95h ; MSB SC Block Control Register 1 +DAC9_Ia_MSB_CR2: equ 96h ; MSB SC Block Control Register 2 +DAC9_Ia_MSB_CR3: equ 97h ; MSB SC Block Control Register 3 + +; end of file DAC9_Ia.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h new file mode 100644 index 0000000..4e48100 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.h @@ -0,0 +1,86 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.4.3191 +******************************************************************************/ +/****************************************************************************** +* This file contains defines to support oscillator register initialization +* for CY8C24423B +******************************************************************************/ + +#define CPU_CLOCK 0x3 //CPU clock value +#define CPU_CLOCK_MASK 0x7 //CPU clock mask +#define CPU_CLOCK_JUST 0x3 //CPU clock value justified +#define SELECT_32K 0x0 //32K select value +#define SELECT_32K_MASK 0x80 //32K select mask +#define SELECT_32K_JUST 0x0 //32K select value justified +#define PLL_MODE 0x0 //PLL mode value +#define PLL_MODE_MASK 0x40 //PLL mode mask +#define PLL_MODE_JUST 0x0 //PLL mode value justified +#define SLEEP_TIMER 0x0 //Sleep Timer value +#define SLEEP_TIMER_MASK 0x18 //Sleep Timer mask +#define SLEEP_TIMER_JUST 0x0 //Sleep Timer value justified +#define SWITCH_MODE_PUMP 0x1 //Switch Mode Pump value +#define SWITCH_MODE_PUMP_MASK 0x80 //Switch Mode Pump mask +#define SWITCH_MODE_PUMP_JUST 0x80 //Switch Mode Pump value justified +#define TRIP_VOLTAGE 0x6 //Trip Voltage +#define POWER_SETTING 0x10 //Power Setting [ Vcc / SysClk freq ] 0x10 = 5.0V / 24MHz + // 0x08 = 3.3V / 24MHz + // 0x09 = 3.3V / 12MHz +#define WATCHDOG_ENABLE 0x0 //Watchdog Enable 1 = Enable +#define CLOCK_DIV_VC1 0x0 // VC1 clock divider +#define CLOCK_DIV_VC1_MASK 0xf0 // VC1 clock divider mask +#define CLOCK_DIV_VC1_JUST 0x0 // jVC1 clock divider ustified +#define CLOCK_DIV_VC2 0xb // VC2 clock divider +#define CLOCK_DIV_VC2_MASK 0xf // VC2 clock divider mask +#define CLOCK_DIV_VC2_JUST 0xb // VC2 clock divider justified +#define CLOCK_INPUT_VC3 0x0 // VC3 clock source +#define CLOCK_INPUT_VC3_MASK 0x3 // VC3 clock source mask +#define CLOCK_INPUT_VC3_JUST 0x0 // VC3 clock source justified +#define CLOCK_DIV_VC3 0x2f // VC3 clock divider +#define CLOCK_DIV_VC3_MASK 0xff // VC3 clock divider mask +#define CLOCK_DIV_VC3_JUST 0x2f // VC3 clock divider justified +#define ANALOG_BUFFER_PWR 0x1 // Analog buffer power level +#define ANALOG_BUFFER_PWR_MASK 0x1 // Analog buffer power level mask +#define ANALOG_BUFFER_PWR_JUST 0x1 // Analog buffer power level justified +#define ANALOG_POWER 0x7 // Analog power control +#define ANALOG_POWER_MASK 0x7 // Analog power control mask +#define ANALOG_POWER_JUST 0x7 // Analog power control justified +#define OP_AMP_BIAS 0x0 // Op amp bias level +#define OP_AMP_BIAS_MASK 0x40 // Op amp bias level mask +#define OP_AMP_BIAS_JUST 0x0 // Op amp bias level justified +#define REF_MUX 0x7 // Ref mux setting +#define REF_MUX_MASK 0x38 // Ref mux setting mask +#define REF_MUX_JUST 0x38 // Ref mux setting justified +#define AGND_BYPASS 0x0 // AGndBypass setting +#define AGND_BYPASS_MASK 0x40 // AGndBypass setting mask +#define AGND_BYPASS_JUST 0x0 // AGndBypass setting justified +#define SYSCLK_SOURCE 0x0 // SysClk Source setting +#define SYSCLK_SOURCE_MASK 0x4 // SysClk Source setting mask +#define SYSCLK_SOURCE_JUST 0x0 // SysClk Source setting justified +#define SYSCLK_2_DISABLE 0x0 // SysClk*2 Disable setting +#define SYSCLK_2_DISABLE_MASK 0x1 // SysClk*2 Disable setting mask +#define SYSCLK_2_DISABLE_JUST 0x0 // SysClk*2 Disable setting justified +// +// register initial values +// +#define ANALOG_IO_CONTROL 0x29 //Analog IO Control register (ABF_CR) +#define PORT_0_GLOBAL_SELECT 0x0 //Port 0 global select register (PRT0GS) +#define PORT_0_DRIVE_0 0x4 //Port 0 drive mode 0 register (PRT0DM0) +#define PORT_0_DRIVE_1 0xfb //Port 0 drive mode 1 register (PRT0DM1) +#define PORT_0_DRIVE_2 0xfb //Port 0 drive mode 1 register (PRT0DM2) +#define PORT_0_INTENABLE 0x0 //Port 0 interrupt enable register (PRT0IE) +#define PORT_0_INTCTRL_0 0x0 //Port 0 interrupt control 0 register (PRT0IC0) +#define PORT_0_INTCTRL_1 0x0 //Port 0 interrupt control 1 register (PRT0IC1) +#define PORT_1_GLOBAL_SELECT 0x70 //Port 1 global select register (PRT1GS) +#define PORT_1_DRIVE_0 0x70 //Port 1 drive mode 0 register (PRT1DM0) +#define PORT_1_DRIVE_1 0x8f //Port 1 drive mode 1 register (PRT1DM1) +#define PORT_1_DRIVE_2 0x8f //Port 1 drive mode 2 register (PRT1DM2) +#define PORT_1_INTENABLE 0x0 //Port 1 interrupt enable register (PRT1IE) +#define PORT_1_INTCTRL_0 0x0 //Port 1 interrupt control 0 register (PRT1IC0) +#define PORT_1_INTCTRL_1 0x0 //Port 1 interrupt control 1 register (PRT1IC1) +#define PORT_2_GLOBAL_SELECT 0x0 //Port 2 global select register (PRT2GS) +#define PORT_2_DRIVE_0 0x7f //Port 2 drive mode 0 register (PRT2DM0) +#define PORT_2_DRIVE_1 0x80 //Port 2 drive mode 1 register (PRT2DM1) +#define PORT_2_DRIVE_2 0x0 //Port 2 drive mode 2 register (PRT2DM2) +#define PORT_2_INTENABLE 0x0 //Port 2 interrupt enable register (PRT2IE) +#define PORT_2_INTCTRL_0 0x0 //Port 2 interrupt control 0 register (PRT2IC0) +#define PORT_2_INTCTRL_1 0x0 //Port 2 interrupt control 1 register (PRT2IC1) diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc new file mode 100644 index 0000000..cb047f3 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/GlobalParams.inc @@ -0,0 +1,118 @@ +; Generated by PSoC Designer 5.4.3191 +; +;============================================================================= +; FILENAME: GlobalParams.inc +; DATE: 2 August 2004 +; +; DESCRIPTION: +; Constants describing many of the global parameter settings. +; This file contains equates to support oscillator register initialization +; for the CY8C24423B +; +; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +;============================================================================= +; + +CPU_CLOCK: equ 3h ;CPU clock value +CPU_CLOCK_MASK: equ 7h ;CPU clock mask +CPU_CLOCK_JUST: equ 3h ;CPU clock value justified +SELECT_32K: equ 0h ;32K select value +SELECT_32K_MASK: equ 80h ;32K select mask +SELECT_32K_JUST: equ 0h ;32K select value justified +PLL_MODE: equ 0h ;PLL mode value +PLL_MODE_MASK: equ 40h ;PLL mode mask +PLL_MODE_JUST: equ 0h ;PLL mode value justified +SLEEP_TIMER: equ 0h ;Sleep Timer value +SLEEP_TIMER_MASK: equ 18h ;Sleep Timer mask +SLEEP_TIMER_JUST: equ 0h ;Sleep Timer value justified +SWITCH_MODE_PUMP: equ 1h ;Switch Mode Pump setting +SWITCH_MODE_PUMP_MASK: equ 80h ;Switch Mode Pump mask +SWITCH_MODE_PUMP_JUST: equ 80h ;Switch Mode Pump justified +LVD_TBEN: equ 0 ; Low Voltage Throttle-back enable value +LVD_TBEN_MASK: equ 8 ; Low Voltage Throttle-back enable mask +LVD_TBEN_JUST: equ 0 ; Low Voltage Throttle-back enable justified +TRIP_VOLTAGE: equ 6h ;Trip Voltage value +TRIP_VOLTAGE_MASK: equ 7h ;Trip Voltage mask +TRIP_VOLTAGE_JUST: equ 6h ;Trip Voltage justified + +POWER_SETTING: equ 10h +POWER_SET_5V0: equ 10h ; MASK for 5.0V operation, fast and slow +POWER_SET_5V0_24MHZ: equ 10h ; Power Setting value for 5.0V fast +POWER_SET_5V0_6MHZ: equ 11h ; Power Setting value for 5.0V slow +POWER_SET_3V3: equ 08h ; MASK for 3.3V operation, fast and slow +POWER_SET_3V3_24MHZ: equ 08h ; Power Setting value for 3.3V fast +POWER_SET_3V3_6MHZ: equ 09h ; Power Setting value for 3.3V slow +POWER_SET_2V7: equ 06h ; MASK for 2.7V operation, fast and slow +POWER_SET_2V7_12MHZ: equ 04h ; MASK for 2.7V, 12MHZ operation +POWER_SET_2V7_6MHZ: equ 02h ; MASK for 2.7V, 6MHZ operation +POWER_SET_SLOW_IMO: equ 01h ; MASK for slow Internal Main Oscillator (IMO) + +COMM_RX_PRESENT: equ 0 ;1 = TRUE +WATCHDOG_ENABLE: equ 0 ;Watchdog Enable 1 = Enable + +CLOCK_DIV_VC1: equ 0h ;VC1 clock divider +CLOCK_DIV_VC1_MASK: equ f0h ;VC1 clock divider mask +CLOCK_DIV_VC1_JUST: equ 0h ;VC1 clock divider justified +CLOCK_DIV_VC2: equ bh ;VC2 clock divider +CLOCK_DIV_VC2_MASK: equ fh ;VC2 clock divider mask +CLOCK_DIV_VC2_JUST: equ bh ;VC2 clock divider justified +CLOCK_INPUT_VC3: equ 0h ;VC3 clock source +CLOCK_INPUT_VC3_MASK: equ 3h ;VC3 clock source mask +CLOCK_INPUT_VC3_JUST: equ 0h ;VC3 clock source justified +CLOCK_DIV_VC3: equ 2fh ;VC3 clock divider +CLOCK_DIV_VC3_MASK: equ ffh ;VC3 clock divider mask +CLOCK_DIV_VC3_JUST: equ 2fh ;VC3 clock divider justified +ANALOG_BUFFER_PWR: equ 1h ;Analog buffer power level +ANALOG_BUFFER_PWR_MASK: equ 1h ;Analog buffer power level mask +ANALOG_BUFFER_PWR_JUST: equ 1h ;Analog buffer power level justified +ANALOG_POWER: equ 7h ;Analog power control +ANALOG_POWER_MASK: equ 7h ;Analog power control mask +ANALOG_POWER_JUST: equ 7h ;Analog power control justified +OP_AMP_BIAS: equ 0h ;Op amp bias level +OP_AMP_BIAS_MASK: equ 40h ;Op amp bias level mask +OP_AMP_BIAS_JUST: equ 0h ;Op amp bias level justified +REF_MUX: equ 7h ;Ref mux setting +REF_MUX_MASK: equ 38h ;Ref mux setting mask +REF_MUX_JUST: equ 38h ;Ref mux setting justified +AGND_BYPASS: equ 0h ;AGndBypass setting +AGND_BYPASS_MASK: equ 40h ;AGndBypass setting mask +AGND_BYPASS_JUST: equ 0h ;AGndBypass setting justified +SYSCLK_SOURCE: equ 0h ;SysClk Source setting +SYSCLK_SOURCE_MASK: equ 4h ;SysClk Source setting mask +SYSCLK_SOURCE_JUST: equ 0h ;SysClk Source setting justified +SYSCLK_2_DISABLE: equ 0h ;SysClk*2 Disable setting +SYSCLK_2_DISABLE_MASK: equ 1h ;SysClk*2 Disable setting mask +SYSCLK_2_DISABLE_JUST: equ 0h ;SysClk*2 Disable setting justified +; +; register initial values +; +ANALOG_IO_CONTROL: equ 29h ;Analog IO Control register (ABF_CR) +PORT_0_GLOBAL_SELECT: equ 0h ;Port 0 global select register (PRT0GS) +PORT_0_DRIVE_0: equ 4h ;Port 0 drive mode 0 register (PRT0DM0) +PORT_0_DRIVE_1: equ fbh ;Port 0 drive mode 1 register (PRT0DM1) +PORT_0_DRIVE_2: equ fbh ;Port 0 drive mode 2 register (PRT0DM2) +PORT_0_INTENABLE: equ 0h ;Port 0 interrupt enable register (PRT0IE) +PORT_0_INTCTRL_0: equ 0h ;Port 0 interrupt control 0 register (PRT0IC0) +PORT_0_INTCTRL_1: equ 0h ;Port 0 interrupt control 1 register (PRT0IC1) +PORT_1_GLOBAL_SELECT: equ 70h ;Port 1 global select register (PRT1GS) +PORT_1_DRIVE_0: equ 70h ;Port 1 drive mode 0 register (PRT1DM0) +PORT_1_DRIVE_1: equ 8fh ;Port 1 drive mode 1 register (PRT1DM1) +PORT_1_DRIVE_2: equ 8fh ;Port 1 drive mode 2 register (PRT1DM2) +PORT_1_INTENABLE: equ 0h ;Port 1 interrupt enable register (PRT1IE) +PORT_1_INTCTRL_0: equ 0h ;Port 1 interrupt control 0 register (PRT1IC0) +PORT_1_INTCTRL_1: equ 0h ;Port 1 interrupt control 1 register (PRT1IC1) +PORT_2_GLOBAL_SELECT: equ 0h ;Port 2 global select register (PRT2GS) +PORT_2_DRIVE_0: equ 7fh ;Port 2 drive mode 0 register (PRT2DM0) +PORT_2_DRIVE_1: equ 80h ;Port 2 drive mode 1 register (PRT2DM1) +PORT_2_DRIVE_2: equ 0h ;Port 2 drive mode 2 register (PRT2DM2) +PORT_2_INTENABLE: equ 0h ;Port 2 interrupt enable register (PRT2IE) +PORT_2_INTCTRL_0: equ 0h ;Port 2 interrupt control 0 register (PRT2IC0) +PORT_2_INTCTRL_1: equ 0h ;Port 2 interrupt control 1 register (PRT2IC1) + +; end of file GlobalParams.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm new file mode 100644 index 0000000..2f3183f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.asm @@ -0,0 +1,184 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.asm +;; Version: 2.2, Updated on 2015/3/4 at 22:26:35 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: +;; Assembler source code for a two-OpAmp Instrumentation Amplifier +;; topology in the 25/26xxx family of PSoC devices +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "INSAMP.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export INSAMP_Start +export _INSAMP_Start +export INSAMP_SetPower +export _INSAMP_SetPower + +export INSAMP_SetGain +export _INSAMP_SetGain + +export INSAMP_Stop +export _INSAMP_Stop + + +AREA bss (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +POWERMASK: equ 0x03 ; Power field mask for CR2 +GAINMASK: equ F0h ; Gain field mask for CR0 + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Start +; FUNCTION NAME: INSAMP_Setpower +; +; DESCRIPTION: +; Sets power to the analog blocks used in this module. All three blocks +; are set to the same power setting (which should be the same as the +; analog reference power global parameter for best operation!). Constants +; for proper values are defined in asm and C interface files. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPowerSetting in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Start: +_INSAMP_Start: + INSAMP_SetPower: +_INSAMP_SetPower: + RAM_PROLOGUE RAM_USE_CLASS_2 + + and A, POWERMASK ; mask A to protect unchanged bits + mov X, SP ; define temp store location + + push A ; put power value in temp store + mov A, reg[INSAMP_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_INV_CR2], A + + mov A, reg[INSAMP_NON_INV_CR2] ; read power value + and A, ~POWERMASK ; clear power bits in A + or A, [X] ; combine power value with balance of reg. + mov reg[INSAMP_NON_INV_CR2], A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_SetGain +; +; DESCRIPTION: +; Applies gain set values to the module's PSoC blocks +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bGain in the A register +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; The A register contains the gain setting per values in .inc file. +; Values in range of 00h to 07h, upper 4 bits only. +; Gain value applied to NON_INV block. +; Difference (E0h-gain value) applied to _INV block. +; + INSAMP_SetGain: +_INSAMP_SetGain: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A, GAINMASK ; mask A to protect unchanged bits + mov X, SP ; set base address for local variable + + push A + mov A, reg[INSAMP_NON_INV_CR0] ; read gain value + and A, ~GAINMASK ; clear gain bits in A + or A, [X] ; combine gain value with balance of reg. + mov reg[INSAMP_NON_INV_CR0], A + + mov A, E0h ; load gain complement value + sub a, [X] ; calculate gain value for -INV block + push A + mov A, reg[INSAMP_INV_CR0] ; read gain complement value + and A, ~GAINMASK ; clear gain bits in A + or A, [X+1] ; combine gain value with balance of reg. + mov reg[INSAMP_INV_CR0], A + pop A + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: INSAMP_Stop +; +; DESCRIPTION: Turns off power to the two CT blocks +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + INSAMP_Stop: +_INSAMP_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + and reg[INSAMP_NON_INV_CR2], ~POWERMASK + and reg[INSAMP_INV_CR2], ~POWERMASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +; End of File INSAMP.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h new file mode 100644 index 0000000..b189bf9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.h @@ -0,0 +1,72 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: INSAMP.h +// Version: 2.2, Updated on 2015/3/4 at 22:26:35 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: C declarations for a two-OpAmp Instrumentation Amplifier +// topology in the 22/24/27/28xxx family of PSoC devices +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef INSAMP_INCLUDE +#define INSAMP_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 INSAMP_Start +#pragma fastcall16 INSAMP_SetPower +#pragma fastcall16 INSAMP_SetGain +#pragma fastcall16 INSAMP_Stop + +//------------------------------------------------- +// Prototypes of the INSAMP API. +//------------------------------------------------- +extern void INSAMP_Start(BYTE bPower); +extern void INSAMP_SetPower(BYTE bPower); +extern void INSAMP_SetGain(BYTE bGain); +extern void INSAMP_Stop(void); + +//------------------------------------------------- +// Defines for INSAMP API's. +//------------------------------------------------- +#define INSAMP_OFF 0 +#define INSAMP_LOWPOWER 1 +#define INSAMP_MEDPOWER 2 +#define INSAMP_HIGHPOWER 3 + +#define INSAMP_G16_0 0x00 +#define INSAMP_G8_00 0x10 +#define INSAMP_G5_33 0x20 +#define INSAMP_G4_00 0x30 +#define INSAMP_G3_20 0x40 +#define INSAMP_G2_67 0x50 +#define INSAMP_G2_27 0x60 +#define INSAMP_G2_00 0x70 + + +//------------------------------------------------- +// Hardware Register Definitions +//------------------------------------------------- + +#pragma ioport INSAMP_INV_CR0: 0x071 +BYTE INSAMP_INV_CR0; +#pragma ioport INSAMP_INV_CR1: 0x072 +BYTE INSAMP_INV_CR1; +#pragma ioport INSAMP_INV_CR2: 0x073 +BYTE INSAMP_INV_CR2; +#pragma ioport INSAMP_INV_CR3: 0x070 +BYTE INSAMP_INV_CR3; + +#pragma ioport INSAMP_NON_INV_CR0: 0x075 +BYTE INSAMP_NON_INV_CR0; +#pragma ioport INSAMP_NON_INV_CR1: 0x076 +BYTE INSAMP_NON_INV_CR1; +#pragma ioport INSAMP_NON_INV_CR2: 0x077 +BYTE INSAMP_NON_INV_CR2; +#pragma ioport INSAMP_NON_INV_CR3: 0x074 +BYTE INSAMP_NON_INV_CR3; + +#endif +// end of file INSAMP.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc new file mode 100644 index 0000000..64dba84 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/INSAMP.inc @@ -0,0 +1,50 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: INSAMP.inc +;; Version: 2.2, Updated on 2015/3/4 at 22:26:35 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: +;; Assembler declarations for a two-OpAmp Instrumentation Amplifier +;; topology in the 22/24/27/28xxx family of PSoC devices +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + +;-------------------------------------------------- +; Constants for INSAMP API's. +;-------------------------------------------------- + +INSAMP_OFF: equ 0 +INSAMP_LOWPOWER: equ 1 +INSAMP_MEDPOWER: equ 2 +INSAMP_HIGHPOWER: equ 3 + +INSAMP_G16_0: equ 00h +INSAMP_G8_00: equ 10h +INSAMP_G5_33: equ 20h +INSAMP_G4_00: equ 30h +INSAMP_G3_20: equ 40h +INSAMP_G2_67: equ 50h +INSAMP_G2_27: equ 60h +INSAMP_G2_00: equ 70h + +;-------------------------------------------------- +; Register Address Constants for INSAMP +;-------------------------------------------------- + +INSAMP_INV_CR0: equ 0x71 ; CT Block Control Register 0 +INSAMP_INV_CR1: equ 0x72 ; CT Block Control Register 1 +INSAMP_INV_CR2: equ 0x73 ; CT Block Control Register 2 +INSAMP_INV_CR3: equ 0x70 ; CT Block Control Register 3 + +INSAMP_NON_INV_CR0: equ 0x75 ; CT Block Control Register 0 +INSAMP_NON_INV_CR1: equ 0x76 ; CT Block Control Register 1 +INSAMP_NON_INV_CR2: equ 0x77 ; CT Block Control Register 2 +INSAMP_NON_INV_CR3: equ 0x74 ; CT Block Control Register 3 + + +; end of file INSAMP.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm new file mode 100644 index 0000000..97add52 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.asm @@ -0,0 +1,1354 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.asm +;; Version: 1.60, Updated on 2015/3/4 at 22:26:36 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: LCD User Module software implementation file. +;; +;; This set of functions is written for the common 2 and 4 line +;; LCDs that use the Hitachi HD44780A controller. +;; +;; LCD connections to PSoC port +;; +;; PX.0 ==> LCD D4 +;; PX.1 ==> LCD D5 +;; PX.2 ==> LCD D6 +;; PX.3 ==> LCD D7 +;; PX.4 ==> LCD E +;; PX.5 ==> LCD RS +;; PX.6 ==> LCD R/W +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to preserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "memory.inc" +include "LCD.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- + +export LCD_Start +export _LCD_Start +export LCD_Init +export _LCD_Init + +export LCD_WriteData +export _LCD_WriteData + +export LCD_Control +export _LCD_Control + +export LCD_PrString +export _LCD_PrString + +export LCD_PrCString +export _LCD_PrCString + +export LCD_Position +export _LCD_Position + +export LCD_PrHexByte +export _LCD_PrHexByte + +export LCD_PrHexInt +export _LCD_PrHexInt + +export LCD_Delay50uTimes +export _LCD_Delay50uTimes + +export LCD_Delay50u +export _LCD_Delay50u + +;----------------------------------------------- +; If bargraph functions not required, don't +; export the function names. +;----------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) +export LCD_InitBG +export _LCD_InitBG + +export LCD_InitVBG +export _LCD_InitVBG + +; NOTE: The two functions, +; +; LCD_DrawVBG and +; LCD_DrawBG +; +; are implemented using both fastcall16 and legacy fastcall16 because they +; fall into a special and rare case where the calling sequences specified +; by the two disciplines are incompatible. The fastcall16 versions are +; provided for both C and Assembly users in all memory models. The legacy +; fastcall16 versions are provided only to support existing small memory +; model assembly language code---they do not work in the large memory +; model. +; +; ** The legacy fastcall16 versions are provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Their use is +; ** deprecated and their status is "No Further Maintenance". +; +; The fastcall16 versions of these functions are distinguished by a +; leading underscore in the name. The legacy fastcall16 names (which appear +; in this comment) do not have the leading underscore. Details on the +; calling sequence to be used for fastcall16 are given in the user module +; datasheet. +; +; Fastcall16 versions: +export _LCD_DrawVBG +export _LCD_DrawBG + +IF SYSTEM_SMALL_MEMORY_MODEL +; Legacy Fastcall versions: +export LCD_DrawVBG +export LCD_DrawBG +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +ENDIF ; BARGRAPH_ENABLE + +; +; The following functions are deprecated and will be eliminated in a future +; version of PSoC Designer. +; +export LCD_Write_Data +export _LCD_Write_Data + + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_E: equ 10h +LCD_RW: equ 40h +LCD_RS: equ 20h + +LCD_DATA_MASK: equ 0Fh +LCD_READY_BIT: equ 08h + +LCD_DATA_READ: equ ( LCD_E | LCD_RW | LCD_RS ) +LCD_CNTL_READ: equ ( LCD_E | LCD_RW ) +LCD_PORT_WRITE: equ 7Fh +LCD_PORT_MASK: equ 7Fh + +LCD_DISP_INC: equ 03h +LCD_DISP_OFF: equ 08h +LCD_DISP_ON: equ 0Ch +LCD_4BIT_2LINE: equ 2Ch + + +;----------------------------------------------- +; Bargraph definitions +;----------------------------------------------- + +LCD_BG_CHAR_WIDTH: equ 16 ; 16 characters in width +LCD_BG_SEG_WIDTH: equ 80 ; 16 * 5 = 80 +LCD_BG_COL_START: equ 0 ; Always start in the left most column + + ; Offsets for 2x16, 2x20, 4x20 + ; Change these values for a custom LCD + +LCD_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 +LCD_ROW3_OFFSET: equ 94h ; Address/command offset for row 1 +LCD_ROW4_OFFSET: equ D4h ; Address/command offset for row 2 + +LCD_BG_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 +LCD_BG_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + +LCD_CG_RAM_OFFSET: equ 40h ; Offset to character RAM + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrCString +; +; DESCRIPTION: +; Print constant (ROM) string to LCD +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Pointer to String +; A contains MSB of string address +; X contains LSB of string address +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrCString: +_LCD_PrCString: + RAM_PROLOGUE RAM_USE_CLASS_1 + .Loop_PrCString: + push A ; Store ROM pointer + push X + romx ; Get character from ROM + jnz .LCD_PrCString_WR ; print character and advance pointer + pop X ; Restore the stack + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret ; Return + +.LCD_PrCString_WR: + call LCD_WriteData ; Write data to LCD + pop X ; Get ROM pointer + pop A + inc X ; Inc LSB of pointer + jnc .Loop_PrCString + inc A ; Inc MSB of pointer if LSB overflow + jmp .Loop_PrCString + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexByte +; +; DESCRIPTION: +; Print a byte in Hex (two characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => (BYTE) Data/char to be printed +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +.LITERAL +LCD_HEX_STR:: + DS "0123456789ABCDEF" +.ENDLITERAL +.SECTION + + LCD_PrHexByte: +_LCD_PrHexByte: + RAM_PROLOGUE RAM_USE_CLASS_1 + push A ; Save lower nibble + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + pop A ; Restore value + and A,0Fh ; Mask off lower nibble + index LCD_HEX_STR ; Get Hex value + call LCD_WriteData ; Write data to screen + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrHexInt +; +; DESCRIPTION: +; Print an Int in Hex (four characters) to current LCD position +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X Integer value +; A contains LSB of Int +; X contains MSB of Int +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_PrHexInt: +_LCD_PrHexInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + swap A,X + call LCD_PrHexByte ; Print MSB + mov A,X ; Move LSB into position + call LCD_PrHexByte ; Print LSB + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_PrString +; +; DESCRIPTION: +; Print (RAM) ASCII string to LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A:X contains pointer to string +; X contains LSB of string pointer +; A contains MSB or page of string pointer (not used at this time) +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; IDX_PP +; +; + LCD_PrString: +_LCD_PrString: + RAM_PROLOGUE RAM_USE_CLASS_3 + RAM_SETPAGE_IDX A + .Loop_PrString: + mov A,[X] ; Get value pointed to by X + jz .End_LCD_PrString ; Check for end of string + ;LCD_writeData is known not to modify X so no need to preserve + call LCD_WriteData ; Write data to screen + inc X ; Advance pointer to next character + jmp .Loop_PrString ; Go get next character +.End_LCD_PrString: + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WriteData +; +; DESCRIPTION: +; Write a byte to the LCD's data register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains byte to be written to LCD data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WriteData: +_LCD_WriteData: + LCD_Write_Data: ; Do not use +_LCD_Write_Data: ; Do not use + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of character + asr A ; Shift high nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off high nibble + call LCD_WDATA_Nibble ; Write Upper nibble + pop A ; Retrieve copy of character + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WDATA_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Control +; +; DESCRIPTION: +; Write a byte to the LCD's control register. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains data to be written to LCD control register. +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_Control: +_LCD_Control: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Check_Ready ; Make sure controller is ready + ; A is preserved in LCD_Check_Ready + push A ; Save copy of byte + asr A ; Shift Upper Nibble to right + asr A + asr A + asr A + and A,0Fh ; Mask off, just in case + call LCD_WCNTL_Nibble ; Write high nibble + pop A ; Restore copy of byte + and A,0Fh ; Mask off high nibble + nop + nop + nop + call LCD_WCNTL_Nibble ; Write Lower nibble + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WCNTL_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's command register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to command register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; + LCD_WCNTL_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Reset control lines + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in MSN + or A,LCD_E ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; OR in bit 7 just + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + nop + and A,(~LCD_PORT_MASK|LCD_DATA_MASK) ; Disable E signal and leave data on bus. + mov [Port_2_Data_SHADE],A ; Keep shadow register in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_WDATA_Nibble +; +; DESCRIPTION: +; Write a single nibble to the LCD's DATA register +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A[3:0] Contains Nibble to be written to data register +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +LCD_WDATA_Nibble: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK + or [Port_2_Data_SHADE],LCD_RS ; Raise RS to signify a Data Write + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_DATA_MASK ; Make sure no bogus data in A[7:4] + or A,(LCD_E | LCD_RS) ; Bring "E" Enable line high + or A,[Port_2_Data_SHADE] ; Keep shadow in sync + mov reg[LCD_Port], A ; Write data + mov [Port_2_Data_SHADE],A ; Keep shadow in sync + NOP + and A,(~LCD_PORT_MASK|LCD_DATA_MASK|LCD_RS) ; Disable E signal and leave Data on bus + mov [Port_2_Data_SHADE],A ; keep shadow in sync + mov reg[LCD_Port],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Check_Ready +; +; DESCRIPTION: +; Wait until LCD has completed last command. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD is not present, this routine may never return. +; +LCD_Check_Ready: + RAM_PROLOGUE RAM_USE_CLASS_4 + push A ; Save Accumulator + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + and [Port_2_Data_SHADE],~LCD_PORT_MASK ; Mask of all LCD bits + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A ; Zero LCD port bits + + and [Port_2_DriveMode_0_SHADE],~LCD_DATA_MASK ; Clear out LCD mode bits. + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 ; Change port mode to read status + mov reg[LCD_PortMode0],A ; Setup LCD Port for reading + M8C_SetBank0 + + or [Port_2_Data_SHADE],LCD_RW ; Raise RW to signify Read operation + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + NOP + + push X ; Save 'X' register + mov X,255 ; 255 Attempts + +.LCD_RDY_LOOP: + or [Port_2_Data_SHADE], LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Wait 2 nops to make sure data is ready + nop + mov A,reg[LCD_Port] + +; The code below is used to work around the async read issue with the ICE with the +; 25/26xxx family of devices. It will help to eliminate "Invalid memory reference" +; errors. It is not required when running without the ICE or when using any other +; family besides the 25/26xxx family. If not using the ICE or with any other family +; the ICE_PORT_SYNC flag should be set to 0. +IF(ICE_PORT_SYNC) + mov reg[ 0xfa], A + mov A, reg[0xfa] +ENDIF + + push A + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop ; Add delay for the slowest part and the + nop ; fastest PSoC + nop + ; Get the LSBs + or [Port_2_Data_SHADE],LCD_CNTL_READ ; Raise E to start cycle + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + nop + nop + + and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal + mov A,[Port_2_Data_SHADE] + mov reg[LCD_Port],A + + pop A + and A,LCD_READY_BIT ; Check busy + + jz .UNLOCK + dec X + jnz .LCD_RDY_LOOP ; If LCD still busy, read again for 255 times +.UNLOCK: + pop X ; Restore 'X' register + + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Revert Data bit to Write mode + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_4 ; Restore Accumulator + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Start +; FUNCTION NAME: LCD_Init +; +; DESCRIPTION: +; Initialize LCD +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; THEORY of OPERATION or PROCEDURE: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; This initialization is a bit long, but it should work for +; most 2 and 4 line LCDs. +; + LCD_Start: +_LCD_Start: + LCD_Init: +_LCD_Init: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + + and [Port_2_DriveMode_0_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Set LCD port for writing + and [Port_2_DriveMode_1_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + + mov A,[Port_2_DriveMode_0_SHADE] + M8C_SetBank1 + mov reg[LCD_PortMode0],A ; Setup LCD Port for writing + mov A,[Port_2_DriveMode_1_SHADE] + mov reg[LCD_PortMode1],A + M8C_SetBank0 + + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,82 ; Delay for 4.1 mSec (82 * 50uSec) + call LCD_Delay50uTimes + + mov A,03h + call LCD_WCNTL_Nibble + + call LCD_Delay50u + call LCD_Delay50u + call LCD_Delay50u + + mov A,03h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,02h + call LCD_WCNTL_Nibble + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,08h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,01h + call LCD_Control + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + + mov A,06h + call LCD_Control + + mov A,0Eh + call LCD_Control + + mov A,LCD_4BIT_2LINE ; Setup for 4 bit interface, 2 line + call LCD_Control + + mov A,LCD_DISP_OFF + call LCD_Control + + mov A,LCD_DISP_ON + call LCD_Control + + mov A,LCD_DISP_INC + call LCD_Control + + mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) + call LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Position +; +; DESCRIPTION: +; Position Cursor at Row and Col location +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Row 0 to 3 +; X => Col 0 to 39+ +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +.LITERAL +LCD_ROW_OFFSET:: + DB LCD_ROW1_OFFSET, LCD_ROW2_OFFSET, LCD_ROW3_OFFSET, LCD_ROW4_OFFSET +.ENDLITERAL + +.SECTION + LCD_Position: +_LCD_Position: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,03h ; Mask off 2 bits for row address 0 to 3 + push X ; Store COL + index LCD_ROW_OFFSET ; Get ROW memory offset from table + mov X,SP ; Get Stack pointer + add A,[X+(-1)] ; Add the COL to the display pointer + pop X + + call LCD_Control ; Write control byte + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50uTimes +; +; DESCRIPTION: +; Delay increments of 50uSeconds +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A contains the delay multiplier +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; + LCD_Delay50uTimes: +_LCD_Delay50uTimes: + RAM_PROLOGUE RAM_USE_CLASS_1 + call LCD_Delay50u + dec A + jnz LCD_Delay50uTimes + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_Delay50u +; +; DESCRIPTION: +; Delay 50uSec for any clock frequency from 1.5MHz to 24MHz +; Slower clock frequencies the delay will be; +; 1.5 +; -------------- * 50uSec +; clock_freq(MHz) +; +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; THEORY of OPERATION or PROCEDURE: +; +.LITERAL + LCD_Delay50u_Table:: + DB 08h, 19h, 3Ah, 7Ch, 01h, 01h, 01h, 01h +; 3MHz, 6MHz, 12MHz, 24MHz, 1.5MHz, 750kHz, 188kHz, 94kHz +.ENDLITERAL +.SECTION + + LCD_Delay50u: + _LCD_Delay50u: ; [11] Call + RAM_PROLOGUE RAM_USE_CLASS_1 + push A + M8C_SetBank1 ; [4] + mov A, reg[OSC_CR0] ; [6] Get delay value + M8C_SetBank0 ; [4] + and A,07h ; [4] Mask off only the clock bits + cmp A,05h + jnc .Delay50u_End + index LCD_Delay50u_Table ; [13] Get delay value +.Delay50u_Loop: ; + dec A ; [4] + jnz .Delay50u_Loop ; [5] +.Delay50u_End: + pop A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +;----------------------------------------------------------------------------- +; If bargraph is not enabled, the following functions are not required. +;----------------------------------------------------------------------------- + +IF (LCD_BARGRAPH_ENABLE) + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a horizontal bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 39+ +; [x-1] => Length of bargraph in chars 1 to 40+ +; [X-2] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_COLX: equ 0 ; Stack position of Column +BG_CHAR_LENX: equ -1 ; Stack position of Length +BG_LENGTHX: equ -2 ; Stack position of bargraph pointer position + + +LCD_DrawBG: + push X + mov X,[X+BG_COLX] ; Row in A, Col in X + call LCD_Position ; Set cursor position + pop X ; Restore pointer + +.LCD_BG_LOOP1X: + cmp [X+BG_LENGTHX],00h ; Check for past end of BG + jnz .LCD_CHECK1X + mov A,00h ; Load empty character + jmp .LCD_BG_DOITX ; + +.LCD_CHECK1X: + cmp [X+BG_LENGTHX],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2X ; Note yet, use full character + mov A,[X+BG_LENGTHX] + sub [X+BG_LENGTHX],A + jmp .LCD_BG_DOITX + +.LCD_CHECK2X: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTHX],05h ; Subtract another 5 positions + +.LCD_BG_DOITX: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LENX] ; Dec Char count + jnz .LCD_BG_LOOP1X ; Do it all over again + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawBG +; +; DESCRIPTION: +; Draw a horizontal bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 39+ +; [SP-5] => Length of bargraph in chars 1 to 40+ +; [SP-6] => Position of pointer in segments 5 times Length +; +; +; RETURNS: none +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +BG_ROW: equ -3 +BG_COL: equ -4 ; Stack position of Column +BG_CHAR_LEN: equ -5 ; Stack position of Length +BG_LENGTH: equ -6 ; Stack position of bargraph pointer position + + +_LCD_DrawBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + push X + mov A,[X+BG_ROW] ; Row in A + mov X,[X+BG_COL] ; Col in X + RAM_EPILOGUE RAM_USE_CLASS_2 + call LCD_Position ; Set cursor position + RAM_PROLOGUE RAM_USE_CLASS_2 + pop X + +.LCD_BG_LOOP1: + cmp [X+BG_LENGTH],00h ; Check for past end of BG + jnz .LCD_CHECK1 + mov A,00h ; Load empty character + jmp .LCD_BG_DOIT ; + +.LCD_CHECK1: + cmp [X+BG_LENGTH],06h ; Check if BG pointer is at this character + jnc .LCD_CHECK2 ; Note yet, use full character + mov A,[X+BG_LENGTH] + sub [X+BG_LENGTH],A + jmp .LCD_BG_DOIT + +.LCD_CHECK2: ; Put index to full character + mov A, 06h + sub [X+BG_LENGTH],05h ; Subtract another 5 positions + +.LCD_BG_DOIT: + call LCD_WriteData ; Display BG character + + dec [X+BG_CHAR_LEN] ; Dec Char count + jnz .LCD_BG_LOOP1 ; Do it all over again + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +IF SYSTEM_SMALL_MEMORY_MODEL +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; This legacy fastcall version are provided only to support existing small +; memory model assembly language code---it does not work in the large memory +; model. +; +; ** This legacy fastcall version is provided on a temporary basis to +; ** ease the transition to the 4.2 release of PSoC Designer. Its use is +; ** deprecated and its status is "No Further Maintenance". If you call this +; ** function in assembly you should convert to _LCD_DrawVBG +; ** (with a leading underscore) and the fastcall16 interface +; +; Draw a vertical bargraph on the LCD with the given parameters. This +; is a legacy function that is intended to support existing Assembly +; language programs that call this function. This should not be used for +; new code or with Large Memory Model programs. +;----------------------------------------------------------------------------- +; +; LEGACY FASTCALL ARGUMENTS: +; A => Starting row for bargraph 0 to 3 +; [X] => Starting Column for bargraph 0 to 40+ +; [x-1] => Height of bargraph in chars 1 - 4 +; [X-2] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_COLX: equ 0 +VBG_CHAR_HEIGHTX: equ -1 +VBG_SEG_HEIGHTX: equ -2 + +LCD_DrawVBG: + + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOPX: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COLX] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHTX],00h ; Check for zero segs + jnz .VBG_NZ_SEGX + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHARX +.VBG_NZ_SEGX: + cmp [X+VBG_SEG_HEIGHTX],09h ; Check for full segment + jnc .VBG_FULL_SEGX + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHTX] + dec A + mov [X+VBG_SEG_HEIGHTX],00h ; Zero segment height + jmp .VBG_WRITE_CHARX + +.VBG_FULL_SEGX: ; Bargaph + sub [X+VBG_SEG_HEIGHTX],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHARX: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHTX] + jnz .VBG_LOOPX + ret +.ENDSECTION +ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_DrawVBG +; +; DESCRIPTION: +; Draw a vertical bargraph on the LCD with the given parameters. +; +; +;----------------------------------------------------------------------------- +; +; FASTCALL16 ARGUMENTS: +; +; [SP-3] => Starting row for bargraph 0 to 3 +; [SP-4] => Starting Column for bargraph 0 to 40+ +; [SP-5] => Height of bargraph in chars 1 - 4 +; [SP-6] => Position of pointer in segments 8 times height +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; If LCD_Init is not called before this function, the +; bargraph will not be drawn properly. +; +; Stack offset constants +VBG_ROW: equ -3 +VBG_COL: equ -4 +VBG_CHAR_HEIGHT: equ -5 +VBG_SEG_HEIGHT: equ -6 + +_LCD_DrawVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP + mov A, [X+VBG_ROW] + and A,03h ; Make sure only rows 0 - 3 are valid +.VBG_LOOP: + push A + index LCD_ROW_OFFSET ; Get row offset + add A,[X+VBG_COL] ; Add column offset to position + call LCD_Control ; Position Cursor + cmp [X+VBG_SEG_HEIGHT],00h ; Check for zero segs + jnz .VBG_NZ_SEG + mov A,' ' ; Load space character + jmp .VBG_WRITE_CHAR +.VBG_NZ_SEG: + cmp [X+VBG_SEG_HEIGHT],09h ; Check for full segment + jnc .VBG_FULL_SEG + ; Partial segment between 1 and 8 + mov A,[X+VBG_SEG_HEIGHT] + dec A + mov [X+VBG_SEG_HEIGHT],00h ; Zero segment height + jmp .VBG_WRITE_CHAR + +.VBG_FULL_SEG: ; Bargaph + sub [X+VBG_SEG_HEIGHT],08h ; Subtract full segment + mov A,07h ; Load full segment + +.VBG_WRITE_CHAR: ; Write character to display + call LCD_WriteData ; Write value + pop A + dec A + dec [X+VBG_CHAR_HEIGHT] + jnz .VBG_LOOP + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitVBG +; +; DESCRIPTION: +; Initialize the vertical bargraph characters. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: none +; +; RETURNS: none +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Stack offset constants +VBGDATA_CTR: equ 00h ; Char data count stack offset +VBG_BYTES: equ 01h ; Byte counter stack offset + + LCD_InitVBG: +_LCD_InitVBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + push A ; Create 2 locations + push A + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+VBGDATA_CTR],01h ; Reset data counter + + .VBG_Loop1: ; loop once for each 8 characters + mov [X+VBG_BYTES],08h ; Load cycle pointer + .VBG_Loop2: ; Loop once for each line in character (8 times) + mov A,[X+VBGDATA_CTR] + cmp A,[X+VBG_BYTES] + jnc .VBG_SOLID + mov A,00h ; Empty line + jmp .VBG_Load ; Jump to load the bargraph +.VBG_SOLID: + mov A,FFh ; Load solid line +.VBG_Load: + call LCD_WriteData ; character data + dec [X+VBG_BYTES] ; Dec byte counter + jnz .VBG_Loop2 ; End Loop 2 + inc [X+VBGDATA_CTR] + cmp [X+VBGDATA_CTR],09h + jnz .VBG_Loop1 ; End Loop1 + + pop A + pop A + mov A,LCD_DISP_ON ; Turn on display, don't really + call LCD_Control ; need this. + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +;----------------------------------------------------------------------------- +; FUNCTION NAME: LCD_InitBG +; +; DESCRIPTION: +; Initialize horizontal bargraph characters +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A = type 0 = full |||||||||........ +; 1 = single vertical line ..........|...... +; +; RETURNS: +; +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to preserve their values across calls to fastcall16 +; functions. +; +; Currently only the page pointer registers listed below are modified: +; CUR_PP +; +; Only one type of bargraph (horizontal or vertical) may be used +; at a time since they each require their own set of characters. +; +; THEORY of OPERATION or PROCEDURE: +; This function writes to the LCD character RAM to generate 8 custom +; characters used to generated one of two horizontal bargraphs. +; +.LITERAL + LCD_BG_TYPE1:: ; ....., |...., ||..., |||.., ||||., |||||, ||||| + DB 00h, 10h, 18h, 1Ch, 1Eh, 1Fh, 1Fh + LCD_BG_TYPE2:: ; ....., |...., .|..., ..|.., ...|., ....|, ..... + DB 00h, 10h, 08h, 04h, 02h, 01h, 00h +.ENDLITERAL + +.SECTION +; Stack offset constants +BGDATA_PTR: equ 00h ; Stack offsets +BGCHARS: equ 01h +BGTYPE: equ 02h + + LCD_InitBG: +_LCD_InitBG: + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X,SP ; Get location of stack + add SP,3 + mov [X+BGTYPE],A ; Store the bargraph type + + mov A,LCD_CG_RAM_OFFSET ; Setup pointer + call LCD_Control ; Position the CG pointer + mov [X+BGDATA_PTR],00h ; Reset pointer to BG data + + .BG_Loop1: + mov [X+BGCHARS],08h ; Load cycle pointer + .BG_Loop2: + mov A,[X+BGDATA_PTR] + cmp [X+BGTYPE],00h ; Check which bargraph + jnz .BG_OTHER + index LCD_BG_TYPE1 + jmp .BG_Load + .BG_OTHER: + index LCD_BG_TYPE2 + .BG_Load: + call LCD_WriteData + dec [X+BGCHARS] ; Character builder counter + jnz .BG_Loop2 + inc [X+BGDATA_PTR] ; Advance to next character + cmp [X+BGDATA_PTR],07h + jnz .BG_Loop1 + + add SP,-3 + mov A,LCD_DISP_ON + call LCD_Control + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + +ENDIF + +; End of File LCD.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h new file mode 100644 index 0000000..5182c6b --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.h @@ -0,0 +1,102 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: LCD.h +// Version: 1.60, Updated on 2015/3/4 at 22:26:36 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: LCD User Module C Language interface file. +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef LCD_INCLUDE +#define LCD_INCLUDE + +#include <m8c.h> + +#define LCD_BARGRAPH_ENABLE 1 + +/* Create pragmas to support proper argument and return value passing */ +#pragma fastcall16 LCD_Start +#pragma fastcall16 LCD_Init +#pragma fastcall16 LCD_Control +#pragma fastcall16 LCD_WriteData +#pragma fastcall16 LCD_PrString +#pragma fastcall16 LCD_PrCString +#pragma fastcall16 LCD_PrHexByte +#pragma fastcall16 LCD_PrHexInt +#pragma fastcall16 LCD_Position +#pragma fastcall16 LCD_Delay50uTimes +#pragma fastcall16 LCD_Delay50u + +#if ( LCD_BARGRAPH_ENABLE ) +#pragma fastcall16 LCD_InitBG +#pragma fastcall16 LCD_DrawBG +#pragma fastcall16 LCD_InitVBG +#pragma fastcall16 LCD_DrawVBG +#endif + +//------------------------------------------------- +// Prototypes of the LCD API. +//------------------------------------------------- + +extern void LCD_Start(void); +extern void LCD_Init(void); +extern void LCD_Control(BYTE bData); +extern void LCD_WriteData(BYTE bData); +extern void LCD_PrString(char * sRamString); +extern void LCD_PrCString(const char * sRomString); +extern void LCD_Position(BYTE bRow, BYTE bCol); +extern void LCD_PrHexByte(BYTE bValue); +extern void LCD_PrHexInt(INT iValue); + +extern void LCD_Delay50uTimes(BYTE bTimes); +extern void LCD_Delay50u(void); + +// Do not use, will be removed in future version. +extern void LCD_Write_Data(BYTE bData); +#pragma fastcall16 LCD_Write_Data +// + + +#if ( LCD_BARGRAPH_ENABLE ) +extern void LCD_InitBG(BYTE bBGType); +extern void LCD_InitVBG(void); +extern void LCD_DrawVBG(BYTE bRow, BYTE bCol, BYTE bHeight, BYTE bPixelRowEnd); +extern void LCD_DrawBG(BYTE bRow, BYTE bCol, BYTE bLen, BYTE bPixelColEnd); + + +#define LCD_SOLID_BG 0x00 +#define LCD_LINE_BG 0x01 + + +#endif + +//------------------------------------------------- +// Defines for LCD API's. +//------------------------------------------------- +#define LCD_DISP_ON 0x0C +#define LCD_DISP_OFF 0x08 +#define LCD_DISP_BLANK 0x0A +#define LCD_DISP_CLEAR_HOME 0x01 +#define LCD_CURSOR_ON 0x0E +#define LCD_CURSOR_OFF 0x0C +#define LCD_CURSOR_WINK 0x0D +#define LCD_CURSOR_BLINK 0x0F +#define LCD_CURSOR_SH_LEFT 0x10 +#define LCD_CURSOR_SH_RIGHT 0x14 +#define LCD_CURSOR_HOME 0x02 +#define LCD_CURSOR_LEFT 0x04 +#define LCD_CURSOR_RIGHT 0x06 + +#define LCD_PORT_MASK 0x7F +//------------------------------------------------------ +// Register Address Constants for LCD +//------------------------------------------------------ + +#define LCD_Port PRT2DR +#define LCD_PortMode0 PRT2DM0 +#define LCD_PortMode1 PRT2DM1 + +#endif +// end of file LCD.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc new file mode 100644 index 0000000..6cd7809 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/LCD.inc @@ -0,0 +1,71 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: LCD.inc +;; Version: 1.60, Updated on 2015/3/4 at 22:26:36 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the LCD user module interface. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +; LCD connections to PSoC port +; +; PX.0 ==> LCD D4 +; PX.1 ==> LCD D5 +; PX.2 ==> LCD D6 +; PX.3 ==> LCD D7 +; PX.4 ==> LCD E +; PX.5 ==> LCD RS +; PX.6 ==> LCD R/W + + +include "m8c.inc" + +;------------------------------------------------------ +; Register Address Constants for LCD +;------------------------------------------------------ + +LCD_Port: equ PRT2DR +LCD_PortMode0: equ PRT2DM0 +LCD_PortMode1: equ PRT2DM1 + +LCD_BARGRAPH_ENABLE: equ 1 + + +;----------------------------------------------- +; Constants for LCD +;----------------------------------------------- +; LCD commands + +LCD_DISP_ON: equ 0Ch +LCD_DISP_OFF: equ 08h +LCD_CURSOR_ON: equ 0Eh +LCD_CURSOR_OFF: equ 0Ch +LCD_CURSOR_BLINK: equ 0Fh +LCD_CURSOR_WINK: equ 0Dh +LCD_CURSOR_SH_LEFT: equ 10h +LCD_CURSOR_SH_RIGHT: equ 14h +LCD_CURSOR_HOME: equ 02h +LCD_CURSOR_LEFT: equ 04h +LCD_CURSOR_RIGHT: equ 06h +LCD_DISP_CLEAR_HOME: equ 01h + +LCD_SOLID_BG: equ 00h +LCD_LINE_BG: equ 01h + +LCD_PORT_MASK: equ 7Fh + +ICE_PORT_SYNC: equ 0 ; This flag must be set to one to work around + ; the async read issue with the ICE with the + ; 25/26xxx family of devices. It will help + ; to eliminate "Invalid memory reference" errors. + ; It is not required when running without the ICE + ; or when using any other family besides the + ; 25/26xxx family. If not using the ICE, this flag + ; may be set to 0. + +; end of file LCD.inc + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h new file mode 100644 index 0000000..91c294b --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.h @@ -0,0 +1,33 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.4.3191 +******************************************************************************/ +// ============================================================================= +// FILENAME: PSoCAPI.h +// +// Copyright (c) Cypress Semiconductor 2013. All Rights Reserved. +// +// NOTES: +// Do not modify this file. It is generated by PSoC Designer each time the +// generate application function is run. The values of the parameters in this +// file can be modified by changing the values of the global parameters in the +// device editor. +// +// ============================================================================= + +#ifndef __PSOCAPI_H +#define __PSOCAPI_H + +#include "PSoCGPIOINT.h" +#include "ADCINC.h" +#include "AMUX4_0.h" +#include "AMUX4_1.h" +#include "DAC6_VGND.h" +#include "DAC9_Ia.h" +#include "INSAMP.h" +#include "LCD.h" +#include "PWM8_Heater.h" +#include "PWM8_NB_Out.h" +#include "PWM8_Vout.h" +#include "SleepTimer.h" + +#endif diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc new file mode 100644 index 0000000..a9253d7 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCAPI.inc @@ -0,0 +1,27 @@ +; Generated by PSoC Designer 5.4.3191 +; +; ============================================================================= +; FILENAME: PSoCAPI.inc +; +; Copyright (c) Cypress Semiconductor 2013. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +; +; ============================================================================= + +include "PSoCGPIOINT.inc" +include "ADCINC.inc" +include "AMUX4_0.inc" +include "AMUX4_1.inc" +include "DAC6_VGND.inc" +include "DAC9_Ia.inc" +include "INSAMP.inc" +include "LCD.inc" +include "PWM8_Heater.inc" +include "PWM8_NB_Out.inc" +include "PWM8_Vout.inc" +include "SleepTimer.inc" diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm new file mode 100644 index 0000000..730bd94 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfig.asm @@ -0,0 +1,197 @@ +; Generated by PSoC Designer 5.4.3191 +; +;========================================================================== +; PSoCConfig.asm +; @PSOC_VERSION +; +; Version: 0.85 +; Revised: June 22, 2004 +; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +; +; This file is generated by the Device Editor on Application Generation. +; It contains code which loads the configuration data table generated in +; the file PSoCConfigTBL.asm +; +; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!! +; Edits to this file will not be preserved. +;========================================================================== +; +include "m8c.inc" +include "memory.inc" +include "GlobalParams.inc" + +export LoadConfigInit +export _LoadConfigInit +export LoadConfig_slc_free_28_pin_feb_16_2013 +export _LoadConfig_slc_free_28_pin_feb_16_2013 +export Port_2_Data_SHADE +export _Port_2_Data_SHADE +export Port_2_DriveMode_0_SHADE +export _Port_2_DriveMode_0_SHADE +export Port_2_DriveMode_1_SHADE +export _Port_2_DriveMode_1_SHADE + + +export NO_SHADOW +export _NO_SHADOW + +FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask +END_CONFIG_TABLE: equ ffh ;end of config table indicator + +AREA psoc_config(rom, rel) + +;--------------------------------------------------------------------------- +; LoadConfigInit - Establish the start-up configuration (except for a few +; parameters handled by boot code, like CPU speed). This +; function can be called from user code, but typically it +; is only called from boot. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfigInit: + LoadConfigInit: + RAM_PROLOGUE RAM_USE_CLASS_4 + + mov [Port_2_Data_SHADE], 0h + mov [Port_2_DriveMode_0_SHADE], 7fh + mov [Port_2_DriveMode_1_SHADE], 80h + + lcall LoadConfig_slc_free_28_pin_feb_16_2013 + lcall LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret + +;--------------------------------------------------------------------------- +; Load Configuration slc_free_28_pin_feb_16_2013 +; +; Load configuration registers for slc_free_28_pin_feb_16_2013. +; IO Bank 0 registers a loaded first,then those in IO Bank 1. +; +; INPUTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be +; modified as may the Page Pointer registers! +; In the large memory model currently only the page +; pointer registers listed below are modified. This does +; not guarantee that in future implementations of this +; function other page pointer registers will not be +; modified. +; +; Page Pointer Registers Modified: +; CUR_PP +; +_LoadConfig_slc_free_28_pin_feb_16_2013: + LoadConfig_slc_free_28_pin_feb_16_2013: + RAM_PROLOGUE RAM_USE_CLASS_4 + + push x + M8C_SetBank0 ; Force bank 0 + mov a, 0 ; Specify bank 0 + asr a ; Store in carry flag + ; Load bank 0 table: + mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + mov X, <LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + lcall LoadConfig ; Load the bank 0 values + + mov a, 1 ; Specify bank 1 + asr a ; Store in carry flag + ; Load bank 1 table: + mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + mov X, <LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + lcall LoadConfig ; Load the bank 1 values + + M8C_SetBank0 ; Force return to bank 0 + pop x + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret + + + + +;--------------------------------------------------------------------------- +; LoadConfig - Set IO registers as specified in ROM table of (address,value) +; pairs. Terminate on address=0xFF. +; +; INPUTS: [A,X] points to the table to be loaded +; Flag Register Carry bit encodes the Register Bank +; (Carry=0 => Bank 0; Carry=1 => Bank 1) +; +; RETURNS: nothing. +; +; STACK FRAME: X-4 I/O Bank 0/1 indicator +; X-3 Temporary store for register address +; X-2 LSB of config table address +; X-1 MSB of config table address +; +LoadConfig: + RAM_PROLOGUE RAM_USE_CLASS_2 + add SP, 2 ; Set up local vars + push X ; Save config table address on stack + push A + mov X, SP + mov [X-4], 0 ; Set default Destination to Bank 0 + jnc .BankSelectSaved ; Carry says Bank 0 is OK + mov [X-4], 1 ; No Carry: default to Bank 1 +.BankSelectSaved: + pop A + pop X + +LoadConfigLp: + M8C_SetBank0 ; Switch to bank 0 + M8C_ClearWDT ; Clear the watchdog for long inits + push X ; Preserve the config table address + push A + romx ; Load register address from table + cmp A, END_CONFIG_TABLE ; End of table? + jz EndLoadConfig ; Yes, go wrap it up + mov X, SP ; + tst [X-4], 1 ; Loading IO Bank 1? + jz .IOBankNowSet ; No, Bank 0 is fine + M8C_SetBank1 ; Yes, switch to Bank 1 +.IOBankNowSet: + mov [X-3], A ; Stash the register address + pop A ; Retrieve the table address + pop X + inc X ; Advance to the data byte + adc A, 0 + push X ; Save the config table address again + push A + romx ; load config data from the table + mov X, SP ; retrieve the register address + mov X, [X-3] + mov reg[X], A ; Configure the register + pop A ; retrieve the table address + pop X + inc X ; advance to next table entry + adc A, 0 + jmp LoadConfigLp ; loop to configure another register +EndLoadConfig: + add SP, -4 + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +AREA InterruptRAM(ram, rel) + +NO_SHADOW: +_NO_SHADOW: +; write only register shadows +_Port_2_Data_SHADE: +Port_2_Data_SHADE: BLK 1 +_Port_2_DriveMode_0_SHADE: +Port_2_DriveMode_0_SHADE: BLK 1 +_Port_2_DriveMode_1_SHADE: +Port_2_DriveMode_1_SHADE: BLK 1 + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm new file mode 100644 index 0000000..8def6a9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCConfigTBL.asm @@ -0,0 +1,193 @@ +; Generated by PSoC Designer 5.4.3191 +; +; ============================================================================= +; FILENAME: PSoCConfigTBL.asm +; +; Copyright (c) Cypress Semiconductor 2013. All Rights Reserved. +; +; NOTES: +; Do not modify this file. It is generated by PSoC Designer each time the +; generate application function is run. The values of the parameters in this +; file can be modified by changing the values of the global parameters in the +; device editor. +; +; ============================================================================= + +include "m8c.inc" +; Personalization tables +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered +AREA lit(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) + db 84h, 90h ;ADCINC_AtoDcr0(ASD11CR0) + db 85h, 00h ;ADCINC_AtoDcr1(ASD11CR1) + db 86h, 60h ;ADCINC_AtoDcr2(ASD11CR2) + db 87h, f8h ;ADCINC_AtoDcr3(ASD11CR3) +; Instance name ADCINC, Block Name PWM(DBB00) + db 23h, 00h ;ADCINC_PWMcr0(DBB00CR0) + db 21h, 00h ;ADCINC_PWMdr1(DBB00DR1) + db 22h, 01h ;ADCINC_PWMdr2(DBB00DR2) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) + db 80h, 80h ;DAC6_VGND_CR0(ASC10CR0) + db 81h, 40h ;DAC6_VGND_CR1(ASC10CR1) + db 82h, a0h ;DAC6_VGND_CR2(ASC10CR2) + db 83h, 30h ;DAC6_VGND_CR3(ASC10CR3) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) + db 90h, 80h ;DAC9_Ia_LSB_CR0(ASD20CR0) + db 91h, 80h ;DAC9_Ia_LSB_CR1(ASD20CR1) + db 92h, 20h ;DAC9_Ia_LSB_CR2(ASD20CR2) + db 93h, 30h ;DAC9_Ia_LSB_CR3(ASD20CR3) +; Instance name DAC9_Ia, Block Name MSB(ASC21) + db 94h, a0h ;DAC9_Ia_MSB_CR0(ASC21CR0) + db 95h, 41h ;DAC9_Ia_MSB_CR1(ASC21CR1) + db 96h, a0h ;DAC9_Ia_MSB_CR2(ASC21CR2) + db 97h, 34h ;DAC9_Ia_MSB_CR3(ASC21CR3) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) + db 71h, ddh ;INSAMP_INV_CR0(ACB00CR0) + db 72h, 21h ;INSAMP_INV_CR1(ACB00CR1) + db 73h, 20h ;INSAMP_INV_CR2(ACB00CR2) + db 70h, 00h ;INSAMP_INV_CR3(ACB00CR3) +; Instance name INSAMP, Block Name NON_INV(ACB01) + db 75h, 1ch ;INSAMP_NON_INV_CR0(ACB01CR0) + db 76h, 21h ;INSAMP_NON_INV_CR1(ACB01CR1) + db 77h, 20h ;INSAMP_NON_INV_CR2(ACB01CR2) + db 74h, 00h ;INSAMP_NON_INV_CR3(ACB01CR3) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 27h, 00h ;PWM8_Heater_CONTROL_REG(DBB01CR0) + db 25h, ffh ;PWM8_Heater_PERIOD_REG(DBB01DR1) + db 26h, 00h ;PWM8_Heater_COMPARE_REG(DBB01DR2) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2fh, 00h ;PWM8_NB_Out_CONTROL_REG(DCB03CR0) + db 2dh, ffh ;PWM8_NB_Out_PERIOD_REG(DCB03DR1) + db 2eh, 00h ;PWM8_NB_Out_COMPARE_REG(DCB03DR2) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 2bh, 00h ;PWM8_Vout_CONTROL_REG(DCB02CR0) + db 29h, ffh ;PWM8_Vout_PERIOD_REG(DCB02DR1) + db 2ah, 00h ;PWM8_Vout_COMPARE_REG(DCB02DR2) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 0 + db 60h, 09h ; AnalogColumnInputSelect register (AMX_IN) + db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1) + db 63h, 3fh ; AnalogReferenceControl register (ARF_CR) + db 65h, 00h ; AnalogSyncControl register (ASY_CR) + db e6h, 02h ; DecimatorControl_0 register (DEC_CR0) + db e7h, 02h ; DecimatorControl_1 register (DEC_CR1) + db d6h, 00h ; I2CConfig register (I2CCFG) + db b0h, 00h ; Row_0_InputMux register (RDI0RI) + db b1h, 00h ; Row_0_InputSync register (RDI0SYN) + db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS) + db b3h, 33h ; Row_0_LogicSelect_0 register (RDI0LT0) + db b4h, 33h ; Row_0_LogicSelect_1 register (RDI0LT1) + db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0) + db b6h, 08h ; Row_0_OutputDrive_1 register (RDI0SRO1) + db ffh +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1: +; Instance name ADCINC, User Module ADCINC +; Instance name ADCINC, Block Name ADC(ASD11) +; Instance name ADCINC, Block Name PWM(DBB00) + db 20h, 31h ;ADCINC_PWMfn(DBB00FN) + db 21h, 16h ;ADCINC_PWMsl(DBB00IN) + db 22h, 40h ;ADCINC_PWMos(DBB00OU) +; Instance name AMUX4_0, User Module AMUX4 +; Instance name AMUX4_1, User Module AMUX4 +; Instance name DAC6_VGND, User Module DAC6 +; Instance name DAC6_VGND, Block Name DAC(ASC10) +; Instance name DAC9_Ia, User Module DAC9 +; Instance name DAC9_Ia, Block Name LSB(ASD20) +; Instance name DAC9_Ia, Block Name MSB(ASC21) +; Instance name INSAMP, User Module INSAMP +; Instance name INSAMP, Block Name INV(ACB00) +; Instance name INSAMP, Block Name NON_INV(ACB01) +; Instance name LCD, User Module LCD +; Instance name PWM8_Heater, User Module PWM8 +; Instance name PWM8_Heater, Block Name PWM8(DBB01) + db 24h, 31h ;PWM8_Heater_FUNC_REG(DBB01FN) + db 25h, 11h ;PWM8_Heater_INPUT_REG(DBB01IN) + db 26h, 44h ;PWM8_Heater_OUTPUT_REG(DBB01OU) +; Instance name PWM8_NB_Out, User Module PWM8 +; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + db 2ch, 31h ;PWM8_NB_Out_FUNC_REG(DCB03FN) + db 2dh, 14h ;PWM8_NB_Out_INPUT_REG(DCB03IN) + db 2eh, 06h ;PWM8_NB_Out_OUTPUT_REG(DCB03OU) +; Instance name PWM8_Vout, User Module PWM8 +; Instance name PWM8_Vout, Block Name PWM8(DCB02) + db 28h, 31h ;PWM8_Vout_FUNC_REG(DCB02FN) + db 29h, 14h ;PWM8_Vout_INPUT_REG(DCB02IN) + db 2ah, 05h ;PWM8_Vout_OUTPUT_REG(DCB02OU) +; Instance name SleepTimer, User Module SleepTimer +; Global Register values Bank 1 + db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1) + db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2) + db 60h, 05h ; AnalogColumnClockSelect register (CLK_CR0) + db 62h, 29h ; AnalogIOControl_0 register (ABF_CR0) + db 67h, 33h ; AnalogLUTControl0 register (ALT_CR0) + db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1) + db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0) + db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1) + db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN) + db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU) + db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN) + db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU) + db e1h, 0bh ; OscillatorControl_1 register (OSC_CR1) + db e2h, 00h ; OscillatorControl_2 register (OSC_CR2) + db dfh, 2fh ; OscillatorControl_3 register (OSC_CR3) + db deh, 00h ; OscillatorControl_4 register (OSC_CR4) + db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN) + db ffh +AREA psoc_config(rom, rel) +LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered: +; Ordered Global Register values + M8C_SetBank0 + mov reg[00h], 00h ; Port_0_Data register (PRT0DR) + M8C_SetBank1 + mov reg[00h], 04h ; Port_0_DriveMode_0 register (PRT0DM0) + mov reg[01h], fbh ; Port_0_DriveMode_1 register (PRT0DM1) + M8C_SetBank0 + mov reg[03h], fbh ; Port_0_DriveMode_2 register (PRT0DM2) + mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS) + M8C_SetBank1 + mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0) + mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1) + M8C_SetBank0 + mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE) + mov reg[04h], 00h ; Port_1_Data register (PRT1DR) + M8C_SetBank1 + mov reg[04h], 70h ; Port_1_DriveMode_0 register (PRT1DM0) + mov reg[05h], 8fh ; Port_1_DriveMode_1 register (PRT1DM1) + M8C_SetBank0 + mov reg[07h], 8fh ; Port_1_DriveMode_2 register (PRT1DM2) + mov reg[06h], 70h ; Port_1_GlobalSelect register (PRT1GS) + M8C_SetBank1 + mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0) + mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1) + M8C_SetBank0 + mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE) + mov reg[08h], 00h ; Port_2_Data register (PRT2DR) + M8C_SetBank1 + mov reg[08h], 7fh ; Port_2_DriveMode_0 register (PRT2DM0) + mov reg[09h], 80h ; Port_2_DriveMode_1 register (PRT2DM1) + M8C_SetBank0 + mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2) + mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS) + M8C_SetBank1 + mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0) + mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1) + M8C_SetBank0 + mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE) + M8C_SetBank0 + ret + + +; PSoC Configuration file trailer PsocConfig.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.asm new file mode 100644 index 0000000..e69de29 diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h new file mode 100644 index 0000000..8560123 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.h @@ -0,0 +1,300 @@ +/****************************************************************************** +* Generated by PSoC Designer 5.4.3191 +******************************************************************************/ +#include <m8c.h> +// AnalogOutBuf_0 address and mask defines +#pragma ioport AnalogOutBuf_0_Data_ADDR: 0x0 +BYTE AnalogOutBuf_0_Data_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_0_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_0_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_0_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_0_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_0_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_0_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_0_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_0_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_0_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_0_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_0_IntEn_ADDR; +#define AnalogOutBuf_0_MASK 0x8 +// AnalogOutBuf_1 address and mask defines +#pragma ioport AnalogOutBuf_1_Data_ADDR: 0x0 +BYTE AnalogOutBuf_1_Data_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_0_ADDR: 0x100 +BYTE AnalogOutBuf_1_DriveMode_0_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_1_ADDR: 0x101 +BYTE AnalogOutBuf_1_DriveMode_1_ADDR; +#pragma ioport AnalogOutBuf_1_DriveMode_2_ADDR: 0x3 +BYTE AnalogOutBuf_1_DriveMode_2_ADDR; +#pragma ioport AnalogOutBuf_1_GlobalSelect_ADDR: 0x2 +BYTE AnalogOutBuf_1_GlobalSelect_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_0_ADDR: 0x102 +BYTE AnalogOutBuf_1_IntCtrl_0_ADDR; +#pragma ioport AnalogOutBuf_1_IntCtrl_1_ADDR: 0x103 +BYTE AnalogOutBuf_1_IntCtrl_1_ADDR; +#pragma ioport AnalogOutBuf_1_IntEn_ADDR: 0x1 +BYTE AnalogOutBuf_1_IntEn_ADDR; +#define AnalogOutBuf_1_MASK 0x20 +// CS address and mask defines +#pragma ioport CS_Data_ADDR: 0x4 +BYTE CS_Data_ADDR; +#pragma ioport CS_DriveMode_0_ADDR: 0x104 +BYTE CS_DriveMode_0_ADDR; +#pragma ioport CS_DriveMode_1_ADDR: 0x105 +BYTE CS_DriveMode_1_ADDR; +#pragma ioport CS_DriveMode_2_ADDR: 0x7 +BYTE CS_DriveMode_2_ADDR; +#pragma ioport CS_GlobalSelect_ADDR: 0x6 +BYTE CS_GlobalSelect_ADDR; +#pragma ioport CS_IntCtrl_0_ADDR: 0x106 +BYTE CS_IntCtrl_0_ADDR; +#pragma ioport CS_IntCtrl_1_ADDR: 0x107 +BYTE CS_IntCtrl_1_ADDR; +#pragma ioport CS_IntEn_ADDR: 0x5 +BYTE CS_IntEn_ADDR; +#define CS_MASK 0x8 +// CLK address and mask defines +#pragma ioport CLK_Data_ADDR: 0x4 +BYTE CLK_Data_ADDR; +#pragma ioport CLK_DriveMode_0_ADDR: 0x104 +BYTE CLK_DriveMode_0_ADDR; +#pragma ioport CLK_DriveMode_1_ADDR: 0x105 +BYTE CLK_DriveMode_1_ADDR; +#pragma ioport CLK_DriveMode_2_ADDR: 0x7 +BYTE CLK_DriveMode_2_ADDR; +#pragma ioport CLK_GlobalSelect_ADDR: 0x6 +BYTE CLK_GlobalSelect_ADDR; +#pragma ioport CLK_IntCtrl_0_ADDR: 0x106 +BYTE CLK_IntCtrl_0_ADDR; +#pragma ioport CLK_IntCtrl_1_ADDR: 0x107 +BYTE CLK_IntCtrl_1_ADDR; +#pragma ioport CLK_IntEn_ADDR: 0x5 +BYTE CLK_IntEn_ADDR; +#define CLK_MASK 0x80 +// LCDD4 address and mask defines +#pragma ioport LCDD4_Data_ADDR: 0x8 +BYTE LCDD4_Data_ADDR; +#pragma ioport LCDD4_DriveMode_0_ADDR: 0x108 +BYTE LCDD4_DriveMode_0_ADDR; +#pragma ioport LCDD4_DriveMode_1_ADDR: 0x109 +BYTE LCDD4_DriveMode_1_ADDR; +#pragma ioport LCDD4_DriveMode_2_ADDR: 0xb +BYTE LCDD4_DriveMode_2_ADDR; +#pragma ioport LCDD4_GlobalSelect_ADDR: 0xa +BYTE LCDD4_GlobalSelect_ADDR; +#pragma ioport LCDD4_IntCtrl_0_ADDR: 0x10a +BYTE LCDD4_IntCtrl_0_ADDR; +#pragma ioport LCDD4_IntCtrl_1_ADDR: 0x10b +BYTE LCDD4_IntCtrl_1_ADDR; +#pragma ioport LCDD4_IntEn_ADDR: 0x9 +BYTE LCDD4_IntEn_ADDR; +#define LCDD4_MASK 0x1 +// LCDD4 Shadow defines +// LCDD4_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD4_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD4_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD4_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD4_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD4_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD5 address and mask defines +#pragma ioport LCDD5_Data_ADDR: 0x8 +BYTE LCDD5_Data_ADDR; +#pragma ioport LCDD5_DriveMode_0_ADDR: 0x108 +BYTE LCDD5_DriveMode_0_ADDR; +#pragma ioport LCDD5_DriveMode_1_ADDR: 0x109 +BYTE LCDD5_DriveMode_1_ADDR; +#pragma ioport LCDD5_DriveMode_2_ADDR: 0xb +BYTE LCDD5_DriveMode_2_ADDR; +#pragma ioport LCDD5_GlobalSelect_ADDR: 0xa +BYTE LCDD5_GlobalSelect_ADDR; +#pragma ioport LCDD5_IntCtrl_0_ADDR: 0x10a +BYTE LCDD5_IntCtrl_0_ADDR; +#pragma ioport LCDD5_IntCtrl_1_ADDR: 0x10b +BYTE LCDD5_IntCtrl_1_ADDR; +#pragma ioport LCDD5_IntEn_ADDR: 0x9 +BYTE LCDD5_IntEn_ADDR; +#define LCDD5_MASK 0x2 +// LCDD5 Shadow defines +// LCDD5_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD5_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD5_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD5_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD5_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD5_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD6 address and mask defines +#pragma ioport LCDD6_Data_ADDR: 0x8 +BYTE LCDD6_Data_ADDR; +#pragma ioport LCDD6_DriveMode_0_ADDR: 0x108 +BYTE LCDD6_DriveMode_0_ADDR; +#pragma ioport LCDD6_DriveMode_1_ADDR: 0x109 +BYTE LCDD6_DriveMode_1_ADDR; +#pragma ioport LCDD6_DriveMode_2_ADDR: 0xb +BYTE LCDD6_DriveMode_2_ADDR; +#pragma ioport LCDD6_GlobalSelect_ADDR: 0xa +BYTE LCDD6_GlobalSelect_ADDR; +#pragma ioport LCDD6_IntCtrl_0_ADDR: 0x10a +BYTE LCDD6_IntCtrl_0_ADDR; +#pragma ioport LCDD6_IntCtrl_1_ADDR: 0x10b +BYTE LCDD6_IntCtrl_1_ADDR; +#pragma ioport LCDD6_IntEn_ADDR: 0x9 +BYTE LCDD6_IntEn_ADDR; +#define LCDD6_MASK 0x4 +// LCDD6 Shadow defines +// LCDD6_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD6_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD6_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD6_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD6_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD6_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDD7 address and mask defines +#pragma ioport LCDD7_Data_ADDR: 0x8 +BYTE LCDD7_Data_ADDR; +#pragma ioport LCDD7_DriveMode_0_ADDR: 0x108 +BYTE LCDD7_DriveMode_0_ADDR; +#pragma ioport LCDD7_DriveMode_1_ADDR: 0x109 +BYTE LCDD7_DriveMode_1_ADDR; +#pragma ioport LCDD7_DriveMode_2_ADDR: 0xb +BYTE LCDD7_DriveMode_2_ADDR; +#pragma ioport LCDD7_GlobalSelect_ADDR: 0xa +BYTE LCDD7_GlobalSelect_ADDR; +#pragma ioport LCDD7_IntCtrl_0_ADDR: 0x10a +BYTE LCDD7_IntCtrl_0_ADDR; +#pragma ioport LCDD7_IntCtrl_1_ADDR: 0x10b +BYTE LCDD7_IntCtrl_1_ADDR; +#pragma ioport LCDD7_IntEn_ADDR: 0x9 +BYTE LCDD7_IntEn_ADDR; +#define LCDD7_MASK 0x8 +// LCDD7 Shadow defines +// LCDD7_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDD7_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDD7_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDD7_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDD7_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDD7_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDE address and mask defines +#pragma ioport LCDE_Data_ADDR: 0x8 +BYTE LCDE_Data_ADDR; +#pragma ioport LCDE_DriveMode_0_ADDR: 0x108 +BYTE LCDE_DriveMode_0_ADDR; +#pragma ioport LCDE_DriveMode_1_ADDR: 0x109 +BYTE LCDE_DriveMode_1_ADDR; +#pragma ioport LCDE_DriveMode_2_ADDR: 0xb +BYTE LCDE_DriveMode_2_ADDR; +#pragma ioport LCDE_GlobalSelect_ADDR: 0xa +BYTE LCDE_GlobalSelect_ADDR; +#pragma ioport LCDE_IntCtrl_0_ADDR: 0x10a +BYTE LCDE_IntCtrl_0_ADDR; +#pragma ioport LCDE_IntCtrl_1_ADDR: 0x10b +BYTE LCDE_IntCtrl_1_ADDR; +#pragma ioport LCDE_IntEn_ADDR: 0x9 +BYTE LCDE_IntEn_ADDR; +#define LCDE_MASK 0x10 +// LCDE Shadow defines +// LCDE_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDE_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDE_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDE_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDE_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDE_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRS address and mask defines +#pragma ioport LCDRS_Data_ADDR: 0x8 +BYTE LCDRS_Data_ADDR; +#pragma ioport LCDRS_DriveMode_0_ADDR: 0x108 +BYTE LCDRS_DriveMode_0_ADDR; +#pragma ioport LCDRS_DriveMode_1_ADDR: 0x109 +BYTE LCDRS_DriveMode_1_ADDR; +#pragma ioport LCDRS_DriveMode_2_ADDR: 0xb +BYTE LCDRS_DriveMode_2_ADDR; +#pragma ioport LCDRS_GlobalSelect_ADDR: 0xa +BYTE LCDRS_GlobalSelect_ADDR; +#pragma ioport LCDRS_IntCtrl_0_ADDR: 0x10a +BYTE LCDRS_IntCtrl_0_ADDR; +#pragma ioport LCDRS_IntCtrl_1_ADDR: 0x10b +BYTE LCDRS_IntCtrl_1_ADDR; +#pragma ioport LCDRS_IntEn_ADDR: 0x9 +BYTE LCDRS_IntEn_ADDR; +#define LCDRS_MASK 0x20 +// LCDRS Shadow defines +// LCDRS_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRS_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRS_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRS_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRS_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRS_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// LCDRW address and mask defines +#pragma ioport LCDRW_Data_ADDR: 0x8 +BYTE LCDRW_Data_ADDR; +#pragma ioport LCDRW_DriveMode_0_ADDR: 0x108 +BYTE LCDRW_DriveMode_0_ADDR; +#pragma ioport LCDRW_DriveMode_1_ADDR: 0x109 +BYTE LCDRW_DriveMode_1_ADDR; +#pragma ioport LCDRW_DriveMode_2_ADDR: 0xb +BYTE LCDRW_DriveMode_2_ADDR; +#pragma ioport LCDRW_GlobalSelect_ADDR: 0xa +BYTE LCDRW_GlobalSelect_ADDR; +#pragma ioport LCDRW_IntCtrl_0_ADDR: 0x10a +BYTE LCDRW_IntCtrl_0_ADDR; +#pragma ioport LCDRW_IntCtrl_1_ADDR: 0x10b +BYTE LCDRW_IntCtrl_1_ADDR; +#pragma ioport LCDRW_IntEn_ADDR: 0x9 +BYTE LCDRW_IntEn_ADDR; +#define LCDRW_MASK 0x40 +// LCDRW Shadow defines +// LCDRW_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define LCDRW_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// LCDRW_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define LCDRW_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// LCDRW_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define LCDRW_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) +// MISO address and mask defines +#pragma ioport MISO_Data_ADDR: 0x8 +BYTE MISO_Data_ADDR; +#pragma ioport MISO_DriveMode_0_ADDR: 0x108 +BYTE MISO_DriveMode_0_ADDR; +#pragma ioport MISO_DriveMode_1_ADDR: 0x109 +BYTE MISO_DriveMode_1_ADDR; +#pragma ioport MISO_DriveMode_2_ADDR: 0xb +BYTE MISO_DriveMode_2_ADDR; +#pragma ioport MISO_GlobalSelect_ADDR: 0xa +BYTE MISO_GlobalSelect_ADDR; +#pragma ioport MISO_IntCtrl_0_ADDR: 0x10a +BYTE MISO_IntCtrl_0_ADDR; +#pragma ioport MISO_IntCtrl_1_ADDR: 0x10b +BYTE MISO_IntCtrl_1_ADDR; +#pragma ioport MISO_IntEn_ADDR: 0x9 +BYTE MISO_IntEn_ADDR; +#define MISO_MASK 0x80 +// MISO Shadow defines +// MISO_DataShadow define +extern BYTE Port_2_Data_SHADE; +#define MISO_DataShadow (*(unsigned char*)&Port_2_Data_SHADE) +// MISO_DriveMode_0Shadow define +extern BYTE Port_2_DriveMode_0_SHADE; +#define MISO_DriveMode_0Shadow (*(unsigned char*)&Port_2_DriveMode_0_SHADE) +// MISO_DriveMode_1Shadow define +extern BYTE Port_2_DriveMode_1_SHADE; +#define MISO_DriveMode_1Shadow (*(unsigned char*)&Port_2_DriveMode_1_SHADE) diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc new file mode 100644 index 0000000..cb3be5c --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PSoCGPIOINT.inc @@ -0,0 +1,578 @@ +; Generated by PSoC Designer 5.4.3191 +; +; AnalogOutBuf_0 address and mask equates +AnalogOutBuf_0_Data_ADDR: equ 0h +AnalogOutBuf_0_DriveMode_0_ADDR: equ 100h +AnalogOutBuf_0_DriveMode_1_ADDR: equ 101h +AnalogOutBuf_0_DriveMode_2_ADDR: equ 3h +AnalogOutBuf_0_GlobalSelect_ADDR: equ 2h +AnalogOutBuf_0_IntCtrl_0_ADDR: equ 102h +AnalogOutBuf_0_IntCtrl_1_ADDR: equ 103h +AnalogOutBuf_0_IntEn_ADDR: equ 1h +AnalogOutBuf_0_MASK: equ 8h +; AnalogOutBuf_1 address and mask equates +AnalogOutBuf_1_Data_ADDR: equ 0h +AnalogOutBuf_1_DriveMode_0_ADDR: equ 100h +AnalogOutBuf_1_DriveMode_1_ADDR: equ 101h +AnalogOutBuf_1_DriveMode_2_ADDR: equ 3h +AnalogOutBuf_1_GlobalSelect_ADDR: equ 2h +AnalogOutBuf_1_IntCtrl_0_ADDR: equ 102h +AnalogOutBuf_1_IntCtrl_1_ADDR: equ 103h +AnalogOutBuf_1_IntEn_ADDR: equ 1h +AnalogOutBuf_1_MASK: equ 20h +; CS address and mask equates +CS_Data_ADDR: equ 4h +CS_DriveMode_0_ADDR: equ 104h +CS_DriveMode_1_ADDR: equ 105h +CS_DriveMode_2_ADDR: equ 7h +CS_GlobalSelect_ADDR: equ 6h +CS_IntCtrl_0_ADDR: equ 106h +CS_IntCtrl_1_ADDR: equ 107h +CS_IntEn_ADDR: equ 5h +CS_MASK: equ 8h +; CLK address and mask equates +CLK_Data_ADDR: equ 4h +CLK_DriveMode_0_ADDR: equ 104h +CLK_DriveMode_1_ADDR: equ 105h +CLK_DriveMode_2_ADDR: equ 7h +CLK_GlobalSelect_ADDR: equ 6h +CLK_IntCtrl_0_ADDR: equ 106h +CLK_IntCtrl_1_ADDR: equ 107h +CLK_IntEn_ADDR: equ 5h +CLK_MASK: equ 80h +; LCDD4 address and mask equates +LCDD4_Data_ADDR: equ 8h +LCDD4_DriveMode_0_ADDR: equ 108h +LCDD4_DriveMode_1_ADDR: equ 109h +LCDD4_DriveMode_2_ADDR: equ bh +LCDD4_GlobalSelect_ADDR: equ ah +LCDD4_IntCtrl_0_ADDR: equ 10ah +LCDD4_IntCtrl_1_ADDR: equ 10bh +LCDD4_IntEn_ADDR: equ 9h +LCDD4_MASK: equ 1h +; LCDD4_Data access macros +; GetLCDD4_Data macro, return in a +macro GetLCDD4_Data + mov a,[Port_2_Data_SHADE] + and a, 1h +endm +; SetLCDD4_Data macro +macro SetLCDD4_Data + or [Port_2_Data_SHADE], 1h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_Data macro +macro ClearLCDD4_Data + and [Port_2_Data_SHADE], ~1h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD4_DriveMode_0 access macros +; GetLCDD4_DriveMode_0 macro, return in a +macro GetLCDD4_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 1h +endm +; SetLCDD4_DriveMode_0 macro +macro SetLCDD4_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 1h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_DriveMode_0 macro +macro ClearLCDD4_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~1h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD4_DriveMode_1 access macros +; GetLCDD4_DriveMode_1 macro, return in a +macro GetLCDD4_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 1h +endm +; SetLCDD4_DriveMode_1 macro +macro SetLCDD4_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 1h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm +; ClearLCDD4_DriveMode_1 macro +macro ClearLCDD4_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~1h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD4_Data_ADDR], a +endm + +; LCDD5 address and mask equates +LCDD5_Data_ADDR: equ 8h +LCDD5_DriveMode_0_ADDR: equ 108h +LCDD5_DriveMode_1_ADDR: equ 109h +LCDD5_DriveMode_2_ADDR: equ bh +LCDD5_GlobalSelect_ADDR: equ ah +LCDD5_IntCtrl_0_ADDR: equ 10ah +LCDD5_IntCtrl_1_ADDR: equ 10bh +LCDD5_IntEn_ADDR: equ 9h +LCDD5_MASK: equ 2h +; LCDD5_Data access macros +; GetLCDD5_Data macro, return in a +macro GetLCDD5_Data + mov a,[Port_2_Data_SHADE] + and a, 2h +endm +; SetLCDD5_Data macro +macro SetLCDD5_Data + or [Port_2_Data_SHADE], 2h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_Data macro +macro ClearLCDD5_Data + and [Port_2_Data_SHADE], ~2h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD5_DriveMode_0 access macros +; GetLCDD5_DriveMode_0 macro, return in a +macro GetLCDD5_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 2h +endm +; SetLCDD5_DriveMode_0 macro +macro SetLCDD5_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 2h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_DriveMode_0 macro +macro ClearLCDD5_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~2h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD5_DriveMode_1 access macros +; GetLCDD5_DriveMode_1 macro, return in a +macro GetLCDD5_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 2h +endm +; SetLCDD5_DriveMode_1 macro +macro SetLCDD5_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 2h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm +; ClearLCDD5_DriveMode_1 macro +macro ClearLCDD5_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~2h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD5_Data_ADDR], a +endm + +; LCDD6 address and mask equates +LCDD6_Data_ADDR: equ 8h +LCDD6_DriveMode_0_ADDR: equ 108h +LCDD6_DriveMode_1_ADDR: equ 109h +LCDD6_DriveMode_2_ADDR: equ bh +LCDD6_GlobalSelect_ADDR: equ ah +LCDD6_IntCtrl_0_ADDR: equ 10ah +LCDD6_IntCtrl_1_ADDR: equ 10bh +LCDD6_IntEn_ADDR: equ 9h +LCDD6_MASK: equ 4h +; LCDD6_Data access macros +; GetLCDD6_Data macro, return in a +macro GetLCDD6_Data + mov a,[Port_2_Data_SHADE] + and a, 4h +endm +; SetLCDD6_Data macro +macro SetLCDD6_Data + or [Port_2_Data_SHADE], 4h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_Data macro +macro ClearLCDD6_Data + and [Port_2_Data_SHADE], ~4h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD6_DriveMode_0 access macros +; GetLCDD6_DriveMode_0 macro, return in a +macro GetLCDD6_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 4h +endm +; SetLCDD6_DriveMode_0 macro +macro SetLCDD6_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 4h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_DriveMode_0 macro +macro ClearLCDD6_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~4h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD6_DriveMode_1 access macros +; GetLCDD6_DriveMode_1 macro, return in a +macro GetLCDD6_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 4h +endm +; SetLCDD6_DriveMode_1 macro +macro SetLCDD6_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 4h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm +; ClearLCDD6_DriveMode_1 macro +macro ClearLCDD6_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~4h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD6_Data_ADDR], a +endm + +; LCDD7 address and mask equates +LCDD7_Data_ADDR: equ 8h +LCDD7_DriveMode_0_ADDR: equ 108h +LCDD7_DriveMode_1_ADDR: equ 109h +LCDD7_DriveMode_2_ADDR: equ bh +LCDD7_GlobalSelect_ADDR: equ ah +LCDD7_IntCtrl_0_ADDR: equ 10ah +LCDD7_IntCtrl_1_ADDR: equ 10bh +LCDD7_IntEn_ADDR: equ 9h +LCDD7_MASK: equ 8h +; LCDD7_Data access macros +; GetLCDD7_Data macro, return in a +macro GetLCDD7_Data + mov a,[Port_2_Data_SHADE] + and a, 8h +endm +; SetLCDD7_Data macro +macro SetLCDD7_Data + or [Port_2_Data_SHADE], 8h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_Data macro +macro ClearLCDD7_Data + and [Port_2_Data_SHADE], ~8h + mov a, [Port_2_Data_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDD7_DriveMode_0 access macros +; GetLCDD7_DriveMode_0 macro, return in a +macro GetLCDD7_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 8h +endm +; SetLCDD7_DriveMode_0 macro +macro SetLCDD7_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 8h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_DriveMode_0 macro +macro ClearLCDD7_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~8h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDD7_DriveMode_1 access macros +; GetLCDD7_DriveMode_1 macro, return in a +macro GetLCDD7_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 8h +endm +; SetLCDD7_DriveMode_1 macro +macro SetLCDD7_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 8h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm +; ClearLCDD7_DriveMode_1 macro +macro ClearLCDD7_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~8h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDD7_Data_ADDR], a +endm + +; LCDE address and mask equates +LCDE_Data_ADDR: equ 8h +LCDE_DriveMode_0_ADDR: equ 108h +LCDE_DriveMode_1_ADDR: equ 109h +LCDE_DriveMode_2_ADDR: equ bh +LCDE_GlobalSelect_ADDR: equ ah +LCDE_IntCtrl_0_ADDR: equ 10ah +LCDE_IntCtrl_1_ADDR: equ 10bh +LCDE_IntEn_ADDR: equ 9h +LCDE_MASK: equ 10h +; LCDE_Data access macros +; GetLCDE_Data macro, return in a +macro GetLCDE_Data + mov a,[Port_2_Data_SHADE] + and a, 10h +endm +; SetLCDE_Data macro +macro SetLCDE_Data + or [Port_2_Data_SHADE], 10h + mov a, [Port_2_Data_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_Data macro +macro ClearLCDE_Data + and [Port_2_Data_SHADE], ~10h + mov a, [Port_2_Data_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDE_DriveMode_0 access macros +; GetLCDE_DriveMode_0 macro, return in a +macro GetLCDE_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 10h +endm +; SetLCDE_DriveMode_0 macro +macro SetLCDE_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 10h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_DriveMode_0 macro +macro ClearLCDE_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~10h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDE_DriveMode_1 access macros +; GetLCDE_DriveMode_1 macro, return in a +macro GetLCDE_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 10h +endm +; SetLCDE_DriveMode_1 macro +macro SetLCDE_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 10h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDE_Data_ADDR], a +endm +; ClearLCDE_DriveMode_1 macro +macro ClearLCDE_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~10h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDE_Data_ADDR], a +endm + +; LCDRS address and mask equates +LCDRS_Data_ADDR: equ 8h +LCDRS_DriveMode_0_ADDR: equ 108h +LCDRS_DriveMode_1_ADDR: equ 109h +LCDRS_DriveMode_2_ADDR: equ bh +LCDRS_GlobalSelect_ADDR: equ ah +LCDRS_IntCtrl_0_ADDR: equ 10ah +LCDRS_IntCtrl_1_ADDR: equ 10bh +LCDRS_IntEn_ADDR: equ 9h +LCDRS_MASK: equ 20h +; LCDRS_Data access macros +; GetLCDRS_Data macro, return in a +macro GetLCDRS_Data + mov a,[Port_2_Data_SHADE] + and a, 20h +endm +; SetLCDRS_Data macro +macro SetLCDRS_Data + or [Port_2_Data_SHADE], 20h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_Data macro +macro ClearLCDRS_Data + and [Port_2_Data_SHADE], ~20h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRS_DriveMode_0 access macros +; GetLCDRS_DriveMode_0 macro, return in a +macro GetLCDRS_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 20h +endm +; SetLCDRS_DriveMode_0 macro +macro SetLCDRS_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 20h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_DriveMode_0 macro +macro ClearLCDRS_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~20h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRS_DriveMode_1 access macros +; GetLCDRS_DriveMode_1 macro, return in a +macro GetLCDRS_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 20h +endm +; SetLCDRS_DriveMode_1 macro +macro SetLCDRS_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 20h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm +; ClearLCDRS_DriveMode_1 macro +macro ClearLCDRS_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~20h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRS_Data_ADDR], a +endm + +; LCDRW address and mask equates +LCDRW_Data_ADDR: equ 8h +LCDRW_DriveMode_0_ADDR: equ 108h +LCDRW_DriveMode_1_ADDR: equ 109h +LCDRW_DriveMode_2_ADDR: equ bh +LCDRW_GlobalSelect_ADDR: equ ah +LCDRW_IntCtrl_0_ADDR: equ 10ah +LCDRW_IntCtrl_1_ADDR: equ 10bh +LCDRW_IntEn_ADDR: equ 9h +LCDRW_MASK: equ 40h +; LCDRW_Data access macros +; GetLCDRW_Data macro, return in a +macro GetLCDRW_Data + mov a,[Port_2_Data_SHADE] + and a, 40h +endm +; SetLCDRW_Data macro +macro SetLCDRW_Data + or [Port_2_Data_SHADE], 40h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_Data macro +macro ClearLCDRW_Data + and [Port_2_Data_SHADE], ~40h + mov a, [Port_2_Data_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; LCDRW_DriveMode_0 access macros +; GetLCDRW_DriveMode_0 macro, return in a +macro GetLCDRW_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 40h +endm +; SetLCDRW_DriveMode_0 macro +macro SetLCDRW_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 40h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_DriveMode_0 macro +macro ClearLCDRW_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~40h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; LCDRW_DriveMode_1 access macros +; GetLCDRW_DriveMode_1 macro, return in a +macro GetLCDRW_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 40h +endm +; SetLCDRW_DriveMode_1 macro +macro SetLCDRW_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 40h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm +; ClearLCDRW_DriveMode_1 macro +macro ClearLCDRW_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~40h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[LCDRW_Data_ADDR], a +endm + +; MISO address and mask equates +MISO_Data_ADDR: equ 8h +MISO_DriveMode_0_ADDR: equ 108h +MISO_DriveMode_1_ADDR: equ 109h +MISO_DriveMode_2_ADDR: equ bh +MISO_GlobalSelect_ADDR: equ ah +MISO_IntCtrl_0_ADDR: equ 10ah +MISO_IntCtrl_1_ADDR: equ 10bh +MISO_IntEn_ADDR: equ 9h +MISO_MASK: equ 80h +; MISO_Data access macros +; GetMISO_Data macro, return in a +macro GetMISO_Data + mov a,[Port_2_Data_SHADE] + and a, 80h +endm +; SetMISO_Data macro +macro SetMISO_Data + or [Port_2_Data_SHADE], 80h + mov a, [Port_2_Data_SHADE] + mov reg[MISO_Data_ADDR], a +endm +; ClearMISO_Data macro +macro ClearMISO_Data + and [Port_2_Data_SHADE], ~80h + mov a, [Port_2_Data_SHADE] + mov reg[MISO_Data_ADDR], a +endm + +; MISO_DriveMode_0 access macros +; GetMISO_DriveMode_0 macro, return in a +macro GetMISO_DriveMode_0 + mov a,[Port_2_DriveMode_0_SHADE] + and a, 80h +endm +; SetMISO_DriveMode_0 macro +macro SetMISO_DriveMode_0 + or [Port_2_DriveMode_0_SHADE], 80h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[MISO_Data_ADDR], a +endm +; ClearMISO_DriveMode_0 macro +macro ClearMISO_DriveMode_0 + and [Port_2_DriveMode_0_SHADE], ~80h + mov a, [Port_2_DriveMode_0_SHADE] + mov reg[MISO_Data_ADDR], a +endm + +; MISO_DriveMode_1 access macros +; GetMISO_DriveMode_1 macro, return in a +macro GetMISO_DriveMode_1 + mov a,[Port_2_DriveMode_1_SHADE] + and a, 80h +endm +; SetMISO_DriveMode_1 macro +macro SetMISO_DriveMode_1 + or [Port_2_DriveMode_1_SHADE], 80h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[MISO_Data_ADDR], a +endm +; ClearMISO_DriveMode_1 macro +macro ClearMISO_DriveMode_1 + and [Port_2_DriveMode_1_SHADE], ~80h + mov a, [Port_2_DriveMode_1_SHADE] + mov reg[MISO_Data_ADDR], a +endm + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm new file mode 100644 index 0000000..7cb2f53 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Heater_EnableInt +export _PWM8_Heater_EnableInt +export PWM8_Heater_DisableInt +export _PWM8_Heater_DisableInt +export PWM8_Heater_Start +export _PWM8_Heater_Start +export PWM8_Heater_Stop +export _PWM8_Heater_Stop +export PWM8_Heater_WritePeriod +export _PWM8_Heater_WritePeriod +export PWM8_Heater_WritePulseWidth +export _PWM8_Heater_WritePulseWidth +export PWM8_Heater_bReadPulseWidth +export _PWM8_Heater_bReadPulseWidth +export PWM8_Heater_bReadCounter +export _PWM8_Heater_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Heater_ReadPulseWidth ; deprecated +export _bPWM8_Heater_ReadPulseWidth ; deprecated +export bPWM8_Heater_ReadCounter ; deprecated +export _bPWM8_Heater_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_EnableInt: +_PWM8_Heater_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_DisableInt: +_PWM8_Heater_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Start: +_PWM8_Heater_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_Stop: +_PWM8_Heater_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Heater_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePeriod: +_PWM8_Heater_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_WritePulseWidth: +_PWM8_Heater_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Heater_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadPulseWidth: +_PWM8_Heater_bReadPulseWidth: + bPWM8_Heater_ReadPulseWidth: ; this name deprecated +_bPWM8_Heater_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Heater_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Heater_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Heater_bReadCounter: +_PWM8_Heater_bReadCounter: + bPWM8_Heater_ReadCounter: ; this name deprecated +_bPWM8_Heater_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Heater_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Heater_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Heater_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Heater_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Heater_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Heater_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Heater_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Heater_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Heater_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Heater.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h new file mode 100644 index 0000000..025a621 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Heater.h +// Version: 2.60, Updated on 2015/3/4 at 22:26:52 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Heater_INCLUDE +#define PWM8_Heater_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 PWM8_Heater_EnableInt +#pragma fastcall16 PWM8_Heater_DisableInt +#pragma fastcall16 PWM8_Heater_Start +#pragma fastcall16 PWM8_Heater_Stop +#pragma fastcall16 PWM8_Heater_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Heater_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Heater_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Heater_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Heater_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Heater_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Heater API. +//------------------------------------------------- + +extern void PWM8_Heater_EnableInt(void); // Proxy Class 1 +extern void PWM8_Heater_DisableInt(void); // Proxy Class 1 +extern void PWM8_Heater_Start(void); // Proxy Class 1 +extern void PWM8_Heater_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Heater_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Heater_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Heater_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Heater_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Heater_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Heater API's. +//-------------------------------------------------- + +#define PWM8_Heater_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Heater_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Heater_INT_MASK ( 0x02 ) + + +//-------------------------------------------------- +// Constants for PWM8_Heater user defined values +//-------------------------------------------------- + +#define PWM8_Heater_PERIOD ( 0xff ) +#define PWM8_Heater_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Heater +//------------------------------------------------- + +#pragma ioport PWM8_Heater_COUNTER_REG: 0x024 //DR0 Count register +BYTE PWM8_Heater_COUNTER_REG; +#pragma ioport PWM8_Heater_PERIOD_REG: 0x025 //DR1 Period register +BYTE PWM8_Heater_PERIOD_REG; +#pragma ioport PWM8_Heater_COMPARE_REG: 0x026 //DR2 Compare register +BYTE PWM8_Heater_COMPARE_REG; +#pragma ioport PWM8_Heater_CONTROL_REG: 0x027 //Control register +BYTE PWM8_Heater_CONTROL_REG; +#pragma ioport PWM8_Heater_FUNC_REG: 0x124 //Function register +BYTE PWM8_Heater_FUNC_REG; +#pragma ioport PWM8_Heater_INPUT_REG: 0x125 //Input register +BYTE PWM8_Heater_INPUT_REG; +#pragma ioport PWM8_Heater_OUTPUT_REG: 0x126 //Output register +BYTE PWM8_Heater_OUTPUT_REG; +#pragma ioport PWM8_Heater_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Heater_INT_REG; + + +//------------------------------------------------- +// PWM8_Heater Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Heater_Start_M \ + PWM8_Heater_CONTROL_REG |= PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_Stop_M \ + PWM8_Heater_CONTROL_REG &= ~PWM8_Heater_CONTROL_REG_START_BIT + +#define PWM8_Heater_EnableInt_M \ + M8C_EnableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#define PWM8_Heater_DisableInt_M \ + M8C_DisableIntMask(PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK) + +#endif +// end of file PWM8_Heater.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc new file mode 100644 index 0000000..ecc67e8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Heater.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Heater.inc +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Heater API's. +;-------------------------------------------------- + +PWM8_Heater_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Heater_INT_REG: equ 0x0e1 +PWM8_Heater_INT_MASK: equ 0x02 + + +;-------------------------------------------------- +; Constants for PWM8_Heater user defined values +;-------------------------------------------------- + +PWM8_Heater_PERIOD: equ 0xff +PWM8_Heater_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Heater +;-------------------------------------------------- + +PWM8_Heater_COUNTER_REG: equ 0x24 ; DR0 Count register +PWM8_Heater_PERIOD_REG: equ 0x25 ; DR1 Period register +PWM8_Heater_COMPARE_REG: equ 0x26 ; DR2 Compare register +PWM8_Heater_CONTROL_REG: equ 0x27 ; Control register +PWM8_Heater_FUNC_REG: equ 0x24 ; Function register +PWM8_Heater_INPUT_REG: equ 0x25 ; Input register +PWM8_Heater_OUTPUT_REG: equ 0x26 ; Output register + + +;-------------------------------------------------- +; PWM8_Heater Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Heater_Start_M + or reg[PWM8_Heater_CONTROL_REG], PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_Stop_M + and reg[PWM8_Heater_CONTROL_REG], ~PWM8_Heater_CONTROL_REG_START_BIT + endm + + macro PWM8_Heater_EnableInt_M + M8C_EnableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + macro PWM8_Heater_DisableInt_M + M8C_DisableIntMask PWM8_Heater_INT_REG, PWM8_Heater_INT_MASK + endm + + +; end of file PWM8_Heater.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm new file mode 100644 index 0000000..87fb557 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_HeaterINT.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_HeaterINT.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Heater.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Heater_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Heater_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Heater_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_HeaterINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm new file mode 100644 index 0000000..d1fea45 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_NB_Out_EnableInt +export _PWM8_NB_Out_EnableInt +export PWM8_NB_Out_DisableInt +export _PWM8_NB_Out_DisableInt +export PWM8_NB_Out_Start +export _PWM8_NB_Out_Start +export PWM8_NB_Out_Stop +export _PWM8_NB_Out_Stop +export PWM8_NB_Out_WritePeriod +export _PWM8_NB_Out_WritePeriod +export PWM8_NB_Out_WritePulseWidth +export _PWM8_NB_Out_WritePulseWidth +export PWM8_NB_Out_bReadPulseWidth +export _PWM8_NB_Out_bReadPulseWidth +export PWM8_NB_Out_bReadCounter +export _PWM8_NB_Out_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_NB_Out_ReadPulseWidth ; deprecated +export _bPWM8_NB_Out_ReadPulseWidth ; deprecated +export bPWM8_NB_Out_ReadCounter ; deprecated +export _bPWM8_NB_Out_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_EnableInt: +_PWM8_NB_Out_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_DisableInt: +_PWM8_NB_Out_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Start: +_PWM8_NB_Out_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_Stop: +_PWM8_NB_Out_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_NB_Out_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePeriod: +_PWM8_NB_Out_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_WritePulseWidth: +_PWM8_NB_Out_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_NB_Out_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadPulseWidth: +_PWM8_NB_Out_bReadPulseWidth: + bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated +_bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_NB_Out_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_NB_Out_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_NB_Out_bReadCounter: +_PWM8_NB_Out_bReadCounter: + bPWM8_NB_Out_ReadCounter: ; this name deprecated +_bPWM8_NB_Out_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_NB_Out_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_NB_Out_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_NB_Out_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_NB_Out_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_NB_Out_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_NB_Out_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_NB_Out_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_NB_Out.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h new file mode 100644 index 0000000..47087f9 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_NB_Out.h +// Version: 2.60, Updated on 2015/3/4 at 22:26:52 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_NB_Out_INCLUDE +#define PWM8_NB_Out_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 PWM8_NB_Out_EnableInt +#pragma fastcall16 PWM8_NB_Out_DisableInt +#pragma fastcall16 PWM8_NB_Out_Start +#pragma fastcall16 PWM8_NB_Out_Stop +#pragma fastcall16 PWM8_NB_Out_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_NB_Out_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_NB_Out_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_NB_Out_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_NB_Out_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_NB_Out_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_NB_Out API. +//------------------------------------------------- + +extern void PWM8_NB_Out_EnableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_DisableInt(void); // Proxy Class 1 +extern void PWM8_NB_Out_Start(void); // Proxy Class 1 +extern void PWM8_NB_Out_Stop(void); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadCounter(void); // Proxy Class 2 +extern void PWM8_NB_Out_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_NB_Out_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_NB_Out_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_NB_Out_ReadCounter(void); // Deprecated +extern BYTE bPWM8_NB_Out_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out API's. +//-------------------------------------------------- + +#define PWM8_NB_Out_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_NB_Out_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_NB_Out_INT_MASK ( 0x08 ) + + +//-------------------------------------------------- +// Constants for PWM8_NB_Out user defined values +//-------------------------------------------------- + +#define PWM8_NB_Out_PERIOD ( 0xff ) +#define PWM8_NB_Out_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_NB_Out +//------------------------------------------------- + +#pragma ioport PWM8_NB_Out_COUNTER_REG: 0x02c //DR0 Count register +BYTE PWM8_NB_Out_COUNTER_REG; +#pragma ioport PWM8_NB_Out_PERIOD_REG: 0x02d //DR1 Period register +BYTE PWM8_NB_Out_PERIOD_REG; +#pragma ioport PWM8_NB_Out_COMPARE_REG: 0x02e //DR2 Compare register +BYTE PWM8_NB_Out_COMPARE_REG; +#pragma ioport PWM8_NB_Out_CONTROL_REG: 0x02f //Control register +BYTE PWM8_NB_Out_CONTROL_REG; +#pragma ioport PWM8_NB_Out_FUNC_REG: 0x12c //Function register +BYTE PWM8_NB_Out_FUNC_REG; +#pragma ioport PWM8_NB_Out_INPUT_REG: 0x12d //Input register +BYTE PWM8_NB_Out_INPUT_REG; +#pragma ioport PWM8_NB_Out_OUTPUT_REG: 0x12e //Output register +BYTE PWM8_NB_Out_OUTPUT_REG; +#pragma ioport PWM8_NB_Out_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_NB_Out_INT_REG; + + +//------------------------------------------------- +// PWM8_NB_Out Macro 'Functions' +//------------------------------------------------- + +#define PWM8_NB_Out_Start_M \ + PWM8_NB_Out_CONTROL_REG |= PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_Stop_M \ + PWM8_NB_Out_CONTROL_REG &= ~PWM8_NB_Out_CONTROL_REG_START_BIT + +#define PWM8_NB_Out_EnableInt_M \ + M8C_EnableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#define PWM8_NB_Out_DisableInt_M \ + M8C_DisableIntMask(PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK) + +#endif +// end of file PWM8_NB_Out.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc new file mode 100644 index 0000000..71ffe9e --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_Out.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_Out.inc +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out API's. +;-------------------------------------------------- + +PWM8_NB_Out_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_NB_Out_INT_REG: equ 0x0e1 +PWM8_NB_Out_INT_MASK: equ 0x08 + + +;-------------------------------------------------- +; Constants for PWM8_NB_Out user defined values +;-------------------------------------------------- + +PWM8_NB_Out_PERIOD: equ 0xff +PWM8_NB_Out_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_NB_Out +;-------------------------------------------------- + +PWM8_NB_Out_COUNTER_REG: equ 0x2c ; DR0 Count register +PWM8_NB_Out_PERIOD_REG: equ 0x2d ; DR1 Period register +PWM8_NB_Out_COMPARE_REG: equ 0x2e ; DR2 Compare register +PWM8_NB_Out_CONTROL_REG: equ 0x2f ; Control register +PWM8_NB_Out_FUNC_REG: equ 0x2c ; Function register +PWM8_NB_Out_INPUT_REG: equ 0x2d ; Input register +PWM8_NB_Out_OUTPUT_REG: equ 0x2e ; Output register + + +;-------------------------------------------------- +; PWM8_NB_Out Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_NB_Out_Start_M + or reg[PWM8_NB_Out_CONTROL_REG], PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_Stop_M + and reg[PWM8_NB_Out_CONTROL_REG], ~PWM8_NB_Out_CONTROL_REG_START_BIT + endm + + macro PWM8_NB_Out_EnableInt_M + M8C_EnableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + macro PWM8_NB_Out_DisableInt_M + M8C_DisableIntMask PWM8_NB_Out_INT_REG, PWM8_NB_Out_INT_MASK + endm + + +; end of file PWM8_NB_Out.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm new file mode 100644 index 0000000..876acb1 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_NB_OutINT.asm @@ -0,0 +1,93 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_NB_OutINT.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_NB_Out.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_NB_Out_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_NB_Out_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_NB_Out_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom assembly code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom assembly code above this banner + ;--------------------------------------------------- + + ;--------------------------------------------------- + ; Insert a lcall to a C function below this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + + ;PRESERVE_CPU_CONTEXT + ;lcall _My_C_Function + ;RESTORE_CPU_CONTEXT + + ;--------------------------------------------------- + ; Insert a lcall to a C function above this banner + ; and un-comment the lines between these banners + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_NB_OutINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm new file mode 100644 index 0000000..5825a72 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.asm @@ -0,0 +1,331 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 User Module software implementation file +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export PWM8_Vout_EnableInt +export _PWM8_Vout_EnableInt +export PWM8_Vout_DisableInt +export _PWM8_Vout_DisableInt +export PWM8_Vout_Start +export _PWM8_Vout_Start +export PWM8_Vout_Stop +export _PWM8_Vout_Stop +export PWM8_Vout_WritePeriod +export _PWM8_Vout_WritePeriod +export PWM8_Vout_WritePulseWidth +export _PWM8_Vout_WritePulseWidth +export PWM8_Vout_bReadPulseWidth +export _PWM8_Vout_bReadPulseWidth +export PWM8_Vout_bReadCounter +export _PWM8_Vout_bReadCounter + +; The following functions are deprecated and subject to omission in future releases +; +export bPWM8_Vout_ReadPulseWidth ; deprecated +export _bPWM8_Vout_ReadPulseWidth ; deprecated +export bPWM8_Vout_ReadCounter ; deprecated +export _bPWM8_Vout_ReadCounter ; deprecated + + +AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + +;----------------------------------------------- +; Constant Definitions +;----------------------------------------------- + +INPUT_REG_NULL: equ 0x00 ; Clear the input register + + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- + + +AREA UserModules (ROM, REL) + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_EnableInt +; +; DESCRIPTION: +; Enables this PWM's interrupt by setting the interrupt enable mask bit +; associated with this User Module. This function has no effect until and +; unless the global interrupts are enabled (for example by using the +; macro M8C_EnableGInt). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None. +; RETURNS: Nothing. +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_EnableInt: +_PWM8_Vout_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_EnableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_DisableInt +; +; DESCRIPTION: +; Disables this PWM's interrupt by clearing the interrupt enable +; mask bit associated with this User Module. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_DisableInt: +_PWM8_Vout_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_DisableInt_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Start +; +; DESCRIPTION: +; Sets the start bit in the Control register of this user module. The +; PWM will begin counting on the next input clock as soon as the +; enable input is asserted high. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Start: +_PWM8_Vout_Start: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Start_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_Stop +; +; DESCRIPTION: +; Disables PWM operation by clearing the start bit in the Control +; register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_Stop: +_PWM8_Vout_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + PWM8_Vout_Stop_M + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePeriod +; +; DESCRIPTION: +; Write the 8-bit period value into the Period register (DR1). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; If the PWM user module is stopped, then this value will also be +; latched into the Count register (DR0). +; +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePeriod: +_PWM8_Vout_WritePeriod: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_PERIOD_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_WritePulseWidth +; +; DESCRIPTION: +; Writes compare value into the Compare register (DR2). +;----------------------------------------------------------------------------- +; +; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) +; RETURNS: Nothing +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_WritePulseWidth: +_PWM8_Vout_WritePulseWidth: + RAM_PROLOGUE RAM_USE_CLASS_1 + mov reg[PWM8_Vout_COMPARE_REG], A + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadPulseWidth +; +; DESCRIPTION: +; Reads the Compare register. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) +; SIDE EFFECTS: +; The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadPulseWidth: +_PWM8_Vout_bReadPulseWidth: + bPWM8_Vout_ReadPulseWidth: ; this name deprecated +_bPWM8_Vout_ReadPulseWidth: ; this name deprecated + RAM_PROLOGUE RAM_USE_CLASS_1 + mov A, reg[PWM8_Vout_COMPARE_REG] + RAM_EPILOGUE RAM_USE_CLASS_1 + ret + + +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: PWM8_Vout_bReadCounter +; +; DESCRIPTION: +; Returns the value in the Count register (DR0), preserving the value in +; the compare register (DR2). Interrupts are prevented during the transfer +; from the Count to the Compare registers by holding the clock low in +; the PSoC block. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: None +; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) +; SIDE EFFECTS: +; 1) The user module is stopped momentarily and one or more counts may be missed. +; 2) The A and X registers may be modified by this or future implementations +; of this function. The same is true for all RAM page pointer registers in +; the Large Memory Model. When necessary, it is the calling function's +; responsibility to perserve their values across calls to fastcall16 +; functions. +; + PWM8_Vout_bReadCounter: +_PWM8_Vout_bReadCounter: + bPWM8_Vout_ReadCounter: ; this name deprecated +_bPWM8_Vout_ReadCounter: ; this name deprecated + + bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + wCounter: EQU 2 ; Frame offset to temp Count store + STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + + RAM_PROLOGUE RAM_USE_CLASS_2 + mov X, SP ; X <- stack frame pointer + mov A, reg[PWM8_Vout_COMPARE_REG] ; Save the Compare register on the stack + push A ; + PWM8_Vout_Stop_M ; Disable (stop) the PWM + M8C_SetBank1 ; + mov A, reg[PWM8_Vout_INPUT_REG] ; save the clock input setting + push A ; on the stack (now 2 bytes) and ... + ; hold the clock low: + mov reg[PWM8_Vout_INPUT_REG], INPUT_REG_NULL + M8C_SetBank0 + ; Extract the Count via DR2 register + mov A, reg[PWM8_Vout_COUNTER_REG] ; DR2 <- DR0 + mov A, reg[PWM8_Vout_COMPARE_REG] ; Stash the Count on the stack + push A ; -stack frame is now 3 bytes + mov A, [X+bOrigCompareValue] ; Restore the Compare register + mov reg[PWM8_Vout_COMPARE_REG], A + M8C_SetBank1 ; Restore the PWM operation: + mov A, [X+bOrigClockSetting] ; First, the clock setting... + mov reg[PWM8_Vout_INPUT_REG], A ; + M8C_SetBank0 ; + PWM8_Vout_Start_M ; then re-enable the PWM. + pop A ; Setup the return value + ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + RAM_EPILOGUE RAM_USE_CLASS_2 + ret + +.ENDSECTION + +; End of File PWM8_Vout.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h new file mode 100644 index 0000000..22f5da4 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.h @@ -0,0 +1,109 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: PWM8_Vout.h +// Version: 2.60, Updated on 2015/3/4 at 22:26:52 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: PWM8 User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef PWM8_Vout_INCLUDE +#define PWM8_Vout_INCLUDE + +#include <m8c.h> + +#pragma fastcall16 PWM8_Vout_EnableInt +#pragma fastcall16 PWM8_Vout_DisableInt +#pragma fastcall16 PWM8_Vout_Start +#pragma fastcall16 PWM8_Vout_Stop +#pragma fastcall16 PWM8_Vout_bReadCounter // Read DR0 +#pragma fastcall16 PWM8_Vout_WritePeriod // Write DR1 +#pragma fastcall16 PWM8_Vout_bReadPulseWidth // Read DR2 +#pragma fastcall16 PWM8_Vout_WritePulseWidth // Write DR2 + +// The following symbols are deprecated. +// They may be omitted in future releases +// +#pragma fastcall16 bPWM8_Vout_ReadCounter // Read DR0 (Deprecated) +#pragma fastcall16 bPWM8_Vout_ReadPulseWidth // Read DR2 (Deprecated) + + +//------------------------------------------------- +// Prototypes of the PWM8_Vout API. +//------------------------------------------------- + +extern void PWM8_Vout_EnableInt(void); // Proxy Class 1 +extern void PWM8_Vout_DisableInt(void); // Proxy Class 1 +extern void PWM8_Vout_Start(void); // Proxy Class 1 +extern void PWM8_Vout_Stop(void); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadCounter(void); // Proxy Class 2 +extern void PWM8_Vout_WritePeriod(BYTE bPeriod); // Proxy Class 1 +extern BYTE PWM8_Vout_bReadPulseWidth(void); // Proxy Class 1 +extern void PWM8_Vout_WritePulseWidth(BYTE bPulseWidth); // Proxy Class 1 + +// The following functions are deprecated. +// They may be omitted in future releases +// +extern BYTE bPWM8_Vout_ReadCounter(void); // Deprecated +extern BYTE bPWM8_Vout_ReadPulseWidth(void); // Deprecated + + +//-------------------------------------------------- +// Constants for PWM8_Vout API's. +//-------------------------------------------------- + +#define PWM8_Vout_CONTROL_REG_START_BIT ( 0x01 ) +#define PWM8_Vout_INT_REG_ADDR ( 0x0e1 ) +#define PWM8_Vout_INT_MASK ( 0x04 ) + + +//-------------------------------------------------- +// Constants for PWM8_Vout user defined values +//-------------------------------------------------- + +#define PWM8_Vout_PERIOD ( 0xff ) +#define PWM8_Vout_PULSE_WIDTH ( 0x00 ) + + +//------------------------------------------------- +// Register Addresses for PWM8_Vout +//------------------------------------------------- + +#pragma ioport PWM8_Vout_COUNTER_REG: 0x028 //DR0 Count register +BYTE PWM8_Vout_COUNTER_REG; +#pragma ioport PWM8_Vout_PERIOD_REG: 0x029 //DR1 Period register +BYTE PWM8_Vout_PERIOD_REG; +#pragma ioport PWM8_Vout_COMPARE_REG: 0x02a //DR2 Compare register +BYTE PWM8_Vout_COMPARE_REG; +#pragma ioport PWM8_Vout_CONTROL_REG: 0x02b //Control register +BYTE PWM8_Vout_CONTROL_REG; +#pragma ioport PWM8_Vout_FUNC_REG: 0x128 //Function register +BYTE PWM8_Vout_FUNC_REG; +#pragma ioport PWM8_Vout_INPUT_REG: 0x129 //Input register +BYTE PWM8_Vout_INPUT_REG; +#pragma ioport PWM8_Vout_OUTPUT_REG: 0x12a //Output register +BYTE PWM8_Vout_OUTPUT_REG; +#pragma ioport PWM8_Vout_INT_REG: 0x0e1 //Interrupt Mask Register +BYTE PWM8_Vout_INT_REG; + + +//------------------------------------------------- +// PWM8_Vout Macro 'Functions' +//------------------------------------------------- + +#define PWM8_Vout_Start_M \ + PWM8_Vout_CONTROL_REG |= PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_Stop_M \ + PWM8_Vout_CONTROL_REG &= ~PWM8_Vout_CONTROL_REG_START_BIT + +#define PWM8_Vout_EnableInt_M \ + M8C_EnableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#define PWM8_Vout_DisableInt_M \ + M8C_DisableIntMask(PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK) + +#endif +// end of file PWM8_Vout.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc new file mode 100644 index 0000000..8187a55 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_Vout.inc @@ -0,0 +1,67 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_Vout.inc +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the PWM8 user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for PWM8_Vout API's. +;-------------------------------------------------- + +PWM8_Vout_CONTROL_REG_START_BIT: equ 0x01 ; Control register start bit +PWM8_Vout_INT_REG: equ 0x0e1 +PWM8_Vout_INT_MASK: equ 0x04 + + +;-------------------------------------------------- +; Constants for PWM8_Vout user defined values +;-------------------------------------------------- + +PWM8_Vout_PERIOD: equ 0xff +PWM8_Vout_PULSE_WIDTH: equ 0x00 + + +;-------------------------------------------------- +; Register Address Constants for PWM8_Vout +;-------------------------------------------------- + +PWM8_Vout_COUNTER_REG: equ 0x28 ; DR0 Count register +PWM8_Vout_PERIOD_REG: equ 0x29 ; DR1 Period register +PWM8_Vout_COMPARE_REG: equ 0x2a ; DR2 Compare register +PWM8_Vout_CONTROL_REG: equ 0x2b ; Control register +PWM8_Vout_FUNC_REG: equ 0x28 ; Function register +PWM8_Vout_INPUT_REG: equ 0x29 ; Input register +PWM8_Vout_OUTPUT_REG: equ 0x2a ; Output register + + +;-------------------------------------------------- +; PWM8_Vout Macro 'Functions' +;-------------------------------------------------- + + macro PWM8_Vout_Start_M + or reg[PWM8_Vout_CONTROL_REG], PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_Stop_M + and reg[PWM8_Vout_CONTROL_REG], ~PWM8_Vout_CONTROL_REG_START_BIT + endm + + macro PWM8_Vout_EnableInt_M + M8C_EnableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + macro PWM8_Vout_DisableInt_M + M8C_DisableIntMask PWM8_Vout_INT_REG, PWM8_Vout_INT_MASK + endm + + +; end of file PWM8_Vout.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm new file mode 100644 index 0000000..cf22c21 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/PWM8_VoutINT.asm @@ -0,0 +1,79 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: PWM8_VoutINT.asm +;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: PWM8 Interrupt Service Routine +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" +include "PWM8_Vout.inc" +include "memory.inc" + + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _PWM8_Vout_ISR + + +AREA InterruptRAM (RAM,REL,CON) + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _PWM8_Vout_ISR +; +; DESCRIPTION: Unless modified, this implements only a null handler stub. +; +;----------------------------------------------------------------------------- +; + +_PWM8_Vout_ISR: + + ;@PSoC_UserCode_BODY@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + + +; end of file PWM8_VoutINT.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm new file mode 100644 index 0000000..d36656d --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.asm @@ -0,0 +1,594 @@ +;;***************************************************************************** +;;***************************************************************************** +;; Filename: SleepTimer.asm +;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: SleepTimer User Module software implementation file for the +;; 22/24/27/29xxx families. +;; +;; +;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling +;; arguments and observe the associated "Registers are volatile" policy. +;; This means it is the caller's responsibility to preserve any values +;; in the X and A registers that are still needed after the API functions +;; returns. For Large Memory Model devices it is also the caller's +;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and +;; MVW_PP registers. Even though some of these registers may not be modified +;; now, there is no guarantee that will remain the case in future releases. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + + +include "m8c.inc" +include "memory.inc" +include "SleepTimer.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +;------------------------------------------------------------------- +; Declare the functions global for both assembler and C compiler. +; +; Note that there are two names for each API. First name is +; assembler reference. Name with underscore is name reference for +; C compiler. Calling function in C source code does not require +; the underscore. +;------------------------------------------------------------------- +export SleepTimer_EnableInt +export _SleepTimer_EnableInt +export SleepTimer_DisableInt +export _SleepTimer_DisableInt + +export SleepTimer_Start +export _SleepTimer_Start +export SleepTimer_Stop +export _SleepTimer_Stop + +export SleepTimer_TickWait +export _SleepTimer_TickWait + +export SleepTimer_SyncWait +export _SleepTimer_SyncWait + +export SleepTimer_SetInterval +export _SleepTimer_SetInterval + +export SleepTimer_bGetTickCntr +export _SleepTimer_bGetTickCntr + +export SleepTimer_SetTimer +export _SleepTimer_SetTimer + +export SleepTimer_bGetTimer +export _SleepTimer_bGetTimer + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +export SleepTimer_iGetTickCntr +export _SleepTimer_iGetTickCntr +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +export SleepTimer_lGetTickCntr +export _SleepTimer_lGetTickCntr +ENDIF + + +area text (ROM,REL) + +;----------------------------------------------- +; EQUATES +;----------------------------------------------- + +; Counter LSB Offset if 4 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 4) +ST_LSB_OFFSET: equ 3 +ENDIF + +; Counter LSB Offset if 2 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 2) +ST_LSB_OFFSET: equ 1 +ENDIF + +; Counter LSB Offset if 1 byte tick counter +IF(SleepTimer_TICK_CNTR_SIZE & 1) +ST_LSB_OFFSET: equ 0 +ENDIF + + +area UserModules (ROM, REL, CON) + +;============================================================================= +;============================================================================= +; +; Low-Level Commands +; +;============================================================================= +;============================================================================= + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_EnableInt +; +; DESCRIPTION: +; Enables SleepTimer interrupts. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_EnableInt: +_SleepTimer_EnableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_DisableInt +; +; DESCRIPTION: +; Disables the sleep timer. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_DisableInt: +_SleepTimer_DisableInt: + RAM_PROLOGUE RAM_USE_CLASS_1 + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Start() +; +; DESCRIPTION: +; Clears all the variables. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Start: +_SleepTimer_Start: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov A,0 + mov [SleepTimer_fTick],A + mov [SleepTimer_bTimerValue],A + mov [SleepTimer_bCountDown],A + mov [SleepTimer_TickCount + ST_LSB_OFFSET],A ; Clear TickCount[0:7] +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 1],A ; Clear TickCount[8:15] +ENDIF + + +IF(SleepTimer_TICK_CNTR_SIZE & 4) + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 2],A ; Clear TickCount[16:31] + mov [SleepTimer_TickCount + ST_LSB_OFFSET - 3],A +ENDIF + + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_Stop +; +; DESCRIPTION: +; This function does nothing at this time. It is only here as a place +; holder. +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none. +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_Stop: +_SleepTimer_Stop: + RAM_PROLOGUE RAM_USE_CLASS_1 + RAM_EPILOGUE RAM_USE_CLASS_1 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetInterval +; +; DESCRIPTION: +; Sets sleep timer interval +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Timer setting +; +; RETURNS: +; none. +; +; SIDE EFFECTS: +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetInterval: +_SleepTimer_SetInterval: + RAM_PROLOGUE RAM_USE_CLASS_2 + and A,SleepTimer_CLOCK_MASK ; Mask off invalid data + mov X, SP + push A + M8C_SetBank1 + mov A, reg[OSC_CR0] ; Get current timer value + and A,~SleepTimer_CLOCK_MASK ; Zero out old timer value + or A, [X] ; Set new timer values + mov reg[OSC_CR0],A ; Write it + M8C_SetBank0 + pop A + RAM_EPILOGUE RAM_USE_CLASS_2 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_TickWait(BYTE bTicks) +; +; DESCRIPTION: +; Wait X Ticks and return +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= Count down time +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_TickWait: +_SleepTimer_TickWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_fTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + +.WaitTick: + tst [SleepTimer_fTick],0xFF ; Check for tick + jz .WaitTick + mov [SleepTimer_fTick],0x00 ; Clear tick flag + dec A ; Dec the timer variable + jnz .WaitTick ; Loop until we count down to zero + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SyncWait(BYTE bCounts, BYTE fMode) +; +; DESCRIPTION: +; This function resets the SyncWait timer. If fMode = 0, the timer +; is set to the new value then exits the function immediatly. If fMode +; is set to 1, the firmware waits for the timer to expire before the +; timer is reset and and exits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A <= tCounts to wait +; X <= fMode fMode = 0 Just reload the value, do not wait +; fMode = 1 Wait for last value to count down to zero +; then reload. +; +; RETURNS: +; none. +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SyncWait: +_SleepTimer_SyncWait: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_bCountDown + swap A,X + AND A,SleepTimer_FORCE_RELOAD + jnz .ReloadIt + +.WaitLoop: + tst [SleepTimer_bCountDown],0xFF + jnz .WaitLoop + + +.ReloadIt: + swap A,X + mov [SleepTimer_bCountDown],A + + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + + + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTickCntr +; +; DESCRIPTION: +; Returns the LSB of the tick Counter +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; LSB of lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTickCntr: +_SleepTimer_bGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_SetTimer +; +; DESCRIPTION: +; Set timer with parameter in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; A => Value used to set Timer value +; +; RETURNS: +; None +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_SetTimer: +_SleepTimer_SetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov [SleepTimer_bTimerValue],A + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_bGetTimer +; +; DESCRIPTION: +; Returns timer value in A +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; None +; +; RETURNS: +; Return timer value in A +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_bGetTimer: +_SleepTimer_bGetTimer: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + mov A,[SleepTimer_bTimerValue] + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION + +IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_iGetTickCntr +; +; DESCRIPTION: +; Returns the least significant 16 bits. +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; none +; +; RETURNS: +; (int)TickCount in A and X +; X <= MSB +; A <= LSB +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_iGetTickCntr: +_SleepTimer_iGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_SETPAGE_CUR >SleepTimer_TickCount + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] ; Place LSB in A + mov X,[SleepTimer_TickCount + ST_LSB_OFFSET - 1] ; Place MSB in X + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + ret +.ENDSECTION +ENDIF + +IF(SleepTimer_TICK_CNTR_SIZE & 4) +.SECTION +;----------------------------------------------------------------------------- +; FUNCTION NAME: SleepTimer_lGetTickCntr +; +; DESCRIPTION: +; Returns a pointer to TickCount +; +;----------------------------------------------------------------------------- +; +; ARGUMENTS: +; [A:X] => Pointer to 32 bit tick counter (X=LSB, A=MSB) +; +; RETURNS: +; Pointer to lTickCount +; +; SIDE EFFECTS; +; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! +; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER +; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE +; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER +; REGISTERS WILL NOT BE MODIFIED. +; +; Page Pointer Registers Modified: +; CUR_PP +; +; THEORY of OPERATION OR PROCEDURE: +; + SleepTimer_lGetTickCntr: +_SleepTimer_lGetTickCntr: + RAM_PROLOGUE RAM_USE_CLASS_4 + RAM_PROLOGUE RAM_USE_CLASS_3 + ; Disable interrupt here + M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_SETPAGE_CUR >SleepTimer_TickCount + RAM_SETPAGE_IDX A + push A + mov A,[SleepTimer_TickCount + 0] + mov [X + 0],A + mov A,[SleepTimer_TickCount + 1] + mov [X + 1],A + mov A,[SleepTimer_TickCount + 2] + mov [X + 2],A + mov A,[SleepTimer_TickCount + 3] + mov [X + 3],A + pop A + + M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + RAM_EPILOGUE RAM_USE_CLASS_4 + RAM_EPILOGUE RAM_USE_CLASS_3 + ret +.ENDSECTION +ENDIF + + + + +; End of File SleepTimer.asm diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h new file mode 100644 index 0000000..c8f3854 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.h @@ -0,0 +1,78 @@ +//***************************************************************************** +//***************************************************************************** +// FILENAME: SleepTimer.h +// Version: 1.0, Updated on 2015/3/4 at 22:26:59 +// Generated by PSoC Designer 5.4.3191 +// +// DESCRIPTION: SleepTimer User Module C Language interface file +//----------------------------------------------------------------------------- +// Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +//***************************************************************************** +//***************************************************************************** +#ifndef SleepTimer_INCLUDE +#define SleepTimer_INCLUDE + +#include <m8c.h> +#define SleepTimer_TICK_CNTR_SIZE 4 + +#pragma fastcall16 SleepTimer_EnableInt // Proxy 1 +#pragma fastcall16 SleepTimer_DisableInt // Proxy 1 +#pragma fastcall16 SleepTimer_Start // Proxy 1 +#pragma fastcall16 SleepTimer_Stop // Proxy 1 +#pragma fastcall16 SleepTimer_SetInterval // Proxy 1 +#pragma fastcall16 SleepTimer_SetTimer +#pragma fastcall16 SleepTimer_bGetTimer + +#pragma fastcall16 SleepTimer_SyncWait // Proxy 1 +#pragma fastcall16 SleepTimer_TickWait // Proxy 1 + +#pragma fastcall16 SleepTimer_bGetTickCntr // Proxy 2 + + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +#pragma fastcall16 SleepTimer_iGetTickCntr // Proxy 4 +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +#pragma fastcall16 SleepTimer_lGetTickCntr // Proxy 4 +#endif + +//------------------------------------------------- +// Prototypes of the SleepTimer API. +//------------------------------------------------- + +extern void SleepTimer_EnableInt(void); +extern void SleepTimer_DisableInt(void); +extern void SleepTimer_Start(void); +extern void SleepTimer_Stop(void); +extern void SleepTimer_SetInterval(BYTE bInterval); +extern void SleepTimer_SyncWait(BYTE bTicks, BYTE bMode); +extern void SleepTimer_TickWait(BYTE bTicks); +extern void SleepTimer_SetTimer(BYTE bNewTimerValue); +extern BYTE SleepTimer_bGetTimer( void ); + +extern BYTE SleepTimer_bGetTickCntr(void); + +#if ( SleepTimer_TICK_CNTR_SIZE & (4|2) ) +extern unsigned int SleepTimer_iGetTickCntr(void); +#define ST_INT_VALID +#endif + +#if ( SleepTimer_TICK_CNTR_SIZE & 4 ) +extern unsigned long * SleepTimer_lGetTickCntr(unsigned long * lptr); +#define ST_LONG_VALID +#endif + +// Frequency of sleep timer interrupts +#define SleepTimer_1_HZ 0x18 +#define SleepTimer_8_HZ 0x10 +#define SleepTimer_64_HZ 0x08 +#define SleepTimer_512_HZ 0x00 + +#define SleepTimer_FORCE_RELOAD 0x01 +#define SleepTimer_WAIT_RELOAD 0x00 +extern BYTE SleepTimer_fTick; + + +#endif +// end of file SleepTimer.h diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc new file mode 100644 index 0000000..2a11b3f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimer.inc @@ -0,0 +1,33 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimer.inc +;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: Assembler declarations for the SleepTimer user module interface +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "m8c.inc" + + +;-------------------------------------------------- +; Constants for SleepTimer API's. +;-------------------------------------------------- + +SleepTimer_INT_REG: equ 0x0e0 +SleepTimer_INT_MASK: equ 0x40 + +SleepTimer_TICK_CNTR_SIZE: equ 4h + +; Frequency of sleep timer interrupts +SleepTimer_1_HZ: equ 0x18 +SleepTimer_8_HZ: equ 0x10 +SleepTimer_64_HZ: equ 0x08 +SleepTimer_512_HZ: equ 0x00 +SleepTimer_CLOCK_MASK: equ 0x18 + +SleepTimer_FORCE_RELOAD: equ 0x01 +SleepTimer_WAIT_RELOAD: equ 0x00 diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm new file mode 100644 index 0000000..3176e77 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/SleepTimerINT.asm @@ -0,0 +1,143 @@ +;;***************************************************************************** +;;***************************************************************************** +;; FILENAME: SleepTimerINT.asm +;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 +;; Generated by PSoC Designer 5.4.3191 +;; +;; DESCRIPTION: SleepTimer Interrupt Service Routine. +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** + +include "SleepTimer.inc" +include "memory.inc" +include "m8c.inc" + +;----------------------------------------------- +; Global Symbols +;----------------------------------------------- +export _SleepTimer_ISR + + +export SleepTimer_fTick +export _SleepTimer_fTick +export SleepTimer_bTimerValue +export _SleepTimer_bTimerValue +export SleepTimer_bCountDown +export _SleepTimer_bCountDown +export SleepTimer_TickCount +export _SleepTimer_TickCount + +;----------------------------------------------- +; Variable Allocation +;----------------------------------------------- +AREA InterruptRAM (RAM, REL, CON) + + SleepTimer_fTick: +_SleepTimer_fTick: BLK 1 + + SleepTimer_bTimerValue: +_SleepTimer_bTimerValue: BLK 1 + + SleepTimer_bCountDown: +_SleepTimer_bCountDown: BLK 1 + + SleepTimer_TickCount: +_SleepTimer_TickCount: BLK SleepTimer_TICK_CNTR_SIZE + + + +;@PSoC_UserCode_INIT@ (Do not change this line.) +;--------------------------------------------------- +; Insert your custom declarations below this banner +;--------------------------------------------------- + +;------------------------ +; Includes +;------------------------ + + +;------------------------ +; Constant Definitions +;------------------------ + + +;------------------------ +; Variable Allocation +;------------------------ + +//14Point7 ASM Code Start +Sleep_Counter:: // Sleep timer will trigger this ISR @ 512hz, Sleep Counter is used to count the number number of times this happens, Sleep Counter is used to figure how often certain routines should run +_Sleep_Counter:: BLK 1 +//14Point7 ASM Code End + +;--------------------------------------------------- +; Insert your custom declarations above this banner +;--------------------------------------------------- +;@PSoC_UserCode_END@ (Do not change this line.) + + +AREA UserModules (ROM, REL, CON) + +;----------------------------------------------------------------------------- +; FUNCTION NAME: _SleepTimer_ISR +; +; DESCRIPTION: +; interrupt handler for instance SleepTimer. +; +; This is a place holder function. If the user requires use of an interrupt +; handler for this function, then place code where specified. +;----------------------------------------------------------------------------- + +_SleepTimer_ISR: + + or [SleepTimer_fTick],0x01 ; Set tick flag + + ; Decrement CountDown (Sync counter) + tst [SleepTimer_bCountDown],0xFF + jz .DoTimer + dec [SleepTimer_bCountDown] + +.DoTimer: ; Decrement TimerValue, if required + tst [SleepTimer_bTimerValue],0xFF + jz .IncBigCounter + dec [SleepTimer_bTimerValue] + +.IncBigCounter: ; Increment big tick counter +IF (SleepTimer_TICK_CNTR_SIZE & 0x04) + inc [SleepTimer_TickCount+3] + jnc SleepTimer_SLEEP_ISR_END + + inc [SleepTimer_TickCount+2] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + +IF (SleepTimer_TICK_CNTR_SIZE & (0x04|0x02)) + inc [SleepTimer_TickCount+1] + jnc SleepTimer_SLEEP_ISR_END +ENDIF + + inc [SleepTimer_TickCount+0] + +SleepTimer_SLEEP_ISR_END: + + ;@PSoC_UserCode_BODY_1@ (Do not change this line.) + ;--------------------------------------------------- + ; Insert your custom code below this banner + ;--------------------------------------------------- + ; NOTE: interrupt service routines must preserve + ; the values of the A and X CPU registers. + //14Point7 ASM Code Start + inc [Sleep_Counter] + //call LED7SEG_Update + //14Point7 ASM Code End + ;--------------------------------------------------- + ; Insert your custom code above this banner + ;--------------------------------------------------- + ;@PSoC_UserCode_END@ (Do not change this line.) + + reti + +; end of file SleepTimerINT.asm + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a new file mode 100644 index 0000000..d70dc70 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/lib/libpsoc.a @@ -0,0 +1,2206 @@ +.start +XH +H 3 areas B global symbols +M sleeptimerint.asm +A text size 0 flags 0 +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbfile SleepTimer.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/SleepTimer.inc +dbfunc 0 ? 0 I +A InterruptRAM size 8 flags 20 +S _SleepTimer_bTimerValue Def0001 +S Sleep_Counter Def0007 +S SleepTimer_fTick Def0000 +S _SleepTimer_TickCount Def0003 +S SleepTimer_bCountDown Def0002 +S _Sleep_Counter Def0007 +S _SleepTimer_fTick Def0000 +S SleepTimer_bTimerValue Def0001 +S _SleepTimer_bCountDown Def0002 +S SleepTimer_TickCount Def0003 +A UserModules size 22 flags 0 +dbfile lib/sleeptimerint.asm +dbfunc 0 ? 0 I +dbline 5F 0 +dbline 62 3 +dbline 63 6 +dbline 64 8 +dbline 67 A +dbline 68 D +dbline 69 F +dbline 6D 11 +dbline 6E 13 +dbline 70 15 +dbline 71 17 +dbline 75 19 +dbline 76 1B +dbline 79 1D +dbline 84 1F +dbline 8C 21 +S _SleepTimer_ISR Def0000 +T 00 00 2E 00 00 01 47 00 02 FF A0 03 7A 00 02 47 +R 00 00 00 02 01 03 00 01 01 07 00 01 01 0D 00 01 +T 00 0B 00 01 FF A0 03 7A 00 01 76 00 06 D0 0B 76 +R 00 00 00 02 01 02 00 01 01 08 00 01 01 0B 00 01 +T 00 16 00 05 D0 07 76 00 04 D0 03 76 00 03 76 +R 00 00 00 02 01 02 00 01 01 07 00 01 01 0C 00 01 +T 00 20 00 07 7E +R 00 00 00 02 01 02 00 01 +.end +.start +XH +H 2 areas 34 global symbols +M sleeptimer.asm +S SleepTimer_fTick Ref0000 +S SleepTimer_bCountDown Ref0000 +S SleepTimer_bTimerValue Ref0000 +S SleepTimer_TickCount Ref0000 +A text size 0 flags 0 +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbfile SleepTimer.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/SleepTimer.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A UserModules size 76 flags 0 +dbfile lib/sleeptimer.asm +dbfunc 0 ? 0 I +dbline 2 0 +dbline 87 3 +dbline 2 4 +dbline A4 7 +dbline C6 8 +dbline C7 A +dbline C8 C +dbline C9 E +dbline CA 10 +dbline CC 12 +dbline D1 14 +dbline D2 16 +dbline D7 18 +dbline F3 19 +dbline 10D 1A +dbline 10E 1C +dbline 10F 1D +dbline 2 1E +dbline 111 20 +dbline 112 22 +dbline 113 24 +dbline 114 26 +dbline 2 28 +dbline 116 2A +dbline 118 2B +dbline 13B 2C +dbline 13E 2F +dbline 13F 32 +dbline 140 34 +dbline 141 37 +dbline 142 38 +dbline 145 3A +dbline 16E 3B +dbline 16F 3C +dbline 170 3E +dbline 173 40 +dbline 174 43 +dbline 178 45 +dbline 179 46 +dbline 17C 48 +dbline 1A0 49 +dbline 1A2 4B +dbline 1C4 4C +dbline 1C6 4E +dbline 1E8 4F +dbline 1EA 51 +dbline 2 52 +dbline 211 55 +dbline 212 57 +dbline 2 59 +dbline 215 5C +dbline 2 5D +dbline 23D 60 +dbline 23E 61 +dbline 23F 63 +dbline 240 65 +dbline 241 67 +dbline 242 69 +dbline 243 6B +dbline 244 6D +dbline 245 6F +dbline 246 71 +dbline 2 72 +dbline 24B 75 +S SleepTimer_iGetTickCntr Def0052 +S SleepTimer_lGetTickCntr Def005D +S $sb$SleepTimer_bGetTickCntr Def0049 +S $sb$SleepTimer_Stop Def0019 +S $se$SleepTimer_bGetTickCntr Def004C +S $se$SleepTimer_Stop Def001A +S $sb$SleepTimer_iGetTickCntr Def0052 +S $sb$SleepTimer_lGetTickCntr Def005D +S $se$SleepTimer_iGetTickCntr Def005D +S $se$SleepTimer_lGetTickCntr Def0076 +S _SleepTimer_SetInterval Def001A +S _SleepTimer_EnableInt Def0000 +S SleepTimer_DisableInt Def0004 +S _SleepTimer_bGetTimer Def004F +S $sb$SleepTimer_DisableInt Def0004 +S $se$SleepTimer_DisableInt Def0008 +S _SleepTimer_bGetTickCntr Def0049 +S _SleepTimer_Stop Def0019 +S _SleepTimer_iGetTickCntr Def0052 +S _SleepTimer_lGetTickCntr Def005D +S SleepTimer_Start Def0008 +S SleepTimer_TickWait Def002C +S $sb$SleepTimer_Start Def0008 +S SleepTimer_SetTimer Def004C +S $se$SleepTimer_Start Def0019 +S SleepTimer_SyncWait Def003B +S $sb$SleepTimer_TickWait Def002C +S _SleepTimer_DisableInt Def0004 +S $se$SleepTimer_TickWait Def003B +S $sb$SleepTimer_SetTimer Def004C +S $se$SleepTimer_SetTimer Def004F +S $sb$SleepTimer_SyncWait Def003B +S $se$SleepTimer_SyncWait Def0049 +S _SleepTimer_Start Def0008 +S SleepTimer_SetInterval Def001A +S SleepTimer_EnableInt Def0000 +S _SleepTimer_TickWait Def002C +S SleepTimer_bGetTimer Def004F +S _SleepTimer_SetTimer Def004C +S $sb$SleepTimer_SetInterval Def001A +S $sb$SleepTimer_EnableInt Def0000 +S $se$SleepTimer_SetInterval Def002C +S _SleepTimer_SyncWait Def003B +S $se$SleepTimer_EnableInt Def0004 +S $sb$SleepTimer_bGetTimer Def004F +S $se$SleepTimer_bGetTimer Def0052 +S SleepTimer_bGetTickCntr Def0049 +S SleepTimer_Stop Def0019 +T 00 00 43 E0 40 7F 41 E0 BF 7F 50 00 53 00 00 53 +R 00 00 00 01 03 0D 00 00 +T 00 0D 00 00 53 00 00 53 00 03 53 +R 00 00 00 01 03 02 00 02 03 05 00 01 03 08 00 03 +T 00 13 00 02 53 00 01 53 00 00 7F 7F 21 18 4F 08 +R 00 00 00 01 03 02 00 03 03 05 00 03 03 08 00 03 +T 00 1E 71 10 5D E0 21 E7 2B 00 60 E0 70 EF 18 7F +R 00 00 00 01 +T 00 2C 55 00 00 00 47 00 00 FF AF FC 55 00 00 00 +R 00 00 00 01 03 03 00 00 03 07 00 00 03 0D 00 00 +T 00 37 78 BF F6 7F 4B 21 01 B0 06 47 00 00 FF BF +R 00 00 00 01 03 0C 00 01 +T 00 44 FC 4B 53 00 00 7F 51 00 03 7F 53 00 00 7F +R 00 00 00 01 03 05 00 01 03 09 00 03 03 0D 00 02 +T 00 4F 51 00 00 7F 41 E0 BF 51 00 03 58 00 02 43 +R 00 00 00 01 03 03 00 02 03 0A 00 03 03 0D 00 03 +T 00 5A E0 40 7F 41 E0 BF 08 51 00 00 54 00 51 +R 00 00 00 01 03 0A 00 03 +T 00 66 00 01 54 01 51 00 02 54 02 51 00 03 54 03 +R 00 00 00 01 03 02 00 03 03 07 00 03 03 0C 00 03 +T 00 71 18 43 E0 40 7F +R 00 00 00 01 +.end +.start +XH +H 3 areas 1 global symbols +M pwm8_voutint.asm +A text size 0 flags 0 +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbfile PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A InterruptRAM size 0 flags 20 +A UserModules size 1 flags 0 +dbfile lib/pwm8_voutint.asm +dbfunc 0 ? 0 I +dbline 4C 0 +S _PWM8_Vout_ISR Def0000 +T 00 00 7E +R 00 00 00 02 +.end +.start +XH +H 3 areas 24 global symbols +M pwm8_vout.asm +A text size 0 flags 0 +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbfile PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/PWM8_Vout.inc +dbfunc 0 ? 0 I +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A slc_free_28_pin_feb_16_2013_RAM size 0 flags 20 +A UserModules size 42 flags 0 +dbfile lib/pwm8_vout.asm +dbfunc 0 ? 0 I +dbline 2 0 +dbline 5F 3 +dbline 2 4 +dbline 7B 7 +dbline 2 8 +dbline 98 B +dbline 2 C +dbline B4 F +dbline D0 10 +dbline D2 12 +dbline EB 13 +dbline ED 15 +dbline 108 16 +dbline 10A 18 +dbline 12F 19 +dbline 130 1A +dbline 131 1C +dbline 2 1D +dbline 2 20 +dbline 134 22 +dbline 135 24 +dbline 137 25 +dbline 2 28 +dbline 13A 2A +dbline 13B 2C +dbline 13C 2E +dbline 13D 2F +dbline 13E 31 +dbline 2 33 +dbline 140 35 +dbline 141 37 +dbline 2 39 +dbline 2 3B +dbline 144 3E +dbline 145 3F +dbline 147 41 +S _PWM8_Vout_Start Def0008 +S PWM8_Vout_WritePeriod Def0010 +S PWM8_Vout_EnableInt Def0000 +S _PWM8_Vout_WritePulseWidth Def0013 +S $sb$PWM8_Vout_WritePeriod Def0010 +S $se$PWM8_Vout_WritePeriod Def0013 +S $sb$PWM8_Vout_EnableInt Def0000 +S $se$PWM8_Vout_EnableInt Def0004 +S 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? 0 I +dbfile lib/insamp.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A bss size 0 flags 20 +A UserModules size 39 flags 0 +dbfile lib/insamp.asm +dbfunc 0 ? 0 I +dbline 58 0 +dbline 59 2 +dbline 5B 3 +dbline 5C 4 +dbline 5D 6 +dbline 5E 8 +dbline 5F A +dbline 61 C +dbline 62 E +dbline 63 10 +dbline 64 12 +dbline 65 14 +dbline 67 15 +dbline 86 16 +dbline 87 18 +dbline 89 19 +dbline 8A 1A +dbline 8B 1C +dbline 8C 1E +dbline 8D 20 +dbline 8F 22 +dbline 90 24 +dbline 91 26 +dbline 92 27 +dbline 93 29 +dbline 94 2B +dbline 95 2D +dbline 96 2F +dbline 97 30 +dbline 99 31 +dbline B1 32 +dbline B2 35 +dbline B4 38 +S _INSAMP_Stop Def0032 +S _INSAMP_SetGain Def0016 +S INSAMP_Start Def0000 +S $sb$INSAMP_Start Def0000 +S $se$INSAMP_Start Def0016 +S INSAMP_SetPower Def0000 +S _INSAMP_Start Def0000 +S _INSAMP_SetPower Def0000 +S INSAMP_Stop Def0032 +S INSAMP_SetGain Def0016 +S $sb$INSAMP_Stop Def0032 +S $se$INSAMP_Stop Def0039 +S $sb$INSAMP_SetGain Def0016 +S $se$INSAMP_SetGain Def0032 +T 00 00 21 03 4F 08 5D 73 21 FC 2B 00 60 73 5D 77 +R 00 00 00 02 +T 00 0E 21 FC 2B 00 60 77 18 7F 21 F0 4F 08 5D 75 +R 00 00 00 02 +T 00 1C 21 0F 2B 00 60 75 50 E0 13 00 08 5D 71 21 +R 00 00 00 02 +T 00 2A 0F 2B 01 60 71 18 18 7F 41 77 FC 41 73 FC +R 00 00 00 02 +T 00 38 7F +R 00 00 00 02 +.end +.start +XH +H 2 areas 16 global symbols +M dac9_ia.asm +A text size 0 flags 0 +dbfile lib/dac9_ia.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/dac9_ia.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/dac9_ia.asm +dbfunc 0 ? 0 I +dbfile DAC9_Ia.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/DAC9_Ia.inc +dbfunc 0 ? 0 I +A UserModules size 97 flags 0 +dbfile lib/dac9_ia.asm +dbfunc 0 ? 0 I +dbline A1 0 +dbline A2 2 +dbline A3 3 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Def0050 +S _DAC9_Ia_Start Def0000 +S DAC9_Ia_WriteStall2B Def007F +T 00 00 21 03 4F 08 5D 97 21 FC 2B 00 60 97 5D 93 +R 00 00 00 01 +T 00 0E 21 FC 2B 00 60 93 18 7F 11 FF 4B 19 00 4B +R 00 00 00 01 +T 00 1C 4B 08 78 5B C0 05 73 74 80 05 73 73 80 01 +R 00 00 00 01 +T 00 2A 08 67 67 67 21 1F 4F 27 FE 20 2B FE 5C 18 +R 00 00 00 01 +T 00 38 10 64 64 21 1F 4F 2B FE 31 20 20 38 FF 29 +R 00 00 00 01 +T 00 46 80 4B 29 80 60 94 5B 60 90 7F 11 FF 4B 19 +R 00 00 00 01 +T 00 54 00 4B 4B 08 78 5B C0 05 73 74 80 05 73 73 +R 00 00 00 01 +T 00 62 80 01 08 67 67 67 21 1F 4F 27 FE 20 2B FE +R 00 00 00 01 +T 00 70 5C 18 10 64 64 21 1F 4F 2B FE 31 20 20 38 +R 00 00 00 01 +T 00 7E FF 29 80 4B 29 80 43 65 01 60 94 41 65 FE +R 00 00 00 01 +T 00 8C 5B 60 90 7F 41 97 FC 41 93 FC 7F +R 00 00 00 01 +.end +.start +XH +H 2 areas 12 global symbols +M dac6_vgnd.asm +A text size 0 flags 0 +dbfile lib/dac6_vgnd.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc 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Def001D +S _DAC6_VGND_Start Def0000 +S _DAC6_VGND_SetPower Def0000 +S DAC6_VGND_Stop Def0039 +S $sb$DAC6_VGND_Stop Def0039 +S $se$DAC6_VGND_Stop Def003D +S DAC6_VGND_WriteBlind Def0007 +S _DAC6_VGND_Stop Def0039 +S DAC6_VGND_WriteStall Def001D +S DAC6_VGND_Start Def0000 +S $sb$DAC6_VGND_WriteBlind Def0007 +S $se$DAC6_VGND_WriteBlind Def001D +T 00 00 21 03 29 30 60 83 7F 11 1F 64 D0 07 73 74 +R 00 00 00 01 +T 00 0E 29 40 80 06 40 40 40 80 01 67 29 80 60 80 +R 00 00 00 01 +T 00 1C 7F 11 1F 64 D0 07 73 74 29 40 80 06 40 40 +R 00 00 00 01 +T 00 2A 40 80 01 67 29 80 43 65 01 60 80 41 65 FE +R 00 00 00 01 +T 00 38 7F 41 83 FC 7F +R 00 00 00 01 +.end +.start +XH +H 2 areas C global symbols +M amux4_1.asm +A text size 0 flags 0 +dbfile lib/amux4_1.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/amux4_1.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/amux4_1.asm +dbfunc 0 ? 0 I +dbfile ./lib/AMUX4_1.inc +dbfunc 0 ? 0 I +A UserModules size 19 flags 0 +dbfile lib/amux4_1.asm +dbfunc 0 ? 0 I +dbline 51 0 +dbline 52 2 +dbline 54 4 +dbline 55 5 +dbline 56 7 +dbline 57 8 +dbline 58 9 +dbline 5B B +dbline 5C C +dbline 60 D +dbline 62 F +dbline 63 11 +dbline 67 13 +dbline 69 15 +dbline 6F 16 +dbline 8B 17 +dbline A7 18 +S AMUX4_1_Stop Def0018 +S $sb$AMUX4_1_Stop Def0018 +S $se$AMUX4_1_Stop Def0019 +S _AMUX4_1_InputSelect Def0000 +S _AMUX4_1_Stop Def0018 +S AMUX4_1_Start Def0017 +S $sb$AMUX4_1_Start Def0017 +S $se$AMUX4_1_Start Def0018 +S _AMUX4_1_Start Def0017 +S AMUX4_1_InputSelect Def0000 +S $sb$AMUX4_1_InputSelect Def0000 +S $se$AMUX4_1_InputSelect Def0017 +T 00 00 21 03 57 00 79 C0 05 64 64 8F FA 4F 08 5D +R 00 00 00 01 +T 00 0E 60 21 FC 2B 00 60 60 18 7F 7F 7F +R 00 00 00 01 +.end +.start +XH +H 2 areas C global symbols +M amux4_0.asm +A text size 0 flags 0 +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbfile ./lib/AMUX4_0.inc +dbfunc 0 ? 0 I +A UserModules size 19 flags 0 +dbfile lib/amux4_0.asm +dbfunc 0 ? 0 I +dbline 51 0 +dbline 52 2 +dbline 54 4 +dbline 55 5 +dbline 56 7 +dbline 57 8 +dbline 58 9 +dbline 5B B +dbline 5C C +dbline 60 D +dbline 62 F +dbline 63 11 +dbline 67 13 +dbline 69 15 +dbline 6F 16 +dbline 8B 17 +dbline A7 18 +S AMUX4_0_Stop Def0018 +S $sb$AMUX4_0_Stop Def0018 +S $se$AMUX4_0_Stop Def0019 +S _AMUX4_0_InputSelect Def0000 +S _AMUX4_0_Stop Def0018 +S AMUX4_0_Start Def0017 +S $sb$AMUX4_0_Start Def0017 +S $se$AMUX4_0_Start Def0018 +S _AMUX4_0_Start Def0017 +S AMUX4_0_InputSelect Def0000 +S $sb$AMUX4_0_InputSelect Def0000 +S $se$AMUX4_0_InputSelect Def0017 +T 00 00 21 03 57 00 79 C0 05 64 64 8F FA 4F 08 5D +R 00 00 00 01 +T 00 0E 60 21 FC 2B 00 60 60 18 7F 7F 7F +R 00 00 00 01 +.end +.start +XH +H 3 areas 15 global symbols +M adcincint.asm +A text size 0 flags 0 +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/ADCINC.inc +dbfunc 0 ? 0 I +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A InterruptRAM size D flags 20 +S ADC_Counter Def0008 +S _ADC_IF Def000C +S _ip_x1 Def000B +S Ri_Min_x1 Def000A +S Ri_Max_x1 Def0009 +S _ADCINC_iResult Def0000 +S _ADCINC_fStatus Def0004 +S _ADCINC_fMode Def0006 +S ADCINC_bState Def0005 +S _ADC_Counter Def0008 +S ADCINC_bNumSamples Def0007 +S _Ri_Min_x1 Def000A +S _Ri_Max_x1 Def0009 +S ADC_IF Def000C +S _ADCINC_bState Def0005 +S _ADCINC_bNumSamples Def0007 +S ip_x1 Def000B +S ADCINC_iResult Def0000 +S ADCINC_fStatus Def0004 +S ADCINC_fMode Def0006 +A UserModules size BA flags 0 +dbfile lib/adcincint.asm +dbfunc 0 ? 0 I +dbline 6A 0 +dbline 6C 2 +dbline 6D 4 +dbline 6F 5 +dbline 71 8 +dbline 72 A +dbline 73 B +dbline 74 D +dbline 75 F +dbline 76 11 +dbline 77 13 +dbline 78 14 +dbline 79 17 +dbline 7A 1A +dbline 3 1B +dbline 5 1E +dbline 7E 21 +dbline 7F 22 +dbline 80 24 +dbline 81 26 +dbline 82 28 +dbline 83 2A +dbline 84 2C +dbline 85 2D +dbline 8B 2F +dbline 8C 32 +dbline 90 34 +dbline 92 36 +dbline 93 38 +dbline 94 39 +dbline A5 3C +dbline A6 3F +dbline A7 41 +dbline AE 44 +dbline AF 46 +dbline B0 48 +dbline B2 4A +dbline B3 4C +dbline B5 4E +dbline B6 50 +dbline B8 52 +dbline B9 54 +dbline BD 56 +dbline BE 59 +dbline BF 5C +dbline C0 5F +dbline C1 62 +dbline C4 64 +dbline C7 67 +dbline C8 6A +dbline C9 6D +dbline CA 70 +dbline CC 73 +dbline D0 75 +dbline D1 78 +dbline D2 7B +dbline D3 7E +dbline D4 81 +dbline D8 83 +dbline D9 86 +dbline DA 89 +dbline DB 8C +dbline DC 8F +dbline EC 92 +dbline ED 93 +dbline EF 96 +dbline F0 98 +dbline F1 9B +dbline 2 9E +dbline 4 A1 +dbline F3 A4 +dbline F5 A5 +dbline F7 A7 +dbline F8 A9 +dbline F9 AC +dbline 2 AF +dbline 4 B2 +dbline FB B5 +dbline 3 B6 +dbline FF B9 +S _ADCINC_ADConversion_ISR Def0000 +T 00 00 7A 00 05 C0 02 7E 3C 00 06 00 B0 12 08 5D +R 00 00 00 02 01 03 00 01 01 09 00 01 +T 00 0C E5 53 00 03 5D E4 53 00 02 18 55 00 06 01 +R 00 00 00 02 01 04 00 01 01 09 00 01 01 0D 00 01 +T 00 17 55 00 05 03 7E 43 86 20 43 87 10 08 5D E5 +R 00 00 00 02 01 03 00 01 +T 00 24 12 00 03 53 00 03 5D E4 1A 00 02 67 6E +R 00 00 00 02 01 03 00 01 01 06 00 01 01 0B 00 01 +T 00 2E 00 03 06 00 03 80 09 00 39 01 B0 05 78 55 +R 00 00 00 02 01 02 00 01 01 05 00 01 +T 00 3A 00 03 FF 5F 00 01 00 03 53 +R 00 00 00 02 01 02 00 01 01 06 00 01 01 08 00 01 +T 00 40 00 00 55 00 04 01 51 00 08 11 00 A0 0D 11 +R 00 00 00 02 01 02 00 01 01 05 00 01 01 09 00 01 +T 00 4B 01 A0 17 11 01 A0 24 11 01 A0 2E 41 00 FB +R 00 00 00 02 +T 00 59 5F 00 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ADCINC_fStatus Ref0000 +S ADCINC_fMode Ref0000 +A text size 0 flags 0 +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile ADCINC.inc +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +dbfile ./lib/ADCINC.inc +dbfunc 0 ? 0 I +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbfile memory.inc +dbfunc 0 ? 0 I +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbfile C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +dbfunc 0 ? 0 I +A bss size 0 flags 20 +A UserModules size 77 flags 0 +dbfile lib/adcinc.asm +dbfunc 0 ? 0 I +dbline 60 0 +dbline 61 3 +dbline 3 5 +dbline 5 8 +dbline 63 B +dbline 64 E +dbline 66 11 +dbline 7C 12 +dbline 7D 13 +dbline 7E 15 +dbline 7F 16 +dbline 80 18 +dbline 81 1A +dbline 82 1C +dbline 83 1E +dbline 85 1F +dbline 3 20 +dbline 9C 23 +dbline 9D 26 +dbline 9F 29 +dbline 2 2A +dbline 4 2D +dbline B7 30 +dbline B8 33 +dbline B9 36 +dbline BA 38 +dbline BB 3A +dbline BC 3C +dbline 3 3F +dbline 4 42 +dbline C0 45 +dbline 3 46 +dbline 3 49 +dbline 5 4C +dbline DB 4F +dbline 3 50 +dbline F2 52 +dbline 4 53 +dbline 5 56 +dbline 6 58 +dbline 7 5A +dbline 8 5D +dbline 10E 5F +dbline 3 60 +dbline 4 63 +dbline 128 65 +dbline 3 66 +dbline 4 68 +dbline 141 6A +dbline 3 6B +dbline 15A 6D +dbline 3 6E +dbline 4 70 +dbline 172 73 +dbline 2 74 +dbline 18B 76 +S ADCINC_iGetData Def0066 +S _ADCINC_Stop Def0020 +S ADCINC_Start Def0000 +S ADCINC_wGetData Def0066 +S $sb$ADCINC_GetSamples Def002A +S ADCINC_WritePulseWidth Def0074 +S $se$ADCINC_GetSamples Def0046 +S $sb$ADCINC_bGetData Def006B +S $se$ADCINC_bGetData Def006E +S ADCINC_fIsDataAvailable Def0050 +S $sb$ADCINC_iGetData Def0066 +S $se$ADCINC_iGetData Def006B +S _ADCINC_fClearFlag Def006E +S $sb$ADCINC_Start Def0000 +S $se$ADCINC_Start Def0012 +S $sb$ADCINC_WritePulseWidth Def0074 +S $se$ADCINC_WritePulseWidth Def0077 +S ADCINC_SetPower Def0012 +S $sb$ADCINC_fIsDataAvailable Def0050 +S $se$ADCINC_fIsDataAvailable Def0053 +S _ADCINC_GetSamples Def002A +S $sb$ADCINC_SetPower Def0012 +S $se$ADCINC_SetPower Def0020 +S _ADCINC_bGetData Def006B +S _ADCINC_cGetData Def006B +S ADCINC_bClearFlagGetData Def0060 +S ADCINC_cClearFlagGetData Def0060 +S _ADCINC_iGetData Def0066 +S ADCINC_iClearFlagGetData Def0053 +S _ADCINC_Start Def0000 +S ADCINC_StopADC Def0046 +S _ADCINC_wGetData Def0066 +S ADCINC_wClearFlagGetData Def0053 +S _ADCINC_WritePulseWidth Def0074 +S $sb$ADCINC_cClearFlagGetData Def0060 +S _ADCINC_fIsDataAvailable Def0050 +S $se$ADCINC_cClearFlagGetData Def0066 +S $sb$ADCINC_iClearFlagGetData Def0053 +S $se$ADCINC_iClearFlagGetData Def0060 +S $sb$ADCINC_StopADC Def0046 +S $se$ADCINC_StopADC Def0050 +S _ADCINC_SetPower Def0012 +S ADCINC_Stop Def0020 +S _ADCINC_bClearFlagGetData Def0060 +S _ADCINC_cClearFlagGetData Def0060 +S $sb$ADCINC_Stop Def0020 +S _ADCINC_iClearFlagGetData Def0053 +S $se$ADCINC_Stop Def002A +S ADCINC_fClearFlag Def006E +S _ADCINC_StopADC Def0046 +S _ADCINC_wClearFlagGetData Def0053 +S $sb$ADCINC_fClearFlag Def006E +S $se$ADCINC_fClearFlag Def0074 +S ADCINC_GetSamples Def002A +S ADCINC_bGetData Def006B +S ADCINC_cGetData Def006B +T 00 00 43 E7 C0 90 0D 43 86 20 43 87 10 62 21 FF +R 00 00 00 02 +T 00 0E 43 23 01 7F 4F 21 03 08 5D 87 21 FC 2B 00 +R 00 00 00 02 +T 00 1C 60 87 18 7F 41 E1 FE 41 87 FC 41 23 FE 7F +R 00 00 00 02 +T 00 2A 41 87 EF 41 86 DF 55 00 00 00 55 00 00 00 +R 00 00 00 02 03 09 00 04 03 0D 00 00 +T 00 36 53 00 00 5D 22 B0 04 62 22 01 62 DB FE 43 +R 00 00 00 02 03 03 00 01 +T 00 43 E1 01 7F 41 E1 FE 43 86 20 43 87 10 7F 51 +R 00 00 00 02 +T 00 51 00 00 7F 55 00 00 00 58 00 00 51 +R 00 00 00 02 03 02 00 03 03 06 00 03 03 0A 00 02 +T 00 59 00 01 3C 00 00 00 BF F5 7F 55 00 00 00 51 +R 00 00 00 02 03 02 00 02 03 05 00 03 03 0C 00 03 +T 00 64 00 01 7F 58 00 00 51 00 01 7F 51 +R 00 00 00 02 03 02 00 02 03 06 00 02 03 09 00 02 +T 00 6C 00 01 7F 51 00 00 55 00 00 00 7F 60 22 7F +R 00 00 00 02 03 02 00 02 03 06 00 03 03 09 00 03 +.end diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile new file mode 100644 index 0000000..75373f8 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/linkfile @@ -0,0 +1,5 @@ +-F0x30 -g -blit:0x150.0xfff + -bdata:0.0xFF -rwh:SSCParmBlk:0x00F7.0x00FF -O -elim:UserModules + -o"output/SLC_Free_Open_Source" +obj/main.o + ./lib/libPSoc.a -LC:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/lib/SMM C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/lib/CY8C24000B/cms.a C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/lib/SMM/UASW/MAC/arith.a diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c new file mode 100644 index 0000000..80fc115 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/main.c @@ -0,0 +1,393 @@ +//---------------------------------------------------------------------------- +// C main line latest +//---------------------------------------------------------------------------- +#include <m8c.h> // part specific constants and macros +#include "PSoCAPI.h" // PSoC API definitions for all User Modules + +extern BYTE ADC_Counter; //Variable Declared in ADCININT.asm +extern BYTE Ri_Max_x1; //Variable Declared in ADCININT.asm +extern BYTE Ri_Min_x1; //Variable Declared in ADCININT.asm +extern BYTE ip_x1; //Variable Declared in ADCININT.asm +extern BYTE ADC_IF; //Variable Declared in ADCININT.asm +extern BYTE Sleep_Counter; //Variable Declared in SleepTimerINT.asm + +//#define Vout_Lookup_Counter_Set 25 +#define LCD_Counter_Set 50 + +#define Lin_Out +#define NB_Out + +//#define PID_Tune +#define Ri_Filter_Strength 4 +#define ip_Filter_Strength 4 + +#ifdef PID_Tune + INT Ri_Mid_Target= 271; //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell + INT Ia_PID_Kp = 35; + INT Ia_PID_Ki = 8; + INT Ia_Output_Bias = 256; + INT Ri_Delta_Target=143; //PID Target peak to peak Voltage of Nermest Cell + INT Heater_PID_Kp =-72; + INT Heater_PID_Ki =-4; + INT Heater_PID_Output_Bias =128; +#else + #define Ri_Mid_Target 271 //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell + #define Ia_PID_Kp 25 + #define Ia_PID_Ki 4 + #define Ia_Output_Bias 256 + #define Ri_Delta_Target 143 //PID Target peak to peak Voltage of Nermest Cell + #define Heater_PID_Kp -72 + #define Heater_PID_Ki -4 + #define Heater_PID_Output_Bias 128 +#endif + +#ifdef Lin_Out + + #define ip_to_Vout_Lookup_Start 135 + #define ip_to_Vout_Lookup_Size 158 + const BYTE ip_to_Vout_Lookup[ip_to_Vout_Lookup_Size] = {0,1,1,2,3,4,4,5,6,7,8,8,9,10,11,12,12,13,14,15,16,17,17,18,19,20,21,22,22,23,24,25,26,27,27,28,29,30,31,32,33,34,34,35,36,37,38,39,40,41,42,43,44,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,76,77,78,79,80,81,82,83,84,86,87,88,89,90,91,92,94,95,96,97,98,100,101,102,103,105,106,107,108,110,111,112,113,115,116,117,119,120,123,126,129,132,135,138,141,144,147,151,154,157,161,164,168,171,175,178,182,186,190,194,197,201,206,210,214,218,222,227,231,236,240,245,250,255}; +#endif + + #define ip_to_Lambda_Lookup_Start 135 + #define ip_to_Lambda_Lookup_Size 158 + + const BYTE ip_to_Lambda_Lookup[ip_to_Lambda_Lookup_Size]={68,68,68,69,69,69,69,69,70,70,70,70,70,71,71,71,71,72,72,72,72,72,73,73,73,73,74,74,74,74,74,75,75,75,75,76,76,76,76,76,77,77,77,77,78,78,78,78,79,79,79,79,80,80,80,80,81,81,81,81,82,82,82,82,83,83,83,83,84,84,84,85,85,85,85,86,86,86,86,87,87,87,88,88,88,88,89,89,89,90,90,90,91,91,91,91,92,92,92,93,93,93,94,94,94,95,95,95,96,96,96,97,97,97,98,98,98,99,99,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,136}; + + #define Ri_Delta_to_Temperature_C_Start 113 + #define Ri_Delta_to_Temperature_C_Size 75 + #define Ri_Delta_to_Temperature_C_Offset 740 + + +INT Ri_Mid_Error_Sum=0; +INT Ri_Mid; +INT Ri_Delta_Error_Sum=0; +INT Ri_Delta; +#define Ia_PID_Counter_Set 1 +#define Heatup_Counter_Set 100 +#define Heater_PID_Counter_Set 25 +BYTE Heatup_Heater_Output=100; + +INT Ri_Delta_Error; +INT Heater_Output; +INT Heater_Pout; +INT Heater_Iout; + +//PID Controller, Input is Ri_Delta (The Peak to peak voltage on the Vs Port of the sensor) output is PWM8_Heater, PWM8_Heater is controlled such that Ri_Delta is maintained at 80 (80 =750C) +//Only a PI controller is used as adding the D term does not effect performance +//Everything is inflated by a factor of 4 so that floating point is avioded +void Heater_PID(void) // Ned to run this when counter >50 +{ + Ri_Delta_Error=Ri_Delta_Target-Ri_Delta; + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Delta_Error>56) + { + Ri_Delta_Error=56; + } + if (Ri_Delta_Error<-56) + { + Ri_Delta_Error=-56; + } + Heater_Pout=(Heater_PID_Kp*Ri_Delta_Error)/16; + Ri_Delta_Error_Sum=Ri_Delta_Error_Sum+Ri_Delta_Error; + //If the sensor is too hot, then disreguard the Integratal contribution and just use the proportional to quickly correct the sensor temperature + /* + if((Ri_Delta<60)&&(Ri_Delta_Error_Sum>0)) + { + Ri_Delta_Error_Sum=0; + } + */ + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Delta_Error_Sum>1024) + { + Ri_Delta_Error_Sum=1024; + } + if (Ri_Delta_Error_Sum<-1024) + { + Ri_Delta_Error_Sum=-1024; + } + Heater_Iout=(Heater_PID_Ki*Ri_Delta_Error_Sum)/16; + if (Heatup_Heater_Output<255) // if Heatup_Heater_Output is < 255 that means the unit just turned on and to give control to the heatup routine + { + Heater_Output=Heatup_Heater_Output; + } + else + { + Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; + } + //Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; + if (Heater_Output<0) + { + Heater_Output=0; + } + if (Heater_Output>255) + { + Heater_Output=255; + } + + + PWM8_Heater_WritePulseWidth(Heater_Output); + //PWM8_Heater_WritePulseWidth(200); +} + +INT Ri_Mid_Error; +INT Ia_Output; +INT Ia_Pout; +INT Ia_Iout; +//PID Controller, Input is Ri_Mid (The average voltage on the Vs Port of the sensor) output is DAC9_Ia, DAC9_Ia sink/sources current to the Sensor pump cell such that Ri_Mid is is the same voltage as Vref +//Only a PI controller is used as adding the D term does not effect performance +//Everything is inflated by a factor of 4 so that floating point is avioded +void Ia_PID(void) +{ + + + Ri_Mid_Error=Ri_Mid_Target-Ri_Mid; + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Mid_Error>163) + { + Ri_Mid_Error=163; + } + if (Ri_Mid_Error<-163) + { + Ri_Mid_Error=-163; + } + Ia_Pout=(Ia_PID_Kp*Ri_Mid_Error)/16; + Ri_Mid_Error_Sum=Ri_Mid_Error_Sum+Ri_Mid_Error; + //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow + if (Ri_Mid_Error_Sum>1020) + { + Ri_Mid_Error_Sum=1020; + } + if (Ri_Mid_Error_Sum<-1020) + { + Ri_Mid_Error_Sum=-1020; + } + Ia_Iout=(Ia_PID_Ki*Ri_Mid_Error_Sum)/16; + Ia_Output=Ia_Output_Bias+Ia_Pout+Ia_Iout; + //9 Bit Dac so only 0-511 is allowed, for some reason i put the limit at 510, I foget exactly why. + if (Ia_Output<0) + { + Ia_Output=0; + } + if (Ia_Output>510) + { + Ia_Output=510; + } + DAC9_Ia_WriteStall (Ia_Output); + //DAC9_Ia_WriteStall (256); +} +INT IIR_Int(INT Vin, INT Vout, BYTE A) +{ + return (Vout + (Vin - Vout)/A); +} + +char toChar(BYTE base10) +{ + char ascii; + switch (base10) + { + case 0: + ascii='0'; + break; + case 1: + ascii='1'; + break; + case 2: + ascii='2'; + break; + case 3: + ascii='3'; + break; + case 4: + ascii='4'; + break; + case 5: + ascii='5'; + break; + case 6: + ascii='6'; + break; + case 7: + ascii='7'; + break; + case 8: + ascii='8'; + break; + case 9: + ascii='9'; + } + return (ascii); +} + + +BYTE Ia_PID_Counter=0; + +BYTE Heater_PID_Counter=0; +BYTE LCD_Counter=0; +BYTE Heatup_Counter=0; +INT Ri_Min,Ri_Max; +INT ip; + +//INT LSU_Temperature_C; +char Str1[] = "Lambda:x.xx xxxC"; +char Str2[] = "Heating..."; + +void main(void) +{ + //unsigned long temp_ulong; + INT temp_int; + + AMUX4_0_InputSelect(AMUX4_0_PORT0_1); + AMUX4_1_InputSelect(AMUX4_1_PORT0_0); + INSAMP_Start(INSAMP_LOWPOWER); + ADCINC_Start(ADCINC_HIGHPOWER); + DAC9_Ia_Start(DAC9_Ia_HIGHPOWER); + DAC6_VGND_Start(DAC6_VGND_MEDPOWER); + DAC6_VGND_WriteStall (31); + PWM8_Vout_DisableInt(); + PWM8_Vout_Start(); + PWM8_Heater_DisableInt(); + PWM8_Heater_Start(); + PWM8_NB_Out_DisableInt(); + PWM8_NB_Out_Start(); + ADCINC_GetSamples(0); + SleepTimer_Start(); + SleepTimer_SetInterval(SleepTimer_512_HZ); + SleepTimer_EnableInt(); + M8C_EnableGInt ; + LCD_Start(); // Initialize LCD + LCD_InitBG(LCD_SOLID_BG); + + LCD_Position(0,0); + LCD_PrString(Str2); + //default to lambda 1 during heatup + PWM8_Vout_WritePulseWidth(119); + + for(;;) + { + //temp_ulong++; + if ((ADC_IF&1)==1) + { + ADC_IF=ADC_IF&254; + Ri_Min=IIR_Int(Ri_Min_x1*2,Ri_Min,Ri_Filter_Strength); + Ri_Delta=Ri_Max-Ri_Min; + Ri_Mid=(Ri_Max+Ri_Min)/2; + } + if ((ADC_IF&2)==2) + { + ADC_IF=ADC_IF&253; + Ri_Max=IIR_Int(Ri_Max_x1*2,Ri_Max,Ri_Filter_Strength); + Ri_Delta=Ri_Max-Ri_Min; + Ri_Mid=(Ri_Max+Ri_Min)/2; + } + if ((ADC_IF&4)==4) + { + ADC_IF=ADC_IF&251; + ip=IIR_Int(ip_x1*2,ip,ip_Filter_Strength); + } + Ia_PID_Counter+=Sleep_Counter; + Heater_PID_Counter+=Sleep_Counter; + Heatup_Counter+=Sleep_Counter; + LCD_Counter+=Sleep_Counter; + Sleep_Counter=0; + //1 thus 1.95ms @ 512hz + if (Ia_PID_Counter>Ia_PID_Counter_Set) + { + Ia_PID_Counter=0; + Ia_PID(); + } + //25 thus 48.82ms @ 512hz + if (Heater_PID_Counter>Heater_PID_Counter_Set && Heatup_Heater_Output >= 255) + { + Heater_PID_Counter=0; + Heater_PID(); + + temp_int=ip-ip_to_Vout_Lookup_Start; + if (temp_int<0) + { + temp_int=0; + } + if (temp_int>(ip_to_Vout_Lookup_Size-1)) + { + temp_int=(ip_to_Vout_Lookup_Size-1); + } + + PWM8_Vout_WritePulseWidth(ip_to_Vout_Lookup[temp_int]); + + #ifdef NB_Out + temp_int=23;//0.45v + if (ip<251) // 251 =0.9797787392968 + { + temp_int=46; //0.9v + + } + if (ip>259) //259 = 1.02295956968912 + { + temp_int=0; //0v + } + + PWM8_NB_Out_WritePulseWidth(temp_int); + #endif + + } + //50 thus 97.66ms @ 512hz + if (LCD_Counter>LCD_Counter_Set && Heatup_Heater_Output >= 255) + { + LCD_Counter=0; + + temp_int = ip-ip_to_Lambda_Lookup_Start; + if (temp_int<0) + { + temp_int=0; + } + if (temp_int>(ip_to_Lambda_Lookup_Size-1)) + { + temp_int=(ip_to_Lambda_Lookup_Size-1); + } + temp_int=ip_to_Lambda_Lookup[temp_int]; + + LCD_DrawBG(1,0,16,(temp_int -56)); + + LCD_Position(0,0); + Str1[7]=toChar(temp_int/100); + Str1[9]=toChar((temp_int/10)%10); + Str1[10]=toChar(temp_int%10); + + temp_int=Ri_Delta-Ri_Delta_to_Temperature_C_Start; + if (temp_int<0) + { + temp_int=0; + } + if (temp_int>(Ri_Delta_to_Temperature_C_Size-1)) + { + temp_int=(Ri_Delta_to_Temperature_C_Size-1); + } + + temp_int = 749 + temp_int; + Str1[12]=toChar(temp_int/100); + Str1[13]=toChar((temp_int/10)%10); + Str1[14]=toChar(temp_int%10); + LCD_PrString(Str1); + + } + + if (Heatup_Heater_Output<255) + { + //100 thus 195.31ms @ 512hz + if (Heatup_Counter>Heatup_Counter_Set) + { + Heatup_Counter=0; + Heatup_Heater_Output++; + //LCD_DrawBG(1,0,16,(Heatup_Heater_Output-100)); + + } + + + if ((Ri_Min>50) && (Ri_Max<475) && (Ri_Delta<Ri_Delta_Target)) + { + Heatup_Heater_Output=255; + Ri_Delta_Error_Sum=0; + } + + } + } +} diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/memory.inc b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/memory.inc new file mode 100644 index 0000000..22b5bdd --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/memory.inc @@ -0,0 +1,539 @@ +;;***************************************************************************** +;;***************************************************************************** +;; +;; FILENAME: Memory.inc +;; +;; DESCRIPTION: Memory Model and Stack Parameter Definitions for +;; the CY8C24000 family of PSoC devices. +;; +;; LAST MODIFIED: June 17, 2004 +;; +;;----------------------------------------------------------------------------- +;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. +;;***************************************************************************** +;;***************************************************************************** +; +; +; ******** Define Memory Model and Stack parameters ******** +; +SYSTEM_STACK_PAGE: equ 0 +SYSTEM_STACK_BASE_ADDR: equ 0h +SYSTEM_LARGE_MEMORY_MODEL: equ 0 +SYSTEM_SMALL_MEMORY_MODEL: equ 1 +IMAGECRAFT: equ 1 +HITECH: equ 2 +TOOLCHAIN: equ IMAGECRAFT +SYSTEM_TOOLS: equ 1 +SYSTEM_IDXPG_TRACKS_STK_PP: equ 1 +SYSTEM_IDXPG_TRACKS_IDX_PP: equ 0 +SYSTEM_MULTIPAGE_STACK: equ 0 + + +; ******* Function Class Definitions ******* +; +; These definitions are used to describe RAM access patterns. They provide +; documentation and they control prologue and epilogue macros that perform +; the necessary housekeeping functions for a large memory model device like +; the CY8C24000. + +RAM_USE_CLASS_1: equ 1 ; PUSH, POP & I/O access +RAM_USE_CLASS_2: equ 2 ; Indexed address mode on stack page +RAM_USE_CLASS_3: equ 4 ; Indexed address mode to any page +RAM_USE_CLASS_4: equ 8 ; Direct/Indirect address mode access + +; ******* Hi Tech Specific ******* +; Turn on the expansion of all macros by default +IF (TOOLCHAIN & HITECH) +OPT EXPAND +ENDIF +; ******* Page Pointer Manipulation Macros ******* +; +; Most of the following macros are conditionally compiled so they only +; produce code if the large memory model is selected. + + ;----------------------------------------------- + ; Set Stack Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify STK_PP in the large or small memory Models. + ; + ; INPUT: Constant (e.g., SYSTEM_STACK_PAGE) that specifies the RAM page on + ; which stack operations like PUSH and POP store and retrieve their + ; data + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_STK( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[STK_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set Current Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify CUR_PP in the large or small memory Models. + ; + ; INPUT: Constant value (e.g., >bFoo) for the RAM page number used in + ; calculation of effective direct-mode address operands. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_CUR( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[CUR_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set Index Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify IDX_PP in the large or small emory Models. + ; + ; INPUT: Constant value (e.g., >caFoo) for the RAM page number used in + ; calculation of effective index-mode address operands. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_IDX( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[IDX_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set MVI Read Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify MVR_PP in the large or small memory Models. + ; + ; INPUT: Constant value (e.g., >pFoo) for the RAM page number used in + ; calculation of indirect address operands used in the + ; "mvi A, [pFoo]" instructions. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_MVR( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[MVR_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Set MVI Write Page Macro + ;----------------------------------------------- + ; + ; DESC: Modify MVW_PP in the large or small memory Models. + ; + ; INPUT: Constant value (e.g., >pFoo) for the RAM page number used in + ; calculation of indirect address operands used in the + ; "mvi [pFoo], A" instructions. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_MVW( PG_NUMBER ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + mov reg[MVW_PP], @PG_NUMBER + ENDIF + endm + + ;----------------------------------------------- + ; Force Index Page Pointer to Stack Page + ;----------------------------------------------- + ; + ; DESC: Map index-mode operands onto the stack page by modifying IDX_PP. + ; See also RAM_LOCK_INDEX_TO_STACKPAGE. + ; + ; INPUT: None + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_SETPAGE_IDX2STK + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + IF ( SYSTEM_MULTIPAGE_STACK ) + mov A, reg[STK_PP] + mov reg[IDX_PP], A + ELSE + RAM_SETPAGE_IDX SYSTEM_STACK_PAGE + ENDIF + ENDIF + endm + + ;----------------------------------------------- + ; Change Memory Mode + ;----------------------------------------------- + ; + ; DESC: Modify FLAG_PAGEMODE bits in the large and small memory Models. + ; + ; INPUT: Constant value for PGMODE bitfield of CPU Flag register, F. + ; See FLAG_PGMODE_{x} constants in M8C.INC. + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_CHANGE_PAGE_MODE( MODE ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state + or F, FLAG_PGMODE_MASK & @MODE + ENDIF + endm + + ;----------------------------------------------- + ; Set Large Memory Model Native Paging Mode + ;----------------------------------------------- + ; + ; DESC: Changes the FLAG_PAGEMODE bits to enter the native LMM RAM + ; paging mode *IFF* a simple "OR" is guaranteed to work---for + ; example, in an ISR, when the PGMODE bits have been cleared + ; to zero. If a simple "OR" is not guaranteed to work, use + ; the slower RAM_RESTORE_NATIVE_PAGING instead. + ; + ; INPUT: none + ; + ; COST: 4 instruction cycles (in LMM only) + + macro RAM_SET_NATIVE_PAGING + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + IF ( SYSTEM_IDXPG_TRACKS_STK_PP ) + or F, FLAG_PGMODE_11b ; LMM w/ IndexPage<==>StackPage + ENDIF ; PGMODE LOCKED + IF ( SYSTEM_IDXPG_TRACKS_IDX_PP ) + or F, FLAG_PGMODE_10b ; LMM with independent IndexPage + ENDIF ; PGMODE FREE + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Restore Large Memory Model Native Paging Mode + ;----------------------------------------------- + ; + ; DESC: Changes the FLAG_PAGEMODE bits to enter the native LMM RAM + ; paging mode. Always works because it clears the PGMODE bits + ; before OR-ing in the new ones. See RAM_RESTORE_NATIVE_PAGING + ; for a faster method. + ; + ; INPUT: none + ; + ; COST: 8 instruction cycles (in LMM only) + + macro RAM_RESTORE_NATIVE_PAGING + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + IF ( SYSTEM_IDXPG_TRACKS_STK_PP ) + RAM_CHANGE_PAGE_MODE FLAG_PGMODE_11b ; LMM w/ IndexPage<==>StackPage + ENDIF ; PGMODE LOCKED + IF ( SYSTEM_IDXPG_TRACKS_IDX_PP ) + RAM_CHANGE_PAGE_MODE FLAG_PGMODE_10b ; LMM with independent IndexPage + ENDIF ; PGMODE FREE + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Force indexed addr mode operands to Stack Pg + ;----------------------------------------------- + ; + ; DESC: Force instructions that use indexed address mode to reference the + ; stack page (as defined by STK_PP). This macro sets the "Indexed + ; Stack Mode" bit (LSB) of the PGMODE bit field in the CPU Flag + ; register, F. (See also RAM_SETPAGE_IDX2STK, above.) + ; + ; INPUT: none + ; + ; COST: 4 instruction cycles (in LMM only) + + macro RAM_X_POINTS_TO_STACKPAGE + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + or F, FLAG_PGMODE_01b + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Force indexed addr mode operands to Index Pg + ;----------------------------------------------- + ; + ; DESC: Permit instructions that use indexed address mode to reference page + ; zero or the page pointed to by the IDX_PP register, depending on the + ; setting of the MSb (or "Direct Page Mode" bit) of the PGMODE bits + ; in the CPU Flag register, F. (This macro clears the PGMODE LSb.) + ; + ; INPUT: none + ; + ; COST: 4 instruction cycles (in LMM only) + + macro RAM_X_POINTS_TO_INDEXPAGE + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + and F, ~FLAG_PGMODE_01b + ENDIF ; SYSTEM_LARGE_MEMORY_MODEL + endm + + ;----------------------------------------------- + ; Function Prologue + ;----------------------------------------------- + ; + ; Prologue for functions that run in the LMM and SMM. + ; + + macro RAM_PROLOGUE( ACTUAL_CLASS ) + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_1 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 ) + IF ( SYSTEM_IDXPG_TRACKS_IDX_PP ) + RAM_X_POINTS_TO_STACKPAGE ; exit native paging mode! + ENDIF + ENDIF ; RAM_USE_CLASS_2 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 ) + IF ( SYSTEM_IDXPG_TRACKS_STK_PP ) + RAM_X_POINTS_TO_INDEXPAGE ; exit native paging mode! + ENDIF + ENDIF ; RAM_USE_CLASS_3 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_4 + + endm + + ;----------------------------------------------- + ; Function Epilogue + ;----------------------------------------------- + ; + ; Prologue for functions that run in the LMM and SMM. + ; + + macro RAM_EPILOGUE( ACTUAL_CLASS ) + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_1 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 ) + RAM_RESTORE_NATIVE_PAGING + ENDIF ; RAM_USE_CLASS_2 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 ) + RAM_RESTORE_NATIVE_PAGING + ENDIF ; RAM_USE_CLASS_3 + + IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 ) + ; Nothing to do + ENDIF ; RAM_USE_CLASS_4 + + endm + + ;----------------------------------------------- + ; Preserve Register + ;----------------------------------------------- + ; + ; DESC: Preserve a register value on the stack + ; + ; INPUT: Name or address of register in I/O Space + ; The I/O bank is an implicit parameter. That is, this function will + ; Access the I/O bank currently specified by the CPU Flag register. + ; + ; USES: CPU 'A' register + ; + ; COST: 9 instruction cycles + + macro REG_PRESERVE( IOReg ) + mov A, reg[ @IOReg ] + push A + endm + + ;----------------------------------------------- + ; Restore Register + ;----------------------------------------------- + ; + ; DESC: Restore a register value from the stack + ; + ; INPUT: Name or address of register in I/O Space + ; The I/O bank is an implicit parameter. That is, this function will + ; Access the I/O bank currently specified by the CPU Flag register. + ; + ; USES: CPU 'A' register + ; + ; COST: 10 instruction cycles + + macro REG_RESTORE( IOReg ) + pop A + mov reg[ @IOReg ], A + endm + + ;----------------------------------------------- + ; Preserve Volatile Page Pointer Registers + ;----------------------------------------------- + ; + ; DESC: Invoked by ISRs before switching to the LMM mode and calling + ; functions that require on it. + ; + ; INPUT: none + ; + ; USES: CPU 'A' register + ; + ; COST: 45 instruction cycles (in LMM only) + + macro ISR_PRESERVE_PAGE_POINTERS + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + REG_PRESERVE CUR_PP + REG_PRESERVE IDX_PP + REG_PRESERVE MVR_PP + REG_PRESERVE MVW_PP + ENDIF + endm + + ;----------------------------------------------- + ; Restore Volatile Page Pointer Registers + ;----------------------------------------------- + ; + ; DESC: Undo for RAM_PRESERVE_PAGE_POINTERS macro. Invoked by ISRs after + ; calling functions that run in the LMM mode and before executing + ; the RETI instruction. + ; + ; INPUT: none + ; + ; USES: CPU 'A' register + ; + ; COST: 50 instruction cycles (in LMM only) + + macro ISR_RESTORE_PAGE_POINTERS + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + REG_RESTORE MVW_PP + REG_RESTORE MVR_PP + REG_RESTORE IDX_PP + REG_RESTORE CUR_PP + ENDIF + endm + +; end of file Memory.inc +; ******* Extra macros for Memory.inc ******* +; +; Most of the following macros are conditionally compiled so they +; only produce code if the large memory model is selected. + +;----------------------------------------------- +; PRESERVE_CPU_CONTEXT Macro +;----------------------------------------------- +; +; DESC: Preserves CPU context for C function calls from ISRs. +; Also sets the paging mode to the native paging mode. +; All virtual registers and A are preserved. In LMM mode +; all page pointers are preserved. X is not preserved, +; but is preserved within any ImageCraft function call +; automatically by the compiler. +; +; INPUT: N/A +; +; COST: 190 instruction cycles (in LMM+ImageCraft only) +; 20 bytes stack usage (in LMM+ImageCraft only) +; 59 bytes of flash (in LMM+ImageCraft only) +; 155 instruction cycles (in SMM+ImageCraft only) +; 16 bytes stack usage (in SMM+ImageCraft only) +; 46 bytes of flash (in SMM+ImageCraft only) + +macro PRESERVE_CPU_CONTEXT +IF ( TOOLCHAIN & IMAGECRAFT ) + PUSH A + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + ISR_PRESERVE_PAGE_POINTERS + RAM_RESTORE_NATIVE_PAGING + MOV reg[CUR_PP], >__r0 ;Set CUR_PP to same page as virtual registers + ENDIF + MOV A, [__r0] + PUSH A + MOV A, [__r1] + PUSH A + MOV A, [__r2] + PUSH A + MOV A, [__r3] + PUSH A + MOV A, [__r4] + PUSH A + MOV A, [__r5] + PUSH A + MOV A, [__r6] + PUSH A + MOV A, [__r7] + PUSH A + MOV A, [__r8] + PUSH A + MOV A, [__r9] + PUSH A + MOV A, [__r10] + PUSH A + MOV A, [__r11] + PUSH A + MOV A, [__rX] + PUSH A + MOV A, [__rY] + PUSH A + MOV A, [__rZ] + PUSH A + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + MOV REG[CUR_PP], 0 + ENDIF +ENDIF +endm + +;----------------------------------------------- +; RESTORE_CPU_CONTEXT Macro +;----------------------------------------------- +; +; DESC: Restores CPU context for C function calls from ISRs. +; Intended to be used in a pair with the PRESERVE_CPU_CONTEXT +; macro. +; +; INPUT: N/A +; +; COST: 185 instruction cycles (in LMM+ImageCraft only) +; 58 bytes of flash (in LMM+ImageCraft only) +; 155 instruction cycles (in SMM+ImageCraft only) +; 46 bytes of flash (in SMM+ImageCraft only) + +macro RESTORE_CPU_CONTEXT +IF ( TOOLCHAIN & IMAGECRAFT ) + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + RAM_RESTORE_NATIVE_PAGING + MOV reg[CUR_PP], >__r0 ;Set CUR_PP to same page as virtual registers + ENDIF + POP A + MOV [__rZ], A + POP A + MOV [__rY], A + POP A + MOV [__rX], A + POP A + MOV [__r11], A + POP A + MOV [__r10], A + POP A + MOV [__r9], A + POP A + MOV [__r8], A + POP A + MOV [__r7], A + POP A + MOV [__r6], A + POP A + MOV [__r5], A + POP A + MOV [__r4], A + POP A + MOV [__r3], A + POP A + MOV [__r2], A + POP A + MOV [__r1], A + POP A + MOV [__r0], A + IF ( SYSTEM_LARGE_MEMORY_MODEL ) + ISR_RESTORE_PAGE_POINTERS + AND F, FLAG_PGMODE_0 + ENDIF + POP A +ENDIF +endm + +; end of extra macros to file Memory.inc \ No newline at end of file diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/mkdep b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/mkdep new file mode 100644 index 0000000..d6f3598 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/mkdep @@ -0,0 +1 @@ +-a -f project.dep -p./std/obj/ -o.o -- -IC:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include -I./lib -I./std -I. -IC:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1 -- diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt new file mode 100644 index 0000000..4651199 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/opts.txt @@ -0,0 +1,15 @@ +LASTRAM=0xff +CODECOMPRESSOR=-O -elim:UserModules +MORE_CFLAGS= +RELSTART=0x150 +INC_PATH= +CDEFINES= +LIBS= +UMLIBS= +LIB_PATH= +ENABLE_ALIGN_SHIFT=0 +LMM= +SYS_INC_CONTENTS:=SYSTEM_STACK_PAGE:_equ_0 SYSTEM_STACK_BASE_ADDR:_equ_0h SYSTEM_LARGE_MEMORY_MODEL:_equ_0 SYSTEM_SMALL_MEMORY_MODEL:_equ_1 IMAGECRAFT:_equ_1 HITECH:_equ_2 TOOLCHAIN:_equ_IMAGECRAFT +SYSTEM_TOOLS=1 +CSFLOW=on +CONFIG_NAMES=slc_free_28_pin_feb_16_2013 diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg new file mode 100644 index 0000000..2dbc200 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.dbg @@ -0,0 +1,1069 @@ +IMAGECRAFT DEBUG FORMAT +VERSION 1.2 +CPU M8C +DIR .\ +FILE boot.asm +LINE 114 0 +LINE 122 4 +LINE 126 8 +LINE 130 C +LINE 134 18 +LINE 138 1C +LINE 141 20 +LINE 142 23 +LINE 145 24 +LINE 146 27 +LINE 149 28 +LINE 150 2B +LINE 153 2C +LINE 154 2F +LINE 158 60 +LINE 161 64 +LINE 162 67 +LINE 2 68 +LINE 187 6A +LINE 2 6D +LINE 2 6F +LINE 198 72 +LINE 209 75 +LINE 210 77 +LINE 2 78 +LINE 252 7B +LINE 253 7E +LINE 2 81 +LINE 278 83 +LINE 2 86 +LINE 2 88 +LINE 322 8B +LINE 323 8E +LINE 343 91 +LINE 349 94 +LINE 350 96 +LINE 352 99 +LINE 353 9C +LINE 354 9E +LINE 355 A0 +LINE 357 A2 +LINE 358 A4 +LINE 359 A6 +LINE 361 A9 +LINE 362 AC +LINE 363 AE +LINE 364 AF +LINE 365 B0 +LINE 366 B2 +LINE 367 B3 +LINE 368 B4 +LINE 369 B6 +LINE 2 B8 +LINE 422 BA +LINE 2 BD +LINE 438 BF +LINE 2 C2 +LINE 443 C4 +LINE 2 C7 +LINE 450 C9 +LINE 458 CC +LINE 460 CF +LINE 476 D1 +LINE 478 D3 +FILE memory.inc +DIR C:\PROGRA~2\Cypress\PSOCDE~1\5.4\Common\CYPRES~1\tools\include\CY8C24~1\ +FILE m8ssc.inc +FILE m8c.inc +DIR .\lib\ +FILE GlobalParams.inc +DIR C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLCFRE~4\SLC_FR~2\SLC_FR~1\SLC_FR~1\ +FILE main.c +FUNC Heater_PID 849 fV +LINE 79 849 +BLOCK 79 849 +LINE 79 849 +LINE 80 849 +LINE 82 855 +LINE 84 865 +LINE 84 865 +LINE 85 86B +LINE 86 86B +LINE 88 877 +LINE 88 877 +LINE 89 87D +LINE 90 87D +LINE 91 8CC +LINE 100 8D4 +LINE 102 8E4 +LINE 102 8E4 +LINE 103 8EA +LINE 104 8EA +LINE 106 8F6 +LINE 106 8F6 +LINE 107 8FC +LINE 108 8FC +LINE 109 94B +LINE 111 950 +LINE 111 950 +LINE 112 956 +LINE 114 958 +LINE 115 958 +LINE 116 970 +LINE 118 970 +LINE 120 97C +LINE 120 97C +LINE 121 982 +LINE 122 982 +LINE 124 992 +LINE 124 992 +LINE 125 998 +LINE 128 998 +BLOCKEND 0 9A2 +FUNCEND 9A2 +FUNC Ia_PID 9A3 fV +LINE 140 9A3 +BLOCK 140 9A3 +LINE 140 9A3 +LINE 143 9A3 +LINE 145 9AF +LINE 147 9BF +LINE 147 9BF +LINE 148 9C5 +LINE 149 9C5 +LINE 151 9D1 +LINE 151 9D1 +LINE 152 9D7 +LINE 153 9D7 +LINE 154 A26 +LINE 156 A2E +LINE 158 A3E +LINE 158 A3E +LINE 159 A44 +LINE 160 A44 +LINE 162 A50 +LINE 162 A50 +LINE 163 A56 +LINE 164 A56 +LINE 165 A7B +LINE 167 A93 +LINE 169 A9F +LINE 169 A9F +LINE 170 AA5 +LINE 171 AA5 +LINE 173 AB5 +LINE 173 AB5 +LINE 174 ABB +LINE 175 ABB +BLOCKEND 0 AC4 +FUNCEND AC4 +FUNC IIR_Int AC5 fI +LINE 179 AC5 +BLOCK 179 AC7 +DEFLOCAL A -8 c +DEFLOCAL Vout -7 I +DEFLOCAL Vin -5 I +LINE 179 AC7 +LINE 180 AC7 +BLOCKEND 0 AFB +FUNCEND AFB +FUNC toChar AFC fc +LINE 184 AFC +BLOCK 184 B00 +DEFLOCAL ascii 0 c +DEFLOCAL base10 -4 c +LINE 184 B00 +LINE 186 B00 +LINE 189 B6D +LINE 190 B70 +LINE 192 B72 +LINE 193 B75 +LINE 195 B77 +LINE 196 B7A +LINE 198 B7C +LINE 199 B7F +LINE 201 B81 +LINE 202 B84 +LINE 204 B86 +LINE 205 B89 +LINE 207 B8B +LINE 208 B8E +LINE 210 B90 +LINE 211 B93 +LINE 213 B95 +LINE 214 B98 +LINE 216 B9A +LINE 217 B9D +LINE 218 B9D +BLOCKEND 0 BA2 +FUNCEND BA2 +FUNC main BA3 fV +LINE 235 BA3 +BLOCK 235 BA7 +DEFLOCAL temp_int 0 I +LINE 235 BA7 +LINE 239 BA7 +LINE 240 BAD +LINE 241 BB2 +LINE 242 BB7 +LINE 243 BBC +LINE 244 BC1 +LINE 245 BC6 +LINE 246 BCB +LINE 247 BCE +LINE 248 BD1 +LINE 249 BD4 +LINE 250 BD7 +LINE 251 BDA +LINE 252 BDD +LINE 253 BE2 +LINE 254 BE5 +LINE 255 BEA +LINE 256 BEE +LINE 257 BF0 +LINE 258 BF4 +LINE 260 BF9 +LINE 261 C00 +LINE 263 C0A +LINE 265 C10 +LINE 266 C10 +LINE 268 C10 +LINE 270 C18 +LINE 270 C18 +LINE 271 C1B +LINE 272 C3E +LINE 273 C4A +LINE 274 C6D +LINE 275 C6D +LINE 277 C75 +LINE 277 C75 +LINE 278 C78 +LINE 279 C9B +LINE 280 CA7 +LINE 281 CCA +LINE 282 CCA +LINE 284 CD2 +LINE 284 CD2 +LINE 285 CD5 +LINE 286 CF8 +LINE 287 CF8 +LINE 288 CFC +LINE 289 D00 +LINE 290 D04 +LINE 291 D08 +LINE 293 D0B +LINE 295 D11 +LINE 295 D11 +LINE 296 D14 +LINE 297 D16 +LINE 299 D16 +LINE 301 D21 +LINE 301 D21 +LINE 302 D24 +LINE 304 D26 +LINE 305 D32 +LINE 307 D3E +LINE 307 D3E +LINE 308 D44 +LINE 309 D44 +LINE 311 D54 +LINE 311 D54 +LINE 312 D5A +LINE 314 D5A +LINE 317 D6C +LINE 318 D72 +LINE 320 D7E +LINE 320 D7E +LINE 322 D84 +LINE 323 D84 +LINE 325 D94 +LINE 325 D94 +LINE 326 D9A +LINE 328 D9A +LINE 331 DA1 +LINE 333 DA1 +LINE 335 DAC +LINE 335 DAC +LINE 337 DAF +LINE 338 DBB +LINE 340 DC7 +LINE 340 DC7 +LINE 341 DCD +LINE 342 DCD +LINE 344 DDD +LINE 344 DDD +LINE 345 DE3 +LINE 346 DE3 +LINE 348 DF7 +LINE 350 E0B +LINE 351 E13 +LINE 352 E31 +LINE 353 E66 +LINE 355 E84 +LINE 356 E90 +LINE 358 E9C +LINE 358 E9C +LINE 359 EA2 +LINE 360 EA2 +LINE 362 EB2 +LINE 362 EB2 +LINE 363 EB8 +LINE 366 EB8 +LINE 367 EBE +LINE 368 EDC +LINE 369 F11 +LINE 370 F2F +LINE 372 F3B +LINE 374 F3B +LINE 377 F40 +LINE 377 F40 +LINE 379 F46 +LINE 379 F46 +LINE 380 F49 +LINE 383 F4B +LINE 386 F4B +LINE 388 F73 +LINE 388 F73 +LINE 389 F76 +LINE 390 F7C +LINE 392 F7C +LINE 393 F7C +LINE 265 F7C +LINE 265 F7C +BLOCKEND 0 F81 +FUNCEND F81 +DEFGLOBAL ip_to_Vout_Lookup 150 A[158:158]kc +DEFGLOBAL ip_to_Lambda_Lookup 1EE A[158:158]kc +DEFGLOBAL Ri_Mid_Error_Sum 0 I +DEFGLOBAL Ri_Delta_Error_Sum 2 I +DEFGLOBAL Heatup_Heater_Output 4 c +DEFGLOBAL Ia_PID_Counter 5 c +DEFGLOBAL Heater_PID_Counter 6 c +DEFGLOBAL LCD_Counter 7 c +DEFGLOBAL Heatup_Counter 8 c +DEFGLOBAL Str1 9 A[17:17]c +DEFGLOBAL Str2 1A A[11:11]c +DEFGLOBAL ip 44 I +DEFGLOBAL Ri_Max 46 I +DEFGLOBAL Ri_Min 48 I +DEFGLOBAL Ia_Iout 4A I +DEFGLOBAL Ia_Pout 4C I +DEFGLOBAL Ia_Output 4E I +DEFGLOBAL Ri_Mid_Error 50 I +DEFGLOBAL Heater_Iout 52 I +DEFGLOBAL Heater_Pout 54 I +DEFGLOBAL Heater_Output 56 I +DEFGLOBAL Ri_Delta_Error 58 I +DEFGLOBAL Ri_Delta 5A I +DEFGLOBAL Ri_Mid 5C I +DIR lib\ +FILE sleeptimerint.asm +LINE 95 41D +LINE 98 420 +LINE 99 423 +LINE 100 425 +LINE 103 427 +LINE 104 42A +LINE 105 42C +LINE 109 42E +LINE 110 430 +LINE 112 432 +LINE 113 434 +LINE 117 436 +LINE 118 438 +LINE 121 43A +LINE 132 43C +LINE 140 43E +FILE SleepTimer.inc +DIR .\lib\ +FILE SleepTimer.inc +DIR lib\ +FILE sleeptimer.asm +LINE 2 43F +LINE 135 442 +LINE 198 443 +LINE 199 445 +LINE 200 447 +LINE 201 449 +LINE 202 44B +LINE 204 44D +LINE 209 44F +LINE 210 451 +LINE 215 453 +LINE 269 454 +LINE 270 456 +LINE 271 457 +LINE 2 458 +LINE 273 45A +LINE 274 45C +LINE 275 45E +LINE 276 460 +LINE 2 462 +LINE 278 464 +LINE 280 465 +FILE pwm8_voutint.asm +LINE 76 466 +FILE PWM8_Vout.inc +DIR .\lib\ +FILE PWM8_Vout.inc +DIR lib\ +FILE pwm8_vout.asm +LINE 2 467 +LINE 123 46A +LINE 2 46B +LINE 152 46E +LINE 235 46F +LINE 237 471 +FILE pwm8_nb_outint.asm +LINE 90 472 +FILE PWM8_NB_Out.inc +DIR .\lib\ +FILE PWM8_NB_Out.inc +DIR lib\ +FILE pwm8_nb_out.asm +LINE 2 473 +LINE 123 476 +LINE 2 477 +LINE 152 47A +LINE 235 47B +LINE 237 47D +FILE pwm8_heaterint.asm +LINE 76 47E +FILE PWM8_Heater.inc +DIR .\lib\ +FILE PWM8_Heater.inc +DIR lib\ +FILE pwm8_heater.asm +LINE 2 47F +LINE 123 482 +LINE 2 483 +LINE 152 486 +LINE 235 487 +LINE 237 489 +FILE psocconfigtbl.asm +LINE 2 351 +LINE 153 353 +LINE 2 356 +LINE 155 358 +LINE 156 35B +LINE 2 35E +LINE 158 360 +LINE 159 363 +LINE 2 366 +LINE 161 368 +LINE 162 36B +LINE 2 36E +LINE 164 370 +LINE 165 373 +LINE 2 376 +LINE 167 378 +LINE 168 37B +LINE 2 37E +LINE 170 380 +LINE 171 383 +LINE 2 386 +LINE 173 388 +LINE 174 38B +LINE 2 38E +LINE 176 390 +LINE 177 393 +LINE 2 396 +LINE 179 398 +LINE 180 39B +LINE 2 39E +LINE 182 3A0 +LINE 183 3A3 +LINE 2 3A6 +LINE 185 3A8 +LINE 186 3AB +LINE 2 3AE +LINE 188 3B0 +LINE 2 3B3 +LINE 190 3B5 +FILE psocconfig.asm +LINE 65 3B6 +LINE 66 3B9 +LINE 67 3BC +LINE 69 3BF +LINE 70 3C2 +LINE 74 3C5 +LINE 99 3C6 +LINE 2 3C7 +LINE 101 3C9 +LINE 102 3CB +LINE 104 3CC +LINE 105 3CE +LINE 106 3D0 +LINE 108 3D3 +LINE 109 3D5 +LINE 111 3D6 +LINE 112 3D8 +LINE 113 3DA +LINE 2 3DD +LINE 116 3DF +LINE 119 3E0 +LINE 141 3E1 +LINE 142 3E3 +LINE 143 3E4 +LINE 144 3E5 +LINE 145 3E6 +LINE 146 3E9 +LINE 147 3EB +LINE 149 3EE +LINE 150 3EF +LINE 2 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b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst new file mode 100644 index 0000000..ff99e00 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.lst @@ -0,0 +1,7482 @@ +FILE: .\boot.asm (0001) ; Generated by PSoC Designer 5.4.3191 + (0002) ; + (0003) ;@Id: boot.tpl#903 @ + (0004) ;============================================================================= + (0005) ; FILENAME: boot.asm + (0006) ; Version: 4.30 + (0007) ; + (0008) ; DESCRIPTION: + (0009) ; M8C Boot Code for CY8C24xxxB microcontroller family. + (0010) ; + (0011) ; Copyright (c) Cypress Semiconductor 2012. All Rights Reserved. + (0012) ; + (0013) ; NOTES: + (0014) ; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in + (0015) ; the project's root directory to create BOOT.ASM. Any changes made to + (0016) ; BOOT.ASM will be overwritten every time the project is generated; therefore + (0017) ; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when + (0018) ; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME) + (0019) ; are not accidentally modified. + (0020) ; + (0021) ;============================================================================= + (0022) + (0023) include ".\lib\GlobalParams.inc" ;File generated by PSoC Designer (Project dependent) + (0024) include "m8c.inc" ;Part specific file + (0025) include "m8ssc.inc" ;Part specific file + (0026) include "memory.inc" ;File generated by PSoC Designer (Project dependent) + (0027) + (0028) ;-------------------------------------- + (0029) ; Export Declarations + (0030) ;-------------------------------------- + (0031) + (0032) export __Start + (0033) IF (TOOLCHAIN & HITECH) + (0034) ELSE + (0035) export __bss_start + (0036) export __data_start + (0037) export __idata_start + (0038) export __func_lit_start + (0039) export __text_start + (0040) ENDIF + (0041) export _bGetPowerSetting + (0042) export bGetPowerSetting + (0043) + (0044) + (0045) ;-------------------------------------- + (0046) ; Optimization flags + (0047) ;-------------------------------------- + (0048) ; + (0049) ; To change the value of these flags, modify the file boot.tpl, not + (0050) ; boot.asm. See the notes in the banner comment at the beginning of + (0051) ; this file. + (0052) + (0053) ; Optimization for Assembly language (only) projects and C-language projects + (0054) ; that do not depend on the C compiler to initialize the values of RAM variables. + (0055) ; Set to 1: Support for C Run-time Environment initialization + (0056) ; Set to 0: Support for C not included. Faster start up, smaller code space. + (0057) ; + (0058) IF (TOOLCHAIN & HITECH) + (0059) ; The C compiler will customize the startup code - it's not required here + (0060) + (0061) C_LANGUAGE_SUPPORT: equ 0 + (0062) ELSE + (0063) C_LANGUAGE_SUPPORT: equ 1 + (0064) ENDIF + (0065) + (0066) + (0067) ; The following equate is required for proper operation. Reseting its value + (0068) ; is discouraged. WAIT_FOR_32K is effective only if the crystal oscillator is + (0069) ; selected. If the designer chooses to not wait then stabilization of the ECO + (0070) ; and PLL_Lock must take place within user code. See the family data sheet for + (0071) ; the requirements of starting the ECO and PLL lock mode. + (0072) ; + (0073) ; Set to 1: Wait for XTAL (& PLL if selected) to stabilize before + (0074) ; invoking main + (0075) ; Set to 0: Boot code does not wait; clock may not have stabilized by + (0076) ; the time code in main starts executing. + (0077) ; + (0078) WAIT_FOR_32K: equ 1 + (0079) + (0080) + (0081) ; For historical reasons, by default the boot code uses an lcall instruction + (0082) ; to invoke the user's _main code. If _main executes a return instruction, + (0083) ; boot provides an infinite loop. By changing the following equate from zero + (0084) ; to 1, boot's lcall will be replaced by a ljmp instruction, saving two + (0085) ; bytes on the stack which are otherwise required for the return address. If + (0086) ; this option is enabled, _main must not return. (Beginning with the 4.2 + (0087) ; release, the C compiler automatically places an infinite loop at the end + (0088) ; of main, rather than a return instruction.) + (0089) ; + (0090) ENABLE_LJMP_TO_MAIN: equ 0 + (0091) + (0092) + (0093) ;----------------------------------------------------------------------------- + (0094) ; Interrupt Vector Table + (0095) ;----------------------------------------------------------------------------- + (0096) ; + (0097) ; Interrupt vector table entries are 4 bytes long. Each one contains + (0098) ; a jump instruction to an ISR (Interrupt Service Routine), although + (0099) ; very short ISRs could be encoded within the table itself. Normally, + (0100) ; vector jump targets are modified automatically according to the user + (0101) ; modules selected. This occurs when the 'Generate Application' opera- + (0102) ; tion is run causing PSoC Designer to create boot.asm and the other + (0103) ; configuration files. If you need to hard code a vector, update the + (0104) ; file boot.tpl, not boot.asm. See the banner comment at the beginning + (0105) ; of this file. + (0106) ;----------------------------------------------------------------------------- + (0107) + (0108) AREA TOP (ROM, ABS, CON) + (0109) + (0110) org 0 ;Reset Interrupt Vector + (0111) IF (TOOLCHAIN & HITECH) + (0112) ; jmp __Start ;C compiler fills in this vector + (0113) ELSE +0000: 80 67 JMP 0x0068 (0114) jmp __Start ;First instruction executed following a Reset + (0115) ENDIF + (0116) ;@PSoC_BOOT_ISR_UserCode_START@ + (0117) ;--------------------------------------------------- + (0118) ; Insert your custom code below this banner + (0119) ;--------------------------------------------------- + (0120) + (0121) org 04h ;Low Voltage Detect (LVD) Interrupt Vector +0004: 30 HALT (0122) halt ;Stop execution if power falls too low + (0123) + (0124) org 08h ;Analog Column 0 Interrupt Vector + (0125) // call void_handler +0008: 7E RETI (0126) reti + (0127) + (0128) org 0Ch ;Analog Column 1 Interrupt Vector + (0129) // call void_handler +000C: 7E RETI (0130) reti + (0131) + (0132) org 18h ;VC3 Interrupt Vector + (0133) // call void_handler +0018: 7E RETI (0134) reti + (0135) + (0136) org 1Ch ;GPIO Interrupt Vector + (0137) // call void_handler +001C: 7E RETI (0138) reti + (0139) + (0140) org 20h ;PSoC Block DBB00 Interrupt Vector +0020: 7D 07 46 LJMP _AMUX4_0_Start|_AMUX4_0_Stop|_ADCINC_ADConversion_ISR(0141) ljmp _ADCINC_ADConversion_ISR +0023: 7E RETI (0142) reti + (0143) + (0144) org 24h ;PSoC Block DBB01 Interrupt Vector +0024: 7D 04 7E LJMP _PWM8_Heater_ISR|_PWM8_NB_Out_bReadCounter|_bPWM8_NB_Out_ReadCounter|_PWM8_NB_Out_bReadPulseWidth|bPWM8_NB_Out_ReadCounter|_bPWM8_NB_Out_ReadPulseWidth|bPWM8_NB_Out_ReadPulseWidth(0145) ljmp _PWM8_Heater_ISR +0027: 7E RETI (0146) reti + (0147) + (0148) org 28h ;PSoC Block DCB02 Interrupt Vector +0028: 7D 04 66 LJMP _SleepTimer_TickWait|_SleepTimer_SetTimer|_SleepTimer_SyncWait|_SleepTimer_bGetTickCntr|_SleepTimer_bGetTimer|_SleepTimer_iGetTickCntr|_SleepTimer_lGetTickCntr|_PWM8_Vout_ISR(0149) ljmp _PWM8_Vout_ISR +002B: 7E RETI (0150) reti + (0151) + (0152) org 2Ch ;PSoC Block DCB03 Interrupt Vector +002C: 7D 04 72 LJMP _bPWM8_Vout_ReadPulseWidth|bPWM8_Vout_ReadCounter|_PWM8_Vout_bReadCounter|_PWM8_Vout_bReadPulseWidth|_PWM8_NB_Out_ISR|_bPWM8_Vout_ReadCounter(0153) ljmp _PWM8_NB_Out_ISR +002F: 7E RETI (0154) reti + (0155) + (0156) org 60h ;PSoC I2C Interrupt Vector + (0157) // call void_handler +0060: 7E RETI (0158) reti + (0159) + (0160) org 64h ;Sleep Timer Interrupt Vector +0064: 7D 04 1D LJMP _SleepTimer_ISR (0161) ljmp _SleepTimer_ISR +0067: 7E RETI (0162) reti +0068: 71 10 OR F,0x10 + (0163) ;--------------------------------------------------- + (0164) ; Insert your custom code above this banner + (0165) ;--------------------------------------------------- + (0166) ;@PSoC_BOOT_ISR_UserCode_END@ + (0167) + (0168) ;----------------------------------------------------------------------------- + (0169) ; Start of Execution. + (0170) ;----------------------------------------------------------------------------- + (0171) ; The Supervisory ROM SWBootReset function has already completed the + (0172) ; calibrate1 process, loading trim values for 5 volt operation. + (0173) ; + (0174) + (0175) IF (TOOLCHAIN & HITECH) + (0176) AREA PD_startup(CODE, REL, CON) + (0177) ELSE + (0178) org 68h + (0179) ENDIF + (0180) __Start: + (0181) + (0182) ; initialize SMP values for voltage stabilization, if required, + (0183) ; leaving power-on reset (POR) level at the default (low) level, at + (0184) ; least for now. + (0185) ; + (0186) M8C_SetBank1 +006A: 62 E3 86 MOV REG[0xE3],0x86 (0187) mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST +006D: 70 EF AND F,0xEF +006F: 62 E3 38 MOV REG[0xE3],0x38 + (0188) M8C_SetBank0 + (0189) + (0190) M8C_ClearWDTAndSleep ; Clear WDT before enabling it. + (0191) IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params + (0192) M8C_EnableWatchDog + (0193) ENDIF + (0194) + (0195) IF ( SELECT_32K ) + (0196) or reg[CPU_SCR1], CPU_SCR1_ECO_ALLOWED ; ECO will be used in this project + (0197) ELSE +0072: 41 FE FB AND REG[0xFE],0xFB (0198) and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled + (0199) ENDIF + (0200) + (0201) IF (TOOLCHAIN & HITECH) + (0202) global __Lstackps + (0203) mov a,low __Lstackps + (0204) swap a,sp + (0205) ELSE + (0206) ;------------------ + (0207) ; Set up the stack + (0208) ;------------------ +0075: 50 5E MOV A,0x5E (0209) mov A, __ramareas_end ; Set top of stack to end of used RAM +0077: 4E SWAP SP,A (0210) swap SP, A ; This is only temporary if going to LMM +0078: 62 E3 38 MOV REG[0xE3],0x38 + (0211) ENDIF + (0212) + (0213) ;----------------------------------------------- + (0214) ; Set Power-related Trim & the AGND Bypass bit. + (0215) ;----------------------------------------------- + (0216) M8C_ClearWDTAndSleep ; Clear WDT before enabling it. + (0217) IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation *** + (0218) IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + (0219) or reg[CPU_SCR1], CPU_SCR1_SLIMO + (0220) M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + (0221) ELSE ; *** 12MHZ Main Oscillator *** + (0222) IF ( AGND_BYPASS ) + (0223) ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + (0224) ; The 5V trim has already been set, but we need to update the AGNDBYP + (0225) ; bit in the write-only BDG_TR register. Recalculate the register + (0226) ; value using the proper trim values. + (0227) ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + (0228) M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST + (0229) ENDIF + (0230) ENDIF + (0231) ENDIF ; 5.0 V Operation + (0232) + (0233) IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation *** + (0234) IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator *** + (0235) or reg[CPU_SCR1], CPU_SCR1_SLIMO + (0236) M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + (0237) ELSE ; *** 12MHZ Main Oscillator *** + (0238) M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V, AGND_BYPASS_JUST + (0239) ENDIF + (0240) ENDIF ; 3.3 Volt Operation + (0241) + (0242) IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation *** + (0243) or reg[CPU_SCR1], CPU_SCR1_SLIMO + (0244) M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST + (0245) ENDIF ; *** 2.7 Volts / 12MHZ operation *** + (0246) + (0247) IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation *** + (0248) or reg[CPU_SCR1], CPU_SCR1_SLIMO + (0249) M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V, AGND_BYPASS_JUST + (0250) ENDIF ; *** 2.7 Volts / 6MHZ operation *** + (0251) +007B: 55 F8 00 MOV [_ramareas_end+154],0x0(0252) mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations +007E: 55 F9 00 MOV [_ramareas_end+155],0x0(0253) mov [bSSC_KEYSP], 0 +0081: 71 10 OR F,0x10 + (0254) + (0255) ;--------------------------------------- + (0256) ; Initialize Crystal Oscillator and PLL + (0257) ;--------------------------------------- + (0258) + (0259) IF ( SELECT_32K & WAIT_FOR_32K ) + (0260) ; If the user has requested the External Crystal Oscillator (ECO) then turn it + (0261) ; on and wait for it to stabilize and the system to switch over to it. The PLL + (0262) ; is left off. Set the SleepTimer period is set to 1 sec to time the wait for + (0263) ; the ECO to stabilize. + (0264) ; + (0265) M8C_SetBank1 + (0266) mov reg[OSC_CR0], (SELECT_32K_JUST | OSC_CR0_SLEEP_1Hz | OSC_CR0_CPU_12MHz) + (0267) M8C_SetBank0 + (0268) M8C_ClearWDTAndSleep ; Reset the sleep timer to get a full second + (0269) or reg[INT_MSK0], INT_MSK0_SLEEP ; Enable latching of SleepTimer interrupt + (0270) mov reg[INT_VC], 0 ; Clear all pending interrupts + (0271) .WaitFor1s: + (0272) tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + (0273) jz .WaitFor1s ; Interrupt will latch but will not dispatch + (0274) ; since interrupts are not globally enabled + (0275) ELSE ; !( SELECT_32K & WAIT_FOR_32K ) + (0276) ; Either no ECO, or waiting for stable clock is to be done in main + (0277) M8C_SetBank1 +0083: 62 E0 02 MOV REG[0xE0],0x2 (0278) mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz) +0086: 70 EF AND F,0xEF +0088: 62 E3 38 MOV REG[0xE3],0x38 + (0279) M8C_SetBank0 + (0280) M8C_ClearWDTAndSleep ; Reset the watch dog + (0281) + (0282) ENDIF ;( SELECT_32K & WAIT_FOR_32K ) + (0283) + (0284) IF ( PLL_MODE ) + (0285) ; Crystal is now fully operational (assuming WAIT_FOR_32K was enabled). + (0286) ; Now start up PLL if selected, and wait 16 msec for it to stabilize. + (0287) ; + (0288) M8C_SetBank1 + (0289) mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_3MHz) + (0290) M8C_SetBank0 + (0291) M8C_ClearWDTAndSleep ; Reset the sleep timer to get full period + (0292) mov reg[INT_VC], 0 ; Clear all pending interrupts + (0293) + (0294) .WaitFor16ms: + (0295) tst reg[INT_CLR0],INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + (0296) jz .WaitFor16ms + (0297) M8C_SetBank1 ; continue boot at CPU Speed of SYSCLK/2 + (0298) mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_SLEEP_64Hz | OSC_CR0_CPU_12MHz) + (0299) M8C_SetBank0 + (0300) + (0301) IF ( WAIT_FOR_32K ) + (0302) ELSE ; !( WAIT_FOR_32K ) + (0303) ; Option settings (PLL-Yes, ECO-No) are incompatible - force a syntax error + (0304) ERROR_PSoC Disabling WAIT_FOR_32K requires that the PLL_Lock must be enabled in user code. + (0305) ENDIF ;(WAIT_FOR_32K) + (0306) ENDIF ;(PLL_MODE) + (0307) + (0308) ;------------------------------------------------------- + (0309) ; Initialize Proper Drive Mode for External Clock Pin + (0310) ;------------------------------------------------------- + (0311) + (0312) ; Change EXTCLK pin from Hi-Z Analog (110b) drive mode to Hi-Z (010b) drive mode + (0313) + (0314) IF (SYSCLK_SOURCE) + (0315) and reg[PRT1DM2], ~0x10 ; Clear bit 4 of EXTCLK pin's DM2 register + (0316) ENDIF + (0317) ; EXTCLK pin is now in proper drive mode to input the external clock signal + (0318) + (0319) ;------------------------ + (0320) ; Close CT leakage path. + (0321) ;------------------------ +008B: 62 71 05 MOV REG[0x71],0x5 (0322) mov reg[ACB00CR0], 05h +008E: 62 75 05 MOV REG[0x75],0x5 (0323) mov reg[ACB01CR0], 05h + (0324) + (0325) ;@PSoC_BOOT_LOADCFG_UserCode_START@ + (0326) ;--------------------------------------------------- + (0327) ; Insert your custom code below this banner + (0328) ;--------------------------------------------------- + (0329) + (0330) ;--------------------------------------------------- + (0331) ; Insert your custom code above this banner + (0332) ;--------------------------------------------------- + (0333) ;@PSoC_BOOT_LOADCFG_UserCode_END@ + (0334) + (0335) ;------------------------- + (0336) ; Load Base Configuration + (0337) ;------------------------- + (0338) ; Load global parameter settings and load the user modules in the + (0339) ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible + (0340) ; to minimize start up time; (2) We may still need to play with the + (0341) ; Sleep Timer. + (0342) ; +0091: 7C 03 B6 LCALL 0x03B6 (0343) lcall LoadConfigInit + (0344) + (0345) ;----------------------------------- + (0346) ; Initialize C Run-Time Environment + (0347) ;----------------------------------- + (0348) IF ( C_LANGUAGE_SUPPORT ) +0094: 50 00 MOV A,0x0 (0349) mov A,0 ; clear the 'bss' segment to zero +0096: 55 2B 44 MOV [__r0],0x44 (0350) mov [__r0],<__bss_start + (0351) BssLoop: +0099: 3C 2B 5E CMP [__r0],0x5E (0352) cmp [__r0],<__bss_end +009C: A0 05 JZ 0x00A2 (0353) jz BssDone +009E: 3F 2B MVI [__r0],A (0354) mvi [__r0],A +00A0: 8F F8 JMP 0x0099 (0355) jmp BssLoop + (0356) BssDone: +00A2: 50 03 MOV A,0x3 (0357) mov A,>__idata_start ; copy idata to data segment +00A4: 57 2C MOV X,0x2C (0358) mov X,<__idata_start +00A6: 55 2B 00 MOV [__r0],0x0 (0359) mov [__r0],<__data_start + (0360) IDataLoop: +00A9: 3C 2B 25 CMP [__r0],0x25 (0361) cmp [__r0],<__data_end +00AC: A0 0B JZ 0x00B8 (0362) jz C_RTE_Done +00AE: 08 PUSH A (0363) push A +00AF: 28 ROMX (0364) romx +00B0: 3F 2B MVI [__r0],A (0365) mvi [__r0],A +00B2: 18 POP A (0366) pop A +00B3: 75 INC X (0367) inc X +00B4: 09 00 ADC A,0x0 (0368) adc A,0 +00B6: 8F F2 JMP 0x00A9 (0369) jmp IDataLoop +00B8: 71 10 OR F,0x10 + (0370) + (0371) C_RTE_Done: + (0372) + (0373) ENDIF ; C_LANGUAGE_SUPPORT + (0374) + (0375) ;------------------------------- + (0376) ; Voltage Stabilization for SMP + (0377) ;------------------------------- + (0378) + (0379) IF ( POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation + (0380) IF ( SWITCH_MODE_PUMP ^ 1 ) ; SMP is operational + (0381) ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + (0382) ; When using the SMP at 5V, we must wait for Vdd to slew from 3.1V to + (0383) ; 5V before enabling the Precision Power-On Reset (PPOR). + (0384) ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + (0385) or reg[INT_MSK0],INT_MSK0_SLEEP + (0386) M8C_SetBank1 + (0387) and reg[OSC_CR0], ~OSC_CR0_SLEEP + (0388) or reg[OSC_CR0], OSC_CR0_SLEEP_512Hz + (0389) M8C_SetBank0 + (0390) M8C_ClearWDTAndSleep ; Restart the sleep timer + (0391) mov reg[INT_VC], 0 ; Clear all pending interrupts + (0392) .WaitFor2ms: + (0393) tst reg[INT_CLR0], INT_MSK0_SLEEP ; Test the SleepTimer Interrupt Status + (0394) jz .WaitFor2ms ; Branch fails when 2 msec has passed + (0395) ENDIF ; SMP is operational + (0396) ENDIF ; 5.0V Operation + (0397) + (0398) ;------------------------------- + (0399) ; Set Power-On Reset (POR) Level + (0400) ;------------------------------- + (0401) ; The writes to the VLT_CR register below include setting the POR to VLT_CR_POR_HIGH, + (0402) ; VLT_CR_POR_MID or VLT_CR_POR_LOW. Correctly setting this value is critical to the proper + (0403) ; operation of the PSoC. The POR protects the M8C from mis-executing when Vdd falls low. + (0404) ; These values should not be changed from the settings here. See Section "POR and LVD" of + (0405) ; Technical Reference Manual #001-14463 for more information. + (0406) + (0407) M8C_SetBank1 + (0408) + (0409) IF (POWER_SETTING & POWER_SET_2V7) ; 2.7V Operation? + (0410) ; Yes, lowest trip already set + (0411) ELSE ; No, must adjust POR... + (0412) IF (POWER_SETTING & POWER_SET_3V3) ; 3.3V Operation? + (0413) or reg[VLT_CR], VLT_CR_POR_MID ; Yes, change to midpoint trip + (0414) ELSE + (0415) IF (POWER_SETTING & POWER_SET_5V0) ; 5.0V Operation? + (0416) IF (POWER_SETTING & POWER_SET_SLOW_IMO) ; and Slow Mode? + (0417) or reg[VLT_CR], VLT_CR_POR_MID ; Yes, set to midpoint trip + (0418) ELSE ; No, fast mode + (0419) IF ( CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz ) ; As fast as 24MHz? + (0420) or reg[VLT_CR], VLT_CR_POR_MID ; No, change to midpoint trip + (0421) ELSE ; 24HMz ; +00BA: 43 E3 20 OR REG[0xE3],0x20 (0422) or reg[VLT_CR], VLT_CR_POR_HIGH ; Yes, switch to highest setting +00BD: 70 EF AND F,0xEF + (0423) ENDIF ; 24MHz + (0424) ENDIF ; Slow Mode + (0425) ENDIF ; 5.0V Operation + (0426) ENDIF ; 3.3V Operation + (0427) ENDIF ; 2.7V Operation + (0428) + (0429) M8C_SetBank0 + (0430) + (0431) ;---------------------------- + (0432) ; Wrap up and invoke "main" + (0433) ;---------------------------- + (0434) + (0435) ; Disable the Sleep interrupt that was used for timing above. In fact, + (0436) ; no interrupts should be enabled now, so may as well clear the register. + (0437) ; +00BF: 62 E0 00 MOV REG[0xE0],0x0 (0438) mov reg[INT_MSK0],0 +00C2: 71 10 OR F,0x10 + (0439) + (0440) ; Everything has started OK. Now select requested CPU & sleep frequency. + (0441) ; + (0442) M8C_SetBank1 +00C4: 62 E0 03 MOV REG[0xE0],0x3 (0443) mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST) +00C7: 70 EF AND F,0xEF + (0444) M8C_SetBank0 + (0445) + (0446) ; Global Interrupt are NOT enabled, this should be done in main(). + (0447) ; LVD is set but will not occur unless Global Interrupts are enabled. + (0448) ; Global Interrupts should be enabled as soon as possible in main(). + (0449) ; +00C9: 62 E2 00 MOV REG[0xE2],0x0 (0450) mov reg[INT_VC],0 ; Clear any pending interrupts which may + (0451) ; have been set during the boot process. + (0452) IF (TOOLCHAIN & HITECH) + (0453) ljmp startup ; Jump to C compiler startup code + (0454) ELSE + (0455) IF ENABLE_LJMP_TO_MAIN + (0456) ljmp _main ; goto main (no return) + (0457) ELSE +00CC: 7C 0B A3 LCALL _main (0458) lcall _main ; call main + (0459) .Exit: +00CF: 8F FF JMP 0x00CF (0460) jmp .Exit ; Wait here after return till power-off or reset + (0461) ENDIF + (0462) ENDIF ; TOOLCHAIN + (0463) + (0464) ;--------------------------------- + (0465) ; Library Access to Global Parms + (0466) ;--------------------------------- + (0467) ; + (0468) bGetPowerSetting: + (0469) _bGetPowerSetting: + (0470) ; Returns value of POWER_SETTING in the A register. + (0471) ; No inputs. No Side Effects. + (0472) ; + (0473) IF (POWER_SETTING & POWER_SET_2V7) + (0474) mov A, POWER_SETTING | POWER_SET_SLOW_IMO + (0475) ELSE +00D1: 50 10 MOV A,0x10 (0476) mov A, POWER_SETTING ; Supply voltage and internal main osc + (0477) ENDIF +00D3: 7F RET (0478) ret + (0479) + (0480) IF (TOOLCHAIN & HITECH) + (0481) ELSE + (0482) ;--------------------------------- + (0483) ; Order Critical RAM & ROM AREAs + (0484) ;--------------------------------- + (0485) ; 'TOP' is all that has been defined so far... + (0486) + (0487) ; ROM AREAs for C CONST, static & global items + (0488) ; + (0489) AREA lit (ROM, REL, CON, LIT) ; 'const' definitions + (0490) AREA idata (ROM, REL, CON, LIT) ; Constants for initializing RAM + (0491) __idata_start: + (0492) + (0493) AREA func_lit (ROM, REL, CON, proclab) ; Function Pointers + (0494) __func_lit_start: + (0495) + (0496) AREA psoc_config (ROM, REL, CON) ; Configuration Load & Unload + (0497) AREA UserModules (ROM, REL, CON) ; User Module APIs + (0498) + (0499) ; CODE segment for general use + (0500) ; + (0501) AREA text (ROM, REL, CON) + (0502) __text_start: + (0503) + (0504) ; RAM area usage + (0505) ; + (0506) AREA data (RAM, REL, CON) ; initialized RAM + (0507) __data_start: + (0508) + (0509) AREA virtual_registers (RAM, REL, CON) ; Temp vars of C compiler + (0510) AREA InterruptRAM (RAM, REL, CON) ; Interrupts, on Page 0 + (0511) AREA bss (RAM, REL, CON) ; general use + (0512) __bss_start: + (0513) + (0514) ENDIF ; TOOLCHAIN + (0515) + (0516) ; end of file boot.asm +FILE: lib\psocconfigtbl.asm (0001) ; Generated by PSoC Designer 5.4.3191 +0351: 70 EF AND F,0xEF (0002) ; + (0003) ; ============================================================================= + (0004) ; FILENAME: PSoCConfigTBL.asm + (0005) ; + (0006) ; Copyright (c) Cypress Semiconductor 2013. All Rights Reserved. + (0007) ; + (0008) ; NOTES: + (0009) ; Do not modify this file. It is generated by PSoC Designer each time the + (0010) ; generate application function is run. The values of the parameters in this + (0011) ; file can be modified by changing the values of the global parameters in the + (0012) ; device editor. + (0013) ; + (0014) ; ============================================================================= + (0015) + (0016) include "m8c.inc" + (0017) ; Personalization tables + (0018) export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + (0019) export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + (0020) export LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + (0021) AREA lit(rom, rel) + (0022) LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0: + (0023) ; Instance name ADCINC, User Module ADCINC + (0024) ; Instance name ADCINC, Block Name ADC(ASD11) + (0025) db 84h, 90h ;ADCINC_AtoDcr0(ASD11CR0) + (0026) db 85h, 00h ;ADCINC_AtoDcr1(ASD11CR1) + (0027) db 86h, 60h ;ADCINC_AtoDcr2(ASD11CR2) + (0028) db 87h, f8h ;ADCINC_AtoDcr3(ASD11CR3) + (0029) ; Instance name ADCINC, Block Name PWM(DBB00) + (0030) db 23h, 00h ;ADCINC_PWMcr0(DBB00CR0) + (0031) db 21h, 00h ;ADCINC_PWMdr1(DBB00DR1) + (0032) db 22h, 01h ;ADCINC_PWMdr2(DBB00DR2) + (0033) ; Instance name AMUX4_0, User Module AMUX4 + (0034) ; Instance name AMUX4_1, User Module AMUX4 + (0035) ; Instance name DAC6_VGND, User Module DAC6 + (0036) ; Instance name DAC6_VGND, Block Name DAC(ASC10) + (0037) db 80h, 80h ;DAC6_VGND_CR0(ASC10CR0) + (0038) db 81h, 40h ;DAC6_VGND_CR1(ASC10CR1) + (0039) db 82h, a0h ;DAC6_VGND_CR2(ASC10CR2) + (0040) db 83h, 30h ;DAC6_VGND_CR3(ASC10CR3) + (0041) ; Instance name DAC9_Ia, User Module DAC9 + (0042) ; Instance name DAC9_Ia, Block Name LSB(ASD20) + (0043) db 90h, 80h ;DAC9_Ia_LSB_CR0(ASD20CR0) + (0044) db 91h, 80h ;DAC9_Ia_LSB_CR1(ASD20CR1) + (0045) db 92h, 20h ;DAC9_Ia_LSB_CR2(ASD20CR2) + (0046) db 93h, 30h ;DAC9_Ia_LSB_CR3(ASD20CR3) + (0047) ; Instance name DAC9_Ia, Block Name MSB(ASC21) + (0048) db 94h, a0h ;DAC9_Ia_MSB_CR0(ASC21CR0) + (0049) db 95h, 41h ;DAC9_Ia_MSB_CR1(ASC21CR1) + (0050) db 96h, a0h ;DAC9_Ia_MSB_CR2(ASC21CR2) + (0051) db 97h, 34h ;DAC9_Ia_MSB_CR3(ASC21CR3) + (0052) ; Instance name INSAMP, User Module INSAMP + (0053) ; Instance name INSAMP, Block Name INV(ACB00) + (0054) db 71h, ddh ;INSAMP_INV_CR0(ACB00CR0) + (0055) db 72h, 21h ;INSAMP_INV_CR1(ACB00CR1) + (0056) db 73h, 20h ;INSAMP_INV_CR2(ACB00CR2) + (0057) db 70h, 00h ;INSAMP_INV_CR3(ACB00CR3) + (0058) ; Instance name INSAMP, Block Name NON_INV(ACB01) + (0059) db 75h, 1ch ;INSAMP_NON_INV_CR0(ACB01CR0) + (0060) db 76h, 21h ;INSAMP_NON_INV_CR1(ACB01CR1) + (0061) db 77h, 20h ;INSAMP_NON_INV_CR2(ACB01CR2) + (0062) db 74h, 00h ;INSAMP_NON_INV_CR3(ACB01CR3) + (0063) ; Instance name LCD, User Module LCD + (0064) ; Instance name PWM8_Heater, User Module PWM8 + (0065) ; Instance name PWM8_Heater, Block Name PWM8(DBB01) + (0066) db 27h, 00h ;PWM8_Heater_CONTROL_REG(DBB01CR0) + (0067) db 25h, ffh ;PWM8_Heater_PERIOD_REG(DBB01DR1) + (0068) db 26h, 00h ;PWM8_Heater_COMPARE_REG(DBB01DR2) + (0069) ; Instance name PWM8_NB_Out, User Module PWM8 + (0070) ; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + (0071) db 2fh, 00h ;PWM8_NB_Out_CONTROL_REG(DCB03CR0) + (0072) db 2dh, ffh ;PWM8_NB_Out_PERIOD_REG(DCB03DR1) + (0073) db 2eh, 00h ;PWM8_NB_Out_COMPARE_REG(DCB03DR2) + (0074) ; Instance name PWM8_Vout, User Module PWM8 + (0075) ; Instance name PWM8_Vout, Block Name PWM8(DCB02) + (0076) db 2bh, 00h ;PWM8_Vout_CONTROL_REG(DCB02CR0) + (0077) db 29h, ffh ;PWM8_Vout_PERIOD_REG(DCB02DR1) + (0078) db 2ah, 00h ;PWM8_Vout_COMPARE_REG(DCB02DR2) + (0079) ; Instance name SleepTimer, User Module SleepTimer + (0080) ; Global Register values Bank 0 + (0081) db 60h, 09h ; AnalogColumnInputSelect register (AMX_IN) + (0082) db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1) + (0083) db 63h, 3fh ; AnalogReferenceControl register (ARF_CR) + (0084) db 65h, 00h ; AnalogSyncControl register (ASY_CR) + (0085) db e6h, 02h ; DecimatorControl_0 register (DEC_CR0) + (0086) db e7h, 02h ; DecimatorControl_1 register (DEC_CR1) + (0087) db d6h, 00h ; I2CConfig register (I2CCFG) + (0088) db b0h, 00h ; Row_0_InputMux register (RDI0RI) + (0089) db b1h, 00h ; Row_0_InputSync register (RDI0SYN) + (0090) db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS) + (0091) db b3h, 33h ; Row_0_LogicSelect_0 register (RDI0LT0) + (0092) db b4h, 33h ; Row_0_LogicSelect_1 register (RDI0LT1) + (0093) db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0) + (0094) db b6h, 08h ; Row_0_OutputDrive_1 register (RDI0SRO1) + (0095) db ffh + (0096) LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1: + (0097) ; Instance name ADCINC, User Module ADCINC + (0098) ; Instance name ADCINC, Block Name ADC(ASD11) + (0099) ; Instance name ADCINC, Block Name PWM(DBB00) + (0100) db 20h, 31h ;ADCINC_PWMfn(DBB00FN) + (0101) db 21h, 16h ;ADCINC_PWMsl(DBB00IN) + (0102) db 22h, 40h ;ADCINC_PWMos(DBB00OU) + (0103) ; Instance name AMUX4_0, User Module AMUX4 + (0104) ; Instance name AMUX4_1, User Module AMUX4 + (0105) ; Instance name DAC6_VGND, User Module DAC6 + (0106) ; Instance name DAC6_VGND, Block Name DAC(ASC10) + (0107) ; Instance name DAC9_Ia, User Module DAC9 + (0108) ; Instance name DAC9_Ia, Block Name LSB(ASD20) + (0109) ; Instance name DAC9_Ia, Block Name MSB(ASC21) + (0110) ; Instance name INSAMP, User Module INSAMP + (0111) ; Instance name INSAMP, Block Name INV(ACB00) + (0112) ; Instance name INSAMP, Block Name NON_INV(ACB01) + (0113) ; Instance name LCD, User Module LCD + (0114) ; Instance name PWM8_Heater, User Module PWM8 + (0115) ; Instance name PWM8_Heater, Block Name PWM8(DBB01) + (0116) db 24h, 31h ;PWM8_Heater_FUNC_REG(DBB01FN) + (0117) db 25h, 11h ;PWM8_Heater_INPUT_REG(DBB01IN) + (0118) db 26h, 44h ;PWM8_Heater_OUTPUT_REG(DBB01OU) + (0119) ; Instance name PWM8_NB_Out, User Module PWM8 + (0120) ; Instance name PWM8_NB_Out, Block Name PWM8(DCB03) + (0121) db 2ch, 31h ;PWM8_NB_Out_FUNC_REG(DCB03FN) + (0122) db 2dh, 14h ;PWM8_NB_Out_INPUT_REG(DCB03IN) + (0123) db 2eh, 06h ;PWM8_NB_Out_OUTPUT_REG(DCB03OU) + (0124) ; Instance name PWM8_Vout, User Module PWM8 + (0125) ; Instance name PWM8_Vout, Block Name PWM8(DCB02) + (0126) db 28h, 31h ;PWM8_Vout_FUNC_REG(DCB02FN) + (0127) db 29h, 14h ;PWM8_Vout_INPUT_REG(DCB02IN) + (0128) db 2ah, 05h ;PWM8_Vout_OUTPUT_REG(DCB02OU) + (0129) ; Instance name SleepTimer, User Module SleepTimer + (0130) ; Global Register values Bank 1 + (0131) db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1) + (0132) db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2) + (0133) db 60h, 05h ; AnalogColumnClockSelect register (CLK_CR0) + (0134) db 62h, 29h ; AnalogIOControl_0 register (ABF_CR0) + (0135) db 67h, 33h ; AnalogLUTControl0 register (ALT_CR0) + (0136) db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1) + (0137) db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0) + (0138) db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1) + (0139) db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN) + (0140) db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU) + (0141) db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN) + (0142) db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU) + (0143) db e1h, 0bh ; OscillatorControl_1 register (OSC_CR1) + (0144) db e2h, 00h ; OscillatorControl_2 register (OSC_CR2) + (0145) db dfh, 2fh ; OscillatorControl_3 register (OSC_CR3) + (0146) db deh, 00h ; OscillatorControl_4 register (OSC_CR4) + (0147) db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN) + (0148) db ffh + (0149) AREA psoc_config(rom, rel) + (0150) LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered: + (0151) ; Ordered Global Register values + (0152) M8C_SetBank0 +0353: 62 00 00 MOV REG[0x0],0x0 (0153) mov reg[00h], 00h ; Port_0_Data register (PRT0DR) +0356: 71 10 OR F,0x10 + (0154) M8C_SetBank1 +0358: 62 00 04 MOV REG[0x0],0x4 (0155) mov reg[00h], 04h ; Port_0_DriveMode_0 register (PRT0DM0) +035B: 62 01 FB MOV REG[0x1],0xFB (0156) mov reg[01h], fbh ; Port_0_DriveMode_1 register (PRT0DM1) +035E: 70 EF AND F,0xEF + (0157) M8C_SetBank0 +0360: 62 03 FB MOV REG[0x3],0xFB (0158) mov reg[03h], fbh ; Port_0_DriveMode_2 register (PRT0DM2) +0363: 62 02 00 MOV REG[0x2],0x0 (0159) mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS) +0366: 71 10 OR F,0x10 + (0160) M8C_SetBank1 +0368: 62 02 00 MOV REG[0x2],0x0 (0161) mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0) +036B: 62 03 00 MOV REG[0x3],0x0 (0162) mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1) +036E: 70 EF AND F,0xEF + (0163) M8C_SetBank0 +0370: 62 01 00 MOV REG[0x1],0x0 (0164) mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE) +0373: 62 04 00 MOV REG[0x4],0x0 (0165) mov reg[04h], 00h ; Port_1_Data register (PRT1DR) +0376: 71 10 OR F,0x10 + (0166) M8C_SetBank1 +0378: 62 04 70 MOV REG[0x4],0x70 (0167) mov reg[04h], 70h ; Port_1_DriveMode_0 register (PRT1DM0) +037B: 62 05 8F MOV REG[0x5],0x8F (0168) mov reg[05h], 8fh ; Port_1_DriveMode_1 register (PRT1DM1) +037E: 70 EF AND F,0xEF + (0169) M8C_SetBank0 +0380: 62 07 8F MOV REG[0x7],0x8F (0170) mov reg[07h], 8fh ; Port_1_DriveMode_2 register (PRT1DM2) +0383: 62 06 70 MOV REG[0x6],0x70 (0171) mov reg[06h], 70h ; Port_1_GlobalSelect register (PRT1GS) +0386: 71 10 OR F,0x10 + (0172) M8C_SetBank1 +0388: 62 06 00 MOV REG[0x6],0x0 (0173) mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0) +038B: 62 07 00 MOV REG[0x7],0x0 (0174) mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1) +038E: 70 EF AND F,0xEF + (0175) M8C_SetBank0 +0390: 62 05 00 MOV REG[0x5],0x0 (0176) mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE) +0393: 62 08 00 MOV REG[0x8],0x0 (0177) mov reg[08h], 00h ; Port_2_Data register (PRT2DR) +0396: 71 10 OR F,0x10 + (0178) M8C_SetBank1 +0398: 62 08 7F MOV REG[0x8],0x7F (0179) mov reg[08h], 7fh ; Port_2_DriveMode_0 register (PRT2DM0) +039B: 62 09 80 MOV REG[0x9],0x80 (0180) mov reg[09h], 80h ; Port_2_DriveMode_1 register (PRT2DM1) +039E: 70 EF AND F,0xEF + (0181) M8C_SetBank0 +03A0: 62 0B 00 MOV REG[0xB],0x0 (0182) mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2) +03A3: 62 0A 00 MOV REG[0xA],0x0 (0183) mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS) +03A6: 71 10 OR F,0x10 + (0184) M8C_SetBank1 +03A8: 62 0A 00 MOV REG[0xA],0x0 (0185) mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0) +03AB: 62 0B 00 MOV REG[0xB],0x0 (0186) mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1) +03AE: 70 EF AND F,0xEF + (0187) M8C_SetBank0 +03B0: 62 09 00 MOV REG[0x9],0x0 (0188) mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE) +03B3: 70 EF AND F,0xEF + (0189) M8C_SetBank0 +03B5: 7F RET (0190) ret + (0191) + (0192) + (0193) ; PSoC Configuration file trailer PsocConfig.asm +FILE: lib\psocconfig.asm (0001) ; Generated by PSoC Designer 5.4.3191 + (0002) ; + (0003) ;========================================================================== + (0004) ; PSoCConfig.asm + (0005) ; @PSOC_VERSION + (0006) ; + (0007) ; Version: 0.85 + (0008) ; Revised: June 22, 2004 + (0009) ; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0010) ; + (0011) ; This file is generated by the Device Editor on Application Generation. + (0012) ; It contains code which loads the configuration data table generated in + (0013) ; the file PSoCConfigTBL.asm + (0014) ; + (0015) ; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!! + (0016) ; Edits to this file will not be preserved. + (0017) ;========================================================================== + (0018) ; + (0019) include "m8c.inc" + (0020) include "memory.inc" + (0021) include "GlobalParams.inc" + (0022) + (0023) export LoadConfigInit + (0024) export _LoadConfigInit + (0025) export LoadConfig_slc_free_28_pin_feb_16_2013 + (0026) export _LoadConfig_slc_free_28_pin_feb_16_2013 + (0027) export Port_2_Data_SHADE + (0028) export _Port_2_Data_SHADE + (0029) export Port_2_DriveMode_0_SHADE + (0030) export _Port_2_DriveMode_0_SHADE + (0031) export Port_2_DriveMode_1_SHADE + (0032) export _Port_2_DriveMode_1_SHADE + (0033) + (0034) + (0035) export NO_SHADOW + (0036) export _NO_SHADOW + (0037) + (0038) FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask + (0039) END_CONFIG_TABLE: equ ffh ;end of config table indicator + (0040) + (0041) AREA psoc_config(rom, rel) + (0042) + (0043) ;--------------------------------------------------------------------------- + (0044) ; LoadConfigInit - Establish the start-up configuration (except for a few + (0045) ; parameters handled by boot code, like CPU speed). This + (0046) ; function can be called from user code, but typically it + (0047) ; is only called from boot. + (0048) ; + (0049) ; INPUTS: None. + (0050) ; RETURNS: Nothing. + (0051) ; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified! + (0052) ; In the large memory model currently only the page + (0053) ; pointer registers listed below are modified. This does + (0054) ; not guarantee that in future implementations of this + (0055) ; function other page pointer registers will not be + (0056) ; modified. + (0057) ; + (0058) ; Page Pointer Registers Modified: + (0059) ; CUR_PP + (0060) ; + (0061) _LoadConfigInit: + (0062) LoadConfigInit: + (0063) RAM_PROLOGUE RAM_USE_CLASS_4 + (0064) +03B6: 55 34 00 MOV [0x34],0x0 (0065) mov [Port_2_Data_SHADE], 0h +03B9: 55 35 7F MOV [0x35],0x7F (0066) mov [Port_2_DriveMode_0_SHADE], 7fh +03BC: 55 36 80 MOV [0x36],0x80 (0067) mov [Port_2_DriveMode_1_SHADE], 80h + (0068) +03BF: 7C 03 C6 LCALL 0x03C6 (0069) lcall LoadConfig_slc_free_28_pin_feb_16_2013 +03C2: 7C 03 51 LCALL 0x0351 (0070) lcall LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + (0071) + (0072) + (0073) RAM_EPILOGUE RAM_USE_CLASS_4 +03C5: 7F RET (0074) ret + (0075) + (0076) ;--------------------------------------------------------------------------- + (0077) ; Load Configuration slc_free_28_pin_feb_16_2013 + (0078) ; + (0079) ; Load configuration registers for slc_free_28_pin_feb_16_2013. + (0080) ; IO Bank 0 registers a loaded first,then those in IO Bank 1. + (0081) ; + (0082) ; INPUTS: None. + (0083) ; RETURNS: Nothing. + (0084) ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be + (0085) ; modified as may the Page Pointer registers! + (0086) ; In the large memory model currently only the page + (0087) ; pointer registers listed below are modified. This does + (0088) ; not guarantee that in future implementations of this + (0089) ; function other page pointer registers will not be + (0090) ; modified. + (0091) ; + (0092) ; Page Pointer Registers Modified: + (0093) ; CUR_PP + (0094) ; + (0095) _LoadConfig_slc_free_28_pin_feb_16_2013: + (0096) LoadConfig_slc_free_28_pin_feb_16_2013: + (0097) RAM_PROLOGUE RAM_USE_CLASS_4 + (0098) +03C6: 10 PUSH X (0099) push x +03C7: 70 EF AND F,0xEF + (0100) M8C_SetBank0 ; Force bank 0 +03C9: 50 00 MOV A,0x0 (0101) mov a, 0 ; Specify bank 0 +03CB: 67 ASR A (0102) asr a ; Store in carry flag + (0103) ; Load bank 0 table: +03CC: 50 02 MOV A,0x2 (0104) mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +03CE: 57 8C MOV X,0x8C (0105) mov X, <LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 +03D0: 7C 03 E1 LCALL 0x03E1 (0106) lcall LoadConfig ; Load the bank 0 values + (0107) +03D3: 50 01 MOV A,0x1 (0108) mov a, 1 ; Specify bank 1 +03D5: 67 ASR A (0109) asr a ; Store in carry flag + (0110) ; Load bank 1 table: +03D6: 50 02 MOV A,0x2 (0111) mov A, >LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +03D8: 57 F1 MOV X,0xF1 (0112) mov X, <LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 +03DA: 7C 03 E1 LCALL 0x03E1 (0113) lcall LoadConfig ; Load the bank 1 values +03DD: 70 EF AND F,0xEF + (0114) + (0115) M8C_SetBank0 ; Force return to bank 0 +03DF: 20 POP X (0116) pop x + (0117) + (0118) RAM_EPILOGUE RAM_USE_CLASS_4 +03E0: 7F RET (0119) ret + (0120) + (0121) + (0122) + (0123) + (0124) ;--------------------------------------------------------------------------- + (0125) ; LoadConfig - Set IO registers as specified in ROM table of (address,value) + (0126) ; pairs. Terminate on address=0xFF. + (0127) ; + (0128) ; INPUTS: [A,X] points to the table to be loaded + (0129) ; Flag Register Carry bit encodes the Register Bank + (0130) ; (Carry=0 => Bank 0; Carry=1 => Bank 1) + (0131) ; + (0132) ; RETURNS: nothing. + (0133) ; + (0134) ; STACK FRAME: X-4 I/O Bank 0/1 indicator + (0135) ; X-3 Temporary store for register address + (0136) ; X-2 LSB of config table address + (0137) ; X-1 MSB of config table address + (0138) ; + (0139) LoadConfig: + (0140) RAM_PROLOGUE RAM_USE_CLASS_2 +03E1: 38 02 ADD SP,0x2 (0141) add SP, 2 ; Set up local vars +03E3: 10 PUSH X (0142) push X ; Save config table address on stack +03E4: 08 PUSH A (0143) push A +03E5: 4F MOV X,SP (0144) mov X, SP +03E6: 56 FC 00 MOV [X-4],0x0 (0145) mov [X-4], 0 ; Set default Destination to Bank 0 +03E9: D0 04 JNC 0x03EE (0146) jnc .BankSelectSaved ; Carry says Bank 0 is OK +03EB: 56 FC 01 MOV [X-4],0x1 (0147) mov [X-4], 1 ; No Carry: default to Bank 1 + (0148) .BankSelectSaved: +03EE: 18 POP A (0149) pop A +03EF: 20 POP X (0150) pop X +03F0: 70 EF AND F,0xEF +03F2: 62 E3 00 MOV REG[0xE3],0x0 + (0151) + (0152) LoadConfigLp: + (0153) M8C_SetBank0 ; Switch to bank 0 + (0154) M8C_ClearWDT ; Clear the watchdog for long inits +03F5: 10 PUSH X (0155) push X ; Preserve the config table address +03F6: 08 PUSH A (0156) push A +03F7: 28 ROMX (0157) romx ; Load register address from table +03F8: 39 FF CMP A,0xFF (0158) cmp A, END_CONFIG_TABLE ; End of table? +03FA: A0 1F JZ 0x041A (0159) jz EndLoadConfig ; Yes, go wrap it up +03FC: 4F MOV X,SP (0160) mov X, SP ; +03FD: 48 FC 01 TST [X-4],0x1 (0161) tst [X-4], 1 ; Loading IO Bank 1? +0400: A0 03 JZ 0x0404 (0162) jz .IOBankNowSet ; No, Bank 0 is fine +0402: 71 10 OR F,0x10 + (0163) M8C_SetBank1 ; Yes, switch to Bank 1 + (0164) .IOBankNowSet: +0404: 54 FD MOV [X-3],A (0165) mov [X-3], A ; Stash the register address +0406: 18 POP A (0166) pop A ; Retrieve the table address +0407: 20 POP X (0167) pop X +0408: 75 INC X (0168) inc X ; Advance to the data byte +0409: 09 00 ADC A,0x0 (0169) adc A, 0 +040B: 10 PUSH X (0170) push X ; Save the config table address again +040C: 08 PUSH A (0171) push A +040D: 28 ROMX (0172) romx ; load config data from the table +040E: 4F MOV X,SP (0173) mov X, SP ; retrieve the register address +040F: 59 FD MOV X,[X-3] (0174) mov X, [X-3] +0411: 61 00 MOV REG[X+0x0],A (0175) mov reg[X], A ; Configure the register +0413: 18 POP A (0176) pop A ; retrieve the table address +0414: 20 POP X (0177) pop X +0415: 75 INC X (0178) inc X ; advance to next table entry +0416: 09 00 ADC A,0x0 (0179) adc A, 0 +0418: 8F D7 JMP 0x03F0 (0180) jmp LoadConfigLp ; loop to configure another register + (0181) EndLoadConfig: +041A: 38 FC ADD SP,0xFC (0182) add SP, -4 + (0183) RAM_EPILOGUE RAM_USE_CLASS_2 +041C: 7F RET (0184) ret + (0185) + (0186) AREA InterruptRAM(ram, rel) + (0187) + (0188) NO_SHADOW: + (0189) _NO_SHADOW: + (0190) ; write only register shadows + (0191) _Port_2_Data_SHADE: + (0192) Port_2_Data_SHADE: BLK 1 + (0193) _Port_2_DriveMode_0_SHADE: + (0194) Port_2_DriveMode_0_SHADE: BLK 1 + (0195) _Port_2_DriveMode_1_SHADE: + (0196) Port_2_DriveMode_1_SHADE: BLK 1 + (0197) +FILE: lib\sleeptimerint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: SleepTimerINT.asm + (0004) ;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: SleepTimer Interrupt Service Routine. + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "SleepTimer.inc" + (0014) include "memory.inc" + (0015) include "m8c.inc" + (0016) + (0017) ;----------------------------------------------- + (0018) ; Global Symbols + (0019) ;----------------------------------------------- + (0020) export _SleepTimer_ISR + (0021) + (0022) + (0023) export SleepTimer_fTick + (0024) export _SleepTimer_fTick + (0025) export SleepTimer_bTimerValue + (0026) export _SleepTimer_bTimerValue + (0027) export SleepTimer_bCountDown + (0028) export _SleepTimer_bCountDown + (0029) export SleepTimer_TickCount + (0030) export _SleepTimer_TickCount + (0031) + (0032) ;----------------------------------------------- + (0033) ; Variable Allocation + (0034) ;----------------------------------------------- + (0035) AREA InterruptRAM (RAM, REL, CON) + (0036) + (0037) SleepTimer_fTick: + (0038) _SleepTimer_fTick: BLK 1 + (0039) + (0040) SleepTimer_bTimerValue: + (0041) _SleepTimer_bTimerValue: BLK 1 + (0042) + (0043) SleepTimer_bCountDown: + (0044) _SleepTimer_bCountDown: BLK 1 + (0045) + (0046) SleepTimer_TickCount: + (0047) _SleepTimer_TickCount: BLK SleepTimer_TICK_CNTR_SIZE + (0048) + (0049) + (0050) + (0051) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0052) ;--------------------------------------------------- + (0053) ; Insert your custom declarations below this banner + (0054) ;--------------------------------------------------- + (0055) + (0056) ;------------------------ + (0057) ; Includes + (0058) ;------------------------ + (0059) + (0060) + (0061) ;------------------------ + (0062) ; Constant Definitions + (0063) ;------------------------ + (0064) + (0065) + (0066) ;------------------------ + (0067) ; Variable Allocation + (0068) ;------------------------ + (0069) + (0070) //14Point7 ASM Code Start + (0071) Sleep_Counter:: // Sleep timer will trigger this ISR @ 512hz, Sleep Counter is used to count the number number of times this happens, Sleep Counter is used to figure how often certain routines should run + (0072) _Sleep_Counter:: BLK 1 + (0073) //14Point7 ASM Code End + (0074) + (0075) ;--------------------------------------------------- + (0076) ; Insert your custom declarations above this banner + (0077) ;--------------------------------------------------- + (0078) ;@PSoC_UserCode_END@ (Do not change this line.) + (0079) + (0080) + (0081) AREA UserModules (ROM, REL, CON) + (0082) + (0083) ;----------------------------------------------------------------------------- + (0084) ; FUNCTION NAME: _SleepTimer_ISR + (0085) ; + (0086) ; DESCRIPTION: + (0087) ; interrupt handler for instance SleepTimer. + (0088) ; + (0089) ; This is a place holder function. If the user requires use of an interrupt + (0090) ; handler for this function, then place code where specified. + (0091) ;----------------------------------------------------------------------------- + (0092) + (0093) _SleepTimer_ISR: + (0094) +041D: 2E 2C 01 OR [0x2C],0x1 (0095) or [SleepTimer_fTick],0x01 ; Set tick flag + (0096) + (0097) ; Decrement CountDown (Sync counter) +0420: 47 2E FF TST [0x2E],0xFF (0098) tst [SleepTimer_bCountDown],0xFF +0423: A0 03 JZ 0x0427 (0099) jz .DoTimer +0425: 7A 2E DEC [0x2E] (0100) dec [SleepTimer_bCountDown] + (0101) + (0102) .DoTimer: ; Decrement TimerValue, if required +0427: 47 2D FF TST [0x2D],0xFF (0103) tst [SleepTimer_bTimerValue],0xFF +042A: A0 03 JZ 0x042E (0104) jz .IncBigCounter +042C: 7A 2D DEC [0x2D] (0105) dec [SleepTimer_bTimerValue] + (0106) + (0107) .IncBigCounter: ; Increment big tick counter + (0108) IF (SleepTimer_TICK_CNTR_SIZE & 0x04) +042E: 76 32 INC [0x32] (0109) inc [SleepTimer_TickCount+3] +0430: D0 0B JNC 0x043C (0110) jnc SleepTimer_SLEEP_ISR_END + (0111) +0432: 76 31 INC [0x31] (0112) inc [SleepTimer_TickCount+2] +0434: D0 07 JNC 0x043C (0113) jnc SleepTimer_SLEEP_ISR_END + (0114) ENDIF + (0115) + (0116) IF (SleepTimer_TICK_CNTR_SIZE & (0x04|0x02)) +0436: 76 30 INC [0x30] (0117) inc [SleepTimer_TickCount+1] +0438: D0 03 JNC 0x043C (0118) jnc SleepTimer_SLEEP_ISR_END + (0119) ENDIF + (0120) +043A: 76 2F INC [0x2F] (0121) inc [SleepTimer_TickCount+0] + (0122) + (0123) SleepTimer_SLEEP_ISR_END: + (0124) + (0125) ;@PSoC_UserCode_BODY_1@ (Do not change this line.) + (0126) ;--------------------------------------------------- + (0127) ; Insert your custom code below this banner + (0128) ;--------------------------------------------------- + (0129) ; NOTE: interrupt service routines must preserve + (0130) ; the values of the A and X CPU registers. + (0131) //14Point7 ASM Code Start +043C: 76 33 INC [0x33] (0132) inc [Sleep_Counter] + (0133) //call LED7SEG_Update + (0134) //14Point7 ASM Code End + (0135) ;--------------------------------------------------- + (0136) ; Insert your custom code above this banner + (0137) ;--------------------------------------------------- + (0138) ;@PSoC_UserCode_END@ (Do not change this line.) + (0139) +043E: 7E RETI (0140) reti + (0141) + (0142) ; end of file SleepTimerINT.asm + (0143) +FILE: lib\sleeptimer.asm (0001) ;;***************************************************************************** +043F: 43 E0 40 OR REG[0xE0],0x40 (0002) ;;***************************************************************************** + (0003) ;; Filename: SleepTimer.asm + (0004) ;; Version: 1.0, Updated on 2015/3/4 at 22:26:59 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: SleepTimer User Module software implementation file for the + (0008) ;; 22/24/27/29xxx families. + (0009) ;; + (0010) ;; + (0011) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0012) ;; arguments and observe the associated "Registers are volatile" policy. + (0013) ;; This means it is the caller's responsibility to preserve any values + (0014) ;; in the X and A registers that are still needed after the API functions + (0015) ;; returns. For Large Memory Model devices it is also the caller's + (0016) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0017) ;; MVW_PP registers. Even though some of these registers may not be modified + (0018) ;; now, there is no guarantee that will remain the case in future releases. + (0019) ;;----------------------------------------------------------------------------- + (0020) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0021) ;;***************************************************************************** + (0022) ;;***************************************************************************** + (0023) + (0024) + (0025) include "m8c.inc" + (0026) include "memory.inc" + (0027) include "SleepTimer.inc" + (0028) + (0029) ;----------------------------------------------- + (0030) ; Global Symbols + (0031) ;----------------------------------------------- + (0032) ;------------------------------------------------------------------- + (0033) ; Declare the functions global for both assembler and C compiler. + (0034) ; + (0035) ; Note that there are two names for each API. First name is + (0036) ; assembler reference. Name with underscore is name reference for + (0037) ; C compiler. Calling function in C source code does not require + (0038) ; the underscore. + (0039) ;------------------------------------------------------------------- + (0040) export SleepTimer_EnableInt + (0041) export _SleepTimer_EnableInt + (0042) export SleepTimer_DisableInt + (0043) export _SleepTimer_DisableInt + (0044) + (0045) export SleepTimer_Start + (0046) export _SleepTimer_Start + (0047) export SleepTimer_Stop + (0048) export _SleepTimer_Stop + (0049) + (0050) export SleepTimer_TickWait + (0051) export _SleepTimer_TickWait + (0052) + (0053) export SleepTimer_SyncWait + (0054) export _SleepTimer_SyncWait + (0055) + (0056) export SleepTimer_SetInterval + (0057) export _SleepTimer_SetInterval + (0058) + (0059) export SleepTimer_bGetTickCntr + (0060) export _SleepTimer_bGetTickCntr + (0061) + (0062) export SleepTimer_SetTimer + (0063) export _SleepTimer_SetTimer + (0064) + (0065) export SleepTimer_bGetTimer + (0066) export _SleepTimer_bGetTimer + (0067) + (0068) IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + (0069) export SleepTimer_iGetTickCntr + (0070) export _SleepTimer_iGetTickCntr + (0071) ENDIF + (0072) + (0073) IF(SleepTimer_TICK_CNTR_SIZE & 4) + (0074) export SleepTimer_lGetTickCntr + (0075) export _SleepTimer_lGetTickCntr + (0076) ENDIF + (0077) + (0078) + (0079) area text (ROM,REL) + (0080) + (0081) ;----------------------------------------------- + (0082) ; EQUATES + (0083) ;----------------------------------------------- + (0084) + (0085) ; Counter LSB Offset if 4 byte tick counter + (0086) IF(SleepTimer_TICK_CNTR_SIZE & 4) + (0087) ST_LSB_OFFSET: equ 3 + (0088) ENDIF + (0089) + (0090) ; Counter LSB Offset if 2 byte tick counter + (0091) IF(SleepTimer_TICK_CNTR_SIZE & 2) + (0092) ST_LSB_OFFSET: equ 1 + (0093) ENDIF + (0094) + (0095) ; Counter LSB Offset if 1 byte tick counter + (0096) IF(SleepTimer_TICK_CNTR_SIZE & 1) + (0097) ST_LSB_OFFSET: equ 0 + (0098) ENDIF + (0099) + (0100) + (0101) area UserModules (ROM, REL, CON) + (0102) + (0103) ;============================================================================= + (0104) ;============================================================================= + (0105) ; + (0106) ; Low-Level Commands + (0107) ; + (0108) ;============================================================================= + (0109) ;============================================================================= + (0110) + (0111) .SECTION + (0112) ;----------------------------------------------------------------------------- + (0113) ; FUNCTION NAME: SleepTimer_EnableInt + (0114) ; + (0115) ; DESCRIPTION: + (0116) ; Enables SleepTimer interrupts. + (0117) ;----------------------------------------------------------------------------- + (0118) ; + (0119) ; ARGUMENTS: + (0120) ; none. + (0121) ; + (0122) ; RETURNS: + (0123) ; none. + (0124) ; + (0125) ; SIDE EFFECTS: + (0126) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0127) ; + (0128) ; THEORY of OPERATION OR PROCEDURE: + (0129) ; + (0130) SleepTimer_EnableInt: + (0131) _SleepTimer_EnableInt: + (0132) RAM_PROLOGUE RAM_USE_CLASS_1 + (0133) M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0134) RAM_EPILOGUE RAM_USE_CLASS_1 +0442: 7F RET (0135) ret + (0136) .ENDSECTION + (0137) + (0138) + (0139) .SECTION + (0140) ;----------------------------------------------------------------------------- + (0141) ; FUNCTION NAME: SleepTimer_DisableInt + (0142) ; + (0143) ; DESCRIPTION: + (0144) ; Disables the sleep timer. + (0145) ; + (0146) ;----------------------------------------------------------------------------- + (0147) ; + (0148) ; ARGUMENTS: + (0149) ; none. + (0150) ; + (0151) ; RETURNS: + (0152) ; none. + (0153) ; + (0154) ; SIDE EFFECTS: + (0155) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0156) ; + (0157) ; THEORY of OPERATION OR PROCEDURE: + (0158) ; + (0159) SleepTimer_DisableInt: + (0160) _SleepTimer_DisableInt: + (0161) RAM_PROLOGUE RAM_USE_CLASS_1 + (0162) M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0163) RAM_EPILOGUE RAM_USE_CLASS_1 + (0164) ret + (0165) .ENDSECTION + (0166) + (0167) + (0168) .SECTION + (0169) ;----------------------------------------------------------------------------- + (0170) ; FUNCTION NAME: SleepTimer_Start() + (0171) ; + (0172) ; DESCRIPTION: + (0173) ; Clears all the variables. + (0174) ;----------------------------------------------------------------------------- + (0175) ; + (0176) ; ARGUMENTS: + (0177) ; none + (0178) ; + (0179) ; RETURNS: + (0180) ; none. + (0181) ; + (0182) ; SIDE EFFECTS; + (0183) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0184) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0185) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0186) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0187) ; REGISTERS WILL NOT BE MODIFIED. + (0188) ; + (0189) ; Page Pointer Registers Modified: + (0190) ; CUR_PP + (0191) ; + (0192) ; THEORY of OPERATION OR PROCEDURE: + (0193) ; + (0194) SleepTimer_Start: + (0195) _SleepTimer_Start: + (0196) RAM_PROLOGUE RAM_USE_CLASS_4 + (0197) RAM_SETPAGE_CUR >SleepTimer_fTick +0443: 50 00 MOV A,0x0 (0198) mov A,0 +0445: 53 2C MOV [0x2C],A (0199) mov [SleepTimer_fTick],A +0447: 53 2D MOV [0x2D],A (0200) mov [SleepTimer_bTimerValue],A +0449: 53 2E MOV [0x2E],A (0201) mov [SleepTimer_bCountDown],A +044B: 53 32 MOV [0x32],A (0202) mov [SleepTimer_TickCount + ST_LSB_OFFSET],A ; Clear TickCount[0:7] + (0203) IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) +044D: 53 31 MOV [0x31],A (0204) mov [SleepTimer_TickCount + ST_LSB_OFFSET - 1],A ; Clear TickCount[8:15] + (0205) ENDIF + (0206) + (0207) + (0208) IF(SleepTimer_TICK_CNTR_SIZE & 4) +044F: 53 30 MOV [0x30],A (0209) mov [SleepTimer_TickCount + ST_LSB_OFFSET - 2],A ; Clear TickCount[16:31] +0451: 53 2F MOV [0x2F],A (0210) mov [SleepTimer_TickCount + ST_LSB_OFFSET - 3],A + (0211) ENDIF + (0212) + (0213) + (0214) RAM_EPILOGUE RAM_USE_CLASS_4 +0453: 7F RET (0215) ret + (0216) .ENDSECTION + (0217) + (0218) + (0219) .SECTION + (0220) ;----------------------------------------------------------------------------- + (0221) ; FUNCTION NAME: SleepTimer_Stop + (0222) ; + (0223) ; DESCRIPTION: + (0224) ; This function does nothing at this time. It is only here as a place + (0225) ; holder. + (0226) ;----------------------------------------------------------------------------- + (0227) ; + (0228) ; ARGUMENTS: + (0229) ; none. + (0230) ; + (0231) ; RETURNS: + (0232) ; none. + (0233) ; + (0234) ; SIDE EFFECTS: + (0235) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0236) ; + (0237) ; THEORY of OPERATION OR PROCEDURE: + (0238) ; + (0239) SleepTimer_Stop: + (0240) _SleepTimer_Stop: + (0241) RAM_PROLOGUE RAM_USE_CLASS_1 + (0242) RAM_EPILOGUE RAM_USE_CLASS_1 + (0243) ret + (0244) .ENDSECTION + (0245) + (0246) .SECTION + (0247) ;----------------------------------------------------------------------------- + (0248) ; FUNCTION NAME: SleepTimer_SetInterval + (0249) ; + (0250) ; DESCRIPTION: + (0251) ; Sets sleep timer interval + (0252) ; + (0253) ;----------------------------------------------------------------------------- + (0254) ; + (0255) ; ARGUMENTS: + (0256) ; A <= Timer setting + (0257) ; + (0258) ; RETURNS: + (0259) ; none. + (0260) ; + (0261) ; SIDE EFFECTS: + (0262) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0263) ; + (0264) ; THEORY of OPERATION OR PROCEDURE: + (0265) ; + (0266) SleepTimer_SetInterval: + (0267) _SleepTimer_SetInterval: + (0268) RAM_PROLOGUE RAM_USE_CLASS_2 +0454: 21 18 AND A,0x18 (0269) and A,SleepTimer_CLOCK_MASK ; Mask off invalid data +0456: 4F MOV X,SP (0270) mov X, SP +0457: 08 PUSH A (0271) push A +0458: 71 10 OR F,0x10 + (0272) M8C_SetBank1 +045A: 5D E0 MOV A,REG[0xE0] (0273) mov A, reg[OSC_CR0] ; Get current timer value +045C: 21 E7 AND A,0xE7 (0274) and A,~SleepTimer_CLOCK_MASK ; Zero out old timer value +045E: 2B 00 OR A,[X+0] (0275) or A, [X] ; Set new timer values +0460: 60 E0 MOV REG[0xE0],A (0276) mov reg[OSC_CR0],A ; Write it +0462: 70 EF AND F,0xEF + (0277) M8C_SetBank0 +0464: 18 POP A (0278) pop A + (0279) RAM_EPILOGUE RAM_USE_CLASS_2 +0465: 7F RET (0280) ret + (0281) .ENDSECTION + (0282) + (0283) + (0284) .SECTION + (0285) ;----------------------------------------------------------------------------- + (0286) ; FUNCTION NAME: SleepTimer_TickWait(BYTE bTicks) + (0287) ; + (0288) ; DESCRIPTION: + (0289) ; Wait X Ticks and return + (0290) ; + (0291) ;----------------------------------------------------------------------------- + (0292) ; + (0293) ; ARGUMENTS: + (0294) ; A <= Count down time + (0295) ; + (0296) ; RETURNS: + (0297) ; none. + (0298) ; + (0299) ; SIDE EFFECTS; + (0300) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0301) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0302) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0303) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0304) ; REGISTERS WILL NOT BE MODIFIED. + (0305) ; + (0306) ; Page Pointer Registers Modified: + (0307) ; CUR_PP + (0308) ; + (0309) ; THEORY of OPERATION OR PROCEDURE: + (0310) ; + (0311) SleepTimer_TickWait: + (0312) _SleepTimer_TickWait: + (0313) RAM_PROLOGUE RAM_USE_CLASS_4 + (0314) RAM_SETPAGE_CUR >SleepTimer_fTick + (0315) mov [SleepTimer_fTick],0x00 ; Clear tick flag + (0316) + (0317) .WaitTick: + (0318) tst [SleepTimer_fTick],0xFF ; Check for tick + (0319) jz .WaitTick + (0320) mov [SleepTimer_fTick],0x00 ; Clear tick flag + (0321) dec A ; Dec the timer variable + (0322) jnz .WaitTick ; Loop until we count down to zero + (0323) + (0324) RAM_EPILOGUE RAM_USE_CLASS_4 + (0325) ret + (0326) .ENDSECTION + (0327) + (0328) + (0329) .SECTION + (0330) ;----------------------------------------------------------------------------- + (0331) ; FUNCTION NAME: SleepTimer_SyncWait(BYTE bCounts, BYTE fMode) + (0332) ; + (0333) ; DESCRIPTION: + (0334) ; This function resets the SyncWait timer. If fMode = 0, the timer + (0335) ; is set to the new value then exits the function immediatly. If fMode + (0336) ; is set to 1, the firmware waits for the timer to expire before the + (0337) ; timer is reset and and exits. + (0338) ; + (0339) ;----------------------------------------------------------------------------- + (0340) ; + (0341) ; ARGUMENTS: + (0342) ; A <= tCounts to wait + (0343) ; X <= fMode fMode = 0 Just reload the value, do not wait + (0344) ; fMode = 1 Wait for last value to count down to zero + (0345) ; then reload. + (0346) ; + (0347) ; RETURNS: + (0348) ; none. + (0349) ; + (0350) ; SIDE EFFECTS; + (0351) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0352) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0353) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0354) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0355) ; REGISTERS WILL NOT BE MODIFIED. + (0356) ; + (0357) ; Page Pointer Registers Modified: + (0358) ; CUR_PP + (0359) ; + (0360) ; THEORY of OPERATION OR PROCEDURE: + (0361) ; + (0362) SleepTimer_SyncWait: + (0363) _SleepTimer_SyncWait: + (0364) RAM_PROLOGUE RAM_USE_CLASS_4 + (0365) RAM_SETPAGE_CUR >SleepTimer_bCountDown + (0366) swap A,X + (0367) AND A,SleepTimer_FORCE_RELOAD + (0368) jnz .ReloadIt + (0369) + (0370) .WaitLoop: + (0371) tst [SleepTimer_bCountDown],0xFF + (0372) jnz .WaitLoop + (0373) + (0374) + (0375) .ReloadIt: + (0376) swap A,X + (0377) mov [SleepTimer_bCountDown],A + (0378) + (0379) RAM_EPILOGUE RAM_USE_CLASS_4 + (0380) ret + (0381) .ENDSECTION + (0382) + (0383) + (0384) + (0385) .SECTION + (0386) ;----------------------------------------------------------------------------- + (0387) ; FUNCTION NAME: SleepTimer_bGetTickCntr + (0388) ; + (0389) ; DESCRIPTION: + (0390) ; Returns the LSB of the tick Counter + (0391) ; + (0392) ;----------------------------------------------------------------------------- + (0393) ; + (0394) ; ARGUMENTS: + (0395) ; none + (0396) ; + (0397) ; RETURNS: + (0398) ; LSB of lTickCount + (0399) ; + (0400) ; SIDE EFFECTS; + (0401) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0402) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0403) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0404) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0405) ; REGISTERS WILL NOT BE MODIFIED. + (0406) ; + (0407) ; Page Pointer Registers Modified: + (0408) ; CUR_PP + (0409) ; + (0410) ; THEORY of OPERATION OR PROCEDURE: + (0411) ; + (0412) SleepTimer_bGetTickCntr: + (0413) _SleepTimer_bGetTickCntr: + (0414) RAM_PROLOGUE RAM_USE_CLASS_4 + (0415) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0416) mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] + (0417) RAM_EPILOGUE RAM_USE_CLASS_4 + (0418) ret + (0419) .ENDSECTION + (0420) + (0421) .SECTION + (0422) ;----------------------------------------------------------------------------- + (0423) ; FUNCTION NAME: SleepTimer_SetTimer + (0424) ; + (0425) ; DESCRIPTION: + (0426) ; Set timer with parameter in A + (0427) ; + (0428) ;----------------------------------------------------------------------------- + (0429) ; + (0430) ; ARGUMENTS: + (0431) ; A => Value used to set Timer value + (0432) ; + (0433) ; RETURNS: + (0434) ; None + (0435) ; + (0436) ; SIDE EFFECTS; + (0437) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0438) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0439) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0440) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0441) ; REGISTERS WILL NOT BE MODIFIED. + (0442) ; + (0443) ; Page Pointer Registers Modified: + (0444) ; CUR_PP + (0445) ; + (0446) ; THEORY of OPERATION OR PROCEDURE: + (0447) ; + (0448) SleepTimer_SetTimer: + (0449) _SleepTimer_SetTimer: + (0450) RAM_PROLOGUE RAM_USE_CLASS_4 + (0451) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0452) mov [SleepTimer_bTimerValue],A + (0453) RAM_EPILOGUE RAM_USE_CLASS_4 + (0454) ret + (0455) .ENDSECTION + (0456) + (0457) .SECTION + (0458) ;----------------------------------------------------------------------------- + (0459) ; FUNCTION NAME: SleepTimer_bGetTimer + (0460) ; + (0461) ; DESCRIPTION: + (0462) ; Returns timer value in A + (0463) ; + (0464) ;----------------------------------------------------------------------------- + (0465) ; + (0466) ; ARGUMENTS: + (0467) ; None + (0468) ; + (0469) ; RETURNS: + (0470) ; Return timer value in A + (0471) ; + (0472) ; SIDE EFFECTS; + (0473) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0474) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0475) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0476) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0477) ; REGISTERS WILL NOT BE MODIFIED. + (0478) ; + (0479) ; Page Pointer Registers Modified: + (0480) ; CUR_PP + (0481) ; + (0482) ; THEORY of OPERATION OR PROCEDURE: + (0483) ; + (0484) SleepTimer_bGetTimer: + (0485) _SleepTimer_bGetTimer: + (0486) RAM_PROLOGUE RAM_USE_CLASS_4 + (0487) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0488) mov A,[SleepTimer_bTimerValue] + (0489) RAM_EPILOGUE RAM_USE_CLASS_4 + (0490) ret + (0491) .ENDSECTION + (0492) + (0493) IF(SleepTimer_TICK_CNTR_SIZE & (4|2)) + (0494) .SECTION + (0495) ;----------------------------------------------------------------------------- + (0496) ; FUNCTION NAME: SleepTimer_iGetTickCntr + (0497) ; + (0498) ; DESCRIPTION: + (0499) ; Returns the least significant 16 bits. + (0500) ; + (0501) ;----------------------------------------------------------------------------- + (0502) ; + (0503) ; ARGUMENTS: + (0504) ; none + (0505) ; + (0506) ; RETURNS: + (0507) ; (int)TickCount in A and X + (0508) ; X <= MSB + (0509) ; A <= LSB + (0510) ; + (0511) ; SIDE EFFECTS; + (0512) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0513) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0514) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0515) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0516) ; REGISTERS WILL NOT BE MODIFIED. + (0517) ; + (0518) ; Page Pointer Registers Modified: + (0519) ; CUR_PP + (0520) ; + (0521) ; THEORY of OPERATION OR PROCEDURE: + (0522) ; + (0523) SleepTimer_iGetTickCntr: + (0524) _SleepTimer_iGetTickCntr: + (0525) RAM_PROLOGUE RAM_USE_CLASS_4 + (0526) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0527) ; Disable interrupt here + (0528) M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0529) mov A,[SleepTimer_TickCount + ST_LSB_OFFSET] ; Place LSB in A + (0530) mov X,[SleepTimer_TickCount + ST_LSB_OFFSET - 1] ; Place MSB in X + (0531) M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0532) RAM_EPILOGUE RAM_USE_CLASS_4 + (0533) ret + (0534) .ENDSECTION + (0535) ENDIF + (0536) + (0537) IF(SleepTimer_TICK_CNTR_SIZE & 4) + (0538) .SECTION + (0539) ;----------------------------------------------------------------------------- + (0540) ; FUNCTION NAME: SleepTimer_lGetTickCntr + (0541) ; + (0542) ; DESCRIPTION: + (0543) ; Returns a pointer to TickCount + (0544) ; + (0545) ;----------------------------------------------------------------------------- + (0546) ; + (0547) ; ARGUMENTS: + (0548) ; [A:X] => Pointer to 32 bit tick counter (X=LSB, A=MSB) + (0549) ; + (0550) ; RETURNS: + (0551) ; Pointer to lTickCount + (0552) ; + (0553) ; SIDE EFFECTS; + (0554) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0555) ; IN THE LARGE MEMORY MODEL CURRENTLY ONLY THE PAGE POINTER + (0556) ; REGISTERS LISTED BELOW ARE MODIFIED. THIS DOES NOT GUARANTEE + (0557) ; THAT IN FUTURE IMPLEMENTATIONS OF THIS FUNCTION OTHER PAGE POINTER + (0558) ; REGISTERS WILL NOT BE MODIFIED. + (0559) ; + (0560) ; Page Pointer Registers Modified: + (0561) ; CUR_PP + (0562) ; + (0563) ; THEORY of OPERATION OR PROCEDURE: + (0564) ; + (0565) SleepTimer_lGetTickCntr: + (0566) _SleepTimer_lGetTickCntr: + (0567) RAM_PROLOGUE RAM_USE_CLASS_4 + (0568) RAM_PROLOGUE RAM_USE_CLASS_3 + (0569) ; Disable interrupt here + (0570) M8C_DisableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0571) RAM_SETPAGE_CUR >SleepTimer_TickCount + (0572) RAM_SETPAGE_IDX A + (0573) push A + (0574) mov A,[SleepTimer_TickCount + 0] + (0575) mov [X + 0],A + (0576) mov A,[SleepTimer_TickCount + 1] + (0577) mov [X + 1],A + (0578) mov A,[SleepTimer_TickCount + 2] + (0579) mov [X + 2],A + (0580) mov A,[SleepTimer_TickCount + 3] + (0581) mov [X + 3],A + (0582) pop A + (0583) + (0584) M8C_EnableIntMask SleepTimer_INT_REG, SleepTimer_INT_MASK + (0585) RAM_EPILOGUE RAM_USE_CLASS_4 + (0586) RAM_EPILOGUE RAM_USE_CLASS_3 + (0587) ret + (0588) .ENDSECTION + (0589) ENDIF + (0590) + (0591) + (0592) + (0593) + (0594) ; End of File SleepTimer.asm +FILE: lib\pwm8_voutint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_VoutINT.asm + (0004) ;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 Interrupt Service Routine + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "m8c.inc" + (0014) include "PWM8_Vout.inc" + (0015) include "memory.inc" + (0016) + (0017) + (0018) ;----------------------------------------------- + (0019) ; Global Symbols + (0020) ;----------------------------------------------- + (0021) export _PWM8_Vout_ISR + (0022) + (0023) + (0024) AREA InterruptRAM (RAM,REL,CON) + (0025) + (0026) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0027) ;--------------------------------------------------- + (0028) ; Insert your custom declarations below this banner + (0029) ;--------------------------------------------------- + (0030) + (0031) ;------------------------ + (0032) ; Includes + (0033) ;------------------------ + (0034) + (0035) + (0036) ;------------------------ + (0037) ; Constant Definitions + (0038) ;------------------------ + (0039) + (0040) + (0041) ;------------------------ + (0042) ; Variable Allocation + (0043) ;------------------------ + (0044) + (0045) + (0046) ;--------------------------------------------------- + (0047) ; Insert your custom declarations above this banner + (0048) ;--------------------------------------------------- + (0049) ;@PSoC_UserCode_END@ (Do not change this line.) + (0050) + (0051) + (0052) AREA UserModules (ROM, REL) + (0053) + (0054) ;----------------------------------------------------------------------------- + (0055) ; FUNCTION NAME: _PWM8_Vout_ISR + (0056) ; + (0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub. + (0058) ; + (0059) ;----------------------------------------------------------------------------- + (0060) ; + (0061) + (0062) _PWM8_Vout_ISR: + (0063) + (0064) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0065) ;--------------------------------------------------- + (0066) ; Insert your custom code below this banner + (0067) ;--------------------------------------------------- + (0068) ; NOTE: interrupt service routines must preserve + (0069) ; the values of the A and X CPU registers. + (0070) + (0071) ;--------------------------------------------------- + (0072) ; Insert your custom code above this banner + (0073) ;--------------------------------------------------- + (0074) ;@PSoC_UserCode_END@ (Do not change this line.) + (0075) +0466: 7E RETI (0076) reti + (0077) + (0078) + (0079) ; end of file PWM8_VoutINT.asm +FILE: lib\pwm8_vout.asm (0001) ;;***************************************************************************** +0467: 41 E1 FB AND REG[0xE1],0xFB (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_Vout.asm + (0004) ;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 User Module software implementation file + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "m8c.inc" + (0023) include "PWM8_Vout.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export PWM8_Vout_EnableInt + (0030) export _PWM8_Vout_EnableInt + (0031) export PWM8_Vout_DisableInt + (0032) export _PWM8_Vout_DisableInt + (0033) export PWM8_Vout_Start + (0034) export _PWM8_Vout_Start + (0035) export PWM8_Vout_Stop + (0036) export _PWM8_Vout_Stop + (0037) export PWM8_Vout_WritePeriod + (0038) export _PWM8_Vout_WritePeriod + (0039) export PWM8_Vout_WritePulseWidth + (0040) export _PWM8_Vout_WritePulseWidth + (0041) export PWM8_Vout_bReadPulseWidth + (0042) export _PWM8_Vout_bReadPulseWidth + (0043) export PWM8_Vout_bReadCounter + (0044) export _PWM8_Vout_bReadCounter + (0045) + (0046) ; The following functions are deprecated and subject to omission in future releases + (0047) ; + (0048) export bPWM8_Vout_ReadPulseWidth ; deprecated + (0049) export _bPWM8_Vout_ReadPulseWidth ; deprecated + (0050) export bPWM8_Vout_ReadCounter ; deprecated + (0051) export _bPWM8_Vout_ReadCounter ; deprecated + (0052) + (0053) + (0054) AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + (0055) + (0056) ;----------------------------------------------- + (0057) ; Constant Definitions + (0058) ;----------------------------------------------- + (0059) + (0060) INPUT_REG_NULL: equ 0x00 ; Clear the input register + (0061) + (0062) + (0063) ;----------------------------------------------- + (0064) ; Variable Allocation + (0065) ;----------------------------------------------- + (0066) + (0067) + (0068) AREA UserModules (ROM, REL) + (0069) + (0070) .SECTION + (0071) ;----------------------------------------------------------------------------- + (0072) ; FUNCTION NAME: PWM8_Vout_EnableInt + (0073) ; + (0074) ; DESCRIPTION: + (0075) ; Enables this PWM's interrupt by setting the interrupt enable mask bit + (0076) ; associated with this User Module. This function has no effect until and + (0077) ; unless the global interrupts are enabled (for example by using the + (0078) ; macro M8C_EnableGInt). + (0079) ;----------------------------------------------------------------------------- + (0080) ; + (0081) ; ARGUMENTS: None. + (0082) ; RETURNS: Nothing. + (0083) ; SIDE EFFECTS: + (0084) ; The A and X registers may be modified by this or future implementations + (0085) ; of this function. The same is true for all RAM page pointer registers in + (0086) ; the Large Memory Model. When necessary, it is the calling function's + (0087) ; responsibility to perserve their values across calls to fastcall16 + (0088) ; functions. + (0089) ; + (0090) PWM8_Vout_EnableInt: + (0091) _PWM8_Vout_EnableInt: + (0092) RAM_PROLOGUE RAM_USE_CLASS_1 + (0093) PWM8_Vout_EnableInt_M + (0094) RAM_EPILOGUE RAM_USE_CLASS_1 + (0095) ret + (0096) + (0097) + (0098) .ENDSECTION + (0099) + (0100) .SECTION + (0101) ;----------------------------------------------------------------------------- + (0102) ; FUNCTION NAME: PWM8_Vout_DisableInt + (0103) ; + (0104) ; DESCRIPTION: + (0105) ; Disables this PWM's interrupt by clearing the interrupt enable + (0106) ; mask bit associated with this User Module. + (0107) ;----------------------------------------------------------------------------- + (0108) ; + (0109) ; ARGUMENTS: None + (0110) ; RETURNS: Nothing + (0111) ; SIDE EFFECTS: + (0112) ; The A and X registers may be modified by this or future implementations + (0113) ; of this function. The same is true for all RAM page pointer registers in + (0114) ; the Large Memory Model. When necessary, it is the calling function's + (0115) ; responsibility to perserve their values across calls to fastcall16 + (0116) ; functions. + (0117) ; + (0118) PWM8_Vout_DisableInt: + (0119) _PWM8_Vout_DisableInt: + (0120) RAM_PROLOGUE RAM_USE_CLASS_1 + (0121) PWM8_Vout_DisableInt_M + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +046A: 7F RET (0123) ret +046B: 43 2B 01 OR REG[0x2B],0x1 + (0124) + (0125) + (0126) .ENDSECTION + (0127) + (0128) .SECTION + (0129) ;----------------------------------------------------------------------------- + (0130) ; FUNCTION NAME: PWM8_Vout_Start + (0131) ; + (0132) ; DESCRIPTION: + (0133) ; Sets the start bit in the Control register of this user module. The + (0134) ; PWM will begin counting on the next input clock as soon as the + (0135) ; enable input is asserted high. + (0136) ;----------------------------------------------------------------------------- + (0137) ; + (0138) ; ARGUMENTS: None + (0139) ; RETURNS: Nothing + (0140) ; SIDE EFFECTS: + (0141) ; The A and X registers may be modified by this or future implementations + (0142) ; of this function. The same is true for all RAM page pointer registers in + (0143) ; the Large Memory Model. When necessary, it is the calling function's + (0144) ; responsibility to perserve their values across calls to fastcall16 + (0145) ; functions. + (0146) ; + (0147) PWM8_Vout_Start: + (0148) _PWM8_Vout_Start: + (0149) RAM_PROLOGUE RAM_USE_CLASS_1 + (0150) PWM8_Vout_Start_M + (0151) RAM_EPILOGUE RAM_USE_CLASS_1 +046E: 7F RET (0152) ret + (0153) + (0154) + (0155) .ENDSECTION + (0156) + (0157) .SECTION + (0158) ;----------------------------------------------------------------------------- + (0159) ; FUNCTION NAME: PWM8_Vout_Stop + (0160) ; + (0161) ; DESCRIPTION: + (0162) ; Disables PWM operation by clearing the start bit in the Control + (0163) ; register. + (0164) ;----------------------------------------------------------------------------- + (0165) ; + (0166) ; ARGUMENTS: None + (0167) ; RETURNS: Nothing + (0168) ; SIDE EFFECTS: + (0169) ; The A and X registers may be modified by this or future implementations + (0170) ; of this function. The same is true for all RAM page pointer registers in + (0171) ; the Large Memory Model. When necessary, it is the calling function's + (0172) ; responsibility to perserve their values across calls to fastcall16 + (0173) ; functions. + (0174) ; + (0175) PWM8_Vout_Stop: + (0176) _PWM8_Vout_Stop: + (0177) RAM_PROLOGUE RAM_USE_CLASS_1 + (0178) PWM8_Vout_Stop_M + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) + (0183) .ENDSECTION + (0184) + (0185) .SECTION + (0186) ;----------------------------------------------------------------------------- + (0187) ; FUNCTION NAME: PWM8_Vout_WritePeriod + (0188) ; + (0189) ; DESCRIPTION: + (0190) ; Write the 8-bit period value into the Period register (DR1). + (0191) ;----------------------------------------------------------------------------- + (0192) ; + (0193) ; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) + (0194) ; RETURNS: Nothing + (0195) ; SIDE EFFECTS: + (0196) ; If the PWM user module is stopped, then this value will also be + (0197) ; latched into the Count register (DR0). + (0198) ; + (0199) ; The A and X registers may be modified by this or future implementations + (0200) ; of this function. The same is true for all RAM page pointer registers in + (0201) ; the Large Memory Model. When necessary, it is the calling function's + (0202) ; responsibility to perserve their values across calls to fastcall16 + (0203) ; functions. + (0204) ; + (0205) PWM8_Vout_WritePeriod: + (0206) _PWM8_Vout_WritePeriod: + (0207) RAM_PROLOGUE RAM_USE_CLASS_1 + (0208) mov reg[PWM8_Vout_PERIOD_REG], A + (0209) RAM_EPILOGUE RAM_USE_CLASS_1 + (0210) ret + (0211) + (0212) + (0213) .ENDSECTION + (0214) + (0215) .SECTION + (0216) ;----------------------------------------------------------------------------- + (0217) ; FUNCTION NAME: PWM8_Vout_WritePulseWidth + (0218) ; + (0219) ; DESCRIPTION: + (0220) ; Writes compare value into the Compare register (DR2). + (0221) ;----------------------------------------------------------------------------- + (0222) ; + (0223) ; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) + (0224) ; RETURNS: Nothing + (0225) ; SIDE EFFECTS: + (0226) ; The A and X registers may be modified by this or future implementations + (0227) ; of this function. The same is true for all RAM page pointer registers in + (0228) ; the Large Memory Model. When necessary, it is the calling function's + (0229) ; responsibility to perserve their values across calls to fastcall16 + (0230) ; functions. + (0231) ; + (0232) PWM8_Vout_WritePulseWidth: + (0233) _PWM8_Vout_WritePulseWidth: + (0234) RAM_PROLOGUE RAM_USE_CLASS_1 +046F: 60 2A MOV REG[0x2A],A (0235) mov reg[PWM8_Vout_COMPARE_REG], A + (0236) RAM_EPILOGUE RAM_USE_CLASS_1 +0471: 7F RET (0237) ret + (0238) + (0239) + (0240) .ENDSECTION + (0241) + (0242) .SECTION + (0243) ;----------------------------------------------------------------------------- + (0244) ; FUNCTION NAME: PWM8_Vout_bReadPulseWidth + (0245) ; + (0246) ; DESCRIPTION: + (0247) ; Reads the Compare register. + (0248) ;----------------------------------------------------------------------------- + (0249) ; + (0250) ; ARGUMENTS: None + (0251) ; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) + (0252) ; SIDE EFFECTS: + (0253) ; The A and X registers may be modified by this or future implementations + (0254) ; of this function. The same is true for all RAM page pointer registers in + (0255) ; the Large Memory Model. When necessary, it is the calling function's + (0256) ; responsibility to perserve their values across calls to fastcall16 + (0257) ; functions. + (0258) ; + (0259) PWM8_Vout_bReadPulseWidth: + (0260) _PWM8_Vout_bReadPulseWidth: + (0261) bPWM8_Vout_ReadPulseWidth: ; this name deprecated + (0262) _bPWM8_Vout_ReadPulseWidth: ; this name deprecated + (0263) RAM_PROLOGUE RAM_USE_CLASS_1 + (0264) mov A, reg[PWM8_Vout_COMPARE_REG] + (0265) RAM_EPILOGUE RAM_USE_CLASS_1 + (0266) ret + (0267) + (0268) + (0269) .ENDSECTION + (0270) + (0271) .SECTION + (0272) ;----------------------------------------------------------------------------- + (0273) ; FUNCTION NAME: PWM8_Vout_bReadCounter + (0274) ; + (0275) ; DESCRIPTION: + (0276) ; Returns the value in the Count register (DR0), preserving the value in + (0277) ; the compare register (DR2). Interrupts are prevented during the transfer + (0278) ; from the Count to the Compare registers by holding the clock low in + (0279) ; the PSoC block. + (0280) ;----------------------------------------------------------------------------- + (0281) ; + (0282) ; ARGUMENTS: None + (0283) ; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) + (0284) ; SIDE EFFECTS: + (0285) ; 1) The user module is stopped momentarily and one or more counts may be missed. + (0286) ; 2) The A and X registers may be modified by this or future implementations + (0287) ; of this function. The same is true for all RAM page pointer registers in + (0288) ; the Large Memory Model. When necessary, it is the calling function's + (0289) ; responsibility to perserve their values across calls to fastcall16 + (0290) ; functions. + (0291) ; + (0292) PWM8_Vout_bReadCounter: + (0293) _PWM8_Vout_bReadCounter: + (0294) bPWM8_Vout_ReadCounter: ; this name deprecated + (0295) _bPWM8_Vout_ReadCounter: ; this name deprecated + (0296) + (0297) bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + (0298) bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + (0299) wCounter: EQU 2 ; Frame offset to temp Count store + (0300) STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + (0301) + (0302) RAM_PROLOGUE RAM_USE_CLASS_2 + (0303) mov X, SP ; X <- stack frame pointer + (0304) mov A, reg[PWM8_Vout_COMPARE_REG] ; Save the Compare register on the stack + (0305) push A ; + (0306) PWM8_Vout_Stop_M ; Disable (stop) the PWM + (0307) M8C_SetBank1 ; + (0308) mov A, reg[PWM8_Vout_INPUT_REG] ; save the clock input setting + (0309) push A ; on the stack (now 2 bytes) and ... + (0310) ; hold the clock low: + (0311) mov reg[PWM8_Vout_INPUT_REG], INPUT_REG_NULL + (0312) M8C_SetBank0 + (0313) ; Extract the Count via DR2 register + (0314) mov A, reg[PWM8_Vout_COUNTER_REG] ; DR2 <- DR0 + (0315) mov A, reg[PWM8_Vout_COMPARE_REG] ; Stash the Count on the stack + (0316) push A ; -stack frame is now 3 bytes + (0317) mov A, [X+bOrigCompareValue] ; Restore the Compare register + (0318) mov reg[PWM8_Vout_COMPARE_REG], A + (0319) M8C_SetBank1 ; Restore the PWM operation: + (0320) mov A, [X+bOrigClockSetting] ; First, the clock setting... + (0321) mov reg[PWM8_Vout_INPUT_REG], A ; + (0322) M8C_SetBank0 ; + (0323) PWM8_Vout_Start_M ; then re-enable the PWM. + (0324) pop A ; Setup the return value + (0325) ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + (0326) RAM_EPILOGUE RAM_USE_CLASS_2 + (0327) ret + (0328) + (0329) .ENDSECTION + (0330) + (0331) ; End of File PWM8_Vout.asm +FILE: lib\pwm8_nb_outint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_NB_OutINT.asm + (0004) ;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 Interrupt Service Routine + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "m8c.inc" + (0014) include "PWM8_NB_Out.inc" + (0015) include "memory.inc" + (0016) + (0017) + (0018) ;----------------------------------------------- + (0019) ; Global Symbols + (0020) ;----------------------------------------------- + (0021) export _PWM8_NB_Out_ISR + (0022) + (0023) + (0024) AREA InterruptRAM (RAM,REL,CON) + (0025) + (0026) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0027) ;--------------------------------------------------- + (0028) ; Insert your custom declarations below this banner + (0029) ;--------------------------------------------------- + (0030) + (0031) ;------------------------ + (0032) ; Includes + (0033) ;------------------------ + (0034) + (0035) + (0036) ;------------------------ + (0037) ; Constant Definitions + (0038) ;------------------------ + (0039) + (0040) + (0041) ;------------------------ + (0042) ; Variable Allocation + (0043) ;------------------------ + (0044) + (0045) + (0046) ;--------------------------------------------------- + (0047) ; Insert your custom declarations above this banner + (0048) ;--------------------------------------------------- + (0049) ;@PSoC_UserCode_END@ (Do not change this line.) + (0050) + (0051) + (0052) AREA UserModules (ROM, REL) + (0053) + (0054) ;----------------------------------------------------------------------------- + (0055) ; FUNCTION NAME: _PWM8_NB_Out_ISR + (0056) ; + (0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub. + (0058) ; + (0059) ;----------------------------------------------------------------------------- + (0060) ; + (0061) + (0062) _PWM8_NB_Out_ISR: + (0063) + (0064) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0065) ;--------------------------------------------------- + (0066) ; Insert your custom assembly code below this banner + (0067) ;--------------------------------------------------- + (0068) ; NOTE: interrupt service routines must preserve + (0069) ; the values of the A and X CPU registers. + (0070) + (0071) ;--------------------------------------------------- + (0072) ; Insert your custom assembly code above this banner + (0073) ;--------------------------------------------------- + (0074) + (0075) ;--------------------------------------------------- + (0076) ; Insert a lcall to a C function below this banner + (0077) ; and un-comment the lines between these banners + (0078) ;--------------------------------------------------- + (0079) + (0080) ;PRESERVE_CPU_CONTEXT + (0081) ;lcall _My_C_Function + (0082) ;RESTORE_CPU_CONTEXT + (0083) + (0084) ;--------------------------------------------------- + (0085) ; Insert a lcall to a C function above this banner + (0086) ; and un-comment the lines between these banners + (0087) ;--------------------------------------------------- + (0088) ;@PSoC_UserCode_END@ (Do not change this line.) + (0089) +0472: 7E RETI (0090) reti + (0091) + (0092) + (0093) ; end of file PWM8_NB_OutINT.asm +FILE: lib\pwm8_nb_out.asm (0001) ;;***************************************************************************** +0473: 41 E1 F7 AND REG[0xE1],0xF7 (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_NB_Out.asm + (0004) ;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 User Module software implementation file + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "m8c.inc" + (0023) include "PWM8_NB_Out.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export PWM8_NB_Out_EnableInt + (0030) export _PWM8_NB_Out_EnableInt + (0031) export PWM8_NB_Out_DisableInt + (0032) export _PWM8_NB_Out_DisableInt + (0033) export PWM8_NB_Out_Start + (0034) export _PWM8_NB_Out_Start + (0035) export PWM8_NB_Out_Stop + (0036) export _PWM8_NB_Out_Stop + (0037) export PWM8_NB_Out_WritePeriod + (0038) export _PWM8_NB_Out_WritePeriod + (0039) export PWM8_NB_Out_WritePulseWidth + (0040) export _PWM8_NB_Out_WritePulseWidth + (0041) export PWM8_NB_Out_bReadPulseWidth + (0042) export _PWM8_NB_Out_bReadPulseWidth + (0043) export PWM8_NB_Out_bReadCounter + (0044) export _PWM8_NB_Out_bReadCounter + (0045) + (0046) ; The following functions are deprecated and subject to omission in future releases + (0047) ; + (0048) export bPWM8_NB_Out_ReadPulseWidth ; deprecated + (0049) export _bPWM8_NB_Out_ReadPulseWidth ; deprecated + (0050) export bPWM8_NB_Out_ReadCounter ; deprecated + (0051) export _bPWM8_NB_Out_ReadCounter ; deprecated + (0052) + (0053) + (0054) AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + (0055) + (0056) ;----------------------------------------------- + (0057) ; Constant Definitions + (0058) ;----------------------------------------------- + (0059) + (0060) INPUT_REG_NULL: equ 0x00 ; Clear the input register + (0061) + (0062) + (0063) ;----------------------------------------------- + (0064) ; Variable Allocation + (0065) ;----------------------------------------------- + (0066) + (0067) + (0068) AREA UserModules (ROM, REL) + (0069) + (0070) .SECTION + (0071) ;----------------------------------------------------------------------------- + (0072) ; FUNCTION NAME: PWM8_NB_Out_EnableInt + (0073) ; + (0074) ; DESCRIPTION: + (0075) ; Enables this PWM's interrupt by setting the interrupt enable mask bit + (0076) ; associated with this User Module. This function has no effect until and + (0077) ; unless the global interrupts are enabled (for example by using the + (0078) ; macro M8C_EnableGInt). + (0079) ;----------------------------------------------------------------------------- + (0080) ; + (0081) ; ARGUMENTS: None. + (0082) ; RETURNS: Nothing. + (0083) ; SIDE EFFECTS: + (0084) ; The A and X registers may be modified by this or future implementations + (0085) ; of this function. The same is true for all RAM page pointer registers in + (0086) ; the Large Memory Model. When necessary, it is the calling function's + (0087) ; responsibility to perserve their values across calls to fastcall16 + (0088) ; functions. + (0089) ; + (0090) PWM8_NB_Out_EnableInt: + (0091) _PWM8_NB_Out_EnableInt: + (0092) RAM_PROLOGUE RAM_USE_CLASS_1 + (0093) PWM8_NB_Out_EnableInt_M + (0094) RAM_EPILOGUE RAM_USE_CLASS_1 + (0095) ret + (0096) + (0097) + (0098) .ENDSECTION + (0099) + (0100) .SECTION + (0101) ;----------------------------------------------------------------------------- + (0102) ; FUNCTION NAME: PWM8_NB_Out_DisableInt + (0103) ; + (0104) ; DESCRIPTION: + (0105) ; Disables this PWM's interrupt by clearing the interrupt enable + (0106) ; mask bit associated with this User Module. + (0107) ;----------------------------------------------------------------------------- + (0108) ; + (0109) ; ARGUMENTS: None + (0110) ; RETURNS: Nothing + (0111) ; SIDE EFFECTS: + (0112) ; The A and X registers may be modified by this or future implementations + (0113) ; of this function. The same is true for all RAM page pointer registers in + (0114) ; the Large Memory Model. When necessary, it is the calling function's + (0115) ; responsibility to perserve their values across calls to fastcall16 + (0116) ; functions. + (0117) ; + (0118) PWM8_NB_Out_DisableInt: + (0119) _PWM8_NB_Out_DisableInt: + (0120) RAM_PROLOGUE RAM_USE_CLASS_1 + (0121) PWM8_NB_Out_DisableInt_M + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +0476: 7F RET (0123) ret +0477: 43 2F 01 OR REG[0x2F],0x1 + (0124) + (0125) + (0126) .ENDSECTION + (0127) + (0128) .SECTION + (0129) ;----------------------------------------------------------------------------- + (0130) ; FUNCTION NAME: PWM8_NB_Out_Start + (0131) ; + (0132) ; DESCRIPTION: + (0133) ; Sets the start bit in the Control register of this user module. The + (0134) ; PWM will begin counting on the next input clock as soon as the + (0135) ; enable input is asserted high. + (0136) ;----------------------------------------------------------------------------- + (0137) ; + (0138) ; ARGUMENTS: None + (0139) ; RETURNS: Nothing + (0140) ; SIDE EFFECTS: + (0141) ; The A and X registers may be modified by this or future implementations + (0142) ; of this function. The same is true for all RAM page pointer registers in + (0143) ; the Large Memory Model. When necessary, it is the calling function's + (0144) ; responsibility to perserve their values across calls to fastcall16 + (0145) ; functions. + (0146) ; + (0147) PWM8_NB_Out_Start: + (0148) _PWM8_NB_Out_Start: + (0149) RAM_PROLOGUE RAM_USE_CLASS_1 + (0150) PWM8_NB_Out_Start_M + (0151) RAM_EPILOGUE RAM_USE_CLASS_1 +047A: 7F RET (0152) ret + (0153) + (0154) + (0155) .ENDSECTION + (0156) + (0157) .SECTION + (0158) ;----------------------------------------------------------------------------- + (0159) ; FUNCTION NAME: PWM8_NB_Out_Stop + (0160) ; + (0161) ; DESCRIPTION: + (0162) ; Disables PWM operation by clearing the start bit in the Control + (0163) ; register. + (0164) ;----------------------------------------------------------------------------- + (0165) ; + (0166) ; ARGUMENTS: None + (0167) ; RETURNS: Nothing + (0168) ; SIDE EFFECTS: + (0169) ; The A and X registers may be modified by this or future implementations + (0170) ; of this function. The same is true for all RAM page pointer registers in + (0171) ; the Large Memory Model. When necessary, it is the calling function's + (0172) ; responsibility to perserve their values across calls to fastcall16 + (0173) ; functions. + (0174) ; + (0175) PWM8_NB_Out_Stop: + (0176) _PWM8_NB_Out_Stop: + (0177) RAM_PROLOGUE RAM_USE_CLASS_1 + (0178) PWM8_NB_Out_Stop_M + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) + (0183) .ENDSECTION + (0184) + (0185) .SECTION + (0186) ;----------------------------------------------------------------------------- + (0187) ; FUNCTION NAME: PWM8_NB_Out_WritePeriod + (0188) ; + (0189) ; DESCRIPTION: + (0190) ; Write the 8-bit period value into the Period register (DR1). + (0191) ;----------------------------------------------------------------------------- + (0192) ; + (0193) ; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) + (0194) ; RETURNS: Nothing + (0195) ; SIDE EFFECTS: + (0196) ; If the PWM user module is stopped, then this value will also be + (0197) ; latched into the Count register (DR0). + (0198) ; + (0199) ; The A and X registers may be modified by this or future implementations + (0200) ; of this function. The same is true for all RAM page pointer registers in + (0201) ; the Large Memory Model. When necessary, it is the calling function's + (0202) ; responsibility to perserve their values across calls to fastcall16 + (0203) ; functions. + (0204) ; + (0205) PWM8_NB_Out_WritePeriod: + (0206) _PWM8_NB_Out_WritePeriod: + (0207) RAM_PROLOGUE RAM_USE_CLASS_1 + (0208) mov reg[PWM8_NB_Out_PERIOD_REG], A + (0209) RAM_EPILOGUE RAM_USE_CLASS_1 + (0210) ret + (0211) + (0212) + (0213) .ENDSECTION + (0214) + (0215) .SECTION + (0216) ;----------------------------------------------------------------------------- + (0217) ; FUNCTION NAME: PWM8_NB_Out_WritePulseWidth + (0218) ; + (0219) ; DESCRIPTION: + (0220) ; Writes compare value into the Compare register (DR2). + (0221) ;----------------------------------------------------------------------------- + (0222) ; + (0223) ; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) + (0224) ; RETURNS: Nothing + (0225) ; SIDE EFFECTS: + (0226) ; The A and X registers may be modified by this or future implementations + (0227) ; of this function. The same is true for all RAM page pointer registers in + (0228) ; the Large Memory Model. When necessary, it is the calling function's + (0229) ; responsibility to perserve their values across calls to fastcall16 + (0230) ; functions. + (0231) ; + (0232) PWM8_NB_Out_WritePulseWidth: + (0233) _PWM8_NB_Out_WritePulseWidth: + (0234) RAM_PROLOGUE RAM_USE_CLASS_1 +047B: 60 2E MOV REG[0x2E],A (0235) mov reg[PWM8_NB_Out_COMPARE_REG], A + (0236) RAM_EPILOGUE RAM_USE_CLASS_1 +047D: 7F RET (0237) ret + (0238) + (0239) + (0240) .ENDSECTION + (0241) + (0242) .SECTION + (0243) ;----------------------------------------------------------------------------- + (0244) ; FUNCTION NAME: PWM8_NB_Out_bReadPulseWidth + (0245) ; + (0246) ; DESCRIPTION: + (0247) ; Reads the Compare register. + (0248) ;----------------------------------------------------------------------------- + (0249) ; + (0250) ; ARGUMENTS: None + (0251) ; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) + (0252) ; SIDE EFFECTS: + (0253) ; The A and X registers may be modified by this or future implementations + (0254) ; of this function. The same is true for all RAM page pointer registers in + (0255) ; the Large Memory Model. When necessary, it is the calling function's + (0256) ; responsibility to perserve their values across calls to fastcall16 + (0257) ; functions. + (0258) ; + (0259) PWM8_NB_Out_bReadPulseWidth: + (0260) _PWM8_NB_Out_bReadPulseWidth: + (0261) bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + (0262) _bPWM8_NB_Out_ReadPulseWidth: ; this name deprecated + (0263) RAM_PROLOGUE RAM_USE_CLASS_1 + (0264) mov A, reg[PWM8_NB_Out_COMPARE_REG] + (0265) RAM_EPILOGUE RAM_USE_CLASS_1 + (0266) ret + (0267) + (0268) + (0269) .ENDSECTION + (0270) + (0271) .SECTION + (0272) ;----------------------------------------------------------------------------- + (0273) ; FUNCTION NAME: PWM8_NB_Out_bReadCounter + (0274) ; + (0275) ; DESCRIPTION: + (0276) ; Returns the value in the Count register (DR0), preserving the value in + (0277) ; the compare register (DR2). Interrupts are prevented during the transfer + (0278) ; from the Count to the Compare registers by holding the clock low in + (0279) ; the PSoC block. + (0280) ;----------------------------------------------------------------------------- + (0281) ; + (0282) ; ARGUMENTS: None + (0283) ; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) + (0284) ; SIDE EFFECTS: + (0285) ; 1) The user module is stopped momentarily and one or more counts may be missed. + (0286) ; 2) The A and X registers may be modified by this or future implementations + (0287) ; of this function. The same is true for all RAM page pointer registers in + (0288) ; the Large Memory Model. When necessary, it is the calling function's + (0289) ; responsibility to perserve their values across calls to fastcall16 + (0290) ; functions. + (0291) ; + (0292) PWM8_NB_Out_bReadCounter: + (0293) _PWM8_NB_Out_bReadCounter: + (0294) bPWM8_NB_Out_ReadCounter: ; this name deprecated + (0295) _bPWM8_NB_Out_ReadCounter: ; this name deprecated + (0296) + (0297) bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + (0298) bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + (0299) wCounter: EQU 2 ; Frame offset to temp Count store + (0300) STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + (0301) + (0302) RAM_PROLOGUE RAM_USE_CLASS_2 + (0303) mov X, SP ; X <- stack frame pointer + (0304) mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Save the Compare register on the stack + (0305) push A ; + (0306) PWM8_NB_Out_Stop_M ; Disable (stop) the PWM + (0307) M8C_SetBank1 ; + (0308) mov A, reg[PWM8_NB_Out_INPUT_REG] ; save the clock input setting + (0309) push A ; on the stack (now 2 bytes) and ... + (0310) ; hold the clock low: + (0311) mov reg[PWM8_NB_Out_INPUT_REG], INPUT_REG_NULL + (0312) M8C_SetBank0 + (0313) ; Extract the Count via DR2 register + (0314) mov A, reg[PWM8_NB_Out_COUNTER_REG] ; DR2 <- DR0 + (0315) mov A, reg[PWM8_NB_Out_COMPARE_REG] ; Stash the Count on the stack + (0316) push A ; -stack frame is now 3 bytes + (0317) mov A, [X+bOrigCompareValue] ; Restore the Compare register + (0318) mov reg[PWM8_NB_Out_COMPARE_REG], A + (0319) M8C_SetBank1 ; Restore the PWM operation: + (0320) mov A, [X+bOrigClockSetting] ; First, the clock setting... + (0321) mov reg[PWM8_NB_Out_INPUT_REG], A ; + (0322) M8C_SetBank0 ; + (0323) PWM8_NB_Out_Start_M ; then re-enable the PWM. + (0324) pop A ; Setup the return value + (0325) ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + (0326) RAM_EPILOGUE RAM_USE_CLASS_2 + (0327) ret + (0328) + (0329) .ENDSECTION + (0330) + (0331) ; End of File PWM8_NB_Out.asm +FILE: lib\pwm8_heaterint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_HeaterINT.asm + (0004) ;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 Interrupt Service Routine + (0008) ;;----------------------------------------------------------------------------- + (0009) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0010) ;;***************************************************************************** + (0011) ;;***************************************************************************** + (0012) + (0013) include "m8c.inc" + (0014) include "PWM8_Heater.inc" + (0015) include "memory.inc" + (0016) + (0017) + (0018) ;----------------------------------------------- + (0019) ; Global Symbols + (0020) ;----------------------------------------------- + (0021) export _PWM8_Heater_ISR + (0022) + (0023) + (0024) AREA InterruptRAM (RAM,REL,CON) + (0025) + (0026) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0027) ;--------------------------------------------------- + (0028) ; Insert your custom declarations below this banner + (0029) ;--------------------------------------------------- + (0030) + (0031) ;------------------------ + (0032) ; Includes + (0033) ;------------------------ + (0034) + (0035) + (0036) ;------------------------ + (0037) ; Constant Definitions + (0038) ;------------------------ + (0039) + (0040) + (0041) ;------------------------ + (0042) ; Variable Allocation + (0043) ;------------------------ + (0044) + (0045) + (0046) ;--------------------------------------------------- + (0047) ; Insert your custom declarations above this banner + (0048) ;--------------------------------------------------- + (0049) ;@PSoC_UserCode_END@ (Do not change this line.) + (0050) + (0051) + (0052) AREA UserModules (ROM, REL) + (0053) + (0054) ;----------------------------------------------------------------------------- + (0055) ; FUNCTION NAME: _PWM8_Heater_ISR + (0056) ; + (0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub. + (0058) ; + (0059) ;----------------------------------------------------------------------------- + (0060) ; + (0061) + (0062) _PWM8_Heater_ISR: + (0063) + (0064) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0065) ;--------------------------------------------------- + (0066) ; Insert your custom code below this banner + (0067) ;--------------------------------------------------- + (0068) ; NOTE: interrupt service routines must preserve + (0069) ; the values of the A and X CPU registers. + (0070) + (0071) ;--------------------------------------------------- + (0072) ; Insert your custom code above this banner + (0073) ;--------------------------------------------------- + (0074) ;@PSoC_UserCode_END@ (Do not change this line.) + (0075) +047E: 7E RETI (0076) reti + (0077) + (0078) + (0079) ; end of file PWM8_HeaterINT.asm +FILE: lib\pwm8_heater.asm (0001) ;;***************************************************************************** +047F: 41 E1 FD AND REG[0xE1],0xFD (0002) ;;***************************************************************************** + (0003) ;; FILENAME: PWM8_Heater.asm + (0004) ;; Version: 2.60, Updated on 2015/3/4 at 22:26:52 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: PWM8 User Module software implementation file + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "m8c.inc" + (0023) include "PWM8_Heater.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export PWM8_Heater_EnableInt + (0030) export _PWM8_Heater_EnableInt + (0031) export PWM8_Heater_DisableInt + (0032) export _PWM8_Heater_DisableInt + (0033) export PWM8_Heater_Start + (0034) export _PWM8_Heater_Start + (0035) export PWM8_Heater_Stop + (0036) export _PWM8_Heater_Stop + (0037) export PWM8_Heater_WritePeriod + (0038) export _PWM8_Heater_WritePeriod + (0039) export PWM8_Heater_WritePulseWidth + (0040) export _PWM8_Heater_WritePulseWidth + (0041) export PWM8_Heater_bReadPulseWidth + (0042) export _PWM8_Heater_bReadPulseWidth + (0043) export PWM8_Heater_bReadCounter + (0044) export _PWM8_Heater_bReadCounter + (0045) + (0046) ; The following functions are deprecated and subject to omission in future releases + (0047) ; + (0048) export bPWM8_Heater_ReadPulseWidth ; deprecated + (0049) export _bPWM8_Heater_ReadPulseWidth ; deprecated + (0050) export bPWM8_Heater_ReadCounter ; deprecated + (0051) export _bPWM8_Heater_ReadCounter ; deprecated + (0052) + (0053) + (0054) AREA slc_free_28_pin_feb_16_2013_RAM (RAM,REL) + (0055) + (0056) ;----------------------------------------------- + (0057) ; Constant Definitions + (0058) ;----------------------------------------------- + (0059) + (0060) INPUT_REG_NULL: equ 0x00 ; Clear the input register + (0061) + (0062) + (0063) ;----------------------------------------------- + (0064) ; Variable Allocation + (0065) ;----------------------------------------------- + (0066) + (0067) + (0068) AREA UserModules (ROM, REL) + (0069) + (0070) .SECTION + (0071) ;----------------------------------------------------------------------------- + (0072) ; FUNCTION NAME: PWM8_Heater_EnableInt + (0073) ; + (0074) ; DESCRIPTION: + (0075) ; Enables this PWM's interrupt by setting the interrupt enable mask bit + (0076) ; associated with this User Module. This function has no effect until and + (0077) ; unless the global interrupts are enabled (for example by using the + (0078) ; macro M8C_EnableGInt). + (0079) ;----------------------------------------------------------------------------- + (0080) ; + (0081) ; ARGUMENTS: None. + (0082) ; RETURNS: Nothing. + (0083) ; SIDE EFFECTS: + (0084) ; The A and X registers may be modified by this or future implementations + (0085) ; of this function. The same is true for all RAM page pointer registers in + (0086) ; the Large Memory Model. When necessary, it is the calling function's + (0087) ; responsibility to perserve their values across calls to fastcall16 + (0088) ; functions. + (0089) ; + (0090) PWM8_Heater_EnableInt: + (0091) _PWM8_Heater_EnableInt: + (0092) RAM_PROLOGUE RAM_USE_CLASS_1 + (0093) PWM8_Heater_EnableInt_M + (0094) RAM_EPILOGUE RAM_USE_CLASS_1 + (0095) ret + (0096) + (0097) + (0098) .ENDSECTION + (0099) + (0100) .SECTION + (0101) ;----------------------------------------------------------------------------- + (0102) ; FUNCTION NAME: PWM8_Heater_DisableInt + (0103) ; + (0104) ; DESCRIPTION: + (0105) ; Disables this PWM's interrupt by clearing the interrupt enable + (0106) ; mask bit associated with this User Module. + (0107) ;----------------------------------------------------------------------------- + (0108) ; + (0109) ; ARGUMENTS: None + (0110) ; RETURNS: Nothing + (0111) ; SIDE EFFECTS: + (0112) ; The A and X registers may be modified by this or future implementations + (0113) ; of this function. The same is true for all RAM page pointer registers in + (0114) ; the Large Memory Model. When necessary, it is the calling function's + (0115) ; responsibility to perserve their values across calls to fastcall16 + (0116) ; functions. + (0117) ; + (0118) PWM8_Heater_DisableInt: + (0119) _PWM8_Heater_DisableInt: + (0120) RAM_PROLOGUE RAM_USE_CLASS_1 + (0121) PWM8_Heater_DisableInt_M + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +0482: 7F RET (0123) ret +0483: 43 27 01 OR REG[0x27],0x1 + (0124) + (0125) + (0126) .ENDSECTION + (0127) + (0128) .SECTION + (0129) ;----------------------------------------------------------------------------- + (0130) ; FUNCTION NAME: PWM8_Heater_Start + (0131) ; + (0132) ; DESCRIPTION: + (0133) ; Sets the start bit in the Control register of this user module. The + (0134) ; PWM will begin counting on the next input clock as soon as the + (0135) ; enable input is asserted high. + (0136) ;----------------------------------------------------------------------------- + (0137) ; + (0138) ; ARGUMENTS: None + (0139) ; RETURNS: Nothing + (0140) ; SIDE EFFECTS: + (0141) ; The A and X registers may be modified by this or future implementations + (0142) ; of this function. The same is true for all RAM page pointer registers in + (0143) ; the Large Memory Model. When necessary, it is the calling function's + (0144) ; responsibility to perserve their values across calls to fastcall16 + (0145) ; functions. + (0146) ; + (0147) PWM8_Heater_Start: + (0148) _PWM8_Heater_Start: + (0149) RAM_PROLOGUE RAM_USE_CLASS_1 + (0150) PWM8_Heater_Start_M + (0151) RAM_EPILOGUE RAM_USE_CLASS_1 +0486: 7F RET (0152) ret + (0153) + (0154) + (0155) .ENDSECTION + (0156) + (0157) .SECTION + (0158) ;----------------------------------------------------------------------------- + (0159) ; FUNCTION NAME: PWM8_Heater_Stop + (0160) ; + (0161) ; DESCRIPTION: + (0162) ; Disables PWM operation by clearing the start bit in the Control + (0163) ; register. + (0164) ;----------------------------------------------------------------------------- + (0165) ; + (0166) ; ARGUMENTS: None + (0167) ; RETURNS: Nothing + (0168) ; SIDE EFFECTS: + (0169) ; The A and X registers may be modified by this or future implementations + (0170) ; of this function. The same is true for all RAM page pointer registers in + (0171) ; the Large Memory Model. When necessary, it is the calling function's + (0172) ; responsibility to perserve their values across calls to fastcall16 + (0173) ; functions. + (0174) ; + (0175) PWM8_Heater_Stop: + (0176) _PWM8_Heater_Stop: + (0177) RAM_PROLOGUE RAM_USE_CLASS_1 + (0178) PWM8_Heater_Stop_M + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) + (0183) .ENDSECTION + (0184) + (0185) .SECTION + (0186) ;----------------------------------------------------------------------------- + (0187) ; FUNCTION NAME: PWM8_Heater_WritePeriod + (0188) ; + (0189) ; DESCRIPTION: + (0190) ; Write the 8-bit period value into the Period register (DR1). + (0191) ;----------------------------------------------------------------------------- + (0192) ; + (0193) ; ARGUMENTS: fastcall16 BYTE bPeriodValue (passed in A) + (0194) ; RETURNS: Nothing + (0195) ; SIDE EFFECTS: + (0196) ; If the PWM user module is stopped, then this value will also be + (0197) ; latched into the Count register (DR0). + (0198) ; + (0199) ; The A and X registers may be modified by this or future implementations + (0200) ; of this function. The same is true for all RAM page pointer registers in + (0201) ; the Large Memory Model. When necessary, it is the calling function's + (0202) ; responsibility to perserve their values across calls to fastcall16 + (0203) ; functions. + (0204) ; + (0205) PWM8_Heater_WritePeriod: + (0206) _PWM8_Heater_WritePeriod: + (0207) RAM_PROLOGUE RAM_USE_CLASS_1 + (0208) mov reg[PWM8_Heater_PERIOD_REG], A + (0209) RAM_EPILOGUE RAM_USE_CLASS_1 + (0210) ret + (0211) + (0212) + (0213) .ENDSECTION + (0214) + (0215) .SECTION + (0216) ;----------------------------------------------------------------------------- + (0217) ; FUNCTION NAME: PWM8_Heater_WritePulseWidth + (0218) ; + (0219) ; DESCRIPTION: + (0220) ; Writes compare value into the Compare register (DR2). + (0221) ;----------------------------------------------------------------------------- + (0222) ; + (0223) ; ARGUMENTS: fastcall16 BYTE bCompareValue (passed in A) + (0224) ; RETURNS: Nothing + (0225) ; SIDE EFFECTS: + (0226) ; The A and X registers may be modified by this or future implementations + (0227) ; of this function. The same is true for all RAM page pointer registers in + (0228) ; the Large Memory Model. When necessary, it is the calling function's + (0229) ; responsibility to perserve their values across calls to fastcall16 + (0230) ; functions. + (0231) ; + (0232) PWM8_Heater_WritePulseWidth: + (0233) _PWM8_Heater_WritePulseWidth: + (0234) RAM_PROLOGUE RAM_USE_CLASS_1 +0487: 60 26 MOV REG[0x26],A (0235) mov reg[PWM8_Heater_COMPARE_REG], A + (0236) RAM_EPILOGUE RAM_USE_CLASS_1 +0489: 7F RET (0237) ret + (0238) + (0239) + (0240) .ENDSECTION + (0241) + (0242) .SECTION + (0243) ;----------------------------------------------------------------------------- + (0244) ; FUNCTION NAME: PWM8_Heater_bReadPulseWidth + (0245) ; + (0246) ; DESCRIPTION: + (0247) ; Reads the Compare register. + (0248) ;----------------------------------------------------------------------------- + (0249) ; + (0250) ; ARGUMENTS: None + (0251) ; RETURNS: fastcall16 BYTE bCompareValue (value of DR2 in the A register) + (0252) ; SIDE EFFECTS: + (0253) ; The A and X registers may be modified by this or future implementations + (0254) ; of this function. The same is true for all RAM page pointer registers in + (0255) ; the Large Memory Model. When necessary, it is the calling function's + (0256) ; responsibility to perserve their values across calls to fastcall16 + (0257) ; functions. + (0258) ; + (0259) PWM8_Heater_bReadPulseWidth: + (0260) _PWM8_Heater_bReadPulseWidth: + (0261) bPWM8_Heater_ReadPulseWidth: ; this name deprecated + (0262) _bPWM8_Heater_ReadPulseWidth: ; this name deprecated + (0263) RAM_PROLOGUE RAM_USE_CLASS_1 + (0264) mov A, reg[PWM8_Heater_COMPARE_REG] + (0265) RAM_EPILOGUE RAM_USE_CLASS_1 + (0266) ret + (0267) + (0268) + (0269) .ENDSECTION + (0270) + (0271) .SECTION + (0272) ;----------------------------------------------------------------------------- + (0273) ; FUNCTION NAME: PWM8_Heater_bReadCounter + (0274) ; + (0275) ; DESCRIPTION: + (0276) ; Returns the value in the Count register (DR0), preserving the value in + (0277) ; the compare register (DR2). Interrupts are prevented during the transfer + (0278) ; from the Count to the Compare registers by holding the clock low in + (0279) ; the PSoC block. + (0280) ;----------------------------------------------------------------------------- + (0281) ; + (0282) ; ARGUMENTS: None + (0283) ; RETURNS: fastcall16 BYTE bCount (value of DR0 in the A register) + (0284) ; SIDE EFFECTS: + (0285) ; 1) The user module is stopped momentarily and one or more counts may be missed. + (0286) ; 2) The A and X registers may be modified by this or future implementations + (0287) ; of this function. The same is true for all RAM page pointer registers in + (0288) ; the Large Memory Model. When necessary, it is the calling function's + (0289) ; responsibility to perserve their values across calls to fastcall16 + (0290) ; functions. + (0291) ; + (0292) PWM8_Heater_bReadCounter: + (0293) _PWM8_Heater_bReadCounter: + (0294) bPWM8_Heater_ReadCounter: ; this name deprecated + (0295) _bPWM8_Heater_ReadCounter: ; this name deprecated + (0296) + (0297) bOrigCompareValue: EQU 0 ; Frame offset to temp Compare store + (0298) bOrigClockSetting: EQU 1 ; Frame offset to temp Input store + (0299) wCounter: EQU 2 ; Frame offset to temp Count store + (0300) STACK_FRAME_SIZE: EQU 3 ; max stack frame size is 3 bytes + (0301) + (0302) RAM_PROLOGUE RAM_USE_CLASS_2 + (0303) mov X, SP ; X <- stack frame pointer + (0304) mov A, reg[PWM8_Heater_COMPARE_REG] ; Save the Compare register on the stack + (0305) push A ; + (0306) PWM8_Heater_Stop_M ; Disable (stop) the PWM + (0307) M8C_SetBank1 ; + (0308) mov A, reg[PWM8_Heater_INPUT_REG] ; save the clock input setting + (0309) push A ; on the stack (now 2 bytes) and ... + (0310) ; hold the clock low: + (0311) mov reg[PWM8_Heater_INPUT_REG], INPUT_REG_NULL + (0312) M8C_SetBank0 + (0313) ; Extract the Count via DR2 register + (0314) mov A, reg[PWM8_Heater_COUNTER_REG] ; DR2 <- DR0 + (0315) mov A, reg[PWM8_Heater_COMPARE_REG] ; Stash the Count on the stack + (0316) push A ; -stack frame is now 3 bytes + (0317) mov A, [X+bOrigCompareValue] ; Restore the Compare register + (0318) mov reg[PWM8_Heater_COMPARE_REG], A + (0319) M8C_SetBank1 ; Restore the PWM operation: + (0320) mov A, [X+bOrigClockSetting] ; First, the clock setting... + (0321) mov reg[PWM8_Heater_INPUT_REG], A ; + (0322) M8C_SetBank0 ; + (0323) PWM8_Heater_Start_M ; then re-enable the PWM. + (0324) pop A ; Setup the return value + (0325) ADD SP, -(STACK_FRAME_SIZE-1) ; Zap remainder of stack frame + (0326) RAM_EPILOGUE RAM_USE_CLASS_2 + (0327) ret + (0328) + (0329) .ENDSECTION + (0330) + (0331) ; End of File PWM8_Heater.asm +FILE: lib\lcd.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: LCD.asm + (0004) ;; Version: 1.60, Updated on 2015/3/4 at 22:26:36 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: LCD User Module software implementation file. + (0008) ;; + (0009) ;; This set of functions is written for the common 2 and 4 line + (0010) ;; LCDs that use the Hitachi HD44780A controller. + (0011) ;; + (0012) ;; LCD connections to PSoC port + (0013) ;; + (0014) ;; PX.0 ==> LCD D4 + (0015) ;; PX.1 ==> LCD D5 + (0016) ;; PX.2 ==> LCD D6 + (0017) ;; PX.3 ==> LCD D7 + (0018) ;; PX.4 ==> LCD E + (0019) ;; PX.5 ==> LCD RS + (0020) ;; PX.6 ==> LCD R/W + (0021) ;; + (0022) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0023) ;; arguments and observe the associated "Registers are volatile" policy. + (0024) ;; This means it is the caller's responsibility to preserve any values + (0025) ;; in the X and A registers that are still needed after the API functions + (0026) ;; returns. For Large Memory Model devices it is also the caller's + (0027) ;; responsibility to preserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0028) ;; MVW_PP registers. Even though some of these registers may not be modified + (0029) ;; now, there is no guarantee that will remain the case in future releases. + (0030) ;;----------------------------------------------------------------------------- + (0031) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0032) ;;***************************************************************************** + (0033) ;;***************************************************************************** + (0034) + (0035) include "m8c.inc" + (0036) include "memory.inc" + (0037) include "LCD.inc" + (0038) + (0039) ;----------------------------------------------- + (0040) ; Global Symbols + (0041) ;----------------------------------------------- + (0042) + (0043) export LCD_Start + (0044) export _LCD_Start + (0045) export LCD_Init + (0046) export _LCD_Init + (0047) + (0048) export LCD_WriteData + (0049) export _LCD_WriteData + (0050) + (0051) export LCD_Control + (0052) export _LCD_Control + (0053) + (0054) export LCD_PrString + (0055) export _LCD_PrString + (0056) + (0057) export LCD_PrCString + (0058) export _LCD_PrCString + (0059) + (0060) export LCD_Position + (0061) export _LCD_Position + (0062) + (0063) export LCD_PrHexByte + (0064) export _LCD_PrHexByte + (0065) + (0066) export LCD_PrHexInt + (0067) export _LCD_PrHexInt + (0068) + (0069) export LCD_Delay50uTimes + (0070) export _LCD_Delay50uTimes + (0071) + (0072) export LCD_Delay50u + (0073) export _LCD_Delay50u + (0074) + (0075) ;----------------------------------------------- + (0076) ; If bargraph functions not required, don't + (0077) ; export the function names. + (0078) ;----------------------------------------------- + (0079) + (0080) IF (LCD_BARGRAPH_ENABLE) + (0081) export LCD_InitBG + (0082) export _LCD_InitBG + (0083) + (0084) export LCD_InitVBG + (0085) export _LCD_InitVBG + (0086) + (0087) ; NOTE: The two functions, + (0088) ; + (0089) ; LCD_DrawVBG and + (0090) ; LCD_DrawBG + (0091) ; + (0092) ; are implemented using both fastcall16 and legacy fastcall16 because they + (0093) ; fall into a special and rare case where the calling sequences specified + (0094) ; by the two disciplines are incompatible. The fastcall16 versions are + (0095) ; provided for both C and Assembly users in all memory models. The legacy + (0096) ; fastcall16 versions are provided only to support existing small memory + (0097) ; model assembly language code---they do not work in the large memory + (0098) ; model. + (0099) ; + (0100) ; ** The legacy fastcall16 versions are provided on a temporary basis to + (0101) ; ** ease the transition to the 4.2 release of PSoC Designer. Their use is + (0102) ; ** deprecated and their status is "No Further Maintenance". + (0103) ; + (0104) ; The fastcall16 versions of these functions are distinguished by a + (0105) ; leading underscore in the name. The legacy fastcall16 names (which appear + (0106) ; in this comment) do not have the leading underscore. Details on the + (0107) ; calling sequence to be used for fastcall16 are given in the user module + (0108) ; datasheet. + (0109) ; + (0110) ; Fastcall16 versions: + (0111) export _LCD_DrawVBG + (0112) export _LCD_DrawBG + (0113) + (0114) IF SYSTEM_SMALL_MEMORY_MODEL + (0115) ; Legacy Fastcall versions: + (0116) export LCD_DrawVBG + (0117) export LCD_DrawBG + (0118) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + (0119) + (0120) ENDIF ; BARGRAPH_ENABLE + (0121) + (0122) ; + (0123) ; The following functions are deprecated and will be eliminated in a future + (0124) ; version of PSoC Designer. + (0125) ; + (0126) export LCD_Write_Data + (0127) export _LCD_Write_Data + (0128) + (0129) + (0130) ;----------------------------------------------- + (0131) ; EQUATES + (0132) ;----------------------------------------------- + (0133) + (0134) LCD_Port: equ PRT2DR + (0135) LCD_PortMode0: equ PRT2DM0 + (0136) LCD_PortMode1: equ PRT2DM1 + (0137) + (0138) LCD_E: equ 10h + (0139) LCD_RW: equ 40h + (0140) LCD_RS: equ 20h + (0141) + (0142) LCD_DATA_MASK: equ 0Fh + (0143) LCD_READY_BIT: equ 08h + (0144) + (0145) LCD_DATA_READ: equ ( LCD_E | LCD_RW | LCD_RS ) + (0146) LCD_CNTL_READ: equ ( LCD_E | LCD_RW ) + (0147) LCD_PORT_WRITE: equ 7Fh + (0148) LCD_PORT_MASK: equ 7Fh + (0149) + (0150) LCD_DISP_INC: equ 03h + (0151) LCD_DISP_OFF: equ 08h + (0152) LCD_DISP_ON: equ 0Ch + (0153) LCD_4BIT_2LINE: equ 2Ch + (0154) + (0155) + (0156) ;----------------------------------------------- + (0157) ; Bargraph definitions + (0158) ;----------------------------------------------- + (0159) + (0160) LCD_BG_CHAR_WIDTH: equ 16 ; 16 characters in width + (0161) LCD_BG_SEG_WIDTH: equ 80 ; 16 * 5 = 80 + (0162) LCD_BG_COL_START: equ 0 ; Always start in the left most column + (0163) + (0164) ; Offsets for 2x16, 2x20, 4x20 + (0165) ; Change these values for a custom LCD + (0166) + (0167) LCD_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 + (0168) LCD_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + (0169) LCD_ROW3_OFFSET: equ 94h ; Address/command offset for row 1 + (0170) LCD_ROW4_OFFSET: equ D4h ; Address/command offset for row 2 + (0171) + (0172) LCD_BG_ROW1_OFFSET: equ 80h ; Address/command offset for row 1 + (0173) LCD_BG_ROW2_OFFSET: equ C0h ; Address/command offset for row 2 + (0174) + (0175) LCD_CG_RAM_OFFSET: equ 40h ; Offset to character RAM + (0176) + (0177) AREA UserModules (ROM, REL) + (0178) + (0179) .SECTION + (0180) ;----------------------------------------------------------------------------- + (0181) ; FUNCTION NAME: LCD_PrCString + (0182) ; + (0183) ; DESCRIPTION: + (0184) ; Print constant (ROM) string to LCD + (0185) ;----------------------------------------------------------------------------- + (0186) ; + (0187) ; ARGUMENTS: + (0188) ; A:X Pointer to String + (0189) ; A contains MSB of string address + (0190) ; X contains LSB of string address + (0191) ; + (0192) ; RETURNS: none + (0193) ; + (0194) ; SIDE EFFECTS: + (0195) ; The A and X registers may be modified by this or future implementations + (0196) ; of this function. The same is true for all RAM page pointer registers in + (0197) ; the Large Memory Model. When necessary, it is the calling function's + (0198) ; responsibility to preserve their values across calls to fastcall16 + (0199) ; functions. + (0200) ; + (0201) ; Currently only the page pointer registers listed below are modified: + (0202) ; CUR_PP + (0203) ; + (0204) LCD_PrCString: + (0205) _LCD_PrCString: + (0206) RAM_PROLOGUE RAM_USE_CLASS_1 + (0207) .Loop_PrCString: +048A: 08 PUSH A (0208) push A ; Store ROM pointer +048B: 10 PUSH X (0209) push X +048C: 28 ROMX (0210) romx ; Get character from ROM +048D: B0 04 JNZ 0x0492 (0211) jnz .LCD_PrCString_WR ; print character and advance pointer +048F: 20 POP X (0212) pop X ; Restore the stack +0490: 18 POP A (0213) pop A + (0214) RAM_EPILOGUE RAM_USE_CLASS_1 +0491: 7F RET (0215) ret ; Return + (0216) + (0217) .LCD_PrCString_WR: +0492: 90 35 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0218) call LCD_WriteData ; Write data to LCD +0494: 20 POP X (0219) pop X ; Get ROM pointer +0495: 18 POP A (0220) pop A +0496: 75 INC X (0221) inc X ; Inc LSB of pointer +0497: DF F2 JNC _bPWM8_Heater_ReadPulseWidth|_PWM8_Heater_bReadCounter|_bPWM8_Heater_ReadCounter|bPWM8_Heater_ReadCounter|_LCD_PrCString|LCD_PrCString|_PWM8_Heater_bReadPulseWidth(0222) jnc .Loop_PrCString +0499: 74 INC A (0223) inc A ; Inc MSB of pointer if LSB overflow +049A: 8F EF JMP _bPWM8_Heater_ReadPulseWidth|_PWM8_Heater_bReadCounter|_bPWM8_Heater_ReadCounter|bPWM8_Heater_ReadCounter|_LCD_PrCString|LCD_PrCString|_PWM8_Heater_bReadPulseWidth(0224) jmp .Loop_PrCString + (0225) + (0226) .ENDSECTION + (0227) + (0228) ;----------------------------------------------------------------------------- + (0229) ; FUNCTION NAME: LCD_PrHexByte + (0230) ; + (0231) ; DESCRIPTION: + (0232) ; Print a byte in Hex (two characters) to current LCD position + (0233) ; + (0234) ;----------------------------------------------------------------------------- + (0235) ; + (0236) ; ARGUMENTS: + (0237) ; A => (BYTE) Data/char to be printed + (0238) ; + (0239) ; RETURNS: none + (0240) ; + (0241) ; SIDE EFFECTS: + (0242) ; The A and X registers may be modified by this or future implementations + (0243) ; of this function. The same is true for all RAM page pointer registers in + (0244) ; the Large Memory Model. When necessary, it is the calling function's + (0245) ; responsibility to preserve their values across calls to fastcall16 + (0246) ; functions. + (0247) ; + (0248) ; Currently only the page pointer registers listed below are modified: + (0249) ; CUR_PP + (0250) ; + (0251) .LITERAL + (0252) LCD_HEX_STR:: + (0253) DS "0123456789ABCDEF" + (0254) .ENDLITERAL + (0255) .SECTION + (0256) + (0257) LCD_PrHexByte: + (0258) _LCD_PrHexByte: + (0259) RAM_PROLOGUE RAM_USE_CLASS_1 +04AC: 08 PUSH A (0260) push A ; Save lower nibble +04AD: 67 ASR A (0261) asr A ; Shift high nibble to right +04AE: 67 ASR A (0262) asr A +04AF: 67 ASR A (0263) asr A +04B0: 67 ASR A (0264) asr A +04B1: 21 0F AND A,0xF (0265) and A,0Fh ; Mask off nibble +04B3: FF E7 INDEX LCD_HEX_STR (0266) index LCD_HEX_STR ; Get Hex value +04B5: 90 12 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0267) call LCD_WriteData ; Write data to screen +04B7: 18 POP A (0268) pop A ; Restore value +04B8: 21 0F AND A,0xF (0269) and A,0Fh ; Mask off lower nibble +04BA: FF E0 INDEX LCD_HEX_STR (0270) index LCD_HEX_STR ; Get Hex value +04BC: 90 0B CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0271) call LCD_WriteData ; Write data to screen + (0272) RAM_EPILOGUE RAM_USE_CLASS_1 +04BE: 7F RET (0273) ret + (0274) .ENDSECTION + (0275) + (0276) .SECTION + (0277) ;----------------------------------------------------------------------------- + (0278) ; FUNCTION NAME: LCD_PrHexInt + (0279) ; + (0280) ; DESCRIPTION: + (0281) ; Print an Int in Hex (four characters) to current LCD position + (0282) ; + (0283) ;----------------------------------------------------------------------------- + (0284) ; + (0285) ; ARGUMENTS: + (0286) ; A:X Integer value + (0287) ; A contains LSB of Int + (0288) ; X contains MSB of Int + (0289) ; + (0290) ; RETURNS: none + (0291) ; + (0292) ; SIDE EFFECTS: + (0293) ; The A and X registers may be modified by this or future implementations + (0294) ; of this function. The same is true for all RAM page pointer registers in + (0295) ; the Large Memory Model. When necessary, it is the calling function's + (0296) ; responsibility to preserve their values across calls to fastcall16 + (0297) ; functions. + (0298) ; + (0299) ; Currently only the page pointer registers listed below are modified: + (0300) ; CUR_PP + (0301) ; + (0302) LCD_PrHexInt: + (0303) _LCD_PrHexInt: + (0304) RAM_PROLOGUE RAM_USE_CLASS_1 + (0305) swap A,X + (0306) call LCD_PrHexByte ; Print MSB + (0307) mov A,X ; Move LSB into position + (0308) call LCD_PrHexByte ; Print LSB + (0309) RAM_EPILOGUE RAM_USE_CLASS_1 + (0310) ret + (0311) .ENDSECTION + (0312) + (0313) .SECTION + (0314) ;----------------------------------------------------------------------------- + (0315) ; FUNCTION NAME: LCD_PrString + (0316) ; + (0317) ; DESCRIPTION: + (0318) ; Print (RAM) ASCII string to LCD + (0319) ; + (0320) ;----------------------------------------------------------------------------- + (0321) ; + (0322) ; ARGUMENTS: + (0323) ; A:X contains pointer to string + (0324) ; X contains LSB of string pointer + (0325) ; A contains MSB or page of string pointer (not used at this time) + (0326) ; + (0327) ; RETURNS: + (0328) ; + (0329) ; SIDE EFFECTS: + (0330) ; The A and X registers may be modified by this or future implementations + (0331) ; of this function. The same is true for all RAM page pointer registers in + (0332) ; the Large Memory Model. When necessary, it is the calling function's + (0333) ; responsibility to preserve their values across calls to fastcall16 + (0334) ; functions. + (0335) ; + (0336) ; Currently only the page pointer registers listed below are modified: + (0337) ; CUR_PP + (0338) ; IDX_PP + (0339) ; + (0340) ; + (0341) LCD_PrString: + (0342) _LCD_PrString: + (0343) RAM_PROLOGUE RAM_USE_CLASS_3 + (0344) RAM_SETPAGE_IDX A + (0345) .Loop_PrString: +04BF: 52 00 MOV A,[X+0] (0346) mov A,[X] ; Get value pointed to by X +04C1: A0 06 JZ 0x04C8 (0347) jz .End_LCD_PrString ; Check for end of string + (0348) ;LCD_writeData is known not to modify X so no need to preserve +04C3: 90 04 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(0349) call LCD_WriteData ; Write data to screen +04C5: 75 INC X (0350) inc X ; Advance pointer to next character +04C6: 8F F8 JMP _LCD_PrString|_LCD_PrHexInt(0351) jmp .Loop_PrString ; Go get next character + (0352) .End_LCD_PrString: + (0353) RAM_EPILOGUE RAM_USE_CLASS_3 +04C8: 7F RET (0354) ret + (0355) .ENDSECTION + (0356) + (0357) .SECTION + (0358) ;----------------------------------------------------------------------------- + (0359) ; FUNCTION NAME: LCD_WriteData + (0360) ; + (0361) ; DESCRIPTION: + (0362) ; Write a byte to the LCD's data register. + (0363) ; + (0364) ;----------------------------------------------------------------------------- + (0365) ; + (0366) ; ARGUMENTS: + (0367) ; A contains byte to be written to LCD data register + (0368) ; + (0369) ; RETURNS: none + (0370) ; + (0371) ; SIDE EFFECTS: + (0372) ; The A and X registers may be modified by this or future implementations + (0373) ; of this function. The same is true for all RAM page pointer registers in + (0374) ; the Large Memory Model. When necessary, it is the calling function's + (0375) ; responsibility to preserve their values across calls to fastcall16 + (0376) ; functions. + (0377) ; + (0378) ; Currently only the page pointer registers listed below are modified: + (0379) ; CUR_PP + (0380) ; + (0381) LCD_WriteData: + (0382) _LCD_WriteData: + (0383) LCD_Write_Data: ; Do not use + (0384) _LCD_Write_Data: ; Do not use + (0385) RAM_PROLOGUE RAM_USE_CLASS_1 +04C9: 90 5F CALL 0x052A (0386) call LCD_Check_Ready ; Make sure controller is ready + (0387) ; A is preserved in LCD_Check_Ready +04CB: 08 PUSH A (0388) push A ; Save copy of character +04CC: 67 ASR A (0389) asr A ; Shift high nibble to right +04CD: 67 ASR A (0390) asr A +04CE: 67 ASR A (0391) asr A +04CF: 67 ASR A (0392) asr A +04D0: 21 0F AND A,0xF (0393) and A,0Fh ; Mask off high nibble +04D2: 90 38 CALL 0x050C (0394) call LCD_WDATA_Nibble ; Write Upper nibble +04D4: 18 POP A (0395) pop A ; Retrieve copy of character +04D5: 21 0F AND A,0xF (0396) and A,0Fh ; Mask off high nibble +04D7: 40 NOP (0397) nop +04D8: 40 NOP (0398) nop +04D9: 40 NOP (0399) nop +04DA: 90 30 CALL 0x050C (0400) call LCD_WDATA_Nibble ; Write Lower nibble + (0401) RAM_EPILOGUE RAM_USE_CLASS_1 +04DC: 7F RET (0402) ret + (0403) .ENDSECTION + (0404) + (0405) .SECTION + (0406) ;----------------------------------------------------------------------------- + (0407) ; FUNCTION NAME: LCD_Control + (0408) ; + (0409) ; DESCRIPTION: + (0410) ; Write a byte to the LCD's control register. + (0411) ; + (0412) ;----------------------------------------------------------------------------- + (0413) ; + (0414) ; ARGUMENTS: + (0415) ; A contains data to be written to LCD control register. + (0416) ; + (0417) ; RETURNS: none + (0418) ; + (0419) ; SIDE EFFECTS: + (0420) ; The A and X registers may be modified by this or future implementations + (0421) ; of this function. The same is true for all RAM page pointer registers in + (0422) ; the Large Memory Model. When necessary, it is the calling function's + (0423) ; responsibility to preserve their values across calls to fastcall16 + (0424) ; functions. + (0425) ; + (0426) ; Currently only the page pointer registers listed below are modified: + (0427) ; CUR_PP + (0428) ; + (0429) LCD_Control: + (0430) _LCD_Control: + (0431) RAM_PROLOGUE RAM_USE_CLASS_1 +04DD: 90 4B CALL 0x052A (0432) call LCD_Check_Ready ; Make sure controller is ready + (0433) ; A is preserved in LCD_Check_Ready +04DF: 08 PUSH A (0434) push A ; Save copy of byte +04E0: 67 ASR A (0435) asr A ; Shift Upper Nibble to right +04E1: 67 ASR A (0436) asr A +04E2: 67 ASR A (0437) asr A +04E3: 67 ASR A (0438) asr A +04E4: 21 0F AND A,0xF (0439) and A,0Fh ; Mask off, just in case +04E6: 90 09 CALL 0x04F1 (0440) call LCD_WCNTL_Nibble ; Write high nibble +04E8: 18 POP A (0441) pop A ; Restore copy of byte +04E9: 21 0F AND A,0xF (0442) and A,0Fh ; Mask off high nibble +04EB: 40 NOP (0443) nop +04EC: 40 NOP (0444) nop +04ED: 40 NOP (0445) nop +04EE: 90 01 CALL 0x04F1 (0446) call LCD_WCNTL_Nibble ; Write Lower nibble + (0447) RAM_EPILOGUE RAM_USE_CLASS_1 +04F0: 7F RET (0448) ret + (0449) .ENDSECTION + (0450) + (0451) .SECTION + (0452) ;----------------------------------------------------------------------------- + (0453) ; FUNCTION NAME: LCD_WCNTL_Nibble + (0454) ; + (0455) ; DESCRIPTION: + (0456) ; Write a single nibble to the LCD's command register + (0457) ; + (0458) ;----------------------------------------------------------------------------- + (0459) ; + (0460) ; ARGUMENTS: + (0461) ; A[3:0] Contains Nibble to be written to command register + (0462) ; + (0463) ; RETURNS: none + (0464) ; + (0465) ; SIDE EFFECTS: + (0466) ; The A and X registers may be modified by this or future implementations + (0467) ; of this function. The same is true for all RAM page pointer registers in + (0468) ; the Large Memory Model. When necessary, it is the calling function's + (0469) ; responsibility to preserve their values across calls to fastcall16 + (0470) ; functions. + (0471) ; + (0472) ; Currently only the page pointer registers listed below are modified: + (0473) ; CUR_PP + (0474) ; + (0475) LCD_WCNTL_Nibble: + (0476) RAM_PROLOGUE RAM_USE_CLASS_4 +04F1: 08 PUSH A (0477) push A + (0478) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address +04F2: 26 34 80 AND [0x34],0x80 (0479) and [Port_2_Data_SHADE],~LCD_PORT_MASK +04F5: 51 34 MOV A,[0x34] (0480) mov A,[Port_2_Data_SHADE] +04F7: 60 08 MOV REG[0x8],A (0481) mov reg[LCD_Port],A ; Reset control lines + (0482) +04F9: 18 POP A (0483) pop A +04FA: 21 0F AND A,0xF (0484) and A,LCD_DATA_MASK ; Make sure no bogus data in MSN +04FC: 29 10 OR A,0x10 (0485) or A,LCD_E ; Bring "E" Enable line high +04FE: 2A 34 OR A,[0x34] (0486) or A,[Port_2_Data_SHADE] ; OR in bit 7 just +0500: 60 08 MOV REG[0x8],A (0487) mov reg[LCD_Port], A ; Write data +0502: 53 34 MOV [0x34],A (0488) mov [Port_2_Data_SHADE],A ; Keep shadow register in sync +0504: 40 NOP (0489) nop +0505: 21 8F AND A,0x8F (0490) and A,(~LCD_PORT_MASK|LCD_DATA_MASK) ; Disable E signal and leave data on bus. +0507: 53 34 MOV [0x34],A (0491) mov [Port_2_Data_SHADE],A ; Keep shadow register in sync +0509: 60 08 MOV REG[0x8],A (0492) mov reg[LCD_Port],A + (0493) RAM_EPILOGUE RAM_USE_CLASS_4 +050B: 7F RET (0494) ret + (0495) .ENDSECTION + (0496) + (0497) .SECTION + (0498) ;----------------------------------------------------------------------------- + (0499) ; FUNCTION NAME: LCD_WDATA_Nibble + (0500) ; + (0501) ; DESCRIPTION: + (0502) ; Write a single nibble to the LCD's DATA register + (0503) ; + (0504) ;----------------------------------------------------------------------------- + (0505) ; + (0506) ; ARGUMENTS: + (0507) ; A[3:0] Contains Nibble to be written to data register + (0508) ; + (0509) ; RETURNS: none + (0510) ; + (0511) ; SIDE EFFECTS: + (0512) ; The A and X registers may be modified by this or future implementations + (0513) ; of this function. The same is true for all RAM page pointer registers in + (0514) ; the Large Memory Model. When necessary, it is the calling function's + (0515) ; responsibility to preserve their values across calls to fastcall16 + (0516) ; functions. + (0517) ; + (0518) ; Currently only the page pointer registers listed below are modified: + (0519) ; CUR_PP + (0520) ; + (0521) LCD_WDATA_Nibble: + (0522) RAM_PROLOGUE RAM_USE_CLASS_4 +050C: 08 PUSH A (0523) push A + (0524) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address +050D: 26 34 80 AND [0x34],0x80 (0525) and [Port_2_Data_SHADE],~LCD_PORT_MASK +0510: 2E 34 20 OR [0x34],0x20 (0526) or [Port_2_Data_SHADE],LCD_RS ; Raise RS to signify a Data Write +0513: 51 34 MOV A,[0x34] (0527) mov A,[Port_2_Data_SHADE] +0515: 60 08 MOV REG[0x8],A (0528) mov reg[LCD_Port],A + (0529) +0517: 18 POP A (0530) pop A +0518: 21 0F AND A,0xF (0531) and A,LCD_DATA_MASK ; Make sure no bogus data in A[7:4] +051A: 29 30 OR A,0x30 (0532) or A,(LCD_E | LCD_RS) ; Bring "E" Enable line high +051C: 2A 34 OR A,[0x34] (0533) or A,[Port_2_Data_SHADE] ; Keep shadow in sync +051E: 60 08 MOV REG[0x8],A (0534) mov reg[LCD_Port], A ; Write data +0520: 53 34 MOV [0x34],A (0535) mov [Port_2_Data_SHADE],A ; Keep shadow in sync +0522: 40 NOP (0536) NOP +0523: 21 AF AND A,0xAF (0537) and A,(~LCD_PORT_MASK|LCD_DATA_MASK|LCD_RS) ; Disable E signal and leave Data on bus +0525: 53 34 MOV [0x34],A (0538) mov [Port_2_Data_SHADE],A ; keep shadow in sync +0527: 60 08 MOV REG[0x8],A (0539) mov reg[LCD_Port],A + (0540) RAM_EPILOGUE RAM_USE_CLASS_4 +0529: 7F RET (0541) ret + (0542) .ENDSECTION + (0543) + (0544) .SECTION + (0545) ;----------------------------------------------------------------------------- + (0546) ; FUNCTION NAME: LCD_Check_Ready + (0547) ; + (0548) ; DESCRIPTION: + (0549) ; Wait until LCD has completed last command. + (0550) ; + (0551) ;----------------------------------------------------------------------------- + (0552) ; + (0553) ; ARGUMENTS: none + (0554) ; + (0555) ; RETURNS: none + (0556) ; + (0557) ; SIDE EFFECTS: + (0558) ; The A and X registers may be modified by this or future implementations + (0559) ; of this function. The same is true for all RAM page pointer registers in + (0560) ; the Large Memory Model. When necessary, it is the calling function's + (0561) ; responsibility to preserve their values across calls to fastcall16 + (0562) ; functions. + (0563) ; + (0564) ; Currently only the page pointer registers listed below are modified: + (0565) ; CUR_PP + (0566) ; + (0567) ; If LCD is not present, this routine may never return. + (0568) ; + (0569) LCD_Check_Ready: + (0570) RAM_PROLOGUE RAM_USE_CLASS_4 +052A: 08 PUSH A (0571) push A ; Save Accumulator + (0572) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address +052B: 26 34 80 AND [0x34],0x80 (0573) and [Port_2_Data_SHADE],~LCD_PORT_MASK ; Mask of all LCD bits +052E: 51 34 MOV A,[0x34] (0574) mov A,[Port_2_Data_SHADE] +0530: 60 08 MOV REG[0x8],A (0575) mov reg[LCD_Port],A ; Zero LCD port bits + (0576) +0532: 26 35 F0 AND [0x35],0xF0 (0577) and [Port_2_DriveMode_0_SHADE],~LCD_DATA_MASK ; Clear out LCD mode bits. +0535: 51 35 MOV A,[0x35] (0578) mov A,[Port_2_DriveMode_0_SHADE] +0537: 71 10 OR F,0x10 + (0579) M8C_SetBank1 ; Change port mode to read status +0539: 60 08 MOV REG[0x8],A (0580) mov reg[LCD_PortMode0],A ; Setup LCD Port for reading +053B: 70 EF AND F,0xEF + (0581) M8C_SetBank0 + (0582) +053D: 2E 34 40 OR [0x34],0x40 (0583) or [Port_2_Data_SHADE],LCD_RW ; Raise RW to signify Read operation +0540: 51 34 MOV A,[0x34] (0584) mov A,[Port_2_Data_SHADE] +0542: 60 08 MOV REG[0x8],A (0585) mov reg[LCD_Port],A +0544: 40 NOP (0586) NOP + (0587) +0545: 10 PUSH X (0588) push X ; Save 'X' register +0546: 57 FF MOV X,0xFF (0589) mov X,255 ; 255 Attempts + (0590) + (0591) .LCD_RDY_LOOP: +0548: 2E 34 50 OR [0x34],0x50 (0592) or [Port_2_Data_SHADE], LCD_CNTL_READ ; Raise E to start cycle +054B: 51 34 MOV A,[0x34] (0593) mov A,[Port_2_Data_SHADE] +054D: 60 08 MOV REG[0x8],A (0594) mov reg[LCD_Port],A + (0595) +054F: 40 NOP (0596) nop ; Wait 2 nops to make sure data is ready +0550: 40 NOP (0597) nop +0551: 5D 08 MOV A,REG[0x8] (0598) mov A,reg[LCD_Port] + (0599) + (0600) ; The code below is used to work around the async read issue with the ICE with the + (0601) ; 25/26xxx family of devices. It will help to eliminate "Invalid memory reference" + (0602) ; errors. It is not required when running without the ICE or when using any other + (0603) ; family besides the 25/26xxx family. If not using the ICE or with any other family + (0604) ; the ICE_PORT_SYNC flag should be set to 0. + (0605) IF(ICE_PORT_SYNC) + (0606) mov reg[ 0xfa], A + (0607) mov A, reg[0xfa] + (0608) ENDIF + (0609) +0553: 08 PUSH A (0610) push A +0554: 26 34 C0 AND [0x34],0xC0 (0611) and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal +0557: 51 34 MOV A,[0x34] (0612) mov A,[Port_2_Data_SHADE] +0559: 60 08 MOV REG[0x8],A (0613) mov reg[LCD_Port],A + (0614) +055B: 40 NOP (0615) nop ; Add delay for the slowest part and the +055C: 40 NOP (0616) nop ; fastest PSoC +055D: 40 NOP (0617) nop + (0618) ; Get the LSBs +055E: 2E 34 50 OR [0x34],0x50 (0619) or [Port_2_Data_SHADE],LCD_CNTL_READ ; Raise E to start cycle +0561: 51 34 MOV A,[0x34] (0620) mov A,[Port_2_Data_SHADE] +0563: 60 08 MOV REG[0x8],A (0621) mov reg[LCD_Port],A + (0622) +0565: 40 NOP (0623) nop +0566: 40 NOP (0624) nop + (0625) +0567: 26 34 C0 AND [0x34],0xC0 (0626) and [Port_2_Data_SHADE],(~LCD_PORT_MASK | LCD_RW) ; Lower E signal +056A: 51 34 MOV A,[0x34] (0627) mov A,[Port_2_Data_SHADE] +056C: 60 08 MOV REG[0x8],A (0628) mov reg[LCD_Port],A + (0629) +056E: 18 POP A (0630) pop A +056F: 21 08 AND A,0x8 (0631) and A,LCD_READY_BIT ; Check busy + (0632) +0571: A0 04 JZ 0x0576 (0633) jz .UNLOCK +0573: 79 DEC X (0634) dec X +0574: BF D3 JNZ 0x0548 (0635) jnz .LCD_RDY_LOOP ; If LCD still busy, read again for 255 times + (0636) .UNLOCK: +0576: 20 POP X (0637) pop X ; Restore 'X' register + (0638) +0577: 2E 35 7F OR [0x35],0x7F (0639) or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Revert Data bit to Write mode +057A: 51 35 MOV A,[0x35] (0640) mov A,[Port_2_DriveMode_0_SHADE] +057C: 71 10 OR F,0x10 + (0641) M8C_SetBank1 +057E: 60 08 MOV REG[0x8],A (0642) mov reg[LCD_PortMode0],A ; Setup LCD Port for writing +0580: 70 EF AND F,0xEF + (0643) M8C_SetBank0 +0582: 18 POP A (0644) pop A + (0645) RAM_EPILOGUE RAM_USE_CLASS_4 ; Restore Accumulator +0583: 7F RET (0646) ret + (0647) .ENDSECTION + (0648) + (0649) .SECTION + (0650) ;----------------------------------------------------------------------------- + (0651) ; FUNCTION NAME: LCD_Start + (0652) ; FUNCTION NAME: LCD_Init + (0653) ; + (0654) ; DESCRIPTION: + (0655) ; Initialize LCD + (0656) ; + (0657) ;----------------------------------------------------------------------------- + (0658) ; + (0659) ; ARGUMENTS: none + (0660) ; + (0661) ; RETURNS: none + (0662) ; + (0663) ; SIDE EFFECTS: + (0664) ; The A and X registers may be modified by this or future implementations + (0665) ; of this function. The same is true for all RAM page pointer registers in + (0666) ; the Large Memory Model. When necessary, it is the calling function's + (0667) ; responsibility to preserve their values across calls to fastcall16 + (0668) ; functions. + (0669) ; + (0670) ; Currently only the page pointer registers listed below are modified: + (0671) ; CUR_PP + (0672) ; + (0673) ; THEORY of OPERATION or PROCEDURE: + (0674) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (0675) ; This initialization is a bit long, but it should work for + (0676) ; most 2 and 4 line LCDs. + (0677) ; + (0678) LCD_Start: + (0679) _LCD_Start: + (0680) LCD_Init: + (0681) _LCD_Init: + (0682) RAM_PROLOGUE RAM_USE_CLASS_4 + (0683) RAM_SETPAGE_CUR >Port_2_Data_SHADE ; Set CUR_PP to LCD variable address + (0684) +0584: 26 35 80 AND [0x35],0x80 (0685) and [Port_2_DriveMode_0_SHADE],~LCD_PORT_MASK ; Mask off LCD bits +0587: 2E 35 7F OR [0x35],0x7F (0686) or [Port_2_DriveMode_0_SHADE],LCD_PORT_WRITE ; Set LCD port for writing +058A: 26 36 80 AND [0x36],0x80 (0687) and [Port_2_DriveMode_1_SHADE],~LCD_PORT_MASK ; Mask off LCD bits + (0688) +058D: 51 35 MOV A,[0x35] (0689) mov A,[Port_2_DriveMode_0_SHADE] +058F: 71 10 OR F,0x10 + (0690) M8C_SetBank1 +0591: 60 08 MOV REG[0x8],A (0691) mov reg[LCD_PortMode0],A ; Setup LCD Port for writing +0593: 51 36 MOV A,[0x36] (0692) mov A,[Port_2_DriveMode_1_SHADE] +0595: 60 09 MOV REG[0x9],A (0693) mov reg[LCD_PortMode1],A +0597: 70 EF AND F,0xEF + (0694) M8C_SetBank0 + (0695) +0599: 50 FA MOV A,0xFA (0696) mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) +059B: 90 63 CALL _LCD_Delay50uTimes (0697) call LCD_Delay50uTimes +059D: 50 FA MOV A,0xFA (0698) mov A,250 ; Delay for 12.5 mSec (250 * 50uSec) +059F: 90 5F CALL _LCD_Delay50uTimes (0699) call LCD_Delay50uTimes + (0700) +05A1: 50 03 MOV A,0x3 (0701) mov A,03h +05A3: 9F 4C CALL 0x04F1 (0702) call LCD_WCNTL_Nibble + (0703) +05A5: 50 52 MOV A,0x52 (0704) mov A,82 ; Delay for 4.1 mSec (82 * 50uSec) +05A7: 90 57 CALL _LCD_Delay50uTimes (0705) call LCD_Delay50uTimes + (0706) +05A9: 50 03 MOV A,0x3 (0707) mov A,03h +05AB: 9F 44 CALL 0x04F1 (0708) call LCD_WCNTL_Nibble + (0709) +05AD: 90 5F CALL _LCD_Delay50u (0710) call LCD_Delay50u +05AF: 90 5D CALL _LCD_Delay50u (0711) call LCD_Delay50u +05B1: 90 5B CALL _LCD_Delay50u (0712) call LCD_Delay50u + (0713) +05B3: 50 03 MOV A,0x3 (0714) mov A,03h +05B5: 9F 3A CALL 0x04F1 (0715) call LCD_WCNTL_Nibble + (0716) +05B7: 50 5A MOV A,0x5A (0717) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +05B9: 90 45 CALL _LCD_Delay50uTimes (0718) call LCD_Delay50uTimes + (0719) +05BB: 50 02 MOV A,0x2 (0720) mov A,02h +05BD: 9F 32 CALL 0x04F1 (0721) call LCD_WCNTL_Nibble + (0722) +05BF: 50 5A MOV A,0x5A (0723) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +05C1: 90 3D CALL _LCD_Delay50uTimes (0724) call LCD_Delay50uTimes + (0725) +05C3: 50 08 MOV A,0x8 (0726) mov A,08h +05C5: 9F 16 CALL _LCD_Control (0727) call LCD_Control +05C7: 50 5A MOV A,0x5A (0728) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +05C9: 90 35 CALL _LCD_Delay50uTimes (0729) call LCD_Delay50uTimes + (0730) +05CB: 50 01 MOV A,0x1 (0731) mov A,01h +05CD: 9F 0E CALL _LCD_Control (0732) call LCD_Control +05CF: 50 5A MOV A,0x5A (0733) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +05D1: 90 2D CALL _LCD_Delay50uTimes (0734) call LCD_Delay50uTimes + (0735) +05D3: 50 06 MOV A,0x6 (0736) mov A,06h +05D5: 9F 06 CALL _LCD_Control (0737) call LCD_Control + (0738) +05D7: 50 0E MOV A,0xE (0739) mov A,0Eh +05D9: 9F 02 CALL _LCD_Control (0740) call LCD_Control + (0741) +05DB: 50 2C MOV A,0x2C (0742) mov A,LCD_4BIT_2LINE ; Setup for 4 bit interface, 2 line +05DD: 9E FE CALL _LCD_Control (0743) call LCD_Control + (0744) +05DF: 50 08 MOV A,0x8 (0745) mov A,LCD_DISP_OFF +05E1: 9E FA CALL _LCD_Control (0746) call LCD_Control + (0747) +05E3: 50 0C MOV A,0xC (0748) mov A,LCD_DISP_ON +05E5: 9E F6 CALL _LCD_Control (0749) call LCD_Control + (0750) +05E7: 50 03 MOV A,0x3 (0751) mov A,LCD_DISP_INC +05E9: 9E F2 CALL _LCD_Control (0752) call LCD_Control + (0753) +05EB: 50 5A MOV A,0x5A (0754) mov A,90 ; Delay for 4.5 mSec (90 * 50uSec) +05ED: 90 11 CALL _LCD_Delay50uTimes (0755) call LCD_Delay50uTimes + (0756) RAM_EPILOGUE RAM_USE_CLASS_4 +05EF: 7F RET (0757) ret + (0758) .ENDSECTION + (0759) + (0760) ;----------------------------------------------------------------------------- + (0761) ; FUNCTION NAME: LCD_Position + (0762) ; + (0763) ; DESCRIPTION: + (0764) ; Position Cursor at Row and Col location + (0765) ; + (0766) ;----------------------------------------------------------------------------- + (0767) ; + (0768) ; ARGUMENTS: + (0769) ; A => Row 0 to 3 + (0770) ; X => Col 0 to 39+ + (0771) ; + (0772) ; RETURNS: none + (0773) ; + (0774) ; SIDE EFFECTS: + (0775) ; The A and X registers may be modified by this or future implementations + (0776) ; of this function. The same is true for all RAM page pointer registers in + (0777) ; the Large Memory Model. When necessary, it is the calling function's + (0778) ; responsibility to preserve their values across calls to fastcall16 + (0779) ; functions. + (0780) ; + (0781) .LITERAL + (0782) LCD_ROW_OFFSET:: + (0783) DB LCD_ROW1_OFFSET, LCD_ROW2_OFFSET, LCD_ROW3_OFFSET, LCD_ROW4_OFFSET + (0784) .ENDLITERAL + (0785) + (0786) .SECTION + (0787) LCD_Position: + (0788) _LCD_Position: + (0789) RAM_PROLOGUE RAM_USE_CLASS_2 +05F4: 21 03 AND A,0x3 (0790) and A,03h ; Mask off 2 bits for row address 0 to 3 +05F6: 10 PUSH X (0791) push X ; Store COL +05F7: FF F7 INDEX LCD_ROW_OFFSET (0792) index LCD_ROW_OFFSET ; Get ROW memory offset from table +05F9: 4F MOV X,SP (0793) mov X,SP ; Get Stack pointer +05FA: 03 FF ADD A,[X-1] (0794) add A,[X+(-1)] ; Add the COL to the display pointer +05FC: 20 POP X (0795) pop X + (0796) +05FD: 9E DE CALL _LCD_Control (0797) call LCD_Control ; Write control byte + (0798) RAM_EPILOGUE RAM_USE_CLASS_2 +05FF: 7F RET (0799) ret + (0800) .ENDSECTION + (0801) + (0802) .SECTION + (0803) ;----------------------------------------------------------------------------- + (0804) ; FUNCTION NAME: LCD_Delay50uTimes + (0805) ; + (0806) ; DESCRIPTION: + (0807) ; Delay increments of 50uSeconds + (0808) ; + (0809) ;----------------------------------------------------------------------------- + (0810) ; + (0811) ; ARGUMENTS: + (0812) ; A contains the delay multiplier + (0813) ; + (0814) ; RETURNS: + (0815) ; + (0816) ; SIDE EFFECTS: + (0817) ; The A and X registers may be modified by this or future implementations + (0818) ; of this function. The same is true for all RAM page pointer registers in + (0819) ; the Large Memory Model. When necessary, it is the calling function's + (0820) ; responsibility to preserve their values across calls to fastcall16 + (0821) ; functions. + (0822) ; + (0823) ; + (0824) LCD_Delay50uTimes: + (0825) _LCD_Delay50uTimes: + (0826) RAM_PROLOGUE RAM_USE_CLASS_1 +0600: 90 0C CALL _LCD_Delay50u (0827) call LCD_Delay50u +0602: 78 DEC A (0828) dec A +0603: BF FC JNZ _LCD_Delay50uTimes (0829) jnz LCD_Delay50uTimes + (0830) RAM_EPILOGUE RAM_USE_CLASS_1 +0605: 7F RET (0831) ret + (0832) + (0833) .ENDSECTION + (0834) + (0835) ;----------------------------------------------------------------------------- + (0836) ; FUNCTION NAME: LCD_Delay50u + (0837) ; + (0838) ; DESCRIPTION: + (0839) ; Delay 50uSec for any clock frequency from 1.5MHz to 24MHz + (0840) ; Slower clock frequencies the delay will be; + (0841) ; 1.5 + (0842) ; -------------- * 50uSec + (0843) ; clock_freq(MHz) + (0844) ; + (0845) ; + (0846) ;----------------------------------------------------------------------------- + (0847) ; + (0848) ; ARGUMENTS: none + (0849) ; + (0850) ; RETURNS: none + (0851) ; + (0852) ; SIDE EFFECTS: + (0853) ; The A and X registers may be modified by this or future implementations + (0854) ; of this function. The same is true for all RAM page pointer registers in + (0855) ; the Large Memory Model. When necessary, it is the calling function's + (0856) ; responsibility to preserve their values across calls to fastcall16 + (0857) ; functions. + (0858) ; + (0859) ; THEORY of OPERATION or PROCEDURE: + (0860) ; + (0861) .LITERAL + (0862) LCD_Delay50u_Table:: + (0863) DB 08h, 19h, 3Ah, 7Ch, 01h, 01h, 01h, 01h + (0864) ; 3MHz, 6MHz, 12MHz, 24MHz, 1.5MHz, 750kHz, 188kHz, 94kHz + (0865) .ENDLITERAL + (0866) .SECTION + (0867) + (0868) LCD_Delay50u: + (0869) _LCD_Delay50u: ; [11] Call + (0870) RAM_PROLOGUE RAM_USE_CLASS_1 +060E: 08 PUSH A (0871) push A +060F: 71 10 OR F,0x10 + (0872) M8C_SetBank1 ; [4] +0611: 5D E0 MOV A,REG[0xE0] (0873) mov A, reg[OSC_CR0] ; [6] Get delay value +0613: 70 EF AND F,0xEF + (0874) M8C_SetBank0 ; [4] +0615: 21 07 AND A,0x7 (0875) and A,07h ; [4] Mask off only the clock bits +0617: 39 05 CMP A,0x5 (0876) cmp A,05h +0619: D0 06 JNC 0x0620 (0877) jnc .Delay50u_End +061B: FF E9 INDEX LCD_Delay50u_Table (0878) index LCD_Delay50u_Table ; [13] Get delay value + (0879) .Delay50u_Loop: ; +061D: 78 DEC A (0880) dec A ; [4] +061E: BF FE JNZ 0x061D (0881) jnz .Delay50u_Loop ; [5] + (0882) .Delay50u_End: +0620: 18 POP A (0883) pop A + (0884) RAM_EPILOGUE RAM_USE_CLASS_1 +0621: 7F RET (0885) ret + (0886) .ENDSECTION + (0887) + (0888) + (0889) ;----------------------------------------------------------------------------- + (0890) ; If bargraph is not enabled, the following functions are not required. + (0891) ;----------------------------------------------------------------------------- + (0892) + (0893) IF (LCD_BARGRAPH_ENABLE) + (0894) + (0895) IF SYSTEM_SMALL_MEMORY_MODEL + (0896) .SECTION + (0897) ;----------------------------------------------------------------------------- + (0898) ; FUNCTION NAME: LCD_DrawBG + (0899) ; + (0900) ; DESCRIPTION: + (0901) ; This legacy fastcall version are provided only to support existing small + (0902) ; memory model assembly language code---it does not work in the large memory + (0903) ; model. + (0904) ; + (0905) ; ** This legacy fastcall version is provided on a temporary basis to + (0906) ; ** ease the transition to the 4.2 release of PSoC Designer. Its use is + (0907) ; ** deprecated and its status is "No Further Maintenance". If you call this + (0908) ; ** function in assembly you should convert to _LCD_DrawVBG + (0909) ; ** (with a leading underscore) and the fastcall16 interface + (0910) ; + (0911) ; Draw a horizontal bargraph on the LCD with the given parameters. This + (0912) ; is a legacy function that is intended to support existing Assembly + (0913) ; language programs that call this function. This should not be used for + (0914) ; new code or with Large Memory Model programs. + (0915) ;----------------------------------------------------------------------------- + (0916) ; + (0917) ; LEGACY FASTCALL ARGUMENTS: + (0918) ; A => Starting row for bargraph 0 to 3 + (0919) ; [X] => Starting Column for bargraph 0 to 39+ + (0920) ; [x-1] => Length of bargraph in chars 1 to 40+ + (0921) ; [X-2] => Position of pointer in segments 5 times Length + (0922) ; + (0923) ; + (0924) ; RETURNS: none + (0925) ; + (0926) ; SIDE EFFECTS: + (0927) ; The A and X registers may be modified by this or future implementations + (0928) ; of this function. The same is true for all RAM page pointer registers in + (0929) ; the Large Memory Model. When necessary, it is the calling function's + (0930) ; responsibility to preserve their values across calls to fastcall16 + (0931) ; functions. + (0932) ; + (0933) ; If LCD_Init is not called before this function, the + (0934) ; bargraph will not be drawn properly. + (0935) ; + (0936) ; Stack offset constants + (0937) BG_COLX: equ 0 ; Stack position of Column + (0938) BG_CHAR_LENX: equ -1 ; Stack position of Length + (0939) BG_LENGTHX: equ -2 ; Stack position of bargraph pointer position + (0940) + (0941) + (0942) LCD_DrawBG: + (0943) push X + (0944) mov X,[X+BG_COLX] ; Row in A, Col in X + (0945) call LCD_Position ; Set cursor position + (0946) pop X ; Restore pointer + (0947) + (0948) .LCD_BG_LOOP1X: + (0949) cmp [X+BG_LENGTHX],00h ; Check for past end of BG + (0950) jnz .LCD_CHECK1X + (0951) mov A,00h ; Load empty character + (0952) jmp .LCD_BG_DOITX ; + (0953) + (0954) .LCD_CHECK1X: + (0955) cmp [X+BG_LENGTHX],06h ; Check if BG pointer is at this character + (0956) jnc .LCD_CHECK2X ; Note yet, use full character + (0957) mov A,[X+BG_LENGTHX] + (0958) sub [X+BG_LENGTHX],A + (0959) jmp .LCD_BG_DOITX + (0960) + (0961) .LCD_CHECK2X: ; Put index to full character + (0962) mov A, 06h + (0963) sub [X+BG_LENGTHX],05h ; Subtract another 5 positions + (0964) + (0965) .LCD_BG_DOITX: + (0966) call LCD_WriteData ; Display BG character + (0967) + (0968) dec [X+BG_CHAR_LENX] ; Dec Char count + (0969) jnz .LCD_BG_LOOP1X ; Do it all over again + (0970) ret + (0971) .ENDSECTION + (0972) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + (0973) + (0974) .SECTION + (0975) ;----------------------------------------------------------------------------- + (0976) ; FUNCTION NAME: LCD_DrawBG + (0977) ; + (0978) ; DESCRIPTION: + (0979) ; Draw a horizontal bargraph on the LCD with the given parameters. + (0980) ; + (0981) ; + (0982) ;----------------------------------------------------------------------------- + (0983) ; + (0984) ; FASTCALL16 ARGUMENTS: + (0985) ; [SP-3] => Starting row for bargraph 0 to 3 + (0986) ; [SP-4] => Starting Column for bargraph 0 to 39+ + (0987) ; [SP-5] => Length of bargraph in chars 1 to 40+ + (0988) ; [SP-6] => Position of pointer in segments 5 times Length + (0989) ; + (0990) ; + (0991) ; RETURNS: none + (0992) ; + (0993) ; SIDE EFFECTS: + (0994) ; The A and X registers may be modified by this or future implementations + (0995) ; of this function. The same is true for all RAM page pointer registers in + (0996) ; the Large Memory Model. When necessary, it is the calling function's + (0997) ; responsibility to preserve their values across calls to fastcall16 + (0998) ; functions. + (0999) ; + (1000) ; Currently only the page pointer registers listed below are modified: + (1001) ; CUR_PP + (1002) ; + (1003) ; If LCD_Init is not called before this function, the + (1004) ; bargraph will not be drawn properly. + (1005) ; + (1006) ; Stack offset constants + (1007) BG_ROW: equ -3 + (1008) BG_COL: equ -4 ; Stack position of Column + (1009) BG_CHAR_LEN: equ -5 ; Stack position of Length + (1010) BG_LENGTH: equ -6 ; Stack position of bargraph pointer position + (1011) + (1012) + (1013) _LCD_DrawBG: + (1014) RAM_PROLOGUE RAM_USE_CLASS_2 +0622: 4F MOV X,SP (1015) mov X, SP +0623: 10 PUSH X (1016) push X +0624: 52 FD MOV A,[X-3] (1017) mov A,[X+BG_ROW] ; Row in A +0626: 59 FC MOV X,[X-4] (1018) mov X,[X+BG_COL] ; Col in X + (1019) RAM_EPILOGUE RAM_USE_CLASS_2 +0628: 9F CA CALL _LCD_Position (1020) call LCD_Position ; Set cursor position + (1021) RAM_PROLOGUE RAM_USE_CLASS_2 +062A: 20 POP X (1022) pop X + (1023) + (1024) .LCD_BG_LOOP1: +062B: 3D FA 00 CMP [X-6],0x0 (1025) cmp [X+BG_LENGTH],00h ; Check for past end of BG +062E: B0 05 JNZ 0x0634 (1026) jnz .LCD_CHECK1 +0630: 50 00 MOV A,0x0 (1027) mov A,00h ; Load empty character +0632: 80 11 JMP 0x0644 (1028) jmp .LCD_BG_DOIT ; + (1029) + (1030) .LCD_CHECK1: +0634: 3D FA 06 CMP [X-6],0x6 (1031) cmp [X+BG_LENGTH],06h ; Check if BG pointer is at this character +0637: D0 07 JNC 0x063F (1032) jnc .LCD_CHECK2 ; Note yet, use full character +0639: 52 FA MOV A,[X-6] (1033) mov A,[X+BG_LENGTH] +063B: 15 FA SUB [X-6],A (1034) sub [X+BG_LENGTH],A +063D: 80 06 JMP 0x0644 (1035) jmp .LCD_BG_DOIT + (1036) + (1037) .LCD_CHECK2: ; Put index to full character +063F: 50 06 MOV A,0x6 (1038) mov A, 06h +0641: 17 FA 05 SUB [X-6],0x5 (1039) sub [X+BG_LENGTH],05h ; Subtract another 5 positions + (1040) + (1041) .LCD_BG_DOIT: +0644: 9E 83 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(1042) call LCD_WriteData ; Display BG character + (1043) +0646: 7B FB DEC [X-5] (1044) dec [X+BG_CHAR_LEN] ; Dec Char count +0648: BF E2 JNZ 0x062B (1045) jnz .LCD_BG_LOOP1 ; Do it all over again + (1046) RAM_EPILOGUE RAM_USE_CLASS_2 +064A: 7F RET (1047) ret + (1048) .ENDSECTION + (1049) + (1050) IF SYSTEM_SMALL_MEMORY_MODEL + (1051) .SECTION + (1052) ;----------------------------------------------------------------------------- + (1053) ; FUNCTION NAME: LCD_DrawVBG + (1054) ; + (1055) ; DESCRIPTION: + (1056) ; This legacy fastcall version are provided only to support existing small + (1057) ; memory model assembly language code---it does not work in the large memory + (1058) ; model. + (1059) ; + (1060) ; ** This legacy fastcall version is provided on a temporary basis to + (1061) ; ** ease the transition to the 4.2 release of PSoC Designer. Its use is + (1062) ; ** deprecated and its status is "No Further Maintenance". If you call this + (1063) ; ** function in assembly you should convert to _LCD_DrawVBG + (1064) ; ** (with a leading underscore) and the fastcall16 interface + (1065) ; + (1066) ; Draw a vertical bargraph on the LCD with the given parameters. This + (1067) ; is a legacy function that is intended to support existing Assembly + (1068) ; language programs that call this function. This should not be used for + (1069) ; new code or with Large Memory Model programs. + (1070) ;----------------------------------------------------------------------------- + (1071) ; + (1072) ; LEGACY FASTCALL ARGUMENTS: + (1073) ; A => Starting row for bargraph 0 to 3 + (1074) ; [X] => Starting Column for bargraph 0 to 40+ + (1075) ; [x-1] => Height of bargraph in chars 1 - 4 + (1076) ; [X-2] => Position of pointer in segments 8 times height + (1077) ; RETURNS: + (1078) ; + (1079) ; SIDE EFFECTS: + (1080) ; The A and X registers may be modified by this or future implementations + (1081) ; of this function. The same is true for all RAM page pointer registers in + (1082) ; the Large Memory Model. When necessary, it is the calling function's + (1083) ; responsibility to preserve their values across calls to fastcall16 + (1084) ; functions. + (1085) ; + (1086) ; If LCD_Init is not called before this function, the + (1087) ; bargraph will not be drawn properly. + (1088) ; + (1089) ; Stack offset constants + (1090) VBG_COLX: equ 0 + (1091) VBG_CHAR_HEIGHTX: equ -1 + (1092) VBG_SEG_HEIGHTX: equ -2 + (1093) + (1094) LCD_DrawVBG: + (1095) + (1096) and A,03h ; Make sure only rows 0 - 3 are valid + (1097) .VBG_LOOPX: + (1098) push A + (1099) index LCD_ROW_OFFSET ; Get row offset + (1100) add A,[X+VBG_COLX] ; Add column offset to position + (1101) call LCD_Control ; Position Cursor + (1102) cmp [X+VBG_SEG_HEIGHTX],00h ; Check for zero segs + (1103) jnz .VBG_NZ_SEGX + (1104) mov A,' ' ; Load space character + (1105) jmp .VBG_WRITE_CHARX + (1106) .VBG_NZ_SEGX: + (1107) cmp [X+VBG_SEG_HEIGHTX],09h ; Check for full segment + (1108) jnc .VBG_FULL_SEGX + (1109) ; Partial segment between 1 and 8 + (1110) mov A,[X+VBG_SEG_HEIGHTX] + (1111) dec A + (1112) mov [X+VBG_SEG_HEIGHTX],00h ; Zero segment height + (1113) jmp .VBG_WRITE_CHARX + (1114) + (1115) .VBG_FULL_SEGX: ; Bargaph + (1116) sub [X+VBG_SEG_HEIGHTX],08h ; Subtract full segment + (1117) mov A,07h ; Load full segment + (1118) + (1119) .VBG_WRITE_CHARX: ; Write character to display + (1120) call LCD_WriteData ; Write value + (1121) pop A + (1122) dec A + (1123) dec [X+VBG_CHAR_HEIGHTX] + (1124) jnz .VBG_LOOPX + (1125) ret + (1126) .ENDSECTION + (1127) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL + (1128) + (1129) .SECTION + (1130) ;----------------------------------------------------------------------------- + (1131) ; FUNCTION NAME: LCD_DrawVBG + (1132) ; + (1133) ; DESCRIPTION: + (1134) ; Draw a vertical bargraph on the LCD with the given parameters. + (1135) ; + (1136) ; + (1137) ;----------------------------------------------------------------------------- + (1138) ; + (1139) ; FASTCALL16 ARGUMENTS: + (1140) ; + (1141) ; [SP-3] => Starting row for bargraph 0 to 3 + (1142) ; [SP-4] => Starting Column for bargraph 0 to 40+ + (1143) ; [SP-5] => Height of bargraph in chars 1 - 4 + (1144) ; [SP-6] => Position of pointer in segments 8 times height + (1145) ; RETURNS: + (1146) ; + (1147) ; SIDE EFFECTS: + (1148) ; The A and X registers may be modified by this or future implementations + (1149) ; of this function. The same is true for all RAM page pointer registers in + (1150) ; the Large Memory Model. When necessary, it is the calling function's + (1151) ; responsibility to preserve their values across calls to fastcall16 + (1152) ; functions. + (1153) ; + (1154) ; Currently only the page pointer registers listed below are modified: + (1155) ; CUR_PP + (1156) ; + (1157) ; If LCD_Init is not called before this function, the + (1158) ; bargraph will not be drawn properly. + (1159) ; + (1160) ; Stack offset constants + (1161) VBG_ROW: equ -3 + (1162) VBG_COL: equ -4 + (1163) VBG_CHAR_HEIGHT: equ -5 + (1164) VBG_SEG_HEIGHT: equ -6 + (1165) + (1166) _LCD_DrawVBG: + (1167) RAM_PROLOGUE RAM_USE_CLASS_2 + (1168) mov X, SP + (1169) mov A, [X+VBG_ROW] + (1170) and A,03h ; Make sure only rows 0 - 3 are valid + (1171) .VBG_LOOP: + (1172) push A + (1173) index LCD_ROW_OFFSET ; Get row offset + (1174) add A,[X+VBG_COL] ; Add column offset to position + (1175) call LCD_Control ; Position Cursor + (1176) cmp [X+VBG_SEG_HEIGHT],00h ; Check for zero segs + (1177) jnz .VBG_NZ_SEG + (1178) mov A,' ' ; Load space character + (1179) jmp .VBG_WRITE_CHAR + (1180) .VBG_NZ_SEG: + (1181) cmp [X+VBG_SEG_HEIGHT],09h ; Check for full segment + (1182) jnc .VBG_FULL_SEG + (1183) ; Partial segment between 1 and 8 + (1184) mov A,[X+VBG_SEG_HEIGHT] + (1185) dec A + (1186) mov [X+VBG_SEG_HEIGHT],00h ; Zero segment height + (1187) jmp .VBG_WRITE_CHAR + (1188) + (1189) .VBG_FULL_SEG: ; Bargaph + (1190) sub [X+VBG_SEG_HEIGHT],08h ; Subtract full segment + (1191) mov A,07h ; Load full segment + (1192) + (1193) .VBG_WRITE_CHAR: ; Write character to display + (1194) call LCD_WriteData ; Write value + (1195) pop A + (1196) dec A + (1197) dec [X+VBG_CHAR_HEIGHT] + (1198) jnz .VBG_LOOP + (1199) RAM_EPILOGUE RAM_USE_CLASS_2 + (1200) ret + (1201) .ENDSECTION + (1202) + (1203) .SECTION + (1204) ;----------------------------------------------------------------------------- + (1205) ; FUNCTION NAME: LCD_InitVBG + (1206) ; + (1207) ; DESCRIPTION: + (1208) ; Initialize the vertical bargraph characters. + (1209) ; + (1210) ;----------------------------------------------------------------------------- + (1211) ; + (1212) ; ARGUMENTS: none + (1213) ; + (1214) ; RETURNS: none + (1215) ; + (1216) ; SIDE EFFECTS: + (1217) ; REGISTERS ARE VOLATILE: THE A AND X REGISTERS MAY BE MODIFIED! + (1218) ; Only one type of bargraph (horizontal or vertical) may be used + (1219) ; at a time since they each require their own set of characters. + (1220) ; + (1221) ; SIDE EFFECTS: + (1222) ; The A and X registers may be modified by this or future implementations + (1223) ; of this function. The same is true for all RAM page pointer registers in + (1224) ; the Large Memory Model. When necessary, it is the calling function's + (1225) ; responsibility to preserve their values across calls to fastcall16 + (1226) ; functions. + (1227) ; + (1228) ; Currently only the page pointer registers listed below are modified: + (1229) ; CUR_PP + (1230) ; + (1231) ; Stack offset constants + (1232) VBGDATA_CTR: equ 00h ; Char data count stack offset + (1233) VBG_BYTES: equ 01h ; Byte counter stack offset + (1234) + (1235) LCD_InitVBG: + (1236) _LCD_InitVBG: + (1237) RAM_PROLOGUE RAM_USE_CLASS_2 + (1238) mov X,SP ; Get location of stack + (1239) push A ; Create 2 locations + (1240) push A + (1241) + (1242) mov A,LCD_CG_RAM_OFFSET ; Setup pointer + (1243) call LCD_Control ; Position the CG pointer + (1244) mov [X+VBGDATA_CTR],01h ; Reset data counter + (1245) + (1246) .VBG_Loop1: ; loop once for each 8 characters + (1247) mov [X+VBG_BYTES],08h ; Load cycle pointer + (1248) .VBG_Loop2: ; Loop once for each line in character (8 times) + (1249) mov A,[X+VBGDATA_CTR] + (1250) cmp A,[X+VBG_BYTES] + (1251) jnc .VBG_SOLID + (1252) mov A,00h ; Empty line + (1253) jmp .VBG_Load ; Jump to load the bargraph + (1254) .VBG_SOLID: + (1255) mov A,FFh ; Load solid line + (1256) .VBG_Load: + (1257) call LCD_WriteData ; character data + (1258) dec [X+VBG_BYTES] ; Dec byte counter + (1259) jnz .VBG_Loop2 ; End Loop 2 + (1260) inc [X+VBGDATA_CTR] + (1261) cmp [X+VBGDATA_CTR],09h + (1262) jnz .VBG_Loop1 ; End Loop1 + (1263) + (1264) pop A + (1265) pop A + (1266) mov A,LCD_DISP_ON ; Turn on display, don't really + (1267) call LCD_Control ; need this. + (1268) RAM_EPILOGUE RAM_USE_CLASS_2 + (1269) ret + (1270) .ENDSECTION + (1271) + (1272) ;----------------------------------------------------------------------------- + (1273) ; FUNCTION NAME: LCD_InitBG + (1274) ; + (1275) ; DESCRIPTION: + (1276) ; Initialize horizontal bargraph characters + (1277) ; + (1278) ;----------------------------------------------------------------------------- + (1279) ; + (1280) ; ARGUMENTS: + (1281) ; A = type 0 = full |||||||||........ + (1282) ; 1 = single vertical line ..........|...... + (1283) ; + (1284) ; RETURNS: + (1285) ; + (1286) ; SIDE EFFECTS: + (1287) ; The A and X registers may be modified by this or future implementations + (1288) ; of this function. The same is true for all RAM page pointer registers in + (1289) ; the Large Memory Model. When necessary, it is the calling function's + (1290) ; responsibility to preserve their values across calls to fastcall16 + (1291) ; functions. + (1292) ; + (1293) ; Currently only the page pointer registers listed below are modified: + (1294) ; CUR_PP + (1295) ; + (1296) ; Only one type of bargraph (horizontal or vertical) may be used + (1297) ; at a time since they each require their own set of characters. + (1298) ; + (1299) ; THEORY of OPERATION or PROCEDURE: + (1300) ; This function writes to the LCD character RAM to generate 8 custom + (1301) ; characters used to generated one of two horizontal bargraphs. + (1302) ; + (1303) .LITERAL + (1304) LCD_BG_TYPE1:: ; ....., |...., ||..., |||.., ||||., |||||, ||||| + (1305) DB 00h, 10h, 18h, 1Ch, 1Eh, 1Fh, 1Fh + (1306) LCD_BG_TYPE2:: ; ....., |...., .|..., ..|.., ...|., ....|, ..... + (1307) DB 00h, 10h, 08h, 04h, 02h, 01h, 00h + (1308) .ENDLITERAL + (1309) + (1310) .SECTION + (1311) ; Stack offset constants + (1312) BGDATA_PTR: equ 00h ; Stack offsets + (1313) BGCHARS: equ 01h + (1314) BGTYPE: equ 02h + (1315) + (1316) LCD_InitBG: + (1317) _LCD_InitBG: + (1318) RAM_PROLOGUE RAM_USE_CLASS_2 +0659: 4F MOV X,SP (1319) mov X,SP ; Get location of stack +065A: 38 03 ADD SP,0x3 (1320) add SP,3 +065C: 54 02 MOV [X+2],A (1321) mov [X+BGTYPE],A ; Store the bargraph type + (1322) +065E: 50 40 MOV A,0x40 (1323) mov A,LCD_CG_RAM_OFFSET ; Setup pointer +0660: 9E 7B CALL _LCD_Control (1324) call LCD_Control ; Position the CG pointer +0662: 56 00 00 MOV [X+0],0x0 (1325) mov [X+BGDATA_PTR],00h ; Reset pointer to BG data + (1326) + (1327) .BG_Loop1: +0665: 56 01 08 MOV [X+1],0x8 (1328) mov [X+BGCHARS],08h ; Load cycle pointer + (1329) .BG_Loop2: +0668: 52 00 MOV A,[X+0] (1330) mov A,[X+BGDATA_PTR] +066A: 3D 02 00 CMP [X+2],0x0 (1331) cmp [X+BGTYPE],00h ; Check which bargraph +066D: B0 05 JNZ 0x0673 (1332) jnz .BG_OTHER +066F: FF DA INDEX LCD_BG_TYPE1|_LCD_InitVBG(1333) index LCD_BG_TYPE1 +0671: 80 03 JMP 0x0675 (1334) jmp .BG_Load + (1335) .BG_OTHER: +0673: FF DD INDEX LCD_BG_TYPE2 (1336) index LCD_BG_TYPE2 + (1337) .BG_Load: +0675: 9E 52 CALL LCD_WriteData|LCD_Write_Data|_LCD_WriteData|_LCD_Write_Data(1338) call LCD_WriteData +0677: 7B 01 DEC [X+1] (1339) dec [X+BGCHARS] ; Character builder counter +0679: BF EE JNZ 0x0668 (1340) jnz .BG_Loop2 +067B: 77 00 INC [X+0] (1341) inc [X+BGDATA_PTR] ; Advance to next character +067D: 3D 00 07 CMP [X+0],0x7 (1342) cmp [X+BGDATA_PTR],07h +0680: BF E4 JNZ 0x0665 (1343) jnz .BG_Loop1 + (1344) +0682: 38 FD ADD SP,0xFD (1345) add SP,-3 +0684: 50 0C MOV A,0xC (1346) mov A,LCD_DISP_ON +0686: 9E 55 CALL _LCD_Control (1347) call LCD_Control + (1348) RAM_EPILOGUE RAM_USE_CLASS_2 +0688: 7F RET (1349) ret + (1350) .ENDSECTION + (1351) + (1352) ENDIF + (1353) + (1354) ; End of File LCD.asm +FILE: lib\insamp.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: INSAMP.asm + (0004) ;; Version: 2.2, Updated on 2015/3/4 at 22:26:35 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: + (0008) ;; Assembler source code for a two-OpAmp Instrumentation Amplifier + (0009) ;; topology in the 25/26xxx family of PSoC devices + (0010) ;; + (0011) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0012) ;; arguments and observe the associated "Registers are volatile" policy. + (0013) ;; This means it is the caller's responsibility to preserve any values + (0014) ;; in the X and A registers that are still needed after the API functions + (0015) ;; returns. For Large Memory Model devices it is also the caller's + (0016) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0017) ;; MVW_PP registers. Even though some of these registers may not be modified + (0018) ;; now, there is no guarantee that will remain the case in future releases. + (0019) ;;----------------------------------------------------------------------------- + (0020) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0021) ;;***************************************************************************** + (0022) ;;***************************************************************************** + (0023) + (0024) include "m8c.inc" + (0025) include "memory.inc" + (0026) include "INSAMP.inc" + (0027) + (0028) ;----------------------------------------------- + (0029) ; Global Symbols + (0030) ;----------------------------------------------- + (0031) + (0032) export INSAMP_Start + (0033) export _INSAMP_Start + (0034) export INSAMP_SetPower + (0035) export _INSAMP_SetPower + (0036) + (0037) export INSAMP_SetGain + (0038) export _INSAMP_SetGain + (0039) + (0040) export INSAMP_Stop + (0041) export _INSAMP_Stop + (0042) + (0043) + (0044) AREA bss (RAM,REL) + (0045) + (0046) ;----------------------------------------------- + (0047) ; Constant Definitions + (0048) ;----------------------------------------------- + (0049) + (0050) POWERMASK: equ 0x03 ; Power field mask for CR2 + (0051) GAINMASK: equ F0h ; Gain field mask for CR0 + (0052) + (0053) + (0054) ;----------------------------------------------- + (0055) ; Variable Allocation + (0056) ;----------------------------------------------- + (0057) + (0058) + (0059) AREA UserModules (ROM, REL) + (0060) + (0061) .SECTION + (0062) ;----------------------------------------------------------------------------- + (0063) ; FUNCTION NAME: INSAMP_Start + (0064) ; FUNCTION NAME: INSAMP_Setpower + (0065) ; + (0066) ; DESCRIPTION: + (0067) ; Sets power to the analog blocks used in this module. All three blocks + (0068) ; are set to the same power setting (which should be the same as the + (0069) ; analog reference power global parameter for best operation!). Constants + (0070) ; for proper values are defined in asm and C interface files. + (0071) ;----------------------------------------------------------------------------- + (0072) ; + (0073) ; ARGUMENTS: fastcall16 BYTE bPowerSetting in the A register + (0074) ; RETURNS: Nothing + (0075) ; SIDE EFFECTS: + (0076) ; The A and X registers may be modified by this or future implementations + (0077) ; of this function. The same is true for all RAM page pointer registers in + (0078) ; the Large Memory Model. When necessary, it is the calling function's + (0079) ; responsibility to perserve their values across calls to fastcall16 + (0080) ; functions. + (0081) ; + (0082) INSAMP_Start: + (0083) _INSAMP_Start: + (0084) INSAMP_SetPower: + (0085) _INSAMP_SetPower: + (0086) RAM_PROLOGUE RAM_USE_CLASS_2 + (0087) +0689: 21 03 AND A,0x3 (0088) and A, POWERMASK ; mask A to protect unchanged bits +068B: 4F MOV X,SP (0089) mov X, SP ; define temp store location + (0090) +068C: 08 PUSH A (0091) push A ; put power value in temp store +068D: 5D 73 MOV A,REG[0x73] (0092) mov A, reg[INSAMP_INV_CR2] ; read power value +068F: 21 FC AND A,0xFC (0093) and A, ~POWERMASK ; clear power bits in A +0691: 2B 00 OR A,[X+0] (0094) or A, [X] ; combine power value with balance of reg. +0693: 60 73 MOV REG[0x73],A (0095) mov reg[INSAMP_INV_CR2], A + (0096) +0695: 5D 77 MOV A,REG[0x77] (0097) mov A, reg[INSAMP_NON_INV_CR2] ; read power value +0697: 21 FC AND A,0xFC (0098) and A, ~POWERMASK ; clear power bits in A +0699: 2B 00 OR A,[X+0] (0099) or A, [X] ; combine power value with balance of reg. +069B: 60 77 MOV REG[0x77],A (0100) mov reg[INSAMP_NON_INV_CR2], A +069D: 18 POP A (0101) pop A + (0102) RAM_EPILOGUE RAM_USE_CLASS_2 +069E: 7F RET (0103) ret + (0104) + (0105) .ENDSECTION + (0106) + (0107) .SECTION + (0108) ;----------------------------------------------------------------------------- + (0109) ; FUNCTION NAME: INSAMP_SetGain + (0110) ; + (0111) ; DESCRIPTION: + (0112) ; Applies gain set values to the module's PSoC blocks + (0113) ; + (0114) ;----------------------------------------------------------------------------- + (0115) ; + (0116) ; ARGUMENTS: fastcall16 BYTE bGain in the A register + (0117) ; RETURNS: Nothing + (0118) ; SIDE EFFECTS: + (0119) ; The A and X registers may be modified by this or future implementations + (0120) ; of this function. The same is true for all RAM page pointer registers in + (0121) ; the Large Memory Model. When necessary, it is the calling function's + (0122) ; responsibility to perserve their values across calls to fastcall16 + (0123) ; functions. + (0124) ; + (0125) ; THEORY of OPERATION or PROCEDURE: + (0126) ; The A register contains the gain setting per values in .inc file. + (0127) ; Values in range of 00h to 07h, upper 4 bits only. + (0128) ; Gain value applied to NON_INV block. + (0129) ; Difference (E0h-gain value) applied to _INV block. + (0130) ; + (0131) INSAMP_SetGain: + (0132) _INSAMP_SetGain: + (0133) RAM_PROLOGUE RAM_USE_CLASS_2 + (0134) and A, GAINMASK ; mask A to protect unchanged bits + (0135) mov X, SP ; set base address for local variable + (0136) + (0137) push A + (0138) mov A, reg[INSAMP_NON_INV_CR0] ; read gain value + (0139) and A, ~GAINMASK ; clear gain bits in A + (0140) or A, [X] ; combine gain value with balance of reg. + (0141) mov reg[INSAMP_NON_INV_CR0], A + (0142) + (0143) mov A, E0h ; load gain complement value + (0144) sub a, [X] ; calculate gain value for -INV block + (0145) push A + (0146) mov A, reg[INSAMP_INV_CR0] ; read gain complement value + (0147) and A, ~GAINMASK ; clear gain bits in A + (0148) or A, [X+1] ; combine gain value with balance of reg. + (0149) mov reg[INSAMP_INV_CR0], A + (0150) pop A + (0151) pop A + (0152) RAM_EPILOGUE RAM_USE_CLASS_2 + (0153) ret + (0154) + (0155) + (0156) .ENDSECTION + (0157) + (0158) .SECTION + (0159) ;----------------------------------------------------------------------------- + (0160) ; FUNCTION NAME: INSAMP_Stop + (0161) ; + (0162) ; DESCRIPTION: Turns off power to the two CT blocks + (0163) ;----------------------------------------------------------------------------- + (0164) ; + (0165) ; ARGUMENTS: None + (0166) ; RETURNS: Nothing + (0167) ; SIDE EFFECTS: + (0168) ; The A and X registers may be modified by this or future implementations + (0169) ; of this function. The same is true for all RAM page pointer registers in + (0170) ; the Large Memory Model. When necessary, it is the calling function's + (0171) ; responsibility to perserve their values across calls to fastcall16 + (0172) ; functions. + (0173) ; + (0174) INSAMP_Stop: + (0175) _INSAMP_Stop: + (0176) RAM_PROLOGUE RAM_USE_CLASS_1 + (0177) and reg[INSAMP_NON_INV_CR2], ~POWERMASK + (0178) and reg[INSAMP_INV_CR2], ~POWERMASK + (0179) RAM_EPILOGUE RAM_USE_CLASS_1 + (0180) ret + (0181) + (0182) .ENDSECTION + (0183) + (0184) ; End of File INSAMP.asm +FILE: lib\dac9_ia.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: DAC9_Ia.asm + (0004) ;; Version: 2.2, Updated on 2015/3/4 at 22:25:15 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: DAC9 User Module software inplementation file. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "DAC9_Ia.inc" + (0023) include "m8c.inc" + (0024) include "memory.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) export DAC9_Ia_Start + (0030) export _DAC9_Ia_Start + (0031) export DAC9_Ia_SetPower + (0032) export _DAC9_Ia_SetPower + (0033) + (0034) export DAC9_Ia_WriteBlind + (0035) export _DAC9_Ia_WriteBlind + (0036) export DAC9_Ia_WriteBlind2B + (0037) export _DAC9_Ia_WriteBlind2B + (0038) + (0039) export DAC9_Ia_WriteStall + (0040) export _DAC9_Ia_WriteStall + (0041) export DAC9_Ia_WriteStall2B + (0042) export _DAC9_Ia_WriteStall2B + (0043) + (0044) export DAC9_Ia_Stop + (0045) export _DAC9_Ia_Stop + (0046) + (0047) ;; ----------------------------------------------------------------- + (0048) ;; Register Definitions + (0049) ;; ----------------------------------------------------------------- + (0050) ;; + (0051) ;; Uses 2 Switched Cap Blocks, LSB and MSB, configured as shown below. + (0052) ;; This API depends on knowing the exact personalization of CR0 + (0053) ;; and CR3 bitfields for time efficiency. + (0054) ;; + (0055) ;; * For a Mask/Val pair this simply indicates that the value is + (0056) ;; determined by the user either through config-time parameteriza- + (0057) ;; tion or run-time manipulation. + (0058) ;; + (0059) ;; Setting for output=AGND to OBUS when LSB in ASA10 and MSB in ASB20: + (0060) ;; LSB.CR0=80 MSB.CR0=80 + (0061) ;; LSB.CR1=40 MSB.CR1=81 + (0062) ;; LSB.CR2=20 MSB.CR2=A0 + (0063) ;; LSB.CR3=33 MSB.CR3=3B + (0064) ;; + (0065) ;; BIT FIELD Mask/Val Function + (0066) ;; ----------------- -------- -------------------- + (0067) ;; LSB.CR0.FCap 80/1 Feedback cap size 32 + (0068) ;; LSB.CR0.ClockPhase 40/0 Normal phase + (0069) ;; LSB.CR0.ASign 20/* User parameter + (0070) ;; LSB.CR0.ACap 1F/* User parameter + (0071) ;; + (0072) ;; LSB.CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care + (0073) ;; LSB.CR1.BCap 1F/0 Prune B-input branch + (0074) ;; + (0075) ;; LSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable + (0076) ;; LSB.CR2.CmpBus 40/0 Comparator Bus Disabled + (0077) ;; LSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 + (0078) ;; LSB.CR2.CCap 1F/0 Prune C-input branch + (0079) ;; + (0080) ;; LSB.CR3.ARefSelect C0/0 Use AGND (to invert) + (0081) ;; LSB.CR3.FSW1 20/1 Feedback Cap Used + (0082) ;; LSB.CR3.FSW0 10/1 Feedback Cap Grounded for AZ + (0083) ;; LSB.CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned + (0084) ;; LSB.CR3.PWR 03/* User Parameter: Power; default=OFF + (0085) ;; + (0086) ;; MSB.CR0.FCap 80/1 Feedback cap size 32 + (0087) ;; MSB.CR0.ClockPhase 40/0 Normal phase + (0088) ;; MSB.CR0.ASign 20/* User parameter + (0089) ;; MSB.CR0.ACap 1F/* User parameter + (0090) ;; + (0091) ;; MSB.CR1.AMux E0/4 (SCB) VRef High + (0092) ;; MSB.CR1.BCap 1F/1 Subrange LSB block output by BCap/FCap (1/32) + (0093) ;; + (0094) ;; MSB.CR2.AnalogBus 80/* User Parameter: Output Bus Enable + (0095) ;; MSB.CR2.CmpBus 40/0 Comparator Bus Disable + (0096) ;; MSB.CR2.AutoZero 20/1 Auto-Zero enabled on internal Phi 1 + (0097) ;; MSB.CR2.CCap 1F/0 Prune C-input branch + (0098) ;; + (0099) ;; MSB.CR3.ARefSelect C0/0 Use AGND (to invert) + (0100) ;; MSB.CR3.FSW1 20/1 Feedback Cap Used + (0101) ;; MSB.CR3.FSW2 10/1 Feedback Cap Grounded for AZ + (0102) ;; MSB.CR3.BSW 08/0 (SCB) why is this cont time instead of phi2?? + (0103) ;; MSB.CR3.BMux 04/? (SCB) LSB block output; determined by placement + (0104) ;; MSB.CR3.PWR 03/* User Parameter: Power, default=OFF + (0105) + (0106) ;----------------------------------------------- + (0107) ; Constant Definitions + (0108) ;----------------------------------------------- + (0109) iOFFSET: equ 255 ; Conversion term for offset binary to 2's C + (0110) bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg + (0111) bCR3: equ 30h ; Except for power bits, CR3 always looks like + (0112) ; this regardless of SC block type or location. + (0113) bSMMASK: equ 3Fh ; Sign and Magnitude bits mask + (0114) bSIGNMASK: equ 20h ; Sign bit mask + (0115) bMAGMASK: equ 1Fh ; Magnitude bits mask + (0116) bHIGHBITS: equ 80h ; Setting for FCap and ClockPhase + (0117) bHBMASK: equ C0h ; Mask for FCap and ClockPhase + (0118) + (0119) + (0120) ;;--------------------------- + (0121) macro Stall + (0122) ;;--------------------------- + (0123) mov reg[ASY_CR], 1 + (0124) endm + (0125) + (0126) ;;--------------------------- + (0127) macro UnStall + (0128) ;;--------------------------- + (0129) mov reg[ASY_CR], 0 + (0130) endm + (0131) + (0132) AREA UserModules (ROM, REL) + (0133) + (0134) .SECTION + (0135) ;----------------------------------------------------------------------------- + (0136) ; FUNCTION NAME: DAC9_Ia_Start + (0137) ; FUNCTION NAME: DAC9_Ia_SetPower + (0138) ; + (0139) ; DESCRIPTION: + (0140) ; Applies power setting to the module's analog PSoC blocks. + (0141) ; + (0142) ;----------------------------------------------------------------------------- + (0143) ; + (0144) ; ARGUMENTS: + (0145) ; A contains the power setting 0=Off, 1=Low, 2=Med, 3=Full. + (0146) ; + (0147) ; RETURNS: none + (0148) ; + (0149) ; SIDE EFFECTS: + (0150) ; The A and X registers may be modified by this or future implementations + (0151) ; of this function. The same is true for all RAM page pointer registers in + (0152) ; the Large Memory Model. When necessary, it is the calling function's + (0153) ; responsibility to perserve their values across calls to fastcall16 + (0154) ; functions. + (0155) ; + (0156) DAC9_Ia_Start: + (0157) _DAC9_Ia_Start: + (0158) DAC9_Ia_SetPower: + (0159) _DAC9_Ia_SetPower: + (0160) RAM_PROLOGUE RAM_USE_CLASS_2 +069F: 21 03 AND A,0x3 (0161) and A, bPWRMASK ; trim input to bits of interest +06A1: 4F MOV X,SP (0162) mov X, SP ; Set stack frame pointer +06A2: 08 PUSH A (0163) push A + (0164) ;; read CR3 registers, modify power bits & write back +06A3: 5D 97 MOV A,REG[0x97] (0165) mov A, reg[DAC9_Ia_MSB_CR3] +06A5: 21 FC AND A,0xFC (0166) and a, ~bPWRMASK ; clear old setting +06A7: 2B 00 OR A,[X+0] (0167) or A, [X] ; set power in MSB register image +06A9: 60 97 MOV REG[0x97],A (0168) mov reg[DAC9_Ia_MSB_CR3], A +06AB: 5D 93 MOV A,REG[0x93] (0169) mov A, reg[DAC9_Ia_LSB_CR3] +06AD: 21 FC AND A,0xFC (0170) and a, ~bPWRMASK ; clear old setting +06AF: 2B 00 OR A,[X+0] (0171) or A, [X] ; set power in LSB register image +06B1: 60 93 MOV REG[0x93],A (0172) mov reg[DAC9_Ia_LSB_CR3], A +06B3: 18 POP A (0173) pop A + (0174) RAM_EPILOGUE RAM_USE_CLASS_2 +06B4: 7F RET (0175) ret + (0176) .ENDSECTION + (0177) + (0178) .SECTION + (0179) ;----------------------------------------------------------------------------- + (0180) ; FUNCTION NAME: DAC9_Ia_WriteBlind + (0181) ; FUNCTION NAME: DAC9_Ia_WriteBlind2B + (0182) ; + (0183) ; DESCRIPTION: + (0184) ; Modify the DAC's update value without worrying about the clocks. + (0185) ; Lowest overhead, but may cause glitches on the output. + (0186) ; + (0187) ;----------------------------------------------------------------------------- + (0188) ; + (0189) ; ARGUMENTS: + (0190) ; A contains the update value if data format is offset binary or + (0191) ; For offset binary format: A contains the low byte; X the high byte. + (0192) ; For twos complement format: A contains the low byte; X the high byte. + (0193) ; For two-byte sign-and-magnitude format: + (0194) ; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, + (0195) ; where t=s\ (the inverted sign). + (0196) ; + (0197) ; RETURNS: + (0198) ; + (0199) ; SIDE EFFECTS: + (0200) ; The A and X registers may be modified by this or future implementations + (0201) ; of this function. The same is true for all RAM page pointer registers in + (0202) ; the Large Memory Model. When necessary, it is the calling function's + (0203) ; responsibility to perserve their values across calls to fastcall16 + (0204) ; functions. + (0205) ; + (0206) DAC9_Ia_WriteBlind: + (0207) _DAC9_Ia_WriteBlind: + (0208) + (0209) RAM_PROLOGUE RAM_USE_CLASS_2 + (0210) IF DAC9_Ia_OFFSETBINARY + (0211) ;; Data is an unsigned byte value in [0..510] (511 unique values). + (0212) ;; Following converts it to 2's complement: + (0213) sub A, iOFFSET + (0214) swap A, X ; A <- upper, X <- lower + (0215) sbb A, 0 + (0216) swap A, X ; A <- lower, X <- upper + (0217) ENDIF + (0218) + (0219) IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT + (0220) swap A, X ; A <- upper, X <- lower + (0221) push A ; Save Sign on stack - referenced using [X-N] + (0222) ; Sign is either FFh or 00h + (0223) dec A ; set or clear Carry Flag + (0224) ; A is now FEh(CF=0) or FFh(CF=1) + (0225) mov A,X ; MSB: 76543210 + (0226) jc BlindAdjustCycles + (0227) cpl A ; change negative magnitude to positive + (0228) inc A ; offset for twos complement + (0229) jmp BlindMagSet + (0230) BlindAdjustCycles: + (0231) cpl A ; make cycles used for positive same as + (0232) cpl A ; cycles used for negative + (0233) jmp BlindMagSet + (0234) BlindMagSet: + (0235) push A ; MSB: 76543210 (mag) + (0236) asr A ; MSB: 77654321 + (0237) asr A ; MSB: 77765432 + (0238) asr A ; MSB: 77776543 + (0239) and A,bMAGMASK ; MSB: 00076543 + (0240) mov X,SP + (0241) and [X-2],bSIGNMASK + (0242) or A,[X-2] ; MSB: 00s76543 + (0243) mov X,A ; MSB + (0244) pop A ; LSB: 76543210 (mag) + (0245) push X ; MSB + (0246) asl A ; LSB: 65432100 + (0247) asl A ; LSB: 54321000 + (0248) and A,bMAGMASK ; LSB: 00021000 + (0249) mov X,SP + (0250) or A,[X-2] ; LSB: 00s21000 + (0251) xor A,bSIGNMASK ; LSB: 00t21000 + (0252) ; LSB in A + (0253) pop X ; MSB in X + (0254) add SP, -1 ; clean up stack - from saving the sign + (0255) + (0256) ENDIF + (0257) + (0258) DAC9_Ia_WriteBlind2B: + (0259) _DAC9_Ia_WriteBlind2B: + (0260) ; IF DAC9_Ia_SIGNANDMAGNITUDE + (0261) or A,bHIGHBITS ; LSB: 10t21000 + (0262) swap A,X ; LSB in X, MSB in A + (0263) or A,bHIGHBITS ; MSB: 10s76543 + (0264) mov reg[DAC9_Ia_MSB_CR0],A + (0265) mov A,X ; LSB in A + (0266) mov reg[DAC9_Ia_LSB_CR0],A + (0267) ; ENDIF + (0268) + (0269) RAM_EPILOGUE RAM_USE_CLASS_2 + (0270) ret + (0271) .ENDSECTION + (0272) + (0273) .SECTION + (0274) ;----------------------------------------------------------------------------- + (0275) ; FUNCTION NAME: DAC9_Ia_WriteStall + (0276) ; FUNCTION NAME: DAC9_Ia_WriteStall2B + (0277) ; + (0278) ; DESCRIPTION: + (0279) ; Modify the DAC's update value, stalling the CPU if necessary. + (0280) ; This routine should be used with faster analog clocks or when the + (0281) ; effect of prolonging interrupt latencies can be safely tolerated. + (0282) ; + (0283) ;----------------------------------------------------------------------------- + (0284) ; + (0285) ; ARGUMENTS: + (0286) ; A contains the update value if data format is offset binary or + (0287) ; For offset binary format: A contains the low byte; X the high byte. + (0288) ; For twos complement format: A contains the low byte; X the high byte. + (0289) ; For two-byte sign-and-magnitude format: + (0290) ; A contains the LSB as 00smmmmm; X contains the MSB as 00tmmm00, + (0291) ; where t=s\ (the inverted sign). + (0292) ; + (0293) ; RETURNS: none + (0294) ; + (0295) ; SIDE EFFECTS: + (0296) ; The A and X registers may be modified by this or future implementations + (0297) ; of this function. The same is true for all RAM page pointer registers in + (0298) ; the Large Memory Model. When necessary, it is the calling function's + (0299) ; responsibility to perserve their values across calls to fastcall16 + (0300) ; functions. + (0301) ; + (0302) DAC9_Ia_WriteStall: + (0303) _DAC9_Ia_WriteStall: + (0304) + (0305) RAM_PROLOGUE RAM_USE_CLASS_2 + (0306) IF DAC9_Ia_OFFSETBINARY + (0307) ;; Data is an unsigned byte value in [0..510] (511 unique values). + (0308) ;; Following converts it to 2's complement: +06B5: 11 FF SUB A,0xFF (0309) sub A, iOFFSET +06B7: 4B SWAP A,X (0310) swap A, X ; A <- upper, X <- lower +06B8: 19 00 SBB A,0x0 (0311) sbb A, 0 +06BA: 4B SWAP A,X (0312) swap A, X ; A <- lower, X <- upper + (0313) ENDIF + (0314) + (0315) IF DAC9_Ia_OFFSETBINARY | DAC9_Ia_TWOSCOMPLEMENT +06BB: 4B SWAP A,X (0316) swap A, X ; A <- upper, X <- lower +06BC: 08 PUSH A (0317) push A ; Save Sign on stack - referenced via [X-N] + (0318) ; Sign is either FFh or 00h +06BD: 78 DEC A (0319) dec A ; set or clear Carry Flag + (0320) ; A is now FEh(CF=0) or FFh(CF=1) +06BE: 5B MOV A,X (0321) mov A,X ; MSB: 76543210 +06BF: C0 05 JC 0x06C5 (0322) jc StallAdjustCycles +06C1: 73 CPL A (0323) cpl A ; change negative magnitude to positive +06C2: 74 INC A (0324) inc A ; offset for twos complement +06C3: 80 05 JMP 0x06C9 (0325) jmp StallMagSet + (0326) StallAdjustCycles: +06C5: 73 CPL A (0327) cpl A ; make cycles used for positive same as +06C6: 73 CPL A (0328) cpl A ; cycles used for negative +06C7: 80 01 JMP 0x06C9 (0329) jmp StallMagSet + (0330) StallMagSet: +06C9: 08 PUSH A (0331) push A ; MSB: 76543210 (mag) +06CA: 67 ASR A (0332) asr A ; MSB: 77654321 +06CB: 67 ASR A (0333) asr A ; MSB: 77765432 +06CC: 67 ASR A (0334) asr A ; MSB: 77776543 +06CD: 21 1F AND A,0x1F (0335) and A,bMAGMASK ; MSB: 00076543 +06CF: 4F MOV X,SP (0336) mov X,SP +06D0: 27 FE 20 AND [X-2],0x20 (0337) and [X-2],bSIGNMASK +06D3: 2B FE OR A,[X-2] (0338) or A,[X-2] ; MSB: 00s76543 +06D5: 5C MOV X,A (0339) mov X,A ; MSB + (0340) +06D6: 18 POP A (0341) pop A ; LSB: 76543210 (mag) +06D7: 10 PUSH X (0342) push X ; MSB + (0343) +06D8: 64 ASL A (0344) asl A ; LSB: 65432100 +06D9: 64 ASL A (0345) asl A ; LSB: 54321000 +06DA: 21 1F AND A,0x1F (0346) and A,bMAGMASK ; LSB: 00021000 +06DC: 4F MOV X,SP (0347) mov X,SP +06DD: 2B FE OR A,[X-2] (0348) or A,[X-2] ; LSB: 00s21000 +06DF: 31 20 XOR A,0x20 (0349) xor A,bSIGNMASK ; LSB: 00t21000 + (0350) ; LSB in A +06E1: 20 POP X (0351) pop X ; MSB in X +06E2: 38 FF ADD SP,0xFF (0352) add SP, -1 ; clean up stack - from saving the sign + (0353) ENDIF + (0354) + (0355) DAC9_Ia_WriteStall2B: + (0356) _DAC9_Ia_WriteStall2B: + (0357) ; IF DAC9_Ia_SIGNANDMAGNITUDE +06E4: 29 80 OR A,0x80 (0358) or A,bHIGHBITS ; LSB: 10t21000 +06E6: 4B SWAP A,X (0359) swap A,X ; LSB in X, MSB in A +06E7: 29 80 OR A,0x80 (0360) or A,bHIGHBITS ; MSB: 10s76543 +06E9: 43 65 01 OR REG[0x65],0x1 + (0361) M8C_Stall +06EC: 60 94 MOV REG[0x94],A (0362) mov reg[DAC9_Ia_MSB_CR0],A +06EE: 41 65 FE AND REG[0x65],0xFE + (0363) M8C_Unstall +06F1: 5B MOV A,X (0364) mov A,X ; LSB in A +06F2: 60 90 MOV REG[0x90],A (0365) mov reg[DAC9_Ia_LSB_CR0],A + (0366) ; ENDIF + (0367) + (0368) RAM_EPILOGUE RAM_USE_CLASS_2 +06F4: 7F RET (0369) ret + (0370) .ENDSECTION + (0371) + (0372) .SECTION + (0373) ;----------------------------------------------------------------------------- + (0374) ; FUNCTION NAME: DAC9_Ia_Stop + (0375) ; + (0376) ; DESCRIPTION: + (0377) ; Cuts power to the user module. + (0378) ; + (0379) ;----------------------------------------------------------------------------- + (0380) ; + (0381) ; ARGUMENTS: none + (0382) ; + (0383) ; RETURNS: none + (0384) ; + (0385) ; SIDE EFFECTS: + (0386) ; The A and X registers may be modified by this or future implementations + (0387) ; of this function. The same is true for all RAM page pointer registers in + (0388) ; the Large Memory Model. When necessary, it is the calling function's + (0389) ; responsibility to perserve their values across calls to fastcall16 + (0390) ; functions. + (0391) ; + (0392) DAC9_Ia_Stop: + (0393) _DAC9_Ia_Stop: + (0394) RAM_PROLOGUE RAM_USE_CLASS_1 + (0395) and reg[DAC9_Ia_MSB_CR3], ~bPWRMASK + (0396) and reg[DAC9_Ia_LSB_CR3], ~bPWRMASK + (0397) RAM_EPILOGUE RAM_USE_CLASS_1 + (0398) ret + (0399) .ENDSECTION + (0400) + (0401) ; End of File DAC9_Ia.asm +FILE: lib\dac6_vgnd.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: DAC6_VGND.asm + (0004) ;; Version: 4.3, Updated on 2015/3/4 at 22:25:9 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: DAC6 User Module software implementation file. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) include "DAC6_VGND.inc" + (0023) include "memory.inc" + (0024) include "m8c.inc" + (0025) + (0026) ;----------------------------------------------- + (0027) ; Global Symbols + (0028) ;----------------------------------------------- + (0029) + (0030) export DAC6_VGND_Start + (0031) export _DAC6_VGND_Start + (0032) export DAC6_VGND_SetPower + (0033) export _DAC6_VGND_SetPower + (0034) + (0035) export DAC6_VGND_WriteBlind + (0036) export _DAC6_VGND_WriteBlind + (0037) export DAC6_VGND_WriteStall + (0038) export _DAC6_VGND_WriteStall + (0039) + (0040) export DAC6_VGND_Stop + (0041) export _DAC6_VGND_Stop + (0042) + (0043) ;; ----------------------------------------------------------------- + (0044) ;; Register Definitions + (0045) ;; ----------------------------------------------------------------- + (0046) ;; + (0047) ;; Uses 1 Switched Cap Block configured as shown. This API depends + (0048) ;; on knowing the exact personalization of CR0 and CR3 bitfields + (0049) ;; for time efficiency. + (0050) ;; + (0051) ;; * For a Mask/Val pair, this simply indicates that the value is + (0052) ;; determined by the user either through config-time parameteriza- + (0053) ;; tion or run-time manipulation. + (0054) ;; + (0055) ;; BIT FIELD Mask/Val Function + (0056) ;; ----------------- ----- -------------------- + (0057) ;; CR0.FCap 80/1 Feedback cap size 32 + (0058) ;; CR0.ClockPhase 40/0 Normal phase + (0059) ;; CR0.ASign 20/* User parameter + (0060) ;; CR0.ACap 1F/* User parameter + (0061) ;; + (0062) ;; CR1.ACMux E0/2 (SCA) A:VRef High, C:Don't Care + (0063) ;; CR1.AMux E0/4 (SCB) VRef High + (0064) ;; CR1.BCap 1F/0 Prune B-input branch + (0065) ;; + (0066) ;; CR2.AnalogBus 80/* User Parameter: Output Bus Enable + (0067) ;; CR2.CmpBus 40/0 Comparator Bus Disable + (0068) ;; CR2.AutoZero 20/1 Auto-Zero enabled on Phi 1 + (0069) ;; CR2.CCap 1F/0 Prune C-input branch + (0070) ;; + (0071) ;; CR3.ARefSelect C0/0 Use AGND (to invert) + (0072) ;; CR3.FSW1 20/1 Feedback Cap Used + (0073) ;; CR3.FSW2 10/1 Feedback Cap Grounded for AZ + (0074) ;; CR3.BMux 0C/0 (SCA) Don't Care - this branch pruned + (0075) ;; CR3.BSW 08/0 (SCB) Don't Care - this branch pruned + (0076) ;; CR3.BMux 04/0 (SCB) Don't Care - this branch pruned + (0077) ;; CR3.PWR 03/* User Parameter: Power, def=OFF + (0078) ;; + (0079) + (0080) ;----------------------------------------------- + (0081) ; Constant Definitions + (0082) ;----------------------------------------------- + (0083) cOFFSET: equ 31 ; Conversion term for offset binary to 2's C + (0084) bPWRMASK: equ 03h ; Power bitfield in Switched Cap CR3 reg + (0085) bCR3: equ 30h ; Except for power bits, CR3 ALWAYS looks + (0086) ; like this regardless of SC block type + (0087) ; or where the DAC gets mapped. + (0088) + (0089) + (0090) AREA UserModules (ROM, REL) + (0091) + (0092) .SECTION + (0093) ;----------------------------------------------------------------------------- + (0094) ; FUNCTION NAME: DAC6_VGND_Start + (0095) ; FUNCTION NAME: DAC6_VGND_SetPower + (0096) ; + (0097) ; DESCRIPTION: + (0098) ; Start / SetPower - Applies power setting to the module's SC blocks + (0099) ; + (0100) ;----------------------------------------------------------------------------- + (0101) ; + (0102) ; ARGUMENTS: + (0103) ; A contains the power setting 0=Off, 1=Low, 2=Med, 3=High + (0104) ; + (0105) ; RETURNS: none + (0106) ; + (0107) ; SIDE EFFECTS: + (0108) ; The A and X registers may be modified by this or future implementations + (0109) ; of this function. The same is true for all RAM page pointer registers in + (0110) ; the Large Memory Model. When necessary, it is the calling function's + (0111) ; responsibility to perserve their values across calls to fastcall16 + (0112) ; functions. + (0113) ; + (0114) DAC6_VGND_Start: + (0115) _DAC6_VGND_Start: + (0116) DAC6_VGND_SetPower: + (0117) _DAC6_VGND_SetPower: + (0118) RAM_PROLOGUE RAM_USE_CLASS_1 +06F5: 21 03 AND A,0x3 (0119) and A, bPWRMASK +06F7: 29 30 OR A,0x30 (0120) or A, bCR3 ; Set all other bits in addition to power +06F9: 60 83 MOV REG[0x83],A (0121) mov reg[DAC6_VGND_CR3], A + (0122) RAM_EPILOGUE RAM_USE_CLASS_1 +06FB: 7F RET (0123) ret + (0124) .ENDSECTION + (0125) + (0126) .SECTION + (0127) ;----------------------------------------------------------------------------- + (0128) ; FUNCTION NAME: DAC6_VGND_WriteBlind + (0129) ; + (0130) ; DESCRIPTION: + (0131) ; Modify the DAC's update value without worrying about the clocks + (0132) ; Lowest overhead, but output may not settle to correct value until the + (0133) ; phi2 of next full cycle following the write. + (0134) ; + (0135) ;----------------------------------------------------------------------------- + (0136) ; + (0137) ; ARGUMENTS: + (0138) ; The accumulator, A, contains the input in the appropriate format. + (0139) ; The data format is determined by the setting of the DataFormat parameter + (0140) ; in the Device Editor. + (0141) ; + (0142) ; RETURNS: none + (0143) ; + (0144) ; SIDE EFFECTS: + (0145) ; The A and X registers may be modified by this or future implementations + (0146) ; of this function. The same is true for all RAM page pointer registers in + (0147) ; the Large Memory Model. When necessary, it is the calling function's + (0148) ; responsibility to perserve their values across calls to fastcall16 + (0149) ; functions. + (0150) ; + (0151) DAC6_VGND_WriteBlind: + (0152) _DAC6_VGND_WriteBlind: + (0153) + (0154) RAM_PROLOGUE RAM_USE_CLASS_1 + (0155) IF DAC6_VGND_OFFSETBINARY + (0156) ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + (0157) ;; Following converts it to 2's complement: + (0158) sub A, cOFFSET ; Apply the offset + (0159) ENDIF + (0160) IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + (0161) ;; Data is a byte in standard 2's complement form with value in [-31..+31] + (0162) ;; Following converts it to Sign & Magnitude form "00smmmmm" + (0163) ;; where sign, "s", is 1 for negative numbers; 0 for positive + (0164) ;; and "m" is the magnitude. + (0165) asl A ; Multiply by 2 and put sign in Carry flag + (0166) jnc BlindPositive + (0167) ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted! + (0168) cpl A ; bit 0 is a "1" so, following 1 byte "inc" works + (0169) inc A ; (otherwise, we'd have to "add A, 2") + (0170) or A, 40h ; Make it negative by forcing sign bit + (0171) jmp BlindMagSet + (0172) BlindPositive: + (0173) nop + (0174) nop + (0175) nop + (0176) jmp BlindMagSet + (0177) BlindMagSet: + (0178) asr A ; Divide by two to finish up + (0179) ENDIF + (0180) + (0181) ;; Data is in Sign & Magnitude form. + (0182) ;; Set FCap and ClockPhase bits + (0183) or A, DAC6_VGND_CR0_HIBITS + (0184) mov reg[DAC6_VGND_CR0], A + (0185) RAM_EPILOGUE RAM_USE_CLASS_1 + (0186) ret + (0187) .ENDSECTION + (0188) + (0189) .SECTION + (0190) ;----------------------------------------------------------------------------- + (0191) ; FUNCTION NAME: DAC6_VGND_WriteStall + (0192) ; + (0193) ; DESCRIPTION: + (0194) ; Modify the DAC's update value, stalling the CPU if necessary. + (0195) ; This routine should be used with fast analog clocks or when the + (0196) ; resulting interrupt latencies, comparable to the update period, + (0197) ; can be tolerated comfortably. + (0198) ; + (0199) ;----------------------------------------------------------------------------- + (0200) ; + (0201) ; ARGUMENTS: + (0202) ; The accumulator, A, contains the input in the appropriate format. + (0203) ; The data format is determined by the setting of the DataFormat parameter + (0204) ; in the Device Editor. + (0205) ; + (0206) ; RETURNS: none + (0207) ; + (0208) ; SIDE EFFECTS: + (0209) ; The A and X registers may be modified by this or future implementations + (0210) ; of this function. The same is true for all RAM page pointer registers in + (0211) ; the Large Memory Model. When necessary, it is the calling function's + (0212) ; responsibility to perserve their values across calls to fastcall16 + (0213) ; functions. + (0214) ; + (0215) + (0216) DAC6_VGND_WriteStall: + (0217) _DAC6_VGND_WriteStall: + (0218) + (0219) RAM_PROLOGUE RAM_USE_CLASS_1 + (0220) IF DAC6_VGND_OFFSETBINARY + (0221) ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values). + (0222) ;; Following converts it to 2's complement: +06FC: 11 1F SUB A,0x1F (0223) sub A, cOFFSET ; Apply the offset + (0224) ENDIF + (0225) IF DAC6_VGND_OFFSETBINARY | DAC6_VGND_TWOSCOMPLEMENT + (0226) ;; Data is a byte in standard 2's complement form with value in [-31..+31] + (0227) ;; Following converts it to Sign & Magnitude form "00smmmmm" + (0228) ;; where sign, "s", is 1 for negative numbers; 0 for positive + (0229) ;; and "m" is the magnitude. +06FE: 64 ASL A (0230) asl A ; Multiply by 2 and put sign in Carry flag +06FF: D0 07 JNC 0x0707 (0231) jnc StallPositive +0701: 73 CPL A (0232) cpl A ; "Invert" step of complement 2's complement +0702: 74 INC A (0233) inc A ; "Add 1" step of complement 2's complement +0703: 29 40 OR A,0x40 (0234) or A, 40h ; Make it negative +0705: 80 06 JMP 0x070C (0235) jmp StallMagSet + (0236) StallPositive: +0707: 40 NOP (0237) nop +0708: 40 NOP (0238) nop +0709: 40 NOP (0239) nop +070A: 80 01 JMP 0x070C (0240) jmp StallMagSet + (0241) StallMagSet: +070C: 67 ASR A (0242) asr A ; Divide by two to finish conversion + (0243) ENDIF + (0244) + (0245) ;; Data is in Sign & Magnitude form. + (0246) ;; Set FCap and ClockPhase bits +070D: 29 80 OR A,0x80 (0247) or A, DAC6_VGND_CR0_HIBITS +070F: 43 65 01 OR REG[0x65],0x1 + (0248) M8C_Stall +0712: 60 80 MOV REG[0x80],A (0249) mov reg[DAC6_VGND_CR0], A +0714: 41 65 FE AND REG[0x65],0xFE + (0250) M8C_Unstall + (0251) RAM_EPILOGUE RAM_USE_CLASS_1 +0717: 7F RET (0252) ret + (0253) .ENDSECTION + (0254) + (0255) .SECTION + (0256) ;----------------------------------------------------------------------------- + (0257) ; FUNCTION NAME: DAC6_VGND_Stop + (0258) ; + (0259) ; DESCRIPTION: + (0260) ; Turns off power to the SC block + (0261) ; + (0262) ;----------------------------------------------------------------------------- + (0263) ; + (0264) ; ARGUMENTS: none + (0265) ; + (0266) ; RETURNS: none + (0267) ; + (0268) ; SIDE EFFECTS: + (0269) ; The A and X registers may be modified by this or future implementations + (0270) ; of this function. The same is true for all RAM page pointer registers in + (0271) ; the Large Memory Model. When necessary, it is the calling function's + (0272) ; responsibility to perserve their values across calls to fastcall16 + (0273) ; functions. + (0274) ; + (0275) + (0276) DAC6_VGND_Stop: + (0277) _DAC6_VGND_Stop: + (0278) RAM_PROLOGUE RAM_USE_CLASS_1 + (0279) and reg[DAC6_VGND_CR3], ~bPWRMASK + (0280) RAM_EPILOGUE RAM_USE_CLASS_1 + (0281) ret + (0282) .ENDSECTION + (0283) + (0284) ; End of File DAC6_VGND.asm +FILE: lib\amux4_1.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: AMUX4_1.asm + (0004) ;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: AMux4 User Module software implementation file devices. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) + (0023) include "AMUX4_1.inc" + (0024) include "m8c.inc" + (0025) include "memory.inc" + (0026) + (0027) ;----------------------------------------------- + (0028) ; Global Symbols + (0029) ;----------------------------------------------- + (0030) export AMUX4_1_InputSelect + (0031) export _AMUX4_1_InputSelect + (0032) + (0033) export AMUX4_1_Start + (0034) export _AMUX4_1_Start + (0035) + (0036) export AMUX4_1_Stop + (0037) export _AMUX4_1_Stop + (0038) + (0039) ;----------------------------------------------- + (0040) ; EQUATES + (0041) ;----------------------------------------------- + (0042) + (0043) MUXMASK: equ 03h + (0044) + (0045) AREA UserModules (ROM, REL) + (0046) .SECTION + (0047) ;----------------------------------------------------------------------------- + (0048) ; FUNCTION NAME: AMUX4_1_InputSelect + (0049) ; + (0050) ; DESCRIPTION: + (0051) ; Place the signal from one of four port0 pins on the Analog Column bus. + (0052) ; + (0053) ;----------------------------------------------------------------------------- + (0054) ; + (0055) ; ARGUMENTS: + (0056) ; A contains the mux input control value + (0057) ; + (0058) ; Input Code + (0059) ; Mux input 0,1 00h + (0060) ; Mux input 2,3 01h + (0061) ; Mux input 4,5 02h + (0062) ; Mux input 6,7 03h + (0063) ; + (0064) ; RETURNS: none + (0065) ; + (0066) ; SIDE EFFECTS: + (0067) ; The A and X registers may be modified by this or future implementations + (0068) ; of this function. The same is true for all RAM page pointer registers in + (0069) ; the Large Memory Model. When necessary, it is the calling function's + (0070) ; responsibility to perserve their values across calls to fastcall16 + (0071) ; functions. + (0072) ; + (0073) AMUX4_1_InputSelect: + (0074) _AMUX4_1_InputSelect: + (0075) RAM_PROLOGUE RAM_USE_CLASS_2 + (0076) + (0077) IF (AMUX4_1_COL_COUNT) + (0078) M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 + (0079) ENDIF + (0080) +0718: 21 03 AND A,0x3 (0081) and A, MUXMASK ; Mask off only valid port0 input bits +071A: 57 00 MOV X,0x0 (0082) mov X,AMUX4_1_MUX_COL + (0083) .AMUX4_ShiftIt: ; Shift value to correct bit position for Mux +071C: 79 DEC X (0084) dec X +071D: C0 05 JC 0x0723 (0085) jc .AMUX4_SetIt +071F: 64 ASL A (0086) asl A +0720: 64 ASL A (0087) asl A +0721: 8F FA JMP 0x071C (0088) jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + (0089) + (0090) .AMUX4_SetIt: +0723: 4F MOV X,SP (0091) mov X,SP ; Get current stack location +0724: 08 PUSH A (0092) push A ; Save a to OR it to AMX_IN later + (0093) IF (AMUX4_1_COL_COUNT) + (0094) mov A, reg[ACE_AMX_IN] ; Get current value of mux control register + (0095) ELSE +0725: 5D 60 MOV A,REG[0x60] (0096) mov A, reg[AMX_IN] ; Get current value of mux control register + (0097) ENDIF +0727: 21 FC AND A,0xFC (0098) and A,~AMUX4_1_MUX_MASK ; Mask off the bits for this Mux +0729: 2B 00 OR A,[X+0] (0099) or A,[X] ; OR in the mux control bits + (0100) IF (AMUX4_1_COL_COUNT) + (0101) mov reg[ACE_AMX_IN], A ; Get current value of mux control register + (0102) ELSE +072B: 60 60 MOV REG[0x60],A (0103) mov reg[AMX_IN], A ; Write out mux value to mux control register + (0104) ENDIF +072D: 18 POP A (0105) pop A ; Restore the stack + (0106) + (0107) IF (AMUX4_1_COL_COUNT) + (0108) M8C_SetBank0 + (0109) ENDIF + (0110) RAM_EPILOGUE RAM_USE_CLASS_2 +072E: 7F RET (0111) ret + (0112) .ENDSECTION + (0113) + (0114) .SECTION + (0115) ;----------------------------------------------------------------------------- + (0116) ; FUNCTION NAME: AMUX4_1_Start + (0117) ; + (0118) ; DESCRIPTION: + (0119) ; This function does nothing at this time. It is only here for + (0120) ; future compatibility. + (0121) ; + (0122) ;----------------------------------------------------------------------------- + (0123) ; + (0124) ; ARGUMENTS: none + (0125) ; + (0126) ; RETURNS: none + (0127) ; + (0128) ; SIDE EFFECTS: + (0129) ; The A and X registers may be modified by this or future implementations + (0130) ; of this function. The same is true for all RAM page pointer registers in + (0131) ; the Large Memory Model. When necessary, it is the calling function's + (0132) ; responsibility to perserve their values across calls to fastcall16 + (0133) ; functions. + (0134) ; + (0135) AMUX4_1_Start: + (0136) _AMUX4_1_Start: + (0137) RAM_PROLOGUE RAM_USE_CLASS_1 + (0138) RAM_EPILOGUE RAM_USE_CLASS_1 + (0139) ret + (0140) .ENDSECTION + (0141) + (0142) .SECTION + (0143) ;----------------------------------------------------------------------------- + (0144) ; FUNCTION NAME: AMUX4_1_Stop + (0145) ; + (0146) ; DESCRIPTION: + (0147) ; This function does nothing at this time. It is only here for + (0148) ; future compatibility. + (0149) ; + (0150) ;----------------------------------------------------------------------------- + (0151) ; + (0152) ; ARGUMENTS: none + (0153) ; + (0154) ; RETURNS: none + (0155) ; + (0156) ; SIDE EFFECTS: + (0157) ; The A and X registers may be modified by this or future implementations + (0158) ; of this function. The same is true for all RAM page pointer registers in + (0159) ; the Large Memory Model. When necessary, it is the calling function's + (0160) ; responsibility to perserve their values across calls to fastcall16 + (0161) ; functions. + (0162) ; + (0163) AMUX4_1_Stop: + (0164) _AMUX4_1_Stop: + (0165) RAM_PROLOGUE RAM_USE_CLASS_1 + (0166) RAM_EPILOGUE RAM_USE_CLASS_1 + (0167) ret + (0168) .ENDSECTION + (0169) ; End of File AMUX4_1.asm +FILE: lib\amux4_0.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: AMUX4_0.asm + (0004) ;; Version: 1.50, Updated on 2015/3/4 at 22:21:30 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: AMux4 User Module software implementation file devices. + (0008) ;; + (0009) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0010) ;; arguments and observe the associated "Registers are volatile" policy. + (0011) ;; This means it is the caller's responsibility to preserve any values + (0012) ;; in the X and A registers that are still needed after the API functions + (0013) ;; returns. For Large Memory Model devices it is also the caller's + (0014) ;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and + (0015) ;; MVW_PP registers. Even though some of these registers may not be modified + (0016) ;; now, there is no guarantee that will remain the case in future releases. + (0017) ;;----------------------------------------------------------------------------- + (0018) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0019) ;;***************************************************************************** + (0020) ;;***************************************************************************** + (0021) + (0022) + (0023) include "AMUX4_0.inc" + (0024) include "m8c.inc" + (0025) include "memory.inc" + (0026) + (0027) ;----------------------------------------------- + (0028) ; Global Symbols + (0029) ;----------------------------------------------- + (0030) export AMUX4_0_InputSelect + (0031) export _AMUX4_0_InputSelect + (0032) + (0033) export AMUX4_0_Start + (0034) export _AMUX4_0_Start + (0035) + (0036) export AMUX4_0_Stop + (0037) export _AMUX4_0_Stop + (0038) + (0039) ;----------------------------------------------- + (0040) ; EQUATES + (0041) ;----------------------------------------------- + (0042) + (0043) MUXMASK: equ 03h + (0044) + (0045) AREA UserModules (ROM, REL) + (0046) .SECTION + (0047) ;----------------------------------------------------------------------------- + (0048) ; FUNCTION NAME: AMUX4_0_InputSelect + (0049) ; + (0050) ; DESCRIPTION: + (0051) ; Place the signal from one of four port0 pins on the Analog Column bus. + (0052) ; + (0053) ;----------------------------------------------------------------------------- + (0054) ; + (0055) ; ARGUMENTS: + (0056) ; A contains the mux input control value + (0057) ; + (0058) ; Input Code + (0059) ; Mux input 0,1 00h + (0060) ; Mux input 2,3 01h + (0061) ; Mux input 4,5 02h + (0062) ; Mux input 6,7 03h + (0063) ; + (0064) ; RETURNS: none + (0065) ; + (0066) ; SIDE EFFECTS: + (0067) ; The A and X registers may be modified by this or future implementations + (0068) ; of this function. The same is true for all RAM page pointer registers in + (0069) ; the Large Memory Model. When necessary, it is the calling function's + (0070) ; responsibility to perserve their values across calls to fastcall16 + (0071) ; functions. + (0072) ; + (0073) AMUX4_0_InputSelect: + (0074) _AMUX4_0_InputSelect: + (0075) RAM_PROLOGUE RAM_USE_CLASS_2 + (0076) + (0077) IF (AMUX4_0_COL_COUNT) + (0078) M8C_SetBank1 ; ACE_AMX_IN is in Bank 1 + (0079) ENDIF + (0080) +072F: 21 03 AND A,0x3 (0081) and A, MUXMASK ; Mask off only valid port0 input bits +0731: 57 00 MOV X,0x0 (0082) mov X,AMUX4_0_MUX_COL + (0083) .AMUX4_ShiftIt: ; Shift value to correct bit position for Mux +0733: 79 DEC X (0084) dec X +0734: C0 05 JC 0x073A (0085) jc .AMUX4_SetIt +0736: 64 ASL A (0086) asl A +0737: 64 ASL A (0087) asl A +0738: 8F FA JMP 0x0733 (0088) jmp .AMUX4_ShiftIt ; Loop until bits shifted to 2 LSBs + (0089) + (0090) .AMUX4_SetIt: +073A: 4F MOV X,SP (0091) mov X,SP ; Get current stack location +073B: 08 PUSH A (0092) push A ; Save a to OR it to AMX_IN later + (0093) IF (AMUX4_0_COL_COUNT) + (0094) mov A, reg[ACE_AMX_IN] ; Get current value of mux control register + (0095) ELSE +073C: 5D 60 MOV A,REG[0x60] (0096) mov A, reg[AMX_IN] ; Get current value of mux control register + (0097) ENDIF +073E: 21 FC AND A,0xFC (0098) and A,~AMUX4_0_MUX_MASK ; Mask off the bits for this Mux +0740: 2B 00 OR A,[X+0] (0099) or A,[X] ; OR in the mux control bits + (0100) IF (AMUX4_0_COL_COUNT) + (0101) mov reg[ACE_AMX_IN], A ; Get current value of mux control register + (0102) ELSE +0742: 60 60 MOV REG[0x60],A (0103) mov reg[AMX_IN], A ; Write out mux value to mux control register + (0104) ENDIF +0744: 18 POP A (0105) pop A ; Restore the stack + (0106) + (0107) IF (AMUX4_0_COL_COUNT) + (0108) M8C_SetBank0 + (0109) ENDIF + (0110) RAM_EPILOGUE RAM_USE_CLASS_2 +0745: 7F RET (0111) ret + (0112) .ENDSECTION + (0113) + (0114) .SECTION + (0115) ;----------------------------------------------------------------------------- + (0116) ; FUNCTION NAME: AMUX4_0_Start + (0117) ; + (0118) ; DESCRIPTION: + (0119) ; This function does nothing at this time. It is only here for + (0120) ; future compatibility. + (0121) ; + (0122) ;----------------------------------------------------------------------------- + (0123) ; + (0124) ; ARGUMENTS: none + (0125) ; + (0126) ; RETURNS: none + (0127) ; + (0128) ; SIDE EFFECTS: + (0129) ; The A and X registers may be modified by this or future implementations + (0130) ; of this function. The same is true for all RAM page pointer registers in + (0131) ; the Large Memory Model. When necessary, it is the calling function's + (0132) ; responsibility to perserve their values across calls to fastcall16 + (0133) ; functions. + (0134) ; + (0135) AMUX4_0_Start: + (0136) _AMUX4_0_Start: + (0137) RAM_PROLOGUE RAM_USE_CLASS_1 + (0138) RAM_EPILOGUE RAM_USE_CLASS_1 + (0139) ret + (0140) .ENDSECTION + (0141) + (0142) .SECTION + (0143) ;----------------------------------------------------------------------------- + (0144) ; FUNCTION NAME: AMUX4_0_Stop + (0145) ; + (0146) ; DESCRIPTION: + (0147) ; This function does nothing at this time. It is only here for + (0148) ; future compatibility. + (0149) ; + (0150) ;----------------------------------------------------------------------------- + (0151) ; + (0152) ; ARGUMENTS: none + (0153) ; + (0154) ; RETURNS: none + (0155) ; + (0156) ; SIDE EFFECTS: + (0157) ; The A and X registers may be modified by this or future implementations + (0158) ; of this function. The same is true for all RAM page pointer registers in + (0159) ; the Large Memory Model. When necessary, it is the calling function's + (0160) ; responsibility to perserve their values across calls to fastcall16 + (0161) ; functions. + (0162) ; + (0163) AMUX4_0_Stop: + (0164) _AMUX4_0_Stop: + (0165) RAM_PROLOGUE RAM_USE_CLASS_1 + (0166) RAM_EPILOGUE RAM_USE_CLASS_1 + (0167) ret + (0168) .ENDSECTION + (0169) ; End of File AMUX4_0.asm +FILE: lib\adcincint.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: ADCINCINT.asm + (0004) ;; Version: 1.20, Updated on 2015/3/4 at 22:21:26 + (0005) ;; + (0006) ;; DESCRIPTION: Assembler interrupt service routine for the ADCINC + (0007) ;; A/D Converter User Module. This code works for both the + (0008) ;; first and second-order modulator topologies. + (0009) ;;----------------------------------------------------------------------------- + (0010) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0011) ;;***************************************************************************** + (0012) ;;***************************************************************************** + (0013) + (0014) include "m8c.inc" + (0015) include "memory.inc" + (0016) include "ADCINC.inc" + (0017) + (0018) + (0019) ;----------------------------------------------- + (0020) ; Global Symbols + (0021) ;----------------------------------------------- + (0022) + (0023) export _ADCINC_ADConversion_ISR + (0024) + (0025) export _ADCINC_iResult + (0026) export ADCINC_iResult + (0027) export _ADCINC_fStatus + (0028) export ADCINC_fStatus + (0029) export _ADCINC_bState + (0030) export ADCINC_bState + (0031) export _ADCINC_fMode + (0032) export ADCINC_fMode + (0033) export _ADCINC_bNumSamples + (0034) export ADCINC_bNumSamples + (0035) + (0036) ;----------------------------------------------- + (0037) ; Variable Allocation + (0038) ;----------------------------------------------- + (0039) AREA InterruptRAM(RAM,REL) + (0040) ADCINC_iResult: + (0041) _ADCINC_iResult: BLK 2 ;Calculated answer + (0042) iTemp: BLK 2 ;internal temp storage + (0043) ADCINC_fStatus: + (0044) _ADCINC_fStatus: BLK 1 ;ADC Status + (0045) ADCINC_bState: + (0046) _ADCINC_bState: BLK 1 ;State value of ADC count + (0047) ADCINC_fMode: + (0048) _ADCINC_fMode: BLK 1 ;Integrate and reset mode. + (0049) ADCINC_bNumSamples: + (0050) _ADCINC_bNumSamples: BLK 1 ;Number of samples to take. + (0051) + (0052) ;----------------------------------------------- + (0053) ; EQUATES + (0054) ;----------------------------------------------- + (0055) + (0056) ;@PSoC_UserCode_INIT@ (Do not change this line.) + (0057) ;--------------------------------------------------- + (0058) ; Insert your custom declarations below this banner + (0059) ;--------------------------------------------------- + (0060) + (0061) ;------------------------ + (0062) ; Constant Definitions + (0063) ;------------------------ + (0064) + (0065) + (0066) ;------------------------ + (0067) ; Variable Allocation + (0068) ;------------------------ + (0069) + (0070) //14Point7 ASM Code Start + (0071) AREA InterruptRAM (RAM, REL, CON) + (0072) ADC_Counter:: //ADC Counter + (0073) _ADC_Counter:: BLK 1 + (0074) Ri_Max_x1:: //Peak of Nermest AC coupled signal for temperature sensing + (0075) _Ri_Max_x1:: BLK 1 + (0076) Ri_Min_x1:: //Trough of Nermest AC coupled signal for temperature sensing + (0077) _Ri_Min_x1:: BLK 1 + (0078) ip_x1:: //Voltage Across Pump Current sense Resistor, it is in + (0079) _ip_x1:: BLK 1 + (0080) ADC_IF::// Byte value used to track which ADC sample last occurred, ADC_IF[0]=1 if Ri_Min,ADC_IF[1]=1 if Ri_Max,ADC_IF[2]=1 if VR + (0081) _ADC_IF:: BLK 1 + (0082) //14Point7 ASM Code End + (0083) + (0084) ;--------------------------------------------------- + (0085) ; Insert your custom declarations above this banner + (0086) ;--------------------------------------------------- + (0087) ;@PSoC_UserCode_END@ (Do not change this line.) + (0088) + (0089) + (0090) AREA UserModules (ROM, REL) + (0091) + (0092) ;----------------------------------------------------------------------------- + (0093) ; FUNCTION NAME: _ADCINC_ADConversion_ISR + (0094) ; + (0095) ; DESCRIPTION: Perform final filter operations to produce output samples. + (0096) ; + (0097) ;----------------------------------------------------------------------------- + (0098) ; + (0099) ; The decimation rate is established by the PWM interrupt. Four timer + (0100) ; clocks elapse for each modulator output (decimator input) since the + (0101) ; phi1/phi2 generator divides by 4. This means the timer period and thus + (0102) ; it's interrupt must equal 4 times the actual decimation rate. The + (0103) ; decimator is ru for 2^(#bits-6). + (0104) ; + (0105) _ADCINC_ADConversion_ISR: +0746: 7A 3C DEC [0x3C] (0106) dec [ADCINC_bState] + (0107) if1: +0748: C0 02 JC 0x074B (0108) jc endif1 ; no underflow +074A: 7E RETI (0109) reti + (0110) endif1: +074B: 3C 3D 00 CMP [0x3D],0x0 (0111) cmp [ADCINC_fMode],0 + (0112) if2: +074E: B0 12 JNZ 0x0761 (0113) jnz endif2 ;leaving reset mode +0750: 08 PUSH A (0114) push A ;read decimator +0751: 5D E5 MOV A,REG[0xE5] (0115) mov A, reg[DEC_DL] +0753: 53 3A MOV [0x3A],A (0116) mov [iTemp + LowByte],A +0755: 5D E4 MOV A,REG[0xE4] (0117) mov A, reg[DEC_DH] +0757: 53 39 MOV [0x39],A (0118) mov [iTemp + HighByte], A +0759: 18 POP A (0119) pop A +075A: 55 3D 01 MOV [0x3D],0x1 (0120) mov [ADCINC_fMode],1 +075D: 55 3C 03 MOV [0x3C],0x3 (0121) mov [ADCINC_bState],((1<<(ADCINC_bNUMBITS- 6))-1) +0760: 7E RETI (0122) reti +0761: 43 86 20 OR REG[0x86],0x20 +0764: 43 87 10 OR REG[0x87],0x10 + (0123) endif2: + (0124) ;This code runs at end of integrate + (0125) ADCINC_RESET_INTEGRATOR_M +0767: 08 PUSH A (0126) push A +0768: 5D E5 MOV A,REG[0xE5] (0127) mov A, reg[DEC_DL] +076A: 12 3A SUB A,[0x3A] (0128) sub A,[iTemp + LowByte] +076C: 53 3A MOV [0x3A],A (0129) mov [iTemp +LowByte],A +076E: 5D E4 MOV A,REG[0xE4] (0130) mov A, reg[DEC_DH] +0770: 1A 39 SBB A,[0x39] (0131) sbb A,[iTemp + HighByte] +0772: 67 ASR A (0132) asr A +0773: 6E 3A RRC [0x3A] (0133) rrc [iTemp + LowByte] + (0134) + (0135) ;Covert to Unipolar + (0136) IF ADCINC_9_OR_MORE_BITS + (0137) add A, (1<<(ADCINC_bNUMBITS - 9)) + (0138) ELSE +0775: 06 3A 80 ADD [0x3A],0x80 (0139) add [iTemp + LowByte], (1<<(ADCINC_bNUMBITS - 1)) ;work on lower Byte +0778: 09 00 ADC A,0x0 (0140) adc A,0 + (0141) ENDIF + (0142) ;check for overflow + (0143) IF ADCINC_8_OR_MORE_BITS +077A: 39 01 CMP A,0x1 (0144) cmp A,(1<<(ADCINC_bNUMBITS - 8)) + (0145) if3: +077C: B0 05 JNZ 0x0782 (0146) jnz endif3 ;overflow +077E: 78 DEC A (0147) dec A +077F: 55 3A FF MOV [0x3A],0xFF (0148) mov [iTemp + LowByte],ffh + (0149) endif3: + (0150) ELSE + (0151) cmp [iTemp + LowByte],(1<<(ADCINC_bNUMBITS)) + (0152) if4: + (0153) jnz endif4 ;overflow + (0154) dec [iTemp + LowByte] + (0155) endif4: + (0156) ENDIF + (0157) IF ADCINC_SIGNED_DATA + (0158) IF ADCINC_9_OR_MORE_BITS + (0159) sub A,(1<<(ADCINC_bNUMBITS - 9)) + (0160) ELSE + (0161) sub [iTemp +LowByte],(1<<(ADCINC_bNUMBITS - 1)) + (0162) sbb A,0 + (0163) ENDIF + (0164) ENDIF +0782: 5F 38 3A MOV [0x38],[0x3A] (0165) mov [ADCINC_iResult + LowByte],[iTemp +LowByte] +0785: 53 37 MOV [0x37],A (0166) mov [ADCINC_iResult + HighByte],A +0787: 55 3B 01 MOV [0x3B],0x1 (0167) mov [ADCINC_fStatus],1 + (0168) ConversionReady: + (0169) ;@PSoC_UserCode_BODY@ (Do not change this line.) + (0170) ;--------------------------------------------------- + (0171) ; Insert your custom code below this banner + (0172) ;--------------------------------------------------- + (0173) //14Point7 ASM Code Start +078A: 51 3F MOV A,[0x3F] (0174) mov A,[_ADC_Counter] +078C: 11 00 SUB A,0x0 (0175) sub A,0 +078E: A0 0D JZ 0x079C (0176) JZ ADC_0 + (0177) +0790: 11 01 SUB A,0x1 (0178) sub A,1 +0792: A0 17 JZ 0x07AA (0179) JZ ADC_1 + (0180) +0794: 11 01 SUB A,0x1 (0181) sub A,1 +0796: A0 24 JZ 0x07BB (0182) JZ ADC_2 + (0183) +0798: 11 01 SUB A,0x1 (0184) sub A,1 +079A: A0 2E JZ 0x07C9 (0185) JZ ADC_3 + (0186) + (0187) ADC_0: //Ri_Max, Peak of AC coupled Temperature sense signal + (0188) //and reg[PRT2DR],127 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal +079C: 41 00 FB AND REG[0x0],0xFB (0189) and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal +079F: 5F 40 38 MOV [0x40],[0x38] (0190) mov [_Ri_Max_x1],[ADCINC_iResult + LowByte] +07A2: 55 3F 01 MOV [0x3F],0x1 (0191) mov [_ADC_Counter],1 +07A5: 2E 43 02 OR [0x43],0x2 (0192) or [_ADC_IF],2 // Set ADC_IF[1] to indicate that new Ri_Max data is available +07A8: 80 2F JMP 0x07D8 (0193) jmp Cont + (0194) + (0195) ADC_1://Ri_Min, Trough of AC coupled Temperature sense signal +07AA: 62 60 0F MOV REG[0x60],0xF (0196) mov reg[AMX_IN],15 //setup Mux so that Next ADC sample is a differential Ip Vs Ia (voltage across pump current sense resistor, P0[7] Vs P0[6] + (0197) //mov reg[AMX_IN],9 //cal lin + (0198) //or reg[PRT2DR],128 //set Ri_Out Pin +07AD: 43 00 04 OR REG[0x0],0x4 (0199) or reg[PRT0DR],4 //set Ri_Out Pin +07B0: 5F 41 38 MOV [0x41],[0x38] (0200) mov [_Ri_Min_x1],[ADCINC_iResult + LowByte] +07B3: 2E 43 01 OR [0x43],0x1 (0201) or [_ADC_IF],1 // Set ADC_IF[0] to indicate that new Ri_Min data is available +07B6: 55 3F 02 MOV [0x3F],0x2 (0202) mov [_ADC_Counter],2 + (0203) +07B9: 80 1E JMP 0x07D8 (0204) jmp Cont + (0205) + (0206) ADC_2://Voltage Across Pump Current sense resistor + (0207) //and reg[PRT2DR],127 //clear Ri_Out Pin, Next ADC sample is not the Ri_Min, but Ri_Out is cleared so that ~1khz AC signal is mantained +07BB: 41 00 FB AND REG[0x0],0xFB (0208) and reg[PRT0DR],251 //clear Ri_Out Pin so that the next ADC sample will Acquire the Trough (Ri_Min) of AC coupled Temperature sense signal +07BE: 5F 42 38 MOV [0x42],[0x38] (0209) mov [_ip_x1],[ADCINC_iResult + LowByte] +07C1: 2E 43 04 OR [0x43],0x4 (0210) or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available +07C4: 55 3F 03 MOV [0x3F],0x3 (0211) mov [_ADC_Counter],3 +07C7: 80 10 JMP 0x07D8 (0212) jmp Cont + (0213) + (0214) ADC_3://Voltage Across Pump Current sense resistor again, this ADC sample is need to keep timing on the ~1khz AC Temperature Sense Signal so might as well get another Sample of VR + (0215) //or reg[PRT2DR],128 //Set Ri_Out Pin so that the next ADC sample will Acquire the Peak (Ri_Max) of AC coupled Temperature sense signal +07C9: 43 00 04 OR REG[0x0],0x4 (0216) or reg[PRT0DR],4 //set Ri_Out Pin +07CC: 62 60 00 MOV REG[0x60],0x0 (0217) mov reg[AMX_IN],0 // Setup Mux so that Next ADC sample is differential Ri_in Vs Vref, P0[1] Vs P0[0] +07CF: 5F 42 38 MOV [0x42],[0x38] (0218) mov [_ip_x1],[ADCINC_iResult + LowByte] +07D2: 2E 43 04 OR [0x43],0x4 (0219) or [_ADC_IF],4 // Set ADC_IF[2] to indicate that new VR data is available +07D5: 55 3F 00 MOV [0x3F],0x0 (0220) mov [_ADC_Counter],0 + (0221) + (0222) Cont: + (0223) //14Point7 ASM Code End + (0224) + (0225) ; Sample data is now in iResult + (0226) ; + (0227) ; NOTE: This interrupt service routine has already + (0228) ; preserved the values of the A CPU register. If + (0229) ; you need to use the X register you must preserve + (0230) ; its value and restore it before the return from + (0231) ; interrupt. + (0232) ;--------------------------------------------------- + (0233) ; Insert your custom code above this banner + (0234) ;--------------------------------------------------- + (0235) ;@PSoC_UserCode_END@ (Do not change this line.) +07D8: 18 POP A (0236) pop A +07D9: 3C 3E 00 CMP [0x3E],0x0 (0237) cmp [ADCINC_bNumSamples],0 + (0238) if5: +07DC: B0 0E JNZ 0x07EB (0239) jnz endif5 ; Number of samples is zero +07DE: 55 3D 00 MOV [0x3D],0x0 (0240) mov [ADCINC_fMode],0 +07E1: 55 3C 00 MOV [0x3C],0x0 (0241) mov [ADCINC_bState],0 +07E4: 41 87 EF AND REG[0x87],0xEF +07E7: 41 86 DF AND REG[0x86],0xDF + (0242) ADCINC_ENABLE_INTEGRATOR_M +07EA: 7E RETI (0243) reti + (0244) endif5: +07EB: 7A 3E DEC [0x3E] (0245) dec [ADCINC_bNumSamples] + (0246) if6: +07ED: A0 0E JZ 0x07FC (0247) jz endif6 ; count not zero +07EF: 55 3D 00 MOV [0x3D],0x0 (0248) mov [ADCINC_fMode],0 +07F2: 55 3C 00 MOV [0x3C],0x0 (0249) mov [ADCINC_bState],0 +07F5: 41 87 EF AND REG[0x87],0xEF +07F8: 41 86 DF AND REG[0x86],0xDF + (0250) ADCINC_ENABLE_INTEGRATOR_M +07FB: 7E RETI (0251) reti +07FC: 41 E1 FE AND REG[0xE1],0xFE + (0252) endif6: + (0253) ;All samples done + (0254) ADCINC_STOPADC_M +07FF: 7E RETI (0255) reti +FILE: lib\adcinc.asm (0001) ;;***************************************************************************** + (0002) ;;***************************************************************************** + (0003) ;; FILENAME: ADCINC.asm + (0004) ;; Version: 1.1, Updated on 2006/02/03 at 09:10:49 + (0005) ;; Generated by PSoC Designer 5.4.3191 + (0006) ;; + (0007) ;; DESCRIPTION: Assembler source for the ADCINC A/D Converter + (0008) ;; User Module with 1st-order modulator. + (0009) ;; + (0010) ;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling + (0011) ;; arguments and observe the associated "Registers are volatile" policy. + (0012) ;; This means it is the caller's responsibility to preserve any values + (0013) ;; in the X and A registers that are still needed after the API + (0014) ;; function returns. Even though these registers may be preserved now, + (0015) ;; there is no guarantee they will be preserved in future releases. + (0016) ;;----------------------------------------------------------------------------- + (0017) ;; Copyright (c) Cypress Semiconductor 2015. All Rights Reserved. + (0018) ;;***************************************************************************** + (0019) ;;***************************************************************************** + (0020) + (0021) include "m8c.inc" + (0022) include "memory.inc" + (0023) + (0024) include "ADCINC.inc" + (0025) + (0026) + (0027) ;----------------------------------------------- + (0028) ; Global Symbols + (0029) ;----------------------------------------------- + (0030) export ADCINC_Start + (0031) export _ADCINC_Start + (0032) export ADCINC_SetPower + (0033) export _ADCINC_SetPower + (0034) export ADCINC_Stop + (0035) export _ADCINC_Stop + (0036) export ADCINC_GetSamples + (0037) export _ADCINC_GetSamples + (0038) export ADCINC_StopADC + (0039) export _ADCINC_StopADC + (0040) export ADCINC_fIsDataAvailable + (0041) export _ADCINC_fIsDataAvailable + (0042) export ADCINC_iClearFlagGetData + (0043) export _ADCINC_iClearFlagGetData + (0044) export ADCINC_wClearFlagGetData + (0045) export _ADCINC_wClearFlagGetData + (0046) export ADCINC_cClearFlagGetData + (0047) export _ADCINC_cClearFlagGetData + (0048) export ADCINC_bClearFlagGetData + (0049) export _ADCINC_bClearFlagGetData + (0050) export ADCINC_iGetData + (0051) export _ADCINC_iGetData + (0052) export ADCINC_wGetData + (0053) export _ADCINC_wGetData + (0054) export ADCINC_bGetData + (0055) export _ADCINC_bGetData + (0056) export ADCINC_cGetData + (0057) export _ADCINC_cGetData + (0058) export ADCINC_fClearFlag + (0059) export _ADCINC_fClearFlag + (0060) export ADCINC_WritePulseWidth + (0061) export _ADCINC_WritePulseWidth + (0062) + (0063) + (0064) AREA bss (RAM,REL) + (0065) + (0066) ;----------------------------------------------- + (0067) ; Constant Definitions + (0068) ;----------------------------------------------- + (0069) + (0070) ;----------------------------------------------- + (0071) ; Variable Allocation + (0072) ;----------------------------------------------- + (0073) + (0074) + (0075) AREA UserModules (ROM, REL) + (0076) + (0077) .SECTION + (0078) ;----------------------------------------------------------------------------- + (0079) ; FUNCTION NAME: ADCINC_Start + (0080) ; + (0081) ; DESCRIPTION: Applies power setting to the module's analog PSoc block. + (0082) ; and starts the PWM + (0083) ;----------------------------------------------------------------------------- + (0084) ; + (0085) ; ARGUMENTS: The A register contains the power setting. + (0086) ; RETURNS: Nothing. + (0087) ; SIDE EFFECTS: + (0088) ; The A and X registers may be modified by this or future implementations + (0089) ; of this function. When necessary, it is the calling function's + (0090) ; responsibility to perserve their values across calls to fastcall16 + (0091) ; functions. + (0092) ; + (0093) ADCINC_Start: + (0094) _ADCINC_Start: + (0095) RAM_PROLOGUE RAM_USE_CLASS_1 +0800: 43 E7 C0 OR REG[0xE7],0xC0 (0096) or reg[DEC_CR1],c0h +0803: 90 0D CALL _ADCINC_SetPower (0097) call ADCINC_SetPower +0805: 43 86 20 OR REG[0x86],0x20 +0808: 43 87 10 OR REG[0x87],0x10 + (0098) ADCINC_RESET_INTEGRATOR_M +080B: 62 21 FF MOV REG[0x21],0xFF (0099) mov reg[ADCINC_PWMdr1],ffh +080E: 43 23 01 OR REG[0x23],0x1 (0100) or reg[ADCINC_PWMcr0],01h ; start PWM + (0101) RAM_EPILOGUE RAM_USE_CLASS_1 +0811: 7F RET (0102) ret + (0103) .ENDSECTION + (0104) + (0105) + (0106) .SECTION + (0107) ;----------------------------------------------------------------------------- + (0108) ; FUNCTION NAME: ADCINC_SetPower + (0109) ; + (0110) ; DESCRIPTION: Applies power setting to the module's analog PSoc block. + (0111) ;----------------------------------------------------------------------------- + (0112) ; + (0113) ; ARGUMENTS: The A register contains the power setting. + (0114) ; RETURNS: Nothing. + (0115) ; SIDE EFFECTS: + (0116) ; The A and X registers may be modified by this or future implementations + (0117) ; of this function. When necessary, it is the calling function's + (0118) ; responsibility to perserve their values across calls to fastcall16 + (0119) ; functions. + (0120) ; + (0121) ADCINC_SetPower: + (0122) _ADCINC_SetPower: + (0123) RAM_PROLOGUE RAM_USE_CLASS_2 +0812: 4F MOV X,SP (0124) mov X,SP ; Set up Stack frame +0813: 21 03 AND A,0x3 (0125) and A,03h ; Ensure value is legal +0815: 08 PUSH A (0126) push A +0816: 5D 87 MOV A,REG[0x87] (0127) mov A,reg[ADCINC_AtoDcr3] ; First SC block: +0818: 21 FC AND A,0xFC (0128) and A,~03h ; clear power bits to zero +081A: 2B 00 OR A,[X+0] (0129) or A,[ X ] ; establish new value +081C: 60 87 MOV REG[0x87],A (0130) mov reg[ADCINC_AtoDcr3],A ; change the actual setting +081E: 18 POP A (0131) pop A + (0132) RAM_EPILOGUE RAM_USE_CLASS_2 +081F: 7F RET (0133) ret +0820: 41 87 EF AND REG[0x87],0xEF +0823: 41 86 DF AND REG[0x86],0xDF + (0134) .ENDSECTION + (0135) + (0136) .SECTION + (0137) ;----------------------------------------------------------------------------- + (0138) ; FUNCTION NAME: ADCINC_Stop + (0139) ; + (0140) ; DESCRIPTION: Removes power from the module's analog PSoc block. + (0141) ; and turns off PWM + (0142) ;----------------------------------------------------------------------------- + (0143) ; + (0144) ; ARGUMENTS: None. + (0145) ; RETURNS: Nothing. + (0146) ; SIDE EFFECTS: + (0147) ; The A and X registers may be modified by this or future implementations + (0148) ; of this function. When necessary, it is the calling function's + (0149) ; responsibility to perserve their values across calls to fastcall16 + (0150) ; functions. + (0151) ; + (0152) ADCINC_Stop: + (0153) _ADCINC_Stop: + (0154) RAM_PROLOGUE RAM_USE_CLASS_1 + (0155) ADCINC_STOPADC_M + (0156) and reg[ADCINC_AtoDcr3], ~03h + (0157) and reg[ADCINC_PWMcr0], ~01h ; stop PWM + (0158) RAM_EPILOGUE RAM_USE_CLASS_1 + (0159) ret + (0160) .ENDSECTION + (0161) + (0162) + (0163) .SECTION + (0164) ;----------------------------------------------------------------------------- + (0165) ; FUNCTION NAME: ADCINC_GetSamples + (0166) ; + (0167) ; DESCRIPTION: Activates interrupts for this user module and begins sampling. + (0168) ;----------------------------------------------------------------------------- + (0169) ; + (0170) ; ARGUMENTS: A register contain number of samples + (0171) ; RETURNS: Nothing. + (0172) ; SIDE EFFECTS: + (0173) ; The A and X registers may be modified by this or future implementations + (0174) ; of this function. When necessary, it is the calling function's + (0175) ; responsibility to perserve their values across calls to fastcall16 + (0176) ; functions. + (0177) ; + (0178) ADCINC_GetSamples: + (0179) _ADCINC_GetSamples: + (0180) RAM_PROLOGUE RAM_USE_CLASS_4 + (0181) RAM_SETPAGE_CUR >ADCINC_fMode + (0182) ADCINC_ENABLE_INTEGRATOR_M +0826: 55 3D 00 MOV [0x3D],0x0 (0183) mov [ADCINC_fMode],0 +0829: 55 3C 00 MOV [0x3C],0x0 (0184) mov [ADCINC_bState],0 +082C: 53 3E MOV [0x3E],A (0185) mov [ADCINC_bNumSamples],A +082E: 5D 22 MOV A,REG[0x22] (0186) mov A, reg[ADCINC_PWMdr2] +0830: B0 04 JNZ 0x0835 (0187) jnz .SkipPulseWrite +0832: 62 22 01 MOV REG[0x22],0x1 (0188) mov reg[ADCINC_PWMdr2], 1 +0835: 62 DB FE MOV REG[0xDB],0xFE +0838: 43 E1 01 OR REG[0xE1],0x1 + (0189) .SkipPulseWrite: + (0190) ADCINC_STARTADC_M ;enable interrupt + (0191) RAM_EPILOGUE RAM_USE_CLASS_4 +083B: 7F RET (0192) ret +083C: 55 3B 00 MOV [0x3B],0x0 +083F: 58 37 MOV X,[0x37] +0841: 51 38 MOV A,[0x38] +0843: 3C 3B 00 CMP [0x3B],0x0 +0846: BF F5 JNZ _ADCINC_StopADC|_ADCINC_iClearFlagGetData|_ADCINC_fIsDataAvailable|_ADCINC_wClearFlagGetData|ADCINC_iClearFlagGetData|ADCINC_wClearFlagGetData + (0193) .ENDSECTION + (0194) + (0195) + (0196) .SECTION + (0197) ;----------------------------------------------------------------------------- + (0198) ; FUNCTION NAME: ADCINC_StopADC + (0199) ; + (0200) ; DESCRIPTION: Shuts down the A/D is an orderly manner. The interrupt + (0201) ; is disabled but the PWM output is still active. + (0202) ; Integrator is reset + (0203) ;----------------------------------------------------------------------------- + (0204) ; + (0205) ; ARGUMENTS: None. + (0206) ; RETURNS: Nothing. + (0207) ; SIDE EFFECTS: + (0208) ; The A and X registers may be modified by this or future implementations + (0209) ; of this function. When necessary, it is the calling function's + (0210) ; responsibility to perserve their values across calls to fastcall16 + (0211) ; functions. + (0212) ; + (0213) ADCINC_StopADC: + (0214) _ADCINC_StopADC: + (0215) RAM_PROLOGUE RAM_USE_CLASS_1 + (0216) ADCINC_STOPADC_M + (0217) ADCINC_RESET_INTEGRATOR_M + (0218) RAM_EPILOGUE RAM_USE_CLASS_1 + (0219) ret + (0220) .ENDSECTION + (0221) + (0222) + (0223) .SECTION + (0224) ;----------------------------------------------------------------------------- + (0225) ; FUNCTION NAME: ADCINC_fIsDataAvailable + (0226) ; + (0227) ; DESCRIPTION: Returns the status of the A/D Data + (0228) ;----------------------------------------------------------------------------- + (0229) ; ARGUMENTS: None. + (0230) ; RETURNS: fastcall BOOL DataAvailable returned in the A register + (0231) ; SIDE EFFECTS: + (0232) ; The A and X registers may be modified by this or future implementations + (0233) ; of this function. When necessary, it is the calling function's + (0234) ; responsibility to perserve their values across calls to fastcall16 + (0235) ; functions. + (0236) ; + (0237) ADCINC_fIsDataAvailable: + (0238) _ADCINC_fIsDataAvailable: + (0239) RAM_PROLOGUE RAM_USE_CLASS_4 + (0240) ADCINC_fIsDataAvailable_M + (0241) RAM_EPILOGUE RAM_USE_CLASS_4 + (0242) ret + (0243) .ENDSECTION + (0244) + (0245) + (0246) .SECTION + (0247) ;----------------------------------------------------------------------------- + (0248) ; FUNCTION NAME: ADCINC_iClearFlagGetData + (0249) ; ADCINC_wClearFlagGetData + (0250) ; + (0251) ; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. + (0252) ; Flag is checked after trandfer to insure valid data. + (0253) ; available. Also clears the DATA_READY flag. + (0254) ;----------------------------------------------------------------------------- + (0255) ; ARGUMENTS: None. + (0256) ; RETURNS: fastcall int iResult returned in the X and A register + (0257) ; SIDE EFFECTS: + (0258) ; The A and X registers may be modified by this or future implementations + (0259) ; of this function. When necessary, it is the calling function's + (0260) ; responsibility to perserve their values across calls to fastcall16 + (0261) ; functions. + (0262) ; + (0263) ADCINC_iClearFlagGetData: + (0264) _ADCINC_iClearFlagGetData: + (0265) ADCINC_wClearFlagGetData: + (0266) _ADCINC_wClearFlagGetData: + (0267) RAM_PROLOGUE RAM_USE_CLASS_4 + (0268) ADCINC_iClearFlagGetData_M + (0269) RAM_EPILOGUE RAM_USE_CLASS_4 +0848: 7F RET (0270) ret + (0271) .ENDSECTION + (0272) + (0273) + (0274) .SECTION + (0275) ;----------------------------------------------------------------------------- + (0276) ; FUNCTION NAME: ADCINC_cClearFlagGetData + (0277) ; ADCINC_bClearFlagGetData + (0278) ; + (0279) ; DESCRIPTION: Clears the fStatus and places ADC data in iResult A/D. + (0280) ;----------------------------------------------------------------------------- + (0281) ; ARGUMENTS: None. + (0282) ; RETURNS: fastcall int iResult returned in the X and A register + (0283) ; SIDE EFFECTS: + (0284) ; The A and X registers may be modified by this or future implementations + (0285) ; of this function. When necessary, it is the calling function's + (0286) ; responsibility to perserve their values across calls to fastcall16 + (0287) ; functions. + (0288) ; + (0289) ADCINC_cClearFlagGetData: + (0290) _ADCINC_cClearFlagGetData: + (0291) ADCINC_bClearFlagGetData: + (0292) _ADCINC_bClearFlagGetData: + (0293) RAM_PROLOGUE RAM_USE_CLASS_4 + (0294) ADCINC_bClearFlagGetData_M + (0295) RAM_EPILOGUE RAM_USE_CLASS_4 + (0296) ret + (0297) .ENDSECTION + (0298) .SECTION + (0299) ;----------------------------------------------------------------------------- + (0300) ; FUNCTION NAME: ADCINC_iGetData + (0301) ; ADCINC_wGetData + (0302) ; + (0303) ; DESCRIPTION: Returns the data from the A/D. Does not check if data is + (0304) ; available. + (0305) ;----------------------------------------------------------------------------- + (0306) ; ARGUMENTS: None. + (0307) ; RETURNS: fastcall int iResult is returned in the X,A registers + (0308) ; SIDE EFFECTS: + (0309) ; The A and X registers may be modified by this or future implementations + (0310) ; of this function. When necessary, it is the calling function's + (0311) ; responsibility to perserve their values across calls to fastcall16 + (0312) ; functions. + (0313) ; + (0314) ADCINC_iGetData: + (0315) _ADCINC_iGetData: + (0316) ADCINC_wGetData: + (0317) _ADCINC_wGetData: + (0318) RAM_PROLOGUE RAM_USE_CLASS_4 + (0319) ADCINC_wGetData_M + (0320) RAM_EPILOGUE RAM_USE_CLASS_4 + (0321) ret + (0322) .ENDSECTION + (0323) .SECTION + (0324) ;----------------------------------------------------------------------------- + (0325) ; FUNCTION NAME: ADCINC_bGetData + (0326) ; ADCINC_cGetData + (0327) ; + (0328) ; DESCRIPTION: Returns the data from the A/D. Does not check if data is + (0329) ; available. + (0330) ;----------------------------------------------------------------------------- + (0331) ; ARGUMENTS: None. + (0332) ; RETURNS: fastcall CHAR cData returned in the A register + (0333) ; SIDE EFFECTS: + (0334) ; The A and X registers may be modified by this or future implementations + (0335) ; of this function. When necessary, it is the calling function's + (0336) ; responsibility to perserve their values across calls to fastcall16 + (0337) ; functions. + (0338) ; + (0339) ADCINC_bGetData: + (0340) _ADCINC_bGetData: + (0341) ADCINC_cGetData: + (0342) _ADCINC_cGetData: + (0343) RAM_PROLOGUE RAM_USE_CLASS_4 + (0344) ADCINC_cGetData_M + (0345) RAM_EPILOGUE RAM_USE_CLASS_4 + (0346) ret + (0347) .ENDSECTION + (0348) + (0349) + (0350) .SECTION + (0351) ;----------------------------------------------------------------------------- + (0352) ; FUNCTION NAME: ADCINC_fClearFlag + (0353) ; + (0354) ; DESCRIPTION: Clears the data ready flag. + (0355) ;----------------------------------------------------------------------------- + (0356) ; ARGUMENTS: None. + (0357) ; RETURNS: Nothing. + (0358) ; SIDE EFFECTS: + (0359) ; The DATA_READY flag is cleared. + (0360) ; The A and X registers may be modified by this or future implementations + (0361) ; of this function. When necessary, it is the calling function's + (0362) ; responsibility to perserve their values across calls to fastcall16 + (0363) ; functions. + (0364) ; + (0365) ADCINC_fClearFlag: + (0366) _ADCINC_fClearFlag: + (0367) RAM_PROLOGUE RAM_USE_CLASS_4 + (0368) ADCINC_fClearFlag_M + (0369) RAM_EPILOGUE RAM_USE_CLASS_4 + (0370) ret + (0371) .ENDSECTION + (0372) + (0373) + (0374) .SECTION + (0375) ;----------------------------------------------------------------------------- + (0376) ; FUNCTION NAME: ADCINC_WritePulseWidth + (0377) ; + (0378) ; DESCRIPTION: + (0379) ; Write the 8-bit period value into the compare register (DR2). + (0380) ;----------------------------------------------------------------------------- + (0381) ; + (0382) ; ARGUMENTS: fastcall BYTE bPeriodValue (passed in A) + (0383) ; RETURNS: Nothing + (0384) ; SIDE EFFECTS: + (0385) ; The A and X registers may be modified by this or future implementations + (0386) ; of this function. When necessary, it is the calling function's + (0387) ; responsibility to perserve their values across calls to fastcall16 + (0388) ; functions. + (0389) ; + (0390) ADCINC_WritePulseWidth: + (0391) _ADCINC_WritePulseWidth: + (0392) RAM_PROLOGUE RAM_USE_CLASS_1 + (0393) ADCINC_WritePulseWidth_M + (0394) RAM_EPILOGUE RAM_USE_CLASS_1 + (0395) ret + (0396) .ENDSECTION + (0397) + (0398) ; End of File ADCINC.asm +FILE: C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLCFRE~4\SLC_FR~2\SLC_FR~1\SLC_FR~1\main.c +(0001) //---------------------------------------------------------------------------- +(0002) // C main line latest +(0003) //---------------------------------------------------------------------------- +(0004) #include <m8c.h> // part specific constants and macros +(0005) #include "PSoCAPI.h" // PSoC API definitions for all User Modules +(0006) +(0007) extern BYTE ADC_Counter; //Variable Declared in ADCININT.asm +(0008) extern BYTE Ri_Max_x1; //Variable Declared in ADCININT.asm +(0009) extern BYTE Ri_Min_x1; //Variable Declared in ADCININT.asm +(0010) extern BYTE ip_x1; //Variable Declared in ADCININT.asm +(0011) extern BYTE ADC_IF; //Variable Declared in ADCININT.asm +(0012) extern BYTE Sleep_Counter; //Variable Declared in SleepTimerINT.asm +(0013) +(0014) //#define Vout_Lookup_Counter_Set 25 +(0015) #define LCD_Counter_Set 50 +(0016) +(0017) #define Lin_Out +(0018) #define NB_Out +(0019) +(0020) //#define PID_Tune +(0021) #define Ri_Filter_Strength 4 +(0022) #define ip_Filter_Strength 4 +(0023) +(0024) #ifdef PID_Tune +(0025) INT Ri_Mid_Target= 271; //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell +(0026) INT Ia_PID_Kp = 35; +(0027) INT Ia_PID_Ki = 8; +(0028) INT Ia_Output_Bias = 256; +(0029) INT Ri_Delta_Target=143; //PID Target peak to peak Voltage of Nermest Cell +(0030) INT Heater_PID_Kp =-72; +(0031) INT Heater_PID_Ki =-4; +(0032) INT Heater_PID_Output_Bias =128; +(0033) #else +(0034) #define Ri_Mid_Target 271 //256+14.769 = 2.53v = 2.08v(VGND) + 0.45v, PID Target Voltage of Nermest Cell +(0035) #define Ia_PID_Kp 25 +(0036) #define Ia_PID_Ki 4 +(0037) #define Ia_Output_Bias 256 +(0038) #define Ri_Delta_Target 143 //PID Target peak to peak Voltage of Nermest Cell +(0039) #define Heater_PID_Kp -72 +(0040) #define Heater_PID_Ki -4 +(0041) #define Heater_PID_Output_Bias 128 +(0042) #endif +(0043) +(0044) #ifdef Lin_Out +(0045) +(0046) #define ip_to_Vout_Lookup_Start 135 +(0047) #define ip_to_Vout_Lookup_Size 158 +(0048) const BYTE ip_to_Vout_Lookup[ip_to_Vout_Lookup_Size] = {0,1,1,2,3,4,4,5,6,7,8,8,9,10,11,12,12,13,14,15,16,17,17,18,19,20,21,22,22,23,24,25,26,27,27,28,29,30,31,32,33,34,34,35,36,37,38,39,40,41,42,43,44,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,76,77,78,79,80,81,82,83,84,86,87,88,89,90,91,92,94,95,96,97,98,100,101,102,103,105,106,107,108,110,111,112,113,115,116,117,119,120,123,126,129,132,135,138,141,144,147,151,154,157,161,164,168,171,175,178,182,186,190,194,197,201,206,210,214,218,222,227,231,236,240,245,250,255}; +(0049) #endif +(0050) +(0051) #define ip_to_Lambda_Lookup_Start 135 +(0052) #define ip_to_Lambda_Lookup_Size 158 +(0053) +(0054) const BYTE ip_to_Lambda_Lookup[ip_to_Lambda_Lookup_Size]={68,68,68,69,69,69,69,69,70,70,70,70,70,71,71,71,71,72,72,72,72,72,73,73,73,73,74,74,74,74,74,75,75,75,75,76,76,76,76,76,77,77,77,77,78,78,78,78,79,79,79,79,80,80,80,80,81,81,81,81,82,82,82,82,83,83,83,83,84,84,84,85,85,85,85,86,86,86,86,87,87,87,88,88,88,88,89,89,89,90,90,90,91,91,91,91,92,92,92,93,93,93,94,94,94,95,95,95,96,96,96,97,97,97,98,98,98,99,99,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,136}; +(0055) +(0056) #define Ri_Delta_to_Temperature_C_Start 113 +(0057) #define Ri_Delta_to_Temperature_C_Size 75 +(0058) #define Ri_Delta_to_Temperature_C_Offset 740 +(0059) //const BYTE Ri_Delta_to_Temperature_C[Ri_Delta_to_Temperature_C_Size]={80,78,77,75,74,73,71,70,68,67,65,64,63,61,60,59,58,56,55,54,52,51,50,49,48,46,45,44,43,42,41,40,39,37,36,35,34,33,32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,18,17,16,15,14,13,12,11,11,10,9,8,7,6,5,5,4,3,2,1,1,0}; +(0060) +(0061) INT Ri_Mid_Error_Sum=0; +(0062) INT Ri_Mid; +(0063) INT Ri_Delta_Error_Sum=0; +(0064) INT Ri_Delta; +(0065) #define Ia_PID_Counter_Set 1 +(0066) #define Heatup_Counter_Set 100 +(0067) #define Heater_PID_Counter_Set 25 +(0068) BYTE Heatup_Heater_Output=100; +(0069) +(0070) INT Ri_Delta_Error; +(0071) INT Heater_Output; +(0072) INT Heater_Pout; +(0073) INT Heater_Iout; +(0074) +(0075) //PID Controller, Input is Ri_Delta (The Peak to peak voltage on the Vs Port of the sensor) output is PWM8_Heater, PWM8_Heater is controlled such that Ri_Delta is maintained at 80 (80 =750C) +(0076) //Only a PI controller is used as adding the D term does not effect performance +(0077) //Everything is inflated by a factor of 4 so that floating point is avioded +(0078) void Heater_PID(void) // Ned to run this when counter >50 +(0079) { +(0080) Ri_Delta_Error=Ri_Delta_Target-Ri_Delta; +__UserModules_end|_ADCINC_wGetData|ADCINC_bClearFlagGetData|_ADCINC_fClearFlag|_ADCINC_iGetData|ADCINC_cGetData|_ADCINC_cClearFlagGetData|_ADCINC_bClearFlagGetData|_ADCINC_cGetData|_ADCINC_WritePulseWidth|ADCINC_wGetData|_ADCINC_bGetData|__text_start|...: + 0849: 50 8F MOV A,0x8F + 084B: 12 5B SUB A,[Ri_Delta+1] + 084D: 53 59 MOV [Ri_Delta_Error+1],A + 084F: 50 00 MOV A,0x0 + 0851: 1A 5A SBB A,[Ri_Delta] + 0853: 53 58 MOV [Ri_Delta_Error],A +(0081) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0082) if (Ri_Delta_Error>56) + 0855: 50 38 MOV A,0x38 + 0857: 12 59 SUB A,[Ri_Delta_Error+1] + 0859: 51 58 MOV A,[Ri_Delta_Error] + 085B: 31 80 XOR A,0x80 + 085D: 53 27 MOV [__rX],A + 085F: 50 80 MOV A,0x80 + 0861: 1A 27 SBB A,[__rX] + 0863: D0 07 JNC 0x086B +(0083) { +(0084) Ri_Delta_Error=56; + 0865: 55 59 38 MOV [Ri_Delta_Error+1],0x38 + 0868: 55 58 00 MOV [Ri_Delta_Error],0x0 +(0085) } +(0086) if (Ri_Delta_Error<-56) + 086B: 51 59 MOV A,[Ri_Delta_Error+1] + 086D: 11 C8 SUB A,0xC8 + 086F: 51 58 MOV A,[Ri_Delta_Error] + 0871: 31 80 XOR A,0x80 + 0873: 19 7F SBB A,0x7F + 0875: D0 07 JNC 0x087D +(0087) { +(0088) Ri_Delta_Error=-56; + 0877: 55 59 C8 MOV [Ri_Delta_Error+1],0xC8 + 087A: 55 58 FF MOV [Ri_Delta_Error],0xFF +(0089) } +(0090) Heater_Pout=(Heater_PID_Kp*Ri_Delta_Error)/16; + 087D: 5F 2A 59 MOV [__r1],[Ri_Delta_Error+1] + 0880: 5F 2B 58 MOV [__r0],[Ri_Delta_Error] + 0883: 55 28 B8 MOV [__r3],0xB8 + 0886: 55 29 FF MOV [__r2],0xFF + 0889: 55 27 00 MOV [__rX],0x0 + 088C: 55 26 00 MOV [__rY],0x0 + 088F: 3C 29 00 CMP [__r2],0x0 + 0892: B0 06 JNZ 0x0899 + 0894: 3C 28 00 CMP [__r3],0x0 + 0897: A0 17 JZ 0x08AF + 0899: 70 FB AND F,0xFB + 089B: 6E 29 RRC [__r2] + 089D: 6E 28 RRC [__r3] + 089F: D0 09 JNC 0x08A9 + 08A1: 51 2A MOV A,[__r1] + 08A3: 04 27 ADD [__rX],A + 08A5: 51 2B MOV A,[__r0] + 08A7: 0C 26 ADC [__rY],A + 08A9: 65 2A ASL [__r1] + 08AB: 6B 2B RLC [__r0] + 08AD: 8F E1 JMP 0x088F + 08AF: 5F 2A 27 MOV [__r1],[__rX] + 08B2: 5F 2B 26 MOV [__r0],[__rY] + 08B5: 50 00 MOV A,0x0 + 08B7: 08 PUSH A + 08B8: 50 10 MOV A,0x10 + 08BA: 08 PUSH A + 08BB: 51 2B MOV A,[__r0] + 08BD: 08 PUSH A + 08BE: 51 2A MOV A,[__r1] + 08C0: 08 PUSH A + 08C1: 7C 0F 83 LCALL 0x0F83 + 08C4: 18 POP A + 08C5: 53 55 MOV [Heater_Pout+1],A + 08C7: 18 POP A + 08C8: 53 54 MOV [Heater_Pout],A + 08CA: 38 FE ADD SP,0xFE +(0091) Ri_Delta_Error_Sum=Ri_Delta_Error_Sum+Ri_Delta_Error; + 08CC: 51 59 MOV A,[Ri_Delta_Error+1] + 08CE: 04 03 ADD [Ri_Delta_Error_Sum+1],A + 08D0: 51 58 MOV A,[Ri_Delta_Error] + 08D2: 0C 02 ADC [Ri_Delta_Error_Sum],A +(0092) //If the sensor is too hot, then disreguard the Integratal contribution and just use the proportional to quickly correct the sensor temperature +(0093) /* +(0094) if((Ri_Delta<60)&&(Ri_Delta_Error_Sum>0)) +(0095) { +(0096) Ri_Delta_Error_Sum=0; +(0097) } +(0098) */ +(0099) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0100) if (Ri_Delta_Error_Sum>1024) + 08D4: 50 00 MOV A,0x0 + 08D6: 12 03 SUB A,[Ri_Delta_Error_Sum+1] + 08D8: 51 02 MOV A,[Ri_Delta_Error_Sum] + 08DA: 31 80 XOR A,0x80 + 08DC: 53 27 MOV [__rX],A + 08DE: 50 84 MOV A,0x84 + 08E0: 1A 27 SBB A,[__rX] + 08E2: D0 07 JNC 0x08EA +(0101) { +(0102) Ri_Delta_Error_Sum=1024; + 08E4: 55 03 00 MOV [Ri_Delta_Error_Sum+1],0x0 + 08E7: 55 02 04 MOV [Ri_Delta_Error_Sum],0x4 +(0103) } +(0104) if (Ri_Delta_Error_Sum<-1024) + 08EA: 51 03 MOV A,[Ri_Delta_Error_Sum+1] + 08EC: 11 00 SUB A,0x0 + 08EE: 51 02 MOV A,[Ri_Delta_Error_Sum] + 08F0: 31 80 XOR A,0x80 + 08F2: 19 7C SBB A,0x7C + 08F4: D0 07 JNC 0x08FC +(0105) { +(0106) Ri_Delta_Error_Sum=-1024; + 08F6: 55 03 00 MOV [Ri_Delta_Error_Sum+1],0x0 + 08F9: 55 02 FC MOV [Ri_Delta_Error_Sum],0xFC +(0107) } +(0108) Heater_Iout=(Heater_PID_Ki*Ri_Delta_Error_Sum)/16; + 08FC: 5F 2A 03 MOV [__r1],[Ri_Delta_Error_Sum+1] + 08FF: 5F 2B 02 MOV [__r0],[Ri_Delta_Error_Sum] + 0902: 55 28 FC MOV [__r3],0xFC + 0905: 55 29 FF MOV [__r2],0xFF + 0908: 55 27 00 MOV [__rX],0x0 + 090B: 55 26 00 MOV [__rY],0x0 + 090E: 3C 29 00 CMP [__r2],0x0 + 0911: B0 06 JNZ 0x0918 + 0913: 3C 28 00 CMP [__r3],0x0 + 0916: A0 17 JZ 0x092E + 0918: 70 FB AND F,0xFB + 091A: 6E 29 RRC [__r2] + 091C: 6E 28 RRC [__r3] + 091E: D0 09 JNC 0x0928 + 0920: 51 2A MOV A,[__r1] + 0922: 04 27 ADD [__rX],A + 0924: 51 2B MOV A,[__r0] + 0926: 0C 26 ADC [__rY],A + 0928: 65 2A ASL [__r1] + 092A: 6B 2B RLC [__r0] + 092C: 8F E1 JMP 0x090E + 092E: 5F 2A 27 MOV [__r1],[__rX] + 0931: 5F 2B 26 MOV [__r0],[__rY] + 0934: 50 00 MOV A,0x0 + 0936: 08 PUSH A + 0937: 50 10 MOV A,0x10 + 0939: 08 PUSH A + 093A: 51 2B MOV A,[__r0] + 093C: 08 PUSH A + 093D: 51 2A MOV A,[__r1] + 093F: 08 PUSH A + 0940: 7C 0F 83 LCALL 0x0F83 + 0943: 18 POP A + 0944: 53 53 MOV [Heater_Iout+1],A + 0946: 18 POP A + 0947: 53 52 MOV [Heater_Iout],A + 0949: 38 FE ADD SP,0xFE +(0109) if (Heatup_Heater_Output<255) // if Heatup_Heater_Output is < 255 that means the unit just turned on and to give control to the heatup routine + 094B: 3C 04 FF CMP [Heatup_Heater_Output],0xFF + 094E: D0 09 JNC 0x0958 +(0110) { +(0111) Heater_Output=Heatup_Heater_Output; + 0950: 5F 57 04 MOV [Heater_Output+1],[Heatup_Heater_Output] + 0953: 55 56 00 MOV [Heater_Output],0x0 +(0112) } + 0956: 80 19 JMP 0x0970 +(0113) else +(0114) { +(0115) Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; + 0958: 51 55 MOV A,[Heater_Pout+1] + 095A: 01 80 ADD A,0x80 + 095C: 53 2A MOV [__r1],A + 095E: 51 54 MOV A,[Heater_Pout] + 0960: 09 00 ADC A,0x0 + 0962: 53 2B MOV [__r0],A + 0964: 51 2A MOV A,[__r1] + 0966: 02 53 ADD A,[Heater_Iout+1] + 0968: 53 57 MOV [Heater_Output+1],A + 096A: 51 2B MOV A,[__r0] + 096C: 0A 52 ADC A,[Heater_Iout] + 096E: 53 56 MOV [Heater_Output],A +(0116) } +(0117) //Heater_Output=Heater_PID_Output_Bias+Heater_Pout+Heater_Iout; +(0118) if (Heater_Output<0) + 0970: 51 57 MOV A,[Heater_Output+1] + 0972: 11 00 SUB A,0x0 + 0974: 51 56 MOV A,[Heater_Output] + 0976: 31 80 XOR A,0x80 + 0978: 19 80 SBB A,0x80 + 097A: D0 07 JNC 0x0982 +(0119) { +(0120) Heater_Output=0; + 097C: 55 57 00 MOV [Heater_Output+1],0x0 + 097F: 55 56 00 MOV [Heater_Output],0x0 +(0121) } +(0122) if (Heater_Output>255) + 0982: 50 FF MOV A,0xFF + 0984: 12 57 SUB A,[Heater_Output+1] + 0986: 51 56 MOV A,[Heater_Output] + 0988: 31 80 XOR A,0x80 + 098A: 53 27 MOV [__rX],A + 098C: 50 80 MOV A,0x80 + 098E: 1A 27 SBB A,[__rX] + 0990: D0 07 JNC 0x0998 +(0123) { +(0124) Heater_Output=255; + 0992: 55 57 FF MOV [Heater_Output+1],0xFF + 0995: 55 56 00 MOV [Heater_Output],0x0 +(0125) } +(0126) +(0127) +(0128) PWM8_Heater_WritePulseWidth(Heater_Output); + 0998: 5F 2B 57 MOV [__r0],[Heater_Output+1] + 099B: 10 PUSH X + 099C: 51 2B MOV A,[__r0] + 099E: 7C 04 87 LCALL PWM8_Heater_WritePulseWidth|_PWM8_Heater_WritePeriod|_PWM8_Heater_Stop|_PWM8_Heater_WritePulseWidth + 09A1: 20 POP X + 09A2: 7F RET +(0129) //PWM8_Heater_WritePulseWidth(200); +(0130) } +(0131) +(0132) INT Ri_Mid_Error; +(0133) INT Ia_Output; +(0134) INT Ia_Pout; +(0135) INT Ia_Iout; +(0136) //PID Controller, Input is Ri_Mid (The average voltage on the Vs Port of the sensor) output is DAC9_Ia, DAC9_Ia sink/sources current to the Sensor pump cell such that Ri_Mid is is the same voltage as Vref +(0137) //Only a PI controller is used as adding the D term does not effect performance +(0138) //Everything is inflated by a factor of 4 so that floating point is avioded +(0139) void Ia_PID(void) +(0140) { +(0141) +(0142) +(0143) Ri_Mid_Error=Ri_Mid_Target-Ri_Mid; +_Ia_PID: + 09A3: 50 0F MOV A,0xF + 09A5: 12 5D SUB A,[Ri_Mid+1] + 09A7: 53 51 MOV [Ri_Mid_Error+1],A + 09A9: 50 01 MOV A,0x1 + 09AB: 1A 5C SBB A,[Ri_Mid] + 09AD: 53 50 MOV [Ri_Mid_Error],A +(0144) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0145) if (Ri_Mid_Error>163) + 09AF: 50 A3 MOV A,0xA3 + 09B1: 12 51 SUB A,[Ri_Mid_Error+1] + 09B3: 51 50 MOV A,[Ri_Mid_Error] + 09B5: 31 80 XOR A,0x80 + 09B7: 53 27 MOV [__rX],A + 09B9: 50 80 MOV A,0x80 + 09BB: 1A 27 SBB A,[__rX] + 09BD: D0 07 JNC 0x09C5 +(0146) { +(0147) Ri_Mid_Error=163; + 09BF: 55 51 A3 MOV [Ri_Mid_Error+1],0xA3 + 09C2: 55 50 00 MOV [Ri_Mid_Error],0x0 +(0148) } +(0149) if (Ri_Mid_Error<-163) + 09C5: 51 51 MOV A,[Ri_Mid_Error+1] + 09C7: 11 5D SUB A,0x5D + 09C9: 51 50 MOV A,[Ri_Mid_Error] + 09CB: 31 80 XOR A,0x80 + 09CD: 19 7F SBB A,0x7F + 09CF: D0 07 JNC 0x09D7 +(0150) { +(0151) Ri_Mid_Error=-163; + 09D1: 55 51 5D MOV [Ri_Mid_Error+1],0x5D + 09D4: 55 50 FF MOV [Ri_Mid_Error],0xFF +(0152) } +(0153) Ia_Pout=(Ia_PID_Kp*Ri_Mid_Error)/16; + 09D7: 5F 2A 51 MOV [__r1],[Ri_Mid_Error+1] + 09DA: 5F 2B 50 MOV [__r0],[Ri_Mid_Error] + 09DD: 55 28 19 MOV [__r3],0x19 + 09E0: 55 29 00 MOV [__r2],0x0 + 09E3: 55 27 00 MOV [__rX],0x0 + 09E6: 55 26 00 MOV [__rY],0x0 + 09E9: 3C 29 00 CMP [__r2],0x0 + 09EC: B0 06 JNZ 0x09F3 + 09EE: 3C 28 00 CMP [__r3],0x0 + 09F1: A0 17 JZ 0x0A09 + 09F3: 70 FB AND F,0xFB + 09F5: 6E 29 RRC [__r2] + 09F7: 6E 28 RRC [__r3] + 09F9: D0 09 JNC 0x0A03 + 09FB: 51 2A MOV A,[__r1] + 09FD: 04 27 ADD [__rX],A + 09FF: 51 2B MOV A,[__r0] + 0A01: 0C 26 ADC [__rY],A + 0A03: 65 2A ASL [__r1] + 0A05: 6B 2B RLC [__r0] + 0A07: 8F E1 JMP 0x09E9 + 0A09: 5F 2A 27 MOV [__r1],[__rX] + 0A0C: 5F 2B 26 MOV [__r0],[__rY] + 0A0F: 50 00 MOV A,0x0 + 0A11: 08 PUSH A + 0A12: 50 10 MOV A,0x10 + 0A14: 08 PUSH A + 0A15: 51 2B MOV A,[__r0] + 0A17: 08 PUSH A + 0A18: 51 2A MOV A,[__r1] + 0A1A: 08 PUSH A + 0A1B: 7C 0F 83 LCALL 0x0F83 + 0A1E: 18 POP A + 0A1F: 53 4D MOV [Ia_Pout+1],A + 0A21: 18 POP A + 0A22: 53 4C MOV [Ia_Pout],A + 0A24: 38 FE ADD SP,0xFE +(0154) Ri_Mid_Error_Sum=Ri_Mid_Error_Sum+Ri_Mid_Error; + 0A26: 51 51 MOV A,[Ri_Mid_Error+1] + 0A28: 04 01 ADD [Ri_Mid_Error_Sum+1],A + 0A2A: 51 50 MOV A,[Ri_Mid_Error] + 0A2C: 0C 00 ADC [Ri_Mid_Error_Sum],A +(0155) //Put limits on Error so PID does not go Fubar, and also so that the worst case multiplication does not overflow +(0156) if (Ri_Mid_Error_Sum>1020) + 0A2E: 50 FC MOV A,0xFC + 0A30: 12 01 SUB A,[Ri_Mid_Error_Sum+1] + 0A32: 51 00 MOV A,[Ri_Mid_Error_Sum] + 0A34: 31 80 XOR A,0x80 + 0A36: 53 27 MOV [__rX],A + 0A38: 50 83 MOV A,0x83 + 0A3A: 1A 27 SBB A,[__rX] + 0A3C: D0 07 JNC 0x0A44 +(0157) { +(0158) Ri_Mid_Error_Sum=1020; + 0A3E: 55 01 FC MOV [Ri_Mid_Error_Sum+1],0xFC + 0A41: 55 00 03 MOV [Ri_Mid_Error_Sum],0x3 +(0159) } +(0160) if (Ri_Mid_Error_Sum<-1020) + 0A44: 51 01 MOV A,[Ri_Mid_Error_Sum+1] + 0A46: 11 04 SUB A,0x4 + 0A48: 51 00 MOV A,[Ri_Mid_Error_Sum] + 0A4A: 31 80 XOR A,0x80 + 0A4C: 19 7C SBB A,0x7C + 0A4E: D0 07 JNC 0x0A56 +(0161) { +(0162) Ri_Mid_Error_Sum=-1020; + 0A50: 55 01 04 MOV [Ri_Mid_Error_Sum+1],0x4 + 0A53: 55 00 FC MOV [Ri_Mid_Error_Sum],0xFC +(0163) } +(0164) Ia_Iout=(Ia_PID_Ki*Ri_Mid_Error_Sum)/16; + 0A56: 5F 2A 01 MOV [__r1],[Ri_Mid_Error_Sum+1] + 0A59: 5F 2B 00 MOV [__r0],[Ri_Mid_Error_Sum] + 0A5C: 65 2A ASL [__r1] + 0A5E: 6B 2B RLC [__r0] + 0A60: 65 2A ASL [__r1] + 0A62: 6B 2B RLC [__r0] + 0A64: 50 00 MOV A,0x0 + 0A66: 08 PUSH A + 0A67: 50 10 MOV A,0x10 + 0A69: 08 PUSH A + 0A6A: 51 2B MOV A,[__r0] + 0A6C: 08 PUSH A + 0A6D: 51 2A MOV A,[__r1] + 0A6F: 08 PUSH A + 0A70: 7C 0F 83 LCALL 0x0F83 + 0A73: 18 POP A + 0A74: 53 4B MOV [Ia_Iout+1],A + 0A76: 18 POP A + 0A77: 53 4A MOV [Ia_Iout],A + 0A79: 38 FE ADD SP,0xFE +(0165) Ia_Output=Ia_Output_Bias+Ia_Pout+Ia_Iout; + 0A7B: 51 4D MOV A,[Ia_Pout+1] + 0A7D: 01 00 ADD A,0x0 + 0A7F: 53 2A MOV [__r1],A + 0A81: 51 4C MOV A,[Ia_Pout] + 0A83: 09 01 ADC A,0x1 + 0A85: 53 2B MOV [__r0],A + 0A87: 51 2A MOV A,[__r1] + 0A89: 02 4B ADD A,[Ia_Iout+1] + 0A8B: 53 4F MOV [Ia_Output+1],A + 0A8D: 51 2B MOV A,[__r0] + 0A8F: 0A 4A ADC A,[Ia_Iout] + 0A91: 53 4E MOV [Ia_Output],A +(0166) //9 Bit Dac so only 0-511 is allowed, for some reason i put the limit at 510, I foget exactly why. +(0167) if (Ia_Output<0) + 0A93: 51 4F MOV A,[Ia_Output+1] + 0A95: 11 00 SUB A,0x0 + 0A97: 51 4E MOV A,[Ia_Output] + 0A99: 31 80 XOR A,0x80 + 0A9B: 19 80 SBB A,0x80 + 0A9D: D0 07 JNC 0x0AA5 +(0168) { +(0169) Ia_Output=0; + 0A9F: 55 4F 00 MOV [Ia_Output+1],0x0 + 0AA2: 55 4E 00 MOV [Ia_Output],0x0 +(0170) } +(0171) if (Ia_Output>510) + 0AA5: 50 FE MOV A,0xFE + 0AA7: 12 4F SUB A,[Ia_Output+1] + 0AA9: 51 4E MOV A,[Ia_Output] + 0AAB: 31 80 XOR A,0x80 + 0AAD: 53 27 MOV [__rX],A + 0AAF: 50 81 MOV A,0x81 + 0AB1: 1A 27 SBB A,[__rX] + 0AB3: D0 07 JNC 0x0ABB +(0172) { +(0173) Ia_Output=510; + 0AB5: 55 4F FE MOV [Ia_Output+1],0xFE + 0AB8: 55 4E 01 MOV [Ia_Output],0x1 +(0174) } +(0175) DAC9_Ia_WriteStall (Ia_Output); + 0ABB: 10 PUSH X + 0ABC: 58 4E MOV X,[Ia_Output] + 0ABE: 51 4F MOV A,[Ia_Output+1] + 0AC0: 7C 06 B5 LCALL _DAC9_Ia_WriteStall|_DAC9_Ia_WriteBlind|DAC9_Ia_WriteBlind2B|_DAC9_Ia_WriteBlind2B + 0AC3: 20 POP X + 0AC4: 7F RET +(0176) //DAC9_Ia_WriteStall (256); +(0177) } +(0178) INT IIR_Int(INT Vin, INT Vout, BYTE A) +(0179) { +_IIR_Int: + A --> X-8 + Vout --> X-7 + Vin --> X-5 + 0AC5: 10 PUSH X + 0AC6: 4F MOV X,SP +(0180) return (Vout + (Vin - Vout)/A); + 0AC7: 52 FC MOV A,[X-4] + 0AC9: 13 FA SUB A,[X-6] + 0ACB: 53 2A MOV [__r1],A + 0ACD: 52 FB MOV A,[X-5] + 0ACF: 1B F9 SBB A,[X-7] + 0AD1: 53 2B MOV [__r0],A + 0AD3: 52 F8 MOV A,[X-8] + 0AD5: 53 28 MOV [__r3],A + 0AD7: 50 00 MOV A,0x0 + 0AD9: 08 PUSH A + 0ADA: 51 28 MOV A,[__r3] + 0ADC: 08 PUSH A + 0ADD: 51 2B MOV A,[__r0] + 0ADF: 08 PUSH A + 0AE0: 51 2A MOV A,[__r1] + 0AE2: 08 PUSH A + 0AE3: 7C 0F 83 LCALL 0x0F83 + 0AE6: 18 POP A + 0AE7: 53 2A MOV [__r1],A + 0AE9: 18 POP A + 0AEA: 53 2B MOV [__r0],A + 0AEC: 38 FE ADD SP,0xFE + 0AEE: 52 FA MOV A,[X-6] + 0AF0: 02 2A ADD A,[__r1] + 0AF2: 53 2A MOV [__r1],A + 0AF4: 52 F9 MOV A,[X-7] + 0AF6: 0A 2B ADC A,[__r0] + 0AF8: 53 2B MOV [__r0],A + 0AFA: 20 POP X + 0AFB: 7F RET +(0181) } +(0182) +(0183) char toChar(BYTE base10) +(0184) { +_toChar: + ascii --> X+0 + base10 --> X-4 + 0AFC: 10 PUSH X + 0AFD: 4F MOV X,SP + 0AFE: 38 03 ADD SP,0x3 +(0185) char ascii; +(0186) switch (base10) + 0B00: 52 FC MOV A,[X-4] + 0B02: 54 02 MOV [X+2],A + 0B04: 56 01 00 MOV [X+1],0x0 + 0B07: 3D 01 00 CMP [X+1],0x0 + 0B0A: B0 06 JNZ 0x0B11 + 0B0C: 3D 02 00 CMP [X+2],0x0 + 0B0F: A0 5D JZ 0x0B6D + 0B11: 3D 01 00 CMP [X+1],0x0 + 0B14: B0 06 JNZ 0x0B1B + 0B16: 3D 02 01 CMP [X+2],0x1 + 0B19: A0 58 JZ 0x0B72 + 0B1B: 3D 01 00 CMP [X+1],0x0 + 0B1E: B0 06 JNZ 0x0B25 + 0B20: 3D 02 02 CMP [X+2],0x2 + 0B23: A0 53 JZ 0x0B77 + 0B25: 3D 01 00 CMP [X+1],0x0 + 0B28: B0 06 JNZ 0x0B2F + 0B2A: 3D 02 03 CMP [X+2],0x3 + 0B2D: A0 4E JZ 0x0B7C + 0B2F: 3D 01 00 CMP [X+1],0x0 + 0B32: B0 06 JNZ 0x0B39 + 0B34: 3D 02 04 CMP [X+2],0x4 + 0B37: A0 49 JZ 0x0B81 + 0B39: 3D 01 00 CMP [X+1],0x0 + 0B3C: B0 06 JNZ 0x0B43 + 0B3E: 3D 02 05 CMP [X+2],0x5 + 0B41: A0 44 JZ 0x0B86 + 0B43: 3D 01 00 CMP [X+1],0x0 + 0B46: B0 06 JNZ 0x0B4D + 0B48: 3D 02 06 CMP [X+2],0x6 + 0B4B: A0 3F JZ 0x0B8B + 0B4D: 3D 01 00 CMP [X+1],0x0 + 0B50: B0 06 JNZ 0x0B57 + 0B52: 3D 02 07 CMP [X+2],0x7 + 0B55: A0 3A JZ 0x0B90 + 0B57: 3D 01 00 CMP [X+1],0x0 + 0B5A: B0 06 JNZ 0x0B61 + 0B5C: 3D 02 08 CMP [X+2],0x8 + 0B5F: A0 35 JZ 0x0B95 + 0B61: 3D 01 00 CMP [X+1],0x0 + 0B64: B0 06 JNZ 0x0B6B + 0B66: 3D 02 09 CMP [X+2],0x9 + 0B69: A0 30 JZ 0x0B9A + 0B6B: 80 31 JMP 0x0B9D +(0187) { +(0188) case 0: +(0189) ascii='0'; + 0B6D: 56 00 30 MOV [X+0],0x30 +(0190) break; + 0B70: 80 2C JMP 0x0B9D +(0191) case 1: +(0192) ascii='1'; + 0B72: 56 00 31 MOV [X+0],0x31 +(0193) break; + 0B75: 80 27 JMP 0x0B9D +(0194) case 2: +(0195) ascii='2'; + 0B77: 56 00 32 MOV [X+0],0x32 +(0196) break; + 0B7A: 80 22 JMP 0x0B9D +(0197) case 3: +(0198) ascii='3'; + 0B7C: 56 00 33 MOV [X+0],0x33 +(0199) break; + 0B7F: 80 1D JMP 0x0B9D +(0200) case 4: +(0201) ascii='4'; + 0B81: 56 00 34 MOV [X+0],0x34 +(0202) break; + 0B84: 80 18 JMP 0x0B9D +(0203) case 5: +(0204) ascii='5'; + 0B86: 56 00 35 MOV [X+0],0x35 +(0205) break; + 0B89: 80 13 JMP 0x0B9D +(0206) case 6: +(0207) ascii='6'; + 0B8B: 56 00 36 MOV [X+0],0x36 +(0208) break; + 0B8E: 80 0E JMP 0x0B9D +(0209) case 7: +(0210) ascii='7'; + 0B90: 56 00 37 MOV [X+0],0x37 +(0211) break; + 0B93: 80 09 JMP 0x0B9D +(0212) case 8: +(0213) ascii='8'; + 0B95: 56 00 38 MOV [X+0],0x38 +(0214) break; + 0B98: 80 04 JMP 0x0B9D +(0215) case 9: +(0216) ascii='9'; + 0B9A: 56 00 39 MOV [X+0],0x39 +(0217) } +(0218) return (ascii); + 0B9D: 52 00 MOV A,[X+0] + 0B9F: 38 FD ADD SP,0xFD + 0BA1: 20 POP X + 0BA2: 7F RET +(0219) } +(0220) +(0221) +(0222) BYTE Ia_PID_Counter=0; +(0223) +(0224) BYTE Heater_PID_Counter=0; +(0225) BYTE LCD_Counter=0; +(0226) BYTE Heatup_Counter=0; +(0227) INT Ri_Min,Ri_Max; +(0228) INT ip; +(0229) +(0230) //INT LSU_Temperature_C; +(0231) char Str1[] = "Lambda:x.xx xxxC"; +(0232) char Str2[] = "Heating..."; +(0233) +(0234) void main(void) +(0235) { +_main: + temp_int --> X+0 + 0BA3: 10 PUSH X + 0BA4: 4F MOV X,SP + 0BA5: 38 02 ADD SP,0x2 +(0236) //unsigned long temp_ulong; +(0237) INT temp_int; +(0238) +(0239) AMUX4_0_InputSelect(AMUX4_0_PORT0_1); + 0BA7: 10 PUSH X + 0BA8: 50 00 MOV A,0x0 + 0BAA: 7C 07 2F LCALL _AMUX4_1_Start|_AMUX4_1_Stop|_AMUX4_0_InputSelect|AMUX4_0_InputSelect +(0240) AMUX4_1_InputSelect(AMUX4_1_PORT0_0); + 0BAD: 50 00 MOV A,0x0 + 0BAF: 7C 07 18 LCALL AMUX4_1_InputSelect|_DAC6_VGND_Stop|_AMUX4_1_InputSelect +(0241) INSAMP_Start(INSAMP_LOWPOWER); + 0BB2: 50 01 MOV A,0x1 + 0BB4: 7C 06 89 LCALL _INSAMP_SetPower|_INSAMP_Start|INSAMP_Start +(0242) ADCINC_Start(ADCINC_HIGHPOWER); + 0BB7: 50 03 MOV A,0x3 + 0BB9: 7C 08 00 LCALL _ADCINC_Start +(0243) DAC9_Ia_Start(DAC9_Ia_HIGHPOWER); + 0BBC: 50 03 MOV A,0x3 + 0BBE: 7C 06 9F LCALL _INSAMP_Stop|_DAC9_Ia_Start|DAC9_Ia_Start|_INSAMP_SetGain|DAC9_Ia_SetPower|_DAC9_Ia_SetPower +(0244) DAC6_VGND_Start(DAC6_VGND_MEDPOWER); + 0BC1: 50 02 MOV A,0x2 + 0BC3: 7C 06 F5 LCALL _DAC9_Ia_Stop|DAC6_VGND_Start|_DAC6_VGND_Start|_DAC6_VGND_SetPower|DAC6_VGND_SetPower +(0245) DAC6_VGND_WriteStall (31); + 0BC6: 50 1F MOV A,0x1F + 0BC8: 7C 06 FC LCALL DAC6_VGND_WriteStall|_DAC6_VGND_WriteBlind|_DAC6_VGND_WriteStall +(0246) PWM8_Vout_DisableInt(); + 0BCB: 7C 04 67 LCALL _PWM8_Vout_DisableInt|_PWM8_Vout_EnableInt +(0247) PWM8_Vout_Start(); + 0BCE: 7C 04 6B LCALL _PWM8_Vout_Start +(0248) PWM8_Heater_DisableInt(); + 0BD1: 7C 04 7F LCALL _PWM8_Heater_DisableInt|_PWM8_Heater_EnableInt +(0249) PWM8_Heater_Start(); + 0BD4: 7C 04 83 LCALL _PWM8_Heater_Start +(0250) PWM8_NB_Out_DisableInt(); + 0BD7: 7C 04 73 LCALL PWM8_NB_Out_DisableInt|_PWM8_NB_Out_EnableInt|_PWM8_NB_Out_DisableInt +(0251) PWM8_NB_Out_Start(); + 0BDA: 7C 04 77 LCALL _PWM8_NB_Out_Start +(0252) ADCINC_GetSamples(0); + 0BDD: 50 00 MOV A,0x0 + 0BDF: 7C 08 20 LCALL ADCINC_GetSamples|_ADCINC_Stop|_ADCINC_GetSamples +(0253) SleepTimer_Start(); + 0BE2: 7C 04 43 LCALL _SleepTimer_Start|_SleepTimer_DisableInt +(0254) SleepTimer_SetInterval(SleepTimer_512_HZ); + 0BE5: 50 00 MOV A,0x0 + 0BE7: 7C 04 54 LCALL _SleepTimer_SetInterval|_SleepTimer_Stop +(0255) SleepTimer_EnableInt(); + 0BEA: 7C 04 3F LCALL _SleepTimer_EnableInt + 0BED: 20 POP X +(0256) M8C_EnableGInt ; + 0BEE: 71 01 OR F,0x1 +(0257) LCD_Start(); // Initialize LCD + 0BF0: 10 PUSH X + 0BF1: 7C 05 84 LCALL _LCD_Start|LCD_Init|LCD_Start|_LCD_Init +(0258) LCD_InitBG(LCD_SOLID_BG); + 0BF4: 50 00 MOV A,0x0 + 0BF6: 7C 06 59 LCALL _LCD_InitBG +(0259) +(0260) LCD_Position(0,0); + 0BF9: 50 00 MOV A,0x0 + 0BFB: 57 00 MOV X,0x0 + 0BFD: 7C 05 F4 LCALL _LCD_Position +(0261) LCD_PrString(Str2); + 0C00: 50 00 MOV A,0x0 + 0C02: 08 PUSH A + 0C03: 50 1A MOV A,0x1A + 0C05: 5C MOV X,A + 0C06: 18 POP A + 0C07: 7C 04 BF LCALL _LCD_PrString|_LCD_PrHexInt +(0262) //default to lambda 1 during heatup +(0263) PWM8_Vout_WritePulseWidth(119); + 0C0A: 50 77 MOV A,0x77 + 0C0C: 7C 04 6F LCALL _PWM8_Vout_WritePulseWidth|_PWM8_Vout_Stop|_PWM8_Vout_WritePeriod + 0C0F: 20 POP X +(0264) +(0265) for(;;) +(0266) { +(0267) //temp_ulong++; +(0268) if ((ADC_IF&1)==1) + 0C10: 51 43 MOV A,[0x43] + 0C12: 21 01 AND A,0x1 + 0C14: 39 01 CMP A,0x1 + 0C16: B0 56 JNZ 0x0C6D +(0269) { +(0270) ADC_IF=ADC_IF&254; + 0C18: 26 43 FE AND [0x43],0xFE +(0271) Ri_Min=IIR_Int(Ri_Min_x1*2,Ri_Min,Ri_Filter_Strength); + 0C1B: 50 04 MOV A,0x4 + 0C1D: 08 PUSH A + 0C1E: 51 48 MOV A,[Ri_Min] + 0C20: 08 PUSH A + 0C21: 51 49 MOV A,[Ri_Min+1] + 0C23: 08 PUSH A + 0C24: 5F 2A 41 MOV [__r1],[0x41] + 0C27: 55 2B 00 MOV [__r0],0x0 + 0C2A: 65 2A ASL [__r1] + 0C2C: 6B 2B RLC [__r0] + 0C2E: 51 2B MOV A,[__r0] + 0C30: 08 PUSH A + 0C31: 51 2A MOV A,[__r1] + 0C33: 08 PUSH A + 0C34: 9E 8F CALL _IIR_Int + 0C36: 38 FB ADD SP,0xFB + 0C38: 5F 49 2A MOV [Ri_Min+1],[__r1] + 0C3B: 5F 48 2B MOV [Ri_Min],[__r0] +(0272) Ri_Delta=Ri_Max-Ri_Min; + 0C3E: 51 47 MOV A,[Ri_Max+1] + 0C40: 12 49 SUB A,[Ri_Min+1] + 0C42: 53 5B MOV [Ri_Delta+1],A + 0C44: 51 46 MOV A,[Ri_Max] + 0C46: 1A 48 SBB A,[Ri_Min] + 0C48: 53 5A MOV [Ri_Delta],A +(0273) Ri_Mid=(Ri_Max+Ri_Min)/2; + 0C4A: 51 47 MOV A,[Ri_Max+1] + 0C4C: 02 49 ADD A,[Ri_Min+1] + 0C4E: 53 2A MOV [__r1],A + 0C50: 51 46 MOV A,[Ri_Max] + 0C52: 0A 48 ADC A,[Ri_Min] + 0C54: 53 2B MOV [__r0],A + 0C56: 50 00 MOV A,0x0 + 0C58: 08 PUSH A + 0C59: 50 02 MOV A,0x2 + 0C5B: 08 PUSH A + 0C5C: 51 2B MOV A,[__r0] + 0C5E: 08 PUSH A + 0C5F: 51 2A MOV A,[__r1] + 0C61: 08 PUSH A + 0C62: 7C 0F 83 LCALL 0x0F83 + 0C65: 18 POP A + 0C66: 53 5D MOV [Ri_Mid+1],A + 0C68: 18 POP A + 0C69: 53 5C MOV [Ri_Mid],A + 0C6B: 38 FE ADD SP,0xFE +(0274) } +(0275) if ((ADC_IF&2)==2) + 0C6D: 51 43 MOV A,[0x43] + 0C6F: 21 02 AND A,0x2 + 0C71: 39 02 CMP A,0x2 + 0C73: B0 56 JNZ 0x0CCA +(0276) { +(0277) ADC_IF=ADC_IF&253; + 0C75: 26 43 FD AND [0x43],0xFD +(0278) Ri_Max=IIR_Int(Ri_Max_x1*2,Ri_Max,Ri_Filter_Strength); + 0C78: 50 04 MOV A,0x4 + 0C7A: 08 PUSH A + 0C7B: 51 46 MOV A,[Ri_Max] + 0C7D: 08 PUSH A + 0C7E: 51 47 MOV A,[Ri_Max+1] + 0C80: 08 PUSH A + 0C81: 5F 2A 40 MOV [__r1],[0x40] + 0C84: 55 2B 00 MOV [__r0],0x0 + 0C87: 65 2A ASL [__r1] + 0C89: 6B 2B RLC [__r0] + 0C8B: 51 2B MOV A,[__r0] + 0C8D: 08 PUSH A + 0C8E: 51 2A MOV A,[__r1] + 0C90: 08 PUSH A + 0C91: 9E 32 CALL _IIR_Int + 0C93: 38 FB ADD SP,0xFB + 0C95: 5F 47 2A MOV [Ri_Max+1],[__r1] + 0C98: 5F 46 2B MOV [Ri_Max],[__r0] +(0279) Ri_Delta=Ri_Max-Ri_Min; + 0C9B: 51 47 MOV A,[Ri_Max+1] + 0C9D: 12 49 SUB A,[Ri_Min+1] + 0C9F: 53 5B MOV [Ri_Delta+1],A + 0CA1: 51 46 MOV A,[Ri_Max] + 0CA3: 1A 48 SBB A,[Ri_Min] + 0CA5: 53 5A MOV [Ri_Delta],A +(0280) Ri_Mid=(Ri_Max+Ri_Min)/2; + 0CA7: 51 47 MOV A,[Ri_Max+1] + 0CA9: 02 49 ADD A,[Ri_Min+1] + 0CAB: 53 2A MOV [__r1],A + 0CAD: 51 46 MOV A,[Ri_Max] + 0CAF: 0A 48 ADC A,[Ri_Min] + 0CB1: 53 2B MOV [__r0],A + 0CB3: 50 00 MOV A,0x0 + 0CB5: 08 PUSH A + 0CB6: 50 02 MOV A,0x2 + 0CB8: 08 PUSH A + 0CB9: 51 2B MOV A,[__r0] + 0CBB: 08 PUSH A + 0CBC: 51 2A MOV A,[__r1] + 0CBE: 08 PUSH A + 0CBF: 7C 0F 83 LCALL 0x0F83 + 0CC2: 18 POP A + 0CC3: 53 5D MOV [Ri_Mid+1],A + 0CC5: 18 POP A + 0CC6: 53 5C MOV [Ri_Mid],A + 0CC8: 38 FE ADD SP,0xFE +(0281) } +(0282) if ((ADC_IF&4)==4) + 0CCA: 51 43 MOV A,[0x43] + 0CCC: 21 04 AND A,0x4 + 0CCE: 39 04 CMP A,0x4 + 0CD0: B0 27 JNZ 0x0CF8 +(0283) { +(0284) ADC_IF=ADC_IF&251; + 0CD2: 26 43 FB AND [0x43],0xFB +(0285) ip=IIR_Int(ip_x1*2,ip,ip_Filter_Strength); + 0CD5: 50 04 MOV A,0x4 + 0CD7: 08 PUSH A + 0CD8: 51 44 MOV A,[ip] + 0CDA: 08 PUSH A + 0CDB: 51 45 MOV A,[ip+1] + 0CDD: 08 PUSH A + 0CDE: 5F 2A 42 MOV [__r1],[0x42] + 0CE1: 55 2B 00 MOV [__r0],0x0 + 0CE4: 65 2A ASL [__r1] + 0CE6: 6B 2B RLC [__r0] + 0CE8: 51 2B MOV A,[__r0] + 0CEA: 08 PUSH A + 0CEB: 51 2A MOV A,[__r1] + 0CED: 08 PUSH A + 0CEE: 9D D5 CALL _IIR_Int + 0CF0: 38 FB ADD SP,0xFB + 0CF2: 5F 45 2A MOV [ip+1],[__r1] + 0CF5: 5F 44 2B MOV [ip],[__r0] +(0286) } +(0287) Ia_PID_Counter+=Sleep_Counter; + 0CF8: 51 33 MOV A,[0x33] + 0CFA: 04 05 ADD [Ia_PID_Counter],A +(0288) Heater_PID_Counter+=Sleep_Counter; + 0CFC: 51 33 MOV A,[0x33] + 0CFE: 04 06 ADD [Heater_PID_Counter],A +(0289) Heatup_Counter+=Sleep_Counter; + 0D00: 51 33 MOV A,[0x33] + 0D02: 04 08 ADD [Heatup_Counter],A +(0290) LCD_Counter+=Sleep_Counter; + 0D04: 51 33 MOV A,[0x33] + 0D06: 04 07 ADD [LCD_Counter],A +(0291) Sleep_Counter=0; + 0D08: 55 33 00 MOV [0x33],0x0 +(0292) //1 thus 1.95ms @ 512hz +(0293) if (Ia_PID_Counter>Ia_PID_Counter_Set) + 0D0B: 50 01 MOV A,0x1 + 0D0D: 3A 05 CMP A,[Ia_PID_Counter] + 0D0F: D0 06 JNC 0x0D16 +(0294) { +(0295) Ia_PID_Counter=0; + 0D11: 55 05 00 MOV [Ia_PID_Counter],0x0 +(0296) Ia_PID(); + 0D14: 9C 8D CALL _Ia_PID +(0297) } +(0298) //25 thus 48.82ms @ 512hz +(0299) if (Heater_PID_Counter>Heater_PID_Counter_Set && Heatup_Heater_Output >= 255) + 0D16: 50 19 MOV A,0x19 + 0D18: 3A 06 CMP A,[Heater_PID_Counter] + 0D1A: D0 86 JNC 0x0DA1 + 0D1C: 3C 04 FF CMP [Heatup_Heater_Output],0xFF + 0D1F: C0 81 JC 0x0DA1 +(0300) { +(0301) Heater_PID_Counter=0; + 0D21: 55 06 00 MOV [Heater_PID_Counter],0x0 +(0302) Heater_PID(); + 0D24: 9B 23 CALL __UserModules_end|_ADCINC_wGetData|ADCINC_bClearFlagGetData|_ADCINC_fClearFlag|_ADCINC_iGetData|ADCINC_cGetData|_ADCINC_cClearFlagGetData|_ADCINC_bClearFlagGetData|_ADCINC_cGetData|_ADCINC_WritePulseWidth|ADCINC_wGetData|_ADCINC_bGetData|__text_start|... +(0303) +(0304) temp_int=ip-ip_to_Vout_Lookup_Start; + 0D26: 51 45 MOV A,[ip+1] + 0D28: 11 87 SUB A,0x87 + 0D2A: 54 01 MOV [X+1],A + 0D2C: 51 44 MOV A,[ip] + 0D2E: 19 00 SBB A,0x0 + 0D30: 54 00 MOV [X+0],A +(0305) if (temp_int<0) + 0D32: 52 01 MOV A,[X+1] + 0D34: 11 00 SUB A,0x0 + 0D36: 52 00 MOV A,[X+0] + 0D38: 31 80 XOR A,0x80 + 0D3A: 19 80 SBB A,0x80 + 0D3C: D0 07 JNC 0x0D44 +(0306) { +(0307) temp_int=0; + 0D3E: 56 01 00 MOV [X+1],0x0 + 0D41: 56 00 00 MOV [X+0],0x0 +(0308) } +(0309) if (temp_int>(ip_to_Vout_Lookup_Size-1)) + 0D44: 50 9D MOV A,0x9D + 0D46: 13 01 SUB A,[X+1] + 0D48: 52 00 MOV A,[X+0] + 0D4A: 31 80 XOR A,0x80 + 0D4C: 53 27 MOV [__rX],A + 0D4E: 50 80 MOV A,0x80 + 0D50: 1A 27 SBB A,[__rX] + 0D52: D0 07 JNC 0x0D5A +(0310) { +(0311) temp_int=(ip_to_Vout_Lookup_Size-1); + 0D54: 56 01 9D MOV [X+1],0x9D + 0D57: 56 00 00 MOV [X+0],0x0 +(0312) } +(0313) +(0314) PWM8_Vout_WritePulseWidth(ip_to_Vout_Lookup[temp_int]); + 0D5A: 52 01 MOV A,[X+1] + 0D5C: 01 50 ADD A,0x50 + 0D5E: 53 2A MOV [__r1],A + 0D60: 52 00 MOV A,[X+0] + 0D62: 09 01 ADC A,0x1 + 0D64: 10 PUSH X + 0D65: 58 2A MOV X,[__r1] + 0D67: 28 ROMX + 0D68: 7C 04 6F LCALL _PWM8_Vout_WritePulseWidth|_PWM8_Vout_Stop|_PWM8_Vout_WritePeriod + 0D6B: 20 POP X +(0315) +(0316) #ifdef NB_Out +(0317) temp_int=23;//0.45v + 0D6C: 56 01 17 MOV [X+1],0x17 + 0D6F: 56 00 00 MOV [X+0],0x0 +(0318) if (ip<251) // 251 =0.9797787392968 + 0D72: 51 45 MOV A,[ip+1] + 0D74: 11 FB SUB A,0xFB + 0D76: 51 44 MOV A,[ip] + 0D78: 31 80 XOR A,0x80 + 0D7A: 19 80 SBB A,0x80 + 0D7C: D0 07 JNC 0x0D84 +(0319) { +(0320) temp_int=46; //0.9v + 0D7E: 56 01 2E MOV [X+1],0x2E + 0D81: 56 00 00 MOV [X+0],0x0 +(0321) +(0322) } +(0323) if (ip>259) //259 = 1.02295956968912 + 0D84: 50 03 MOV A,0x3 + 0D86: 12 45 SUB A,[ip+1] + 0D88: 51 44 MOV A,[ip] + 0D8A: 31 80 XOR A,0x80 + 0D8C: 53 27 MOV [__rX],A + 0D8E: 50 81 MOV A,0x81 + 0D90: 1A 27 SBB A,[__rX] + 0D92: D0 07 JNC 0x0D9A +(0324) { +(0325) temp_int=0; //0v + 0D94: 56 01 00 MOV [X+1],0x0 + 0D97: 56 00 00 MOV [X+0],0x0 +(0326) } +(0327) +(0328) PWM8_NB_Out_WritePulseWidth(temp_int); + 0D9A: 52 01 MOV A,[X+1] + 0D9C: 10 PUSH X + 0D9D: 7C 04 7B LCALL _PWM8_NB_Out_Stop|_PWM8_NB_Out_WritePulseWidth|_PWM8_NB_Out_WritePeriod|PWM8_NB_Out_WritePulseWidth + 0DA0: 20 POP X +(0329) #endif +(0330) +(0331) } +(0332) //50 thus 97.66ms @ 512hz +(0333) if (LCD_Counter>LCD_Counter_Set && Heatup_Heater_Output >= 255) + 0DA1: 50 32 MOV A,0x32 + 0DA3: 3A 07 CMP A,[LCD_Counter] + 0DA5: D1 95 JNC 0x0F3B + 0DA7: 3C 04 FF CMP [Heatup_Heater_Output],0xFF + 0DAA: C1 90 JC 0x0F3B +(0334) { +(0335) LCD_Counter=0; + 0DAC: 55 07 00 MOV [LCD_Counter],0x0 +(0336) +(0337) temp_int = ip-ip_to_Lambda_Lookup_Start; + 0DAF: 51 45 MOV A,[ip+1] + 0DB1: 11 87 SUB A,0x87 + 0DB3: 54 01 MOV [X+1],A + 0DB5: 51 44 MOV A,[ip] + 0DB7: 19 00 SBB A,0x0 + 0DB9: 54 00 MOV [X+0],A +(0338) if (temp_int<0) + 0DBB: 52 01 MOV A,[X+1] + 0DBD: 11 00 SUB A,0x0 + 0DBF: 52 00 MOV A,[X+0] + 0DC1: 31 80 XOR A,0x80 + 0DC3: 19 80 SBB A,0x80 + 0DC5: D0 07 JNC 0x0DCD +(0339) { +(0340) temp_int=0; + 0DC7: 56 01 00 MOV [X+1],0x0 + 0DCA: 56 00 00 MOV [X+0],0x0 +(0341) } +(0342) if (temp_int>(ip_to_Lambda_Lookup_Size-1)) + 0DCD: 50 9D MOV A,0x9D + 0DCF: 13 01 SUB A,[X+1] + 0DD1: 52 00 MOV A,[X+0] + 0DD3: 31 80 XOR A,0x80 + 0DD5: 53 27 MOV [__rX],A + 0DD7: 50 80 MOV A,0x80 + 0DD9: 1A 27 SBB A,[__rX] + 0DDB: D0 07 JNC 0x0DE3 +(0343) { +(0344) temp_int=(ip_to_Lambda_Lookup_Size-1); + 0DDD: 56 01 9D MOV [X+1],0x9D + 0DE0: 56 00 00 MOV [X+0],0x0 +(0345) } +(0346) temp_int=ip_to_Lambda_Lookup[temp_int]; + 0DE3: 52 01 MOV A,[X+1] + 0DE5: 01 EE ADD A,0xEE + 0DE7: 53 2A MOV [__r1],A + 0DE9: 52 00 MOV A,[X+0] + 0DEB: 09 01 ADC A,0x1 + 0DED: 10 PUSH X + 0DEE: 58 2A MOV X,[__r1] + 0DF0: 28 ROMX + 0DF1: 20 POP X + 0DF2: 54 01 MOV [X+1],A + 0DF4: 56 00 00 MOV [X+0],0x0 +(0347) +(0348) LCD_DrawBG(1,0,16,(temp_int -56)); + 0DF7: 52 01 MOV A,[X+1] + 0DF9: 11 38 SUB A,0x38 + 0DFB: 10 PUSH X + 0DFC: 08 PUSH A + 0DFD: 50 10 MOV A,0x10 + 0DFF: 08 PUSH A + 0E00: 50 00 MOV A,0x0 + 0E02: 08 PUSH A + 0E03: 50 01 MOV A,0x1 + 0E05: 08 PUSH A + 0E06: 7C 06 22 LCALL _LCD_DrawBG + 0E09: 38 FC ADD SP,0xFC +(0349) +(0350) LCD_Position(0,0); + 0E0B: 50 00 MOV A,0x0 + 0E0D: 57 00 MOV X,0x0 + 0E0F: 7C 05 F4 LCALL _LCD_Position + 0E12: 20 POP X +(0351) Str1[7]=toChar(temp_int/100); + 0E13: 50 00 MOV A,0x0 + 0E15: 08 PUSH A + 0E16: 50 64 MOV A,0x64 + 0E18: 08 PUSH A + 0E19: 52 00 MOV A,[X+0] + 0E1B: 08 PUSH A + 0E1C: 52 01 MOV A,[X+1] + 0E1E: 08 PUSH A + 0E1F: 7C 0F 83 LCALL 0x0F83 + 0E22: 18 POP A + 0E23: 53 2A MOV [__r1],A + 0E25: 18 POP A + 0E26: 38 FE ADD SP,0xFE + 0E28: 51 2A MOV A,[__r1] + 0E2A: 08 PUSH A + 0E2B: 9C CF CALL _toChar + 0E2D: 38 FF ADD SP,0xFF + 0E2F: 53 10 MOV [Str1+7],A +(0352) Str1[9]=toChar((temp_int/10)%10); + 0E31: 50 00 MOV A,0x0 + 0E33: 08 PUSH A + 0E34: 50 0A MOV A,0xA + 0E36: 08 PUSH A + 0E37: 52 00 MOV A,[X+0] + 0E39: 08 PUSH A + 0E3A: 52 01 MOV A,[X+1] + 0E3C: 08 PUSH A + 0E3D: 7C 0F 83 LCALL 0x0F83 + 0E40: 18 POP A + 0E41: 53 2A MOV [__r1],A + 0E43: 18 POP A + 0E44: 53 2B MOV [__r0],A + 0E46: 38 FE ADD SP,0xFE + 0E48: 50 00 MOV A,0x0 + 0E4A: 08 PUSH A + 0E4B: 50 0A MOV A,0xA + 0E4D: 08 PUSH A + 0E4E: 51 2B MOV A,[__r0] + 0E50: 08 PUSH A + 0E51: 51 2A MOV A,[__r1] + 0E53: 08 PUSH A + 0E54: 7C 0F 83 LCALL 0x0F83 + 0E57: 38 FE ADD SP,0xFE + 0E59: 18 POP A + 0E5A: 53 2A MOV [__r1],A + 0E5C: 18 POP A + 0E5D: 51 2A MOV A,[__r1] + 0E5F: 08 PUSH A + 0E60: 9C 9A CALL _toChar + 0E62: 38 FF ADD SP,0xFF + 0E64: 53 12 MOV [Str1+9],A +(0353) Str1[10]=toChar(temp_int%10); + 0E66: 50 00 MOV A,0x0 + 0E68: 08 PUSH A + 0E69: 50 0A MOV A,0xA + 0E6B: 08 PUSH A + 0E6C: 52 00 MOV A,[X+0] + 0E6E: 08 PUSH A + 0E6F: 52 01 MOV A,[X+1] + 0E71: 08 PUSH A + 0E72: 7C 0F 83 LCALL 0x0F83 + 0E75: 38 FE ADD SP,0xFE + 0E77: 18 POP A + 0E78: 53 2A MOV [__r1],A + 0E7A: 18 POP A + 0E7B: 51 2A MOV A,[__r1] + 0E7D: 08 PUSH A + 0E7E: 9C 7C CALL _toChar + 0E80: 38 FF ADD SP,0xFF + 0E82: 53 13 MOV [Str1+10],A +(0354) +(0355) temp_int=Ri_Delta-Ri_Delta_to_Temperature_C_Start; + 0E84: 51 5B MOV A,[Ri_Delta+1] + 0E86: 11 71 SUB A,0x71 + 0E88: 54 01 MOV [X+1],A + 0E8A: 51 5A MOV A,[Ri_Delta] + 0E8C: 19 00 SBB A,0x0 + 0E8E: 54 00 MOV [X+0],A +(0356) if (temp_int<0) + 0E90: 52 01 MOV A,[X+1] + 0E92: 11 00 SUB A,0x0 + 0E94: 52 00 MOV A,[X+0] + 0E96: 31 80 XOR A,0x80 + 0E98: 19 80 SBB A,0x80 + 0E9A: D0 07 JNC 0x0EA2 +(0357) { +(0358) temp_int=0; + 0E9C: 56 01 00 MOV [X+1],0x0 + 0E9F: 56 00 00 MOV [X+0],0x0 +(0359) } +(0360) if (temp_int>(Ri_Delta_to_Temperature_C_Size-1)) + 0EA2: 50 4A MOV A,0x4A + 0EA4: 13 01 SUB A,[X+1] + 0EA6: 52 00 MOV A,[X+0] + 0EA8: 31 80 XOR A,0x80 + 0EAA: 53 27 MOV [__rX],A + 0EAC: 50 80 MOV A,0x80 + 0EAE: 1A 27 SBB A,[__rX] + 0EB0: D0 07 JNC 0x0EB8 +(0361) { +(0362) temp_int=(Ri_Delta_to_Temperature_C_Size-1); + 0EB2: 56 01 4A MOV [X+1],0x4A + 0EB5: 56 00 00 MOV [X+0],0x0 +(0363) } +(0364) //temp_int=Ri_Delta_to_Temperature_C[temp_int]+Ri_Delta_to_Temperature_C_Offset; +(0365) //temp_int=LSU_Temperature_C; +(0366) temp_int = 749 + temp_int; + 0EB8: 07 01 ED ADD [X+1],0xED + 0EBB: 0F 00 02 ADC [X+0],0x2 +(0367) Str1[12]=toChar(temp_int/100); + 0EBE: 50 00 MOV A,0x0 + 0EC0: 08 PUSH A + 0EC1: 50 64 MOV A,0x64 + 0EC3: 08 PUSH A + 0EC4: 52 00 MOV A,[X+0] + 0EC6: 08 PUSH A + 0EC7: 52 01 MOV A,[X+1] + 0EC9: 08 PUSH A + 0ECA: 7C 0F 83 LCALL 0x0F83 + 0ECD: 18 POP A + 0ECE: 53 2A MOV [__r1],A + 0ED0: 18 POP A + 0ED1: 38 FE ADD SP,0xFE + 0ED3: 51 2A MOV A,[__r1] + 0ED5: 08 PUSH A + 0ED6: 9C 24 CALL _toChar + 0ED8: 38 FF ADD SP,0xFF + 0EDA: 53 15 MOV [Str1+12],A +(0368) Str1[13]=toChar((temp_int/10)%10); + 0EDC: 50 00 MOV A,0x0 + 0EDE: 08 PUSH A + 0EDF: 50 0A MOV A,0xA + 0EE1: 08 PUSH A + 0EE2: 52 00 MOV A,[X+0] + 0EE4: 08 PUSH A + 0EE5: 52 01 MOV A,[X+1] + 0EE7: 08 PUSH A + 0EE8: 7C 0F 83 LCALL 0x0F83 + 0EEB: 18 POP A + 0EEC: 53 2A MOV [__r1],A + 0EEE: 18 POP A + 0EEF: 53 2B MOV [__r0],A + 0EF1: 38 FE ADD SP,0xFE + 0EF3: 50 00 MOV A,0x0 + 0EF5: 08 PUSH A + 0EF6: 50 0A MOV A,0xA + 0EF8: 08 PUSH A + 0EF9: 51 2B MOV A,[__r0] + 0EFB: 08 PUSH A + 0EFC: 51 2A MOV A,[__r1] + 0EFE: 08 PUSH A + 0EFF: 7C 0F 83 LCALL 0x0F83 + 0F02: 38 FE ADD SP,0xFE + 0F04: 18 POP A + 0F05: 53 2A MOV [__r1],A + 0F07: 18 POP A + 0F08: 51 2A MOV A,[__r1] + 0F0A: 08 PUSH A + 0F0B: 9B EF CALL _toChar + 0F0D: 38 FF ADD SP,0xFF + 0F0F: 53 16 MOV [Str1+13],A +(0369) Str1[14]=toChar(temp_int%10); + 0F11: 50 00 MOV A,0x0 + 0F13: 08 PUSH A + 0F14: 50 0A MOV A,0xA + 0F16: 08 PUSH A + 0F17: 52 00 MOV A,[X+0] + 0F19: 08 PUSH A + 0F1A: 52 01 MOV A,[X+1] + 0F1C: 08 PUSH A + 0F1D: 7C 0F 83 LCALL 0x0F83 + 0F20: 38 FE ADD SP,0xFE + 0F22: 18 POP A + 0F23: 53 2A MOV [__r1],A + 0F25: 18 POP A + 0F26: 51 2A MOV A,[__r1] + 0F28: 08 PUSH A + 0F29: 9B D1 CALL _toChar + 0F2B: 38 FF ADD SP,0xFF + 0F2D: 53 17 MOV [Str1+14],A +(0370) LCD_PrString(Str1); + 0F2F: 10 PUSH X + 0F30: 50 00 MOV A,0x0 + 0F32: 08 PUSH A + 0F33: 50 09 MOV A,0x9 + 0F35: 5C MOV X,A + 0F36: 18 POP A + 0F37: 7C 04 BF LCALL _LCD_PrString|_LCD_PrHexInt + 0F3A: 20 POP X +(0371) +(0372) } +(0373) +(0374) if (Heatup_Heater_Output<255) + 0F3B: 3C 04 FF CMP [Heatup_Heater_Output],0xFF + 0F3E: DC D1 JNC 0x0C10 +(0375) { +(0376) //100 thus 195.31ms @ 512hz +(0377) if (Heatup_Counter>Heatup_Counter_Set) + 0F40: 50 64 MOV A,0x64 + 0F42: 3A 08 CMP A,[Heatup_Counter] + 0F44: D0 06 JNC 0x0F4B +(0378) { +(0379) Heatup_Counter=0; + 0F46: 55 08 00 MOV [Heatup_Counter],0x0 +(0380) Heatup_Heater_Output++; + 0F49: 76 04 INC [Heatup_Heater_Output] +(0381) //LCD_DrawBG(1,0,16,(Heatup_Heater_Output-100)); +(0382) +(0383) } +(0384) +(0385) +(0386) if ((Ri_Min>50) && (Ri_Max<475) && (Ri_Delta<Ri_Delta_Target)) + 0F4B: 50 32 MOV A,0x32 + 0F4D: 12 49 SUB A,[Ri_Min+1] + 0F4F: 51 48 MOV A,[Ri_Min] + 0F51: 31 80 XOR A,0x80 + 0F53: 53 27 MOV [__rX],A + 0F55: 50 80 MOV A,0x80 + 0F57: 1A 27 SBB A,[__rX] + 0F59: DC B6 JNC 0x0C10 + 0F5B: 51 47 MOV A,[Ri_Max+1] + 0F5D: 11 DB SUB A,0xDB + 0F5F: 51 46 MOV A,[Ri_Max] + 0F61: 31 80 XOR A,0x80 + 0F63: 19 81 SBB A,0x81 + 0F65: DC AA JNC 0x0C10 + 0F67: 51 5B MOV A,[Ri_Delta+1] + 0F69: 11 8F SUB A,0x8F + 0F6B: 51 5A MOV A,[Ri_Delta] + 0F6D: 31 80 XOR A,0x80 + 0F6F: 19 80 SBB A,0x80 + 0F71: DC 9E JNC 0x0C10 +(0387) { +(0388) Heatup_Heater_Output=255; + 0F73: 55 04 FF MOV [Heatup_Heater_Output],0xFF +(0389) Ri_Delta_Error_Sum=0; + 0F76: 55 03 00 MOV [Ri_Delta_Error_Sum+1],0x0 + 0F79: 55 02 00 MOV [Ri_Delta_Error_Sum],0x0 +(0390) } +(0391) +(0392) } +(0393) } + 0F7C: 8C 93 JMP 0x0C10 +(0394) } + 0F7E: 38 FE ADD SP,0xFE + 0F80: 20 POP X + 0F81: 8F FF JMP 0x0F81 diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp new file mode 100644 index 0000000..4e7c958 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.mp @@ -0,0 +1,345 @@ +Project: output/SLC_Free_Open_Source +Build Number: 0 +Date: Tue Nov 13 12:56:12 2018 +Compiler: ICCM8C +Version: 7.05.00 + + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + lit 0150 01DC = 476. bytes (rel,con,rom,lit) + + Addr Global Symbol + ----- -------------------------------- + 0150 _ip_to_Vout_Lookup + 01EE _ip_to_Lambda_Lookup + 028C LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank0 + 02F1 LoadConfigTBL_slc_free_28_pin_feb_16_2013_Bank1 + 032C __lit_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + idata 032C 0025 = 37. bytes (rel,con,rom,lit) + + Addr Global Symbol + ----- -------------------------------- + 032C __idata_start + 0351 __idata_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + psoc_config 0351 00CC = 204. bytes (rel,con,rom,code) + + Addr Global Symbol + ----- -------------------------------- + 0351 LoadConfigTBL_slc_free_28_pin_feb_16_2013_Ordered + 03B6 LoadConfigInit + 03B6 _LoadConfigInit + 03C6 _LoadConfig_slc_free_28_pin_feb_16_2013 + 03C6 LoadConfig_slc_free_28_pin_feb_16_2013 + 041D __psoc_config_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + UserModules 041D 042C = 1068. bytes (rel,con,rom,code) + + Addr Global Symbol + ----- -------------------------------- + 041D _SleepTimer_ISR + 043F _SleepTimer_EnableInt + 043F SleepTimer_EnableInt + 0443 _SleepTimer_Start + 0443 SleepTimer_Start + 0443 _SleepTimer_DisableInt + 0454 SleepTimer_SetInterval + 0454 _SleepTimer_SetInterval + 0454 _SleepTimer_Stop + 0466 _SleepTimer_TickWait + 0466 _SleepTimer_SetTimer + 0466 _SleepTimer_SyncWait + 0466 _SleepTimer_bGetTickCntr + 0466 _SleepTimer_bGetTimer + 0466 _SleepTimer_iGetTickCntr + 0466 _SleepTimer_lGetTickCntr + 0466 _PWM8_Vout_ISR + 0467 _PWM8_Vout_DisableInt + 0467 PWM8_Vout_DisableInt + 0467 _PWM8_Vout_EnableInt + 046B PWM8_Vout_Start + 046B _PWM8_Vout_Start + 046F PWM8_Vout_WritePulseWidth + 046F _PWM8_Vout_WritePulseWidth + 046F _PWM8_Vout_Stop + 046F _PWM8_Vout_WritePeriod + 0472 bPWM8_Vout_ReadPulseWidth + 0472 _bPWM8_Vout_ReadPulseWidth + 0472 bPWM8_Vout_ReadCounter + 0472 _PWM8_Vout_bReadCounter + 0472 _PWM8_Vout_bReadPulseWidth + 0472 _PWM8_NB_Out_ISR + 0472 _bPWM8_Vout_ReadCounter + 0473 PWM8_NB_Out_DisableInt + 0473 _PWM8_NB_Out_EnableInt + 0473 _PWM8_NB_Out_DisableInt + 0477 _PWM8_NB_Out_Start + 0477 PWM8_NB_Out_Start + 047B _PWM8_NB_Out_Stop + 047B _PWM8_NB_Out_WritePulseWidth + 047B _PWM8_NB_Out_WritePeriod + 047B PWM8_NB_Out_WritePulseWidth + 047E _PWM8_Heater_ISR + 047E _PWM8_NB_Out_bReadCounter + 047E _bPWM8_NB_Out_ReadCounter + 047E _PWM8_NB_Out_bReadPulseWidth + 047E bPWM8_NB_Out_ReadCounter + 047E _bPWM8_NB_Out_ReadPulseWidth + 047E bPWM8_NB_Out_ReadPulseWidth + 047F _PWM8_Heater_DisableInt + 047F PWM8_Heater_DisableInt + 047F _PWM8_Heater_EnableInt + 0483 _PWM8_Heater_Start + 0483 PWM8_Heater_Start + 0487 PWM8_Heater_WritePulseWidth + 0487 _PWM8_Heater_WritePeriod + 0487 _PWM8_Heater_Stop + 0487 _PWM8_Heater_WritePulseWidth + 048A _bPWM8_Heater_ReadPulseWidth + 048A bPWM8_Heater_ReadPulseWidth + 048A _PWM8_Heater_bReadCounter + 048A _bPWM8_Heater_ReadCounter + 048A bPWM8_Heater_ReadCounter + 048A _LCD_PrCString + 048A LCD_PrCString + 048A _PWM8_Heater_bReadPulseWidth + 049C LCD_HEX_STR + 04AC _LCD_PrHexByte + 04AC LCD_PrHexByte + 04BF LCD_PrString + 04BF _LCD_PrString + 04BF _LCD_PrHexInt + 04C9 LCD_WriteData + 04C9 LCD_Write_Data + 04C9 _LCD_WriteData + 04C9 _LCD_Write_Data + 04DD LCD_Control + 04DD _LCD_Control + 0584 _LCD_Start + 0584 LCD_Init + 0584 LCD_Start + 0584 _LCD_Init + 05F0 LCD_ROW_OFFSET + 05F4 LCD_Position + 05F4 _LCD_Position + 0600 _LCD_Delay50uTimes + 0600 LCD_Delay50uTimes + 0606 LCD_Delay50u_Table + 060E LCD_Delay50u + 060E _LCD_Delay50u + 0622 _LCD_DrawBG + 064B LCD_BG_TYPE1 + 064B _LCD_InitVBG + 0652 LCD_BG_TYPE2 + 0659 _LCD_InitBG + 0659 LCD_InitBG + 0689 INSAMP_SetPower + 0689 _INSAMP_SetPower + 0689 _INSAMP_Start + 0689 INSAMP_Start + 069F _INSAMP_Stop + 069F _DAC9_Ia_Start + 069F DAC9_Ia_Start + 069F _INSAMP_SetGain + 069F DAC9_Ia_SetPower + 069F _DAC9_Ia_SetPower + 06B5 _DAC9_Ia_WriteStall + 06B5 DAC9_Ia_WriteStall + 06B5 _DAC9_Ia_WriteBlind + 06B5 DAC9_Ia_WriteBlind2B + 06B5 _DAC9_Ia_WriteBlind2B + 06E4 DAC9_Ia_WriteStall2B + 06E4 _DAC9_Ia_WriteStall2B + 06F5 _DAC9_Ia_Stop + 06F5 DAC6_VGND_Start + 06F5 _DAC6_VGND_Start + 06F5 _DAC6_VGND_SetPower + 06F5 DAC6_VGND_SetPower + 06FC DAC6_VGND_WriteStall + 06FC _DAC6_VGND_WriteBlind + 06FC _DAC6_VGND_WriteStall + 0718 AMUX4_1_InputSelect + 0718 _DAC6_VGND_Stop + 0718 _AMUX4_1_InputSelect + 072F _AMUX4_1_Start + 072F _AMUX4_1_Stop + 072F _AMUX4_0_InputSelect + 072F AMUX4_0_InputSelect + 0746 _AMUX4_0_Start + 0746 _AMUX4_0_Stop + 0746 _ADCINC_ADConversion_ISR + 0800 ADCINC_Start + 0800 _ADCINC_Start + 0812 ADCINC_SetPower + 0812 _ADCINC_SetPower + 0820 ADCINC_GetSamples + 0820 _ADCINC_Stop + 0820 _ADCINC_GetSamples + 083C _ADCINC_StopADC + 083C _ADCINC_iClearFlagGetData + 083C _ADCINC_fIsDataAvailable + 083C _ADCINC_wClearFlagGetData + 083C ADCINC_iClearFlagGetData + 083C ADCINC_wClearFlagGetData + 0849 __UserModules_end + 0849 _ADCINC_wGetData + 0849 ADCINC_bClearFlagGetData + 0849 _ADCINC_fClearFlag + 0849 _ADCINC_iGetData + 0849 ADCINC_cGetData + 0849 _ADCINC_cClearFlagGetData + 0849 _ADCINC_bClearFlagGetData + 0849 _ADCINC_cGetData + 0849 _ADCINC_WritePulseWidth + 0849 ADCINC_wGetData + 0849 _ADCINC_bGetData + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + text 0849 07B5 = 1973. bytes (rel,con,rom,code) + + Addr Global Symbol + ----- -------------------------------- + 0849 __text_start + 0849 _Heater_PID + 09A3 _Ia_PID + 0AC5 _IIR_Int + 0AFC _toChar + 0BA3 _main + 0FFE __text_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + data 0000 0025 = 37. bytes (rel,con,ram) + + Addr Global Symbol + ----- -------------------------------- + 0000 _Ri_Mid_Error_Sum + 0000 __data_start + 0002 _Ri_Delta_Error_Sum + 0004 _Heatup_Heater_Output + 0005 _Ia_PID_Counter + 0006 _Heater_PID_Counter + 0007 _LCD_Counter + 0008 _Heatup_Counter + 0009 _Str1 + 001A _Str2 + 0025 __data_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + virtual_registers 0025 0007 = 7. bytes (rel,con,ram) + + Addr Global Symbol + ----- -------------------------------- + 0025 __rZ + 0026 __rY + 0027 __rX + 0028 __r3 + 0029 __r2 + 002A __r1 + 002B __r0 + 002C __virtual_registers_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + InterruptRAM 002C 0018 = 24. bytes (rel,con,ram) + + Addr Global Symbol + ----- -------------------------------- + 002C _SleepTimer_fTick + 002C SleepTimer_fTick + 002D _SleepTimer_bTimerValue + 002D SleepTimer_bTimerValue + 002E SleepTimer_bCountDown + 002E _SleepTimer_bCountDown + 002F _SleepTimer_TickCount + 002F SleepTimer_TickCount + 0033 _Sleep_Counter + 0033 Sleep_Counter + 0034 _Port_2_Data_SHADE + 0034 NO_SHADOW + 0034 _NO_SHADOW + 0034 Port_2_Data_SHADE + 0035 _Port_2_DriveMode_0_SHADE + 0035 Port_2_DriveMode_0_SHADE + 0036 _Port_2_DriveMode_1_SHADE + 0036 Port_2_DriveMode_1_SHADE + 0037 _ADCINC_iResult + 0037 ADCINC_iResult + 003B ADCINC_fStatus + 003B _ADCINC_fStatus + 003C _ADCINC_bState + 003C ADCINC_bState + 003D _ADCINC_fMode + 003D ADCINC_fMode + 003E ADCINC_bNumSamples + 003E _ADCINC_bNumSamples + 003F _ADC_Counter + 003F ADC_Counter + 0040 _Ri_Max_x1 + 0040 Ri_Max_x1 + 0041 Ri_Min_x1 + 0041 _Ri_Min_x1 + 0042 _ip_x1 + 0042 ip_x1 + 0043 _ADC_IF + 0043 ADC_IF + 0044 __InterruptRAM_end + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + bss 0044 001A = 26. bytes (rel,con,ram) + + Addr Global Symbol + ----- -------------------------------- + 0044 __bss_start + 0044 _ip + 0046 _Ri_Max + 0048 _Ri_Min + 004A _Ia_Iout + 004C _Ia_Pout + 004E _Ia_Output + 0050 _Ri_Mid_Error + 0052 _Heater_Iout + 0054 _Heater_Pout + 0056 _Heater_Output + 0058 _Ri_Delta_Error + 005A _Ri_Delta + 005C _Ri_Mid + 005E __bss_end + 005E __ramareas_end + +Area Start End Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ + TOP 0000 00D4 = 212. bytes (abs,ovr,rom,code) + + Addr Global Symbol + ----- -------------------------------- + 0068 __Start + 00D1 _bGetPowerSetting + 00D1 bGetPowerSetting + +Files Linked [ module(s) ] + +./obj/boot.o [ boot.asm ] +obj/main.o [ main.c ] +<library> [ sleeptimerint.asm, sleeptimer.asm, pwm8_voutint.asm, pwm8_vout.asm, pwm8_nb_outint.asm, pwm8_nb_out.asm ] +[ pwm8_heaterint.asm, pwm8_heater.asm, psocconfigtbl.asm, psocconfig.asm, lcd.asm, insamp.asm ] +[ dac9_ia.asm, dac6_vgnd.asm, amux4_1.asm, amux4_0.asm, adcincint.asm, adcinc.asm, rZ.asm, rY.asm ] +[ rX.asm, r3.asm, r2.asm, r1.asm, r0.asm, divmod_16x16_16_util.asm, i_div16_block_util.asm ] + +Area Definitions + +-blit:0x150.0xfff +-bdata:0.0xff +-rwh:SSCParmBlk:0xf7.0xff + diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom new file mode 100644 index 0000000..8c2bf3b --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/output/SLC_Free_Open_Source.rom @@ -0,0 +1,512 @@ +80 67 30 30 30 30 30 30 +7E 30 30 30 7E 30 30 30 +30 30 30 30 30 30 30 30 +7E 30 30 30 7E 30 30 30 +7D 07 46 7E 7D 04 7E 7E +7D 04 66 7E 7D 04 72 7E +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +7E 30 30 30 7D 04 1D 7E +71 10 62 E3 86 70 EF 62 +E3 38 41 FE FB 50 5E 4E +62 E3 38 55 F8 00 55 F9 +00 71 10 62 E0 02 70 EF +62 E3 38 62 71 05 62 75 +05 7C 03 B6 50 00 55 2B +44 3C 2B 5E A0 05 3F 2B +8F F8 50 03 57 2C 55 2B +00 3C 2B 25 A0 0B 08 28 +3F 2B 18 75 09 00 8F F2 +71 10 43 E3 20 70 EF 62 +E0 00 71 10 62 E0 03 70 +EF 62 E2 00 7C 0B A3 8F +FF 50 10 7F 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +30 30 30 30 30 30 30 30 +00 01 01 02 03 04 04 05 +06 07 08 08 09 0A 0B 0C +0C 0D 0E 0F 10 11 11 12 +13 14 15 16 16 17 18 19 +1A 1B 1B 1C 1D 1E 1F 20 +21 22 22 23 24 25 26 27 +28 29 2A 2B 2C 2C 2D 2E +2F 30 31 32 33 34 35 36 +37 38 39 3A 3B 3C 3D 3E +3F 40 41 42 43 44 45 46 +47 48 49 4A 4C 4D 4E 4F +50 51 52 53 54 56 57 58 +59 5A 5B 5C 5E 5F 60 61 +62 64 65 66 67 69 6A 6B +6C 6E 6F 70 71 73 74 75 +77 78 7B 7E 81 84 87 8A +8D 90 93 97 9A 9D A1 A4 +A8 AB AF B2 B6 BA BE C2 +C5 C9 CE D2 D6 DA DE E3 +E7 EC F0 F5 FA FF 44 44 +44 45 45 45 45 45 46 46 +46 46 46 47 47 47 47 48 +48 48 48 48 49 49 49 49 +4A 4A 4A 4A 4A 4B 4B 4B +4B 4C 4C 4C 4C 4C 4D 4D +4D 4D 4E 4E 4E 4E 4F 4F +4F 4F 50 50 50 50 51 51 +51 51 52 52 52 52 53 53 +53 53 54 54 54 55 55 55 +55 56 56 56 56 57 57 57 +58 58 58 58 59 59 59 5A +5A 5A 5B 5B 5B 5B 5C 5C +5C 5D 5D 5D 5E 5E 5E 5F +5F 5F 60 60 60 61 61 61 +62 62 62 63 63 63 64 65 +66 67 68 69 6A 6B 6C 6D +6E 6F 70 71 72 73 74 75 +76 77 78 79 7A 7B 7C 7D +7E 7F 80 81 82 83 84 85 +86 87 88 88 84 90 85 00 +86 60 87 F8 23 00 21 00 +22 01 80 80 81 40 82 A0 +83 30 90 80 91 80 92 20 +93 30 94 A0 95 41 96 A0 +97 34 71 DD 72 21 73 20 +70 00 75 1C 76 21 77 20 +74 00 27 00 25 FF 26 00 +2F 00 2D FF 2E 00 2B 00 +29 FF 2A 00 60 09 66 00 +63 3F 65 00 E6 02 E7 02 +D6 00 B0 00 B1 00 B2 00 +B3 33 B4 33 B5 88 B6 08 +FF 20 31 21 16 22 40 24 +31 25 11 26 44 2C 31 2D +14 2E 06 28 31 29 14 2A +05 61 00 69 00 60 05 62 +29 67 33 68 00 63 00 66 +00 D1 00 D3 00 D0 00 D2 +00 E1 0B E2 00 DF 2F DE +00 DD 00 FF 00 00 00 00 +64 00 00 00 00 4C 61 6D +62 64 61 3A 78 2E 78 78 +20 78 78 78 43 00 48 65 +61 74 69 6E 67 2E 2E 2E +00 70 EF 62 00 00 71 10 +62 00 04 62 01 FB 70 EF +62 03 FB 62 02 00 71 10 +62 02 00 62 03 00 70 EF +62 01 00 62 04 00 71 10 +62 04 70 62 05 8F 70 EF +62 07 8F 62 06 70 71 10 +62 06 00 62 07 00 70 EF +62 05 00 62 08 00 71 10 +62 08 7F 62 09 80 70 EF +62 0B 00 62 0A 00 71 10 +62 0A 00 62 0B 00 70 EF +62 09 00 70 EF 7F 55 34 +00 55 35 7F 55 36 80 7C +03 C6 7C 03 51 7F 10 70 +EF 50 00 67 50 02 57 8C +7C 03 E1 50 01 67 50 02 +57 F1 7C 03 E1 70 EF 20 +7F 38 02 10 08 4F 56 FC +00 D0 04 56 FC 01 18 20 +70 EF 62 E3 00 10 08 28 +39 FF A0 1F 4F 48 FC 01 +A0 03 71 10 54 FD 18 20 +75 09 00 10 08 28 4F 59 +FD 61 00 18 20 75 09 00 +8F D7 38 FC 7F 2E 2C 01 +47 2E FF A0 03 7A 2E 47 +2D FF A0 03 7A 2D 76 32 +D0 0B 76 31 D0 07 76 30 +D0 03 76 2F 76 33 7E 43 +E0 40 7F 50 00 53 2C 53 +2D 53 2E 53 32 53 31 53 +30 53 2F 7F 21 18 4F 08 +71 10 5D E0 21 E7 2B 00 +60 E0 70 EF 18 7F 7E 41 +E1 FB 7F 43 2B 01 7F 60 +2A 7F 7E 41 E1 F7 7F 43 +2F 01 7F 60 2E 7F 7E 41 +E1 FD 7F 43 27 01 7F 60 +26 7F 08 10 28 B0 04 20 +18 7F 90 35 20 18 75 DF +F2 74 8F EF 30 31 32 33 +34 35 36 37 38 39 41 42 +43 44 45 46 08 67 67 67 +67 21 0F FF E7 90 12 18 +21 0F FF E0 90 0B 7F 52 +00 A0 06 90 04 75 8F F8 +7F 90 5F 08 67 67 67 67 +21 0F 90 38 18 21 0F 40 +40 40 90 30 7F 90 4B 08 +67 67 67 67 21 0F 90 09 +18 21 0F 40 40 40 90 01 +7F 08 26 34 80 51 34 60 +08 18 21 0F 29 10 2A 34 +60 08 53 34 40 21 8F 53 +34 60 08 7F 08 26 34 80 +2E 34 20 51 34 60 08 18 +21 0F 29 30 2A 34 60 08 +53 34 40 21 AF 53 34 60 +08 7F 08 26 34 80 51 34 +60 08 26 35 F0 51 35 71 +10 60 08 70 EF 2E 34 40 +51 34 60 08 40 10 57 FF +2E 34 50 51 34 60 08 40 +40 5D 08 08 26 34 C0 51 +34 60 08 40 40 40 2E 34 +50 51 34 60 08 40 40 26 +34 C0 51 34 60 08 18 21 +08 A0 04 79 BF D3 20 2E +35 7F 51 35 71 10 60 08 +70 EF 18 7F 26 35 80 2E +35 7F 26 36 80 51 35 71 +10 60 08 51 36 60 09 70 +EF 50 FA 90 63 50 FA 90 +5F 50 03 9F 4C 50 52 90 +57 50 03 9F 44 90 5F 90 +5D 90 5B 50 03 9F 3A 50 +5A 90 45 50 02 9F 32 50 +5A 90 3D 50 08 9F 16 50 +5A 90 35 50 01 9F 0E 50 +5A 90 2D 50 06 9F 06 50 +0E 9F 02 50 2C 9E FE 50 +08 9E FA 50 0C 9E F6 50 +03 9E F2 50 5A 90 11 7F +80 C0 94 D4 21 03 10 FF +F7 4F 03 FF 20 9E DE 7F +90 0C 78 BF FC 7F 08 19 +3A 7C 01 01 01 01 08 71 +10 5D E0 70 EF 21 07 39 +05 D0 06 FF E9 78 BF FE +18 7F 4F 10 52 FD 59 FC +9F CA 20 3D FA 00 B0 05 +50 00 80 11 3D FA 06 D0 +07 52 FA 15 FA 80 06 50 +06 17 FA 05 9E 83 7B FB +BF E2 7F 00 10 18 1C 1E +1F 1F 00 10 08 04 02 01 +00 4F 38 03 54 02 50 40 +9E 7B 56 00 00 56 01 08 +52 00 3D 02 00 B0 05 FF +DA 80 03 FF DD 9E 52 7B +01 BF EE 77 00 3D 00 07 +BF E4 38 FD 50 0C 9E 55 +7F 21 03 4F 08 5D 73 21 +FC 2B 00 60 73 5D 77 21 +FC 2B 00 60 77 18 7F 21 +03 4F 08 5D 97 21 FC 2B +00 60 97 5D 93 21 FC 2B +00 60 93 18 7F 11 FF 4B +19 00 4B 4B 08 78 5B C0 +05 73 74 80 05 73 73 80 +01 08 67 67 67 21 1F 4F +27 FE 20 2B FE 5C 18 10 +64 64 21 1F 4F 2B FE 31 +20 20 38 FF 29 80 4B 29 +80 43 65 01 60 94 41 65 +FE 5B 60 90 7F 21 03 29 +30 60 83 7F 11 1F 64 D0 +07 73 74 29 40 80 06 40 +40 40 80 01 67 29 80 43 +65 01 60 80 41 65 FE 7F +21 03 57 00 79 C0 05 64 +64 8F FA 4F 08 5D 60 21 +FC 2B 00 60 60 18 7F 21 +03 57 00 79 C0 05 64 64 +8F FA 4F 08 5D 60 21 FC +2B 00 60 60 18 7F 7A 3C +C0 02 7E 3C 3D 00 B0 12 +08 5D E5 53 3A 5D E4 53 +39 18 55 3D 01 55 3C 03 +7E 43 86 20 43 87 10 08 +5D E5 12 3A 53 3A 5D E4 +1A 39 67 6E 3A 06 3A 80 +09 00 39 01 B0 05 78 55 +3A FF 5F 38 3A 53 37 55 +3B 01 51 3F 11 00 A0 0D +11 01 A0 17 11 01 A0 24 +11 01 A0 2E 41 00 FB 5F +40 38 55 3F 01 2E 43 02 +80 2F 62 60 0F 43 00 04 +5F 41 38 2E 43 01 55 3F +02 80 1E 41 00 FB 5F 42 +38 2E 43 04 55 3F 03 80 +10 43 00 04 62 60 00 5F +42 38 2E 43 04 55 3F 00 +18 3C 3E 00 B0 0E 55 3D +00 55 3C 00 41 87 EF 41 +86 DF 7E 7A 3E A0 0E 55 +3D 00 55 3C 00 41 87 EF +41 86 DF 7E 41 E1 FE 7E +43 E7 C0 90 0D 43 86 20 +43 87 10 62 21 FF 43 23 +01 7F 4F 21 03 08 5D 87 +21 FC 2B 00 60 87 18 7F +41 87 EF 41 86 DF 55 3D +00 55 3C 00 53 3E 5D 22 +B0 04 62 22 01 62 DB FE +43 E1 01 7F 55 3B 00 58 +37 51 38 3C 3B 00 BF F5 +7F 50 8F 12 5B 53 59 50 +00 1A 5A 53 58 50 38 12 +59 51 58 31 80 53 27 50 +80 1A 27 D0 07 55 59 38 +55 58 00 51 59 11 C8 51 +58 31 80 19 7F D0 07 55 +59 C8 55 58 FF 5F 2A 59 +5F 2B 58 55 28 B8 55 29 +FF 55 27 00 55 26 00 3C +29 00 B0 06 3C 28 00 A0 +17 70 FB 6E 29 6E 28 D0 +09 51 2A 04 27 51 2B 0C +26 65 2A 6B 2B 8F E1 5F +2A 27 5F 2B 26 50 00 08 +50 10 08 51 2B 08 51 2A +08 7C 0F 83 18 53 55 18 +53 54 38 FE 51 59 04 03 +51 58 0C 02 50 00 12 03 +51 02 31 80 53 27 50 84 +1A 27 D0 07 55 03 00 55 +02 04 51 03 11 00 51 02 +31 80 19 7C D0 07 55 03 +00 55 02 FC 5F 2A 03 5F +2B 02 55 28 FC 55 29 FF +55 27 00 55 26 00 3C 29 +00 B0 06 3C 28 00 A0 17 +70 FB 6E 29 6E 28 D0 09 +51 2A 04 27 51 2B 0C 26 +65 2A 6B 2B 8F E1 5F 2A +27 5F 2B 26 50 00 08 50 +10 08 51 2B 08 51 2A 08 +7C 0F 83 18 53 53 18 53 +52 38 FE 3C 04 FF D0 09 +5F 57 04 55 56 00 80 19 +51 55 01 80 53 2A 51 54 +09 00 53 2B 51 2A 02 53 +53 57 51 2B 0A 52 53 56 +51 57 11 00 51 56 31 80 +19 80 D0 07 55 57 00 55 +56 00 50 FF 12 57 51 56 +31 80 53 27 50 80 1A 27 +D0 07 55 57 FF 55 56 00 +5F 2B 57 10 51 2B 7C 04 +87 20 7F 50 0F 12 5D 53 +51 50 01 1A 5C 53 50 50 +A3 12 51 51 50 31 80 53 +27 50 80 1A 27 D0 07 55 +51 A3 55 50 00 51 51 11 +5D 51 50 31 80 19 7F D0 +07 55 51 5D 55 50 FF 5F +2A 51 5F 2B 50 55 28 19 +55 29 00 55 27 00 55 26 +00 3C 29 00 B0 06 3C 28 +00 A0 17 70 FB 6E 29 6E +28 D0 09 51 2A 04 27 51 +2B 0C 26 65 2A 6B 2B 8F +E1 5F 2A 27 5F 2B 26 50 +00 08 50 10 08 51 2B 08 +51 2A 08 7C 0F 83 18 53 +4D 18 53 4C 38 FE 51 51 +04 01 51 50 0C 00 50 FC +12 01 51 00 31 80 53 27 +50 83 1A 27 D0 07 55 01 +FC 55 00 03 51 01 11 04 +51 00 31 80 19 7C D0 07 +55 01 04 55 00 FC 5F 2A +01 5F 2B 00 65 2A 6B 2B +65 2A 6B 2B 50 00 08 50 +10 08 51 2B 08 51 2A 08 +7C 0F 83 18 53 4B 18 53 +4A 38 FE 51 4D 01 00 53 +2A 51 4C 09 01 53 2B 51 +2A 02 4B 53 4F 51 2B 0A +4A 53 4E 51 4F 11 00 51 +4E 31 80 19 80 D0 07 55 +4F 00 55 4E 00 50 FE 12 +4F 51 4E 31 80 53 27 50 +81 1A 27 D0 07 55 4F FE +55 4E 01 10 58 4E 51 4F +7C 06 B5 20 7F 10 4F 52 +FC 13 FA 53 2A 52 FB 1B +F9 53 2B 52 F8 53 28 50 +00 08 51 28 08 51 2B 08 +51 2A 08 7C 0F 83 18 53 +2A 18 53 2B 38 FE 52 FA +02 2A 53 2A 52 F9 0A 2B +53 2B 20 7F 10 4F 38 03 +52 FC 54 02 56 01 00 3D +01 00 B0 06 3D 02 00 A0 +5D 3D 01 00 B0 06 3D 02 +01 A0 58 3D 01 00 B0 06 +3D 02 02 A0 53 3D 01 00 +B0 06 3D 02 03 A0 4E 3D +01 00 B0 06 3D 02 04 A0 +49 3D 01 00 B0 06 3D 02 +05 A0 44 3D 01 00 B0 06 +3D 02 06 A0 3F 3D 01 00 +B0 06 3D 02 07 A0 3A 3D +01 00 B0 06 3D 02 08 A0 +35 3D 01 00 B0 06 3D 02 +09 A0 30 80 31 56 00 30 +80 2C 56 00 31 80 27 56 +00 32 80 22 56 00 33 80 +1D 56 00 34 80 18 56 00 +35 80 13 56 00 36 80 0E +56 00 37 80 09 56 00 38 +80 04 56 00 39 52 00 38 +FD 20 7F 10 4F 38 02 10 +50 00 7C 07 2F 50 00 7C +07 18 50 01 7C 06 89 50 +03 7C 08 00 50 03 7C 06 +9F 50 02 7C 06 F5 50 1F +7C 06 FC 7C 04 67 7C 04 +6B 7C 04 7F 7C 04 83 7C +04 73 7C 04 77 50 00 7C +08 20 7C 04 43 50 00 7C +04 54 7C 04 3F 20 71 01 +10 7C 05 84 50 00 7C 06 +59 50 00 57 00 7C 05 F4 +50 00 08 50 1A 5C 18 7C +04 BF 50 77 7C 04 6F 20 +51 43 21 01 39 01 B0 56 +26 43 FE 50 04 08 51 48 +08 51 49 08 5F 2A 41 55 +2B 00 65 2A 6B 2B 51 2B +08 51 2A 08 9E 8F 38 FB +5F 49 2A 5F 48 2B 51 47 +12 49 53 5B 51 46 1A 48 +53 5A 51 47 02 49 53 2A +51 46 0A 48 53 2B 50 00 +08 50 02 08 51 2B 08 51 +2A 08 7C 0F 83 18 53 5D +18 53 5C 38 FE 51 43 21 +02 39 02 B0 56 26 43 FD +50 04 08 51 46 08 51 47 +08 5F 2A 40 55 2B 00 65 +2A 6B 2B 51 2B 08 51 2A +08 9E 32 38 FB 5F 47 2A +5F 46 2B 51 47 12 49 53 +5B 51 46 1A 48 53 5A 51 +47 02 49 53 2A 51 46 0A +48 53 2B 50 00 08 50 02 +08 51 2B 08 51 2A 08 7C +0F 83 18 53 5D 18 53 5C +38 FE 51 43 21 04 39 04 +B0 27 26 43 FB 50 04 08 +51 44 08 51 45 08 5F 2A +42 55 2B 00 65 2A 6B 2B +51 2B 08 51 2A 08 9D D5 +38 FB 5F 45 2A 5F 44 2B +51 33 04 05 51 33 04 06 +51 33 04 08 51 33 04 07 +55 33 00 50 01 3A 05 D0 +06 55 05 00 9C 8D 50 19 +3A 06 D0 86 3C 04 FF C0 +81 55 06 00 9B 23 51 45 +11 87 54 01 51 44 19 00 +54 00 52 01 11 00 52 00 +31 80 19 80 D0 07 56 01 +00 56 00 00 50 9D 13 01 +52 00 31 80 53 27 50 80 +1A 27 D0 07 56 01 9D 56 +00 00 52 01 01 50 53 2A +52 00 09 01 10 58 2A 28 +7C 04 6F 20 56 01 17 56 +00 00 51 45 11 FB 51 44 +31 80 19 80 D0 07 56 01 +2E 56 00 00 50 03 12 45 +51 44 31 80 53 27 50 81 +1A 27 D0 07 56 01 00 56 +00 00 52 01 10 7C 04 7B +20 50 32 3A 07 D1 95 3C +04 FF C1 90 55 07 00 51 +45 11 87 54 01 51 44 19 +00 54 00 52 01 11 00 52 +00 31 80 19 80 D0 07 56 +01 00 56 00 00 50 9D 13 +01 52 00 31 80 53 27 50 +80 1A 27 D0 07 56 01 9D +56 00 00 52 01 01 EE 53 +2A 52 00 09 01 10 58 2A +28 20 54 01 56 00 00 52 +01 11 38 10 08 50 10 08 +50 00 08 50 01 08 7C 06 +22 38 FC 50 00 57 00 7C +05 F4 20 50 00 08 50 64 +08 52 00 08 52 01 08 7C +0F 83 18 53 2A 18 38 FE +51 2A 08 9C CF 38 FF 53 +10 50 00 08 50 0A 08 52 +00 08 52 01 08 7C 0F 83 +18 53 2A 18 53 2B 38 FE +50 00 08 50 0A 08 51 2B +08 51 2A 08 7C 0F 83 38 +FE 18 53 2A 18 51 2A 08 +9C 9A 38 FF 53 12 50 00 +08 50 0A 08 52 00 08 52 +01 08 7C 0F 83 38 FE 18 +53 2A 18 51 2A 08 9C 7C +38 FF 53 13 51 5B 11 71 +54 01 51 5A 19 00 54 00 +52 01 11 00 52 00 31 80 +19 80 D0 07 56 01 00 56 +00 00 50 4A 13 01 52 00 +31 80 53 27 50 80 1A 27 +D0 07 56 01 4A 56 00 00 +07 01 ED 0F 00 02 50 00 +08 50 64 08 52 00 08 52 +01 08 7C 0F 83 18 53 2A +18 38 FE 51 2A 08 9C 24 +38 FF 53 15 50 00 08 50 +0A 08 52 00 08 52 01 08 +7C 0F 83 18 53 2A 18 53 +2B 38 FE 50 00 08 50 0A +08 51 2B 08 51 2A 08 7C +0F 83 38 FE 18 53 2A 18 +51 2A 08 9B EF 38 FF 53 +16 50 00 08 50 0A 08 52 +00 08 52 01 08 7C 0F 83 +38 FE 18 53 2A 18 51 2A +08 9B D1 38 FF 53 17 10 +50 00 08 50 09 5C 18 7C +04 BF 20 3C 04 FF DC D1 +50 64 3A 08 D0 06 55 08 +00 76 04 50 32 12 49 51 +48 31 80 53 27 50 80 1A +27 DC B6 51 47 11 DB 51 +46 31 80 19 81 DC AA 51 +5B 11 8F 51 5A 31 80 19 +80 DC 9E 55 04 FF 55 03 +00 55 02 00 8C 93 38 FE +20 8F FF 10 4F 50 00 3D +FB 80 C0 0D 37 FC FF 77 +FC 37 FB FF 0D FB 50 C0 +3D F9 80 C0 0E 37 FA FF +77 FA 37 F9 FF 0F F9 00 +31 80 08 7C 0F CD 18 6A +D0 0C 37 FC FF 37 FB FF +77 FC 0F FB 00 6A D0 0C +37 FA FF 37 F9 FF 77 FA +0F F9 00 20 7F 50 00 53 +26 53 27 55 25 10 66 FC +6C FB 6B 26 6B 27 51 26 +1B FA 51 27 1B F9 C0 09 +53 27 52 FA 1C 26 77 FC +7A 25 BF E3 51 26 54 FA +51 27 54 F9 7F 30 \ No newline at end of file diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep new file mode 100644 index 0000000..7738aa6 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.dep @@ -0,0 +1,65 @@ +# DO NOT DELETE +./obj/boot.o : \ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8ssc.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\lib\GLOBAL~1.INC\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./obj/main.o : ./lib/ADCINC.h ./lib/AMUX4_0.h ./lib/AMUX4_1.h\ + ./lib/DAC6_V~1.H ./lib/DAC9_Ia.h ./lib/INSAMP.h ./lib/LCD.h\ + ./lib/PSoCAPI.h ./lib/PSOCGP~1.H ./lib/PWM8_H~1.H ./lib/PWM8_N~1.H\ + ./lib/PWM8_V~1.H ./lib/SLEEPT~1.H\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/M8C.h\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.h +./lib/obj/adcinc.o : ./lib/ADCINC.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/adcincint.o : ./lib/ADCINC.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/amux4_0.o : ./lib/AMUX4_0.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/amux4_1.o : ./lib/AMUX4_1.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/dac6_vgnd.o : ./lib/DAC6_V~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/dac9_ia.o : ./lib/DAC9_Ia.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/insamp.o : ./lib/INSAMP.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/lcd.o : ./lib/LCD.inc\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/psocconfig.o : ./lib/GLOBAL~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/psocconfigtbl.o : \ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc +./lib/obj/pwm8_heater.o : ./lib/PWM8_H~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_heaterint.o : ./lib/PWM8_H~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_nb_out.o : ./lib/PWM8_N~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_nb_outint.o : ./lib/PWM8_N~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_vout.o : ./lib/PWM8_V~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/pwm8_voutint.o : ./lib/PWM8_V~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/sleeptimer.o : ./lib/SLEEPT~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc +./lib/obj/sleeptimerint.o : ./lib/SLEEPT~1.INC\ + C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1/m8c.inc\ + C:\Users\ELITEB~1\Dev\LAMBDA~1\SLC_FR~1\SLC_FR~1\NOV_12~1\SLC_FR~1\SLC_FR~1\SLC_FR~1\memory.inc diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk new file mode 100644 index 0000000..5ff1000 --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source/project.mk @@ -0,0 +1,30 @@ +PROJNAME=SLC_Free_Open_Source +DEVICE=CY8C24423B +BASEDEVICE=CY8C24000B +PROJPATH=C:/Users/ELITEB~1/Dev/LAMBDA~1/SLC_FR~1/SLC_FR~1/NOV_12~1/SLC_FR~1/SLC_FR~1/SLC_FR~1 +PSOCDIR=C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1 +INCLUDE_PATH=C:/PROGRA~2/Cypress/PSOCDE~1/5.4/Common/CYPRES~1/tools/include/CY8C24~1 +CSRCS= main.c +LIBCSRCS= +STDCSRCS= +ASMSRCS= +LIBASMSRCS= adcinc.asm adcincint.asm amux4_0.asm amux4_1.asm dac6_vgnd.asm dac9_ia.asm insamp.asm lcd.asm psocconfig.asm psocconfigtbl.asm pwm8_heater.asm pwm8_heaterint.asm pwm8_nb_out.asm pwm8_nb_outint.asm pwm8_vout.asm pwm8_voutint.asm sleeptimer.asm sleeptimerint.asm +STDASMSRCS= +OBJECT_SOURCES= main.c +FILLVALUE=0x30 +LASTROM=0xfff +LASTRAM=0xff +CODECOMPRESSOR=-O -elim:UserModules +MORE_CFLAGS= +RELSTART=0x150 +INC_PATH= +CDEFINES= +LIBS= +UMLIBS= +LIB_PATH= +ENABLE_ALIGN_SHIFT=0 +LMM= +SYS_INC_CONTENTS:=SYSTEM_STACK_PAGE:_equ_0 SYSTEM_STACK_BASE_ADDR:_equ_0h SYSTEM_LARGE_MEMORY_MODEL:_equ_0 SYSTEM_SMALL_MEMORY_MODEL:_equ_1 IMAGECRAFT:_equ_1 HITECH:_equ_2 TOOLCHAIN:_equ_IMAGECRAFT +SYSTEM_TOOLS=1 +CSFLOW=on +CONFIG_NAMES=slc_free_28_pin_feb_16_2013 diff --git a/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml new file mode 100644 index 0000000..2eb839f --- /dev/null +++ b/Nov_12_2018/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/VarOffset.xml @@ -0,0 +1,3 @@ +<CMX_DB> +<CMX_VARIABLE_OFFSET_LIST TOTAL_VARIABLE_SIZE="0" RW_VARIABLE_SIZE="0"/> +</CMX_DB> diff --git a/Nov_12_2018/SLC_Free_PCB_Gerber_Files/SLC_Free_PCB-B_Mask.gbs b/Nov_12_2018/SLC_Free_PCB_Gerber_Files/SLC_Free_PCB-B_Mask.gbs new file mode 100644 index 0000000..edbe176 --- /dev/null +++ b/Nov_12_2018/SLC_Free_PCB_Gerber_Files/SLC_Free_PCB-B_Mask.gbs @@ -0,0 +1,208 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2-f72e74a~84~ubuntu19.04.1* +G04 #@! TF.CreationDate,2019-06-18T19:15:32+02:00* +G04 #@! TF.ProjectId,SLC_Free_PCB,534c435f-4672-4656-955f-5043422e6b69,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Bot* +G04 #@! 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b/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep deleted file mode 100644 index 459563f..0000000 --- a/SLC_Free_Open_Source_Firmware/SLC_Free_Open_Source/SLC_Free_Open_Source.pep +++ /dev/null @@ -1 +0,0 @@ -<?xml version="1.0"?><PSOC_WND_PERSIST><APP_EDITOR_SETTINGS></APP_EDITOR_SETTINGS><DEBUGGER_SETTINGS><TRACE_MODE VALUE="PCOnly" /><EVENT NUMBER="0" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="1" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="2" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="3" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="4" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="5" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="6" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="7" THREAD8="Disabled" THREAD16="Disabled" LOGIC="Disabled" /><EVENT NUMBER="8" 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http://www.14point7.com/pages/software-and-documentation +