Skip to content

Commit 3b9492f

Browse files
ccli8ccli8
committed
M487: Update BSP
Relevant modifications: 1. Support degrading QSPI0/1 to SPI4/5 for normal SPI transfer 2. Fix with BSP crypto driver API change 3. Fix with BSP PDMA driver API change 4. Make necessary modifications to pass FPGA CI Test Shield tests 5. Don't distinguish pinmap among parts e.g. M480 LG. Application users must take care.
1 parent dba3962 commit 3b9492f

File tree

144 files changed

+51631
-40768
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

144 files changed

+51631
-40768
lines changed

‎features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/aes/aes_alt.c‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -150,15 +150,15 @@ static void __nvt_aes_crypt( mbedtls_aes_context *ctx,
150150
/* Init crypto module */
151151
crypto_init();
152152
/* Enable AES interrupt */
153-
AES_ENABLE_INT();
153+
AES_ENABLE_INT(CRPT);
154154

155155
/* We support multiple contexts with context save & restore and so needs just one
156156
* H/W channel. Always use H/W channel #0. */
157157

158158
/* AES_IN_OUT_SWAP: Let H/W know both input/output data are arranged in little-endian */
159-
AES_Open(0, ctx->encDec, ctx->opMode, ctx->keySize, AES_IN_OUT_SWAP);
160-
AES_SetInitVect(0, ctx->iv);
161-
AES_SetKey(0, ctx->keys, ctx->keySize);
159+
AES_Open(CRPT, 0, ctx->encDec, ctx->opMode, ctx->keySize, AES_IN_OUT_SWAP);
160+
AES_SetInitVect(CRPT, 0, ctx->iv);
161+
AES_SetKey(CRPT, 0, ctx->keys, ctx->keySize);
162162

163163
/* AES DMA buffer requirements same as above */
164164
if (! crypto_dma_buff_compat(input, dataSize, 16)) {
@@ -182,10 +182,10 @@ static void __nvt_aes_crypt( mbedtls_aes_context *ctx,
182182
}
183183
MBED_ASSERT(! crypto_dma_buffs_overlap(pIn, dataSize, pOut, dataSize));
184184

185-
AES_SetDMATransfer(0, (uint32_t)pIn, (uint32_t)pOut, dataSize);
185+
AES_SetDMATransfer(CRPT, 0, (uint32_t)pIn, (uint32_t)pOut, dataSize);
186186

187187
crypto_aes_prestart();
188-
AES_Start(0, CRYPTO_DMA_ONE_SHOT);
188+
AES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
189189
crypto_aes_wait();
190190

191191
if( pOut != output ) {
@@ -199,7 +199,7 @@ static void __nvt_aes_crypt( mbedtls_aes_context *ctx,
199199
ctx->iv[3] = CRPT->AES_FDBCK[3];
200200

201201
/* Disable AES interrupt */
202-
AES_DISABLE_INT();
202+
AES_DISABLE_INT(CRPT);
203203
/* Uninit crypto module */
204204
crypto_uninit();
205205

‎features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/des/des_alt.c‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -355,7 +355,7 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
355355
/* Init crypto module */
356356
crypto_init();
357357
/* Enable DES interrupt */
358-
TDES_ENABLE_INT();
358+
TDES_ENABLE_INT(CRPT);
359359

360360
/* Configure TDES_CTL register
361361
*
@@ -373,7 +373,8 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
373373
* 1. BE for byte sequence in word
374374
* 2. BE for word sequence in double-word
375375
*/
376-
TDES_Open(0, // Channel number (0~4)
376+
TDES_Open(CRPT
377+
0, // Channel number (0~4)
377378
enc, // 0: decode, 1: encode
378379
(tdes_opmode & CRPT_TDES_CTL_TMODE_Msk) ? 1 : 0, // 0: DES, 1: TDES
379380
(keyopt == 1) ? 1 : 0, // 0: TDES 2-key mode, 1: TDES 3-key mode
@@ -390,7 +391,7 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
390391
keys3x2[i][0] = nu_get32_be(key[i] + 0);
391392
keys3x2[i][1] = nu_get32_be(key[i] + 4);
392393
}
393-
TDES_SetKey(0, keys3x2);
394+
TDES_SetKey(CRPT, 0, keys3x2);
394395

395396
uint32_t rmn = length;
396397
const unsigned char *in_pos = input;
@@ -402,15 +403,15 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
402403
uint32_t ivh, ivl;
403404
ivh = nu_get32_be(iv);
404405
ivl = nu_get32_be(iv + 4);
405-
TDES_SetInitVect(0, ivh, ivl);
406+
TDES_SetInitVect(CRPT, 0, ivh, ivl);
406407

407408
memcpy(dmabuf_in, in_pos, data_len);
408409

409410
/* We always use DMA backup buffers, which are guaranteed to be non-overlapped. */
410-
TDES_SetDMATransfer(0, (uint32_t) dmabuf_in, (uint32_t) dmabuf_out, data_len);
411+
TDES_SetDMATransfer(CRPT, 0, (uint32_t) dmabuf_in, (uint32_t) dmabuf_out, data_len);
411412

412413
crypto_des_prestart();
413-
TDES_Start(0, CRYPTO_DMA_ONE_SHOT);
414+
TDES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
414415
crypto_des_wait();
415416

416417
memcpy(out_pos, dmabuf_out, data_len);
@@ -452,7 +453,7 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
452453
}
453454

454455
/* Disable DES interrupt */
455-
TDES_DISABLE_INT();
456+
TDES_DISABLE_INT(CRPT);
456457
/* Uninit crypto module */
457458
crypto_uninit();
458459

‎features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/ecp/ecp_internal_alt.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -240,15 +240,15 @@ int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
240240
crypto_init();
241241

242242
/* Enable ECC interrupt */
243-
ECC_ENABLE_INT();
243+
ECC_ENABLE_INT(CRPT);
244244

245245
return 0;
246246
}
247247

248248
void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
249249
{
250250
/* Disable ECC interrupt */
251-
ECC_DISABLE_INT();
251+
ECC_DISABLE_INT(CRPT);
252252

253253
/* Uninit crypto module */
254254
crypto_uninit();

‎features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha_alt_hw.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ void mbedtls_sha1_hw_starts(crypto_sha_context *ctx)
6969
ctx->blocksize = 64;
7070
ctx->blocksize_mask = 0x3F;
7171

72-
SHA_Open(SHA_MODE_SHA1, SHA_NO_SWAP, 0);
72+
SHA_Open(CRPT, SHA_MODE_SHA1, SHA_NO_SWAP, 0);
7373

7474
// Ensure we have correct initial internal states in SHA_DGST registers even though SHA H/W is not actually started.
7575
CRPT->HMAC_CTL |= CRPT_HMAC_CTL_START_Msk;
@@ -143,7 +143,7 @@ void mbedtls_sha256_hw_starts( crypto_sha_context *ctx, int is224)
143143
ctx->blocksize_mask = 0x3F;
144144
ctx->is224_384 = is224;
145145

146-
SHA_Open(is224 ? SHA_MODE_SHA224 : SHA_MODE_SHA256, SHA_NO_SWAP, 0);
146+
SHA_Open(CRPT, is224 ? SHA_MODE_SHA224 : SHA_MODE_SHA256, SHA_NO_SWAP, 0);
147147

148148
// Ensure we have correct initial internal states in SHA_DGST registers even though SHA H/W is not actually started.
149149
CRPT->HMAC_CTL |= CRPT_HMAC_CTL_START_Msk;
@@ -218,7 +218,7 @@ void mbedtls_sha512_hw_starts( crypto_sha_context *ctx, int is384)
218218
ctx->blocksize_mask = 0x7F;
219219
ctx->is224_384 = is384;
220220

221-
SHA_Open(is384 ? SHA_MODE_SHA384 : SHA_MODE_SHA512, SHA_NO_SWAP, 0);
221+
SHA_Open(CRPT, is384 ? SHA_MODE_SHA384 : SHA_MODE_SHA512, SHA_NO_SWAP, 0);
222222

223223
// Ensure we have correct initial internal states in SHA_DGST registers even though SHA H/W is not actually started.
224224
CRPT->HMAC_CTL |= CRPT_HMAC_CTL_START_Msk;

‎targets/TARGET_NUVOTON/TARGET_M480/PeripheralNames.h‎

Lines changed: 38 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -45,11 +45,12 @@ typedef enum {
4545
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0),
4646
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0),
4747
GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 6, 0),
48-
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 7, 0)
48+
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 7, 0),
4949
} GPIOName;
5050
#endif
5151

5252
typedef enum {
53+
/* EADC0 */
5354
ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0, 0),
5455
ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 0, 1),
5556
ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 0, 2),
@@ -65,12 +66,30 @@ typedef enum {
6566
ADC_0_12 = (int) NU_MODNAME(EADC_BASE, 0, 12),
6667
ADC_0_13 = (int) NU_MODNAME(EADC_BASE, 0, 13),
6768
ADC_0_14 = (int) NU_MODNAME(EADC_BASE, 0, 14),
68-
ADC_0_15 = (int) NU_MODNAME(EADC_BASE, 0, 15)
69+
ADC_0_15 = (int) NU_MODNAME(EADC_BASE, 0, 15),
70+
71+
/* EADC1 */
72+
ADC_1_0 = (int) NU_MODNAME(EADC1_BASE, 1, 0),
73+
ADC_1_1 = (int) NU_MODNAME(EADC1_BASE, 1, 1),
74+
ADC_1_2 = (int) NU_MODNAME(EADC1_BASE, 1, 2),
75+
ADC_1_3 = (int) NU_MODNAME(EADC1_BASE, 1, 3),
76+
ADC_1_4 = (int) NU_MODNAME(EADC1_BASE, 1, 4),
77+
ADC_1_5 = (int) NU_MODNAME(EADC1_BASE, 1, 5),
78+
ADC_1_6 = (int) NU_MODNAME(EADC1_BASE, 1, 6),
79+
ADC_1_7 = (int) NU_MODNAME(EADC1_BASE, 1, 7),
80+
ADC_1_8 = (int) NU_MODNAME(EADC1_BASE, 1, 8),
81+
ADC_1_9 = (int) NU_MODNAME(EADC1_BASE, 1, 9),
82+
ADC_1_10 = (int) NU_MODNAME(EADC1_BASE, 1, 10),
83+
ADC_1_11 = (int) NU_MODNAME(EADC1_BASE, 1, 11),
84+
ADC_1_12 = (int) NU_MODNAME(EADC1_BASE, 1, 12),
85+
ADC_1_13 = (int) NU_MODNAME(EADC1_BASE, 1, 13),
86+
ADC_1_14 = (int) NU_MODNAME(EADC1_BASE, 1, 14),
87+
ADC_1_15 = (int) NU_MODNAME(EADC1_BASE, 1, 15),
6988
} ADCName;
7089

7190
typedef enum {
7291
DAC_0_0 = (int) NU_MODNAME(DAC0_BASE, 0, 0),
73-
DAC_1_0 = (int) NU_MODNAME(DAC1_BASE, 1, 0)
92+
DAC_1_0 = (int) NU_MODNAME(DAC1_BASE, 1, 0),
7493
} DACName;
7594

7695
typedef enum {
@@ -80,16 +99,18 @@ typedef enum {
8099
UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
81100
UART_4 = (int) NU_MODNAME(UART4_BASE, 4, 0),
82101
UART_5 = (int) NU_MODNAME(UART5_BASE, 5, 0),
102+
UART_6 = (int) NU_MODNAME(UART5_BASE, 6, 0),
103+
UART_7 = (int) NU_MODNAME(UART5_BASE, 7, 0),
83104
// NOTE: board-specific
84105
#if defined(MBED_CONF_TARGET_USB_UART)
85106
USB_UART = MBED_CONF_TARGET_USB_UART,
86107
#else
87108
USB_UART = NC,
88109
#endif
89110
#if defined(MBED_CONF_TARGET_STDIO_UART)
90-
STDIO_UART = MBED_CONF_TARGET_STDIO_UART
111+
STDIO_UART = MBED_CONF_TARGET_STDIO_UART,
91112
#else
92-
STDIO_UART = USB_UART
113+
STDIO_UART = USB_UART,
93114
#endif
94115
} UARTName;
95116

@@ -98,13 +119,16 @@ typedef enum {
98119
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
99120
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0),
100121
SPI_3 = (int) NU_MODNAME(SPI3_BASE, 3, 0),
101-
SPI_4 = (int) NU_MODNAME(SPI4_BASE, 4, 0)
122+
123+
/* No SPI4/5 H/W, degrade QSPI0/1 H/W to SPI_4/5 for standard SPI usage */
124+
SPI_4 = (int) NU_MODNAME(QSPI0_BASE, 4, 0),
125+
SPI_5 = (int) NU_MODNAME(QSPI1_BASE, 5, 0),
102126
} SPIName;
103127

104128
typedef enum {
105129
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0),
106130
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0),
107-
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 2, 0)
131+
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 2, 0),
108132
} I2CName;
109133

110134
typedef enum {
@@ -114,13 +138,13 @@ typedef enum {
114138
PWM_0_3 = (int) NU_MODNAME(EPWM0_BASE, 0, 3),
115139
PWM_0_4 = (int) NU_MODNAME(EPWM0_BASE, 0, 4),
116140
PWM_0_5 = (int) NU_MODNAME(EPWM0_BASE, 0, 5),
117-
141+
118142
PWM_1_0 = (int) NU_MODNAME(EPWM1_BASE, 1, 0),
119143
PWM_1_1 = (int) NU_MODNAME(EPWM1_BASE, 1, 1),
120144
PWM_1_2 = (int) NU_MODNAME(EPWM1_BASE, 1, 2),
121145
PWM_1_3 = (int) NU_MODNAME(EPWM1_BASE, 1, 3),
122146
PWM_1_4 = (int) NU_MODNAME(EPWM1_BASE, 1, 4),
123-
PWM_1_5 = (int) NU_MODNAME(EPWM1_BASE, 1, 5)
147+
PWM_1_5 = (int) NU_MODNAME(EPWM1_BASE, 1, 5),
124148
} PWMName;
125149

126150
typedef enum {
@@ -131,21 +155,22 @@ typedef enum {
131155
} TIMERName;
132156

133157
typedef enum {
134-
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
158+
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0),
135159
} RTCName;
136160

137161
typedef enum {
138-
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0)
162+
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0),
139163
} DMAName;
140164

141165
typedef enum {
142166
SD_0 = (int) NU_MODNAME(SDH0_BASE, 0, 0),
143-
SD_1 = (int) NU_MODNAME(SDH1_BASE, 1, 0)
167+
SD_1 = (int) NU_MODNAME(SDH1_BASE, 1, 0),
144168
} SDName;
145169

146170
typedef enum {
147171
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0),
148-
CAN_1 = (int) NU_MODNAME(CAN1_BASE, 1, 0)
172+
CAN_1 = (int) NU_MODNAME(CAN1_BASE, 1, 0),
173+
CAN_2 = (int) NU_MODNAME(CAN2_BASE, 2, 0),
149174
} CANName;
150175

151176
#ifdef __cplusplus

0 commit comments

Comments
 (0)