From 0c10641d94c85d474925864e5b175607bda2a276 Mon Sep 17 00:00:00 2001 From: SSunk Date: Wed, 19 Jul 2023 11:06:07 +0800 Subject: [PATCH] Add support for XMC XM25QH128C/XM25QH256C/XM25QU256C/XM25QH512C/XM25QU512C site: https://www.xmcwh.com/site/product Signed-off-by: Kankan Sun --- configs/evb-ast2600-spl_defconfig | 1 + drivers/mtd/spi/spi-nor-core.c | 12 +++++++++--- drivers/mtd/spi/spi-nor-ids.c | 7 ++++++- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/configs/evb-ast2600-spl_defconfig b/configs/evb-ast2600-spl_defconfig index 6aa304a73996..0559d8eaaf07 100644 --- a/configs/evb-ast2600-spl_defconfig +++ b/configs/evb-ast2600-spl_defconfig @@ -114,6 +114,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_REALTEK=y CONFIG_PHY_NCSI=y diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ba6140917d63..4a39ee6367b7 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -259,7 +259,7 @@ static int read_fsr(struct spi_nor *nor) * location. Return the configuration register value. * Returns negative if error occurred. */ -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) static int read_cr(struct spi_nor *nor) { int ret; @@ -1495,7 +1495,7 @@ static int macronix_quad_enable(struct spi_nor *nor) } #endif -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_XMC) /* * Write status Register and configuration register with 2 bytes * The first byte will be written to the status register, while the @@ -2498,8 +2498,14 @@ static int spi_nor_init_params(struct spi_nor *nor, } /* need to disable hold/reset pin feature */ - if (JEDEC_MFR(info) == SNOR_MFR_ST) +#ifdef CONFIG_SPI_FLASH_STMICRO + if ((JEDEC_MFR(info) == SNOR_MFR_ST)) params->quad_enable = micron_read_cr_quad_enable; +#endif + +#ifdef CONFIG_SPI_FLASH_XMC + params->quad_enable = winbond_sr2_bit1_quad_enable; +#endif if (JEDEC_MFR(info) == SNOR_MFR_GIGADEVICE) params->quad_enable = winbond_sr2_bit1_quad_enable; diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 5882eab2e3fc..1a228fde8d98 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -359,8 +359,13 @@ const struct flash_info spi_nor_ids[] = { #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ - { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) }, + { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) }, + { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) }, + { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ| SPI_NOR_4B_OPCODES) }, #endif { }, };