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1 parent 0451c03 commit 5bb5c5eCopy full SHA for 5bb5c5e
FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/INTERRUPTS.md
@@ -270,6 +270,9 @@ works as follows:
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Links:
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======
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+- Daniel Magum's [detailed explanations on timers interrupts](https://danielmangum.com/posts/risc-v-bytes-timer-interrupts/)
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- @cnlohr's [minirv32](https://github.com/cnlohr/mini-rv32ima)
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- Stack Overflow questions referenced in minirv32 [here](https://stackoverflow.com/questions/61913210/risc-v-interrupt-handling-flow/61916199#61916199)
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