diff --git a/FemtoRV/BOARDS/icesugar.mk b/FemtoRV/BOARDS/icesugar.mk index 8ae1847d..935b2e0d 100644 --- a/FemtoRV/BOARDS/icesugar.mk +++ b/FemtoRV/BOARDS/icesugar.mk @@ -1,19 +1,18 @@ -YOSYS_ICESUGAR_OPT=-DICE_SUGAR -q -p "synth_ice40 -relut -top $(PROJECTNAME) -json $(PROJECTNAME).json" +YOSYS_ICESUGAR_OPT=-DICE_SUGAR -q -p "synth_ice40 -abc9 -device u -dsp -top $(PROJECTNAME) -json $(PROJECTNAME).json" NEXTPNR_ICESUGAR_OPT=--force --json $(PROJECTNAME).json --pcf BOARDS/icesugar.pcf --asc $(PROJECTNAME).asc \ - --freq 12 --up5k --package sg48 + --freq 12 --up5k --package sg48 --opt-timing ####################################################################################################################### ICESUGAR: ICESUGAR.firmware_config ICESUGAR.synth ICESUGAR.prog -ICESUGAR.synth: FIRMWARE/firmware.hex - TOOLS/make_config.sh -DICE_SUGAR +ICESUGAR.synth: yosys $(YOSYS_ICESUGAR_OPT) $(VERILOGS) nextpnr-ice40 $(NEXTPNR_ICESUGAR_OPT) icetime -p BOARDS/icesugar.pcf -P sg48 -r $(PROJECTNAME).timings -d up5k -t $(PROJECTNAME).asc icepack -s $(PROJECTNAME).asc $(PROJECTNAME).bin -ICESUGAR.show: FIRMWARE/firmware.hex +ICESUGAR.show: yosys $(YOSYS_ICESUGAR_OPT) $(VERILOGS) nextpnr-ice40 $(NEXTPNR_ICESUGAR_OPT) --gui @@ -22,4 +21,4 @@ ICESUGAR.prog: ICESUGAR.firmware_config: BOARD=icesugar TOOLS/make_config.sh -DICE_SUGAR - (cd FIRMWARE; make libs) \ No newline at end of file + (cd FIRMWARE; make libs) diff --git a/FemtoRV/BOARDS/icesugar.pcf b/FemtoRV/BOARDS/icesugar.pcf index f3bba6e2..bd4aa935 100644 --- a/FemtoRV/BOARDS/icesugar.pcf +++ b/FemtoRV/BOARDS/icesugar.pcf @@ -3,27 +3,17 @@ set_io pclk 35 set_io TXD 6 set_io RXD 4 +# https://github.com/wuxx/icesugar/blob/master/src/basic/verilog/flash/top.v +# from ice40 ultraplus datasheet, miso/mosi are inverted in flash-prog mode set_io spi_cs_n 16 -set_io spi_miso 14 -set_io spi_mosi 17 +set_io spi_miso 17 +set_io spi_mosi 14 set_io spi_clk 15 -set_io oled_DIN 46 -set_io oled_CLK 44 -set_io oled_CS 42 -set_io oled_DC 37 -set_io oled_RST 36 - -set_io D1 38 +set_io D1 45 set_io D2 43 -set_io D3 45 -set_io D4 34 -set_io D5 31 - - -set_io ledmtx_DIN 27 -set_io ledmtx_CS 25 -set_io ledmtx_CLK 23 - +set_io D3 38 +set_io D4 36 +set_io D5 37 -set_io RESET 18 +set_io RESET 9 diff --git a/FemtoRV/FIRMWARE/CRT/spiflash_icesugar.ld b/FemtoRV/FIRMWARE/CRT/spiflash_icesugar.ld new file mode 100644 index 00000000..6ca63970 --- /dev/null +++ b/FemtoRV/FIRMWARE/CRT/spiflash_icesugar.ld @@ -0,0 +1,100 @@ +/* Linker script for programs stored in SPI flash */ +/* Inspired from picorv32/picosoc/sections.lds */ +/* */ +/* text sections are sent to BRAM */ +/* rodata sections are sent to flash */ +/* bss sections are sent to BRAM */ +/* data sections are sent to BRAM and have */ +/* initialization data in flash. */ +/* AT keyword specifies LMA (Load Memory Address) */ +/* */ +/* If you got a lot of code that does not fit in */ +/* RAM, you may keep text sections in flash using */ +/* spiflash_icebreaker_run_from_flash.ld */ + + +MEMORY { + FLASH (rx) : ORIGIN = 0x00820000, LENGTH = 0x100000 /* 4 MB in flash */ + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 0x20000 /* 128 kB in RAM */ +} + +SECTIONS { + + /* + * I do not understand why, but if I do not put this section, I got + * an overlapping sections error with some programs (for instance pi.c + * or C++ programs) + */ + .misc : { + . = ALIGN(4); + *(.eh_frame) + *(.eh_frame_hdr) + *(.init_array) + *(.gcc_except_table*) + } >FLASH + + /* C runtime initialization code and readonly data goes to the FLASH */ + .text : { + . = ALIGN(4); + crt0_spiflash.o(.text) /* c runtime initialization (code) */ + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.srodata) /* .rodata sections (constants, strings, etc.) */ + *(.srodata*) /* .rodata* sections (constants, strings, etc.) */ + _etext = .; /* define a global symbol at end of code */ + _sidata = _etext; /* This is used by the startup in order to initialize the .data section */ + } >FLASH + + + /* + * This is the initialized data and fastcode section + * The program executes knowing that the data is in the RAM + * but the loader puts the initial values in the FLASH (inidata). + * It is one task of the startup (crt0_spiflash.S) to copy the initial values from FLASH to RAM. + */ + .data_and_fastcode : AT ( _sidata ) { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + _ram_start = .; /* create a global symbol at ram start (e.g., for garbage collector) */ + + /* functions with attribute((section(".fastcode"))) */ + /* (e.g., some functions in femtoGL) */ + *(.fastcode*) + + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + . = ALIGN(4); + + /* Initialized data */ + *(.data) + *(.data*) + *(.sdata) + *(.sdata*) + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } > RAM + + /* Uninitialized data section */ + .bss : { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss) + *(.bss*) + *(.sbss) + *(.sbss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : { + . = ALIGN(4); + _heap_start = .; /* define a global symbol at heap start */ + _end = .; /* as expected by syscalls.c */ + } >RAM + + +} diff --git a/FemtoRV/FIRMWARE/LIBFEMTORV32/femtorv32.h b/FemtoRV/FIRMWARE/LIBFEMTORV32/femtorv32.h index 394366df..9dffb717 100644 --- a/FemtoRV/FIRMWARE/LIBFEMTORV32/femtorv32.h +++ b/FemtoRV/FIRMWARE/LIBFEMTORV32/femtorv32.h @@ -10,7 +10,7 @@ * (much faster) RAM (but use it wisely, you only got 7kB). * Other devices are sufficient RAM to load all the code. */ -#if defined(ICE_STICK) || defined(ICE_BREAKER) +#if defined(ICE_STICK) || defined(ICE_BREAKER) || defined(ICE_SUGAR) #define RV32_FASTCODE __attribute((section(".fastcode"))) #else #define RV32_FASTCODE diff --git a/FemtoRV/FIRMWARE/makefile.inc b/FemtoRV/FIRMWARE/makefile.inc index aa0815f0..3e37e5c3 100644 --- a/FemtoRV/FIRMWARE/makefile.inc +++ b/FemtoRV/FIRMWARE/makefile.inc @@ -83,6 +83,12 @@ RVGCC_LIB= $(RVTOOLCHAIN_LIB_DIR)/libc.a \ # My utility that converts elf executables into a format understood by Verilog FIRMWARE_WORDS=$(FIRMWARE_DIR)/TOOLS/firmware_words +ifeq ($(BOARD),icesugar) + TOOLCHAIN_PROG_CMD=icesprog -o 131072 +else + TOOLCHAIN_PROG_CMD=iceprog -o 128k +endif + ################################################################################ RVINCS=-I$(FIRMWARE_DIR)/LIBFEMTOGL -I$(FIRMWARE_DIR)/LIBFEMTORV32 -I$(FIRMWARE_DIR)/LIBFEMTOC @@ -142,7 +148,7 @@ FEMTORV32_LIBS_SMALL=-L$(RVTOOLCHAIN_LIB_DIR)\ # Sends the generated executable in flat binary form to SPI flash %.prog: %.spiflash.bin - iceprog -o 128k $< + TOOLCHAIN_PROG_CMD $< # Generate a disassembly (for inspection if need be) %.list: %.baremetal.elf diff --git a/FemtoRV/RTL/CONFIGS/icesugar_config.v b/FemtoRV/RTL/CONFIGS/icesugar_config.v new file mode 100644 index 00000000..ae4d13f2 --- /dev/null +++ b/FemtoRV/RTL/CONFIGS/icesugar_config.v @@ -0,0 +1,46 @@ +// Default femtosoc configuration file for Icesugar (derived from Icebreaker) + +`define NRV_NEGATIVE_RESET +/************************* Devices **********************************************************************************/ + +`define NRV_IO_LEDS // Mapped IO, LEDs D1,D2,D3,D4 (D5 is used to display errors) +`define NRV_IO_UART // Mapped IO, virtual UART (USB) +//`define NRV_IO_SSD1351 // Mapped IO, 128x128x64K OLed screen +//`define NRV_IO_MAX7219 // Mapped IO, 8x8 led matrix +`define NRV_MAPPED_SPI_FLASH // SPI flash mapped in address space. Can be used with MINIRV32 to run code from SPI flash. + +/************************* Processor configuration ******************************************************************/ + +`define NRV_FEMTORV32_QUARK +//`define NRV_FEMTORV32_ELECTRON // RV32IM +//`define NRV_FEMTORV32_INTERMISSUM // RV32IM + IRQ +//`define NRV_FEMTORV32_GRACILIS // RV32IMC + IRQ +//`define NRV_FEMTORV32_PETITBATEAU // RV32IMFC + IRQ, does not fit on IceBreaker + +`define NRV_FREQ 12 // Frequency in MHz. Recomm: 15 MHz Overclocking: 20-25 MHz +`define NRV_RESET_ADDR 32'h00820000 // Jump execution to SPI Flash (800000h, +128k(20000h) for FPGA bitstream) +// tinyraytracer: 30 MHz RV32IM electron 3:12 +// 20 MHz RV32IM gracilis 3:44 +// 20 MHz RV32IMC gracilis 3:32 +// 25 MHz RV32IMC gracilis 2:49 + +/************************* RAM (in bytes, needs to be a multiple of 4)***********************************************/ + +// Using the 128 kbytes of single-ported RAM of the ice40-up5k +// Note: cannot initialize it from .hex file, need to run from SPI Flash + +`define ICE40UP5K_SPRAM +`define NRV_RAM 131072 + +// (other option, the 12 kbytes of BRAM, this one can be initialized from .hex file). +//`define NRV_RAM 12288 + +/************************* Advanced devices configuration *********************************************************/ + +`define NRV_RUN_FROM_SPI_FLASH // Do not 'readmemh()' firmware from '.hex' file +`define NRV_IO_HARDWARE_CONFIG // Comment-out to disable hardware config registers mapped in IO-Space + // (only if you use your own firmware, libfemtorv32 depends on it) + +/******************************************************************************************************************/ + +`define NRV_CONFIGURED diff --git a/FemtoRV/RTL/DEVICES/MappedSPIFlash.v b/FemtoRV/RTL/DEVICES/MappedSPIFlash.v index e65467be..3f8a6a1a 100644 --- a/FemtoRV/RTL/DEVICES/MappedSPIFlash.v +++ b/FemtoRV/RTL/DEVICES/MappedSPIFlash.v @@ -51,6 +51,12 @@ `define SPI_FLASH_CONFIGURED `endif +`ifdef ICE_SUGAR + `define SPI_FLASH_FAST_READ_DUAL_IO + `define SPI_FLASH_DUMMY_CLOCKS 4 // Winbond SPI chips on icebreaker uses 4 dummy clocks + `define SPI_FLASH_CONFIGURED +`endif + `ifdef ULX3S `define SPI_FLASH_FAST_READ // TODO check whether dual IO mode can be done / dummy clocks `define SPI_FLASH_CONFIGURED diff --git a/FemtoRV/RTL/femtosoc_config.v b/FemtoRV/RTL/femtosoc_config.v index c4bcf8ef..dcf0999b 100644 --- a/FemtoRV/RTL/femtosoc_config.v +++ b/FemtoRV/RTL/femtosoc_config.v @@ -16,6 +16,10 @@ `include "CONFIGS/icebreaker_config.v" `endif +`ifdef ICE_SUGAR +`include "CONFIGS/icesugar_config.v" +`endif + `ifdef ECP5_EVN `include "CONFIGS/ecp5evn_config.v" `endif @@ -80,6 +84,7 @@ `ifdef ICE_SUGAR `define ICE40 + `define PASSTHROUGH_PLL `endif `ifdef ICE_SUGAR_NANO diff --git a/FemtoRV/RTL/get_config.v b/FemtoRV/RTL/get_config.v index 816852a7..674cfb0b 100644 --- a/FemtoRV/RTL/get_config.v +++ b/FemtoRV/RTL/get_config.v @@ -44,6 +44,9 @@ initial begin `endif `ifdef ICE_BREAKER $write(" -DICE_BREAKER=1"); +`endif +`ifdef ICE_SUGAR + $write(" -DICE_SUGAR=1"); `endif $write("\n");