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i386: TEST insn should be merged with ADC/SBB insn [PR122390]
The attached testcase is currently compiled to: f1: cmpl %esi, %edi adcl %esi, %edi testl %edi, %edi js .L4 ... TEST insn should be merged with ADC/SBB insn. The patch provides missing combined insn patterns. PR target/122390 gcc/ChangeLog: * config/i386/i386.md (*add<mode>3_carry_2): New insn pattern. (*add<mode>3_carry_0_cc): Ditto. (*add<mode>3_carry_0r_cc): Ditto. (*sub<mode>3_carry_2): Ditto. (*sub<mode>3_carry_0_cc): Ditto. (*sub<mode>3_carry_0r_cc): Ditt. gcc/testsuite/ChangeLog: * gcc.target/i386/pr122390.c: New test. * gcc.target/i386/pr122390-1.c: New test.
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‎gcc/config/i386/i386.md‎

Lines changed: 138 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8860,6 +8860,35 @@
88608860
(match_dup 0)))
88618861
(clobber (reg:CC FLAGS_REG))])])
88628862

8863+
(define_insn "*add<mode>3_carry_2"
8864+
[(set (reg FLAGS_REG)
8865+
(compare
8866+
(plus:SWI
8867+
(plus:SWI
8868+
(match_operator:SWI 4 "ix86_carry_flag_operator"
8869+
[(match_operand 3 "flags_reg_operand") (const_int 0)])
8870+
(match_operand:SWI 1 "nonimmediate_operand" "%0,0,rm,r"))
8871+
(match_operand:SWI 2 "<general_operand>" "<r><i>,<m>,r<i>,<m>"))
8872+
(const_int 0)))
8873+
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>,r,r")
8874+
(plus:SWI
8875+
(plus:SWI
8876+
(match_op_dup 4 [(match_dup 3) (const_int 0)])
8877+
(match_dup 1))
8878+
(match_dup 2)))]
8879+
"ix86_match_ccmode (insn, CCGOCmode)
8880+
&& ix86_binary_operator_ok (PLUS, <MODE>mode, operands, TARGET_APX_NDD)"
8881+
"@
8882+
adc{<imodesuffix>}\t{%2, %0|%0, %2}
8883+
adc{<imodesuffix>}\t{%2, %0|%0, %2}
8884+
adc{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}
8885+
adc{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
8886+
[(set_attr "isa" "*,*,apx_ndd,apx_ndd")
8887+
(set_attr "type" "alu")
8888+
(set_attr "use_carry" "1")
8889+
(set_attr "pent_pair" "pu")
8890+
(set_attr "mode" "<MODE>")])
8891+
88638892
(define_insn "*add<mode>3_carry_0"
88648893
[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
88658894
(plus:SWI
@@ -8874,6 +8903,26 @@
88748903
(set_attr "pent_pair" "pu")
88758904
(set_attr "mode" "<MODE>")])
88768905

8906+
(define_insn "*add<mode>3_carry_0_cc"
8907+
[(set (reg FLAGS_REG)
8908+
(compare
8909+
(plus:SWI
8910+
(match_operator:SWI 2 "ix86_carry_flag_operator"
8911+
[(match_operand 3 "flags_reg_operand") (const_int 0)])
8912+
(match_operand:SWI 1 "nonimmediate_operand" "0"))
8913+
(const_int 0)))
8914+
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
8915+
(plus:SWI
8916+
(match_op_dup 2 [(match_dup 3) (const_int 0)])
8917+
(match_dup 1)))]
8918+
"ix86_match_ccmode (insn, CCGOCmode)
8919+
&& (!MEM_P (operands[0]) || rtx_equal_p (operands[0], operands[1]))"
8920+
"adc{<imodesuffix>}\t{$0, %0|%0, 0}"
8921+
[(set_attr "type" "alu")
8922+
(set_attr "use_carry" "1")
8923+
(set_attr "pent_pair" "pu")
8924+
(set_attr "mode" "<MODE>")])
8925+
88778926
(define_insn "*add<mode>3_carry_0r"
88788927
[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
88798928
(plus:SWI
@@ -8888,6 +8937,26 @@
88888937
(set_attr "pent_pair" "pu")
88898938
(set_attr "mode" "<MODE>")])
88908939

8940+
(define_insn "*add<mode>3_carry_0r_cc"
8941+
[(set (reg FLAGS_REG)
8942+
(compare
8943+
(plus:SWI
8944+
(match_operator:SWI 2 "ix86_carry_flag_unset_operator"
8945+
[(match_operand 3 "flags_reg_operand") (const_int 0)])
8946+
(match_operand:SWI 1 "nonimmediate_operand" "0"))
8947+
(const_int 0)))
8948+
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
8949+
(plus:SWI
8950+
(match_op_dup 2 [(match_dup 3) (const_int 0)])
8951+
(match_dup 1)))]
8952+
"ix86_match_ccmode (insn, CCGOCmode)
8953+
&& (!MEM_P (operands[0]) || rtx_equal_p (operands[0], operands[1]))"
8954+
"sbb{<imodesuffix>}\t{$-1, %0|%0, -1}"
8955+
[(set_attr "type" "alu")
8956+
(set_attr "use_carry" "1")
8957+
(set_attr "pent_pair" "pu")
8958+
(set_attr "mode" "<MODE>")])
8959+
88918960
(define_insn "*addqi3_carry_zext<mode>"
88928961
[(set (match_operand:SWI248x 0 "register_operand" "=r,r")
88938962
(zero_extend:SWI248x
@@ -9456,6 +9525,35 @@
94569525
(match_dup 0)))
94579526
(clobber (reg:CC FLAGS_REG))])])
94589527

9528+
(define_insn "*sub<mode>3_carry_2"
9529+
[(set (reg FLAGS_REG)
9530+
(compare
9531+
(minus:SWI
9532+
(minus:SWI
9533+
(match_operand:SWI 1 "nonimmediate_operand" "0,0,rm,r")
9534+
(match_operator:SWI 4 "ix86_carry_flag_operator"
9535+
[(match_operand 3 "flags_reg_operand") (const_int 0)]))
9536+
(match_operand:SWI 2 "<general_operand>" "<r><i>,<m>,r<i>,<m>"))
9537+
(const_int 0)))
9538+
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>,r,r")
9539+
(minus:SWI
9540+
(minus:SWI
9541+
(match_dup 1)
9542+
(match_op_dup 4 [(match_dup 3) (const_int 0)]))
9543+
(match_dup 2)))]
9544+
"ix86_match_ccmode (insn, CCGOCmode)
9545+
&& ix86_binary_operator_ok (MINUS, <MODE>mode, operands, TARGET_APX_NDD)"
9546+
"@
9547+
sbb{<imodesuffix>}\t{%2, %0|%0, %2}
9548+
sbb{<imodesuffix>}\t{%2, %0|%0, %2}
9549+
sbb{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}
9550+
sbb{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
9551+
[(set_attr "isa" "*,*,apx_ndd,apx_ndd")
9552+
(set_attr "type" "alu")
9553+
(set_attr "use_carry" "1")
9554+
(set_attr "pent_pair" "pu")
9555+
(set_attr "mode" "<MODE>")])
9556+
94599557
(define_insn "*sub<mode>3_carry_0"
94609558
[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
94619559
(minus:SWI
@@ -9470,6 +9568,26 @@
94709568
(set_attr "pent_pair" "pu")
94719569
(set_attr "mode" "<MODE>")])
94729570

9571+
(define_insn "*sub<mode>3_carry_0_cc"
9572+
[(set (reg FLAGS_REG)
9573+
(compare
9574+
(minus:SWI
9575+
(match_operand:SWI 1 "nonimmediate_operand" "0")
9576+
(match_operator:SWI 2 "ix86_carry_flag_operator"
9577+
[(match_operand 3 "flags_reg_operand") (const_int 0)]))
9578+
(const_int 0)))
9579+
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
9580+
(minus:SWI
9581+
(match_dup 1)
9582+
(match_op_dup 2 [(match_dup 3) (const_int 0)])))]
9583+
"ix86_match_ccmode (insn, CCGOCmode)
9584+
&& (!MEM_P (operands[0]) || rtx_equal_p (operands[0], operands[1]))"
9585+
"sbb{<imodesuffix>}\t{$0, %0|%0, 0}"
9586+
[(set_attr "type" "alu")
9587+
(set_attr "use_carry" "1")
9588+
(set_attr "pent_pair" "pu")
9589+
(set_attr "mode" "<MODE>")])
9590+
94739591
(define_insn "*sub<mode>3_carry_0r"
94749592
[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
94759593
(minus:SWI
@@ -9484,6 +9602,26 @@
94849602
(set_attr "pent_pair" "pu")
94859603
(set_attr "mode" "<MODE>")])
94869604

9605+
(define_insn "*sub<mode>3_carry_0r_cc"
9606+
[(set (reg FLAGS_REG)
9607+
(compare
9608+
(minus:SWI
9609+
(match_operand:SWI 1 "nonimmediate_operand" "0")
9610+
(match_operator:SWI 2 "ix86_carry_flag_unset_operator"
9611+
[(match_operand 3 "flags_reg_operand") (const_int 0)]))
9612+
(const_int 0)))
9613+
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
9614+
(minus:SWI
9615+
(match_dup 1)
9616+
(match_op_dup 2 [(match_dup 3) (const_int 0)])))]
9617+
"ix86_match_ccmode (insn, CCGOCmode)
9618+
&& (!MEM_P (operands[0]) || rtx_equal_p (operands[0], operands[1]))"
9619+
"adc{<imodesuffix>}\t{$-1, %0|%0, -1}"
9620+
[(set_attr "type" "alu")
9621+
(set_attr "use_carry" "1")
9622+
(set_attr "pent_pair" "pu")
9623+
(set_attr "mode" "<MODE>")])
9624+
94879625
(define_insn "*subqi3_carry_zext<mode>"
94889626
[(set (match_operand:SWI248x 0 "register_operand" "=r,r")
94899627
(zero_extend:SWI248x

‎gcc/testsuite/gcc.target/i386/pr122390-1.c‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
/* PR target/122390 */
2+
/* { dg-do compile } */
3+
/* { dg-options "-O2" } */
4+
5+
int f (int);
6+
int g (int);
7+
8+
int f1 (unsigned a, unsigned b)
9+
{
10+
unsigned t = a < b;
11+
int tt = a + b + t;
12+
if (tt < 0)
13+
return f(tt);
14+
return g(tt);
15+
}
16+
17+
int f2 (unsigned a, unsigned b)
18+
{
19+
unsigned t = a < b;
20+
int tt = a - b - t;
21+
if (tt < 0)
22+
return f(tt);
23+
return g(tt);
24+
}
25+
26+
/* { dg-final { scan-assembler-not "test" } } */

‎gcc/testsuite/gcc.target/i386/pr122390.c‎

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
1+
/* PR target/122390 */
2+
/* { dg-do compile } */
3+
/* { dg-options "-O2" } */
4+
5+
int f (int);
6+
int g (int);
7+
8+
int f1 (unsigned a, unsigned b)
9+
{
10+
unsigned t = a < b;
11+
int tt = a + t;
12+
if (tt == 0)
13+
return f(tt);
14+
return g(tt);
15+
}
16+
17+
int f2 (unsigned a, unsigned b)
18+
{
19+
unsigned t = a <= b;
20+
int tt = a + t;
21+
if (tt < 0)
22+
return f(tt);
23+
return g(tt);
24+
}
25+
26+
int f3 (unsigned a, unsigned b)
27+
{
28+
unsigned t = a > b;
29+
int tt = a - t;
30+
if (tt == 0)
31+
return f(tt);
32+
return g(tt);
33+
}
34+
35+
int f4 (unsigned a, unsigned b)
36+
{
37+
unsigned t = a >= b;
38+
int tt = a - t;
39+
if (tt < 0)
40+
return f(tt);
41+
return g(tt);
42+
}
43+
44+
/* { dg-final { scan-assembler-not "test" } } */

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