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Christophe Lyon
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arm: [MVE intrinsics] rework sqrshr sqshl srshr uqrshl uqshl urshr
Implement sqrshr, sqshl, srshr, uqrshl, uqshl and urshr using the new MVE builtins framework. The patch fixes a probable copy/paste typo in mve_sqshl_si and mve_srshr_si: operand 1 should have mode SI, and not DI. gcc/ChangeLog: * config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift): Add ss_SQRSHR, ss_SQSHL, ss_SRSHR, ss_UQRSHL, ss_UQSHL, and ss_URSHR. (mve_function_scalar_shift): Add support for ss_SQRSHR, ss_SQSHL, ss_SRSHR, ss_UQRSHL, ss_UQSHL, and ss_URSHR. (sqrshr, sqshl, srshr, uqrshl, uqshl, urshr): New. * config/arm/arm-mve-builtins-base.def (sqrshr, sqshl, srshr) (uqrshl, uqshl, urshr): New. * config/arm/arm-mve-builtins-base.h (sqrshr, sqshl, srshr) (uqrshl, uqshl, urshr): New. * config/arm/arm-mve-builtins-shapes.cc (scalar_s32_shift): New. (scalar_s32_shift_imm): New. (scalar_u32_shift): New. (scalar_u32_shift_imm): New. * config/arm/arm-mve-builtins-shapes.h (scalar_s32_shift): New. (scalar_s32_shift_imm): New. (scalar_u32_shift): New. (scalar_u32_shift_imm): New. * config/arm/arm_mve.h (sqrshr): Delete. (sqshl): Delete. (srshr): Delete. (uqrshl): Delete. (uqshl): Delete. (urshr): Delete. (__arm_uqrshl): Delete. (__arm_sqrshr): Delete. (__arm_uqshl): Delete. (__arm_urshr): Delete. (__arm_sqshl): Delete. (__arm_srshr): Delete. * config/arm/mve.md (mve_sqshl_si, mve_srshr_si): Fix operand 1 mode. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/sqshl_check_shift.c: New test. * gcc.target/arm/mve/intrinsics/srshr_check_shift.c: New test. * gcc.target/arm/mve/intrinsics/uqshl_check_shift.c: New test. * gcc.target/arm/mve/intrinsics/urshr_check_shift.c: New test.
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‎gcc/config/arm/arm-mve-builtins-base.cc‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1172,13 +1172,19 @@ class vld24_impl : public full_width_access
11721172
enum which_scalar_shift {
11731173
ss_ASRL,
11741174
ss_LSLL,
1175+
ss_SQRSHR,
11751176
ss_SQRSHRL,
11761177
ss_SQRSHRL_SAT48,
1178+
ss_SQSHL,
11771179
ss_SQSHLL,
1180+
ss_SRSHR,
11781181
ss_SRSHRL,
1182+
ss_UQRSHL,
11791183
ss_UQRSHLL,
11801184
ss_UQRSHLL_SAT48,
1185+
ss_UQSHL,
11811186
ss_UQSHLL,
1187+
ss_URSHR,
11821188
ss_URSHRL
11831189
};
11841190

@@ -1209,6 +1215,10 @@ class mve_function_scalar_shift : public function_base
12091215
code = CODE_FOR_mve_lsll;
12101216
break;
12111217

1218+
case ss_SQRSHR:
1219+
code = CODE_FOR_mve_sqrshr_si;
1220+
break;
1221+
12121222
case ss_SQRSHRL:
12131223
code = code_for_mve_sqrshrl_sat_di (SQRSHRL_64);
12141224
break;
@@ -1217,6 +1227,18 @@ class mve_function_scalar_shift : public function_base
12171227
code = code_for_mve_sqrshrl_sat_di (SQRSHRL_48);
12181228
break;
12191229

1230+
case ss_SQSHL:
1231+
code = CODE_FOR_mve_sqshl_si;
1232+
break;
1233+
1234+
case ss_SRSHR:
1235+
code = CODE_FOR_mve_srshr_si;
1236+
break;
1237+
1238+
case ss_UQRSHL:
1239+
code = CODE_FOR_mve_uqrshl_si;
1240+
break;
1241+
12201242
case ss_SQSHLL:
12211243
code = CODE_FOR_mve_sqshll_di;
12221244
break;
@@ -1233,10 +1255,18 @@ class mve_function_scalar_shift : public function_base
12331255
code = code_for_mve_uqrshll_sat_di (UQRSHLL_48);
12341256
break;
12351257

1258+
case ss_UQSHL:
1259+
code = CODE_FOR_mve_uqshl_si;
1260+
break;
1261+
12361262
case ss_UQSHLL:
12371263
code = CODE_FOR_mve_uqshll_di;
12381264
break;
12391265

1266+
case ss_URSHR:
1267+
code = CODE_FOR_mve_urshr_si;
1268+
break;
1269+
12401270
case ss_URSHRL:
12411271
code = CODE_FOR_mve_urshrl_di;
12421272
break;
@@ -1437,13 +1467,19 @@ namespace arm_mve {
14371467

14381468
FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))
14391469
FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))
1470+
FUNCTION (sqrshr, mve_function_scalar_shift, (ss_SQRSHR))
14401471
FUNCTION (sqrshrl, mve_function_scalar_shift, (ss_SQRSHRL))
14411472
FUNCTION (sqrshrl_sat48, mve_function_scalar_shift, (ss_SQRSHRL_SAT48))
1473+
FUNCTION (sqshl, mve_function_scalar_shift, (ss_SQSHL))
14421474
FUNCTION (sqshll, mve_function_scalar_shift, (ss_SQSHLL))
1475+
FUNCTION (srshr, mve_function_scalar_shift, (ss_SRSHR))
14431476
FUNCTION (srshrl, mve_function_scalar_shift, (ss_SRSHRL))
1477+
FUNCTION (uqrshl, mve_function_scalar_shift, (ss_UQRSHL))
14441478
FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL))
14451479
FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48))
1480+
FUNCTION (uqshl, mve_function_scalar_shift, (ss_UQSHL))
14461481
FUNCTION (uqshll, mve_function_scalar_shift, (ss_UQSHLL))
1482+
FUNCTION (urshr, mve_function_scalar_shift, (ss_URSHR))
14471483
FUNCTION (urshrl, mve_function_scalar_shift, (ss_URSHRL))
14481484
FUNCTION_PRED_P_S_U (vabavq, VABAVQ)
14491485
FUNCTION_WITHOUT_N (vabdq, VABDQ)

‎gcc/config/arm/arm-mve-builtins-base.def‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,13 +20,19 @@
2020
#define REQUIRES_FLOAT false
2121
DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)
2222
DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)
23+
DEF_MVE_FUNCTION (sqrshr, scalar_s32_shift, none, none)
2324
DEF_MVE_FUNCTION (sqrshrl, scalar_s64_shift, none, none)
2425
DEF_MVE_FUNCTION (sqrshrl_sat48, scalar_s64_shift, none, none)
26+
DEF_MVE_FUNCTION (sqshl, scalar_s32_shift_imm, none, none)
2527
DEF_MVE_FUNCTION (sqshll, scalar_s64_shift_imm, none, none)
28+
DEF_MVE_FUNCTION (srshr, scalar_s32_shift_imm, none, none)
2629
DEF_MVE_FUNCTION (srshrl, scalar_s64_shift_imm, none, none)
30+
DEF_MVE_FUNCTION (uqrshl, scalar_u32_shift, none, none)
2731
DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none)
2832
DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none)
33+
DEF_MVE_FUNCTION (uqshl, scalar_u32_shift_imm, none, none)
2934
DEF_MVE_FUNCTION (uqshll, scalar_u64_shift_imm, none, none)
35+
DEF_MVE_FUNCTION (urshr, scalar_u32_shift_imm, none, none)
3036
DEF_MVE_FUNCTION (urshrl, scalar_u64_shift_imm, none, none)
3137
DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)
3238
DEF_MVE_FUNCTION (vabdq, binary, all_integer, mx_or_none)

‎gcc/config/arm/arm-mve-builtins-base.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,13 +25,19 @@ namespace functions {
2525

2626
extern const function_base *const asrl;
2727
extern const function_base *const lsll;
28+
extern const function_base *const sqrshr;
2829
extern const function_base *const sqrshrl;
2930
extern const function_base *const sqrshrl_sat48;
31+
extern const function_base *const sqshl;
3032
extern const function_base *const sqshll;
33+
extern const function_base *const srshr;
3134
extern const function_base *const srshrl;
35+
extern const function_base *const uqrshl;
3236
extern const function_base *const uqrshll;
3337
extern const function_base *const uqrshll_sat48;
38+
extern const function_base *const uqshl;
3439
extern const function_base *const uqshll;
40+
extern const function_base *const urshr;
3541
extern const function_base *const urshrl;
3642
extern const function_base *const vabavq;
3743
extern const function_base *const vabdq;

‎gcc/config/arm/arm-mve-builtins-shapes.cc‎

Lines changed: 76 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1682,6 +1682,82 @@ struct mvn_def : public overloaded_base<0>
16821682
};
16831683
SHAPE (mvn)
16841684

1685+
/* int32_t foo(int32_t, int32_t)
1686+
1687+
Example: sqrshr.
1688+
int32_t [__arm_]sqrshr(int32_t value, int32_t shift) */
1689+
struct scalar_s32_shift_def : public nonoverloaded_base
1690+
{
1691+
void
1692+
build (function_builder &b, const function_group_info &group,
1693+
bool preserve_user_namespace) const override
1694+
{
1695+
build_all (b, "ss32,ss32,ss32", group, MODE_none, preserve_user_namespace);
1696+
}
1697+
};
1698+
SHAPE (scalar_s32_shift)
1699+
1700+
/* int32_t foo(int32_t, const int)
1701+
1702+
Check that 'shift' is in the [1,32] range.
1703+
1704+
Example: sqshl.
1705+
int32_t [__arm_]sqshl(int32_t value, const int shift) */
1706+
struct scalar_s32_shift_imm_def : public nonoverloaded_base
1707+
{
1708+
void
1709+
build (function_builder &b, const function_group_info &group,
1710+
bool preserve_user_namespace) const override
1711+
{
1712+
build_all (b, "ss32,ss32,su64", group, MODE_none, preserve_user_namespace);
1713+
}
1714+
1715+
bool
1716+
check (function_checker &c) const override
1717+
{
1718+
return c.require_immediate_range (1, 1, 32);
1719+
}
1720+
};
1721+
SHAPE (scalar_s32_shift_imm)
1722+
1723+
/* uint32_t foo(uint32_t, int32_t)
1724+
1725+
Example: uqrshl.
1726+
uint32_t [__arm_]uqrshl(uint32_t value, int32_t shift) */
1727+
struct scalar_u32_shift_def : public nonoverloaded_base
1728+
{
1729+
void
1730+
build (function_builder &b, const function_group_info &group,
1731+
bool preserve_user_namespace) const override
1732+
{
1733+
build_all (b, "su32,su32,ss32", group, MODE_none, preserve_user_namespace);
1734+
}
1735+
};
1736+
SHAPE (scalar_u32_shift)
1737+
1738+
/* uint32_t foo(uint32_t, const int)
1739+
1740+
Check that 'shift' is in the [1,32] range.
1741+
1742+
Example: uqshl.
1743+
uint32_t [__arm_]uqshl(uint32_t value, const int shift) */
1744+
struct scalar_u32_shift_imm_def : public nonoverloaded_base
1745+
{
1746+
void
1747+
build (function_builder &b, const function_group_info &group,
1748+
bool preserve_user_namespace) const override
1749+
{
1750+
build_all (b, "su32,su32,su64", group, MODE_none, preserve_user_namespace);
1751+
}
1752+
1753+
bool
1754+
check (function_checker &c) const override
1755+
{
1756+
return c.require_immediate_range (1, 1, 32);
1757+
}
1758+
};
1759+
SHAPE (scalar_u32_shift_imm)
1760+
16851761
/* int64_t foo(int64_t, int32_t)
16861762
16871763
Example: asrl

‎gcc/config/arm/arm-mve-builtins-shapes.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,10 @@ namespace arm_mve
6666
extern const function_shape *const load_ext_gather_offset;
6767
extern const function_shape *const load_gather_base;
6868
extern const function_shape *const mvn;
69+
extern const function_shape *const scalar_s32_shift;
70+
extern const function_shape *const scalar_s32_shift_imm;
71+
extern const function_shape *const scalar_u32_shift;
72+
extern const function_shape *const scalar_u32_shift_imm;
6973
extern const function_shape *const scalar_s64_shift;
7074
extern const function_shape *const scalar_s64_shift_imm;
7175
extern const function_shape *const scalar_u64_shift;

‎gcc/config/arm/arm_mve.h‎

Lines changed: 0 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -80,12 +80,6 @@
8080
#define vgetq_lane_u16(__a, __idx) __arm_vgetq_lane_u16(__a, __idx)
8181
#define vgetq_lane_u32(__a, __idx) __arm_vgetq_lane_u32(__a, __idx)
8282
#define vgetq_lane_u64(__a, __idx) __arm_vgetq_lane_u64(__a, __idx)
83-
#define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1)
84-
#define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1)
85-
#define srshr(__p0, __p1) __arm_srshr(__p0, __p1)
86-
#define uqrshl(__p0, __p1) __arm_uqrshl(__p0, __p1)
87-
#define uqshl(__p0, __p1) __arm_uqshl(__p0, __p1)
88-
#define urshr(__p0, __p1) __arm_urshr(__p0, __p1)
8983
#endif
9084

9185
/* For big-endian, GCC's vector indices are reversed within each 64 bits
@@ -236,47 +230,6 @@ __arm_vgetq_lane_u64 (uint64x2_t __a, const int __idx)
236230
return __a[__ARM_LANEQ(__a,__idx)];
237231
}
238232

239-
__extension__ extern __inline uint32_t
240-
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
241-
__arm_uqrshl (uint32_t value, int32_t shift)
242-
{
243-
return __builtin_mve_uqrshl_si (value, shift);
244-
}
245-
246-
__extension__ extern __inline int32_t
247-
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
248-
__arm_sqrshr (int32_t value, int32_t shift)
249-
{
250-
return __builtin_mve_sqrshr_si (value, shift);
251-
}
252-
253-
__extension__ extern __inline uint32_t
254-
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
255-
__arm_uqshl (uint32_t value, const int shift)
256-
{
257-
return __builtin_mve_uqshl_si (value, shift);
258-
}
259-
260-
__extension__ extern __inline uint32_t
261-
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
262-
__arm_urshr (uint32_t value, const int shift)
263-
{
264-
return __builtin_mve_urshr_si (value, shift);
265-
}
266-
267-
__extension__ extern __inline int32_t
268-
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
269-
__arm_sqshl (int32_t value, const int shift)
270-
{
271-
return __builtin_mve_sqshl_si (value, shift);
272-
}
273-
274-
__extension__ extern __inline int32_t
275-
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
276-
__arm_srshr (int32_t value, const int shift)
277-
{
278-
return __builtin_mve_srshr_si (value, shift);
279-
}
280233

281234
#if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */
282235

‎gcc/config/arm/mve.md‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4374,7 +4374,7 @@
43744374
;;
43754375
(define_insn "mve_sqshl_si"
43764376
[(set (match_operand:SI 0 "arm_general_register_operand" "=r")
4377-
(ss_ashift:SI (match_operand:DI 1 "arm_general_register_operand" "0")
4377+
(ss_ashift:SI (match_operand:SI 1 "arm_general_register_operand" "0")
43784378
(match_operand:SI 2 "immediate_operand" "Pg")))]
43794379
"TARGET_HAVE_MVE"
43804380
"sqshl%?\\t%1, %2"
@@ -4385,7 +4385,7 @@
43854385
;;
43864386
(define_insn "mve_srshr_si"
43874387
[(set (match_operand:SI 0 "arm_general_register_operand" "=r")
4388-
(unspec:SI [(match_operand:DI 1 "arm_general_register_operand" "0")
4388+
(unspec:SI [(match_operand:SI 1 "arm_general_register_operand" "0")
43894389
(match_operand:SI 2 "immediate_operand" "Pg")]
43904390
SRSHR))]
43914391
"TARGET_HAVE_MVE"

‎gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl_check_shift.c‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
2+
/* { dg-add-options arm_v8_1m_mve } */
3+
4+
#include "arm_mve.h"
5+
6+
#ifdef __cplusplus
7+
extern "C" {
8+
#endif
9+
10+
int32_t
11+
foo (int32_t value)
12+
{
13+
return sqshl (value, 33); /* { dg-error {passing 33 to argument 2 of 'sqshl', which expects a value in the range \[1, 32\]} } */
14+
}
15+
16+
int32_t
17+
foo1 (int32_t value)
18+
{
19+
return sqshl (value, -1); /* { dg-error {passing -1 to argument 2 of 'sqshl', which expects a value in the range \[1, 32\]} } */
20+
}
21+
22+
#ifdef __cplusplus
23+
}
24+
#endif

‎gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr_check_shift.c‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
2+
/* { dg-add-options arm_v8_1m_mve } */
3+
4+
#include "arm_mve.h"
5+
6+
#ifdef __cplusplus
7+
extern "C" {
8+
#endif
9+
10+
int32_t
11+
foo (int32_t value)
12+
{
13+
return srshr (value, 33); /* { dg-error {passing 33 to argument 2 of 'srshr', which expects a value in the range \[1, 32\]} } */
14+
}
15+
16+
int32_t
17+
foo1 (int32_t value)
18+
{
19+
return srshr (value, -1); /* { dg-error {passing -1 to argument 2 of 'srshr', which expects a value in the range \[1, 32\]} } */
20+
}
21+
22+
#ifdef __cplusplus
23+
}
24+
#endif

‎gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl_check_shift.c‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
2+
/* { dg-add-options arm_v8_1m_mve } */
3+
4+
#include "arm_mve.h"
5+
6+
#ifdef __cplusplus
7+
extern "C" {
8+
#endif
9+
10+
uint32_t
11+
foo (uint32_t value)
12+
{
13+
return uqshl (value, 33); /* { dg-error {passing 33 to argument 2 of 'uqshl', which expects a value in the range \[1, 32\]} } */
14+
}
15+
16+
uint32_t
17+
foo1 (uint32_t value)
18+
{
19+
return uqshl (value, -1); /* { dg-error {passing -1 to argument 2 of 'uqshl', which expects a value in the range \[1, 32\]} } */
20+
}
21+
22+
#ifdef __cplusplus
23+
}
24+
#endif

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