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| 1 | +2025-11-13 Alexandre Oliva <oliva@adacore.com> |
| 2 | + Olivier Hainque <hainque@adacore.com> |
| 3 | + |
| 4 | + * config/vxworks/base/b_NULL.h: New. |
| 5 | + * config.gcc (extra_headers) <*-*-vxworks*>: Add it. |
| 6 | + * Makefile.in (stmp-int-hdrs): Support /././ markers in USER_H |
| 7 | + to mark the beginning of the install name. Document. |
| 8 | + * doc/sourcebuild.texi (Headers): Document /././ marker. |
| 9 | + |
| 10 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 11 | + |
| 12 | + * tree-cfgcleanup.cc (tree_forwarder_block_p): Remove must argument. |
| 13 | + (remove_forwarder_block): Add can_split |
| 14 | + argument. Handle the splitting case (iff phis in bb). |
| 15 | + (cleanup_tree_cfg_bb): Update argument to tree_forwarder_block_p. |
| 16 | + (remove_forwarder_block_with_phi): Remove. |
| 17 | + (pass_merge_phi::execute): Update argument to tree_forwarder_block_p |
| 18 | + and call remove_forwarder_block instead of remove_forwarder_block_with_phi. |
| 19 | + |
| 20 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 21 | + |
| 22 | + PR tree-optimization/122493 |
| 23 | + * tree-cfgcleanup.cc (tree_forwarder_block_p): Change bool argument |
| 24 | + to a must have phi and allow phis if it is false. |
| 25 | + (remove_forwarder_block): Add support for merging of forwarder blocks |
| 26 | + with phis. |
| 27 | + |
| 28 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 29 | + |
| 30 | + * tree-cfg.cc (copy_phi_arg_into_existing_phi): Use the original location |
| 31 | + if the mapped location is unknown. |
| 32 | + |
| 33 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 34 | + |
| 35 | + * tree-cfg.cc (copy_phi_arg_into_existing_phi): New use_map argument. |
| 36 | + * tree-cfg.h (copy_phi_arg_into_existing_phi): Update declaration. |
| 37 | + * tree-cfgcleanup.cc (remove_forwarder_block_with_phi): Use |
| 38 | + copy_phi_arg_into_existing_phi instead of inlining it. |
| 39 | + |
| 40 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 41 | + |
| 42 | + * tree-cfgcleanup.cc (remove_forwarder_block): Move |
| 43 | + variable declaration ei into for loop. |
| 44 | + |
| 45 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 46 | + |
| 47 | + * tree-cfgcleanup.cc (remove_forwarder_block_with_phi): Use |
| 48 | + edge iterator instead of while loop. |
| 49 | + |
| 50 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 51 | + |
| 52 | + * tree-cfgcleanup.cc (remove_forwarder_block): Remove check |
| 53 | + on the available dominator information. |
| 54 | + |
| 55 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 56 | + |
| 57 | + * tree-cfgcleanup.cc (tree_forwarder_block_p): Reject bb which has a single |
| 58 | + predecessor which has a single successor. |
| 59 | + |
| 60 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 61 | + |
| 62 | + * tree-cfgcleanup.cc (pass_merge_phi::execute): Move |
| 63 | + check for abnormal or no phis to remove_forwarder_block_with_phi |
| 64 | + and the check on dominated to tree_forwarder_block_p. |
| 65 | + (remove_forwarder_block_with_phi): here. |
| 66 | + |
| 67 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 68 | + |
| 69 | + * tree-cfgcleanup.cc (remove_forwarder_block_with_phi): Remove check on non-local label. |
| 70 | + (remove_forwarder_block): Remove check on non-label/eh landing pad. |
| 71 | + (tree_forwarder_block_p): Add check on lable for an eh landing pad. |
| 72 | + |
| 73 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 74 | + |
| 75 | + * tree-cfgcleanup.cc (remove_forwarder_block): Remove check for infinite loop. |
| 76 | + (remove_forwarder_block_with_phi): Likewise. Also remove check for loop header. |
| 77 | + |
| 78 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 79 | + |
| 80 | + * tree-cfgcleanup.cc (pass_merge_phi::execute): Remove worklist. |
| 81 | + |
| 82 | +2025-11-13 Jeff Law <jlaw@ventanamicro.com> |
| 83 | + |
| 84 | + * ext-dce.cc (ext_dce_try_optimize_rshift): New function to optimize a |
| 85 | + shift pair implementing a zero/sign extension. |
| 86 | + (ext_dce_try_optimize_extension): Renamed from |
| 87 | + ext_dce_try_optimize_insn. |
| 88 | + (ext_dce_process_uses): Handle shift pairs implementing extensions. |
| 89 | + |
| 90 | +2025-11-13 Andrew Pinski <andrew.pinski@oss.qualcomm.com> |
| 91 | + |
| 92 | + PR tree-optimization/122637 |
| 93 | + * tree-scalar-evolution.cc (final_value_replacement_loop): Fix order |
| 94 | + of gimplification and constant prop. |
| 95 | + |
| 96 | +2025-11-13 Jeff Law <jlaw@ventanamicro.com> |
| 97 | + |
| 98 | + PR rtl-optimization/122627 |
| 99 | + * lra-constraints.cc (update_equiv): Remove patch from last week |
| 100 | + related to pr122321. |
| 101 | + (lra_constraints): Expand the equivalence array after eliminations |
| 102 | + are complete. |
| 103 | + |
| 104 | +2025-11-13 Xi Ruoyao <xry111@xry111.site> |
| 105 | + |
| 106 | + * configure.ac (HAVE_AS_16B_ATOMIC): Define if the assembler |
| 107 | + supports LSX and sc.q. |
| 108 | + * configure: Regenerate. |
| 109 | + * config.in: Regenerate. |
| 110 | + * config/loongarch/loongarch-opts.h (HAVE_AS_16B_ATOMIC): |
| 111 | + Defined to 0 if undefined yet. |
| 112 | + * config/loongarch/linux.h (HAVE_IFUNC_FOR_LIBATOMIC_16B): |
| 113 | + Define as HAVE_AS_16B_ATOMIC && OPTION_GLIBC. |
| 114 | + * config/loongarch/loongarch-protos.h |
| 115 | + (loongarch_16b_atomic_lock_free_p): New prototype. |
| 116 | + * config/loongarch/loongarch.cc |
| 117 | + (loongarch_16b_atomic_lock_free_p): Implement. |
| 118 | + * config/loongarch/sync.md (atomic_storeti_lsx): Require |
| 119 | + loongarch_16b_atomic_lock_free_p. |
| 120 | + (atomic_storeti): Likewise. |
| 121 | + (atomic_exchangeti_scq): Likewise. |
| 122 | + (atomic_exchangeti): Likewise. |
| 123 | + (atomic_compare_and_swapti): Likewise. |
| 124 | + (atomic_fetch_<amop_ti_fetch>ti_scq): Likewise. |
| 125 | + (atomic_fetch_<amop_ti_fetch>ti): Likewise. |
| 126 | + (ALL_SC): Likewise for TImode. |
| 127 | + (atomic_storeti_scq): Remove. |
| 128 | + |
| 129 | +2025-11-13 Richard Biener <rguenther@suse.de> |
| 130 | + |
| 131 | + * config/i386/i386-features.cc (pass_x86_cse::x86_cse): Delete |
| 132 | + loads. |
| 133 | + |
| 134 | +2025-11-13 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| 135 | + |
| 136 | + PR other/122638 |
| 137 | + * doc/install.texi (Configuration, --enable-x86-64-mfentry): Fix |
| 138 | + typo. |
| 139 | + |
| 140 | +2025-11-13 liuhongt <hongtao.liu@intel.com> |
| 141 | + |
| 142 | + * config/i386/i386.md (*ior<mode>_ccz_1): New define_insn. |
| 143 | + |
| 144 | +2025-11-13 Alice Carlotti <alice.carlotti@arm.com> |
| 145 | + |
| 146 | + * config/aarch64/driver-aarch64.cc |
| 147 | + (host_detect_local_cpu): Extend feature string syntax. |
| 148 | + |
| 149 | +2025-11-13 Richard Biener <rguenther@suse.de> |
| 150 | + |
| 151 | + * tree-ssa-dce.cc (simple_dce_from_worklist): For calls |
| 152 | + with side-effects remove their LHS. |
| 153 | + |
| 154 | +2025-11-13 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| 155 | + |
| 156 | + * config/aarch64/aarch64-simd.md (*eor3q<mode>4): New insn to be used by |
| 157 | + combine after reload to optimize any grouping of eor's that are using FP |
| 158 | + registers for scalar modes. |
| 159 | + |
| 160 | +2025-11-13 Kuan-Lin Chen <rufus@andestech.com> |
| 161 | + |
| 162 | + * config/riscv/riscv-target-attr.cc (riscv_process_target_str): Clean |
| 163 | + the final byte of str_to_check. |
| 164 | + |
1 | 165 | 2025-11-12 David Malcolm <dmalcolm@redhat.com> |
2 | 166 |
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3 | 167 | PR diagnostics/115970 |
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