SW/HW check: where do these peripherals go?

[giuliof]

Find chips related to these I/O peripherals and try to understand their purpose.

• $Dx is already known as handled by chip in D8.
• For $8x, chip in D9 is a good starting point.

I/O addr	R/W	rom addr	notes
da	w	c058	speaker - splash screen
da	w	c09a - c0a2	speaker - boot
d6	r	c0e1	timer 1 configuration (read value is used to address prescaler table, masked with 0b111)
de	w	c171/001c	...
dc	w	c229	FDC, before re-enabling IRQ
dc	w	c27f	FDC, before re-enabling IRQ
dc	w	c33a	FDC, before re-enabling IRQ
da	w	c5f5	speaker
d6	r	c6ce	crtc
d6	r	c95f	...
83	w	c030	set to $89
81	w	c037	set to $10
81	r	c165 - c169 - c16f	bit 0 is set
82	r	c216	FDC, polling on bit 2, busy wait until is set
82	r	c26c	same
82	r	c32a	same
82	r	c3d2	same
82	r	c75d	polling on bit 1, busy wait until is set
81	r	c770	as c165 but sets and resets bit 7
81	r/w	c795	sets bit 7
81	r/w	c79e	resets bit 7

[giomba]

Peripheral at $80-$83 is a good candidate for uPD8255 (GPIO).

After a quick inspection here and there, if we consider $83 as the control register, we can make an hypotesis that, writing $89 to it, sets the various ports as PORTC=input (address $82), PORTA, PORTB=output (address $80, $81)
In fact, in the code, it always reads from $82 (PORTC), and only writes and $81 (PORTB) and $83 (control register).
Maybe PORTA is unused.

Looks like we'll have to hunt traces on the board, and maybe some things will start to make sense.

[giomba]

I opened a dedicated branch with these intuitions.
https://github.com/GLGPrograms/ceda-rom-disassembly/tree/gpio/idea

[giomba]

I inspected the board directly and found out that PORTB:7 is connected to ~CE of uPD446-1 chip in J9.
It is not a direct connection, but it passes thru a sequence of various logic ports in chip F13 and F14 (see schematics for details), but I haven't been able to locate all the traces yet, so I can't tell exactly what is happening.
So I think it is now safe to assert that IO address $81 is used for banking chips in and out.

Also, the code sets PORTB:4 (one shot at the beginning), but that pin is connected to an empty hole in location A14 (where there is no chip).