Commit 4deb5e5
Runtime Flash Clock detection (espressif#11903)
* getFlashFrequencyMHz
* Refactor source frequency logic for ESP32
Updated source frequency handling for ESP32 and ESP32S3 targets.
* fix compile for esp32
* Add default case for core clock selection
* move in Esp.cpp
* Refactor flash clock register base address usage
Replaced FLASH_SPI0_BASE with DR_REG_SPI0_BASE for clock register access.
* Refactor flash frequency functions with HAL support
Refactor flash frequency functions to use ESP-IDF HAL for better maintainability and chip-specific handling.
* Update Esp.cpp
* Remove isFlashHighPerformanceModeEnabled function
Removed isFlashHighPerformanceModeEnabled function declaration.
* Remove HPM Mode check from debug report
Removed check for High Performance Mode in chip debug report.
* Improve getFlashClockDivider documentation and logic
Enhanced the documentation for the getFlashClockDivider function and added handling for modern chips using the SPIMEM structure.
* Refactor getFlashClockDivider for ESP32 target
* Add includes for ESP32P4 and ESP32C5 targets
* Update includes for ESP32 target configurations
* Refactor includes for ESP32 chip compatibility
Updated includes for modern ESP32 chips to prioritize newer spi_mem_c_struct.h.
* Refactor flash chip mode handling for ESP32 variants
* Update getFlashChipMode for ESP32C5 target support
* Refactor getFlashClockDivider comments for clarity
* Update clock handling for ESP32-C5
* SPI1 not SPI0
* c5 fix
* update comments
* ci(pre-commit): Apply automatic fixes
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Co-authored-by: pre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com>1 parent 493c528 commit 4deb5e5
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