ast_code_generator is updated

shtaxxx · shtaxxx · commit d12507ad60ec · 2015-06-22T01:00:32.000+09:00
diff --git a/pyverilog/ast_code_generator/codegen.py b/pyverilog/ast_code_generator/codegen.py
@@ -72,7 +72,7 @@ def visit_ModuleDef(self, node):
             'modulename' : escape(node.name),
             'paramlist' : paramlist,
             'portlist' :  portlist,
-            'items' : [ self.visit(item) for item in node.items ],
+            'items' : [ self.visit(item) for item in node.items ] if node.items else (),
             }
         rslt = template.render(template_dict)
         return rslt

Original file line number	Diff line number	Diff line change
`@@ -72,7 +72,7 @@ def visit_ModuleDef(self, node):`
`72`	`72`	`'modulename' : escape(node.name),`
`73`	`73`	`'paramlist' : paramlist,`
`74`	`74`	`'portlist' : portlist,`
`75`		`- 'items' : [ self.visit(item) for item in node.items ],`
	`75`	`+ 'items' : [ self.visit(item) for item in node.items ] if node.items else (),`
`76`	`76`	`}`
`77`	`77`	`rslt = template.render(template_dict)`
`78`	`78`	`return rslt`