From ecd7bad072fd03763cd10c54d7e5ee0a9259f040 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 30 Jan 2020 09:49:47 +0100 Subject: [PATCH 1/6] cpu/cortexm: move CPU_ARCH/FAM to Makefile.features --- cpu/cc2538/Makefile.features | 2 ++ cpu/cc2538/Makefile.include | 2 -- cpu/cc26x0/Makefile.features | 2 ++ cpu/cc26x0/Makefile.include | 1 - cpu/cc26x2_cc13x2/Makefile.features | 2 ++ cpu/cc26x2_cc13x2/Makefile.include | 1 - cpu/ezr32wg/Makefile.features | 2 ++ cpu/ezr32wg/Makefile.include | 2 -- cpu/lm4f120/Makefile.features | 2 ++ cpu/lm4f120/Makefile.include | 2 -- cpu/lpc1768/Makefile.features | 2 ++ cpu/lpc1768/Makefile.include | 2 -- cpu/nrf51/Makefile.features | 3 +++ cpu/nrf51/Makefile.include | 3 --- cpu/nrf52/Makefile.features | 3 +++ cpu/nrf52/Makefile.include | 3 --- cpu/sam3/Makefile.features | 3 +++ cpu/sam3/Makefile.include | 3 --- cpu/samd21/Makefile.features | 3 +++ cpu/samd21/Makefile.include | 3 --- cpu/samd5x/Makefile.features | 3 +++ cpu/samd5x/Makefile.include | 3 --- cpu/saml1x/Makefile.features | 3 +++ cpu/saml1x/Makefile.include | 2 -- cpu/saml21/Makefile.features | 3 +++ cpu/saml21/Makefile.include | 3 --- cpu/stm32f0/Makefile.features | 3 +++ cpu/stm32f0/Makefile.include | 3 --- cpu/stm32f1/Makefile.features | 3 +++ cpu/stm32f1/Makefile.include | 3 --- cpu/stm32f2/Makefile.features | 3 +++ cpu/stm32f2/Makefile.include | 3 --- cpu/stm32f3/Makefile.features | 3 +++ cpu/stm32f3/Makefile.include | 3 --- cpu/stm32f4/Makefile.features | 3 +++ cpu/stm32f4/Makefile.include | 3 --- cpu/stm32f7/Makefile.features | 3 +++ cpu/stm32f7/Makefile.include | 3 --- cpu/stm32l0/Makefile.features | 3 +++ cpu/stm32l0/Makefile.include | 3 --- cpu/stm32l1/Makefile.features | 3 +++ cpu/stm32l1/Makefile.include | 3 --- cpu/stm32l4/Makefile.features | 3 +++ cpu/stm32l4/Makefile.include | 3 --- 44 files changed, 60 insertions(+), 57 deletions(-) diff --git a/cpu/cc2538/Makefile.features b/cpu/cc2538/Makefile.features index 32c68f079cdb..69cede1a6bdb 100644 --- a/cpu/cc2538/Makefile.features +++ b/cpu/cc2538/Makefile.features @@ -1,3 +1,5 @@ +CPU_ARCH = cortex-m3 + FEATURES_PROVIDED += periph_cpuid FEATURES_PROVIDED += periph_gpio periph_gpio_irq FEATURES_PROVIDED += periph_hwrng diff --git a/cpu/cc2538/Makefile.include b/cpu/cc2538/Makefile.include index 1fe925bc5449..ea1a0f256b72 100644 --- a/cpu/cc2538/Makefile.include +++ b/cpu/cc2538/Makefile.include @@ -1,3 +1 @@ -CPU_ARCH = cortex-m3 - include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/cc26x0/Makefile.features b/cpu/cc26x0/Makefile.features index 34f3697b8df1..ad7cec435ce4 100644 --- a/cpu/cc26x0/Makefile.features +++ b/cpu/cc26x0/Makefile.features @@ -1 +1,3 @@ +CPU_ARCH = cortex-m3 + -include $(RIOTCPU)/cc26xx_cc13xx/Makefile.features diff --git a/cpu/cc26x0/Makefile.include b/cpu/cc26x0/Makefile.include index 57e8be0e9309..9e7ad2a34acd 100644 --- a/cpu/cc26x0/Makefile.include +++ b/cpu/cc26x0/Makefile.include @@ -1,4 +1,3 @@ -CPU_ARCH = cortex-m3 CPU_VARIANT = x0 VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o diff --git a/cpu/cc26x2_cc13x2/Makefile.features b/cpu/cc26x2_cc13x2/Makefile.features index 34f3697b8df1..aadc6168822b 100644 --- a/cpu/cc26x2_cc13x2/Makefile.features +++ b/cpu/cc26x2_cc13x2/Makefile.features @@ -1 +1,3 @@ +CPU_ARCH = cortex-m4f + -include $(RIOTCPU)/cc26xx_cc13xx/Makefile.features diff --git a/cpu/cc26x2_cc13x2/Makefile.include b/cpu/cc26x2_cc13x2/Makefile.include index 0000d029ae1f..cbfec44aa33f 100644 --- a/cpu/cc26x2_cc13x2/Makefile.include +++ b/cpu/cc26x2_cc13x2/Makefile.include @@ -1,4 +1,3 @@ -CPU_ARCH = cortex-m4f CPU_VARIANT = x2 VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o diff --git a/cpu/ezr32wg/Makefile.features b/cpu/ezr32wg/Makefile.features index 8c82fc14b723..9dc1b146965b 100644 --- a/cpu/ezr32wg/Makefile.features +++ b/cpu/ezr32wg/Makefile.features @@ -1,3 +1,5 @@ +CPU_ARCH = cortex-m4f + FEATURES_PROVIDED += periph_cpuid FEATURES_PROVIDED += periph_gpio periph_gpio_irq diff --git a/cpu/ezr32wg/Makefile.include b/cpu/ezr32wg/Makefile.include index 6fdedf4c05c8..ea1a0f256b72 100644 --- a/cpu/ezr32wg/Makefile.include +++ b/cpu/ezr32wg/Makefile.include @@ -1,3 +1 @@ -CPU_ARCH = cortex-m4f - include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/lm4f120/Makefile.features b/cpu/lm4f120/Makefile.features index c3bedeeaa2f4..1a39817cab1e 100644 --- a/cpu/lm4f120/Makefile.features +++ b/cpu/lm4f120/Makefile.features @@ -1 +1,3 @@ +CPU_ARCH = cortex-m4f + -include $(RIOTCPU)/cortexm_common/Makefile.features diff --git a/cpu/lm4f120/Makefile.include b/cpu/lm4f120/Makefile.include index c7b25bb9273f..717f1ea64fa6 100644 --- a/cpu/lm4f120/Makefile.include +++ b/cpu/lm4f120/Makefile.include @@ -1,5 +1,3 @@ -CPU_ARCH = cortex-m4f - include $(RIOTMAKE)/arch/cortexm.inc.mk include $(RIOTCPU)/stellaris_common/Makefile.include diff --git a/cpu/lpc1768/Makefile.features b/cpu/lpc1768/Makefile.features index 1c25c072c7dc..3ca489e47792 100644 --- a/cpu/lpc1768/Makefile.features +++ b/cpu/lpc1768/Makefile.features @@ -1,5 +1,7 @@ +CPU_ARCH = cortex-m3 # This CPU only implements one CPU_MODEL with the same name CPU_MODEL = lpc1768 + FEATURES_PROVIDED += periph_cpuid FEATURES_PROVIDED += periph_pm diff --git a/cpu/lpc1768/Makefile.include b/cpu/lpc1768/Makefile.include index 1fe925bc5449..ea1a0f256b72 100644 --- a/cpu/lpc1768/Makefile.include +++ b/cpu/lpc1768/Makefile.include @@ -1,3 +1 @@ -CPU_ARCH = cortex-m3 - include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/nrf51/Makefile.features b/cpu/nrf51/Makefile.features index 7d12728b90a6..32e53e90ce83 100644 --- a/cpu/nrf51/Makefile.features +++ b/cpu/nrf51/Makefile.features @@ -1 +1,4 @@ +CPU_ARCH = cortex-m0 +CPU_FAM = nrf51 + -include $(RIOTCPU)/nrf5x_common/Makefile.features diff --git a/cpu/nrf51/Makefile.include b/cpu/nrf51/Makefile.include index 065e1b5f3eaa..500a78244b9a 100644 --- a/cpu/nrf51/Makefile.include +++ b/cpu/nrf51/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m0 -CPU_FAM = nrf51 - include $(RIOTCPU)/nrf5x_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/nrf52/Makefile.features b/cpu/nrf52/Makefile.features index 19fd27cc2632..a1fd08a7ddb5 100644 --- a/cpu/nrf52/Makefile.features +++ b/cpu/nrf52/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m4f +CPU_FAM = nrf52 + # The ADC does not depend on any board configuration, so always available FEATURES_PROVIDED += periph_adc diff --git a/cpu/nrf52/Makefile.include b/cpu/nrf52/Makefile.include index c6a9ed6913b9..f22e1610c439 100644 --- a/cpu/nrf52/Makefile.include +++ b/cpu/nrf52/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m4f -CPU_FAM = nrf52 - # Slot size is determined by "((total_flash_size - RIOTBOOT_LEN) / 2)". # If RIOTBOOT_LEN uses an uneven number of flashpages, the remainder of the # flash cannot be divided by two slots while staying FLASHPAGE_SIZE aligned. diff --git a/cpu/sam3/Makefile.features b/cpu/sam3/Makefile.features index 894817aedbb1..7b694204212b 100644 --- a/cpu/sam3/Makefile.features +++ b/cpu/sam3/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m3 +CPU_FAM = sam3 + FEATURES_PROVIDED += periph_cpuid FEATURES_PROVIDED += periph_hwrng diff --git a/cpu/sam3/Makefile.include b/cpu/sam3/Makefile.include index 6310a1e91361..24f75984d79e 100644 --- a/cpu/sam3/Makefile.include +++ b/cpu/sam3/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m3 -CPU_FAM = sam3 - include $(RIOTCPU)/sam_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/samd21/Makefile.features b/cpu/samd21/Makefile.features index 4b58fe348b42..e57847cd7e0e 100644 --- a/cpu/samd21/Makefile.features +++ b/cpu/samd21/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m0plus +CPU_FAM = samd21 + FEATURES_PROVIDED += puf_sram -include $(RIOTCPU)/sam0_common/Makefile.features diff --git a/cpu/samd21/Makefile.include b/cpu/samd21/Makefile.include index c7ab2ab9787e..f36d960ae812 100644 --- a/cpu/samd21/Makefile.include +++ b/cpu/samd21/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m0plus -CPU_FAM = samd21 - ifneq (,$(filter samd21%a,$(CPU_MODEL))) CFLAGS += -DCPU_SAMD21A endif diff --git a/cpu/samd5x/Makefile.features b/cpu/samd5x/Makefile.features index 7bd02ec90cc6..43c9adf8087f 100644 --- a/cpu/samd5x/Makefile.features +++ b/cpu/samd5x/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m4f +CPU_FAM = samd5x + FEATURES_PROVIDED += periph_hwrng FEATURES_PROVIDED += backup_ram diff --git a/cpu/samd5x/Makefile.include b/cpu/samd5x/Makefile.include index e7778c35e442..ad3e8ae2740a 100644 --- a/cpu/samd5x/Makefile.include +++ b/cpu/samd5x/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m4f -CPU_FAM = samd5x - ifneq (,$(filter samd51%,$(CPU_MODEL))) CFLAGS += -DCPU_SAMD51 endif diff --git a/cpu/saml1x/Makefile.features b/cpu/saml1x/Makefile.features index 42a90337c2d9..069dcd034f51 100644 --- a/cpu/saml1x/Makefile.features +++ b/cpu/saml1x/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m23 +CPU_FAM = saml1x + FEATURES_PROVIDED += periph_hwrng include $(RIOTCPU)/sam0_common/Makefile.features diff --git a/cpu/saml1x/Makefile.include b/cpu/saml1x/Makefile.include index 4067e6c0da85..f15fbd757659 100644 --- a/cpu/saml1x/Makefile.include +++ b/cpu/saml1x/Makefile.include @@ -1,5 +1,3 @@ -CPU_ARCH = cortex-m23 - ifneq (,$(filter saml10%,$(CPU_MODEL))) CFLAGS += -DCPU_SAML10 endif diff --git a/cpu/saml21/Makefile.features b/cpu/saml21/Makefile.features index fb7676dda1ba..40e448fabcff 100644 --- a/cpu/saml21/Makefile.features +++ b/cpu/saml21/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m0plus +CPU_FAM = saml21 + # The SAMR30 line of MCUs does not contain a TRNG BOARDS_WITHOUT_HWRNG += samr30-xpro diff --git a/cpu/saml21/Makefile.include b/cpu/saml21/Makefile.include index d93cf4da43cb..f2fd7a044810 100644 --- a/cpu/saml21/Makefile.include +++ b/cpu/saml21/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m0plus -CPU_FAM = saml21 - ifneq (,$(filter saml21%a,$(CPU_MODEL))) CFLAGS += -DCPU_SAML21A endif diff --git a/cpu/stm32f0/Makefile.features b/cpu/stm32f0/Makefile.features index d286ea06f23a..02176d2887a6 100644 --- a/cpu/stm32f0/Makefile.features +++ b/cpu/stm32f0/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m0 +CPU_FAM = stm32f0 + ifeq (,$(filter nucleo-f031k6,$(BOARD))) FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage_raw diff --git a/cpu/stm32f0/Makefile.include b/cpu/stm32f0/Makefile.include index 5860ac1e33aa..ded533c199b7 100644 --- a/cpu/stm32f0/Makefile.include +++ b/cpu/stm32f0/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m0 -CPU_FAM = stm32f0 - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f1/Makefile.features b/cpu/stm32f1/Makefile.features index 20b5c5564d6c..d44ca1aa0907 100644 --- a/cpu/stm32f1/Makefile.features +++ b/cpu/stm32f1/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m3 +CPU_FAM = stm32f1 + FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage_raw FEATURES_PROVIDED += periph_rtc diff --git a/cpu/stm32f1/Makefile.include b/cpu/stm32f1/Makefile.include index 572e7a6b5807..ded533c199b7 100644 --- a/cpu/stm32f1/Makefile.include +++ b/cpu/stm32f1/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m3 -CPU_FAM = stm32f1 - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f2/Makefile.features b/cpu/stm32f2/Makefile.features index c51e0186eb8d..3f3eab063654 100644 --- a/cpu/stm32f2/Makefile.features +++ b/cpu/stm32f2/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m3 +CPU_FAM = stm32f2 + FEATURES_PROVIDED += periph_hwrng -include $(RIOTCPU)/stm32_common/Makefile.features diff --git a/cpu/stm32f2/Makefile.include b/cpu/stm32f2/Makefile.include index b01f22ed623b..fff391c06df4 100644 --- a/cpu/stm32f2/Makefile.include +++ b/cpu/stm32f2/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m3 -CPU_FAM = stm32f2 - # STM32F2 uses sectors instead of pages, where the minimum sector length is 16KB # (the first sector), therefore RIOTBOOT_LEN must be 16KB to cover a whole sector. RIOTBOOT_LEN ?= 0x4000 diff --git a/cpu/stm32f3/Makefile.features b/cpu/stm32f3/Makefile.features index 5e5e8b9118b4..a83d6a1e087b 100644 --- a/cpu/stm32f3/Makefile.features +++ b/cpu/stm32f3/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m4f +CPU_FAM = stm32f3 + FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage_raw diff --git a/cpu/stm32f3/Makefile.include b/cpu/stm32f3/Makefile.include index e2648b9a5d09..ded533c199b7 100644 --- a/cpu/stm32f3/Makefile.include +++ b/cpu/stm32f3/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m4f -CPU_FAM = stm32f3 - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f4/Makefile.features b/cpu/stm32f4/Makefile.features index f6818fb224c7..2cdb93058f47 100644 --- a/cpu/stm32f4/Makefile.features +++ b/cpu/stm32f4/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m4f +CPU_FAM = stm32f4 + FEATURES_PROVIDED += periph_hwrng # the granularity of provided feature definition for STMs is currently by CPU diff --git a/cpu/stm32f4/Makefile.include b/cpu/stm32f4/Makefile.include index 5258a494b87e..3097e3fd4e0d 100644 --- a/cpu/stm32f4/Makefile.include +++ b/cpu/stm32f4/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m4f -CPU_FAM = stm32f4 - # STM32F4 uses sectors instead of pages, where the minimum sector length is 16KB # (the first sector), therefore RIOTBOOT_LEN must be 16KB to cover a whole sector. RIOTBOOT_LEN ?= 0x4000 diff --git a/cpu/stm32f7/Makefile.features b/cpu/stm32f7/Makefile.features index 2d4e44ccb55c..e1903cd92006 100644 --- a/cpu/stm32f7/Makefile.features +++ b/cpu/stm32f7/Makefile.features @@ -1,2 +1,5 @@ +CPU_ARCH = cortex-m7 +CPU_FAM = stm32f7 + FEATURES_PROVIDED += periph_hwrng -include $(RIOTCPU)/stm32_common/Makefile.features diff --git a/cpu/stm32f7/Makefile.include b/cpu/stm32f7/Makefile.include index 4d0d5243a478..19b7c8793680 100644 --- a/cpu/stm32f7/Makefile.include +++ b/cpu/stm32f7/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m7 -CPU_FAM = stm32f7 - # STM32F7 uses sectors instead of pages, where the minimum sector length is 16KB or # 32kB (the first sector), depending on the CPU_MODEL. Therefore RIOTBOOT_LEN must # be 16KB or 32kB to cover a whole sector. diff --git a/cpu/stm32l0/Makefile.features b/cpu/stm32l0/Makefile.features index d76642f390a2..dac7c11b39ea 100644 --- a/cpu/stm32l0/Makefile.features +++ b/cpu/stm32l0/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m0plus +CPU_FAM = stm32l0 + FEATURES_PROVIDED += periph_eeprom FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage_raw diff --git a/cpu/stm32l0/Makefile.include b/cpu/stm32l0/Makefile.include index 8e09dbaed2ae..ded533c199b7 100644 --- a/cpu/stm32l0/Makefile.include +++ b/cpu/stm32l0/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m0plus -CPU_FAM = stm32l0 - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32l1/Makefile.features b/cpu/stm32l1/Makefile.features index e13289086a10..4e83fb8e1a10 100644 --- a/cpu/stm32l1/Makefile.features +++ b/cpu/stm32l1/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m3 +CPU_FAM = stm32l1 + FEATURES_PROVIDED += periph_eeprom FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage_raw diff --git a/cpu/stm32l1/Makefile.include b/cpu/stm32l1/Makefile.include index 46bb58c51628..ded533c199b7 100644 --- a/cpu/stm32l1/Makefile.include +++ b/cpu/stm32l1/Makefile.include @@ -1,5 +1,2 @@ -CPU_ARCH = cortex-m3 -CPU_FAM = stm32l1 - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32l4/Makefile.features b/cpu/stm32l4/Makefile.features index baed9e607881..b077625a3eb9 100644 --- a/cpu/stm32l4/Makefile.features +++ b/cpu/stm32l4/Makefile.features @@ -1,3 +1,6 @@ +CPU_ARCH = cortex-m4f +CPU_FAM = stm32l4 + FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage_raw FEATURES_PROVIDED += periph_hwrng diff --git a/cpu/stm32l4/Makefile.include b/cpu/stm32l4/Makefile.include index 91eae9acdd68..8a05ff0361b5 100644 --- a/cpu/stm32l4/Makefile.include +++ b/cpu/stm32l4/Makefile.include @@ -1,6 +1,3 @@ -CPU_ARCH = cortex-m4f -CPU_FAM = stm32l4 - # "The Vector table must be naturally aligned to a power of two whose alignment # value is greater than or equal to number of Exceptions supported x 4" # CPU_IRQ_NUMOFF for stm32l4 boards is < 91+16 so (107*4 bytes = 428 bytes ~= 0x200) From 7f1466a43229bd5fa988b04eec1cb42db4970308 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 30 Jan 2020 09:50:19 +0100 Subject: [PATCH 2/6] cpu/cortexm: M4F and M7 provide fpu feature --- cpu/cortexm_common/Makefile.features | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/cpu/cortexm_common/Makefile.features b/cpu/cortexm_common/Makefile.features index 74b9888ac11e..bcbbb3651a7f 100644 --- a/cpu/cortexm_common/Makefile.features +++ b/cpu/cortexm_common/Makefile.features @@ -5,3 +5,7 @@ FEATURES_PROVIDED += periph_pm FEATURES_PROVIDED += cpp FEATURES_PROVIDED += cpu_check_address FEATURES_PROVIDED += ssp + +ifneq (,$(filter cortex-m4f cortex-m7,$(CPU_ARCH))) + FEATURES_PROVIDED += cortexm_fpu +endif From 95a5d4b98832a1ae25c346f4a8af519a8b3a9b1b Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 30 Jan 2020 10:08:16 +0100 Subject: [PATCH 3/6] Makefile.dep: load cortexm_fpu module when feature is used --- Makefile.dep | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Makefile.dep b/Makefile.dep index 6d5b56d7429d..c58858380315 100644 --- a/Makefile.dep +++ b/Makefile.dep @@ -26,6 +26,10 @@ ifneq (,$(filter ssp,$(USEMODULE))) FEATURES_REQUIRED += ssp endif +ifneq (,$(filter cortexm_fpu,$(FEATURES_USED))) + USEMODULE += cortexm_fpu +endif + ifneq (,$(filter csma_sender,$(USEMODULE))) USEMODULE += random USEMODULE += xtimer From 41d967b00cefbab3df1b1c08c48031658e0f091c Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 12 Dec 2019 22:11:55 +0100 Subject: [PATCH 4/6] makefiles/cortexm: rework handling of CortexM FPU via modules --- makefiles/arch/cortexm.inc.mk | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/makefiles/arch/cortexm.inc.mk b/makefiles/arch/cortexm.inc.mk index 2e4284802ea3..65c697e4633a 100644 --- a/makefiles/arch/cortexm.inc.mk +++ b/makefiles/arch/cortexm.inc.mk @@ -73,10 +73,7 @@ CFLAGS += -DCPU_ARCH_$(call uppercase_and_underscore,$(CPU_ARCH)) # set the compiler specific CPU and FPU options ifneq (,$(filter $(CPU_ARCH),cortex-m4f cortex-m7)) - ifneq (,$(filter cortexm_fpu,$(DISABLE_MODULE))) - CFLAGS_FPU ?= -mfloat-abi=soft - else - USEMODULE += cortexm_fpu + ifneq (,$(filter cortexm_fpu,$(USEMODULE))) # clang assumes there is an FPU ifneq (llvm,$(TOOLCHAIN)) ifeq ($(CPU_ARCH),cortex-m7) @@ -85,6 +82,8 @@ ifneq (,$(filter $(CPU_ARCH),cortex-m4f cortex-m7)) CFLAGS_FPU ?= -mfloat-abi=hard -mfpu=fpv4-sp-d16 endif endif + else + CFLAGS_FPU ?= -mfloat-abi=soft endif else CFLAGS_FPU ?= -mfloat-abi=soft From 986d393195261adcab0da8abbb2d25816e1e19a1 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 12 Dec 2019 22:12:49 +0100 Subject: [PATCH 5/6] tests/thread_float: use fpu via an optional feature This feature is only available on Cortex M4F and M7 architectures --- tests/thread_float/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/thread_float/Makefile b/tests/thread_float/Makefile index c2ea8f27a3f3..59810e199fa2 100644 --- a/tests/thread_float/Makefile +++ b/tests/thread_float/Makefile @@ -3,6 +3,7 @@ include ../Makefile.tests_common USEMODULE += printf_float USEMODULE += xtimer -#DISABLE_MODULE += cortexm_fpu +# Use CortexM FPU when available (only on M4F and M7 CPUs) +FEATURES_OPTIONAL += cortexm_fpu include $(RIOTBASE)/Makefile.include From 03aa5d012159a3d1a6097963e95fff04e41b1a49 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 13 Feb 2020 17:11:57 +0100 Subject: [PATCH 6/6] fixup! makefiles/cortexm: rework handling of CortexM FPU via modules --- makefiles/arch/cortexm.inc.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/makefiles/arch/cortexm.inc.mk b/makefiles/arch/cortexm.inc.mk index 65c697e4633a..1eccbfd16755 100644 --- a/makefiles/arch/cortexm.inc.mk +++ b/makefiles/arch/cortexm.inc.mk @@ -73,7 +73,7 @@ CFLAGS += -DCPU_ARCH_$(call uppercase_and_underscore,$(CPU_ARCH)) # set the compiler specific CPU and FPU options ifneq (,$(filter $(CPU_ARCH),cortex-m4f cortex-m7)) - ifneq (,$(filter cortexm_fpu,$(USEMODULE))) + ifneq (,$(filter cortexm_fpu,$(FEATURES_USED))) # clang assumes there is an FPU ifneq (llvm,$(TOOLCHAIN)) ifeq ($(CPU_ARCH),cortex-m7)