Skip to content

Commit dcf52cf

Browse files
BernardXiongBernardXiong
authored
Merge pull request #2336 from Guozhanxin/rtt_sensor
添加 阿里 DeveloperKit 开发板
2 parents 89ff902 + 6e88280 commit dcf52cf

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

49 files changed

+13791
-54
lines changed

‎bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,12 @@ extern "C" {
3636
#define SPI1_TX_DMA_INSTANCE DMA1_Channel3
3737
#define SPI1_TX_DMA_REQUEST DMA_REQUEST_1
3838
#define SPI1_TX_DMA_IRQ DMA1_Channel3_IRQn
39+
#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
40+
#define UART3_DMA_RX_IRQHandler DMA1_Channel3_IRQHandler
41+
#define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
42+
#define UART3_RX_DMA_INSTANCE DMA1_Channel3
43+
#define UART3_RX_DMA_REQUEST DMA_REQUEST_2
44+
#define UART3_RX_DMA_IRQ DMA1_Channel3_IRQn
3945
#endif
4046

4147
/* DMA1 channel4 */
@@ -45,6 +51,12 @@ extern "C" {
4551
#define UART1_TX_DMA_INSTANCE DMA1_Channel4
4652
#define UART1_TX_DMA_REQUEST DMA_REQUEST_2
4753
#define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn
54+
#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
55+
#define SPI2_DMA_RX_IRQHandler DMA1_Channel4_IRQHandler
56+
#define SPI2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
57+
#define SPI2_RX_DMA_INSTANCE DMA1_Channel4
58+
#define SPI2_RX_DMA_REQUEST DMA_REQUEST_1
59+
#define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn
4860
#endif
4961

5062
/* DMA1 channel5 */
@@ -60,9 +72,22 @@ extern "C" {
6072
#define QSPI_DMA_INSTANCE DMA1_Channel5
6173
#define QSPI_DMA_REQUEST DMA_REQUEST_5
6274
#define QSPI_DMA_IRQ DMA1_Channel5_IRQn
75+
#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
76+
#define SPI2_DMA_TX_IRQHandler DMA1_Channel5_IRQHandler
77+
#define SPI2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
78+
#define SPI2_TX_DMA_INSTANCE DMA1_Channel5
79+
#define SPI2_TX_DMA_REQUEST DMA_REQUEST_1
80+
#define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn
6381
#endif
6482

6583
/* DMA1 channel6 */
84+
#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
85+
#define UART2_DMA_RX_IRQHandler DMA1_Channel6_IRQHandler
86+
#define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
87+
#define UART2_RX_DMA_INSTANCE DMA1_Channel6
88+
#define UART2_RX_DMA_REQUEST DMA_REQUEST_2
89+
#define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn
90+
#endif
6691

6792
/* DMA1 channel7 */
6893

@@ -126,6 +151,12 @@ extern "C" {
126151
#define QSPI_DMA_INSTANCE DMA2_Channel7
127152
#define QSPI_DMA_REQUEST DMA_REQUEST_3
128153
#define QSPI_DMA_IRQ DMA2_Channel7_IRQn
154+
#elif defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE)
155+
#define LPUART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler
156+
#define LPUART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
157+
#define LPUART1_RX_DMA_INSTANCE DMA2_Channel7
158+
#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_4
159+
#define LPUART1_RX_DMA_IRQ DMA2_Channel7_IRQn
129160
#endif
130161

131162
#ifdef __cplusplus

‎bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h‎

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
1+
/*
2+
* Copyright (c) 2006-2018, RT-Thread Development Team
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2018-12-13 BalanceTWK first version
9+
*/
10+
11+
#ifndef __SDIO_CONFIG_H__
12+
#define __SDIO_CONFIG_H__
13+
14+
#include <rtthread.h>
15+
#include "stm32l4xx_hal.h"
16+
17+
#ifdef __cplusplus
18+
extern "C" {
19+
#endif
20+
21+
#ifdef BSP_USING_SDIO
22+
#define SDIO_BUS_CONFIG \
23+
{ \
24+
.Instance = SDMMC1, \
25+
.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
26+
.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
27+
.dma_rx.Instance = DMA2_Channel4, \
28+
.dma_rx.request = DMA_REQUEST_7, \
29+
.dma_rx.dma_irq = DMA2_Channel4_IRQn, \
30+
.dma_tx.Instance = DMA2_Channel5, \
31+
.dma_tx.request = DMA_REQUEST_7, \
32+
.dma_tx.dma_irq = DMA2_Channel5_IRQn, \
33+
}
34+
35+
#endif
36+
37+
#ifdef __cplusplus
38+
}
39+
#endif
40+
41+
#endif /*__SDIO_CONFIG_H__ */
42+
43+
44+

‎bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h‎

Lines changed: 26 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -52,21 +52,38 @@ extern "C" {
5252
#endif /* BSP_SPI1_RX_USING_DMA */
5353

5454
#ifdef BSP_USING_SPI2
55+
#ifndef SPI2_BUS_CONFIG
5556
#define SPI2_BUS_CONFIG \
5657
{ \
5758
.Instance = SPI2, \
5859
.bus_name = "spi2", \
59-
.dma_rx.dma_rcc = RCC_AHB1ENR_DMA1EN, \
60-
.dma_tx.dma_rcc = RCC_AHB1ENR_DMA1EN, \
61-
.dma_rx.Instance = DMA1_Channel4, \
62-
.dma_rx.request = DMA_REQUEST_1, \
63-
.dma_rx.dma_irq = DMA1_Channel4_IRQn, \
64-
.dma_tx.Instance = DMA1_Channel5, \
65-
.dma_tx.request = DMA_REQUEST_1, \
66-
.dma_tx.dma_irq = DMA1_Channel5_IRQn, \
6760
}
61+
#endif /* SPI2_BUS_CONFIG */
62+
#endif /* BSP_USING_SPI2 */
6863

69-
#endif
64+
#ifdef BSP_SPI2_TX_USING_DMA
65+
#ifndef SPI2_TX_DMA_CONFIG
66+
#define SPI2_TX_DMA_CONFIG \
67+
{ \
68+
.dma_rcc = SPI2_TX_DMA_RCC, \
69+
.Instance = SPI2_TX_DMA_INSTANCE, \
70+
.request = SPI2_TX_DMA_REQUEST, \
71+
.dma_irq = SPI2_TX_DMA_IRQ, \
72+
}
73+
#endif /* SPI2_TX_DMA_CONFIG */
74+
#endif /* BSP_SPI2_TX_USING_DMA */
75+
76+
#ifdef BSP_SPI2_RX_USING_DMA
77+
#ifndef SPI2_RX_DMA_CONFIG
78+
#define SPI2_RX_DMA_CONFIG \
79+
{ \
80+
.dma_rcc = SPI2_RX_DMA_RCC, \
81+
.Instance = SPI2_RX_DMA_INSTANCE, \
82+
.request = SPI2_RX_DMA_REQUEST, \
83+
.dma_irq = SPI2_RX_DMA_IRQ, \
84+
}
85+
#endif /* SPI2_RX_DMA_CONFIG */
86+
#endif /* BSP_SPI2_RX_USING_DMA */
7087

7188
#ifdef BSP_USING_SPI3
7289
#define SPI3_BUS_CONFIG \

‎bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h‎

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,28 @@
1717
extern "C" {
1818
#endif
1919

20+
#if defined(BSP_USING_LPUART1)
21+
#ifndef LPUART1_CONFIG
22+
#define LPUART1_CONFIG \
23+
{ \
24+
.name = "lpuart1", \
25+
.Instance = LPUART1, \
26+
.irq_type = LPUART1_IRQn, \
27+
}
28+
#endif /* LPUART1_CONFIG */
29+
#if defined(BSP_LPUART1_RX_USING_DMA)
30+
#ifndef LPUART1_DMA_CONFIG
31+
#define LPUART1_DMA_CONFIG \
32+
{ \
33+
.Instance = LPUART1_RX_DMA_INSTANCE, \
34+
.request = LPUART1_RX_DMA_REQUEST, \
35+
.dma_rcc = LPUART1_RX_DMA_RCC, \
36+
.dma_irq = LPUART1_RX_DMA_IRQ, \
37+
}
38+
#endif /* LPUART1_DMA_CONFIG */
39+
#endif /* BSP_LPUART1_RX_USING_DMA */
40+
#endif /* BSP_USING_LPUART1 */
41+
2042
#if defined(BSP_USING_UART1)
2143
#ifndef UART1_CONFIG
2244
#define UART1_CONFIG \
@@ -63,6 +85,29 @@ extern "C" {
6385
#endif /* UART2_DMA_CONFIG */
6486
#endif /* BSP_UART2_RX_USING_DMA */
6587

88+
#if defined(BSP_USING_UART3)
89+
#ifndef UART3_CONFIG
90+
#define UART3_CONFIG \
91+
{ \
92+
.name = "uart3", \
93+
.Instance = USART3, \
94+
.irq_type = USART3_IRQn, \
95+
}
96+
#endif /* UART3_CONFIG */
97+
#endif /* BSP_USING_UART3 */
98+
99+
#if defined(BSP_UART3_RX_USING_DMA)
100+
#ifndef UART3_DMA_CONFIG
101+
#define UART3_DMA_CONFIG \
102+
{ \
103+
.Instance = UART3_RX_DMA_INSTANCE, \
104+
.request = UART3_RX_DMA_REQUEST, \
105+
.dma_rcc = UART3_RX_DMA_RCC, \
106+
.dma_irq = UART3_RX_DMA_IRQ, \
107+
}
108+
#endif /* UART3_DMA_CONFIG */
109+
#endif /* BSP_UART3_RX_USING_DMA */
110+
66111
#ifdef __cplusplus
67112
}
68113
#endif

‎bsp/stm32/libraries/HAL_Drivers/drv_config.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@ extern "C" {
6060
#include "l4/qspi_config.h"
6161
#include "l4/adc_config.h"
6262
#include "l4/tim_config.h"
63+
#include "l4/sdio_config.h"
6364
#include "l4/pwm_config.h"
6465
#elif defined(SOC_SERIES_STM32G0)
6566
#include "g0/dma_config.h"

‎bsp/stm32/libraries/HAL_Drivers/drv_sdio.c‎

Lines changed: 73 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -190,13 +190,13 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
190190
cmd->cmd_code,
191191
cmd->arg,
192192
data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
193-
data ? data->blks * data->blksize : 0,
194-
data ? data->blksize : 0
195-
);
193+
data ? data->blks * data->blksize : 0,
194+
data ? data->blksize : 0
195+
);
196196
}
197197
}
198198
else
199-
{
199+
{
200200
cmd->err = RT_EOK;
201201
LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
202202
}
@@ -278,9 +278,9 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
278278
resp_type(cmd) == RESP_R6 ? "R6" : "",
279279
resp_type(cmd) == RESP_R7 ? "R7" : "",
280280
data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
281-
data ? data->blks * data->blksize : 0,
282-
data ? data->blksize : 0
283-
);
281+
data ? data->blks * data->blksize : 0,
282+
data ? data->blksize : 0
283+
);
284284

285285
/* config cmd reg */
286286
reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE;
@@ -293,7 +293,7 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
293293

294294
/* config data reg */
295295
if (data != RT_NULL)
296-
{
296+
{
297297
rt_uint32_t dir = 0;
298298
rt_uint32_t size = data->blks * data->blksize;
299299
int order;
@@ -700,6 +700,25 @@ void SD_LowLevel_DMA_TxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize)
700700
HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
701701
HAL_DMA_Init(&sdio_obj.dma.handle_tx);
702702

703+
HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
704+
705+
#elif defined(SOC_SERIES_STM32L4)
706+
static uint32_t size = 0;
707+
size += BufferSize * 4;
708+
sdio_obj.cfg = &sdio_config;
709+
sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
710+
sdio_obj.dma.handle_tx.Init.Request = sdio_config.dma_tx.request;
711+
sdio_obj.dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
712+
sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
713+
sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
714+
sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
715+
sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
716+
sdio_obj.dma.handle_tx.Init.Mode = DMA_NORMAL;
717+
sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
718+
719+
HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
720+
HAL_DMA_Init(&sdio_obj.dma.handle_tx);
721+
703722
HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
704723
#else
705724
static uint32_t size = 0;
@@ -736,38 +755,54 @@ void SD_LowLevel_DMA_RxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize)
736755
{
737756
#if defined(SOC_SERIES_STM32F1)
738757
sdio_obj.cfg = &sdio_config;
739-
sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
740-
sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY;
741-
sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
742-
sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
743-
sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
744-
sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
745-
sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
746-
747-
HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
748-
HAL_DMA_Init(&sdio_obj.dma.handle_tx);
749-
750-
HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
758+
sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
759+
sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
760+
sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
761+
sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
762+
sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
763+
sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
764+
sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
765+
766+
HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
767+
HAL_DMA_Init(&sdio_obj.dma.handle_rx);
768+
769+
HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
770+
#elif defined(SOC_SERIES_STM32L4)
771+
sdio_obj.cfg = &sdio_config;
772+
sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
773+
sdio_obj.dma.handle_rx.Init.Request = sdio_config.dma_tx.request;
774+
sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
775+
sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
776+
sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
777+
sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
778+
sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
779+
sdio_obj.dma.handle_rx.Init.Mode = DMA_NORMAL;
780+
sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_LOW;
781+
782+
HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
783+
HAL_DMA_Init(&sdio_obj.dma.handle_rx);
784+
785+
HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
751786
#else
752787
sdio_obj.cfg = &sdio_config;
753-
sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
754-
sdio_obj.dma.handle_tx.Init.Channel = sdio_config.dma_tx.channel;
755-
sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY;
756-
sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
757-
sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
758-
sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
759-
sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
760-
sdio_obj.dma.handle_tx.Init.Mode = DMA_PFCTRL;
761-
sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
762-
sdio_obj.dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
763-
sdio_obj.dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
764-
sdio_obj.dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4;
765-
sdio_obj.dma.handle_tx.Init.PeriphBurst = DMA_PBURST_INC4;
766-
767-
HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
768-
HAL_DMA_Init(&sdio_obj.dma.handle_tx);
769-
770-
HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
788+
sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
789+
sdio_obj.dma.handle_rx.Init.Channel = sdio_config.dma_tx.channel;
790+
sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
791+
sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
792+
sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
793+
sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
794+
sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
795+
sdio_obj.dma.handle_rx.Init.Mode = DMA_PFCTRL;
796+
sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
797+
sdio_obj.dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
798+
sdio_obj.dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
799+
sdio_obj.dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4;
800+
sdio_obj.dma.handle_rx.Init.PeriphBurst = DMA_PBURST_INC4;
801+
802+
HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
803+
HAL_DMA_Init(&sdio_obj.dma.handle_rx);
804+
805+
HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
771806
#endif
772807

773808
}

‎bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818
#define LOG_TAG "drv.i2c"
1919
#include <drv_log.h>
2020

21-
#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3)
21+
#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4)
2222
#error "Please define at least one BSP_USING_I2Cx"
2323
/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
2424
#endif
@@ -34,6 +34,9 @@ static const struct stm32_soft_i2c_config soft_i2c_config[] =
3434
#ifdef BSP_USING_I2C3
3535
I2C3_BUS_CONFIG,
3636
#endif
37+
#ifdef BSP_USING_I2C4
38+
I2C4_BUS_CONFIG,
39+
#endif
3740
};
3841

3942
static struct stm32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];

0 commit comments

Comments
 (0)