Problem
The ISA spec lists opcodes and their operands but does not formally define the encoding formats (A through G). Each runtime re-implements encoding independently, leading to divergence.
Actual Formats (reverse-engineered from VM)
| Format |
Size |
Layout |
Used By |
| A |
1B |
[opcode] |
NOP, DUP, SWAP, ROT, HALT, YIELD |
| B |
2B |
[opcode][reg:u8] |
INC, DEC, PUSH, POP |
| C |
3B |
[opcode][rd:u8][rs1:u8] |
MOV, LOAD, STORE, CMP |
| D |
4B |
[opcode][reg:u8][lo:u8][hi:u8] |
JMP, MOVI, CALL |
| E |
4B |
[opcode][rd:u8][rs1:u8][rs2:u8] |
IADD, ISUB, IMUL, FADD |
| G |
var |
[opcode][len:u16][payload] |
TELL, REGION_CREATE |
Proposed Fix
Add an ISA-ENCODING.md to flux-spec with formal format definitions, bit layouts, and per-opcode format assignments.
Problem
The ISA spec lists opcodes and their operands but does not formally define the encoding formats (A through G). Each runtime re-implements encoding independently, leading to divergence.
Actual Formats (reverse-engineered from VM)
Proposed Fix
Add an ISA-ENCODING.md to flux-spec with formal format definitions, bit layouts, and per-opcode format assignments.