From 55601c38e1ae4626de8ffe57307ef266d5762db4 Mon Sep 17 00:00:00 2001 From: Nithyaa shri R B Date: Mon, 5 May 2025 11:44:47 +0530 Subject: [PATCH 1/5] am64/am24/am65: udma: Code cleanup - Remove DMA related function pointers and replace with absolute function calls. Fixes: SITSW-7155 Signed-off-by: Nithyaa shri R B --- .../drivers/udma/soc/am64x_am243x/udma_soc.c | 15 ---- source/drivers/udma/soc/am65x/udma_soc.c | 16 ---- source/drivers/udma/v0/udma_priv.h | 89 ------------------- source/drivers/udma/v0/udma_ring_common.c | 67 ++++---------- source/drivers/udma/v1/udma_priv.h | 89 ------------------- source/drivers/udma/v1/udma_ring_common.c | 67 ++++---------- test/drivers/udma/udma_test.h | 2 +- test/drivers/udma/udma_test_common.c | 15 ++-- 8 files changed, 42 insertions(+), 318 deletions(-) diff --git a/source/drivers/udma/soc/am64x_am243x/udma_soc.c b/source/drivers/udma/soc/am64x_am243x/udma_soc.c index 0875d2ebd72..c34d4e88e25 100755 --- a/source/drivers/udma/soc/am64x_am243x/udma_soc.c +++ b/source/drivers/udma/soc/am64x_am243x/udma_soc.c @@ -191,21 +191,6 @@ void Udma_initDrvHandle(Udma_DrvHandleInt drvHandle) pLcdmaRaRegs->pCredRegs = (CSL_lcdma_ringacc_credRegs *) CSL_DMASS0_PKTDMA_CRED_BASE; pLcdmaRaRegs->maxRings = CSL_DMSS_PKTDMA_NUM_RX_FLOWS + CSL_DMSS_PKTDMA_NUM_TX_FLOWS; } - drvHandle->ringDequeueRaw = &Udma_ringDequeueRawLcdma; - drvHandle->ringQueueRaw = &Udma_ringQueueRawLcdma; - drvHandle->ringFlushRaw = &Udma_ringFlushRawLcdma; - drvHandle->ringGetElementCnt = &Udma_ringGetElementCntLcdma; - drvHandle->ringGetMemPtr = &Udma_ringGetMemPtrLcdma; - drvHandle->ringGetMode = &Udma_ringGetModeLcdma; - drvHandle->ringGetForwardRingOcc = &Udma_ringGetForwardRingOccLcdma; - drvHandle->ringGetReverseRingOcc = &Udma_ringGetReverseRingOccLcdma; - drvHandle->ringGetWrIdx = &Udma_ringGetWrIdxLcdma; - drvHandle->ringGetRdIdx = &Udma_ringGetRdIdxLcdma; - drvHandle->ringPrime = &Udma_ringPrimeLcdma; - drvHandle->ringPrimeRead = &Udma_ringPrimeReadLcdma; - drvHandle->ringSetDoorBell = &Udma_ringSetDoorBellLcdma; - drvHandle->ringSetCfg = &Udma_ringSetCfgLcdma; - drvHandle->ringHandleClearRegs = &Udma_ringHandleClearRegsLcdma; /* IA config init */ pIaRegs = &drvHandle->iaRegs; diff --git a/source/drivers/udma/soc/am65x/udma_soc.c b/source/drivers/udma/soc/am65x/udma_soc.c index fd0fa91349a..1c39a7b8f71 100644 --- a/source/drivers/udma/soc/am65x/udma_soc.c +++ b/source/drivers/udma/soc/am65x/udma_soc.c @@ -141,22 +141,6 @@ void Udma_initDrvHandle(Udma_DrvHandleInt drvHandle) pRaRegs->maxMonitors = CSL_RINGACC_MAX_MONITORS; pRaRegs->bTraceSupported = (bool)true; - drvHandle->ringDequeueRaw = &Udma_ringDequeueRawNormal; - drvHandle->ringQueueRaw = &Udma_ringQueueRawNormal; - drvHandle->ringFlushRaw = &Udma_ringFlushRawNormal; - drvHandle->ringGetElementCnt = &Udma_ringGetElementCntNormal; - drvHandle->ringGetMemPtr = &Udma_ringGetMemPtrNormal; - drvHandle->ringGetMode = &Udma_ringGetModeNormal; - drvHandle->ringGetForwardRingOcc = &Udma_ringGetRingOccNormal; - drvHandle->ringGetReverseRingOcc = &Udma_ringGetRingOccNormal; - drvHandle->ringGetWrIdx = &Udma_ringGetWrIdxNormal; - drvHandle->ringGetRdIdx = &Udma_ringGetRdIdxNormal; - drvHandle->ringPrime = &Udma_ringPrimeNormal; - drvHandle->ringPrimeRead = &Udma_ringPrimeReadNormal; - drvHandle->ringSetDoorBell = &Udma_ringSetDoorBellNormal; - drvHandle->ringSetCfg = &Udma_ringSetCfgNormal; - drvHandle->ringHandleClearRegs = &Udma_ringHandleClearRegsNormal; - /* * All interrupt related config should be based on core and not * based on NAVSS instance diff --git a/source/drivers/udma/v0/udma_priv.h b/source/drivers/udma/v0/udma_priv.h index dbe183fb362..102af24e6a5 100644 --- a/source/drivers/udma/v0/udma_priv.h +++ b/source/drivers/udma/v0/udma_priv.h @@ -143,59 +143,6 @@ typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; /** \brief UDMA flow handle */ typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; -/** - * \anchor Udma_RingLocalApiPrototypes - * \name UDMA Ring Local API's function prototypes - * - * Function prototypes for various local UDMA Ring API's. - * For Normal RA / LCDMA RA, function pointers will be used - * to call the appropriate function. - * - * @{ - */ -/** \brief UDMA Ring handle clear register function prototype */ -typedef void (*Udma_ringHandleClearRegsFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring set doorbell function prototype */ -typedef void (*Udma_ringSetDoorBellFxn)(Udma_RingHandleInt ringHandle, - int32_t count); -/** \brief UDMA Ring prime function prototype */ -typedef void (*Udma_ringPrimeFxn)(Udma_RingHandleInt ringHandle, - uint64_t phyDescMem); -/** \brief UDMA Ring prime read function prototype */ -typedef void (*Udma_ringPrimeReadFxn)(Udma_RingHandleInt ringHandle, - uint64_t *phyDescMem); -/** \brief UDMA Ring get mem pointer function prototype */ -typedef void *(*Udma_ringGetMemPtrFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get ring mode function prototype */ -typedef uint32_t (*Udma_ringGetModeFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get element count function prototype */ -typedef uint32_t (*Udma_ringGetElementCntFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get forward ring occupancy function prototype */ -typedef uint32_t (*Udma_ringGetForwardRingOccFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get reverse ring occupancy function prototype */ -typedef uint32_t (*Udma_ringGetReverseRingOccFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get write index value function prototype */ -typedef uint32_t (*Udma_ringGetWrIdxFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get read index value function prototype */ -typedef uint32_t (*Udma_ringGetRdIdxFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring dequeue raw function prototype */ -typedef int32_t (*Udma_ringDequeueRawFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - uint64_t *phyDescMem); -/** \brief UDMA Ring queue raw function prototype */ -typedef int32_t (*Udma_ringQueueRawFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - uint64_t phyDescMem); -/** \brief UDMA Ring flush raw function prototype */ -typedef int32_t (*Udma_ringFlushRawFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - uint64_t *phyDescMem); -/** \brief UDMA Ring set Cfg function prototype */ -typedef void (*Udma_ringSetCfgFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - const Udma_RingPrms *ringPrms); -/* @} */ - /** * \anchor Udma_RmMaxSize * Resource management related macros. @@ -872,42 +819,6 @@ typedef struct Udma_DrvObjectInt_t /**< Mutex to protect RM allocation. */ SemaphoreP_Object rmLockObj; /**< Mutex object. */ - - /* - * UDMA Ring Local API's function pointers - * For Normal RA / LCDMA RA, these function pointers are used - * to call the appropriate function. - */ - Udma_ringDequeueRawFxn ringDequeueRaw; - /**< UDMA Ring dequeue raw function pointer */ - Udma_ringQueueRawFxn ringQueueRaw; - /**< UDMA Ring queue raw function pointer */ - Udma_ringFlushRawFxn ringFlushRaw; - /**< UDMA Ring flush raw function pointer */ - Udma_ringGetElementCntFxn ringGetElementCnt; - /**< UDMA Ring get element count function pointer */ - Udma_ringGetMemPtrFxn ringGetMemPtr; - /**< UDMA Ring get mem pointer function pointer */ - Udma_ringGetModeFxn ringGetMode; - /**< UDMA Ring get ring mode function pointer */ - Udma_ringGetForwardRingOccFxn ringGetForwardRingOcc; - /**< UDMA Ring get forward ring occupancy function pointer */ - Udma_ringGetReverseRingOccFxn ringGetReverseRingOcc; - /**< UDMA Ring get reverse ring occupancy function pointer */ - Udma_ringGetWrIdxFxn ringGetWrIdx; - /**< UDMA Ring get write index value function pointer */ - Udma_ringGetRdIdxFxn ringGetRdIdx; - /**< UDMA Ring get read index value function pointer */ - Udma_ringPrimeFxn ringPrime; - /**< UDMA Ring prime function pointer */ - Udma_ringPrimeReadFxn ringPrimeRead; - /**< UDMA Ring prime read function pointer */ - Udma_ringSetDoorBellFxn ringSetDoorBell; - /**< UDMA Ring set doorbell function pointer */ - Udma_ringSetCfgFxn ringSetCfg; - /**< UDMA Ring set Cfg function pointer */ - Udma_ringHandleClearRegsFxn ringHandleClearRegs; - /**< UDMA Ring handle clear register function pointer */ } Udma_DrvObjectInt; #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) diff --git a/source/drivers/udma/v0/udma_ring_common.c b/source/drivers/udma/v0/udma_ring_common.c index bcd8c9bf49e..72f1bae9121 100644 --- a/source/drivers/udma/v0/udma_ring_common.c +++ b/source/drivers/udma/v0/udma_ring_common.c @@ -62,7 +62,6 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, const Udma_RingPrms *ringPrms); -static inline void Udma_ringAssertFnPointers(Udma_DrvHandleInt drvHandle); /* ========================================================================== */ /* Global Variables */ @@ -147,13 +146,12 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, if(UDMA_SOK == retVal) { - Udma_ringAssertFnPointers(drvHandleInt); ringHandleInt->drvHandle = drvHandleInt; /* Set the mapped group in ringHandleInt, since only ringHandleInt is passed to rmFreeMappedRing() and * the mapped group parameter is required to reset the appropriate flag */ ringHandleInt->mappedRingGrp = ringPrms->mappedRingGrp; ringHandleInt->mappedChNum = ringPrms->mappedChNum; - drvHandleInt->ringSetCfg(drvHandleInt, ringHandleInt, ringPrms); + Udma_ringSetCfgLcdma(drvHandleInt, ringHandleInt, ringPrms); } if(UDMA_SOK == retVal) @@ -263,7 +261,7 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) #endif ringHandleInt->ringNum = UDMA_RING_INVALID; ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; - drvHandle->ringHandleClearRegs(ringHandleInt); + Udma_ringHandleClearRegsLcdma(ringHandleInt); ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; } @@ -303,7 +301,7 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, { ringHandleInt->ringNum = ringNum; ringHandleInt->drvHandle = drvHandleInt; - drvHandleInt->ringSetCfg(drvHandleInt, ringHandleInt, (Udma_RingPrms *) NULL_PTR); + Udma_ringSetCfgLcdma(drvHandleInt, ringHandleInt, (Udma_RingPrms *) NULL_PTR); ringHandleInt->ringInitDone = UDMA_INIT_DONE; } @@ -343,7 +341,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) /* Clear handle object */ DebugP_assert(ringHandleInt->ringNum != UDMA_RING_INVALID); ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; - drvHandle->ringHandleClearRegs(ringHandleInt); + Udma_ringHandleClearRegsLcdma(ringHandleInt); ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; } @@ -379,7 +377,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) { cookie = HwiP_disable(); - retVal = drvHandle->ringQueueRaw(drvHandle, ringHandleInt, phyDescMem); + retVal = Udma_ringQueueRawLcdma(drvHandle, ringHandleInt, phyDescMem); HwiP_restore(cookie); } @@ -415,7 +413,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { cookie = HwiP_disable(); - retVal = drvHandle->ringDequeueRaw(drvHandle, ringHandleInt, phyDescMem); + retVal = Udma_ringDequeueRawLcdma(drvHandle, ringHandleInt, phyDescMem); HwiP_restore(cookie); } @@ -448,7 +446,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) if(UDMA_SOK == retVal) { - retVal = drvHandle->ringFlushRaw(drvHandle, ringHandleInt, phyDescMem); + retVal = Udma_ringFlushRawLcdma(drvHandle, ringHandleInt, phyDescMem); } return (retVal); @@ -457,9 +455,8 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - drvHandle->ringPrime(ringHandleInt, phyDescMem); + Udma_ringPrimeLcdma(ringHandleInt, phyDescMem); return; } @@ -467,9 +464,8 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - drvHandle->ringPrimeRead(ringHandleInt, phyDescMem); + Udma_ringPrimeReadLcdma(ringHandleInt, phyDescMem); return; } @@ -477,9 +473,8 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - drvHandle->ringSetDoorBell(ringHandleInt, count); + Udma_ringSetDoorBellLcdma(ringHandleInt, count); return; } @@ -502,9 +497,8 @@ void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) { void *ringMem = NULL_PTR; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - ringMem = drvHandle->ringGetMemPtr(ringHandleInt); + ringMem = Udma_ringGetMemPtrLcdma(ringHandleInt); return (ringMem); } @@ -513,9 +507,8 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) { uint32_t ringMode; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - ringMode = drvHandle->ringGetMode(ringHandleInt); + ringMode = Udma_ringGetModeLcdma(ringHandleInt); return (ringMode); } @@ -524,9 +517,8 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) { uint32_t size = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - size = drvHandle->ringGetElementCnt(ringHandleInt); + size = Udma_ringGetElementCntLcdma(ringHandleInt); return (size); } @@ -535,9 +527,8 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - occ = drvHandle->ringGetForwardRingOcc(ringHandleInt); + occ = Udma_ringGetForwardRingOccLcdma(ringHandleInt); return (occ); } @@ -546,9 +537,8 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - occ = drvHandle->ringGetReverseRingOcc(ringHandleInt); + occ = Udma_ringGetReverseRingOccLcdma(ringHandleInt); return (occ); } @@ -557,9 +547,8 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - idx = drvHandle->ringGetWrIdx(ringHandleInt); + idx = Udma_ringGetWrIdxLcdma(ringHandleInt); return (idx); } @@ -568,9 +557,8 @@ uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - idx = drvHandle->ringGetRdIdx(ringHandleInt); + idx = Udma_ringGetRdIdxLcdma(ringHandleInt); return (idx); } @@ -663,24 +651,3 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } - -static inline void Udma_ringAssertFnPointers(Udma_DrvHandleInt drvHandle) -{ - DebugP_assert(drvHandle->ringDequeueRaw != (Udma_ringDequeueRawFxn) NULL_PTR); - DebugP_assert(drvHandle->ringQueueRaw != (Udma_ringQueueRawFxn) NULL_PTR); - DebugP_assert(drvHandle->ringFlushRaw != (Udma_ringFlushRawFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetElementCnt != (Udma_ringGetElementCntFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetMemPtr != (Udma_ringGetMemPtrFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetMode != (Udma_ringGetModeFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetForwardRingOcc != (Udma_ringGetForwardRingOccFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetReverseRingOcc != (Udma_ringGetReverseRingOccFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetWrIdx != (Udma_ringGetWrIdxFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetRdIdx != (Udma_ringGetRdIdxFxn) NULL_PTR); - DebugP_assert(drvHandle->ringPrime != (Udma_ringPrimeFxn) NULL_PTR); - DebugP_assert(drvHandle->ringPrimeRead != (Udma_ringPrimeReadFxn) NULL_PTR); - DebugP_assert(drvHandle->ringSetDoorBell != (Udma_ringSetDoorBellFxn) NULL_PTR); - DebugP_assert(drvHandle->ringSetCfg != (Udma_ringSetCfgFxn) NULL_PTR); - DebugP_assert(drvHandle->ringHandleClearRegs != (Udma_ringHandleClearRegsFxn) NULL_PTR); - - return; -} diff --git a/source/drivers/udma/v1/udma_priv.h b/source/drivers/udma/v1/udma_priv.h index 019e5924230..2349481bce9 100644 --- a/source/drivers/udma/v1/udma_priv.h +++ b/source/drivers/udma/v1/udma_priv.h @@ -139,59 +139,6 @@ typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; /** \brief UDMA flow handle */ typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; -/** - * \anchor Udma_RingLocalApiPrototypes - * \name UDMA Ring Local API's function prototypes - * - * Function prototypes for various local UDMA Ring API's. - * For Normal RA / LCDMA RA, function pointers will be used - * to call the appropriate function. - * - * @{ - */ -/** \brief UDMA Ring handle clear register function prototype */ -typedef void (*Udma_ringHandleClearRegsFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring set doorbell function prototype */ -typedef void (*Udma_ringSetDoorBellFxn)(Udma_RingHandleInt ringHandle, - int32_t count); -/** \brief UDMA Ring prime function prototype */ -typedef void (*Udma_ringPrimeFxn)(Udma_RingHandleInt ringHandle, - uint64_t phyDescMem); -/** \brief UDMA Ring prime read function prototype */ -typedef void (*Udma_ringPrimeReadFxn)(Udma_RingHandleInt ringHandle, - uint64_t *phyDescMem); -/** \brief UDMA Ring get mem pointer function prototype */ -typedef void *(*Udma_ringGetMemPtrFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get ring mode function prototype */ -typedef uint32_t (*Udma_ringGetModeFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get element count function prototype */ -typedef uint32_t (*Udma_ringGetElementCntFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get forward ring occupancy function prototype */ -typedef uint32_t (*Udma_ringGetForwardRingOccFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get reverse ring occupancy function prototype */ -typedef uint32_t (*Udma_ringGetReverseRingOccFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get write index value function prototype */ -typedef uint32_t (*Udma_ringGetWrIdxFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring get read index value function prototype */ -typedef uint32_t (*Udma_ringGetRdIdxFxn)(Udma_RingHandleInt ringHandle); -/** \brief UDMA Ring dequeue raw function prototype */ -typedef int32_t (*Udma_ringDequeueRawFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - uint64_t *phyDescMem); -/** \brief UDMA Ring queue raw function prototype */ -typedef int32_t (*Udma_ringQueueRawFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - uint64_t phyDescMem); -/** \brief UDMA Ring flush raw function prototype */ -typedef int32_t (*Udma_ringFlushRawFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - uint64_t *phyDescMem); -/** \brief UDMA Ring set Cfg function prototype */ -typedef void (*Udma_ringSetCfgFxn)(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, - const Udma_RingPrms *ringPrms); -/* @} */ - /** * \anchor Udma_RmMaxSize * Resource management related macros. @@ -866,42 +813,6 @@ typedef struct Udma_DrvObjectInt_t /**< Mutex to protect RM allocation. */ SemaphoreP_Object rmLockObj; /**< Mutex object. */ - - /* - * UDMA Ring Local API's function pointers - * For Normal RA / LCDMA RA, these function pointers are used - * to call the appropriate function. - */ - Udma_ringDequeueRawFxn ringDequeueRaw; - /**< UDMA Ring dequeue raw function pointer */ - Udma_ringQueueRawFxn ringQueueRaw; - /**< UDMA Ring queue raw function pointer */ - Udma_ringFlushRawFxn ringFlushRaw; - /**< UDMA Ring flush raw function pointer */ - Udma_ringGetElementCntFxn ringGetElementCnt; - /**< UDMA Ring get element count function pointer */ - Udma_ringGetMemPtrFxn ringGetMemPtr; - /**< UDMA Ring get mem pointer function pointer */ - Udma_ringGetModeFxn ringGetMode; - /**< UDMA Ring get ring mode function pointer */ - Udma_ringGetForwardRingOccFxn ringGetForwardRingOcc; - /**< UDMA Ring get forward ring occupancy function pointer */ - Udma_ringGetReverseRingOccFxn ringGetReverseRingOcc; - /**< UDMA Ring get reverse ring occupancy function pointer */ - Udma_ringGetWrIdxFxn ringGetWrIdx; - /**< UDMA Ring get write index value function pointer */ - Udma_ringGetRdIdxFxn ringGetRdIdx; - /**< UDMA Ring get read index value function pointer */ - Udma_ringPrimeFxn ringPrime; - /**< UDMA Ring prime function pointer */ - Udma_ringPrimeReadFxn ringPrimeRead; - /**< UDMA Ring prime read function pointer */ - Udma_ringSetDoorBellFxn ringSetDoorBell; - /**< UDMA Ring set doorbell function pointer */ - Udma_ringSetCfgFxn ringSetCfg; - /**< UDMA Ring set Cfg function pointer */ - Udma_ringHandleClearRegsFxn ringHandleClearRegs; - /**< UDMA Ring handle clear register function pointer */ } Udma_DrvObjectInt; /* ========================================================================== */ diff --git a/source/drivers/udma/v1/udma_ring_common.c b/source/drivers/udma/v1/udma_ring_common.c index 8147d7022c1..3f49989ea63 100644 --- a/source/drivers/udma/v1/udma_ring_common.c +++ b/source/drivers/udma/v1/udma_ring_common.c @@ -62,7 +62,6 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, const Udma_RingPrms *ringPrms); -static inline void Udma_ringAssertFnPointers(Udma_DrvHandleInt drvHandle); /* ========================================================================== */ /* Global Variables */ @@ -142,13 +141,12 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, if(UDMA_SOK == retVal) { - Udma_ringAssertFnPointers(drvHandleInt); ringHandleInt->drvHandle = drvHandleInt; /* Set the mapped group in ringHandleInt, since only ringHandleInt is passed to rmFreeMappedRing() and * the mapped group parameter is required to reset the appropriate flag */ ringHandleInt->mappedRingGrp = ringPrms->mappedRingGrp; ringHandleInt->mappedChNum = ringPrms->mappedChNum; - drvHandleInt->ringSetCfg(drvHandleInt, ringHandleInt, ringPrms); + Udma_ringSetCfgNormal(drvHandleInt, ringHandleInt, ringPrms); /* Perform ring reset */ retVal = Udma_ringReset(drvHandleInt, ringHandleInt); if(UDMA_SOK != retVal) @@ -249,7 +247,7 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) ringHandleInt->ringNum = UDMA_RING_INVALID; ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; - drvHandle->ringHandleClearRegs(ringHandleInt); + Udma_ringHandleClearRegsNormal(ringHandleInt); ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; } @@ -289,7 +287,7 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, { ringHandleInt->ringNum = ringNum; ringHandleInt->drvHandle = drvHandleInt; - drvHandleInt->ringSetCfg(drvHandleInt, ringHandleInt, (Udma_RingPrms *) NULL_PTR); + Udma_ringSetCfgNormal(drvHandleInt, ringHandleInt, (Udma_RingPrms *) NULL_PTR); ringHandleInt->ringInitDone = UDMA_INIT_DONE; } @@ -329,7 +327,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) /* Clear handle object */ DebugP_assert(ringHandleInt->ringNum != UDMA_RING_INVALID); ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; - drvHandle->ringHandleClearRegs(ringHandleInt); + Udma_ringHandleClearRegsNormal(ringHandleInt); ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; } @@ -365,7 +363,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) { cookie = HwiP_disable(); - retVal = drvHandle->ringQueueRaw(drvHandle, ringHandleInt, phyDescMem); + retVal = Udma_ringQueueRawNormal(drvHandle, ringHandleInt, phyDescMem); HwiP_restore(cookie); } @@ -401,7 +399,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { cookie = HwiP_disable(); - retVal = drvHandle->ringDequeueRaw(drvHandle, ringHandleInt, phyDescMem); + retVal = Udma_ringDequeueRawNormal(drvHandle, ringHandleInt, phyDescMem); HwiP_restore(cookie); } @@ -434,7 +432,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) if(UDMA_SOK == retVal) { - retVal = drvHandle->ringFlushRaw(drvHandle, ringHandleInt, phyDescMem); + retVal = Udma_ringFlushRawNormal(drvHandle, ringHandleInt, phyDescMem); } return (retVal); @@ -443,9 +441,8 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - drvHandle->ringPrime(ringHandleInt, phyDescMem); + Udma_ringPrimeNormal(ringHandleInt, phyDescMem); return; } @@ -453,9 +450,8 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - drvHandle->ringPrimeRead(ringHandleInt, phyDescMem); + Udma_ringPrimeReadNormal(ringHandleInt, phyDescMem); return; } @@ -463,9 +459,8 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - drvHandle->ringSetDoorBell(ringHandleInt, count); + Udma_ringSetDoorBellNormal(ringHandleInt, count); return; } @@ -488,9 +483,8 @@ void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) { void *ringMem = NULL_PTR; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - ringMem = drvHandle->ringGetMemPtr(ringHandleInt); + ringMem = Udma_ringGetMemPtrNormal(ringHandleInt); return (ringMem); } @@ -499,9 +493,8 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) { uint32_t ringMode; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - ringMode = drvHandle->ringGetMode(ringHandleInt); + ringMode = Udma_ringGetModeNormal(ringHandleInt); return (ringMode); } @@ -510,9 +503,8 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) { uint32_t size = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - size = drvHandle->ringGetElementCnt(ringHandleInt); + size = Udma_ringGetElementCntNormal(ringHandleInt); return (size); } @@ -521,9 +513,8 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - occ = drvHandle->ringGetForwardRingOcc(ringHandleInt); + occ = Udma_ringGetRingOccNormal(ringHandleInt); return (occ); } @@ -532,9 +523,8 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - occ = drvHandle->ringGetReverseRingOcc(ringHandleInt); + occ = Udma_ringGetRingOccNormal(ringHandleInt); return (occ); } @@ -543,9 +533,8 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - idx = drvHandle->ringGetWrIdx(ringHandleInt); + idx = Udma_ringGetWrIdxNormal(ringHandleInt); return (idx); } @@ -554,9 +543,8 @@ uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; - Udma_DrvHandleInt drvHandle = ringHandleInt->drvHandle; - idx = drvHandle->ringGetRdIdx(ringHandleInt); + idx = Udma_ringGetRdIdxNormal(ringHandleInt); return (idx); } @@ -641,27 +629,6 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } -static inline void Udma_ringAssertFnPointers(Udma_DrvHandleInt drvHandle) -{ - DebugP_assert(drvHandle->ringDequeueRaw != (Udma_ringDequeueRawFxn) NULL_PTR); - DebugP_assert(drvHandle->ringQueueRaw != (Udma_ringQueueRawFxn) NULL_PTR); - DebugP_assert(drvHandle->ringFlushRaw != (Udma_ringFlushRawFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetElementCnt != (Udma_ringGetElementCntFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetMemPtr != (Udma_ringGetMemPtrFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetMode != (Udma_ringGetModeFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetForwardRingOcc != (Udma_ringGetForwardRingOccFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetReverseRingOcc != (Udma_ringGetReverseRingOccFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetWrIdx != (Udma_ringGetWrIdxFxn) NULL_PTR); - DebugP_assert(drvHandle->ringGetRdIdx != (Udma_ringGetRdIdxFxn) NULL_PTR); - DebugP_assert(drvHandle->ringPrime != (Udma_ringPrimeFxn) NULL_PTR); - DebugP_assert(drvHandle->ringPrimeRead != (Udma_ringPrimeReadFxn) NULL_PTR); - DebugP_assert(drvHandle->ringSetDoorBell != (Udma_ringSetDoorBellFxn) NULL_PTR); - DebugP_assert(drvHandle->ringSetCfg != (Udma_ringSetCfgFxn) NULL_PTR); - DebugP_assert(drvHandle->ringHandleClearRegs != (Udma_ringHandleClearRegsFxn) NULL_PTR); - - return; -} - int32_t Udma_ringProxyQueueRaw(Udma_RingHandleInt ringHandle, Udma_DrvHandleInt drvHandle, uint64_t phyDescMem) diff --git a/test/drivers/udma/udma_test.h b/test/drivers/udma/udma_test.h index bb5dbfb42fb..7f1c4c26344 100644 --- a/test/drivers/udma/udma_test.h +++ b/test/drivers/udma/udma_test.h @@ -680,7 +680,7 @@ void udmaTestResetTestResult(void); void udmaTestCalcPerformance(UdmaTestTaskObj *taskObj, uint32_t durationMs); void udmaTestCalcTotalPerformance(UdmaTestObj *testObj, uint32_t durationMs); int32_t udmaTestCompareRingHwOccDriver(Udma_RingHandle ringHandle, uint32_t cnt, uint32_t direction); -uint32_t udmaTestGetRingHwOccDriver(Udma_RingHandle ringHandle, uint32_t direction); +uint32_t udmaTestGetRingHwOccDriver(Udma_RingObjectInt *ringHandle, uint32_t direction); int32_t udmaTestBlkCpyRingPrimeLcdmaTest(UdmaTestTaskObj *taskObj); char AppUtils_getChar(void); diff --git a/test/drivers/udma/udma_test_common.c b/test/drivers/udma/udma_test_common.c index 665eaca41c0..5f51f7b417d 100644 --- a/test/drivers/udma/udma_test_common.c +++ b/test/drivers/udma/udma_test_common.c @@ -360,21 +360,20 @@ int32_t udmaTestCompareRingHwOccDriver(Udma_RingHandle ringHandle, uint32_t cnt, return (retVal); } -uint32_t udmaTestGetRingHwOccDriver(Udma_RingHandle ringHandle, uint32_t direction) +uint32_t udmaTestGetRingHwOccDriver(Udma_RingObjectInt *ringHandle, uint32_t direction) { uint32_t occ = 0U; - Udma_RingObjectInt *ringObj = (Udma_RingObjectInt *) ringHandle; - Udma_DrvHandle drvHandle = ringObj->drvHandle; - Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; - +#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1U) if(UDMA_TEST_RING_ACC_DIRECTION_FORWARD == direction) { - occ = drvObj->ringGetForwardRingOcc(ringHandle); + occ = Udma_ringGetForwardRingOccLcdma(ringHandle); } else { - occ = drvObj->ringGetReverseRingOcc(ringHandle); + occ = Udma_ringGetReverseRingOccLcdma(ringHandle); } - +#else + occ = Udma_ringGetRingOccNormal(ringHandle); +#endif return (occ); } \ No newline at end of file From d083c2a2036565a22e31f5117bf85b504c48100c Mon Sep 17 00:00:00 2001 From: Nithyaa shri R B Date: Tue, 13 May 2025 13:50:30 +0530 Subject: [PATCH 2/5] am64/am24: udma: Remove void* pointers - Remove void* pointers and use fixed pointer types - Replace the switch cases with actual functions calls based on channel types. Fixes: SITSW-7155 Signed-off-by: Nithyaa shri R B --- source/drivers/udma/hw_include/csl_bcdma.c | 492 +++++++----------- source/drivers/udma/hw_include/csl_bcdma.h | 139 +---- .../udma/hw_include/csl_lcdma_ringacc.c | 42 +- .../udma/hw_include/csl_lcdma_ringacc.h | 6 +- .../drivers/udma/include/csl_pktdma_cppi5.h | 116 ++--- source/drivers/udma/include/csl_udmap_cppi5.h | 124 ++--- source/drivers/udma/include/udma_ch.h | 2 +- source/drivers/udma/v0/udma_ch.c | 76 +-- source/drivers/udma/v0/udma_utils.c | 12 +- source/drivers/udma/v1/udma_ch.c | 8 +- 10 files changed, 410 insertions(+), 607 deletions(-) diff --git a/source/drivers/udma/hw_include/csl_bcdma.c b/source/drivers/udma/hw_include/csl_bcdma.c index 34c1baa40f0..f0e07d344f1 100755 --- a/source/drivers/udma/hw_include/csl_bcdma.c +++ b/source/drivers/udma/hw_include/csl_bcdma.c @@ -52,212 +52,186 @@ * Static internal functions * ---------------------------------------------------------------------------- */ -static uint32_t CSL_bcdmaMapChanIdx( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType *chanType ); -static int32_t CSL_bcdmaDoChanOp( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanOp chanOp, uint32_t chanIdx, void *pOpData ); static bool CSL_bcdmaChanOpIsValidChanIdx( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx ); static bool CSL_bcdmaChanOpIsChanEnabled( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx ); -static int32_t CSL_bcdmaChanOpCfgChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); +static int32_t CSL_bcdmaChanOpCfgRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRxChanCfg *pOpData, CSL_BcdmaChanType chanType); +static int32_t CSL_bcdmaChanOpCfgTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaTxChanCfg *pOpData, CSL_BcdmaChanType chanType); +static int32_t CSL_bcdmaChanOpCfgBcChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaTxChanCfg *pOpData, CSL_BcdmaChanType chanType); static int32_t CSL_bcdmaChanOpSetChanEnable( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, bool bEnable ); static int32_t CSL_bcdmaChanOpSetChanPause( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, bool bPause ); -static int32_t CSL_bcdmaChanOpTeardownChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); +static int32_t CSL_bcdmaChanOpTeardownChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaTeardownOpts *pOpData ); static int32_t CSL_bcdmaChanOpTriggerChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx ); -static int32_t CSL_bcdmaChanOpGetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); -static int32_t CSL_bcdmaChanOpSetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); -static int32_t CSL_bcdmaChanOpGetChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); -static int32_t CSL_bcdmaChanOpDecChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); -static int32_t CSL_bcdmaChanOpAccessRemotePeerReg( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData, bool bRead ); -static int32_t CSL_bcdmaChanOpSetBurstSize( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); +static int32_t CSL_bcdmaChanOpGetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaRT *pOpData ); +static int32_t CSL_bcdmaChanOpSetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaRT *pOpData ); +static int32_t CSL_bcdmaChanOpGetChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaChanStats *pOpData ); +static int32_t CSL_bcdmaChanOpDecChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaChanStats *pOpData ); +static int32_t CSL_bcdmaChanOpAccessRemotePeerReg( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaRemotePeerOpts *pOpData, bool bRead ); +static int32_t CSL_bcdmaChanOpSetBurstSize( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaChanBurstSize *pOpData ); static int32_t CSL_bcdmaChanOpClearError( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx ); -static uint32_t CSL_bcdmaMapChanIdx( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType *chanType ) + +static bool CSL_bcdmaChanOpIsValidChanIdx( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx ) { - uint32_t base0chanIdx; + bool retVal = (bool)true; - if( chanIdx < pCfg->bcChanCnt ) + if( chanType == CSL_BCDMA_CHAN_TYPE_BLOCK_COPY ) { - *chanType = CSL_BCDMA_CHAN_TYPE_BLOCK_COPY; - base0chanIdx = chanIdx; + if( chanIdx > pCfg->bcChanCnt ) + { + retVal = (bool)false; + } } - else if( chanIdx < (pCfg->bcChanCnt + pCfg->splitTxChanCnt) ) + else if( chanType == CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) { - *chanType = CSL_BCDMA_CHAN_TYPE_SPLIT_TX; - base0chanIdx = chanIdx - pCfg->bcChanCnt; + if( chanIdx > pCfg->splitRxChanCnt ) + { + retVal = (bool)false; + } } - else if( chanIdx < (pCfg->bcChanCnt + pCfg->splitTxChanCnt + pCfg->splitRxChanCnt) ) + else if( chanType == CSL_BCDMA_CHAN_TYPE_SPLIT_TX ) { - *chanType = CSL_BCDMA_CHAN_TYPE_SPLIT_RX; - base0chanIdx = chanIdx - pCfg->bcChanCnt - pCfg->splitTxChanCnt; + if( chanIdx > pCfg->splitTxChanCnt ) + { + retVal = (bool)false; + } } else { - base0chanIdx = CSL_BCDMA_INVALID_CHANNEL_INDEX; + retVal = (bool)false; } - return base0chanIdx; + return retVal; } -static int32_t CSL_bcdmaDoChanOp( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanOp chanOp, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpCfgRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRxChanCfg *pOpData, CSL_BcdmaChanType chanType) { - int32_t retVal = CSL_EFAIL; + int32_t retVal = CSL_PASS; - if( pCfg == NULL ) + if( ( pCfg == NULL ) || + ( chanType > CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) || + ( !CSL_bcdmaChanOpIsValidChanIdx( pCfg, chanType, chanIdx ) || + ( pOpData == NULL)) + ) { retVal = CSL_EBADARGS; } else { - uint32_t base0chanIdx; - CSL_BcdmaChanType chanType; - /* - * Call CSL_bcdmaGetCfg to populate the bcdma cfg structure if it appears - * the caller has not yet done so. - */ - if( (pCfg->bcChanCnt == (uint32_t)0U) || (pCfg->splitTxChanCnt == (uint32_t)0U) || (pCfg->splitRxChanCnt == (uint32_t)0U) ) { - CSL_bcdmaGetCfg( pCfg ); + uint32_t regVal; + CSL_BcdmaRxChanCfg *pChanCfg = pOpData; + if( (pChanCfg->burstSize > CSL_BCDMA_CHAN_BURST_SIZE_64_BYTES) || /* Split-rx supports 32, and 64-byte bursts */ + (pChanCfg->busPriority > ((uint32_t)7U) ) || + (pChanCfg->dmaPriority > ((uint32_t)3U) ) + ) + { + retVal = CSL_EINVALID_PARAMS; } - base0chanIdx = CSL_bcdmaMapChanIdx( pCfg, chanIdx, &chanType ); - if( base0chanIdx != CSL_BCDMA_INVALID_CHANNEL_INDEX ) + else { - retVal = CSL_bcdmaChanOp( pCfg, chanOp, chanType, base0chanIdx, pOpData ); + /* RCFG */ + regVal = CSL_REG32_RD( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RCFG ); + CSL_FINS( regVal, BCDMA_RXCCFG_CHAN_RCFG_PAUSE_ON_ERR, pChanCfg->pauseOnError); + CSL_FINS( regVal, BCDMA_RXCCFG_CHAN_RCFG_BURST_SIZE, pChanCfg->burstSize ); +#ifdef CSL_BCDMA_RXCCFG_CHAN_RCFG_IGNORE_LONG_MASK + CSL_FINS( regVal, BCDMA_RXCCFG_CHAN_RCFG_IGNORE_LONG, pChanCfg->bIgnoreLongPkts ? (uint32_t)1U : (uint32_t)0U ); +#endif + CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RCFG, regVal ); + /* RPRI_CTRL */ + regVal = CSL_FMK( BCDMA_RXCCFG_CHAN_RPRI_CTRL_PRIORITY, pChanCfg->busPriority ) | + CSL_FMK( BCDMA_RXCCFG_CHAN_RPRI_CTRL_ORDERID, pChanCfg->busOrderId ); + CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RPRI_CTRL, regVal ); + /* THREAD */ + CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].THREAD, CSL_FMK(BCDMA_RXCCFG_CHAN_THREAD_ID, pChanCfg->threadId) ); + /* RST_SCHED */ + CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RST_SCHED, CSL_FMK(BCDMA_RXCCFG_CHAN_RST_SCHED_PRIORITY, pChanCfg->dmaPriority) ); } } return retVal; } -static bool CSL_bcdmaChanOpIsValidChanIdx( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx ) +static int32_t CSL_bcdmaChanOpCfgTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaTxChanCfg *pOpData, CSL_BcdmaChanType chanType) { - bool retVal = (bool)true; + int32_t retVal = CSL_PASS; - if( chanType == CSL_BCDMA_CHAN_TYPE_BLOCK_COPY ) + if( ( pCfg == NULL ) || + ( chanType > CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) || + ( !CSL_bcdmaChanOpIsValidChanIdx( pCfg, chanType, chanIdx ) || + ( pOpData == NULL)) + ) { - if( chanIdx > pCfg->bcChanCnt ) - { - retVal = (bool)false; - } + retVal = CSL_EBADARGS; } - else if( chanType == CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) + else { - if( chanIdx > pCfg->splitRxChanCnt ) + uint32_t regVal; + + CSL_BcdmaTxChanCfg *pChanCfg = pOpData; + if( (pChanCfg->burstSize > CSL_BCDMA_CHAN_BURST_SIZE_64_BYTES) || /* Split-tx supports 32, and 64-byte bursts */ + (pChanCfg->busPriority > ((uint32_t)7U) ) || + (pChanCfg->dmaPriority > ((uint32_t)3U) ) + ) { - retVal = (bool)false; + retVal = CSL_EINVALID_PARAMS; } - } - else if( chanType == CSL_BCDMA_CHAN_TYPE_SPLIT_TX ) - { - if( chanIdx > pCfg->splitTxChanCnt ) + else { - retVal = (bool)false; + /* TCFG */ + regVal = CSL_REG32_RD( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TCFG ); + CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_PAUSE_ON_ERR, pChanCfg->pauseOnError); + CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_BURST_SIZE, pChanCfg->burstSize ); + CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_TDTYPE, pChanCfg->tdType ); + CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_NOTDPKT, pChanCfg->bNoTeardownCompletePkt ); + CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TCFG, regVal ); + /* TPRI_CTRL */ + regVal = CSL_FMK( BCDMA_TXCCFG_CHAN_TPRI_CTRL_PRIORITY, pChanCfg->busPriority ) | + CSL_FMK( BCDMA_TXCCFG_CHAN_TPRI_CTRL_ORDERID, pChanCfg->busOrderId ); + CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TPRI_CTRL, regVal ); + /* THREAD */ + CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].THREAD, CSL_FMK(BCDMA_TXCCFG_CHAN_THREAD_ID, pChanCfg->threadId) ); + /* TST_SCHED */ + CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TST_SCHED, CSL_FMK(BCDMA_TXCCFG_CHAN_TST_SCHED_PRIORITY, pChanCfg->dmaPriority) ); } } - else - { - retVal = (bool)false; - } return retVal; } -static int32_t CSL_bcdmaChanOpCfgChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) + +static int32_t CSL_bcdmaChanOpCfgBcChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaTxChanCfg *pOpData, CSL_BcdmaChanType chanType) { int32_t retVal = CSL_PASS; - if( pOpData == NULL ) + if( ( pCfg == NULL ) || + ( chanType > CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) || + ( !CSL_bcdmaChanOpIsValidChanIdx( pCfg, chanType, chanIdx ) || + ( pOpData == NULL)) + ) { retVal = CSL_EBADARGS; } else { uint32_t regVal; - switch( chanType ) + + CSL_BcdmaTxChanCfg *pChanCfg = pOpData; + if( (pChanCfg->burstSize > CSL_BCDMA_CHAN_BURST_SIZE_128_BYTES) || /* Block-copy supports 32, 64, and 128-byte bursts */ + (pChanCfg->busPriority > ((uint32_t)7U) ) || + (pChanCfg->dmaPriority > ((uint32_t)3U) ) + ) + { + retVal = CSL_EINVALID_PARAMS; + } + else { - case CSL_BCDMA_CHAN_TYPE_BLOCK_COPY: - { - CSL_BcdmaTxChanCfg *pChanCfg = (CSL_BcdmaTxChanCfg *)pOpData; - if( (pChanCfg->burstSize > CSL_BCDMA_CHAN_BURST_SIZE_128_BYTES) || /* Block-copy supports 32, 64, and 128-byte bursts */ - (pChanCfg->busPriority > ((uint32_t)7U) ) || - (pChanCfg->dmaPriority > ((uint32_t)3U) ) - ) - { - retVal = CSL_EINVALID_PARAMS; - } - else - { - /* CFG */ - regVal = CSL_REG32_RD( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].CFG ); - CSL_FINS( regVal, BCDMA_BCCFG_CHAN_CFG_PAUSE_ON_ERR, pChanCfg->pauseOnError ); - CSL_FINS( regVal, BCDMA_BCCFG_CHAN_CFG_BURST_SIZE, pChanCfg->burstSize ); - CSL_REG32_WR( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].CFG, regVal ); - /* PRI_CTRL */ - regVal = CSL_FMK( BCDMA_BCCFG_CHAN_PRI_CTRL_PRIORITY, pChanCfg->busPriority ) | - CSL_FMK( BCDMA_BCCFG_CHAN_PRI_CTRL_ORDERID, pChanCfg->busOrderId ); - CSL_REG32_WR( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].PRI_CTRL, regVal ); - /* TST_SCHED */ - CSL_REG32_WR( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].TST_SCHED, CSL_FMK(BCDMA_BCCFG_CHAN_TST_SCHED_PRIORITY, pChanCfg->dmaPriority) ); - } - } - break; - case CSL_BCDMA_CHAN_TYPE_SPLIT_TX: - { - CSL_BcdmaTxChanCfg *pChanCfg = (CSL_BcdmaTxChanCfg *)pOpData; - if( (pChanCfg->burstSize > CSL_BCDMA_CHAN_BURST_SIZE_64_BYTES) || /* Split-tx supports 32, and 64-byte bursts */ - (pChanCfg->busPriority > ((uint32_t)7U) ) || - (pChanCfg->dmaPriority > ((uint32_t)3U) ) - ) - { - retVal = CSL_EINVALID_PARAMS; - } - else - { - /* TCFG */ - regVal = CSL_REG32_RD( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TCFG ); - CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_PAUSE_ON_ERR, pChanCfg->pauseOnError); - CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_BURST_SIZE, pChanCfg->burstSize ); - CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_TDTYPE, pChanCfg->tdType ); - CSL_FINS( regVal, BCDMA_TXCCFG_CHAN_TCFG_NOTDPKT, pChanCfg->bNoTeardownCompletePkt ); - CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TCFG, regVal ); - /* TPRI_CTRL */ - regVal = CSL_FMK( BCDMA_TXCCFG_CHAN_TPRI_CTRL_PRIORITY, pChanCfg->busPriority ) | - CSL_FMK( BCDMA_TXCCFG_CHAN_TPRI_CTRL_ORDERID, pChanCfg->busOrderId ); - CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TPRI_CTRL, regVal ); - /* THREAD */ - CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].THREAD, CSL_FMK(BCDMA_TXCCFG_CHAN_THREAD_ID, pChanCfg->threadId) ); - /* TST_SCHED */ - CSL_REG32_WR( &pCfg->pTxChanCfgRegs->CHAN[chanIdx].TST_SCHED, CSL_FMK(BCDMA_TXCCFG_CHAN_TST_SCHED_PRIORITY, pChanCfg->dmaPriority) ); - } - } - break; - case CSL_BCDMA_CHAN_TYPE_SPLIT_RX: - { - CSL_BcdmaRxChanCfg *pChanCfg = (CSL_BcdmaRxChanCfg *)pOpData; - if( (pChanCfg->burstSize > CSL_BCDMA_CHAN_BURST_SIZE_64_BYTES) || /* Split-rx supports 32, and 64-byte bursts */ - (pChanCfg->busPriority > ((uint32_t)7U) ) || - (pChanCfg->dmaPriority > ((uint32_t)3U) ) - ) - { - retVal = CSL_EINVALID_PARAMS; - } - else - { - /* RCFG */ - regVal = CSL_REG32_RD( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RCFG ); - CSL_FINS( regVal, BCDMA_RXCCFG_CHAN_RCFG_PAUSE_ON_ERR, pChanCfg->pauseOnError); - CSL_FINS( regVal, BCDMA_RXCCFG_CHAN_RCFG_BURST_SIZE, pChanCfg->burstSize ); -#ifdef CSL_BCDMA_RXCCFG_CHAN_RCFG_IGNORE_LONG_MASK - CSL_FINS( regVal, BCDMA_RXCCFG_CHAN_RCFG_IGNORE_LONG, pChanCfg->bIgnoreLongPkts ? (uint32_t)1U : (uint32_t)0U ); -#endif - CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RCFG, regVal ); - /* RPRI_CTRL */ - regVal = CSL_FMK( BCDMA_RXCCFG_CHAN_RPRI_CTRL_PRIORITY, pChanCfg->busPriority ) | - CSL_FMK( BCDMA_RXCCFG_CHAN_RPRI_CTRL_ORDERID, pChanCfg->busOrderId ); - CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RPRI_CTRL, regVal ); - /* THREAD */ - CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].THREAD, CSL_FMK(BCDMA_RXCCFG_CHAN_THREAD_ID, pChanCfg->threadId) ); - /* RST_SCHED */ - CSL_REG32_WR( &pCfg->pRxChanCfgRegs->CHAN[chanIdx].RST_SCHED, CSL_FMK(BCDMA_RXCCFG_CHAN_RST_SCHED_PRIORITY, pChanCfg->dmaPriority) ); - } - } - break; - default: - retVal = CSL_EBADARGS; - break; + /* CFG */ + regVal = CSL_REG32_RD( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].CFG ); + CSL_FINS( regVal, BCDMA_BCCFG_CHAN_CFG_PAUSE_ON_ERR, pChanCfg->pauseOnError ); + CSL_FINS( regVal, BCDMA_BCCFG_CHAN_CFG_BURST_SIZE, pChanCfg->burstSize ); + CSL_REG32_WR( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].CFG, regVal ); + /* PRI_CTRL */ + regVal = CSL_FMK( BCDMA_BCCFG_CHAN_PRI_CTRL_PRIORITY, pChanCfg->busPriority ) | + CSL_FMK( BCDMA_BCCFG_CHAN_PRI_CTRL_ORDERID, pChanCfg->busOrderId ); + CSL_REG32_WR( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].PRI_CTRL, regVal ); + /* TST_SCHED */ + CSL_REG32_WR( &pCfg->pBcChanCfgRegs->CHAN[chanIdx].TST_SCHED, CSL_FMK(BCDMA_BCCFG_CHAN_TST_SCHED_PRIORITY, pChanCfg->dmaPriority) ); } } return retVal; @@ -285,6 +259,7 @@ static bool CSL_bcdmaChanOpIsChanEnabled( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType return ((regVal == 1U) ? (bool)true : (bool)false); } + static int32_t CSL_bcdmaChanOpSetChanEnable( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, bool bEnable ) { int32_t retVal = CSL_PASS; @@ -337,7 +312,7 @@ static int32_t CSL_bcdmaChanOpSetChanPause( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp return retVal; } -static int32_t CSL_bcdmaChanOpTeardownChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpTeardownChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaTeardownOpts *pOpData ) { int32_t retVal = CSL_PASS; @@ -353,7 +328,7 @@ static int32_t CSL_bcdmaChanOpTeardownChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp if( pOpData != NULL ) { - CSL_BcdmaTeardownOpts *pTdOpts = (CSL_BcdmaTeardownOpts *)pOpData; + CSL_BcdmaTeardownOpts *pTdOpts = pOpData; force = pTdOpts->force; wait = pTdOpts->wait; } @@ -426,7 +401,7 @@ static int32_t CSL_bcdmaChanOpTriggerChan( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType return retVal; } -static int32_t CSL_bcdmaChanOpGetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpGetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaRT *pOpData ) { int32_t retVal = CSL_PASS; @@ -454,7 +429,7 @@ static int32_t CSL_bcdmaChanOpGetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType c } if( retVal == CSL_PASS ) { - CSL_BcdmaRT *pRT = (CSL_BcdmaRT *)pOpData; + CSL_BcdmaRT *pRT = pOpData; pRT->enable = CSL_FEXT( val, BCDMA_TXCRT_CHAN_CTL_EN ); pRT->teardown = CSL_FEXT( val, BCDMA_TXCRT_CHAN_CTL_TDOWN ); @@ -476,7 +451,7 @@ static int32_t CSL_bcdmaChanOpGetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType c return retVal; } -static int32_t CSL_bcdmaChanOpSetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpSetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaRT *pOpData ) { int32_t retVal = CSL_PASS; @@ -487,7 +462,7 @@ static int32_t CSL_bcdmaChanOpSetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType c else { uint32_t val; - CSL_BcdmaRT *pRT = (CSL_BcdmaRT *)pOpData; + CSL_BcdmaRT *pRT = pOpData; val = CSL_FMK(BCDMA_TXCRT_CHAN_CTL_EN, pRT->enable) | CSL_FMK(BCDMA_TXCRT_CHAN_CTL_TDOWN, pRT->teardown) | @@ -512,7 +487,7 @@ static int32_t CSL_bcdmaChanOpSetChanRT( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType c return retVal; } -static int32_t CSL_bcdmaChanOpGetChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpGetChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaChanStats *pOpData ) { int32_t retVal = CSL_PASS; @@ -522,7 +497,7 @@ static int32_t CSL_bcdmaChanOpGetChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp } else { - CSL_BcdmaChanStats *pChanStats = (CSL_BcdmaChanStats *)pOpData; + CSL_BcdmaChanStats *pChanStats = pOpData; switch( chanType ) { @@ -561,7 +536,7 @@ static int32_t CSL_bcdmaChanOpGetChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp return retVal; } -static int32_t CSL_bcdmaChanOpDecChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpDecChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaChanStats *pOpData ) { int32_t retVal = CSL_PASS; @@ -571,7 +546,7 @@ static int32_t CSL_bcdmaChanOpDecChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp } else { - CSL_BcdmaChanStats *pChanStats = (CSL_BcdmaChanStats *)pOpData; + CSL_BcdmaChanStats *pChanStats = pOpData; switch( chanType ) { @@ -598,7 +573,7 @@ static int32_t CSL_bcdmaChanOpDecChanStats( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp return retVal; } -static int32_t CSL_bcdmaChanOpAccessRemotePeerReg( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData, bool bRead ) +static int32_t CSL_bcdmaChanOpAccessRemotePeerReg( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaRemotePeerOpts *pOpData, bool bRead ) { int32_t retVal = CSL_PASS; @@ -645,7 +620,7 @@ static int32_t CSL_bcdmaChanOpAccessRemotePeerReg( CSL_BcdmaCfg *pCfg, CSL_Bcdma return retVal; } -static int32_t CSL_bcdmaChanOpSetBurstSize( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) +static int32_t CSL_bcdmaChanOpSetBurstSize( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType chanType, uint32_t chanIdx, CSL_BcdmaChanBurstSize *pOpData ) { int32_t retVal = CSL_PASS; @@ -655,7 +630,7 @@ static int32_t CSL_bcdmaChanOpSetBurstSize( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanTyp } else { - CSL_BcdmaChanBurstSize burstSize = *(CSL_BcdmaChanBurstSize *)pOpData; + CSL_BcdmaChanBurstSize burstSize = *pOpData; switch( chanType ) { case CSL_BCDMA_CHAN_TYPE_BLOCK_COPY: @@ -722,73 +697,6 @@ static int32_t CSL_bcdmaChanOpClearError( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanType * Global API functions * ---------------------------------------------------------------------------- */ -int32_t CSL_bcdmaChanOp( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanOp chanOp, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ) -{ - int32_t retVal = CSL_PASS; - - if( ( pCfg == NULL ) || - ( chanType > CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) || - ( !CSL_bcdmaChanOpIsValidChanIdx( pCfg, chanType, chanIdx ) ) - ) - { - retVal = CSL_EBADARGS; - } - else - { - switch(chanOp ) - { - case CSL_BCDMA_CHAN_OP_CONFIG: - retVal = CSL_bcdmaChanOpCfgChan( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_ENABLE: - retVal = CSL_bcdmaChanOpSetChanEnable( pCfg, chanType, chanIdx, (bool)true ); - break; - case CSL_BCDMA_CHAN_OP_DISABLE: - retVal = CSL_bcdmaChanOpSetChanEnable( pCfg, chanType, chanIdx, (bool)false ); - break; - case CSL_BCDMA_CHAN_OP_PAUSE: - retVal = CSL_bcdmaChanOpSetChanPause( pCfg, chanType, chanIdx, (bool)true ); - break; - case CSL_BCDMA_CHAN_OP_RESUME: - retVal = CSL_bcdmaChanOpSetChanPause( pCfg, chanType, chanIdx, (bool)false ); - break; - case CSL_BCDMA_CHAN_OP_TEARDOWN: - retVal = CSL_bcdmaChanOpTeardownChan( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_TRIGGER: - retVal = CSL_bcdmaChanOpTriggerChan( pCfg, chanType, chanIdx ); - break; - case CSL_BCDMA_CHAN_OP_GET_RT: - retVal = CSL_bcdmaChanOpGetChanRT( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_SET_RT: - retVal = CSL_bcdmaChanOpSetChanRT( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_GET_STATS: - retVal = CSL_bcdmaChanOpGetChanStats( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_DEC_STATS: - retVal = CSL_bcdmaChanOpDecChanStats( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_GET_REMOTE_PEER_REG: - retVal = CSL_bcdmaChanOpAccessRemotePeerReg( pCfg, chanType, chanIdx, pOpData, (bool)true ); - break; - case CSL_BCDMA_CHAN_OP_SET_REMOTE_PEER_REG: - retVal = CSL_bcdmaChanOpAccessRemotePeerReg( pCfg, chanType, chanIdx, pOpData, (bool)false ); - break; - case CSL_BCDMA_CHAN_OP_SET_BURST_SIZE: - retVal = CSL_bcdmaChanOpSetBurstSize( pCfg, chanType, chanIdx, pOpData ); - break; - case CSL_BCDMA_CHAN_OP_CLEAR_ERROR: - retVal = CSL_bcdmaChanOpClearError( pCfg, chanType, chanIdx ); - break; - default: - retVal = CSL_EBADARGS; - break; - } - } - return retVal; -} uint32_t CSL_bcdmaGetRevision( const CSL_BcdmaCfg *pCfg ) { @@ -886,32 +794,10 @@ void CSL_bcdmaInitRxChanCfg( CSL_BcdmaRxChanCfg *pRxChanCfg ) pRxChanCfg->errEventNum = CSL_BCDMA_NO_EVENT; } -int32_t CSL_bcdmaTxChanCfg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaTxChanCfg *pTxChanCfg ) -{ - int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_CONFIG, chanIdx, (void *)pTxChanCfg ); - if( retVal != CSL_PASS ) - { - retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ - } - return retVal; -} - -int32_t CSL_bcdmaRxChanCfg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaRxChanCfg *pRxChanCfg ) -{ - int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_CONFIG, chanIdx, (void *)pRxChanCfg ); - if( retVal != CSL_PASS ) - { - retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ - } - return retVal; -} - -int32_t CSL_bcdmaEnableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaEnableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_ENABLE, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanEnable( pCfg, chanType, chanIdx, (bool)true ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -919,10 +805,10 @@ int32_t CSL_bcdmaEnableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaEnableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaEnableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_ENABLE, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanEnable( pCfg, chanType, chanIdx, (bool)true ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -930,10 +816,10 @@ int32_t CSL_bcdmaEnableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaGetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRT *pRT ) +int32_t CSL_bcdmaGetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_GET_RT, chanIdx, (void *)pRT ); + retVal = CSL_bcdmaChanOpGetChanRT( pCfg, chanType, chanIdx, pRT ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -941,10 +827,10 @@ int32_t CSL_bcdmaGetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRT *pRT return retVal; } -int32_t CSL_bcdmaGetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRT *pRT ) +int32_t CSL_bcdmaGetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_GET_RT, chanIdx, (void *)pRT ); + retVal = CSL_bcdmaChanOpGetChanRT( pCfg, chanType, chanIdx, pRT ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -952,10 +838,10 @@ int32_t CSL_bcdmaGetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRT *pRT return retVal; } -int32_t CSL_bcdmaSetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaRT *pRT ) +int32_t CSL_bcdmaSetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_SET_RT, chanIdx, (void *)pRT ); + retVal = CSL_bcdmaChanOpSetChanRT( pCfg, chanType, chanIdx, pRT ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -963,10 +849,10 @@ int32_t CSL_bcdmaSetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaR return retVal; } -int32_t CSL_bcdmaSetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaRT *pRT ) +int32_t CSL_bcdmaSetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_SET_RT, chanIdx, (void *)pRT ); + retVal = CSL_bcdmaChanOpSetChanRT( pCfg, chanType, chanIdx, pRT ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -974,10 +860,10 @@ int32_t CSL_bcdmaSetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaR return retVal; } -int32_t CSL_bcdmaDisableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaDisableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_DISABLE, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanEnable( pCfg, chanType, chanIdx, (bool)false ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -985,10 +871,10 @@ int32_t CSL_bcdmaDisableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaDisableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaDisableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_DISABLE, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanEnable( pCfg, chanType, chanIdx, (bool)false ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -996,14 +882,14 @@ int32_t CSL_bcdmaDisableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaTeardownTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait ) +int32_t CSL_bcdmaTeardownTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait, CSL_BcdmaChanType chanType ) { int32_t retVal; CSL_BcdmaTeardownOpts teardownOpts; teardownOpts.force = (bForce == (bool)false) ? (uint32_t)0U : (uint32_t)1U; teardownOpts.wait = (bWait == (bool)false) ? (uint32_t)0U : (uint32_t)1U; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_TEARDOWN, chanIdx, (void *)&teardownOpts ); + retVal = CSL_bcdmaChanOpTeardownChan(pCfg, chanType, chanIdx, &teardownOpts); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1011,14 +897,14 @@ int32_t CSL_bcdmaTeardownTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bFor return retVal; } -int32_t CSL_bcdmaTeardownRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait ) +int32_t CSL_bcdmaTeardownRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait, CSL_BcdmaChanType chanType ) { int32_t retVal; CSL_BcdmaTeardownOpts teardownOpts; teardownOpts.force = (bForce == (bool)false) ? (uint32_t)0U : (uint32_t)1U; teardownOpts.wait = (bWait == (bool)false) ? (uint32_t)0U : (uint32_t)1U; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_TEARDOWN, chanIdx, (void *)&teardownOpts ); + retVal = CSL_bcdmaChanOpTeardownChan(pCfg, chanType, chanIdx, &teardownOpts); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1026,10 +912,10 @@ int32_t CSL_bcdmaTeardownRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bFor return retVal; } -int32_t CSL_bcdmaPauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaPauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_PAUSE, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanPause( pCfg, chanType, chanIdx, (bool)true ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1037,10 +923,10 @@ int32_t CSL_bcdmaPauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaPauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaPauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_PAUSE, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanPause( pCfg, chanType, chanIdx, (bool)true ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1048,10 +934,10 @@ int32_t CSL_bcdmaPauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaUnpauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaUnpauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_RESUME, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanPause( pCfg, chanType, chanIdx, (bool)false ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1059,10 +945,10 @@ int32_t CSL_bcdmaUnpauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaUnpauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaUnpauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_RESUME, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpSetChanPause( pCfg, chanType, chanIdx, (bool)false ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1070,10 +956,10 @@ int32_t CSL_bcdmaUnpauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaTriggerTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaTriggerTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_TRIGGER, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpTriggerChan( pCfg, chanType, chanIdx ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1081,10 +967,10 @@ int32_t CSL_bcdmaTriggerTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -int32_t CSL_bcdmaTriggerRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +int32_t CSL_bcdmaTriggerRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { int32_t retVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_TRIGGER, chanIdx, NULL ); + retVal = CSL_bcdmaChanOpTriggerChan( pCfg, chanType, chanIdx ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1092,23 +978,23 @@ int32_t CSL_bcdmaTriggerRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) return retVal; } -void CSL_bcdmaGetChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, CSL_BcdmaChanStats *pChanStats ) +void CSL_bcdmaGetChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, CSL_BcdmaChanStats *pChanStats, CSL_BcdmaChanType chanType ) { - CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_GET_STATS, chanIdx, (void *)pChanStats ); + (void) CSL_bcdmaChanOpGetChanStats( pCfg, chanType, chanIdx, pChanStats); } -void CSL_bcdmaDecChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, const CSL_BcdmaChanStats *pChanStats ) +void CSL_bcdmaDecChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, CSL_BcdmaChanStats *pChanStats, CSL_BcdmaChanType chanType ) { - CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_DEC_STATS, chanIdx, (void *)pChanStats ); + (void) CSL_bcdmaChanOpDecChanStats( pCfg, chanType, chanIdx, pChanStats); } -int32_t CSL_bcdmaGetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal ) +int32_t CSL_bcdmaGetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal, CSL_BcdmaChanType chanType ) { int32_t retVal; CSL_BcdmaRemotePeerOpts remotePeerOpts; remotePeerOpts.regIdx = regIdx; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_GET_REMOTE_PEER_REG, chanIdx, (void *)&remotePeerOpts ); + retVal = CSL_bcdmaChanOpAccessRemotePeerReg( pCfg, chanType, chanIdx, &remotePeerOpts, (bool)true ); if( retVal == CSL_PASS ) { *pVal = remotePeerOpts.regVal; @@ -1121,14 +1007,14 @@ int32_t CSL_bcdmaGetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_Bcdma return retVal; } -int32_t CSL_bcdmaSetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal ) +int32_t CSL_bcdmaSetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal, CSL_BcdmaChanType chanType ) { int32_t retVal; CSL_BcdmaRemotePeerOpts remotePeerOpts; remotePeerOpts.regIdx = regIdx; remotePeerOpts.regVal = *pVal; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_SET_REMOTE_PEER_REG, chanIdx, (void *)&remotePeerOpts ); + retVal = CSL_bcdmaChanOpAccessRemotePeerReg( pCfg, chanType, chanIdx, &remotePeerOpts, (bool)false ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1136,11 +1022,11 @@ int32_t CSL_bcdmaSetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_Bcdma return retVal; } -int32_t CSL_bcdmaTxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize ) +int32_t CSL_bcdmaTxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize, CSL_BcdmaChanType chanType ) { int32_t retVal; CSL_BcdmaChanBurstSize parm = burstSize; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_SET_BURST_SIZE, chanIdx, (void *)&parm ); + retVal = CSL_bcdmaChanOpSetBurstSize( pCfg, chanType, chanIdx, &parm ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1148,11 +1034,11 @@ int32_t CSL_bcdmaTxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_B return retVal; } -int32_t CSL_bcdmaRxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize ) +int32_t CSL_bcdmaRxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize, CSL_BcdmaChanType chanType ) { int32_t retVal; CSL_BcdmaChanBurstSize parm = burstSize; - retVal = CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_SET_BURST_SIZE, chanIdx, (void *)&parm ); + retVal = CSL_bcdmaChanOpSetBurstSize( pCfg, chanType, chanIdx, &parm ); if( retVal != CSL_PASS ) { retVal = CSL_EFAIL; /* API returns CSL_EFAIL on failure for backwards compatibility with udmap API */ @@ -1160,14 +1046,14 @@ int32_t CSL_bcdmaRxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_B return retVal; } -void CSL_bcdmaClearTxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +void CSL_bcdmaClearTxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { - CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_CLEAR_ERROR, chanIdx, NULL ); + (void) CSL_bcdmaChanOpClearError( pCfg, chanType, chanIdx ); } -void CSL_bcdmaClearRxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ) +void CSL_bcdmaClearRxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ) { - CSL_bcdmaDoChanOp( pCfg, CSL_BCDMA_CHAN_OP_CLEAR_ERROR, chanIdx, NULL ); + (void) CSL_bcdmaChanOpClearError( pCfg, chanType, chanIdx ); } void CSL_bcdmaInitRxFlowCfg( CSL_BcdmaRxFlowCfg *pFlow ) @@ -1223,10 +1109,10 @@ int32_t CSL_bcdmaEnableLink( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChan if( chanDir == CSL_BCDMA_CHAN_DIR_TX ) { /* a. Set BCDMA peer real-time enable by calling the CSL_bcdmaSetChanPeerReg() function */ - if( CSL_bcdmaSetChanPeerReg( pCfg, chanIdx, chanDir, CSL_BCDMA_CHAN_PEER_REG_OFFSET_ENABLE, &peerEnableRegVal ) == 0 ) + if( CSL_bcdmaSetChanPeerReg( pCfg, chanIdx, chanDir, CSL_BCDMA_CHAN_PEER_REG_OFFSET_ENABLE, &peerEnableRegVal, CSL_BCDMA_CHAN_TYPE_SPLIT_TX ) == 0 ) { /* b. Enable the BCDMA tx channel by calling the CSL_bcdmaEnableTxChan() function */ - if( CSL_bcdmaEnableTxChan( pCfg, chanIdx ) == 0 ) + if( CSL_bcdmaEnableTxChan( pCfg, chanIdx, CSL_BCDMA_CHAN_TYPE_SPLIT_TX ) == 0 ) { retVal = 0; } @@ -1235,10 +1121,10 @@ int32_t CSL_bcdmaEnableLink( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChan if( chanDir == CSL_BCDMA_CHAN_DIR_RX ) { /* a. Enable the BCDMA rx channel by calling the CSL_bcdmaEnableRxChan() function */ - if( CSL_bcdmaEnableRxChan( pCfg, chanIdx ) == 0 ) + if( CSL_bcdmaEnableRxChan( pCfg, chanIdx, CSL_BCDMA_CHAN_TYPE_SPLIT_RX ) == 0 ) { /* b. Set BCDMA peer real-time enable by calling the CSL_bcdmaSetChanPeerReg() function */ - if( CSL_bcdmaSetChanPeerReg( pCfg, chanIdx, chanDir, CSL_BCDMA_CHAN_PEER_REG_OFFSET_ENABLE, &peerEnableRegVal ) == 0 ) + if( CSL_bcdmaSetChanPeerReg( pCfg, chanIdx, chanDir, CSL_BCDMA_CHAN_PEER_REG_OFFSET_ENABLE, &peerEnableRegVal, CSL_BCDMA_CHAN_TYPE_SPLIT_RX) == 0 ) { retVal = 0; } diff --git a/source/drivers/udma/hw_include/csl_bcdma.h b/source/drivers/udma/hw_include/csl_bcdma.h index 44004cd09a2..4db743ab40e 100755 --- a/source/drivers/udma/hw_include/csl_bcdma.h +++ b/source/drivers/udma/hw_include/csl_bcdma.h @@ -118,49 +118,6 @@ extern "C" { * @{ */ -/** --------------------------------------------------------------------------- - * @brief This enumerator defines the possible channel operations - * - * \anchor CSL_BcdmaChanOp - * \name BCDMA channel operations - * - * @{ - * ---------------------------------------------------------------------------- - */ -typedef uint32_t CSL_BcdmaChanOp; - /** Configure channel */ -#define CSL_BCDMA_CHAN_OP_CONFIG ((uint32_t) 0U) - /** Enable channel */ -#define CSL_BCDMA_CHAN_OP_ENABLE ((uint32_t) 1U) - /** Disable channel */ -#define CSL_BCDMA_CHAN_OP_DISABLE ((uint32_t) 2U) - /** Pause channel */ -#define CSL_BCDMA_CHAN_OP_PAUSE ((uint32_t) 3U) - /** Resume channel */ -#define CSL_BCDMA_CHAN_OP_RESUME ((uint32_t) 4U) - /** Teardown channel */ -#define CSL_BCDMA_CHAN_OP_TEARDOWN ((uint32_t) 5U) - /** Trigger channel */ -#define CSL_BCDMA_CHAN_OP_TRIGGER ((uint32_t) 6U) - /** Get channel real-time values */ -#define CSL_BCDMA_CHAN_OP_GET_RT ((uint32_t) 7U) - /** Set channel real-time values */ -#define CSL_BCDMA_CHAN_OP_SET_RT ((uint32_t) 8U) - /** Get channel statistics */ -#define CSL_BCDMA_CHAN_OP_GET_STATS ((uint32_t) 9U) - /** Decrement channel statistics */ -#define CSL_BCDMA_CHAN_OP_DEC_STATS ((uint32_t) 10U) - /** Get (read) remote peer register */ -#define CSL_BCDMA_CHAN_OP_GET_REMOTE_PEER_REG ((uint32_t) 11U) - /** Set (write) remote peer register */ -#define CSL_BCDMA_CHAN_OP_SET_REMOTE_PEER_REG ((uint32_t) 12U) - /** Set (write) channel burst size */ -#define CSL_BCDMA_CHAN_OP_SET_BURST_SIZE ((uint32_t) 13U) - /** Clear channel error */ -#define CSL_BCDMA_CHAN_OP_CLEAR_ERROR ((uint32_t) 14U) - -/* @} */ - /** --------------------------------------------------------------------------- * @brief This enumerator defines the possible channel directions * @@ -733,54 +690,6 @@ extern void CSL_bcdmaInitRxChanCfg( CSL_BcdmaRxChanCfg *pRxChanCfg ); */ extern void CSL_bcdmaInitRxFlowCfg( CSL_BcdmaRxFlowCfg *pFlow ); -/** - * \brief Perform a channel operation - * - * This function performs the operation specified by 'chanOp' on the channel - * specified by channel type 'chanType' and index 'chanIdx'. Any operation- - * specific input parameters or output values are provided in the structure - * pointed to by 'pOpData'. - * - * The following table describes the valid channel operations and the - * structure type to be passed in 'pOpData': - * - * 'chanOp' Description 'pOpData' - * -------------------------------------- ------------------------------ ----------------------------------------------------------------- - * CSL_BCDMA_CHAN_OP_CONFIG Configure channel CSL_BcdmaTxChanCfg ('chanType' == CSL_BCDMA_CHAN_TYPE_BLOCK_COPY) - * CSL_BcdmaTxChanCfg ('chanType' == CSL_BCDMA_CHAN_TYPE_SPLIT_TX) - * CSL_BcdmaRxChanCfg ('chanType' == CSL_BCDMA_CHAN_TYPE_SPLIT_RX) - * CSL_BCDMA_CHAN_OP_ENABLE Enable channel N/A - * CSL_BCDMA_CHAN_OP_DISABLE Disable channel N/A - * CSL_BCDMA_CHAN_OP_PAUSE Pause channel N/A - * CSL_BCDMA_CHAN_OP_RESUME Resume channel N/A - * CSL_BCDMA_CHAN_OP_TEARDOWN Teardown channel CSL_BcdmaTeardownOpts (optional) - * Notes: - * - Channel can be torn down only when it is enabled - * - pOpData (CSL_BcdmaTeardownOpts) is optional. If NULL, then force and wait CSL_BcdmaTeardownOpts fields are assumed 0. - * CSL_BCDMA_CHAN_OP_TRIGGER Trigger channel N/A - * Notes: This operation is valid only for 'chanType' == CSL_BCDMA_CHAN_TYPE_BLOCK_COPY - * CSL_BCDMA_CHAN_OP_GET_RT Get channel real-time values CSL_BcdmaRT - * CSL_BCDMA_CHAN_OP_SET_RT Set channel real-time values CSL_BcdmaRT - * CSL_BCDMA_CHAN_OP_GET_STATS Get channel statistics CSL_BcdmaChanStats - * CSL_BCDMA_CHAN_OP_DEC_STATS Decrement channel statistics CSL_BcdmaChanStats - * CSL_BCDMA_CHAN_OP_GET_REMOTE_PEER_REG Get remote peer reg value CSL_BcdmaRemotePeerOpts - * CSL_BCDMA_CHAN_OP_SET_REMOTE_PEER_REG Set remote peer reg value CSL_BcdmaRemotePeerOpts - * CSL_BCDMA_CHAN_OP_SET_BURST_SIZE Set channel burst size CSL_BcdmaChanBurstSize - * CSL_BCDMA_CHAN_OP_CLEAR_ERROR Clear channel error N/A - * - * \param pCfg [IN] Pointer to the BCDMA configuration structure - * \param chanOp [IN] Channel operation. See #CSL_BcdmaChanOp. - * \param chanType [IN] Channel type. See #CSL_BcdmaChanType. - * \param chanIdx [IN] Zero-based channel index - * \param pOpData [IN/OUT] Pointer to optional operation-specific structure - * - * \return CSL_PASS = Function executed successfully - * CSL_EFAIL = Function execution failed - * CSL_EBADARGS = One or more arguments are invalid - * CSL_EINVALID_PARAMS = One or more parameters in 'pOpData' are invalid - */ -extern int32_t CSL_bcdmaChanOp( CSL_BcdmaCfg *pCfg, CSL_BcdmaChanOp chanOp, CSL_BcdmaChanType chanType, uint32_t chanIdx, void *pOpData ); - /** * \brief Set performance control parmeters * @@ -904,7 +813,7 @@ extern int32_t CSL_bcdmaTxChanSetTrEvent( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, * CSL_EFAIL = Function execution failed (burstSize is invalid or this * function is not available in the version of BCDMA being used) */ -extern int32_t CSL_bcdmaRxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize ); +extern int32_t CSL_bcdmaRxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize, CSL_BcdmaChanType chanType ); /** * \brief Configure TX channel burst size @@ -922,7 +831,7 @@ extern int32_t CSL_bcdmaRxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx * CSL_EFAIL = Function execution failed (burstSize is invalid or this * function is not available in the version of BCDMA being used) */ -extern int32_t CSL_bcdmaTxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize ); +extern int32_t CSL_bcdmaTxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanBurstSize burstSize, CSL_BcdmaChanType chanType ); /** * \brief Get an RX channel's real-time register values @@ -937,7 +846,7 @@ extern int32_t CSL_bcdmaTxChanSetBurstSize( CSL_BcdmaCfg *pCfg, uint32_t chanIdx * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaGetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRT *pRT ); +extern int32_t CSL_bcdmaGetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ); /** * \brief Get a TX channel's real-time register values @@ -952,7 +861,7 @@ extern int32_t CSL_bcdmaGetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_Bcdma * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaGetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaRT *pRT ); +extern int32_t CSL_bcdmaGetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ); /** * \brief Set an RX channel's real-time register values @@ -967,7 +876,7 @@ extern int32_t CSL_bcdmaGetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_Bcdma * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaSetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaRT *pRT ); +extern int32_t CSL_bcdmaSetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ); /** * \brief Set a TX channel's real-time register values @@ -982,7 +891,7 @@ extern int32_t CSL_bcdmaSetRxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaSetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL_BcdmaRT *pRT ); +extern int32_t CSL_bcdmaSetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType, CSL_BcdmaRT *pRT ); /** * \brief Enable a transmit channel. @@ -995,7 +904,7 @@ extern int32_t CSL_bcdmaSetTxRT( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, const CSL * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaEnableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaEnableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Disable a transmit channel. @@ -1008,7 +917,7 @@ extern int32_t CSL_bcdmaEnableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaDisableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaDisableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Teardown a transmit channel. @@ -1028,7 +937,7 @@ extern int32_t CSL_bcdmaDisableTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (channel is disabled) */ -extern int32_t CSL_bcdmaTeardownTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait ); +extern int32_t CSL_bcdmaTeardownTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait, CSL_BcdmaChanType chanType ); /** * \brief Pause a transmit channel. @@ -1044,7 +953,7 @@ extern int32_t CSL_bcdmaTeardownTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bo * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (channel is disabled) */ -extern int32_t CSL_bcdmaPauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaPauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Un-pause a transmit channel. @@ -1057,7 +966,7 @@ extern int32_t CSL_bcdmaPauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (channel is disabled) */ -extern int32_t CSL_bcdmaUnpauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaUnpauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx,CSL_BcdmaChanType chanType ); /** * \brief Send a trigger event to a TX channel @@ -1071,7 +980,7 @@ extern int32_t CSL_bcdmaUnpauseTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaTriggerTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaTriggerTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Clear error indication in a transmit channel. @@ -1083,7 +992,7 @@ extern int32_t CSL_bcdmaTriggerTxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * * \return None */ -extern void CSL_bcdmaClearTxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern void CSL_bcdmaClearTxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Enable a receive channel. @@ -1096,7 +1005,7 @@ extern void CSL_bcdmaClearTxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaEnableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaEnableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx,CSL_BcdmaChanType chanType); /** * \brief Disable a receive channel. @@ -1109,7 +1018,7 @@ extern int32_t CSL_bcdmaEnableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaDisableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaDisableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx,CSL_BcdmaChanType chanType); /** * \brief Teardown a receive channel. @@ -1129,7 +1038,7 @@ extern int32_t CSL_bcdmaDisableRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (channel is disabled) */ -extern int32_t CSL_bcdmaTeardownRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait ); +extern int32_t CSL_bcdmaTeardownRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bool bForce, bool bWait, CSL_BcdmaChanType chanType ); /** * \brief Pause a receive channel. @@ -1145,7 +1054,7 @@ extern int32_t CSL_bcdmaTeardownRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, bo * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (channel is disabled) */ -extern int32_t CSL_bcdmaPauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaPauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Un-pause a receive channel. @@ -1158,7 +1067,7 @@ extern int32_t CSL_bcdmaPauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (channel is disabled) */ -extern int32_t CSL_bcdmaUnpauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaUnpauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx,CSL_BcdmaChanType chanType ); /** * \brief Send a trigger event to an RX channel @@ -1172,7 +1081,7 @@ extern int32_t CSL_bcdmaUnpauseRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed */ -extern int32_t CSL_bcdmaTriggerRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern int32_t CSL_bcdmaTriggerRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType ); /** * \brief Clear error indication in a receive channel. @@ -1184,7 +1093,7 @@ extern int32_t CSL_bcdmaTriggerRxChan( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); * * \return None */ -extern void CSL_bcdmaClearRxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx ); +extern void CSL_bcdmaClearRxChanError( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanType chanType); /** * \brief [udmap_only] Configure the receive flow ID range firewall @@ -1236,7 +1145,7 @@ extern bool CSL_bcdmaGetRxFlowIdFirewallStatus( CSL_BcdmaCfg *pCfg, CSL_BcdmaRxF * where the statistics are returned * \return None */ -extern void CSL_bcdmaGetChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, CSL_BcdmaChanStats *pChanStats ); +extern void CSL_bcdmaGetChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, CSL_BcdmaChanStats *pChanStats, CSL_BcdmaChanType chanType ); /** * \brief Decrement channel statistics @@ -1252,7 +1161,7 @@ extern void CSL_bcdmaGetChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_Bcd * statistic by * \return None */ -extern void CSL_bcdmaDecChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, const CSL_BcdmaChanStats *pChanStats ); +extern void CSL_bcdmaDecChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, CSL_BcdmaChanStats *pChanStats, CSL_BcdmaChanType chanType ); /** * \brief Read a channel peer register @@ -1269,7 +1178,7 @@ extern void CSL_bcdmaDecChanStats( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_Bcd * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (regIdx is out of range) */ -extern int32_t CSL_bcdmaGetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal ); +extern int32_t CSL_bcdmaGetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal, CSL_BcdmaChanType chanType ); /** * \brief Write a TX channel peer register @@ -1286,7 +1195,7 @@ extern int32_t CSL_bcdmaGetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CS * \return CSL_PASS = Function executed successfully * CSL_EFAIL = Function execution failed (regIdx is out of range) */ -extern int32_t CSL_bcdmaSetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal ); +extern int32_t CSL_bcdmaSetChanPeerReg( CSL_BcdmaCfg *pCfg, uint32_t chanIdx, CSL_BcdmaChanDir chanDir, uint32_t regIdx, uint32_t *pVal, CSL_BcdmaChanType chanType ); /** * \brief Enable a directional data flow for a paired link diff --git a/source/drivers/udma/hw_include/csl_lcdma_ringacc.c b/source/drivers/udma/hw_include/csl_lcdma_ringacc.c index 23e4785e25d..98dd83b8847 100755 --- a/source/drivers/udma/hw_include/csl_lcdma_ringacc.c +++ b/source/drivers/udma/hw_include/csl_lcdma_ringacc.c @@ -47,12 +47,12 @@ #endif static bool bIsPhysBaseOk( const CSL_LcdmaRingaccRingCfg *pRing ); -static void *CSL_lcdma_ringaccGetRingRdElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ); -static void *CSL_lcdma_ringaccGetRingWrElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ); +static uint64_t *CSL_lcdma_ringaccGetRingRdElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ); +static uint32_t *CSL_lcdma_ringaccGetRingWrElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ); static void CSL_lcdma_ringaccGetNewElCnt( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); static bool CSL_lcdma_ringaccIsRingEmpty( const CSL_LcdmaRingaccRingCfg *pRing ); static bool CSL_lcdma_ringaccIsRingFull( const CSL_LcdmaRingaccRingCfg *pRing ); -static void *CSL_lcdma_ringaccGetRingDataPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); +static uint64_t *CSL_lcdma_ringaccGetRingDataPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); static int32_t CSL_lcdma_ringaccPush64MultiAccess( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing, uint64_t *pVals, uint32_t numValues, CSL_lcdma_ringaccMemOpsFxnPtr pfMemOps ); static int32_t CSL_lcdma_ringaccPop64MultiAccess( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing, uint64_t *pVals, uint32_t numValues, CSL_lcdma_ringaccMemOpsFxnPtr pfMemOps ); static int32_t CSL_lcdma_ringaccPeek64Access( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing, uint64_t *pVal, CSL_lcdma_ringaccMemOpsFxnPtr pfMemOps ); @@ -89,14 +89,14 @@ static bool bIsPhysBaseOk( const CSL_LcdmaRingaccRingCfg *pRing ) return bRetVal; } -static void *CSL_lcdma_ringaccGetRingRdElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ) +static uint64_t *CSL_lcdma_ringaccGetRingRdElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ) { - return (void *)(((uintptr_t)pRing->rdIdx * pRing->elSz) + (uintptr_t)pRing->virtBase); + return (uint64_t *)(((uintptr_t)pRing->rdIdx * pRing->elSz) + (uintptr_t)pRing->virtBase); } -static void *CSL_lcdma_ringaccGetRingWrElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ) +static uint32_t *CSL_lcdma_ringaccGetRingWrElementAddr( const CSL_LcdmaRingaccRingCfg *pRing ) { - return (void *)(((uintptr_t)pRing->wrIdx * pRing->elSz) + (uintptr_t)pRing->virtBase); + return (uint32_t *)(((uintptr_t)pRing->wrIdx * pRing->elSz) + (uintptr_t)pRing->virtBase); } static void CSL_lcdma_ringaccGetNewElCnt( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) @@ -120,9 +120,9 @@ static bool CSL_lcdma_ringaccIsRingFull( const CSL_LcdmaRingaccRingCfg *pRing ) * This function returns a pointer to the specified ring element only if * the element contains data. If the ring element is empty, NULL is returned. *===========================================================================*/ -static void *CSL_lcdma_ringaccGetRingDataPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) +static uint64_t *CSL_lcdma_ringaccGetRingDataPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) { - void *ptr = NULL; + uint64_t *ptr = NULL; /* If this ring appears empty, then update the occupancy */ if( CSL_lcdma_ringaccIsRingEmpty( pRing ) == (bool)true ) @@ -132,7 +132,7 @@ static void *CSL_lcdma_ringaccGetRingDataPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_Lcd /* Return pointer if not empty */ if( CSL_lcdma_ringaccIsRingEmpty( pRing ) == (bool)false ) { - ptr = (void *)CSL_lcdma_ringaccGetRingRdElementAddr( pRing ); + ptr = CSL_lcdma_ringaccGetRingRdElementAddr( pRing ); } return ptr; } @@ -160,7 +160,7 @@ static int32_t CSL_lcdma_ringaccPush64MultiAccess( CSL_LcdmaRingaccCfg *pCfg, CS { uint32_t i, localWrIdx = pRing->wrIdx; uint64_t *pValsLocal = pVals; - void *pRingEntry; + uint64_t *pRingEntry; if( numValuesWritten > numValues ) { @@ -168,7 +168,7 @@ static int32_t CSL_lcdma_ringaccPush64MultiAccess( CSL_LcdmaRingaccCfg *pCfg, CS } for( i=0U; ielSz) + (uintptr_t)pRing->virtBase); + pRingEntry = (uint64_t *)(((uintptr_t)localWrIdx * pRing->elSz) + (uintptr_t)pRing->virtBase); *(uint64_t *)pRingEntry = *pValsLocal; localWrIdx++; localWrIdx = localWrIdx % pRing->elCnt; @@ -214,7 +214,7 @@ static int32_t CSL_lcdma_ringaccPop64MultiAccess( CSL_LcdmaRingaccCfg *pCfg, CSL { uint32_t i, localRdIdx = pRing->rdIdx; uint64_t *pValsLocal = pVals; - void *pRingEntry; + void *pRingEntry; if( (numValues != 0U) && (numValuesRead > numValues) ) { @@ -256,9 +256,9 @@ static int32_t CSL_lcdma_ringaccPeek64Access( CSL_LcdmaRingaccCfg *pCfg, CSL_Lcd } else { - void *pRingEntry; + uint64_t *pRingEntry; - pRingEntry = (void *)CSL_lcdma_ringaccGetRingDataPtr( pCfg, pRing ); + pRingEntry = CSL_lcdma_ringaccGetRingDataPtr( pCfg, pRing ); if( pRingEntry != NULL ) { /*----------------------------------------------------------------- @@ -384,9 +384,9 @@ void CSL_lcdma_ringaccResetRing( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRing CSL_lcdma_ringaccInitRingObj( pRing->ringNum, pRing ); } -void *CSL_lcdma_ringaccGetForwardRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) +uint32_t *CSL_lcdma_ringaccGetForwardRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) { - void *ptr = NULL; + uint32_t *ptr = NULL; if( CSL_lcdma_ringaccIsRingFull( pRing ) == (bool)true ) { @@ -395,14 +395,14 @@ void *CSL_lcdma_ringaccGetForwardRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRi /* Return pointer if not full */ if( CSL_lcdma_ringaccIsRingFull( pRing ) == (bool)false ) { - ptr = (void *)CSL_lcdma_ringaccGetRingWrElementAddr(pRing); + ptr = CSL_lcdma_ringaccGetRingWrElementAddr(pRing); } return ptr; } -void *CSL_lcdma_ringaccGetReverseRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) +uint64_t *CSL_lcdma_ringaccGetReverseRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ) { - void *ptr = NULL; + uint64_t *ptr = NULL; /* If this ring appears empty, then update the occupancy */ if( CSL_lcdma_ringaccIsRingEmpty( pRing ) == (bool)true ) @@ -412,7 +412,7 @@ void *CSL_lcdma_ringaccGetReverseRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRi /* Return pointer if not empty */ if( CSL_lcdma_ringaccIsRingEmpty( pRing ) == (bool)false ) { - ptr = (void *)CSL_lcdma_ringaccGetRingRdElementAddr(pRing); + ptr = CSL_lcdma_ringaccGetRingRdElementAddr(pRing); } return ptr; } diff --git a/source/drivers/udma/hw_include/csl_lcdma_ringacc.h b/source/drivers/udma/hw_include/csl_lcdma_ringacc.h index 153c84fa6b4..711a6a79e24 100755 --- a/source/drivers/udma/hw_include/csl_lcdma_ringacc.h +++ b/source/drivers/udma/hw_include/csl_lcdma_ringacc.h @@ -258,7 +258,7 @@ typedef struct /** \brief CSL_LcdmaRingaccRingCfg contains information to configure a ring. */ typedef struct { - void *virtBase; /**< [IN] Virtual base address of the ring memory */ + uint64_t *virtBase; /**< [IN] Virtual base address of the ring memory */ uint64_t physBase; /**< [IN] Physical base address of the ring memory */ CSL_LcdmaRingaccRingMode mode; /**< [IN] Ring mode */ uint32_t elCnt; /**< [IN] Ring element count */ @@ -472,7 +472,7 @@ extern void CSL_lcdma_ringaccResetRing( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRing * \return NULL if the ring is full, otherwise a void pointer to the next * free forward ring element */ -extern void *CSL_lcdma_ringaccGetForwardRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); +extern uint32_t *CSL_lcdma_ringaccGetForwardRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); /** * \brief Get pointer to next available reverse ring element. @@ -491,7 +491,7 @@ extern void *CSL_lcdma_ringaccGetForwardRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_ * \return NULL if the ring is empty, otherwise a void pointer to the next * available reverse ring element */ -extern void *CSL_lcdma_ringaccGetReverseRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); +extern uint64_t *CSL_lcdma_ringaccGetReverseRingPtr( CSL_LcdmaRingaccCfg *pCfg, CSL_LcdmaRingaccRingCfg *pRing ); /** * \brief Write to the ring foward doorbell. diff --git a/source/drivers/udma/include/csl_pktdma_cppi5.h b/source/drivers/udma/include/csl_pktdma_cppi5.h index e3c200aabd9..55edd464f32 100755 --- a/source/drivers/udma/include/csl_pktdma_cppi5.h +++ b/source/drivers/udma/include/csl_pktdma_cppi5.h @@ -174,11 +174,11 @@ typedef struct /* Map old CSL_pktdmaMakeAselAddr function to new CSL_pktdmaSetAselInAddr equivalent */ #define CSL_pktdmaMakeAselAddr CSL_pktdmaSetAselInAddr -static inline uint32_t CSL_pktdmaCppi5GetDescType( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetDescType( void *pDesc, uint32_t descType ); -static inline uint32_t CSL_pktdmaCppi5GetPktLen( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetPktLen( void *pDesc, uint32_t descType, uint32_t pktLen ); -static inline void CSL_pktdmaCppi5HostSetPktLen( void *pDesc, uint32_t pktLen ); +static inline uint32_t CSL_pktdmaCppi5GetDescType( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetDescType( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType ); +static inline uint32_t CSL_pktdmaCppi5GetPktLen( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetPktLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType, uint32_t pktLen ); +static inline void CSL_pktdmaCppi5HostSetPktLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t pktLen ); static inline uint64_t CSL_pktdmaCppi5GetBufferAddr( const CSL_PktdmaCppi5HMPD *pDesc ); static inline uint32_t CSL_pktdmaCppi5GetBufferLen( const CSL_PktdmaCppi5HMPD *pDesc ); static inline void CSL_pktdmaCppi5SetBufferAddr( CSL_PktdmaCppi5HMPD *pDesc, uint64_t physBufferAddr ); @@ -186,30 +186,30 @@ static inline void CSL_pktdmaCppi5SetOrgBufferAddr( CSL_PktdmaCppi5HMPD *pD static inline void CSL_pktdmaCppi5SetBufferLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t bufferLenBytes ); static inline void CSL_pktdmaCppi5SetOrgBufferLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t bufferLenBytes ); static inline void CSL_pktdmaCppi5LinkDesc( CSL_PktdmaCppi5HMPD *pDesc, uint64_t physBufferDescAddr ); -static inline bool CSL_pktdmaCppi5IsEpiDataPresent( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetEpiDataPresent( void *pDesc, bool bEpiDataPresent ); -static inline uint32_t *CSL_pktdmaCppi5GetEpiDataPtr( const void *pDesc ); -static inline int32_t CSL_pktdmaCppi5RdEpiData( const void *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ); -static inline void CSL_pktdmaCppi5WrEpiData( const void *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ); -static inline uint32_t CSL_pktdmaCppi5GetPsDataLoc( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetPsDataLoc( void *pDesc, uint32_t psLoc ); -static inline uint32_t CSL_pktdmaCppi5GetPsDataLen( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetPsDataLen( void *pDesc, uint32_t psDataLen ); -static inline uint64_t CSL_pktdmaCppi5GetPsDataAddr( const void *pDesc, bool bInSopBuf, bool bEpiPresent ); -static inline uint8_t *CSL_pktdmaCppi5GetPsDataPtr( const void *pDesc ); -static inline uint32_t CSL_pktdmaCppi5GetSrcTag( const void *pDesc ); -static inline uint32_t CSL_pktdmaCppi5GetDstTag( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetSrcTag( void *pDesc, uint32_t srcTag ); -static inline void CSL_pktdmaCppi5SetDstTag( void *pDesc, uint32_t dstTag ); -static inline uint32_t CSL_pktdmaCppi5GetErrorFlags( const void *pDesc ); -static inline uint32_t CSL_pktdmaCppi5GetPsFlags( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetPsFlags( void *pDesc, uint32_t psFlags ); -static inline uint32_t CSL_pktdmaCppi5GetPktType( const void *pDesc ); -static inline void CSL_pktdmaCppi5SetPktType( void *pDesc, uint32_t pktType ); -static inline void CSL_pktdmaCppi5GetIds( const void *pDesc, uint32_t *pPktId, uint32_t *pFlowId ); -static inline void CSL_pktdmaCppi5SetIds( void *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ); -static inline void CSL_pktdmaCppi5GetReturnPolicy( const void *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ); -static inline void CSL_pktdmaCppi5SetReturnPolicy( void *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ); +static inline bool CSL_pktdmaCppi5IsEpiDataPresent( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetEpiDataPresent( CSL_PktdmaCppi5HMPD *pDesc, bool bEpiDataPresent ); +static inline uint32_t *CSL_pktdmaCppi5GetEpiDataPtr( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline int32_t CSL_pktdmaCppi5RdEpiData( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ); +static inline void CSL_pktdmaCppi5WrEpiData( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ); +static inline uint32_t CSL_pktdmaCppi5GetPsDataLoc( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetPsDataLoc( CSL_PktdmaCppi5HMPD *pDesc, uint32_t psLoc ); +static inline uint32_t CSL_pktdmaCppi5GetPsDataLen( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetPsDataLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t psDataLen ); +static inline uint64_t CSL_pktdmaCppi5GetPsDataAddr( const CSL_PktdmaCppi5HMPD *pDesc, bool bInSopBuf, bool bEpiPresent ); +static inline uint8_t *CSL_pktdmaCppi5GetPsDataPtr( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline uint32_t CSL_pktdmaCppi5GetSrcTag( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline uint32_t CSL_pktdmaCppi5GetDstTag( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetSrcTag( CSL_PktdmaCppi5HMPD *pDesc, uint32_t srcTag ); +static inline void CSL_pktdmaCppi5SetDstTag( CSL_PktdmaCppi5HMPD *pDesc, uint32_t dstTag ); +static inline uint32_t CSL_pktdmaCppi5GetErrorFlags( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline uint32_t CSL_pktdmaCppi5GetPsFlags( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetPsFlags( CSL_PktdmaCppi5HMPD *pDesc, uint32_t psFlags ); +static inline uint32_t CSL_pktdmaCppi5GetPktType( const CSL_PktdmaCppi5HMPD *pDesc ); +static inline void CSL_pktdmaCppi5SetPktType( CSL_PktdmaCppi5HMPD *pDesc, uint32_t pktType ); +static inline void CSL_pktdmaCppi5GetIds( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t *pPktId, uint32_t *pFlowId ); +static inline void CSL_pktdmaCppi5SetIds( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ); +static inline void CSL_pktdmaCppi5GetReturnPolicy( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ); +static inline void CSL_pktdmaCppi5SetReturnPolicy( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ); static inline uint64_t CSL_pktdmaClrAselInAddr( uint64_t addr ); static inline uint64_t CSL_pktdmaSetAselInAddr( uint64_t addr, uint32_t asel ); @@ -223,7 +223,7 @@ static inline uint64_t CSL_pktdmaSetAselInAddr( uint64_t addr, uint32_t asel ); * * \return Descriptor type */ -static inline uint32_t CSL_pktdmaCppi5GetDescType( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetDescType( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_DTYPE ); } @@ -242,7 +242,7 @@ static inline uint32_t CSL_pktdmaCppi5GetDescType( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetDescType( void *pDesc, uint32_t descType ) +static inline void CSL_pktdmaCppi5SetDescType( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_DTYPE, descType ); } @@ -260,7 +260,7 @@ static inline void CSL_pktdmaCppi5SetDescType( void *pDesc, uint32_t descType ) * * \return Packet length */ -static inline uint32_t CSL_pktdmaCppi5GetPktLen( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetPktLen( const CSL_PktdmaCppi5HMPD *pDesc ) { uint32_t pktLen; @@ -283,7 +283,7 @@ static inline uint32_t CSL_pktdmaCppi5GetPktLen( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetPktLen( void *pDesc, uint32_t descType, uint32_t pktLen ) +static inline void CSL_pktdmaCppi5SetPktLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType, uint32_t pktLen ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_PKTLEN, pktLen ); } @@ -298,7 +298,7 @@ static inline void CSL_pktdmaCppi5SetPktLen( void *pDesc, uint32_t descType, uin * * \return None */ -static inline void CSL_pktdmaCppi5HostSetPktLen( void *pDesc, uint32_t pktLen ) +static inline void CSL_pktdmaCppi5HostSetPktLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t pktLen ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_PKTLEN, pktLen ); } @@ -450,7 +450,7 @@ static inline void CSL_pktdmaCppi5LinkDesc( CSL_PktdmaCppi5HMPD *pDesc, uint64_t * \return true = EPI block is present in the descriptor * false = EPI block is not present in the descriptor */ -static inline bool CSL_pktdmaCppi5IsEpiDataPresent( const void *pDesc ) +static inline bool CSL_pktdmaCppi5IsEpiDataPresent( const CSL_PktdmaCppi5HMPD *pDesc ) { uint32_t fieldVal; @@ -471,7 +471,7 @@ static inline bool CSL_pktdmaCppi5IsEpiDataPresent( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetEpiDataPresent( void *pDesc, bool bEpiDataPresent ) +static inline void CSL_pktdmaCppi5SetEpiDataPresent( CSL_PktdmaCppi5HMPD *pDesc, bool bEpiDataPresent ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_EINFO, bEpiDataPresent==(bool)true ? (uint32_t)1U : (uint32_t)0U ); } @@ -490,7 +490,7 @@ static inline void CSL_pktdmaCppi5SetEpiDataPresent( void *pDesc, bool bEpiDataP * \return A pointer to the EPI block data within the descriptor is returned, * or NULL is the EPI block is not present in the descriptor */ -static inline uint32_t *CSL_pktdmaCppi5GetEpiDataPtr( const void *pDesc ) +static inline uint32_t *CSL_pktdmaCppi5GetEpiDataPtr( const CSL_PktdmaCppi5HMPD *pDesc ) { uint32_t *pEpiData = NULL; @@ -518,7 +518,7 @@ static inline uint32_t *CSL_pktdmaCppi5GetEpiDataPtr( const void *pDesc ) * \return 0 = success * -1 = No EPI block data is present in the descriptor */ -static inline int32_t CSL_pktdmaCppi5RdEpiData( const void *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ) +static inline int32_t CSL_pktdmaCppi5RdEpiData( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ) { int32_t retVal = -1; uint32_t *pSrcEpiData = CSL_pktdmaCppi5GetEpiDataPtr(pDesc); @@ -550,7 +550,7 @@ static inline int32_t CSL_pktdmaCppi5RdEpiData( const void *pDesc, uint32_t *pTs * * \return None */ -static inline void CSL_pktdmaCppi5WrEpiData( const void *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ) +static inline void CSL_pktdmaCppi5WrEpiData( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ) { uint32_t *pDstEpiData = CSL_pktdmaCppi5GetEpiDataPtr(pDesc); @@ -572,7 +572,7 @@ static inline void CSL_pktdmaCppi5WrEpiData( const void *pDesc, uint32_t tsInfo, * * \return 0 = Protocol-specific data is in the descriptor */ -static inline uint32_t CSL_pktdmaCppi5GetPsDataLoc( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetPsDataLoc( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)0U; } @@ -589,7 +589,7 @@ static inline uint32_t CSL_pktdmaCppi5GetPsDataLoc( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetPsDataLoc( void *pDesc, uint32_t psLoc ) +static inline void CSL_pktdmaCppi5SetPsDataLoc( CSL_PktdmaCppi5HMPD *pDesc, uint32_t psLoc ) { } @@ -605,7 +605,7 @@ static inline void CSL_pktdmaCppi5SetPsDataLoc( void *pDesc, uint32_t psLoc ) * * \return The number of bytes of ps data is returned */ -static inline uint32_t CSL_pktdmaCppi5GetPsDataLen( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetPsDataLen( const CSL_PktdmaCppi5HMPD *pDesc ) { return ((uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_PSWCNT )) * 4U; } @@ -625,7 +625,7 @@ static inline uint32_t CSL_pktdmaCppi5GetPsDataLen( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetPsDataLen( void *pDesc, uint32_t psDataLen ) +static inline void CSL_pktdmaCppi5SetPsDataLen( CSL_PktdmaCppi5HMPD *pDesc, uint32_t psDataLen ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->descInfo, PKTDMA_CPPI5_PD_DESCINFO_PSWCNT, (psDataLen/4U) ); } @@ -651,7 +651,7 @@ static inline void CSL_pktdmaCppi5SetPsDataLen( void *pDesc, uint32_t psDataLen * * \return Address of the protocol-specific data */ -static inline uint64_t CSL_pktdmaCppi5GetPsDataAddr( const void *pDesc, bool bInSopBuf, bool bEpiPresent ) +static inline uint64_t CSL_pktdmaCppi5GetPsDataAddr( const CSL_PktdmaCppi5HMPD *pDesc, bool bInSopBuf, bool bEpiPresent ) { uint64_t psDataAddr; uint32_t epiDataSize; @@ -672,7 +672,7 @@ static inline uint64_t CSL_pktdmaCppi5GetPsDataAddr( const void *pDesc, bool bIn * * \return Pointer to the protocol-specific data (NULL if no protocol-specific data is available) */ -static inline uint8_t *CSL_pktdmaCppi5GetPsDataPtr( const void *pDesc ) +static inline uint8_t *CSL_pktdmaCppi5GetPsDataPtr( const CSL_PktdmaCppi5HMPD *pDesc ) { uint8_t *pPsData = NULL; uint32_t psDataLen; @@ -698,7 +698,7 @@ static inline uint8_t *CSL_pktdmaCppi5GetPsDataPtr( const void *pDesc ) * * \return Source tag */ -static inline uint32_t CSL_pktdmaCppi5GetSrcTag( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetSrcTag( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->srcDstTag, PKTDMA_CPPI5_PD_SRCDSTTAG_SRCTAG ); } @@ -712,7 +712,7 @@ static inline uint32_t CSL_pktdmaCppi5GetSrcTag( const void *pDesc ) * * \return Destination tag */ -static inline uint32_t CSL_pktdmaCppi5GetDstTag( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetDstTag( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->srcDstTag, PKTDMA_CPPI5_PD_SRCDSTTAG_DSTTAG ); } @@ -727,7 +727,7 @@ static inline uint32_t CSL_pktdmaCppi5GetDstTag( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetSrcTag( void *pDesc, uint32_t srcTag ) +static inline void CSL_pktdmaCppi5SetSrcTag( CSL_PktdmaCppi5HMPD *pDesc, uint32_t srcTag ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->srcDstTag, PKTDMA_CPPI5_PD_SRCDSTTAG_SRCTAG, srcTag ); } @@ -742,7 +742,7 @@ static inline void CSL_pktdmaCppi5SetSrcTag( void *pDesc, uint32_t srcTag ) * * \return None */ -static inline void CSL_pktdmaCppi5SetDstTag( void *pDesc, uint32_t dstTag ) +static inline void CSL_pktdmaCppi5SetDstTag( CSL_PktdmaCppi5HMPD *pDesc, uint32_t dstTag ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->srcDstTag, PKTDMA_CPPI5_PD_SRCDSTTAG_DSTTAG, dstTag ); } @@ -758,7 +758,7 @@ static inline void CSL_pktdmaCppi5SetDstTag( void *pDesc, uint32_t dstTag ) * * \return The error flags are returned */ -static inline uint32_t CSL_pktdmaCppi5GetErrorFlags( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetErrorFlags( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->pktInfo1, PKTDMA_CPPI5_PD_PKTINFO1_PKTERROR ); } @@ -774,7 +774,7 @@ static inline uint32_t CSL_pktdmaCppi5GetErrorFlags( const void *pDesc ) * * \return The protocol-specific (ps) flags are returned */ -static inline uint32_t CSL_pktdmaCppi5GetPsFlags( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetPsFlags( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->pktInfo1, PKTDMA_CPPI5_PD_PKTINFO1_PSFLGS ); } @@ -791,7 +791,7 @@ static inline uint32_t CSL_pktdmaCppi5GetPsFlags( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetPsFlags( void *pDesc, uint32_t psFlags ) +static inline void CSL_pktdmaCppi5SetPsFlags( CSL_PktdmaCppi5HMPD *pDesc, uint32_t psFlags ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->pktInfo1, PKTDMA_CPPI5_PD_PKTINFO1_PSFLGS, psFlags ); } @@ -807,7 +807,7 @@ static inline void CSL_pktdmaCppi5SetPsFlags( void *pDesc, uint32_t psFlags ) * * \return Packet type */ -static inline uint32_t CSL_pktdmaCppi5GetPktType( const void *pDesc ) +static inline uint32_t CSL_pktdmaCppi5GetPktType( const CSL_PktdmaCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->pktInfo2, PKTDMA_CPPI5_PD_PKTINFO2_PKTTYPE ); } @@ -824,7 +824,7 @@ static inline uint32_t CSL_pktdmaCppi5GetPktType( const void *pDesc ) * * \return None */ -static inline void CSL_pktdmaCppi5SetPktType( void *pDesc, uint32_t pktType ) +static inline void CSL_pktdmaCppi5SetPktType( CSL_PktdmaCppi5HMPD *pDesc, uint32_t pktType ) { CSL_FINS( ((CSL_PktdmaCppi5HMPD *)pDesc)->pktInfo2, PKTDMA_CPPI5_PD_PKTINFO2_PKTTYPE, pktType ); } @@ -840,7 +840,7 @@ static inline void CSL_pktdmaCppi5SetPktType( void *pDesc, uint32_t pktType ) * * \return None */ -static inline void CSL_pktdmaCppi5GetIds( const void *pDesc, uint32_t *pPktId, uint32_t *pFlowId ) +static inline void CSL_pktdmaCppi5GetIds( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t *pPktId, uint32_t *pFlowId ) { *pPktId = (uint32_t) 0U; *pFlowId = CSL_FEXT( ((const CSL_PktdmaCppi5HMPD *)pDesc)->pktInfo1, PKTDMA_CPPI5_PD_PKTINFO1_FLOWID ); @@ -858,7 +858,7 @@ static inline void CSL_pktdmaCppi5GetIds( const void *pDesc, uint32_t *pPktId, u * * \return None */ -static inline void CSL_pktdmaCppi5SetIds( void *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ) +static inline void CSL_pktdmaCppi5SetIds( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ) { uint32_t v; @@ -885,7 +885,7 @@ static inline void CSL_pktdmaCppi5SetIds( void *pDesc, uint32_t descType, uint32 * * \return None */ -static inline void CSL_pktdmaCppi5GetReturnPolicy( const void *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ) +static inline void CSL_pktdmaCppi5GetReturnPolicy( const CSL_PktdmaCppi5HMPD *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ) { *pRetPolicy = (uint32_t)0U; *pEarlyReturn = (uint32_t)0U; @@ -910,7 +910,7 @@ static inline void CSL_pktdmaCppi5GetReturnPolicy( const void *pDesc, uint32_t * * * \return None */ -static inline void CSL_pktdmaCppi5SetReturnPolicy( void *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ) +static inline void CSL_pktdmaCppi5SetReturnPolicy( CSL_PktdmaCppi5HMPD *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ) { } diff --git a/source/drivers/udma/include/csl_udmap_cppi5.h b/source/drivers/udma/include/csl_udmap_cppi5.h index 71f492ce7f1..22f386121db 100755 --- a/source/drivers/udma/include/csl_udmap_cppi5.h +++ b/source/drivers/udma/include/csl_udmap_cppi5.h @@ -252,13 +252,13 @@ typedef struct * \addtogroup CSL_UDMAP_CPPI5_FUNCTION * @{ */ -static inline uint32_t CSL_udmapCppi5GetDescType( const void *pDesc ); -static inline void CSL_udmapCppi5SetDescType( void *pDesc, uint32_t descType ); -static inline uint32_t CSL_udmapCppi5GetPktLen( const void *pDesc ); -static inline void CSL_udmapCppi5SetPktLen( void *pDesc, uint32_t descType, uint32_t pktLen ); -static inline void CSL_udmapCppi5HostSetPktLen( void *pDesc, uint32_t pktLen ); -static inline void CSL_udmapCppi5MonoSetPktLen( void *pDesc, uint32_t pktLen ); -static inline void CSL_udmapCppi5TrSetPktLen( void *pDesc, uint32_t pktLen ); +static inline uint32_t CSL_udmapCppi5GetDescType( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetDescType( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType ); +static inline uint32_t CSL_udmapCppi5GetPktLen( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType, uint32_t pktLen ); +static inline void CSL_udmapCppi5HostSetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktLen ); +static inline void CSL_udmapCppi5MonoSetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktLen ); +static inline void CSL_udmapCppi5TrSetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktLen ); static inline uint64_t CSL_udmapCppi5GetBufferAddr( const CSL_UdmapCppi5HMPD *pDesc ); static inline uint32_t CSL_udmapCppi5GetBufferLen( const CSL_UdmapCppi5HMPD *pDesc ); static inline void CSL_udmapCppi5SetBufferAddr( CSL_UdmapCppi5HMPD *pDesc, uint64_t physBufferAddr ); @@ -266,30 +266,30 @@ static inline void CSL_udmapCppi5SetOrgBufferAddr( CSL_UdmapCppi5HMPD *pDes static inline void CSL_udmapCppi5SetBufferLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t bufferLenBytes ); static inline void CSL_udmapCppi5SetOrgBufferLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t bufferLenBytes ); static inline void CSL_udmapCppi5LinkDesc( CSL_UdmapCppi5HMPD *pDesc, uint64_t physBufferDescAddr ); -static inline bool CSL_udmapCppi5IsEpiDataPresent( const void *pDesc ); -static inline void CSL_udmapCppi5SetEpiDataPresent( void *pDesc, bool bEpiDataPresent ); -static inline uint32_t *CSL_udmapCppi5GetEpiDataPtr( const void *pDesc ); -static inline int32_t CSL_udmapCppi5RdEpiData( const void *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ); -static inline void CSL_udmapCppi5WrEpiData( const void *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ); -static inline uint32_t CSL_udmapCppi5GetPsDataLoc( const void *pDesc ); -static inline void CSL_udmapCppi5SetPsDataLoc( void *pDesc, uint32_t psLoc ); -static inline uint32_t CSL_udmapCppi5GetPsDataLen( const void *pDesc ); -static inline void CSL_udmapCppi5SetPsDataLen( void *pDesc, uint32_t psDataLen ); -static inline uint64_t CSL_udmapCppi5GetPsDataAddr( const void *pDesc, bool bInSopBuf, bool bEpiPresent ); -static inline uint8_t *CSL_udmapCppi5GetPsDataPtr( const void *pDesc ); -static inline uint32_t CSL_udmapCppi5GetSrcTag( const void *pDesc ); -static inline uint32_t CSL_udmapCppi5GetDstTag( const void *pDesc ); -static inline void CSL_udmapCppi5SetSrcTag( void *pDesc, uint32_t srcTag ); -static inline void CSL_udmapCppi5SetDstTag( void *pDesc, uint32_t dstTag ); -static inline uint32_t CSL_udmapCppi5GetErrorFlags( const void *pDesc ); -static inline uint32_t CSL_udmapCppi5GetPsFlags( const void *pDesc ); -static inline void CSL_udmapCppi5SetPsFlags( void *pDesc, uint32_t psFlags ); -static inline uint32_t CSL_udmapCppi5GetPktType( const void *pDesc ); -static inline void CSL_udmapCppi5SetPktType( void *pDesc, uint32_t pktType ); -static inline void CSL_udmapCppi5GetIds( const void *pDesc, uint32_t *pPktId, uint32_t *pFlowId ); -static inline void CSL_udmapCppi5SetIds( void *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ); -static inline void CSL_udmapCppi5GetReturnPolicy( const void *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ); -static inline void CSL_udmapCppi5SetReturnPolicy( void *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ); +static inline bool CSL_udmapCppi5IsEpiDataPresent( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetEpiDataPresent( CSL_UdmapCppi5HMPD *pDesc, bool bEpiDataPresent ); +static inline uint32_t *CSL_udmapCppi5GetEpiDataPtr( const CSL_UdmapCppi5HMPD *pDesc ); +static inline int32_t CSL_udmapCppi5RdEpiData( const CSL_UdmapCppi5HMPD *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ); +static inline void CSL_udmapCppi5WrEpiData( const CSL_UdmapCppi5HMPD *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ); +static inline uint32_t CSL_udmapCppi5GetPsDataLoc( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetPsDataLoc( CSL_UdmapCppi5HMPD *pDesc, uint32_t psLoc ); +static inline uint32_t CSL_udmapCppi5GetPsDataLen( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetPsDataLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t psDataLen ); +static inline uint64_t CSL_udmapCppi5GetPsDataAddr( const CSL_UdmapCppi5HMPD *pDesc, bool bInSopBuf, bool bEpiPresent ); +static inline uint8_t *CSL_udmapCppi5GetPsDataPtr( const CSL_UdmapCppi5HMPD *pDesc ); +static inline uint32_t CSL_udmapCppi5GetSrcTag( const CSL_UdmapCppi5HMPD *pDesc ); +static inline uint32_t CSL_udmapCppi5GetDstTag( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetSrcTag( CSL_UdmapCppi5HMPD *pDesc, uint32_t srcTag ); +static inline void CSL_udmapCppi5SetDstTag( CSL_UdmapCppi5HMPD *pDesc, uint32_t dstTag ); +static inline uint32_t CSL_udmapCppi5GetErrorFlags( const CSL_UdmapCppi5HMPD *pDesc ); +static inline uint32_t CSL_udmapCppi5GetPsFlags( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetPsFlags( CSL_UdmapCppi5HMPD *pDesc, uint32_t psFlags ); +static inline uint32_t CSL_udmapCppi5GetPktType( const CSL_UdmapCppi5HMPD *pDesc ); +static inline void CSL_udmapCppi5SetPktType( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktType ); +static inline void CSL_udmapCppi5GetIds( const CSL_UdmapCppi5HMPD *pDesc, uint32_t *pPktId, uint32_t *pFlowId ); +static inline void CSL_udmapCppi5SetIds( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ); +static inline void CSL_udmapCppi5GetReturnPolicy( const CSL_UdmapCppi5HMPD *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ); +static inline void CSL_udmapCppi5SetReturnPolicy( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ); static inline uint32_t CSL_udmapCppi5MonoGetDataOffset( const CSL_UdmapCppi5MMPD *pDesc ); static inline void CSL_udmapCppi5MonoSetDataOffset( CSL_UdmapCppi5MMPD *pDesc, uint32_t dataOffset ); static inline void CSL_udmapCppi5TrGetReload( const CSL_UdmapCppi5TRPD *pDesc, uint32_t *pReloadEnable, uint32_t *pReloadIdx ); @@ -309,7 +309,7 @@ static inline void CSL_udmapCppi5TrSetEntryStride( CSL_UdmapCppi5TRPD *pDes * * \return Descriptor type */ -static inline uint32_t CSL_udmapCppi5GetDescType( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetDescType( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_DTYPE ); } @@ -330,7 +330,7 @@ static inline uint32_t CSL_udmapCppi5GetDescType( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetDescType( void *pDesc, uint32_t descType ) +static inline void CSL_udmapCppi5SetDescType( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_DTYPE, descType ); } @@ -351,7 +351,7 @@ static inline void CSL_udmapCppi5SetDescType( void *pDesc, uint32_t descType ) * * \return Packet length */ -static inline uint32_t CSL_udmapCppi5GetPktLen( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetPktLen( const CSL_UdmapCppi5HMPD *pDesc ) { uint32_t pktLen; uint32_t descType = CSL_udmapCppi5GetDescType( pDesc ); @@ -390,7 +390,7 @@ static inline uint32_t CSL_udmapCppi5GetPktLen( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetPktLen( void *pDesc, uint32_t descType, uint32_t pktLen ) +static inline void CSL_udmapCppi5SetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType, uint32_t pktLen ) { if( (descType == CSL_UDMAP_CPPI5_PD_DESCINFO_DTYPE_VAL_HOST) || (descType == CSL_UDMAP_CPPI5_PD_DESCINFO_DTYPE_VAL_MONO) ) @@ -413,7 +413,7 @@ static inline void CSL_udmapCppi5SetPktLen( void *pDesc, uint32_t descType, uint * * \return None */ -static inline void CSL_udmapCppi5HostSetPktLen( void *pDesc, uint32_t pktLen ) +static inline void CSL_udmapCppi5HostSetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktLen ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_PKTLEN, pktLen ); } @@ -428,7 +428,7 @@ static inline void CSL_udmapCppi5HostSetPktLen( void *pDesc, uint32_t pktLen ) * * \return None */ -static inline void CSL_udmapCppi5MonoSetPktLen( void *pDesc, uint32_t pktLen ) +static inline void CSL_udmapCppi5MonoSetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktLen ) { CSL_FINS( ((CSL_UdmapCppi5MMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_PKTLEN, pktLen ); } @@ -443,7 +443,7 @@ static inline void CSL_udmapCppi5MonoSetPktLen( void *pDesc, uint32_t pktLen ) * * \return None */ -static inline void CSL_udmapCppi5TrSetPktLen( void *pDesc, uint32_t pktLen ) +static inline void CSL_udmapCppi5TrSetPktLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktLen ) { CSL_FINS( ((CSL_UdmapCppi5TRPD *)pDesc)->descInfo, UDMAP_CPPI5_TRPD_DESCINFO_LASTIDX, pktLen-1U ); } @@ -613,7 +613,7 @@ static inline void CSL_udmapCppi5LinkDesc( CSL_UdmapCppi5HMPD *pDesc, uint64_t p * \return true = EPI block is present in the descriptor * false = EPI block is not present in the descriptor */ -static inline bool CSL_udmapCppi5IsEpiDataPresent( const void *pDesc ) +static inline bool CSL_udmapCppi5IsEpiDataPresent( const CSL_UdmapCppi5HMPD *pDesc ) { uint32_t fieldVal; @@ -635,7 +635,7 @@ static inline bool CSL_udmapCppi5IsEpiDataPresent( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetEpiDataPresent( void *pDesc, bool bEpiDataPresent ) +static inline void CSL_udmapCppi5SetEpiDataPresent( CSL_UdmapCppi5HMPD *pDesc, bool bEpiDataPresent ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_EINFO, (bEpiDataPresent==(bool)true) ? (uint32_t)1U : (uint32_t)0U ); } @@ -654,7 +654,7 @@ static inline void CSL_udmapCppi5SetEpiDataPresent( void *pDesc, bool bEpiDataPr * \return A pointer to the EPI block data within the descriptor is returned, * or NULL is the EPI block is not present in the descriptor */ -static inline uint32_t *CSL_udmapCppi5GetEpiDataPtr( const void *pDesc ) +static inline uint32_t *CSL_udmapCppi5GetEpiDataPtr( const CSL_UdmapCppi5HMPD *pDesc ) { uint32_t *pEpiData = NULL; @@ -692,7 +692,7 @@ static inline uint32_t *CSL_udmapCppi5GetEpiDataPtr( const void *pDesc ) * \return 0 = success * -1 = No EPI block data is present in the descriptor */ -static inline int32_t CSL_udmapCppi5RdEpiData( const void *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ) +static inline int32_t CSL_udmapCppi5RdEpiData( const CSL_UdmapCppi5HMPD *pDesc, uint32_t *pTsInfo, uint32_t *pSwInfo0, uint32_t *pSwInfo1, uint32_t *pSwInfo2 ) { int32_t retVal = -1; uint32_t *pSrcEpiData = CSL_udmapCppi5GetEpiDataPtr(pDesc); @@ -725,7 +725,7 @@ static inline int32_t CSL_udmapCppi5RdEpiData( const void *pDesc, uint32_t *pTsI * * \return None */ -static inline void CSL_udmapCppi5WrEpiData( const void *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ) +static inline void CSL_udmapCppi5WrEpiData( const CSL_UdmapCppi5HMPD *pDesc, uint32_t tsInfo, uint32_t swInfo0, uint32_t swInfo1, uint32_t swInfo2 ) { uint32_t *pDstEpiData = CSL_udmapCppi5GetEpiDataPtr(pDesc); @@ -751,7 +751,7 @@ static inline void CSL_udmapCppi5WrEpiData( const void *pDesc, uint32_t tsInfo, * \return 0 = Protocol-specific data is in the descriptor * 1 = Protocol-specific data is in the SOP buffer */ -static inline uint32_t CSL_udmapCppi5GetPsDataLoc( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetPsDataLoc( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_PSINFO ); } @@ -770,7 +770,7 @@ static inline uint32_t CSL_udmapCppi5GetPsDataLoc( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetPsDataLoc( void *pDesc, uint32_t psLoc ) +static inline void CSL_udmapCppi5SetPsDataLoc( CSL_UdmapCppi5HMPD *pDesc, uint32_t psLoc ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_PSINFO, psLoc ); } @@ -788,7 +788,7 @@ static inline void CSL_udmapCppi5SetPsDataLoc( void *pDesc, uint32_t psLoc ) * * \return The number of bytes of ps data is returned */ -static inline uint32_t CSL_udmapCppi5GetPsDataLen( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetPsDataLen( const CSL_UdmapCppi5HMPD *pDesc ) { return ((uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_PSWCNT )) * 4U; } @@ -809,7 +809,7 @@ static inline uint32_t CSL_udmapCppi5GetPsDataLen( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetPsDataLen( void *pDesc, uint32_t psDataLen ) +static inline void CSL_udmapCppi5SetPsDataLen( CSL_UdmapCppi5HMPD *pDesc, uint32_t psDataLen ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->descInfo, UDMAP_CPPI5_PD_DESCINFO_PSWCNT, (psDataLen/4U) ); } @@ -833,7 +833,7 @@ static inline void CSL_udmapCppi5SetPsDataLen( void *pDesc, uint32_t psDataLen ) * * \return Address of the protocol-specific data */ -static inline uint64_t CSL_udmapCppi5GetPsDataAddr( const void *pDesc, bool bInSopBuf, bool bEpiPresent ) +static inline uint64_t CSL_udmapCppi5GetPsDataAddr( const CSL_UdmapCppi5HMPD *pDesc, bool bInSopBuf, bool bEpiPresent ) { uint64_t psDataAddr; uint32_t descType = CSL_udmapCppi5GetDescType( pDesc ); @@ -862,7 +862,7 @@ static inline uint64_t CSL_udmapCppi5GetPsDataAddr( const void *pDesc, bool bInS return psDataAddr; } -static inline uint8_t *CSL_udmapCppi5GetPsDataPtr( const void *pDesc ) +static inline uint8_t *CSL_udmapCppi5GetPsDataPtr( const CSL_UdmapCppi5HMPD *pDesc ) { uint8_t *pPsData = NULL; uint32_t psDataLen; @@ -906,7 +906,7 @@ static inline uint8_t *CSL_udmapCppi5GetPsDataPtr( const void *pDesc ) * * \return Source tag */ -static inline uint32_t CSL_udmapCppi5GetSrcTag( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetSrcTag( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->srcDstTag, UDMAP_CPPI5_PD_SRCDSTTAG_SRCTAG ); } @@ -920,7 +920,7 @@ static inline uint32_t CSL_udmapCppi5GetSrcTag( const void *pDesc ) * * \return Destination tag */ -static inline uint32_t CSL_udmapCppi5GetDstTag( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetDstTag( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->srcDstTag, UDMAP_CPPI5_PD_SRCDSTTAG_DSTTAG ); } @@ -935,7 +935,7 @@ static inline uint32_t CSL_udmapCppi5GetDstTag( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetSrcTag( void *pDesc, uint32_t srcTag ) +static inline void CSL_udmapCppi5SetSrcTag( CSL_UdmapCppi5HMPD *pDesc, uint32_t srcTag ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->srcDstTag, UDMAP_CPPI5_PD_SRCDSTTAG_SRCTAG, srcTag ); } @@ -950,7 +950,7 @@ static inline void CSL_udmapCppi5SetSrcTag( void *pDesc, uint32_t srcTag ) * * \return None */ -static inline void CSL_udmapCppi5SetDstTag( void *pDesc, uint32_t dstTag ) +static inline void CSL_udmapCppi5SetDstTag( CSL_UdmapCppi5HMPD *pDesc, uint32_t dstTag ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->srcDstTag, UDMAP_CPPI5_PD_SRCDSTTAG_DSTTAG, dstTag ); } @@ -967,7 +967,7 @@ static inline void CSL_udmapCppi5SetDstTag( void *pDesc, uint32_t dstTag ) * * \return The error flags are returned */ -static inline uint32_t CSL_udmapCppi5GetErrorFlags( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetErrorFlags( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->pktInfo1, UDMAP_CPPI5_PD_PKTINFO1_PKTERROR ); } @@ -984,7 +984,7 @@ static inline uint32_t CSL_udmapCppi5GetErrorFlags( const void *pDesc ) * * \return The protocol-specific (ps) flags are returned */ -static inline uint32_t CSL_udmapCppi5GetPsFlags( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetPsFlags( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->pktInfo1, UDMAP_CPPI5_PD_PKTINFO1_PSFLGS ); } @@ -1002,7 +1002,7 @@ static inline uint32_t CSL_udmapCppi5GetPsFlags( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetPsFlags( void *pDesc, uint32_t psFlags ) +static inline void CSL_udmapCppi5SetPsFlags( CSL_UdmapCppi5HMPD *pDesc, uint32_t psFlags ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->pktInfo1, UDMAP_CPPI5_PD_PKTINFO1_PSFLGS, psFlags ); } @@ -1019,7 +1019,7 @@ static inline void CSL_udmapCppi5SetPsFlags( void *pDesc, uint32_t psFlags ) * * \return Packet type */ -static inline uint32_t CSL_udmapCppi5GetPktType( const void *pDesc ) +static inline uint32_t CSL_udmapCppi5GetPktType( const CSL_UdmapCppi5HMPD *pDesc ) { return (uint32_t)CSL_FEXT( ((const CSL_UdmapCppi5HMPD *)pDesc)->pktInfo2, UDMAP_CPPI5_PD_PKTINFO2_PKTTYPE ); } @@ -1037,7 +1037,7 @@ static inline uint32_t CSL_udmapCppi5GetPktType( const void *pDesc ) * * \return None */ -static inline void CSL_udmapCppi5SetPktType( void *pDesc, uint32_t pktType ) +static inline void CSL_udmapCppi5SetPktType( CSL_UdmapCppi5HMPD *pDesc, uint32_t pktType ) { CSL_FINS( ((CSL_UdmapCppi5HMPD *)pDesc)->pktInfo2, UDMAP_CPPI5_PD_PKTINFO2_PKTTYPE, pktType ); } @@ -1053,7 +1053,7 @@ static inline void CSL_udmapCppi5SetPktType( void *pDesc, uint32_t pktType ) * * \return None */ -static inline void CSL_udmapCppi5GetIds( const void *pDesc, uint32_t *pPktId, uint32_t *pFlowId ) +static inline void CSL_udmapCppi5GetIds( const CSL_UdmapCppi5HMPD *pDesc, uint32_t *pPktId, uint32_t *pFlowId ) { uint32_t descType = CSL_udmapCppi5GetDescType( pDesc ); @@ -1081,7 +1081,7 @@ static inline void CSL_udmapCppi5GetIds( const void *pDesc, uint32_t *pPktId, ui * * \return None */ -static inline void CSL_udmapCppi5SetIds( void *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ) +static inline void CSL_udmapCppi5SetIds( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType, uint32_t pktId, uint32_t flowId ) { uint32_t v; @@ -1120,7 +1120,7 @@ static inline void CSL_udmapCppi5SetIds( void *pDesc, uint32_t descType, uint32_ * * \return None */ -static inline void CSL_udmapCppi5GetReturnPolicy( const void *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ) +static inline void CSL_udmapCppi5GetReturnPolicy( const CSL_UdmapCppi5HMPD *pDesc, uint32_t *pRetPolicy, uint32_t *pEarlyReturn, uint32_t *pRetPushPolicy, uint32_t *pRetQnum ) { uint32_t descType = CSL_udmapCppi5GetDescType( pDesc ); @@ -1184,7 +1184,7 @@ static inline void CSL_udmapCppi5GetReturnPolicy( const void *pDesc, uint32_t *p * * \return None */ -static inline void CSL_udmapCppi5SetReturnPolicy( void *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ) +static inline void CSL_udmapCppi5SetReturnPolicy( CSL_UdmapCppi5HMPD *pDesc, uint32_t descType, uint32_t retPolicy, uint32_t earlyReturn, uint32_t retPushPolicy, uint32_t retQnum ) { uint32_t v; diff --git a/source/drivers/udma/include/udma_ch.h b/source/drivers/udma/include/udma_ch.h index e53c689f525..7708211a88a 100755 --- a/source/drivers/udma/include/udma_ch.h +++ b/source/drivers/udma/include/udma_ch.h @@ -766,7 +766,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger); * * \return SW trigger register address */ -void *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle); +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle); /** * \brief Sets the software trigger register based on the trigger mode diff --git a/source/drivers/udma/v0/udma_ch.c b/source/drivers/udma/v0/udma_ch.c index 16fc165f702..28d689f60c4 100644 --- a/source/drivers/udma/v0/udma_ch.c +++ b/source/drivers/udma/v0/udma_ch.c @@ -1006,12 +1006,12 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) return (triggerEvent); } -void *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; - void *pSwTriggerReg = NULL; + uint32_t *pSwTriggerReg = NULL; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1039,12 +1039,12 @@ void *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) if((chHandleInt->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { DebugP_assert(chHandleInt->pBcdmaBcRtRegs != NULL_PTR); - pSwTriggerReg = (void *) &chHandleInt->pBcdmaBcRtRegs->SWTRIG; + pSwTriggerReg = (uint32_t *) &chHandleInt->pBcdmaBcRtRegs->SWTRIG; } else if((chHandleInt->chType & UDMA_CH_FLAG_TX) == UDMA_CH_FLAG_TX) { DebugP_assert(chHandleInt->pBcdmaTxRtRegs != NULL_PTR); - pSwTriggerReg = (void *) &chHandleInt->pBcdmaTxRtRegs->SWTRIG; + pSwTriggerReg = (uint32_t *) &chHandleInt->pBcdmaTxRtRegs->SWTRIG; } } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) @@ -1070,8 +1070,8 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; - void *pSwTriggerReg = NULL; + Udma_ChHandleInt chHandleInt = chHandle; + uint32_t *pSwTriggerReg = NULL; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1502,6 +1502,7 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) { chNum = chHandleInt->txChNum; bcdmaChDir = CSL_BCDMA_CHAN_DIR_TX; + CSL_bcdmaGetChanStats(&drvHandle->bcdmaRegs, chNum, bcdmaChDir, &bcdmaChanStats, CSL_BCDMA_CHAN_TYPE_BLOCK_COPY); } else { @@ -1510,15 +1511,16 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) /* Add offset to chNum, so that BCDMA can identify it as Tx channel*/ chNum = chHandleInt->txChNum + drvHandle->txChOffset; bcdmaChDir = CSL_BCDMA_CHAN_DIR_TX; + CSL_bcdmaGetChanStats(&drvHandle->bcdmaRegs, chNum, bcdmaChDir, &bcdmaChanStats, CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else { /* Add offset to chNum, so that BCDMA can identify it as Rx channel*/ chNum = chHandleInt->rxChNum + drvHandle->rxChOffset; bcdmaChDir = CSL_BCDMA_CHAN_DIR_RX; + CSL_bcdmaGetChanStats(&drvHandle->bcdmaRegs, chNum, bcdmaChDir, &bcdmaChanStats, CSL_BCDMA_CHAN_TYPE_SPLIT_RX); } } - CSL_bcdmaGetChanStats(&drvHandle->bcdmaRegs, chNum, bcdmaChDir, &bcdmaChanStats); chStats->packetCnt = bcdmaChanStats.packetCnt; chStats->completedByteCnt = bcdmaChanStats.completedByteCnt; chStats->startedByteCnt = bcdmaChanStats.startedByteCnt; @@ -2180,7 +2182,7 @@ static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) //CSL_FINS(regVal, PSILCFG_REG_RT_ENABLE_ENABLE, (uint32_t) 1U); //CSL_REG32_WR(&chHandle->pBcdmaBcRtRegs->PEER8, regVal); - (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum , &bcdmaRtEnable); + (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum , CSL_BCDMA_CHAN_TYPE_BLOCK_COPY, &bcdmaRtEnable); } else if((chHandle->chType & UDMA_CH_FLAG_TX) == UDMA_CH_FLAG_TX) @@ -2193,7 +2195,7 @@ static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) CSL_REG32_WR(&chHandle->pBcdmaTxRtRegs->PEER8, regVal); /* Add offset to ChNum so that BCDMA can identify it as Tx Channel */ - (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, &bcdmaRtEnable); + (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_TX, &bcdmaRtEnable); } else if ((chHandle->chType & UDMA_CH_FLAG_RX) == UDMA_CH_FLAG_RX) @@ -2208,7 +2210,7 @@ static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) */ /* Add offset to ChNum so that BCDMA can identify it as Rx Channel */ (void) CSL_bcdmaSetRxRT( - &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, &bcdmaRtEnable); + &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_RX, &bcdmaRtEnable); regVal = CSL_REG32_RD(&chHandle->pBcdmaRxRtRegs->PEER8); CSL_FINS(regVal, PSILCFG_REG_RT_ENABLE_ENABLE, (uint32_t) 1U); @@ -2280,7 +2282,7 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { retVal = CSL_bcdmaTeardownTxChan( - &drvHandle->bcdmaRegs, chHandle->txChNum, (bool)false, (bool)false); + &drvHandle->bcdmaRegs, chHandle->txChNum, (bool)false, (bool)false, CSL_BCDMA_CHAN_TYPE_BLOCK_COPY); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2299,7 +2301,7 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { - (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum, &bcdmaRtStatus); + (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum, CSL_BCDMA_CHAN_TYPE_BLOCK_COPY, &bcdmaRtStatus); if(FALSE == bcdmaRtStatus.enable) { /* Teardown complete */ @@ -2334,7 +2336,7 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { retVal = CSL_bcdmaTeardownTxChan( - &drvHandle->bcdmaRegs, chHandle->txChNum, (bool)true, (bool)false); + &drvHandle->bcdmaRegs, chHandle->txChNum, (bool)true, (bool)false, CSL_BCDMA_CHAN_TYPE_BLOCK_COPY); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2355,7 +2357,7 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { - (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum, &bcdmaRtStatus); + (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum, CSL_BCDMA_CHAN_TYPE_BLOCK_COPY, &bcdmaRtStatus); if(FALSE == bcdmaRtStatus.enable) { /* Teardown complete */ @@ -2395,7 +2397,7 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time bcdmaRtStatus.enable = FALSE; bcdmaRtStatus.teardown = FALSE; bcdmaRtStatus.forcedTeardown = FALSE; - (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum, &bcdmaRtStatus); + (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum, CSL_BCDMA_CHAN_TYPE_BLOCK_COPY, &bcdmaRtStatus); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2433,7 +2435,7 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) { /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ retVal = CSL_bcdmaTeardownTxChan( - &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, (bool)false, (bool)false); + &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, (bool)false, (bool)false, CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2454,7 +2456,7 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ - (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, &bcdmaRtStatus); + (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_TX, &bcdmaRtStatus); if(FALSE == bcdmaRtStatus.enable) { /* Teardown complete */ @@ -2491,7 +2493,7 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) { /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ retVal = CSL_bcdmaTeardownTxChan( - &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, (bool)true, (bool)false); + &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, (bool)true, (bool)false, CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2514,14 +2516,16 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_DIR_TX, rtEnableRegOffset, - &peerRtEnable); + &peerRtEnable, + CSL_BCDMA_CHAN_TYPE_SPLIT_TX); CSL_FINS(peerRtEnable, PSILCFG_REG_RT_ENABLE_FLUSH, (uint32_t) 1U); (void) CSL_bcdmaSetChanPeerReg( &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_DIR_TX, rtEnableRegOffset, - &peerRtEnable); + &peerRtEnable, + CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2549,12 +2553,13 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ - (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, &bcdmaRtStatus); + (void) CSL_bcdmaGetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_TX, &bcdmaRtStatus); (void) CSL_bcdmaGetChanPeerReg( &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_DIR_TX, - rtEnableRegOffset, &peerRtEnable); + rtEnableRegOffset, &peerRtEnable, + CSL_BCDMA_CHAN_TYPE_SPLIT_TX); if((FALSE == bcdmaRtStatus.enable) && (CSL_FEXT(peerRtEnable, PSILCFG_REG_RT_ENABLE_ENABLE) == FALSE)) { @@ -2603,13 +2608,14 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) bcdmaRtStatus.forcedTeardown = FALSE; CSL_FINS(peerRtEnable, PSILCFG_REG_RT_ENABLE_TDOWN, (uint32_t) 0U); /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ - (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, &bcdmaRtStatus); + (void) CSL_bcdmaSetTxRT(&drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_TX, &bcdmaRtStatus); (void) CSL_bcdmaSetChanPeerReg( &drvHandle->bcdmaRegs, chHandle->txChNum + drvHandle->txChOffset, CSL_BCDMA_CHAN_DIR_TX, rtEnableRegOffset, - &peerRtEnable); + &peerRtEnable, + CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2672,7 +2678,7 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { /*Add offset to chNum, so that BCDMA can identify it as Rx Channel*/ - (void) CSL_bcdmaGetRxRT(&drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, &bcdmaRtStatus); + (void) CSL_bcdmaGetRxRT(&drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_RX, &bcdmaRtStatus); if(FALSE == bcdmaRtStatus.enable) { /* Teardown complete */ @@ -2709,7 +2715,7 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) { /*Add offset to chNum, so that BCDMA can identify it as Rx Channel*/ retVal = CSL_bcdmaTeardownRxChan( - &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, (bool)true, (bool)false); + &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, (bool)true, (bool)false, CSL_BCDMA_CHAN_TYPE_SPLIT_RX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2730,12 +2736,13 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { /*Add offset to chNum, so that BCDMA can identify it as Rx Channel*/ - (void) CSL_bcdmaGetRxRT(&drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, &bcdmaRtStatus); + (void) CSL_bcdmaGetRxRT(&drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_RX, &bcdmaRtStatus); (void) CSL_bcdmaGetChanPeerReg( &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_DIR_RX, - rtEnableRegOffset, &peerRtEnable); + rtEnableRegOffset, &peerRtEnable, + CSL_BCDMA_CHAN_TYPE_SPLIT_RX); peerRtEnableBit = CSL_FEXT(peerRtEnable, PSILCFG_REG_RT_ENABLE_ENABLE); if((FALSE == bcdmaRtStatus.enable) && (FALSE == peerRtEnableBit)) { @@ -2782,13 +2789,14 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) CSL_FINS(peerRtEnable, PSILCFG_REG_RT_ENABLE_TDOWN, (uint32_t) FALSE); /*Add offset to chNum, so that BCDMA can identify it as Rx Channel*/ (void) CSL_bcdmaSetRxRT( - &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, &bcdmaRtStatus); + &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_RX, &bcdmaRtStatus); (void) CSL_bcdmaSetChanPeerReg( &drvHandle->bcdmaRegs, chHandle->rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_DIR_RX, rtEnableRegOffset, - &peerRtEnable); + &peerRtEnable, + CSL_BCDMA_CHAN_TYPE_SPLIT_RX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2935,7 +2943,7 @@ static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum,ui /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ txChNum += drvHandle->txChOffset; } - (void) CSL_bcdmaPauseTxChan(&drvHandle->bcdmaRegs, txChNum); + (void) CSL_bcdmaPauseTxChan(&drvHandle->bcdmaRegs, txChNum, CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2954,7 +2962,7 @@ static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, /*Add offset to chNum, so that BCDMA can identify it as Tx Channel*/ txChNum += drvHandle->txChOffset; } - (void) CSL_bcdmaUnpauseTxChan(&drvHandle->bcdmaRegs, txChNum); + (void) CSL_bcdmaUnpauseTxChan(&drvHandle->bcdmaRegs, txChNum, CSL_BCDMA_CHAN_TYPE_SPLIT_TX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2969,7 +2977,7 @@ static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { /*Add offset to chNum, so that BCDMA can identify it as Rx Channel*/ - (void) CSL_bcdmaPauseRxChan(&drvHandle->bcdmaRegs + drvHandle->rxChOffset, rxChNum); + (void) CSL_bcdmaPauseRxChan(&drvHandle->bcdmaRegs, rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_RX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { @@ -2984,7 +2992,7 @@ static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) { /*Add offset to chNum, so that BCDMA can identify it as Rx Channel*/ - (void) CSL_bcdmaUnpauseRxChan(&drvHandle->bcdmaRegs + drvHandle->rxChOffset, rxChNum); + (void) CSL_bcdmaUnpauseRxChan(&drvHandle->bcdmaRegs, rxChNum + drvHandle->rxChOffset, CSL_BCDMA_CHAN_TYPE_SPLIT_RX); } else if(UDMA_INST_TYPE_LCDMA_PKTDMA == drvHandle->instType) { diff --git a/source/drivers/udma/v0/udma_utils.c b/source/drivers/udma/v0/udma_utils.c index f629bcbb67d..0cf560d992d 100644 --- a/source/drivers/udma/v0/udma_utils.c +++ b/source/drivers/udma/v0/udma_utils.c @@ -140,16 +140,16 @@ void UdmaUtils_makeTrpd(uint8_t *trpdMem, uint32_t trSizeEncoded = UdmaUtils_getTrSizeEncoded(trType); /* Setup descriptor */ - CSL_udmapCppi5SetDescType(trpdMem, descType); + CSL_udmapCppi5SetDescType((CSL_UdmapCppi5HMPD *)trpdMem, descType); CSL_udmapCppi5TrSetReload((CSL_UdmapCppi5TRPD *)trpdMem, 0U, 0U); - CSL_udmapCppi5SetPktLen(trpdMem, descType, trCnt); - CSL_udmapCppi5SetIds(trpdMem, descType, 0U, UDMA_DEFAULT_FLOW_ID); /* Flow ID and Packet ID */ - CSL_udmapCppi5SetSrcTag(trpdMem, 0x0000); - CSL_udmapCppi5SetDstTag(trpdMem, 0x0000); + CSL_udmapCppi5SetPktLen((CSL_UdmapCppi5HMPD *)trpdMem, descType, trCnt); + CSL_udmapCppi5SetIds((CSL_UdmapCppi5HMPD *)trpdMem, descType, 0U, UDMA_DEFAULT_FLOW_ID); /* Flow ID and Packet ID */ + CSL_udmapCppi5SetSrcTag((CSL_UdmapCppi5HMPD *)trpdMem, 0x0000); + CSL_udmapCppi5SetDstTag((CSL_UdmapCppi5HMPD *)trpdMem, 0x0000); CSL_udmapCppi5TrSetEntryStride((CSL_UdmapCppi5TRPD *)trpdMem, trSizeEncoded); /* Return Policy descriptors are reserved in case of AM243X/Am64X */ CSL_udmapCppi5SetReturnPolicy( - trpdMem, + (CSL_UdmapCppi5HMPD *)trpdMem, descType, 0U, 0U, diff --git a/source/drivers/udma/v1/udma_ch.c b/source/drivers/udma/v1/udma_ch.c index 90c16a6c6b5..f7d924f0ec6 100644 --- a/source/drivers/udma/v1/udma_ch.c +++ b/source/drivers/udma/v1/udma_ch.c @@ -996,12 +996,12 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) return (triggerEvent); } -void *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; - void *pSwTriggerReg = NULL; + uint32_t *pSwTriggerReg = NULL; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1026,7 +1026,7 @@ void *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) if(UDMA_INST_TYPE_NORMAL == drvHandle->instType) { Udma_assert(drvHandle, chHandleInt->pTxRtRegs != NULL_PTR); - pSwTriggerReg = (void *) &chHandleInt->pTxRtRegs->SWTRIG; + pSwTriggerReg = (uint32_t *) &chHandleInt->pTxRtRegs->SWTRIG; } } else if((chHandleInt->chType & UDMA_CH_FLAG_RX) == UDMA_CH_FLAG_RX) @@ -1047,7 +1047,7 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; - void *pSwTriggerReg = NULL; + uint32_t *pSwTriggerReg = NULL; /* Error check */ if((NULL_PTR == chHandleInt) || From c12115d3be354314e7629b883a0fe27ff58e5f10 Mon Sep 17 00:00:00 2001 From: Nithyaa shri R B Date: Wed, 14 May 2025 13:25:58 +0530 Subject: [PATCH 3/5] am24/am64/am65: udma: Make all the structure defs public - Remove all structure defintions in priv.h and define it in udma_types.h to use the appropriate structure pointer types in source files. - Include necessary headers for required csl struct types. - Replace all void* typedefs with actual pointer types. Fixes: SITSW-7155 Signed-off-by: Nithyaa shri R B --- .../mcan_loopback_dma/mcan_loopback_dma.c | 20 +- source/drivers/udma.h | 63 - source/drivers/udma/include/udma_ch.h | 332 +-- source/drivers/udma/include/udma_event.h | 133 +- source/drivers/udma/include/udma_flow.h | 155 +- source/drivers/udma/include/udma_ring.h | 105 +- source/drivers/udma/include/udma_types.h | 1780 +++++++++++++++++ .../drivers/udma/soc/am64x_am243x/udma_soc.h | 48 + source/drivers/udma/soc/am65x/udma_soc.h | 48 + source/drivers/udma/v0/udma_ch.c | 54 +- source/drivers/udma/v0/udma_event.c | 14 +- source/drivers/udma/v0/udma_flow.c | 22 +- source/drivers/udma/v0/udma_priv.h | 602 ------ source/drivers/udma/v0/udma_ring_common.c | 40 +- source/drivers/udma/v1/udma_ch.c | 56 +- source/drivers/udma/v1/udma_event.c | 14 +- source/drivers/udma/v1/udma_flow.c | 14 +- source/drivers/udma/v1/udma_priv.h | 582 +----- source/drivers/udma/v1/udma_ring_common.c | 40 +- source/drivers/udma/v1/udma_utils.c | 12 +- test/drivers/udma/udma_test_blkcpy.c | 2 +- 21 files changed, 2089 insertions(+), 2047 deletions(-) diff --git a/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c b/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c index 455a4536939..9a65269a653 100644 --- a/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c +++ b/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c @@ -359,22 +359,22 @@ static void App_mcanDmaDeinit() int32_t tempRetVal; /* Disable Channel */ - status = Udma_chDisable(&App_mcanUdmaTxChObj, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); + status = Udma_chDisable((Udma_ChHandleInt)&App_mcanUdmaTxChObj, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); DebugP_assert(UDMA_SOK == status); - status = Udma_chDisable(&App_mcanUdmaRxChObj, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); + status = Udma_chDisable((Udma_ChHandleInt)&App_mcanUdmaRxChObj, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); DebugP_assert(UDMA_SOK == status); /* UnRegister Event */ - status = Udma_eventUnRegister(&App_mcanUdmaCqTxEventObjCh); + status = Udma_eventUnRegister((Udma_EventHandleInt)&App_mcanUdmaCqTxEventObjCh); DebugP_assert(UDMA_SOK == status); - status = Udma_eventUnRegister(&App_mcanUdmaCqRxEventObjCh); + status = Udma_eventUnRegister((Udma_EventHandleInt)&App_mcanUdmaCqRxEventObjCh); DebugP_assert(UDMA_SOK == status); /* Flush any pending request from the free queue */ while(1) { tempRetVal = Udma_ringFlushRaw( - Udma_chGetFqRingHandle(&App_mcanUdmaTxChObj), &pDesc); + Udma_chGetFqRingHandle((Udma_ChHandleInt)&App_mcanUdmaTxChObj), &pDesc); if(UDMA_ETIMEOUT == tempRetVal) { break; @@ -383,7 +383,7 @@ static void App_mcanDmaDeinit() while(1) { tempRetVal = Udma_ringFlushRaw( - Udma_chGetFqRingHandle(&App_mcanUdmaRxChObj), &pDesc); + Udma_chGetFqRingHandle((Udma_ChHandleInt)&App_mcanUdmaRxChObj), &pDesc); if(UDMA_ETIMEOUT == tempRetVal) { break; @@ -391,9 +391,9 @@ static void App_mcanDmaDeinit() } /* Close channel */ - status = Udma_chClose(&App_mcanUdmaTxChObj); + status = Udma_chClose((Udma_ChHandleInt)&App_mcanUdmaTxChObj); DebugP_assert(UDMA_SOK == status); - status = Udma_chClose(&App_mcanUdmaRxChObj); + status = Udma_chClose((Udma_ChHandleInt)&App_mcanUdmaRxChObj); DebugP_assert(UDMA_SOK == status); } @@ -681,7 +681,7 @@ static void App_udmaCallbackTx(Udma_EventHandle eventHandle, uint64_t pDesc; CacheP_inv(&App_mcanUdmaTxHpdMemCh, APP_MCAN_UDMA_TEST_DESC_SIZE, CacheP_TYPE_ALLD); - Udma_ringDequeueRaw(Udma_chGetCqRingHandle(&App_mcanUdmaTxChObj), &pDesc); + Udma_ringDequeueRaw(Udma_chGetCqRingHandle((Udma_ChHandleInt)&App_mcanUdmaTxChObj), &pDesc); SemaphoreP_post(&App_mcanTxDoneSem); } @@ -693,7 +693,7 @@ static void App_udmaCallbackRx(Udma_EventHandle eventHandle, uint64_t pDesc; CacheP_inv(&App_mcanUdmaRxHpdMemCh, APP_MCAN_UDMA_TEST_DESC_SIZE, CacheP_TYPE_ALLD); - Udma_ringDequeueRaw(Udma_chGetCqRingHandle(&App_mcanUdmaRxChObj), &pDesc); + Udma_ringDequeueRaw(Udma_chGetCqRingHandle((Udma_ChHandleInt)&App_mcanUdmaRxChObj), &pDesc); SemaphoreP_post(&App_mcanRxDoneSem); } \ No newline at end of file diff --git a/source/drivers/udma.h b/source/drivers/udma.h index f1f7a58e6e6..8510555199f 100755 --- a/source/drivers/udma.h +++ b/source/drivers/udma.h @@ -90,70 +90,7 @@ extern "C" { /* Macros & Typedefs */ /* ========================================================================== */ -/** - * \brief UDMA Virtual to Physical address translation callback function. - * - * This function is used by the driver to convert virtual address to physical - * address. - * - * \param virtAddr [IN] Virtual address - * \param chNum [IN] Channel number passed during channel open - * \param appData [IN] Callback pointer passed during channel open - * - * \return Corresponding physical address - */ -typedef uint64_t (*Udma_VirtToPhyFxn)(const void *virtAddr, - uint32_t chNum, - void *appData); -/** - * \brief UDMA Physical to Virtual address translation callback function. - * - * This function is used by the driver to convert physical address to virtual - * address. - * - * \param phyAddr [IN] Physical address - * \param chNum [IN] Channel number passed during channel open - * \param appData [IN] Callback pointer passed during channel open - * - * \return Corresponding virtual address - */ -typedef void *(*Udma_PhyToVirtFxn)(uint64_t phyAddr, - uint32_t chNum, - void *appData); - -/* ========================================================================== */ -/* Structure Declarations */ -/* ========================================================================== */ -/** - * \brief UDMA initialization parameters. - * - * Requirement: DOX_REQ_TAG(PDK-2631) - */ -typedef struct -{ - uint32_t instId; - /**< [IN] \ref Udma_InstanceIdSoc */ - uint32_t skipGlobalEventReg; - /**< Skips the global event registeration for the handle. By default this - * is set to FALSE and application can use this common handle to set the - * master event to limit the number of IA/IR registration per core - * This can be set to TRUE to skip this registration as in the case - * of having multiple handles per core in usecases */ - Udma_VirtToPhyFxn virtToPhyFxn; - /**< If not NULL, this function will be called to convert virtual address - * to physical address to be provided to UDMA. - * If NULL, the driver will assume a one-one mapping. - */ - Udma_PhyToVirtFxn phyToVirtFxn; - /**< If not NULL, this function will be called to convert physical address - * to virtual address to access the pointer returned by the UDMA. - * If NULL, the driver will assume a one-one mapping. - * - * Note: The init fxn will initialize this to the default one-one map - * function #Udma_defaultPhyToVirtFxn - */ -} Udma_InitPrms; /* ========================================================================== */ /* Function Declarations */ diff --git a/source/drivers/udma/include/udma_ch.h b/source/drivers/udma/include/udma_ch.h index 7708211a88a..b6fb9e1c70e 100755 --- a/source/drivers/udma/include/udma_ch.h +++ b/source/drivers/udma/include/udma_ch.h @@ -205,281 +205,7 @@ extern "C" { /* Structure Declarations */ /* ========================================================================== */ -/** - * \brief UDMA channel open parameters. - */ -typedef struct -{ - uint32_t chNum; - /**< [IN] UDMAP channel to allocate. - * - * Set to #UDMA_DMA_CH_ANY if the channel to allocate and open - * could be any from the free pool. - * Set to the actual DMA channel when specific DMA channel need to be - * allocated. This channel number is relative to the channel type - * (TX, RX or External). The driver will internally calculate the - * respective offset to get the actual UDMAP channel number. - */ - uint32_t peerChNum; - /**< [IN] The peer channel to link the #chNum using PSILCFG. - * - * Incase of PDMA peripherals this represent the PDMA channel to which the - * UDMA channel should pair with. Refer \ref Udma_PdmaCh macros. - * - * Incase of other PSIL master peripherals this represent the thread ID - * to which the UDMA channel should pair with. Refer \ref Udma_PsilCh macros. - * - * Incase of Block copy channel type (#UDMA_CH_TYPE_TR_BLK_COPY), set - * this to #UDMA_DMA_CH_NA, as the corresponding RX channel (same - * index as TX channel) is assumed to be paired with and the driver - * internally sets this up. The #UdmaChPrms_init API takes care of - * this. - * - */ - uint32_t mappedChGrp; - /**< [IN] The Mapped channel group to use when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX channel groups - * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX channel groups. - * - * For other channel type set to #UDMA_MAPPED_GROUP_INVALID - */ - void *appData; - /**< [IN] Application/caller context pointer passed back in all the channel - * callback functions. This could be used by the caller to identify - * the channel for which the callback is called. - * This can be set to NULL, if not required by caller. */ - Udma_RingPrms fqRingPrms; - /**< [IN] Free queue ring params where descriptors are queued */ - Udma_RingPrms cqRingPrms; - /**< [IN] Completion queue ring params where descriptors are dequeued - * This is not used for AM64x kind of devices, but even if the application - * sets this it will be ignored. But its not required to be set. - */ - Udma_RingPrms tdCqRingPrms; - /**< [IN] Teardown completion queue ring params where teardown - * response and TR response incase of direct TR mode are received from - * UDMA - * This is not used for AM64x kind of devices, but even if the application - * sets this it will be ignored. But its not required to be set. - */ -} Udma_ChPrms; - -/** - * \brief UDMA TX channel parameters. - */ -typedef struct -{ - uint8_t pauseOnError; - /**< [IN] Bool: When set (TRUE), pause channel on error */ - uint8_t filterEinfo; - /**< [IN] Bool: When set (TRUE), filter out extended info */ - uint8_t filterPsWords; - /**< [IN] Bool: When set (TRUE), filter out protocl specific words */ - uint8_t addrType; - /**< [IN] Address type for this channel. - * Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_atype */ - uint8_t chanType; - /**< [IN] Channel type. Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_chan_type */ - uint16_t fetchWordSize; - /**< [IN] Descriptor/TR Size in 32-bit words */ - uint8_t busPriority; - /**< [IN] 3-bit priority value (0=highest, 7=lowest) */ - uint8_t busQos; - /**< [IN] 3-bit qos value (0=highest, 7=lowest) */ - uint8_t busOrderId; - /**< [IN] 4-bit orderid value */ - uint8_t dmaPriority; - /**< [IN] This field selects which scheduling bin the channel will be - * placed in for bandwidth allocation of the Tx DMA units. - * Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_sched_priority */ - uint8_t txCredit; - /**< [IN] TX credit for external channels */ - uint16_t fifoDepth; - /**< [IN] The fifo depth is used to specify how many FIFO data phases - * deep the Tx per channel FIFO will be for the channel. - * While the maximum depth of the Tx FIFO is set at design time, - * the FIFO depth can be artificially reduced in order to control the - * maximum latency which can be introduced due to buffering effects. - * - * The maximum FIFO depth suppported depends on the channel type as - * given below: - * Normal Capacity Channel - CSL_NAVSS_UDMAP_TX_CHANS_FDEPTH (128 bytes) - * High Capacity Channel - CSL_NAVSS_UDMAP_TX_HC_CHANS_FDEPTH (1024 bytes) - * Ultra High Capacity Channel - CSL_NAVSS_UDMAP_TX_UHC_CHANS_FDEPTH (4096 bytes) - * - * The default init API will set this paramater as per the channel type. - */ - uint8_t burstSize; - /**< [IN] Specifies the nominal burst size and alignment for data transfers - * on this channel. - * Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_burst_size. - * Note1: This parameter should be set less than or equal to the FIFO - * depth parameter set for UTC channel i.e. - * fifoDepth >= burstSize - * Note2: In case of packet mode TX channels, the Tx fifoDepth must be at - * least 2 PSI-L data phases (32 bytes) larger than the burst size given - * in this field in order to hold the packet info and extended packet info - * header which is placed at the front of the data packet in addition - * to the payload i.e. - * fifoDepth >= (burstSize + 32 bytes) - * - * Below are the supported burst sizes for various channel types - * Normal Capacity Channel - 64 bytes - * High Capacity Channel - 64, 128 or 256 bytes - * Ultra High Capacity Channel - 64, 128 or 256 bytes - */ - uint8_t supressTdCqPkt; - /**< [IN] Bool: Specifies whether or not the channel should suppress - * sending the single data phase teardown packet when teardown is - * complete. - * FALSE = TD packet is sent - * TRUE = Suppress sending TD packet - */ -} Udma_ChTxPrms; - -/** - * \brief UDMA RX channel parameters. - */ -typedef struct -{ - uint8_t pauseOnError; - /**< [IN] Bool: When set (TRUE), pause channel on error */ - uint8_t addrType; - /**< [IN] Address type for this channel. - * Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_atype */ - uint8_t chanType; - /**< [IN] Channel type. Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type */ - uint16_t fetchWordSize; - /**< [IN] Descriptor/TR Size in 32-bit words */ - uint8_t busPriority; - /**< [IN] 3-bit priority value (0=highest, 7=lowest) */ - uint8_t busQos; - /**< [IN] 3-bit qos value (0=highest, 7=lowest) */ - uint8_t busOrderId; - /**< [IN] 4-bit orderid value */ - uint8_t dmaPriority; - /**< [IN] This field selects which scheduling bin the channel will be - * placed in for bandwidth allocation of the Tx DMA units. - * Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority */ - uint16_t flowIdFwRangeStart; - /**< [IN] Starting flow ID value for firewall check */ - uint16_t flowIdFwRangeCnt; - /**< [IN] Number of valid flow ID's starting from flowIdFwRangeStart - * for firewall check */ - uint8_t flowEInfoPresent; - /**< [IN] default flow config parameter for EPIB - * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_einfo_present */ - uint8_t flowPsInfoPresent; - /**< [IN] default flow config parameter for psInfo - * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_psinfo_present */ - uint8_t flowErrorHandling; - /**< [IN] default flow config parameter for Error Handling - * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_error_handling */ - uint8_t flowSopOffset; - /**< [IN] default flow config parameter for SOP offset - * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_sop_offset */ - uint8_t ignoreShortPkts; - /**< [IN] Bool: This field controls whether or not short packets will be - * treated as exceptions (FALSE) or ignored (TRUE) for the channel. - * This field is only used when the channel is in split UTC mode. */ - uint8_t ignoreLongPkts; - /**< [IN] Bool: This field controls whether or not long packets will be - * treated as exceptions (FALSE) or ignored (TRUE) for the channel. - * This field is only used when the channel is in split UTC mode. */ - uint32_t configDefaultFlow; - /**< [IN] Bool: This field controls whether or not to program the default - * flow. - * TRUE - Configures the default flow equal to the RX channel number - * FALSE - Doesn't configure the default flow of channel. - * The caller can allocate and use other generic flows or get the - * default flow handle and configure the flow using #Udma_flowConfig - * API at a later point of time */ - uint8_t burstSize; - /**< [IN] Specifies the nominal burst size and alignment for data transfers - * on this channel. - * Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size. - * Note1: This parameter should be set less than or equal to the FIFO - * depth parameter set for UTC channel i.e. - * fifoDepth >= burstSize - * Note2: In case of packet mode TX channels, the Tx fifoDepth must be at - * least 2 PSI-L data phases (32 bytes) larger than the burst size given - * in this field in order to hold the packet info and extended packet info - * header which is placed at the front of the data packet in addition - * to the payload i.e. - * fifoDepth >= (burstSize + 32 bytes) - * - * Below are the supported burst sizes for various channel types - * Normal Capacity Channel - 64 bytes - * High Capacity Channel - 64, 128 or 256 bytes - * Ultra High Capacity Channel - 64, 128 or 256 bytes - */ -} Udma_ChRxPrms; - -/** - * \brief UDMA PDMA channel Static TR parameters. - */ -typedef struct -{ - uint32_t elemSize; - /**< [IN] Element size. This field specifies how much data is transferred - * in each write which is performed by the PDMA. - * This is the X static TR parameter of PDMA. - * - * In case of MCAN TX/RX PDMA channel, this is not used and should be - * set to 0. - * - * Refer \ref Udma_PdmaElemSize for supported values. */ - uint32_t elemCnt; - /**< [IN] Element count. This field specifies how many elements to - * transfer each time a trigger is received on the PDMA channel. - * This is the Y static TR parameter of PDMA. - * - * In case of MCAN PDMA channel, this represents the buffer size. - * In case of MCAN TX, this field specifies how many bytes should be - * written to an MCAN TX buffer. This field includes the 8 byte MCAN - * header on the initial packet fragment. The PDMA will break up the - * source packet into fragments of this buffer size, copying the 8 byte - * MCAN header for the initial fragment, and then skipping it for each - * additional fragment and thus reusing the header from the first - * fragment. A buffer size less than 16 is treated as 16, and a buffer - * size greater than 72 is treated as 72. - * In case of MCAN RX, this field specifies how many bytes should be - * read from an MCAN RX buffer. This field includes the 8 byte MCAN - * header on the initial packet fragment. A buffer size less than 16 - * is treated as 16, and a buffer size greater than 72 is treated as 72. - */ - uint32_t fifoCnt; - /**< [IN] FIFO count. This field specifies how many full FIFO operations - * comprise a complete packet. When the count has been reached, the - * PDMA will close the packet with an 'EOP' indication. If this parameter - * is set to 0, then no packet delineation is supplied by the PDMA and - * all framing is controlled via the UDMA TR. - * - * This is the Z static TR parameter of PDMA. - * This is NA for TX and should be set to 0. - * In case of MCAN RX, this represents the buffer count. This field - * specifies how many MCAN RX buffers should be read before closing the - * CPPI packet with an 'EOP' indication. When this count is greater - * than 1, multiple MCAN RX buffers will be read into a single CPPI - * packet buffer. The 8 byte MCAN header will be skipped on subsequent - * MCAN buffer reads. Setting this field to NULL will suppress all - * packet delineation, and should be avoided. - */ -} Udma_ChPdmaPrms; - -/** - * \brief UDMA channel statistics. - */ -typedef struct -{ - uint32_t packetCnt; - /**< [OUT] Current completed packet count for the channel */ - uint32_t completedByteCnt; - /**< [OUT] Current completed payload byte count for the channel */ - uint32_t startedByteCnt; - /**< [OUT] Current started byte count for the channel */ -} Udma_ChStats; + /* ========================================================================== */ /* Function Declarations */ @@ -507,8 +233,8 @@ typedef struct * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chOpen(Udma_DrvHandle drvHandle, - Udma_ChHandle chHandle, +int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, + Udma_ChHandleInt chHandle, uint32_t chType, const Udma_ChPrms *chPrms); @@ -524,7 +250,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chClose(Udma_ChHandle chHandle); +int32_t Udma_chClose(Udma_ChHandleInt chHandle); /** * \brief UDMA configure TX channel. @@ -543,7 +269,7 @@ int32_t Udma_chClose(Udma_ChHandle chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms); +int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms); /** * \brief UDMA configure RX channel. @@ -564,7 +290,7 @@ int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms); +int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms); /** * \brief UDMA configure PDMA channel (peerChNum as part of #Udma_ChPrms) @@ -581,7 +307,7 @@ int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, +int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, const Udma_ChPdmaPrms *pdmaPrms); /** @@ -596,7 +322,7 @@ int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chEnable(Udma_ChHandle chHandle); +int32_t Udma_chEnable(Udma_ChHandleInt chHandle); /** * \brief UDMA channel teardown and disable API. @@ -619,7 +345,7 @@ int32_t Udma_chEnable(Udma_ChHandle chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout); +int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout); /** * \brief UDMA channel pause API. @@ -634,7 +360,7 @@ int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chPause(Udma_ChHandle chHandle); +int32_t Udma_chPause(Udma_ChHandleInt chHandle); /** * \brief UDMA channel resume API. @@ -649,7 +375,7 @@ int32_t Udma_chPause(Udma_ChHandle chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chResume(Udma_ChHandle chHandle); +int32_t Udma_chResume(Udma_ChHandleInt chHandle); /** * \brief Returns the channel number offset with in a channel type - TX, RX @@ -663,7 +389,7 @@ int32_t Udma_chResume(Udma_ChHandle chHandle); * * \return Channel number. Returns #UDMA_DMA_CH_INVALID for error. */ -uint32_t Udma_chGetNum(Udma_ChHandle chHandle); +uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle); /** * \brief Returns the default free ring handle of the channel. @@ -673,7 +399,7 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle); * * \return Free ring handle. Returns NULL for error. */ -Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle); +Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle); /** * \brief Returns the default completion ring handle of the channel. @@ -683,7 +409,7 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle); * * \return Completion ring handle. Returns NULL for error. */ -Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle); +Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle); /** * \brief Returns the teardown completion ring handle of the channel. @@ -693,7 +419,7 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle); * * \return Teardown completion ring handle. Returns NULL for error. */ -Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle); +Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle); /** * \brief Returns the default free ring number to be programmed @@ -704,7 +430,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle); * * \return Free ring number. Returns #UDMA_RING_INVALID for error. */ -uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle); +uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle); /** * \brief Returns the default completion ring number to be programmed in @@ -717,7 +443,7 @@ uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle); * * \return Completion ring number. Returns #UDMA_RING_INVALID for error. */ -uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle); +uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle); /** * \brief Returns the default flow handle of the RX channel. @@ -727,7 +453,7 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle); * * \return Default flow handle. Returns NULL for error. */ -Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle); +Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle); /** * \brief Returns the global trigger event for the channel @@ -745,7 +471,7 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle); * * \return Global trigger event */ -uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger); +uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger); /** * \brief Returns the software trigger register address for the channel @@ -766,7 +492,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger); * * \return SW trigger register address */ -uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle); +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle); /** * \brief Sets the software trigger register based on the trigger mode @@ -790,7 +516,7 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger); +int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger); /** * \brief Chains the trigger channel with the chained channel. @@ -814,8 +540,8 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, - Udma_ChHandle chainedChHandle, +int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, + Udma_ChHandleInt chainedChHandle, uint32_t trigger); /** @@ -830,8 +556,8 @@ int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, - Udma_ChHandle chainedChHandle); +int32_t Udma_chBreakChaining(Udma_ChHandleInt triggerChHandle, + Udma_ChHandleInt chainedChHandle); /* * Structure Init functions @@ -883,7 +609,7 @@ void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats); +int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats); /** * \brief Get real-time peer data which contains number of bytes written. @@ -894,7 +620,7 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData); +int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData); /** * \brief Clear real-time peer data which contains number of bytes written. @@ -905,7 +631,7 @@ int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData); +int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData); #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) /** @@ -924,7 +650,7 @@ int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData); * * \return Global trigger event */ -int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, +int32_t Udma_chDequeueTdResponse(Udma_ChHandleInt chHandle, CSL_UdmapTdResponse *tdResponse); #endif /* ========================================================================== */ diff --git a/source/drivers/udma/include/udma_event.h b/source/drivers/udma/include/udma_event.h index 157d5401146..fc496b44386 100755 --- a/source/drivers/udma/include/udma_event.h +++ b/source/drivers/udma/include/udma_event.h @@ -191,125 +191,6 @@ extern "C" { #define UDMA_EVENT_MODE_SHARED ((uint32_t) 0x0002U) /** @} */ -/** - * \brief UDMA event callback function. - * - * \param eventHandle [IN] UDMA event handle - * \param eventType [IN] Event that occurred - * \param appData [IN] Callback pointer passed during event register - */ -typedef void (*Udma_EventCallback)(Udma_EventHandle eventHandle, - uint32_t eventType, - void *appData); - -/* ========================================================================== */ -/* Structure Declarations */ -/* ========================================================================== */ - -/** - * \brief UDMA event related parameters. - * - * Requirement: DOX_REQ_TAG(PDK-2628), DOX_REQ_TAG(PDK-2627) - * DOX_REQ_TAG(PDK-2626), DOX_REQ_TAG(PDK-2625) - */ -typedef struct -{ - uint32_t eventType; - /**< [IN] Event type to register. Refer \ref Udma_EventType */ - uint32_t eventMode; - /**< [IN] Event mode - exclusive or shared. Refer \ref Udma_EventMode. - * This parameter should be set to #UDMA_EVENT_MODE_SHARED for - * #UDMA_EVENT_TYPE_MASTER event type. */ - Udma_ChHandle chHandle; - /**< [IN] Channel handle when the event type is one of below - * - #UDMA_EVENT_TYPE_DMA_COMPLETION - * - #UDMA_EVENT_TYPE_TEARDOWN_PACKET - * - #UDMA_EVENT_TYPE_TR. - * This parameter can be NULL for other types. */ - Udma_RingHandle ringHandle; - /**< [IN] Ring handle when the event type is one of below - * - #UDMA_EVENT_TYPE_RING - * This parameter can be NULL for other types. */ - Udma_EventHandle controllerEventHandle; - /**< [IN] Master event handle used to share the IA register when the event - * mode is set to #UDMA_EVENT_MODE_SHARED. - * This is typically used to share multiple events from same source - * like same peripheral to one IA register which eventually routes to - * a single core interrupt. - * For the first(or master) event this should be set to NULL. The driver - * will allocate the required resources (IA/IR) for the first event. - * For the subsequent shared event registration, the master event handle - * should be passed as reference and the driver will allocate only the - * IA status bits. At a maximum #UDMA_MAX_EVENTS_PER_VINTR number of - * events can be shared. Beyond that the driver will return error. - * This parameter should be set to NULL for #UDMA_EVENT_TYPE_MASTER - * event type. */ - Udma_EventCallback eventCb; - /**< [IN] When callback function is set (non-NULL), the driver will allocate - * core level interrupt through Interrupt Router and the function - * will be called when the registered event occurs. - * When set to NULL, the API will only allocate event and no interrupt - * routing is performed. - * Note: In case of shared events (multiple events mapped to same - * interrupt), the driver will call the callbacks in the order - * of event registration. - * This parameter should be set to NULL for #UDMA_EVENT_TYPE_MASTER - * event type. */ - uint32_t intrPriority; - /**< [IN] Priority of interrupt to register with OSAL. The interpretation - * depends on the OSAL implementation */ - void *appData; - /**< [IN] Application/caller context pointer passed back in the event - * callback function. This could be used by the caller to identify - * the channel/event for which the callback is called. - * This can be set to NULL, if not required by caller. */ - uint32_t preferredCoreIntrNum; - /**< [IN] Preferred core interrupt number which goes to a core. - * - * If set to #UDMA_CORE_INTR_ANY, will allocate from free pool. - * Else will try to allocate the mentioned interrupt itself. */ - #if (UDMA_SOC_CFG_RING_MON_PRESENT == 1) - Udma_RingMonHandle monHandle; - /**< [IN] Ring monitor handle when the event type is one of below - * - #UDMA_EVENT_TYPE_RING_MON - * This parameter can be NULL for other types. */ - #endif - /* - * Output parameters - */ - volatile uint64_t *intrStatusReg; - /**< [OUT] Interrupt status register address of the allocated IA VINT - * register. This is used to check if interrupt occurred */ - volatile uint64_t *intrClearReg; - /**< [OUT] Interrupt clear register address of the allocated IA VINT - * register. This is used to clear if interrupt occurred */ - uint64_t intrMask; - /**< [OUT] Interrupt mask to check and clear */ - uint32_t vintrNum; - /**< [OUT] IA Virtual interrupt number allocated. */ - uint32_t coreIntrNum; - /**< [OUT] Core interrupt number allocated. - * This number can be used to register with the OSAL - * - * Note: Incase of C7x, this represents the GIC SPI events to the CLEC. - * For routing this event, the driver further uses the Udma_RmInitPrms - 'startC7xCoreIntr' - * parameter as the start C7x interrupt and assumes that numIrIntr - * C7x interrupt are used by UDMA driver for one to one mapping. - * The UDMA driver directly programs the CLEC for this routing - * - * Example: startIrIntr = 700, numIrIntr = 3, startC7xCoreIntr = 32 - * - * First Event registration: - * CLEC input : 700+1024-32 - * CLEC output : 32 - * OSAL registration : 32 - * - * Second Event registration: - * CLEC input : 701+1024-32 - * CLEC output : 33 - * OSAL registration : 33 */ -} Udma_EventPrms; - /** * \brief UDMAP receive flow id firewall status * @@ -362,8 +243,8 @@ typedef struct * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, - Udma_EventHandle eventHandle, +int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, + Udma_EventHandleInt eventHandle, Udma_EventPrms *eventPrms); /** @@ -397,7 +278,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle); +int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle); /** * \brief Returns the event ID allocated for this event. @@ -409,7 +290,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle); * * \return the event ID on success or #UDMA_EVENT_INVALID on error */ -uint32_t Udma_eventGetId(Udma_EventHandle eventHandle); +uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle); /** * \brief Disable the event at interrupt aggregator @@ -421,7 +302,7 @@ uint32_t Udma_eventGetId(Udma_EventHandle eventHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventDisable(Udma_EventHandle eventHandle); +int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle); /** * \brief Enable the event at interrupt aggregator @@ -437,7 +318,7 @@ int32_t Udma_eventDisable(Udma_EventHandle eventHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventEnable(Udma_EventHandle eventHandle); +int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle); /** * \brief Get the global event handle of the driver handle. @@ -449,7 +330,7 @@ int32_t Udma_eventEnable(Udma_EventHandle eventHandle); * * \return Returns global event handle else NULL on error */ -Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle); +Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle); /* * Structure Init functions diff --git a/source/drivers/udma/include/udma_flow.h b/source/drivers/udma/include/udma_flow.h index 4852f6d6182..4205bf1a638 100755 --- a/source/drivers/udma/include/udma_flow.h +++ b/source/drivers/udma/include/udma_flow.h @@ -72,139 +72,6 @@ extern "C" { /* Structure Declarations */ /* ========================================================================== */ -/** - * \brief UDMA RX channel flow parameters. - */ -typedef struct -{ - Udma_ChHandle rxChHandle; - /**< [IN] Deprecated member. Not used any more. */ - uint8_t einfoPresent; - /**< [IN] Set to 1 if extended packet info is present in the descriptor */ - uint8_t psInfoPresent; - /**< [IN] Set to 1 if protocol-specific info is present in the - * descriptor */ - uint8_t errorHandling; - /**< [IN] Determines how starvation errors are handled. - * 0=drop packet, 1=retry */ - uint8_t descType; - /**< [IN] Descriptor type - see \ref tisci_msg_rm_udmap_flow_cfg_req::rx_desc_type */ - uint8_t psLocation; - /**< [IN] Protocol-specific info location. - * \ref TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PS_END_PD - * \ref TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PS_BEGIN_DB - */ - uint16_t sopOffset; - /**< [IN] Start of rx packet data (byte offset from the start of - * the SOP buffer) */ - uint16_t defaultRxCQ; - /**< [IN] Rx destination queue */ - uint8_t srcTagHi; - /**< [IN] UDMAP receive flow source tag high byte constant configuration - * to be programmed into the rx_src_tag_hi field of the flow's RFLOW_RFB - * register.*/ - uint8_t srcTagLo; - /**< [IN] UDMAP receive flow source tag low byte constant configuration - * to be programmed into the rx_src_tag_lo field of the flow's RFLOW_RFB - * register.*/ - uint8_t srcTagHiSel; - /**< [IN] UDMAP receive flow source tag high byte selector configuration - * to be programmed into the rx_src_tag_hi_sel field of the RFLOW_RFC - * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi_sel. */ - uint8_t srcTagLoSel; - /**< [IN] UDMAP receive flow source tag low byte selector configuration - * to be programmed into the rx_src_tag_low_sel field of the RFLOW_RFC - * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo_sel. */ - uint8_t destTagHi; - /**< [IN] UDMAP receive flow destination tag high byte constant configuration - * to be programmed into the rx_dest_tag_hi field of the flow's RFLOW_RFB - * register.*/ - uint8_t destTagLo; - /**< [IN] UDMAP receive flow destination tag low byte constant configuration - * to be programmed into the rx_dest_tag_lo field of the flow's RFLOW_RFB - * register.*/ - uint8_t destTagHiSel; - /**< [IN] UDMAP receive flow destination tag high byte selector configuration - * to be programmed into the rx_dest_tag_hi_sel field of the RFLOW_RFC - * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi_sel. */ - uint8_t destTagLoSel; - /**< [IN] UDMAP receive flow destination tag low byte selector configuration - * to be programmed into the rx_dest_tag_low_sel field of the RFLOW_RFC - * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo_sel. */ - uint8_t sizeThreshEn; - /**< [IN] UDMAP receive flow packet size based free buffer queue enable configuration - * to be programmed into the rx_size_thresh_en field of the RFLOW_RFC register. - * See the UDMAP section of the TRM for more information on this setting. - * Configuration of the optional size thresholds when this configuration is - * enabled is done by sending the @ref tisci_msg_rm_udmap_flow_size_thresh_cfg_req - * message to System Firmware for the receive flow allocated by this request. - * This parameter can be no greater than - * @ref TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SIZE_THRESH_MAX */ - uint16_t fdq0Sz0Qnum; - /**< [IN] UDMAP receive flow free descriptor queue 0 configuration to be programmed - * into the rx_fdq0_sz0_qnum field of the flow's RFLOW_RFD register. See the - * UDMAP section of the TRM for more information on this setting. The specified - * free queue must be valid within the Navigator Subsystem and must be owned - * by the host, or a subordinate of the host, requesting allocation and - * configuration of the receive flow. */ - uint16_t fdq1Qnum; - /**< [IN] UDMAP receive flow free descriptor queue 1 configuration to be programmed - * into the rx_fdq1_qnum field of the flow's RFLOW_RFD register. See the - * UDMAP section of the TRM for more information on this setting. The specified - * free queue must be valid within the Navigator Subsystem and must be owned - * by the host, or a subordinate of the host, requesting allocation and - * configuration of the receive flow. */ - uint16_t fdq2Qnum; - /**< [IN] UDMAP receive flow free descriptor queue 2 configuration to be programmed - * into the rx_fdq2_qnum field of the flow's RFLOW_RFE register. See the - * UDMAP section of the TRM for more information on this setting. The specified - * free queue must be valid within the Navigator Subsystem and must be owned - * by the host, or a subordinate of the host, requesting allocation and - * configuration of the receive flow. */ - uint16_t fdq3Qnum; - /**< [IN] UDMAP receive flow free descriptor queue 3 configuration to be programmed - * into the rx_fdq3_qnum field of the flow's RFLOW_RFE register. See the - * UDMAP section of the TRM for more information on this setting. The specified - * free queue must be valid within the Navigator Subsystem and must be owned - * by the host, or a subordinate of the host, requesting allocation and - * configuration of the receive flow. */ - uint16_t sizeThresh0; - /**< [IN] UDMAP receive flow packet size threshold 0 configuration to be programmed - * into the rx_size_thresh0 field of the flow's RFLOW_RFF register. See the - * UDMAP section of the TRM for more information on this setting. */ - uint16_t sizeThresh1; - /**< [IN] UDMAP receive flow packet size threshold 1 configuration to be programmed - * into the rx_size_thresh1 field of the flow's RFLOW_RFF register. See the - * UDMAP section of the TRM for more information on this setting. */ - uint16_t sizeThresh2; - /**< [IN] UDMAP receive flow packet size threshold 2 configuration to be programmed - * into the rx_size_thresh2 field of the flow's RFLOW_RFG register. See the - * UDMAP section of the TRM for more information on this setting. */ - uint16_t fdq0Sz1Qnum; - /**< [IN] UDMAP receive flow free descriptor queue for size threshold 1 configuration - * to be programmed into the rx_fdq0_sz1_qnum field of the flow's RFLOW_RFG - * register. See the UDMAP section of the TRM for more information on this - * setting. The specified free queue must be valid within the Navigator - * Subsystem and must be owned by the host, or a subordinate of the host, who - * owns the receive flow index and who is making the optional configuration - * request. */ - uint16_t fdq0Sz2Qnum; - /**< [IN] UDMAP receive flow free descriptor queue for size threshold 2 configuration - * to be programmed into the rx_fdq0_sz2_qnum field of the flow's RFLOW_RFH - * register. See the UDMAP section of the TRM for more information on this - * setting. The specified free queue must be valid within the Navigator - * Subsystem and must be owned by the host, or a subordinate of the host, who - * owns the receive flow index and who is making the optional configuration - * request. */ - uint16_t fdq0Sz3Qnum; - /**< [IN] UDMAP receive flow free descriptor queue for size threshold 3 configuration - * to be programmed into the rx_fdq0_sz3_qnum field of the flow's RFLOW_RFH - * register. See the UDMAP section of the TRM for more information on this - * setting. The specified free queue must be valid within the Navigator - * Subsystem and must be owned by the host, or a subordinate of the host, who - * owns the receive flow index and who is making the optional configuration - * request. */ -} Udma_FlowPrms; /** * \brief UDMA RX channel mapped flow alloc parameters. @@ -252,8 +119,8 @@ typedef struct * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAllocMapped(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms); /** @@ -269,7 +136,7 @@ int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowFree(Udma_FlowHandle flowHandle); +int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle); /** * \brief UDMA flow attach API. This API is used to attach to an already @@ -301,8 +168,8 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, uint32_t flowStart, uint32_t flowCnt); @@ -335,8 +202,8 @@ int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAttachMapped(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, uint32_t mappepdFlowNum, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms); @@ -356,7 +223,7 @@ int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowDetach(Udma_FlowHandle flowHandle); +int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle); /** * \brief This API configures the flow configurations. @@ -377,7 +244,7 @@ int32_t Udma_flowDetach(Udma_FlowHandle flowHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, +int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, uint32_t flowIdx, const Udma_FlowPrms *flowPrms); @@ -392,7 +259,7 @@ int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, * * \return Start flow number on success or #UDMA_FLOW_INVALID on error */ -uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle); +uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle); /** * \brief Returns the number of flows managed by this flow handle. @@ -407,7 +274,7 @@ uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle); * * \return Flow count on success or #UDMA_FLOW_INVALID on error */ -uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle); +uint32_t Udma_flowGetCount(Udma_FlowHandleInt flowHandle); /* * Structure Init functions diff --git a/source/drivers/udma/include/udma_ring.h b/source/drivers/udma/include/udma_ring.h index e41dc13944a..bf082af20fa 100755 --- a/source/drivers/udma/include/udma_ring.h +++ b/source/drivers/udma/include/udma_ring.h @@ -117,70 +117,7 @@ extern "C" { /* Structure Declarations */ /* ========================================================================== */ -/** - * \brief UDMA ring parameters. - */ -typedef struct -{ - void *ringMem; - /**< Pointer to ring memory. - * Incase of FQ and CQ rings, this cannot be NULL except for DRU - * direct TR mode where the rings are not used. - * Incase of TD CQ, this can be NULL when TD response is supressed via - * supressTdCqPkt channel parameter. - * Note: This is a virtual pointer. */ - uint32_t ringMemSize; - /**< Size of the memory in bytes allocated. This is used by the driver - * to validate the allocated memory is sufficient or not. - * - * Note: By default this parameter will be set to - * #UDMA_RING_SIZE_CHECK_SKIP by #UdmaRingPrms_init API to enable - * backward combatibility when this is not set rightly by the caller */ - uint8_t mode; - /**< Ring mode. Refer \ref tisci_msg_rm_ring_cfg_req::mode */ - uint16_t virtId; - /**< Ring virt ID. Refer \ref tisci_msg_rm_ring_cfg_req::virtid */ - uint32_t elemCnt; - /**< Ring element count. - * Set to queue depth of the ring. - * Set to 0 for DRU direct TR mode. */ - uint8_t elemSize; - /**< Ring element size. - * Refer \ref Udma_RingElemSize for supported values. */ - uint8_t orderId; - /**< Ring bus order ID value to be programmed into the orderid field of - * the ring's RING_ORDERID register. */ - uint8_t asel; - /**< Ring ASEL (address select) value to be set into the ASEL field of the ring's - * RING_BA_HI register. - * Refer \ref Udma_RingAccAselEndpointSoc for supported values. - * This field is not supported on some SoCs. - * On SoCs that do not support this field the input is quietly ignored. - * Note: By default this parameter will be set to - * #UDMA_RINGACC_ASEL_ENDPOINT_PHYSADDR by #UdmaRingPrms_init API */ - uint32_t mappedRingGrp; - /**< The Mapped ring group to use when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * - * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX ring groups - * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX ring groups. - * - * For unmapped case, set to #UDMA_MAPPED_GROUP_INVALID - */ - uint32_t mappedChNum; - /**< The assigned mapped channel number when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * - * This is used to allocate the corresponding mapped ring for the particular channel. - * RM will derive an intersecting pool based on the rings reserved for the core (in rmcfg) - * and the permissible range for the given channel(rings reserved for specific channels) - * such that the allocated ring will be from this intersecting pool. - * - * For example, If the rings idx reserved for the core are 10 to 20 and - * the rings for the channel are 15 to 25. Then the intersecting pool of ring idx - * will be 15 - 20 and rm will allocate from this range. - */ -} Udma_RingPrms; + /* ========================================================================== */ /* Function Declarations */ @@ -204,8 +141,8 @@ typedef struct * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, - Udma_RingHandle ringHandle, +int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, + Udma_RingHandleInt ringHandle, uint16_t ringNum, const Udma_RingPrms *ringPrms); @@ -219,7 +156,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringFree(Udma_RingHandle ringHandle); +int32_t Udma_ringFree(Udma_RingHandleInt ringHandle); /** * \brief UDMA ring attach API. This API is used to attach to an already @@ -251,8 +188,8 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, - Udma_RingHandle ringHandle, +int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, + Udma_RingHandleInt ringHandle, uint16_t ringNum); /** @@ -268,7 +205,7 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringDetach(Udma_RingHandle ringHandle); +int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle); /** * \brief UDMA queue descriptor to a ring - raw version @@ -298,7 +235,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem); +int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); /** * \brief UDMA dequeue descriptor from a ring - raw version @@ -336,7 +273,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem); +int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); /** * \brief UDMA dequeue descriptor from a ring when UDMA channel is disabled - @@ -361,7 +298,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem); +int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); /** * \brief UDMA prime descriptor to a exposed/"RING" mode ring - raw version @@ -389,7 +326,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem); * \param phyDescMem [IN] Descriptor memory physical pointer to push to the * ring. */ -void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem); +void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); /** * \brief UDMA read descriptor from a exposed/"RING" mode ring - raw version @@ -419,7 +356,7 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem); * \param phyDescMem [IN] Descriptor memory physical pointer to pop from the * ring. */ -void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem); +void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); /** * \brief UDMA ring API to set the doorbell in exposed/"RING" mode ring. @@ -448,7 +385,7 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem); * This parameter can't be NULL. * \param count [IN] Number of count to commit. */ -void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count); +void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count); /** * \brief Returns the ring number allocated for this ring. @@ -458,7 +395,7 @@ void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count); * * \return The ring number on success or #UDMA_RING_INVALID on error */ -uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle); +uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle); /** * \brief Returns the ring memory pointer which is passed during ring alloc. @@ -470,7 +407,7 @@ uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle); * * \return Ring memory pointer on success or NULL on error */ -void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle); +void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle); /** * \brief Returns the ring mode which is configured during ring alloc. @@ -482,7 +419,7 @@ void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle); * * \return Ring mode on success or CSL_RINGACC_RING_MODE_INVALID on error */ -uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle); /** * \brief Returns the ring element count which is passed during ring alloc. @@ -494,7 +431,7 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle); * * \return Ring element count on success or zero on error */ -uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle); /** * \brief Returns the forward ring occupancy. @@ -512,7 +449,7 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle); * * \return Ring occupancy value from the register */ -uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle); /** * \brief Returns the reverse ring occupancy. @@ -530,7 +467,7 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle); * * \return Ring occupancy value from the register */ -uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle); /** * \brief Returns the ring write index value. @@ -548,7 +485,7 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle); * * \return Ring read/write index value */ -uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle); /** * \brief Returns the ring read index value. @@ -566,7 +503,7 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle); * * \return Ring read/write index value */ -uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetRdIdx(Udma_RingHandleInt ringHandle); /* * Structure Init functions diff --git a/source/drivers/udma/include/udma_types.h b/source/drivers/udma/include/udma_types.h index a8eab2895ce..edde49f63ca 100755 --- a/source/drivers/udma/include/udma_types.h +++ b/source/drivers/udma/include/udma_types.h @@ -53,6 +53,24 @@ /* None */ +#include +#include +#include +#include + +#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) +#include +#endif +#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) +#include +#include +#else +#include +#endif +#include + +#include + #ifdef __cplusplus extern "C" { #endif @@ -76,6 +94,1768 @@ typedef void * Udma_FlowHandle; typedef struct Udma_RingMonObj * Udma_RingMonHandle; #endif +/** \brief UDMA driver handle */ +typedef struct Udma_DrvObjectInt_t *Udma_DrvHandleInt; +/** \brief UDMA channel handle */ +typedef struct Udma_ChObjectInt_t *Udma_ChHandleInt; +/** \brief UDMA event handle */ +typedef struct Udma_EventObjectInt_t *Udma_EventHandleInt; +/** \brief UDMA ring handle */ +typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; +/** \brief UDMA flow handle */ +typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; + +/** + * \brief UDMA ring parameters. + */ +typedef struct +{ + void *ringMem; + /**< Pointer to ring memory. + * Incase of FQ and CQ rings, this cannot be NULL except for DRU + * direct TR mode where the rings are not used. + * Incase of TD CQ, this can be NULL when TD response is supressed via + * supressTdCqPkt channel parameter. + * Note: This is a virtual pointer. */ + uint32_t ringMemSize; + /**< Size of the memory in bytes allocated. This is used by the driver + * to validate the allocated memory is sufficient or not. + * + * Note: By default this parameter will be set to + * #UDMA_RING_SIZE_CHECK_SKIP by #UdmaRingPrms_init API to enable + * backward combatibility when this is not set rightly by the caller */ + uint8_t mode; + /**< Ring mode. Refer \ref tisci_msg_rm_ring_cfg_req::mode */ + uint16_t virtId; + /**< Ring virt ID. Refer \ref tisci_msg_rm_ring_cfg_req::virtid */ + uint32_t elemCnt; + /**< Ring element count. + * Set to queue depth of the ring. + * Set to 0 for DRU direct TR mode. */ + uint8_t elemSize; + /**< Ring element size. + * Refer \ref Udma_RingElemSize for supported values. */ + uint8_t orderId; + /**< Ring bus order ID value to be programmed into the orderid field of + * the ring's RING_ORDERID register. */ + uint8_t asel; + /**< Ring ASEL (address select) value to be set into the ASEL field of the ring's + * RING_BA_HI register. + * Refer \ref Udma_RingAccAselEndpointSoc for supported values. + * This field is not supported on some SoCs. + * On SoCs that do not support this field the input is quietly ignored. + * Note: By default this parameter will be set to + * #UDMA_RINGACC_ASEL_ENDPOINT_PHYSADDR by #UdmaRingPrms_init API */ + uint32_t mappedRingGrp; + /**< The Mapped ring group to use when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * + * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX ring groups + * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX ring groups. + * + * For unmapped case, set to #UDMA_MAPPED_GROUP_INVALID + */ + uint32_t mappedChNum; + /**< The assigned mapped channel number when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * + * This is used to allocate the corresponding mapped ring for the particular channel. + * RM will derive an intersecting pool based on the rings reserved for the core (in rmcfg) + * and the permissible range for the given channel(rings reserved for specific channels) + * such that the allocated ring will be from this intersecting pool. + * + * For example, If the rings idx reserved for the core are 10 to 20 and + * the rings for the channel are 15 to 25. Then the intersecting pool of ring idx + * will be 15 - 20 and rm will allocate from this range. + */ +} Udma_RingPrms; + +/** + * \brief UDMA channel open parameters. + */ +typedef struct +{ + uint32_t chNum; + /**< [IN] UDMAP channel to allocate. + * + * Set to #UDMA_DMA_CH_ANY if the channel to allocate and open + * could be any from the free pool. + * Set to the actual DMA channel when specific DMA channel need to be + * allocated. This channel number is relative to the channel type + * (TX, RX or External). The driver will internally calculate the + * respective offset to get the actual UDMAP channel number. + */ + uint32_t peerChNum; + /**< [IN] The peer channel to link the #chNum using PSILCFG. + * + * Incase of PDMA peripherals this represent the PDMA channel to which the + * UDMA channel should pair with. Refer \ref Udma_PdmaCh macros. + * + * Incase of other PSIL master peripherals this represent the thread ID + * to which the UDMA channel should pair with. Refer \ref Udma_PsilCh macros. + * + * Incase of Block copy channel type (#UDMA_CH_TYPE_TR_BLK_COPY), set + * this to #UDMA_DMA_CH_NA, as the corresponding RX channel (same + * index as TX channel) is assumed to be paired with and the driver + * internally sets this up. The #UdmaChPrms_init API takes care of + * this. + * + */ + uint32_t mappedChGrp; + /**< [IN] The Mapped channel group to use when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX channel groups + * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX channel groups. + * + * For other channel type set to #UDMA_MAPPED_GROUP_INVALID + */ + void *appData; + /**< [IN] Application/caller context pointer passed back in all the channel + * callback functions. This could be used by the caller to identify + * the channel for which the callback is called. + * This can be set to NULL, if not required by caller. */ + Udma_RingPrms fqRingPrms; + /**< [IN] Free queue ring params where descriptors are queued */ + Udma_RingPrms cqRingPrms; + /**< [IN] Completion queue ring params where descriptors are dequeued + * This is not used for AM64x kind of devices, but even if the application + * sets this it will be ignored. But its not required to be set. + */ + Udma_RingPrms tdCqRingPrms; + /**< [IN] Teardown completion queue ring params where teardown + * response and TR response incase of direct TR mode are received from + * UDMA + * This is not used for AM64x kind of devices, but even if the application + * sets this it will be ignored. But its not required to be set. + */ +} Udma_ChPrms; + +/** + * \brief UDMA TX channel parameters. + */ +typedef struct +{ + uint8_t pauseOnError; + /**< [IN] Bool: When set (TRUE), pause channel on error */ + uint8_t filterEinfo; + /**< [IN] Bool: When set (TRUE), filter out extended info */ + uint8_t filterPsWords; + /**< [IN] Bool: When set (TRUE), filter out protocl specific words */ + uint8_t addrType; + /**< [IN] Address type for this channel. + * Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_atype */ + uint8_t chanType; + /**< [IN] Channel type. Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_chan_type */ + uint16_t fetchWordSize; + /**< [IN] Descriptor/TR Size in 32-bit words */ + uint8_t busPriority; + /**< [IN] 3-bit priority value (0=highest, 7=lowest) */ + uint8_t busQos; + /**< [IN] 3-bit qos value (0=highest, 7=lowest) */ + uint8_t busOrderId; + /**< [IN] 4-bit orderid value */ + uint8_t dmaPriority; + /**< [IN] This field selects which scheduling bin the channel will be + * placed in for bandwidth allocation of the Tx DMA units. + * Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_sched_priority */ + uint8_t txCredit; + /**< [IN] TX credit for external channels */ + uint16_t fifoDepth; + /**< [IN] The fifo depth is used to specify how many FIFO data phases + * deep the Tx per channel FIFO will be for the channel. + * While the maximum depth of the Tx FIFO is set at design time, + * the FIFO depth can be artificially reduced in order to control the + * maximum latency which can be introduced due to buffering effects. + * + * The maximum FIFO depth suppported depends on the channel type as + * given below: + * Normal Capacity Channel - CSL_NAVSS_UDMAP_TX_CHANS_FDEPTH (128 bytes) + * High Capacity Channel - CSL_NAVSS_UDMAP_TX_HC_CHANS_FDEPTH (1024 bytes) + * Ultra High Capacity Channel - CSL_NAVSS_UDMAP_TX_UHC_CHANS_FDEPTH (4096 bytes) + * + * The default init API will set this paramater as per the channel type. + */ + uint8_t burstSize; + /**< [IN] Specifies the nominal burst size and alignment for data transfers + * on this channel. + * Refer \ref tisci_msg_rm_udmap_tx_ch_cfg_req::tx_burst_size. + * Note1: This parameter should be set less than or equal to the FIFO + * depth parameter set for UTC channel i.e. + * fifoDepth >= burstSize + * Note2: In case of packet mode TX channels, the Tx fifoDepth must be at + * least 2 PSI-L data phases (32 bytes) larger than the burst size given + * in this field in order to hold the packet info and extended packet info + * header which is placed at the front of the data packet in addition + * to the payload i.e. + * fifoDepth >= (burstSize + 32 bytes) + * + * Below are the supported burst sizes for various channel types + * Normal Capacity Channel - 64 bytes + * High Capacity Channel - 64, 128 or 256 bytes + * Ultra High Capacity Channel - 64, 128 or 256 bytes + */ + uint8_t supressTdCqPkt; + /**< [IN] Bool: Specifies whether or not the channel should suppress + * sending the single data phase teardown packet when teardown is + * complete. + * FALSE = TD packet is sent + * TRUE = Suppress sending TD packet + */ +} Udma_ChTxPrms; + +/** + * \brief UDMA RX channel parameters. + */ +typedef struct +{ + uint8_t pauseOnError; + /**< [IN] Bool: When set (TRUE), pause channel on error */ + uint8_t addrType; + /**< [IN] Address type for this channel. + * Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_atype */ + uint8_t chanType; + /**< [IN] Channel type. Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type */ + uint16_t fetchWordSize; + /**< [IN] Descriptor/TR Size in 32-bit words */ + uint8_t busPriority; + /**< [IN] 3-bit priority value (0=highest, 7=lowest) */ + uint8_t busQos; + /**< [IN] 3-bit qos value (0=highest, 7=lowest) */ + uint8_t busOrderId; + /**< [IN] 4-bit orderid value */ + uint8_t dmaPriority; + /**< [IN] This field selects which scheduling bin the channel will be + * placed in for bandwidth allocation of the Tx DMA units. + * Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority */ + uint16_t flowIdFwRangeStart; + /**< [IN] Starting flow ID value for firewall check */ + uint16_t flowIdFwRangeCnt; + /**< [IN] Number of valid flow ID's starting from flowIdFwRangeStart + * for firewall check */ + uint8_t flowEInfoPresent; + /**< [IN] default flow config parameter for EPIB + * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_einfo_present */ + uint8_t flowPsInfoPresent; + /**< [IN] default flow config parameter for psInfo + * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_psinfo_present */ + uint8_t flowErrorHandling; + /**< [IN] default flow config parameter for Error Handling + * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_error_handling */ + uint8_t flowSopOffset; + /**< [IN] default flow config parameter for SOP offset + * Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_sop_offset */ + uint8_t ignoreShortPkts; + /**< [IN] Bool: This field controls whether or not short packets will be + * treated as exceptions (FALSE) or ignored (TRUE) for the channel. + * This field is only used when the channel is in split UTC mode. */ + uint8_t ignoreLongPkts; + /**< [IN] Bool: This field controls whether or not long packets will be + * treated as exceptions (FALSE) or ignored (TRUE) for the channel. + * This field is only used when the channel is in split UTC mode. */ + uint32_t configDefaultFlow; + /**< [IN] Bool: This field controls whether or not to program the default + * flow. + * TRUE - Configures the default flow equal to the RX channel number + * FALSE - Doesn't configure the default flow of channel. + * The caller can allocate and use other generic flows or get the + * default flow handle and configure the flow using #Udma_flowConfig + * API at a later point of time */ + uint8_t burstSize; + /**< [IN] Specifies the nominal burst size and alignment for data transfers + * on this channel. + * Refer \ref tisci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size. + * Note1: This parameter should be set less than or equal to the FIFO + * depth parameter set for UTC channel i.e. + * fifoDepth >= burstSize + * Note2: In case of packet mode TX channels, the Tx fifoDepth must be at + * least 2 PSI-L data phases (32 bytes) larger than the burst size given + * in this field in order to hold the packet info and extended packet info + * header which is placed at the front of the data packet in addition + * to the payload i.e. + * fifoDepth >= (burstSize + 32 bytes) + * + * Below are the supported burst sizes for various channel types + * Normal Capacity Channel - 64 bytes + * High Capacity Channel - 64, 128 or 256 bytes + * Ultra High Capacity Channel - 64, 128 or 256 bytes + */ +} Udma_ChRxPrms; + +/** + * \brief UDMA PDMA channel Static TR parameters. + */ +typedef struct +{ + uint32_t elemSize; + /**< [IN] Element size. This field specifies how much data is transferred + * in each write which is performed by the PDMA. + * This is the X static TR parameter of PDMA. + * + * In case of MCAN TX/RX PDMA channel, this is not used and should be + * set to 0. + * + * Refer \ref Udma_PdmaElemSize for supported values. */ + uint32_t elemCnt; + /**< [IN] Element count. This field specifies how many elements to + * transfer each time a trigger is received on the PDMA channel. + * This is the Y static TR parameter of PDMA. + * + * In case of MCAN PDMA channel, this represents the buffer size. + * In case of MCAN TX, this field specifies how many bytes should be + * written to an MCAN TX buffer. This field includes the 8 byte MCAN + * header on the initial packet fragment. The PDMA will break up the + * source packet into fragments of this buffer size, copying the 8 byte + * MCAN header for the initial fragment, and then skipping it for each + * additional fragment and thus reusing the header from the first + * fragment. A buffer size less than 16 is treated as 16, and a buffer + * size greater than 72 is treated as 72. + * In case of MCAN RX, this field specifies how many bytes should be + * read from an MCAN RX buffer. This field includes the 8 byte MCAN + * header on the initial packet fragment. A buffer size less than 16 + * is treated as 16, and a buffer size greater than 72 is treated as 72. + */ + uint32_t fifoCnt; + /**< [IN] FIFO count. This field specifies how many full FIFO operations + * comprise a complete packet. When the count has been reached, the + * PDMA will close the packet with an 'EOP' indication. If this parameter + * is set to 0, then no packet delineation is supplied by the PDMA and + * all framing is controlled via the UDMA TR. + * + * This is the Z static TR parameter of PDMA. + * This is NA for TX and should be set to 0. + * In case of MCAN RX, this represents the buffer count. This field + * specifies how many MCAN RX buffers should be read before closing the + * CPPI packet with an 'EOP' indication. When this count is greater + * than 1, multiple MCAN RX buffers will be read into a single CPPI + * packet buffer. The 8 byte MCAN header will be skipped on subsequent + * MCAN buffer reads. Setting this field to NULL will suppress all + * packet delineation, and should be avoided. + */ +} Udma_ChPdmaPrms; + +/** + * \brief UDMA channel statistics. + */ +typedef struct +{ + uint32_t packetCnt; + /**< [OUT] Current completed packet count for the channel */ + uint32_t completedByteCnt; + /**< [OUT] Current completed payload byte count for the channel */ + uint32_t startedByteCnt; + /**< [OUT] Current started byte count for the channel */ +} Udma_ChStats; + +/** + * \brief UDMA event callback function. + * + * \param eventHandle [IN] UDMA event handle + * \param eventType [IN] Event that occurred + * \param appData [IN] Callback pointer passed during event register + */ +typedef void (*Udma_EventCallback)(Udma_EventHandle eventHandle, + uint32_t eventType, + void *appData); + +/* ========================================================================== */ +/* Structure Declarations */ +/* ========================================================================== */ + +/** + * \brief UDMA event related parameters. + * + * Requirement: DOX_REQ_TAG(PDK-2628), DOX_REQ_TAG(PDK-2627) + * DOX_REQ_TAG(PDK-2626), DOX_REQ_TAG(PDK-2625) + */ +typedef struct +{ + uint32_t eventType; + /**< [IN] Event type to register. Refer \ref Udma_EventType */ + uint32_t eventMode; + /**< [IN] Event mode - exclusive or shared. Refer \ref Udma_EventMode. + * This parameter should be set to #UDMA_EVENT_MODE_SHARED for + * #UDMA_EVENT_TYPE_MASTER event type. */ + Udma_ChHandle chHandle; + /**< [IN] Channel handle when the event type is one of below + * - #UDMA_EVENT_TYPE_DMA_COMPLETION + * - #UDMA_EVENT_TYPE_TEARDOWN_PACKET + * - #UDMA_EVENT_TYPE_TR. + * This parameter can be NULL for other types. */ + Udma_RingHandle ringHandle; + /**< [IN] Ring handle when the event type is one of below + * - #UDMA_EVENT_TYPE_RING + * This parameter can be NULL for other types. */ + Udma_EventHandle controllerEventHandle; + /**< [IN] Master event handle used to share the IA register when the event + * mode is set to #UDMA_EVENT_MODE_SHARED. + * This is typically used to share multiple events from same source + * like same peripheral to one IA register which eventually routes to + * a single core interrupt. + * For the first(or master) event this should be set to NULL. The driver + * will allocate the required resources (IA/IR) for the first event. + * For the subsequent shared event registration, the master event handle + * should be passed as reference and the driver will allocate only the + * IA status bits. At a maximum #UDMA_MAX_EVENTS_PER_VINTR number of + * events can be shared. Beyond that the driver will return error. + * This parameter should be set to NULL for #UDMA_EVENT_TYPE_MASTER + * event type. */ + Udma_EventCallback eventCb; + /**< [IN] When callback function is set (non-NULL), the driver will allocate + * core level interrupt through Interrupt Router and the function + * will be called when the registered event occurs. + * When set to NULL, the API will only allocate event and no interrupt + * routing is performed. + * Note: In case of shared events (multiple events mapped to same + * interrupt), the driver will call the callbacks in the order + * of event registration. + * This parameter should be set to NULL for #UDMA_EVENT_TYPE_MASTER + * event type. */ + uint32_t intrPriority; + /**< [IN] Priority of interrupt to register with OSAL. The interpretation + * depends on the OSAL implementation */ + void *appData; + /**< [IN] Application/caller context pointer passed back in the event + * callback function. This could be used by the caller to identify + * the channel/event for which the callback is called. + * This can be set to NULL, if not required by caller. */ + uint32_t preferredCoreIntrNum; + /**< [IN] Preferred core interrupt number which goes to a core. + * + * If set to #UDMA_CORE_INTR_ANY, will allocate from free pool. + * Else will try to allocate the mentioned interrupt itself. */ + #if (UDMA_SOC_CFG_RING_MON_PRESENT == 1) + Udma_RingMonHandle monHandle; + /**< [IN] Ring monitor handle when the event type is one of below + * - #UDMA_EVENT_TYPE_RING_MON + * This parameter can be NULL for other types. */ + #endif + /* + * Output parameters + */ + volatile uint64_t *intrStatusReg; + /**< [OUT] Interrupt status register address of the allocated IA VINT + * register. This is used to check if interrupt occurred */ + volatile uint64_t *intrClearReg; + /**< [OUT] Interrupt clear register address of the allocated IA VINT + * register. This is used to clear if interrupt occurred */ + uint64_t intrMask; + /**< [OUT] Interrupt mask to check and clear */ + uint32_t vintrNum; + /**< [OUT] IA Virtual interrupt number allocated. */ + uint32_t coreIntrNum; + /**< [OUT] Core interrupt number allocated. + * This number can be used to register with the OSAL + * + * Note: Incase of C7x, this represents the GIC SPI events to the CLEC. + * For routing this event, the driver further uses the Udma_RmInitPrms - 'startC7xCoreIntr' + * parameter as the start C7x interrupt and assumes that numIrIntr + * C7x interrupt are used by UDMA driver for one to one mapping. + * The UDMA driver directly programs the CLEC for this routing + * + * Example: startIrIntr = 700, numIrIntr = 3, startC7xCoreIntr = 32 + * + * First Event registration: + * CLEC input : 700+1024-32 + * CLEC output : 32 + * OSAL registration : 32 + * + * Second Event registration: + * CLEC input : 701+1024-32 + * CLEC output : 33 + * OSAL registration : 33 */ +} Udma_EventPrms; + +/** + * \brief UDMA RX channel flow parameters. + */ +typedef struct +{ + Udma_ChHandle rxChHandle; + /**< [IN] Deprecated member. Not used any more. */ + uint8_t einfoPresent; + /**< [IN] Set to 1 if extended packet info is present in the descriptor */ + uint8_t psInfoPresent; + /**< [IN] Set to 1 if protocol-specific info is present in the + * descriptor */ + uint8_t errorHandling; + /**< [IN] Determines how starvation errors are handled. + * 0=drop packet, 1=retry */ + uint8_t descType; + /**< [IN] Descriptor type - see \ref tisci_msg_rm_udmap_flow_cfg_req::rx_desc_type */ + uint8_t psLocation; + /**< [IN] Protocol-specific info location. + * \ref TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PS_END_PD + * \ref TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PS_BEGIN_DB + */ + uint16_t sopOffset; + /**< [IN] Start of rx packet data (byte offset from the start of + * the SOP buffer) */ + uint16_t defaultRxCQ; + /**< [IN] Rx destination queue */ + uint8_t srcTagHi; + /**< [IN] UDMAP receive flow source tag high byte constant configuration + * to be programmed into the rx_src_tag_hi field of the flow's RFLOW_RFB + * register.*/ + uint8_t srcTagLo; + /**< [IN] UDMAP receive flow source tag low byte constant configuration + * to be programmed into the rx_src_tag_lo field of the flow's RFLOW_RFB + * register.*/ + uint8_t srcTagHiSel; + /**< [IN] UDMAP receive flow source tag high byte selector configuration + * to be programmed into the rx_src_tag_hi_sel field of the RFLOW_RFC + * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi_sel. */ + uint8_t srcTagLoSel; + /**< [IN] UDMAP receive flow source tag low byte selector configuration + * to be programmed into the rx_src_tag_low_sel field of the RFLOW_RFC + * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo_sel. */ + uint8_t destTagHi; + /**< [IN] UDMAP receive flow destination tag high byte constant configuration + * to be programmed into the rx_dest_tag_hi field of the flow's RFLOW_RFB + * register.*/ + uint8_t destTagLo; + /**< [IN] UDMAP receive flow destination tag low byte constant configuration + * to be programmed into the rx_dest_tag_lo field of the flow's RFLOW_RFB + * register.*/ + uint8_t destTagHiSel; + /**< [IN] UDMAP receive flow destination tag high byte selector configuration + * to be programmed into the rx_dest_tag_hi_sel field of the RFLOW_RFC + * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi_sel. */ + uint8_t destTagLoSel; + /**< [IN] UDMAP receive flow destination tag low byte selector configuration + * to be programmed into the rx_dest_tag_low_sel field of the RFLOW_RFC + * register. Refer \ref tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo_sel. */ + uint8_t sizeThreshEn; + /**< [IN] UDMAP receive flow packet size based free buffer queue enable configuration + * to be programmed into the rx_size_thresh_en field of the RFLOW_RFC register. + * See the UDMAP section of the TRM for more information on this setting. + * Configuration of the optional size thresholds when this configuration is + * enabled is done by sending the @ref tisci_msg_rm_udmap_flow_size_thresh_cfg_req + * message to System Firmware for the receive flow allocated by this request. + * This parameter can be no greater than + * @ref TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SIZE_THRESH_MAX */ + uint16_t fdq0Sz0Qnum; + /**< [IN] UDMAP receive flow free descriptor queue 0 configuration to be programmed + * into the rx_fdq0_sz0_qnum field of the flow's RFLOW_RFD register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. */ + uint16_t fdq1Qnum; + /**< [IN] UDMAP receive flow free descriptor queue 1 configuration to be programmed + * into the rx_fdq1_qnum field of the flow's RFLOW_RFD register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. */ + uint16_t fdq2Qnum; + /**< [IN] UDMAP receive flow free descriptor queue 2 configuration to be programmed + * into the rx_fdq2_qnum field of the flow's RFLOW_RFE register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. */ + uint16_t fdq3Qnum; + /**< [IN] UDMAP receive flow free descriptor queue 3 configuration to be programmed + * into the rx_fdq3_qnum field of the flow's RFLOW_RFE register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. */ + uint16_t sizeThresh0; + /**< [IN] UDMAP receive flow packet size threshold 0 configuration to be programmed + * into the rx_size_thresh0 field of the flow's RFLOW_RFF register. See the + * UDMAP section of the TRM for more information on this setting. */ + uint16_t sizeThresh1; + /**< [IN] UDMAP receive flow packet size threshold 1 configuration to be programmed + * into the rx_size_thresh1 field of the flow's RFLOW_RFF register. See the + * UDMAP section of the TRM for more information on this setting. */ + uint16_t sizeThresh2; + /**< [IN] UDMAP receive flow packet size threshold 2 configuration to be programmed + * into the rx_size_thresh2 field of the flow's RFLOW_RFG register. See the + * UDMAP section of the TRM for more information on this setting. */ + uint16_t fdq0Sz1Qnum; + /**< [IN] UDMAP receive flow free descriptor queue for size threshold 1 configuration + * to be programmed into the rx_fdq0_sz1_qnum field of the flow's RFLOW_RFG + * register. See the UDMAP section of the TRM for more information on this + * setting. The specified free queue must be valid within the Navigator + * Subsystem and must be owned by the host, or a subordinate of the host, who + * owns the receive flow index and who is making the optional configuration + * request. */ + uint16_t fdq0Sz2Qnum; + /**< [IN] UDMAP receive flow free descriptor queue for size threshold 2 configuration + * to be programmed into the rx_fdq0_sz2_qnum field of the flow's RFLOW_RFH + * register. See the UDMAP section of the TRM for more information on this + * setting. The specified free queue must be valid within the Navigator + * Subsystem and must be owned by the host, or a subordinate of the host, who + * owns the receive flow index and who is making the optional configuration + * request. */ + uint16_t fdq0Sz3Qnum; + /**< [IN] UDMAP receive flow free descriptor queue for size threshold 3 configuration + * to be programmed into the rx_fdq0_sz3_qnum field of the flow's RFLOW_RFH + * register. See the UDMAP section of the TRM for more information on this + * setting. The specified free queue must be valid within the Navigator + * Subsystem and must be owned by the host, or a subordinate of the host, who + * owns the receive flow index and who is making the optional configuration + * request. */ +} Udma_FlowPrms; + +/** + * \brief UDMA Virtual to Physical address translation callback function. + * + * This function is used by the driver to convert virtual address to physical + * address. + * + * \param virtAddr [IN] Virtual address + * \param chNum [IN] Channel number passed during channel open + * \param appData [IN] Callback pointer passed during channel open + * + * \return Corresponding physical address + */ +typedef uint64_t (*Udma_VirtToPhyFxn)(const void *virtAddr, + uint32_t chNum, + void *appData); +/** + * \brief UDMA Physical to Virtual address translation callback function. + * + * This function is used by the driver to convert physical address to virtual + * address. + * + * \param phyAddr [IN] Physical address + * \param chNum [IN] Channel number passed during channel open + * \param appData [IN] Callback pointer passed during channel open + * + * \return Corresponding virtual address + */ +typedef void *(*Udma_PhyToVirtFxn)(uint64_t phyAddr, + uint32_t chNum, + void *appData); + +/* ========================================================================== */ +/* Structure Declarations */ +/* ========================================================================== */ + +/** + * \brief UDMA initialization parameters. + * + * Requirement: DOX_REQ_TAG(PDK-2631) + */ +typedef struct +{ + uint32_t instId; + /**< [IN] \ref Udma_InstanceIdSoc */ + uint32_t skipGlobalEventReg; + /**< Skips the global event registeration for the handle. By default this + * is set to FALSE and application can use this common handle to set the + * master event to limit the number of IA/IR registration per core + * This can be set to TRUE to skip this registration as in the case + * of having multiple handles per core in usecases */ + Udma_VirtToPhyFxn virtToPhyFxn; + /**< If not NULL, this function will be called to convert virtual address + * to physical address to be provided to UDMA. + * If NULL, the driver will assume a one-one mapping. + */ + Udma_PhyToVirtFxn phyToVirtFxn; + /**< If not NULL, this function will be called to convert physical address + * to virtual address to access the pointer returned by the UDMA. + * If NULL, the driver will assume a one-one mapping. + * + * Note: The init fxn will initialize this to the default one-one map + * function #Udma_defaultPhyToVirtFxn + */ +} Udma_InitPrms; + + +#if defined(DRV_VERSION_UDMA_V0) +/** + * \brief UDMA ring object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_RingObjectInt_t +{ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + + uint16_t ringNum; + /**< Ring number */ + +#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) + CSL_LcdmaRingaccRingCfg lcdmaCfg; + /**< Lcdma Ring config */ + + /* Below register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_lcdma_ringacc_ring_cfgRegs_RING *pLcdmaCfgRegs; + /**< Pointer to Lcdma RA config register overlay */ + volatile CSL_lcdma_ringacc_ringrtRegs_ring *pLcdmaRtRegs; + /**< Pointer to Lcdma RA RT config register overlay */ +#endif + + uint32_t ringInitDone; + /**< Flag to set the ring object is init. */ + + uint32_t mappedRingGrp; + /**< The allocated mapped ring group when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped ring. + * + * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX ring groups + * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX ring groups. + * + * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID + */ + uint32_t mappedChNum; + /**< The assigned mapped channel number when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped ring. + * + * For unmapped case, this will be #UDMA_DMA_CH_INVALID. + */ +} Udma_RingObjectInt; + +/** + * \brief UDMA flow object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_FlowObjectInt_t +{ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + + uint32_t flowStart; + /**< Flow ID start number. + * + * Note: In case of mapped flow(in devices like AM64x), this indicates the + * mapped flow idx managed by this flow handle. + * + */ + uint32_t flowCnt; + /**< Number of flow IDs allocated - Contiguos flows are allocated + * + * Note: In case of mapped flow(in devices like AM64x), this will be 1 + * since only one mapped flow is managed by a flow handle. + */ + + uint32_t flowInitDone; + /**< Flag to set the flow object is init. */ + + uint32_t mappedFlowGrp; + /**< The allocated mapped flow group when channel type is + * #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped flow. + * + * Refer \ref Udma_MappedRxGrpSoc macro for details about mapped RX flow groups. + * + * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID + */ + uint32_t mappedChNum; + /**< The assigned mapped channel number when channel type is + * #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped flow. + * + * For unmapped case, this will be #UDMA_DMA_CH_INVALID. + */ +} Udma_FlowObjectInt; + +/** + * \brief UDMA event object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_EventObjectInt_t +{ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + Udma_EventPrms eventPrms; + /**< Event parameters passed during event registeration. */ + + uint32_t globalEvent; + /**< Allocated IA global event. */ + uint32_t vintrNum; + /**< Allocated IA VINT register. */ + uint32_t vintrBitNum; + /**< Allocated IA VINT bit number - 0 to 63. */ + uint32_t irIntrNum; + /**< Allocated interrupt router number. + * In case of devices like AM64x, where there are no Interrupt Routers, + * irIntrNum refers to coreIntrNum number itself. */ + uint32_t coreIntrNum; + /**< Allocated core interrupt number. */ + + Udma_EventHandleInt nextEvent; + /**< Pointer to next event - used in shared event for traversing in ISR */ + Udma_EventHandleInt prevEvent; + /**< Pointer to previous event - used in shared event for traversing during + * event un-registration */ + + void *hwiHandle; + /**< HWI handle. */ + HwiP_Object hwiObject; + /**< HWI Object. */ + uint64_t vintrBitAllocFlag; + /**< For master event, this stores the alloc flag for each bit within + * IA register. This is not used for slave events and is always set to + * zero */ + + /* Below register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_intaggr_imapRegs_gevi *pIaGeviRegs; + /**< Pointer to IA global event register overlay */ + volatile CSL_intaggr_intrRegs_vint *pIaVintrRegs; + /**< Pointer to IA virtual interrupt register overlay */ + + uint32_t eventInitDone; + /**< Flag to set the event object is init. */ +} Udma_EventObjectInt; + +/** + * \brief UDMA channel object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_ChObjectInt_t +{ + uint32_t chType; + /**< UDMA channel type. Refer \ref Udma_ChType. */ + Udma_ChPrms chPrms; + /**< Object to store the channel params. */ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + + uint32_t txChNum; + /**< Allocated TX channel number - this is relative channel number from + * base TX channel. This is valid only when the channel is opened for + * TX and block copy mode */ + uint32_t rxChNum; + /**< Allocated RX channel number - this is relative channel number from + * base RX channel. This is valid only when the channel is opened for + * RX and block copy mode */ + uint32_t extChNum; + /**< Allocated Ext channel number - this is relative channel number from + * base External channel. This is valid only when the channel is opened + * for UTC mode */ + uint32_t pdmaChNum; + /**< Allocated peer PDMA channel number. This is valid only when the + * channel is opened for PDMA mode */ + uint32_t peerThreadId; + /**< Peer channel thread ID - this is or'ed with thread offset. */ + + Udma_RingHandleInt fqRing; + /**< Free queue ring handle */ + Udma_RingHandleInt cqRing; + /**< Completion queue ring handle + * For AM64x kind of devices, where there is no seperate Completion queue, + * this points to fqRing itself. + */ + Udma_RingHandleInt tdCqRing; + /**< Teardown completion queue ring handle */ + + Udma_RingObjectInt fqRingObj; + /**< Free queue ring object */ + Udma_RingObjectInt cqRingObj; + /**< Completion queue ring object + * Not used for AM64x kind of devices, where there is no seperate Completion queue. + */ + Udma_RingObjectInt tdCqRingObj; + /**< Teardown completion queue ring object + * Not used for AM64x kind of devices, where teardown function is not present. + */ + + Udma_FlowHandleInt defaultFlow; + /**< Default flow handle */ + Udma_FlowObjectInt defaultFlowObj; + /**< Default flow object - Flow ID equal to the RX channel is reserved + * as the default flow for the channel. This object is used for + * providing handle to the caller to re-program the default flow using + * the standard flow API's */ + + Udma_ChTxPrms txPrms; + /**< TX channel parameter passed during channel config. */ + Udma_ChRxPrms rxPrms; + /**< RX channel parameter passed during channel config. */ + +#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) + /* Below BCDMA register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_bcdma_bccfgRegs_chan *pBcdmaBcCfgRegs; + /**< Pointer to BCDMA Block copy config register overlay */ + volatile CSL_bcdma_bcrtRegs_chan *pBcdmaBcRtRegs; + /**< Pointer to BCDMA Block copy RT config register overlay */ + volatile CSL_bcdma_txccfgRegs_chan *pBcdmaTxCfgRegs; + /**< Pointer to BCDMA TX config register overlay */ + volatile CSL_bcdma_txcrtRegs_chan *pBcdmaTxRtRegs; + /**< Pointer to BCDMA TX RT config register overlay */ + volatile CSL_bcdma_rxccfgRegs_chan *pBcdmaRxCfgRegs; + /**< Pointer to BCDMA RX config register overlay */ + volatile CSL_bcdma_rxcrtRegs_chan *pBcdmaRxRtRegs; + /**< Pointer to BCDMA RX RT config register overlay */ + + /* Below PKTDMA register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_pktdma_txccfgRegs_chan *pPktdmaTxCfgRegs; + /**< Pointer to PKTDMA TX config register overlay */ + volatile CSL_pktdma_txcrtRegs_chan *pPktdmaTxRtRegs; + /**< Pointer to PKTDMA TX RT config register overlay */ + volatile CSL_pktdma_rxccfgRegs_chan *pPktdmaRxCfgRegs; + /**< Pointer to PKTDMA RX config register overlay */ + volatile CSL_pktdma_rxcrtRegs_chan *pPktdmaRxRtRegs; + /**< Pointer to PKTDMA RX RT config register overlay */ + volatile CSL_pktdma_txccfgRegs_chan *pPktdmaExtCfgRegs; + /**< Pointer to PKTDMA External config register overlay */ + volatile CSL_pktdma_txcrtRegs_chan *pPktdmaExtRtRegs; + /**< Pointer to PKTDMA External RT config register overlay */ +#endif + + uint32_t chInitDone; + /**< Flag to set the channel object is init. */ + uint32_t chOesAllocDone; + /**< Flag to check if the channel's OES is allocated. This is required + * because the channel OES is used for chaining as well as for + * TR event registeration. This allows to check for error when both + * are requested by user on the same channel */ + uint32_t trigger; + /**< Channel trigger used when chaining channels - needed at the time of + * breaking the chaining */ +} Udma_ChObjectInt; + +/** + * \brief UDMA resource manager init parameters. + * + * This assumes contiguos allocation of 'N' resources from a start offset + * to keep the interface simple. + * + * Note: This is applicable for the driver handle as given during init call. + * The init call doesn't (can't rather) check for resource overlap across + * handles and across cores. It is the callers responsibility to ensure that + * resources overlaps are not present. + */ +typedef struct +{ + uint32_t startBlkCopyUhcCh; + /**< Start ultra high capacity block copy channel from which this UDMA + * driver instance manages */ + uint32_t numBlkCopyUhcCh; + /**< Number of ultra high capacity block copy channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_UHC_CH */ + uint32_t startBlkCopyHcCh; + /**< Start high capacity block copy channel from which this UDMA + * driver instance manages */ + uint32_t numBlkCopyHcCh; + /**< Number of ultra high capacity block copy channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_HC_CH */ + uint32_t startBlkCopyCh; + /**< Start Block copy channel from which this UDMA driver instance manages */ + uint32_t numBlkCopyCh; + /**< Number of Block copy channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_CH */ + + uint32_t startTxUhcCh; + /**< Start ultra high capacity TX channel from which this UDMA driver + * instance manages */ + uint32_t numTxUhcCh; + /**< Number of ultra high capacity TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_TX_UHC_CH */ + uint32_t startTxHcCh; + /**< Start high capacity TX channel from which this UDMA driver instance + * manages */ + uint32_t numTxHcCh; + /**< Number of high capacity TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_TX_HC_CH */ + uint32_t startTxCh; + /**< Start TX channel from which this UDMA driver instance manages */ + uint32_t numTxCh; + /**< Number of TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_TX_CH */ + + uint32_t startRxUhcCh; + /**< Start ultra high capacity RX channel from which this UDMA driver + * instance manages */ + uint32_t numRxUhcCh; + /**< Number of high capacity RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_RX_UHC_CH */ + uint32_t startRxHcCh; + /**< Start high capacity RX channel from which this UDMA driver instance + * manages */ + uint32_t numRxHcCh; + /**< Number of high capacity RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_RX_HC_CH */ + uint32_t startRxCh; + /**< Start RX channel from which this UDMA driver instance manages */ + uint32_t numRxCh; + /**< Number of RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_RX_CH */ + +#if (UDMA_NUM_MAPPED_TX_GROUP > 0) + uint32_t startMappedTxCh[UDMA_NUM_MAPPED_TX_GROUP]; + /**< Start Mapped TX channel from which this UDMA driver instance + * manages */ + uint32_t numMappedTxCh[UDMA_NUM_MAPPED_TX_GROUP]; + /**< Number of Mapped TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP */ +#endif + +#if (UDMA_NUM_MAPPED_RX_GROUP > 0) + uint32_t startMappedRxCh[UDMA_NUM_MAPPED_RX_GROUP]; + /**< Start Mapped RX channel from which this UDMA driver instance + * manages */ + uint32_t numMappedRxCh[UDMA_NUM_MAPPED_RX_GROUP]; + /**< Number of Mapped RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP */ +#endif + +#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) + uint32_t startMappedRing[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP]; + /**< Start Mapped ring from which this UDMA driver instance + * manages */ + uint32_t numMappedRing[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP]; + /**< Number of Mapped ring to be managed. + * Note: This cannot exceed UDMA_RM_MAX_MAPPED_RING_PER_GROUP */ +#endif + + uint32_t startFreeFlow; + /**< Start free flow from which this UDMA driver instance manages */ + uint32_t numFreeFlow; + /**< Number of free flow to be managed. + * Note: This cannot exceed UDMA_RM_MAX_FREE_FLOW */ + uint32_t startFreeRing; + /**< Start free ring from which this UDMA driver instance manages */ + uint32_t numFreeRing; + /**< Number of free ring to be managed. + * Note: This cannot exceed UDMA_RM_MAX_FREE_RING */ + + uint32_t startGlobalEvent; + /**< Start global event from which this UDMA driver instance manages */ + uint32_t numGlobalEvent; + /**< Number of global event to be managed. + * Note: This cannot exceed UDMA_RM_MAX_GLOBAL_EVENT */ + uint32_t startVintr; + /**< Start VINT number from which this UDMA driver instance manages */ + uint32_t numVintr; + /**< Number of VINT to be managed. + * Note: This cannot exceed UDMA_RM_MAX_VINTR */ + uint32_t startIrIntr; + /**< Start IR interrupt from which this UDMA driver instance manages. */ + uint32_t numIrIntr; + /**< Number of IR interrupts to be managed. + * Note: This cannot exceed UDMA_RM_MAX_IR_INTR */ +} Udma_RmInitPrms; + +/** + * \brief UDMA driver object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_DrvObjectInt_t +{ + uint32_t instType; + /**< Udma Instance Type */ + uint32_t raType; + /**< Udma Ring Accelerator Type */ + +#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) + /* + * LCDMA DMSS specific instance parameters + */ + CSL_BcdmaCfg bcdmaRegs; + /**< BCDMA register configuration */ + CSL_PktdmaCfg pktdmaRegs; + /**< PKTDMA register configuration */ +#endif +#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) + CSL_LcdmaRingaccCfg lcdmaRaRegs; +#endif + /**< RA register configuration */ + CSL_IntaggrCfg iaRegs; + /**< Interrupt Aggregator configuration */ + uint32_t udmapSrcThreadOffset; + /**< UDMAP Source/TX thread offset */ + uint32_t udmapDestThreadOffset; + /**< UDMAP Dest/RX thread offset */ + uint32_t maxRings; + /**< Maximun number of rings present in the NAVSS instance */ + + /* + * TISCI RM parameters + */ + uint16_t devIdRing; + /**< Ring RM ID */ + uint16_t devIdUdma; + /**< UDMA RM ID */ + uint16_t devIdPsil; + /**< PSIL RM ID */ + uint16_t devIdIa; + /**< IA RM ID */ + uint16_t devIdIr; + /**< IR RM ID */ + uint16_t devIdCore; + /**< Core RM ID */ + /* + * TISCI Ring event IRQ params + * + * These IRQ offsets should be corresponding TISCI offset - ringNum Offset + */ + uint16_t srcIdRingIrq; + /**< Ring completion event IRQ Source ID. */ + uint32_t blkCopyRingIrqOffset; + /**< Block Copy channel ring completion event IRQ offset. */ + uint32_t txRingIrqOffset; + /**< TX channel ring completion event IRQ offset. */ + uint32_t rxRingIrqOffset; + /**< RX channel ring completion event IRQ offset. */ + /* + * TISCI TR event IRQ params + * + * These IRQ offsets should be corresponding TISCI offset - chNum Offset + */ + uint16_t srcIdTrIrq; + /**< TR event IRQ Source ID. */ + uint32_t blkCopyTrIrqOffset; + /**< Block Copy channel TR event IRQ offset. */ + uint32_t txTrIrqOffset; + /**< TX channel TR event IRQ offset. */ + uint32_t rxTrIrqOffset; + /**< RX channel TR event IRQ offset. */ + /* + * Channel Offsets + */ + uint32_t txChOffset; + /**< TX channel offset. */ + uint32_t extChOffset; + /**< External channel offset. */ + uint32_t rxChOffset; + /**< RX channel offset. */ + /* + * The driver allocates ringNum = chNum (for BlkCpoy) + = chNum + txChOffset (for SplitTR Tx) + = chNum + rxChOffset (for SplitTR Rx) + + For CSL_bcdma* API's passed param ->channel_num = txChNum (for BlkCopy) + = txChNum + txChOffset (for SplitTR Tx) + = rxChNum + rxChOffset (for SplitTR Rx) + */ + /* + * Other Offsets + */ + uint32_t iaGemOffset; + /**< IA global event map offset to differentiate between main and MCU NAVSS */ + uint32_t trigGemOffset; + /**< UDMAP trigger global event map offset to differentiate between main + * and MCU NAVSS */ + + Udma_EventObjectInt globalEventObj; + /**< Object to store global event. */ + Udma_EventHandleInt globalEventHandle; + /**< Global event handle. */ + + Udma_InitPrms initPrms; + /**< Object to store the init params. */ + Udma_RmInitPrms rmInitPrms; + /**< RM init parameters */ + uint32_t drvInitDone; + /**< Flag to check if the driver object is init properly or not. */ + + /* + * RM objects. + * This is a bitwise flag + * 1 - free, 0 - allocated + */ + uint32_t blkCopyChFlag[UDMA_RM_BLK_COPY_CH_ARR_SIZE]; + /**< UDMA Block copy channel allocation flag */ + uint32_t blkCopyHcChFlag[UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE]; + /**< UDMA high capacity Block copy channel allocation flag */ + uint32_t blkCopyUhcChFlag[UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE]; + /**< UDMA ultra high capacity Block copy channel allocation flag */ + + uint32_t txChFlag[UDMA_RM_TX_CH_ARR_SIZE]; + /**< UDMA TX channel allocation flag */ + uint32_t txHcChFlag[UDMA_RM_TX_HC_CH_ARR_SIZE]; + /**< UDMA high capacity TX channel allocation flag */ + uint32_t txUhcChFlag[UDMA_RM_TX_UHC_CH_ARR_SIZE]; + + /**< UDMA ultra high capacity TX channel allocation flag */ + uint32_t rxChFlag[UDMA_RM_RX_CH_ARR_SIZE]; + /**< UDMA RX channel allocation flag */ + uint32_t rxHcChFlag[UDMA_RM_RX_HC_CH_ARR_SIZE]; + /**< UDMA high capacity RX channel allocation flag */ + uint32_t rxUhcChFlag[UDMA_RM_RX_UHC_CH_ARR_SIZE]; + /**< UDMA ultra high capacity RX channel allocation flag */ + +#if (UDMA_NUM_MAPPED_TX_GROUP > 0) + uint32_t mappedTxChFlag[UDMA_NUM_MAPPED_TX_GROUP][UDMA_RM_MAPPED_TX_CH_ARR_SIZE]; + /**< UDMA mapped TX channel allocation flag */ +#endif +#if (UDMA_NUM_MAPPED_RX_GROUP > 0) + uint32_t mappedRxChFlag[UDMA_NUM_MAPPED_RX_GROUP][UDMA_RM_MAPPED_RX_CH_ARR_SIZE]; + /**< UDMA mapped RX channel allocation flag */ +#endif +#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) + uint32_t mappedRingFlag[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP][UDMA_RM_MAPPED_RING_ARR_SIZE]; + /**< UDMA mapped ring allocation flag */ +#endif + + uint32_t freeRingFlag[UDMA_RM_FREE_RING_ARR_SIZE]; + /**< UDMA free ring allocation flag */ + uint32_t freeFlowFlag[UDMA_RM_FREE_FLOW_ARR_SIZE]; + /**< UDMA free flow allocation flag */ + uint32_t globalEventFlag[UDMA_RM_GLOBAL_EVENT_ARR_SIZE]; + /**< IA global event allocation flag */ + uint32_t vintrFlag[UDMA_RM_VINTR_ARR_SIZE]; + /**< IA VINTR allocation flag */ + uint32_t irIntrFlag[UDMA_RM_IR_INTR_ARR_SIZE]; + /**< IR interrupt allocation flag */ + + void *rmLock; + /**< Mutex to protect RM allocation. */ + SemaphoreP_Object rmLockObj; + /**< Mutex object. */ +} Udma_DrvObjectInt; +#else +/** + * \brief UDMA resource manager init parameters. + * + * This assumes contiguos allocation of 'N' resources from a start offset + * to keep the interface simple. + * + * Note: This is applicable for the driver handle as given during init call. + * The init call doesn't (can't rather) check for resource overlap across + * handles and across cores. It is the callers responsibility to ensure that + * resources overlaps are not present. + */ +typedef struct +{ + uint32_t startBlkCopyUhcCh; + /**< Start ultra high capacity block copy channel from which this UDMA + * driver instance manages */ + uint32_t numBlkCopyUhcCh; + /**< Number of ultra high capacity block copy channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_UHC_CH */ + uint32_t startBlkCopyHcCh; + /**< Start high capacity block copy channel from which this UDMA + * driver instance manages */ + uint32_t numBlkCopyHcCh; + /**< Number of ultra high capacity block copy channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_HC_CH */ + uint32_t startBlkCopyCh; + /**< Start Block copy channel from which this UDMA driver instance manages */ + uint32_t numBlkCopyCh; + /**< Number of Block copy channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_CH */ + + uint32_t startTxUhcCh; + /**< Start ultra high capacity TX channel from which this UDMA driver + * instance manages */ + uint32_t numTxUhcCh; + /**< Number of ultra high capacity TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_TX_UHC_CH */ + uint32_t startTxHcCh; + /**< Start high capacity TX channel from which this UDMA driver instance + * manages */ + uint32_t numTxHcCh; + /**< Number of high capacity TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_TX_HC_CH */ + uint32_t startTxCh; + /**< Start TX channel from which this UDMA driver instance manages */ + uint32_t numTxCh; + /**< Number of TX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_TX_CH */ + + uint32_t startRxUhcCh; + /**< Start ultra high capacity RX channel from which this UDMA driver + * instance manages */ + uint32_t numRxUhcCh; + /**< Number of high capacity RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_RX_UHC_CH */ + uint32_t startRxHcCh; + /**< Start high capacity RX channel from which this UDMA driver instance + * manages */ + uint32_t numRxHcCh; + /**< Number of high capacity RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_RX_HC_CH */ + uint32_t startRxCh; + /**< Start RX channel from which this UDMA driver instance manages */ + uint32_t numRxCh; + /**< Number of RX channel to be managed. + * Note: This cannot exceed UDMA_RM_MAX_RX_CH */ + uint32_t startFreeFlow; + /**< Start free flow from which this UDMA driver instance manages */ + uint32_t numFreeFlow; + /**< Number of free flow to be managed. + * Note: This cannot exceed UDMA_RM_MAX_FREE_FLOW */ + uint32_t startFreeRing; + /**< Start free ring from which this UDMA driver instance manages */ + uint32_t numFreeRing; + /**< Number of free ring to be managed. + * Note: This cannot exceed UDMA_RM_MAX_FREE_RING */ + + uint32_t startGlobalEvent; + /**< Start global event from which this UDMA driver instance manages */ + uint32_t numGlobalEvent; + /**< Number of global event to be managed. + * Note: This cannot exceed UDMA_RM_MAX_GLOBAL_EVENT */ + uint32_t startVintr; + /**< Start VINT number from which this UDMA driver instance manages */ + uint32_t numVintr; + /**< Number of VINT to be managed. + * Note: This cannot exceed UDMA_RM_MAX_VINTR */ + uint32_t startIrIntr; + /**< Start IR interrupt from which this UDMA driver instance manages. */ + uint32_t numIrIntr; + /**< Number of IR interrupts to be managed. + * Note: This cannot exceed UDMA_RM_MAX_IR_INTR */ + uint32_t proxyThreadNum; + /**< Proxy thread to push/pop to ring in proxy mode. + * By default driver will initialize to a default value based on + * core and NAVSS instance. User can override this based on need. + * The default proxy allocation starts from #UDMA_DEFAULT_RM_PROXY_THREAD_START + * and will allocate 1 per core. So total allocation will be from + * #UDMA_DEFAULT_RM_PROXY_THREAD_START to + * (#UDMA_DEFAULT_RM_PROXY_THREAD_START + num cores) in an SOC. + * + * The proxy thread number should be allocated within a NAVSS instance + * as a proxy can access ring only within the same NAVSS instance. The + * driver assumes the right proxy instance to use based on the + * instance ID (instId) provided in #Udma_init API + * + * Also this should be set a unique number across core and NAVSS + * instance. Care should be taken not to use the same proxy across + * the system. + * + * Warning: When using multiple UDMA handle for the same NAVSS instance + * within a core, care should taken to provide a unique proxy number + * per handle. Otherwise the the driver handle will use the same + * proxy for ring operation and will result in unintended behaviour and + * corruption of ring memory/operation. + */ + uint32_t startProxy; + /**< Start proxy from which this UDMA driver instance manages. + * Note this should not overlap with proxyThreadNum */ + uint32_t numProxy; + /**< Number of proxy to be managed. + * Note: This cannot exceed #UDMA_RM_MAX_PROXY */ + uint32_t startRingMon; + /**< Start monitor from which this UDMA driver instance manages */ + uint32_t numRingMon; + /**< Number of monitors to be managed. + * Note: This cannot exceed #UDMA_RM_MAX_RING_MON */ +} Udma_RmInitPrms; +/** + * \brief UDMA ring object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_RingObjectInt_t +{ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + + uint16_t ringNum; + /**< Ring number */ + CSL_RingAccRingCfg cfg; + /**< Ring config */ + + /* Below register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_ringacc_cfgRegs_RING *pCfgRegs; + /**< Pointer to RA config register overlay */ + volatile CSL_ringacc_rtRegs_RINGRT *pRtRegs; + /**< Pointer to RA RT config register overlay */ + /* Proxy address for the ring. Calculated at alloc time to reduce cycles at + * runtime */ + uintptr_t proxyAddr; + /**< Proxy address for push/pop ring operation through proxy */ + uint32_t ringInitDone; + /**< Flag to set the ring object is init. */ + + uint32_t mappedRingGrp; + /**< The allocated mapped ring group when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped ring. + * + * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX ring groups + * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX ring groups. + * + * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID + */ + uint32_t mappedChNum; + /**< The assigned mapped channel number when channel type is + * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped ring. + * + * For unmapped case, this will be #UDMA_DMA_CH_INVALID. + */ +} Udma_RingObjectInt; + +/** + * \brief UDMA flow object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_FlowObjectInt_t +{ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + + uint32_t flowStart; + /**< Flow ID start number. + * + * Note: In case of mapped flow(in devices like AM64x), this indicates the + * mapped flow idx managed by this flow handle. + * + */ + uint32_t flowCnt; + /**< Number of flow IDs allocated - Contiguos flows are allocated + * + * Note: In case of mapped flow(in devices like AM64x), this will be 1 + * since only one mapped flow is managed by a flow handle. + */ + + uint32_t flowInitDone; + /**< Flag to set the flow object is init. */ + + uint32_t mappedFlowGrp; + /**< The allocated mapped flow group when channel type is + * #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped flow. + * + * Refer \ref Udma_MappedRxGrpSoc macro for details about mapped RX flow groups. + * + * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID + */ + uint32_t mappedChNum; + /**< The assigned mapped channel number when channel type is + * #UDMA_CH_TYPE_RX_MAPPED. + * + * This is needed to free the mapped flow. + * + * For unmapped case, this will be #UDMA_DMA_CH_INVALID. + */ +} Udma_FlowObjectInt; + +/** + * \brief UDMA event object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_EventObjectInt_t +{ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + Udma_EventPrms eventPrms; + /**< Event parameters passed during event registeration. */ + + uint32_t globalEvent; + /**< Allocated IA global event. */ + uint32_t vintrNum; + /**< Allocated IA VINT register. */ + uint32_t vintrBitNum; + /**< Allocated IA VINT bit number - 0 to 63. */ + uint32_t irIntrNum; + /**< Allocated interrupt router number. + * In case of devices like AM64x, where there are no Interrupt Routers, + * irIntrNum refers to coreIntrNum number itself. */ + uint32_t coreIntrNum; + /**< Allocated core interrupt number. */ + + Udma_EventHandleInt nextEvent; + /**< Pointer to next event - used in shared event for traversing in ISR */ + Udma_EventHandleInt prevEvent; + /**< Pointer to previous event - used in shared event for traversing during + * event un-registration */ + + void *hwiHandle; + /**< HWI handle. */ + HwiP_Object hwiObject; + /**< HWI Object. */ + uint64_t vintrBitAllocFlag; + /**< For master event, this stores the alloc flag for each bit within + * IA register. This is not used for slave events and is always set to + * zero */ + + /* Below register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_intaggr_imapRegs_gevi *pIaGeviRegs; + /**< Pointer to IA global event register overlay */ + volatile CSL_intaggr_intrRegs_vint *pIaVintrRegs; + /**< Pointer to IA virtual interrupt register overlay */ + + uint32_t eventInitDone; + /**< Flag to set the event object is init. */ +} Udma_EventObjectInt; + +/** + * \brief UDMA channel object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_ChObjectInt_t +{ + uint32_t chType; + /**< UDMA channel type. Refer \ref Udma_ChType. */ + Udma_ChPrms chPrms; + /**< Object to store the channel params. */ + Udma_DrvHandleInt drvHandle; + /**< Pointer to global driver handle. */ + uint32_t txChNum; + /**< Allocated TX channel number - this is relative channel number from + * base TX channel. This is valid only when the channel is opened for + * TX and block copy mode */ + uint32_t rxChNum; + /**< Allocated RX channel number - this is relative channel number from + * base RX channel. This is valid only when the channel is opened for + * RX and block copy mode */ + uint32_t extChNum; + /**< Allocated Ext channel number - this is relative channel number from + * base External channel. This is valid only when the channel is opened + * for UTC mode */ + uint32_t pdmaChNum; + /**< Allocated peer PDMA channel number. This is valid only when the + * channel is opened for PDMA mode */ + uint32_t peerThreadId; + /**< Peer channel thread ID - this is or'ed with thread offset. */ + + Udma_RingHandleInt fqRing; + /**< Free queue ring handle */ + Udma_RingHandleInt cqRing; + /**< Completion queue ring handle + * For AM64x kind of devices, where there is no seperate Completion queue, + * this points to fqRing itself. + */ + Udma_RingHandleInt tdCqRing; + /**< Teardown completion queue ring handle */ + + Udma_RingObjectInt fqRingObj; + /**< Free queue ring object */ + Udma_RingObjectInt cqRingObj; + /**< Completion queue ring object + * Not used for AM64x kind of devices, where there is no seperate Completion queue. + */ + Udma_RingObjectInt tdCqRingObj; + /**< Teardown completion queue ring object + * Not used for AM64x kind of devices, where teardown function is not present. + */ + + Udma_FlowHandleInt defaultFlow; + /**< Default flow handle */ + Udma_FlowObjectInt defaultFlowObj; + /**< Default flow object - Flow ID equal to the RX channel is reserved + * as the default flow for the channel. This object is used for + * providing handle to the caller to re-program the default flow using + * the standard flow API's */ + + Udma_ChTxPrms txPrms; + /**< TX channel parameter passed during channel config. */ + Udma_ChRxPrms rxPrms; + /**< RX channel parameter passed during channel config. */ + + /* Below UDMAP register overlay pointers provided for debug purpose to + * readily view the registers */ + volatile CSL_udmap_txccfgRegs_chan *pTxCfgRegs; + /**< Pointer to UDMAP TX config register overlay */ + volatile CSL_udmap_txcrtRegs_chan *pTxRtRegs; + /**< Pointer to UDMAP TX RT config register overlay */ + volatile CSL_udmap_rxccfgRegs_chan *pRxCfgRegs; + /**< Pointer to UDMAP RX config register overlay */ + volatile CSL_udmap_rxcrtRegs_chan *pRxRtRegs; + /**< Pointer to UDMAP RX RT config register overlay */ + volatile CSL_udmap_txccfgRegs_chan *pExtCfgRegs; + /**< Pointer to UDMAP External config register overlay */ + volatile CSL_udmap_txcrtRegs_chan *pExtRtRegs; + /**< Pointer to UDMAP External RT config register overlay */ + uint32_t chInitDone; + /**< Flag to set the channel object is init. */ + uint32_t chOesAllocDone; + /**< Flag to check if the channel's OES is allocated. This is required + * because the channel OES is used for chaining as well as for + * TR event registeration. This allows to check for error when both + * are requested by user on the same channel */ + uint32_t trigger; + /**< Channel trigger used when chaining channels - needed at the time of + * breaking the chaining */ +} Udma_ChObjectInt; +/** + * \brief UDMA driver object. + * + * Note: This is an internal/private driver structure and should not be + * used or modified by caller. + */ +typedef struct Udma_DrvObjectInt_t +{ + uint32_t instType; + /**< Udma Instance Type */ + uint32_t raType; + /**< Udma Ring Accelerator Type */ + /* + * NAVSS instance parameters + */ + CSL_UdmapCfg udmapRegs; + /**< UDMAP register configuration */ + CSL_RingAccCfg raRegs; + /**< RA register configuration */ + CSL_IntaggrCfg iaRegs; + /**< Interrupt Aggregator configuration */ + uint32_t udmapSrcThreadOffset; + /**< UDMAP Source/TX thread offset */ + uint32_t udmapDestThreadOffset; + /**< UDMAP Dest/RX thread offset */ + uint32_t maxRings; + /**< Maximun number of rings present in the NAVSS instance */ + uint32_t maxProxy; + /**< Maximun number of proxy present in the NAVSS instance */ + uint32_t maxRingMon; + /**< Maximun number of ring monitors present in the NAVSS instance */ + /* + * Proxy parameters + */ + CSL_ProxyCfg proxyCfg; + /*< Proxy register configuration */ + CSL_ProxyTargetParams proxyTargetRing; + /*< Proxy ring target register configuration */ + uint32_t proxyTargetNumRing; + /*< Proxy ring target index */ + /* + * TISCI RM parameters + */ + uint16_t devIdRing; + /**< Ring RM ID */ + uint16_t devIdUdma; + /**< UDMA RM ID */ + uint16_t devIdPsil; + /**< PSIL RM ID */ + uint16_t devIdIa; + /**< IA RM ID */ + uint16_t devIdIr; + /**< IR RM ID */ + uint16_t devIdProxy; + /**< Proxy RM ID */ + uint16_t devIdCore; + /**< Core RM ID */ + /* + * TISCI Ring event IRQ params + * + * These IRQ offsets should be corresponding TISCI offset - ringNum Offset + */ + uint16_t srcIdRingIrq; + /**< Ring completion event IRQ Source ID. */ + uint32_t blkCopyRingIrqOffset; + /**< Block Copy channel ring completion event IRQ offset. */ + uint32_t txRingIrqOffset; + /**< TX channel ring completion event IRQ offset. */ + uint32_t rxRingIrqOffset; + /**< RX channel ring completion event IRQ offset. */ + /* + * TISCI TR event IRQ params + * + * These IRQ offsets should be corresponding TISCI offset - chNum Offset + */ + uint16_t srcIdTrIrq; + /**< TR event IRQ Source ID. */ + uint32_t blkCopyTrIrqOffset; + /**< Block Copy channel TR event IRQ offset. */ + uint32_t txTrIrqOffset; + /**< TX channel TR event IRQ offset. */ + uint32_t rxTrIrqOffset; + /**< RX channel TR event IRQ offset. */ + /* + * Channel Offsets + */ + uint32_t txChOffset; + /**< TX channel offset. */ + uint32_t extChOffset; + /**< External channel offset. */ + uint32_t rxChOffset; + /**< RX channel offset. */ + /* + * The driver allocates ringNum = chNum (for BlkCpoy) + = chNum + txChOffset (for SplitTR Tx) + = chNum + rxChOffset (for SplitTR Rx) + + For CSL_bcdma* API's passed param ->channel_num = txChNum (for BlkCopy) + = txChNum + txChOffset (for SplitTR Tx) + = rxChNum + rxChOffset (for SplitTR Rx) + */ + /* + * Other Offsets + */ + uint32_t iaGemOffset; + /**< IA global event map offset to differentiate between main and MCU NAVSS */ + uint32_t trigGemOffset; + /**< UDMAP trigger global event map offset to differentiate between main + * and MCU NAVSS */ + + Udma_EventObjectInt globalEventObj; + /**< Object to store global event. */ + Udma_EventHandleInt globalEventHandle; + /**< Global event handle. */ + + Udma_InitPrms initPrms; + /**< Object to store the init params. */ + Udma_RmInitPrms rmInitPrms; + /**< RM init parameters */ + uint32_t drvInitDone; + /**< Flag to check if the driver object is init properly or not. */ + + /* + * RM objects. + * This is a bitwise flag + * 1 - free, 0 - allocated + */ + uint32_t blkCopyChFlag[UDMA_RM_BLK_COPY_CH_ARR_SIZE]; + /**< UDMA Block copy channel allocation flag */ + uint32_t blkCopyHcChFlag[UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE]; + /**< UDMA high capacity Block copy channel allocation flag */ + uint32_t blkCopyUhcChFlag[UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE]; + /**< UDMA ultra high capacity Block copy channel allocation flag */ + + uint32_t txChFlag[UDMA_RM_TX_CH_ARR_SIZE]; + /**< UDMA TX channel allocation flag */ + uint32_t txHcChFlag[UDMA_RM_TX_HC_CH_ARR_SIZE]; + /**< UDMA high capacity TX channel allocation flag */ + uint32_t txUhcChFlag[UDMA_RM_TX_UHC_CH_ARR_SIZE]; + + /**< UDMA ultra high capacity TX channel allocation flag */ + uint32_t rxChFlag[UDMA_RM_RX_CH_ARR_SIZE]; + /**< UDMA RX channel allocation flag */ + uint32_t rxHcChFlag[UDMA_RM_RX_HC_CH_ARR_SIZE]; + /**< UDMA high capacity RX channel allocation flag */ + uint32_t rxUhcChFlag[UDMA_RM_RX_UHC_CH_ARR_SIZE]; + /**< UDMA ultra high capacity RX channel allocation flag */ + + uint32_t freeRingFlag[UDMA_RM_FREE_RING_ARR_SIZE]; + /**< UDMA free ring allocation flag */ + uint32_t freeFlowFlag[UDMA_RM_FREE_FLOW_ARR_SIZE]; + /**< UDMA free flow allocation flag */ + uint32_t globalEventFlag[UDMA_RM_GLOBAL_EVENT_ARR_SIZE]; + /**< IA global event allocation flag */ + uint32_t vintrFlag[UDMA_RM_VINTR_ARR_SIZE]; + /**< IA VINTR allocation flag */ + uint32_t irIntrFlag[UDMA_RM_IR_INTR_ARR_SIZE]; + /**< IR interrupt allocation flag */ + + void *rmLock; + /**< Mutex to protect RM allocation. */ + SemaphoreP_Object rmLockObj; + /**< Mutex object. */ +} Udma_DrvObjectInt; +#endif + + /** \brief Cache line size for alignment of descriptor and buffers */ #define UDMA_CACHELINE_ALIGNMENT (128U) diff --git a/source/drivers/udma/soc/am64x_am243x/udma_soc.h b/source/drivers/udma/soc/am64x_am243x/udma_soc.h index 8e43e7cfadc..a6276325ced 100644 --- a/source/drivers/udma/soc/am64x_am243x/udma_soc.h +++ b/source/drivers/udma/soc/am64x_am243x/udma_soc.h @@ -194,6 +194,54 @@ extern "C" { #define UDMA_NUM_CORE (6U) /** @} */ +/** + * \anchor Udma_RmMaxSize + * Resource management related macros. + * + * These values are based on an optimal value typically used for allocation + * per core and not based on actual resources in a given SOC. + * + * Note: Kept to be multiple of 32 to store as bit fields in uint32_t + * @{ + */ +#define UDMA_RM_MAX_BLK_COPY_CH (32U) +#define UDMA_RM_MAX_BLK_COPY_HC_CH (32U) +#define UDMA_RM_MAX_BLK_COPY_UHC_CH (32U) +#define UDMA_RM_MAX_TX_CH (256U) +#define UDMA_RM_MAX_TX_HC_CH (32U) +#define UDMA_RM_MAX_TX_UHC_CH (32U) +#define UDMA_RM_MAX_RX_CH (256U) +#define UDMA_RM_MAX_RX_HC_CH (32U) +#define UDMA_RM_MAX_RX_UHC_CH (32U) +#define UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP (32U) +#define UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP (32U) +#define UDMA_RM_MAX_MAPPED_RING_PER_GROUP (64U) +#define UDMA_RM_MAX_FREE_RING (1024U) +#define UDMA_RM_MAX_FREE_FLOW (256U) +#define UDMA_RM_MAX_GLOBAL_EVENT (1024U) +#define UDMA_RM_MAX_VINTR (512U) +#define UDMA_RM_MAX_IR_INTR (128U) + +/* Array allocation macros */ +#define UDMA_RM_BLK_COPY_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_CH >> 5U) +#define UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_HC_CH >> 5U) +#define UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_UHC_CH >> 5U) +#define UDMA_RM_TX_CH_ARR_SIZE (UDMA_RM_MAX_TX_CH >> 5U) +#define UDMA_RM_TX_HC_CH_ARR_SIZE (UDMA_RM_MAX_TX_HC_CH >> 5U) +#define UDMA_RM_TX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_TX_UHC_CH >> 5U) +#define UDMA_RM_RX_CH_ARR_SIZE (UDMA_RM_MAX_RX_CH >> 5U) +#define UDMA_RM_RX_HC_CH_ARR_SIZE (UDMA_RM_MAX_RX_HC_CH >> 5U) +#define UDMA_RM_RX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_RX_UHC_CH >> 5U) +#define UDMA_RM_MAPPED_TX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP >> 5U) +#define UDMA_RM_MAPPED_RX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP >> 5U) +#define UDMA_RM_MAPPED_RING_ARR_SIZE (UDMA_RM_MAX_MAPPED_RING_PER_GROUP >> 5U) +#define UDMA_RM_FREE_RING_ARR_SIZE (UDMA_RM_MAX_FREE_RING >> 5U) +#define UDMA_RM_FREE_FLOW_ARR_SIZE (UDMA_RM_MAX_FREE_FLOW >> 5U) +#define UDMA_RM_GLOBAL_EVENT_ARR_SIZE (UDMA_RM_MAX_GLOBAL_EVENT >> 5U) +#define UDMA_RM_VINTR_ARR_SIZE (UDMA_RM_MAX_VINTR >> 5U) +#define UDMA_RM_IR_INTR_ARR_SIZE (UDMA_RM_MAX_IR_INTR >> 5U) +/* @} */ + /** * \anchor Udma_RmResId * \name UDMA Resources ID diff --git a/source/drivers/udma/soc/am65x/udma_soc.h b/source/drivers/udma/soc/am65x/udma_soc.h index 511f91ea6ce..99029d256ee 100644 --- a/source/drivers/udma/soc/am65x/udma_soc.h +++ b/source/drivers/udma/soc/am65x/udma_soc.h @@ -228,6 +228,54 @@ extern "C" { #define UDMA_DRU_CORE_ID_MCU1_1 (CSL_DRU_CORE_ID_2) /** @} */ +/** + * \anchor Udma_RmMaxSize + * Resource management related macros. + * + * These values are based on an optimal value typically used for allocation + * per core and not based on actual resources in a given SOC. + * + * Note: Kept to be multiple of 32 to store as bit fields in uint32_t + * @{ + */ +#define UDMA_RM_MAX_BLK_COPY_CH (32U) +#define UDMA_RM_MAX_BLK_COPY_HC_CH (32U) +#define UDMA_RM_MAX_BLK_COPY_UHC_CH (32U) +#define UDMA_RM_MAX_TX_CH (256U) +#define UDMA_RM_MAX_TX_HC_CH (32U) +#define UDMA_RM_MAX_TX_UHC_CH (32U) +#define UDMA_RM_MAX_RX_CH (256U) +#define UDMA_RM_MAX_RX_HC_CH (32U) +#define UDMA_RM_MAX_RX_UHC_CH (32U) +#define UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP (32U) +#define UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP (32U) +#define UDMA_RM_MAX_MAPPED_RING_PER_GROUP (64U) +#define UDMA_RM_MAX_FREE_RING (1024U) +#define UDMA_RM_MAX_FREE_FLOW (256U) +#define UDMA_RM_MAX_GLOBAL_EVENT (1024U) +#define UDMA_RM_MAX_VINTR (512U) +#define UDMA_RM_MAX_IR_INTR (128U) + +/* Array allocation macros */ +#define UDMA_RM_BLK_COPY_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_CH >> 5U) +#define UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_HC_CH >> 5U) +#define UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_UHC_CH >> 5U) +#define UDMA_RM_TX_CH_ARR_SIZE (UDMA_RM_MAX_TX_CH >> 5U) +#define UDMA_RM_TX_HC_CH_ARR_SIZE (UDMA_RM_MAX_TX_HC_CH >> 5U) +#define UDMA_RM_TX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_TX_UHC_CH >> 5U) +#define UDMA_RM_RX_CH_ARR_SIZE (UDMA_RM_MAX_RX_CH >> 5U) +#define UDMA_RM_RX_HC_CH_ARR_SIZE (UDMA_RM_MAX_RX_HC_CH >> 5U) +#define UDMA_RM_RX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_RX_UHC_CH >> 5U) +#define UDMA_RM_MAPPED_TX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP >> 5U) +#define UDMA_RM_MAPPED_RX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP >> 5U) +#define UDMA_RM_MAPPED_RING_ARR_SIZE (UDMA_RM_MAX_MAPPED_RING_PER_GROUP >> 5U) +#define UDMA_RM_FREE_RING_ARR_SIZE (UDMA_RM_MAX_FREE_RING >> 5U) +#define UDMA_RM_FREE_FLOW_ARR_SIZE (UDMA_RM_MAX_FREE_FLOW >> 5U) +#define UDMA_RM_GLOBAL_EVENT_ARR_SIZE (UDMA_RM_MAX_GLOBAL_EVENT >> 5U) +#define UDMA_RM_VINTR_ARR_SIZE (UDMA_RM_MAX_VINTR >> 5U) +#define UDMA_RM_IR_INTR_ARR_SIZE (UDMA_RM_MAX_IR_INTR >> 5U) +/* @} */ + /** * \anchor Udma_RmResId * \name UDMA Resources ID diff --git a/source/drivers/udma/v0/udma_ch.c b/source/drivers/udma/v0/udma_ch.c index 28d689f60c4..7271ee749be 100644 --- a/source/drivers/udma/v0/udma_ch.c +++ b/source/drivers/udma/v0/udma_ch.c @@ -113,8 +113,8 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_chOpen(Udma_DrvHandle drvHandle, - Udma_ChHandle chHandle, +int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, + Udma_ChHandleInt chHandle, uint32_t chType, const Udma_ChPrms *chPrms) { @@ -208,7 +208,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_chClose(Udma_ChHandle chHandle) +int32_t Udma_chClose(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -259,7 +259,7 @@ int32_t Udma_chClose(Udma_ChHandle chHandle) return (retVal); } -int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) +int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -362,7 +362,7 @@ int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) return (retVal); } -int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) +int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -511,7 +511,7 @@ int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) return (retVal); } -int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, +int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, const Udma_ChPdmaPrms *pdmaPrms) { int32_t retVal = UDMA_SOK; @@ -586,7 +586,7 @@ int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, return (retVal); } -int32_t Udma_chEnable(Udma_ChHandle chHandle) +int32_t Udma_chEnable(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -615,7 +615,7 @@ int32_t Udma_chEnable(Udma_ChHandle chHandle) return (retVal); } -int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) +int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -658,7 +658,7 @@ int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) return (retVal); } -int32_t Udma_chPause(Udma_ChHandle chHandle) +int32_t Udma_chPause(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -705,7 +705,7 @@ int32_t Udma_chPause(Udma_ChHandle chHandle) return (retVal); } -int32_t Udma_chResume(Udma_ChHandle chHandle) +int32_t Udma_chResume(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -751,7 +751,7 @@ int32_t Udma_chResume(Udma_ChHandle chHandle) return (retVal); } -uint32_t Udma_chGetNum(Udma_ChHandle chHandle) +uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -789,7 +789,7 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle) return (chNum); } -Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) +Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle fqRing = (Udma_RingHandle) NULL_PTR; @@ -818,7 +818,7 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) return (fqRing); } -Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) +Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle cqRing = (Udma_RingHandle) NULL_PTR; @@ -847,7 +847,7 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) return (cqRing); } -Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) +Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle tdCqRing = (Udma_RingHandle) NULL_PTR; @@ -876,7 +876,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) return (tdCqRing); } -uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle) +uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -890,7 +890,7 @@ uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle) return (ringNum); } -uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) +uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -904,7 +904,7 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) return (ringNum); } -Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) +Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_FlowHandle defaultFlow = (Udma_FlowHandle) NULL_PTR; @@ -933,7 +933,7 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) return (defaultFlow); } -uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) +uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; uint32_t triggerEvent = UDMA_EVENT_INVALID; @@ -1006,7 +1006,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) return (triggerEvent); } -uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1066,7 +1066,7 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) return (pSwTriggerReg); } -int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) +int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1106,8 +1106,8 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) return (retVal); } -int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, - Udma_ChHandle chainedChHandle, +int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, + Udma_ChHandleInt chainedChHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; @@ -1230,8 +1230,8 @@ int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, return (retVal); } -int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, - Udma_ChHandle chainedChHandle) +int32_t Udma_chBreakChaining(Udma_ChHandleInt triggerChHandle, + Udma_ChHandleInt chainedChHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1464,7 +1464,7 @@ void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms) return; } -int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) +int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1556,7 +1556,7 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) return (retVal); } -int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) +int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData) { int32_t retVal = UDMA_SOK; volatile uint32_t *PEER4=NULL; @@ -1604,7 +1604,7 @@ int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) return (retVal); } -int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData) +int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData) { int32_t retVal = UDMA_SOK; volatile uint32_t *PEER4=NULL; diff --git a/source/drivers/udma/v0/udma_event.c b/source/drivers/udma/v0/udma_event.c index 3065c21dcc4..591762ef653 100644 --- a/source/drivers/udma/v0/udma_event.c +++ b/source/drivers/udma/v0/udma_event.c @@ -87,8 +87,8 @@ static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, - Udma_EventHandle eventHandle, +int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, + Udma_EventHandleInt eventHandle, Udma_EventPrms *eventPrms) { int32_t retVal = UDMA_SOK; @@ -231,7 +231,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) +int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -292,7 +292,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) return (retVal); } -uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) +uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle) { uint32_t evtNum = UDMA_EVENT_INVALID; Udma_DrvHandleInt drvHandle; @@ -311,7 +311,7 @@ uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) return (evtNum); } -int32_t Udma_eventDisable(Udma_EventHandle eventHandle) +int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle) { int32_t retVal = UDMA_EFAIL; Udma_DrvHandleInt drvHandle; @@ -343,7 +343,7 @@ int32_t Udma_eventDisable(Udma_EventHandle eventHandle) return (retVal); } -int32_t Udma_eventEnable(Udma_EventHandle eventHandle) +int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle) { int32_t retVal = UDMA_EFAIL; Udma_DrvHandleInt drvHandle; @@ -375,7 +375,7 @@ int32_t Udma_eventEnable(Udma_EventHandle eventHandle) return (retVal); } -Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) +Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandleInt; diff --git a/source/drivers/udma/v0/udma_flow.c b/source/drivers/udma/v0/udma_flow.c index 751a1cdecf9..ee101da6977 100644 --- a/source/drivers/udma/v0/udma_flow.c +++ b/source/drivers/udma/v0/udma_flow.c @@ -74,8 +74,8 @@ static int32_t Udma_mappedFlowCheckParams(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAllocMapped(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms) { int32_t retVal = UDMA_SOK; @@ -132,7 +132,7 @@ int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_flowFree(Udma_FlowHandle flowHandle) +int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -192,8 +192,8 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle) return (retVal); } -int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, uint32_t flowStart, uint32_t flowCnt) { @@ -230,8 +230,8 @@ int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAttachMapped(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, uint32_t mappepdFlowNum, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms) { @@ -276,7 +276,7 @@ int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) +int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; @@ -307,7 +307,7 @@ int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) return (retVal); } -int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, +int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, uint32_t flowIdx, const Udma_FlowPrms *flowPrms) { @@ -429,7 +429,7 @@ int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, return (retVal); } -uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) +uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowNum = UDMA_FLOW_INVALID; @@ -450,7 +450,7 @@ uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) return (flowNum); } -uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle) +uint32_t Udma_flowGetCount(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowCnt = UDMA_FLOW_INVALID; diff --git a/source/drivers/udma/v0/udma_priv.h b/source/drivers/udma/v0/udma_priv.h index 102af24e6a5..8f53794f736 100644 --- a/source/drivers/udma/v0/udma_priv.h +++ b/source/drivers/udma/v0/udma_priv.h @@ -143,54 +143,6 @@ typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; /** \brief UDMA flow handle */ typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; -/** - * \anchor Udma_RmMaxSize - * Resource management related macros. - * - * These values are based on an optimal value typically used for allocation - * per core and not based on actual resources in a given SOC. - * - * Note: Kept to be multiple of 32 to store as bit fields in uint32_t - * @{ - */ -#define UDMA_RM_MAX_BLK_COPY_CH (32U) -#define UDMA_RM_MAX_BLK_COPY_HC_CH (32U) -#define UDMA_RM_MAX_BLK_COPY_UHC_CH (32U) -#define UDMA_RM_MAX_TX_CH (256U) -#define UDMA_RM_MAX_TX_HC_CH (32U) -#define UDMA_RM_MAX_TX_UHC_CH (32U) -#define UDMA_RM_MAX_RX_CH (256U) -#define UDMA_RM_MAX_RX_HC_CH (32U) -#define UDMA_RM_MAX_RX_UHC_CH (32U) -#define UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP (32U) -#define UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP (32U) -#define UDMA_RM_MAX_MAPPED_RING_PER_GROUP (64U) -#define UDMA_RM_MAX_FREE_RING (1024U) -#define UDMA_RM_MAX_FREE_FLOW (256U) -#define UDMA_RM_MAX_GLOBAL_EVENT (1024U) -#define UDMA_RM_MAX_VINTR (512U) -#define UDMA_RM_MAX_IR_INTR (128U) - -/* Array allocation macros */ -#define UDMA_RM_BLK_COPY_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_CH >> 5U) -#define UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_HC_CH >> 5U) -#define UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_UHC_CH >> 5U) -#define UDMA_RM_TX_CH_ARR_SIZE (UDMA_RM_MAX_TX_CH >> 5U) -#define UDMA_RM_TX_HC_CH_ARR_SIZE (UDMA_RM_MAX_TX_HC_CH >> 5U) -#define UDMA_RM_TX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_TX_UHC_CH >> 5U) -#define UDMA_RM_RX_CH_ARR_SIZE (UDMA_RM_MAX_RX_CH >> 5U) -#define UDMA_RM_RX_HC_CH_ARR_SIZE (UDMA_RM_MAX_RX_HC_CH >> 5U) -#define UDMA_RM_RX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_RX_UHC_CH >> 5U) -#define UDMA_RM_MAPPED_TX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP >> 5U) -#define UDMA_RM_MAPPED_RX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP >> 5U) -#define UDMA_RM_MAPPED_RING_ARR_SIZE (UDMA_RM_MAX_MAPPED_RING_PER_GROUP >> 5U) -#define UDMA_RM_FREE_RING_ARR_SIZE (UDMA_RM_MAX_FREE_RING >> 5U) -#define UDMA_RM_FREE_FLOW_ARR_SIZE (UDMA_RM_MAX_FREE_FLOW >> 5U) -#define UDMA_RM_GLOBAL_EVENT_ARR_SIZE (UDMA_RM_MAX_GLOBAL_EVENT >> 5U) -#define UDMA_RM_VINTR_ARR_SIZE (UDMA_RM_MAX_VINTR >> 5U) -#define UDMA_RM_IR_INTR_ARR_SIZE (UDMA_RM_MAX_IR_INTR >> 5U) -/* @} */ - /** \brief Default ring order ID */ #define UDMA_DEFAULT_RING_ORDER_ID (0U) @@ -267,560 +219,6 @@ typedef struct /**< Sciclient RM no. of resources reserverd secondary*/ } Udma_RmDefBoardCfgResp; -/** - * \brief UDMA ring object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_RingObjectInt_t -{ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - - uint16_t ringNum; - /**< Ring number */ - -#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) - CSL_LcdmaRingaccRingCfg lcdmaCfg; - /**< Lcdma Ring config */ - - /* Below register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_lcdma_ringacc_ring_cfgRegs_RING *pLcdmaCfgRegs; - /**< Pointer to Lcdma RA config register overlay */ - volatile CSL_lcdma_ringacc_ringrtRegs_ring *pLcdmaRtRegs; - /**< Pointer to Lcdma RA RT config register overlay */ -#endif - - uint32_t ringInitDone; - /**< Flag to set the ring object is init. */ - - uint32_t mappedRingGrp; - /**< The allocated mapped ring group when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped ring. - * - * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX ring groups - * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX ring groups. - * - * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID - */ - uint32_t mappedChNum; - /**< The assigned mapped channel number when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped ring. - * - * For unmapped case, this will be #UDMA_DMA_CH_INVALID. - */ -} Udma_RingObjectInt; - -/** - * \brief UDMA flow object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_FlowObjectInt_t -{ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - - uint32_t flowStart; - /**< Flow ID start number. - * - * Note: In case of mapped flow(in devices like AM64x), this indicates the - * mapped flow idx managed by this flow handle. - * - */ - uint32_t flowCnt; - /**< Number of flow IDs allocated - Contiguos flows are allocated - * - * Note: In case of mapped flow(in devices like AM64x), this will be 1 - * since only one mapped flow is managed by a flow handle. - */ - - uint32_t flowInitDone; - /**< Flag to set the flow object is init. */ - - uint32_t mappedFlowGrp; - /**< The allocated mapped flow group when channel type is - * #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped flow. - * - * Refer \ref Udma_MappedRxGrpSoc macro for details about mapped RX flow groups. - * - * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID - */ - uint32_t mappedChNum; - /**< The assigned mapped channel number when channel type is - * #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped flow. - * - * For unmapped case, this will be #UDMA_DMA_CH_INVALID. - */ -} Udma_FlowObjectInt; - -/** - * \brief UDMA event object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_EventObjectInt_t -{ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - Udma_EventPrms eventPrms; - /**< Event parameters passed during event registeration. */ - - uint32_t globalEvent; - /**< Allocated IA global event. */ - uint32_t vintrNum; - /**< Allocated IA VINT register. */ - uint32_t vintrBitNum; - /**< Allocated IA VINT bit number - 0 to 63. */ - uint32_t irIntrNum; - /**< Allocated interrupt router number. - * In case of devices like AM64x, where there are no Interrupt Routers, - * irIntrNum refers to coreIntrNum number itself. */ - uint32_t coreIntrNum; - /**< Allocated core interrupt number. */ - - Udma_EventHandleInt nextEvent; - /**< Pointer to next event - used in shared event for traversing in ISR */ - Udma_EventHandleInt prevEvent; - /**< Pointer to previous event - used in shared event for traversing during - * event un-registration */ - - void *hwiHandle; - /**< HWI handle. */ - HwiP_Object hwiObject; - /**< HWI Object. */ - uint64_t vintrBitAllocFlag; - /**< For master event, this stores the alloc flag for each bit within - * IA register. This is not used for slave events and is always set to - * zero */ - - /* Below register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_intaggr_imapRegs_gevi *pIaGeviRegs; - /**< Pointer to IA global event register overlay */ - volatile CSL_intaggr_intrRegs_vint *pIaVintrRegs; - /**< Pointer to IA virtual interrupt register overlay */ - - uint32_t eventInitDone; - /**< Flag to set the event object is init. */ -} Udma_EventObjectInt; - -/** - * \brief UDMA channel object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_ChObjectInt_t -{ - uint32_t chType; - /**< UDMA channel type. Refer \ref Udma_ChType. */ - Udma_ChPrms chPrms; - /**< Object to store the channel params. */ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - - uint32_t txChNum; - /**< Allocated TX channel number - this is relative channel number from - * base TX channel. This is valid only when the channel is opened for - * TX and block copy mode */ - uint32_t rxChNum; - /**< Allocated RX channel number - this is relative channel number from - * base RX channel. This is valid only when the channel is opened for - * RX and block copy mode */ - uint32_t extChNum; - /**< Allocated Ext channel number - this is relative channel number from - * base External channel. This is valid only when the channel is opened - * for UTC mode */ - uint32_t pdmaChNum; - /**< Allocated peer PDMA channel number. This is valid only when the - * channel is opened for PDMA mode */ - uint32_t peerThreadId; - /**< Peer channel thread ID - this is or'ed with thread offset. */ - - Udma_RingHandleInt fqRing; - /**< Free queue ring handle */ - Udma_RingHandleInt cqRing; - /**< Completion queue ring handle - * For AM64x kind of devices, where there is no seperate Completion queue, - * this points to fqRing itself. - */ - Udma_RingHandleInt tdCqRing; - /**< Teardown completion queue ring handle */ - - Udma_RingObjectInt fqRingObj; - /**< Free queue ring object */ - Udma_RingObjectInt cqRingObj; - /**< Completion queue ring object - * Not used for AM64x kind of devices, where there is no seperate Completion queue. - */ - Udma_RingObjectInt tdCqRingObj; - /**< Teardown completion queue ring object - * Not used for AM64x kind of devices, where teardown function is not present. - */ - - Udma_FlowHandleInt defaultFlow; - /**< Default flow handle */ - Udma_FlowObjectInt defaultFlowObj; - /**< Default flow object - Flow ID equal to the RX channel is reserved - * as the default flow for the channel. This object is used for - * providing handle to the caller to re-program the default flow using - * the standard flow API's */ - - Udma_ChTxPrms txPrms; - /**< TX channel parameter passed during channel config. */ - Udma_ChRxPrms rxPrms; - /**< RX channel parameter passed during channel config. */ - -#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) - /* Below BCDMA register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_bcdma_bccfgRegs_chan *pBcdmaBcCfgRegs; - /**< Pointer to BCDMA Block copy config register overlay */ - volatile CSL_bcdma_bcrtRegs_chan *pBcdmaBcRtRegs; - /**< Pointer to BCDMA Block copy RT config register overlay */ - volatile CSL_bcdma_txccfgRegs_chan *pBcdmaTxCfgRegs; - /**< Pointer to BCDMA TX config register overlay */ - volatile CSL_bcdma_txcrtRegs_chan *pBcdmaTxRtRegs; - /**< Pointer to BCDMA TX RT config register overlay */ - volatile CSL_bcdma_rxccfgRegs_chan *pBcdmaRxCfgRegs; - /**< Pointer to BCDMA RX config register overlay */ - volatile CSL_bcdma_rxcrtRegs_chan *pBcdmaRxRtRegs; - /**< Pointer to BCDMA RX RT config register overlay */ - - /* Below PKTDMA register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_pktdma_txccfgRegs_chan *pPktdmaTxCfgRegs; - /**< Pointer to PKTDMA TX config register overlay */ - volatile CSL_pktdma_txcrtRegs_chan *pPktdmaTxRtRegs; - /**< Pointer to PKTDMA TX RT config register overlay */ - volatile CSL_pktdma_rxccfgRegs_chan *pPktdmaRxCfgRegs; - /**< Pointer to PKTDMA RX config register overlay */ - volatile CSL_pktdma_rxcrtRegs_chan *pPktdmaRxRtRegs; - /**< Pointer to PKTDMA RX RT config register overlay */ - volatile CSL_pktdma_txccfgRegs_chan *pPktdmaExtCfgRegs; - /**< Pointer to PKTDMA External config register overlay */ - volatile CSL_pktdma_txcrtRegs_chan *pPktdmaExtRtRegs; - /**< Pointer to PKTDMA External RT config register overlay */ -#endif - - uint32_t chInitDone; - /**< Flag to set the channel object is init. */ - uint32_t chOesAllocDone; - /**< Flag to check if the channel's OES is allocated. This is required - * because the channel OES is used for chaining as well as for - * TR event registeration. This allows to check for error when both - * are requested by user on the same channel */ - uint32_t trigger; - /**< Channel trigger used when chaining channels - needed at the time of - * breaking the chaining */ -} Udma_ChObjectInt; - -/** - * \brief UDMA resource manager init parameters. - * - * This assumes contiguos allocation of 'N' resources from a start offset - * to keep the interface simple. - * - * Note: This is applicable for the driver handle as given during init call. - * The init call doesn't (can't rather) check for resource overlap across - * handles and across cores. It is the callers responsibility to ensure that - * resources overlaps are not present. - */ -typedef struct -{ - uint32_t startBlkCopyUhcCh; - /**< Start ultra high capacity block copy channel from which this UDMA - * driver instance manages */ - uint32_t numBlkCopyUhcCh; - /**< Number of ultra high capacity block copy channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_UHC_CH */ - uint32_t startBlkCopyHcCh; - /**< Start high capacity block copy channel from which this UDMA - * driver instance manages */ - uint32_t numBlkCopyHcCh; - /**< Number of ultra high capacity block copy channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_HC_CH */ - uint32_t startBlkCopyCh; - /**< Start Block copy channel from which this UDMA driver instance manages */ - uint32_t numBlkCopyCh; - /**< Number of Block copy channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_CH */ - - uint32_t startTxUhcCh; - /**< Start ultra high capacity TX channel from which this UDMA driver - * instance manages */ - uint32_t numTxUhcCh; - /**< Number of ultra high capacity TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_TX_UHC_CH */ - uint32_t startTxHcCh; - /**< Start high capacity TX channel from which this UDMA driver instance - * manages */ - uint32_t numTxHcCh; - /**< Number of high capacity TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_TX_HC_CH */ - uint32_t startTxCh; - /**< Start TX channel from which this UDMA driver instance manages */ - uint32_t numTxCh; - /**< Number of TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_TX_CH */ - - uint32_t startRxUhcCh; - /**< Start ultra high capacity RX channel from which this UDMA driver - * instance manages */ - uint32_t numRxUhcCh; - /**< Number of high capacity RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_RX_UHC_CH */ - uint32_t startRxHcCh; - /**< Start high capacity RX channel from which this UDMA driver instance - * manages */ - uint32_t numRxHcCh; - /**< Number of high capacity RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_RX_HC_CH */ - uint32_t startRxCh; - /**< Start RX channel from which this UDMA driver instance manages */ - uint32_t numRxCh; - /**< Number of RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_RX_CH */ - -#if (UDMA_NUM_MAPPED_TX_GROUP > 0) - uint32_t startMappedTxCh[UDMA_NUM_MAPPED_TX_GROUP]; - /**< Start Mapped TX channel from which this UDMA driver instance - * manages */ - uint32_t numMappedTxCh[UDMA_NUM_MAPPED_TX_GROUP]; - /**< Number of Mapped TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP */ -#endif - -#if (UDMA_NUM_MAPPED_RX_GROUP > 0) - uint32_t startMappedRxCh[UDMA_NUM_MAPPED_RX_GROUP]; - /**< Start Mapped RX channel from which this UDMA driver instance - * manages */ - uint32_t numMappedRxCh[UDMA_NUM_MAPPED_RX_GROUP]; - /**< Number of Mapped RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP */ -#endif - -#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) - uint32_t startMappedRing[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP]; - /**< Start Mapped ring from which this UDMA driver instance - * manages */ - uint32_t numMappedRing[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP]; - /**< Number of Mapped ring to be managed. - * Note: This cannot exceed UDMA_RM_MAX_MAPPED_RING_PER_GROUP */ -#endif - - uint32_t startFreeFlow; - /**< Start free flow from which this UDMA driver instance manages */ - uint32_t numFreeFlow; - /**< Number of free flow to be managed. - * Note: This cannot exceed UDMA_RM_MAX_FREE_FLOW */ - uint32_t startFreeRing; - /**< Start free ring from which this UDMA driver instance manages */ - uint32_t numFreeRing; - /**< Number of free ring to be managed. - * Note: This cannot exceed UDMA_RM_MAX_FREE_RING */ - - uint32_t startGlobalEvent; - /**< Start global event from which this UDMA driver instance manages */ - uint32_t numGlobalEvent; - /**< Number of global event to be managed. - * Note: This cannot exceed UDMA_RM_MAX_GLOBAL_EVENT */ - uint32_t startVintr; - /**< Start VINT number from which this UDMA driver instance manages */ - uint32_t numVintr; - /**< Number of VINT to be managed. - * Note: This cannot exceed UDMA_RM_MAX_VINTR */ - uint32_t startIrIntr; - /**< Start IR interrupt from which this UDMA driver instance manages. */ - uint32_t numIrIntr; - /**< Number of IR interrupts to be managed. - * Note: This cannot exceed UDMA_RM_MAX_IR_INTR */ -} Udma_RmInitPrms; - -/** - * \brief UDMA driver object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_DrvObjectInt_t -{ - uint32_t instType; - /**< Udma Instance Type */ - uint32_t raType; - /**< Udma Ring Accelerator Type */ - -#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) - /* - * LCDMA DMSS specific instance parameters - */ - CSL_BcdmaCfg bcdmaRegs; - /**< BCDMA register configuration */ - CSL_PktdmaCfg pktdmaRegs; - /**< PKTDMA register configuration */ -#endif -#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) - CSL_LcdmaRingaccCfg lcdmaRaRegs; -#endif - /**< RA register configuration */ - CSL_IntaggrCfg iaRegs; - /**< Interrupt Aggregator configuration */ - uint32_t udmapSrcThreadOffset; - /**< UDMAP Source/TX thread offset */ - uint32_t udmapDestThreadOffset; - /**< UDMAP Dest/RX thread offset */ - uint32_t maxRings; - /**< Maximun number of rings present in the NAVSS instance */ - - /* - * TISCI RM parameters - */ - uint16_t devIdRing; - /**< Ring RM ID */ - uint16_t devIdUdma; - /**< UDMA RM ID */ - uint16_t devIdPsil; - /**< PSIL RM ID */ - uint16_t devIdIa; - /**< IA RM ID */ - uint16_t devIdIr; - /**< IR RM ID */ - uint16_t devIdCore; - /**< Core RM ID */ - /* - * TISCI Ring event IRQ params - * - * These IRQ offsets should be corresponding TISCI offset - ringNum Offset - */ - uint16_t srcIdRingIrq; - /**< Ring completion event IRQ Source ID. */ - uint32_t blkCopyRingIrqOffset; - /**< Block Copy channel ring completion event IRQ offset. */ - uint32_t txRingIrqOffset; - /**< TX channel ring completion event IRQ offset. */ - uint32_t rxRingIrqOffset; - /**< RX channel ring completion event IRQ offset. */ - /* - * TISCI TR event IRQ params - * - * These IRQ offsets should be corresponding TISCI offset - chNum Offset - */ - uint16_t srcIdTrIrq; - /**< TR event IRQ Source ID. */ - uint32_t blkCopyTrIrqOffset; - /**< Block Copy channel TR event IRQ offset. */ - uint32_t txTrIrqOffset; - /**< TX channel TR event IRQ offset. */ - uint32_t rxTrIrqOffset; - /**< RX channel TR event IRQ offset. */ - /* - * Channel Offsets - */ - uint32_t txChOffset; - /**< TX channel offset. */ - uint32_t extChOffset; - /**< External channel offset. */ - uint32_t rxChOffset; - /**< RX channel offset. */ - /* - * The driver allocates ringNum = chNum (for BlkCpoy) - = chNum + txChOffset (for SplitTR Tx) - = chNum + rxChOffset (for SplitTR Rx) - - For CSL_bcdma* API's passed param ->channel_num = txChNum (for BlkCopy) - = txChNum + txChOffset (for SplitTR Tx) - = rxChNum + rxChOffset (for SplitTR Rx) - */ - /* - * Other Offsets - */ - uint32_t iaGemOffset; - /**< IA global event map offset to differentiate between main and MCU NAVSS */ - uint32_t trigGemOffset; - /**< UDMAP trigger global event map offset to differentiate between main - * and MCU NAVSS */ - - Udma_EventObjectInt globalEventObj; - /**< Object to store global event. */ - Udma_EventHandleInt globalEventHandle; - /**< Global event handle. */ - - Udma_InitPrms initPrms; - /**< Object to store the init params. */ - Udma_RmInitPrms rmInitPrms; - /**< RM init parameters */ - uint32_t drvInitDone; - /**< Flag to check if the driver object is init properly or not. */ - - /* - * RM objects. - * This is a bitwise flag - * 1 - free, 0 - allocated - */ - uint32_t blkCopyChFlag[UDMA_RM_BLK_COPY_CH_ARR_SIZE]; - /**< UDMA Block copy channel allocation flag */ - uint32_t blkCopyHcChFlag[UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE]; - /**< UDMA high capacity Block copy channel allocation flag */ - uint32_t blkCopyUhcChFlag[UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE]; - /**< UDMA ultra high capacity Block copy channel allocation flag */ - - uint32_t txChFlag[UDMA_RM_TX_CH_ARR_SIZE]; - /**< UDMA TX channel allocation flag */ - uint32_t txHcChFlag[UDMA_RM_TX_HC_CH_ARR_SIZE]; - /**< UDMA high capacity TX channel allocation flag */ - uint32_t txUhcChFlag[UDMA_RM_TX_UHC_CH_ARR_SIZE]; - - /**< UDMA ultra high capacity TX channel allocation flag */ - uint32_t rxChFlag[UDMA_RM_RX_CH_ARR_SIZE]; - /**< UDMA RX channel allocation flag */ - uint32_t rxHcChFlag[UDMA_RM_RX_HC_CH_ARR_SIZE]; - /**< UDMA high capacity RX channel allocation flag */ - uint32_t rxUhcChFlag[UDMA_RM_RX_UHC_CH_ARR_SIZE]; - /**< UDMA ultra high capacity RX channel allocation flag */ - -#if (UDMA_NUM_MAPPED_TX_GROUP > 0) - uint32_t mappedTxChFlag[UDMA_NUM_MAPPED_TX_GROUP][UDMA_RM_MAPPED_TX_CH_ARR_SIZE]; - /**< UDMA mapped TX channel allocation flag */ -#endif -#if (UDMA_NUM_MAPPED_RX_GROUP > 0) - uint32_t mappedRxChFlag[UDMA_NUM_MAPPED_RX_GROUP][UDMA_RM_MAPPED_RX_CH_ARR_SIZE]; - /**< UDMA mapped RX channel allocation flag */ -#endif -#if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) - uint32_t mappedRingFlag[UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP][UDMA_RM_MAPPED_RING_ARR_SIZE]; - /**< UDMA mapped ring allocation flag */ -#endif - - uint32_t freeRingFlag[UDMA_RM_FREE_RING_ARR_SIZE]; - /**< UDMA free ring allocation flag */ - uint32_t freeFlowFlag[UDMA_RM_FREE_FLOW_ARR_SIZE]; - /**< UDMA free flow allocation flag */ - uint32_t globalEventFlag[UDMA_RM_GLOBAL_EVENT_ARR_SIZE]; - /**< IA global event allocation flag */ - uint32_t vintrFlag[UDMA_RM_VINTR_ARR_SIZE]; - /**< IA VINTR allocation flag */ - uint32_t irIntrFlag[UDMA_RM_IR_INTR_ARR_SIZE]; - /**< IR interrupt allocation flag */ - - void *rmLock; - /**< Mutex to protect RM allocation. */ - SemaphoreP_Object rmLockObj; - /**< Mutex object. */ -} Udma_DrvObjectInt; - #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) /** * \brief UDMA mapped channel ring attributes. diff --git a/source/drivers/udma/v0/udma_ring_common.c b/source/drivers/udma/v0/udma_ring_common.c index 72f1bae9121..0e2d2f4e606 100644 --- a/source/drivers/udma/v0/udma_ring_common.c +++ b/source/drivers/udma/v0/udma_ring_common.c @@ -73,8 +73,8 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, - Udma_RingHandle ringHandle, +int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, + Udma_RingHandleInt ringHandle, uint16_t ringNum, const Udma_RingPrms *ringPrms) { @@ -214,7 +214,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_ringFree(Udma_RingHandle ringHandle) +int32_t Udma_ringFree(Udma_RingHandleInt ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -268,8 +268,8 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) return (retVal); } -int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, - Udma_RingHandle ringHandle, +int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, + Udma_RingHandleInt ringHandle, uint16_t ringNum) { int32_t retVal = UDMA_SOK; @@ -308,7 +308,7 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_ringDetach(Udma_RingHandle ringHandle) +int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -349,7 +349,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) return (retVal); } -int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) +int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; @@ -385,7 +385,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) return (retVal); } -int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; @@ -421,7 +421,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) return (retVal); } -int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -452,7 +452,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) return (retVal); } -void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) +void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -461,7 +461,7 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) return; } -void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) +void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -470,7 +470,7 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) return; } -void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) +void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -479,7 +479,7 @@ void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) return; } -uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) +uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -493,7 +493,7 @@ uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) return (ringNum); } -void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) +void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle) { void *ringMem = NULL_PTR; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -503,7 +503,7 @@ void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) return (ringMem); } -uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle) { uint32_t ringMode; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -513,7 +513,7 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) return (ringMode); } -uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle) { uint32_t size = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -523,7 +523,7 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) return (size); } -uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -533,7 +533,7 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) return (occ); } -uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -543,7 +543,7 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) return (occ); } -uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -553,7 +553,7 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) return (idx); } -uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetRdIdx(Udma_RingHandleInt ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; diff --git a/source/drivers/udma/v1/udma_ch.c b/source/drivers/udma/v1/udma_ch.c index f7d924f0ec6..9b292688f1c 100644 --- a/source/drivers/udma/v1/udma_ch.c +++ b/source/drivers/udma/v1/udma_ch.c @@ -112,8 +112,8 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_chOpen(Udma_DrvHandle drvHandle, - Udma_ChHandle chHandle, +int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, + Udma_ChHandleInt chHandle, uint32_t chType, const Udma_ChPrms *chPrms) { @@ -207,7 +207,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_chClose(Udma_ChHandle chHandle) +int32_t Udma_chClose(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -258,7 +258,7 @@ int32_t Udma_chClose(Udma_ChHandle chHandle) return (retVal); } -int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) +int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -347,7 +347,7 @@ int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) return (retVal); } -int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) +int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -496,7 +496,7 @@ int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) return (retVal); } -int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, +int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, const Udma_ChPdmaPrms *pdmaPrms) { int32_t retVal = UDMA_SOK; @@ -548,7 +548,7 @@ int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, return (retVal); } -int32_t Udma_chEnable(Udma_ChHandle chHandle) +int32_t Udma_chEnable(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -577,7 +577,7 @@ int32_t Udma_chEnable(Udma_ChHandle chHandle) return (retVal); } -int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) +int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -620,7 +620,7 @@ int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) return (retVal); } -int32_t Udma_chPause(Udma_ChHandle chHandle) +int32_t Udma_chPause(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -667,7 +667,7 @@ int32_t Udma_chPause(Udma_ChHandle chHandle) return (retVal); } -int32_t Udma_chResume(Udma_ChHandle chHandle) +int32_t Udma_chResume(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -713,7 +713,7 @@ int32_t Udma_chResume(Udma_ChHandle chHandle) return (retVal); } -uint32_t Udma_chGetNum(Udma_ChHandle chHandle) +uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -751,7 +751,7 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle) return (chNum); } -Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) +Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle fqRing = (Udma_RingHandle) NULL_PTR; @@ -780,7 +780,7 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) return (fqRing); } -Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) +Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle cqRing = (Udma_RingHandle) NULL_PTR; @@ -809,7 +809,7 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) return (cqRing); } -Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) +Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle tdCqRing = (Udma_RingHandle) NULL_PTR; @@ -838,7 +838,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) return (tdCqRing); } -uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle) +uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -852,7 +852,7 @@ uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle) return (ringNum); } -uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) +uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -866,7 +866,7 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) return (ringNum); } -Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) +Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_FlowHandle defaultFlow = (Udma_FlowHandle) NULL_PTR; @@ -895,7 +895,7 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) return (defaultFlow); } -int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, +int32_t Udma_chDequeueTdResponse(Udma_ChHandleInt chHandle, CSL_UdmapTdResponse *tdResponse) { int32_t retVal = UDMA_SOK, cslRetVal; @@ -929,7 +929,7 @@ int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, return (retVal); } -uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) +uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; uint32_t triggerEvent = UDMA_EVENT_INVALID; @@ -996,7 +996,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) return (triggerEvent); } -uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1042,7 +1042,7 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) return (pSwTriggerReg); } -int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) +int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1082,8 +1082,8 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) return (retVal); } -int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, - Udma_ChHandle chainedChHandle, +int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, + Udma_ChHandleInt chainedChHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; @@ -1206,8 +1206,8 @@ int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, return (retVal); } -int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, - Udma_ChHandle chainedChHandle) +int32_t Udma_chBreakChaining(Udma_ChHandleInt triggerChHandle, + Udma_ChHandleInt chainedChHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1440,7 +1440,7 @@ void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms) return; } -int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) +int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1500,7 +1500,7 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) return (retVal); } -int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) +int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -1525,7 +1525,7 @@ int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) return (retVal); } -int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData) +int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; diff --git a/source/drivers/udma/v1/udma_event.c b/source/drivers/udma/v1/udma_event.c index 84a76a24599..47653c8083a 100644 --- a/source/drivers/udma/v1/udma_event.c +++ b/source/drivers/udma/v1/udma_event.c @@ -87,8 +87,8 @@ static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, - Udma_EventHandle eventHandle, +int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, + Udma_EventHandleInt eventHandle, Udma_EventPrms *eventPrms) { int32_t retVal = UDMA_SOK; @@ -231,7 +231,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) +int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -292,7 +292,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) return (retVal); } -uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) +uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle) { uint32_t evtNum = UDMA_EVENT_INVALID; Udma_DrvHandleInt drvHandle; @@ -311,7 +311,7 @@ uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) return (evtNum); } -int32_t Udma_eventDisable(Udma_EventHandle eventHandle) +int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle) { int32_t retVal = UDMA_EFAIL; Udma_DrvHandleInt drvHandle; @@ -343,7 +343,7 @@ int32_t Udma_eventDisable(Udma_EventHandle eventHandle) return (retVal); } -int32_t Udma_eventEnable(Udma_EventHandle eventHandle) +int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle) { int32_t retVal = UDMA_EFAIL; Udma_DrvHandleInt drvHandle; @@ -375,7 +375,7 @@ int32_t Udma_eventEnable(Udma_EventHandle eventHandle) return (retVal); } -Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) +Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandleInt; diff --git a/source/drivers/udma/v1/udma_flow.c b/source/drivers/udma/v1/udma_flow.c index c47aeaf346f..a974318e805 100644 --- a/source/drivers/udma/v1/udma_flow.c +++ b/source/drivers/udma/v1/udma_flow.c @@ -69,7 +69,7 @@ /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_flowFree(Udma_FlowHandle flowHandle) +int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -137,8 +137,8 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle) return (retVal); } -int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, - Udma_FlowHandle flowHandle, +int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, + Udma_FlowHandleInt flowHandle, uint32_t flowStart, uint32_t flowCnt) { @@ -175,7 +175,7 @@ int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) +int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; @@ -206,7 +206,7 @@ int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) return (retVal); } -int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, +int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, uint32_t flowIdx, const Udma_FlowPrms *flowPrms) { @@ -328,7 +328,7 @@ int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, return (retVal); } -uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) +uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowNum = UDMA_FLOW_INVALID; @@ -349,7 +349,7 @@ uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) return (flowNum); } -uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle) +uint32_t Udma_flowGetCount(Udma_FlowHandleInt flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowCnt = UDMA_FLOW_INVALID; diff --git a/source/drivers/udma/v1/udma_priv.h b/source/drivers/udma/v1/udma_priv.h index 2349481bce9..2f731ce5b6d 100644 --- a/source/drivers/udma/v1/udma_priv.h +++ b/source/drivers/udma/v1/udma_priv.h @@ -139,54 +139,6 @@ typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; /** \brief UDMA flow handle */ typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; -/** - * \anchor Udma_RmMaxSize - * Resource management related macros. - * - * These values are based on an optimal value typically used for allocation - * per core and not based on actual resources in a given SOC. - * - * Note: Kept to be multiple of 32 to store as bit fields in uint32_t - * @{ - */ -#define UDMA_RM_MAX_BLK_COPY_CH (32U) -#define UDMA_RM_MAX_BLK_COPY_HC_CH (32U) -#define UDMA_RM_MAX_BLK_COPY_UHC_CH (32U) -#define UDMA_RM_MAX_TX_CH (256U) -#define UDMA_RM_MAX_TX_HC_CH (32U) -#define UDMA_RM_MAX_TX_UHC_CH (32U) -#define UDMA_RM_MAX_RX_CH (256U) -#define UDMA_RM_MAX_RX_HC_CH (32U) -#define UDMA_RM_MAX_RX_UHC_CH (32U) -#define UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP (32U) -#define UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP (32U) -#define UDMA_RM_MAX_MAPPED_RING_PER_GROUP (64U) -#define UDMA_RM_MAX_FREE_RING (1024U) -#define UDMA_RM_MAX_FREE_FLOW (256U) -#define UDMA_RM_MAX_GLOBAL_EVENT (1024U) -#define UDMA_RM_MAX_VINTR (512U) -#define UDMA_RM_MAX_IR_INTR (128U) - -/* Array allocation macros */ -#define UDMA_RM_BLK_COPY_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_CH >> 5U) -#define UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_HC_CH >> 5U) -#define UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE (UDMA_RM_MAX_BLK_COPY_UHC_CH >> 5U) -#define UDMA_RM_TX_CH_ARR_SIZE (UDMA_RM_MAX_TX_CH >> 5U) -#define UDMA_RM_TX_HC_CH_ARR_SIZE (UDMA_RM_MAX_TX_HC_CH >> 5U) -#define UDMA_RM_TX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_TX_UHC_CH >> 5U) -#define UDMA_RM_RX_CH_ARR_SIZE (UDMA_RM_MAX_RX_CH >> 5U) -#define UDMA_RM_RX_HC_CH_ARR_SIZE (UDMA_RM_MAX_RX_HC_CH >> 5U) -#define UDMA_RM_RX_UHC_CH_ARR_SIZE (UDMA_RM_MAX_RX_UHC_CH >> 5U) -#define UDMA_RM_MAPPED_TX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_TX_CH_PER_GROUP >> 5U) -#define UDMA_RM_MAPPED_RX_CH_ARR_SIZE (UDMA_RM_MAX_MAPPED_RX_CH_PER_GROUP >> 5U) -#define UDMA_RM_MAPPED_RING_ARR_SIZE (UDMA_RM_MAX_MAPPED_RING_PER_GROUP >> 5U) -#define UDMA_RM_FREE_RING_ARR_SIZE (UDMA_RM_MAX_FREE_RING >> 5U) -#define UDMA_RM_FREE_FLOW_ARR_SIZE (UDMA_RM_MAX_FREE_FLOW >> 5U) -#define UDMA_RM_GLOBAL_EVENT_ARR_SIZE (UDMA_RM_MAX_GLOBAL_EVENT >> 5U) -#define UDMA_RM_VINTR_ARR_SIZE (UDMA_RM_MAX_VINTR >> 5U) -#define UDMA_RM_IR_INTR_ARR_SIZE (UDMA_RM_MAX_IR_INTR >> 5U) -/* @} */ - /** \brief Default ring order ID */ #define UDMA_DEFAULT_RING_ORDER_ID (0U) @@ -231,134 +183,7 @@ typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; /* Structure Declarations */ /* ========================================================================== */ -/** - * \brief UDMA resource manager init parameters. - * - * This assumes contiguos allocation of 'N' resources from a start offset - * to keep the interface simple. - * - * Note: This is applicable for the driver handle as given during init call. - * The init call doesn't (can't rather) check for resource overlap across - * handles and across cores. It is the callers responsibility to ensure that - * resources overlaps are not present. - */ -typedef struct -{ - uint32_t startBlkCopyUhcCh; - /**< Start ultra high capacity block copy channel from which this UDMA - * driver instance manages */ - uint32_t numBlkCopyUhcCh; - /**< Number of ultra high capacity block copy channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_UHC_CH */ - uint32_t startBlkCopyHcCh; - /**< Start high capacity block copy channel from which this UDMA - * driver instance manages */ - uint32_t numBlkCopyHcCh; - /**< Number of ultra high capacity block copy channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_HC_CH */ - uint32_t startBlkCopyCh; - /**< Start Block copy channel from which this UDMA driver instance manages */ - uint32_t numBlkCopyCh; - /**< Number of Block copy channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_CH */ - - uint32_t startTxUhcCh; - /**< Start ultra high capacity TX channel from which this UDMA driver - * instance manages */ - uint32_t numTxUhcCh; - /**< Number of ultra high capacity TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_TX_UHC_CH */ - uint32_t startTxHcCh; - /**< Start high capacity TX channel from which this UDMA driver instance - * manages */ - uint32_t numTxHcCh; - /**< Number of high capacity TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_TX_HC_CH */ - uint32_t startTxCh; - /**< Start TX channel from which this UDMA driver instance manages */ - uint32_t numTxCh; - /**< Number of TX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_TX_CH */ - - uint32_t startRxUhcCh; - /**< Start ultra high capacity RX channel from which this UDMA driver - * instance manages */ - uint32_t numRxUhcCh; - /**< Number of high capacity RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_RX_UHC_CH */ - uint32_t startRxHcCh; - /**< Start high capacity RX channel from which this UDMA driver instance - * manages */ - uint32_t numRxHcCh; - /**< Number of high capacity RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_RX_HC_CH */ - uint32_t startRxCh; - /**< Start RX channel from which this UDMA driver instance manages */ - uint32_t numRxCh; - /**< Number of RX channel to be managed. - * Note: This cannot exceed UDMA_RM_MAX_RX_CH */ - uint32_t startFreeFlow; - /**< Start free flow from which this UDMA driver instance manages */ - uint32_t numFreeFlow; - /**< Number of free flow to be managed. - * Note: This cannot exceed UDMA_RM_MAX_FREE_FLOW */ - uint32_t startFreeRing; - /**< Start free ring from which this UDMA driver instance manages */ - uint32_t numFreeRing; - /**< Number of free ring to be managed. - * Note: This cannot exceed UDMA_RM_MAX_FREE_RING */ - - uint32_t startGlobalEvent; - /**< Start global event from which this UDMA driver instance manages */ - uint32_t numGlobalEvent; - /**< Number of global event to be managed. - * Note: This cannot exceed UDMA_RM_MAX_GLOBAL_EVENT */ - uint32_t startVintr; - /**< Start VINT number from which this UDMA driver instance manages */ - uint32_t numVintr; - /**< Number of VINT to be managed. - * Note: This cannot exceed UDMA_RM_MAX_VINTR */ - uint32_t startIrIntr; - /**< Start IR interrupt from which this UDMA driver instance manages. */ - uint32_t numIrIntr; - /**< Number of IR interrupts to be managed. - * Note: This cannot exceed UDMA_RM_MAX_IR_INTR */ - uint32_t proxyThreadNum; - /**< Proxy thread to push/pop to ring in proxy mode. - * By default driver will initialize to a default value based on - * core and NAVSS instance. User can override this based on need. - * The default proxy allocation starts from #UDMA_DEFAULT_RM_PROXY_THREAD_START - * and will allocate 1 per core. So total allocation will be from - * #UDMA_DEFAULT_RM_PROXY_THREAD_START to - * (#UDMA_DEFAULT_RM_PROXY_THREAD_START + num cores) in an SOC. - * - * The proxy thread number should be allocated within a NAVSS instance - * as a proxy can access ring only within the same NAVSS instance. The - * driver assumes the right proxy instance to use based on the - * instance ID (instId) provided in #Udma_init API - * - * Also this should be set a unique number across core and NAVSS - * instance. Care should be taken not to use the same proxy across - * the system. - * - * Warning: When using multiple UDMA handle for the same NAVSS instance - * within a core, care should taken to provide a unique proxy number - * per handle. Otherwise the the driver handle will use the same - * proxy for ring operation and will result in unintended behaviour and - * corruption of ring memory/operation. - */ - uint32_t startProxy; - /**< Start proxy from which this UDMA driver instance manages. - * Note this should not overlap with proxyThreadNum */ - uint32_t numProxy; - /**< Number of proxy to be managed. - * Note: This cannot exceed #UDMA_RM_MAX_PROXY */ - uint32_t startRingMon; - /**< Start monitor from which this UDMA driver instance manages */ - uint32_t numRingMon; - /**< Number of monitors to be managed. - * Note: This cannot exceed #UDMA_RM_MAX_RING_MON */ -} Udma_RmInitPrms; + /** * \brief UDMA Sciclient Default BoardCfg RM parameters. @@ -392,56 +217,6 @@ typedef struct /**< Sciclient RM no. of resources reserverd secondary*/ } Udma_RmDefBoardCfgResp; -/** - * \brief UDMA ring object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_RingObjectInt_t -{ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - - uint16_t ringNum; - /**< Ring number */ - CSL_RingAccRingCfg cfg; - /**< Ring config */ - - /* Below register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_ringacc_cfgRegs_RING *pCfgRegs; - /**< Pointer to RA config register overlay */ - volatile CSL_ringacc_rtRegs_RINGRT *pRtRegs; - /**< Pointer to RA RT config register overlay */ - /* Proxy address for the ring. Calculated at alloc time to reduce cycles at - * runtime */ - uintptr_t proxyAddr; - /**< Proxy address for push/pop ring operation through proxy */ - uint32_t ringInitDone; - /**< Flag to set the ring object is init. */ - - uint32_t mappedRingGrp; - /**< The allocated mapped ring group when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped ring. - * - * Refer \ref Udma_MappedTxGrpSoc macro for details about mapped TX ring groups - * or \ref Udma_MappedRxGrpSoc macro for details about mapped RX ring groups. - * - * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID - */ - uint32_t mappedChNum; - /**< The assigned mapped channel number when channel type is - * #UDMA_CH_TYPE_TX_MAPPED or #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped ring. - * - * For unmapped case, this will be #UDMA_DMA_CH_INVALID. - */ -} Udma_RingObjectInt; - /** * \brief UDMA ring monitor object. * @@ -459,361 +234,6 @@ struct Udma_RingMonObj uint32_t ringMonInitDone; /**< Flag to set the ring monitor object is init. */ }; -/** - * \brief UDMA flow object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_FlowObjectInt_t -{ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - - uint32_t flowStart; - /**< Flow ID start number. - * - * Note: In case of mapped flow(in devices like AM64x), this indicates the - * mapped flow idx managed by this flow handle. - * - */ - uint32_t flowCnt; - /**< Number of flow IDs allocated - Contiguos flows are allocated - * - * Note: In case of mapped flow(in devices like AM64x), this will be 1 - * since only one mapped flow is managed by a flow handle. - */ - - uint32_t flowInitDone; - /**< Flag to set the flow object is init. */ - - uint32_t mappedFlowGrp; - /**< The allocated mapped flow group when channel type is - * #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped flow. - * - * Refer \ref Udma_MappedRxGrpSoc macro for details about mapped RX flow groups. - * - * For unmapped case, this will be #UDMA_MAPPED_GROUP_INVALID - */ - uint32_t mappedChNum; - /**< The assigned mapped channel number when channel type is - * #UDMA_CH_TYPE_RX_MAPPED. - * - * This is needed to free the mapped flow. - * - * For unmapped case, this will be #UDMA_DMA_CH_INVALID. - */ -} Udma_FlowObjectInt; - -/** - * \brief UDMA event object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_EventObjectInt_t -{ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - Udma_EventPrms eventPrms; - /**< Event parameters passed during event registeration. */ - - uint32_t globalEvent; - /**< Allocated IA global event. */ - uint32_t vintrNum; - /**< Allocated IA VINT register. */ - uint32_t vintrBitNum; - /**< Allocated IA VINT bit number - 0 to 63. */ - uint32_t irIntrNum; - /**< Allocated interrupt router number. - * In case of devices like AM64x, where there are no Interrupt Routers, - * irIntrNum refers to coreIntrNum number itself. */ - uint32_t coreIntrNum; - /**< Allocated core interrupt number. */ - - Udma_EventHandleInt nextEvent; - /**< Pointer to next event - used in shared event for traversing in ISR */ - Udma_EventHandleInt prevEvent; - /**< Pointer to previous event - used in shared event for traversing during - * event un-registration */ - - void *hwiHandle; - /**< HWI handle. */ - HwiP_Object hwiObject; - /**< HWI Object. */ - uint64_t vintrBitAllocFlag; - /**< For master event, this stores the alloc flag for each bit within - * IA register. This is not used for slave events and is always set to - * zero */ - - /* Below register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_intaggr_imapRegs_gevi *pIaGeviRegs; - /**< Pointer to IA global event register overlay */ - volatile CSL_intaggr_intrRegs_vint *pIaVintrRegs; - /**< Pointer to IA virtual interrupt register overlay */ - - uint32_t eventInitDone; - /**< Flag to set the event object is init. */ -} Udma_EventObjectInt; - -/** - * \brief UDMA channel object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_ChObjectInt_t -{ - uint32_t chType; - /**< UDMA channel type. Refer \ref Udma_ChType. */ - Udma_ChPrms chPrms; - /**< Object to store the channel params. */ - Udma_DrvHandleInt drvHandle; - /**< Pointer to global driver handle. */ - uint32_t txChNum; - /**< Allocated TX channel number - this is relative channel number from - * base TX channel. This is valid only when the channel is opened for - * TX and block copy mode */ - uint32_t rxChNum; - /**< Allocated RX channel number - this is relative channel number from - * base RX channel. This is valid only when the channel is opened for - * RX and block copy mode */ - uint32_t extChNum; - /**< Allocated Ext channel number - this is relative channel number from - * base External channel. This is valid only when the channel is opened - * for UTC mode */ - uint32_t pdmaChNum; - /**< Allocated peer PDMA channel number. This is valid only when the - * channel is opened for PDMA mode */ - uint32_t peerThreadId; - /**< Peer channel thread ID - this is or'ed with thread offset. */ - - Udma_RingHandleInt fqRing; - /**< Free queue ring handle */ - Udma_RingHandleInt cqRing; - /**< Completion queue ring handle - * For AM64x kind of devices, where there is no seperate Completion queue, - * this points to fqRing itself. - */ - Udma_RingHandleInt tdCqRing; - /**< Teardown completion queue ring handle */ - - Udma_RingObjectInt fqRingObj; - /**< Free queue ring object */ - Udma_RingObjectInt cqRingObj; - /**< Completion queue ring object - * Not used for AM64x kind of devices, where there is no seperate Completion queue. - */ - Udma_RingObjectInt tdCqRingObj; - /**< Teardown completion queue ring object - * Not used for AM64x kind of devices, where teardown function is not present. - */ - - Udma_FlowHandleInt defaultFlow; - /**< Default flow handle */ - Udma_FlowObjectInt defaultFlowObj; - /**< Default flow object - Flow ID equal to the RX channel is reserved - * as the default flow for the channel. This object is used for - * providing handle to the caller to re-program the default flow using - * the standard flow API's */ - - Udma_ChTxPrms txPrms; - /**< TX channel parameter passed during channel config. */ - Udma_ChRxPrms rxPrms; - /**< RX channel parameter passed during channel config. */ - - /* Below UDMAP register overlay pointers provided for debug purpose to - * readily view the registers */ - volatile CSL_udmap_txccfgRegs_chan *pTxCfgRegs; - /**< Pointer to UDMAP TX config register overlay */ - volatile CSL_udmap_txcrtRegs_chan *pTxRtRegs; - /**< Pointer to UDMAP TX RT config register overlay */ - volatile CSL_udmap_rxccfgRegs_chan *pRxCfgRegs; - /**< Pointer to UDMAP RX config register overlay */ - volatile CSL_udmap_rxcrtRegs_chan *pRxRtRegs; - /**< Pointer to UDMAP RX RT config register overlay */ - volatile CSL_udmap_txccfgRegs_chan *pExtCfgRegs; - /**< Pointer to UDMAP External config register overlay */ - volatile CSL_udmap_txcrtRegs_chan *pExtRtRegs; - /**< Pointer to UDMAP External RT config register overlay */ - uint32_t chInitDone; - /**< Flag to set the channel object is init. */ - uint32_t chOesAllocDone; - /**< Flag to check if the channel's OES is allocated. This is required - * because the channel OES is used for chaining as well as for - * TR event registeration. This allows to check for error when both - * are requested by user on the same channel */ - uint32_t trigger; - /**< Channel trigger used when chaining channels - needed at the time of - * breaking the chaining */ -} Udma_ChObjectInt; -/** - * \brief UDMA driver object. - * - * Note: This is an internal/private driver structure and should not be - * used or modified by caller. - */ -typedef struct Udma_DrvObjectInt_t -{ - uint32_t instType; - /**< Udma Instance Type */ - uint32_t raType; - /**< Udma Ring Accelerator Type */ - /* - * NAVSS instance parameters - */ - CSL_UdmapCfg udmapRegs; - /**< UDMAP register configuration */ - CSL_RingAccCfg raRegs; - /**< RA register configuration */ - CSL_IntaggrCfg iaRegs; - /**< Interrupt Aggregator configuration */ - uint32_t udmapSrcThreadOffset; - /**< UDMAP Source/TX thread offset */ - uint32_t udmapDestThreadOffset; - /**< UDMAP Dest/RX thread offset */ - uint32_t maxRings; - /**< Maximun number of rings present in the NAVSS instance */ - uint32_t maxProxy; - /**< Maximun number of proxy present in the NAVSS instance */ - uint32_t maxRingMon; - /**< Maximun number of ring monitors present in the NAVSS instance */ - /* - * Proxy parameters - */ - CSL_ProxyCfg proxyCfg; - /*< Proxy register configuration */ - CSL_ProxyTargetParams proxyTargetRing; - /*< Proxy ring target register configuration */ - uint32_t proxyTargetNumRing; - /*< Proxy ring target index */ - /* - * TISCI RM parameters - */ - uint16_t devIdRing; - /**< Ring RM ID */ - uint16_t devIdUdma; - /**< UDMA RM ID */ - uint16_t devIdPsil; - /**< PSIL RM ID */ - uint16_t devIdIa; - /**< IA RM ID */ - uint16_t devIdIr; - /**< IR RM ID */ - uint16_t devIdProxy; - /**< Proxy RM ID */ - uint16_t devIdCore; - /**< Core RM ID */ - /* - * TISCI Ring event IRQ params - * - * These IRQ offsets should be corresponding TISCI offset - ringNum Offset - */ - uint16_t srcIdRingIrq; - /**< Ring completion event IRQ Source ID. */ - uint32_t blkCopyRingIrqOffset; - /**< Block Copy channel ring completion event IRQ offset. */ - uint32_t txRingIrqOffset; - /**< TX channel ring completion event IRQ offset. */ - uint32_t rxRingIrqOffset; - /**< RX channel ring completion event IRQ offset. */ - /* - * TISCI TR event IRQ params - * - * These IRQ offsets should be corresponding TISCI offset - chNum Offset - */ - uint16_t srcIdTrIrq; - /**< TR event IRQ Source ID. */ - uint32_t blkCopyTrIrqOffset; - /**< Block Copy channel TR event IRQ offset. */ - uint32_t txTrIrqOffset; - /**< TX channel TR event IRQ offset. */ - uint32_t rxTrIrqOffset; - /**< RX channel TR event IRQ offset. */ - /* - * Channel Offsets - */ - uint32_t txChOffset; - /**< TX channel offset. */ - uint32_t extChOffset; - /**< External channel offset. */ - uint32_t rxChOffset; - /**< RX channel offset. */ - /* - * The driver allocates ringNum = chNum (for BlkCpoy) - = chNum + txChOffset (for SplitTR Tx) - = chNum + rxChOffset (for SplitTR Rx) - - For CSL_bcdma* API's passed param ->channel_num = txChNum (for BlkCopy) - = txChNum + txChOffset (for SplitTR Tx) - = rxChNum + rxChOffset (for SplitTR Rx) - */ - /* - * Other Offsets - */ - uint32_t iaGemOffset; - /**< IA global event map offset to differentiate between main and MCU NAVSS */ - uint32_t trigGemOffset; - /**< UDMAP trigger global event map offset to differentiate between main - * and MCU NAVSS */ - - Udma_EventObjectInt globalEventObj; - /**< Object to store global event. */ - Udma_EventHandleInt globalEventHandle; - /**< Global event handle. */ - - Udma_InitPrms initPrms; - /**< Object to store the init params. */ - Udma_RmInitPrms rmInitPrms; - /**< RM init parameters */ - uint32_t drvInitDone; - /**< Flag to check if the driver object is init properly or not. */ - - /* - * RM objects. - * This is a bitwise flag - * 1 - free, 0 - allocated - */ - uint32_t blkCopyChFlag[UDMA_RM_BLK_COPY_CH_ARR_SIZE]; - /**< UDMA Block copy channel allocation flag */ - uint32_t blkCopyHcChFlag[UDMA_RM_BLK_COPY_HC_CH_ARR_SIZE]; - /**< UDMA high capacity Block copy channel allocation flag */ - uint32_t blkCopyUhcChFlag[UDMA_RM_BLK_COPY_UHC_CH_ARR_SIZE]; - /**< UDMA ultra high capacity Block copy channel allocation flag */ - - uint32_t txChFlag[UDMA_RM_TX_CH_ARR_SIZE]; - /**< UDMA TX channel allocation flag */ - uint32_t txHcChFlag[UDMA_RM_TX_HC_CH_ARR_SIZE]; - /**< UDMA high capacity TX channel allocation flag */ - uint32_t txUhcChFlag[UDMA_RM_TX_UHC_CH_ARR_SIZE]; - - /**< UDMA ultra high capacity TX channel allocation flag */ - uint32_t rxChFlag[UDMA_RM_RX_CH_ARR_SIZE]; - /**< UDMA RX channel allocation flag */ - uint32_t rxHcChFlag[UDMA_RM_RX_HC_CH_ARR_SIZE]; - /**< UDMA high capacity RX channel allocation flag */ - uint32_t rxUhcChFlag[UDMA_RM_RX_UHC_CH_ARR_SIZE]; - /**< UDMA ultra high capacity RX channel allocation flag */ - - uint32_t freeRingFlag[UDMA_RM_FREE_RING_ARR_SIZE]; - /**< UDMA free ring allocation flag */ - uint32_t freeFlowFlag[UDMA_RM_FREE_FLOW_ARR_SIZE]; - /**< UDMA free flow allocation flag */ - uint32_t globalEventFlag[UDMA_RM_GLOBAL_EVENT_ARR_SIZE]; - /**< IA global event allocation flag */ - uint32_t vintrFlag[UDMA_RM_VINTR_ARR_SIZE]; - /**< IA VINTR allocation flag */ - uint32_t irIntrFlag[UDMA_RM_IR_INTR_ARR_SIZE]; - /**< IR interrupt allocation flag */ - - void *rmLock; - /**< Mutex to protect RM allocation. */ - SemaphoreP_Object rmLockObj; - /**< Mutex object. */ -} Udma_DrvObjectInt; /* ========================================================================== */ /* Global Variables */ diff --git a/source/drivers/udma/v1/udma_ring_common.c b/source/drivers/udma/v1/udma_ring_common.c index 3f49989ea63..0d26c533036 100644 --- a/source/drivers/udma/v1/udma_ring_common.c +++ b/source/drivers/udma/v1/udma_ring_common.c @@ -73,8 +73,8 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, - Udma_RingHandle ringHandle, +int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, + Udma_RingHandleInt ringHandle, uint16_t ringNum, const Udma_RingPrms *ringPrms) { @@ -209,7 +209,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_ringFree(Udma_RingHandle ringHandle) +int32_t Udma_ringFree(Udma_RingHandleInt ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -254,8 +254,8 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) return (retVal); } -int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, - Udma_RingHandle ringHandle, +int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, + Udma_RingHandleInt ringHandle, uint16_t ringNum) { int32_t retVal = UDMA_SOK; @@ -294,7 +294,7 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, return (retVal); } -int32_t Udma_ringDetach(Udma_RingHandle ringHandle) +int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -335,7 +335,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) return (retVal); } -int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) +int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; @@ -371,7 +371,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) return (retVal); } -int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; @@ -407,7 +407,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) return (retVal); } -int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; Udma_DrvHandleInt drvHandle; @@ -438,7 +438,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) return (retVal); } -void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) +void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -447,7 +447,7 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) return; } -void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) +void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -456,7 +456,7 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) return; } -void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) +void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count) { Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -465,7 +465,7 @@ void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) return; } -uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) +uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -479,7 +479,7 @@ uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) return (ringNum); } -void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) +void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle) { void *ringMem = NULL_PTR; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -489,7 +489,7 @@ void *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) return (ringMem); } -uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle) { uint32_t ringMode; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -499,7 +499,7 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) return (ringMode); } -uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle) { uint32_t size = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -509,7 +509,7 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) return (size); } -uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -519,7 +519,7 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) return (occ); } -uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle) { uint32_t occ = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -529,7 +529,7 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) return (occ); } -uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; @@ -539,7 +539,7 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) return (idx); } -uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) +uint32_t Udma_ringGetRdIdx(Udma_RingHandleInt ringHandle) { uint32_t idx = 0U; Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; diff --git a/source/drivers/udma/v1/udma_utils.c b/source/drivers/udma/v1/udma_utils.c index ed9849bb3ac..52a218878a4 100644 --- a/source/drivers/udma/v1/udma_utils.c +++ b/source/drivers/udma/v1/udma_utils.c @@ -140,15 +140,15 @@ void UdmaUtils_makeTrpd(uint8_t *trpdMem, uint32_t trSizeEncoded = UdmaUtils_getTrSizeEncoded(trType); /* Setup descriptor */ - CSL_udmapCppi5SetDescType(trpdMem, descType); + CSL_udmapCppi5SetDescType((CSL_UdmapCppi5HMPD *)trpdMem, descType); CSL_udmapCppi5TrSetReload((CSL_UdmapCppi5TRPD *)trpdMem, 0U, 0U); - CSL_udmapCppi5SetPktLen(trpdMem, descType, trCnt); - CSL_udmapCppi5SetIds(trpdMem, descType, 0U, UDMA_DEFAULT_FLOW_ID); /* Flow ID and Packet ID */ - CSL_udmapCppi5SetSrcTag(trpdMem, 0x0000); - CSL_udmapCppi5SetDstTag(trpdMem, 0x0000); + CSL_udmapCppi5SetPktLen((CSL_UdmapCppi5HMPD *)trpdMem, descType, trCnt); + CSL_udmapCppi5SetIds((CSL_UdmapCppi5HMPD *)trpdMem, descType, 0U, UDMA_DEFAULT_FLOW_ID); /* Flow ID and Packet ID */ + CSL_udmapCppi5SetSrcTag((CSL_UdmapCppi5HMPD *)trpdMem, 0x0000); + CSL_udmapCppi5SetDstTag((CSL_UdmapCppi5HMPD *)trpdMem, 0x0000); CSL_udmapCppi5TrSetEntryStride((CSL_UdmapCppi5TRPD *)trpdMem, trSizeEncoded); CSL_udmapCppi5SetReturnPolicy( - trpdMem, + (CSL_UdmapCppi5HMPD *)trpdMem, descType, CSL_UDMAP_CPPI5_PD_PKTINFO2_RETPOLICY_VAL_ENTIRE_PKT, CSL_UDMAP_CPPI5_PD_PKTINFO2_EARLYRET_VAL_NO, diff --git a/test/drivers/udma/udma_test_blkcpy.c b/test/drivers/udma/udma_test_blkcpy.c index 5a383ddf559..47d1994acd1 100644 --- a/test/drivers/udma/udma_test_blkcpy.c +++ b/test/drivers/udma/udma_test_blkcpy.c @@ -763,7 +763,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest chPrms.tdCqRingPrms.elemCnt = chObj->qdepth; /* Open channel for block copy */ - retVal = Udma_chOpen(chObj->drvHandle, &chObj->drvChObj, chType, &chPrms); + retVal = Udma_chOpen(chObj->drvHandle, (Udma_ChHandleInt) &chObj->drvChObj, chType, &chPrms); if(UDMA_SOK != retVal) { GT_0trace(taskObj->traceMask, GT_ERR, From 3ab9f6ecf3f78aa7e804b9139f72cc40bb9dbadb Mon Sep 17 00:00:00 2001 From: Nithyaa shri R B Date: Wed, 14 May 2025 16:02:21 +0530 Subject: [PATCH 4/5] am64/am24: udma: ospi: mcan: mcspi: uart: - Remove usage of EventHandle, RingHandle, chHandle, DrvHandle and FlowHandle(void*) from drivers. - Replace function returning void* pointer return types with actual pointer types. Fixes: SITSW-7155 Signed-off-by: Nithyaa shri R B --- .../mcan_loopback_dma/mcan_loopback_dma.c | 36 +-- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../a53ss0-0_freertos/ospi_flash_dma.c | 4 +- .../a53ss0-0_nortos/ospi_flash_dma.c | 4 +- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../udma/udma_adc_read/udma_adc_read.c | 8 +- .../udma/udma_chaining/udma_chaining.c | 8 +- .../udma_memcpy_interrupt.c | 8 +- .../udma_memcpy_polling/udma_memcpy_polling.c | 8 +- .../udma/udma_sw_trigger/udma_sw_trigger.c | 14 +- .../drivers/mcan/v0/dma/udma/canfd_dma_udma.c | 24 +- .../mcspi/v0/lld/dma/udma/mcspi_dma_udma.c | 4 +- .../uart/v0/lld/dma/udma/uart_dma_udma.c | 4 +- .../udma/hw_include/csl_lcdma_ringacc.h | 2 +- source/drivers/udma/include/udma_ch.h | 56 ++-- source/drivers/udma/include/udma_event.h | 14 +- source/drivers/udma/include/udma_flow.h | 22 +- source/drivers/udma/include/udma_ring.h | 40 +-- source/drivers/udma/include/udma_types.h | 84 +++--- .../drivers/udma/soc/am64x_am243x/udma_soc.c | 4 +- .../drivers/udma/soc/am64x_am243x/udma_soc.h | 2 +- source/drivers/udma/soc/am65x/udma_soc.c | 2 +- source/drivers/udma/v0/udma.c | 8 +- source/drivers/udma/v0/udma_ch.c | 248 ++++++++--------- source/drivers/udma/v0/udma_event.c | 174 ++++++------ source/drivers/udma/v0/udma_flow.c | 56 ++-- source/drivers/udma/v0/udma_priv.h | 152 +++++------ source/drivers/udma/v0/udma_ring_common.c | 102 +++---- source/drivers/udma/v0/udma_ring_lcdma.c | 40 +-- source/drivers/udma/v0/udma_rm.c | 92 +++---- source/drivers/udma/v0/udma_utils.c | 8 +- source/drivers/udma/v1/udma.c | 8 +- source/drivers/udma/v1/udma_ch.c | 254 +++++++++--------- source/drivers/udma/v1/udma_event.c | 170 ++++++------ source/drivers/udma/v1/udma_flow.c | 36 +-- source/drivers/udma/v1/udma_priv.h | 144 +++++----- source/drivers/udma/v1/udma_ring_common.c | 114 ++++---- source/drivers/udma/v1/udma_ring_normal.c | 38 +-- source/drivers/udma/v1/udma_rm.c | 80 +++--- source/drivers/udma/v1/udma_utils.c | 8 +- test/drivers/adc/st_adcDmaMode.c | 8 +- test/drivers/udma/udma_test_blkcpy.c | 8 +- test/drivers/udma/udma_test_bug.c | 4 +- test/drivers/udma/udma_test_ch.c | 8 +- test/drivers/udma/udma_test_common.c | 4 +- test/drivers/udma/udma_test_flow.c | 4 +- test/drivers/udma/udma_test_parser.c | 2 +- test/drivers/udma/udma_test_ring.c | 36 +-- 51 files changed, 1061 insertions(+), 1113 deletions(-) diff --git a/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c b/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c index 9a65269a653..df670460388 100644 --- a/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c +++ b/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c @@ -196,7 +196,7 @@ void mcan_loopback_dma_main(void *args) DebugP_assert(SystemP_SUCCESS == status); /* Get the UDMA driver instance handle */ - App_udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + App_udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; /* Initialize the data buffers */ for (i=0; iflashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c index dea96d507bd..25b2a99c005 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c index a41a15155bb..6bac1733d63 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c index a41a15155bb..6bac1733d63 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c index dea96d507bd..25b2a99c005 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c index dea96d507bd..25b2a99c005 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c index 3b5fb6029df..ea4a6b7b98b 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = &appObj->trEventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/udma/udma_adc_read/udma_adc_read.c b/examples/drivers/udma/udma_adc_read/udma_adc_read.c index a3ec9705f5f..87a163891b7 100644 --- a/examples/drivers/udma/udma_adc_read/udma_adc_read.c +++ b/examples/drivers/udma/udma_adc_read/udma_adc_read.c @@ -133,8 +133,8 @@ static SemaphoreP_Object gUdmaTestDoneSem; void *udma_adc_read_main(void *args) { - Udma_DrvHandle drvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; - Udma_ChHandle rxChHandle = &gUdmaRxChObj; + Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + Udma_ChHandle rxChHandle = (Udma_ChHandle) &gUdmaRxChObj; /* Open drivers to open the UART driver for console */ Drivers_open(); @@ -280,7 +280,7 @@ static void App_create(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle) DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = &gUdmaCqEventObj; + eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -313,7 +313,7 @@ static void App_delete(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle) DebugP_assert(UDMA_SOK == retVal); /* Unregister all events */ - eventHandle = &gUdmaCqEventObj; + eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; retVal = Udma_eventUnRegister(eventHandle); DebugP_assert(UDMA_SOK == retVal); diff --git a/examples/drivers/udma/udma_chaining/udma_chaining.c b/examples/drivers/udma/udma_chaining/udma_chaining.c index d0408ae0e09..e70aed77297 100644 --- a/examples/drivers/udma/udma_chaining/udma_chaining.c +++ b/examples/drivers/udma/udma_chaining/udma_chaining.c @@ -79,8 +79,8 @@ void App_udmaEventCb(Udma_EventHandle eventHandle, uint32_t eventType, void *app static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint32_t chIdx, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf, + const uint8_t *destBuf, + const uint8_t *srcBuf, uint32_t length); static void App_udmaInitSrcBuf(uint8_t *srcBuf, uint32_t length); static void App_udmaInitDestBuf(uint8_t *destBuf, uint32_t length); @@ -200,8 +200,8 @@ void App_udmaEventCb(Udma_EventHandle eventHandle, uint32_t eventType, void *app static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint32_t chIdx, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf, + const uint8_t *destBuf, + const uint8_t *srcBuf, uint32_t length) { CSL_UdmapTR15 *pTr; diff --git a/examples/drivers/udma/udma_memcpy_interrupt/udma_memcpy_interrupt.c b/examples/drivers/udma/udma_memcpy_interrupt/udma_memcpy_interrupt.c index b3b2ef05a98..2aeb395ad73 100644 --- a/examples/drivers/udma/udma_memcpy_interrupt/udma_memcpy_interrupt.c +++ b/examples/drivers/udma/udma_memcpy_interrupt/udma_memcpy_interrupt.c @@ -73,8 +73,8 @@ static SemaphoreP_Object gUdmaTestDoneSem; void App_udmaEventCb(Udma_EventHandle eventHandle, uint32_t eventType, void *appData); static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf, + const uint8_t *destBuf, + const uint8_t *srcBuf, uint32_t length); static void App_udmaInitBuf(uint8_t *srcBuf, uint8_t *destBuf, uint32_t length); static void App_udmaCompareBuf(uint8_t *srcBuf, uint8_t *destBuf, uint32_t length); @@ -158,8 +158,8 @@ void App_udmaEventCb(Udma_EventHandle eventHandle, uint32_t eventType, void *app static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf, + const uint8_t *destBuf, + const uint8_t *srcBuf, uint32_t length) { CSL_UdmapTR15 *pTr; diff --git a/examples/drivers/udma/udma_memcpy_polling/udma_memcpy_polling.c b/examples/drivers/udma/udma_memcpy_polling/udma_memcpy_polling.c index 710c4fe9892..c3add4a20fc 100644 --- a/examples/drivers/udma/udma_memcpy_polling/udma_memcpy_polling.c +++ b/examples/drivers/udma/udma_memcpy_polling/udma_memcpy_polling.c @@ -64,8 +64,8 @@ uint8_t gUdmaTestDestBuf[UDMA_ALIGN_SIZE(UDMA_TEST_NUM_BYTES)] __attribute__((al static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf, + const uint8_t *destBuf, + const uint8_t *srcBuf, uint32_t length); static void App_udmaInitBuf(uint8_t *srcBuf, uint8_t *destBuf, uint32_t length); static void App_udmaCompareBuf(uint8_t *srcBuf, uint8_t *destBuf, uint32_t length); @@ -140,8 +140,8 @@ void *udma_memcpy_polling_main(void *args) static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf, + const uint8_t *destBuf, + const uint8_t *srcBuf, uint32_t length) { CSL_UdmapTR15 *pTr; diff --git a/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c b/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c index db932984779..1051c521b7d 100644 --- a/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c +++ b/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c @@ -93,8 +93,8 @@ static void App_udmaTriggerDeInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Hand static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint32_t chIdx, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf); + const uint8_t *destBuf, + const uint8_t *srcBuf); static void App_udmaInitSrcBuf(uint8_t *srcBuf, uint32_t length); static void App_udmaInitDestBuf(uint8_t *destBuf, uint32_t length); static void App_udmaCompareBuf(uint8_t *srcBuf, uint8_t *destBuf, uint32_t length); @@ -219,7 +219,7 @@ void *udma_sw_trigger_main(void *args) static void App_udmaTriggerInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Handle) { int32_t retVal; - Udma_DrvHandle drvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; /* Init buffers */ App_udmaInitSrcBuf(&gUdmaTestSrcBuf[0U], UDMA_TEST_NUM_BYTES); @@ -232,7 +232,7 @@ static void App_udmaTriggerInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Handle App_udmaTrpdInit(ch1Handle, 1U, &gUdmaTestTrpdMem[1U][0U], &gUdmaTestDestBuf[0U], &gUdmaTestIndBuf[0U]); /* Register TR event - CH 0 */ - gCh0TrEventHandle = &gCh0TrEventObj; + gCh0TrEventHandle = (Udma_EventHandle) &gCh0TrEventObj; UdmaEventPrms_init(&gCh0TrEventPrms); gCh0TrEventPrms.eventType = UDMA_EVENT_TYPE_TR; gCh0TrEventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -247,7 +247,7 @@ static void App_udmaTriggerInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Handle DebugP_assert(UDMA_SOK == retVal); /* Register TR event - CH 1 */ - gCh1TrEventHandle = &gCh1TrEventObj; + gCh1TrEventHandle = (Udma_EventHandle) &gCh1TrEventObj; UdmaEventPrms_init(&gCh1TrEventPrms); gCh1TrEventPrms.eventType = UDMA_EVENT_TYPE_TR; gCh1TrEventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -290,8 +290,8 @@ static void App_udmaTriggerDeInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Hand static void App_udmaTrpdInit(Udma_ChHandle chHandle, uint32_t chIdx, uint8_t *trpdMem, - const void *destBuf, - const void *srcBuf) + const uint8_t *destBuf, + const uint8_t *srcBuf) { CSL_UdmapTR15 *pTr; uint32_t cqRingNum = Udma_chGetCqRingNum(chHandle); diff --git a/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c b/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c index 4bcc771a035..2fa11ce70eb 100644 --- a/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c +++ b/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c @@ -79,7 +79,7 @@ static void CANFD_udmaIsrTx(Udma_EventHandle eventHandle, CANFD_MessageObject* ptrCanMsgObj = (CANFD_MessageObject *)(args); CANFD_Object *ptrCanFdObj = ptrCanMsgObj->canfdHandle->object; CANFD_UdmaChConfig *udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - Udma_ChHandle txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + Udma_ChHandle txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; ptrCanMsgObj->dmaMsgConfig.currentMsgNum++; currentDataPtr = (uint8_t *)(ptrCanMsgObj->dmaMsgConfig.data); @@ -133,7 +133,7 @@ int32_t CANFD_createDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag chPrms.fqRingPrms.ringMem = udmaChCfg->txRingMem[ptrCanMsgObj->dmaEventNo]; chPrms.fqRingPrms.ringMemSize = udmaChCfg->ringMemSize; chPrms.fqRingPrms.elemCnt = udmaChCfg->ringElemCnt; - txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; /* Open channel for block copy */ retVal = Udma_chOpen(canfdUdmaHandle, txChHandle, chType, &chPrms); @@ -145,7 +145,7 @@ int32_t CANFD_createDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = (Udma_EventHandle) udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -172,8 +172,8 @@ int32_t CANFD_deleteDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, const CANFD_ if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; - eventHandle = udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; + txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = (Udma_EventHandle) udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; /* Disable Channel */ status = Udma_chDisable(txChHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); @@ -272,7 +272,7 @@ int32_t CANFD_configureDmaTx(const CANFD_Object *ptrCanFdObj, CANFD_MessageObjec if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; /* Store the current Tx msg. */ ptrCanMsgObj->dmaMsgConfig.dataLengthPerMsg = dataLengthPerMsg; @@ -325,7 +325,7 @@ static void CANFD_udmaIsrRx(Udma_EventHandle eventHandle, CANFD_MessageObject* ptrCanMsgObj = (CANFD_MessageObject *)(args); CANFD_Object *ptrCanFdObj = ptrCanMsgObj->canfdHandle->object; CANFD_UdmaChConfig *udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - Udma_ChHandle rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + Udma_ChHandle rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; uint8_t *currentDataPtr; uint64_t pDesc; @@ -365,7 +365,7 @@ int32_t CANFD_createDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag chPrms.fqRingPrms.ringMem = udmaChCfg->rxRingMem[ptrCanMsgObj->dmaEventNo]; chPrms.fqRingPrms.ringMemSize = udmaChCfg->ringMemSize; chPrms.fqRingPrms.elemCnt = udmaChCfg->ringElemCnt; - rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; /* Open channel for block copy */ retVal = Udma_chOpen(canfdUdmaHandle, rxChHandle, chType, &chPrms); @@ -377,7 +377,7 @@ int32_t CANFD_createDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = (Udma_EventHandle) udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -404,8 +404,8 @@ int32_t CANFD_deleteDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, const CANFD_ if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; - eventHandle = udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; + rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = (Udma_EventHandle) udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; /* Disable Channel */ status = Udma_chDisable(rxChHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); @@ -449,7 +449,7 @@ int32_t CANFD_configureDmaRx(const CANFD_Object *ptrCanFdObj, CANFD_MessageObjec if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg;; - rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; /* Store the current Rx msg. */ ptrCanMsgObj->dmaMsgConfig.dataLengthPerMsg = dataLengthPerMsg; diff --git a/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c b/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c index 9a075c42f32..beec5ab1318 100644 --- a/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c +++ b/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c @@ -285,7 +285,7 @@ static int32_t MCSPI_udmaInitRxCh(MCSPILLD_Handle hMcspi, const MCSPI_ChObject * DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = dmaChConfig->cqRxEvtHandle; + eventHandle = (Udma_EventHandle) dmaChConfig->cqRxEvtHandle; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -347,7 +347,7 @@ static int32_t MCSPI_udmaInitTxCh(MCSPILLD_Handle hMcspi, const MCSPI_ChObject * DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = dmaChConfig->cqTxEvtHandle; + eventHandle = (Udma_EventHandle) dmaChConfig->cqTxEvtHandle; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/source/drivers/uart/v0/lld/dma/udma/uart_dma_udma.c b/source/drivers/uart/v0/lld/dma/udma/uart_dma_udma.c index 00b44adea1e..6c2c0c20294 100644 --- a/source/drivers/uart/v0/lld/dma/udma/uart_dma_udma.c +++ b/source/drivers/uart/v0/lld/dma/udma/uart_dma_udma.c @@ -107,7 +107,7 @@ static int32_t UART_udmaInitRxCh(UARTLLD_Handle hUart, const UART_UdmaChConfig * DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = udmaChCfg->cqRxEvtHandle; + eventHandle = (Udma_EventHandle) udmaChCfg->cqRxEvtHandle; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -157,7 +157,7 @@ static int32_t UART_udmaInitTxCh(UARTLLD_Handle hUart, const UART_UdmaChConfig * DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = udmaChCfg->cqTxEvtHandle; + eventHandle = (Udma_EventHandle) udmaChCfg->cqTxEvtHandle; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/source/drivers/udma/hw_include/csl_lcdma_ringacc.h b/source/drivers/udma/hw_include/csl_lcdma_ringacc.h index 711a6a79e24..4818d18815a 100755 --- a/source/drivers/udma/hw_include/csl_lcdma_ringacc.h +++ b/source/drivers/udma/hw_include/csl_lcdma_ringacc.h @@ -258,7 +258,7 @@ typedef struct /** \brief CSL_LcdmaRingaccRingCfg contains information to configure a ring. */ typedef struct { - uint64_t *virtBase; /**< [IN] Virtual base address of the ring memory */ + void *virtBase; /**< [IN] Virtual base address of the ring memory */ uint64_t physBase; /**< [IN] Physical base address of the ring memory */ CSL_LcdmaRingaccRingMode mode; /**< [IN] Ring mode */ uint32_t elCnt; /**< [IN] Ring element count */ diff --git a/source/drivers/udma/include/udma_ch.h b/source/drivers/udma/include/udma_ch.h index b6fb9e1c70e..88e214609d2 100755 --- a/source/drivers/udma/include/udma_ch.h +++ b/source/drivers/udma/include/udma_ch.h @@ -233,8 +233,8 @@ extern "C" { * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle, +int32_t Udma_chOpen(Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle, uint32_t chType, const Udma_ChPrms *chPrms); @@ -250,7 +250,7 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chClose(Udma_ChHandleInt chHandle); +int32_t Udma_chClose(Udma_ChHandle chHandle); /** * \brief UDMA configure TX channel. @@ -269,7 +269,7 @@ int32_t Udma_chClose(Udma_ChHandleInt chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms); +int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms); /** * \brief UDMA configure RX channel. @@ -290,7 +290,7 @@ int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms); +int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms); /** * \brief UDMA configure PDMA channel (peerChNum as part of #Udma_ChPrms) @@ -307,7 +307,7 @@ int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, +int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, const Udma_ChPdmaPrms *pdmaPrms); /** @@ -322,7 +322,7 @@ int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chEnable(Udma_ChHandleInt chHandle); +int32_t Udma_chEnable(Udma_ChHandle chHandle); /** * \brief UDMA channel teardown and disable API. @@ -345,7 +345,7 @@ int32_t Udma_chEnable(Udma_ChHandleInt chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout); +int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout); /** * \brief UDMA channel pause API. @@ -360,7 +360,7 @@ int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chPause(Udma_ChHandleInt chHandle); +int32_t Udma_chPause(Udma_ChHandle chHandle); /** * \brief UDMA channel resume API. @@ -375,7 +375,7 @@ int32_t Udma_chPause(Udma_ChHandleInt chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chResume(Udma_ChHandleInt chHandle); +int32_t Udma_chResume(Udma_ChHandle chHandle); /** * \brief Returns the channel number offset with in a channel type - TX, RX @@ -389,7 +389,7 @@ int32_t Udma_chResume(Udma_ChHandleInt chHandle); * * \return Channel number. Returns #UDMA_DMA_CH_INVALID for error. */ -uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle); +uint32_t Udma_chGetNum(Udma_ChHandle chHandle); /** * \brief Returns the default free ring handle of the channel. @@ -399,7 +399,7 @@ uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle); * * \return Free ring handle. Returns NULL for error. */ -Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle); +Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle); /** * \brief Returns the default completion ring handle of the channel. @@ -409,7 +409,7 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle); * * \return Completion ring handle. Returns NULL for error. */ -Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle); +Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle); /** * \brief Returns the teardown completion ring handle of the channel. @@ -419,7 +419,7 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle); * * \return Teardown completion ring handle. Returns NULL for error. */ -Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle); +Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle); /** * \brief Returns the default free ring number to be programmed @@ -430,7 +430,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle); * * \return Free ring number. Returns #UDMA_RING_INVALID for error. */ -uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle); +uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle); /** * \brief Returns the default completion ring number to be programmed in @@ -443,7 +443,7 @@ uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle); * * \return Completion ring number. Returns #UDMA_RING_INVALID for error. */ -uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle); +uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle); /** * \brief Returns the default flow handle of the RX channel. @@ -453,7 +453,7 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle); * * \return Default flow handle. Returns NULL for error. */ -Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle); +Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle); /** * \brief Returns the global trigger event for the channel @@ -471,7 +471,7 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle); * * \return Global trigger event */ -uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger); +uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger); /** * \brief Returns the software trigger register address for the channel @@ -492,7 +492,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger); * * \return SW trigger register address */ -uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle); +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle); /** * \brief Sets the software trigger register based on the trigger mode @@ -516,7 +516,7 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger); +int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger); /** * \brief Chains the trigger channel with the chained channel. @@ -540,8 +540,8 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, - Udma_ChHandleInt chainedChHandle, +int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, + Udma_ChHandle chainedChHandle, uint32_t trigger); /** @@ -556,8 +556,8 @@ int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chBreakChaining(Udma_ChHandleInt triggerChHandle, - Udma_ChHandleInt chainedChHandle); +int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, + Udma_ChHandle chainedChHandle); /* * Structure Init functions @@ -609,7 +609,7 @@ void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats); +int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats); /** * \brief Get real-time peer data which contains number of bytes written. @@ -620,7 +620,7 @@ int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData); +int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData); /** * \brief Clear real-time peer data which contains number of bytes written. @@ -631,7 +631,7 @@ int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData); +int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData); #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1) /** @@ -650,7 +650,7 @@ int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData); * * \return Global trigger event */ -int32_t Udma_chDequeueTdResponse(Udma_ChHandleInt chHandle, +int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, CSL_UdmapTdResponse *tdResponse); #endif /* ========================================================================== */ diff --git a/source/drivers/udma/include/udma_event.h b/source/drivers/udma/include/udma_event.h index fc496b44386..8df4d5dd12c 100755 --- a/source/drivers/udma/include/udma_event.h +++ b/source/drivers/udma/include/udma_event.h @@ -243,8 +243,8 @@ typedef struct * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle, +int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle, Udma_EventPrms *eventPrms); /** @@ -278,7 +278,7 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle); +int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle); /** * \brief Returns the event ID allocated for this event. @@ -290,7 +290,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle); * * \return the event ID on success or #UDMA_EVENT_INVALID on error */ -uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle); +uint32_t Udma_eventGetId(Udma_EventHandle eventHandle); /** * \brief Disable the event at interrupt aggregator @@ -302,7 +302,7 @@ uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle); +int32_t Udma_eventDisable(Udma_EventHandle eventHandle); /** * \brief Enable the event at interrupt aggregator @@ -318,7 +318,7 @@ int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle); +int32_t Udma_eventEnable(Udma_EventHandle eventHandle); /** * \brief Get the global event handle of the driver handle. @@ -330,7 +330,7 @@ int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle); * * \return Returns global event handle else NULL on error */ -Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle); +Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle); /* * Structure Init functions diff --git a/source/drivers/udma/include/udma_flow.h b/source/drivers/udma/include/udma_flow.h index 4205bf1a638..478ddc2b450 100755 --- a/source/drivers/udma/include/udma_flow.h +++ b/source/drivers/udma/include/udma_flow.h @@ -119,8 +119,8 @@ typedef struct * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowAllocMapped(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms); /** @@ -136,7 +136,7 @@ int32_t Udma_flowAllocMapped(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle); +int32_t Udma_flowFree(Udma_FlowHandle flowHandle); /** * \brief UDMA flow attach API. This API is used to attach to an already @@ -168,8 +168,8 @@ int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, uint32_t flowStart, uint32_t flowCnt); @@ -202,8 +202,8 @@ int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowAttachMapped(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, uint32_t mappepdFlowNum, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms); @@ -223,7 +223,7 @@ int32_t Udma_flowAttachMapped(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle); +int32_t Udma_flowDetach(Udma_FlowHandle flowHandle); /** * \brief This API configures the flow configurations. @@ -244,7 +244,7 @@ int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, +int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, uint32_t flowIdx, const Udma_FlowPrms *flowPrms); @@ -259,7 +259,7 @@ int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, * * \return Start flow number on success or #UDMA_FLOW_INVALID on error */ -uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle); +uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle); /** * \brief Returns the number of flows managed by this flow handle. @@ -274,7 +274,7 @@ uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle); * * \return Flow count on success or #UDMA_FLOW_INVALID on error */ -uint32_t Udma_flowGetCount(Udma_FlowHandleInt flowHandle); +uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle); /* * Structure Init functions diff --git a/source/drivers/udma/include/udma_ring.h b/source/drivers/udma/include/udma_ring.h index bf082af20fa..bb228bec343 100755 --- a/source/drivers/udma/include/udma_ring.h +++ b/source/drivers/udma/include/udma_ring.h @@ -141,8 +141,8 @@ extern "C" { * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint16_t ringNum, const Udma_RingPrms *ringPrms); @@ -156,7 +156,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringFree(Udma_RingHandleInt ringHandle); +int32_t Udma_ringFree(Udma_RingHandle ringHandle); /** * \brief UDMA ring attach API. This API is used to attach to an already @@ -188,8 +188,8 @@ int32_t Udma_ringFree(Udma_RingHandleInt ringHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint16_t ringNum); /** @@ -205,7 +205,7 @@ int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle); +int32_t Udma_ringDetach(Udma_RingHandle ringHandle); /** * \brief UDMA queue descriptor to a ring - raw version @@ -235,7 +235,7 @@ int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); +int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem); /** * \brief UDMA dequeue descriptor from a ring - raw version @@ -273,7 +273,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); +int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem); /** * \brief UDMA dequeue descriptor from a ring when UDMA channel is disabled - @@ -298,7 +298,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) * * \return \ref Udma_ErrorCodes */ -int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); +int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem); /** * \brief UDMA prime descriptor to a exposed/"RING" mode ring - raw version @@ -326,7 +326,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); * \param phyDescMem [IN] Descriptor memory physical pointer to push to the * ring. */ -void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); +void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem); /** * \brief UDMA read descriptor from a exposed/"RING" mode ring - raw version @@ -356,7 +356,7 @@ void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); * \param phyDescMem [IN] Descriptor memory physical pointer to pop from the * ring. */ -void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); +void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem); /** * \brief UDMA ring API to set the doorbell in exposed/"RING" mode ring. @@ -385,7 +385,7 @@ void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); * This parameter can't be NULL. * \param count [IN] Number of count to commit. */ -void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count); +void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count); /** * \brief Returns the ring number allocated for this ring. @@ -395,7 +395,7 @@ void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count); * * \return The ring number on success or #UDMA_RING_INVALID on error */ -uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle); +uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle); /** * \brief Returns the ring memory pointer which is passed during ring alloc. @@ -407,7 +407,7 @@ uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle); * * \return Ring memory pointer on success or NULL on error */ -void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle); +uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle); /** * \brief Returns the ring mode which is configured during ring alloc. @@ -419,7 +419,7 @@ void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle); * * \return Ring mode on success or CSL_RINGACC_RING_MODE_INVALID on error */ -uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle); +uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle); /** * \brief Returns the ring element count which is passed during ring alloc. @@ -431,7 +431,7 @@ uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle); * * \return Ring element count on success or zero on error */ -uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle); +uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle); /** * \brief Returns the forward ring occupancy. @@ -449,7 +449,7 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle); * * \return Ring occupancy value from the register */ -uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle); +uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle); /** * \brief Returns the reverse ring occupancy. @@ -467,7 +467,7 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle); * * \return Ring occupancy value from the register */ -uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle); +uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle); /** * \brief Returns the ring write index value. @@ -485,7 +485,7 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle); * * \return Ring read/write index value */ -uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle); +uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle); /** * \brief Returns the ring read index value. @@ -503,7 +503,7 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle); * * \return Ring read/write index value */ -uint32_t Udma_ringGetRdIdx(Udma_RingHandleInt ringHandle); +uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle); /* * Structure Init functions diff --git a/source/drivers/udma/include/udma_types.h b/source/drivers/udma/include/udma_types.h index edde49f63ca..3c074670283 100755 --- a/source/drivers/udma/include/udma_types.h +++ b/source/drivers/udma/include/udma_types.h @@ -54,8 +54,6 @@ /* None */ #include -#include -#include #include #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) @@ -69,8 +67,6 @@ #endif #include -#include - #ifdef __cplusplus extern "C" { #endif @@ -79,31 +75,21 @@ extern "C" { /* Macros & Typedefs */ /* ========================================================================== */ -/** \brief UDMA driver handle */ -typedef void * Udma_DrvHandle; -/** \brief UDMA channel handle */ -typedef void * Udma_ChHandle; -/** \brief UDMA event handle */ -typedef void * Udma_EventHandle; -/** \brief UDMA ring handle */ -typedef void * Udma_RingHandle; -/** \brief UDMA flow handle */ -typedef void * Udma_FlowHandle; #if (UDMA_SOC_CFG_RING_MON_PRESENT == 1) /** \brief UDMA ring monitor handle */ typedef struct Udma_RingMonObj * Udma_RingMonHandle; #endif /** \brief UDMA driver handle */ -typedef struct Udma_DrvObjectInt_t *Udma_DrvHandleInt; +typedef struct Udma_DrvObjectInt_t *Udma_DrvHandle; /** \brief UDMA channel handle */ -typedef struct Udma_ChObjectInt_t *Udma_ChHandleInt; +typedef struct Udma_ChObjectInt_t *Udma_ChHandle; /** \brief UDMA event handle */ -typedef struct Udma_EventObjectInt_t *Udma_EventHandleInt; +typedef struct Udma_EventObjectInt_t *Udma_EventHandle; /** \brief UDMA ring handle */ -typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; +typedef struct Udma_RingObjectInt_t *Udma_RingHandle; /** \brief UDMA flow handle */ -typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; +typedef struct Udma_FlowObjectInt_t *Udma_FlowHandle; /** * \brief UDMA ring parameters. @@ -774,7 +760,7 @@ typedef struct */ typedef struct Udma_RingObjectInt_t { - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ uint16_t ringNum; @@ -824,7 +810,7 @@ typedef struct Udma_RingObjectInt_t */ typedef struct Udma_FlowObjectInt_t { - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ uint32_t flowStart; @@ -872,7 +858,7 @@ typedef struct Udma_FlowObjectInt_t */ typedef struct Udma_EventObjectInt_t { - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ Udma_EventPrms eventPrms; /**< Event parameters passed during event registeration. */ @@ -890,9 +876,9 @@ typedef struct Udma_EventObjectInt_t uint32_t coreIntrNum; /**< Allocated core interrupt number. */ - Udma_EventHandleInt nextEvent; + Udma_EventHandle nextEvent; /**< Pointer to next event - used in shared event for traversing in ISR */ - Udma_EventHandleInt prevEvent; + Udma_EventHandle prevEvent; /**< Pointer to previous event - used in shared event for traversing during * event un-registration */ @@ -928,7 +914,7 @@ typedef struct Udma_ChObjectInt_t /**< UDMA channel type. Refer \ref Udma_ChType. */ Udma_ChPrms chPrms; /**< Object to store the channel params. */ - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ uint32_t txChNum; @@ -949,14 +935,14 @@ typedef struct Udma_ChObjectInt_t uint32_t peerThreadId; /**< Peer channel thread ID - this is or'ed with thread offset. */ - Udma_RingHandleInt fqRing; + Udma_RingHandle fqRing; /**< Free queue ring handle */ - Udma_RingHandleInt cqRing; + Udma_RingHandle cqRing; /**< Completion queue ring handle * For AM64x kind of devices, where there is no seperate Completion queue, * this points to fqRing itself. */ - Udma_RingHandleInt tdCqRing; + Udma_RingHandle tdCqRing; /**< Teardown completion queue ring handle */ Udma_RingObjectInt fqRingObj; @@ -970,7 +956,7 @@ typedef struct Udma_ChObjectInt_t * Not used for AM64x kind of devices, where teardown function is not present. */ - Udma_FlowHandleInt defaultFlow; + Udma_FlowHandle defaultFlow; /**< Default flow handle */ Udma_FlowObjectInt defaultFlowObj; /**< Default flow object - Flow ID equal to the RX channel is reserved @@ -1254,7 +1240,7 @@ typedef struct Udma_DrvObjectInt_t Udma_EventObjectInt globalEventObj; /**< Object to store global event. */ - Udma_EventHandleInt globalEventHandle; + Udma_EventHandle globalEventHandle; /**< Global event handle. */ Udma_InitPrms initPrms; @@ -1314,7 +1300,7 @@ typedef struct Udma_DrvObjectInt_t uint32_t irIntrFlag[UDMA_RM_IR_INTR_ARR_SIZE]; /**< IR interrupt allocation flag */ - void *rmLock; + SemaphoreP_Object *rmLock; /**< Mutex to protect RM allocation. */ SemaphoreP_Object rmLockObj; /**< Mutex object. */ @@ -1416,10 +1402,10 @@ typedef struct /**< Proxy thread to push/pop to ring in proxy mode. * By default driver will initialize to a default value based on * core and NAVSS instance. User can override this based on need. - * The default proxy allocation starts from #UDMA_DEFAULT_RM_PROXY_THREAD_START + * The default proxy allocation starts from UDMA_DEFAULT_RM_PROXY_THREAD_START * and will allocate 1 per core. So total allocation will be from - * #UDMA_DEFAULT_RM_PROXY_THREAD_START to - * (#UDMA_DEFAULT_RM_PROXY_THREAD_START + num cores) in an SOC. + * UDMA_DEFAULT_RM_PROXY_THREAD_START to + * (UDMA_DEFAULT_RM_PROXY_THREAD_START + num cores) in an SOC. * * The proxy thread number should be allocated within a NAVSS instance * as a proxy can access ring only within the same NAVSS instance. The @@ -1441,12 +1427,12 @@ typedef struct * Note this should not overlap with proxyThreadNum */ uint32_t numProxy; /**< Number of proxy to be managed. - * Note: This cannot exceed #UDMA_RM_MAX_PROXY */ + * Note: This cannot exceed UDMA_RM_MAX_PROXY */ uint32_t startRingMon; /**< Start monitor from which this UDMA driver instance manages */ uint32_t numRingMon; /**< Number of monitors to be managed. - * Note: This cannot exceed #UDMA_RM_MAX_RING_MON */ + * Note: This cannot exceed UDMA_RM_MAX_RING_MON */ } Udma_RmInitPrms; /** * \brief UDMA ring object. @@ -1456,7 +1442,7 @@ typedef struct */ typedef struct Udma_RingObjectInt_t { - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ uint16_t ringNum; @@ -1506,7 +1492,7 @@ typedef struct Udma_RingObjectInt_t */ typedef struct Udma_FlowObjectInt_t { - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ uint32_t flowStart; @@ -1554,7 +1540,7 @@ typedef struct Udma_FlowObjectInt_t */ typedef struct Udma_EventObjectInt_t { - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ Udma_EventPrms eventPrms; /**< Event parameters passed during event registeration. */ @@ -1572,13 +1558,13 @@ typedef struct Udma_EventObjectInt_t uint32_t coreIntrNum; /**< Allocated core interrupt number. */ - Udma_EventHandleInt nextEvent; + Udma_EventHandle nextEvent; /**< Pointer to next event - used in shared event for traversing in ISR */ - Udma_EventHandleInt prevEvent; + Udma_EventHandle prevEvent; /**< Pointer to previous event - used in shared event for traversing during * event un-registration */ - void *hwiHandle; + HwiP_Object *hwiHandle; /**< HWI handle. */ HwiP_Object hwiObject; /**< HWI Object. */ @@ -1610,7 +1596,7 @@ typedef struct Udma_ChObjectInt_t /**< UDMA channel type. Refer \ref Udma_ChType. */ Udma_ChPrms chPrms; /**< Object to store the channel params. */ - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ uint32_t txChNum; /**< Allocated TX channel number - this is relative channel number from @@ -1630,14 +1616,14 @@ typedef struct Udma_ChObjectInt_t uint32_t peerThreadId; /**< Peer channel thread ID - this is or'ed with thread offset. */ - Udma_RingHandleInt fqRing; + Udma_RingHandle fqRing; /**< Free queue ring handle */ - Udma_RingHandleInt cqRing; + Udma_RingHandle cqRing; /**< Completion queue ring handle * For AM64x kind of devices, where there is no seperate Completion queue, * this points to fqRing itself. */ - Udma_RingHandleInt tdCqRing; + Udma_RingHandle tdCqRing; /**< Teardown completion queue ring handle */ Udma_RingObjectInt fqRingObj; @@ -1651,7 +1637,7 @@ typedef struct Udma_ChObjectInt_t * Not used for AM64x kind of devices, where teardown function is not present. */ - Udma_FlowHandleInt defaultFlow; + Udma_FlowHandle defaultFlow; /**< Default flow handle */ Udma_FlowObjectInt defaultFlowObj; /**< Default flow object - Flow ID equal to the RX channel is reserved @@ -1801,7 +1787,7 @@ typedef struct Udma_DrvObjectInt_t Udma_EventObjectInt globalEventObj; /**< Object to store global event. */ - Udma_EventHandleInt globalEventHandle; + Udma_EventHandle globalEventHandle; /**< Global event handle. */ Udma_InitPrms initPrms; @@ -1848,7 +1834,7 @@ typedef struct Udma_DrvObjectInt_t uint32_t irIntrFlag[UDMA_RM_IR_INTR_ARR_SIZE]; /**< IR interrupt allocation flag */ - void *rmLock; + SemaphoreP_Object *rmLock; /**< Mutex to protect RM allocation. */ SemaphoreP_Object rmLockObj; /**< Mutex object. */ diff --git a/source/drivers/udma/soc/am64x_am243x/udma_soc.c b/source/drivers/udma/soc/am64x_am243x/udma_soc.c index c34d4e88e25..62e1f94e2d3 100755 --- a/source/drivers/udma/soc/am64x_am243x/udma_soc.c +++ b/source/drivers/udma/soc/am64x_am243x/udma_soc.c @@ -121,7 +121,7 @@ const Udma_MappedChRingAttributes gUdmaRxMappedChRingAttributes[CSL_DMSS_PKTDMA_ /* ========================================================================== */ -void Udma_initDrvHandle(Udma_DrvHandleInt drvHandle) +void Udma_initDrvHandle(Udma_DrvHandle drvHandle) { uint32_t instId; CSL_BcdmaCfg *pBcdmaRegs; @@ -265,7 +265,7 @@ uint32_t Udma_isCacheCoherent(void) return (isCacheCoherent); } -int32_t Udma_getMappedChRingAttributes(Udma_DrvHandleInt drvHandle, +int32_t Udma_getMappedChRingAttributes(Udma_DrvHandle drvHandle, uint32_t mappedGrp, uint32_t chNum, Udma_MappedChRingAttributes *chAttr) diff --git a/source/drivers/udma/soc/am64x_am243x/udma_soc.h b/source/drivers/udma/soc/am64x_am243x/udma_soc.h index a6276325ced..c65fcfa3124 100644 --- a/source/drivers/udma/soc/am64x_am243x/udma_soc.h +++ b/source/drivers/udma/soc/am64x_am243x/udma_soc.h @@ -240,7 +240,7 @@ extern "C" { #define UDMA_RM_GLOBAL_EVENT_ARR_SIZE (UDMA_RM_MAX_GLOBAL_EVENT >> 5U) #define UDMA_RM_VINTR_ARR_SIZE (UDMA_RM_MAX_VINTR >> 5U) #define UDMA_RM_IR_INTR_ARR_SIZE (UDMA_RM_MAX_IR_INTR >> 5U) -/* @} */ +/** @} */ /** * \anchor Udma_RmResId diff --git a/source/drivers/udma/soc/am65x/udma_soc.c b/source/drivers/udma/soc/am65x/udma_soc.c index 1c39a7b8f71..c2a52acd51a 100644 --- a/source/drivers/udma/soc/am65x/udma_soc.c +++ b/source/drivers/udma/soc/am65x/udma_soc.c @@ -71,7 +71,7 @@ /* Function Definitions */ /* ========================================================================== */ -void Udma_initDrvHandle(Udma_DrvHandleInt drvHandle) +void Udma_initDrvHandle(Udma_DrvHandle drvHandle) { uint32_t instId; CSL_UdmapCfg *pUdmapRegs; diff --git a/source/drivers/udma/v0/udma.c b/source/drivers/udma/v0/udma.c index db4945a2943..75e2398f40c 100644 --- a/source/drivers/udma/v0/udma.c +++ b/source/drivers/udma/v0/udma.c @@ -74,7 +74,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt; + Udma_DrvHandle drvHandleInt; /* Structure size assert */ DebugP_assert(sizeof(Udma_DrvObjectInt) <= sizeof(Udma_DrvObject)); @@ -90,7 +90,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandleInt) drvHandle; + drvHandleInt = (Udma_DrvHandle) drvHandle; (void) memset(drvHandleInt, 0, sizeof(*drvHandleInt)); (void) memcpy(&drvHandleInt->initPrms, initPrms, sizeof(Udma_InitPrms)); UdmaRmInitPrms_init(initPrms->instId, &drvHandleInt->rmInitPrms); @@ -136,7 +136,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) int32_t Udma_deinit(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (drvHandleInt->drvInitDone != UDMA_INIT_DONE)) @@ -153,7 +153,7 @@ int32_t Udma_deinit(Udma_DrvHandle drvHandle) { DebugP_logError("[UDMA] Global event free failed!!!\r\n"); } - drvHandleInt->globalEventHandle = (Udma_EventHandleInt) NULL_PTR; + drvHandleInt->globalEventHandle = (Udma_EventHandle) NULL_PTR; } retVal += Udma_rmDeinit(drvHandleInt); diff --git a/source/drivers/udma/v0/udma_ch.c b/source/drivers/udma/v0/udma_ch.c index 7271ee749be..a6b990f6c30 100644 --- a/source/drivers/udma/v0/udma_ch.c +++ b/source/drivers/udma/v0/udma_ch.c @@ -80,28 +80,28 @@ /* Function Declarations */ /* ========================================================================== */ -static void Udma_chAssignRegOverlay(Udma_DrvHandleInt drvHandle, Udma_ChHandleInt chHandle); -static void Udma_chInitRegs(Udma_ChHandleInt chHandle); -static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, uint32_t chType); -static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, uint32_t chType); -static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum); -static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum); -static int32_t Udma_chCheckParams(Udma_DrvHandleInt drvHandle, +static void Udma_chAssignRegOverlay(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle); +static void Udma_chInitRegs(Udma_ChHandle chHandle); +static void Udma_chPauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum, uint32_t chType); +static void Udma_chUnpauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum, uint32_t chType); +static void Udma_chPauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum); +static void Udma_chUnpauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum); +static int32_t Udma_chCheckParams(Udma_DrvHandle drvHandle, uint32_t chType, const Udma_ChPrms *chPrms); -static void Udma_chSetPeerReg(Udma_DrvHandleInt drvHandle, +static void Udma_chSetPeerReg(Udma_DrvHandle drvHandle, const Udma_ChPdmaPrms *pdmaPrms, volatile uint32_t *PEER8, volatile uint32_t *PEER1, volatile uint32_t *PEER0); -static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle); -static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle); -static int32_t Udma_chPair(Udma_ChHandleInt chHandle); -static int32_t Udma_chUnpair(Udma_ChHandleInt chHandle); -static void Udma_chEnableLocal(Udma_ChHandleInt chHandle); -static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t timeout); -static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout); -static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout); +static int32_t Udma_chAllocResource(Udma_ChHandle chHandle); +static int32_t Udma_chFreeResource(Udma_ChHandle chHandle); +static int32_t Udma_chPair(Udma_ChHandle chHandle); +static int32_t Udma_chUnpair(Udma_ChHandle chHandle); +static void Udma_chEnableLocal(Udma_ChHandle chHandle); +static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandle chHandle, uint32_t timeout); +static int32_t Udma_chDisableTxChan(Udma_ChHandle chHandle, uint32_t timeout); +static int32_t Udma_chDisableRxChan(Udma_ChHandle chHandle, uint32_t timeout); /* ========================================================================== */ /* Global Variables */ @@ -113,15 +113,15 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle, +int32_t Udma_chOpen(Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle, uint32_t chType, const Udma_ChPrms *chPrms) { int32_t retVal = UDMA_SOK, tempRetVal; uint32_t allocDone = (uint32_t) FALSE; - Udma_ChHandleInt chHandleInt; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; + Udma_ChHandle chHandleInt; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; /* Error check */ if((drvHandleInt == NULL_PTR) || (NULL_PTR == chHandle) || (NULL_PTR == chPrms)) @@ -144,7 +144,7 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - chHandleInt = (Udma_ChHandleInt) chHandle; + chHandleInt = (Udma_ChHandle) chHandle; (void) memset(chHandleInt, 0, sizeof(Udma_ChObject)); (void) memcpy(&chHandleInt->chPrms, chPrms, sizeof(Udma_ChPrms)); chHandleInt->chType = chType; @@ -154,9 +154,9 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, chHandleInt->extChNum = UDMA_DMA_CH_INVALID; chHandleInt->pdmaChNum = UDMA_DMA_CH_INVALID; chHandleInt->peerThreadId = UDMA_THREAD_ID_INVALID; - chHandleInt->fqRing = (Udma_RingHandleInt) NULL_PTR; - chHandleInt->cqRing = (Udma_RingHandleInt) NULL_PTR; - chHandleInt->tdCqRing = (Udma_RingHandleInt) NULL_PTR; + chHandleInt->fqRing = (Udma_RingHandle) NULL_PTR; + chHandleInt->cqRing = (Udma_RingHandle) NULL_PTR; + chHandleInt->tdCqRing = (Udma_RingHandle) NULL_PTR; UdmaChTxPrms_init(&chHandleInt->txPrms, chType); UdmaChRxPrms_init(&chHandleInt->rxPrms, chType); Udma_chInitRegs(chHandleInt); @@ -208,11 +208,11 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_chClose(Udma_ChHandleInt chHandle) +int32_t Udma_chClose(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -259,11 +259,11 @@ int32_t Udma_chClose(Udma_ChHandleInt chHandle) return (retVal); } -int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms) +int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; struct tisci_msg_rm_udmap_tx_ch_cfg_req rmUdmaTxReq; struct tisci_msg_rm_udmap_tx_ch_cfg_resp rmUdmaTxResp; @@ -362,11 +362,11 @@ int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms) return (retVal); } -int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms) +int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; struct tisci_msg_rm_udmap_rx_ch_cfg_req rmUdmaRxReq; struct tisci_msg_rm_udmap_rx_ch_cfg_resp rmUdmaRxResp; Udma_FlowPrms flowPrms; @@ -511,13 +511,13 @@ int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms) return (retVal); } -int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, +int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, const Udma_ChPdmaPrms *pdmaPrms) { int32_t retVal = UDMA_SOK; volatile uint32_t *PEER8=NULL, *PEER0=NULL, *PEER1=NULL; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -586,11 +586,11 @@ int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, return (retVal); } -int32_t Udma_chEnable(Udma_ChHandleInt chHandle) +int32_t Udma_chEnable(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -615,11 +615,11 @@ int32_t Udma_chEnable(Udma_ChHandleInt chHandle) return (retVal); } -int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout) +int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -658,11 +658,11 @@ int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout) return (retVal); } -int32_t Udma_chPause(Udma_ChHandleInt chHandle) +int32_t Udma_chPause(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -705,11 +705,11 @@ int32_t Udma_chPause(Udma_ChHandleInt chHandle) return (retVal); } -int32_t Udma_chResume(Udma_ChHandleInt chHandle) +int32_t Udma_chResume(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -751,12 +751,12 @@ int32_t Udma_chResume(Udma_ChHandleInt chHandle) return (retVal); } -uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle) +uint32_t Udma_chGetNum(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; uint32_t chNum = UDMA_DMA_CH_INVALID; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -789,12 +789,12 @@ uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle) return (chNum); } -Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle) +Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle fqRing = (Udma_RingHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -818,12 +818,12 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle) return (fqRing); } -Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle) +Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle cqRing = (Udma_RingHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -847,12 +847,12 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle) return (cqRing); } -Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle) +Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle tdCqRing = (Udma_RingHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -876,7 +876,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle) return (tdCqRing); } -uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle) +uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -890,7 +890,7 @@ uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle) return (ringNum); } -uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle) +uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -904,12 +904,12 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle) return (ringNum); } -Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle) +Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_FlowHandle defaultFlow = (Udma_FlowHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -933,12 +933,12 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle) return (defaultFlow); } -uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger) +uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; uint32_t triggerEvent = UDMA_EVENT_INVALID; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -1006,11 +1006,11 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger) return (triggerEvent); } -uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle) +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1066,11 +1066,11 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle) return (pSwTriggerReg); } -int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger) +int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1106,14 +1106,14 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger) return (retVal); } -int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, - Udma_ChHandleInt chainedChHandle, +int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, + Udma_ChHandle chainedChHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt triggerChHandleInt = (Udma_ChHandleInt) triggerChHandle; - Udma_ChHandleInt chainedChHandleInt = (Udma_ChHandleInt) chainedChHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; + Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_set_req rmIrqReq; struct tisci_msg_rm_irq_set_resp rmIrqResp; @@ -1230,13 +1230,13 @@ int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, return (retVal); } -int32_t Udma_chBreakChaining(Udma_ChHandleInt triggerChHandle, - Udma_ChHandleInt chainedChHandle) +int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, + Udma_ChHandle chainedChHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt triggerChHandleInt = (Udma_ChHandleInt) triggerChHandle; - Udma_ChHandleInt chainedChHandleInt = (Udma_ChHandleInt) chainedChHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; + Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_release_req rmIrqReq; @@ -1464,11 +1464,11 @@ void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms) return; } -int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats) +int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; uint32_t chNum; #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) CSL_BcdmaChanStats bcdmaChanStats = {0}; @@ -1556,12 +1556,12 @@ int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats) return (retVal); } -int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData) +int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) { int32_t retVal = UDMA_SOK; volatile uint32_t *PEER4=NULL; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1604,12 +1604,12 @@ int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData) return (retVal); } -int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData) +int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData) { int32_t retVal = UDMA_SOK; volatile uint32_t *PEER4=NULL; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1652,7 +1652,7 @@ int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData) return (retVal); } -static int32_t Udma_chCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_chCheckParams(Udma_DrvHandle drvHandle, uint32_t chType, const Udma_ChPrms *chPrms) { @@ -1701,10 +1701,10 @@ static int32_t Udma_chCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) +static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK, tempRetVal; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; uint16_t ringNum = UDMA_RING_INVALID; #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) Udma_MappedChRingAttributes chAttr; @@ -1905,7 +1905,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) &chHandle->chPrms.fqRingPrms); if(UDMA_SOK != retVal) { - chHandle->fqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->fqRing = (Udma_RingHandle) NULL_PTR; DebugP_logError("[UDMA] FQ ring alloc failed!!!\r\n"); } else if(((chHandle->chType & UDMA_CH_FLAG_MAPPED) == UDMA_CH_FLAG_MAPPED) && @@ -1929,7 +1929,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) if(UDMA_SOK == retVal) { /* In devices like AM64x, teardown is not supported.*/ - chHandle->tdCqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; } if(UDMA_SOK != retVal) @@ -1949,10 +1949,10 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) return (retVal); } -static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) +static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; drvHandle = chHandle->drvHandle; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) @@ -2026,11 +2026,11 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) chHandle->rxChNum = UDMA_DMA_CH_INVALID; } - chHandle->defaultFlowObj.drvHandle = (Udma_DrvHandleInt) NULL_PTR; + chHandle->defaultFlowObj.drvHandle = (Udma_DrvHandle) NULL_PTR; chHandle->defaultFlowObj.flowStart = UDMA_FLOW_INVALID; chHandle->defaultFlowObj.flowCnt = 0U; chHandle->defaultFlowObj.flowInitDone = UDMA_DEINIT_DONE; - chHandle->defaultFlow = (Udma_FlowHandleInt) NULL_PTR; + chHandle->defaultFlow = (Udma_FlowHandle) NULL_PTR; } chHandle->pdmaChNum = UDMA_DMA_CH_INVALID; chHandle->peerThreadId = UDMA_THREAD_ID_INVALID; @@ -2042,11 +2042,11 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) { DebugP_logError("[UDMA] RM Free FQ ring failed!!!\r\n"); } - chHandle->fqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->fqRing = (Udma_RingHandle) NULL_PTR; } if(NULL_PTR != chHandle->cqRing) { - chHandle->cqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->cqRing = (Udma_RingHandle) NULL_PTR; } if(NULL_PTR != chHandle->tdCqRing) { @@ -2055,16 +2055,16 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) { DebugP_logError("[UDMA] RM Free TDCQ ring failed!!!\r\n"); } - chHandle->tdCqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; } return (retVal); } -static int32_t Udma_chPair(Udma_ChHandleInt chHandle) +static int32_t Udma_chPair(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; struct tisci_msg_rm_psil_pair_req rmPairReq; drvHandle = chHandle->drvHandle; @@ -2106,10 +2106,10 @@ static int32_t Udma_chPair(Udma_ChHandleInt chHandle) return (retVal); } -static int32_t Udma_chUnpair(Udma_ChHandleInt chHandle) +static int32_t Udma_chUnpair(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; struct tisci_msg_rm_psil_unpair_req rmUnpairReq; drvHandle = chHandle->drvHandle; @@ -2151,10 +2151,10 @@ static int32_t Udma_chUnpair(Udma_ChHandleInt chHandle) return (retVal); } -static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) +static void Udma_chEnableLocal(Udma_ChHandle chHandle) { uint32_t regVal; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) CSL_BcdmaRT bcdmaRtEnable; CSL_PktdmaRT pktdmaRtEnable; @@ -2264,11 +2264,11 @@ static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) return; } -static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t timeout) +static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; uint32_t currTimeout = 0U; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) CSL_BcdmaRT bcdmaRtStatus; CSL_PktdmaRT pktdmaRtStatus; @@ -2414,11 +2414,11 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time return (retVal); } -static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) +static int32_t Udma_chDisableTxChan(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; uint32_t peerRtEnable = 0U, currTimeout = 0U; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) CSL_BcdmaRT bcdmaRtStatus; CSL_PktdmaRT pktdmaRtStatus; @@ -2638,11 +2638,11 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) return (retVal); } -static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) +static int32_t Udma_chDisableRxChan(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; uint32_t currTimeout = 0U, regVal; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) CSL_BcdmaRT bcdmaRtStatus; CSL_PktdmaRT pktdmaRtStatus; @@ -2818,7 +2818,7 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) return (retVal); } -static void Udma_chAssignRegOverlay(Udma_DrvHandleInt drvHandle, Udma_ChHandleInt chHandle) +static void Udma_chAssignRegOverlay(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle) { #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) @@ -2913,7 +2913,7 @@ static void Udma_chAssignRegOverlay(Udma_DrvHandleInt drvHandle, Udma_ChHandleIn #endif } -static void Udma_chInitRegs(Udma_ChHandleInt chHandle) +static void Udma_chInitRegs(Udma_ChHandle chHandle) { #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) chHandle->pBcdmaBcCfgRegs = (volatile CSL_bcdma_bccfgRegs_chan *) NULL_PTR; @@ -2933,7 +2933,7 @@ static void Udma_chInitRegs(Udma_ChHandleInt chHandle) } -static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum,uint32_t chType) +static void Udma_chPauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum,uint32_t chType) { #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) @@ -2952,7 +2952,7 @@ static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum,ui #endif } -static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, uint32_t chType) +static void Udma_chUnpauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum, uint32_t chType) { #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) @@ -2971,7 +2971,7 @@ static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, #endif } -static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) +static void Udma_chPauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum) { #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) @@ -2986,7 +2986,7 @@ static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) #endif } -static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) +static void Udma_chUnpauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum) { #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) if(UDMA_INST_TYPE_LCDMA_BCDMA == drvHandle->instType) @@ -3001,7 +3001,7 @@ static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) #endif } -static void Udma_chSetPeerReg(Udma_DrvHandleInt drvHandle, +static void Udma_chSetPeerReg(Udma_DrvHandle drvHandle, const Udma_ChPdmaPrms *pdmaPrms, volatile uint32_t *PEER8, volatile uint32_t *PEER1, diff --git a/source/drivers/udma/v0/udma_event.c b/source/drivers/udma/v0/udma_event.c index 591762ef653..873c0263417 100644 --- a/source/drivers/udma/v0/udma_event.c +++ b/source/drivers/udma/v0/udma_event.c @@ -60,22 +60,22 @@ /* ========================================================================== */ static void Udma_eventIsrFxn(void *args); -static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_eventCheckParams(Udma_DrvHandle drvHandle, const Udma_EventPrms *eventPrms); -static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static void Udma_eventFreeResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); +static int32_t Udma_eventCheckUnRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static void Udma_eventFreeResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static void Udma_eventProgramSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static void Udma_eventResetSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); /* ========================================================================== */ /* Global Variables */ @@ -87,14 +87,14 @@ static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle, +int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle, Udma_EventPrms *eventPrms) { int32_t retVal = UDMA_SOK; uint32_t allocDone = (uint32_t) FALSE; - Udma_DrvHandleInt drvHandleInt; - Udma_EventHandleInt eventHandleInt; + Udma_DrvHandle drvHandleInt; + Udma_EventHandle eventHandleInt; /* Error check */ if((NULL_PTR == drvHandle) || (NULL_PTR == eventHandle) || (NULL_PTR == eventPrms)) @@ -103,7 +103,7 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandleInt) drvHandle; + drvHandleInt = (Udma_DrvHandle) drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -118,7 +118,7 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - eventHandleInt = (Udma_EventHandleInt) eventHandle; + eventHandleInt = (Udma_EventHandle) eventHandle; (void) memcpy( &eventHandleInt->eventPrms, eventPrms, sizeof(eventHandleInt->eventPrms)); eventHandleInt->drvHandle = drvHandleInt; @@ -127,8 +127,8 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, eventHandleInt->vintrBitNum = UDMA_EVENT_INVALID; eventHandleInt->irIntrNum = UDMA_INTR_INVALID; eventHandleInt->coreIntrNum = UDMA_INTR_INVALID; - eventHandleInt->nextEvent = (Udma_EventHandleInt) NULL_PTR; - eventHandleInt->prevEvent = (Udma_EventHandleInt) NULL_PTR; + eventHandleInt->nextEvent = (Udma_EventHandle) NULL_PTR; + eventHandleInt->prevEvent = (Udma_EventHandle) NULL_PTR; eventHandleInt->hwiHandle = NULL_PTR; eventHandleInt->vintrBitAllocFlag = 0U; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; @@ -215,9 +215,9 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, /* Copy core number from master handle */ /* Copy from master handle */ eventPrms->vintrNum = - ((Udma_EventHandleInt) (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; + ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; eventPrms->coreIntrNum = - ((Udma_EventHandleInt) (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; + ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; } /* Copy the same info to eventHandleInt->eventPrms*/ eventHandleInt->eventPrms.intrStatusReg = eventPrms->intrStatusReg; @@ -231,11 +231,11 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) +int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_EventHandleInt eventHandleInt; + Udma_DrvHandle drvHandle; + Udma_EventHandle eventHandleInt; /* Error check */ if(NULL_PTR == eventHandle) @@ -244,7 +244,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) } if(UDMA_SOK == retVal) { - eventHandleInt = (Udma_EventHandleInt) eventHandle; + eventHandleInt = (Udma_EventHandle) eventHandle; drvHandle = eventHandleInt->drvHandle; if((NULL_PTR == drvHandle) || (drvHandle->drvInitDone != UDMA_INIT_DONE)) { @@ -285,18 +285,18 @@ int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) eventHandleInt->eventInitDone = UDMA_DEINIT_DONE; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; eventHandleInt->pIaVintrRegs = (volatile CSL_intaggr_intrRegs_vint *) NULL_PTR; - eventHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + eventHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; } } } return (retVal); } -uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle) +uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) { uint32_t evtNum = UDMA_EVENT_INVALID; - Udma_DrvHandleInt drvHandle; - Udma_EventHandleInt eventHandleInt = (Udma_EventHandleInt) eventHandle; + Udma_DrvHandle drvHandle; + Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -311,13 +311,13 @@ uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle) return (evtNum); } -int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle) +int32_t Udma_eventDisable(Udma_EventHandle eventHandle) { int32_t retVal = UDMA_EFAIL; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandleInt eventHandleInt = (Udma_EventHandleInt) eventHandle; + Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -343,13 +343,13 @@ int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle) return (retVal); } -int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle) +int32_t Udma_eventEnable(Udma_EventHandle eventHandle) { int32_t retVal = UDMA_EFAIL; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandleInt eventHandleInt = (Udma_EventHandleInt) eventHandle; + Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -375,10 +375,10 @@ int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle) return (retVal); } -Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle) +Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt; + Udma_DrvHandle drvHandleInt; Udma_EventHandle eventHandle = (Udma_EventHandle) NULL_PTR; /* Error check */ @@ -388,7 +388,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle) } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandleInt) drvHandle; + drvHandleInt = (Udma_DrvHandle) drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -430,10 +430,10 @@ static void Udma_eventIsrFxn(void *args) uint32_t vintrBitNum; uint32_t vintrNum; uint32_t teardownStatus; - Udma_EventHandleInt eventHandle = (Udma_EventHandleInt) args; - Udma_DrvHandleInt drvHandle; + Udma_EventHandle eventHandle = (Udma_EventHandle) args; + Udma_DrvHandle drvHandle; Udma_EventPrms *eventPrms; - Udma_RingHandleInt ringHandle; + Udma_RingHandle ringHandle; teardownStatus = UDMA_EVENT_CH_TEARDOWN_STATUS_NA; ringHandle = NULL; @@ -464,7 +464,7 @@ static void Udma_eventIsrFxn(void *args) (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - ringHandle = ((Udma_ChHandleInt) (eventPrms->chHandle))->cqRing; + ringHandle = ((Udma_ChHandle) (eventPrms->chHandle))->cqRing; /* Read the teardown status bit in the Reverse Ring Occupancy register */ if( CSL_lcdma_ringaccIsTeardownComplete(&ringHandle->drvHandle->lcdmaRaRegs, ringHandle->ringNum) == TRUE ) @@ -500,11 +500,11 @@ static void Udma_eventIsrFxn(void *args) return; } -static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_eventCheckParams(Udma_DrvHandle drvHandle, const Udma_EventPrms *eventPrms) { int32_t retVal = UDMA_SOK; - Udma_EventHandleInt controllerEventHandle; + Udma_EventHandle controllerEventHandle; DebugP_assert(eventPrms != NULL_PTR); @@ -529,7 +529,7 @@ static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, * interrupt registered, all slaves should have a callback as IA * is same and there is no individual control to disable * interrupt */ - controllerEventHandle = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; if(((Udma_EventCallback) NULL_PTR != controllerEventHandle->eventPrms.eventCb) && ((Udma_EventCallback) NULL_PTR == eventPrms->eventCb)) { @@ -589,8 +589,8 @@ static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventCheckUnRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; Udma_EventPrms *eventPrms; @@ -629,7 +629,7 @@ static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - ringHandle = ((Udma_ChHandleInt) (eventPrms->chHandle))->cqRing; + ringHandle = ((Udma_ChHandle) (eventPrms->chHandle))->cqRing; } else { @@ -651,14 +651,14 @@ static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; uint32_t vintrNum; uint32_t preferredIrIntrNum; const Udma_EventPrms *eventPrms; - Udma_EventHandleInt lastEvent; + Udma_EventHandle lastEvent; uintptr_t cookie; DebugP_assert(eventHandle != NULL_PTR); @@ -751,12 +751,12 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, cookie = HwiP_disable(); /* Link shared events to master event */ - eventHandle->prevEvent = (Udma_EventHandleInt) NULL_PTR; - eventHandle->nextEvent = (Udma_EventHandleInt) NULL_PTR; + eventHandle->prevEvent = (Udma_EventHandle) NULL_PTR; + eventHandle->nextEvent = (Udma_EventHandle) NULL_PTR; if(NULL_PTR != eventPrms->controllerEventHandle) { /* Go to the last node - insert node at the end */ - lastEvent = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + lastEvent = (Udma_EventHandle) eventPrms->controllerEventHandle; while(NULL_PTR != lastEvent->nextEvent) { /* Move to next node */ @@ -773,9 +773,9 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, { if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { - Udma_ChHandleInt chHandle; + Udma_ChHandle chHandle; DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; if(TRUE == chHandle->chOesAllocDone) { @@ -798,7 +798,7 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, else { /* Use master event's info */ - vintrNum = ((Udma_EventHandleInt) (eventPrms->controllerEventHandle))->vintrNum; + vintrNum = ((Udma_EventHandle) (eventPrms->controllerEventHandle))->vintrNum; } DebugP_assert(drvHandle->iaRegs.pIntrRegs != NULL_PTR); eventHandle->pIaVintrRegs = &drvHandle->iaRegs.pIntrRegs->VINT[vintrNum]; @@ -807,8 +807,8 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, return (retVal); } -static void Udma_eventFreeResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static void Udma_eventFreeResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { uintptr_t cookie; @@ -866,13 +866,13 @@ static void Udma_eventFreeResource(Udma_DrvHandleInt drvHandle, return; } -static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; uint32_t vintrNum, coreIntrNum; - Udma_ChHandleInt chHandle; - Udma_RingHandleInt ringHandle; + Udma_ChHandle chHandle; + Udma_RingHandle ringHandle; Udma_EventPrms *eventPrms; HwiP_Params hwiPrms; struct tisci_msg_rm_irq_set_req rmIrqReq; @@ -914,7 +914,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandleInt) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -940,7 +940,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -983,7 +983,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1017,7 +1017,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandleInt) eventPrms->ringHandle; + ringHandle = (Udma_RingHandle) eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1087,13 +1087,13 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; uint32_t vintrNum; - Udma_ChHandleInt chHandle; - Udma_RingHandleInt ringHandle; + Udma_ChHandle chHandle; + Udma_RingHandle ringHandle; Udma_EventPrms *eventPrms; struct tisci_msg_rm_irq_release_req rmIrqReq; @@ -1132,7 +1132,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandleInt) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -1157,7 +1157,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_PACKET == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -1200,7 +1200,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1234,7 +1234,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandleInt) eventPrms->ringHandle; + ringHandle = (Udma_RingHandle) eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1274,10 +1274,10 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, return (retVal); } -static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static void Udma_eventProgramSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { - Udma_ChHandleInt chHandle; + Udma_ChHandle chHandle; Udma_EventPrms *eventPrms; DebugP_assert(eventHandle != NULL_PTR); @@ -1286,7 +1286,7 @@ static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = TRUE; @@ -1295,10 +1295,10 @@ static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, return; } -static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static void Udma_eventResetSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { - Udma_ChHandleInt chHandle; + Udma_ChHandle chHandle; Udma_EventPrms *eventPrms; DebugP_assert(eventHandle != NULL_PTR); @@ -1307,7 +1307,7 @@ static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = FALSE; diff --git a/source/drivers/udma/v0/udma_flow.c b/source/drivers/udma/v0/udma_flow.c index ee101da6977..8a2da01f8bc 100644 --- a/source/drivers/udma/v0/udma_flow.c +++ b/source/drivers/udma/v0/udma_flow.c @@ -60,7 +60,7 @@ /* ========================================================================== */ #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) -static int32_t Udma_mappedFlowCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_mappedFlowCheckParams(Udma_DrvHandle drvHandle, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms); #endif @@ -74,15 +74,15 @@ static int32_t Udma_mappedFlowCheckParams(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_flowAllocMapped(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms) { int32_t retVal = UDMA_SOK; #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) uint32_t mappedFlowNum = UDMA_FLOW_INVALID; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -132,11 +132,11 @@ int32_t Udma_flowAllocMapped(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) +int32_t Udma_flowFree(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if(NULL_PTR == flowHandleInt) @@ -181,7 +181,7 @@ int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) #endif } - flowHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -192,14 +192,14 @@ int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) return (retVal); } -int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, uint32_t flowStart, uint32_t flowCnt) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -230,15 +230,15 @@ int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_flowAttachMapped(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, uint32_t mappepdFlowNum, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms) { int32_t retVal = UDMA_SOK; #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -276,10 +276,10 @@ int32_t Udma_flowAttachMapped(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) +int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if(NULL_PTR == flowHandleInt) @@ -296,7 +296,7 @@ int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) if(UDMA_SOK == retVal) { - flowHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -307,13 +307,13 @@ int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) return (retVal); } -int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, +int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, uint32_t flowIdx, const Udma_FlowPrms *flowPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; struct tisci_msg_rm_udmap_flow_cfg_req rmFlowReq; struct tisci_msg_rm_udmap_flow_cfg_resp rmFlowResp; struct tisci_msg_rm_udmap_flow_size_thresh_cfg_req rmOptFlowReq; @@ -429,11 +429,11 @@ int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, return (retVal); } -uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle) +uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowNum = UDMA_FLOW_INVALID; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -450,11 +450,11 @@ uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle) return (flowNum); } -uint32_t Udma_flowGetCount(Udma_FlowHandleInt flowHandle) +uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowCnt = UDMA_FLOW_INVALID; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -509,7 +509,7 @@ void UdmaFlowPrms_init(Udma_FlowPrms *flowPrms, uint32_t chType) } #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) -static int32_t Udma_mappedFlowCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_mappedFlowCheckParams(Udma_DrvHandle drvHandle, const Udma_FlowAllocMappedPrms *flowAllocMappedPrms) { int32_t retVal = UDMA_SOK; diff --git a/source/drivers/udma/v0/udma_priv.h b/source/drivers/udma/v0/udma_priv.h index 8f53794f736..48b0ce2817e 100644 --- a/source/drivers/udma/v0/udma_priv.h +++ b/source/drivers/udma/v0/udma_priv.h @@ -61,19 +61,8 @@ #include -#include #include #include -#include - -#if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) -#include -#endif -#if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) -#include -#include -#endif -#include #include @@ -132,17 +121,6 @@ extern "C" { /** \brief Macro used to specify shift value for RX flow threshold before passing to SysFw */ #define UDMA_RFLOW_RX_SIZE_THRESH_VAL_SHIFT ((uint32_t) 0x00000005U) -/** \brief UDMA driver handle */ -typedef struct Udma_DrvObjectInt_t *Udma_DrvHandleInt; -/** \brief UDMA channel handle */ -typedef struct Udma_ChObjectInt_t *Udma_ChHandleInt; -/** \brief UDMA event handle */ -typedef struct Udma_EventObjectInt_t *Udma_EventHandleInt; -/** \brief UDMA ring handle */ -typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; -/** \brief UDMA flow handle */ -typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; - /** \brief Default ring order ID */ #define UDMA_DEFAULT_RING_ORDER_ID (0U) @@ -245,11 +223,11 @@ typedef struct /* ========================================================================== */ /* SOC APIs */ -void Udma_initDrvHandle(Udma_DrvHandleInt drvHandle); +void Udma_initDrvHandle(Udma_DrvHandle drvHandle); int32_t UdmaRmInitPrms_init(uint32_t instId, Udma_RmInitPrms *rmInitPrms); const Udma_RmDefBoardCfgPrms *Udma_rmGetDefBoardCfgPrms(uint32_t instId); #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) -int32_t Udma_getMappedChRingAttributes(Udma_DrvHandleInt drvHandle, +int32_t Udma_getMappedChRingAttributes(Udma_DrvHandle drvHandle, uint32_t mappedGrp, uint32_t chNum, Udma_MappedChRingAttributes *chAttr); @@ -258,101 +236,101 @@ int32_t Udma_getMappedChRingAttributes(Udma_DrvHandleInt drvHandle, #if (UDMA_SOC_CFG_RA_LCDMA_PRESENT == 1) /* LCDMA RA APIs*/ void Udma_lcdmaRingaccMemOps(void *pVirtAddr, uint32_t size, uint32_t opsType); -void Udma_ringHandleClearRegsLcdma(Udma_RingHandleInt ringHandle); -void Udma_ringSetDoorBellLcdma(Udma_RingHandleInt ringHandle, int32_t count); -void Udma_ringPrimeLcdma(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); -void Udma_ringPrimeReadLcdma(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); -void *Udma_ringGetMemPtrLcdma(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetModeLcdma(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetElementCntLcdma(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetForwardRingOccLcdma(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetReverseRingOccLcdma(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetWrIdxLcdma(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetRdIdxLcdma(Udma_RingHandleInt ringHandle); -int32_t Udma_ringDequeueRawLcdma(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +void Udma_ringHandleClearRegsLcdma(Udma_RingHandle ringHandle); +void Udma_ringSetDoorBellLcdma(Udma_RingHandle ringHandle, int32_t count); +void Udma_ringPrimeLcdma(Udma_RingHandle ringHandle, uint64_t phyDescMem); +void Udma_ringPrimeReadLcdma(Udma_RingHandle ringHandle, uint64_t *phyDescMem); +uint8_t *Udma_ringGetMemPtrLcdma(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetModeLcdma(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetElementCntLcdma(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetForwardRingOccLcdma(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetReverseRingOccLcdma(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetWrIdxLcdma(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetRdIdxLcdma(Udma_RingHandle ringHandle); +int32_t Udma_ringDequeueRawLcdma(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint64_t *phyDescMem); -int32_t Udma_ringQueueRawLcdma(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringQueueRawLcdma(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint64_t phyDescMem); -int32_t Udma_ringFlushRawLcdma(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringFlushRawLcdma(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint64_t *phyDescMem); -void Udma_ringSetCfgLcdma(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +void Udma_ringSetCfgLcdma(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, const Udma_RingPrms *ringPrms); #endif /* * RM APIs */ -void Udma_rmInit(Udma_DrvHandleInt drvHandle); -int32_t Udma_rmDeinit(Udma_DrvHandleInt drvHandle); +void Udma_rmInit(Udma_DrvHandle drvHandle); +int32_t Udma_rmDeinit(Udma_DrvHandle drvHandle); /* Channel RM APIs */ -uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); +uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle); #if (UDMA_NUM_MAPPED_TX_GROUP > 0) uint32_t Udma_rmAllocMappedTxCh(uint32_t preferredChNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp); void Udma_rmFreeMappedTxCh(uint32_t chNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp); #endif #if (UDMA_NUM_MAPPED_RX_GROUP > 0) uint32_t Udma_rmAllocMappedRxCh(uint32_t preferredChNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp); void Udma_rmFreeMappedRxCh(uint32_t chNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp); #endif /* Ring RM APIs */ #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) -uint32_t Udma_rmAllocMappedRing(Udma_DrvHandleInt drvHandle, +uint32_t Udma_rmAllocMappedRing(Udma_DrvHandle drvHandle, const uint32_t mappedRingGrp, const uint32_t mappedChNum); void Udma_rmFreeMappedRing(uint32_t ringNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedRingGrp, const uint32_t mappedChNum); #endif -uint16_t Udma_rmAllocFreeRing(Udma_DrvHandleInt drvHandle); -void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandleInt drvHandle); +uint16_t Udma_rmAllocFreeRing(Udma_DrvHandle drvHandle); +void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandle drvHandle); /* Event RM APIs */ -uint32_t Udma_rmAllocEvent(Udma_DrvHandleInt drvHandle); -void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocVintr(Udma_DrvHandleInt drvHandle); -void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocVintrBit(Udma_EventHandleInt eventHandle); +uint32_t Udma_rmAllocEvent(Udma_DrvHandle drvHandle); +void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocVintr(Udma_DrvHandle drvHandle); +void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocVintrBit(Udma_EventHandle eventHandle); void Udma_rmFreeVintrBit(uint32_t vintrBitNum, - Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); + Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); uint32_t Udma_rmAllocIrIntr(uint32_t preferredIrIntrNum, - Udma_DrvHandleInt drvHandle); -void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandleInt drvHandle, uint32_t irIntrNum); -uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandleInt drvHandle, uint32_t coreIntrNum); -void Udma_rmFreeCoreIntr(uint32_t coreIntrNum, Udma_DrvHandleInt drvHandle); + Udma_DrvHandle drvHandle); +void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandle drvHandle, uint32_t irIntrNum); +uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandle drvHandle, uint32_t coreIntrNum); +void Udma_rmFreeCoreIntr(uint32_t coreIntrNum, Udma_DrvHandle drvHandle); /* Query Sciclient_DefaultBoardCfg_rm API */ int32_t Udma_rmGetSciclientDefaultBoardCfgRmRange(const Udma_RmDefBoardCfgPrms *rmDefBoardCfgPrms, @@ -368,11 +346,11 @@ int32_t Udma_rmSetSharedResRmInitPrms(const Udma_RmSharedResPrms *rmSharedResPrm /* Utils APIs */ uint64_t Udma_virtToPhyFxn(const void *virtAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle); + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle); void *Udma_phyToVirtFxn(uint64_t phyAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle); + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle); /* ========================================================================== */ /* Static Function Definitions */ diff --git a/source/drivers/udma/v0/udma_ring_common.c b/source/drivers/udma/v0/udma_ring_common.c index 0e2d2f4e606..a77433fd780 100644 --- a/source/drivers/udma/v0/udma_ring_common.c +++ b/source/drivers/udma/v0/udma_ring_common.c @@ -60,7 +60,7 @@ /* Function Declarations */ /* ========================================================================== */ -static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_ringCheckParams(Udma_DrvHandle drvHandle, const Udma_RingPrms *ringPrms); /* ========================================================================== */ @@ -73,16 +73,16 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint16_t ringNum, const Udma_RingPrms *ringPrms) { int32_t retVal = UDMA_SOK; uint64_t physBase; uint32_t allocDone = (uint32_t) FALSE; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; struct tisci_msg_rm_ring_cfg_req rmRingReq; struct tisci_msg_rm_ring_cfg_resp rmRingResp; @@ -166,7 +166,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, TISCI_MSG_VALUE_RM_RING_ASEL_VALID; rmRingReq.nav_id = drvHandleInt->devIdRing; rmRingReq.index = ringHandleInt->ringNum; - physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, (Udma_ChHandleInt) NULL_PTR); + physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, (Udma_ChHandle) NULL_PTR); rmRingReq.addr_lo = (uint32_t)physBase; rmRingReq.addr_hi = (uint32_t)(physBase >> 32UL); rmRingReq.count = ringPrms->elemCnt; @@ -214,11 +214,11 @@ int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_ringFree(Udma_RingHandleInt ringHandle) +int32_t Udma_ringFree(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -262,19 +262,19 @@ int32_t Udma_ringFree(Udma_RingHandleInt ringHandle) ringHandleInt->ringNum = UDMA_RING_INVALID; ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsLcdma(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; } return (retVal); } -int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint16_t ringNum) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (NULL_PTR == ringHandleInt)) @@ -308,11 +308,11 @@ int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle) +int32_t Udma_ringDetach(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -342,19 +342,19 @@ int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle) DebugP_assert(ringHandleInt->ringNum != UDMA_RING_INVALID); ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsLcdma(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; } return (retVal); } -int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -385,12 +385,12 @@ int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) return (retVal); } -int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -421,11 +421,11 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) return (retVal); } -int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -452,37 +452,37 @@ int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) return (retVal); } -void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) { - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; Udma_ringPrimeLcdma(ringHandleInt, phyDescMem); return; } -void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; Udma_ringPrimeReadLcdma(ringHandleInt, phyDescMem); return; } -void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count) +void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) { - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; Udma_ringSetDoorBellLcdma(ringHandleInt, count); return; } -uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle) +uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) { uint16_t ringNum = UDMA_RING_INVALID; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; if((NULL_PTR != ringHandleInt) && (UDMA_INIT_DONE == ringHandleInt->ringInitDone)) @@ -493,70 +493,70 @@ uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle) return (ringNum); } -void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle) +uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) { - void *ringMem = NULL_PTR; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + uint8_t *ringMem = NULL_PTR; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; ringMem = Udma_ringGetMemPtrLcdma(ringHandleInt); return (ringMem); } -uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) { uint32_t ringMode; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; ringMode = Udma_ringGetModeLcdma(ringHandleInt); return (ringMode); } -uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) { uint32_t size = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; size = Udma_ringGetElementCntLcdma(ringHandleInt); return (size); } -uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; occ = Udma_ringGetForwardRingOccLcdma(ringHandleInt); return (occ); } -uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; occ = Udma_ringGetReverseRingOccLcdma(ringHandleInt); return (occ); } -uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; idx = Udma_ringGetWrIdxLcdma(ringHandleInt); return (idx); } -uint32_t Udma_ringGetRdIdx(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; idx = Udma_ringGetRdIdxLcdma(ringHandleInt); @@ -582,7 +582,7 @@ void UdmaRingPrms_init(Udma_RingPrms *ringPrms) return; } -static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_ringCheckParams(Udma_DrvHandle drvHandle, const Udma_RingPrms *ringPrms) { int32_t retVal = UDMA_SOK; diff --git a/source/drivers/udma/v0/udma_ring_lcdma.c b/source/drivers/udma/v0/udma_ring_lcdma.c index ba28f93d757..f5582296018 100644 --- a/source/drivers/udma/v0/udma_ring_lcdma.c +++ b/source/drivers/udma/v0/udma_ring_lcdma.c @@ -69,8 +69,8 @@ /* Function Definitions */ /* ========================================================================== */ -void Udma_ringSetCfgLcdma(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +void Udma_ringSetCfgLcdma(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, const Udma_RingPrms *ringPrms) { uint32_t addrHi, addrLo /*, elemSize*/; @@ -90,7 +90,7 @@ void Udma_ringSetCfgLcdma(Udma_DrvHandleInt drvHandle, { lcdmaRingCfg->virtBase = (void *) ringPrms->ringMem; lcdmaRingCfg->physBase = - Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, (Udma_ChHandleInt) NULL_PTR); + Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, (Udma_ChHandle) NULL_PTR); lcdmaRingCfg->mode = ringPrms->mode; lcdmaRingCfg->elCnt = ringPrms->elemCnt; /* CSL expects ring size in bytes */ @@ -105,7 +105,7 @@ void Udma_ringSetCfgLcdma(Udma_DrvHandleInt drvHandle, addrLo = CSL_REG32_FEXT(&ringHandle->pLcdmaCfgRegs->BA_LO, LCDMA_RINGACC_RING_CFG_RING_BA_LO_ADDR_LO); lcdmaRingCfg->physBase = (uint64_t)((((uint64_t) addrHi) << 32UL) | ((uint64_t) addrLo)); - lcdmaRingCfg->virtBase = Udma_phyToVirtFxn(lcdmaRingCfg->physBase, drvHandle, (Udma_ChHandleInt) NULL_PTR); + lcdmaRingCfg->virtBase = Udma_phyToVirtFxn(lcdmaRingCfg->physBase, drvHandle, (Udma_ChHandle) NULL_PTR); lcdmaRingCfg->mode = CSL_REG32_FEXT(&ringHandle->pLcdmaCfgRegs->SIZE, LCDMA_RINGACC_RING_CFG_RING_SIZE_QMODE); lcdmaRingCfg->elCnt = CSL_REG32_FEXT(&ringHandle->pLcdmaCfgRegs->SIZE, LCDMA_RINGACC_RING_CFG_RING_SIZE_ELCNT); /* CSL expects ring size in bytes; ring_elsize for AM64x is hardcoded as 1=8bytes*/ @@ -122,13 +122,13 @@ void Udma_ringSetCfgLcdma(Udma_DrvHandleInt drvHandle, return; } -void Udma_ringHandleClearRegsLcdma(Udma_RingHandleInt ringHandle) +void Udma_ringHandleClearRegsLcdma(Udma_RingHandle ringHandle) { ringHandle->pLcdmaCfgRegs = (volatile CSL_lcdma_ringacc_ring_cfgRegs_RING *) NULL_PTR; ringHandle->pLcdmaRtRegs = (volatile CSL_lcdma_ringacc_ringrtRegs_ring *) NULL_PTR; } -int32_t Udma_ringQueueRawLcdma(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +int32_t Udma_ringQueueRawLcdma(Udma_DrvHandle drvHandle, Udma_RingHandle ringHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; @@ -141,7 +141,7 @@ int32_t Udma_ringQueueRawLcdma(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt return (retVal); } -int32_t Udma_ringDequeueRawLcdma(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringDequeueRawLcdma(Udma_DrvHandle drvHandle, Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK, cslRetVal; @@ -158,7 +158,7 @@ int32_t Udma_ringDequeueRawLcdma(Udma_DrvHandleInt drvHandle, Udma_RingHandleIn return (retVal); } -int32_t Udma_ringFlushRawLcdma(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringFlushRawLcdma(Udma_DrvHandle drvHandle, Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK, cslRetVal; uint32_t addrlo; @@ -210,7 +210,7 @@ int32_t Udma_ringFlushRawLcdma(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt r return (retVal); } -void Udma_ringPrimeLcdma(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +void Udma_ringPrimeLcdma(Udma_RingHandle ringHandle, uint64_t phyDescMem) { volatile uint64_t *ringPtr; CSL_LcdmaRingaccRingCfg *pLcdmaRing; @@ -233,7 +233,7 @@ void Udma_ringPrimeLcdma(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) return; } -void Udma_ringPrimeReadLcdma(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +void Udma_ringPrimeReadLcdma(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { volatile uint64_t *ringPtr; CSL_LcdmaRingaccRingCfg *pLcdmaRing; @@ -258,7 +258,7 @@ void Udma_ringPrimeReadLcdma(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem } } -void Udma_ringSetDoorBellLcdma(Udma_RingHandleInt ringHandle, int32_t count) +void Udma_ringSetDoorBellLcdma(Udma_RingHandle ringHandle, int32_t count) { uint32_t regVal; int32_t thisDbRingCnt, maxDbRingCnt; @@ -318,19 +318,19 @@ void Udma_ringSetDoorBellLcdma(Udma_RingHandleInt ringHandle, int32_t count) return; } -void *Udma_ringGetMemPtrLcdma(Udma_RingHandleInt ringHandle) +uint8_t *Udma_ringGetMemPtrLcdma(Udma_RingHandle ringHandle) { - void *ringMem = NULL_PTR; + uint8_t *ringMem = NULL_PTR; if((NULL_PTR != ringHandle) && (UDMA_INIT_DONE == ringHandle->ringInitDone)) { - ringMem = ringHandle->lcdmaCfg.virtBase; + ringMem = (uint8_t*) ringHandle->lcdmaCfg.virtBase; } return (ringMem); } -uint32_t Udma_ringGetModeLcdma(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetModeLcdma(Udma_RingHandle ringHandle) { uint32_t ringMode = CSL_LCDMA_RINGACC_RING_MODE_INVALID; @@ -342,7 +342,7 @@ uint32_t Udma_ringGetModeLcdma(Udma_RingHandleInt ringHandle) return (ringMode); } -uint32_t Udma_ringGetElementCntLcdma(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetElementCntLcdma(Udma_RingHandle ringHandle) { uint32_t size = 0U; @@ -354,7 +354,7 @@ uint32_t Udma_ringGetElementCntLcdma(Udma_RingHandleInt ringHandle) return (size); } -uint32_t Udma_ringGetForwardRingOccLcdma(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetForwardRingOccLcdma(Udma_RingHandle ringHandle) { uint32_t occ = 0U; @@ -370,7 +370,7 @@ uint32_t Udma_ringGetForwardRingOccLcdma(Udma_RingHandleInt ringHandle) return (occ); } -uint32_t Udma_ringGetReverseRingOccLcdma(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetReverseRingOccLcdma(Udma_RingHandle ringHandle) { uint32_t occ = 0U; @@ -386,7 +386,7 @@ uint32_t Udma_ringGetReverseRingOccLcdma(Udma_RingHandleInt ringHandle) return (occ); } -uint32_t Udma_ringGetWrIdxLcdma(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetWrIdxLcdma(Udma_RingHandle ringHandle) { uint32_t idx = 0U; @@ -398,7 +398,7 @@ uint32_t Udma_ringGetWrIdxLcdma(Udma_RingHandleInt ringHandle) return (idx); } -uint32_t Udma_ringGetRdIdxLcdma(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetRdIdxLcdma(Udma_RingHandle ringHandle) { uint32_t idx = 0U; diff --git a/source/drivers/udma/v0/udma_rm.c b/source/drivers/udma/v0/udma_rm.c index 2f1bb35bf09..9153b4ca8b3 100644 --- a/source/drivers/udma/v0/udma_rm.c +++ b/source/drivers/udma/v0/udma_rm.c @@ -60,7 +60,7 @@ /* Function Declarations */ /* ========================================================================== */ -static int32_t Udma_rmCheckResLeak(Udma_DrvHandleInt drvHandle, +static int32_t Udma_rmCheckResLeak(Udma_DrvHandle drvHandle, const uint32_t *allocFlag, uint32_t numRes, uint32_t arrSize); @@ -75,7 +75,7 @@ static int32_t Udma_rmCheckResLeak(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -void Udma_rmInit(Udma_DrvHandleInt drvHandle) +void Udma_rmInit(Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -239,7 +239,7 @@ void Udma_rmInit(Udma_DrvHandleInt drvHandle) return; } -int32_t Udma_rmDeinit(Udma_DrvHandleInt drvHandle) +int32_t Udma_rmDeinit(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -351,7 +351,7 @@ int32_t Udma_rmDeinit(Udma_DrvHandleInt drvHandle) return (retVal); } -uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -401,7 +401,7 @@ uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHan return (chNum); } -void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -423,7 +423,7 @@ void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -473,7 +473,7 @@ uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvH return (chNum); } -void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -495,7 +495,7 @@ void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -545,7 +545,7 @@ uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drv return (chNum); } -void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -567,7 +567,7 @@ void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -617,7 +617,7 @@ uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) return (chNum); } -void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -639,7 +639,7 @@ void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -689,7 +689,7 @@ uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) return (chNum); } -void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -711,7 +711,7 @@ void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -761,7 +761,7 @@ uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle return (chNum); } -void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -783,7 +783,7 @@ void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -833,7 +833,7 @@ uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle return (chNum); } -void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -855,7 +855,7 @@ void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -905,7 +905,7 @@ uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandl return (chNum); } -void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -927,7 +927,7 @@ void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -977,7 +977,7 @@ uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandl return (chNum); } -void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1001,7 +1001,7 @@ void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) #if (UDMA_NUM_MAPPED_TX_GROUP > 0) uint32_t Udma_rmAllocMappedTxCh(uint32_t preferredChNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp) { uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -1055,7 +1055,7 @@ uint32_t Udma_rmAllocMappedTxCh(uint32_t preferredChNum, } void Udma_rmFreeMappedTxCh(uint32_t chNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp) { uint32_t i, offset, bitPos, bitMask; @@ -1081,7 +1081,7 @@ void Udma_rmFreeMappedTxCh(uint32_t chNum, #if (UDMA_NUM_MAPPED_RX_GROUP > 0) uint32_t Udma_rmAllocMappedRxCh(uint32_t preferredChNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp) { uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -1135,7 +1135,7 @@ uint32_t Udma_rmAllocMappedRxCh(uint32_t preferredChNum, } void Udma_rmFreeMappedRxCh(uint32_t chNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedChGrp) { uint32_t i, offset, bitPos, bitMask; @@ -1160,7 +1160,7 @@ void Udma_rmFreeMappedRxCh(uint32_t chNum, #endif #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) -uint32_t Udma_rmAllocMappedRing(Udma_DrvHandleInt drvHandle, +uint32_t Udma_rmAllocMappedRing(Udma_DrvHandle drvHandle, const uint32_t mappedRingGrp, const uint32_t mappedChNum) { @@ -1238,7 +1238,7 @@ uint32_t Udma_rmAllocMappedRing(Udma_DrvHandleInt drvHandle, } void Udma_rmFreeMappedRing(uint32_t ringNum, - Udma_DrvHandleInt drvHandle, + Udma_DrvHandle drvHandle, const uint32_t mappedRingGrp, const uint32_t mappedChNum) { @@ -1275,19 +1275,19 @@ void Udma_rmFreeMappedRing(uint32_t ringNum, } #endif -uint16_t Udma_rmAllocFreeRing(Udma_DrvHandleInt drvHandle) +uint16_t Udma_rmAllocFreeRing(Udma_DrvHandle drvHandle) { uint16_t ringNum = UDMA_RING_INVALID; return (ringNum); } -void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandle drvHandle) { return; } -uint32_t Udma_rmAllocEvent(Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocEvent(Udma_DrvHandle drvHandle) { uint32_t globalEvent = UDMA_EVENT_INVALID; uint32_t i, offset, bitPos, bitMask; @@ -1314,7 +1314,7 @@ uint32_t Udma_rmAllocEvent(Udma_DrvHandleInt drvHandle) return (globalEvent); } -void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1337,7 +1337,7 @@ void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocVintr(Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocVintr(Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t vintrNum = UDMA_EVENT_INVALID; @@ -1364,7 +1364,7 @@ uint32_t Udma_rmAllocVintr(Udma_DrvHandleInt drvHandle) return (vintrNum); } -void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1387,21 +1387,21 @@ void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocVintrBit(Udma_EventHandleInt eventHandle) +uint32_t Udma_rmAllocVintrBit(Udma_EventHandle eventHandle) { uint32_t i; uint32_t vintrBitNum = UDMA_EVENT_INVALID; uint64_t bitMask; - Udma_EventHandleInt controllerEventHandle; + Udma_EventHandle controllerEventHandle; const Udma_EventPrms *eventPrms; - Udma_DrvHandleInt drvHandle = eventHandle->drvHandle; + Udma_DrvHandle drvHandle = eventHandle->drvHandle; controllerEventHandle = eventHandle; eventPrms = &eventHandle->eventPrms; if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); @@ -1423,11 +1423,11 @@ uint32_t Udma_rmAllocVintrBit(Udma_EventHandleInt eventHandle) } void Udma_rmFreeVintrBit(uint32_t vintrBitNum, - Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) + Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { uint64_t bitMask; - Udma_EventHandleInt controllerEventHandle; + Udma_EventHandle controllerEventHandle; const Udma_EventPrms *eventPrms; controllerEventHandle = eventHandle; @@ -1435,7 +1435,7 @@ void Udma_rmFreeVintrBit(uint32_t vintrBitNum, if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); @@ -1451,7 +1451,7 @@ void Udma_rmFreeVintrBit(uint32_t vintrBitNum, } uint32_t Udma_rmAllocIrIntr(uint32_t preferredIrIntrNum, - Udma_DrvHandleInt drvHandle) + Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t irIntrNum = UDMA_INTR_INVALID; @@ -1501,7 +1501,7 @@ uint32_t Udma_rmAllocIrIntr(uint32_t preferredIrIntrNum, return (irIntrNum); } -void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1524,7 +1524,7 @@ void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandleInt drvHandle, uint32_t irIntrNum) +uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandle drvHandle, uint32_t irIntrNum) { uint32_t coreIntrNum = UDMA_INTR_INVALID; @@ -1538,7 +1538,7 @@ uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandleInt drvHandle, uint32_t irIntrNu return (coreIntrNum); } -uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandleInt drvHandle, uint32_t coreIntrNum) +uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandle drvHandle, uint32_t coreIntrNum) { uint32_t irIntrNum = UDMA_INTR_INVALID; @@ -1715,7 +1715,7 @@ int32_t Udma_rmSetSharedResRmInitPrms(const Udma_RmSharedResPrms *rmSharedResPrm return (retVal); } -static int32_t Udma_rmCheckResLeak(Udma_DrvHandleInt drvHandle, +static int32_t Udma_rmCheckResLeak(Udma_DrvHandle drvHandle, const uint32_t *allocFlag, uint32_t numRes, uint32_t arrSize) diff --git a/source/drivers/udma/v0/udma_utils.c b/source/drivers/udma/v0/udma_utils.c index 0cf560d992d..7a689b3c80a 100644 --- a/source/drivers/udma/v0/udma_utils.c +++ b/source/drivers/udma/v0/udma_utils.c @@ -192,8 +192,8 @@ uint32_t UdmaUtils_getTrSizeBytes(uint32_t trType) } uint64_t Udma_virtToPhyFxn(const void *virtAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle) + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle) { uint32_t chNum = UDMA_DMA_CH_INVALID; void *appData = NULL_PTR; @@ -218,8 +218,8 @@ uint64_t Udma_virtToPhyFxn(const void *virtAddr, } void *Udma_phyToVirtFxn(uint64_t phyAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle) + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle) { uint32_t chNum = UDMA_DMA_CH_INVALID; void *appData = NULL_PTR; diff --git a/source/drivers/udma/v1/udma.c b/source/drivers/udma/v1/udma.c index 861d69c31a9..4e7f13ede12 100644 --- a/source/drivers/udma/v1/udma.c +++ b/source/drivers/udma/v1/udma.c @@ -74,7 +74,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt; + Udma_DrvHandle drvHandleInt; struct tisci_msg_rm_proxy_cfg_req req; /* Structure size assert */ @@ -91,7 +91,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandleInt) drvHandle; + drvHandleInt = (Udma_DrvHandle) drvHandle; (void) memset(drvHandleInt, 0, sizeof(*drvHandleInt)); (void) memcpy(&drvHandleInt->initPrms, initPrms, sizeof(Udma_InitPrms)); UdmaRmInitPrms_init(initPrms->instId, &drvHandleInt->rmInitPrms); @@ -148,7 +148,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) int32_t Udma_deinit(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (drvHandleInt->drvInitDone != UDMA_INIT_DONE)) @@ -165,7 +165,7 @@ int32_t Udma_deinit(Udma_DrvHandle drvHandle) { DebugP_logError("[UDMA] Global event free failed!!!\r\n"); } - drvHandleInt->globalEventHandle = (Udma_EventHandleInt) NULL_PTR; + drvHandleInt->globalEventHandle = (Udma_EventHandle) NULL_PTR; } retVal += Udma_rmDeinit(drvHandleInt); diff --git a/source/drivers/udma/v1/udma_ch.c b/source/drivers/udma/v1/udma_ch.c index 9b292688f1c..5a42464bc22 100644 --- a/source/drivers/udma/v1/udma_ch.c +++ b/source/drivers/udma/v1/udma_ch.c @@ -80,28 +80,28 @@ /* Function Declarations */ /* ========================================================================== */ -static void Udma_chAssignRegOverlay(Udma_DrvHandleInt drvHandle, Udma_ChHandleInt chHandle); -static void Udma_chInitRegs(Udma_ChHandleInt chHandle); -static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, uint32_t chType); -static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, uint32_t chType); -static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum); -static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum); -static int32_t Udma_chCheckParams(Udma_DrvHandleInt drvHandle, +static void Udma_chAssignRegOverlay(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle); +static void Udma_chInitRegs(Udma_ChHandle chHandle); +static void Udma_chPauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum, uint32_t chType); +static void Udma_chUnpauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum, uint32_t chType); +static void Udma_chPauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum); +static void Udma_chUnpauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum); +static int32_t Udma_chCheckParams(Udma_DrvHandle drvHandle, uint32_t chType, const Udma_ChPrms *chPrms); -static void Udma_chSetPeerReg(Udma_DrvHandleInt drvHandle, +static void Udma_chSetPeerReg(Udma_DrvHandle drvHandle, const Udma_ChPdmaPrms *pdmaPrms, volatile uint32_t *PEER8, volatile uint32_t *PEER1, volatile uint32_t *PEER0); -static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle); -static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle); -static int32_t Udma_chPair(Udma_ChHandleInt chHandle); -static int32_t Udma_chUnpair(Udma_ChHandleInt chHandle); -static void Udma_chEnableLocal(Udma_ChHandleInt chHandle); -static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t timeout); -static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout); -static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout); +static int32_t Udma_chAllocResource(Udma_ChHandle chHandle); +static int32_t Udma_chFreeResource(Udma_ChHandle chHandle); +static int32_t Udma_chPair(Udma_ChHandle chHandle); +static int32_t Udma_chUnpair(Udma_ChHandle chHandle); +static void Udma_chEnableLocal(Udma_ChHandle chHandle); +static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandle chHandle, uint32_t timeout); +static int32_t Udma_chDisableTxChan(Udma_ChHandle chHandle, uint32_t timeout); +static int32_t Udma_chDisableRxChan(Udma_ChHandle chHandle, uint32_t timeout); /* ========================================================================== */ /* Global Variables */ /* ========================================================================== */ @@ -112,15 +112,15 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle, +int32_t Udma_chOpen(Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle, uint32_t chType, const Udma_ChPrms *chPrms) { int32_t retVal = UDMA_SOK, tempRetVal; uint32_t allocDone = (uint32_t) FALSE; - Udma_ChHandleInt chHandleInt; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; + Udma_ChHandle chHandleInt; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; /* Error check */ if((drvHandleInt == NULL_PTR) || (NULL_PTR == chHandle) || (NULL_PTR == chPrms)) @@ -143,7 +143,7 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - chHandleInt = (Udma_ChHandleInt) chHandle; + chHandleInt = (Udma_ChHandle) chHandle; (void) memset(chHandleInt, 0, sizeof(Udma_ChObject)); (void) memcpy(&chHandleInt->chPrms, chPrms, sizeof(Udma_ChPrms)); chHandleInt->chType = chType; @@ -153,9 +153,9 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, chHandleInt->extChNum = UDMA_DMA_CH_INVALID; chHandleInt->pdmaChNum = UDMA_DMA_CH_INVALID; chHandleInt->peerThreadId = UDMA_THREAD_ID_INVALID; - chHandleInt->fqRing = (Udma_RingHandleInt) NULL_PTR; - chHandleInt->cqRing = (Udma_RingHandleInt) NULL_PTR; - chHandleInt->tdCqRing = (Udma_RingHandleInt) NULL_PTR; + chHandleInt->fqRing = (Udma_RingHandle) NULL_PTR; + chHandleInt->cqRing = (Udma_RingHandle) NULL_PTR; + chHandleInt->tdCqRing = (Udma_RingHandle) NULL_PTR; UdmaChTxPrms_init(&chHandleInt->txPrms, chType); UdmaChRxPrms_init(&chHandleInt->rxPrms, chType); Udma_chInitRegs(chHandleInt); @@ -207,11 +207,11 @@ int32_t Udma_chOpen(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_chClose(Udma_ChHandleInt chHandle) +int32_t Udma_chClose(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -258,11 +258,11 @@ int32_t Udma_chClose(Udma_ChHandleInt chHandle) return (retVal); } -int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms) +int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; struct tisci_msg_rm_udmap_tx_ch_cfg_req rmUdmaTxReq; struct tisci_msg_rm_udmap_tx_ch_cfg_resp rmUdmaTxResp; @@ -347,11 +347,11 @@ int32_t Udma_chConfigTx(Udma_ChHandleInt chHandle, const Udma_ChTxPrms *txPrms) return (retVal); } -int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms) +int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; struct tisci_msg_rm_udmap_rx_ch_cfg_req rmUdmaRxReq; struct tisci_msg_rm_udmap_rx_ch_cfg_resp rmUdmaRxResp; Udma_FlowPrms flowPrms; @@ -496,13 +496,13 @@ int32_t Udma_chConfigRx(Udma_ChHandleInt chHandle, const Udma_ChRxPrms *rxPrms) return (retVal); } -int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, +int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, const Udma_ChPdmaPrms *pdmaPrms) { int32_t retVal = UDMA_SOK; volatile uint32_t *PEER8=NULL, *PEER0=NULL, *PEER1=NULL; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -548,11 +548,11 @@ int32_t Udma_chConfigPdma(Udma_ChHandleInt chHandle, return (retVal); } -int32_t Udma_chEnable(Udma_ChHandleInt chHandle) +int32_t Udma_chEnable(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -577,11 +577,11 @@ int32_t Udma_chEnable(Udma_ChHandleInt chHandle) return (retVal); } -int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout) +int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -620,11 +620,11 @@ int32_t Udma_chDisable(Udma_ChHandleInt chHandle, uint32_t timeout) return (retVal); } -int32_t Udma_chPause(Udma_ChHandleInt chHandle) +int32_t Udma_chPause(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -667,11 +667,11 @@ int32_t Udma_chPause(Udma_ChHandleInt chHandle) return (retVal); } -int32_t Udma_chResume(Udma_ChHandleInt chHandle) +int32_t Udma_chResume(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -713,12 +713,12 @@ int32_t Udma_chResume(Udma_ChHandleInt chHandle) return (retVal); } -uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle) +uint32_t Udma_chGetNum(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; uint32_t chNum = UDMA_DMA_CH_INVALID; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -751,12 +751,12 @@ uint32_t Udma_chGetNum(Udma_ChHandleInt chHandle) return (chNum); } -Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle) +Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle fqRing = (Udma_RingHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -780,12 +780,12 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandleInt chHandle) return (fqRing); } -Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle) +Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle cqRing = (Udma_RingHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -809,12 +809,12 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandleInt chHandle) return (cqRing); } -Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle) +Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_RingHandle tdCqRing = (Udma_RingHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -838,7 +838,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandleInt chHandle) return (tdCqRing); } -uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle) +uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -852,7 +852,7 @@ uint16_t Udma_chGetFqRingNum(Udma_ChHandleInt chHandle) return (ringNum); } -uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle) +uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) { uint16_t ringNum = UDMA_RING_INVALID; Udma_RingHandle ringHandle; @@ -866,12 +866,12 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandleInt chHandle) return (ringNum); } -Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle) +Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_FlowHandle defaultFlow = (Udma_FlowHandle) NULL_PTR; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -895,12 +895,12 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandleInt chHandle) return (defaultFlow); } -int32_t Udma_chDequeueTdResponse(Udma_ChHandleInt chHandle, +int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, CSL_UdmapTdResponse *tdResponse) { int32_t retVal = UDMA_SOK, cslRetVal; uint64_t response; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; if((NULL_PTR != chHandleInt->tdCqRing) && (chHandleInt->tdCqRing->ringNum != UDMA_RING_INVALID) && @@ -929,12 +929,12 @@ int32_t Udma_chDequeueTdResponse(Udma_ChHandleInt chHandle, return (retVal); } -uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger) +uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; uint32_t triggerEvent = UDMA_EVENT_INVALID; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -996,11 +996,11 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandleInt chHandle, uint32_t trigger) return (triggerEvent); } -uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle) +uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1042,11 +1042,11 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandleInt chHandle) return (pSwTriggerReg); } -int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger) +int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1082,14 +1082,14 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandleInt chHandle, uint32_t trigger) return (retVal); } -int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, - Udma_ChHandleInt chainedChHandle, +int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, + Udma_ChHandle chainedChHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt triggerChHandleInt = (Udma_ChHandleInt) triggerChHandle; - Udma_ChHandleInt chainedChHandleInt = (Udma_ChHandleInt) chainedChHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; + Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_set_req rmIrqReq; struct tisci_msg_rm_irq_set_resp rmIrqResp; @@ -1206,13 +1206,13 @@ int32_t Udma_chSetChaining(Udma_ChHandleInt triggerChHandle, return (retVal); } -int32_t Udma_chBreakChaining(Udma_ChHandleInt triggerChHandle, - Udma_ChHandleInt chainedChHandle) +int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, + Udma_ChHandle chainedChHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt triggerChHandleInt = (Udma_ChHandleInt) triggerChHandle; - Udma_ChHandleInt chainedChHandleInt = (Udma_ChHandleInt) chainedChHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; + Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_release_req rmIrqReq; @@ -1440,11 +1440,11 @@ void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms) return; } -int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats) +int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; uint32_t chNum; CSL_UdmapChanStats udmapChanStats; CSL_UdmapChanDir udmapChDir; @@ -1500,11 +1500,11 @@ int32_t Udma_chGetStats(Udma_ChHandleInt chHandle, Udma_ChStats *chStats) return (retVal); } -int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData) +int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1525,11 +1525,11 @@ int32_t Udma_getPeerData(Udma_ChHandleInt chHandle, uint32_t *peerData) return (retVal); } -int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData) +int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_ChHandleInt chHandleInt = (Udma_ChHandleInt) chHandle; + Udma_DrvHandle drvHandle; + Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1550,7 +1550,7 @@ int32_t Udma_clearPeerData(Udma_ChHandleInt chHandle, uint32_t peerData) return (retVal); } -static int32_t Udma_chCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_chCheckParams(Udma_DrvHandle drvHandle, uint32_t chType, const Udma_ChPrms *chPrms) { @@ -1577,10 +1577,10 @@ static int32_t Udma_chCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) +static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK, tempRetVal; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; uint16_t ringNum = UDMA_RING_INVALID; drvHandle = chHandle->drvHandle; @@ -1740,7 +1740,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) &chHandle->chPrms.fqRingPrms); if(UDMA_SOK != retVal) { - chHandle->fqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->fqRing = (Udma_RingHandle) NULL_PTR; DebugP_logError("[UDMA] FQ ring alloc failed!!!\r\n"); } else if(((chHandle->chType & UDMA_CH_FLAG_MAPPED) == UDMA_CH_FLAG_MAPPED) && @@ -1768,7 +1768,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) &chHandle->chPrms.cqRingPrms); if(UDMA_SOK != retVal) { - chHandle->cqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->cqRing = (Udma_RingHandle) NULL_PTR; DebugP_logError("[UDMA] CQ ring alloc failed!!!\r\n"); } } @@ -1787,7 +1787,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) &chHandle->chPrms.tdCqRingPrms); if(UDMA_SOK != retVal) { - chHandle->tdCqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; DebugP_logError("[UDMA] TD CQ ring alloc failed!!!\r\n"); } } @@ -1810,10 +1810,10 @@ static int32_t Udma_chAllocResource(Udma_ChHandleInt chHandle) return (retVal); } -static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) +static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; drvHandle = chHandle->drvHandle; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) @@ -1874,11 +1874,11 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) chHandle->rxChNum = UDMA_DMA_CH_INVALID; } - chHandle->defaultFlowObj.drvHandle = (Udma_DrvHandleInt) NULL_PTR; + chHandle->defaultFlowObj.drvHandle = (Udma_DrvHandle) NULL_PTR; chHandle->defaultFlowObj.flowStart = UDMA_FLOW_INVALID; chHandle->defaultFlowObj.flowCnt = 0U; chHandle->defaultFlowObj.flowInitDone = UDMA_DEINIT_DONE; - chHandle->defaultFlow = (Udma_FlowHandleInt) NULL_PTR; + chHandle->defaultFlow = (Udma_FlowHandle) NULL_PTR; } chHandle->pdmaChNum = UDMA_DMA_CH_INVALID; chHandle->peerThreadId = UDMA_THREAD_ID_INVALID; @@ -1890,7 +1890,7 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) { DebugP_logError("[UDMA] RM Free FQ ring failed!!!\r\n"); } - chHandle->fqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->fqRing = (Udma_RingHandle) NULL_PTR; } if(NULL_PTR != chHandle->cqRing) { @@ -1899,7 +1899,7 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) { DebugP_logError("[UDMA] RM Free CQ ring failed!!!\r\n"); } - chHandle->cqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->cqRing = (Udma_RingHandle) NULL_PTR; } if(NULL_PTR != chHandle->tdCqRing) { @@ -1908,16 +1908,16 @@ static int32_t Udma_chFreeResource(Udma_ChHandleInt chHandle) { DebugP_logError("[UDMA] RM Free TDCQ ring failed!!!\r\n"); } - chHandle->tdCqRing = (Udma_RingHandleInt) NULL_PTR; + chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; } return (retVal); } -static int32_t Udma_chPair(Udma_ChHandleInt chHandle) +static int32_t Udma_chPair(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; struct tisci_msg_rm_psil_pair_req rmPairReq; drvHandle = chHandle->drvHandle; @@ -1959,10 +1959,10 @@ static int32_t Udma_chPair(Udma_ChHandleInt chHandle) return (retVal); } -static int32_t Udma_chUnpair(Udma_ChHandleInt chHandle) +static int32_t Udma_chUnpair(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; struct tisci_msg_rm_psil_unpair_req rmUnpairReq; drvHandle = chHandle->drvHandle; @@ -2004,10 +2004,10 @@ static int32_t Udma_chUnpair(Udma_ChHandleInt chHandle) return (retVal); } -static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) +static void Udma_chEnableLocal(Udma_ChHandle chHandle) { uint32_t regVal; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; drvHandle = chHandle->drvHandle; CSL_UdmapRT udmapRtEnable; @@ -2056,11 +2056,11 @@ static void Udma_chEnableLocal(Udma_ChHandleInt chHandle) return; } -static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t timeout) +static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; uint32_t currTimeout = 0U; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; CSL_UdmapRT udmapRtStatus; drvHandle = chHandle->drvHandle; @@ -2155,11 +2155,11 @@ static int32_t Udma_chDisableBlkCpyChan(Udma_ChHandleInt chHandle, uint32_t time return (retVal); } -static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) +static int32_t Udma_chDisableTxChan(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; uint32_t peerRtEnable = 0U, currTimeout = 0U; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; CSL_UdmapRT udmapRtStatus; uint32_t rtEnableRegOffset; @@ -2287,11 +2287,11 @@ static int32_t Udma_chDisableTxChan(Udma_ChHandleInt chHandle, uint32_t timeout) return (retVal); } -static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) +static int32_t Udma_chDisableRxChan(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; uint32_t currTimeout = 0U, regVal; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; CSL_UdmapRT udmapRtStatus; uint32_t peerRtEnable = 0U, peerRtEnableBit = 0U; uint32_t rtEnableRegOffset; @@ -2398,7 +2398,7 @@ static int32_t Udma_chDisableRxChan(Udma_ChHandleInt chHandle, uint32_t timeout) return (retVal); } -static void Udma_chAssignRegOverlay(Udma_DrvHandleInt drvHandle, Udma_ChHandleInt chHandle) +static void Udma_chAssignRegOverlay(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle) { if(UDMA_INST_TYPE_NORMAL == drvHandle->instType) { @@ -2446,7 +2446,7 @@ static void Udma_chAssignRegOverlay(Udma_DrvHandleInt drvHandle, Udma_ChHandleIn } } -static void Udma_chInitRegs(Udma_ChHandleInt chHandle) +static void Udma_chInitRegs(Udma_ChHandle chHandle) { chHandle->pTxCfgRegs = (volatile CSL_udmap_txccfgRegs_chan *) NULL_PTR; chHandle->pTxRtRegs = (volatile CSL_udmap_txcrtRegs_chan *) NULL_PTR; @@ -2457,7 +2457,7 @@ static void Udma_chInitRegs(Udma_ChHandleInt chHandle) } -static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum,uint32_t chType) +static void Udma_chPauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum,uint32_t chType) { if(UDMA_INST_TYPE_NORMAL == drvHandle->instType) { @@ -2465,7 +2465,7 @@ static void Udma_chPauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum,ui } } -static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, uint32_t chType) +static void Udma_chUnpauseTxLocal(Udma_DrvHandle drvHandle, uint32_t txChNum, uint32_t chType) { if(UDMA_INST_TYPE_NORMAL == drvHandle->instType) { @@ -2473,7 +2473,7 @@ static void Udma_chUnpauseTxLocal(Udma_DrvHandleInt drvHandle, uint32_t txChNum, } } -static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) +static void Udma_chPauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum) { if(UDMA_INST_TYPE_NORMAL == drvHandle->instType) { @@ -2481,7 +2481,7 @@ static void Udma_chPauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) } } -static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) +static void Udma_chUnpauseRxLocal(Udma_DrvHandle drvHandle, uint32_t rxChNum) { if(UDMA_INST_TYPE_NORMAL == drvHandle->instType) { @@ -2489,7 +2489,7 @@ static void Udma_chUnpauseRxLocal(Udma_DrvHandleInt drvHandle, uint32_t rxChNum) } } -static void Udma_chSetPeerReg(Udma_DrvHandleInt drvHandle, +static void Udma_chSetPeerReg(Udma_DrvHandle drvHandle, const Udma_ChPdmaPrms *pdmaPrms, volatile uint32_t *PEER8, volatile uint32_t *PEER1, diff --git a/source/drivers/udma/v1/udma_event.c b/source/drivers/udma/v1/udma_event.c index 47653c8083a..bd12011e54e 100644 --- a/source/drivers/udma/v1/udma_event.c +++ b/source/drivers/udma/v1/udma_event.c @@ -60,22 +60,22 @@ /* ========================================================================== */ static void Udma_eventIsrFxn(void *args); -static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_eventCheckParams(Udma_DrvHandle drvHandle, const Udma_EventPrms *eventPrms); -static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static void Udma_eventFreeResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); -static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); +static int32_t Udma_eventCheckUnRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static void Udma_eventFreeResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static void Udma_eventProgramSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); +static void Udma_eventResetSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); /* ========================================================================== */ /* Global Variables */ @@ -87,14 +87,14 @@ static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle, +int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle, Udma_EventPrms *eventPrms) { int32_t retVal = UDMA_SOK; uint32_t allocDone = (uint32_t) FALSE; - Udma_DrvHandleInt drvHandleInt; - Udma_EventHandleInt eventHandleInt; + Udma_DrvHandle drvHandleInt; + Udma_EventHandle eventHandleInt; /* Error check */ if((NULL_PTR == drvHandle) || (NULL_PTR == eventHandle) || (NULL_PTR == eventPrms)) @@ -103,7 +103,7 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandleInt) drvHandle; + drvHandleInt = (Udma_DrvHandle) drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -118,7 +118,7 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - eventHandleInt = (Udma_EventHandleInt) eventHandle; + eventHandleInt = (Udma_EventHandle) eventHandle; (void) memcpy( &eventHandleInt->eventPrms, eventPrms, sizeof(eventHandleInt->eventPrms)); eventHandleInt->drvHandle = drvHandleInt; @@ -127,8 +127,8 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, eventHandleInt->vintrBitNum = UDMA_EVENT_INVALID; eventHandleInt->irIntrNum = UDMA_INTR_INVALID; eventHandleInt->coreIntrNum = UDMA_INTR_INVALID; - eventHandleInt->nextEvent = (Udma_EventHandleInt) NULL_PTR; - eventHandleInt->prevEvent = (Udma_EventHandleInt) NULL_PTR; + eventHandleInt->nextEvent = (Udma_EventHandle) NULL_PTR; + eventHandleInt->prevEvent = (Udma_EventHandle) NULL_PTR; eventHandleInt->hwiHandle = NULL_PTR; eventHandleInt->vintrBitAllocFlag = 0U; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; @@ -215,9 +215,9 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, /* Copy core number from master handle */ /* Copy from master handle */ eventPrms->vintrNum = - ((Udma_EventHandleInt) (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; + ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; eventPrms->coreIntrNum = - ((Udma_EventHandleInt) (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; + ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; } /* Copy the same info to eventHandleInt->eventPrms*/ eventHandleInt->eventPrms.intrStatusReg = eventPrms->intrStatusReg; @@ -231,11 +231,11 @@ int32_t Udma_eventRegister(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) +int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_EventHandleInt eventHandleInt; + Udma_DrvHandle drvHandle; + Udma_EventHandle eventHandleInt; /* Error check */ if(NULL_PTR == eventHandle) @@ -244,7 +244,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) } if(UDMA_SOK == retVal) { - eventHandleInt = (Udma_EventHandleInt) eventHandle; + eventHandleInt = (Udma_EventHandle) eventHandle; drvHandle = eventHandleInt->drvHandle; if((NULL_PTR == drvHandle) || (drvHandle->drvInitDone != UDMA_INIT_DONE)) { @@ -285,18 +285,18 @@ int32_t Udma_eventUnRegister(Udma_EventHandleInt eventHandle) eventHandleInt->eventInitDone = UDMA_DEINIT_DONE; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; eventHandleInt->pIaVintrRegs = (volatile CSL_intaggr_intrRegs_vint *) NULL_PTR; - eventHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + eventHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; } } } return (retVal); } -uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle) +uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) { uint32_t evtNum = UDMA_EVENT_INVALID; - Udma_DrvHandleInt drvHandle; - Udma_EventHandleInt eventHandleInt = (Udma_EventHandleInt) eventHandle; + Udma_DrvHandle drvHandle; + Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -311,13 +311,13 @@ uint32_t Udma_eventGetId(Udma_EventHandleInt eventHandle) return (evtNum); } -int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle) +int32_t Udma_eventDisable(Udma_EventHandle eventHandle) { int32_t retVal = UDMA_EFAIL; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandleInt eventHandleInt = (Udma_EventHandleInt) eventHandle; + Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -343,13 +343,13 @@ int32_t Udma_eventDisable(Udma_EventHandleInt eventHandle) return (retVal); } -int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle) +int32_t Udma_eventEnable(Udma_EventHandle eventHandle) { int32_t retVal = UDMA_EFAIL; - Udma_DrvHandleInt drvHandle; + Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandleInt eventHandleInt = (Udma_EventHandleInt) eventHandle; + Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -375,10 +375,10 @@ int32_t Udma_eventEnable(Udma_EventHandleInt eventHandle) return (retVal); } -Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle) +Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt; + Udma_DrvHandle drvHandleInt; Udma_EventHandle eventHandle = (Udma_EventHandle) NULL_PTR; /* Error check */ @@ -388,7 +388,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandleInt drvHandle) } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandleInt) drvHandle; + drvHandleInt = (Udma_DrvHandle) drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -431,8 +431,8 @@ static void Udma_eventIsrFxn(void *args) uint32_t vintrBitNum; uint32_t vintrNum; uint32_t teardownStatus; - Udma_EventHandleInt eventHandle = (Udma_EventHandleInt) args; - Udma_DrvHandleInt drvHandle; + Udma_EventHandle eventHandle = (Udma_EventHandle) args; + Udma_DrvHandle drvHandle; Udma_EventPrms *eventPrms; teardownStatus = UDMA_EVENT_CH_TEARDOWN_STATUS_NA; @@ -482,11 +482,11 @@ static void Udma_eventIsrFxn(void *args) return; } -static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_eventCheckParams(Udma_DrvHandle drvHandle, const Udma_EventPrms *eventPrms) { int32_t retVal = UDMA_SOK; - Udma_EventHandleInt controllerEventHandle; + Udma_EventHandle controllerEventHandle; DebugP_assert(eventPrms != NULL_PTR); @@ -511,7 +511,7 @@ static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, * interrupt registered, all slaves should have a callback as IA * is same and there is no individual control to disable * interrupt */ - controllerEventHandle = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; if(((Udma_EventCallback) NULL_PTR != controllerEventHandle->eventPrms.eventCb) && ((Udma_EventCallback) NULL_PTR == eventPrms->eventCb)) { @@ -571,8 +571,8 @@ static int32_t Udma_eventCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventCheckUnRegister(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; Udma_EventPrms *eventPrms; @@ -611,7 +611,7 @@ static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - ringHandle = ((Udma_ChHandleInt) (eventPrms->chHandle))->cqRing; + ringHandle = ((Udma_ChHandle) (eventPrms->chHandle))->cqRing; } else { @@ -633,14 +633,14 @@ static int32_t Udma_eventCheckUnRegister(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; uint32_t vintrNum; uint32_t preferredIrIntrNum; const Udma_EventPrms *eventPrms; - Udma_EventHandleInt lastEvent; + Udma_EventHandle lastEvent; uintptr_t cookie; DebugP_assert(eventHandle != NULL_PTR); @@ -733,12 +733,12 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, cookie = HwiP_disable(); /* Link shared events to master event */ - eventHandle->prevEvent = (Udma_EventHandleInt) NULL_PTR; - eventHandle->nextEvent = (Udma_EventHandleInt) NULL_PTR; + eventHandle->prevEvent = (Udma_EventHandle) NULL_PTR; + eventHandle->nextEvent = (Udma_EventHandle) NULL_PTR; if(NULL_PTR != eventPrms->controllerEventHandle) { /* Go to the last node - insert node at the end */ - lastEvent = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + lastEvent = (Udma_EventHandle) eventPrms->controllerEventHandle; while(NULL_PTR != lastEvent->nextEvent) { /* Move to next node */ @@ -755,9 +755,9 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, { if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { - Udma_ChHandleInt chHandle; + Udma_ChHandle chHandle; DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; if(TRUE == chHandle->chOesAllocDone) { @@ -780,7 +780,7 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, else { /* Use master event's info */ - vintrNum = ((Udma_EventHandleInt) (eventPrms->controllerEventHandle))->vintrNum; + vintrNum = ((Udma_EventHandle) (eventPrms->controllerEventHandle))->vintrNum; } DebugP_assert(drvHandle->iaRegs.pIntrRegs != NULL_PTR); eventHandle->pIaVintrRegs = &drvHandle->iaRegs.pIntrRegs->VINT[vintrNum]; @@ -789,8 +789,8 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandleInt drvHandle, return (retVal); } -static void Udma_eventFreeResource(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static void Udma_eventFreeResource(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { uintptr_t cookie; @@ -848,13 +848,13 @@ static void Udma_eventFreeResource(Udma_DrvHandleInt drvHandle, return; } -static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; uint32_t vintrNum, coreIntrNum; - Udma_ChHandleInt chHandle; - Udma_RingHandleInt ringHandle; + Udma_ChHandle chHandle; + Udma_RingHandle ringHandle; Udma_RingMonHandle monHandle; Udma_EventPrms *eventPrms; HwiP_Params hwiPrms; @@ -897,7 +897,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandleInt) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -923,7 +923,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -966,7 +966,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1000,7 +1000,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandleInt) eventPrms->ringHandle; + ringHandle = (Udma_RingHandle) eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1077,13 +1077,13 @@ static int32_t Udma_eventConfig(Udma_DrvHandleInt drvHandle, return (retVal); } -static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { int32_t retVal = UDMA_SOK; uint32_t vintrNum; - Udma_ChHandleInt chHandle; - Udma_RingHandleInt ringHandle; + Udma_ChHandle chHandle; + Udma_RingHandle ringHandle; Udma_RingMonHandle monHandle; Udma_EventPrms *eventPrms; struct tisci_msg_rm_irq_release_req rmIrqReq; @@ -1123,7 +1123,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandleInt) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -1148,7 +1148,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_PACKET == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -1191,7 +1191,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1225,7 +1225,7 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandleInt) eventPrms->ringHandle; + ringHandle = (Udma_RingHandle) eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1272,10 +1272,10 @@ static int32_t Udma_eventReset(Udma_DrvHandleInt drvHandle, return (retVal); } -static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static void Udma_eventProgramSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { - Udma_ChHandleInt chHandle; + Udma_ChHandle chHandle; Udma_EventPrms *eventPrms; DebugP_assert(eventHandle != NULL_PTR); @@ -1284,7 +1284,7 @@ static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = TRUE; } @@ -1292,10 +1292,10 @@ static void Udma_eventProgramSteering(Udma_DrvHandleInt drvHandle, return; } -static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) +static void Udma_eventResetSteering(Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { - Udma_ChHandleInt chHandle; + Udma_ChHandle chHandle; Udma_EventPrms *eventPrms; DebugP_assert(eventHandle != NULL_PTR); @@ -1304,7 +1304,7 @@ static void Udma_eventResetSteering(Udma_DrvHandleInt drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandleInt) eventPrms->chHandle; + chHandle = (Udma_ChHandle) eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = FALSE; diff --git a/source/drivers/udma/v1/udma_flow.c b/source/drivers/udma/v1/udma_flow.c index a974318e805..d7199646ed2 100644 --- a/source/drivers/udma/v1/udma_flow.c +++ b/source/drivers/udma/v1/udma_flow.c @@ -69,11 +69,11 @@ /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) +int32_t Udma_flowFree(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; uint32_t i, j, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms; uint32_t freeFlowOffset = 0U; @@ -126,7 +126,7 @@ int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); } - flowHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -137,14 +137,14 @@ int32_t Udma_flowFree(Udma_FlowHandleInt flowHandle) return (retVal); } -int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, - Udma_FlowHandleInt flowHandle, +int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, + Udma_FlowHandle flowHandle, uint32_t flowStart, uint32_t flowCnt) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -175,10 +175,10 @@ int32_t Udma_flowAttach(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) +int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if(NULL_PTR == flowHandleInt) @@ -195,7 +195,7 @@ int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) if(UDMA_SOK == retVal) { - flowHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -206,13 +206,13 @@ int32_t Udma_flowDetach(Udma_FlowHandleInt flowHandle) return (retVal); } -int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, +int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, uint32_t flowIdx, const Udma_FlowPrms *flowPrms) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_DrvHandle drvHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; struct tisci_msg_rm_udmap_flow_cfg_req rmFlowReq; struct tisci_msg_rm_udmap_flow_cfg_resp rmFlowResp; struct tisci_msg_rm_udmap_flow_size_thresh_cfg_req rmOptFlowReq; @@ -328,11 +328,11 @@ int32_t Udma_flowConfig(Udma_FlowHandleInt flowHandle, return (retVal); } -uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle) +uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowNum = UDMA_FLOW_INVALID; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -349,11 +349,11 @@ uint32_t Udma_flowGetNum(Udma_FlowHandleInt flowHandle) return (flowNum); } -uint32_t Udma_flowGetCount(Udma_FlowHandleInt flowHandle) +uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowCnt = UDMA_FLOW_INVALID; - Udma_FlowHandleInt flowHandleInt = (Udma_FlowHandleInt) flowHandle; + Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || diff --git a/source/drivers/udma/v1/udma_priv.h b/source/drivers/udma/v1/udma_priv.h index 2f731ce5b6d..a78f98784f3 100644 --- a/source/drivers/udma/v1/udma_priv.h +++ b/source/drivers/udma/v1/udma_priv.h @@ -61,13 +61,8 @@ #include -#include #include #include -#include - -#include -#include #include @@ -128,17 +123,6 @@ extern "C" { /** \brief Macro used to specify shift value for RX flow threshold before passing to SysFw */ #define UDMA_RFLOW_RX_SIZE_THRESH_VAL_SHIFT ((uint32_t) 0x00000005U) -/** \brief UDMA driver handle */ -typedef struct Udma_DrvObjectInt_t *Udma_DrvHandleInt; -/** \brief UDMA channel handle */ -typedef struct Udma_ChObjectInt_t *Udma_ChHandleInt; -/** \brief UDMA event handle */ -typedef struct Udma_EventObjectInt_t *Udma_EventHandleInt; -/** \brief UDMA ring handle */ -typedef struct Udma_RingObjectInt_t *Udma_RingHandleInt; -/** \brief UDMA flow handle */ -typedef struct Udma_FlowObjectInt_t *Udma_FlowHandleInt; - /** \brief Default ring order ID */ #define UDMA_DEFAULT_RING_ORDER_ID (0U) @@ -246,7 +230,7 @@ struct Udma_RingMonObj /* ========================================================================== */ /* SOC APIs */ -void Udma_initDrvHandle(Udma_DrvHandleInt drvHandle); +void Udma_initDrvHandle(Udma_DrvHandle drvHandle); int32_t UdmaRmInitPrms_init(uint32_t instId, Udma_RmInitPrms *rmInitPrms); const Udma_RmDefBoardCfgPrms *Udma_rmGetDefBoardCfgPrms(uint32_t instId); /** @@ -258,82 +242,82 @@ const Udma_RmDefBoardCfgPrms *Udma_rmGetDefBoardCfgPrms(uint32_t instId); */ void Udma_ringaccMemOps(void *pVirtAddr, uint32_t size, uint32_t opsType); /* Private APIs */ -int32_t Udma_ringReset(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle); +int32_t Udma_ringReset(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle); /* Normal RA APIs*/ -void Udma_ringHandleClearRegsNormal(Udma_RingHandleInt ringHandle); -void Udma_ringSetDoorBellNormal(Udma_RingHandleInt ringHandle, int32_t count); -void Udma_ringPrimeNormal(Udma_RingHandleInt ringHandle, uint64_t phyDescMem); -void Udma_ringPrimeReadNormal(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem); -void *Udma_ringGetMemPtrNormal(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetModeNormal(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetElementCntNormal(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetRingOccNormal(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetWrIdxNormal(Udma_RingHandleInt ringHandle); -uint32_t Udma_ringGetRdIdxNormal(Udma_RingHandleInt ringHandle); -int32_t Udma_ringDequeueRawNormal(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +void Udma_ringHandleClearRegsNormal(Udma_RingHandle ringHandle); +void Udma_ringSetDoorBellNormal(Udma_RingHandle ringHandle, int32_t count); +void Udma_ringPrimeNormal(Udma_RingHandle ringHandle, uint64_t phyDescMem); +void Udma_ringPrimeReadNormal(Udma_RingHandle ringHandle, uint64_t *phyDescMem); +uint8_t *Udma_ringGetMemPtrNormal(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetModeNormal(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetElementCntNormal(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetRingOccNormal(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetWrIdxNormal(Udma_RingHandle ringHandle); +uint32_t Udma_ringGetRdIdxNormal(Udma_RingHandle ringHandle); +int32_t Udma_ringDequeueRawNormal(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint64_t *phyDescMem); -int32_t Udma_ringQueueRawNormal(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringQueueRawNormal(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint64_t phyDescMem); -int32_t Udma_ringFlushRawNormal(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringFlushRawNormal(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint64_t *phyDescMem); -void Udma_ringSetCfgNormal(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +void Udma_ringSetCfgNormal(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, const Udma_RingPrms *ringPrms); -int32_t Udma_ringProxyQueueRaw(Udma_RingHandleInt ringHandle, - Udma_DrvHandleInt drvHandle, +int32_t Udma_ringProxyQueueRaw(Udma_RingHandle ringHandle, + Udma_DrvHandle drvHandle, uint64_t phyDescMem); -int32_t Udma_ringProxyDequeueRaw(Udma_RingHandleInt ringHandle, - Udma_DrvHandleInt drvHandle, +int32_t Udma_ringProxyDequeueRaw(Udma_RingHandle ringHandle, + Udma_DrvHandle drvHandle, uint64_t *phyDescMem); /* * RM APIs */ -void Udma_rmInit(Udma_DrvHandleInt drvHandle); -int32_t Udma_rmDeinit(Udma_DrvHandleInt drvHandle); +void Udma_rmInit(Udma_DrvHandle drvHandle); +int32_t Udma_rmDeinit(Udma_DrvHandle drvHandle); /* Channel RM APIs */ -uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle); -void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle); - -uint16_t Udma_rmAllocFreeRing(Udma_DrvHandleInt drvHandle); -void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandleInt drvHandle); +uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle); +void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle); + +uint16_t Udma_rmAllocFreeRing(Udma_DrvHandle drvHandle); +void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandle drvHandle); /* Event RM APIs */ -uint32_t Udma_rmAllocEvent(Udma_DrvHandleInt drvHandle); -void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocVintr(Udma_DrvHandleInt drvHandle); -void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmAllocVintrBit(Udma_EventHandleInt eventHandle); +uint32_t Udma_rmAllocEvent(Udma_DrvHandle drvHandle); +void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocVintr(Udma_DrvHandle drvHandle); +void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmAllocVintrBit(Udma_EventHandle eventHandle); void Udma_rmFreeVintrBit(uint32_t vintrBitNum, - Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle); + Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle); uint32_t Udma_rmAllocIrIntr(uint32_t preferredIrIntrNum, - Udma_DrvHandleInt drvHandle); -void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandleInt drvHandle); -uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandleInt drvHandle, uint32_t irIntrNum); -uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandleInt drvHandle, uint32_t coreIntrNum); -void Udma_rmFreeCoreIntr(uint32_t coreIntrNum, Udma_DrvHandleInt drvHandle); + Udma_DrvHandle drvHandle); +void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandle drvHandle); +uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandle drvHandle, uint32_t irIntrNum); +uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandle drvHandle, uint32_t coreIntrNum); +void Udma_rmFreeCoreIntr(uint32_t coreIntrNum, Udma_DrvHandle drvHandle); /* Query Sciclient_DefaultBoardCfg_rm API */ int32_t Udma_rmGetSciclientDefaultBoardCfgRmRange(const Udma_RmDefBoardCfgPrms *rmDefBoardCfgPrms, @@ -349,11 +333,11 @@ int32_t Udma_rmSetSharedResRmInitPrms(const Udma_RmSharedResPrms *rmSharedResPrm /* Utils APIs */ uint64_t Udma_virtToPhyFxn(const void *virtAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle); + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle); void *Udma_phyToVirtFxn(uint64_t phyAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle); + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle); /* ========================================================================== */ /* Static Function Definitions */ diff --git a/source/drivers/udma/v1/udma_ring_common.c b/source/drivers/udma/v1/udma_ring_common.c index 0d26c533036..119c39c1d00 100644 --- a/source/drivers/udma/v1/udma_ring_common.c +++ b/source/drivers/udma/v1/udma_ring_common.c @@ -60,7 +60,7 @@ /* Function Declarations */ /* ========================================================================== */ -static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_ringCheckParams(Udma_DrvHandle drvHandle, const Udma_RingPrms *ringPrms); /* ========================================================================== */ @@ -73,16 +73,16 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint16_t ringNum, const Udma_RingPrms *ringPrms) { int32_t retVal = UDMA_SOK; uint64_t physBase; uint32_t allocDone = (uint32_t) FALSE; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; struct tisci_msg_rm_ring_cfg_req rmRingReq; struct tisci_msg_rm_ring_cfg_resp rmRingResp; @@ -167,7 +167,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, TISCI_MSG_VALUE_RM_RING_ASEL_VALID; rmRingReq.nav_id = drvHandleInt->devIdRing; rmRingReq.index = ringHandleInt->ringNum; - physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, (Udma_ChHandleInt) NULL_PTR); + physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, (Udma_ChHandle) NULL_PTR); rmRingReq.addr_lo = (uint32_t)physBase; rmRingReq.addr_hi = (uint32_t)(physBase >> 32UL); rmRingReq.count = ringPrms->elemCnt; @@ -209,11 +209,11 @@ int32_t Udma_ringAlloc(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_ringFree(Udma_RingHandleInt ringHandle) +int32_t Udma_ringFree(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -248,19 +248,19 @@ int32_t Udma_ringFree(Udma_RingHandleInt ringHandle) ringHandleInt->ringNum = UDMA_RING_INVALID; ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsNormal(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; } return (retVal); } -int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, uint16_t ringNum) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandleInt = (Udma_DrvHandleInt) drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (NULL_PTR == ringHandleInt)) @@ -294,11 +294,11 @@ int32_t Udma_ringAttach(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle) +int32_t Udma_ringDetach(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -328,19 +328,19 @@ int32_t Udma_ringDetach(Udma_RingHandleInt ringHandle) DebugP_assert(ringHandleInt->ringNum != UDMA_RING_INVALID); ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsNormal(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandleInt) NULL_PTR; + ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; } return (retVal); } -int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -371,12 +371,12 @@ int32_t Udma_ringQueueRaw(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) return (retVal); } -int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; uintptr_t cookie; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -407,11 +407,11 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) return (retVal); } -int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; - Udma_DrvHandleInt drvHandle; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_DrvHandle drvHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -438,37 +438,37 @@ int32_t Udma_ringFlushRaw(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) return (retVal); } -void Udma_ringPrime(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) { - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; Udma_ringPrimeNormal(ringHandleInt, phyDescMem); return; } -void Udma_ringPrimeRead(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; Udma_ringPrimeReadNormal(ringHandleInt, phyDescMem); return; } -void Udma_ringSetDoorBell(Udma_RingHandleInt ringHandle, int32_t count) +void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) { - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; Udma_ringSetDoorBellNormal(ringHandleInt, count); return; } -uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle) +uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) { uint16_t ringNum = UDMA_RING_INVALID; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; if((NULL_PTR != ringHandleInt) && (UDMA_INIT_DONE == ringHandleInt->ringInitDone)) @@ -479,70 +479,70 @@ uint16_t Udma_ringGetNum(Udma_RingHandleInt ringHandle) return (ringNum); } -void *Udma_ringGetMemPtr(Udma_RingHandleInt ringHandle) +uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) { - void *ringMem = NULL_PTR; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + uint8_t *ringMem = NULL_PTR; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; ringMem = Udma_ringGetMemPtrNormal(ringHandleInt); return (ringMem); } -uint32_t Udma_ringGetMode(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) { uint32_t ringMode; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; ringMode = Udma_ringGetModeNormal(ringHandleInt); return (ringMode); } -uint32_t Udma_ringGetElementCnt(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) { uint32_t size = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; size = Udma_ringGetElementCntNormal(ringHandleInt); return (size); } -uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; occ = Udma_ringGetRingOccNormal(ringHandleInt); return (occ); } -uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; occ = Udma_ringGetRingOccNormal(ringHandleInt); return (occ); } -uint32_t Udma_ringGetWrIdx(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; idx = Udma_ringGetWrIdxNormal(ringHandleInt); return (idx); } -uint32_t Udma_ringGetRdIdx(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandleInt ringHandleInt = (Udma_RingHandleInt) ringHandle; + Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; idx = Udma_ringGetRdIdxNormal(ringHandleInt); @@ -568,7 +568,7 @@ void UdmaRingPrms_init(Udma_RingPrms *ringPrms) return; } -static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, +static int32_t Udma_ringCheckParams(Udma_DrvHandle drvHandle, const Udma_RingPrms *ringPrms) { int32_t retVal = UDMA_SOK; @@ -629,8 +629,8 @@ static int32_t Udma_ringCheckParams(Udma_DrvHandleInt drvHandle, return (retVal); } -int32_t Udma_ringProxyQueueRaw(Udma_RingHandleInt ringHandle, - Udma_DrvHandleInt drvHandle, +int32_t Udma_ringProxyQueueRaw(Udma_RingHandle ringHandle, + Udma_DrvHandle drvHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; @@ -666,8 +666,8 @@ int32_t Udma_ringProxyQueueRaw(Udma_RingHandleInt ringHandle, return (retVal); } -int32_t Udma_ringProxyDequeueRaw(Udma_RingHandleInt ringHandle, - Udma_DrvHandleInt drvHandle, +int32_t Udma_ringProxyDequeueRaw(Udma_RingHandle ringHandle, + Udma_DrvHandle drvHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; @@ -703,8 +703,8 @@ int32_t Udma_ringProxyDequeueRaw(Udma_RingHandleInt ringHandle, return (retVal); } -int32_t Udma_ringReset(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle) +int32_t Udma_ringReset(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; uint32_t regVal; diff --git a/source/drivers/udma/v1/udma_ring_normal.c b/source/drivers/udma/v1/udma_ring_normal.c index 2df800aacdf..d092afa0814 100644 --- a/source/drivers/udma/v1/udma_ring_normal.c +++ b/source/drivers/udma/v1/udma_ring_normal.c @@ -72,8 +72,8 @@ /* Function Definitions */ /* ========================================================================== */ -void Udma_ringSetCfgNormal(Udma_DrvHandleInt drvHandle, - Udma_RingHandleInt ringHandle, +void Udma_ringSetCfgNormal(Udma_DrvHandle drvHandle, + Udma_RingHandle ringHandle, const Udma_RingPrms *ringPrms) { uint32_t addrHi, addrLo, elemSize; @@ -92,7 +92,7 @@ void Udma_ringSetCfgNormal(Udma_DrvHandleInt drvHandle, if(NULL_PTR != ringPrms) { ringCfg->physBase = - Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, (Udma_ChHandleInt) NULL_PTR); + Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, (Udma_ChHandle) NULL_PTR); ringCfg->virtBase = (void *) ringPrms->ringMem; ringCfg->mode = ringPrms->mode; ringCfg->elCnt = ringPrms->elemCnt; @@ -106,7 +106,7 @@ void Udma_ringSetCfgNormal(Udma_DrvHandleInt drvHandle, addrLo = CSL_REG32_FEXT(&ringHandle->pCfgRegs->BA_LO, RINGACC_CFG_RING_BA_LO_ADDR_LO); ringCfg->physBase = (uint64_t)((((uint64_t) addrHi) << 32UL) | ((uint64_t) addrLo)); - ringCfg->virtBase = Udma_phyToVirtFxn(ringCfg->physBase, drvHandle, (Udma_ChHandleInt) NULL_PTR); + ringCfg->virtBase = Udma_phyToVirtFxn(ringCfg->physBase, drvHandle, (Udma_ChHandle) NULL_PTR); ringCfg->mode = CSL_REG32_FEXT(&ringHandle->pCfgRegs->SIZE, RINGACC_CFG_RING_SIZE_QMODE); ringCfg->elCnt = CSL_REG32_FEXT(&ringHandle->pCfgRegs->SIZE, RINGACC_CFG_RING_SIZE_ELCNT); elemSize = CSL_REG32_FEXT(&ringHandle->pCfgRegs->SIZE, RINGACC_CFG_RING_SIZE_ELSIZE); @@ -131,13 +131,13 @@ void Udma_ringSetCfgNormal(Udma_DrvHandleInt drvHandle, return; } -void Udma_ringHandleClearRegsNormal(Udma_RingHandleInt ringHandle) +void Udma_ringHandleClearRegsNormal(Udma_RingHandle ringHandle) { ringHandle->pCfgRegs = (volatile CSL_ringacc_cfgRegs_RING *) NULL_PTR; ringHandle->pRtRegs = (volatile CSL_ringacc_rtRegs_RINGRT *) NULL_PTR; } -int32_t Udma_ringQueueRawNormal(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +int32_t Udma_ringQueueRawNormal(Udma_DrvHandle drvHandle, Udma_RingHandle ringHandle, uint64_t phyDescMem) { int32_t retVal = UDMA_SOK; @@ -159,7 +159,7 @@ int32_t Udma_ringQueueRawNormal(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt return (retVal); } -int32_t Udma_ringDequeueRawNormal(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringDequeueRawNormal(Udma_DrvHandle drvHandle, Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK, cslRetVal; @@ -185,7 +185,7 @@ int32_t Udma_ringDequeueRawNormal(Udma_DrvHandleInt drvHandle, Udma_RingHandleIn return (retVal); } -int32_t Udma_ringFlushRawNormal(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +int32_t Udma_ringFlushRawNormal(Udma_DrvHandle drvHandle, Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; @@ -195,7 +195,7 @@ int32_t Udma_ringFlushRawNormal(Udma_DrvHandleInt drvHandle, Udma_RingHandleInt return (retVal); } -void Udma_ringPrimeNormal(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) +void Udma_ringPrimeNormal(Udma_RingHandle ringHandle, uint64_t phyDescMem) { volatile uint64_t *ringPtr; CSL_RingAccRingCfg *pRing; @@ -219,7 +219,7 @@ void Udma_ringPrimeNormal(Udma_RingHandleInt ringHandle, uint64_t phyDescMem) return; } -void Udma_ringPrimeReadNormal(Udma_RingHandleInt ringHandle, uint64_t *phyDescMem) +void Udma_ringPrimeReadNormal(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { volatile uint64_t *ringPtr; CSL_RingAccRingCfg *pRing; @@ -244,7 +244,7 @@ void Udma_ringPrimeReadNormal(Udma_RingHandleInt ringHandle, uint64_t *phyDescMe } } -void Udma_ringSetDoorBellNormal(Udma_RingHandleInt ringHandle, int32_t count) +void Udma_ringSetDoorBellNormal(Udma_RingHandle ringHandle, int32_t count) { uint32_t regVal; int32_t thisDbRingCnt; @@ -295,18 +295,18 @@ void Udma_ringSetDoorBellNormal(Udma_RingHandleInt ringHandle, int32_t count) } } -void *Udma_ringGetMemPtrNormal(Udma_RingHandleInt ringHandle) +uint8_t *Udma_ringGetMemPtrNormal(Udma_RingHandle ringHandle) { - void *ringMem = NULL_PTR; + uint8_t *ringMem = NULL_PTR; if((NULL_PTR != ringHandle) && (UDMA_INIT_DONE == ringHandle->ringInitDone)) { - ringMem = ringHandle->cfg.virtBase; + ringMem = (uint8_t*) ringHandle->cfg.virtBase; } return (ringMem); } -uint32_t Udma_ringGetModeNormal(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetModeNormal(Udma_RingHandle ringHandle) { uint32_t ringMode = CSL_RINGACC_RING_MODE_INVALID; @@ -318,7 +318,7 @@ uint32_t Udma_ringGetModeNormal(Udma_RingHandleInt ringHandle) return (ringMode); } -uint32_t Udma_ringGetElementCntNormal(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetElementCntNormal(Udma_RingHandle ringHandle) { uint32_t size = 0U; @@ -330,7 +330,7 @@ uint32_t Udma_ringGetElementCntNormal(Udma_RingHandleInt ringHandle) return (size); } -uint32_t Udma_ringGetRingOccNormal(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetRingOccNormal(Udma_RingHandle ringHandle) { uint32_t occ = 0U; @@ -345,7 +345,7 @@ uint32_t Udma_ringGetRingOccNormal(Udma_RingHandleInt ringHandle) return (occ); } -uint32_t Udma_ringGetWrIdxNormal(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetWrIdxNormal(Udma_RingHandle ringHandle) { uint32_t idx = 0U; @@ -357,7 +357,7 @@ uint32_t Udma_ringGetWrIdxNormal(Udma_RingHandleInt ringHandle) return (idx); } -uint32_t Udma_ringGetRdIdxNormal(Udma_RingHandleInt ringHandle) +uint32_t Udma_ringGetRdIdxNormal(Udma_RingHandle ringHandle) { uint32_t idx = 0U; diff --git a/source/drivers/udma/v1/udma_rm.c b/source/drivers/udma/v1/udma_rm.c index 1179d4f3f4e..fea4a647d24 100644 --- a/source/drivers/udma/v1/udma_rm.c +++ b/source/drivers/udma/v1/udma_rm.c @@ -60,7 +60,7 @@ /* Function Declarations */ /* ========================================================================== */ -static int32_t Udma_rmCheckResLeak(Udma_DrvHandleInt drvHandle, +static int32_t Udma_rmCheckResLeak(Udma_DrvHandle drvHandle, const uint32_t *allocFlag, uint32_t numRes, uint32_t arrSize); @@ -75,7 +75,7 @@ static int32_t Udma_rmCheckResLeak(Udma_DrvHandleInt drvHandle, /* Function Definitions */ /* ========================================================================== */ -void Udma_rmInit(Udma_DrvHandleInt drvHandle) +void Udma_rmInit(Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -198,7 +198,7 @@ void Udma_rmInit(Udma_DrvHandleInt drvHandle) return; } -int32_t Udma_rmDeinit(Udma_DrvHandleInt drvHandle) +int32_t Udma_rmDeinit(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -277,7 +277,7 @@ int32_t Udma_rmDeinit(Udma_DrvHandleInt drvHandle) return (retVal); } -uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -327,7 +327,7 @@ uint32_t Udma_rmAllocBlkCopyCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHan return (chNum); } -void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -349,7 +349,7 @@ void Udma_rmFreeBlkCopyCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -399,7 +399,7 @@ uint32_t Udma_rmAllocBlkCopyHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvH return (chNum); } -void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -421,7 +421,7 @@ void Udma_rmFreeBlkCopyHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -471,7 +471,7 @@ uint32_t Udma_rmAllocBlkCopyUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drv return (chNum); } -void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -493,7 +493,7 @@ void Udma_rmFreeBlkCopyUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -543,7 +543,7 @@ uint32_t Udma_rmAllocTxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) return (chNum); } -void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -565,7 +565,7 @@ void Udma_rmFreeTxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -615,7 +615,7 @@ uint32_t Udma_rmAllocRxCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) return (chNum); } -void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -637,7 +637,7 @@ void Udma_rmFreeRxCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -687,7 +687,7 @@ uint32_t Udma_rmAllocTxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle return (chNum); } -void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -709,7 +709,7 @@ void Udma_rmFreeTxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -759,7 +759,7 @@ uint32_t Udma_rmAllocRxHcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle return (chNum); } -void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -781,7 +781,7 @@ void Udma_rmFreeRxHcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -831,7 +831,7 @@ uint32_t Udma_rmAllocTxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandl return (chNum); } -void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -853,7 +853,7 @@ void Udma_rmFreeTxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t chNum = UDMA_DMA_CH_INVALID; @@ -903,7 +903,7 @@ uint32_t Udma_rmAllocRxUhcCh(uint32_t preferredChNum, Udma_DrvHandleInt drvHandl return (chNum); } -void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -925,7 +925,7 @@ void Udma_rmFreeRxUhcCh(uint32_t chNum, Udma_DrvHandleInt drvHandle) return; } -uint16_t Udma_rmAllocFreeRing(Udma_DrvHandleInt drvHandle) +uint16_t Udma_rmAllocFreeRing(Udma_DrvHandle drvHandle) { uint16_t ringNum = UDMA_RING_INVALID; uint16_t i, offset, temp; @@ -958,7 +958,7 @@ uint16_t Udma_rmAllocFreeRing(Udma_DrvHandleInt drvHandle) return (ringNum); } -void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -985,7 +985,7 @@ void Udma_rmFreeFreeRing(uint16_t ringNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocEvent(Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocEvent(Udma_DrvHandle drvHandle) { uint32_t globalEvent = UDMA_EVENT_INVALID; uint32_t i, offset, bitPos, bitMask; @@ -1012,7 +1012,7 @@ uint32_t Udma_rmAllocEvent(Udma_DrvHandleInt drvHandle) return (globalEvent); } -void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1035,7 +1035,7 @@ void Udma_rmFreeEvent(uint32_t globalEvent, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocVintr(Udma_DrvHandleInt drvHandle) +uint32_t Udma_rmAllocVintr(Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t vintrNum = UDMA_EVENT_INVALID; @@ -1062,7 +1062,7 @@ uint32_t Udma_rmAllocVintr(Udma_DrvHandleInt drvHandle) return (vintrNum); } -void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1085,21 +1085,21 @@ void Udma_rmFreeVintr(uint32_t vintrNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmAllocVintrBit(Udma_EventHandleInt eventHandle) +uint32_t Udma_rmAllocVintrBit(Udma_EventHandle eventHandle) { uint32_t i; uint32_t vintrBitNum = UDMA_EVENT_INVALID; uint64_t bitMask; - Udma_EventHandleInt controllerEventHandle; + Udma_EventHandle controllerEventHandle; const Udma_EventPrms *eventPrms; - Udma_DrvHandleInt drvHandle = eventHandle->drvHandle; + Udma_DrvHandle drvHandle = eventHandle->drvHandle; controllerEventHandle = eventHandle; eventPrms = &eventHandle->eventPrms; if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); @@ -1121,11 +1121,11 @@ uint32_t Udma_rmAllocVintrBit(Udma_EventHandleInt eventHandle) } void Udma_rmFreeVintrBit(uint32_t vintrBitNum, - Udma_DrvHandleInt drvHandle, - Udma_EventHandleInt eventHandle) + Udma_DrvHandle drvHandle, + Udma_EventHandle eventHandle) { uint64_t bitMask; - Udma_EventHandleInt controllerEventHandle; + Udma_EventHandle controllerEventHandle; const Udma_EventPrms *eventPrms; controllerEventHandle = eventHandle; @@ -1133,7 +1133,7 @@ void Udma_rmFreeVintrBit(uint32_t vintrBitNum, if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandleInt) eventPrms->controllerEventHandle; + controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); @@ -1149,7 +1149,7 @@ void Udma_rmFreeVintrBit(uint32_t vintrBitNum, } uint32_t Udma_rmAllocIrIntr(uint32_t preferredIrIntrNum, - Udma_DrvHandleInt drvHandle) + Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; uint32_t irIntrNum = UDMA_INTR_INVALID; @@ -1199,7 +1199,7 @@ uint32_t Udma_rmAllocIrIntr(uint32_t preferredIrIntrNum, return (irIntrNum); } -void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandleInt drvHandle) +void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandle drvHandle) { uint32_t i, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms = &drvHandle->rmInitPrms; @@ -1222,7 +1222,7 @@ void Udma_rmFreeIrIntr(uint32_t irIntrNum, Udma_DrvHandleInt drvHandle) return; } -uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandleInt drvHandle, uint32_t irIntrNum) +uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandle drvHandle, uint32_t irIntrNum) { uint32_t coreIntrNum = UDMA_INTR_INVALID; @@ -1250,7 +1250,7 @@ uint32_t Udma_rmTranslateIrOutput(Udma_DrvHandleInt drvHandle, uint32_t irIntrNu return (coreIntrNum); } -uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandleInt drvHandle, uint32_t coreIntrNum) +uint32_t Udma_rmTranslateCoreIntrInput(Udma_DrvHandle drvHandle, uint32_t coreIntrNum) { uint32_t irIntrNum = UDMA_INTR_INVALID; @@ -1441,7 +1441,7 @@ int32_t Udma_rmSetSharedResRmInitPrms(const Udma_RmSharedResPrms *rmSharedResPrm return (retVal); } -static int32_t Udma_rmCheckResLeak(Udma_DrvHandleInt drvHandle, +static int32_t Udma_rmCheckResLeak(Udma_DrvHandle drvHandle, const uint32_t *allocFlag, uint32_t numRes, uint32_t arrSize) diff --git a/source/drivers/udma/v1/udma_utils.c b/source/drivers/udma/v1/udma_utils.c index 52a218878a4..f5892e59829 100644 --- a/source/drivers/udma/v1/udma_utils.c +++ b/source/drivers/udma/v1/udma_utils.c @@ -191,8 +191,8 @@ uint32_t UdmaUtils_getTrSizeBytes(uint32_t trType) } uint64_t Udma_virtToPhyFxn(const void *virtAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle) + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle) { uint32_t chNum = UDMA_DMA_CH_INVALID; void *appData = NULL_PTR; @@ -217,8 +217,8 @@ uint64_t Udma_virtToPhyFxn(const void *virtAddr, } void *Udma_phyToVirtFxn(uint64_t phyAddr, - Udma_DrvHandleInt drvHandle, - Udma_ChHandleInt chHandle) + Udma_DrvHandle drvHandle, + Udma_ChHandle chHandle) { uint32_t chNum = UDMA_DMA_CH_INVALID; void *appData = NULL_PTR; diff --git a/test/drivers/adc/st_adcDmaMode.c b/test/drivers/adc/st_adcDmaMode.c index 224d71378c2..c31dfc80897 100644 --- a/test/drivers/adc/st_adcDmaMode.c +++ b/test/drivers/adc/st_adcDmaMode.c @@ -115,8 +115,8 @@ static SemaphoreP_Object gUdmaAppDoneSem; int32_t st_adcDmaMode_main(st_ADCTestcaseParams_t *testParams) { int32_t status; - Udma_ChHandle rxChHandle = &gUdmaRxChObj; - Udma_DrvHandle drvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + Udma_ChHandle rxChHandle = (Udma_ChHandle) &gUdmaRxChObj; + Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; gAdcModule = testParams->adcConfigParams.adcModule; st_adcModuleInit(gAdcModule); @@ -243,7 +243,7 @@ static int32_t App_create(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle, st DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = &gUdmaCqEventObj; + eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -276,7 +276,7 @@ static int32_t App_delete(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle) DebugP_assert(UDMA_SOK == retVal); /* Unregister all events */ - eventHandle = &gUdmaCqEventObj; + eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; retVal = Udma_eventUnRegister(eventHandle); DebugP_assert(UDMA_SOK == retVal); diff --git a/test/drivers/udma/udma_test_blkcpy.c b/test/drivers/udma/udma_test_blkcpy.c index 47d1994acd1..173eb99e589 100644 --- a/test/drivers/udma/udma_test_blkcpy.c +++ b/test/drivers/udma/udma_test_blkcpy.c @@ -763,7 +763,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest chPrms.tdCqRingPrms.elemCnt = chObj->qdepth; /* Open channel for block copy */ - retVal = Udma_chOpen(chObj->drvHandle, (Udma_ChHandleInt) &chObj->drvChObj, chType, &chPrms); + retVal = Udma_chOpen(chObj->drvHandle, (Udma_ChHandle) &chObj->drvChObj, chType, &chPrms); if(UDMA_SOK != retVal) { GT_0trace(taskObj->traceMask, GT_ERR, @@ -771,7 +771,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest } else { - chObj->chHandle = &chObj->drvChObj; + chObj->chHandle = (Udma_ChHandle) &chObj->drvChObj; GT_3trace(taskObj->traceMask, GT_INFO1, " |TEST INFO|:: Task:%d: CH:%d: Allocated Ch : %d ::\r\n", taskObj->taskId, chObj->chIdx, Udma_chGetNum(chObj->chHandle)); @@ -818,7 +818,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest { /* Register ring completion callback */ /* In case of chaining test, register ring completion only for last channel. */ - eventHandle = &chObj->cqEventObj; + eventHandle = (Udma_EventHandle) &chObj->cqEventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -851,7 +851,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest if((UDMA_SOK == retVal) && (CSL_UDMAP_TR_FLAGS_EVENT_SIZE_COMPLETION != chObj->chPrms->eventSize)) { /* Register TR event */ - eventHandle = &chObj->trEventObj; + eventHandle = (Udma_EventHandle) &chObj->trEventObj; UdmaEventPrms_init(&chObj->trEventPrms); chObj->trEventPrms.eventType = UDMA_EVENT_TYPE_TR; chObj->trEventPrms.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/test/drivers/udma/udma_test_bug.c b/test/drivers/udma/udma_test_bug.c index 9b3fa91538f..33ad55d8e7f 100644 --- a/test/drivers/udma/udma_test_bug.c +++ b/test/drivers/udma/udma_test_bug.c @@ -77,7 +77,7 @@ int32_t udmaTestBugTcPDK_4654(UdmaTestTaskObj *taskObj) uint32_t instId; Udma_DrvHandle drvHandle; Udma_EventObject eventObj; - Udma_EventHandle eventHandle = &eventObj; + Udma_EventHandle eventHandle = (Udma_EventHandle) &eventObj; Udma_EventPrms eventPrms; GT_1trace(taskObj->traceMask, GT_INFO1, @@ -103,7 +103,7 @@ int32_t udmaTestBugTcPDK_4654(UdmaTestTaskObj *taskObj) { for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++) { - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; /* Alloc VINTR - By registering Master event in Shared mode */ UdmaEventPrms_init(&eventPrms); diff --git a/test/drivers/udma/udma_test_ch.c b/test/drivers/udma/udma_test_ch.c index c374975b36b..ed5a730660e 100644 --- a/test/drivers/udma/udma_test_ch.c +++ b/test/drivers/udma/udma_test_ch.c @@ -138,12 +138,12 @@ static int32_t udmaTestChPktdmaParamCheckTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; uint32_t chType; Udma_ChObject chObj; - Udma_ChHandle chHandle = &chObj; + Udma_ChHandle chHandle = (Udma_ChHandle) &chObj; Udma_ChPrms chPrms; void *ringMem = NULL; Udma_ChObjectInt *chObjInt = (Udma_ChObjectInt *) chHandle; - drvHandle = &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; ringMemSize = elemCnt * sizeof (uint64_t); ringMem = Utils_memAlloc(heapId, ringMemSize, UDMA_CACHELINE_ALIGNMENT); if(NULL == ringMem) @@ -224,7 +224,7 @@ static int32_t udmaTestChPktdmaChApiTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; uint32_t chType; Udma_ChObject chObj; - Udma_ChHandle chHandle = &chObj; + Udma_ChHandle chHandle = (Udma_ChHandle) &chObj; Udma_ChPrms chPrms; Udma_ChTxPrms txPrms; Udma_ChRxPrms rxPrms; @@ -236,7 +236,7 @@ static int32_t udmaTestChPktdmaChApiTestLoop(UdmaTestTaskObj *taskObj) const UdmaTestPktdmaChPrm *pktdmaChPrms = NULL; Udma_DrvObjectInt *drvObj; - drvHandle = &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; drvObj = (Udma_DrvObjectInt *) drvHandle; rmInitPrms = &drvObj->rmInitPrms; ringMemSize = elemCnt * sizeof (uint64_t); diff --git a/test/drivers/udma/udma_test_common.c b/test/drivers/udma/udma_test_common.c index 5f51f7b417d..0552894ae07 100644 --- a/test/drivers/udma/udma_test_common.c +++ b/test/drivers/udma/udma_test_common.c @@ -86,7 +86,7 @@ int32_t udmaTestInitDriver(UdmaTestObj *testObj) for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++) { /* UDMA driver init */ - drvHandle = &testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &testObj->drvObj[instId]; UdmaInitPrms_init(instId, &initPrms); retVal += Udma_init(drvHandle, &initPrms); if(UDMA_SOK != retVal) @@ -108,7 +108,7 @@ int32_t udmaTestDeinitDriver(UdmaTestObj *testObj) for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++) { /* UDMA driver deinit */ - drvHandle = &testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &testObj->drvObj[instId]; retVal += Udma_deinit(drvHandle); if(UDMA_SOK != retVal) { diff --git a/test/drivers/udma/udma_test_flow.c b/test/drivers/udma/udma_test_flow.c index 1979280d729..bba4da8cf68 100644 --- a/test/drivers/udma/udma_test_flow.c +++ b/test/drivers/udma/udma_test_flow.c @@ -110,7 +110,7 @@ static int32_t udmaTestFlowAttachMappedTestLoop(UdmaTestTaskObj *taskObj) uint32_t mappedFlowAllocated = FALSE; Udma_DrvHandle drvHandle; Udma_FlowObject flowObj, attachFlowObj; - Udma_FlowHandle flowHandle = &flowObj, attachFlowHandle = &attachFlowObj; + Udma_FlowHandle flowHandle = (Udma_FlowHandle) &flowObj, attachFlowHandle = (Udma_FlowHandle) &attachFlowObj; Udma_FlowPrms flowPrms; Udma_FlowAllocMappedPrms flowAllocMappedPrms; Udma_RmInitPrms *rmInitPrms; @@ -120,7 +120,7 @@ static int32_t udmaTestFlowAttachMappedTestLoop(UdmaTestTaskObj *taskObj) if(UDMA_SOK == retVal) { instId = UDMA_TEST_INST_ID_FLOW; - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; drvObj = (Udma_DrvObjectInt *) drvHandle; numMappedFlowGrp = UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP; diff --git a/test/drivers/udma/udma_test_parser.c b/test/drivers/udma/udma_test_parser.c index 9589ced7f89..9fb89865ce4 100644 --- a/test/drivers/udma/udma_test_parser.c +++ b/test/drivers/udma/udma_test_parser.c @@ -690,7 +690,7 @@ static void udmaTestInitTestObj(UdmaTestObj *testObj, UdmaTestParams *testPrms) chObj->chHandle = NULL; chObj->cqEventHandle = NULL; chObj->tdCqEventHandle = NULL; - chObj->drvHandle = &testObj->drvObj[testPrms->instId[chCnt]]; + chObj->drvHandle = (Udma_DrvHandle) &testObj->drvObj[testPrms->instId[chCnt]]; chObj->instId = testPrms->instId[chCnt]; chObj->queueCnt = 0U; chObj->dequeueCnt = 0U; diff --git a/test/drivers/udma/udma_test_ring.c b/test/drivers/udma/udma_test_ring.c index e240af6a22b..3ccdccf27ab 100644 --- a/test/drivers/udma/udma_test_ring.c +++ b/test/drivers/udma/udma_test_ring.c @@ -243,8 +243,8 @@ int32_t udmaTestRingMemPtrTc(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; - void *ringMem = NULL; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + void *ringMem = NULL; Udma_RmInitPrms *rmInitPrms; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; char *ringModeString[] = {"RING", "MESSAGE"}; @@ -271,7 +271,7 @@ int32_t udmaTestRingMemPtrTc(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; UdmaRingPrms_init(&ringPrms); @@ -442,7 +442,7 @@ static int32_t udmaTestRingProxyTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; void *ringMem = NULL; uint64_t ringData; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -467,7 +467,7 @@ static int32_t udmaTestRingProxyTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -578,7 +578,7 @@ static int32_t udmaTestRingFlushTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; void *ringMem = NULL; uint64_t ringData; Udma_RmInitPrms *rmInitPrms; @@ -604,7 +604,7 @@ static int32_t udmaTestRingFlushTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; UdmaRingPrms_init(&ringPrms); @@ -733,7 +733,7 @@ static int32_t udmaTestRingEventTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; void *ringMem = NULL; uint64_t ringData; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -772,7 +772,7 @@ static int32_t udmaTestRingEventTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing Ring Event for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -792,7 +792,7 @@ static int32_t udmaTestRingEventTestLoop(UdmaTestTaskObj *taskObj) if(UDMA_TEST_EVENT_NONE != taskObj->ringPrms->eventMode) { /* Register ring completion */ - eventHandle = &eventObj; + eventHandle = (Udma_EventHandle) &eventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_RING; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -951,7 +951,7 @@ static int32_t udmaTestRingParamCheckTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; void *ringMem = NULL; Udma_RmInitPrms *rmInitPrms; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -976,7 +976,7 @@ static int32_t udmaTestRingParamCheckTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing ring params check for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; /* Ring memory NULL check */ @@ -1144,7 +1144,7 @@ static int32_t udmaTestRingAttachTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj, attachRingObj; - Udma_RingHandle ringHandle = &ringObj, attachRingHandle = &attachRingObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj, attachRingHandle = (Udma_RingHandle) &attachRingObj; void *ringMem = NULL; uint64_t ringData; Udma_RmInitPrms *rmInitPrms; @@ -1175,7 +1175,7 @@ static int32_t udmaTestRingAttachTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) @@ -1373,7 +1373,7 @@ static int32_t udmaTestRingResetTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; void *ringMem = NULL; uint64_t ringData; Udma_RmInitPrms *rmInitPrms; @@ -1399,7 +1399,7 @@ static int32_t udmaTestRingResetTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; UdmaRingPrms_init(&ringPrms); @@ -1560,7 +1560,7 @@ static int32_t udmaTestRingPrimeTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = &ringObj; + Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; void *ringMem = NULL; uint64_t ringData; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -1582,7 +1582,7 @@ static int32_t udmaTestRingPrimeTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = &taskObj->testObj->drvObj[instId]; + drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; From 30d2618e858ca465f26ddd691d842d69cb68d050 Mon Sep 17 00:00:00 2001 From: Nithyaa shri R B Date: Fri, 13 Jun 2025 15:32:04 +0530 Subject: [PATCH 5/5] am62/am24: udma: Remove the reserved object types - Remove Drvobj, chobj, eventobj, flowobj and ringobj created by the application and use actual structures defined. - Replace all the typecasts as actual structure object memories are passed by the application. Fixes: SITSW-7155 Signed-off-by: Nithyaa shri R B --- docs/change_summary/source/drivers/udma.txt | 4 +- .../doxy_samples/drivers/Udma_sample.c | 6 +- .../mcan_loopback_dma/mcan_loopback_dma.c | 34 +++---- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../a53ss0-0_freertos/ospi_flash_dma.c | 4 +- .../a53ss0-0_nortos/ospi_flash_dma.c | 4 +- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../r5fss0-0_nortos/ospi_flash_dma.c | 4 +- .../udma/udma_adc_read/udma_adc_read.c | 8 +- .../udma/udma_sw_trigger/udma_sw_trigger.c | 6 +- .../drivers/mcan/v0/dma/udma/canfd_dma_udma.c | 28 +++--- .../mcspi/v0/lld/dma/udma/mcspi_dma_udma.c | 4 +- source/drivers/udma.h | 9 +- source/drivers/udma/include/udma_ch.h | 13 +-- source/drivers/udma/include/udma_event.h | 9 +- source/drivers/udma/include/udma_flow.h | 9 +- source/drivers/udma/include/udma_ring.h | 9 +- source/drivers/udma/include/udma_types.h | 72 +++++++-------- source/drivers/udma/v0/udma.c | 13 +-- source/drivers/udma/v0/udma_ch.c | 84 ++++++++--------- source/drivers/udma/v0/udma_event.c | 72 +++++++-------- source/drivers/udma/v0/udma_flow.c | 28 +++--- source/drivers/udma/v0/udma_ring_common.c | 46 +++++----- source/drivers/udma/v0/udma_ring_lcdma.c | 4 +- source/drivers/udma/v0/udma_rm.c | 4 +- source/drivers/udma/v0/udma_utils.c | 4 +- source/drivers/udma/v1/udma.c | 13 +-- source/drivers/udma/v1/udma_ch.c | 90 +++++++++---------- source/drivers/udma/v1/udma_event.c | 70 +++++++-------- source/drivers/udma/v1/udma_flow.c | 20 ++--- source/drivers/udma/v1/udma_ring_common.c | 46 +++++----- source/drivers/udma/v1/udma_ring_normal.c | 4 +- source/drivers/udma/v1/udma_rm.c | 4 +- test/drivers/adc/st_adcDmaMode.c | 8 +- test/drivers/udma/udma_test_blkcpy.c | 8 +- test/drivers/udma/udma_test_bug.c | 4 +- test/drivers/udma/udma_test_ch.c | 16 ++-- test/drivers/udma/udma_test_common.c | 4 +- test/drivers/udma/udma_test_flow.c | 8 +- test/drivers/udma/udma_test_parser.c | 2 +- test/drivers/udma/udma_test_ring.c | 44 ++++----- 43 files changed, 391 insertions(+), 444 deletions(-) diff --git a/docs/change_summary/source/drivers/udma.txt b/docs/change_summary/source/drivers/udma.txt index 1c813279eb3..34ac954ae79 100644 --- a/docs/change_summary/source/drivers/udma.txt +++ b/docs/change_summary/source/drivers/udma.txt @@ -64,8 +64,8 @@ index 5b31c3d924..5c988d3bcc 100755 + if(drvHandle != NULL && chHandle != NULL) + { + /*Map l2g event for DMA*/ -+ Udma_ChObjectInt *chHandleInt = (Udma_ChObjectInt*)chHandle; -+ Udma_DrvObjectInt *drvHandleInt = (Udma_DrvObjectInt*)drvHandle; ++ Udma_ChObject *chHandleInt = chHandle; ++ Udma_DrvObject *drvHandleInt = drvHandle; + CSL_intaggrMapEventToLocalEvent(&drvHandleInt->iaRegs, + CSL_DMSS_GEM_BCDMA_TRIGGER_OFFSET + chHandleInt->txChNum * 2 , + localeventID ,eventMode); diff --git a/docs_src/docs/api_guide/doxy_samples/drivers/Udma_sample.c b/docs_src/docs/api_guide/doxy_samples/drivers/Udma_sample.c index 6f151767e11..ef783a65c7d 100644 --- a/docs_src/docs/api_guide/doxy_samples/drivers/Udma_sample.c +++ b/docs_src/docs/api_guide/doxy_samples/drivers/Udma_sample.c @@ -6,14 +6,14 @@ Udma_DrvObject gUdmaDrvObj; Udma_ChObject gUdmaChObj; -Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj; +Udma_DrvHandle drvHandle = &gUdmaDrvObj; static uint8_t gTxRingMem[UDMA_CACHELINE_ALIGNMENT] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT))); void ch_open(void) { //! [ch_open] int32_t retVal; - Udma_ChHandle chHandle = (Udma_ChHandle) &gUdmaChObj; + Udma_ChHandle chHandle = &gUdmaChObj; uint32_t chType; Udma_ChPrms chPrms; Udma_ChTxPrms txPrms; @@ -60,7 +60,7 @@ void ch_close(void) { //! [ch_close] int32_t retVal; - Udma_ChHandle chHandle = (Udma_ChHandle) &gUdmaChObj; + Udma_ChHandle chHandle = &gUdmaChObj; retVal = Udma_chDisable(chHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); if(UDMA_SOK != retVal) diff --git a/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c b/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c index df670460388..60c85f03126 100644 --- a/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c +++ b/examples/drivers/mcan/mcan_loopback_dma/mcan_loopback_dma.c @@ -196,7 +196,7 @@ void mcan_loopback_dma_main(void *args) DebugP_assert(SystemP_SUCCESS == status); /* Get the UDMA driver instance handle */ - App_udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + App_udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; /* Initialize the data buffers */ for (i=0; iflashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c index 25b2a99c005..500d9d5c308 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am243x-lp/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c index 6bac1733d63..e8149567bc3 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_freertos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c index 6bac1733d63..e8149567bc3 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/a53ss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c index 25b2a99c005..500d9d5c308 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-evm/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c index 25b2a99c005..500d9d5c308 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am64x-sk/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c b/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c index ea4a6b7b98b..4004145bb89 100644 --- a/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c +++ b/examples/drivers/ospi/ospi_flash_dma/am65x-idk/r5fss0-0_nortos/ospi_flash_dma.c @@ -180,7 +180,7 @@ int32_t App_OspiFlashDmaInit(App_OspiFlashDmaObj *appObj) appObj->flashHandle = gFlashHandle[CONFIG_FLASH0]; appObj->ospiHandle = OSPI_getHandle(CONFIG_OSPI0); - appObj->udmaDrvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + appObj->udmaDrvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; appObj->udmaChHandle = gConfigUdma0BlkCopyChHandle[CONFIG_UDMA0]; appObj->txTotalTicks = 0U; memset(&appObj->rxTotalTicks, 0, APP_OSPI_FLASH_DMA_REPEAT_CNT * sizeof(uint32_t)); @@ -308,7 +308,7 @@ int32_t App_OspiFlashDmaTrEventRegister(App_OspiFlashDmaObj *appObj) if(NULL != appObj) { - Udma_EventHandle eventHandle = (Udma_EventHandle) &appObj->trEventObj; + Udma_EventHandle eventHandle = &appObj->trEventObj; UdmaEventPrms_init(&appObj->trEventParams); appObj->trEventParams.eventType = UDMA_EVENT_TYPE_TR; appObj->trEventParams.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/examples/drivers/udma/udma_adc_read/udma_adc_read.c b/examples/drivers/udma/udma_adc_read/udma_adc_read.c index 87a163891b7..72eb1f95c61 100644 --- a/examples/drivers/udma/udma_adc_read/udma_adc_read.c +++ b/examples/drivers/udma/udma_adc_read/udma_adc_read.c @@ -133,8 +133,8 @@ static SemaphoreP_Object gUdmaTestDoneSem; void *udma_adc_read_main(void *args) { - Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; - Udma_ChHandle rxChHandle = (Udma_ChHandle) &gUdmaRxChObj; + Udma_DrvHandle drvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; + Udma_ChHandle rxChHandle = &gUdmaRxChObj; /* Open drivers to open the UART driver for console */ Drivers_open(); @@ -280,7 +280,7 @@ static void App_create(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle) DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; + eventHandle = &gUdmaCqEventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -313,7 +313,7 @@ static void App_delete(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle) DebugP_assert(UDMA_SOK == retVal); /* Unregister all events */ - eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; + eventHandle = &gUdmaCqEventObj; retVal = Udma_eventUnRegister(eventHandle); DebugP_assert(UDMA_SOK == retVal); diff --git a/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c b/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c index 1051c521b7d..d994ed17e78 100644 --- a/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c +++ b/examples/drivers/udma/udma_sw_trigger/udma_sw_trigger.c @@ -219,7 +219,7 @@ void *udma_sw_trigger_main(void *args) static void App_udmaTriggerInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Handle) { int32_t retVal; - Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + Udma_DrvHandle drvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; /* Init buffers */ App_udmaInitSrcBuf(&gUdmaTestSrcBuf[0U], UDMA_TEST_NUM_BYTES); @@ -232,7 +232,7 @@ static void App_udmaTriggerInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Handle App_udmaTrpdInit(ch1Handle, 1U, &gUdmaTestTrpdMem[1U][0U], &gUdmaTestDestBuf[0U], &gUdmaTestIndBuf[0U]); /* Register TR event - CH 0 */ - gCh0TrEventHandle = (Udma_EventHandle) &gCh0TrEventObj; + gCh0TrEventHandle = &gCh0TrEventObj; UdmaEventPrms_init(&gCh0TrEventPrms); gCh0TrEventPrms.eventType = UDMA_EVENT_TYPE_TR; gCh0TrEventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -247,7 +247,7 @@ static void App_udmaTriggerInit(Udma_ChHandle ch0Handle, Udma_ChHandle ch1Handle DebugP_assert(UDMA_SOK == retVal); /* Register TR event - CH 1 */ - gCh1TrEventHandle = (Udma_EventHandle) &gCh1TrEventObj; + gCh1TrEventHandle = &gCh1TrEventObj; UdmaEventPrms_init(&gCh1TrEventPrms); gCh1TrEventPrms.eventType = UDMA_EVENT_TYPE_TR; gCh1TrEventPrms.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c b/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c index 2fa11ce70eb..e9af3c21fcf 100644 --- a/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c +++ b/source/drivers/mcan/v0/dma/udma/canfd_dma_udma.c @@ -79,7 +79,7 @@ static void CANFD_udmaIsrTx(Udma_EventHandle eventHandle, CANFD_MessageObject* ptrCanMsgObj = (CANFD_MessageObject *)(args); CANFD_Object *ptrCanFdObj = ptrCanMsgObj->canfdHandle->object; CANFD_UdmaChConfig *udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - Udma_ChHandle txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + Udma_ChHandle txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; ptrCanMsgObj->dmaMsgConfig.currentMsgNum++; currentDataPtr = (uint8_t *)(ptrCanMsgObj->dmaMsgConfig.data); @@ -107,7 +107,7 @@ int32_t CANFD_createDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - canfdUdmaHandle = (Udma_DrvHandle) ptrCanFdObj->canfdDmaHandle; + canfdUdmaHandle = ptrCanFdObj->canfdDmaHandle; /* Check the free Tx dma event to program */ for (i = 0U; i < MCAN_MAX_TX_DMA_BUFFERS; i++) @@ -133,7 +133,7 @@ int32_t CANFD_createDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag chPrms.fqRingPrms.ringMem = udmaChCfg->txRingMem[ptrCanMsgObj->dmaEventNo]; chPrms.fqRingPrms.ringMemSize = udmaChCfg->ringMemSize; chPrms.fqRingPrms.elemCnt = udmaChCfg->ringElemCnt; - txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; /* Open channel for block copy */ retVal = Udma_chOpen(canfdUdmaHandle, txChHandle, chType, &chPrms); @@ -145,7 +145,7 @@ int32_t CANFD_createDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = (Udma_EventHandle) udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -172,8 +172,8 @@ int32_t CANFD_deleteDmaTxMsgObject(const CANFD_Object *ptrCanFdObj, const CANFD_ if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; - eventHandle = (Udma_EventHandle) udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; + txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = udmaChCfg->cqTxEvtHandle[ptrCanMsgObj->dmaEventNo]; /* Disable Channel */ status = Udma_chDisable(txChHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); @@ -272,7 +272,7 @@ int32_t CANFD_configureDmaTx(const CANFD_Object *ptrCanFdObj, CANFD_MessageObjec if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - txChHandle = (Udma_ChHandle) udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; + txChHandle = udmaChCfg->txChHandle[ptrCanMsgObj->dmaEventNo]; /* Store the current Tx msg. */ ptrCanMsgObj->dmaMsgConfig.dataLengthPerMsg = dataLengthPerMsg; @@ -325,7 +325,7 @@ static void CANFD_udmaIsrRx(Udma_EventHandle eventHandle, CANFD_MessageObject* ptrCanMsgObj = (CANFD_MessageObject *)(args); CANFD_Object *ptrCanFdObj = ptrCanMsgObj->canfdHandle->object; CANFD_UdmaChConfig *udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - Udma_ChHandle rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + Udma_ChHandle rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; uint8_t *currentDataPtr; uint64_t pDesc; @@ -353,7 +353,7 @@ int32_t CANFD_createDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { - canfdUdmaHandle = (Udma_DrvHandle) ptrCanFdObj->canfdDmaHandle; + canfdUdmaHandle = ptrCanFdObj->canfdDmaHandle; udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; ptrCanMsgObj->dmaEventNo = ptrCanMsgObj->rxElement; if(ptrCanMsgObj->dmaEventNo < MCAN_MAX_RX_DMA_BUFFERS) @@ -365,7 +365,7 @@ int32_t CANFD_createDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag chPrms.fqRingPrms.ringMem = udmaChCfg->rxRingMem[ptrCanMsgObj->dmaEventNo]; chPrms.fqRingPrms.ringMemSize = udmaChCfg->ringMemSize; chPrms.fqRingPrms.elemCnt = udmaChCfg->ringElemCnt; - rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; /* Open channel for block copy */ retVal = Udma_chOpen(canfdUdmaHandle, rxChHandle, chType, &chPrms); @@ -377,7 +377,7 @@ int32_t CANFD_createDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, CANFD_Messag DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = (Udma_EventHandle) udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -404,8 +404,8 @@ int32_t CANFD_deleteDmaRxMsgObject(const CANFD_Object *ptrCanFdObj, const CANFD_ if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg; - rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; - eventHandle = (Udma_EventHandle) udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; + rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + eventHandle = udmaChCfg->cqRxEvtHandle[ptrCanMsgObj->dmaEventNo]; /* Disable Channel */ status = Udma_chDisable(rxChHandle, UDMA_DEFAULT_CH_DISABLE_TIMEOUT); @@ -449,7 +449,7 @@ int32_t CANFD_configureDmaRx(const CANFD_Object *ptrCanFdObj, CANFD_MessageObjec if((NULL_PTR != ptrCanFdObj) && (NULL_PTR != ptrCanMsgObj)) { udmaChCfg = (CANFD_UdmaChConfig *)ptrCanFdObj->canfdDmaChCfg;; - rxChHandle = (Udma_ChHandle) udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; + rxChHandle = udmaChCfg->rxChHandle[ptrCanMsgObj->dmaEventNo]; /* Store the current Rx msg. */ ptrCanMsgObj->dmaMsgConfig.dataLengthPerMsg = dataLengthPerMsg; diff --git a/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c b/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c index beec5ab1318..3c8a11ac886 100644 --- a/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c +++ b/source/drivers/mcspi/v0/lld/dma/udma/mcspi_dma_udma.c @@ -285,7 +285,7 @@ static int32_t MCSPI_udmaInitRxCh(MCSPILLD_Handle hMcspi, const MCSPI_ChObject * DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = (Udma_EventHandle) dmaChConfig->cqRxEvtHandle; + eventHandle = dmaChConfig->cqRxEvtHandle; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -347,7 +347,7 @@ static int32_t MCSPI_udmaInitTxCh(MCSPILLD_Handle hMcspi, const MCSPI_ChObject * DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = (Udma_EventHandle) dmaChConfig->cqTxEvtHandle; + eventHandle = dmaChConfig->cqTxEvtHandle; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/source/drivers/udma.h b/source/drivers/udma.h index 8510555199f..b9336b87fa1 100755 --- a/source/drivers/udma.h +++ b/source/drivers/udma.h @@ -213,14 +213,7 @@ void *Udma_defaultPhyToVirtFxn(uint64_t phyAddr, /* Internal/Private Structure Declarations */ /* ========================================================================== */ -/** - * \brief Opaque UDMA driver object. - */ -typedef struct Udma_DrvObject_t -{ - uintptr_t rsv[635U]; - /**< reserved, should NOT be modified by end users */ -} Udma_DrvObject; +/* None */ #ifdef __cplusplus } diff --git a/source/drivers/udma/include/udma_ch.h b/source/drivers/udma/include/udma_ch.h index 88e214609d2..422f66d1526 100755 --- a/source/drivers/udma/include/udma_ch.h +++ b/source/drivers/udma/include/udma_ch.h @@ -663,18 +663,7 @@ int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, /* Internal/Private Structure Declarations */ /* ========================================================================== */ -/** - * \brief Opaque UDMA channel object. - */ -typedef struct Udma_ChObject_t -{ - #if defined (SOC_AM65X) - uintptr_t rsv[200U]; - #else - uintptr_t rsv[150U]; - #endif - /**< reserved, should NOT be modified by end users */ -} Udma_ChObject; +/* None */ #ifdef __cplusplus } diff --git a/source/drivers/udma/include/udma_event.h b/source/drivers/udma/include/udma_event.h index 8df4d5dd12c..32fe1b903c2 100755 --- a/source/drivers/udma/include/udma_event.h +++ b/source/drivers/udma/include/udma_event.h @@ -353,14 +353,7 @@ void UdmaEventPrms_init(Udma_EventPrms *eventPrms); /* Internal/Private Structure Declarations */ /* ========================================================================== */ -/** - * \brief Opaque UDMA event object. - */ -typedef struct Udma_EventObject_t -{ - uintptr_t rsv[40U]; - /**< reserved, should NOT be modified by end users */ -} Udma_EventObject; +/* None */ #ifdef __cplusplus } diff --git a/source/drivers/udma/include/udma_flow.h b/source/drivers/udma/include/udma_flow.h index 478ddc2b450..9f8409075f9 100755 --- a/source/drivers/udma/include/udma_flow.h +++ b/source/drivers/udma/include/udma_flow.h @@ -298,14 +298,7 @@ void UdmaFlowPrms_init(Udma_FlowPrms *flowPrms, uint32_t chType); /* Internal/Private Structure Declarations */ /* ========================================================================== */ -/** - * \brief Opaque UDMA flow object. - */ -typedef struct Udma_FlowObject_t -{ - uintptr_t rsv[6U]; - /**< reserved, should NOT be modified by end users */ -} Udma_FlowObject; +/* None */ #ifdef __cplusplus } diff --git a/source/drivers/udma/include/udma_ring.h b/source/drivers/udma/include/udma_ring.h index bb228bec343..1995ffde982 100755 --- a/source/drivers/udma/include/udma_ring.h +++ b/source/drivers/udma/include/udma_ring.h @@ -526,14 +526,7 @@ void UdmaRingPrms_init(Udma_RingPrms *ringPrms); /* Internal/Private Structure Declarations */ /* ========================================================================== */ -/** - * \brief Opaque UDMA ring object. - */ -typedef struct Udma_RingObject_t -{ - uintptr_t rsv[30U]; - /**< reserved, should NOT be modified by end users */ -} Udma_RingObject; +/* None */ #ifdef __cplusplus } diff --git a/source/drivers/udma/include/udma_types.h b/source/drivers/udma/include/udma_types.h index 3c074670283..c4cc6b37daf 100755 --- a/source/drivers/udma/include/udma_types.h +++ b/source/drivers/udma/include/udma_types.h @@ -81,15 +81,15 @@ typedef struct Udma_RingMonObj * Udma_RingMonHandle; #endif /** \brief UDMA driver handle */ -typedef struct Udma_DrvObjectInt_t *Udma_DrvHandle; +typedef struct Udma_DrvObjectInt *Udma_DrvHandle; /** \brief UDMA channel handle */ -typedef struct Udma_ChObjectInt_t *Udma_ChHandle; -/** \brief UDMA event handle */ -typedef struct Udma_EventObjectInt_t *Udma_EventHandle; +typedef struct Udma_ChObjectInt *Udma_ChHandle; +/** \brief UDMA event handle */ +typedef struct Udma_EventObjectInt *Udma_EventHandle; /** \brief UDMA ring handle */ -typedef struct Udma_RingObjectInt_t *Udma_RingHandle; +typedef struct Udma_RingObjectInt *Udma_RingHandle; /** \brief UDMA flow handle */ -typedef struct Udma_FlowObjectInt_t *Udma_FlowHandle; +typedef struct Udma_FlowObjectInt *Udma_FlowHandle; /** * \brief UDMA ring parameters. @@ -758,7 +758,7 @@ typedef struct * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_RingObjectInt_t +typedef struct Udma_RingObjectInt { Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ @@ -800,7 +800,7 @@ typedef struct Udma_RingObjectInt_t * * For unmapped case, this will be #UDMA_DMA_CH_INVALID. */ -} Udma_RingObjectInt; +} Udma_RingObject; /** * \brief UDMA flow object. @@ -808,7 +808,7 @@ typedef struct Udma_RingObjectInt_t * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_FlowObjectInt_t +typedef struct Udma_FlowObjectInt { Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ @@ -848,7 +848,7 @@ typedef struct Udma_FlowObjectInt_t * * For unmapped case, this will be #UDMA_DMA_CH_INVALID. */ -} Udma_FlowObjectInt; +} Udma_FlowObject; /** * \brief UDMA event object. @@ -856,7 +856,7 @@ typedef struct Udma_FlowObjectInt_t * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_EventObjectInt_t +typedef struct Udma_EventObjectInt { Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ @@ -900,7 +900,7 @@ typedef struct Udma_EventObjectInt_t uint32_t eventInitDone; /**< Flag to set the event object is init. */ -} Udma_EventObjectInt; +} Udma_EventObject; /** * \brief UDMA channel object. @@ -908,7 +908,7 @@ typedef struct Udma_EventObjectInt_t * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_ChObjectInt_t +typedef struct Udma_ChObjectInt { uint32_t chType; /**< UDMA channel type. Refer \ref Udma_ChType. */ @@ -945,20 +945,20 @@ typedef struct Udma_ChObjectInt_t Udma_RingHandle tdCqRing; /**< Teardown completion queue ring handle */ - Udma_RingObjectInt fqRingObj; + Udma_RingObject fqRingObj; /**< Free queue ring object */ - Udma_RingObjectInt cqRingObj; + Udma_RingObject cqRingObj; /**< Completion queue ring object * Not used for AM64x kind of devices, where there is no seperate Completion queue. */ - Udma_RingObjectInt tdCqRingObj; + Udma_RingObject tdCqRingObj; /**< Teardown completion queue ring object * Not used for AM64x kind of devices, where teardown function is not present. */ Udma_FlowHandle defaultFlow; /**< Default flow handle */ - Udma_FlowObjectInt defaultFlowObj; + Udma_FlowObject defaultFlowObj; /**< Default flow object - Flow ID equal to the RX channel is reserved * as the default flow for the channel. This object is used for * providing handle to the caller to re-program the default flow using @@ -1011,7 +1011,7 @@ typedef struct Udma_ChObjectInt_t uint32_t trigger; /**< Channel trigger used when chaining channels - needed at the time of * breaking the chaining */ -} Udma_ChObjectInt; +} Udma_ChObject; /** * \brief UDMA resource manager init parameters. @@ -1141,7 +1141,7 @@ typedef struct * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_DrvObjectInt_t +typedef struct Udma_DrvObjectInt { uint32_t instType; /**< Udma Instance Type */ @@ -1238,7 +1238,7 @@ typedef struct Udma_DrvObjectInt_t /**< UDMAP trigger global event map offset to differentiate between main * and MCU NAVSS */ - Udma_EventObjectInt globalEventObj; + Udma_EventObject globalEventObj; /**< Object to store global event. */ Udma_EventHandle globalEventHandle; /**< Global event handle. */ @@ -1304,7 +1304,7 @@ typedef struct Udma_DrvObjectInt_t /**< Mutex to protect RM allocation. */ SemaphoreP_Object rmLockObj; /**< Mutex object. */ -} Udma_DrvObjectInt; +} Udma_DrvObject; #else /** * \brief UDMA resource manager init parameters. @@ -1440,7 +1440,7 @@ typedef struct * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_RingObjectInt_t +typedef struct Udma_RingObjectInt { Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ @@ -1482,7 +1482,7 @@ typedef struct Udma_RingObjectInt_t * * For unmapped case, this will be #UDMA_DMA_CH_INVALID. */ -} Udma_RingObjectInt; +} Udma_RingObject; /** * \brief UDMA flow object. @@ -1490,7 +1490,7 @@ typedef struct Udma_RingObjectInt_t * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_FlowObjectInt_t +typedef struct Udma_FlowObjectInt { Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ @@ -1530,7 +1530,7 @@ typedef struct Udma_FlowObjectInt_t * * For unmapped case, this will be #UDMA_DMA_CH_INVALID. */ -} Udma_FlowObjectInt; +} Udma_FlowObject; /** * \brief UDMA event object. @@ -1538,7 +1538,7 @@ typedef struct Udma_FlowObjectInt_t * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_EventObjectInt_t +typedef struct Udma_EventObjectInt { Udma_DrvHandle drvHandle; /**< Pointer to global driver handle. */ @@ -1582,7 +1582,7 @@ typedef struct Udma_EventObjectInt_t uint32_t eventInitDone; /**< Flag to set the event object is init. */ -} Udma_EventObjectInt; +} Udma_EventObject; /** * \brief UDMA channel object. @@ -1590,7 +1590,7 @@ typedef struct Udma_EventObjectInt_t * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_ChObjectInt_t +typedef struct Udma_ChObjectInt { uint32_t chType; /**< UDMA channel type. Refer \ref Udma_ChType. */ @@ -1626,20 +1626,20 @@ typedef struct Udma_ChObjectInt_t Udma_RingHandle tdCqRing; /**< Teardown completion queue ring handle */ - Udma_RingObjectInt fqRingObj; + Udma_RingObject fqRingObj; /**< Free queue ring object */ - Udma_RingObjectInt cqRingObj; + Udma_RingObject cqRingObj; /**< Completion queue ring object * Not used for AM64x kind of devices, where there is no seperate Completion queue. */ - Udma_RingObjectInt tdCqRingObj; + Udma_RingObject tdCqRingObj; /**< Teardown completion queue ring object * Not used for AM64x kind of devices, where teardown function is not present. */ Udma_FlowHandle defaultFlow; /**< Default flow handle */ - Udma_FlowObjectInt defaultFlowObj; + Udma_FlowObject defaultFlowObj; /**< Default flow object - Flow ID equal to the RX channel is reserved * as the default flow for the channel. This object is used for * providing handle to the caller to re-program the default flow using @@ -1674,14 +1674,14 @@ typedef struct Udma_ChObjectInt_t uint32_t trigger; /**< Channel trigger used when chaining channels - needed at the time of * breaking the chaining */ -} Udma_ChObjectInt; +} Udma_ChObject; /** * \brief UDMA driver object. * * Note: This is an internal/private driver structure and should not be * used or modified by caller. */ -typedef struct Udma_DrvObjectInt_t +typedef struct Udma_DrvObjectInt { uint32_t instType; /**< Udma Instance Type */ @@ -1785,7 +1785,7 @@ typedef struct Udma_DrvObjectInt_t /**< UDMAP trigger global event map offset to differentiate between main * and MCU NAVSS */ - Udma_EventObjectInt globalEventObj; + Udma_EventObject globalEventObj; /**< Object to store global event. */ Udma_EventHandle globalEventHandle; /**< Global event handle. */ @@ -1838,7 +1838,7 @@ typedef struct Udma_DrvObjectInt_t /**< Mutex to protect RM allocation. */ SemaphoreP_Object rmLockObj; /**< Mutex object. */ -} Udma_DrvObjectInt; +} Udma_DrvObject; #endif diff --git a/source/drivers/udma/v0/udma.c b/source/drivers/udma/v0/udma.c index 75e2398f40c..70ef4dd6514 100644 --- a/source/drivers/udma/v0/udma.c +++ b/source/drivers/udma/v0/udma.c @@ -76,13 +76,6 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandleInt; - /* Structure size assert */ - DebugP_assert(sizeof(Udma_DrvObjectInt) <= sizeof(Udma_DrvObject)); - DebugP_assert(sizeof(Udma_ChObjectInt) <= sizeof(Udma_ChObject)); - DebugP_assert(sizeof(Udma_EventObjectInt) <= sizeof(Udma_EventObject)); - DebugP_assert(sizeof(Udma_RingObjectInt) <= sizeof(Udma_RingObject)); - DebugP_assert(sizeof(Udma_FlowObjectInt) <= sizeof(Udma_FlowObject)); - if((drvHandle == NULL_PTR) || (initPrms == NULL_PTR)) { retVal = UDMA_EBADARGS; @@ -90,7 +83,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandle) drvHandle; + drvHandleInt = drvHandle; (void) memset(drvHandleInt, 0, sizeof(*drvHandleInt)); (void) memcpy(&drvHandleInt->initPrms, initPrms, sizeof(Udma_InitPrms)); UdmaRmInitPrms_init(initPrms->instId, &drvHandleInt->rmInitPrms); @@ -136,7 +129,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) int32_t Udma_deinit(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_DrvHandle drvHandleInt = drvHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (drvHandleInt->drvInitDone != UDMA_INIT_DONE)) @@ -153,7 +146,7 @@ int32_t Udma_deinit(Udma_DrvHandle drvHandle) { DebugP_logError("[UDMA] Global event free failed!!!\r\n"); } - drvHandleInt->globalEventHandle = (Udma_EventHandle) NULL_PTR; + drvHandleInt->globalEventHandle = NULL_PTR; } retVal += Udma_rmDeinit(drvHandleInt); diff --git a/source/drivers/udma/v0/udma_ch.c b/source/drivers/udma/v0/udma_ch.c index a6b990f6c30..add18f15abd 100644 --- a/source/drivers/udma/v0/udma_ch.c +++ b/source/drivers/udma/v0/udma_ch.c @@ -121,7 +121,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, int32_t retVal = UDMA_SOK, tempRetVal; uint32_t allocDone = (uint32_t) FALSE; Udma_ChHandle chHandleInt; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_DrvHandle drvHandleInt = drvHandle; /* Error check */ if((drvHandleInt == NULL_PTR) || (NULL_PTR == chHandle) || (NULL_PTR == chPrms)) @@ -144,7 +144,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - chHandleInt = (Udma_ChHandle) chHandle; + chHandleInt = chHandle; (void) memset(chHandleInt, 0, sizeof(Udma_ChObject)); (void) memcpy(&chHandleInt->chPrms, chPrms, sizeof(Udma_ChPrms)); chHandleInt->chType = chType; @@ -154,9 +154,9 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, chHandleInt->extChNum = UDMA_DMA_CH_INVALID; chHandleInt->pdmaChNum = UDMA_DMA_CH_INVALID; chHandleInt->peerThreadId = UDMA_THREAD_ID_INVALID; - chHandleInt->fqRing = (Udma_RingHandle) NULL_PTR; - chHandleInt->cqRing = (Udma_RingHandle) NULL_PTR; - chHandleInt->tdCqRing = (Udma_RingHandle) NULL_PTR; + chHandleInt->fqRing = NULL_PTR; + chHandleInt->cqRing = NULL_PTR; + chHandleInt->tdCqRing = NULL_PTR; UdmaChTxPrms_init(&chHandleInt->txPrms, chType); UdmaChRxPrms_init(&chHandleInt->rxPrms, chType); Udma_chInitRegs(chHandleInt); @@ -212,7 +212,7 @@ int32_t Udma_chClose(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -263,7 +263,7 @@ int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; struct tisci_msg_rm_udmap_tx_ch_cfg_req rmUdmaTxReq; struct tisci_msg_rm_udmap_tx_ch_cfg_resp rmUdmaTxResp; @@ -366,7 +366,7 @@ int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; struct tisci_msg_rm_udmap_rx_ch_cfg_req rmUdmaRxReq; struct tisci_msg_rm_udmap_rx_ch_cfg_resp rmUdmaRxResp; Udma_FlowPrms flowPrms; @@ -517,7 +517,7 @@ int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, int32_t retVal = UDMA_SOK; volatile uint32_t *PEER8=NULL, *PEER0=NULL, *PEER1=NULL; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -590,7 +590,7 @@ int32_t Udma_chEnable(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -619,7 +619,7 @@ int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -662,7 +662,7 @@ int32_t Udma_chPause(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -709,7 +709,7 @@ int32_t Udma_chResume(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -756,7 +756,7 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle) int32_t retVal = UDMA_SOK; uint32_t chNum = UDMA_DMA_CH_INVALID; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -792,9 +792,9 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle) Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_RingHandle fqRing = (Udma_RingHandle) NULL_PTR; + Udma_RingHandle fqRing = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -812,7 +812,7 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - fqRing = (Udma_RingHandle) chHandleInt->fqRing; + fqRing = chHandleInt->fqRing; } return (fqRing); @@ -821,9 +821,9 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_RingHandle cqRing = (Udma_RingHandle) NULL_PTR; + Udma_RingHandle cqRing = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -841,7 +841,7 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - cqRing = (Udma_RingHandle) chHandleInt->cqRing; + cqRing = chHandleInt->cqRing; } return (cqRing); @@ -850,9 +850,9 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_RingHandle tdCqRing = (Udma_RingHandle) NULL_PTR; + Udma_RingHandle tdCqRing = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -870,7 +870,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - tdCqRing = (Udma_RingHandle) chHandleInt->tdCqRing; + tdCqRing = chHandleInt->tdCqRing; } return (tdCqRing); @@ -907,9 +907,9 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_FlowHandle defaultFlow = (Udma_FlowHandle) NULL_PTR; + Udma_FlowHandle defaultFlow = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -927,7 +927,7 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - defaultFlow = (Udma_FlowHandle) chHandleInt->defaultFlow; + defaultFlow = chHandleInt->defaultFlow; } return (defaultFlow); @@ -938,7 +938,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) int32_t retVal = UDMA_SOK; uint32_t triggerEvent = UDMA_EVENT_INVALID; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -1010,7 +1010,7 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1112,8 +1112,8 @@ int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; - Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; + Udma_ChHandle triggerChHandleInt = triggerChHandle; + Udma_ChHandle chainedChHandleInt = chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_set_req rmIrqReq; struct tisci_msg_rm_irq_set_resp rmIrqResp; @@ -1235,8 +1235,8 @@ int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; - Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; + Udma_ChHandle triggerChHandleInt = triggerChHandle; + Udma_ChHandle chainedChHandleInt = chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_release_req rmIrqReq; @@ -1468,7 +1468,7 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; uint32_t chNum; #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1) CSL_BcdmaChanStats bcdmaChanStats = {0}; @@ -1561,7 +1561,7 @@ int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) int32_t retVal = UDMA_SOK; volatile uint32_t *PEER4=NULL; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1609,7 +1609,7 @@ int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData) int32_t retVal = UDMA_SOK; volatile uint32_t *PEER4=NULL; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1905,7 +1905,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) &chHandle->chPrms.fqRingPrms); if(UDMA_SOK != retVal) { - chHandle->fqRing = (Udma_RingHandle) NULL_PTR; + chHandle->fqRing = NULL_PTR; DebugP_logError("[UDMA] FQ ring alloc failed!!!\r\n"); } else if(((chHandle->chType & UDMA_CH_FLAG_MAPPED) == UDMA_CH_FLAG_MAPPED) && @@ -1929,7 +1929,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { /* In devices like AM64x, teardown is not supported.*/ - chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; + chHandle->tdCqRing = NULL_PTR; } if(UDMA_SOK != retVal) @@ -2026,11 +2026,11 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) chHandle->rxChNum = UDMA_DMA_CH_INVALID; } - chHandle->defaultFlowObj.drvHandle = (Udma_DrvHandle) NULL_PTR; + chHandle->defaultFlowObj.drvHandle = NULL_PTR; chHandle->defaultFlowObj.flowStart = UDMA_FLOW_INVALID; chHandle->defaultFlowObj.flowCnt = 0U; chHandle->defaultFlowObj.flowInitDone = UDMA_DEINIT_DONE; - chHandle->defaultFlow = (Udma_FlowHandle) NULL_PTR; + chHandle->defaultFlow = NULL_PTR; } chHandle->pdmaChNum = UDMA_DMA_CH_INVALID; chHandle->peerThreadId = UDMA_THREAD_ID_INVALID; @@ -2042,11 +2042,11 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { DebugP_logError("[UDMA] RM Free FQ ring failed!!!\r\n"); } - chHandle->fqRing = (Udma_RingHandle) NULL_PTR; + chHandle->fqRing = NULL_PTR; } if(NULL_PTR != chHandle->cqRing) { - chHandle->cqRing = (Udma_RingHandle) NULL_PTR; + chHandle->cqRing = NULL_PTR; } if(NULL_PTR != chHandle->tdCqRing) { @@ -2055,7 +2055,7 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { DebugP_logError("[UDMA] RM Free TDCQ ring failed!!!\r\n"); } - chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; + chHandle->tdCqRing = NULL_PTR; } return (retVal); diff --git a/source/drivers/udma/v0/udma_event.c b/source/drivers/udma/v0/udma_event.c index 873c0263417..b3577256fb2 100644 --- a/source/drivers/udma/v0/udma_event.c +++ b/source/drivers/udma/v0/udma_event.c @@ -103,7 +103,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandle) drvHandle; + drvHandleInt = drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -118,7 +118,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - eventHandleInt = (Udma_EventHandle) eventHandle; + eventHandleInt = eventHandle; (void) memcpy( &eventHandleInt->eventPrms, eventPrms, sizeof(eventHandleInt->eventPrms)); eventHandleInt->drvHandle = drvHandleInt; @@ -127,8 +127,8 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, eventHandleInt->vintrBitNum = UDMA_EVENT_INVALID; eventHandleInt->irIntrNum = UDMA_INTR_INVALID; eventHandleInt->coreIntrNum = UDMA_INTR_INVALID; - eventHandleInt->nextEvent = (Udma_EventHandle) NULL_PTR; - eventHandleInt->prevEvent = (Udma_EventHandle) NULL_PTR; + eventHandleInt->nextEvent = NULL_PTR; + eventHandleInt->prevEvent = NULL_PTR; eventHandleInt->hwiHandle = NULL_PTR; eventHandleInt->vintrBitAllocFlag = 0U; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; @@ -215,9 +215,9 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, /* Copy core number from master handle */ /* Copy from master handle */ eventPrms->vintrNum = - ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; + ( (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; eventPrms->coreIntrNum = - ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; + ( (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; } /* Copy the same info to eventHandleInt->eventPrms*/ eventHandleInt->eventPrms.intrStatusReg = eventPrms->intrStatusReg; @@ -244,7 +244,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) } if(UDMA_SOK == retVal) { - eventHandleInt = (Udma_EventHandle) eventHandle; + eventHandleInt = eventHandle; drvHandle = eventHandleInt->drvHandle; if((NULL_PTR == drvHandle) || (drvHandle->drvInitDone != UDMA_INIT_DONE)) { @@ -285,7 +285,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) eventHandleInt->eventInitDone = UDMA_DEINIT_DONE; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; eventHandleInt->pIaVintrRegs = (volatile CSL_intaggr_intrRegs_vint *) NULL_PTR; - eventHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + eventHandleInt->drvHandle = NULL_PTR; } } } @@ -296,7 +296,7 @@ uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) { uint32_t evtNum = UDMA_EVENT_INVALID; Udma_DrvHandle drvHandle; - Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; + Udma_EventHandle eventHandleInt = eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -317,7 +317,7 @@ int32_t Udma_eventDisable(Udma_EventHandle eventHandle) Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; + Udma_EventHandle eventHandleInt = eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -349,7 +349,7 @@ int32_t Udma_eventEnable(Udma_EventHandle eventHandle) Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; + Udma_EventHandle eventHandleInt = eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -379,7 +379,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandleInt; - Udma_EventHandle eventHandle = (Udma_EventHandle) NULL_PTR; + Udma_EventHandle eventHandle = NULL_PTR; /* Error check */ if(NULL_PTR == drvHandle) @@ -388,7 +388,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandle) drvHandle; + drvHandleInt = drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -396,7 +396,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) } if(UDMA_SOK == retVal) { - eventHandle = (Udma_EventHandle) drvHandleInt->globalEventHandle; + eventHandle = drvHandleInt->globalEventHandle; } return (eventHandle); @@ -408,9 +408,9 @@ void UdmaEventPrms_init(Udma_EventPrms *eventPrms) { eventPrms->eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms->eventMode = UDMA_EVENT_MODE_SHARED; - eventPrms->chHandle = (Udma_ChHandle) NULL_PTR; - eventPrms->ringHandle = (Udma_RingHandle) NULL_PTR; - eventPrms->controllerEventHandle = (Udma_EventHandle) NULL_PTR; + eventPrms->chHandle = NULL_PTR; + eventPrms->ringHandle = NULL_PTR; + eventPrms->controllerEventHandle = NULL_PTR; eventPrms->eventCb = (Udma_EventCallback) NULL_PTR; eventPrms->intrPriority = 1U; eventPrms->appData = NULL_PTR; @@ -430,7 +430,7 @@ static void Udma_eventIsrFxn(void *args) uint32_t vintrBitNum; uint32_t vintrNum; uint32_t teardownStatus; - Udma_EventHandle eventHandle = (Udma_EventHandle) args; + Udma_EventHandle eventHandle = args; Udma_DrvHandle drvHandle; Udma_EventPrms *eventPrms; Udma_RingHandle ringHandle; @@ -464,7 +464,7 @@ static void Udma_eventIsrFxn(void *args) (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - ringHandle = ((Udma_ChHandle) (eventPrms->chHandle))->cqRing; + ringHandle = ( (eventPrms->chHandle))->cqRing; /* Read the teardown status bit in the Reverse Ring Occupancy register */ if( CSL_lcdma_ringaccIsTeardownComplete(&ringHandle->drvHandle->lcdmaRaRegs, ringHandle->ringNum) == TRUE ) @@ -529,7 +529,7 @@ static int32_t Udma_eventCheckParams(Udma_DrvHandle drvHandle, * interrupt registered, all slaves should have a callback as IA * is same and there is no individual control to disable * interrupt */ - controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; + controllerEventHandle = eventPrms->controllerEventHandle; if(((Udma_EventCallback) NULL_PTR != controllerEventHandle->eventPrms.eventCb) && ((Udma_EventCallback) NULL_PTR == eventPrms->eventCb)) { @@ -629,7 +629,7 @@ static int32_t Udma_eventCheckUnRegister(Udma_DrvHandle drvHandle, if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - ringHandle = ((Udma_ChHandle) (eventPrms->chHandle))->cqRing; + ringHandle = ( (eventPrms->chHandle))->cqRing; } else { @@ -751,12 +751,12 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, cookie = HwiP_disable(); /* Link shared events to master event */ - eventHandle->prevEvent = (Udma_EventHandle) NULL_PTR; - eventHandle->nextEvent = (Udma_EventHandle) NULL_PTR; + eventHandle->prevEvent = NULL_PTR; + eventHandle->nextEvent = NULL_PTR; if(NULL_PTR != eventPrms->controllerEventHandle) { /* Go to the last node - insert node at the end */ - lastEvent = (Udma_EventHandle) eventPrms->controllerEventHandle; + lastEvent = eventPrms->controllerEventHandle; while(NULL_PTR != lastEvent->nextEvent) { /* Move to next node */ @@ -775,7 +775,7 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, { Udma_ChHandle chHandle; DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; if(TRUE == chHandle->chOesAllocDone) { @@ -798,7 +798,7 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, else { /* Use master event's info */ - vintrNum = ((Udma_EventHandle) (eventPrms->controllerEventHandle))->vintrNum; + vintrNum = ( (eventPrms->controllerEventHandle))->vintrNum; } DebugP_assert(drvHandle->iaRegs.pIntrRegs != NULL_PTR); eventHandle->pIaVintrRegs = &drvHandle->iaRegs.pIntrRegs->VINT[vintrNum]; @@ -914,7 +914,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ( (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -940,7 +940,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -983,7 +983,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1017,7 +1017,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandle) eventPrms->ringHandle; + ringHandle = eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1132,7 +1132,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ( (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -1157,7 +1157,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_PACKET == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -1200,7 +1200,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1234,7 +1234,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandle) eventPrms->ringHandle; + ringHandle = eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1286,7 +1286,7 @@ static void Udma_eventProgramSteering(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = TRUE; @@ -1307,7 +1307,7 @@ static void Udma_eventResetSteering(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = FALSE; diff --git a/source/drivers/udma/v0/udma_flow.c b/source/drivers/udma/v0/udma_flow.c index 8a2da01f8bc..8e755fac3b6 100644 --- a/source/drivers/udma/v0/udma_flow.c +++ b/source/drivers/udma/v0/udma_flow.c @@ -81,8 +81,8 @@ int32_t Udma_flowAllocMapped(Udma_DrvHandle drvHandle, int32_t retVal = UDMA_SOK; #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) uint32_t mappedFlowNum = UDMA_FLOW_INVALID; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -136,7 +136,7 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if(NULL_PTR == flowHandleInt) @@ -181,7 +181,7 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle) #endif } - flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + flowHandleInt->drvHandle = NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -198,8 +198,8 @@ int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, uint32_t flowCnt) { int32_t retVal = UDMA_SOK; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -237,8 +237,8 @@ int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, { int32_t retVal = UDMA_SOK; #if((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -279,7 +279,7 @@ int32_t Udma_flowAttachMapped(Udma_DrvHandle drvHandle, int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if(NULL_PTR == flowHandleInt) @@ -296,7 +296,7 @@ int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) if(UDMA_SOK == retVal) { - flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + flowHandleInt->drvHandle = NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -313,7 +313,7 @@ int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; struct tisci_msg_rm_udmap_flow_cfg_req rmFlowReq; struct tisci_msg_rm_udmap_flow_cfg_resp rmFlowResp; struct tisci_msg_rm_udmap_flow_size_thresh_cfg_req rmOptFlowReq; @@ -433,7 +433,7 @@ uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowNum = UDMA_FLOW_INVALID; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -454,7 +454,7 @@ uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowCnt = UDMA_FLOW_INVALID; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -476,7 +476,7 @@ void UdmaFlowPrms_init(Udma_FlowPrms *flowPrms, uint32_t chType) (void) chType; /* MISRAC fix: could be used for future. So not removed */ if(NULL_PTR != flowPrms) { - flowPrms->rxChHandle = (Udma_ChHandle) NULL_PTR; + flowPrms->rxChHandle = NULL_PTR; flowPrms->einfoPresent = TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_EINFO_NOT_PRESENT; flowPrms->psInfoPresent = TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PSINFO_NOT_PRESENT; flowPrms->errorHandling = TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_ERR_RETRY; diff --git a/source/drivers/udma/v0/udma_ring_common.c b/source/drivers/udma/v0/udma_ring_common.c index a77433fd780..311737a91e1 100644 --- a/source/drivers/udma/v0/udma_ring_common.c +++ b/source/drivers/udma/v0/udma_ring_common.c @@ -81,8 +81,8 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, int32_t retVal = UDMA_SOK; uint64_t physBase; uint32_t allocDone = (uint32_t) FALSE; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_RingHandle ringHandleInt = ringHandle; struct tisci_msg_rm_ring_cfg_req rmRingReq; struct tisci_msg_rm_ring_cfg_resp rmRingResp; @@ -166,7 +166,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, TISCI_MSG_VALUE_RM_RING_ASEL_VALID; rmRingReq.nav_id = drvHandleInt->devIdRing; rmRingReq.index = ringHandleInt->ringNum; - physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, (Udma_ChHandle) NULL_PTR); + physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, NULL_PTR); rmRingReq.addr_lo = (uint32_t)physBase; rmRingReq.addr_hi = (uint32_t)(physBase >> 32UL); rmRingReq.count = ringPrms->elemCnt; @@ -218,7 +218,7 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -262,7 +262,7 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) ringHandleInt->ringNum = UDMA_RING_INVALID; ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsLcdma(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + ringHandleInt->drvHandle = NULL_PTR; } return (retVal); @@ -273,8 +273,8 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, uint16_t ringNum) { int32_t retVal = UDMA_SOK; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (NULL_PTR == ringHandleInt)) @@ -312,7 +312,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -342,7 +342,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) DebugP_assert(ringHandleInt->ringNum != UDMA_RING_INVALID); ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsLcdma(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + ringHandleInt->drvHandle = NULL_PTR; } @@ -354,7 +354,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) int32_t retVal = UDMA_SOK; uintptr_t cookie; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -390,7 +390,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) int32_t retVal = UDMA_SOK; uintptr_t cookie; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -425,7 +425,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -454,7 +454,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) { - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; Udma_ringPrimeLcdma(ringHandleInt, phyDescMem); @@ -463,7 +463,7 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; Udma_ringPrimeReadLcdma(ringHandleInt, phyDescMem); @@ -472,7 +472,7 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) { - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; Udma_ringSetDoorBellLcdma(ringHandleInt, count); @@ -482,7 +482,7 @@ void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) { uint16_t ringNum = UDMA_RING_INVALID; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; if((NULL_PTR != ringHandleInt) && (UDMA_INIT_DONE == ringHandleInt->ringInitDone)) @@ -496,7 +496,7 @@ uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) { uint8_t *ringMem = NULL_PTR; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; ringMem = Udma_ringGetMemPtrLcdma(ringHandleInt); @@ -506,7 +506,7 @@ uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) { uint32_t ringMode; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; ringMode = Udma_ringGetModeLcdma(ringHandleInt); @@ -516,7 +516,7 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) { uint32_t size = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; size = Udma_ringGetElementCntLcdma(ringHandleInt); @@ -526,7 +526,7 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; occ = Udma_ringGetForwardRingOccLcdma(ringHandleInt); @@ -536,7 +536,7 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; occ = Udma_ringGetReverseRingOccLcdma(ringHandleInt); @@ -546,7 +546,7 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; idx = Udma_ringGetWrIdxLcdma(ringHandleInt); @@ -556,7 +556,7 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; idx = Udma_ringGetRdIdxLcdma(ringHandleInt); diff --git a/source/drivers/udma/v0/udma_ring_lcdma.c b/source/drivers/udma/v0/udma_ring_lcdma.c index f5582296018..f5144bc36b9 100644 --- a/source/drivers/udma/v0/udma_ring_lcdma.c +++ b/source/drivers/udma/v0/udma_ring_lcdma.c @@ -90,7 +90,7 @@ void Udma_ringSetCfgLcdma(Udma_DrvHandle drvHandle, { lcdmaRingCfg->virtBase = (void *) ringPrms->ringMem; lcdmaRingCfg->physBase = - Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, (Udma_ChHandle) NULL_PTR); + Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, NULL_PTR); lcdmaRingCfg->mode = ringPrms->mode; lcdmaRingCfg->elCnt = ringPrms->elemCnt; /* CSL expects ring size in bytes */ @@ -105,7 +105,7 @@ void Udma_ringSetCfgLcdma(Udma_DrvHandle drvHandle, addrLo = CSL_REG32_FEXT(&ringHandle->pLcdmaCfgRegs->BA_LO, LCDMA_RINGACC_RING_CFG_RING_BA_LO_ADDR_LO); lcdmaRingCfg->physBase = (uint64_t)((((uint64_t) addrHi) << 32UL) | ((uint64_t) addrLo)); - lcdmaRingCfg->virtBase = Udma_phyToVirtFxn(lcdmaRingCfg->physBase, drvHandle, (Udma_ChHandle) NULL_PTR); + lcdmaRingCfg->virtBase = Udma_phyToVirtFxn(lcdmaRingCfg->physBase, drvHandle, NULL_PTR); lcdmaRingCfg->mode = CSL_REG32_FEXT(&ringHandle->pLcdmaCfgRegs->SIZE, LCDMA_RINGACC_RING_CFG_RING_SIZE_QMODE); lcdmaRingCfg->elCnt = CSL_REG32_FEXT(&ringHandle->pLcdmaCfgRegs->SIZE, LCDMA_RINGACC_RING_CFG_RING_SIZE_ELCNT); /* CSL expects ring size in bytes; ring_elsize for AM64x is hardcoded as 1=8bytes*/ diff --git a/source/drivers/udma/v0/udma_rm.c b/source/drivers/udma/v0/udma_rm.c index 9153b4ca8b3..ddb298fe67b 100644 --- a/source/drivers/udma/v0/udma_rm.c +++ b/source/drivers/udma/v0/udma_rm.c @@ -1401,7 +1401,7 @@ uint32_t Udma_rmAllocVintrBit(Udma_EventHandle eventHandle) if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; + controllerEventHandle = eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); @@ -1435,7 +1435,7 @@ void Udma_rmFreeVintrBit(uint32_t vintrBitNum, if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; + controllerEventHandle = eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); diff --git a/source/drivers/udma/v0/udma_utils.c b/source/drivers/udma/v0/udma_utils.c index 7a689b3c80a..9b9dd3f937f 100644 --- a/source/drivers/udma/v0/udma_utils.c +++ b/source/drivers/udma/v0/udma_utils.c @@ -278,8 +278,8 @@ int32_t UdmaUtils_mapLocaltoGlobalEvent(Udma_DrvHandle drvHandle, Udma_ChHandle if(drvHandle != NULL && chHandle != NULL) { /*Map l2g event for DMA*/ - Udma_ChObjectInt *chHandleInt = (Udma_ChObjectInt*)chHandle; - Udma_DrvObjectInt *drvHandleInt = (Udma_DrvObjectInt*)drvHandle; + Udma_ChHandle chHandleInt = chHandle; + Udma_DrvHandle drvHandleInt = drvHandle; CSL_intaggrMapEventToLocalEvent(&drvHandleInt->iaRegs, CSL_DMSS_GEM_BCDMA_TRIGGER_OFFSET + chHandleInt->txChNum * 2 , localeventID ,eventMode); diff --git a/source/drivers/udma/v1/udma.c b/source/drivers/udma/v1/udma.c index 4e7f13ede12..7be0c117148 100644 --- a/source/drivers/udma/v1/udma.c +++ b/source/drivers/udma/v1/udma.c @@ -77,13 +77,6 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) Udma_DrvHandle drvHandleInt; struct tisci_msg_rm_proxy_cfg_req req; - /* Structure size assert */ - DebugP_assert(sizeof(Udma_DrvObjectInt) <= sizeof(Udma_DrvObject)); - DebugP_assert(sizeof(Udma_ChObjectInt) <= sizeof(Udma_ChObject)); - DebugP_assert(sizeof(Udma_EventObjectInt) <= sizeof(Udma_EventObject)); - DebugP_assert(sizeof(Udma_RingObjectInt) <= sizeof(Udma_RingObject)); - DebugP_assert(sizeof(Udma_FlowObjectInt) <= sizeof(Udma_FlowObject)); - if((drvHandle == NULL_PTR) || (initPrms == NULL_PTR)) { retVal = UDMA_EBADARGS; @@ -91,7 +84,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandle) drvHandle; + drvHandleInt = drvHandle; (void) memset(drvHandleInt, 0, sizeof(*drvHandleInt)); (void) memcpy(&drvHandleInt->initPrms, initPrms, sizeof(Udma_InitPrms)); UdmaRmInitPrms_init(initPrms->instId, &drvHandleInt->rmInitPrms); @@ -148,7 +141,7 @@ int32_t Udma_init(Udma_DrvHandle drvHandle, const Udma_InitPrms *initPrms) int32_t Udma_deinit(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_DrvHandle drvHandleInt = drvHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (drvHandleInt->drvInitDone != UDMA_INIT_DONE)) @@ -165,7 +158,7 @@ int32_t Udma_deinit(Udma_DrvHandle drvHandle) { DebugP_logError("[UDMA] Global event free failed!!!\r\n"); } - drvHandleInt->globalEventHandle = (Udma_EventHandle) NULL_PTR; + drvHandleInt->globalEventHandle = NULL_PTR; } retVal += Udma_rmDeinit(drvHandleInt); diff --git a/source/drivers/udma/v1/udma_ch.c b/source/drivers/udma/v1/udma_ch.c index 5a42464bc22..4364235f497 100644 --- a/source/drivers/udma/v1/udma_ch.c +++ b/source/drivers/udma/v1/udma_ch.c @@ -120,7 +120,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, int32_t retVal = UDMA_SOK, tempRetVal; uint32_t allocDone = (uint32_t) FALSE; Udma_ChHandle chHandleInt; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; + Udma_DrvHandle drvHandleInt = drvHandle; /* Error check */ if((drvHandleInt == NULL_PTR) || (NULL_PTR == chHandle) || (NULL_PTR == chPrms)) @@ -143,7 +143,7 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - chHandleInt = (Udma_ChHandle) chHandle; + chHandleInt = chHandle; (void) memset(chHandleInt, 0, sizeof(Udma_ChObject)); (void) memcpy(&chHandleInt->chPrms, chPrms, sizeof(Udma_ChPrms)); chHandleInt->chType = chType; @@ -153,9 +153,9 @@ int32_t Udma_chOpen(Udma_DrvHandle drvHandle, chHandleInt->extChNum = UDMA_DMA_CH_INVALID; chHandleInt->pdmaChNum = UDMA_DMA_CH_INVALID; chHandleInt->peerThreadId = UDMA_THREAD_ID_INVALID; - chHandleInt->fqRing = (Udma_RingHandle) NULL_PTR; - chHandleInt->cqRing = (Udma_RingHandle) NULL_PTR; - chHandleInt->tdCqRing = (Udma_RingHandle) NULL_PTR; + chHandleInt->fqRing = NULL_PTR; + chHandleInt->cqRing = NULL_PTR; + chHandleInt->tdCqRing = NULL_PTR; UdmaChTxPrms_init(&chHandleInt->txPrms, chType); UdmaChRxPrms_init(&chHandleInt->rxPrms, chType); Udma_chInitRegs(chHandleInt); @@ -211,7 +211,7 @@ int32_t Udma_chClose(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -262,7 +262,7 @@ int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; struct tisci_msg_rm_udmap_tx_ch_cfg_req rmUdmaTxReq; struct tisci_msg_rm_udmap_tx_ch_cfg_resp rmUdmaTxResp; @@ -351,7 +351,7 @@ int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; struct tisci_msg_rm_udmap_rx_ch_cfg_req rmUdmaRxReq; struct tisci_msg_rm_udmap_rx_ch_cfg_resp rmUdmaRxResp; Udma_FlowPrms flowPrms; @@ -502,7 +502,7 @@ int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, int32_t retVal = UDMA_SOK; volatile uint32_t *PEER8=NULL, *PEER0=NULL, *PEER1=NULL; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -552,7 +552,7 @@ int32_t Udma_chEnable(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -581,7 +581,7 @@ int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -624,7 +624,7 @@ int32_t Udma_chPause(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -671,7 +671,7 @@ int32_t Udma_chResume(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -718,7 +718,7 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle) int32_t retVal = UDMA_SOK; uint32_t chNum = UDMA_DMA_CH_INVALID; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -754,9 +754,9 @@ uint32_t Udma_chGetNum(Udma_ChHandle chHandle) Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_RingHandle fqRing = (Udma_RingHandle) NULL_PTR; + Udma_RingHandle fqRing = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -774,7 +774,7 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - fqRing = (Udma_RingHandle) chHandleInt->fqRing; + fqRing = chHandleInt->fqRing; } return (fqRing); @@ -783,9 +783,9 @@ Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle) Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_RingHandle cqRing = (Udma_RingHandle) NULL_PTR; + Udma_RingHandle cqRing = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -803,7 +803,7 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - cqRing = (Udma_RingHandle) chHandleInt->cqRing; + cqRing = chHandleInt->cqRing; } return (cqRing); @@ -812,9 +812,9 @@ Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle) Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_RingHandle tdCqRing = (Udma_RingHandle) NULL_PTR; + Udma_RingHandle tdCqRing = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -832,7 +832,7 @@ Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - tdCqRing = (Udma_RingHandle) chHandleInt->tdCqRing; + tdCqRing = chHandleInt->tdCqRing; } return (tdCqRing); @@ -869,9 +869,9 @@ uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle) Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; - Udma_FlowHandle defaultFlow = (Udma_FlowHandle) NULL_PTR; + Udma_FlowHandle defaultFlow = NULL_PTR; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -889,7 +889,7 @@ Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle) if(UDMA_SOK == retVal) { - defaultFlow = (Udma_FlowHandle) chHandleInt->defaultFlow; + defaultFlow = chHandleInt->defaultFlow; } return (defaultFlow); @@ -900,7 +900,7 @@ int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, { int32_t retVal = UDMA_SOK, cslRetVal; uint64_t response; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; if((NULL_PTR != chHandleInt->tdCqRing) && (chHandleInt->tdCqRing->ringNum != UDMA_RING_INVALID) && @@ -934,7 +934,7 @@ uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger) int32_t retVal = UDMA_SOK; uint32_t triggerEvent = UDMA_EVENT_INVALID; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || (chHandleInt->chInitDone != UDMA_INIT_DONE)) @@ -1000,7 +1000,7 @@ uint32_t *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1046,7 +1046,7 @@ int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; uint32_t *pSwTriggerReg = NULL; /* Error check */ @@ -1088,8 +1088,8 @@ int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; - Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; + Udma_ChHandle triggerChHandleInt = triggerChHandle; + Udma_ChHandle chainedChHandleInt = chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_set_req rmIrqReq; struct tisci_msg_rm_irq_set_resp rmIrqResp; @@ -1211,8 +1211,8 @@ int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle triggerChHandleInt = (Udma_ChHandle) triggerChHandle; - Udma_ChHandle chainedChHandleInt = (Udma_ChHandle) chainedChHandle; + Udma_ChHandle triggerChHandleInt = triggerChHandle; + Udma_ChHandle chainedChHandleInt = chainedChHandle; uint32_t triggerEvent; struct tisci_msg_rm_irq_release_req rmIrqReq; @@ -1444,7 +1444,7 @@ int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; uint32_t chNum; CSL_UdmapChanStats udmapChanStats; CSL_UdmapChanDir udmapChDir; @@ -1504,7 +1504,7 @@ int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1529,7 +1529,7 @@ int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_ChHandle chHandleInt = (Udma_ChHandle) chHandle; + Udma_ChHandle chHandleInt = chHandle; /* Error check */ if((NULL_PTR == chHandleInt) || @@ -1740,7 +1740,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) &chHandle->chPrms.fqRingPrms); if(UDMA_SOK != retVal) { - chHandle->fqRing = (Udma_RingHandle) NULL_PTR; + chHandle->fqRing = NULL_PTR; DebugP_logError("[UDMA] FQ ring alloc failed!!!\r\n"); } else if(((chHandle->chType & UDMA_CH_FLAG_MAPPED) == UDMA_CH_FLAG_MAPPED) && @@ -1768,7 +1768,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) &chHandle->chPrms.cqRingPrms); if(UDMA_SOK != retVal) { - chHandle->cqRing = (Udma_RingHandle) NULL_PTR; + chHandle->cqRing = NULL_PTR; DebugP_logError("[UDMA] CQ ring alloc failed!!!\r\n"); } } @@ -1787,7 +1787,7 @@ static int32_t Udma_chAllocResource(Udma_ChHandle chHandle) &chHandle->chPrms.tdCqRingPrms); if(UDMA_SOK != retVal) { - chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; + chHandle->tdCqRing = NULL_PTR; DebugP_logError("[UDMA] TD CQ ring alloc failed!!!\r\n"); } } @@ -1874,11 +1874,11 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) chHandle->rxChNum = UDMA_DMA_CH_INVALID; } - chHandle->defaultFlowObj.drvHandle = (Udma_DrvHandle) NULL_PTR; + chHandle->defaultFlowObj.drvHandle = NULL_PTR; chHandle->defaultFlowObj.flowStart = UDMA_FLOW_INVALID; chHandle->defaultFlowObj.flowCnt = 0U; chHandle->defaultFlowObj.flowInitDone = UDMA_DEINIT_DONE; - chHandle->defaultFlow = (Udma_FlowHandle) NULL_PTR; + chHandle->defaultFlow = NULL_PTR; } chHandle->pdmaChNum = UDMA_DMA_CH_INVALID; chHandle->peerThreadId = UDMA_THREAD_ID_INVALID; @@ -1890,7 +1890,7 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { DebugP_logError("[UDMA] RM Free FQ ring failed!!!\r\n"); } - chHandle->fqRing = (Udma_RingHandle) NULL_PTR; + chHandle->fqRing = NULL_PTR; } if(NULL_PTR != chHandle->cqRing) { @@ -1899,7 +1899,7 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { DebugP_logError("[UDMA] RM Free CQ ring failed!!!\r\n"); } - chHandle->cqRing = (Udma_RingHandle) NULL_PTR; + chHandle->cqRing = NULL_PTR; } if(NULL_PTR != chHandle->tdCqRing) { @@ -1908,7 +1908,7 @@ static int32_t Udma_chFreeResource(Udma_ChHandle chHandle) { DebugP_logError("[UDMA] RM Free TDCQ ring failed!!!\r\n"); } - chHandle->tdCqRing = (Udma_RingHandle) NULL_PTR; + chHandle->tdCqRing = NULL_PTR; } return (retVal); diff --git a/source/drivers/udma/v1/udma_event.c b/source/drivers/udma/v1/udma_event.c index bd12011e54e..73a6717d654 100644 --- a/source/drivers/udma/v1/udma_event.c +++ b/source/drivers/udma/v1/udma_event.c @@ -103,7 +103,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandle) drvHandle; + drvHandleInt = drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -118,7 +118,7 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, if(UDMA_SOK == retVal) { /* Copy and init parameters */ - eventHandleInt = (Udma_EventHandle) eventHandle; + eventHandleInt = eventHandle; (void) memcpy( &eventHandleInt->eventPrms, eventPrms, sizeof(eventHandleInt->eventPrms)); eventHandleInt->drvHandle = drvHandleInt; @@ -127,8 +127,8 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, eventHandleInt->vintrBitNum = UDMA_EVENT_INVALID; eventHandleInt->irIntrNum = UDMA_INTR_INVALID; eventHandleInt->coreIntrNum = UDMA_INTR_INVALID; - eventHandleInt->nextEvent = (Udma_EventHandle) NULL_PTR; - eventHandleInt->prevEvent = (Udma_EventHandle) NULL_PTR; + eventHandleInt->nextEvent = NULL_PTR; + eventHandleInt->prevEvent = NULL_PTR; eventHandleInt->hwiHandle = NULL_PTR; eventHandleInt->vintrBitAllocFlag = 0U; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; @@ -215,9 +215,9 @@ int32_t Udma_eventRegister(Udma_DrvHandle drvHandle, /* Copy core number from master handle */ /* Copy from master handle */ eventPrms->vintrNum = - ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; + ( (eventHandleInt->eventPrms.controllerEventHandle))->vintrNum; eventPrms->coreIntrNum = - ((Udma_EventHandle) (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; + ( (eventHandleInt->eventPrms.controllerEventHandle))->coreIntrNum; } /* Copy the same info to eventHandleInt->eventPrms*/ eventHandleInt->eventPrms.intrStatusReg = eventPrms->intrStatusReg; @@ -244,7 +244,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) } if(UDMA_SOK == retVal) { - eventHandleInt = (Udma_EventHandle) eventHandle; + eventHandleInt = eventHandle; drvHandle = eventHandleInt->drvHandle; if((NULL_PTR == drvHandle) || (drvHandle->drvInitDone != UDMA_INIT_DONE)) { @@ -285,7 +285,7 @@ int32_t Udma_eventUnRegister(Udma_EventHandle eventHandle) eventHandleInt->eventInitDone = UDMA_DEINIT_DONE; eventHandleInt->pIaGeviRegs = (volatile CSL_intaggr_imapRegs_gevi *) NULL_PTR; eventHandleInt->pIaVintrRegs = (volatile CSL_intaggr_intrRegs_vint *) NULL_PTR; - eventHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + eventHandleInt->drvHandle = NULL_PTR; } } } @@ -296,7 +296,7 @@ uint32_t Udma_eventGetId(Udma_EventHandle eventHandle) { uint32_t evtNum = UDMA_EVENT_INVALID; Udma_DrvHandle drvHandle; - Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; + Udma_EventHandle eventHandleInt = eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -317,7 +317,7 @@ int32_t Udma_eventDisable(Udma_EventHandle eventHandle) Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; + Udma_EventHandle eventHandleInt = eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -349,7 +349,7 @@ int32_t Udma_eventEnable(Udma_EventHandle eventHandle) Udma_DrvHandle drvHandle; uint32_t vintrBitNum; uint32_t vintrNum; - Udma_EventHandle eventHandleInt = (Udma_EventHandle) eventHandle; + Udma_EventHandle eventHandleInt = eventHandle; if((NULL_PTR != eventHandleInt) && (UDMA_INIT_DONE == eventHandleInt->eventInitDone)) @@ -379,7 +379,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandleInt; - Udma_EventHandle eventHandle = (Udma_EventHandle) NULL_PTR; + Udma_EventHandle eventHandle = NULL_PTR; /* Error check */ if(NULL_PTR == drvHandle) @@ -388,7 +388,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) } if(UDMA_SOK == retVal) { - drvHandleInt = (Udma_DrvHandle) drvHandle; + drvHandleInt = drvHandle; if(drvHandleInt->drvInitDone != UDMA_INIT_DONE) { retVal = UDMA_EFAIL; @@ -396,7 +396,7 @@ Udma_EventHandle Udma_eventGetGlobalHandle(Udma_DrvHandle drvHandle) } if(UDMA_SOK == retVal) { - eventHandle = (Udma_EventHandle) drvHandleInt->globalEventHandle; + eventHandle = drvHandleInt->globalEventHandle; } return (eventHandle); @@ -408,9 +408,9 @@ void UdmaEventPrms_init(Udma_EventPrms *eventPrms) { eventPrms->eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms->eventMode = UDMA_EVENT_MODE_SHARED; - eventPrms->chHandle = (Udma_ChHandle) NULL_PTR; - eventPrms->ringHandle = (Udma_RingHandle) NULL_PTR; - eventPrms->controllerEventHandle = (Udma_EventHandle) NULL_PTR; + eventPrms->chHandle = NULL_PTR; + eventPrms->ringHandle = NULL_PTR; + eventPrms->controllerEventHandle = NULL_PTR; eventPrms->eventCb = (Udma_EventCallback) NULL_PTR; eventPrms->intrPriority = 1U; eventPrms->appData = NULL_PTR; @@ -431,7 +431,7 @@ static void Udma_eventIsrFxn(void *args) uint32_t vintrBitNum; uint32_t vintrNum; uint32_t teardownStatus; - Udma_EventHandle eventHandle = (Udma_EventHandle) args; + Udma_EventHandle eventHandle = args; Udma_DrvHandle drvHandle; Udma_EventPrms *eventPrms; @@ -511,7 +511,7 @@ static int32_t Udma_eventCheckParams(Udma_DrvHandle drvHandle, * interrupt registered, all slaves should have a callback as IA * is same and there is no individual control to disable * interrupt */ - controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; + controllerEventHandle = eventPrms->controllerEventHandle; if(((Udma_EventCallback) NULL_PTR != controllerEventHandle->eventPrms.eventCb) && ((Udma_EventCallback) NULL_PTR == eventPrms->eventCb)) { @@ -611,7 +611,7 @@ static int32_t Udma_eventCheckUnRegister(Udma_DrvHandle drvHandle, if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - ringHandle = ((Udma_ChHandle) (eventPrms->chHandle))->cqRing; + ringHandle = ( (eventPrms->chHandle))->cqRing; } else { @@ -733,12 +733,12 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, cookie = HwiP_disable(); /* Link shared events to master event */ - eventHandle->prevEvent = (Udma_EventHandle) NULL_PTR; - eventHandle->nextEvent = (Udma_EventHandle) NULL_PTR; + eventHandle->prevEvent = NULL_PTR; + eventHandle->nextEvent = NULL_PTR; if(NULL_PTR != eventPrms->controllerEventHandle) { /* Go to the last node - insert node at the end */ - lastEvent = (Udma_EventHandle) eventPrms->controllerEventHandle; + lastEvent = eventPrms->controllerEventHandle; while(NULL_PTR != lastEvent->nextEvent) { /* Move to next node */ @@ -757,7 +757,7 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, { Udma_ChHandle chHandle; DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; if(TRUE == chHandle->chOesAllocDone) { @@ -780,7 +780,7 @@ static int32_t Udma_eventAllocResource(Udma_DrvHandle drvHandle, else { /* Use master event's info */ - vintrNum = ((Udma_EventHandle) (eventPrms->controllerEventHandle))->vintrNum; + vintrNum = ( (eventPrms->controllerEventHandle))->vintrNum; } DebugP_assert(drvHandle->iaRegs.pIntrRegs != NULL_PTR); eventHandle->pIaVintrRegs = &drvHandle->iaRegs.pIntrRegs->VINT[vintrNum]; @@ -897,7 +897,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ( (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -923,7 +923,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -966,7 +966,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1000,7 +1000,7 @@ static int32_t Udma_eventConfig(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandle) eventPrms->ringHandle; + ringHandle = eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1123,7 +1123,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, /* Get master IA register number for slaves */ if(NULL_PTR != eventHandle->eventPrms.controllerEventHandle) { - vintrNum = ((Udma_EventHandle) (eventHandle->eventPrms.controllerEventHandle))->vintrNum; + vintrNum = ( (eventHandle->eventPrms.controllerEventHandle))->vintrNum; } else { @@ -1148,7 +1148,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, (UDMA_EVENT_TYPE_TEARDOWN_PACKET == eventPrms->eventType)) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdRingIrq; if((UDMA_EVENT_TYPE_DMA_COMPLETION == eventPrms->eventType) || (UDMA_EVENT_TYPE_TEARDOWN_COMPLETION == eventPrms->eventType)) @@ -1191,7 +1191,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, else { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; rmIrqReq.src_id = drvHandle->srcIdTrIrq; if((chHandle->chType & UDMA_CH_FLAG_BLK_COPY) == UDMA_CH_FLAG_BLK_COPY) { @@ -1225,7 +1225,7 @@ static int32_t Udma_eventReset(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_RING == eventPrms->eventType) { DebugP_assert(eventPrms->ringHandle != NULL_PTR); - ringHandle = (Udma_RingHandle) eventPrms->ringHandle; + ringHandle = eventPrms->ringHandle; DebugP_assert(ringHandle->ringNum != UDMA_RING_INVALID); rmIrqReq.src_id = drvHandle->srcIdRingIrq; @@ -1284,7 +1284,7 @@ static void Udma_eventProgramSteering(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = TRUE; } @@ -1304,7 +1304,7 @@ static void Udma_eventResetSteering(Udma_DrvHandle drvHandle, if(UDMA_EVENT_TYPE_TR == eventPrms->eventType) { DebugP_assert(eventPrms->chHandle != NULL_PTR); - chHandle = (Udma_ChHandle) eventPrms->chHandle; + chHandle = eventPrms->chHandle; /* Mark OES alloc flag */ chHandle->chOesAllocDone = FALSE; diff --git a/source/drivers/udma/v1/udma_flow.c b/source/drivers/udma/v1/udma_flow.c index d7199646ed2..ce478f1cc76 100644 --- a/source/drivers/udma/v1/udma_flow.c +++ b/source/drivers/udma/v1/udma_flow.c @@ -73,7 +73,7 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; uint32_t i, j, offset, bitPos, bitMask; Udma_RmInitPrms *rmInitPrms; uint32_t freeFlowOffset = 0U; @@ -126,7 +126,7 @@ int32_t Udma_flowFree(Udma_FlowHandle flowHandle) SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); } - flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + flowHandleInt->drvHandle = NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -143,8 +143,8 @@ int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, uint32_t flowCnt) { int32_t retVal = UDMA_SOK; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || @@ -178,7 +178,7 @@ int32_t Udma_flowAttach(Udma_DrvHandle drvHandle, int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if(NULL_PTR == flowHandleInt) @@ -195,7 +195,7 @@ int32_t Udma_flowDetach(Udma_FlowHandle flowHandle) if(UDMA_SOK == retVal) { - flowHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + flowHandleInt->drvHandle = NULL_PTR; flowHandleInt->flowStart = UDMA_FLOW_INVALID; flowHandleInt->flowCnt = 0U; flowHandleInt->flowInitDone = UDMA_DEINIT_DONE; @@ -212,7 +212,7 @@ int32_t Udma_flowConfig(Udma_FlowHandle flowHandle, { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; struct tisci_msg_rm_udmap_flow_cfg_req rmFlowReq; struct tisci_msg_rm_udmap_flow_cfg_resp rmFlowResp; struct tisci_msg_rm_udmap_flow_size_thresh_cfg_req rmOptFlowReq; @@ -332,7 +332,7 @@ uint32_t Udma_flowGetNum(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowNum = UDMA_FLOW_INVALID; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -353,7 +353,7 @@ uint32_t Udma_flowGetCount(Udma_FlowHandle flowHandle) { int32_t retVal = UDMA_SOK; uint32_t flowCnt = UDMA_FLOW_INVALID; - Udma_FlowHandle flowHandleInt = (Udma_FlowHandle) flowHandle; + Udma_FlowHandle flowHandleInt = flowHandle; /* Error check */ if((NULL_PTR == flowHandleInt) || @@ -375,7 +375,7 @@ void UdmaFlowPrms_init(Udma_FlowPrms *flowPrms, uint32_t chType) (void) chType; /* MISRAC fix: could be used for future. So not removed */ if(NULL_PTR != flowPrms) { - flowPrms->rxChHandle = (Udma_ChHandle) NULL_PTR; + flowPrms->rxChHandle = NULL_PTR; flowPrms->einfoPresent = TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_EINFO_NOT_PRESENT; flowPrms->psInfoPresent = TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PSINFO_NOT_PRESENT; flowPrms->errorHandling = TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_ERR_RETRY; diff --git a/source/drivers/udma/v1/udma_ring_common.c b/source/drivers/udma/v1/udma_ring_common.c index 119c39c1d00..6c547f47592 100644 --- a/source/drivers/udma/v1/udma_ring_common.c +++ b/source/drivers/udma/v1/udma_ring_common.c @@ -81,8 +81,8 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, int32_t retVal = UDMA_SOK; uint64_t physBase; uint32_t allocDone = (uint32_t) FALSE; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_RingHandle ringHandleInt = ringHandle; struct tisci_msg_rm_ring_cfg_req rmRingReq; struct tisci_msg_rm_ring_cfg_resp rmRingResp; @@ -167,7 +167,7 @@ int32_t Udma_ringAlloc(Udma_DrvHandle drvHandle, TISCI_MSG_VALUE_RM_RING_ASEL_VALID; rmRingReq.nav_id = drvHandleInt->devIdRing; rmRingReq.index = ringHandleInt->ringNum; - physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, (Udma_ChHandle) NULL_PTR); + physBase = Udma_virtToPhyFxn(ringPrms->ringMem, drvHandleInt, NULL_PTR); rmRingReq.addr_lo = (uint32_t)physBase; rmRingReq.addr_hi = (uint32_t)(physBase >> 32UL); rmRingReq.count = ringPrms->elemCnt; @@ -213,7 +213,7 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -248,7 +248,7 @@ int32_t Udma_ringFree(Udma_RingHandle ringHandle) ringHandleInt->ringNum = UDMA_RING_INVALID; ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsNormal(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + ringHandleInt->drvHandle = NULL_PTR; } return (retVal); @@ -259,8 +259,8 @@ int32_t Udma_ringAttach(Udma_DrvHandle drvHandle, uint16_t ringNum) { int32_t retVal = UDMA_SOK; - Udma_DrvHandle drvHandleInt = (Udma_DrvHandle) drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_DrvHandle drvHandleInt = drvHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == drvHandleInt) || (NULL_PTR == ringHandleInt)) @@ -298,7 +298,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if(NULL_PTR == ringHandleInt) @@ -328,7 +328,7 @@ int32_t Udma_ringDetach(Udma_RingHandle ringHandle) DebugP_assert(ringHandleInt->ringNum != UDMA_RING_INVALID); ringHandleInt->ringInitDone = UDMA_DEINIT_DONE; Udma_ringHandleClearRegsNormal(ringHandleInt); - ringHandleInt->drvHandle = (Udma_DrvHandle) NULL_PTR; + ringHandleInt->drvHandle = NULL_PTR; } @@ -340,7 +340,7 @@ int32_t Udma_ringQueueRaw(Udma_RingHandle ringHandle, uint64_t phyDescMem) int32_t retVal = UDMA_SOK; uintptr_t cookie; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -376,7 +376,7 @@ int32_t Udma_ringDequeueRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) int32_t retVal = UDMA_SOK; uintptr_t cookie; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -411,7 +411,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { int32_t retVal = UDMA_SOK; Udma_DrvHandle drvHandle; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; /* Error check */ if((NULL_PTR == ringHandleInt) || @@ -440,7 +440,7 @@ int32_t Udma_ringFlushRaw(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) { - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; Udma_ringPrimeNormal(ringHandleInt, phyDescMem); @@ -449,7 +449,7 @@ void Udma_ringPrime(Udma_RingHandle ringHandle, uint64_t phyDescMem) void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) { - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; Udma_ringPrimeReadNormal(ringHandleInt, phyDescMem); @@ -458,7 +458,7 @@ void Udma_ringPrimeRead(Udma_RingHandle ringHandle, uint64_t *phyDescMem) void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) { - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; Udma_ringSetDoorBellNormal(ringHandleInt, count); @@ -468,7 +468,7 @@ void Udma_ringSetDoorBell(Udma_RingHandle ringHandle, int32_t count) uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) { uint16_t ringNum = UDMA_RING_INVALID; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; if((NULL_PTR != ringHandleInt) && (UDMA_INIT_DONE == ringHandleInt->ringInitDone)) @@ -482,7 +482,7 @@ uint16_t Udma_ringGetNum(Udma_RingHandle ringHandle) uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) { uint8_t *ringMem = NULL_PTR; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; ringMem = Udma_ringGetMemPtrNormal(ringHandleInt); @@ -492,7 +492,7 @@ uint8_t *Udma_ringGetMemPtr(Udma_RingHandle ringHandle) uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) { uint32_t ringMode; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; ringMode = Udma_ringGetModeNormal(ringHandleInt); @@ -502,7 +502,7 @@ uint32_t Udma_ringGetMode(Udma_RingHandle ringHandle) uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) { uint32_t size = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; size = Udma_ringGetElementCntNormal(ringHandleInt); @@ -512,7 +512,7 @@ uint32_t Udma_ringGetElementCnt(Udma_RingHandle ringHandle) uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; occ = Udma_ringGetRingOccNormal(ringHandleInt); @@ -522,7 +522,7 @@ uint32_t Udma_ringGetForwardRingOcc(Udma_RingHandle ringHandle) uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) { uint32_t occ = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; occ = Udma_ringGetRingOccNormal(ringHandleInt); @@ -532,7 +532,7 @@ uint32_t Udma_ringGetReverseRingOcc(Udma_RingHandle ringHandle) uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; idx = Udma_ringGetWrIdxNormal(ringHandleInt); @@ -542,7 +542,7 @@ uint32_t Udma_ringGetWrIdx(Udma_RingHandle ringHandle) uint32_t Udma_ringGetRdIdx(Udma_RingHandle ringHandle) { uint32_t idx = 0U; - Udma_RingHandle ringHandleInt = (Udma_RingHandle) ringHandle; + Udma_RingHandle ringHandleInt = ringHandle; idx = Udma_ringGetRdIdxNormal(ringHandleInt); diff --git a/source/drivers/udma/v1/udma_ring_normal.c b/source/drivers/udma/v1/udma_ring_normal.c index d092afa0814..b0f475f7314 100644 --- a/source/drivers/udma/v1/udma_ring_normal.c +++ b/source/drivers/udma/v1/udma_ring_normal.c @@ -92,7 +92,7 @@ void Udma_ringSetCfgNormal(Udma_DrvHandle drvHandle, if(NULL_PTR != ringPrms) { ringCfg->physBase = - Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, (Udma_ChHandle) NULL_PTR); + Udma_virtToPhyFxn(ringPrms->ringMem, drvHandle, NULL_PTR); ringCfg->virtBase = (void *) ringPrms->ringMem; ringCfg->mode = ringPrms->mode; ringCfg->elCnt = ringPrms->elemCnt; @@ -106,7 +106,7 @@ void Udma_ringSetCfgNormal(Udma_DrvHandle drvHandle, addrLo = CSL_REG32_FEXT(&ringHandle->pCfgRegs->BA_LO, RINGACC_CFG_RING_BA_LO_ADDR_LO); ringCfg->physBase = (uint64_t)((((uint64_t) addrHi) << 32UL) | ((uint64_t) addrLo)); - ringCfg->virtBase = Udma_phyToVirtFxn(ringCfg->physBase, drvHandle, (Udma_ChHandle) NULL_PTR); + ringCfg->virtBase = Udma_phyToVirtFxn(ringCfg->physBase, drvHandle, NULL_PTR); ringCfg->mode = CSL_REG32_FEXT(&ringHandle->pCfgRegs->SIZE, RINGACC_CFG_RING_SIZE_QMODE); ringCfg->elCnt = CSL_REG32_FEXT(&ringHandle->pCfgRegs->SIZE, RINGACC_CFG_RING_SIZE_ELCNT); elemSize = CSL_REG32_FEXT(&ringHandle->pCfgRegs->SIZE, RINGACC_CFG_RING_SIZE_ELSIZE); diff --git a/source/drivers/udma/v1/udma_rm.c b/source/drivers/udma/v1/udma_rm.c index fea4a647d24..cf5ab586801 100644 --- a/source/drivers/udma/v1/udma_rm.c +++ b/source/drivers/udma/v1/udma_rm.c @@ -1099,7 +1099,7 @@ uint32_t Udma_rmAllocVintrBit(Udma_EventHandle eventHandle) if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; + controllerEventHandle = eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); @@ -1133,7 +1133,7 @@ void Udma_rmFreeVintrBit(uint32_t vintrBitNum, if(NULL_PTR != eventPrms->controllerEventHandle) { /* Shared event. Get the master handle */ - controllerEventHandle = (Udma_EventHandle) eventPrms->controllerEventHandle; + controllerEventHandle = eventPrms->controllerEventHandle; } SemaphoreP_pend(&drvHandle->rmLockObj, SystemP_WAIT_FOREVER); diff --git a/test/drivers/adc/st_adcDmaMode.c b/test/drivers/adc/st_adcDmaMode.c index c31dfc80897..e194a630d1f 100644 --- a/test/drivers/adc/st_adcDmaMode.c +++ b/test/drivers/adc/st_adcDmaMode.c @@ -115,8 +115,8 @@ static SemaphoreP_Object gUdmaAppDoneSem; int32_t st_adcDmaMode_main(st_ADCTestcaseParams_t *testParams) { int32_t status; - Udma_ChHandle rxChHandle = (Udma_ChHandle) &gUdmaRxChObj; - Udma_DrvHandle drvHandle = (Udma_DrvHandle) &gUdmaDrvObj[CONFIG_UDMA0]; + Udma_ChHandle rxChHandle = &gUdmaRxChObj; + Udma_DrvHandle drvHandle = &gUdmaDrvObj[CONFIG_UDMA0]; gAdcModule = testParams->adcConfigParams.adcModule; st_adcModuleInit(gAdcModule); @@ -243,7 +243,7 @@ static int32_t App_create(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle, st DebugP_assert(UDMA_SOK == retVal); /* Register ring completion callback */ - eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; + eventHandle = &gUdmaCqEventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -276,7 +276,7 @@ static int32_t App_delete(Udma_DrvHandle drvHandle, Udma_ChHandle rxChHandle) DebugP_assert(UDMA_SOK == retVal); /* Unregister all events */ - eventHandle = (Udma_EventHandle) &gUdmaCqEventObj; + eventHandle = &gUdmaCqEventObj; retVal = Udma_eventUnRegister(eventHandle); DebugP_assert(UDMA_SOK == retVal); diff --git a/test/drivers/udma/udma_test_blkcpy.c b/test/drivers/udma/udma_test_blkcpy.c index 173eb99e589..7487bed89ba 100644 --- a/test/drivers/udma/udma_test_blkcpy.c +++ b/test/drivers/udma/udma_test_blkcpy.c @@ -763,7 +763,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest chPrms.tdCqRingPrms.elemCnt = chObj->qdepth; /* Open channel for block copy */ - retVal = Udma_chOpen(chObj->drvHandle, (Udma_ChHandle) &chObj->drvChObj, chType, &chPrms); + retVal = Udma_chOpen(chObj->drvHandle, &chObj->drvChObj, chType, &chPrms); if(UDMA_SOK != retVal) { GT_0trace(taskObj->traceMask, GT_ERR, @@ -771,7 +771,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest } else { - chObj->chHandle = (Udma_ChHandle) &chObj->drvChObj; + chObj->chHandle = &chObj->drvChObj; GT_3trace(taskObj->traceMask, GT_INFO1, " |TEST INFO|:: Task:%d: CH:%d: Allocated Ch : %d ::\r\n", taskObj->taskId, chObj->chIdx, Udma_chGetNum(chObj->chHandle)); @@ -818,7 +818,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest { /* Register ring completion callback */ /* In case of chaining test, register ring completion only for last channel. */ - eventHandle = (Udma_EventHandle) &chObj->cqEventObj; + eventHandle = &chObj->cqEventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_DMA_COMPLETION; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -851,7 +851,7 @@ static int32_t udmaTestBlkcpyCreate(UdmaTestTaskObj *taskObj, uint32_t chainTest if((UDMA_SOK == retVal) && (CSL_UDMAP_TR_FLAGS_EVENT_SIZE_COMPLETION != chObj->chPrms->eventSize)) { /* Register TR event */ - eventHandle = (Udma_EventHandle) &chObj->trEventObj; + eventHandle = &chObj->trEventObj; UdmaEventPrms_init(&chObj->trEventPrms); chObj->trEventPrms.eventType = UDMA_EVENT_TYPE_TR; chObj->trEventPrms.eventMode = UDMA_EVENT_MODE_SHARED; diff --git a/test/drivers/udma/udma_test_bug.c b/test/drivers/udma/udma_test_bug.c index 33ad55d8e7f..6758d7f3504 100644 --- a/test/drivers/udma/udma_test_bug.c +++ b/test/drivers/udma/udma_test_bug.c @@ -77,7 +77,7 @@ int32_t udmaTestBugTcPDK_4654(UdmaTestTaskObj *taskObj) uint32_t instId; Udma_DrvHandle drvHandle; Udma_EventObject eventObj; - Udma_EventHandle eventHandle = (Udma_EventHandle) &eventObj; + Udma_EventHandle eventHandle = &eventObj; Udma_EventPrms eventPrms; GT_1trace(taskObj->traceMask, GT_INFO1, @@ -103,7 +103,7 @@ int32_t udmaTestBugTcPDK_4654(UdmaTestTaskObj *taskObj) { for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++) { - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; + drvHandle = &taskObj->testObj->drvObj[instId]; /* Alloc VINTR - By registering Master event in Shared mode */ UdmaEventPrms_init(&eventPrms); diff --git a/test/drivers/udma/udma_test_ch.c b/test/drivers/udma/udma_test_ch.c index ed5a730660e..6cfc1797704 100644 --- a/test/drivers/udma/udma_test_ch.c +++ b/test/drivers/udma/udma_test_ch.c @@ -138,12 +138,12 @@ static int32_t udmaTestChPktdmaParamCheckTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; uint32_t chType; Udma_ChObject chObj; - Udma_ChHandle chHandle = (Udma_ChHandle) &chObj; + Udma_ChHandle chHandle = &chObj; Udma_ChPrms chPrms; void *ringMem = NULL; - Udma_ChObjectInt *chObjInt = (Udma_ChObjectInt *) chHandle; + Udma_ChObject *chObjInt = (Udma_ChObject *) chHandle; - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; + drvHandle = &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; ringMemSize = elemCnt * sizeof (uint64_t); ringMem = Utils_memAlloc(heapId, ringMemSize, UDMA_CACHELINE_ALIGNMENT); if(NULL == ringMem) @@ -166,7 +166,7 @@ static int32_t udmaTestChPktdmaParamCheckTestLoop(UdmaTestTaskObj *taskObj) } if(UDMA_SOK == retVal) { - if(chObjInt->fqRing != (Udma_RingHandle) NULL_PTR) + if(chObjInt->fqRing != NULL_PTR) { GT_0trace(taskObj->traceMask, GT_ERR, " Ring allocated even when no ring memory was provided!!\n"); @@ -224,7 +224,7 @@ static int32_t udmaTestChPktdmaChApiTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; uint32_t chType; Udma_ChObject chObj; - Udma_ChHandle chHandle = (Udma_ChHandle) &chObj; + Udma_ChHandle chHandle = &chObj; Udma_ChPrms chPrms; Udma_ChTxPrms txPrms; Udma_ChRxPrms rxPrms; @@ -234,10 +234,10 @@ static int32_t udmaTestChPktdmaChApiTestLoop(UdmaTestTaskObj *taskObj) char *pktdmaChGrpStr[] = { "Unmapped TX", "CPSW TX", "SAUL TX", "ICSSG_0 TX", "ICSSG_1_TX", "Unmapped RX", "CPSW RX", "SAUL RX", "ICSSG_0 RX", "ICSSG_1_RX"}; const UdmaTestPktdmaChPrm *pktdmaChPrms = NULL; - Udma_DrvObjectInt *drvObj; + Udma_DrvObject *drvObj; - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; - drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[UDMA_TEST_INST_ID_PKTDMA_0]; + drvObj = (Udma_DrvObject *) drvHandle; rmInitPrms = &drvObj->rmInitPrms; ringMemSize = elemCnt * sizeof (uint64_t); ringMem = Utils_memAlloc(heapId, ringMemSize, UDMA_CACHELINE_ALIGNMENT); diff --git a/test/drivers/udma/udma_test_common.c b/test/drivers/udma/udma_test_common.c index 0552894ae07..5f51f7b417d 100644 --- a/test/drivers/udma/udma_test_common.c +++ b/test/drivers/udma/udma_test_common.c @@ -86,7 +86,7 @@ int32_t udmaTestInitDriver(UdmaTestObj *testObj) for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++) { /* UDMA driver init */ - drvHandle = (Udma_DrvHandle) &testObj->drvObj[instId]; + drvHandle = &testObj->drvObj[instId]; UdmaInitPrms_init(instId, &initPrms); retVal += Udma_init(drvHandle, &initPrms); if(UDMA_SOK != retVal) @@ -108,7 +108,7 @@ int32_t udmaTestDeinitDriver(UdmaTestObj *testObj) for(instId = UDMA_INST_ID_START; instId <= UDMA_INST_ID_MAX; instId++) { /* UDMA driver deinit */ - drvHandle = (Udma_DrvHandle) &testObj->drvObj[instId]; + drvHandle = &testObj->drvObj[instId]; retVal += Udma_deinit(drvHandle); if(UDMA_SOK != retVal) { diff --git a/test/drivers/udma/udma_test_flow.c b/test/drivers/udma/udma_test_flow.c index bba4da8cf68..ff510d66918 100644 --- a/test/drivers/udma/udma_test_flow.c +++ b/test/drivers/udma/udma_test_flow.c @@ -110,18 +110,18 @@ static int32_t udmaTestFlowAttachMappedTestLoop(UdmaTestTaskObj *taskObj) uint32_t mappedFlowAllocated = FALSE; Udma_DrvHandle drvHandle; Udma_FlowObject flowObj, attachFlowObj; - Udma_FlowHandle flowHandle = (Udma_FlowHandle) &flowObj, attachFlowHandle = (Udma_FlowHandle) &attachFlowObj; + Udma_FlowHandle flowHandle = &flowObj, attachFlowHandle = &attachFlowObj; Udma_FlowPrms flowPrms; Udma_FlowAllocMappedPrms flowAllocMappedPrms; Udma_RmInitPrms *rmInitPrms; char *mappedFlowGrpStr[] = { "CPSW RX", "SAUL RX", "ICSSG0 RX", "ICSSG1_RX"}; - Udma_DrvObjectInt *drvObj; + Udma_DrvObject *drvObj; if(UDMA_SOK == retVal) { instId = UDMA_TEST_INST_ID_FLOW; - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; - drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[instId]; + drvObj = (Udma_DrvObject *) drvHandle; numMappedFlowGrp = UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP; diff --git a/test/drivers/udma/udma_test_parser.c b/test/drivers/udma/udma_test_parser.c index 9fb89865ce4..9589ced7f89 100644 --- a/test/drivers/udma/udma_test_parser.c +++ b/test/drivers/udma/udma_test_parser.c @@ -690,7 +690,7 @@ static void udmaTestInitTestObj(UdmaTestObj *testObj, UdmaTestParams *testPrms) chObj->chHandle = NULL; chObj->cqEventHandle = NULL; chObj->tdCqEventHandle = NULL; - chObj->drvHandle = (Udma_DrvHandle) &testObj->drvObj[testPrms->instId[chCnt]]; + chObj->drvHandle = &testObj->drvObj[testPrms->instId[chCnt]]; chObj->instId = testPrms->instId[chCnt]; chObj->queueCnt = 0U; chObj->dequeueCnt = 0U; diff --git a/test/drivers/udma/udma_test_ring.c b/test/drivers/udma/udma_test_ring.c index 3ccdccf27ab..8f6d30430e3 100644 --- a/test/drivers/udma/udma_test_ring.c +++ b/test/drivers/udma/udma_test_ring.c @@ -243,7 +243,7 @@ int32_t udmaTestRingMemPtrTc(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; Udma_RmInitPrms *rmInitPrms; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -271,8 +271,8 @@ int32_t udmaTestRingMemPtrTc(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; - Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[instId]; + Udma_DrvObject *drvObj = (Udma_DrvObject *) drvHandle; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -442,7 +442,7 @@ static int32_t udmaTestRingProxyTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; uint64_t ringData; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -467,7 +467,7 @@ static int32_t udmaTestRingProxyTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; + drvHandle = &taskObj->testObj->drvObj[instId]; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -578,7 +578,7 @@ static int32_t udmaTestRingFlushTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; uint64_t ringData; Udma_RmInitPrms *rmInitPrms; @@ -604,8 +604,8 @@ static int32_t udmaTestRingFlushTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; - Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[instId]; + Udma_DrvObject *drvObj = (Udma_DrvObject *) drvHandle; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -733,7 +733,7 @@ static int32_t udmaTestRingEventTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; uint64_t ringData; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -772,7 +772,7 @@ static int32_t udmaTestRingEventTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing Ring Event for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; + drvHandle = &taskObj->testObj->drvObj[instId]; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -792,7 +792,7 @@ static int32_t udmaTestRingEventTestLoop(UdmaTestTaskObj *taskObj) if(UDMA_TEST_EVENT_NONE != taskObj->ringPrms->eventMode) { /* Register ring completion */ - eventHandle = (Udma_EventHandle) &eventObj; + eventHandle = &eventObj; UdmaEventPrms_init(&eventPrms); eventPrms.eventType = UDMA_EVENT_TYPE_RING; eventPrms.eventMode = UDMA_EVENT_MODE_SHARED; @@ -951,7 +951,7 @@ static int32_t udmaTestRingParamCheckTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; Udma_RmInitPrms *rmInitPrms; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -976,8 +976,8 @@ static int32_t udmaTestRingParamCheckTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing ring params check for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; - Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[instId]; + Udma_DrvObject *drvObj = (Udma_DrvObject *) drvHandle; /* Ring memory NULL check */ UdmaRingPrms_init(&ringPrms); @@ -1144,7 +1144,7 @@ static int32_t udmaTestRingAttachTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj, attachRingObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj, attachRingHandle = (Udma_RingHandle) &attachRingObj; + Udma_RingHandle ringHandle = &ringObj, attachRingHandle = &attachRingObj; void *ringMem = NULL; uint64_t ringData; Udma_RmInitPrms *rmInitPrms; @@ -1175,8 +1175,8 @@ static int32_t udmaTestRingAttachTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; - Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[instId]; + Udma_DrvObject *drvObj = (Udma_DrvObject *) drvHandle; #if ((UDMA_NUM_MAPPED_TX_GROUP + UDMA_NUM_MAPPED_RX_GROUP) > 0) if(UDMA_INST_ID_PKTDMA_0 == instId) @@ -1373,7 +1373,7 @@ static int32_t udmaTestRingResetTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; uint64_t ringData; Udma_RmInitPrms *rmInitPrms; @@ -1399,8 +1399,8 @@ static int32_t udmaTestRingResetTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; - Udma_DrvObjectInt *drvObj = (Udma_DrvObjectInt *) drvHandle; + drvHandle = &taskObj->testObj->drvObj[instId]; + Udma_DrvObject *drvObj = (Udma_DrvObject *) drvHandle; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem; @@ -1560,7 +1560,7 @@ static int32_t udmaTestRingPrimeTestLoop(UdmaTestTaskObj *taskObj) Udma_DrvHandle drvHandle; Udma_RingPrms ringPrms; Udma_RingObject ringObj; - Udma_RingHandle ringHandle = (Udma_RingHandle) &ringObj; + Udma_RingHandle ringHandle = &ringObj; void *ringMem = NULL; uint64_t ringData; char *instanceIdStr[] = {"MAIN", "MCU", "BCDMA", "PKTDMA"}; @@ -1582,7 +1582,7 @@ static int32_t udmaTestRingPrimeTestLoop(UdmaTestTaskObj *taskObj) GT_2trace(taskObj->traceMask, GT_INFO1, " Testing for Inst: %s, Ring Mode: %s...\r\n", instanceIdStr[instId], ringModeString[ringMode]); - drvHandle = (Udma_DrvHandle) &taskObj->testObj->drvObj[instId]; + drvHandle = &taskObj->testObj->drvObj[instId]; UdmaRingPrms_init(&ringPrms); ringPrms.ringMem = ringMem;