feat: Initial version

Author: urish

.dockerignore

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+*.log
+.git
+.gitignore
+README.md

.env.example

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+# Server port
+PORT=8080

.github/workflows/test.yml

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+name: Build and Test
+
+on:
+  push:
+    branches: [ main ]
+  pull_request:
+    branches: [ main ]
+
+jobs:
+  build-and-test:
+    runs-on: ubuntu-latest
+
+    steps:
+    - name: Checkout code
+      uses: actions/checkout@v4
+
+    - name: Build Docker container
+      run: make docker-build
+
+    - name: Start container in background
+      run: docker run -d -p 8080:8080 --name fpga-compiler fpga-compiler:latest
+
+    - name: Wait for service to be ready
+      run: |
+        timeout 30 bash -c 'until curl -f http://localhost:8080/health; do sleep 1; done'
+
+    - name: Run API test
+      run: make test-api
+
+    - name: Show container logs
+      if: always()
+      run: docker logs fpga-compiler
+
+    - name: Stop container
+      if: always()
+      run: docker stop fpga-compiler && docker rm fpga-compiler

.gitignore

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+.env

Dockerfile

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+FROM golang:1.25-alpine AS builder
+
+WORKDIR /app
+
+# Install build dependencies
+RUN apk add --no-cache git
+
+# Copy go mod files
+COPY go.mod go.sum* ./
+RUN go mod download
+
+# Copy source code
+COPY *.go ./
+
+# Build the application
+RUN CGO_ENABLED=0 GOOS=linux go build -o /fpga-compiler .
+
+# Final stage
+FROM alpine:3.23
+
+# Install FPGA toolchain from edge repository
+RUN apk add --no-cache \
+    --repository=http://dl-cdn.alpinelinux.org/alpine/edge/testing \
+    yosys \
+    nextpnr-ice40 \
+    icestorm
+
+# Copy the binary from builder
+COPY --from=builder /fpga-compiler /usr/local/bin/fpga-compiler
+
+# Create app directory for verilog files
+RUN mkdir -p /app/verilog
+WORKDIR /app
+
+# Copy verilog files (these will be copied from the host)
+COPY verilog/ /app/verilog/
+
+# Expose port
+EXPOSE 8080
+
+# Run the application
+CMD ["fpga-compiler"]

LICENSE

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+Copyright 2024 Tiny Tapeout LTD
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Note: the files under the [src/sim/spice](src/sim/spice/) directory are licensed under the MIT License.

Makefile

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+.PHONY: build run docker-build docker-run docker-push clean test-api
+
+build:
+	go build -o fpga-compiler .
+
+run:
+	go run main.go
+
+docker-build:
+	docker build -t fpga-compiler:latest .
+
+docker-run:
+	docker run -p 8080:8080 --rm fpga-compiler:latest
+
+docker-compose-up:
+	docker-compose up --build
+
+docker-compose-down:
+	docker-compose down
+
+clean:
+	rm -f fpga-compiler
+	docker-compose down -v
+
+test-api:
+	@echo "Testing API endpoint..."
+	@curl -X POST http://localhost:8080/api/compile \
+		-H "Content-Type: application/json" \
+		-d '{"sources":{"project.v":"module tt_um_test(input clk, output led); reg r; always @(posedge clk) r <= ~r; assign led = r; endmodule"},"topModule":"tt_um_test"}'

README.md

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+# Tiny Tapeout FPGA Compilation Server
+
+A lightweight Go server that compiles Verilog projects using Yosys and nextpnr-ice40, streaming output in real-time.
+
+## Features
+
+- Receives Verilog source files via HTTP POST
+- Compiles using Yosys + nextpnr-ice40 + icepack
+- Streams compilation output in real-time using Server-Sent Events (SSE)
+- Returns the compiled bitstream (.bin file) on success
+
+## Quick Start
+
+**Start the server:**
+```bash
+docker-compose up --build
+```
+
+**Check health:**
+```bash
+curl http://localhost:8080/health
+```
+
+**Test the API:**
+```bash
+make test-api
+```
+
+You should see streaming output from yosys, nextpnr, and icepack!
+
+**Stop the server:**
+```bash
+docker-compose down
+```
+
+## Building
+
+```bash
+docker build -t fpga-compiler .
+```
+
+Or using docker-compose:
+
+```bash
+docker-compose build
+```
+
+## Running
+
+```bash
+docker run -p 8080:8080 fpga-compiler
+```
+
+Or using docker-compose:
+
+```bash
+docker-compose up
+```
+
+## API
+
+### POST /api/compile
+
+Compiles Verilog files and returns the bitstream.
+
+**Request Body:**
+
+```json
+{
+  "sources": {
+    "project.v": "module project_top(...); ... endmodule",
+    "other.v": "module other(...); ... endmodule"
+  },
+  "topModule": "tt_um_project_name"
+}
+```
+
+**Response:**
+
+Server-Sent Events stream with JSON messages:
+
+```json
+{"type": "command", "command": "yosys", "args": ["..."]}
+{"type": "stdout", "data": "Output text..."}
+{"type": "stderr", "data": "Error text..."}
+{"type": "success", "data": "base64:...bitstream data..."}
+{"type": "error", "message": "Error message"}
+```
+
+### GET /health
+
+Health check endpoint.
+
+## Environment Variables
+
+- `PORT` - Server port (default: 8080)
+
+## Development
+
+```bash
+# Install dependencies
+go mod download
+
+# Run locally (requires yosys, nextpnr-ice40, icepack installed)
+go run main.go
+```

docker-compose.yml

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+services:
+  fpga-compiler:
+    build:
+      context: .
+      dockerfile: Dockerfile
+    ports:
+      - "8080:8080"
+    environment:
+      - PORT=8080
+    restart: unless-stopped
+    healthcheck:
+      test: ["CMD", "wget", "--quiet", "--tries=1", "--spider", "http://localhost:8080/health"]
+      interval: 30s
+      timeout: 10s
+      retries: 3
+      start_period: 40s

go.mod

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+module github.com/TinyTapeout/vga-playground/server
+
+go 1.21
+
+require github.com/google/uuid v1.6.0