diff --git a/slides/lectures/acs_cc/04/slides.md b/slides/lectures/acs_cc/04/slides.md index 9b8c08a24..b1a6fbe9f 100644 --- a/slides/lectures/acs_cc/04/slides.md +++ b/slides/lectures/acs_cc/04/slides.md @@ -40,12 +40,6 @@ Lecture 4 src: ../../resources/timers/slides.md --- - - ---- -src: ../../resources/signals/slides.md ---- - --- diff --git a/slides/lectures/fils_en/04/slides.md b/slides/lectures/fils_en/04/slides.md index 6b86d0fd4..f91aa7c9b 100644 --- a/slides/lectures/fils_en/04/slides.md +++ b/slides/lectures/fils_en/04/slides.md @@ -43,7 +43,7 @@ src: ../../resources/timers/slides.md --- -src: ../../resources/signals/slides.md +src: ../../resources/signals/basic.md --- diff --git a/slides/lectures/resources/signals/ICs_same_voltage.svg b/slides/lectures/resources/signals/ICs_same_voltage.svg new file mode 100644 index 000000000..0c0d273d3 --- /dev/null +++ b/slides/lectures/resources/signals/ICs_same_voltage.svg @@ -0,0 +1 @@ +MZLMZHIC1......vo1IC2......vi20VCCoutputhighVOHminVOLmaxoutputlow0VCCVIHmaxVILmininputhighinputlow \ No newline at end of file diff --git a/slides/lectures/resources/signals/VCC1_smaller_VCC2.svg b/slides/lectures/resources/signals/VCC1_smaller_VCC2.svg new file mode 100644 index 000000000..73256f1f9 --- /dev/null +++ b/slides/lectures/resources/signals/VCC1_smaller_VCC2.svg @@ -0,0 +1 @@ +IC1......vo1IC2......MZLvi20VCC1outputhighVOHminVOLmaxoutputlow0VCC2VIHmaxVILmininputhighinputlow \ No newline at end of file diff --git a/slides/lectures/resources/signals/basic.md b/slides/lectures/resources/signals/basic.md new file mode 100644 index 000000000..25334be4f --- /dev/null +++ b/slides/lectures/resources/signals/basic.md @@ -0,0 +1,68 @@ +--- +layout: section +--- +# Signals +Digital Signals - Recap + +--- + +# Signals +Analog vs Digital + +
+ +
+ +- *analog signals* are *real* signals +- *digital signals* are *a numerical representation* of an analog signal (software level) +- hardware usually works with two-level digital signals (hardware level) + +#### Exceptions +- in wireless and in high-speed cable communication things get more complicated + +> for PCB level / between integrated circuits on the same board / inside the same chip - things are a "a little simpler" - as detailed in the following + +
+ +![AD](./a_d.png) + +
+ +--- + +# Why use digital in computing? + +
+ +
+ +Signal that we *want* to generate with an output pin + +![Digital Step](./digital_step.svg) + +
+ +
+ + +Signal that what we actually generate + +![Analog Step](./analog_step.svg) + +
+ +
+ +> Why we sill use it? Because after passing through an IC or a gate inside an IC - the signal si "rebuilt" and if the "digital discipline" described in the following is respected - we can preserve the information after numerous "passes". Thus, each element can behave with a large margin for error, yet the final result is correct. + +--- +--- +# Noise Margin + +
+ +![Noise](./noise.svg) + +
+ + diff --git a/slides/lectures/resources/signals/d_output.svg b/slides/lectures/resources/signals/d_output.svg new file mode 100644 index 000000000..b707faf98 --- /dev/null +++ b/slides/lectures/resources/signals/d_output.svg @@ -0,0 +1 @@ +vivoVCCVOHVOL0 \ No newline at end of file diff --git a/slides/lectures/resources/signals/digital_v2.md b/slides/lectures/resources/signals/digital_v2.md new file mode 100644 index 000000000..d46682d21 --- /dev/null +++ b/slides/lectures/resources/signals/digital_v2.md @@ -0,0 +1,14 @@ +--- +layout: section +--- +# Digital Signals - recap & key points + +Recap from ED & key concepts usefull for PM + + + +--- + +# Digital Signals - recap & key points + +# diff --git a/slides/lectures/resources/signals/extra.md b/slides/lectures/resources/signals/extra.md new file mode 100644 index 000000000..05755dfa9 --- /dev/null +++ b/slides/lectures/resources/signals/extra.md @@ -0,0 +1,191 @@ +--- +layout: two-cols +--- + +# Why is the output not ideal? + + +### The two corresponding voltage output levels are affected by: + +- power supply voltage +- output current +- temperature +- variations in the manufacturing process + +:: right :: + +
+
+
+
+ + + + +--- +layout: two-cols +--- + +# ICs same voltage + + +### Usually will work as is + +- usually, they will be compatible +- conditions: +> V_OH_transmiter > V_IH_receiver + +
+ +> V_OL_transmiter < V_IL_receiver + +:: right :: + + + +--- +layout: two-cols +--- + +# VCC1 > VCC2 + + +### Might work, might produce magic smock + +- if +> V_OH_transmiter > VCC_receiver + + PROBLEM + +### Solutions: +- level shifter +- resistor divider / voltage limiter + +Examples: + + + Bi-Directional Level Shifter (4 Channels) + + +
+ + + Level Shifter Multi-Channel + + + +
+ + + 8 Channels Level Shifter + + + + + +:: right :: + + + + +--- +layout: two-cols +--- + +# VCC1 < VCC2 + + +### Might work + +- if +> V_CC_transmiter close to VIH_receiver + + Might work in an intermittent mode - hard to debug! + +### Solutions: +- level shifter +- resistor divider / voltage limiter + +Examples: + + + Bi-Directional Level Shifter (4 Channels) + + +
+ + + Level Shifter Multi-Channel + + + +
+ + + 8 Channels Level Shifter + + + + + +:: right :: + + + + +--- +layout: two-cols +--- + +# Why Pull-Down R + +- Without pull-down – when the button is not pressed, it leaves the input pin floating. +- The second design ensures that the voltage level has a well-defined state, regardless of the button's state. +- R1 is called a "pull-down" resistor. + +:: right :: + +
+
+
+
+ + + + +--- +layout: two-cols +--- + +# Why Pull-Up R + +- Same reasoning +- R1 is called a "pull-up" resistor. + +##Obs: +- most microcontrollers have at least a pull-up resistor incorporated on GPIOs - that can be activated in software +- some have both pull-up and pull-down +- typically, these are sized for a 50 - 10 nA current consumption + + +:: right :: + +
+
+
+
+ + + + +--- + +# Notes on output pins + +- most microcontrollers have a limit of around 10mA per output PIN +- ! do not connect an LED without a resistor in series )to limit the current) +- ! do not connect a motor / any type of inductive load + +## Solutions: +- use a transistor +- use an IC with incorporated Darlinghtons (eg: ULN2003) diff --git a/slides/lectures/resources/signals/pull_down.png b/slides/lectures/resources/signals/pull_down.png new file mode 100644 index 000000000..27888c21f Binary files /dev/null and b/slides/lectures/resources/signals/pull_down.png differ diff --git a/slides/lectures/resources/signals/pull_up.jpg b/slides/lectures/resources/signals/pull_up.jpg new file mode 100644 index 000000000..6b5e4e5fe Binary files /dev/null and b/slides/lectures/resources/signals/pull_up.jpg differ diff --git a/slides/lectures/resources/signals/pull_up.png b/slides/lectures/resources/signals/pull_up.png new file mode 100644 index 000000000..ce1eb6387 Binary files /dev/null and b/slides/lectures/resources/signals/pull_up.png differ diff --git a/slides/lectures/resources/signals/vcc1_larger_vcc2.svg b/slides/lectures/resources/signals/vcc1_larger_vcc2.svg new file mode 100644 index 000000000..ae8045887 --- /dev/null +++ b/slides/lectures/resources/signals/vcc1_larger_vcc2.svg @@ -0,0 +1 @@ +MZLMZHIC1......vo1IC2......vi20VCC1outputhighVOHminVCC2inputhighVIHmax VILmin inputlowVOLmaxoutputlow0 \ No newline at end of file