@@ -198,67 +198,105 @@ uvvm_vvc_framework.files = [
198198' UVVM/uvvm_vvc_framework/src/*.vhd' ,
199199]
200200
201- bitvis_vip_uart.files = [
201+ bitvis_vip_avalon_mm.files = [
202+ ' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
203+ ' UVVM/bitvis_vip_avalon_mm/**/*.vhd' ,
204+ ]
205+
206+ bitvis_vip_avalon_st.files = [
207+ ' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
208+ ' UVVM/bitvis_vip_avalon_st/**/*.vhd' ,
209+ ]
210+
211+ bitvis_vip_axi.files = [
202212' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
203- ' UVVM/bitvis_vip_uart/src /*.vhd' ,
213+ ' UVVM/bitvis_vip_axi/** /*.vhd' ,
204214]
205215
206216bitvis_vip_axilite.files = [
207217' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
208- ' UVVM/bitvis_vip_axilite/src /*.vhd' ,
218+ ' UVVM/bitvis_vip_axilite/** /*.vhd' ,
209219]
210220
211- bitvis_vip_i2c .files = [
221+ bitvis_vip_axistream .files = [
212222' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
213- ' UVVM/bitvis_vip_i2c/src /*.vhd' ,
223+ ' UVVM/bitvis_vip_axistream/** /*.vhd' ,
214224]
215225
216226bitvis_vip_clock_generator.files = [
217227' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
218- ' UVVM/bitvis_vip_clock_generator/src /*.vhd' ,
228+ ' UVVM/bitvis_vip_clock_generator/** /*.vhd' ,
219229]
220230
221- bitvis_vip_scoreboard.files = [
222- # 'UVVM/bitvis_vip_scoreboard/demo/*.vhd',
223- ' UVVM/bitvis_vip_scoreboard/src/*.vhd' ,
231+ # bitvis_vip_error_injection.files = [
232+ # 'UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd',
233+ # 'UVVM/bitvis_vip_error_injection/**/*.vhd',
234+ # ]
235+
236+ bitvis_vip_ethernet.files = [
237+ ' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
238+ ' UVVM/bitvis_vip_ethernet/**/*.vhd' ,
224239]
225240
226- bitvis_vip_spi .files = [
241+ bitvis_vip_gmii .files = [
227242' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
228- ' UVVM/bitvis_vip_spi/src /*.vhd' ,
243+ ' UVVM/bitvis_vip_gmii/** /*.vhd' ,
229244]
230245
231- bitvis_uart.files = [
232- ' UVVM/bitvis_uart/tb/*.vhd' ,
233- ' UVVM/bitvis_uart/src/*.vhd' ,
246+ bitvis_vip_gpio.files = [
247+ ' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
248+ # 'UVVM/bitvis_vip_gpio/tb/*.vhd',
249+ ' UVVM/bitvis_vip_gpio/src/*.vhd' ,
234250]
235251
236- bitvis_irqc .files = [
237- ' UVVM/bitvis_irqc/tb /*.vhd' ,
238- ' UVVM/bitvis_irqc/src /*.vhd' ,
252+ bitvis_vip_hvvc_to_vvc_bridge .files = [
253+ # 'UVVM/uvvm_vvc_framework/src_target_dependent /*.vhd',
254+ ' UVVM/bitvis_vip_hvvc_to_vvc_bridge/** /*.vhd' ,
239255]
240256
241- bitvis_vip_axistream .files = [
257+ bitvis_vip_i2c .files = [
242258' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
243- ' UVVM/bitvis_vip_axistream/src /*.vhd' ,
259+ ' UVVM/bitvis_vip_i2c/** /*.vhd' ,
244260]
245261
246- bitvis_vip_avalon_mm .files = [
262+ bitvis_vip_rgmii .files = [
247263' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
248- ' UVVM/bitvis_vip_avalon_mm/src /*.vhd' ,
264+ ' UVVM/bitvis_vip_rgmii/** /*.vhd' ,
249265]
250266
251267bitvis_vip_sbi.files = [
252268' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
253- ' UVVM/bitvis_vip_sbi/src /*.vhd' ,
269+ ' UVVM/bitvis_vip_sbi/** /*.vhd' ,
254270]
255271
256- bitvis_vip_gpio.files = [
272+ bitvis_vip_spec_cov.files = [
273+ ' UVVM/bitvis_vip_spec_cov/src/*.vhd' ,
274+ ]
275+
276+ bitvis_vip_scoreboard.files = [
277+ # 'UVVM/bitvis_vip_scoreboard/demo/*.vhd',
278+ ' UVVM/bitvis_vip_scoreboard/src/*.vhd' ,
279+ ]
280+
281+ bitvis_vip_spi.files = [
257282' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
258- # 'UVVM/bitvis_vip_gpio/tb/*.vhd',
259- ' UVVM/bitvis_vip_gpio/src/*.vhd' ,
283+ ' UVVM/bitvis_vip_spi/**/*.vhd' ,
260284]
261285
286+ bitvis_vip_uart.files = [
287+ ' UVVM/uvvm_vvc_framework/src_target_dependent/*.vhd' ,
288+ ' UVVM/bitvis_vip_uart/**/*.vhd' ,
289+ ]
290+
291+ bitvis_uart.files = [
292+ ' UVVM/bitvis_uart/tb/*.vhd' ,
293+ ' UVVM/bitvis_uart/src/*.vhd' ,
294+ ]
295+
296+ bitvis_irqc.files = [
297+ ' UVVM/bitvis_irqc/tb/*.vhd' ,
298+ ' UVVM/bitvis_irqc/src/*.vhd' ,
299+ ]
262300
263301PoC.files = [
264302' PoC/src/sim/sim_global.v08.vhdl' ,
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