How should exclusive memory accesses be lifted?

[yrp604]

arm64 has instructions like ldxr and stxr: https://developer.arm.com/documentation/den0024/a/The-A64-instruction-set/Memory-access-instructions/Synchronization-primitives

How should these be lifted? A straight memory load + instrincis on each side? What are the pros/cons of the different approaches here?

[plafosse]

We don’t currently have a good solution to this issue. One suggestion would be to create an intrinsic lock/unlock instructions and use those somehow.

[WZ-Tong]

Maybe this is a good idea, all atomic operations may all based on instruction.
For blocking instruction, use intrinsic
void RW_LOCK_BLOCK(op) to represent, for non-blocking instruction, use lock_result RW_LOCK(op) to represent. These two intrinsic instruction may fit all platform maybe?

There is a necessity to implement at least non-blocking lock instruction, because it always contains 'return' value (or flag, indicator, etc), ignore them will cause variable error or function signature auto analysis error