|
61 | 61 | # *** Wiznet Common Registers ***
|
62 | 62 | _REG_MR = {"w5100s": const(0x0000), "w5500": const(0x0000)}
|
63 | 63 | # Gateway IPv4 Address.
|
64 |
| -_REG_GAR = {"w5100s": const(0x0001), "w5500": const(0x0001), "w6100": const(0x4130), "w6300": const(0x4130)} |
| 64 | +_REG_GAR = { |
| 65 | + "w5100s": const(0x0001), |
| 66 | + "w5500": const(0x0001), |
| 67 | + "w6100": const(0x4130), |
| 68 | + "w6300": const(0x4130), |
| 69 | +} |
65 | 70 | # Subnet Mask Address
|
66 |
| -_REG_SUBR = {"w5100s": const(0x0005), "w5500": const(0x0005), "w6100": const(0x4134), "w6300": const(0x4134)} |
| 71 | +_REG_SUBR = { |
| 72 | + "w5100s": const(0x0005), |
| 73 | + "w5500": const(0x0005), |
| 74 | + "w6100": const(0x4134), |
| 75 | + "w6300": const(0x4134), |
| 76 | +} |
67 | 77 | # Chip version.
|
68 |
| -_REG_VERSIONR = {"w5100s": const(0x0080), "w5500": const(0x0039), "w6100": const(0x0000), "w6300": const(0x0000)} |
| 78 | +_REG_VERSIONR = { |
| 79 | + "w5100s": const(0x0080), |
| 80 | + "w5500": const(0x0039), |
| 81 | + "w6100": const(0x0000), |
| 82 | + "w6300": const(0x0000), |
| 83 | +} |
69 | 84 | # Source Hardware Address
|
70 |
| -_REG_SHAR = {"w5100s": const(0x0009), "w5500": const(0x0009), "w6100": const(0x4120), "w6300": const(0x4120)} |
| 85 | +_REG_SHAR = { |
| 86 | + "w5100s": const(0x0009), |
| 87 | + "w5500": const(0x0009), |
| 88 | + "w6100": const(0x4120), |
| 89 | + "w6300": const(0x4120), |
| 90 | +} |
71 | 91 | # Source IP Address
|
72 |
| -_REG_SIPR = {"w5100s": const(0x000F), "w5500": const(0x000F), "w6100": const(0x4138), "w6300": const(0x4138)} |
| 92 | +_REG_SIPR = { |
| 93 | + "w5100s": const(0x000F), |
| 94 | + "w5500": const(0x000F), |
| 95 | + "w6100": const(0x4138), |
| 96 | + "w6300": const(0x4138), |
| 97 | +} |
73 | 98 | # Register with link status flag (PHYCFGR for 5xxxx, PHYSR for 6100).
|
74 |
| -_REG_LINK_FLAG = {"w5100s": const(0x003C), "w5500": const(0x002E), "w6100": const(0x3000), "w6300": const(0x3000)} |
75 |
| -_REG_RCR = {"w5100s": const(0x0019), "w5500": const(0x001B), "w6100": const(0x4204), "w6300": const(0x4204)} |
76 |
| -_REG_RTR = {"w5100s": const(0x0017), "w5500": const(0x0019), "w6100": const(0x4200), "w6300": const(0x4200)} |
| 99 | +_REG_LINK_FLAG = { |
| 100 | + "w5100s": const(0x003C), |
| 101 | + "w5500": const(0x002E), |
| 102 | + "w6100": const(0x3000), |
| 103 | + "w6300": const(0x3000), |
| 104 | +} |
| 105 | +_REG_RCR = { |
| 106 | + "w5100s": const(0x0019), |
| 107 | + "w5500": const(0x001B), |
| 108 | + "w6100": const(0x4204), |
| 109 | + "w6300": const(0x4204), |
| 110 | +} |
| 111 | +_REG_RTR = { |
| 112 | + "w5100s": const(0x0017), |
| 113 | + "w5500": const(0x0019), |
| 114 | + "w6100": const(0x4200), |
| 115 | + "w6300": const(0x4200), |
| 116 | +} |
77 | 117 |
|
78 | 118 | # *** Wiznet Socket Registers ***
|
79 | 119 | # Socket n Mode.
|
80 | 120 | _REG_SNMR = const(0x0000)
|
81 | 121 | # Socket n Command.
|
82 |
| -_REG_SNCR = {"w5100s": const(0x0001), "w5500": const(0x0001), "w6100": const(0x0010), "w6300": const(0x0010)} |
| 122 | +_REG_SNCR = { |
| 123 | + "w5100s": const(0x0001), |
| 124 | + "w5500": const(0x0001), |
| 125 | + "w6100": const(0x0010), |
| 126 | + "w6300": const(0x0010), |
| 127 | +} |
83 | 128 | # Socket n Interrupt.
|
84 |
| -_REG_SNIR = {"w5100s": const(0x0002), "w5500": const(0x0002), "w6100": const(0x0020), "w6300": const(0x0020)} |
| 129 | +_REG_SNIR = { |
| 130 | + "w5100s": const(0x0002), |
| 131 | + "w5500": const(0x0002), |
| 132 | + "w6100": const(0x0020), |
| 133 | + "w6300": const(0x0020), |
| 134 | +} |
85 | 135 | # Socket n Status.
|
86 |
| -_REG_SNSR = {"w5100s": const(0x0003), "w5500": const(0x0003), "w6100": const(0x0030), "w6300": const(0x0030)} |
| 136 | +_REG_SNSR = { |
| 137 | + "w5100s": const(0x0003), |
| 138 | + "w5500": const(0x0003), |
| 139 | + "w6100": const(0x0030), |
| 140 | + "w6300": const(0x0030), |
| 141 | +} |
87 | 142 | # Socket n Source Port.
|
88 |
| -_REG_SNPORT = {"w5100s": const(0x0004), "w5500": const(0x0004), "w6100": const(0x0114), "w6300": const(0x0114)} |
| 143 | +_REG_SNPORT = { |
| 144 | + "w5100s": const(0x0004), |
| 145 | + "w5500": const(0x0004), |
| 146 | + "w6100": const(0x0114), |
| 147 | + "w6300": const(0x0114), |
| 148 | +} |
89 | 149 | # Destination IPv4 Address.
|
90 |
| -_REG_SNDIPR = {"w5100s": const(0x000C), "w5500": const(0x000C), "w6100": const(0x0120), "w6300": const(0x0120)} |
| 150 | +_REG_SNDIPR = { |
| 151 | + "w5100s": const(0x000C), |
| 152 | + "w5500": const(0x000C), |
| 153 | + "w6100": const(0x0120), |
| 154 | + "w6300": const(0x0120), |
| 155 | +} |
91 | 156 | # Destination Port.
|
92 |
| -_REG_SNDPORT = {"w5100s": const(0x0010), "w5500": const(0x0010), "w6100": const(0x0140), "w6300": const(0x0140)} |
| 157 | +_REG_SNDPORT = { |
| 158 | + "w5100s": const(0x0010), |
| 159 | + "w5500": const(0x0010), |
| 160 | + "w6100": const(0x0140), |
| 161 | + "w6300": const(0x0140), |
| 162 | +} |
93 | 163 | # RX Free Size.
|
94 |
| -_REG_SNRX_RSR = {"w5100s": const(0x0026), "w5500": const(0x0026), "w6100": const(0x0224), "w6300": const(0x0224)} |
| 164 | +_REG_SNRX_RSR = { |
| 165 | + "w5100s": const(0x0026), |
| 166 | + "w5500": const(0x0026), |
| 167 | + "w6100": const(0x0224), |
| 168 | + "w6300": const(0x0224), |
| 169 | +} |
95 | 170 | # Read Size Pointer.
|
96 |
| -_REG_SNRX_RD = {"w5100s": const(0x0028), "w5500": const(0x0028), "w6100": const(0x0228), "w6300": const(0x0228)} |
| 171 | +_REG_SNRX_RD = { |
| 172 | + "w5100s": const(0x0028), |
| 173 | + "w5500": const(0x0028), |
| 174 | + "w6100": const(0x0228), |
| 175 | + "w6300": const(0x0228), |
| 176 | +} |
97 | 177 | # Socket n TX Free Size.
|
98 |
| -_REG_SNTX_FSR = {"w5100s": const(0x0020), "w5500": const(0x0020), "w6100": const(0x0204), "w6300": const(0x0204)} |
| 178 | +_REG_SNTX_FSR = { |
| 179 | + "w5100s": const(0x0020), |
| 180 | + "w5500": const(0x0020), |
| 181 | + "w6100": const(0x0204), |
| 182 | + "w6300": const(0x0204), |
| 183 | +} |
99 | 184 | # TX Write Pointer.
|
100 |
| -_REG_SNTX_WR = {"w5100s": const(0x0024), "w5500": const(0x0024), "w6100": const(0x020C), "w6300": const(0x020C)} |
| 185 | +_REG_SNTX_WR = { |
| 186 | + "w5100s": const(0x0024), |
| 187 | + "w5500": const(0x0024), |
| 188 | + "w6100": const(0x020C), |
| 189 | + "w6300": const(0x020C), |
| 190 | +} |
101 | 191 |
|
102 | 192 | # SNSR Commands
|
103 | 193 | SNSR_SOCK_CLOSED = const(0x00)
|
|
153 | 243 | _DEFAULT_MAC = "DE:AD:BE:EF:FE:ED"
|
154 | 244 |
|
155 | 245 | # Maximum number of sockets to support, differs between chip versions.
|
156 |
| -_MAX_SOCK_NUM = {"w5100s": const(0x04), "w5500": const(0x08), "w6100": const(0x08), "w6300": const(0x08)} |
| 246 | +_MAX_SOCK_NUM = { |
| 247 | + "w5100s": const(0x04), |
| 248 | + "w5500": const(0x08), |
| 249 | + "w6100": const(0x08), |
| 250 | + "w6300": const(0x08), |
| 251 | +} |
157 | 252 | _SOCKET_INVALID = const(0xFF)
|
158 | 253 |
|
159 | 254 |
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@@ -452,9 +547,13 @@ def link_status(self) -> bool:
|
452 | 547 | """
|
453 | 548 | if self._chip_type == "w6300":
|
454 | 549 | # w6300 uses PHYCFGR register for link status
|
455 |
| - return bool(int.from_bytes(self._read(_REG_LINK_FLAG[self._chip_type], 0x80), "big") & 0x01) |
| 550 | + return bool( |
| 551 | + int.from_bytes(self._read(_REG_LINK_FLAG[self._chip_type], 0x80), "big") & 0x01 |
| 552 | + ) |
456 | 553 | else:
|
457 |
| - return bool(int.from_bytes(self._read(_REG_LINK_FLAG[self._chip_type], 0x00), "big") & 0x01) |
| 554 | + return bool( |
| 555 | + int.from_bytes(self._read(_REG_LINK_FLAG[self._chip_type], 0x00), "big") & 0x01 |
| 556 | + ) |
458 | 557 |
|
459 | 558 | @property
|
460 | 559 | def ifconfig(self) -> Tuple[bytes, bytes, bytes, bytes]:
|
|
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