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feat(intel): extending to support SMMU in FCS GET_DIGEST, MAC_VERIFY, ECDSA_SHA2_DATA_SIGNING and ECDSA_SHA2_DATA_SIGNATURE_VERIFY
This patch is to extend support SMMU in FCS GET_DIGEST, MAC_VERIFY, ECDSA_SHA2_DATA_SIGNING and ECDSA_SHA2_DATA_SIGNATURE_VERIFY. It also will change to use asynchorous mailbox send command to improve fcs_client timing performance. Increase the SIP_SVC_VERSION_MAJOR because SMMU support is not backward compatible. Increase the SIP_SVC_VERSION_MINOR because 8 news function IDs are inctroduced. Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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5 files changed

+618
-45
lines changed

5 files changed

+618
-45
lines changed

‎plat/intel/soc/agilex/bl31_plat_setup.c‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "ccu/ncore_ccu.h"
1818
#include "socfpga_mailbox.h"
1919
#include "socfpga_private.h"
20+
#include "socfpga_sip_svc.h"
2021

2122
static entry_point_info_t bl32_image_ep_info;
2223
static entry_point_info_t bl33_image_ep_info;
@@ -35,6 +36,25 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
3536
return NULL;
3637
}
3738

39+
void setup_smmu_secure_context(void)
40+
{
41+
/*
42+
* Program SCR0 register (0xFA000000)
43+
* to set SMCFCFG bit[21] to 0x1 which raise stream match conflict fault
44+
* to set CLIENTPD bit[0] to 0x0 which enables SMMU for secure context
45+
*/
46+
mmio_write_32(0xFA000000, 0x00200000);
47+
48+
/*
49+
* Program SCR1 register (0xFA000004)
50+
* to set NSNUMSMRGO bit[14:8] to 0x4 which stream mapping register
51+
* for non-secure context and the rest will be secure context
52+
* to set NSNUMCBO bit[5:0] to 0x4 which allocate context bank
53+
* for non-secure context and the rest will be secure context
54+
*/
55+
mmio_write_32(0xFA000004, 0x00000404);
56+
}
57+
3858
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
3959
u_register_t arg2, u_register_t arg3)
4060
{
@@ -109,6 +129,7 @@ void bl31_platform_setup(void)
109129
gicv2_distif_init();
110130
gicv2_pcpu_distif_init();
111131
gicv2_cpuif_enable();
132+
setup_smmu_secure_context();
112133

113134
/* Signal secondary CPUs to jump to BL31 (BL2 = U-boot SPL) */
114135
mmio_write_64(PLAT_CPU_RELEASE_ADDR,

‎plat/intel/soc/common/include/socfpga_fcs.h‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -243,6 +243,11 @@ int intel_fcs_get_digest_update_finalize(uint32_t session_id, uint32_t context_i
243243
uint32_t src_addr, uint32_t src_size,
244244
uint64_t dst_addr, uint32_t *dst_size,
245245
uint8_t is_finalised, uint32_t *mbox_error);
246+
int intel_fcs_get_digest_smmu_update_finalize(uint32_t session_id, uint32_t context_id,
247+
uint32_t src_addr, uint32_t src_size,
248+
uint64_t dst_addr, uint32_t *dst_size,
249+
uint8_t is_finalised, uint32_t *mbox_error,
250+
uint32_t *send_id);
246251

247252
int intel_fcs_mac_verify_init(uint32_t session_id, uint32_t context_id,
248253
uint32_t key_id, uint32_t param_size,
@@ -252,6 +257,11 @@ int intel_fcs_mac_verify_update_finalize(uint32_t session_id, uint32_t context_i
252257
uint64_t dst_addr, uint32_t *dst_size,
253258
uint32_t data_size, uint8_t is_finalised,
254259
uint32_t *mbox_error);
260+
int intel_fcs_mac_verify_smmu_update_finalize(uint32_t session_id, uint32_t context_id,
261+
uint32_t src_addr, uint32_t src_size,
262+
uint64_t dst_addr, uint32_t *dst_size,
263+
uint32_t data_size, uint8_t is_finalised,
264+
uint32_t *mbox_error, uint32_t *send_id);
255265

256266
int intel_fcs_ecdsa_hash_sign_init(uint32_t session_id, uint32_t context_id,
257267
uint32_t key_id, uint32_t param_size,
@@ -278,6 +288,11 @@ int intel_fcs_ecdsa_sha2_data_sign_update_finalize(uint32_t session_id,
278288
uint32_t src_size, uint64_t dst_addr,
279289
uint32_t *dst_size, uint8_t is_finalised,
280290
uint32_t *mbox_error);
291+
int intel_fcs_ecdsa_sha2_data_sign_smmu_update_finalize(uint32_t session_id,
292+
uint32_t context_id, uint32_t src_addr,
293+
uint32_t src_size, uint64_t dst_addr,
294+
uint32_t *dst_size, uint8_t is_finalised,
295+
uint32_t *mbox_error, uint32_t *send_id);
281296

282297
int intel_fcs_ecdsa_sha2_data_sig_verify_init(uint32_t session_id,
283298
uint32_t context_id, uint32_t key_id,
@@ -288,6 +303,12 @@ int intel_fcs_ecdsa_sha2_data_sig_verify_update_finalize(uint32_t session_id,
288303
uint32_t src_size, uint64_t dst_addr,
289304
uint32_t *dst_size, uint32_t data_size,
290305
uint8_t is_finalised, uint32_t *mbox_error);
306+
int intel_fcs_ecdsa_sha2_data_sig_verify_smmu_update_finalize(uint32_t session_id,
307+
uint32_t context_id, uint32_t src_addr,
308+
uint32_t src_size, uint64_t dst_addr,
309+
uint32_t *dst_size, uint32_t data_size,
310+
uint8_t is_finalised, uint32_t *mbox_error,
311+
uint32_t *send_id);
291312

292313
int intel_fcs_ecdsa_get_pubkey_init(uint32_t session_id, uint32_t context_id,
293314
uint32_t key_id, uint32_t param_size,

‎plat/intel/soc/common/include/socfpga_sip_svc.h‎

Lines changed: 59 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -86,49 +86,57 @@
8686
#define INTEL_SIP_SMC_GET_USERCODE 0xC200003D
8787

8888
/* FPGA Crypto Services */
89-
#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER 0xC200005A
90-
#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT 0x4200008F
91-
#define INTEL_SIP_SMC_FCS_CRYPTION 0x4200005B
92-
#define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090
93-
#define INTEL_SIP_SMC_FCS_SERVICE_REQUEST 0x4200005C
94-
#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D
95-
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E
96-
#define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F
97-
#define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064
98-
#define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065
99-
#define INTEL_SIP_SMC_FCS_ATTESTATION_SUBKEY 0xC2000066
100-
#define INTEL_SIP_SMC_FCS_ATTESTATION_MEASUREMENTS 0xC2000067
101-
#define INTEL_SIP_SMC_FCS_GET_ATTESTATION_CERT 0xC2000068
102-
#define INTEL_SIP_SMC_FCS_CREATE_CERT_ON_RELOAD 0xC2000069
103-
#define INTEL_SIP_SMC_FCS_OPEN_CS_SESSION 0xC200006E
104-
#define INTEL_SIP_SMC_FCS_CLOSE_CS_SESSION 0xC200006F
105-
#define INTEL_SIP_SMC_FCS_IMPORT_CS_KEY 0x42000070
106-
#define INTEL_SIP_SMC_FCS_EXPORT_CS_KEY 0xC2000071
107-
#define INTEL_SIP_SMC_FCS_REMOVE_CS_KEY 0xC2000072
108-
#define INTEL_SIP_SMC_FCS_GET_CS_KEY_INFO 0xC2000073
109-
#define INTEL_SIP_SMC_FCS_AES_CRYPT_INIT 0xC2000074
110-
#define INTEL_SIP_SMC_FCS_AES_CRYPT_UPDATE 0x42000075
111-
#define INTEL_SIP_SMC_FCS_AES_CRYPT_FINALIZE 0x42000076
112-
#define INTEL_SIP_SMC_FCS_GET_DIGEST_INIT 0xC2000077
113-
#define INTEL_SIP_SMC_FCS_GET_DIGEST_UPDATE 0xC2000078
114-
#define INTEL_SIP_SMC_FCS_GET_DIGEST_FINALIZE 0xC2000079
115-
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_INIT 0xC200007A
116-
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_UPDATE 0xC200007B
117-
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_FINALIZE 0xC200007C
118-
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_INIT 0xC200007D
119-
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_FINALIZE 0xC200007F
120-
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT 0xC2000080
121-
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_UPDATE 0xC2000081
122-
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE 0xC2000082
123-
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_INIT 0xC2000083
124-
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_FINALIZE 0xC2000085
125-
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT 0xC2000086
126-
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_UPDATE 0xC2000087
127-
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE 0xC2000088
128-
#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT 0xC2000089
129-
#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_FINALIZE 0xC200008B
130-
#define INTEL_SIP_SMC_FCS_ECDH_REQUEST_INIT 0xC200008C
131-
#define INTEL_SIP_SMC_FCS_ECDH_REQUEST_FINALIZE 0xC200008E
89+
#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER 0xC200005A
90+
#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT 0x4200008F
91+
#define INTEL_SIP_SMC_FCS_CRYPTION 0x4200005B
92+
#define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090
93+
#define INTEL_SIP_SMC_FCS_SERVICE_REQUEST 0x4200005C
94+
#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D
95+
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E
96+
#define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F
97+
#define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064
98+
#define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065
99+
#define INTEL_SIP_SMC_FCS_ATTESTATION_SUBKEY 0xC2000066
100+
#define INTEL_SIP_SMC_FCS_ATTESTATION_MEASUREMENTS 0xC2000067
101+
#define INTEL_SIP_SMC_FCS_GET_ATTESTATION_CERT 0xC2000068
102+
#define INTEL_SIP_SMC_FCS_CREATE_CERT_ON_RELOAD 0xC2000069
103+
#define INTEL_SIP_SMC_FCS_OPEN_CS_SESSION 0xC200006E
104+
#define INTEL_SIP_SMC_FCS_CLOSE_CS_SESSION 0xC200006F
105+
#define INTEL_SIP_SMC_FCS_IMPORT_CS_KEY 0x42000070
106+
#define INTEL_SIP_SMC_FCS_EXPORT_CS_KEY 0xC2000071
107+
#define INTEL_SIP_SMC_FCS_REMOVE_CS_KEY 0xC2000072
108+
#define INTEL_SIP_SMC_FCS_GET_CS_KEY_INFO 0xC2000073
109+
#define INTEL_SIP_SMC_FCS_AES_CRYPT_INIT 0xC2000074
110+
#define INTEL_SIP_SMC_FCS_AES_CRYPT_UPDATE 0x42000075
111+
#define INTEL_SIP_SMC_FCS_AES_CRYPT_FINALIZE 0x42000076
112+
#define INTEL_SIP_SMC_FCS_GET_DIGEST_INIT 0xC2000077
113+
#define INTEL_SIP_SMC_FCS_GET_DIGEST_UPDATE 0xC2000078
114+
#define INTEL_SIP_SMC_FCS_GET_DIGEST_FINALIZE 0xC2000079
115+
#define INTEL_SIP_SMC_FCS_GET_DIGEST_SMMU_UPDATE 0x42000091
116+
#define INTEL_SIP_SMC_FCS_GET_DIGEST_SMMU_FINALIZE 0x42000092
117+
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_INIT 0xC200007A
118+
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_UPDATE 0xC200007B
119+
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_FINALIZE 0xC200007C
120+
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_SMMU_UPDATE 0x42000093
121+
#define INTEL_SIP_SMC_FCS_MAC_VERIFY_SMMU_FINALIZE 0x42000094
122+
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_INIT 0xC200007D
123+
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_FINALIZE 0xC200007F
124+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT 0xC2000080
125+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_UPDATE 0xC2000081
126+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE 0xC2000082
127+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_SMMU_UPDATE 0x42000095
128+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_SMMU_FINALIZE 0x42000096
129+
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_INIT 0xC2000083
130+
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_FINALIZE 0xC2000085
131+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT 0xC2000086
132+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_UPDATE 0xC2000087
133+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE 0xC2000088
134+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_SMMU_UPDATE 0x42000097
135+
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_SMMU_FINALIZE 0x42000098
136+
#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT 0xC2000089
137+
#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_FINALIZE 0xC200008B
138+
#define INTEL_SIP_SMC_FCS_ECDH_REQUEST_INIT 0xC200008C
139+
#define INTEL_SIP_SMC_FCS_ECDH_REQUEST_FINALIZE 0xC200008E
132140

133141
#define INTEL_SIP_SMC_FCS_SHA_MODE_MASK 0xF
134142
#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_MASK 0xF
@@ -166,8 +174,14 @@
166174
#define SIP_SVC_VERSION 0x8200ff03
167175

168176
/* SiP Service Calls version numbers */
169-
#define SIP_SVC_VERSION_MAJOR 1
170-
#define SIP_SVC_VERSION_MINOR 0
177+
/*
178+
* Increase if there is any backward compatibility impact
179+
*/
180+
#define SIP_SVC_VERSION_MAJOR 2
181+
/*
182+
* Increase if there is new SMC function ID being added
183+
*/
184+
#define SIP_SVC_VERSION_MINOR 1
171185

172186

173187
/* Structure Definitions */

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