From d702ccc489f7f2e6b2e331ee5717a8f07859a319 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Thu, 19 Dec 2024 20:04:55 +0800 Subject: [PATCH 01/62] a prototype of irq injection --- Cargo.lock | 114 +++++++++++++++++++++++++----------- Cargo.toml | 8 +-- arceos-vmm/src/hal.rs | 31 +++++++++- arceos-vmm/src/vmm/mod.rs | 34 +++++++++++ arceos-vmm/src/vmm/vcpus.rs | 14 +++++ 5 files changed, 163 insertions(+), 38 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index f72a814a..69da3004 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -53,10 +53,10 @@ name = "arceos-vmm" version = "0.1.0" dependencies = [ "arrayvec", - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", "axstd", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "axvm", "bitflags 2.6.0", "crate_interface", @@ -76,7 +76,7 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axalloc", "axconfig", @@ -86,6 +86,7 @@ dependencies = [ "axfs", "axhal", "axio", + "axipi", "axlog", "axruntime", "axsync", @@ -95,7 +96,7 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_gicv2#dfe5f164b94cdd07081c2fe74a0cfe4bef2852c9" +source = "git+https://github.com/arceos-hypervisor/arm_gicv2?branch=sgi#956665adcdc6b09a28078db09ad3f09ed41af80b" dependencies = [ "tock-registers", ] @@ -115,9 +116,9 @@ version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#63fbc026fb730fdde2a81d6abc67666551bd2d9d" dependencies = [ "aarch64-cpu", - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", "log", "numeric-enum-macro", "percpu", @@ -136,6 +137,24 @@ version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" +[[package]] +name = "axaddrspace" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt#2c154f34c4dac7c6c1ffab19e2a3298d8e62618e" +dependencies = [ + "axerrno", + "bit_field", + "bitflags 2.6.0", + "cfg-if", + "lazyinit", + "log", + "memory_addr", + "memory_set", + "numeric-enum-macro", + "page_table_entry", + "page_table_multiarch", +] + [[package]] name = "axaddrspace" version = "0.1.0" @@ -157,7 +176,7 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "allocator", "axerrno", @@ -170,7 +189,7 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "serde", "toml_edit 0.22.22", @@ -179,9 +198,9 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git#51bf078bb980af35c4dc4ef08e4077ade1073453" +source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#391eeaddedec62a14c03762fbd810baee206408f" dependencies = [ - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axdevice_base", "axerrno", "cfg-if", @@ -193,11 +212,12 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#24ebdf92b7fb5fbae08816094910cd30922550f0" +source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#46a16b71b3183c0ce631a7076a04f9f5aef175c9" dependencies = [ - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", "cfg-if", + "cpumask", "memory_addr", "serde", ] @@ -205,7 +225,7 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axalloc", "axconfig", @@ -262,22 +282,24 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axalloc", "axdriver", "axfs", "axhal", + "axipi", "axlog", "axruntime", "axsync", "axtask", + "kspin", ] [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axdriver", "axdriver_block", @@ -330,7 +352,7 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "aarch64-cpu", "arm_gicv2", @@ -373,10 +395,23 @@ dependencies = [ "axerrno", ] +[[package]] +name = "axipi" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" +dependencies = [ + "axconfig", + "axhal", + "kspin", + "lazyinit", + "log", + "percpu", +] + [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "cfg-if", "crate_interface", @@ -387,7 +422,7 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axconfig", "axerrno", @@ -401,13 +436,14 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axalloc", "axconfig", "axdriver", "axfs", "axhal", + "axipi", "axlog", "axmm", "axtask", @@ -420,7 +456,7 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "arceos_api", "axerrno", @@ -432,7 +468,7 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axtask", "kspin", @@ -441,7 +477,7 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#9a845553df23944a6a3a0dd3e45df23c15f26465" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axconfig", "axhal", @@ -458,12 +494,23 @@ dependencies = [ "timer_list", ] +[[package]] +name = "axvcpu" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#84595494ea6931fc4d58c67daa27df78be4a7e56" +dependencies = [ + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axerrno", + "memory_addr", + "percpu", +] + [[package]] name = "axvcpu" version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/axvcpu.git#1e9fa523378872ed0c947e2abd4699ed2d5025f2" dependencies = [ - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", "axerrno", "memory_addr", "percpu", @@ -472,15 +519,16 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git#6092edec74692767b51a9648228a050bae5e113b" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#2f5a5565112e66d3e26473d29c6994464d9b88fb" dependencies = [ "arm_vcpu", - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axdevice", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "cfg-if", + "cpumask", "log", "memory_addr", "page_table_entry", @@ -892,9 +940,9 @@ checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a" [[package]] name = "percpu" -version = "0.1.5" +version = "0.1.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c7156fa6801337eb593af0c6d664b92de216c5e53e761e1eb6e119cff542d195" +checksum = "66a1cb7a2ae1e4ada6e7fd9e46b6b2024353f28d17661d480c8238927571cbd3" dependencies = [ "cfg-if", "percpu_macros", @@ -1020,9 +1068,9 @@ name = "riscv_vcpu" version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#e3c992967219f10daadd0a71f6187641f381f563" dependencies = [ - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", "bit_field", "bitflags 2.6.0", "cfg-if", @@ -1383,11 +1431,11 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git#dc088685f76f83d52378d2fe78952cde3c187da9" +source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#14eb571aeda58fa13d9a2633fdca10608f9e8971" dependencies = [ - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "bit_field", "bitflags 2.6.0", "cfg-if", diff --git a/Cargo.toml b/Cargo.toml index d7d86829..9494b291 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -7,8 +7,8 @@ members = ["arceos-vmm"] lto = true [workspace.dependencies] -axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm" } +axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_inject_interrupt", features = ["ipi", "smp"] } -axvm = { git = "https://github.com/arceos-hypervisor/axvm.git" } -axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git" } -axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } +axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt" } +axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } +axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git", branch = "inject_interrupt" } diff --git a/arceos-vmm/src/hal.rs b/arceos-vmm/src/hal.rs index 8d8ca842..39492494 100644 --- a/arceos-vmm/src/hal.rs +++ b/arceos-vmm/src/hal.rs @@ -1,4 +1,4 @@ -use std::os::arceos; +use std::{boxed::Box, os::arceos::{self, modules::{axhal::cpu::current_task_ptr, axipi::{self, IPIEventFn}, axtask::{self, TaskExtRef}}}}; use page_table_multiarch::PagingHandler; @@ -7,6 +7,8 @@ use axaddrspace::{HostPhysAddr, HostVirtAddr}; use axvcpu::AxVCpuHal; use axvm::{AxVMHal, AxVMPerCpu}; +use crate::vmm; + /// Implementation for `AxVMHal` trait. pub struct AxVMHalImpl; @@ -20,6 +22,33 @@ impl AxVMHal for AxVMHalImpl { fn current_time_nanos() -> u64 { axhal::time::monotonic_time_nanos() } + + fn current_vm_id() -> usize { + axtask::current().task_ext().vm.id() + } + + fn current_vcpu_id() -> usize { + axtask::current().task_ext().vcpu.id() + } + + fn current_pcpu_id() -> usize { + axhal::cpu::this_cpu_id() + } +} + +pub fn vcpu_resides_on(vm_id: usize, vcpu_id: usize) -> usize { + todo!() +} + +pub fn inject_irq_to_vcpu_remotely( + vm_id: usize, + vcpu_id: usize, + irq: usize, + pcpu_id: usize +) { + vmm::with_vm_and_vcpu_on_pcpu(vm_id, vcpu_id, move |_, vcpu| { + vcpu.inject_interrupt(irq); + }); } pub struct AxVCpuHalImpl; diff --git a/arceos-vmm/src/vmm/mod.rs b/arceos-vmm/src/vmm/mod.rs index 19f12d7c..34d6b74f 100644 --- a/arceos-vmm/src/vmm/mod.rs +++ b/arceos-vmm/src/vmm/mod.rs @@ -7,6 +7,11 @@ use std::os::arceos::api::task::{self, AxWaitQueueHandle}; use core::sync::atomic::AtomicUsize; use core::sync::atomic::Ordering; +use std::os::arceos::modules::axtask; +use std::os::arceos::modules::axtask::TaskExtRef; + +use axerrno::ax_err_type; +use axerrno::{AxResult, ax_err}; use crate::hal::{AxVCpuHalImpl, AxVMHalImpl}; @@ -46,3 +51,32 @@ pub fn start() { // Do not exit until all VMs are stopped. task::ax_wait_queue_wait_until(&VMM, || RUNNING_VM_COUNT.load(Ordering::Acquire) == 0, None); } + +/// Run a closure with the specified VM and vCPU. +pub fn with_vm_and_vcpu(vm_id: usize, vcpu_id: usize, f: impl FnOnce(VMRef, VCpuRef) -> T) -> Option { + let vm = vm_list::get_vm_by_id(vm_id)?; + let vcpu = vm.vcpu(vcpu_id)?; + + Some(f(vm, vcpu)) +} + +/// Run a closure with the specified VM and vCPU, with the guarantee that the closure will be +/// executed on the physical CPU where the vCPU is running, waiting, or queueing. +/// +/// It seems necessary to disable scheduling when running the closure. +pub fn with_vm_and_vcpu_on_pcpu(vm_id: usize, vcpu_id: usize, f: impl FnOnce(VMRef, VCpuRef) + 'static) -> AxResult { + let current_vm = axtask::current().task_ext().vm.id(); + let current_vcpu = axtask::current().task_ext().vcpu.id(); + + if current_vm == vm_id && current_vcpu == vcpu_id { + return with_vm_and_vcpu(vm_id, vcpu_id, f).ok_or_else(|| ax_err_type!(NotFound)) + } else { + use std::os::arceos::modules::axipi; + + let pcpu_id = vcpus::with_vcpu_task(vm_id, vcpu_id, |task| task.cpu_id()).ok_or_else(|| ax_err_type!(NotFound))?; + + Ok(axipi::send_ipi_event_to_one(pcpu_id as usize, move || { + with_vm_and_vcpu_on_pcpu(vm_id, vcpu_id, f); + })) + } +} \ No newline at end of file diff --git a/arceos-vmm/src/vmm/vcpus.rs b/arceos-vmm/src/vmm/vcpus.rs index 9a9a825a..8dfae167 100644 --- a/arceos-vmm/src/vmm/vcpus.rs +++ b/arceos-vmm/src/vmm/vcpus.rs @@ -187,6 +187,20 @@ pub fn setup_vm_primary_vcpu(vm: VMRef) { } } +/// Finds the [`AxTaskRef`] associated with the specified vCPU of the specified VM. +pub fn find_vcpu_task(vm_id: usize, vcpu_id: usize) -> Option { + with_vcpu_task(vm_id, vcpu_id, |task| task.clone()) +} + +/// Executes the provided closure with the [`AxTaskRef`] associated with the specified vCPU of the specified VM. +pub fn with_vcpu_task T>(vm_id: usize, vcpu_id: usize, f: F) -> Option { + unsafe { VM_VCPU_TASK_WAIT_QUEUE.get(&vm_id) } + .unwrap() + .vcpu_task_list + .get(vcpu_id) + .map(f) +} + /// Allocates arceos task for vcpu, set the task's entry function to [`vcpu_run()`], /// alse initializes the CPU mask if the vCPU has a dedicated physical CPU set. /// From 9c5834cd479b5986f20ed3c3f488cc9f75135b39 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 15 Jan 2025 16:30:32 +0800 Subject: [PATCH 02/62] support inject interrupts, with test codes on x86 --- Cargo.lock | 84 +++++++++++++++++++++++++++---------- arceos-vmm/Cargo.toml | 2 + arceos-vmm/src/hal.rs | 46 +++++++++++--------- arceos-vmm/src/vmm/mod.rs | 46 +++++++++++++------- arceos-vmm/src/vmm/vcpus.rs | 18 +++++++- 5 files changed, 140 insertions(+), 56 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index fefe5f64..e8d26483 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -108,14 +108,16 @@ dependencies = [ name = "arceos-vmm" version = "0.1.0" dependencies = [ - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axconfig", "axerrno", "axstd", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "axvm", "bitflags 2.6.0", + "cpumask", "crate_interface", + "kernel_guard", "lazyinit", "log", "memory_addr", @@ -129,7 +131,7 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -149,7 +151,7 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_gicv2#eee14941d490719f6689e82f9a87caea6767bdc3" +source = "git+https://github.com/arceos-hypervisor/arm_gicv2?branch=sgi#956665adcdc6b09a28078db09ad3f09ed41af80b" dependencies = [ "tock-registers", ] @@ -170,7 +172,7 @@ source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#5adab4c6e9366417 dependencies = [ "aarch64-cpu", "aarch64_sysreg", - "axaddrspace", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", "axerrno", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", "log", @@ -186,6 +188,24 @@ version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" +[[package]] +name = "axaddrspace" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt#4cb56d7d4248cfeb421742c8bc7535c66fe07db6" +dependencies = [ + "axerrno", + "bit_field", + "bitflags 2.6.0", + "cfg-if", + "lazyinit", + "log", + "memory_addr", + "memory_set", + "numeric-enum-macro", + "page_table_entry", + "page_table_multiarch", +] + [[package]] name = "axaddrspace" version = "0.1.0" @@ -207,7 +227,7 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "allocator", "axerrno", @@ -220,7 +240,7 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig-gen-macros", ] @@ -250,7 +270,7 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git#8652ce80b2c53310fb7b0f8ac275f2dfcfbb1338" +source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#d33604aae39ebb502a64759e866dcb7ad37dd746" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axdevice_base", @@ -264,7 +284,7 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#28d49f147793997a9db1ebb75a34295cde2a107d" +source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#27b062aae7a6f2811b158194d2abfa352c1d70c2" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", @@ -277,7 +297,7 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -334,7 +354,7 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axdriver", @@ -351,7 +371,7 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axdriver", "axdriver_block", @@ -404,7 +424,7 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "aarch64-cpu", "arm_gicv2", @@ -430,6 +450,7 @@ dependencies = [ "percpu", "raw-cpuid 11.2.0", "riscv 0.11.1", + "riscv_plic", "sbi-rt", "static_assertions", "tock-registers", @@ -463,7 +484,7 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "cfg-if", "crate_interface", @@ -474,7 +495,7 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axerrno", @@ -488,7 +509,7 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -508,7 +529,7 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "arceos_api", "axerrno", @@ -520,7 +541,7 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axtask", "kspin", @@ -529,7 +550,7 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#39848356f3bb43c1c0a5b02a6188bd3235e789a5" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axhal", @@ -546,6 +567,17 @@ dependencies = [ "timer_list", ] +[[package]] +name = "axvcpu" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#8002f43d40b34a993ffbd2a193f543c954964280" +dependencies = [ + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axerrno", + "memory_addr", + "percpu", +] + [[package]] name = "axvcpu" version = "0.1.0" @@ -560,13 +592,14 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git#f431309c3194a59a038a8f81f8f9a39fcd5460aa" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#472eca0142e05e00f3e2d37bea469497539df66e" dependencies = [ "arm_vcpu", "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axdevice", + "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "axvmconfig", "cfg-if", "cpumask", @@ -1166,6 +1199,15 @@ dependencies = [ "regex", ] +[[package]] +name = "riscv_plic" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "daae4c8e29d4d8c36fbda4c318ffa1755645766fefab8fcff61a8ecd577bb822" +dependencies = [ + "tock-registers", +] + [[package]] name = "riscv_vcpu" version = "0.1.0" @@ -1630,7 +1672,7 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git#5f6eaf4157ee8385ba1a2bfe5060098be18b0245" +source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#fc9e92c7f30f5c82f2b597c6f9d9a5484470e639" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", diff --git a/arceos-vmm/Cargo.toml b/arceos-vmm/Cargo.toml index 00de4caa..b1d2ab7e 100644 --- a/arceos-vmm/Cargo.toml +++ b/arceos-vmm/Cargo.toml @@ -33,6 +33,8 @@ axaddrspace = { workspace = true } # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" axerrno = "0.1.0" +cpumask = "0.1.0" +kernel_guard = "0.1" memory_addr = "0.3" page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" diff --git a/arceos-vmm/src/hal.rs b/arceos-vmm/src/hal.rs index 6229845b..40717147 100644 --- a/arceos-vmm/src/hal.rs +++ b/arceos-vmm/src/hal.rs @@ -1,10 +1,14 @@ -use std::{boxed::Box, os::arceos::{self, modules::{axhal::cpu::current_task_ptr, axipi::{self, IPIEventFn}, axtask::{self, TaskExtRef}}}}; +use std::os::arceos::{ + self, + modules::axtask::{self, TaskExtRef}, +}; +use axerrno::{AxResult, ax_err_type}; use memory_addr::{PAGE_SIZE_4K, align_up_4k}; use page_table_multiarch::PagingHandler; use arceos::modules::{axalloc, axhal}; -use axaddrspace::{HostPhysAddr, HostVirtAddr}; +use axaddrspace::{AxMmHal, HostPhysAddr, HostVirtAddr}; use axvcpu::AxVCpuHal; use axvm::{AxVMHal, AxVMPerCpu}; @@ -45,38 +49,34 @@ impl AxVMHal for AxVMHalImpl { fn current_time_nanos() -> u64 { axhal::time::monotonic_time_nanos() } - + fn current_vm_id() -> usize { axtask::current().task_ext().vm.id() } - + fn current_vcpu_id() -> usize { axtask::current().task_ext().vcpu.id() } - + fn current_pcpu_id() -> usize { axhal::cpu::this_cpu_id() } -} -pub fn vcpu_resides_on(vm_id: usize, vcpu_id: usize) -> usize { - todo!() -} + fn vcpu_resides_on(vm_id: usize, vcpu_id: usize) -> AxResult { + vmm::with_vcpu_task(vm_id, vcpu_id, |task| task.cpu_id() as usize) + .ok_or_else(|| ax_err_type!(NotFound)) + } -pub fn inject_irq_to_vcpu_remotely( - vm_id: usize, - vcpu_id: usize, - irq: usize, - pcpu_id: usize -) { - vmm::with_vm_and_vcpu_on_pcpu(vm_id, vcpu_id, move |_, vcpu| { - vcpu.inject_interrupt(irq); - }); + fn inject_irq_to_vcpu(vm_id: usize, vcpu_id: usize, irq: usize) -> axerrno::AxResult { + vmm::with_vm_and_vcpu_on_pcpu(vm_id, vcpu_id, move |_, vcpu| { + vcpu.inject_interrupt(irq).unwrap(); + }) + } } -pub struct AxVCpuHalImpl; +pub struct AxMmHalImpl; -impl AxVCpuHal for AxVCpuHalImpl { +impl AxMmHal for AxMmHalImpl { fn alloc_frame() -> Option { ::PagingHandler::alloc_frame() } @@ -93,6 +93,12 @@ impl AxVCpuHal for AxVCpuHalImpl { fn virt_to_phys(vaddr: axaddrspace::HostVirtAddr) -> axaddrspace::HostPhysAddr { std::os::arceos::modules::axhal::mem::virt_to_phys(vaddr) } +} + +pub struct AxVCpuHalImpl; + +impl AxVCpuHal for AxVCpuHalImpl { + type MmHal = AxMmHalImpl; #[cfg(target_arch = "aarch64")] fn irq_fetch() -> usize { diff --git a/arceos-vmm/src/vmm/mod.rs b/arceos-vmm/src/vmm/mod.rs index 34d6b74f..aedbad2b 100644 --- a/arceos-vmm/src/vmm/mod.rs +++ b/arceos-vmm/src/vmm/mod.rs @@ -10,8 +10,7 @@ use core::sync::atomic::Ordering; use std::os::arceos::modules::axtask; use std::os::arceos::modules::axtask::TaskExtRef; -use axerrno::ax_err_type; -use axerrno::{AxResult, ax_err}; +use axerrno::{AxResult, ax_err_type}; use crate::hal::{AxVCpuHalImpl, AxVMHalImpl}; @@ -52,8 +51,15 @@ pub fn start() { task::ax_wait_queue_wait_until(&VMM, || RUNNING_VM_COUNT.load(Ordering::Acquire) == 0, None); } +#[allow(unused_imports)] +pub use vcpus::{find_vcpu_task, with_vcpu_task}; + /// Run a closure with the specified VM and vCPU. -pub fn with_vm_and_vcpu(vm_id: usize, vcpu_id: usize, f: impl FnOnce(VMRef, VCpuRef) -> T) -> Option { +pub fn with_vm_and_vcpu( + vm_id: usize, + vcpu_id: usize, + f: impl FnOnce(VMRef, VCpuRef) -> T, +) -> Option { let vm = vm_list::get_vm_by_id(vm_id)?; let vcpu = vm.vcpu(vcpu_id)?; @@ -62,21 +68,33 @@ pub fn with_vm_and_vcpu(vm_id: usize, vcpu_id: usize, f: impl FnOnce(VMRef, V /// Run a closure with the specified VM and vCPU, with the guarantee that the closure will be /// executed on the physical CPU where the vCPU is running, waiting, or queueing. -/// +/// /// It seems necessary to disable scheduling when running the closure. -pub fn with_vm_and_vcpu_on_pcpu(vm_id: usize, vcpu_id: usize, f: impl FnOnce(VMRef, VCpuRef) + 'static) -> AxResult { +pub fn with_vm_and_vcpu_on_pcpu( + vm_id: usize, + vcpu_id: usize, + f: impl FnOnce(VMRef, VCpuRef) + 'static, +) -> AxResult { + // Disables preemption and IRQs to prevent the current task from being preempted or re-scheduled. + let guard = kernel_guard::NoPreemptIrqSave::new(); + let current_vm = axtask::current().task_ext().vm.id(); let current_vcpu = axtask::current().task_ext().vcpu.id(); + // The target vCPU is the current task, execute the closure directly. if current_vm == vm_id && current_vcpu == vcpu_id { - return with_vm_and_vcpu(vm_id, vcpu_id, f).ok_or_else(|| ax_err_type!(NotFound)) - } else { - use std::os::arceos::modules::axipi; + with_vm_and_vcpu(vm_id, vcpu_id, f).unwrap(); // unwrap is safe here + return Ok(()); + } - let pcpu_id = vcpus::with_vcpu_task(vm_id, vcpu_id, |task| task.cpu_id()).ok_or_else(|| ax_err_type!(NotFound))?; + // The target vCPU is not the current task, send an IPI to the target physical CPU. + drop(guard); - Ok(axipi::send_ipi_event_to_one(pcpu_id as usize, move || { - with_vm_and_vcpu_on_pcpu(vm_id, vcpu_id, f); - })) - } -} \ No newline at end of file + let pcpu_id = vcpus::with_vcpu_task(vm_id, vcpu_id, |task| task.cpu_id()) + .ok_or_else(|| ax_err_type!(NotFound))?; + + use std::os::arceos::modules::axipi; + Ok(axipi::send_ipi_event_to_one(pcpu_id as usize, move || { + with_vm_and_vcpu_on_pcpu(vm_id, vcpu_id, f); + })) +} diff --git a/arceos-vmm/src/vmm/vcpus.rs b/arceos-vmm/src/vmm/vcpus.rs index 33db992f..8637de4c 100644 --- a/arceos-vmm/src/vmm/vcpus.rs +++ b/arceos-vmm/src/vmm/vcpus.rs @@ -193,7 +193,11 @@ pub fn find_vcpu_task(vm_id: usize, vcpu_id: usize) -> Option { } /// Executes the provided closure with the [`AxTaskRef`] associated with the specified vCPU of the specified VM. -pub fn with_vcpu_task T>(vm_id: usize, vcpu_id: usize, f: F) -> Option { +pub fn with_vcpu_task T>( + vm_id: usize, + vcpu_id: usize, + f: F, +) -> Option { unsafe { VM_VCPU_TASK_WAIT_QUEUE.get(&vm_id) } .unwrap() .vcpu_task_list @@ -262,6 +266,18 @@ fn vcpu_run() { Ok(exit_reason) => match exit_reason { AxVCpuExitReason::Hypercall { nr, args } => { debug!("Hypercall [{}] args {:x?}", nr, args); + + if nr == 0xf785 && args[0] == 0xdead_beaf_1234_5678 { + debug!( + "VM[{}] Vcpu[{}] send mock interrupt injection vmcall", + vm_id, vcpu_id + ); + + vm.inject_interrupt_to_vcpu(cpumask::CpuMask::one_shot(vcpu_id), 0x66) + .unwrap(); + } + + vcpu.set_gpr(0, !args[1] as _); } AxVCpuExitReason::FailEntry { hardware_entry_failure_reason, From 983c6df8f4901faccfa259542b859b005753c26b Mon Sep 17 00:00:00 2001 From: aarkegz Date: Fri, 7 Feb 2025 16:52:56 +0800 Subject: [PATCH 03/62] [temp, to be squashed] mock timer --- Cargo.lock | 21 ++---------- Cargo.toml | 13 ++++++++ arceos-vmm/Cargo.toml | 3 ++ arceos-vmm/src/hal.rs | 4 +++ arceos-vmm/src/main.rs | 2 ++ arceos-vmm/src/vmm/config.rs | 24 +++++++++++++- arceos-vmm/src/vmm/mock.rs | 62 ++++++++++++++++++++++++++++++++++++ arceos-vmm/src/vmm/mod.rs | 2 ++ arceos-vmm/src/vmm/timer.rs | 5 +++ arceos-vmm/src/vmm/vcpus.rs | 16 ++++++++-- 10 files changed, 130 insertions(+), 22 deletions(-) create mode 100644 arceos-vmm/src/vmm/mock.rs diff --git a/Cargo.lock b/Cargo.lock index fbe15f1d..832ba957 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -110,6 +110,8 @@ version = "0.1.0" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axconfig", + "axdevice", + "axdevice_base", "axerrno", "axstd", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", @@ -133,7 +135,6 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -229,7 +230,6 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "allocator", "axerrno", @@ -242,7 +242,6 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig-gen-macros", ] @@ -272,7 +271,6 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#d33604aae39ebb502a64759e866dcb7ad37dd746" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axdevice_base", @@ -286,7 +284,6 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#27b062aae7a6f2811b158194d2abfa352c1d70c2" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", @@ -299,7 +296,6 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -356,7 +352,6 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axdriver", @@ -373,7 +368,6 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axdriver", "axdriver_block", @@ -426,7 +420,6 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "aarch64-cpu", "arm_gicv2", @@ -473,7 +466,6 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#c47d88b40ba6eb2757fc6227adcc600813061bce" dependencies = [ "axconfig", "axhal", @@ -486,7 +478,6 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "cfg-if", "crate_interface", @@ -497,7 +488,6 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axerrno", @@ -511,7 +501,6 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -531,7 +520,6 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "arceos_api", "axerrno", @@ -543,7 +531,6 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axtask", "kspin", @@ -552,7 +539,6 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axhal", @@ -594,7 +580,6 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#472eca0142e05e00f3e2d37bea469497539df66e" dependencies = [ "arm_vcpu", "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", @@ -1674,7 +1659,7 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#fc9e92c7f30f5c82f2b597c6f9d9a5484470e639" +source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#0b07547fc8553cdbcac8e7cc93540fdfbc384e6f" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", "axerrno", diff --git a/Cargo.toml b/Cargo.toml index 7858fff0..f49acc9d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -13,3 +13,16 @@ axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = " axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git", branch = "inject_interrupt" } + +[patch."https://github.com/arceos-hypervisor/axvm.git"] +axvm = { path = "../axvm" } + +[patch."https://github.com/arceos-hypervisor/axdevice.git"] +axdevice = { path = "../axdevice" } + +[patch."https://github.com/arceos-hypervisor/axdevice_crates.git"] +axdevice_base = { path = "../axdevice_crates/axdevice_base" } + +[patch."https://github.com/arceos-hypervisor/arceos.git"] +axstd = { path = "../arceos-new/ulib/axstd", features = ["ipi", "smp"] } +axconfig = { path = "../arceos-new/modules/axconfig" } \ No newline at end of file diff --git a/arceos-vmm/Cargo.toml b/arceos-vmm/Cargo.toml index c58046e5..c6abe569 100644 --- a/arceos-vmm/Cargo.toml +++ b/arceos-vmm/Cargo.toml @@ -42,6 +42,9 @@ page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.1.4", features = ["arm-el2"] } +axdevice = { path = "../../axdevice" } +axdevice_base = { path = "../../axdevice_crates/axdevice_base" } + [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } axconfig = { workspace = true } \ No newline at end of file diff --git a/arceos-vmm/src/hal.rs b/arceos-vmm/src/hal.rs index d08434ca..0a243280 100644 --- a/arceos-vmm/src/hal.rs +++ b/arceos-vmm/src/hal.rs @@ -72,6 +72,10 @@ impl AxVMHal for AxVMHalImpl { vcpu.inject_interrupt(irq).unwrap(); }) } + + fn dododo(s: &'static str) { + // info!("{}: -- irq enabled: {:?}", s, axhal::arch::irqs_enabled()); + } } pub struct AxMmHalImpl; diff --git a/arceos-vmm/src/main.rs b/arceos-vmm/src/main.rs index f694deed..7a242eba 100644 --- a/arceos-vmm/src/main.rs +++ b/arceos-vmm/src/main.rs @@ -1,6 +1,8 @@ #![no_std] #![no_main] +use std::{os::arceos::modules::{axhal, axtask}, println}; + #[macro_use] extern crate log; #[macro_use] diff --git a/arceos-vmm/src/vmm/config.rs b/arceos-vmm/src/vmm/config.rs index 260d785d..81ca5fb0 100644 --- a/arceos-vmm/src/vmm/config.rs +++ b/arceos-vmm/src/vmm/config.rs @@ -33,7 +33,29 @@ pub fn init_guest_vms() { info!("Creating VM [{}] {:?}", vm_config.id(), vm_config.name()); // Create VM. - let vm = VM::new(vm_config).expect("Failed to create VM"); + // let vm = VM::new(vm_config).expect("Failed to create VM"); + // %%% temp action! + let vm = VM::temp_new_with_device_adder(vm_config, |devices| { + let mock_timer = super::mock::MockTimer::new(); + let mock_timer = alloc::sync::Arc::new(mock_timer); + + devices.add_mmio_dev(mock_timer.clone()); + + use std::os::arceos::modules::axhal; + + fn schedule_next(action: impl Fn() + Send + Sync + 'static) { + super::timer::register_timer(axhal::time::monotonic_time_nanos() + 1_000_000_000, move |time| { + info!("Timer fired at {:?}", time); + action(); + schedule_next(action); + }); + } + + schedule_next(move || { + mock_timer.tick(); + }); + }).expect("Failed to create VM"); + vm.set_devices_interrupt_injector(); push_vm(vm.clone()); // Load corresponding images for VM. diff --git a/arceos-vmm/src/vmm/mock.rs b/arceos-vmm/src/vmm/mock.rs new file mode 100644 index 00000000..9a94c02f --- /dev/null +++ b/arceos-vmm/src/vmm/mock.rs @@ -0,0 +1,62 @@ +use core::cell::{OnceCell, Ref, RefCell}; + +use alloc::boxed::Box; +use axaddrspace::{device::{self, AccessWidth}, GuestPhysAddr, GuestPhysAddrRange}; +use axdevice_base::{BaseDeviceOps, DeviceRWContext, InterruptInjector}; +use cpumask::CpuMask; + +pub struct MockTimer { + injector: RefCell>>, +} + +impl BaseDeviceOps for MockTimer { + fn emu_type(&self) -> axdevice_base::EmuDeviceType { + axdevice_base::EmuDeviceType::EmuDeviceTConsole // just a placeholder + } + + fn address_range(&self) -> GuestPhysAddrRange { + // a placeholder + GuestPhysAddrRange::from_start_size(0x1234_0000.into(), 0x1000) + } + + fn handle_read( + &self, + addr: ::Addr, + width: AccessWidth, + context: DeviceRWContext, + ) -> axerrno::AxResult { + todo!() + } + + fn handle_write( + &self, + addr: ::Addr, + width: AccessWidth, + val: usize, + context: DeviceRWContext, + ) -> axerrno::AxResult { + todo!() + } + + fn set_interrupt_injector(&self, injector: Box) { + self.injector.borrow_mut().replace(injector); + } +} + +impl MockTimer { + pub fn new() -> Self { + Self { + injector: RefCell::new(None), + } + } + + pub fn tick(&self) { + // Warning! Potential deadlock here + if let Some(injector) = self.injector.borrow_mut().as_mut() { + injector(CpuMask::one_shot(0), 0x77); + } + } +} + +unsafe impl Send for MockTimer {} +unsafe impl Sync for MockTimer {} diff --git a/arceos-vmm/src/vmm/mod.rs b/arceos-vmm/src/vmm/mod.rs index 8d66525c..fa68cf33 100644 --- a/arceos-vmm/src/vmm/mod.rs +++ b/arceos-vmm/src/vmm/mod.rs @@ -1,5 +1,6 @@ mod config; mod images; +mod mock; mod timer; mod vcpus; mod vm_list; @@ -8,6 +9,7 @@ use std::os::arceos::api::task::{self, AxWaitQueueHandle}; use core::sync::atomic::AtomicUsize; use core::sync::atomic::Ordering; +use std::os::arceos::modules::axhal; use std::os::arceos::modules::axtask; use std::os::arceos::modules::axtask::TaskExtRef; diff --git a/arceos-vmm/src/vmm/timer.rs b/arceos-vmm/src/vmm/timer.rs index 0d98704c..dae0c611 100644 --- a/arceos-vmm/src/vmm/timer.rs +++ b/arceos-vmm/src/vmm/timer.rs @@ -57,6 +57,8 @@ pub fn register_timer(deadline: u64, handler: F) -> usize where F: FnOnce(TimeValue) + Send + 'static, { + info!("Registering timer..."); + info!("deadline is {:#?} = {:#?}", deadline, TimeValue::from_nanos(deadline as u64)); let timer_list = unsafe { TIMER_LIST.current_ref_mut_raw() }; let mut timers = timer_list.lock(); let token = TOKEN.fetch_add(1, Ordering::Release); @@ -77,6 +79,8 @@ pub fn cancel_timer(token: usize) { /// Check and process any pending timer events pub fn check_events() { + info!("Checking timer events..."); + info!("now is {:#?}", axhal::time::wall_time()); let timer_list = unsafe { TIMER_LIST.current_ref_mut_raw() }; loop { let now = axhal::time::wall_time(); @@ -92,6 +96,7 @@ pub fn check_events() { /// Schedule the next timer event based on the periodic interval pub fn scheduler_next_event() { + trace!("Scheduling next event..."); let now_ns = axhal::time::monotonic_time_nanos(); let deadline = now_ns + PERIODIC_INTERVAL_NANOS; trace!("PHY deadline {} !!!", deadline); diff --git a/arceos-vmm/src/vmm/vcpus.rs b/arceos-vmm/src/vmm/vcpus.rs index 8637de4c..7114d187 100644 --- a/arceos-vmm/src/vmm/vcpus.rs +++ b/arceos-vmm/src/vmm/vcpus.rs @@ -2,7 +2,7 @@ use alloc::collections::BTreeMap; use alloc::vec::Vec; use std::os::arceos::api; -use std::os::arceos::modules::axtask; +use std::os::arceos::modules::{axhal, axtask}; use axaddrspace::GuestPhysAddr; use axtask::{AxTaskRef, TaskExtRef, TaskInner, WaitQueue}; @@ -260,6 +260,10 @@ fn vcpu_run() { info!("VM[{}] Vcpu[{}] running...", vm.id(), vcpu.id()); + warn!("vcpu_run: temp action! scheduler_next_event"); + // %%% temp action! + super::timer::scheduler_next_event(); + loop { match vm.run_vcpu(vcpu_id) { // match vcpu.run() { @@ -273,8 +277,8 @@ fn vcpu_run() { vm_id, vcpu_id ); - vm.inject_interrupt_to_vcpu(cpumask::CpuMask::one_shot(vcpu_id), 0x66) - .unwrap(); + // vm.inject_interrupt_to_vcpu(cpumask::CpuMask::one_shot(vcpu_id), 0x66) + // .unwrap(); } vcpu.set_gpr(0, !args[1] as _); @@ -289,6 +293,9 @@ fn vcpu_run() { } AxVCpuExitReason::ExternalInterrupt { vector } => { debug!("VM[{}] run VCpu[{}] get irq {}", vm_id, vcpu_id, vector); + + // %%% temp action! + super::timer::scheduler_next_event(); } AxVCpuExitReason::Halt => { debug!("VM[{}] run VCpu[{}] Halt", vm_id, vcpu_id); @@ -327,5 +334,8 @@ fn vcpu_run() { wait(vm_id) } } + + // %%% temp action! + super::timer::check_events(); } } From c88ae9627ba66b360513056cc7a50e7412742f8c Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 12 Mar 2025 16:47:44 +0800 Subject: [PATCH 04/62] a working version --- Cargo.lock | 98 ++++++++++++++++------- Cargo.toml | 16 +++- arceos-vmm/Cargo.toml | 6 ++ arceos-vmm/configs/vms/nimbos-x86_64.toml | 2 +- arceos-vmm/src/hal.rs | 78 ++++++++++++++++++ arceos-vmm/src/vmm/mod.rs | 2 +- arceos-vmm/src/vmm/timer.rs | 2 +- arceos-vmm/src/vmm/vcpus.rs | 11 +-- 8 files changed, 173 insertions(+), 42 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 832ba957..cd53e08c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -8,7 +8,7 @@ version = "9.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ac42a04a61c19fc8196dd728022a784baecc5d63d7e256c01ad1b3fbfab26287" dependencies = [ - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -108,13 +108,14 @@ dependencies = [ name = "arceos-vmm" version = "0.1.0" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", "axconfig", "axdevice", "axdevice_base", "axerrno", "axstd", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", + "axvisor_api", "axvm", "bitflags 2.6.0", "cpumask", @@ -130,6 +131,7 @@ dependencies = [ "spin", "timer_list", "toml", + "x86_vcpu", ] [[package]] @@ -156,7 +158,7 @@ name = "arm_gicv2" version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/arm_gicv2?branch=sgi#956665adcdc6b09a28078db09ad3f09ed41af80b" dependencies = [ - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -165,7 +167,7 @@ version = "0.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "efcf6afca4502993a737ba1e00952d1321078689da92bf7aab27d4e5756c0bec" dependencies = [ - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -177,12 +179,12 @@ dependencies = [ "aarch64_sysreg", "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", + "axvcpu", "log", "numeric-enum-macro", "percpu", "spin", - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -194,9 +196,10 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt#4cb56d7d4248cfeb421742c8bc7535c66fe07db6" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api#a8639c64dfea62b227cd4543178376f5ccbc55a7" dependencies = [ "axerrno", + "axvisor_api", "bit_field", "bitflags 2.6.0", "cfg-if", @@ -272,7 +275,7 @@ dependencies = [ name = "axdevice" version = "0.1.0" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", "axdevice_base", "axerrno", "axvmconfig", @@ -285,7 +288,7 @@ dependencies = [ name = "axdevice_base" version = "0.1.0" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", "axerrno", "cfg-if", "cpumask", @@ -448,7 +451,7 @@ dependencies = [ "riscv_plic", "sbi-rt", "static_assertions", - "tock-registers", + "tock-registers 0.8.1", "x2apic", "x86", "x86_64 0.15.2", @@ -558,23 +561,30 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#8002f43d40b34a993ffbd2a193f543c954964280" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", "axerrno", "memory_addr", "percpu", ] [[package]] -name = "axvcpu" +name = "axvisor_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git#8414a575723f929d5fd24010ce16446d90ecf268" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", - "axerrno", + "axvisor_api_proc", + "crate_interface", "memory_addr", - "percpu", +] + +[[package]] +name = "axvisor_api_proc" +version = "0.1.0" +dependencies = [ + "proc-macro-crate", + "proc-macro2", + "quote", + "syn 2.0.93", ] [[package]] @@ -582,11 +592,11 @@ name = "axvm" version = "0.1.0" dependencies = [ "arm_vcpu", - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", "axdevice", "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", "axvmconfig", "cfg-if", "cpumask", @@ -774,7 +784,7 @@ version = "8.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8256fd5103e10027467cc7a97c9ff27fcc4547ea24864da0aff2e7aef6e18e28" dependencies = [ - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -815,7 +825,7 @@ version = "0.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f93d496c8faa9dc676ebfa225432e1e3b57645c9268ead889286546f6d39356d" dependencies = [ - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -1084,6 +1094,15 @@ dependencies = [ "syn 2.0.93", ] +[[package]] +name = "proc-macro-crate" +version = "3.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8ecf48c7ca261d60b74ab1a7b20da18bede46776b2e55535cb958eb595c5fa7b" +dependencies = [ + "toml_edit 0.22.22", +] + [[package]] name = "proc-macro2" version = "1.0.92" @@ -1192,7 +1211,7 @@ version = "0.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "daae4c8e29d4d8c36fbda4c318ffa1755645766fefab8fcff61a8ecd577bb822" dependencies = [ - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -1202,7 +1221,7 @@ source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#15d74de5dc7d38 dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", + "axvcpu", "bit_field", "bitflags 2.6.0", "cfg-if", @@ -1216,7 +1235,7 @@ dependencies = [ "rustsbi", "sbi-rt", "sbi-spec", - "tock-registers", + "tock-registers 0.8.1", ] [[package]] @@ -1428,6 +1447,12 @@ version = "0.8.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "696941a0aee7e276a165a978b37918fd5d22c55c3d6bda197813070ca9c0f21c" +[[package]] +name = "tock-registers" +version = "0.9.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2b9e2fdb3a1e862c0661768b7ed25390811df1947a8acbfbefe09b47078d93c4" + [[package]] name = "toml" version = "0.8.14" @@ -1659,11 +1684,11 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#0b07547fc8553cdbcac8e7cc93540fdfbc384e6f" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=inject_interrupt)", + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", "bit_field", "bitflags 2.6.0", "cfg-if", @@ -1672,9 +1697,26 @@ dependencies = [ "memory_addr", "numeric-enum-macro", "page_table_entry", + "paste", "raw-cpuid 11.2.0", "x86", "x86_64 0.15.2", + "x86_vlapic", +] + +[[package]] +name = "x86_vlapic" +version = "0.1.0" +dependencies = [ + "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axdevice_base", + "axerrno", + "axvisor_api", + "bit", + "log", + "memory_addr", + "paste", + "tock-registers 0.9.0", ] [[package]] diff --git a/Cargo.toml b/Cargo.toml index f49acc9d..b09fa77d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -12,7 +12,19 @@ axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = " axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } -axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git", branch = "inject_interrupt" } +axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git", branch = "api" } + +[patch."https://github.com/arceos-hypervisor/axvcpu.git"] +axvcpu = { path = "../axvcpu" } + +[patch."https://github.com/arceos-hypervisor/axvisor_api.git"] +axvisor_api = { path = "../axvisor_api" } + +[patch."https://github.com/arceos-hypervisor/x86_vcpu.git"] +x86_vcpu = { path = "../x86_vcpu" } + +[patch."https://github.com/arceos-hypervisor/x86_vlapic.git"] +x86_vlapic = { path = "../x86_vlapic" } [patch."https://github.com/arceos-hypervisor/axvm.git"] axvm = { path = "../axvm" } @@ -24,5 +36,5 @@ axdevice = { path = "../axdevice" } axdevice_base = { path = "../axdevice_crates/axdevice_base" } [patch."https://github.com/arceos-hypervisor/arceos.git"] -axstd = { path = "../arceos-new/ulib/axstd", features = ["ipi", "smp"] } +axstd = { path = "../arceos-new/ulib/axstd", features = ["ipi", "smp", "irq"] } axconfig = { path = "../arceos-new/modules/axconfig" } \ No newline at end of file diff --git a/arceos-vmm/Cargo.toml b/arceos-vmm/Cargo.toml index c6abe569..4d603634 100644 --- a/arceos-vmm/Cargo.toml +++ b/arceos-vmm/Cargo.toml @@ -7,6 +7,7 @@ authors = ["Keyang Hu "] [features] fs = ["axstd/fs"] +tracing = ["x86_vcpu/tracing"] [dependencies] log = "=0.4.21" @@ -45,6 +46,11 @@ percpu = { version = "0.1.4", features = ["arm-el2"] } axdevice = { path = "../../axdevice" } axdevice_base = { path = "../../axdevice_crates/axdevice_base" } +axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git" } + +[target.'cfg(target_arch = "x86_64")'.dependencies] +x86_vcpu = { path = "../../x86_vcpu" } + [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } axconfig = { workspace = true } \ No newline at end of file diff --git a/arceos-vmm/configs/vms/nimbos-x86_64.toml b/arceos-vmm/configs/vms/nimbos-x86_64.toml index b73f141a..e0e62974 100644 --- a/arceos-vmm/configs/vms/nimbos-x86_64.toml +++ b/arceos-vmm/configs/vms/nimbos-x86_64.toml @@ -1,4 +1,4 @@ -id = 1 +id = 0 name = "nimbos" vm_type = 1 cpu_num = 1 diff --git a/arceos-vmm/src/hal.rs b/arceos-vmm/src/hal.rs index 0a243280..20b943b1 100644 --- a/arceos-vmm/src/hal.rs +++ b/arceos-vmm/src/hal.rs @@ -163,3 +163,81 @@ pub(crate) fn enable_virtualization() { thread::yield_now(); } } + +#[axvisor_api::api_mod_impl(axvisor_api::memory)] +mod memory_api_impl { + use super::*; + + extern fn alloc_frame() -> Option { + ::alloc_frame() + } + + extern fn dealloc_frame(paddr: HostPhysAddr) { + ::dealloc_frame(paddr) + } + + extern fn phys_to_virt(paddr: HostPhysAddr) -> HostVirtAddr { + ::phys_to_virt(paddr) + } + + extern fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr { + ::virt_to_phys(vaddr) + } +} + +#[axvisor_api::api_mod_impl(axvisor_api::time)] +mod time_api_impl { + use super::*; + use axvisor_api::time::{CancelToken, Nanos, Ticks, TimeValue}; + + extern fn current_ticks() -> Ticks { + axhal::time::current_ticks() + } + + extern fn ticks_to_nanos(ticks: Ticks) -> Nanos { + axhal::time::ticks_to_nanos(ticks) + } + + extern fn nanos_to_ticks(nanos: Nanos) -> Ticks { + axhal::time::nanos_to_ticks(nanos) + } + + extern fn register_timer(deadline: TimeValue, handler: alloc::boxed::Box) -> CancelToken { + vmm::timer::register_timer(deadline.as_nanos() as u64, |t| handler(t)) + } + + extern fn cancel_timer(token: CancelToken) { + vmm::timer::cancel_timer(token) + } +} + +#[axvisor_api::api_mod_impl(axvisor_api::vmm)] +mod vmm_api_impl { + use super::*; + use axvisor_api::vmm::{InterruptVector, VCpuId, VMId}; + + extern fn current_vm_id() -> usize { + ::current_vm_id() + } + + extern fn current_vcpu_id() -> usize { + ::current_vcpu_id() + } + + extern fn vcpu_num(vm_id: VMId) -> usize { + todo!("vcpu_num") + } + + extern fn active_vcpus(vm_id: VMId) -> usize { + todo!("active_vcpus") + } + + extern fn inject_interrupt(vm_id: VMId, vcpu_id: VCpuId, vector: InterruptVector) { + ::inject_irq_to_vcpu(vm_id, vcpu_id, vector as usize).unwrap(); + } + + extern fn notify_vcpu_timer_expired(vm_id: VMId, vcpu_id: VCpuId) { + todo!("notify_vcpu_timer_expired") + // vmm::timer::notify_timer_expired(vm_id, vcpu_id); + } +} diff --git a/arceos-vmm/src/vmm/mod.rs b/arceos-vmm/src/vmm/mod.rs index fa68cf33..8173a0fd 100644 --- a/arceos-vmm/src/vmm/mod.rs +++ b/arceos-vmm/src/vmm/mod.rs @@ -1,7 +1,7 @@ mod config; mod images; mod mock; -mod timer; +pub mod timer; mod vcpus; mod vm_list; diff --git a/arceos-vmm/src/vmm/timer.rs b/arceos-vmm/src/vmm/timer.rs index dae0c611..695fcd4d 100644 --- a/arceos-vmm/src/vmm/timer.rs +++ b/arceos-vmm/src/vmm/timer.rs @@ -86,7 +86,7 @@ pub fn check_events() { let now = axhal::time::wall_time(); let event = timer_list.lock().expire_one(now); if let Some((_deadline, event)) = event { - trace!("pick one {:#?} to handler!!!", _deadline); + trace!("pick one {:#?} to handle!!!", _deadline); event.callback(now); } else { break; diff --git a/arceos-vmm/src/vmm/vcpus.rs b/arceos-vmm/src/vmm/vcpus.rs index 7114d187..c1210d3e 100644 --- a/arceos-vmm/src/vmm/vcpus.rs +++ b/arceos-vmm/src/vmm/vcpus.rs @@ -260,10 +260,6 @@ fn vcpu_run() { info!("VM[{}] Vcpu[{}] running...", vm.id(), vcpu.id()); - warn!("vcpu_run: temp action! scheduler_next_event"); - // %%% temp action! - super::timer::scheduler_next_event(); - loop { match vm.run_vcpu(vcpu_id) { // match vcpu.run() { @@ -294,8 +290,8 @@ fn vcpu_run() { AxVCpuExitReason::ExternalInterrupt { vector } => { debug!("VM[{}] run VCpu[{}] get irq {}", vm_id, vcpu_id, vector); - // %%% temp action! - super::timer::scheduler_next_event(); + // TODO: maybe move this irq dispatcher to lower layer to accelerate the interrupt handling + axhal::irq::handler_irq(vector as usize); } AxVCpuExitReason::Halt => { debug!("VM[{}] run VCpu[{}] Halt", vm_id, vcpu_id); @@ -334,8 +330,5 @@ fn vcpu_run() { wait(vm_id) } } - - // %%% temp action! - super::timer::check_events(); } } From 612eb5feb967b653413629584ba9b432f00844a8 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Mon, 17 Mar 2025 20:26:09 +0800 Subject: [PATCH 05/62] fixing ce --- Cargo.lock | 6 ++++++ Cargo.toml | 16 +++++++++++++++- src/hal.rs | 4 ---- 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 1ed4e8ff..0e3c8154 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -345,6 +345,7 @@ dependencies = [ "axruntime", "axsync", "axtask", + "kspin", ] [[package]] @@ -553,12 +554,17 @@ version = "0.1.0" dependencies = [ "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", "axconfig", + "axdevice", + "axdevice_base", "axerrno", "axstd", "axvcpu", + "axvisor_api", "axvm", "bitflags 2.9.0", + "cpumask", "crate_interface", + "kernel_guard", "kspin", "lazyinit", "log", diff --git a/Cargo.toml b/Cargo.toml index 3cdea1fe..f86b2849 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -25,9 +25,11 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm "alloc", "paging", # "fs", + "ipi", "irq", "hv", "multitask", + "smp", # "sched_rr" ]} @@ -39,11 +41,17 @@ axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git", br # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" axerrno = "0.1.0" +cpumask = "0.1.0" +kernel_guard = "0.1" memory_addr = "0.3" page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.1.4", features = ["arm-el2"] } +axdevice = { path = "../axdevice" } +axdevice_base = { path = "../axdevice_crates/axdevice_base" } +axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git" } + [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_inject_interrupt" } @@ -73,5 +81,11 @@ axdevice = { path = "../axdevice" } axdevice_base = { path = "../axdevice_crates/axdevice_base" } [patch."https://github.com/arceos-hypervisor/arceos.git"] -axstd = { path = "../arceos-new/ulib/axstd", features = ["ipi", "smp", "irq"] } +axstd = { path = "../arceos-new/ulib/axstd", features = [ + "alloc", + "paging", + "ipi", + "smp", + "irq" +]} axconfig = { path = "../arceos-new/modules/axconfig" } \ No newline at end of file diff --git a/src/hal.rs b/src/hal.rs index 20b943b1..14f1d2c6 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -72,10 +72,6 @@ impl AxVMHal for AxVMHalImpl { vcpu.inject_interrupt(irq).unwrap(); }) } - - fn dododo(s: &'static str) { - // info!("{}: -- irq enabled: {:?}", s, axhal::arch::irqs_enabled()); - } } pub struct AxMmHalImpl; From 18447adfff9884f8adf126a5f982b53a9abce71b Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 19 Mar 2025 21:42:40 +0800 Subject: [PATCH 06/62] a really working version --- src/vmm/vcpus.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index c1210d3e..0f87fa64 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -292,6 +292,7 @@ fn vcpu_run() { // TODO: maybe move this irq dispatcher to lower layer to accelerate the interrupt handling axhal::irq::handler_irq(vector as usize); + super::timer::check_events(); } AxVCpuExitReason::Halt => { debug!("VM[{}] run VCpu[{}] Halt", vm_id, vcpu_id); From 079005893c0dac4b93a3a51242d4cab6727edfb2 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 26 Mar 2025 15:38:11 +0800 Subject: [PATCH 07/62] impl `vmm::vcpu_num` --- src/hal.rs | 6 +++--- src/vmm/mod.rs | 8 +++++++- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/hal.rs b/src/hal.rs index 14f1d2c6..43d9e38c 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -220,11 +220,11 @@ mod vmm_api_impl { ::current_vcpu_id() } - extern fn vcpu_num(vm_id: VMId) -> usize { - todo!("vcpu_num") + extern fn vcpu_num(vm_id: VMId) -> Option { + vmm::with_wm(vm_id, |vm| vm.vcpu_num()) } - extern fn active_vcpus(vm_id: VMId) -> usize { + extern fn active_vcpus(vm_id: VMId) -> Option { todo!("active_vcpus") } diff --git a/src/vmm/mod.rs b/src/vmm/mod.rs index 8173a0fd..b4624e86 100644 --- a/src/vmm/mod.rs +++ b/src/vmm/mod.rs @@ -58,6 +58,12 @@ pub fn start() { #[allow(unused_imports)] pub use vcpus::{find_vcpu_task, with_vcpu_task}; +/// Run a closure with the specified VM. +pub fn with_wm(vm_id: usize, f: impl FnOnce(VMRef) -> T) -> Option { + let vm = vm_list::get_vm_by_id(vm_id)?; + Some(f(vm)) +} + /// Run a closure with the specified VM and vCPU. pub fn with_vm_and_vcpu( vm_id: usize, @@ -73,7 +79,7 @@ pub fn with_vm_and_vcpu( /// Run a closure with the specified VM and vCPU, with the guarantee that the closure will be /// executed on the physical CPU where the vCPU is running, waiting, or queueing. /// -/// It seems necessary to disable scheduling when running the closure. +/// TODO: It seems necessary to disable scheduling when running the closure. pub fn with_vm_and_vcpu_on_pcpu( vm_id: usize, vcpu_id: usize, From a9c6c4a002e4e5903ca23f80bbdbbe2bc09afc55 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Thu, 27 Mar 2025 02:06:02 +0800 Subject: [PATCH 08/62] update to newest dependencies --- Cargo.lock | 84 +++++++++++++++++++++++++++-------------------- Cargo.toml | 54 +++++++++++++++--------------- src/vmm/config.rs | 1 - src/vmm/mock.rs | 28 +++++----------- 4 files changed, 85 insertions(+), 82 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 0e3c8154..b6e9f156 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,6 +117,7 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -157,9 +158,9 @@ source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#5adab4c6e9366417 dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", + "axaddrspace", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", "log", "numeric-enum-macro", "percpu", @@ -176,26 +177,7 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api#a8639c64dfea62b227cd4543178376f5ccbc55a7" -dependencies = [ - "axerrno", - "axvisor_api", - "bit_field", - "bitflags 2.9.0", - "cfg-if", - "lazyinit", - "log", - "memory_addr", - "memory_set", - "numeric-enum-macro", - "page_table_entry", - "page_table_multiarch", -] - -[[package]] -name = "axaddrspace" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#f1ab1108c1477f6f4f56035b74ea76c8932d6b8d" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -213,6 +195,7 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "allocator", "axerrno", @@ -225,6 +208,7 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig-gen-macros", ] @@ -254,8 +238,9 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#5bb06f57c3c5bce235e441345be8cb444c2e11d5" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axdevice_base", "axerrno", "axvmconfig", @@ -267,11 +252,11 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#9e42a6c1714b42d352d7f8c8a146024c29bf3888" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axerrno", "cfg-if", - "cpumask", "memory_addr", "serde", ] @@ -279,6 +264,7 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -335,6 +321,7 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axdriver", @@ -351,6 +338,7 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axdriver", "axdriver_block", @@ -403,6 +391,7 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "aarch64-cpu 9.4.0", "arm_gicv2", @@ -449,6 +438,7 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axhal", @@ -461,6 +451,7 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "cfg-if", "crate_interface", @@ -471,6 +462,7 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axerrno", @@ -484,6 +476,7 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axconfig", @@ -503,6 +496,7 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "arceos_api", "axerrno", @@ -514,6 +508,7 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axtask", "kspin", @@ -522,6 +517,7 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axconfig", "axhal", @@ -541,8 +537,20 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#3c3d44747e7aee46ba58d736f3f55ddba0103efa" +dependencies = [ + "axaddrspace", + "axerrno", + "memory_addr", + "percpu", +] + +[[package]] +name = "axvcpu" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git#8414a575723f929d5fd24010ce16446d90ecf268" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axerrno", "memory_addr", "percpu", @@ -552,13 +560,13 @@ dependencies = [ name = "axvisor" version = "0.1.0" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axconfig", "axdevice", "axdevice_base", "axerrno", "axstd", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "axvisor_api", "axvm", "bitflags 2.9.0", @@ -583,7 +591,9 @@ dependencies = [ [[package]] name = "axvisor_api" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fe2be70fd877918fbf58ab4495d8beb402aaf" dependencies = [ + "axaddrspace", "axvisor_api_proc", "crate_interface", "memory_addr", @@ -592,6 +602,7 @@ dependencies = [ [[package]] name = "axvisor_api_proc" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fe2be70fd877918fbf58ab4495d8beb402aaf" dependencies = [ "proc-macro-crate", "proc-macro2", @@ -602,13 +613,14 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#b380c96e78320618678bb2903910844d37776da1" dependencies = [ "arm_vcpu", - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axdevice", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "axvmconfig", "cfg-if", "cpumask", @@ -1259,9 +1271,9 @@ name = "riscv_vcpu" version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#15d74de5dc7d38b39b6087ac290f7d1275a8e883" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git)", + "axaddrspace", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1730,11 +1742,12 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#b240131f84db2ff61d114340c07049dcf20209b4" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1753,8 +1766,9 @@ dependencies = [ [[package]] name = "x86_vlapic" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/x86_vlapic.git?branch=timer#5ac0b3f1e76efe46b42fb825818e83e801e49ab2" dependencies = [ - "axaddrspace 0.1.0 (git+https://github.com/arceos-hypervisor/axaddrspace.git?branch=api)", + "axaddrspace", "axdevice_base", "axerrno", "axvisor_api", diff --git a/Cargo.toml b/Cargo.toml index f86b2849..84fc64f7 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -36,7 +36,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm # System dependent modules provided by ArceOS-Hypervisor. axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } -axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git", branch = "api" } +axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" @@ -48,9 +48,9 @@ page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.1.4", features = ["arm-el2"] } -axdevice = { path = "../axdevice" } -axdevice_base = { path = "../axdevice_crates/axdevice_base" } -axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git" } +axdevice = { git = "https://github.com/arceos-hypervisor/axdevice.git", branch = "inject_interrupt" } +axdevice_base = { git = "https://github.com/arceos-hypervisor/axdevice_crates.git", branch = "inject_interrupt" } +axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git", branch = "inject_interrupt" } [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } @@ -59,33 +59,33 @@ prettyplease = "0.2" quote = "1.0" syn = "2.0" -[patch."https://github.com/arceos-hypervisor/axvcpu.git"] -axvcpu = { path = "../axvcpu" } +# [patch."https://github.com/arceos-hypervisor/axvcpu.git"] +# axvcpu = { path = "../axvcpu" } -[patch."https://github.com/arceos-hypervisor/axvisor_api.git"] -axvisor_api = { path = "../axvisor_api" } +# [patch."https://github.com/arceos-hypervisor/axvisor_api.git"] +# axvisor_api = { path = "../axvisor_api" } -[patch."https://github.com/arceos-hypervisor/x86_vcpu.git"] -x86_vcpu = { path = "../x86_vcpu" } +# [patch."https://github.com/arceos-hypervisor/x86_vcpu.git"] +# x86_vcpu = { path = "../x86_vcpu" } -[patch."https://github.com/arceos-hypervisor/x86_vlapic.git"] -x86_vlapic = { path = "../x86_vlapic" } +# [patch."https://github.com/arceos-hypervisor/x86_vlapic.git"] +# x86_vlapic = { path = "../x86_vlapic" } -[patch."https://github.com/arceos-hypervisor/axvm.git"] -axvm = { path = "../axvm" } +# [patch."https://github.com/arceos-hypervisor/axvm.git"] +# axvm = { path = "../axvm" } -[patch."https://github.com/arceos-hypervisor/axdevice.git"] -axdevice = { path = "../axdevice" } +# [patch."https://github.com/arceos-hypervisor/axdevice.git"] +# axdevice = { path = "../axdevice" } -[patch."https://github.com/arceos-hypervisor/axdevice_crates.git"] -axdevice_base = { path = "../axdevice_crates/axdevice_base" } +# [patch."https://github.com/arceos-hypervisor/axdevice_crates.git"] +# axdevice_base = { path = "../axdevice_crates/axdevice_base" } -[patch."https://github.com/arceos-hypervisor/arceos.git"] -axstd = { path = "../arceos-new/ulib/axstd", features = [ - "alloc", - "paging", - "ipi", - "smp", - "irq" -]} -axconfig = { path = "../arceos-new/modules/axconfig" } \ No newline at end of file +# [patch."https://github.com/arceos-hypervisor/arceos.git"] +# axstd = { path = "../arceos-new/ulib/axstd", features = [ +# "alloc", +# "paging", +# "ipi", +# "smp", +# "irq" +# ]} +# axconfig = { path = "../arceos-new/modules/axconfig" } \ No newline at end of file diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 81ca5fb0..3ebd021d 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -55,7 +55,6 @@ pub fn init_guest_vms() { mock_timer.tick(); }); }).expect("Failed to create VM"); - vm.set_devices_interrupt_injector(); push_vm(vm.clone()); // Load corresponding images for VM. diff --git a/src/vmm/mock.rs b/src/vmm/mock.rs index 9a94c02f..478b7d1a 100644 --- a/src/vmm/mock.rs +++ b/src/vmm/mock.rs @@ -1,12 +1,12 @@ -use core::cell::{OnceCell, Ref, RefCell}; +use core::cell::RefCell; use alloc::boxed::Box; -use axaddrspace::{device::{self, AccessWidth}, GuestPhysAddr, GuestPhysAddrRange}; -use axdevice_base::{BaseDeviceOps, DeviceRWContext, InterruptInjector}; +use axaddrspace::{device::{AccessWidth, DeviceAddrRange}, GuestPhysAddrRange}; +use axdevice_base::BaseDeviceOps; use cpumask::CpuMask; pub struct MockTimer { - injector: RefCell>>, + // injector: RefCell>>, } impl BaseDeviceOps for MockTimer { @@ -21,40 +21,30 @@ impl BaseDeviceOps for MockTimer { fn handle_read( &self, - addr: ::Addr, + addr: ::Addr, width: AccessWidth, - context: DeviceRWContext, ) -> axerrno::AxResult { todo!() } fn handle_write( &self, - addr: ::Addr, + addr: ::Addr, width: AccessWidth, val: usize, - context: DeviceRWContext, ) -> axerrno::AxResult { todo!() } - - fn set_interrupt_injector(&self, injector: Box) { - self.injector.borrow_mut().replace(injector); - } } impl MockTimer { pub fn new() -> Self { - Self { - injector: RefCell::new(None), - } + Self {} } pub fn tick(&self) { - // Warning! Potential deadlock here - if let Some(injector) = self.injector.borrow_mut().as_mut() { - injector(CpuMask::one_shot(0), 0x77); - } + use axvisor_api::vmm::*; + inject_interrupt(current_vm_id(), current_vcpu_id(), 0x77); } } From 43dc1d14656397c18547c752b63dfca0c20525a2 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Mon, 14 Apr 2025 16:52:09 +0800 Subject: [PATCH 09/62] fix Cargo.lock --- Cargo.lock | 148 +++++++++++++++++++++++------------------------------ 1 file changed, 64 insertions(+), 84 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 71d5880f..ce0d86e7 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -163,7 +163,7 @@ dependencies = [ "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", "log", "numeric-enum-macro", - "percpu", + "percpu 0.2.0", "spin", "tock-registers 0.8.1", ] @@ -274,19 +274,18 @@ dependencies = [ "axdriver_virtio", "axhal", "cfg-if", - "crate_interface", "log", ] [[package]] name = "axdriver_base" -version = "0.1.2" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" +version = "0.1.0" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" [[package]] name = "axdriver_block" -version = "0.1.2" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" +version = "0.1.0" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" dependencies = [ "axdriver_base", "log", @@ -294,16 +293,16 @@ dependencies = [ [[package]] name = "axdriver_pci" -version = "0.1.2" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" +version = "0.1.0" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" dependencies = [ "virtio-drivers", ] [[package]] name = "axdriver_virtio" -version = "0.1.2" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" +version = "0.1.0" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" dependencies = [ "axdriver_base", "axdriver_block", @@ -348,7 +347,6 @@ dependencies = [ "axfs_ramfs", "axfs_vfs", "axio", - "axns", "axsync", "cap_access", "cfg-if", @@ -395,7 +393,7 @@ name = "axhal" version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ - "aarch64-cpu 10.0.0", + "aarch64-cpu 9.4.0", "arm_gicv2", "arm_pl011", "axalloc", @@ -413,18 +411,16 @@ dependencies = [ "lazyinit", "linkme", "log", - "loongArch64", "memory_addr", - "ns16550a", "page_table_entry", "page_table_multiarch", - "percpu", + "percpu 0.1.7", "raw-cpuid 11.5.0", + "riscv 0.11.1", "riscv_plic", - "riscv 0.12.1", "sbi-rt", "static_assertions", - "tock-registers 0.9.0", + "tock-registers 0.8.1", "x2apic", "x86", "x86_64 0.15.2", @@ -449,7 +445,7 @@ dependencies = [ "kspin", "lazyinit", "log", - "percpu", + "percpu 0.1.7", ] [[package]] @@ -468,7 +464,6 @@ name = "axmm" version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ - "axalloc", "axconfig", "axerrno", "axhal", @@ -476,16 +471,6 @@ dependencies = [ "lazyinit", "log", "memory_addr", - "memory_set", -] - -[[package]] -name = "axns" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#4ab0c7fa36f14823749a3fa147fddcb3fe10b94d" -dependencies = [ - "crate_interface", - "lazyinit", ] [[package]] @@ -504,9 +489,8 @@ dependencies = [ "axtask", "chrono", "crate_interface", - "ctor_bare", "kernel_guard", - "percpu", + "percpu 0.1.7", ] [[package]] @@ -545,7 +529,7 @@ dependencies = [ "lazyinit", "log", "memory_addr", - "percpu", + "percpu 0.1.7", "scheduler", "timer_list", ] @@ -558,7 +542,18 @@ dependencies = [ "axaddrspace", "axerrno", "memory_addr", - "percpu", + "percpu 0.1.7", +] + +[[package]] +name = "axvcpu" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git#34fc1067c4e9dddf3e43e7d290bcb5cf4127382e" +dependencies = [ + "axaddrspace", + "axerrno", + "memory_addr", + "percpu 0.2.0", ] [[package]] @@ -584,7 +579,7 @@ dependencies = [ "memory_addr", "page_table_entry", "page_table_multiarch", - "percpu", + "percpu 0.2.0", "prettyplease", "quote", "spin", @@ -633,7 +628,7 @@ dependencies = [ "memory_addr", "page_table_entry", "page_table_multiarch", - "percpu", + "percpu 0.1.7", "riscv_vcpu", "spin", "x86_vcpu", @@ -848,26 +843,6 @@ version = "0.2.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "43da5946c66ffcc7745f48db692ffbb10a83bfe0afd96235c5c2a4fb23994929" -[[package]] -name = "ctor_bare" -version = "0.2.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e4e5ae3c454dc1efb0e5821dc17344539849391b2de18c89596ea563f1909f93" -dependencies = [ - "ctor_bare_macros", -] - -[[package]] -name = "ctor_bare_macros" -version = "0.2.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9a49d5cd78b1c748184d41407b14a58af8403c13328ff2b9f49b0a418c24e3ff" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.100", -] - [[package]] name = "dw_apb_uart" version = "0.1.0" @@ -1038,16 +1013,6 @@ version = "0.4.21" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "90ed8c1e510134f979dbc4f070f87d4313098b704861a105fe34231c70a3901c" -[[package]] -name = "loongArch64" -version = "0.2.4" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dd48200d465466664e4e899b204b77b5447d60b1ababdad3a2c49ae85417b552" -dependencies = [ - "bit_field", - "bitflags 1.3.2", -] - [[package]] name = "memchr" version = "2.7.4" @@ -1078,12 +1043,6 @@ dependencies = [ "memory_addr", ] -[[package]] -name = "ns16550a" -version = "0.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "667fbdfccff4775918606516ff6ca51b898ac0842c4bc41c960a55a9832545a6" - [[package]] name = "num-traits" version = "0.2.19" @@ -1136,6 +1095,18 @@ version = "1.0.15" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a" +[[package]] +name = "percpu" +version = "0.1.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "95e24fa01075d3d4235b84d3dd5a0ec0fd3040602065ea155acd0849e9067007" +dependencies = [ + "cfg-if", + "percpu_macros 0.1.7", + "spin", + "x86", +] + [[package]] name = "percpu" version = "0.2.0" @@ -1143,11 +1114,22 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "01e56c0c558952222967b592899f98765b48590e7bd7403bfd7075f73afc6ed6" dependencies = [ "cfg-if", - "percpu_macros", + "percpu_macros 0.2.0", "spin", "x86", ] +[[package]] +name = "percpu_macros" +version = "0.1.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "421082ebe971ea22e82137de45ab6b9500bb178b364ebba02858bf7f80ec6471" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "percpu_macros" version = "0.2.0" @@ -1255,6 +1237,16 @@ dependencies = [ "riscv-target", ] +[[package]] +name = "riscv" +version = "0.11.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2f5c1b8bf41ea746266cdee443d1d1e9125c86ce1447e1a2615abd34330d33a9" +dependencies = [ + "critical-section", + "embedded-hal", +] + [[package]] name = "riscv" version = "0.12.1" @@ -1264,7 +1256,6 @@ dependencies = [ "critical-section", "embedded-hal", "paste", - "riscv-macros", "riscv-pac", ] @@ -1273,17 +1264,6 @@ name = "riscv-decode" version = "0.2.1" source = "git+https://github.com/KuangjuX/riscv-decode.git#0e346d0ad041987023caa6f7f832185ed568630b" -[[package]] -name = "riscv-macros" -version = "0.1.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f265be5d634272320a7de94cea15c22a3bfdd4eb42eb43edc528415f066a1f25" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.100", -] - [[package]] name = "riscv-pac" version = "0.2.0" From 8acff238d9bdd528b82b388e5700e87c3dd578b4 Mon Sep 17 00:00:00 2001 From: Debin Date: Mon, 31 Mar 2025 22:44:58 +0800 Subject: [PATCH 10/62] feat(vmm): implement VGICv2 and integrate VirtIO - Add VGICv2 support for virtual interrupt controller - Integrate VirtIO drivers for block and network devices - Update VM configuration to include VGICv2 and VirtIO devices - Remove unused timer code and mock timer device --- Cargo.lock | 426 +++++++++++++++----- Cargo.toml | 27 +- Makefile | 2 +- configs/platforms/aarch64-qemu-virt-hv.toml | 4 +- configs/vms/nimbos-aarch64.toml | 26 +- src/vmm/config.rs | 24 +- src/vmm/timer.rs | 4 +- 7 files changed, 392 insertions(+), 121 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index ce0d86e7..1327b075 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,10 +117,9 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver", "axerrno", "axfeat", @@ -137,7 +136,6 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_gicv2?branch=sgi#956665adcdc6b09a28078db09ad3f09ed41af80b" dependencies = [ "tock-registers 0.8.1", ] @@ -154,16 +152,34 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#64a09bd5a37988233264f0e367fc246b40e35771" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", "axaddrspace", + "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", + "axhal", + "axvcpu", + "axvisor_api", "log", "numeric-enum-macro", - "percpu 0.2.0", + "percpu", + "spin", + "tock-registers 0.8.1", +] + +[[package]] +name = "arm_vgic" +version = "0.0.0" +dependencies = [ + "arm_gicv2", + "axaddrspace", + "axdevice_base", + "axerrno", + "axhal", + "axvisor_api", + "log", + "memory_addr", "spin", "tock-registers 0.8.1", ] @@ -177,7 +193,6 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -195,7 +210,6 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "allocator", "axerrno", @@ -205,6 +219,13 @@ dependencies = [ "memory_addr", ] +[[package]] +name = "axconfig" +version = "0.1.0" +dependencies = [ + "axconfig-gen-macros", +] + [[package]] name = "axconfig" version = "0.1.0" @@ -238,8 +259,8 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#5bb06f57c3c5bce235e441345be8cb444c2e11d5" dependencies = [ + "arm_vgic", "axaddrspace", "axdevice_base", "axerrno", @@ -247,12 +268,14 @@ dependencies = [ "cfg-if", "log", "memory_addr", + "virtio-blk", + "virtio-device", + "virtio-queue", ] [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#9e42a6c1714b42d352d7f8c8a146024c29bf3888" dependencies = [ "axaddrspace", "axerrno", @@ -264,28 +287,28 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver_base", "axdriver_block", "axdriver_pci", "axdriver_virtio", "axhal", "cfg-if", + "crate_interface", "log", ] [[package]] name = "axdriver_base" -version = "0.1.0" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" +version = "0.1.2" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" [[package]] name = "axdriver_block" -version = "0.1.0" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" +version = "0.1.2" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" dependencies = [ "axdriver_base", "log", @@ -293,16 +316,16 @@ dependencies = [ [[package]] name = "axdriver_pci" -version = "0.1.0" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" +version = "0.1.2" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" dependencies = [ "virtio-drivers", ] [[package]] name = "axdriver_virtio" -version = "0.1.0" -source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.0#78686a7e70c9203ba29e425929c393fbb7eca208" +version = "0.1.2" +source = "git+https://github.com/arceos-org/axdriver_crates.git?tag=v0.1.2#84eb2170f865e6fa29b78995a86f4fcdcede63df" dependencies = [ "axdriver_base", "axdriver_block", @@ -321,7 +344,6 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", "axdriver", @@ -338,7 +360,6 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axdriver", "axdriver_block", @@ -347,6 +368,7 @@ dependencies = [ "axfs_ramfs", "axfs_vfs", "axio", + "axns", "axsync", "cap_access", "cfg-if", @@ -391,13 +413,12 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ - "aarch64-cpu 9.4.0", + "aarch64-cpu 10.0.0", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig", + "axconfig 0.1.0", "axlog", "bitflags 2.9.0", "cfg-if", @@ -411,16 +432,18 @@ dependencies = [ "lazyinit", "linkme", "log", + "loongArch64", "memory_addr", + "ns16550a", "page_table_entry", "page_table_multiarch", - "percpu 0.1.7", + "percpu", "raw-cpuid 11.5.0", "riscv 0.11.1", "riscv_plic", "sbi-rt", "static_assertions", - "tock-registers 0.8.1", + "tock-registers 0.9.0", "x2apic", "x86", "x86_64 0.15.2", @@ -438,20 +461,18 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ - "axconfig", + "axconfig 0.1.0", "axhal", "kspin", "lazyinit", "log", - "percpu 0.1.7", + "percpu", ] [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "cfg-if", "crate_interface", @@ -462,24 +483,32 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ - "axconfig", + "axconfig 0.1.0", "axerrno", "axhal", "kspin", "lazyinit", "log", "memory_addr", + "memory_set", +] + +[[package]] +name = "axns" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#4ab0c7fa36f14823749a3fa147fddcb3fe10b94d" +dependencies = [ + "crate_interface", + "lazyinit", ] [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver", "axfs", "axhal", @@ -489,14 +518,14 @@ dependencies = [ "axtask", "chrono", "crate_interface", + "ctor_bare", "kernel_guard", - "percpu 0.1.7", + "percpu", ] [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "arceos_api", "axerrno", @@ -508,7 +537,6 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ "axtask", "kspin", @@ -517,9 +545,8 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" dependencies = [ - "axconfig", + "axconfig 0.1.0", "axhal", "cfg-if", "cpumask", @@ -529,7 +556,7 @@ dependencies = [ "lazyinit", "log", "memory_addr", - "percpu 0.1.7", + "percpu", "scheduler", "timer_list", ] @@ -537,23 +564,11 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#3c3d44747e7aee46ba58d736f3f55ddba0103efa" dependencies = [ "axaddrspace", "axerrno", "memory_addr", - "percpu 0.1.7", -] - -[[package]] -name = "axvcpu" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git#34fc1067c4e9dddf3e43e7d290bcb5cf4127382e" -dependencies = [ - "axaddrspace", - "axerrno", - "memory_addr", - "percpu 0.2.0", + "percpu", ] [[package]] @@ -561,12 +576,12 @@ name = "axvisor" version = "0.1.0" dependencies = [ "axaddrspace", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt)", "axdevice", "axdevice_base", "axerrno", "axstd", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", "axvisor_api", "axvm", "bitflags 2.9.0", @@ -579,7 +594,7 @@ dependencies = [ "memory_addr", "page_table_entry", "page_table_multiarch", - "percpu 0.2.0", + "percpu", "prettyplease", "quote", "spin", @@ -613,14 +628,13 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#b380c96e78320618678bb2903910844d37776da1" dependencies = [ "arm_vcpu", "axaddrspace", "axdevice", "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", "axvmconfig", "cfg-if", "cpumask", @@ -628,7 +642,7 @@ dependencies = [ "memory_addr", "page_table_entry", "page_table_multiarch", - "percpu 0.1.7", + "percpu", "riscv_vcpu", "spin", "x86_vcpu", @@ -661,6 +675,26 @@ version = "0.13.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9e1b586273c5702936fe7b7d6896644d8be71e6314cfe09d3167c95f712589e8" +[[package]] +name = "bindgen" +version = "0.71.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5f58bf3d7db68cfbac37cfc485a8d711e87e064c3d0fe0435b92f7a407f9d6b3" +dependencies = [ + "bitflags 2.9.0", + "cexpr", + "clang-sys", + "itertools", + "log", + "prettyplease", + "proc-macro2", + "quote", + "regex", + "rustc-hash", + "shlex", + "syn 2.0.100", +] + [[package]] name = "bit" version = "0.1.1" @@ -715,6 +749,15 @@ dependencies = [ "bitflags 2.9.0", ] +[[package]] +name = "cexpr" +version = "0.6.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6fac387a98bb7c37292057cffc56d62ecb629900026402633ae9160df93a8766" +dependencies = [ + "nom", +] + [[package]] name = "cfg-if" version = "1.0.0" @@ -730,6 +773,17 @@ dependencies = [ "num-traits", ] +[[package]] +name = "clang-sys" +version = "1.8.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0b023947811758c97c59bf9d1c188fd619ad4718dcaa767947df1cadb14f39f4" +dependencies = [ + "glob", + "libc", + "libloading", +] + [[package]] name = "clap" version = "4.5.34" @@ -843,6 +897,26 @@ version = "0.2.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "43da5946c66ffcc7745f48db692ffbb10a83bfe0afd96235c5c2a4fb23994929" +[[package]] +name = "ctor_bare" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e4e5ae3c454dc1efb0e5821dc17344539849391b2de18c89596ea563f1909f93" +dependencies = [ + "ctor_bare_macros", +] + +[[package]] +name = "ctor_bare_macros" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9a49d5cd78b1c748184d41407b14a58af8403c13328ff2b9f49b0a418c24e3ff" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "dw_apb_uart" version = "0.1.0" @@ -852,6 +926,12 @@ dependencies = [ "tock-registers 0.8.1", ] +[[package]] +name = "either" +version = "1.15.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "48c757948c5ede0e46177b7add2e67155f70e33c07fea8284df6576da70b3719" + [[package]] name = "embedded-hal" version = "1.0.0" @@ -884,6 +964,12 @@ dependencies = [ "wasi", ] +[[package]] +name = "glob" +version = "0.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a8d1add55171497b4705a648c6b583acafb01d58050a51727785f0b2c8e0a2b2" + [[package]] name = "handler_table" version = "0.1.2" @@ -934,6 +1020,15 @@ version = "1.70.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7943c866cc5cd64cbc25b2e01621d07fa8eb2a1a23160ee81ce38704e97b8ecf" +[[package]] +name = "itertools" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "413ee7dfc52ee1a4949ceeb7dbc8a33f2d6c088194d9f922fb8318faf1f01186" +dependencies = [ + "either", +] + [[package]] name = "kernel_guard" version = "0.1.2" @@ -972,6 +1067,16 @@ version = "0.2.171" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "c19937216e9d3aa9956d9bb8dfc0b0c8beb6058fc4f7a4dc4d850edf86a237d6" +[[package]] +name = "libloading" +version = "0.8.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fc2f4eb4bc735547cfed7c0a4922cbd04a4655978c09b54f1f7b228750664c34" +dependencies = [ + "cfg-if", + "windows-targets", +] + [[package]] name = "linked_list" version = "0.1.0" @@ -1013,6 +1118,16 @@ version = "0.4.21" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "90ed8c1e510134f979dbc4f070f87d4313098b704861a105fe34231c70a3901c" +[[package]] +name = "loongArch64" +version = "0.2.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "dd48200d465466664e4e899b204b77b5447d60b1ababdad3a2c49ae85417b552" +dependencies = [ + "bit_field", + "bitflags 1.3.2", +] + [[package]] name = "memchr" version = "2.7.4" @@ -1043,6 +1158,28 @@ dependencies = [ "memory_addr", ] +[[package]] +name = "minimal-lexical" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "68354c5c6bd36d73ff3feceb05efa59b6acb7626617f4962be322a825e61f79a" + +[[package]] +name = "nom" +version = "7.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d273983c5a657a70a3e8f2a01329822f3b8c8172b73826411a55751e404a0a4a" +dependencies = [ + "memchr", + "minimal-lexical", +] + +[[package]] +name = "ns16550a" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "667fbdfccff4775918606516ff6ca51b898ac0842c4bc41c960a55a9832545a6" + [[package]] name = "num-traits" version = "0.2.19" @@ -1095,18 +1232,6 @@ version = "1.0.15" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a" -[[package]] -name = "percpu" -version = "0.1.7" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95e24fa01075d3d4235b84d3dd5a0ec0fd3040602065ea155acd0849e9067007" -dependencies = [ - "cfg-if", - "percpu_macros 0.1.7", - "spin", - "x86", -] - [[package]] name = "percpu" version = "0.2.0" @@ -1114,22 +1239,11 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "01e56c0c558952222967b592899f98765b48590e7bd7403bfd7075f73afc6ed6" dependencies = [ "cfg-if", - "percpu_macros 0.2.0", + "percpu_macros", "spin", "x86", ] -[[package]] -name = "percpu_macros" -version = "0.1.7" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "421082ebe971ea22e82137de45ab6b9500bb178b364ebba02858bf7f80ec6471" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.100", -] - [[package]] name = "percpu_macros" version = "0.2.0" @@ -1237,16 +1351,6 @@ dependencies = [ "riscv-target", ] -[[package]] -name = "riscv" -version = "0.11.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2f5c1b8bf41ea746266cdee443d1d1e9125c86ce1447e1a2615abd34330d33a9" -dependencies = [ - "critical-section", - "embedded-hal", -] - [[package]] name = "riscv" version = "0.12.1" @@ -1256,6 +1360,7 @@ dependencies = [ "critical-section", "embedded-hal", "paste", + "riscv-macros", "riscv-pac", ] @@ -1264,6 +1369,17 @@ name = "riscv-decode" version = "0.2.1" source = "git+https://github.com/KuangjuX/riscv-decode.git#0e346d0ad041987023caa6f7f832185ed568630b" +[[package]] +name = "riscv-macros" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f265be5d634272320a7de94cea15c22a3bfdd4eb42eb43edc528415f066a1f25" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "riscv-pac" version = "0.2.0" @@ -1296,7 +1412,7 @@ source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#15d74de5dc7d38 dependencies = [ "axaddrspace", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git)", + "axvcpu", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1325,6 +1441,12 @@ dependencies = [ "svgbobdoc", ] +[[package]] +name = "rustc-hash" +version = "2.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "357703d41365b4b27c590e3ed91eabb1b663f07c4c084095e60cbed4362dff0d" + [[package]] name = "rustc_version" version = "0.2.3" @@ -1445,6 +1567,12 @@ dependencies = [ "serde", ] +[[package]] +name = "shlex" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64" + [[package]] name = "spin" version = "0.9.8" @@ -1501,6 +1629,26 @@ dependencies = [ "unicode-ident", ] +[[package]] +name = "thiserror" +version = "1.0.69" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b6aaf5339b578ea85b50e080feb250a3e8ae8cfcdff9a461c9ec2904bc923f52" +dependencies = [ + "thiserror-impl", +] + +[[package]] +name = "thiserror-impl" +version = "1.0.69" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4fee6c4efc90059e10f81e6d42c60a18f76588c3d74cb83a0b242a2b6c7504c1" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "timer_list" version = "0.1.0" @@ -1603,6 +1751,38 @@ version = "0.9.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" +[[package]] +name = "virtio-bindings" +version = "0.2.5" +source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" +dependencies = [ + "bindgen", +] + +[[package]] +name = "virtio-blk" +version = "0.1.0" +source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" +dependencies = [ + "log", + "virtio-bindings", + "virtio-device", + "virtio-queue", + "vm-memory", + "vmm-sys-util", +] + +[[package]] +name = "virtio-device" +version = "0.1.0" +source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" +dependencies = [ + "log", + "virtio-bindings", + "virtio-queue", + "vm-memory", +] + [[package]] name = "virtio-drivers" version = "0.7.4" @@ -1614,6 +1794,38 @@ dependencies = [ "zerocopy", ] +[[package]] +name = "virtio-queue" +version = "0.14.0" +source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" +dependencies = [ + "log", + "virtio-bindings", + "vm-memory", + "vmm-sys-util", +] + +[[package]] +name = "vm-memory" +version = "0.16.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f1720e7240cdc739f935456eb77f370d7e9b2a3909204da1e2b47bef1137a013" +dependencies = [ + "libc", + "thiserror", + "winapi", +] + +[[package]] +name = "vmm-sys-util" +version = "0.12.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1d1435039746e20da4f8d507a72ee1b916f7b4b05af7a91c093d2c6561934ede" +dependencies = [ + "bitflags 1.3.2", + "libc", +] + [[package]] name = "volatile" version = "0.4.6" @@ -1626,6 +1838,28 @@ version = "0.11.0+wasi-snapshot-preview1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" +[[package]] +name = "winapi" +version = "0.3.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419" +dependencies = [ + "winapi-i686-pc-windows-gnu", + "winapi-x86_64-pc-windows-gnu", +] + +[[package]] +name = "winapi-i686-pc-windows-gnu" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" + +[[package]] +name = "winapi-x86_64-pc-windows-gnu" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" + [[package]] name = "windows-sys" version = "0.59.0" @@ -1770,7 +2004,7 @@ dependencies = [ "axaddrspace", "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", "bit_field", "bitflags 2.9.0", "cfg-if", diff --git a/Cargo.toml b/Cargo.toml index 11788dbc..5033bf37 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,3 +1,24 @@ +[patch."https://github.com/arceos-hypervisor/arceos.git".axstd] +path = "../arceos/ulib/axstd" +[patch."https://github.com/arceos-hypervisor/arceos.git".axhal] +path = "../arceos/modules/axhal" +[patch."https://github.com/arceos-hypervisor/axvm.git".axvm] +path = "../crates/axvm" +[patch."https://github.com/arceos-hypervisor/axvcpu.git".axvcpu] +path = "../crates/axvcpu" +[patch."https://github.com/arceos-hypervisor/axaddrspace.git".axaddrspace] +path = "../crates/axaddrspace" +[patch."https://github.com/arceos-hypervisor/axdevice.git".axdevice] +path = "../crates/axdevice" +[patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] +path = "../crates/axdevice_crates/axdevice_base" +[patch."https://github.com/arceos-hypervisor/arm_vcpu.git".arm_vcpu] +path = "../crates/arm_vcpu" +[patch."https://github.com/arceos-hypervisor/arm_gicv2.git".arm_gicv2] +path = "../crates/arm_gicv2" +[patch."https://github.com/arceos-hypervisor/arm_vgic.git".arm_vgic] +path = "../crates/arm_vgic" + [profile.release] lto = true @@ -11,6 +32,8 @@ license = "GPL-3.0-or-later OR Apache-2.0 OR MulanPubL-2.0 OR MulanPSL2" [features] fs = ["axstd/fs"] +hv = [] +irq = [] [dependencies] log = "=0.4.21" @@ -31,7 +54,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm "multitask", "smp", # "sched_rr" -]} +] } # System dependent modules provided by ArceOS-Hypervisor. axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt" } @@ -88,4 +111,4 @@ syn = "2.0" # "smp", # "irq" # ]} -# axconfig = { path = "../arceos-new/modules/axconfig" } \ No newline at end of file +# axconfig = { path = "../arceos-new/modules/axconfig" } diff --git a/Makefile b/Makefile index dee0c9e1..38d60386 100644 --- a/Makefile +++ b/Makefile @@ -50,7 +50,7 @@ FEATURES ?= APP_FEATURES ?= # make `FEATURES=page-alloc-64g` as the default configuration MEM_FEATURES ?= page-alloc-64g -FEATURES += $(MEM_FEATURES) +override FEATURES := $(FEATURES),$(MEM_FEATURES) # QEMU options BLK ?= y diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index 8e152ae7..a27b09e8 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -38,7 +38,7 @@ mmio-regions = [ [0x0900_0000, 0x1000], # PL011 UART1 [0x0904_0000, 0x1000], # PL011 UART2 [0x0910_0000, 0x1000], # PL031 RTC - [0x0800_0000, 0x2_0000], # GICv2 + [0x0800_0000, 0x5_0000], # GICv2 [0x0a00_0000, 0x4000], # VirtIO [0x1000_0000, 0x2eff_0000], # PCI memory ranges (ranges 1: 32-bit MMIO space) [0x40_1000_0000, 0x1000_0000], # PCI config space @@ -97,6 +97,8 @@ uart-irq = 1 # uint gicc-paddr = 0x0801_0000 # uint # GIC Distributor base address gicd-paddr = 0x0800_0000 # uint +gicv-paddr = 0x0804_0000 +gich-paddr = 0x0803_0000 # PSCI psci-method = "smc" # str diff --git a/configs/vms/nimbos-aarch64.toml b/configs/vms/nimbos-aarch64.toml index 2be467af..df811375 100644 --- a/configs/vms/nimbos-aarch64.toml +++ b/configs/vms/nimbos-aarch64.toml @@ -20,9 +20,10 @@ phys_cpu_sets = [1] entry_point = 0x4008_0000 # The location of image: "memory" | "fs". # Load from file system. -image_location = "fs" +image_location = "memory" # The file path of the kernel image. -kernel_path = "nimbos-aarch64.bin" +kernel_path = "/home/debin/Codes/arceos-umhv/nimbos/kernel/target/aarch64/release/nimbos.bin" +# kernel_path = "/home/debin/Codes/arm_tiny/build/arm_tiny.bin" # The load address of the kernel image. kernel_load_addr = 0x4008_0000 @@ -40,7 +41,7 @@ kernel_load_addr = 0x4008_0000 # Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ - [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE + [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE ] # @@ -49,16 +50,27 @@ memory_regions = [ [devices] # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] +emu_devices = [ + [ + "vgicd-v2", + 0x800_0000, + 0x10_000, + 25, + 1, + [ + 2, + ], + ], # Vgicdv2 4k irq-25 EmuDeviceTGicdV2 config: vcpu_num +] # Pass-through devices. # Name Base-Ipa Base-Pa Length Alloc-Irq. passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + ["intc@8000000", 0x801_0000, 0x804_0000, 0x2_000, 0x1], + ["pl011@9000000", 0x900_0000, 0x904_0000, 0x1000, 0x1], ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], -] \ No newline at end of file +] diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 3ebd021d..1ee7ec79 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -39,21 +39,21 @@ pub fn init_guest_vms() { let mock_timer = super::mock::MockTimer::new(); let mock_timer = alloc::sync::Arc::new(mock_timer); - devices.add_mmio_dev(mock_timer.clone()); + // devices.add_mmio_dev(mock_timer.clone()); - use std::os::arceos::modules::axhal; + // use std::os::arceos::modules::axhal; - fn schedule_next(action: impl Fn() + Send + Sync + 'static) { - super::timer::register_timer(axhal::time::monotonic_time_nanos() + 1_000_000_000, move |time| { - info!("Timer fired at {:?}", time); - action(); - schedule_next(action); - }); - } + // fn schedule_next(action: impl Fn() + Send + Sync + 'static) { + // super::timer::register_timer(axhal::time::monotonic_time_nanos() + 1_000_000_000, move |time| { + // info!("Timer fired at {:?}", time); + // action(); + // schedule_next(action); + // }); + // } - schedule_next(move || { - mock_timer.tick(); - }); + // schedule_next(move || { + // mock_timer.tick(); + // }); }).expect("Failed to create VM"); push_vm(vm.clone()); diff --git a/src/vmm/timer.rs b/src/vmm/timer.rs index fe46cfd5..c0be0c3b 100644 --- a/src/vmm/timer.rs +++ b/src/vmm/timer.rs @@ -77,8 +77,8 @@ pub fn cancel_timer(token: usize) { /// Check and process any pending timer events pub fn check_events() { - info!("Checking timer events..."); - info!("now is {:#?}", axhal::time::wall_time()); + // info!("Checking timer events..."); + // info!("now is {:#?}", axhal::time::wall_time()); let timer_list = unsafe { TIMER_LIST.current_ref_mut_raw() }; loop { let now = axhal::time::wall_time(); From 7da62276ec9b29eca4de597dc18c919c6e85b271 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Tue, 15 Apr 2025 11:55:43 +0800 Subject: [PATCH 11/62] fixes after merge debin/timer_api --- Cargo.lock | 273 +++++++++-------------------------------------------- Cargo.toml | 27 +----- 2 files changed, 45 insertions(+), 255 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 1327b075..d8532b71 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,9 +117,10 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", - "axconfig 0.1.0", + "axconfig", "axdriver", "axerrno", "axfeat", @@ -136,6 +137,7 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arm_gicv2?branch=debin%2F2vm_timer#0ad077649e030b9836a5dc55a5a01b1fd0246e11" dependencies = [ "tock-registers 0.8.1", ] @@ -152,13 +154,13 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=debin%2Ftimer_api#4017f66587dc3c491987c92a8589ab86257d59ac" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", "axaddrspace", "axdevice_base", "axerrno", - "axhal", "axvcpu", "axvisor_api", "log", @@ -171,12 +173,12 @@ dependencies = [ [[package]] name = "arm_vgic" version = "0.0.0" +source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=debin%2Ftimer_api#e1b039b7452ea387ee408fa4020542ba7134866c" dependencies = [ "arm_gicv2", "axaddrspace", "axdevice_base", "axerrno", - "axhal", "axvisor_api", "log", "memory_addr", @@ -193,6 +195,7 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -210,6 +213,7 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "allocator", "axerrno", @@ -222,14 +226,7 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -dependencies = [ - "axconfig-gen-macros", -] - -[[package]] -name = "axconfig" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#ab6e5cf1eccab2dc42c35e3df139148369af942d" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axconfig-gen-macros", ] @@ -259,6 +256,7 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#a568439b883322d5873c33b44dc531124ebbfd19" dependencies = [ "arm_vgic", "axaddrspace", @@ -268,14 +266,12 @@ dependencies = [ "cfg-if", "log", "memory_addr", - "virtio-blk", - "virtio-device", - "virtio-queue", ] [[package]] name = "axdevice_base" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#9e42a6c1714b42d352d7f8c8a146024c29bf3888" dependencies = [ "axaddrspace", "axerrno", @@ -287,9 +283,10 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", - "axconfig 0.1.0", + "axconfig", "axdriver_base", "axdriver_block", "axdriver_pci", @@ -344,6 +341,7 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", "axdriver", @@ -360,6 +358,7 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axdriver", "axdriver_block", @@ -413,12 +412,13 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "aarch64-cpu 10.0.0", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig 0.1.0", + "axconfig", "axlog", "bitflags 2.9.0", "cfg-if", @@ -439,7 +439,7 @@ dependencies = [ "page_table_multiarch", "percpu", "raw-cpuid 11.5.0", - "riscv 0.11.1", + "riscv 0.12.1", "riscv_plic", "sbi-rt", "static_assertions", @@ -461,8 +461,9 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ - "axconfig 0.1.0", + "axconfig", "axhal", "kspin", "lazyinit", @@ -473,6 +474,7 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "cfg-if", "crate_interface", @@ -483,8 +485,10 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ - "axconfig 0.1.0", + "axalloc", + "axconfig", "axerrno", "axhal", "kspin", @@ -497,7 +501,7 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#4ab0c7fa36f14823749a3fa147fddcb3fe10b94d" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "crate_interface", "lazyinit", @@ -506,9 +510,10 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", - "axconfig 0.1.0", + "axconfig", "axdriver", "axfs", "axhal", @@ -526,6 +531,7 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "arceos_api", "axerrno", @@ -537,6 +543,7 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axtask", "kspin", @@ -545,8 +552,9 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ - "axconfig 0.1.0", + "axconfig", "axhal", "cfg-if", "cpumask", @@ -564,6 +572,7 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#15bd90e3f175996a703b0e45fcfce22e91aa1d74" dependencies = [ "axaddrspace", "axerrno", @@ -576,7 +585,7 @@ name = "axvisor" version = "0.1.0" dependencies = [ "axaddrspace", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt)", + "axconfig", "axdevice", "axdevice_base", "axerrno", @@ -606,7 +615,7 @@ dependencies = [ [[package]] name = "axvisor_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fe2be70fd877918fbf58ab4495d8beb402aaf" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#fc96d7cca4b8b6b0feaf28f2351b71e5ae8cbb84" dependencies = [ "axaddrspace", "axvisor_api_proc", @@ -617,7 +626,7 @@ dependencies = [ [[package]] name = "axvisor_api_proc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fe2be70fd877918fbf58ab4495d8beb402aaf" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#fc96d7cca4b8b6b0feaf28f2351b71e5ae8cbb84" dependencies = [ "proc-macro-crate", "proc-macro2", @@ -628,6 +637,7 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#605c6bd93962259021d0dfb9769eac6162edfb29" dependencies = [ "arm_vcpu", "axaddrspace", @@ -675,26 +685,6 @@ version = "0.13.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9e1b586273c5702936fe7b7d6896644d8be71e6314cfe09d3167c95f712589e8" -[[package]] -name = "bindgen" -version = "0.71.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5f58bf3d7db68cfbac37cfc485a8d711e87e064c3d0fe0435b92f7a407f9d6b3" -dependencies = [ - "bitflags 2.9.0", - "cexpr", - "clang-sys", - "itertools", - "log", - "prettyplease", - "proc-macro2", - "quote", - "regex", - "rustc-hash", - "shlex", - "syn 2.0.100", -] - [[package]] name = "bit" version = "0.1.1" @@ -749,15 +739,6 @@ dependencies = [ "bitflags 2.9.0", ] -[[package]] -name = "cexpr" -version = "0.6.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6fac387a98bb7c37292057cffc56d62ecb629900026402633ae9160df93a8766" -dependencies = [ - "nom", -] - [[package]] name = "cfg-if" version = "1.0.0" @@ -773,17 +754,6 @@ dependencies = [ "num-traits", ] -[[package]] -name = "clang-sys" -version = "1.8.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0b023947811758c97c59bf9d1c188fd619ad4718dcaa767947df1cadb14f39f4" -dependencies = [ - "glob", - "libc", - "libloading", -] - [[package]] name = "clap" version = "4.5.34" @@ -926,12 +896,6 @@ dependencies = [ "tock-registers 0.8.1", ] -[[package]] -name = "either" -version = "1.15.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "48c757948c5ede0e46177b7add2e67155f70e33c07fea8284df6576da70b3719" - [[package]] name = "embedded-hal" version = "1.0.0" @@ -964,12 +928,6 @@ dependencies = [ "wasi", ] -[[package]] -name = "glob" -version = "0.3.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a8d1add55171497b4705a648c6b583acafb01d58050a51727785f0b2c8e0a2b2" - [[package]] name = "handler_table" version = "0.1.2" @@ -1020,15 +978,6 @@ version = "1.70.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7943c866cc5cd64cbc25b2e01621d07fa8eb2a1a23160ee81ce38704e97b8ecf" -[[package]] -name = "itertools" -version = "0.13.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "413ee7dfc52ee1a4949ceeb7dbc8a33f2d6c088194d9f922fb8318faf1f01186" -dependencies = [ - "either", -] - [[package]] name = "kernel_guard" version = "0.1.2" @@ -1067,16 +1016,6 @@ version = "0.2.171" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "c19937216e9d3aa9956d9bb8dfc0b0c8beb6058fc4f7a4dc4d850edf86a237d6" -[[package]] -name = "libloading" -version = "0.8.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fc2f4eb4bc735547cfed7c0a4922cbd04a4655978c09b54f1f7b228750664c34" -dependencies = [ - "cfg-if", - "windows-targets", -] - [[package]] name = "linked_list" version = "0.1.0" @@ -1120,12 +1059,12 @@ checksum = "90ed8c1e510134f979dbc4f070f87d4313098b704861a105fe34231c70a3901c" [[package]] name = "loongArch64" -version = "0.2.4" +version = "0.2.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dd48200d465466664e4e899b204b77b5447d60b1ababdad3a2c49ae85417b552" +checksum = "7c9f0d275c70310e2a9d2fc23250c5ac826a73fa828a5f256401f85c5c554283" dependencies = [ "bit_field", - "bitflags 1.3.2", + "bitflags 2.9.0", ] [[package]] @@ -1159,20 +1098,10 @@ dependencies = [ ] [[package]] -name = "minimal-lexical" -version = "0.2.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "68354c5c6bd36d73ff3feceb05efa59b6acb7626617f4962be322a825e61f79a" - -[[package]] -name = "nom" -version = "7.1.3" +name = "ns16550a" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d273983c5a657a70a3e8f2a01329822f3b8c8172b73826411a55751e404a0a4a" -dependencies = [ - "memchr", - "minimal-lexical", -] +checksum = "667fbdfccff4775918606516ff6ca51b898ac0842c4bc41c960a55a9832545a6" [[package]] name = "ns16550a" @@ -1408,7 +1337,7 @@ dependencies = [ [[package]] name = "riscv_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#15d74de5dc7d38b39b6087ac290f7d1275a8e883" +source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_interrupt#7614ffff7e164661d6894a71628d4634914fc93f" dependencies = [ "axaddrspace", "axerrno", @@ -1441,12 +1370,6 @@ dependencies = [ "svgbobdoc", ] -[[package]] -name = "rustc-hash" -version = "2.1.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "357703d41365b4b27c590e3ed91eabb1b663f07c4c084095e60cbed4362dff0d" - [[package]] name = "rustc_version" version = "0.2.3" @@ -1567,12 +1490,6 @@ dependencies = [ "serde", ] -[[package]] -name = "shlex" -version = "1.3.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64" - [[package]] name = "spin" version = "0.9.8" @@ -1629,26 +1546,6 @@ dependencies = [ "unicode-ident", ] -[[package]] -name = "thiserror" -version = "1.0.69" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b6aaf5339b578ea85b50e080feb250a3e8ae8cfcdff9a461c9ec2904bc923f52" -dependencies = [ - "thiserror-impl", -] - -[[package]] -name = "thiserror-impl" -version = "1.0.69" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4fee6c4efc90059e10f81e6d42c60a18f76588c3d74cb83a0b242a2b6c7504c1" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.100", -] - [[package]] name = "timer_list" version = "0.1.0" @@ -1751,38 +1648,6 @@ version = "0.9.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" -[[package]] -name = "virtio-bindings" -version = "0.2.5" -source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" -dependencies = [ - "bindgen", -] - -[[package]] -name = "virtio-blk" -version = "0.1.0" -source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" -dependencies = [ - "log", - "virtio-bindings", - "virtio-device", - "virtio-queue", - "vm-memory", - "vmm-sys-util", -] - -[[package]] -name = "virtio-device" -version = "0.1.0" -source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" -dependencies = [ - "log", - "virtio-bindings", - "virtio-queue", - "vm-memory", -] - [[package]] name = "virtio-drivers" version = "0.7.4" @@ -1794,38 +1659,6 @@ dependencies = [ "zerocopy", ] -[[package]] -name = "virtio-queue" -version = "0.14.0" -source = "git+https://github.com/rust-vmm/vm-virtio.git#d38b8da47bbd50cd6282d163cbcc7e3cb17a847c" -dependencies = [ - "log", - "virtio-bindings", - "vm-memory", - "vmm-sys-util", -] - -[[package]] -name = "vm-memory" -version = "0.16.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1720e7240cdc739f935456eb77f370d7e9b2a3909204da1e2b47bef1137a013" -dependencies = [ - "libc", - "thiserror", - "winapi", -] - -[[package]] -name = "vmm-sys-util" -version = "0.12.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1d1435039746e20da4f8d507a72ee1b916f7b4b05af7a91c093d2c6561934ede" -dependencies = [ - "bitflags 1.3.2", - "libc", -] - [[package]] name = "volatile" version = "0.4.6" @@ -1838,28 +1671,6 @@ version = "0.11.0+wasi-snapshot-preview1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" -[[package]] -name = "winapi" -version = "0.3.9" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419" -dependencies = [ - "winapi-i686-pc-windows-gnu", - "winapi-x86_64-pc-windows-gnu", -] - -[[package]] -name = "winapi-i686-pc-windows-gnu" -version = "0.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" - -[[package]] -name = "winapi-x86_64-pc-windows-gnu" -version = "0.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" - [[package]] name = "windows-sys" version = "0.59.0" diff --git a/Cargo.toml b/Cargo.toml index 5033bf37..5450eb45 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,24 +1,3 @@ -[patch."https://github.com/arceos-hypervisor/arceos.git".axstd] -path = "../arceos/ulib/axstd" -[patch."https://github.com/arceos-hypervisor/arceos.git".axhal] -path = "../arceos/modules/axhal" -[patch."https://github.com/arceos-hypervisor/axvm.git".axvm] -path = "../crates/axvm" -[patch."https://github.com/arceos-hypervisor/axvcpu.git".axvcpu] -path = "../crates/axvcpu" -[patch."https://github.com/arceos-hypervisor/axaddrspace.git".axaddrspace] -path = "../crates/axaddrspace" -[patch."https://github.com/arceos-hypervisor/axdevice.git".axdevice] -path = "../crates/axdevice" -[patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] -path = "../crates/axdevice_crates/axdevice_base" -[patch."https://github.com/arceos-hypervisor/arm_vcpu.git".arm_vcpu] -path = "../crates/arm_vcpu" -[patch."https://github.com/arceos-hypervisor/arm_gicv2.git".arm_gicv2] -path = "../crates/arm_gicv2" -[patch."https://github.com/arceos-hypervisor/arm_vgic.git".arm_vgic] -path = "../crates/arm_vgic" - [profile.release] lto = true @@ -44,7 +23,7 @@ lazyinit = "0.2" timer_list = "0.1.0" # System dependent modules provided by ArceOS. -axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_inject_interrupt", features = [ +axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "debin/timer_api", features = [ "alloc", "paging", # "fs", @@ -69,7 +48,7 @@ kernel_guard = "0.1" memory_addr = "0.3" page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" -percpu = { version = "0.2.0", features = ["arm-el2"] } +percpu = { version = "0.2", features = ["arm-el2"] } axdevice = { git = "https://github.com/arceos-hypervisor/axdevice.git", branch = "inject_interrupt" } axdevice_base = { git = "https://github.com/arceos-hypervisor/axdevice_crates.git", branch = "inject_interrupt" } @@ -77,7 +56,7 @@ axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git", br [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } -axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_inject_interrupt" } +axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "debin/timer_api" } prettyplease = "0.2" quote = "1.0" syn = "2.0" From 008c509bd59fda5dce8c3431b11f4f1a1641c3a0 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 16 Apr 2025 21:37:41 +0800 Subject: [PATCH 12/62] fix Cargo.lock --- Cargo.lock | 6 ------ 1 file changed, 6 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index d8532b71..1ba14462 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1103,12 +1103,6 @@ version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "667fbdfccff4775918606516ff6ca51b898ac0842c4bc41c960a55a9832545a6" -[[package]] -name = "ns16550a" -version = "0.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "667fbdfccff4775918606516ff6ca51b898ac0842c4bc41c960a55a9832545a6" - [[package]] name = "num-traits" version = "0.2.19" From 844c4af2a12f293b4b50a4e6b2f5722c5c880921 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 16 Apr 2025 23:54:57 +0800 Subject: [PATCH 13/62] update hal impl --- src/hal.rs | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/hal.rs b/src/hal.rs index 43d9e38c..0fe28d9e 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -237,3 +237,25 @@ mod vmm_api_impl { // vmm::timer::notify_timer_expired(vm_id, vcpu_id); } } + +#[axvisor_api::api_mod_impl(axvisor_api::arch)] +mod arch_api_impl { + + #[cfg(target_arch = "aarch64")] + extern fn hardware_inject_virtual_interrupt(irq: axvisor_api::vmm::InterruptVector) { + use axstd::os::arceos::modules::axhal; + axhal::irq::inject_interrupt(irq as usize); + } + + #[cfg(target_arch = "aarch64")] + extern fn read_vgicd_typer() -> u32 { + use axstd::os::arceos::modules::axhal::irq::MyVgic; + MyVgic::get_gicd().lock().get_typer() + } + + #[cfg(target_arch = "aarch64")] + extern fn read_vgicd_iidr() -> u32 { + use axstd::os::arceos::modules::axhal::irq::MyVgic; + MyVgic::get_gicd().lock().get_iidr() + } +} From 9534ac622a1609bcb3009df823d2d6e21018aba3 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Thu, 17 Apr 2025 21:29:02 +0800 Subject: [PATCH 14/62] temporary workaround for aarch64 tick rate --- configs/defconfig.toml | 4 +++- configs/vms/nimbos-aarch64.toml | 4 ++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/configs/defconfig.toml b/configs/defconfig.toml index 49e07b8a..bd61d89c 100644 --- a/configs/defconfig.toml +++ b/configs/defconfig.toml @@ -3,7 +3,9 @@ task-stack-size = 0x40000 # uint # Number of timer ticks per second (Hz). A timer tick may contain several timer # interrupts. -ticks-per-sec = 100 # uint + +# WORKAROUND: To provide correct `CNTFRQ_EL0` value to the guest in aarch64. +ticks-per-sec = 1000 # uint # Number of CPUs smp = 1 # uint diff --git a/configs/vms/nimbos-aarch64.toml b/configs/vms/nimbos-aarch64.toml index df811375..3795ea84 100644 --- a/configs/vms/nimbos-aarch64.toml +++ b/configs/vms/nimbos-aarch64.toml @@ -20,9 +20,9 @@ phys_cpu_sets = [1] entry_point = 0x4008_0000 # The location of image: "memory" | "fs". # Load from file system. -image_location = "memory" +image_location = "fs" # The file path of the kernel image. -kernel_path = "/home/debin/Codes/arceos-umhv/nimbos/kernel/target/aarch64/release/nimbos.bin" +kernel_path = "nimbos-aarch64.bin" # kernel_path = "/home/debin/Codes/arm_tiny/build/arm_tiny.bin" # The load address of the kernel image. kernel_load_addr = 0x4008_0000 From 5ef1dac2adff1081e4bc771e3a7a91ca6dc372c0 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Thu, 17 Apr 2025 21:29:36 +0800 Subject: [PATCH 15/62] formatted --- src/hal.rs | 39 +++++++++++++++++++++------------------ src/main.rs | 5 ++++- src/vmm/config.rs | 3 ++- src/vmm/mock.rs | 5 ++++- src/vmm/timer.rs | 6 +++++- 5 files changed, 36 insertions(+), 22 deletions(-) diff --git a/src/hal.rs b/src/hal.rs index 0fe28d9e..13d59110 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -164,19 +164,19 @@ pub(crate) fn enable_virtualization() { mod memory_api_impl { use super::*; - extern fn alloc_frame() -> Option { + extern "C" fn alloc_frame() -> Option { ::alloc_frame() } - extern fn dealloc_frame(paddr: HostPhysAddr) { + extern "C" fn dealloc_frame(paddr: HostPhysAddr) { ::dealloc_frame(paddr) } - extern fn phys_to_virt(paddr: HostPhysAddr) -> HostVirtAddr { + extern "C" fn phys_to_virt(paddr: HostPhysAddr) -> HostVirtAddr { ::phys_to_virt(paddr) } - extern fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr { + extern "C" fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr { ::virt_to_phys(vaddr) } } @@ -186,23 +186,26 @@ mod time_api_impl { use super::*; use axvisor_api::time::{CancelToken, Nanos, Ticks, TimeValue}; - extern fn current_ticks() -> Ticks { + extern "C" fn current_ticks() -> Ticks { axhal::time::current_ticks() } - extern fn ticks_to_nanos(ticks: Ticks) -> Nanos { + extern "C" fn ticks_to_nanos(ticks: Ticks) -> Nanos { axhal::time::ticks_to_nanos(ticks) } - extern fn nanos_to_ticks(nanos: Nanos) -> Ticks { + extern "C" fn nanos_to_ticks(nanos: Nanos) -> Ticks { axhal::time::nanos_to_ticks(nanos) } - extern fn register_timer(deadline: TimeValue, handler: alloc::boxed::Box) -> CancelToken { + extern "C" fn register_timer( + deadline: TimeValue, + handler: alloc::boxed::Box, + ) -> CancelToken { vmm::timer::register_timer(deadline.as_nanos() as u64, |t| handler(t)) } - extern fn cancel_timer(token: CancelToken) { + extern "C" fn cancel_timer(token: CancelToken) { vmm::timer::cancel_timer(token) } } @@ -212,27 +215,27 @@ mod vmm_api_impl { use super::*; use axvisor_api::vmm::{InterruptVector, VCpuId, VMId}; - extern fn current_vm_id() -> usize { + extern "C" fn current_vm_id() -> usize { ::current_vm_id() } - extern fn current_vcpu_id() -> usize { + extern "C" fn current_vcpu_id() -> usize { ::current_vcpu_id() } - extern fn vcpu_num(vm_id: VMId) -> Option { + extern "C" fn vcpu_num(vm_id: VMId) -> Option { vmm::with_wm(vm_id, |vm| vm.vcpu_num()) } - extern fn active_vcpus(vm_id: VMId) -> Option { + extern "C" fn active_vcpus(vm_id: VMId) -> Option { todo!("active_vcpus") } - extern fn inject_interrupt(vm_id: VMId, vcpu_id: VCpuId, vector: InterruptVector) { + extern "C" fn inject_interrupt(vm_id: VMId, vcpu_id: VCpuId, vector: InterruptVector) { ::inject_irq_to_vcpu(vm_id, vcpu_id, vector as usize).unwrap(); } - extern fn notify_vcpu_timer_expired(vm_id: VMId, vcpu_id: VCpuId) { + extern "C" fn notify_vcpu_timer_expired(vm_id: VMId, vcpu_id: VCpuId) { todo!("notify_vcpu_timer_expired") // vmm::timer::notify_timer_expired(vm_id, vcpu_id); } @@ -242,19 +245,19 @@ mod vmm_api_impl { mod arch_api_impl { #[cfg(target_arch = "aarch64")] - extern fn hardware_inject_virtual_interrupt(irq: axvisor_api::vmm::InterruptVector) { + extern "C" fn hardware_inject_virtual_interrupt(irq: axvisor_api::vmm::InterruptVector) { use axstd::os::arceos::modules::axhal; axhal::irq::inject_interrupt(irq as usize); } #[cfg(target_arch = "aarch64")] - extern fn read_vgicd_typer() -> u32 { + extern "C" fn read_vgicd_typer() -> u32 { use axstd::os::arceos::modules::axhal::irq::MyVgic; MyVgic::get_gicd().lock().get_typer() } #[cfg(target_arch = "aarch64")] - extern fn read_vgicd_iidr() -> u32 { + extern "C" fn read_vgicd_iidr() -> u32 { use axstd::os::arceos::modules::axhal::irq::MyVgic; MyVgic::get_gicd().lock().get_iidr() } diff --git a/src/main.rs b/src/main.rs index 7a242eba..2cb3d346 100644 --- a/src/main.rs +++ b/src/main.rs @@ -1,7 +1,10 @@ #![no_std] #![no_main] -use std::{os::arceos::modules::{axhal, axtask}, println}; +use std::{ + os::arceos::modules::{axhal, axtask}, + println, +}; #[macro_use] extern crate log; diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 1ee7ec79..1841005b 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -54,7 +54,8 @@ pub fn init_guest_vms() { // schedule_next(move || { // mock_timer.tick(); // }); - }).expect("Failed to create VM"); + }) + .expect("Failed to create VM"); push_vm(vm.clone()); // Load corresponding images for VM. diff --git a/src/vmm/mock.rs b/src/vmm/mock.rs index 478b7d1a..315c3789 100644 --- a/src/vmm/mock.rs +++ b/src/vmm/mock.rs @@ -1,7 +1,10 @@ use core::cell::RefCell; use alloc::boxed::Box; -use axaddrspace::{device::{AccessWidth, DeviceAddrRange}, GuestPhysAddrRange}; +use axaddrspace::{ + GuestPhysAddrRange, + device::{AccessWidth, DeviceAddrRange}, +}; use axdevice_base::BaseDeviceOps; use cpumask::CpuMask; diff --git a/src/vmm/timer.rs b/src/vmm/timer.rs index c0be0c3b..36fd4ad2 100644 --- a/src/vmm/timer.rs +++ b/src/vmm/timer.rs @@ -56,7 +56,11 @@ where F: FnOnce(TimeValue) + Send + 'static, { info!("Registering timer..."); - info!("deadline is {:#?} = {:#?}", deadline, TimeValue::from_nanos(deadline as u64)); + info!( + "deadline is {:#?} = {:#?}", + deadline, + TimeValue::from_nanos(deadline as u64) + ); let timer_list = unsafe { TIMER_LIST.current_ref_mut_raw() }; let mut timers = timer_list.lock(); let token = TOKEN.fetch_add(1, Ordering::Release); From 634ef56c6e0b02cd0d7f03dc264c28663a3275c5 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 28 May 2025 22:47:04 +0800 Subject: [PATCH 16/62] impl `alloc_contiguous_frames` for axvisor_api --- Cargo.lock | 4 ++-- src/hal.rs | 44 +++++++++++++++++++++++++------------------- 2 files changed, 27 insertions(+), 21 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 1ba14462..7cd3d948 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -615,7 +615,7 @@ dependencies = [ [[package]] name = "axvisor_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#fc96d7cca4b8b6b0feaf28f2351b71e5ae8cbb84" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#78d0d417a4844e743cd8df1ef8b6629eab0849ba" dependencies = [ "axaddrspace", "axvisor_api_proc", @@ -626,7 +626,7 @@ dependencies = [ [[package]] name = "axvisor_api_proc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#fc96d7cca4b8b6b0feaf28f2351b71e5ae8cbb84" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#78d0d417a4844e743cd8df1ef8b6629eab0849ba" dependencies = [ "proc-macro-crate", "proc-macro2", diff --git a/src/hal.rs b/src/hal.rs index 13d59110..2c937a82 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -164,19 +164,26 @@ pub(crate) fn enable_virtualization() { mod memory_api_impl { use super::*; - extern "C" fn alloc_frame() -> Option { + extern fn alloc_frame() -> Option { ::alloc_frame() } - extern "C" fn dealloc_frame(paddr: HostPhysAddr) { + extern fn alloc_contiguous_frames(num_frames: usize, frame_align_pow2: usize) -> Option { + arceos::modules::axalloc::global_allocator() + .alloc_pages(num_frames, PAGE_SIZE_4K << frame_align_pow2) + .map(|vaddr| ::virt_to_phys(vaddr.into())) + .ok() + } + + extern fn dealloc_frame(paddr: HostPhysAddr) { ::dealloc_frame(paddr) } - extern "C" fn phys_to_virt(paddr: HostPhysAddr) -> HostVirtAddr { + extern fn phys_to_virt(paddr: HostPhysAddr) -> HostVirtAddr { ::phys_to_virt(paddr) } - extern "C" fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr { + extern fn virt_to_phys(vaddr: HostVirtAddr) -> HostPhysAddr { ::virt_to_phys(vaddr) } } @@ -186,26 +193,26 @@ mod time_api_impl { use super::*; use axvisor_api::time::{CancelToken, Nanos, Ticks, TimeValue}; - extern "C" fn current_ticks() -> Ticks { + extern fn current_ticks() -> Ticks { axhal::time::current_ticks() } - extern "C" fn ticks_to_nanos(ticks: Ticks) -> Nanos { + extern fn ticks_to_nanos(ticks: Ticks) -> Nanos { axhal::time::ticks_to_nanos(ticks) } - extern "C" fn nanos_to_ticks(nanos: Nanos) -> Ticks { + extern fn nanos_to_ticks(nanos: Nanos) -> Ticks { axhal::time::nanos_to_ticks(nanos) } - extern "C" fn register_timer( + extern fn register_timer( deadline: TimeValue, handler: alloc::boxed::Box, ) -> CancelToken { vmm::timer::register_timer(deadline.as_nanos() as u64, |t| handler(t)) } - extern "C" fn cancel_timer(token: CancelToken) { + extern fn cancel_timer(token: CancelToken) { vmm::timer::cancel_timer(token) } } @@ -215,27 +222,27 @@ mod vmm_api_impl { use super::*; use axvisor_api::vmm::{InterruptVector, VCpuId, VMId}; - extern "C" fn current_vm_id() -> usize { + extern fn current_vm_id() -> usize { ::current_vm_id() } - extern "C" fn current_vcpu_id() -> usize { + extern fn current_vcpu_id() -> usize { ::current_vcpu_id() } - extern "C" fn vcpu_num(vm_id: VMId) -> Option { + extern fn vcpu_num(vm_id: VMId) -> Option { vmm::with_wm(vm_id, |vm| vm.vcpu_num()) } - extern "C" fn active_vcpus(vm_id: VMId) -> Option { + extern fn active_vcpus(vm_id: VMId) -> Option { todo!("active_vcpus") } - extern "C" fn inject_interrupt(vm_id: VMId, vcpu_id: VCpuId, vector: InterruptVector) { + extern fn inject_interrupt(vm_id: VMId, vcpu_id: VCpuId, vector: InterruptVector) { ::inject_irq_to_vcpu(vm_id, vcpu_id, vector as usize).unwrap(); } - extern "C" fn notify_vcpu_timer_expired(vm_id: VMId, vcpu_id: VCpuId) { + extern fn notify_vcpu_timer_expired(vm_id: VMId, vcpu_id: VCpuId) { todo!("notify_vcpu_timer_expired") // vmm::timer::notify_timer_expired(vm_id, vcpu_id); } @@ -243,21 +250,20 @@ mod vmm_api_impl { #[axvisor_api::api_mod_impl(axvisor_api::arch)] mod arch_api_impl { - #[cfg(target_arch = "aarch64")] - extern "C" fn hardware_inject_virtual_interrupt(irq: axvisor_api::vmm::InterruptVector) { + extern fn hardware_inject_virtual_interrupt(irq: axvisor_api::vmm::InterruptVector) { use axstd::os::arceos::modules::axhal; axhal::irq::inject_interrupt(irq as usize); } #[cfg(target_arch = "aarch64")] - extern "C" fn read_vgicd_typer() -> u32 { + extern fn read_vgicd_typer() -> u32 { use axstd::os::arceos::modules::axhal::irq::MyVgic; MyVgic::get_gicd().lock().get_typer() } #[cfg(target_arch = "aarch64")] - extern "C" fn read_vgicd_iidr() -> u32 { + extern fn read_vgicd_iidr() -> u32 { use axstd::os::arceos::modules::axhal::irq::MyVgic; MyVgic::get_gicd().lock().get_iidr() } From 0c193a26f38c38956ba861dd1f92fa2ca0f045bf Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 28 May 2025 22:57:13 +0800 Subject: [PATCH 17/62] impl `dealloc_contiguous_frames` for axvisor_api --- .rustfmt.toml | 1 + Cargo.lock | 4 ++-- src/hal.rs | 9 ++++++++- 3 files changed, 11 insertions(+), 3 deletions(-) create mode 100644 .rustfmt.toml diff --git a/.rustfmt.toml b/.rustfmt.toml new file mode 100644 index 00000000..89ab2b7f --- /dev/null +++ b/.rustfmt.toml @@ -0,0 +1 @@ +force_explicit_abi = false \ No newline at end of file diff --git a/Cargo.lock b/Cargo.lock index 7cd3d948..77563749 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -615,7 +615,7 @@ dependencies = [ [[package]] name = "axvisor_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#78d0d417a4844e743cd8df1ef8b6629eab0849ba" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#7782e173650a761a326bd1aeb5c3ed468d86e6db" dependencies = [ "axaddrspace", "axvisor_api_proc", @@ -626,7 +626,7 @@ dependencies = [ [[package]] name = "axvisor_api_proc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#78d0d417a4844e743cd8df1ef8b6629eab0849ba" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#7782e173650a761a326bd1aeb5c3ed468d86e6db" dependencies = [ "proc-macro-crate", "proc-macro2", diff --git a/src/hal.rs b/src/hal.rs index 2c937a82..ece30cbf 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -168,7 +168,10 @@ mod memory_api_impl { ::alloc_frame() } - extern fn alloc_contiguous_frames(num_frames: usize, frame_align_pow2: usize) -> Option { + extern fn alloc_contiguous_frames( + num_frames: usize, + frame_align_pow2: usize, + ) -> Option { arceos::modules::axalloc::global_allocator() .alloc_pages(num_frames, PAGE_SIZE_4K << frame_align_pow2) .map(|vaddr| ::virt_to_phys(vaddr.into())) @@ -179,6 +182,10 @@ mod memory_api_impl { ::dealloc_frame(paddr) } + extern fn dealloc_contiguous_frames(paddr: HostPhysAddr, num_frames: usize) { + arceos::modules::axalloc::global_allocator().dealloc_pages(paddr.as_usize(), num_frames); + } + extern fn phys_to_virt(paddr: HostPhysAddr) -> HostVirtAddr { ::phys_to_virt(paddr) } From f70ce1b41f695c2c8fba62eb04379d0a91a0d59b Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Wed, 28 May 2025 23:28:48 +0800 Subject: [PATCH 18/62] [wip] improve rk3588 scripts, wip in dtb parsing --- Boot-on-rk3588.md | 29 + Makefile | 5 +- configs/vms/aio-3588jd4.dts | 13131 ++++++++++++++++++++ configs/vms/linux-rk3588-aarch64-smp.toml | 8 +- scripts/make/rk3588.mk | 19 +- 5 files changed, 13179 insertions(+), 13 deletions(-) create mode 100644 Boot-on-rk3588.md create mode 100644 configs/vms/aio-3588jd4.dts diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md new file mode 100644 index 00000000..881b5566 --- /dev/null +++ b/Boot-on-rk3588.md @@ -0,0 +1,29 @@ +## Compile AxVisor + +* compile + +```bash +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml defconfig +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml image +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp.toml image +``` + +* copy to tftp dir + +```bash +cp axvisor_aarch64-rk3588j.img /srv/tftp/axvisor +``` + +## rk3588 console + +上电，在 uboot 中 ctrl+C + +```bash +# 这是 tftp 服务器所在的主机 ip +setenv serverip 192.168.50.18 +# 这是 rk3588 所在设备的 ip (Firefly Linux 自己 DHCP 拿到的地址) +setenv ipaddr 192.168.50.8 +# 使用 tftp 加载镜像到指定内存地址并 boot +tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; +``` + diff --git a/Makefile b/Makefile index daec2baa..3dd0e426 100644 --- a/Makefile +++ b/Makefile @@ -155,7 +155,7 @@ ifeq ($(PLAT_NAME), aarch64-raspi4) include scripts/make/raspi4.mk else ifeq ($(PLAT_NAME), aarch64-bsta1000b-virt-hv) include scripts/make/bsta1000b-fada.mk -else ifeq ($(PLAT_NAME), aarch64-rk3588j-hv) +else ifeq ($(PLAT_NAME), aarch64-rk3588j) include scripts/make/rk3588.mk endif @@ -184,6 +184,9 @@ gdb: -ex 'b rust_entry' \ -ex 'disp /16i $$pc' +# Temporarily used for building image for the `aarch64-rk3588j` platform. +image: build_image + clippy: oldconfig ifeq ($(origin ARCH), command line) $(call cargo_clippy,--target $(TARGET)) diff --git a/configs/vms/aio-3588jd4.dts b/configs/vms/aio-3588jd4.dts new file mode 100644 index 00000000..e4289218 --- /dev/null +++ b/configs/vms/aio-3588jd4.dts @@ -0,0 +1,13131 @@ +/dts-v1/; + +/ { + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; + interrupt-parent = <0x01>; + #address-cells = <0x02>; + #size-cells = <0x02>; + model = "Firefly AIO-3588JD4"; + + aliases { + csi2dcphy0 = "/csi2-dcphy0"; + csi2dcphy1 = "/csi2-dcphy1"; + csi2dphy0 = "/csi2-dphy0"; + csi2dphy1 = "/csi2-dphy1"; + csi2dphy2 = "/csi2-dphy2"; + csi2dphy3 = "/csi2-dphy3"; + csi2dphy4 = "/csi2-dphy4"; + csi2dphy5 = "/csi2-dphy5"; + dsi0 = "/dsi@fde20000"; + dsi1 = "/dsi@fde30000"; + ethernet1 = "/ethernet@fe1c0000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + gpio1 = "/pinctrl/gpio@fec20000"; + gpio2 = "/pinctrl/gpio@fec30000"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpio4 = "/pinctrl/gpio@fec50000"; + i2c0 = "/i2c@fd880000"; + i2c1 = "/i2c@fea90000"; + i2c2 = "/i2c@feaa0000"; + i2c3 = "/i2c@feab0000"; + i2c4 = "/i2c@feac0000"; + i2c5 = "/i2c@fead0000"; + i2c6 = "/i2c@fec80000"; + i2c7 = "/i2c@fec90000"; + i2c8 = "/i2c@feca0000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + jpege0 = "/jpege-core@fdba0000"; + jpege1 = "/jpege-core@fdba4000"; + jpege2 = "/jpege-core@fdba8000"; + jpege3 = "/jpege-core@fdbac000"; + serial0 = "/serial@fd890000"; + serial1 = "/serial@feb40000"; + serial2 = "/serial@feb50000"; + serial3 = "/serial@feb60000"; + serial4 = "/serial@feb70000"; + serial5 = "/serial@feb80000"; + serial6 = "/serial@feb90000"; + serial7 = "/serial@feba0000"; + serial8 = "/serial@febb0000"; + serial9 = "/serial@febc0000"; + spi0 = "/spi@feb00000"; + spi1 = "/spi@feb10000"; + spi2 = "/spi@feb20000"; + spi3 = "/spi@feb30000"; + spi4 = "/spi@fecb0000"; + spi5 = "/spi@fe2b0000"; + hdcp0 = "/hdcp@fde40000"; + hdcp1 = "/hdcp@fde70000"; + pwm0 = "/pwm@fd8b0000"; + pwm1 = "/pwm@fd8b0010"; + pwm2 = "/pwm@fd8b0020"; + pwm3 = "/pwm@fd8b0030"; + pwm4 = "/pwm@febd0000"; + pwm5 = "/pwm@febd0010"; + pwm6 = "/pwm@febd0020"; + pwm7 = "/pwm@febd0030"; + pwm8 = "/pwm@febe0000"; + pwm9 = "/pwm@febe0010"; + pwm10 = "/pwm@febe0020"; + pwm11 = "/pwm@febe0030"; + pwm12 = "/pwm@febf0000"; + pwm13 = "/pwm@febf0010"; + pwm14 = "/pwm@febf0020"; + pwm15 = "/pwm@febf0030"; + dp0 = "/dp@fde50000"; + dp1 = "/dp@fde60000"; + edp0 = "/edp@fdec0000"; + edp1 = "/edp@fded0000"; + ethernet0 = "/ethernet@fe1b0000"; + hdptx0 = "/phy@fed60000"; + hdptx1 = "/phy@fed70000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + hdmi0 = "/hdmi@fde80000"; + hdmi1 = "/hdmi@fdea0000"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + usbdp0 = "/phy@fed80000"; + usbdp1 = "/phy@fed90000"; + mmc0 = "/mmc@fe2e0000"; + mmc1 = "/mmc@fe2c0000"; + mmc2 = "/mmc@fe2d0000"; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + spll { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + clock-output-names = "spll"; + phandle = <0x1f1>; + }; + + xin32k { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + clock-output-names = "xin32k"; + phandle = <0x1f2>; + }; + + xin24m { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + clock-output-names = "xin24m"; + phandle = <0x1f3>; + }; + + hclk_vo1@fd7c08ec { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x264>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x05>; + }; + + aclk_vdpu_low_pre@fd7c08b0 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1bc>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1f4>; + }; + + hclk_vo0@fd7c08dc { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x26d>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x04>; + }; + + hclk_usb@fd7c08a8 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x264>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1f5>; + }; + + hclk_nvm@fd7c087c { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x141>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x03>; + }; + + aclk_usb@fd7c08a8 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x263>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x6a>; + }; + + hclk_isp1_pre@fd7c0868 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1e1>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1f6>; + }; + + aclk_isp1_pre@fd7c0868 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1e0>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1f7>; + }; + + aclk_rkvdec0_pre@fd7c08a0 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1bc>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1f8>; + }; + + hclk_rkvdec0_pre@fd7c08a0 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1be>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1f9>; + }; + + aclk_rkvdec1_pre@fd7c08a4 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1bc>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1fa>; + }; + + hclk_rkvdec1_pre@fd7c08a4 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1be>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1fb>; + }; + + aclk_jpeg_decoder_pre@fd7c08b0 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1bc>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1fc>; + }; + + aclk_rkvenc1_pre@fd7c08c0 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1c5>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1fd>; + }; + + hclk_rkvenc1_pre@fd7c08c0 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1c4>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1fe>; + }; + + aclk_hdcp0_pre@fd7c08dc { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x26c>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x1ff>; + }; + + aclk_hdcp1_pre@fd7c08ec { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x263>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x200>; + }; + + pclk_av1_pre@fd7c0910 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1be>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x201>; + }; + + aclk_av1_pre@fd7c0910 { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + clock-names = "link"; + clocks = <0x02 0x1bc>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x202>; + }; + + hclk_sdio_pre@fd7c092c { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + clock-names = "link"; + clocks = <0x03>; + #power-domain-cells = <0x01>; + #clock-cells = <0x00>; + phandle = <0x203>; + }; + + pclk_vo0_grf@fd7c08dc { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + clocks = <0x04>; + clock-names = "link"; + #clock-cells = <0x00>; + phandle = <0x72>; + }; + + pclk_vo1_grf@fd7c08ec { + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + clocks = <0x05>; + clock-names = "link"; + #clock-cells = <0x00>; + phandle = <0x73>; + }; + + mclkin-i2s0 { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + clock-output-names = "i2s0_mclkin"; + phandle = <0x204>; + }; + + mclkin-i2s1 { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + clock-output-names = "i2s1_mclkin"; + phandle = <0x205>; + }; + + mclkin-i2s2 { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + clock-output-names = "i2s2_mclkin"; + phandle = <0x206>; + }; + + mclkin-i2s3 { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + clock-output-names = "i2s3_mclkin"; + phandle = <0x207>; + }; + + mclkout-i2s0@fd58c318 { + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + clocks = <0x02 0x39>; + #clock-cells = <0x00>; + clock-output-names = "i2s0_mclkout_to_io"; + rockchip,bit-shift = <0x00>; + rockchip,bit-set-to-disable; + rockchip,clk-ignore-unused; + phandle = <0x179>; + }; + + mclkout-i2s1@fd58c318 { + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + clock-output-names = "i2s1_mclkout_to_io"; + rockchip,bit-shift = <0x01>; + rockchip,bit-set-to-disable; + rockchip,clk-ignore-unused; + phandle = <0x208>; + }; + + mclkout-i2s1@fd58a000 { + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + clock-output-names = "i2s1m1_mclkout_to_io"; + rockchip,bit-shift = <0x06>; + rockchip,clk-ignore-unused; + phandle = <0x209>; + }; + + mclkout-i2s2@fd58c318 { + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + clocks = <0x02 0x28>; + #clock-cells = <0x00>; + clock-output-names = "i2s2_mclkout_to_io"; + rockchip,bit-shift = <0x02>; + rockchip,bit-set-to-disable; + rockchip,clk-ignore-unused; + phandle = <0x20a>; + }; + + mclkout-i2s3@fd58c318 { + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + clocks = <0x02 0x2e>; + #clock-cells = <0x00>; + clock-output-names = "i2s3_mclkout_to_io"; + rockchip,bit-shift = <0x07>; + rockchip,bit-set-to-disable; + rockchip,clk-ignore-unused; + phandle = <0x20b>; + }; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + cpu-map { + + cluster0 { + + core0 { + cpu = <0x06>; + }; + + core1 { + cpu = <0x07>; + }; + + core2 { + cpu = <0x08>; + }; + + core3 { + cpu = <0x09>; + }; + }; + + cluster1 { + + core0 { + cpu = <0x0a>; + }; + + core1 { + cpu = <0x0b>; + }; + }; + + cluster2 { + + core0 { + cpu = <0x0c>; + }; + + core1 { + cpu = <0x0d>; + }; + }; + }; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x00>; + enable-method = "psci"; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + operating-points-v2 = <0x0f>; + cpu-idle-states = <0x10>; + i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x80>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x80>; + next-level-cache = <0x11>; + #cooling-cells = <0x02>; + dynamic-power-coefficient = <0x64>; + cpu-supply = <0x12>; + mem-supply = <0x12>; + phandle = <0x06>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + operating-points-v2 = <0x0f>; + cpu-idle-states = <0x10>; + i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x80>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x80>; + next-level-cache = <0x13>; + phandle = <0x07>; + }; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x200>; + enable-method = "psci"; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + operating-points-v2 = <0x0f>; + cpu-idle-states = <0x10>; + i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x80>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x80>; + next-level-cache = <0x14>; + phandle = <0x08>; + }; + + cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x300>; + enable-method = "psci"; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + operating-points-v2 = <0x0f>; + cpu-idle-states = <0x10>; + i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x80>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x80>; + next-level-cache = <0x15>; + phandle = <0x09>; + }; + + cpu@400 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x400>; + enable-method = "psci"; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x02>; + operating-points-v2 = <0x16>; + cpu-idle-states = <0x10>; + i-cache-size = <0x10000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + d-cache-size = <0x10000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + next-level-cache = <0x17>; + #cooling-cells = <0x02>; + dynamic-power-coefficient = <0x12c>; + cpu-supply = <0x18>; + mem-supply = <0x18>; + phandle = <0x0a>; + }; + + cpu@500 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x500>; + enable-method = "psci"; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x02>; + operating-points-v2 = <0x16>; + cpu-idle-states = <0x10>; + i-cache-size = <0x10000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + d-cache-size = <0x10000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + next-level-cache = <0x19>; + phandle = <0x0b>; + }; + + cpu@600 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x600>; + enable-method = "psci"; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x03>; + operating-points-v2 = <0x1a>; + cpu-idle-states = <0x10>; + i-cache-size = <0x10000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + d-cache-size = <0x10000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + next-level-cache = <0x1b>; + #cooling-cells = <0x02>; + dynamic-power-coefficient = <0x12c>; + cpu-supply = <0x1c>; + mem-supply = <0x1c>; + phandle = <0x0c>; + }; + + cpu@700 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x700>; + enable-method = "psci"; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x03>; + operating-points-v2 = <0x1a>; + cpu-idle-states = <0x10>; + i-cache-size = <0x10000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + d-cache-size = <0x10000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + next-level-cache = <0x1d>; + phandle = <0x0d>; + }; + + idle-states { + entry-method = "psci"; + + cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x10000>; + entry-latency-us = <0x64>; + exit-latency-us = <0x78>; + min-residency-us = <0x3e8>; + phandle = <0x10>; + }; + }; + + l2-cache-l0 { + compatible = "cache"; + cache-size = <0x20000>; + cache-line-size = <0x40>; + cache-sets = <0x200>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + l2-cache-l1 { + compatible = "cache"; + cache-size = <0x20000>; + cache-line-size = <0x40>; + cache-sets = <0x200>; + next-level-cache = <0x1e>; + phandle = <0x13>; + }; + + l2-cache-l2 { + compatible = "cache"; + cache-size = <0x20000>; + cache-line-size = <0x40>; + cache-sets = <0x200>; + next-level-cache = <0x1e>; + phandle = <0x14>; + }; + + l2-cache-l3 { + compatible = "cache"; + cache-size = <0x20000>; + cache-line-size = <0x40>; + cache-sets = <0x200>; + next-level-cache = <0x1e>; + phandle = <0x15>; + }; + + l2-cache-b0 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <0x40>; + cache-sets = <0x400>; + next-level-cache = <0x1e>; + phandle = <0x17>; + }; + + l2-cache-b1 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <0x40>; + cache-sets = <0x400>; + next-level-cache = <0x1e>; + phandle = <0x19>; + }; + + l2-cache-b2 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <0x40>; + cache-sets = <0x400>; + next-level-cache = <0x1e>; + phandle = <0x1b>; + }; + + l2-cache-b3 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <0x40>; + cache-sets = <0x400>; + next-level-cache = <0x1e>; + phandle = <0x1d>; + }; + + l3-cache { + compatible = "cache"; + cache-size = <0x300000>; + cache-line-size = <0x40>; + cache-sets = <0x1000>; + phandle = <0x1e>; + }; + }; + + cluster0-opp-table { + compatible = "operating-points-v2"; + opp-shared; + nvmem-cells = <0x1f 0x20 0x21>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,supported-hw; + rockchip,opp-shared-dsu; + rockchip,pvtm-hw = <0x06>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + rockchip,pvtm-pvtpll; + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-volt = <0xb71b0>; + rockchip,pvtm-ref-temp = <0x19>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,grf = <0x22>; + rockchip,dsu-grf = <0x23>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + low-volt-mem-read-margin = <0x04>; + intermediate-threshold-freq = <0xf6180>; + rockchip,reboot-freq = <0x159b40>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,low-temp = <0x2710>; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,high-temp = <0x14c08>; + rockchip,high-temp-max-freq = <0x188940>; + phandle = <0x0f>; + + opp-408000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x18519600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-1200000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x54667200>; + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-suspend; + }; + + opp-1608000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x5fd82200>; + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x6b49d200>; + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x18519600>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-600000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-1296000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x54667200>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-suspend; + }; + + opp-j-m-1608000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x5fd82200>; + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x6590fa00>; + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + }; + + cluster1-opp-table { + compatible = "operating-points-v2"; + opp-shared; + nvmem-cells = <0x24 0x25 0x21>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,supported-hw; + rockchip,pvtm-hw = <0x06>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + rockchip,pvtm-pvtpll; + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-volt = <0xb71b0>; + rockchip,pvtm-ref-temp = <0x19>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,grf = <0x26>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + low-volt-mem-read-margin = <0x04>; + intermediate-threshold-freq = <0xf6180>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,reboot-freq = <0x1b7740>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,low-temp = <0x2710>; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,high-temp = <0x14c08>; + rockchip,high-temp-max-freq = <0x21b100>; + phandle = <0x16>; + + opp-408000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x18519600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-suspend; + }; + + opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1200000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x54667200>; + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x5fd82200>; + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x6b49d200>; + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x7829b800>; + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x839b6800>; + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-supported-hw = <0xf9 0x13>; + opp-hz = <0x00 0x8677d400>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-supported-hw = <0xf9 0x24>; + opp-hz = <0x00 0x89544000>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2352000000 { + opp-supported-hw = <0xf9 0x48>; + opp-hz = <0x00 0x8c30ac00>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-supported-hw = <0xf9 0x80>; + opp-hz = <0x00 0x8f0d1800>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x18519600>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-600000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x54667200>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-suspend; + }; + + opp-j-m-1608000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x5fd82200>; + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x6b49d200>; + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-2016000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x7829b800>; + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + }; + + cluster2-opp-table { + compatible = "operating-points-v2"; + opp-shared; + nvmem-cells = <0x27 0x28 0x21>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,supported-hw; + rockchip,pvtm-hw = <0x06>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + rockchip,pvtm-pvtpll; + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-volt = <0xb71b0>; + rockchip,pvtm-ref-temp = <0x19>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,grf = <0x29>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + low-volt-mem-read-margin = <0x04>; + intermediate-threshold-freq = <0xf6180>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,reboot-freq = <0x1b7740>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,low-temp = <0x2710>; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,high-temp = <0x14c08>; + rockchip,high-temp-max-freq = <0x21b100>; + phandle = <0x1a>; + + opp-408000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x18519600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-suspend; + }; + + opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1200000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x54667200>; + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x5fd82200>; + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x6b49d200>; + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x7829b800>; + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x839b6800>; + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-supported-hw = <0xf9 0x13>; + opp-hz = <0x00 0x8677d400>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-supported-hw = <0xf9 0x24>; + opp-hz = <0x00 0x89544000>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2352000000 { + opp-supported-hw = <0xf9 0x48>; + opp-hz = <0x00 0x8c30ac00>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-supported-hw = <0xf9 0x80>; + opp-hz = <0x00 0x8f0d1800>; + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x18519600>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-600000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x54667200>; + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-suspend; + }; + + opp-j-m-1608000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x5fd82200>; + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x6b49d200>; + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-2016000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x7829b800>; + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + }; + + arm-pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x01 0x07 0x08>; + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + phandle = <0x20c>; + }; + + cpuinfo { + compatible = "rockchip,cpuinfo"; + nvmem-cells = <0x2a 0x2b 0x2c>; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; + + csi2-dcphy0 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x20d>; + }; + + csi2-dcphy1 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x20e>; + }; + + csi2-dphy0 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "okay"; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x31>; + data-lanes = <0x01 0x02 0x03 0x04>; + phandle = <0x183>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x32>; + data-lanes = <0x01 0x02 0x03 0x04>; + phandle = <0x184>; + }; + }; + + port@1 { + reg = <0x01>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x33>; + phandle = <0x4d>; + }; + }; + }; + }; + + csi2-dphy1 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x210>; + }; + + csi2-dphy2 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x211>; + }; + + csi2-dphy3 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x212>; + }; + + csi2-dphy4 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x213>; + }; + + csi2-dphy5 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <0x2d 0x2e>; + phys = <0x2f 0x30>; + phy-names = "dcphy0\0dcphy1"; + status = "disabled"; + phandle = <0x214>; + }; + + display-subsystem { + compatible = "rockchip,display-subsystem"; + ports = <0x34>; + clocks = <0x35 0x36>; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + memory-region = <0x37>; + memory-region-names = "drm-logo"; + phandle = <0x215>; + + route { + + route-dp0 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x38>; + phandle = <0x216>; + }; + + route-dsi0 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x39>; + phandle = <0x217>; + }; + + route-dsi1 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x3a>; + phandle = <0x218>; + }; + + route-edp0 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x3b>; + phandle = <0x219>; + }; + + route-edp1 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + phandle = <0x21a>; + }; + + route-hdmi0 { + status = "okay"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x3c>; + phandle = <0x21b>; + }; + + route-rgb { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x3d>; + phandle = <0x21c>; + }; + + route-dp1 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x3e>; + phandle = <0x21d>; + }; + + route-hdmi1 { + status = "disabled"; + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <0x3f>; + phandle = <0x21e>; + }; + }; + }; + + dmc { + compatible = "rockchip,rk3588-dmc"; + interrupts = <0x00 0x49 0x04>; + interrupt-names = "complete"; + devfreq-events = <0x40>; + clocks = <0x0e 0x04>; + clock-names = "dmc_clk"; + operating-points-v2 = <0x41>; + upthreshold = <0x28>; + downdifferential = <0x14>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + status = "disabled"; + center-supply = <0x42>; + mem-supply = <0x43>; + phandle = <0x21f>; + }; + + dmc-opp-table { + compatible = "operating-points-v2"; + nvmem-cells = <0x44 0x45 0x21>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,supported-hw; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,low-temp = <0x2710>; + rockchip,low-temp-min-volt = <0xb71b0>; + phandle = <0x41>; + + opp-528000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x1f78a400>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + }; + + opp-1068000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x3fa86300>; + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + }; + + opp-1560000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x5cfbb600>; + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-2750000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0xa3e9ab80>; + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x1f78a400>; + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x3fa86300>; + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x5cfbb600>; + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0xa3e9ab80>; + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + }; + + firmware { + + scmi { + compatible = "arm,scmi-smc"; + shmem = <0x46>; + arm,smc-id = <0x82000010>; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x220>; + + protocol@14 { + reg = <0x14>; + #clock-cells = <0x01>; + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + phandle = <0x0e>; + }; + + protocol@16 { + reg = <0x16>; + #reset-cells = <0x01>; + phandle = <0x11a>; + }; + }; + + sdei { + compatible = "arm,sdei-1.0"; + method = "smc"; + phandle = <0x221>; + }; + + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + phandle = <0x222>; + }; + }; + + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; + + mipi-dcphy-dummy { + phandle = <0x223>; + }; + + mipi0-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + status = "disabled"; + phandle = <0x224>; + }; + + mipi1-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + status = "disabled"; + phandle = <0x225>; + }; + + mipi2-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + status = "okay"; + firefly-compatible; + phandle = <0x226>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x4d>; + phandle = <0x33>; + }; + }; + + port@1 { + reg = <0x01>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x4e>; + phandle = <0x54>; + }; + }; + }; + }; + + mipi3-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + status = "disabled"; + phandle = <0x227>; + }; + + mipi4-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + status = "disabled"; + phandle = <0x228>; + }; + + mipi5-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + status = "disabled"; + phandle = <0x229>; + }; + + mpp-srv { + compatible = "rockchip,mpp-service"; + rockchip,taskqueue-count = <0x0c>; + rockchip,resetgroup-count = <0x01>; + status = "okay"; + phandle = <0xb8>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + rkcif-dvp { + compatible = "rockchip,rkcif-dvp"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "disabled"; + phandle = <0x51>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x51>; + status = "disabled"; + phandle = <0x22a>; + }; + + rkcif-mipi-lvds { + compatible = "rockchip,rkcif-mipi-lvds"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "disabled"; + phandle = <0x52>; + }; + + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x52>; + status = "disabled"; + phandle = <0x22b>; + }; + + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x52>; + status = "disabled"; + phandle = <0x22c>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x52>; + status = "disabled"; + phandle = <0x22d>; + }; + + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x52>; + status = "disabled"; + phandle = <0x22e>; + }; + + rkcif-mipi-lvds1 { + compatible = "rockchip,rkcif-mipi-lvds"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "disabled"; + phandle = <0x53>; + }; + + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x53>; + status = "disabled"; + phandle = <0x22f>; + }; + + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x53>; + status = "disabled"; + phandle = <0x230>; + }; + + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x53>; + status = "disabled"; + phandle = <0x231>; + }; + + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x53>; + status = "disabled"; + phandle = <0x232>; + }; + + rkcif-mipi-lvds2 { + compatible = "rockchip,rkcif-mipi-lvds"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "okay"; + phandle = <0x55>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; + }; + }; + }; + + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x55>; + status = "okay"; + phandle = <0x233>; + + port { + + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; + }; + }; + }; + + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x55>; + status = "disabled"; + phandle = <0x234>; + }; + + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x55>; + status = "disabled"; + phandle = <0x235>; + }; + + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x55>; + status = "disabled"; + phandle = <0x236>; + }; + + rkcif-mipi-lvds3 { + compatible = "rockchip,rkcif-mipi-lvds"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "disabled"; + phandle = <0x57>; + }; + + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x57>; + status = "disabled"; + phandle = <0x237>; + }; + + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x57>; + status = "disabled"; + phandle = <0x238>; + }; + + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x57>; + status = "disabled"; + phandle = <0x239>; + }; + + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x57>; + status = "disabled"; + phandle = <0x23a>; + }; + + rkisp0-vir0 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x58>; + status = "disabled"; + phandle = <0x23b>; + }; + + rkisp0-vir1 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x58>; + status = "disabled"; + phandle = <0x23c>; + }; + + rkisp0-vir2 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x58>; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x59>; + phandle = <0x56>; + }; + }; + }; + + rkisp0-vir3 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x58>; + status = "disabled"; + phandle = <0x23e>; + }; + + rkisp1-vir0 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x5a>; + status = "disabled"; + phandle = <0x23f>; + }; + + rkisp1-vir1 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x5a>; + status = "disabled"; + phandle = <0x240>; + }; + + rkisp1-vir2 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x5a>; + status = "disabled"; + phandle = <0x241>; + }; + + rkisp1-vir3 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <0x5a>; + status = "disabled"; + phandle = <0x242>; + }; + + rkispp0-vir0 { + compatible = "rockchip,rk3588-rkispp-vir"; + rockchip,hw = <0x5b>; + status = "disabled"; + phandle = <0x243>; + }; + + rkispp1-vir0 { + compatible = "rockchip,rk3588-rkispp-vir"; + rockchip,hw = <0x5c>; + status = "disabled"; + phandle = <0x244>; + }; + + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; + status = "okay"; + phandle = <0xc3>; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + rockchip-suspend { + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; + + rockchip-system-monitor { + compatible = "rockchip,system-monitor"; + rockchip,thermal-zone = "soc-thermal"; + phandle = <0x247>; + }; + + thermal-zones { + phandle = <0x248>; + + soc-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + sustainable-power = <0x834>; + thermal-sensors = <0x5d 0x00>; + phandle = <0x249>; + + trips { + + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; + + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; + + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; + }; + + cooling-maps { + + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map1 { + trip = <0x5e>; + cooling-device = <0x0a 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map2 { + trip = <0x5e>; + cooling-device = <0x0c 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + }; + }; + + bigcore0-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; + }; + + bigcore1-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; + }; + + littlecore-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; + + center-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; + + gpu-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; + + npu-thermal { + polling-delay-passive = <0x14>; + polling-delay = <0x3e8>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + }; + + sram@10f000 { + compatible = "mmio-sram"; + reg = <0x00 0x10f000 0x00 0x100>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x00 0x00 0x10f000 0x100>; + + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; + }; + + gpu@fb000000 { + compatible = "arm,mali-bifrost"; + reg = <0x00 0xfb000000 0x00 0x200000>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + interrupt-names = "GPU\0MMU\0JOB"; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + power-domains = <0x60 0x0c>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + dynamic-power-coefficient = <0xba6>; + upthreshold = <0x1e>; + downdifferential = <0x0a>; + status = "okay"; + mali-supply = <0x62>; + mem-supply = <0x62>; + phandle = <0x5f>; + }; + + gpu-opp-table { + compatible = "operating-points-v2"; + nvmem-cells = <0x63 0x64 0x21>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,supported-hw; + rockchip,pvtm-hw = <0x04>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + rockchip,pvtm-pvtpll; + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-volt = <0xb71b0>; + rockchip,pvtm-ref-temp = <0x19>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,grf = <0x65>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + low-volt-mem-read-margin = <0x04>; + intermediate-threshold-freq = <0x61a80>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,low-temp = <0x2710>; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,high-temp = <0x14c08>; + rockchip,high-temp-max-freq = "\0\f5"; + phandle = <0x61>; + + opp-300000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x11e1a300>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-400000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x17d78400>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-500000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x1dcd6500>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-700000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x29b92700>; + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-800000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + }; + + opp-900000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x35a4e900>; + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + + opp-1000000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x3b9aca00>; + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x11e1a300>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-400000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x17d78400>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-500000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x1dcd6500>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-600000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-700000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x29b92700>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-850000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = <0x00 0x32a9f880>; + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-m-800000000 { + opp-supported-hw = <0x02 0xffff>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-m-900000000 { + opp-supported-hw = <0x02 0xffff>; + opp-hz = <0x00 0x35a4e900>; + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-m-1000000000 { + opp-supported-hw = <0x02 0xffff>; + opp-hz = <0x00 0x3b9aca00>; + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + }; + + usbdrd3_0 { + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + clock-names = "ref\0suspend\0bus"; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + compatible = "snps,dwc3"; + reg = <0x00 0xfc000000 0x00 0x400000>; + interrupts = <0x00 0xdc 0x04>; + power-domains = <0x60 0x1f>; + resets = <0x02 0x2a4>; + reset-names = "usb3-otg"; + dr_mode = "host"; + phys = <0x66 0x67>; + phy-names = "usb2-phy\0usb3-phy"; + phy_type = "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + quirk-skip-phy-init; + status = "okay"; + usb-role-switch; + phandle = <0x253>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x68>; + phandle = <0x17d>; + }; + }; + }; + }; + + usb@fc800000 { + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + reg = <0x00 0xfc800000 0x00 0x40000>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + phys = <0x6c>; + phy-names = "usb2-phy"; + power-domains = <0x60 0x1f>; + status = "okay"; + phandle = <0x254>; + }; + + usb@fc840000 { + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + reg = <0x00 0xfc840000 0x00 0x40000>; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + phys = <0x6c>; + phy-names = "usb2-phy"; + power-domains = <0x60 0x1f>; + status = "okay"; + phandle = <0x6b>; + }; + + usb@fc880000 { + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + reg = <0x00 0xfc880000 0x00 0x40000>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + phys = <0x6f>; + phy-names = "usb2-phy"; + power-domains = <0x60 0x1f>; + status = "okay"; + phandle = <0x255>; + }; + + usb@fc8c0000 { + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + phys = <0x6f>; + phy-names = "usb2-phy"; + power-domains = <0x60 0x1f>; + status = "okay"; + phandle = <0x6e>; + }; + + iommu@fc900000 { + compatible = "arm,smmu-v3"; + reg = <0x00 0xfc900000 0x00 0x200000>; + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + #iommu-cells = <0x01>; + status = "disabled"; + phandle = <0x256>; + }; + + iommu@fcb00000 { + compatible = "arm,smmu-v3"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + #iommu-cells = <0x01>; + status = "disabled"; + phandle = <0x257>; + }; + + usbhost3_0 { + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + status = "disabled"; + phandle = <0x258>; + + usb@fcd00000 { + compatible = "snps,dwc3"; + reg = <0x00 0xfcd00000 0x00 0x400000>; + interrupts = <0x00 0xde 0x04>; + resets = <0x02 0x237>; + reset-names = "usb3-host"; + dr_mode = "host"; + phys = <0x70 0x04>; + phy-names = "usb3-phy"; + phy_type = "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + status = "disabled"; + phandle = <0x259>; + }; + }; + + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x80>; + mode-bootloader = <0x5242c301>; + mode-charge = <0x5242c30b>; + mode-fastboot = <0x5242c309>; + mode-loader = <0x5242c301>; + mode-normal = <0x5242c300>; + mode-recovery = <0x5242c303>; + mode-ums = <0x5242c30c>; + mode-panic = <0x5242c307>; + mode-watchdog = <0x5242c308>; + mode-quiescent = <0x5242c30e>; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + }; + }; + + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + + rgb { + compatible = "rockchip,rk3588-rgb"; + pinctrl-names = "default"; + pinctrl-0 = <0x71>; + status = "disabled"; + phandle = <0x25c>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0x3d>; + status = "disabled"; + phandle = <0xf0>; + }; + }; + }; + }; + }; + + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; + + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; + }; + + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; + + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; + + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; + + syscon@fd5a6000 { + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + clocks = <0x72>; + phandle = <0xf5>; + }; + + syscon@fd5a8000 { + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + clocks = <0x73>; + phandle = <0xd8>; + }; + + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; + + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; + + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; + + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; + + syscon@fd5d0000 { + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + phandle = <0x18b>; + + usb2-phy@0 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x00 0x10>; + interrupts = <0x00 0x189 0x04>; + resets = <0x02 0xc0047 0x02 0x488>; + reset-names = "phy\0apb"; + clocks = <0x02 0x2b5>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy0"; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + status = "okay"; + phandle = <0x18d>; + + otg-port { + #phy-cells = <0x00>; + status = "okay"; + rockchip,typec-vbus-det; + phandle = <0x66>; + }; + }; + }; + + syscon@fd5d8000 { + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + phandle = <0x25d>; + + usb2-phy@8000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x8000 0x10>; + interrupts = <0x00 0x187 0x04>; + resets = <0x02 0xc0049 0x02 0x48a>; + reset-names = "phy\0apb"; + clocks = <0x02 0x2b5>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy2"; + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x69>; + + host-port { + #phy-cells = <0x00>; + status = "okay"; + phy-supply = <0x75>; + phandle = <0x6c>; + }; + }; + }; + + syscon@fd5dc000 { + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + phandle = <0x25e>; + + usb2-phy@c000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0xc000 0x10>; + interrupts = <0x00 0x188 0x04>; + resets = <0x02 0xc004a 0x02 0x48b>; + reset-names = "phy\0apb"; + clocks = <0x02 0x2b5>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy3"; + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x6d>; + + host-port { + #phy-cells = <0x00>; + status = "okay"; + phy-supply = <0x75>; + phandle = <0x6f>; + }; + }; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; + + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; + }; + + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; + + clock-controller@fd7c0000 { + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + phandle = <0x02>; + }; + + i2c@fd880000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfd880000 0x00 0x1000>; + clocks = <0x02 0x287 0x02 0x286>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x13d 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x77>; + resets = <0x02 0xc0022 0x02 0xc0021>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + phandle = <0x25f>; + + rk8602@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_cpu_big0_s0"; + regulator-min-microvolt = <0x86470>; + regulator-max-microvolt = <0x100590>; + regulator-ramp-delay = <0x8fc>; + rockchip,suspend-voltage-selector = <0x01>; + regulator-boot-on; + regulator-always-on; + phandle = <0x18>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk8603@43 { + compatible = "rockchip,rk8603"; + reg = <0x43>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_cpu_big1_s0"; + regulator-min-microvolt = <0x86470>; + regulator-max-microvolt = <0x100590>; + regulator-ramp-delay = <0x8fc>; + rockchip,suspend-voltage-selector = <0x01>; + regulator-boot-on; + regulator-always-on; + phandle = <0x1c>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pc9202@3c { + status = "okay"; + compatible = "firefly,pc9202"; + reg = <0x3c>; + index = <0x00>; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + }; + + hym8563@51 { + status = "okay"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <0x7a>; + interrupt-parent = <0x7b>; + interrupts = <0x08 0x08>; + wakeup-source; + phandle = <0x1e4>; + }; + }; + + serial@fd890000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfd890000 0x00 0x100>; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0x7c 0x06 0x7c 0x07>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + status = "disabled"; + phandle = <0x260>; + }; + + pwm@fd8b0000 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + interrupts = <0x00 0x158 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x261>; + }; + + pwm@fd8b0010 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + interrupts = <0x00 0x158 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x262>; + }; + + pwm@fd8b0020 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + interrupts = <0x00 0x158 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x263>; + }; + + pwm@fd8b0030 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x264>; + }; + + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; + + power-controller { + compatible = "rockchip,rk3588-power-controller"; + #power-domain-cells = <0x01>; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + phandle = <0x60>; + + power-domain@8 { + reg = <0x08>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + power-domain@9 { + reg = <0x09>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + pm_qos = <0x82 0x83 0x84>; + + power-domain@10 { + reg = <0x0a>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + pm_qos = <0x85>; + }; + + power-domain@11 { + reg = <0x0b>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + pm_qos = <0x86>; + }; + }; + }; + + power-domain@12 { + reg = <0x0c>; + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + pm_qos = <0x87 0x88 0x89 0x8a>; + }; + + power-domain@13 { + reg = <0x0d>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + power-domain@14 { + reg = <0x0e>; + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + pm_qos = <0x8b>; + }; + + power-domain@15 { + reg = <0x0f>; + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + pm_qos = <0x8c>; + }; + + power-domain@16 { + reg = <0x10>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + pm_qos = <0x8d 0x8e 0x8f>; + + power-domain@17 { + reg = <0x11>; + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + pm_qos = <0x90 0x91 0x92>; + }; + }; + }; + + power-domain@21 { + reg = <0x15>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + + power-domain@23 { + reg = <0x17>; + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + pm_qos = <0x9b>; + }; + + power-domain@14 { + reg = <0x0e>; + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + pm_qos = <0x8b>; + }; + + power-domain@15 { + reg = <0x0f>; + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + pm_qos = <0x8c>; + }; + + power-domain@22 { + reg = <0x16>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + pm_qos = <0x9c>; + }; + }; + + power-domain@24 { + reg = <0x18>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + pm_qos = <0x9d 0x9e>; + + power-domain@25 { + reg = <0x19>; + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + pm_qos = <0x9f>; + }; + }; + + power-domain@26 { + reg = <0x1a>; + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + pm_qos = <0xa0 0xa1>; + }; + + power-domain@27 { + reg = <0x1b>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; + + power-domain@28 { + reg = <0x1c>; + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + pm_qos = <0xa6 0xa7>; + }; + + power-domain@29 { + reg = <0x1d>; + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + pm_qos = <0xa8 0xa9>; + }; + }; + + power-domain@30 { + reg = <0x1e>; + clocks = <0x02 0x189 0x02 0x18a>; + pm_qos = <0xaa>; + }; + + power-domain@31 { + reg = <0x1f>; + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + pm_qos = <0xab 0xac 0xad 0xae>; + }; + + power-domain@33 { + reg = <0x21>; + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + }; + + power-domain@34 { + reg = <0x22>; + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + }; + + power-domain@37 { + reg = <0x25>; + clocks = <0x02 0x199 0x02 0x140>; + pm_qos = <0xaf>; + }; + + power-domain@38 { + reg = <0x26>; + clocks = <0x02 0x3c 0x02 0x3d>; + }; + + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; + }; + }; + }; + + pvtm@fda40000 { + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + pvtm@0 { + reg = <0x00>; + clocks = <0x02 0x2c6 0x02 0x15>; + clock-names = "clk\0pclk"; + }; + }; + + pvtm@fda50000 { + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + pvtm@1 { + reg = <0x01>; + clocks = <0x02 0x2c8 0x02 0x17>; + clock-names = "clk\0pclk"; + }; + }; + + pvtm@fda60000 { + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + pvtm@2 { + reg = <0x02>; + clocks = <0x02 0x2ca 0x02 0x1b>; + clock-names = "clk\0pclk"; + }; + }; + + pvtm@fdaf0000 { + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + pvtm@3 { + reg = <0x03>; + clocks = <0x02 0x12b 0x02 0x129>; + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + reset-names = "rts\0rst-p"; + }; + }; + + pvtm@fdb30000 { + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + pvtm@4 { + reg = <0x04>; + clocks = <0x02 0x118>; + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + reset-names = "rts\0rst-p"; + }; + }; + + npu@fdab0000 { + compatible = "rockchip,rk3588-rknpu"; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + power-domain-names = "npu0\0npu1\0npu2"; + operating-points-v2 = <0xb1>; + iommus = <0xb2>; + status = "okay"; + rknpu-supply = <0xb3>; + mem-supply = <0xb3>; + phandle = <0x265>; + }; + + npu-opp-table { + compatible = "operating-points-v2"; + nvmem-cells = <0xb4 0xb5 0x21>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,supported-hw; + rockchip,pvtm-hw = <0x06>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + rockchip,pvtm-pvtpll; + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-volt = <0xb71b0>; + rockchip,pvtm-ref-temp = <0x19>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,grf = <0xb6>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + low-volt-mem-read-margin = <0x04>; + intermediate-threshold-freq = <0x7a120>; + rockchip,init-freq = <0xf4240>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,low-temp = <0x2710>; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,high-temp = <0x14c08>; + rockchip,high-temp-max-freq = "\0\f5"; + phandle = <0xb1>; + + opp-300000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x11e1a300>; + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-400000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x17d78400>; + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-500000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x1dcd6500>; + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-700000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x29b92700>; + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-800000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + }; + + opp-900000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x35a4e900>; + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + + opp-1000000000 { + opp-supported-hw = <0xf9 0xffff>; + opp-hz = <0x00 0x3b9aca00>; + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x11e1a300>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-400000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x17d78400>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-500000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x1dcd6500>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-600000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x23c34600>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-700000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x29b92700>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-800000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + + opp-j-m-950000000 { + opp-supported-hw = <0x06 0xffff>; + opp-hz = <0x00 0x389fd980>; + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + }; + + iommu@fdab9000 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xb2>; + }; + + vepu@fdb50000 { + compatible = "rockchip,vpu-encoder-v2"; + reg = <0x00 0xfdb50000 0x00 0x400>; + interrupts = <0x00 0x78 0x04>; + interrupt-names = "irq_vepu"; + clocks = <0x02 0x1c0 0x02 0x1c1>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1c0>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + reset-names = "shared_video_a\0shared_video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xb7>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,resetgroup-node = <0x00>; + power-domains = <0x60 0x15>; + status = "disabled"; + phandle = <0x266>; + }; + + vdpu@fdb50400 { + compatible = "rockchip,vpu-decoder-v2"; + reg = <0x00 0xfdb50400 0x00 0x400>; + interrupts = <0x00 0x77 0x04>; + interrupt-names = "irq_vdpu"; + clocks = <0x02 0x1c0 0x02 0x1c1>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1c0>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + reset-names = "shared_video_a\0shared_video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xb7>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,resetgroup-node = <0x00>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x267>; + }; + + iommu@fdb50800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdb50800 0x00 0x40>; + interrupts = <0x00 0x76 0x04>; + interrupt-names = "irq_vdpu_mmu"; + clocks = <0x02 0x1c0 0x02 0x1c1>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x15>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xb7>; + }; + + avsd-plus@fdb51000 { + compatible = "rockchip,avs-plus-decoder"; + reg = <0x00 0xfdb51000 0x00 0x200>; + interrupts = <0x00 0x77 0x04>; + interrupt-names = "irq_avsd"; + clocks = <0x02 0x1c0 0x02 0x1c1>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1c0>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + reset-names = "shared_video_a\0shared_video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xb7>; + power-domains = <0x60 0x15>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + phandle = <0x268>; + }; + + rga@fdb60000 { + compatible = "rockchip,rga3_core0"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + interrupts = <0x00 0x72 0x04>; + interrupt-names = "rga3_core0_irq"; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + power-domains = <0x60 0x16>; + iommus = <0xb9>; + status = "okay"; + phandle = <0x269>; + }; + + iommu@fdb60f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + interrupts = <0x00 0x72 0x04>; + interrupt-names = "rga3_0_mmu"; + clocks = <0x02 0x1ba 0x02 0x1b9>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x16>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xb9>; + }; + + rga@fdb70000 { + compatible = "rockchip,rga3_core1"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + interrupts = <0x00 0x73 0x04>; + interrupt-names = "rga3_core1_irq"; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + power-domains = <0x60 0x1e>; + iommus = <0xba>; + status = "okay"; + phandle = <0x26a>; + }; + + iommu@fdb70f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + interrupts = <0x00 0x73 0x04>; + interrupt-names = "rga3_1_mmu"; + clocks = <0x02 0x18a 0x02 0x189>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x1e>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xba>; + }; + + rga@fdb80000 { + compatible = "rockchip,rga2_core0"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + interrupts = <0x00 0x74 0x04>; + interrupt-names = "rga2_irq"; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x26b>; + }; + + jpegd@fdb90000 { + compatible = "rockchip,rkv-jpeg-decoder-v1"; + reg = <0x00 0xfdb90000 0x00 0x400>; + interrupts = <0x00 0x81 0x04>; + interrupt-names = "irq_jpegd"; + clocks = <0x02 0x1b4 0x02 0x1b5>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clocks = <0x02 0x1b4>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + reset-names = "video_a\0video_h"; + rockchip,skip-pmu-idle-request; + iommus = <0xbb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x26c>; + }; + + iommu@fdb90480 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdb90480 0x00 0x40>; + interrupts = <0x00 0x82 0x04>; + interrupt-names = "irq_jpegd_mmu"; + clocks = <0x02 0x1b4 0x02 0x1b5>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x15>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xbb>; + }; + + jpege-core@fdba0000 { + compatible = "rockchip,vpu-jpege-core"; + reg = <0x00 0xfdba0000 0x00 0x400>; + interrupts = <0x00 0x7a 0x04>; + interrupt-names = "irq_jpege0"; + clocks = <0x02 0x1ac 0x02 0x1ad>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1ac>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + reset-names = "video_a\0video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xbc>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,ccu = <0xbd>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x26d>; + }; + + iommu@fdba0800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdba0800 0x00 0x40>; + interrupts = <0x00 0x79 0x04>; + interrupt-names = "irq_jpege0_mmu"; + clocks = <0x02 0x1ac 0x02 0x1ad>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x15>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xbc>; + }; + + jpege-core@fdba4000 { + compatible = "rockchip,vpu-jpege-core"; + reg = <0x00 0xfdba4000 0x00 0x400>; + interrupts = <0x00 0x7c 0x04>; + interrupt-names = "irq_jpege1"; + clocks = <0x02 0x1ae 0x02 0x1af>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1ae>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + reset-names = "video_a\0video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xbe>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,ccu = <0xbd>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x26e>; + }; + + iommu@fdba4800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdba4800 0x00 0x40>; + interrupts = <0x00 0x7b 0x04>; + interrupt-names = "irq_jpege1_mmu"; + clocks = <0x02 0x1ae 0x02 0x1af>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x15>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xbe>; + }; + + jpege-core@fdba8000 { + compatible = "rockchip,vpu-jpege-core"; + reg = <0x00 0xfdba8000 0x00 0x400>; + interrupts = <0x00 0x7e 0x04>; + interrupt-names = "irq_jpege2"; + clocks = <0x02 0x1b0 0x02 0x1b1>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1b0>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + reset-names = "video_a\0video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xbf>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,ccu = <0xbd>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x26f>; + }; + + iommu@fdba8800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdba8800 0x00 0x40>; + interrupts = <0x00 0x7d 0x04>; + interrupt-names = "irq_jpege2_mmu"; + clocks = <0x02 0x1b0 0x02 0x1b1>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x15>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xbf>; + }; + + jpege-core@fdbac000 { + compatible = "rockchip,vpu-jpege-core"; + reg = <0x00 0xfdbac000 0x00 0x400>; + interrupts = <0x00 0x80 0x04>; + interrupt-names = "irq_jpege3"; + clocks = <0x02 0x1b2 0x02 0x1b3>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1b2>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + reset-names = "video_a\0video_h"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + iommus = <0xc0>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,ccu = <0xbd>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0x270>; + }; + + iommu@fdbac800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdbac800 0x00 0x40>; + interrupts = <0x00 0x7f 0x04>; + interrupt-names = "irq_jpege3_mmu"; + clocks = <0x02 0x1b2 0x02 0x1b3>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x15>; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0xc0>; + }; + + iep@fdbb0000 { + compatible = "rockchip,iep-v2"; + reg = <0x00 0xfdbb0000 0x00 0x500>; + interrupts = <0x00 0x75 0x04>; + interrupt-names = "irq_iep"; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + clock-names = "aclk\0hclk\0sclk"; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clocks = <0x02 0x1aa>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + reset-names = "rst_a\0rst_h\0rst_s"; + rockchip,skip-pmu-idle-request; + rockchip,disable-auto-freq; + power-domains = <0x60 0x15>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + iommus = <0xc1>; + status = "okay"; + phandle = <0x271>; + }; + + iommu@fdbb0800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + interrupts = <0x00 0x75 0x04>; + interrupt-names = "irq_iep_mmu"; + clocks = <0x02 0x1aa 0x02 0x1a9>; + clock-names = "aclk\0iface"; + #iommu-cells = <0x00>; + power-domains = <0x60 0x15>; + status = "okay"; + phandle = <0xc1>; + }; + + rkvenc-core@fdbd0000 { + compatible = "rockchip,rkv-encoder-v2-core"; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + interrupts = <0x00 0x65 0x04>; + interrupt-names = "irq_rkvenc0"; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + reset-names = "video_a\0video_h\0video_core"; + rockchip,skip-pmu-idle-request; + iommus = <0xc2>; + rockchip,srv = <0xb8>; + rockchip,ccu = <0xc3>; + rockchip,taskqueue-node = <0x07>; + rockchip,task-capacity = <0x08>; + power-domains = <0x60 0x10>; + operating-points-v2 = <0xc4>; + status = "okay"; + phandle = <0x272>; + }; + + iommu@fdbdf000 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + clocks = <0x02 0x1c5 0x02 0x1c4>; + clock-names = "aclk\0iface"; + rockchip,disable-mmu-reset; + rockchip,enable-cmd-retry; + rockchip,shootdown-entire; + #iommu-cells = <0x00>; + power-domains = <0x60 0x10>; + status = "okay"; + phandle = <0xc2>; + }; + + rkvenc-core@fdbe0000 { + compatible = "rockchip,rkv-encoder-v2-core"; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + interrupts = <0x00 0x68 0x04>; + interrupt-names = "irq_rkvenc1"; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + reset-names = "video_a\0video_h\0video_core"; + rockchip,skip-pmu-idle-request; + iommus = <0xc5>; + rockchip,srv = <0xb8>; + rockchip,ccu = <0xc3>; + rockchip,taskqueue-node = <0x07>; + rockchip,task-capacity = <0x08>; + power-domains = <0x60 0x11>; + operating-points-v2 = <0xc4>; + status = "okay"; + phandle = <0x273>; + }; + + iommu@fdbef000 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + clocks = <0x02 0x1ca 0x02 0x1c9>; + lock-names = "aclk\0iface"; + rockchip,disable-mmu-reset; + rockchip,enable-cmd-retry; + rockchip,shootdown-entire; + #iommu-cells = <0x00>; + power-domains = <0x60 0x11>; + status = "okay"; + phandle = <0xc5>; + }; + + venc-opp-table { + compatible = "operating-points-v2"; + nvmem-cells = <0xc6 0xc7>; + nvmem-cell-names = "leakage\0opp-info"; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + rockchip,grf = <0xc8>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + phandle = <0xc4>; + + opp-800000000 { + opp-hz = <0x00 0x2faf0800>; + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + }; + }; + + rkvdec-ccu@fdc30000 { + compatible = "rockchip,rkv-decoder-v2-ccu"; + reg = <0x00 0xfdc30000 0x00 0x100>; + reg-names = "ccu"; + clocks = <0x02 0x18e>; + clock-names = "aclk_ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + reset-names = "video_ccu"; + rockchip,skip-pmu-idle-request; + rockchip,ccu-mode = <0x01>; + power-domains = <0x60 0x0e>; + status = "okay"; + phandle = <0xca>; + }; + + rkvdec-core@fdc38000 { + compatible = "rockchip,rkv-decoder-v2"; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + reg-names = "regs\0link"; + interrupts = <0x00 0x5f 0x04>; + interrupt-names = "irq_rkvdec0"; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,skip-pmu-idle-request; + iommus = <0xc9>; + rockchip,srv = <0xb8>; + rockchip,ccu = <0xca>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,taskqueue-node = <0x09>; + rockchip,sram = <0xcb>; + rockchip,rcb-iova = <0xfff00000 0x100000>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + rockchip,rcb-min-width = <0x200>; + power-domains = <0x60 0x0e>; + status = "okay"; + phandle = <0x274>; + }; + + iommu@fdc38700 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + interrupts = <0x00 0x60 0x04>; + interrupt-names = "irq_rkvdec0_mmu"; + clocks = <0x02 0x190 0x02 0x18f>; + clock-names = "aclk\0iface"; + rockchip,disable-mmu-reset; + rockchip,enable-cmd-retry; + rockchip,shootdown-entire; + rockchip,master-handle-irq; + #iommu-cells = <0x00>; + power-domains = <0x60 0x0e>; + status = "okay"; + phandle = <0xc9>; + }; + + rkvdec-core@fdc48000 { + compatible = "rockchip,rkv-decoder-v2"; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + reg-names = "regs\0link"; + interrupts = <0x00 0x61 0x04>; + interrupt-names = "irq_rkvdec1"; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,skip-pmu-idle-request; + iommus = <0xcc>; + rockchip,srv = <0xb8>; + rockchip,ccu = <0xca>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,taskqueue-node = <0x09>; + rockchip,sram = <0xcd>; + rockchip,rcb-iova = <0xffe00000 0x100000>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + rockchip,rcb-min-width = <0x200>; + power-domains = <0x60 0x0f>; + status = "okay"; + phandle = <0x275>; + }; + + iommu@fdc48700 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + interrupts = <0x00 0x62 0x04>; + interrupt-names = "irq_rkvdec1_mmu"; + clocks = <0x02 0x195 0x02 0x194>; + clock-names = "aclk\0iface"; + rockchip,disable-mmu-reset; + rockchip,enable-cmd-retry; + rockchip,shootdown-entire; + rockchip,master-handle-irq; + #iommu-cells = <0x00>; + power-domains = <0x60 0x0f>; + status = "okay"; + phandle = <0xcc>; + }; + + av1d@fdc70000 { + compatible = "rockchip,av1-decoder"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + reg-names = "vcd\0cache\0afbc"; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + clocks = <0x02 0x49 0x02 0x4b>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + reset-names = "video_a\0video_h"; + iommus = <0xce>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + power-domains = <0x60 0x17>; + status = "okay"; + phandle = <0x276>; + }; + + iommu@fdca0000 { + compatible = "rockchip,iommu-av1"; + reg = <0x00 0xfdca0000 0x00 0x600>; + interrupts = <0x00 0x6d 0x04>; + interrupt-names = "irq_av1d_mmu"; + clocks = <0x02 0x49 0x02 0x4b>; + clock-names = "aclk\0iface"; + #iommu-cells = <0x00>; + power-domains = <0x60 0x17>; + status = "okay"; + phandle = <0xce>; + }; + + rkisp-unite@fdcb0000 { + compatible = "rockchip,rk3588-rkisp-unite"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + status = "disabled"; + phandle = <0x277>; + }; + + rkisp@fdcb0000 { + compatible = "rockchip,rk3588-rkisp"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + status = "okay"; + phandle = <0x58>; + }; + + rkisp-unite-mmu@fdcb7f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + interrupt-names = "isp0_mmu\0isp1_mmu"; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + power-domains = <0x60 0x1c>; + #iommu-cells = <0x00>; + rockchip,disable-mmu-reset; + status = "disabled"; + phandle = <0xcf>; + }; + + iommu@fdcb7f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + interrupts = <0x00 0x84 0x04>; + interrupt-names = "isp0_mmu"; + clocks = <0x02 0x1de 0x02 0x1df>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x1b>; + #iommu-cells = <0x00>; + rockchip,disable-mmu-reset; + status = "okay"; + phandle = <0xd0>; + }; + + rkisp@fdcc0000 { + compatible = "rockchip,rk3588-rkisp"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + status = "disabled"; + phandle = <0x5a>; + }; + + iommu@fdcc7f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + interrupts = <0x00 0x88 0x04>; + interrupt-names = "isp1_mmu"; + clocks = <0x02 0x120 0x02 0x121>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x1c>; + #iommu-cells = <0x00>; + rockchip,disable-mmu-reset; + status = "disabled"; + phandle = <0xd1>; + }; + + rkispp@fdcd0000 { + compatible = "rockchip,rk3588-rkispp"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + interrupts = <0x00 0x8b 0x04>; + interrupt-names = "fec_irq"; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + status = "disabled"; + phandle = <0x5b>; + }; + + iommu@fdcd0f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + interrupts = <0x00 0x8c 0x04>; + interrupt-names = "fec0_mmu"; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + clock-names = "aclk\0iface\0pclk"; + power-domains = <0x60 0x1d>; + #iommu-cells = <0x00>; + rockchip,disable-mmu-reset; + status = "disabled"; + phandle = <0xd2>; + }; + + rkispp@fdcd8000 { + compatible = "rockchip,rk3588-rkispp"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + interrupts = <0x00 0x8d 0x04>; + interrupt-names = "fec_irq"; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + status = "disabled"; + phandle = <0x5c>; + }; + + iommu@fdcd8f00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + interrupts = <0x00 0x8e 0x04>; + interrupt-names = "fec1_mmu"; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + clock-names = "aclk\0iface\0pclk"; + power-domains = <0x60 0x1d>; + #iommu-cells = <0x00>; + rockchip,disable-mmu-reset; + status = "disabled"; + phandle = <0xd3>; + }; + + rkcif@fdce0000 { + compatible = "rockchip,rk3588-cif"; + reg = <0x00 0xfdce0000 0x00 0x800>; + reg-names = "cif_regs"; + interrupts = <0x00 0x9b 0x04>; + interrupt-names = "cif-intr"; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + power-domains = <0x60 0x1b>; + rockchip,grf = <0xc8>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + nvmem-cell-names = "specification\0package_low\0package_high"; + status = "okay"; + phandle = <0x4f>; + }; + + iommu@fdce0800 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + interrupts = <0x00 0x71 0x04>; + interrupt-names = "cif_mmu"; + clocks = <0x02 0x1e4 0x02 0x1e5>; + clock-names = "aclk\0iface"; + power-domains = <0x60 0x1b>; + rockchip,disable-mmu-reset; + #iommu-cells = <0x00>; + status = "okay"; + phandle = <0x50>; + }; + + mipi0-csi2-hw@fdd10000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + reg-names = "csihost_regs"; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + interrupt-names = "csi-intr1\0csi-intr2"; + clocks = <0x02 0x1cf>; + clock-names = "pclk_csi2host"; + resets = <0x02 0x324>; + reset-names = "srst_csihost_p"; + status = "okay"; + phandle = <0x47>; + }; + + mipi1-csi2-hw@fdd20000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + reg-names = "csihost_regs"; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + interrupt-names = "csi-intr1\0csi-intr2"; + clocks = <0x02 0x1d0>; + clock-names = "pclk_csi2host"; + resets = <0x02 0x325>; + reset-names = "srst_csihost_p"; + status = "okay"; + phandle = <0x48>; + }; + + mipi2-csi2-hw@fdd30000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + reg-names = "csihost_regs"; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + interrupt-names = "csi-intr1\0csi-intr2"; + clocks = <0x02 0x1d1>; + clock-names = "pclk_csi2host"; + resets = <0x02 0x326>; + reset-names = "srst_csihost_p"; + status = "okay"; + phandle = <0x49>; + }; + + mipi3-csi2-hw@fdd40000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + reg-names = "csihost_regs"; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + interrupt-names = "csi-intr1\0csi-intr2"; + clocks = <0x02 0x1d2>; + clock-names = "pclk_csi2host"; + resets = <0x02 0x327>; + reset-names = "srst_csihost_p"; + status = "okay"; + phandle = <0x4a>; + }; + + mipi4-csi2-hw@fdd50000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + reg-names = "csihost_regs"; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + interrupt-names = "csi-intr1\0csi-intr2"; + clocks = <0x02 0x1d3>; + clock-names = "pclk_csi2host"; + resets = <0x02 0x328>; + reset-names = "srst_csihost_p"; + status = "okay"; + phandle = <0x4b>; + }; + + mipi5-csi2-hw@fdd60000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + reg-names = "csihost_regs"; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + interrupt-names = "csi-intr1\0csi-intr2"; + clocks = <0x02 0x1d4>; + clock-names = "pclk_csi2host"; + resets = <0x02 0x329>; + reset-names = "srst_csihost_p"; + status = "okay"; + phandle = <0x4c>; + }; + + vop@fdd90000 { + compatible = "rockchip,rk3588-vop"; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + reg-names = "regs\0gamma_lut"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; + iommus = <0xd6>; + power-domains = <0x60 0x18>; + rockchip,grf = <0xc8>; + rockchip,vop-grf = <0xd7>; + rockchip,vo1-grf = <0xd8>; + rockchip,pmu = <0xd9>; + status = "okay"; + phandle = <0x278>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + rockchip,plane-mask = <0x05>; + rockchip,primary-plane = <0x02>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + phandle = <0x279>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xda>; + phandle = <0xf7>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0xdb>; + phandle = <0x102>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0xdc>; + phandle = <0x3c>; + }; + + endpoint@3 { + reg = <0x03>; + remote-endpoint = <0xdd>; + phandle = <0x1a6>; + }; + + endpoint@4 { + reg = <0x04>; + remote-endpoint = <0xde>; + phandle = <0x1b0>; + }; + + endpoint@5 { + reg = <0x05>; + remote-endpoint = <0xdf>; + phandle = <0x1ad>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + rockchip,plane-mask = <0x0a>; + rockchip,primary-plane = <0x03>; + phandle = <0x27a>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xe0>; + phandle = <0x38>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0xe1>; + phandle = <0x103>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0xe2>; + phandle = <0xff>; + }; + + endpoint@3 { + reg = <0x03>; + remote-endpoint = <0xe3>; + phandle = <0x3e>; + }; + + endpoint@4 { + reg = <0x04>; + remote-endpoint = <0xe4>; + phandle = <0x1b1>; + }; + + endpoint@5 { + reg = <0x05>; + remote-endpoint = <0xe5>; + phandle = <0x3f>; + }; + }; + + port@2 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x02>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + rockchip,plane-mask = <0x140>; + rockchip,primary-plane = <0x08>; + phandle = <0x27b>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xe6>; + phandle = <0xf8>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0xe7>; + phandle = <0x3b>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0xe8>; + phandle = <0x100>; + }; + + endpoint@3 { + reg = <0x03>; + remote-endpoint = <0xe9>; + phandle = <0xf3>; + }; + + endpoint@4 { + reg = <0x04>; + remote-endpoint = <0xea>; + phandle = <0xf4>; + }; + + endpoint@5 { + reg = <0x05>; + remote-endpoint = <0xeb>; + phandle = <0x1a7>; + }; + + endpoint@6 { + reg = <0x06>; + remote-endpoint = <0xec>; + phandle = <0x1b2>; + }; + + endpoint@7 { + reg = <0x07>; + remote-endpoint = <0xed>; + phandle = <0x1ae>; + }; + }; + + port@3 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + rockchip,plane-mask = <0x280>; + rockchip,primary-plane = <0x09>; + phandle = <0x27c>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xee>; + phandle = <0x39>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0xef>; + phandle = <0x3a>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0xf0>; + phandle = <0x3d>; + }; + }; + }; + }; + + iommu@fdd97e00 { + compatible = "rockchip,iommu-v2"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + interrupts = <0x00 0x9c 0x04>; + interrupt-names = "vop_mmu"; + clocks = <0x02 0x270 0x02 0x26f>; + clock-names = "aclk\0iface"; + #iommu-cells = <0x00>; + rockchip,disable-device-link-resume; + rockchip,shootdown-entire; + status = "okay"; + phandle = <0xd6>; + }; + + spdif-tx@fddb0000 { + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + interrupts = <0x00 0xc3 0x04>; + dmas = <0xf1 0x06>; + dma-names = "tx"; + clock-names = "mclk\0hclk"; + clocks = <0x02 0x209 0x02 0x204>; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + power-domains = <0x60 0x19>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x1d5>; + }; + + i2s@fddc0000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf2 0x00>; + dma-names = "tx"; + power-domains = <0x60 0x19>; + resets = <0x02 0x38d>; + reset-names = "tx-m"; + rockchip,playback-only; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x27d>; + }; + + spdif-tx@fdde0000 { + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + interrupts = <0x00 0xc4 0x04>; + dmas = <0xf1 0x07>; + dma-names = "tx"; + clock-names = "mclk\0hclk"; + clocks = <0x02 0x257 0x02 0x253>; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + power-domains = <0x60 0x1a>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x27e>; + }; + + i2s@fddf0000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + dmas = <0xf2 0x02>; + dma-names = "tx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x3e8>; + reset-names = "tx-m"; + rockchip,always-on; + rockchip,hdmi-path; + rockchip,playback-only; + #sound-dai-cells = <0x00>; + status = "okay"; + phandle = <0x1d3>; + }; + + i2s@fddfc000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf2 0x17>; + dma-names = "rx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x413>; + reset-names = "rx-m"; + rockchip,capture-only; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x27f>; + }; + + spdif-rx@fde08000 { + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + reg = <0x00 0xfde08000 0x00 0x1000>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0x7c 0x15>; + dma-names = "rx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x3fd>; + reset-names = "spdifrx-m"; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x280>; + }; + + dsi@fde20000 { + compatible = "rockchip,rk3588-mipi-dsi2"; + reg = <0x00 0xfde20000 0x00 0x10000>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + reset-names = "apb"; + power-domains = <0x60 0x18>; + phys = <0x2f>; + phy-names = "dcphy"; + rockchip,grf = <0xd7>; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x281>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x282>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xf3>; + status = "disabled"; + phandle = <0xe9>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x39>; + status = "disabled"; + phandle = <0xee>; + }; + }; + }; + }; + + dsi@fde30000 { + compatible = "rockchip,rk3588-mipi-dsi2"; + reg = <0x00 0xfde30000 0x00 0x10000>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + reset-names = "apb"; + power-domains = <0x60 0x18>; + phys = <0x30>; + phy-names = "dcphy"; + rockchip,grf = <0xd7>; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x283>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x284>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xf4>; + status = "disabled"; + phandle = <0xea>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x3a>; + status = "disabled"; + phandle = <0xef>; + }; + }; + }; + }; + + hdcp@fde40000 { + compatible = "rockchip,rk3588-hdcp"; + reg = <0x00 0xfde40000 0x00 0x80>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + power-domains = <0x60 0x19>; + rockchip,vo-grf = <0xf5>; + status = "disabled"; + phandle = <0x285>; + }; + + dp@fde50000 { + compatible = "rockchip,rk3588-dp"; + reg = <0x00 0xfde50000 0x00 0x4000>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + phys = <0xf6>; + power-domains = <0x60 0x19>; + #sound-dai-cells = <0x01>; + status = "disabled"; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0xf7>; + status = "disabled"; + phandle = <0xda>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x38>; + status = "disabled"; + phandle = <0xe0>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0xf8>; + status = "disabled"; + phandle = <0xe6>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + hdcp@fde70000 { + compatible = "rockchip,rk3588-hdcp"; + reg = <0x00 0xfde70000 0x00 0x80>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + power-domains = <0x60 0x1a>; + rockchip,vo-grf = <0xd8>; + status = "disabled"; + phandle = <0x287>; + }; + + hdmi@fde80000 { + compatible = "rockchip,rk3588-dw-hdmi"; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + reset-names = "ref\0hdp"; + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + reg-io-width = <0x04>; + rockchip,grf = <0xc8>; + rockchip,vo1_grf = <0xd8>; + phys = <0xfd>; + phy-names = "hdmi"; + #sound-dai-cells = <0x00>; + status = "okay"; + enable-gpios = <0xfe 0x08 0x00>; + phandle = <0x1d4>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x288>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x3c>; + status = "okay"; + phandle = <0xdc>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0xff>; + status = "disabled"; + phandle = <0xe2>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0x100>; + status = "disabled"; + phandle = <0xe8>; + }; + }; + }; + }; + + edp@fdec0000 { + compatible = "rockchip,rk3588-edp"; + reg = <0x00 0xfdec0000 0x00 0x1000>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + reset-names = "dp\0apb"; + phys = <0x101>; + phy-names = "dp"; + power-domains = <0x60 0x1a>; + rockchip,grf = <0xd8>; + status = "disabled"; + phandle = <0x289>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x102>; + status = "disabled"; + phandle = <0xdb>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x103>; + status = "disabled"; + phandle = <0xe1>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0x3b>; + status = "disabled"; + phandle = <0xe7>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x28a>; + }; + }; + }; + }; + + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; + + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; + }; + + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; + + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; + + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; + + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; + + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; + + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; + + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; + + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; + + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; + + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; + + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; + + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; + + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; + + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; + + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; + + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; + + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; + + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; + }; + + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; + + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; + + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; + + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; + + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; + + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; + + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; + + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; + + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; + + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; + + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; + }; + + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; + + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; + }; + + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; + + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; + + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; + + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; + + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; + + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; + }; + + dfi@fe060000 { + compatible = "rockchip,rk3588-dfi"; + reg = <0x00 0xfe060000 0x00 0x10000>; + rockchip,pmu_grf = <0x104>; + status = "disabled"; + phandle = <0x40>; + }; + + pcie@fe180000 { + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + #address-cells = <0x03>; + #size-cells = <0x02>; + bus-range = <0x30 0x3f>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + device_type = "pci"; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + #interrupt-cells = <0x01>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + linux,pci-domain = <0x03>; + num-ib-windows = <0x08>; + num-ob-windows = <0x08>; + num-viewport = <0x04>; + max-link-speed = <0x02>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + num-lanes = <0x01>; + phys = <0x70 0x02>; + phy-names = "pcie-phy"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + reg-names = "pcie-apb\0pcie-dbi"; + resets = <0x02 0x210 0x02 0x21f>; + reset-names = "pcie\0periph"; + rockchip,pipe-grf = <0x76>; + status = "disabled"; + phandle = <0x28c>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0x00>; + #interrupt-cells = <0x01>; + interrupt-parent = <0x01>; + interrupts = <0x00 0xf5 0x01>; + phandle = <0x105>; + }; + }; + + pcie@fe190000 { + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + #address-cells = <0x03>; + #size-cells = <0x02>; + bus-range = <0x40 0x4f>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + device_type = "pci"; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + #interrupt-cells = <0x01>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + linux,pci-domain = <0x04>; + num-ib-windows = <0x08>; + num-ob-windows = <0x08>; + num-viewport = <0x04>; + max-link-speed = <0x02>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + num-lanes = <0x01>; + phys = <0x108 0x02>; + phy-names = "pcie-phy"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + reg-names = "pcie-apb\0pcie-dbi"; + resets = <0x02 0x211 0x02 0x220>; + reset-names = "pcie\0periph"; + rockchip,pipe-grf = <0x76>; + status = "disabled"; + phandle = <0x28d>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0x00>; + #interrupt-cells = <0x01>; + interrupt-parent = <0x01>; + interrupts = <0x00 0xfa 0x01>; + phandle = <0x107>; + }; + }; + + uio@fe1c0000 { + compatible = "rockchip,uio-gmac"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,ethernet = <0x109>; + status = "disabled"; + phandle = <0x28e>; + }; + + ethernet@fe1c0000 { + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + interrupt-names = "macirq\0eth_wake_irq"; + rockchip,grf = <0xc8>; + rockchip,php_grf = <0x76>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + resets = <0x02 0x20b>; + reset-names = "stmmaceth"; + power-domains = <0x60 0x21>; + snps,mixed-burst; + snps,tso; + snps,axi-config = <0x10a>; + snps,mtl-rx-config = <0x10b>; + snps,mtl-tx-config = <0x10c>; + status = "okay"; + phy-mode = "rgmii-rxid"; + clock_in_out = "output"; + snps,reset-gpio = <0x10d 0x08 0x01>; + snps,reset-active-low; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + tx_delay = <0x40>; + phy-handle = <0x113>; + phandle = <0x109>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x28f>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + snps,rd_osr_lmt = <0x08>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + phandle = <0x10a>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; + + tx-queues-config { + snps,tx-queues-to-use = <0x01>; + phandle = <0x10c>; + + queue0 { + }; + }; + }; + + sata@fe210000 { + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + reg = <0x00 0xfe210000 0x00 0x1000>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + phy-names = "sata-phy"; + ports-implemented = <0x01>; + status = "okay"; + phandle = <0x290>; + }; + + sata@fe230000 { + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + reg = <0x00 0xfe230000 0x00 0x1000>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + phy-names = "sata-phy"; + ports-implemented = <0x01>; + status = "disabled"; + phandle = <0x291>; + }; + + spi@fe2b0000 { + compatible = "rockchip,sfc"; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x292>; + }; + + mmc@fe2c0000 { + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <0x8f0d180>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + power-domains = <0x60 0x28>; + status = "okay"; + no-sdio; + no-mmc; + bus-width = <0x04>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vqmmc-supply = <0x118>; + phandle = <0x293>; + }; + + mmc@fe2d0000 { + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <0xbebc200>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + power-domains = <0x60 0x25>; + status = "disabled"; + phandle = <0x294>; + }; + + mmc@fe2e0000 { + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + interrupts = <0x00 0xcd 0x04>; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + clock-names = "core\0bus\0axi\0block\0timer"; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + reset-names = "core\0bus\0axi\0block\0timer"; + max-frequency = <0xbebc200>; + status = "okay"; + bus-width = <0x08>; + no-sdio; + no-sd; + non-removable; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + phandle = <0x295>; + }; + + crypto@fe370000 { + compatible = "rockchip,rk3588-crypto"; + reg = <0x00 0xfe370000 0x00 0x2000>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + reset-names = "crypto-rst"; + status = "disabled"; + phandle = <0x296>; + }; + + rng@fe378000 { + compatible = "rockchip,trngv1"; + reg = <0x00 0xfe378000 0x00 0x200>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + reset-names = "reset"; + status = "okay"; + phandle = <0x297>; + }; + + i2s@fe470000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfe470000 0x00 0x1000>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + dmas = <0x7c 0x00 0x7c 0x01>; + dma-names = "tx\0rx"; + power-domains = <0x60 0x26>; + resets = <0x02 0x77 0x02 0x7a>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + pinctrl-1 = <0x11f>; + pinctrl-2 = <0x11b 0x11c>; + #sound-dai-cells = <0x00>; + status = "okay"; + phandle = <0x1da>; + }; + + i2s@fe480000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfe480000 0x00 0x1000>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + dmas = <0x7c 0x02 0x7c 0x03>; + dma-names = "tx\0rx"; + resets = <0x02 0xc002a 0x02 0xc002d>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x1d1>; + }; + + i2s@fe490000 { + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + reg = <0x00 0xfe490000 0x00 0x1000>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf1 0x00 0xf1 0x01>; + dma-names = "tx\0rx"; + power-domains = <0x60 0x26>; + rockchip,clk-trcm = <0x01>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-0 = <0x12a 0x12b>; + pinctrl-1 = <0x12c>; + pinctrl-2 = <0x12d 0x12e>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x298>; + }; + + i2s@fe4a0000 { + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf1 0x02 0xf1 0x03>; + dma-names = "tx\0rx"; + power-domains = <0x60 0x26>; + rockchip,clk-trcm = <0x01>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-0 = <0x12f 0x130>; + pinctrl-1 = <0x131>; + pinctrl-2 = <0x132 0x133>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x299>; + }; + + pdm@fe4b0000 { + compatible = "rockchip,rk3588-pdm"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + clocks = <0x02 0x29f 0x02 0x29e>; + clock-names = "pdm_clk\0pdm_hclk"; + dmas = <0x7c 0x04>; + dma-names = "rx"; + pinctrl-names = "default\0idle\0clk"; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + pinctrl-1 = <0x138>; + pinctrl-2 = <0x139 0x13a>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x29a>; + }; + + pdm@fe4c0000 { + compatible = "rockchip,rk3588-pdm"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + clocks = <0x02 0x3b 0x02 0x3a>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf1 0x04>; + dma-names = "rx"; + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + pinctrl-1 = <0x13f>; + pinctrl-2 = <0x140 0x141>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x29b>; + }; + + vad@fe4d0000 { + compatible = "rockchip,rk3588-vad"; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + reg-names = "vad"; + clocks = <0x02 0x2a0>; + clock-names = "hclk"; + interrupts = <0x00 0xca 0x04>; + rockchip,audio-src = <0x00>; + rockchip,det-channel = <0x00>; + rockchip,mode = <0x00>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x29c>; + }; + + spdif-tx@fe4e0000 { + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + interrupts = <0x00 0xc1 0x04>; + dmas = <0x7c 0x05>; + dma-names = "tx"; + clock-names = "mclk\0hclk"; + clocks = <0x02 0x41 0x02 0x3e>; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x29d>; + }; + + spdif-tx@fe4f0000 { + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + interrupts = <0x00 0xc2 0x04>; + dmas = <0xf1 0x05>; + dma-names = "tx"; + clock-names = "mclk\0hclk"; + clocks = <0x02 0x47 0x02 0x44>; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x1d7>; + }; + + codec-digital@fe500000 { + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + reg = <0x00 0xfe500000 0x00 0x1000>; + clocks = <0x02 0x29 0x02 0x2f>; + clock-names = "dac\0pclk"; + power-domains = <0x60 0x26>; + resets = <0x02 0x84>; + reset-names = "reset"; + rockchip,grf = <0xc8>; + rockchip,pwm-output-mode; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x29e>; + }; + + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + #hwlock-cells = <0x01>; + phandle = <0x29f>; + }; + + interrupt-controller@fe600000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <0x03>; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + interrupt-controller; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + interrupts = <0x01 0x09 0x04>; + phandle = <0x01>; + + msi-controller@fe640000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <0x01>; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + }; + + msi-controller@fe660000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <0x01>; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + }; + }; + + dma-controller@fea10000 { + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + clock-names = "apb_pclk"; + #dma-cells = <0x01>; + arm,pl330-periph-burst; + phandle = <0x7c>; + }; + + dma-controller@fea30000 { + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + clock-names = "apb_pclk"; + #dma-cells = <0x01>; + arm,pl330-periph-burst; + phandle = <0xf1>; + }; + + can@fea50000 { + compatible = "rockchip,can-2.0"; + reg = <0x00 0xfea50000 0x00 0x1000>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + reset-names = "can\0can-apb"; + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + status = "disabled"; + phandle = <0x2a0>; + }; + + can@fea60000 { + compatible = "rockchip,can-2.0"; + reg = <0x00 0xfea60000 0x00 0x1000>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbb 0x02 0xba>; + reset-names = "can\0can-apb"; + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + status = "okay"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + phandle = <0x2a1>; + }; + + can@fea70000 { + compatible = "rockchip,can-2.0"; + reg = <0x00 0xfea70000 0x00 0x1000>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + reset-names = "can\0can-apb"; + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + status = "disabled"; + phandle = <0x2a2>; + }; + + decompress@fea80000 { + compatible = "rockchip,hw-decompress"; + reg = <0x00 0xfea80000 0x00 0x1000>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + reset-names = "dresetn"; + status = "disabled"; + phandle = <0x2a3>; + }; + + i2c@fea90000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfea90000 0x00 0x1000>; + clocks = <0x02 0x8d 0x02 0x85>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x13e 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x148>; + resets = <0x02 0xb0 0x02 0xa8>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + phandle = <0x2a4>; + + rk8602@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_npu_s0"; + regulator-min-microvolt = <0x86470>; + regulator-max-microvolt = <0xe7ef0>; + regulator-ramp-delay = <0x8fc>; + rockchip,suspend-voltage-selector = <0x01>; + regulator-boot-on; + regulator-always-on; + phandle = <0xb3>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + i2c@feaa0000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + clocks = <0x02 0x8e 0x02 0x86>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x13f 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x149>; + resets = <0x02 0xb1 0x02 0xa9>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x2a5>; + }; + + i2c@feab0000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + clocks = <0x02 0x8f 0x02 0x87>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x140 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x14a>; + resets = <0x02 0xb2 0x02 0xaa>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + phandle = <0x2a6>; + + gpio@21 { + status = "okay"; + compatible = "nxp,pca9555"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <0x02>; + gpio-group-num = <0xc8>; + phandle = <0x182>; + }; + }; + + i2c@feac0000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + clocks = <0x02 0x90 0x02 0x88>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x141 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x14b>; + resets = <0x02 0xb3 0x02 0xab>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + phandle = <0x2a7>; + + pc9202@3c { + status = "okay"; + compatible = "firefly,pc9202"; + reg = <0x3c>; + index = <0x01>; + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + }; + }; + + i2c@fead0000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfead0000 0x00 0x1000>; + clocks = <0x02 0x91 0x02 0x89>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x142 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x14d>; + resets = <0x02 0xb4 0x02 0xac>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x2a8>; + }; + + timer@feae0000 { + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + clock-names = "pclk\0timer"; + phandle = <0x2a9>; + }; + + watchdog@feaf0000 { + compatible = "snps,dw-wdt"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + clocks = <0x02 0x6c 0x02 0x6b>; + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + status = "okay"; + phandle = <0x2aa>; + }; + + spi@feb00000 { + compatible = "rockchip,rk3066-spi"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + interrupts = <0x00 0x146 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0xa3 0x02 0x9e>; + clock-names = "spiclk\0apb_pclk"; + dmas = <0x7c 0x0e 0x7c 0x0f>; + dma-names = "tx\0rx"; + pinctrl-names = "default"; + pinctrl-0 = <0x14e 0x14f 0x150>; + num-cs = <0x02>; + status = "disabled"; + phandle = <0x2ab>; + }; + + spi@feb10000 { + compatible = "rockchip,rk3066-spi"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + interrupts = <0x00 0x147 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0xa4 0x02 0x9f>; + clock-names = "spiclk\0apb_pclk"; + dmas = <0x7c 0x10 0x7c 0x11>; + dma-names = "tx\0rx"; + pinctrl-names = "default"; + pinctrl-0 = <0x151 0x152 0x153>; + num-cs = <0x02>; + status = "disabled"; + phandle = <0x2ac>; + }; + + spi@feb20000 { + compatible = "rockchip,rk3066-spi"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + interrupts = <0x00 0x148 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0xa5 0x02 0xa0>; + clock-names = "spiclk\0apb_pclk"; + dmas = <0xf1 0x0f 0xf1 0x10>; + dma-names = "tx\0rx"; + pinctrl-names = "default"; + pinctrl-0 = <0x154 0x155>; + num-cs = <0x01>; + status = "okay"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + phandle = <0x2ad>; + + rk806single@0 { + compatible = "rockchip,rk806"; + spi-max-frequency = <0xf4240>; + reg = <0x00>; + interrupt-parent = <0x7b>; + interrupts = <0x07 0x08>; + pinctrl-names = "default\0pmic-power-off"; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + pinctrl-1 = <0x15a>; + low_voltage_threshold = <0xbb8>; + shutdown_voltage_threshold = <0xa8c>; + shutdown_temperture_threshold = <0xa0>; + hotdie_temperture_threshold = <0x73>; + pmic-reset-func = <0x01>; + vcc1-supply = <0x78>; + vcc2-supply = <0x78>; + vcc3-supply = <0x78>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + vcc6-supply = <0x78>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; + vcc11-supply = <0x15b>; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + vcca-supply = <0x78>; + phandle = <0x2ae>; + + pwrkey { + status = "okay"; + }; + + pinctrl_rk806 { + gpio-controller; + #gpio-cells = <0x02>; + phandle = <0x2af>; + + rk806_dvs1_null { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + phandle = <0x157>; + }; + + rk806_dvs1_slp { + pins = "gpio_pwrctrl1"; + function = "pin_fun1"; + phandle = <0x2b0>; + }; + + rk806_dvs1_pwrdn { + pins = "gpio_pwrctrl1"; + function = "pin_fun2"; + phandle = <0x15a>; + }; + + rk806_dvs1_rst { + pins = "gpio_pwrctrl1"; + function = "pin_fun3"; + phandle = <0x2b1>; + }; + + rk806_dvs2_null { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + phandle = <0x158>; + }; + + rk806_dvs2_slp { + pins = "gpio_pwrctrl2"; + function = "pin_fun1"; + phandle = <0x2b2>; + }; + + rk806_dvs2_pwrdn { + pins = "gpio_pwrctrl2"; + function = "pin_fun2"; + phandle = <0x2b3>; + }; + + rk806_dvs2_rst { + pins = "gpio_pwrctrl2"; + function = "pin_fun3"; + phandle = <0x2b4>; + }; + + rk806_dvs2_dvs { + pins = "gpio_pwrctrl2"; + function = "pin_fun4"; + phandle = <0x2b5>; + }; + + rk806_dvs2_gpio { + pins = "gpio_pwrctrl2"; + function = "pin_fun5"; + phandle = <0x2b6>; + }; + + rk806_dvs3_null { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + phandle = <0x159>; + }; + + rk806_dvs3_slp { + pins = "gpio_pwrctrl3"; + function = "pin_fun1"; + phandle = <0x2b7>; + }; + + rk806_dvs3_pwrdn { + pins = "gpio_pwrctrl3"; + function = "pin_fun2"; + phandle = <0x2b8>; + }; + + rk806_dvs3_rst { + pins = "gpio_pwrctrl3"; + function = "pin_fun3"; + phandle = <0x2b9>; + }; + + rk806_dvs3_dvs { + pins = "gpio_pwrctrl3"; + function = "pin_fun4"; + phandle = <0x2ba>; + }; + + rk806_dvs3_gpio { + pins = "gpio_pwrctrl3"; + function = "pin_fun5"; + phandle = <0x2bb>; + }; + }; + + regulators { + + DCDC_REG1 { + regulator-boot-on; + regulator-min-microvolt = <0x86470>; + regulator-max-microvolt = <0xe7ef0>; + regulator-ramp-delay = <0x30d4>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <0x190>; + phandle = <0x62>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x86470>; + regulator-max-microvolt = <0xe7ef0>; + regulator-ramp-delay = <0x30d4>; + regulator-name = "vdd_cpu_lit_s0"; + phandle = <0x12>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-max-microvolt = <0xb71b0>; + regulator-ramp-delay = <0x30d4>; + regulator-name = "vdd_log_s0"; + phandle = <0x43>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x86470>; + regulator-max-microvolt = <0xe7ef0>; + regulator-init-microvolt = <0xb71b0>; + regulator-ramp-delay = <0x30d4>; + regulator-name = "vdd_vdenc_s0"; + phandle = <0x2bc>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-max-microvolt = <0xdbba0>; + regulator-ramp-delay = <0x30d4>; + regulator-name = "vdd_ddr_s0"; + phandle = <0x42>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + DCDC_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + DCDC_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x1e8480>; + regulator-max-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <0x1e8480>; + }; + }; + + DCDC_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <0x325aa0>; + }; + }; + + DCDC_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + PLDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + PLDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x124f80>; + regulator-max-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x325aa0>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + NLDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xb71b0>; + regulator-max-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <0xb71b0>; + }; + }; + + NLDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xcf850>; + regulator-max-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + NLDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xb71b0>; + regulator-max-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xcf850>; + regulator-max-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xb71b0>; + regulator-max-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + }; + + spi@feb30000 { + compatible = "rockchip,rk3066-spi"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + interrupts = <0x00 0x149 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0xa6 0x02 0xa1>; + clock-names = "spiclk\0apb_pclk"; + dmas = <0xf1 0x11 0xf1 0x12>; + dma-names = "tx\0rx"; + pinctrl-names = "default"; + pinctrl-0 = <0x15d 0x15e 0x15f>; + num-cs = <0x02>; + status = "disabled"; + phandle = <0x2c8>; + }; + + serial@feb40000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeb40000 0x00 0x100>; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0x7c 0x08 0x7c 0x09>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + status = "okay"; + phandle = <0x2c9>; + }; + + serial@feb50000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeb50000 0x00 0x100>; + interrupts = <0x00 0x14d 0x04>; + clocks = <0x02 0xbb 0x02 0xac>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + status = "disabled"; + phandle = <0x2ca>; + }; + + serial@feb60000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeb60000 0x00 0x100>; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + status = "disabled"; + phandle = <0x2cb>; + }; + + serial@feb70000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeb70000 0x00 0x100>; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0xf1 0x09 0xf1 0x0a>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + status = "disabled"; + phandle = <0x2cc>; + }; + + serial@feb80000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeb80000 0x00 0x100>; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + status = "disabled"; + phandle = <0x2cd>; + }; + + serial@feb90000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeb90000 0x00 0x100>; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + status = "okay"; + phandle = <0x2ce>; + }; + + serial@feba0000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfeba0000 0x00 0x100>; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0xf2 0x07 0xf2 0x08>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + status = "disabled"; + phandle = <0x2cf>; + }; + + serial@febb0000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfebb0000 0x00 0x100>; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0xf2 0x09 0xf2 0x0a>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + status = "disabled"; + phandle = <0x2d0>; + }; + + serial@febc0000 { + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + reg = <0x00 0xfebc0000 0x00 0x100>; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + clock-names = "baudclk\0apb_pclk"; + reg-shift = <0x02>; + reg-io-width = <0x04>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + status = "disabled"; + phandle = <0x2d1>; + }; + + pwm@febd0000 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebd0000 0x00 0x10>; + interrupts = <0x00 0x15a 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x169>; + clocks = <0x02 0x54 0x02 0x53>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d2>; + }; + + pwm@febd0010 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebd0010 0x00 0x10>; + interrupts = <0x00 0x15a 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clocks = <0x02 0x54 0x02 0x53>; + clock-names = "pwm\0pclk"; + status = "okay"; + phandle = <0x1ed>; + }; + + pwm@febd0020 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebd0020 0x00 0x10>; + interrupts = <0x00 0x15a 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clocks = <0x02 0x54 0x02 0x53>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d3>; + }; + + pwm@febd0030 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebd0030 0x00 0x10>; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clocks = <0x02 0x54 0x02 0x53>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d4>; + }; + + pwm@febe0000 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebe0000 0x00 0x10>; + interrupts = <0x00 0x15c 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clocks = <0x02 0x57 0x02 0x56>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d5>; + }; + + pwm@febe0010 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebe0010 0x00 0x10>; + interrupts = <0x00 0x15c 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clocks = <0x02 0x57 0x02 0x56>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d6>; + }; + + pwm@febe0020 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebe0020 0x00 0x10>; + interrupts = <0x00 0x15c 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clocks = <0x02 0x57 0x02 0x56>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d7>; + }; + + pwm@febe0030 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebe0030 0x00 0x10>; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clocks = <0x02 0x57 0x02 0x56>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d8>; + }; + + pwm@febf0000 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebf0000 0x00 0x10>; + interrupts = <0x00 0x15e 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clocks = <0x02 0x5a 0x02 0x59>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2d9>; + }; + + pwm@febf0010 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebf0010 0x00 0x10>; + interrupts = <0x00 0x15e 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clocks = <0x02 0x5a 0x02 0x59>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2da>; + }; + + pwm@febf0020 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebf0020 0x00 0x10>; + interrupts = <0x00 0x15e 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clocks = <0x02 0x5a 0x02 0x59>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2db>; + }; + + pwm@febf0030 { + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + reg = <0x00 0xfebf0030 0x00 0x10>; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + #pwm-cells = <0x03>; + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clocks = <0x02 0x5a 0x02 0x59>; + clock-names = "pwm\0pclk"; + status = "disabled"; + phandle = <0x2dc>; + }; + + tsadc@fec00000 { + compatible = "rockchip,rk3588-tsadc"; + reg = <0x00 0xfec00000 0x00 0x400>; + interrupts = <0x00 0x18d 0x04>; + clocks = <0x02 0xaa 0x02 0xa9>; + clock-names = "tsadc\0apb_pclk"; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + reset-names = "tsadc\0tsadc-apb"; + #thermal-sensor-cells = <0x01>; + rockchip,hw-tshut-temp = <0x1d4c0>; + rockchip,hw-tshut-mode = <0x00>; + rockchip,hw-tshut-polarity = <0x00>; + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + pinctrl-1 = <0x176>; + status = "okay"; + phandle = <0x5d>; + }; + + saradc@fec10000 { + compatible = "rockchip,rk3588-saradc"; + reg = <0x00 0xfec10000 0x00 0x10000>; + interrupts = <0x00 0x18e 0x04>; + #io-channel-cells = <0x01>; + clocks = <0x02 0x9d 0x02 0x9c>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + reset-names = "saradc-apb"; + status = "okay"; + vref-supply = <0x177>; + phandle = <0x1d9>; + }; + + mailbox@fec60000 { + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + reg = <0x00 0xfec60000 0x00 0x200>; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + clock-names = "pclk_mailbox"; + #mbox-cells = <0x01>; + status = "disabled"; + phandle = <0x2dd>; + }; + + mailbox@fec70000 { + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + reg = <0x00 0xfec70000 0x00 0x200>; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + clock-names = "pclk_mailbox"; + #mbox-cells = <0x01>; + status = "disabled"; + phandle = <0x2de>; + }; + + i2c@fec80000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfec80000 0x00 0x1000>; + clocks = <0x02 0x92 0x02 0x8a>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x143 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x178>; + resets = <0x02 0xb5 0x02 0xad>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + phandle = <0x2df>; + + es8388@11 { + status = "okay"; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + reg = <0x11>; + clocks = <0x179>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + phandle = <0x1db>; + }; + + fusb302@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <0x7b>; + interrupts = <0x1b 0x08>; + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + vbus-supply = <0x17c>; + status = "disabled"; + phandle = <0x2e0>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; + }; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + op-sink-microwatt = <0xf4240>; + sink-pdos = <0x4019064>; + source-pdos = <0x401912c>; + phandle = <0x2e1>; + + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; + + altmode@0 { + reg = <0x00>; + svid = <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; + }; + }; + + XC7160b@1b { + compatible = "firefly,xc7160"; + reg = <0x1b>; + clocks = <0x02 0x100>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + power-domains = <0x60 0x1b>; + power-gpios = <0x181 0x1d 0x01>; + reset-gpios = <0x182 0x05 0x00>; + pwdn-gpios = <0xfe 0x04 0x00>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-index = <0x00>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "NC"; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; + + port { + + endpoint { + remote-endpoint = <0x183>; + data-lanes = <0x01 0x02 0x03 0x04>; + phandle = <0x31>; + }; + }; + }; + + imx415@37 { + compatible = "sony,imx415"; + reg = <0x37>; + clocks = <0x02 0x100>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + power-domains = <0x60 0x1b>; + power-gpios = <0x181 0x1d 0x00>; + reset-gpios = <0x182 0x05 0x01>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-index = <0x00>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; + + port { + + endpoint { + remote-endpoint = <0x184>; + data-lanes = <0x01 0x02 0x03 0x04>; + phandle = <0x32>; + }; + }; + }; + }; + + i2c@fec90000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfec90000 0x00 0x1000>; + clocks = <0x02 0x93 0x02 0x8b>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x144 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x185>; + resets = <0x02 0xb6 0x02 0xae>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x2e4>; + }; + + i2c@feca0000 { + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + reg = <0x00 0xfeca0000 0x00 0x1000>; + clocks = <0x02 0x94 0x02 0x8c>; + clock-names = "i2c\0pclk"; + interrupts = <0x00 0x145 0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x186>; + resets = <0x02 0xb7 0x02 0xaf>; + reset-names = "i2c\0apb"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + phandle = <0x2e5>; + }; + + spi@fecb0000 { + compatible = "rockchip,rk3066-spi"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + interrupts = <0x00 0x14a 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + clocks = <0x02 0xa7 0x02 0xa2>; + clock-names = "spiclk\0apb_pclk"; + dmas = <0xf2 0x0d 0xf2 0x0e>; + dma-names = "tx\0rx"; + pinctrl-names = "default"; + pinctrl-0 = <0x187 0x188 0x189>; + num-cs = <0x02>; + status = "disabled"; + phandle = <0x2e6>; + }; + + otp@fecc0000 { + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + #address-cells = <0x01>; + #size-cells = <0x01>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + reset-names = "otpc\0apb\0arb"; + phandle = <0x2e7>; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-high@5 { + reg = <0x05 0x01>; + bits = <0x00 0x01>; + phandle = <0xd5>; + }; + + package-serial-number-low@6 { + reg = <0x06 0x01>; + bits = <0x05 0x03>; + phandle = <0xd4>; + }; + + specification-serial-number@6 { + reg = <0x06 0x01>; + bits = <0x00 0x05>; + phandle = <0x21>; + }; + + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; + + cpu-version@1c { + reg = <0x1c 0x01>; + bits = <0x03 0x03>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; + + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + }; + + mailbox@fece0000 { + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + reg = <0x00 0xfece0000 0x00 0x200>; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + clock-names = "pclk_mailbox"; + #mbox-cells = <0x01>; + status = "disabled"; + phandle = <0x2e9>; + }; + + dma-controller@fed10000 { + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + clock-names = "apb_pclk"; + #dma-cells = <0x01>; + arm,pl330-periph-burst; + phandle = <0xf2>; + }; + + phy@fed60000 { + compatible = "rockchip,rk3588-hdptx-phy"; + reg = <0x00 0xfed60000 0x00 0x2000>; + clocks = <0x02 0x2b5 0x02 0x267>; + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + reset-names = "apb\0init\0cmn\0lane"; + rockchip,grf = <0x18a>; + #phy-cells = <0x00>; + status = "disabled"; + phandle = <0x101>; + }; + + hdmiphy@fed60000 { + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + reg = <0x00 0xfed60000 0x00 0x2000>; + clocks = <0x02 0x2b5 0x02 0x267>; + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + rockchip,grf = <0x18a>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xfd>; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + phy@fed80000 { + compatible = "rockchip,rk3588-usbdp-phy"; + reg = <0x00 0xfed80000 0x00 0x10000>; + rockchip,u2phy-grf = <0x18b>; + rockchip,usb-grf = <0x74>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + status = "okay"; + orientation-switch; + svid = <0xff01>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + phandle = <0x2ea>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x18e>; + phandle = <0x17e>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x18f>; + phandle = <0x17f>; + }; + }; + }; + + phy@feda0000 { + compatible = "rockchip,rk3588-mipi-dcphy"; + reg = <0x00 0xfeda0000 0x00 0x10000>; + rockchip,grf = <0x190>; + clocks = <0x02 0x108 0x02 0x2b6>; + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x2f>; + }; + + phy@fedb0000 { + compatible = "rockchip,rk3588-mipi-dcphy"; + reg = <0x00 0xfedb0000 0x00 0x10000>; + rockchip,grf = <0x191>; + clocks = <0x02 0x109 0x02 0x2b6>; + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x30>; + }; + + csi2-dphy0-hw@fedc0000 { + compatible = "rockchip,rk3588-csi2-dphy-hw"; + reg = <0x00 0xfedc0000 0x00 0x8000>; + clocks = <0x02 0x10c>; + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,grf = <0x192>; + rockchip,sys_grf = <0xc8>; + status = "okay"; + phandle = <0x2d>; + }; + + csi2-dphy1-hw@fedc8000 { + compatible = "rockchip,rk3588-csi2-dphy-hw"; + reg = <0x00 0xfedc8000 0x00 0x8000>; + clocks = <0x02 0x10d>; + clock-names = "pclk"; + resets = <0x02 0x19 0x02 0x18>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,grf = <0x193>; + rockchip,sys_grf = <0xc8>; + status = "okay"; + phandle = <0x2e>; + }; + + phy@fee00000 { + compatible = "rockchip,rk3588-naneng-combphy"; + reg = <0x00 0xfee00000 0x00 0x100>; + #phy-cells = <0x01>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bd>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20005 0x02 0x4d6>; + reset-names = "combphy-apb\0combphy"; + rockchip,pipe-grf = <0x76>; + rockchip,pipe-phy-grf = <0x194>; + status = "okay"; + phandle = <0x108>; + }; + + phy@fee20000 { + compatible = "rockchip,rk3588-naneng-combphy"; + reg = <0x00 0xfee20000 0x00 0x100>; + #phy-cells = <0x01>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + reset-names = "combphy-apb\0combphy"; + rockchip,pipe-grf = <0x76>; + rockchip,pipe-phy-grf = <0x195>; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + status = "disabled"; + phandle = <0x70>; + }; + + sram@ff001000 { + compatible = "mmio-sram"; + reg = <0x00 0xff001000 0x00 0xef000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x00 0x00 0xff001000 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; + }; + + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; + + pinctrl { + compatible = "rockchip,rk3588-pinctrl"; + rockchip,grf = <0x196>; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + phandle = <0x197>; + + gpio@fd8a0000 { + compatible = "rockchip,gpio-bank"; + reg = <0x00 0xfd8a0000 0x00 0x100>; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + gpio-controller; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + #interrupt-cells = <0x02>; + phandle = <0x7b>; + }; + + gpio@fec20000 { + compatible = "rockchip,gpio-bank"; + reg = <0x00 0xfec20000 0x00 0x100>; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + gpio-controller; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; + #interrupt-cells = <0x02>; + phandle = <0xfe>; + }; + + gpio@fec30000 { + compatible = "rockchip,gpio-bank"; + reg = <0x00 0xfec30000 0x00 0x100>; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + gpio-controller; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + #interrupt-cells = <0x02>; + phandle = <0x79>; + }; + + gpio@fec40000 { + compatible = "rockchip,gpio-bank"; + reg = <0x00 0xfec40000 0x00 0x100>; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + gpio-controller; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + #interrupt-cells = <0x02>; + phandle = <0x181>; + }; + + gpio@fec50000 { + compatible = "rockchip,gpio-bank"; + reg = <0x00 0xfec50000 0x00 0x100>; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + gpio-controller; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + #interrupt-cells = <0x02>; + phandle = <0x10d>; + }; + + pcfg-pull-up { + bias-pull-up; + phandle = <0x19e>; + }; + + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; + }; + + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; + + pcfg-pull-none-drv-level-0 { + bias-disable; + drive-strength = <0x00>; + phandle = <0x2ed>; + }; + + pcfg-pull-none-drv-level-1 { + bias-disable; + drive-strength = <0x01>; + phandle = <0x2ee>; + }; + + pcfg-pull-none-drv-level-2 { + bias-disable; + drive-strength = <0x02>; + phandle = <0x1a0>; + }; + + pcfg-pull-none-drv-level-3 { + bias-disable; + drive-strength = <0x03>; + phandle = <0x2ef>; + }; + + pcfg-pull-none-drv-level-4 { + bias-disable; + drive-strength = <0x04>; + phandle = <0x2f0>; + }; + + pcfg-pull-none-drv-level-5 { + bias-disable; + drive-strength = <0x05>; + phandle = <0x2f1>; + }; + + pcfg-pull-none-drv-level-6 { + bias-disable; + drive-strength = <0x06>; + phandle = <0x2f2>; + }; + + pcfg-pull-up-drv-level-0 { + bias-pull-up; + drive-strength = <0x00>; + phandle = <0x2f3>; + }; + + pcfg-pull-up-drv-level-1 { + bias-pull-up; + drive-strength = <0x01>; + phandle = <0x19f>; + }; + + pcfg-pull-up-drv-level-2 { + bias-pull-up; + drive-strength = <0x02>; + phandle = <0x199>; + }; + + pcfg-pull-up-drv-level-3 { + bias-pull-up; + drive-strength = <0x03>; + phandle = <0x2f4>; + }; + + pcfg-pull-up-drv-level-4 { + bias-pull-up; + drive-strength = <0x04>; + phandle = <0x2f5>; + }; + + pcfg-pull-up-drv-level-5 { + bias-pull-up; + drive-strength = <0x05>; + phandle = <0x2f6>; + }; + + pcfg-pull-up-drv-level-6 { + bias-pull-up; + drive-strength = <0x06>; + phandle = <0x19a>; + }; + + pcfg-pull-down-drv-level-0 { + bias-pull-down; + drive-strength = <0x00>; + phandle = <0x2f7>; + }; + + pcfg-pull-down-drv-level-1 { + bias-pull-down; + drive-strength = <0x01>; + phandle = <0x2f8>; + }; + + pcfg-pull-down-drv-level-2 { + bias-pull-down; + drive-strength = <0x02>; + phandle = <0x2f9>; + }; + + pcfg-pull-down-drv-level-3 { + bias-pull-down; + drive-strength = <0x03>; + phandle = <0x2fa>; + }; + + pcfg-pull-down-drv-level-4 { + bias-pull-down; + drive-strength = <0x04>; + phandle = <0x2fb>; + }; + + pcfg-pull-down-drv-level-5 { + bias-pull-down; + drive-strength = <0x05>; + phandle = <0x2fc>; + }; + + pcfg-pull-down-drv-level-6 { + bias-pull-down; + drive-strength = <0x06>; + phandle = <0x2fd>; + }; + + pcfg-pull-up-smt { + bias-pull-up; + input-schmitt-enable; + phandle = <0x2fe>; + }; + + pcfg-pull-down-smt { + bias-pull-down; + input-schmitt-enable; + phandle = <0x2ff>; + }; + + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; + + pcfg-pull-none-drv-level-0-smt { + bias-disable; + drive-strength = <0x00>; + input-schmitt-enable; + phandle = <0x300>; + }; + + pcfg-pull-none-drv-level-1-smt { + bias-disable; + drive-strength = <0x01>; + input-schmitt-enable; + phandle = <0x19c>; + }; + + pcfg-pull-none-drv-level-2-smt { + bias-disable; + drive-strength = <0x02>; + input-schmitt-enable; + phandle = <0x301>; + }; + + pcfg-pull-none-drv-level-3-smt { + bias-disable; + drive-strength = <0x03>; + input-schmitt-enable; + phandle = <0x302>; + }; + + pcfg-pull-none-drv-level-4-smt { + bias-disable; + drive-strength = <0x04>; + input-schmitt-enable; + phandle = <0x303>; + }; + + pcfg-pull-none-drv-level-5-smt { + bias-disable; + drive-strength = <0x05>; + input-schmitt-enable; + phandle = <0x19b>; + }; + + pcfg-pull-none-drv-level-6-smt { + bias-disable; + drive-strength = <0x06>; + input-schmitt-enable; + phandle = <0x304>; + }; + + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + pcfg-output-high-pull-up { + output-high; + bias-pull-up; + phandle = <0x306>; + }; + + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; + + pcfg-output-high-pull-none { + output-high; + bias-disable; + phandle = <0x308>; + }; + + pcfg-output-low { + output-low; + phandle = <0x309>; + }; + + pcfg-output-low-pull-up { + output-low; + bias-pull-up; + phandle = <0x30a>; + }; + + pcfg-output-low-pull-down { + output-low; + bias-pull-down; + phandle = <0x30b>; + }; + + pcfg-output-low-pull-none { + output-low; + bias-disable; + phandle = <0x30c>; + }; + + auddsm { + + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; + + bt1120 { + + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; + + can0 { + + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; + + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; + }; + }; + + can1 { + + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; + }; + + can2 { + + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; + }; + + cif { + + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; + + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; + + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; + }; + + clk32k { + + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; + + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; + + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; + + cpu { + + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; + + ddrphych0 { + + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; + + ddrphych1 { + + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; + + ddrphych2 { + + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; + }; + + ddrphych3 { + + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; + + dp0 { + + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; + + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; + }; + + dp1 { + + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; + + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; + + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; + + emmc { + + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; + }; + + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; + + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; + + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; + }; + + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; + }; + + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; + }; + + fspi { + + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; + + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; + + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; + }; + + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; + + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; + + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; + }; + }; + + gmac1 { + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + }; + + gpu { + + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; + }; + + hdmi { + + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; + }; + + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; + + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; + + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; + + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; + + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; + + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; + + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; + + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; + + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; + }; + + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; + + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; + + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; + + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; + + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; + + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; + + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; + + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; + + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; + + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; + + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; + + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; + + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; + + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; + + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; + + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; + + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; + + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; + + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; + + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; + + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; + + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; + + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; + + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; + + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; + + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; + + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; + + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; + + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; + + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; + }; + + i2c0 { + + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; + }; + + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; + }; + + i2c1 { + + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; + + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + }; + + i2c2 { + + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; + + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; + + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; + + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; + }; + + i2c3 { + + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; + + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; + + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; + }; + + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; + }; + + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; + }; + + i2c4 { + + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; + + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; + + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; + + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; + }; + + i2c5 { + + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; + + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; + + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; + + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; + }; + + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; + + i2c6 { + + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; + + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; + + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; + + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; + + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; + }; + + i2c7 { + + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; + + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; + + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; + }; + + i2c8 { + + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; + + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; + + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; + + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; + }; + + i2s0 { + + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; + + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; + + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; + + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; + }; + + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; + + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; + + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; + + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; + + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; + + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; + }; + + i2s1 { + + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; + + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; + + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; + + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; + + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; + + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; + + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; + + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; + + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; + + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; + + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; + + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; + + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; + + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; + + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; + + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; + + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; + + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; + + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; + + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; + + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; + + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; + }; + + i2s2 { + + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; + + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; + + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; + + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; + + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; + + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; + + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; + + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; + + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; + + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; + + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; + + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; + + i2s3 { + + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; + + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; + + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; + }; + + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; + + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; + + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; + }; + + jtag { + + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; + + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; + }; + + litcpu { + + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; + + mcu { + + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; + }; + + mipi { + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + pcie20x1 { + + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; + + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; + + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; + }; + + pcie30phy { + + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; + + pcie30x1 { + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + }; + + pcie30x2 { + + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; + }; + + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; + }; + + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; + + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; + }; + + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; + }; + + pcie30x4 { + + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; + + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; + + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; + + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; + }; + + pdm0 { + + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; + + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; + + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; + + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; + + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; + + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; + + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; + + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; + + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; + + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; + }; + + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; + + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; + + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; + }; + + pdm1 { + + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; + + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; + + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; + }; + + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; + + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; + + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; + + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; + + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; + + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; + }; + + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; + }; + + pmu { + + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; + + pwm0 { + + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; + + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; + + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; + + pwm1 { + + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; + + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; + + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; + + pwm2 { + + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; + + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; + }; + + pwm3 { + + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; + + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; + + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; + }; + + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; + }; + }; + + pwm4 { + + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; + }; + + pwm5 { + + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; + + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; + }; + + pwm6 { + + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; + }; + + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; + + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; + }; + + pwm7 { + + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; + + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; + + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; + }; + + pwm8 { + + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; + + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; + }; + + pwm9 { + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; + }; + + pwm10 { + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; + }; + + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; + }; + + pwm11 { + + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; + }; + + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; + + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; + + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; + }; + + pwm12 { + + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; + }; + + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; + }; + }; + + pwm13 { + + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; + + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; + }; + + pwm14 { + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + }; + + pwm15 { + + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; + + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; + + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; + }; + }; + + refclk { + + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; + + sata { + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + }; + + sata0 { + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + }; + + sata1 { + + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; + }; + + sata2 { + + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; + + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; + }; + + sdio { + + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; + + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; + + sdmmc { + + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; + + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; + }; + + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; + + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; + + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; + }; + }; + + spdif0 { + + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; + + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; + + spdif1 { + + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; + + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; + }; + + spi0 { + + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; + + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; + + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; + + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; + }; + + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; + }; + + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; + + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; + + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; + + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; + + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; + + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; + }; + + spi1 { + + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; + + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; + + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; + }; + + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; + + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; + + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; + + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; + + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; + }; + }; + + spi2 { + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + }; + + spi3 { + + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; + + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; + + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; + + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; + + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; + + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; + + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; + + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; + + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; + + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; + + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; + + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; + }; + + spi4 { + + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; + + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; + + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; + + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; + + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; + + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; + + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; + }; + + tsadc { + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; + }; + + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; + + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + }; + + uart0 { + + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; + }; + + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; + + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; + }; + + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; + + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; + }; + + uart1 { + + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; + + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; + }; + + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; + + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; + + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; + + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; + + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; + }; + + uart2 { + + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; + + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; + + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; + + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; + + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; + }; + + uart3 { + + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; + + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; + + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; + + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; + + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; + + uart4 { + + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; + + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; + + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; + + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; + + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; + + uart5 { + + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; + + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; + + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; + }; + + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; + + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; + + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; + }; + }; + + uart6 { + + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; + }; + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; + }; + + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; + + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; + }; + + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; + + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; + }; + + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; + }; + + uart7 { + + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; + + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; + + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; + + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; + + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; + + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; + + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; + + uart8 { + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + }; + + uart9 { + + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; + }; + + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; + }; + + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; + + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; + }; + + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; + }; + + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; + + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; + }; + + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; + }; + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; + }; + }; + + vop { + + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; + + bt656 { + + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; + }; + + gpio-func { + + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; + + pcfg-pull-none-drv-level-7 { + bias-disable; + drive-strength = <0x07>; + phandle = <0x451>; + }; + + pcfg-pull-none-drv-level-8 { + bias-disable; + drive-strength = <0x08>; + phandle = <0x452>; + }; + + pcfg-pull-none-drv-level-9 { + bias-disable; + drive-strength = <0x09>; + phandle = <0x453>; + }; + + pcfg-pull-none-drv-level-10 { + bias-disable; + drive-strength = <0x0a>; + phandle = <0x454>; + }; + + pcfg-pull-none-drv-level-11 { + bias-disable; + drive-strength = <0x0b>; + phandle = <0x455>; + }; + + pcfg-pull-none-drv-level-12 { + bias-disable; + drive-strength = <0x0c>; + phandle = <0x456>; + }; + + pcfg-pull-none-drv-level-13 { + bias-disable; + drive-strength = <0x0d>; + phandle = <0x457>; + }; + + pcfg-pull-none-drv-level-14 { + bias-disable; + drive-strength = <0x0e>; + phandle = <0x458>; + }; + + pcfg-pull-none-drv-level-15 { + bias-disable; + drive-strength = <0x0f>; + phandle = <0x459>; + }; + + pcfg-pull-up-drv-level-7 { + bias-pull-up; + drive-strength = <0x07>; + phandle = <0x45a>; + }; + + pcfg-pull-up-drv-level-8 { + bias-pull-up; + drive-strength = <0x08>; + phandle = <0x45b>; + }; + + pcfg-pull-up-drv-level-9 { + bias-pull-up; + drive-strength = <0x09>; + phandle = <0x45c>; + }; + + pcfg-pull-up-drv-level-10 { + bias-pull-up; + drive-strength = <0x0a>; + phandle = <0x45d>; + }; + + pcfg-pull-up-drv-level-11 { + bias-pull-up; + drive-strength = <0x0b>; + phandle = <0x45e>; + }; + + pcfg-pull-up-drv-level-12 { + bias-pull-up; + drive-strength = <0x0c>; + phandle = <0x45f>; + }; + + pcfg-pull-up-drv-level-13 { + bias-pull-up; + drive-strength = <0x0d>; + phandle = <0x460>; + }; + + pcfg-pull-up-drv-level-14 { + bias-pull-up; + drive-strength = <0x0e>; + phandle = <0x461>; + }; + + pcfg-pull-up-drv-level-15 { + bias-pull-up; + drive-strength = <0x0f>; + phandle = <0x462>; + }; + + pcfg-pull-down-drv-level-7 { + bias-pull-down; + drive-strength = <0x07>; + phandle = <0x463>; + }; + + pcfg-pull-down-drv-level-8 { + bias-pull-down; + drive-strength = <0x08>; + phandle = <0x464>; + }; + + pcfg-pull-down-drv-level-9 { + bias-pull-down; + drive-strength = <0x09>; + phandle = <0x465>; + }; + + pcfg-pull-down-drv-level-10 { + bias-pull-down; + drive-strength = <0x0a>; + phandle = <0x466>; + }; + + pcfg-pull-down-drv-level-11 { + bias-pull-down; + drive-strength = <0x0b>; + phandle = <0x467>; + }; + + pcfg-pull-down-drv-level-12 { + bias-pull-down; + drive-strength = <0x0c>; + phandle = <0x468>; + }; + + pcfg-pull-down-drv-level-13 { + bias-pull-down; + drive-strength = <0x0d>; + phandle = <0x469>; + }; + + pcfg-pull-down-drv-level-14 { + bias-pull-down; + drive-strength = <0x0e>; + phandle = <0x46a>; + }; + + pcfg-pull-down-drv-level-15 { + bias-pull-down; + drive-strength = <0x0f>; + phandle = <0x46b>; + }; + + eth0 { + + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; + + gmac0 { + + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; + }; + + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; + + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; + + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; + + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; + + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; + }; + + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; + + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; + + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; + }; + + hym8563 { + + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; + }; + }; + + leds { + + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + usb-typec { + + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; + }; + + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; + }; + }; + + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; + }; + + wireless-bluetooth { + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + }; + + wireless-wlan { + + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; + + wdt-pc9202 { + + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; + + cam { + + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; + }; + }; + + rkcif-mipi-lvds4 { + compatible = "rockchip,rkcif-mipi-lvds"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "disabled"; + phandle = <0x1a1>; + }; + + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a1>; + status = "disabled"; + phandle = <0x472>; + }; + + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a1>; + status = "disabled"; + phandle = <0x473>; + }; + + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a1>; + status = "disabled"; + phandle = <0x474>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a1>; + status = "disabled"; + phandle = <0x475>; + }; + + rkcif-mipi-lvds5 { + compatible = "rockchip,rkcif-mipi-lvds"; + rockchip,hw = <0x4f>; + iommus = <0x50>; + status = "disabled"; + phandle = <0x1a2>; + }; + + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a2>; + status = "disabled"; + phandle = <0x476>; + }; + + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a2>; + status = "disabled"; + phandle = <0x477>; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a2>; + status = "disabled"; + phandle = <0x478>; + }; + + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + rockchip,cif = <0x1a2>; + status = "disabled"; + phandle = <0x479>; + }; + + usbdrd3_1 { + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + clock-names = "ref\0suspend\0bus"; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + status = "okay"; + phandle = <0x47a>; + + usb@fc400000 { + compatible = "snps,dwc3"; + reg = <0x00 0xfc400000 0x00 0x400000>; + interrupts = <0x00 0xdd 0x04>; + power-domains = <0x60 0x1f>; + resets = <0x02 0x2a7>; + reset-names = "usb3-otg"; + dr_mode = "host"; + phys = <0x1a3 0x1a4>; + phy-names = "usb2-phy\0usb3-phy"; + phy_type = "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + status = "okay"; + phandle = <0x47b>; + }; + }; + + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; + + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; + + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; + + syscon@fd5d4000 { + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + phandle = <0x1c8>; + + usb2-phy@4000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x4000 0x10>; + interrupts = <0x00 0x18a 0x04>; + resets = <0x02 0xc0048 0x02 0x489>; + reset-names = "phy\0apb"; + clocks = <0x02 0x2b5>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy1"; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + status = "okay"; + phandle = <0x1ca>; + + otg-port { + #phy-cells = <0x00>; + status = "okay"; + phy-supply = <0x75>; + phandle = <0x1a3>; + }; + }; + }; + + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; + + spdif-tx@fddb8000 { + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + interrupts = <0x00 0xc6 0x04>; + dmas = <0xf1 0x16>; + dma-names = "tx"; + clock-names = "mclk\0hclk"; + clocks = <0x02 0x20f 0x02 0x20a>; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + power-domains = <0x60 0x19>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x1e2>; + }; + + i2s@fddc8000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf2 0x16>; + dma-names = "tx"; + power-domains = <0x60 0x19>; + resets = <0x02 0x391>; + reset-names = "tx-m"; + rockchip,playback-only; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x47c>; + }; + + spdif-tx@fdde8000 { + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + interrupts = <0x00 0xc5 0x04>; + dmas = <0xf1 0x08>; + dma-names = "tx"; + clock-names = "mclk\0hclk"; + clocks = <0x02 0x25c 0x02 0x258>; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + power-domains = <0x60 0x1a>; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x47d>; + }; + + i2s@fddf4000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + dmas = <0xf2 0x04>; + dma-names = "tx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x3ef>; + reset-names = "tx-m"; + rockchip,always-on; + rockchip,hdmi-path; + rockchip,playback-only; + #sound-dai-cells = <0x00>; + status = "okay"; + phandle = <0x1e0>; + }; + + i2s@fddf8000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf2 0x15>; + dma-names = "rx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x3c3>; + reset-names = "rx-m"; + rockchip,capture-only; + #sound-dai-cells = <0x00>; + status = "okay"; + phandle = <0x1ec>; + }; + + i2s@fde00000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x00 0xfde00000 0x00 0x1000>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0xf2 0x18>; + dma-names = "rx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x417>; + reset-names = "rx-m"; + rockchip,capture-only; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x47e>; + }; + + spdif-rx@fde10000 { + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + reg = <0x00 0xfde10000 0x00 0x1000>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0x7c 0x16>; + dma-names = "rx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x3ff>; + reset-names = "spdifrx-m"; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x47f>; + }; + + spdif-rx@fde18000 { + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + reg = <0x00 0xfde18000 0x00 0x1000>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + dmas = <0x7c 0x17>; + dma-names = "rx"; + power-domains = <0x60 0x1a>; + resets = <0x02 0x401>; + reset-names = "spdifrx-m"; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x480>; + }; + + dp@fde60000 { + compatible = "rockchip,rk3588-dp"; + reg = <0x00 0xfde60000 0x00 0x4000>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + phys = <0x1a5>; + power-domains = <0x60 0x19>; + #sound-dai-cells = <0x01>; + status = "disabled"; + phandle = <0x1e3>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x1a6>; + status = "disabled"; + phandle = <0xdd>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x3e>; + status = "disabled"; + phandle = <0xe3>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0x1a7>; + status = "disabled"; + phandle = <0xeb>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x481>; + }; + }; + }; + }; + + hdmi@fdea0000 { + compatible = "rockchip,rk3588-dw-hdmi"; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + reset-names = "ref\0hdp"; + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + reg-io-width = <0x04>; + rockchip,grf = <0xc8>; + rockchip,vo1_grf = <0xd8>; + phys = <0x1ac>; + phy-names = "hdmi"; + #sound-dai-cells = <0x00>; + status = "disabled"; + phandle = <0x1e1>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x482>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x1ad>; + status = "disabled"; + phandle = <0xdf>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x3f>; + status = "disabled"; + phandle = <0xe5>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0x1ae>; + status = "disabled"; + phandle = <0xed>; + }; + }; + }; + }; + + edp@fded0000 { + compatible = "rockchip,rk3588-edp"; + reg = <0x00 0xfded0000 0x00 0x1000>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + reset-names = "dp\0apb"; + phys = <0x1af>; + phy-names = "dp"; + power-domains = <0x60 0x1a>; + rockchip,grf = <0xd8>; + status = "disabled"; + phandle = <0x483>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + reg = <0x00>; + remote-endpoint = <0x1b0>; + status = "disabled"; + phandle = <0xde>; + }; + + endpoint@1 { + reg = <0x01>; + remote-endpoint = <0x1b1>; + status = "disabled"; + phandle = <0xe4>; + }; + + endpoint@2 { + reg = <0x02>; + remote-endpoint = <0x1b2>; + status = "disabled"; + phandle = <0xec>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x484>; + }; + }; + }; + }; + + hdmirx-controller@fdee0000 { + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + reg = <0x00 0xfdee0000 0x00 0x6000>; + reg-names = "hdmirx_regs"; + power-domains = <0x60 0x1a>; + rockchip,grf = <0xc8>; + rockchip,vo1_grf = <0xd8>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + interrupt-names = "cec\0hdmi\0dma"; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + pinctrl-0 = <0x1b3 0x1b4>; + pinctrl-names = "default"; + status = "disabled"; + #sound-dai-cells = <0x01>; + hpd-trigger-level = <0x01>; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + phandle = <0x1eb>; + }; + + pcie@fe150000 { + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + #address-cells = <0x03>; + #size-cells = <0x02>; + bus-range = <0x00 0x0f>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + device_type = "pci"; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + #interrupt-cells = <0x01>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + linux,pci-domain = <0x00>; + num-ib-windows = <0x10>; + num-ob-windows = <0x10>; + num-viewport = <0x08>; + max-link-speed = <0x03>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + num-lanes = <0x01>; + phys = <0x1b7>; + phy-names = "pcie-phy"; + power-domains = <0x60 0x22>; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + reg-names = "pcie-apb\0pcie-dbi"; + resets = <0x02 0x20d 0x02 0x21c>; + reset-names = "pcie\0periph"; + rockchip,pipe-grf = <0x76>; + status = "okay"; + reset-gpios = <0x10d 0x0e 0x00>; + vpcie3v3-supply = <0x1b8>; + phandle = <0x485>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0x00>; + #interrupt-cells = <0x01>; + interrupt-parent = <0x01>; + interrupts = <0x00 0x104 0x01>; + phandle = <0x1b5>; + }; + }; + + pcie@fe160000 { + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + #address-cells = <0x03>; + #size-cells = <0x02>; + bus-range = <0x10 0x1f>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + device_type = "pci"; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + #interrupt-cells = <0x01>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + linux,pci-domain = <0x01>; + num-ib-windows = <0x10>; + num-ob-windows = <0x10>; + num-viewport = <0x08>; + max-link-speed = <0x03>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + num-lanes = <0x02>; + phys = <0x1b7>; + phy-names = "pcie-phy"; + power-domains = <0x60 0x22>; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + reg-names = "pcie-apb\0pcie-dbi"; + resets = <0x02 0x20e 0x02 0x21d>; + reset-names = "pcie\0periph"; + rockchip,pipe-grf = <0x76>; + status = "disabled"; + reset-gpios = <0x10d 0x08 0x00>; + vpcie3v3-supply = <0x1ba>; + phandle = <0x486>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0x00>; + #interrupt-cells = <0x01>; + interrupt-parent = <0x01>; + interrupts = <0x00 0xff 0x01>; + phandle = <0x1b9>; + }; + }; + + pcie@fe170000 { + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + #address-cells = <0x03>; + #size-cells = <0x02>; + bus-range = <0x20 0x2f>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + device_type = "pci"; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + #interrupt-cells = <0x01>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; + linux,pci-domain = <0x02>; + num-ib-windows = <0x08>; + num-ob-windows = <0x08>; + num-viewport = <0x04>; + max-link-speed = <0x02>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + num-lanes = <0x01>; + phys = <0x1bc 0x02>; + phy-names = "pcie-phy"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + reg-names = "pcie-apb\0pcie-dbi"; + resets = <0x02 0x20f 0x02 0x21e>; + reset-names = "pcie\0periph"; + rockchip,pipe-grf = <0x76>; + status = "disabled"; + phandle = <0x487>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0x00>; + #interrupt-cells = <0x01>; + interrupt-parent = <0x01>; + interrupts = <0x00 0xf0 0x01>; + phandle = <0x1bb>; + }; + }; + + uio@fe1b0000 { + compatible = "rockchip,uio-gmac"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + rockchip,ethernet = <0x1bd>; + status = "disabled"; + phandle = <0x488>; + }; + + ethernet@fe1b0000 { + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; + interrupt-names = "macirq\0eth_wake_irq"; + rockchip,grf = <0xc8>; + rockchip,php_grf = <0x76>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + resets = <0x02 0x20a>; + reset-names = "stmmaceth"; + power-domains = <0x60 0x21>; + snps,mixed-burst; + snps,tso; + snps,axi-config = <0x1be>; + snps,mtl-rx-config = <0x1bf>; + snps,mtl-tx-config = <0x1c0>; + status = "okay"; + phy-mode = "rgmii-rxid"; + clock_in_out = "output"; + snps,reset-gpio = <0x10d 0x02 0x01>; + snps,reset-active-low; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + pinctrl-names = "default"; + pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; + tx_delay = <0x31>; + phy-handle = <0x1c6>; + phandle = <0x1bd>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x489>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1c6>; + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + snps,rd_osr_lmt = <0x08>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + phandle = <0x1be>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x1bf>; + + queue0 { + }; + }; + + tx-queues-config { + snps,tx-queues-to-use = <0x01>; + phandle = <0x1c0>; + + queue0 { + }; + }; + }; + + sata@fe220000 { + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + reg = <0x00 0xfe220000 0x00 0x1000>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + phy-names = "sata-phy"; + ports-implemented = <0x01>; + status = "disabled"; + phandle = <0x48a>; + }; + + phy@fed70000 { + compatible = "rockchip,rk3588-hdptx-phy"; + reg = <0x00 0xfed70000 0x00 0x2000>; + clocks = <0x02 0x2b5 0x02 0x268>; + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + reset-names = "apb\0init\0cmn\0lane"; + rockchip,grf = <0x1c7>; + #phy-cells = <0x00>; + status = "disabled"; + phandle = <0x1af>; + }; + + hdmiphy@fed70000 { + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + reg = <0x00 0xfed70000 0x00 0x2000>; + clocks = <0x02 0x2b5 0x02 0x268>; + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + rockchip,grf = <0x1c7>; + #phy-cells = <0x00>; + status = "disabled"; + phandle = <0x1ac>; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; + }; + }; + + phy@fed90000 { + compatible = "rockchip,rk3588-usbdp-phy"; + reg = <0x00 0xfed90000 0x00 0x10000>; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usb-grf = <0x74>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + phandle = <0x48b>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; + + phy@fee10000 { + compatible = "rockchip,rk3588-naneng-combphy"; + reg = <0x00 0xfee10000 0x00 0x100>; + #phy-cells = <0x01>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + reset-names = "combphy-apb\0combphy"; + rockchip,pipe-grf = <0x76>; + rockchip,pipe-phy-grf = <0x1cb>; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + status = "disabled"; + phandle = <0x1bc>; + }; + + phy@fee80000 { + compatible = "rockchip,rk3588-pcie3-phy"; + reg = <0x00 0xfee80000 0x00 0x20000>; + #phy-cells = <0x00>; + clocks = <0x02 0x188>; + clock-names = "pclk"; + resets = <0x02 0x2000a>; + reset-names = "phy"; + rockchip,pipe-grf = <0x76>; + rockchip,phy-grf = <0x1cc>; + status = "okay"; + rockchip,pcie30-phymode = <0x01>; + phandle = <0x1b7>; + }; + + test-power { + status = "okay"; + }; + + vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0xb71b00>; + regulator-max-microvolt = <0xb71b00>; + phandle = <0x1cd>; + }; + + vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + vin-supply = <0x1cd>; + phandle = <0x78>; + }; + + vcc5v0-usbdcin { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usbdcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + vin-supply = <0x1cd>; + phandle = <0x48c>; + }; + + vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + vin-supply = <0x1cd>; + phandle = <0x1dd>; + }; + + vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-max-microvolt = <0x10c8e0>; + vin-supply = <0x78>; + phandle = <0x15c>; + }; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 ro rootwait overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all"; + phandle = <0x48d>; + }; + + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <0x02>; + rockchip,wake-irq = <0x00>; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + interrupts = <0x00 0x1a7 0x08>; + pinctrl-names = "default"; + pinctrl-0 = <0x1ce>; + status = "okay"; + phandle = <0x490>; + }; + + minidump { + compatible = "rockchip,minidump"; + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + status = "disabled"; + phandle = <0x491>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00 0x800000>; + linux,cma-default; + reg = <0x00 0x10000000 0x00 0x10000000>; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x37>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + + ramoops@110000 { + compatible = "ramoops"; + reg = <0x00 0x110000 0x00 0xe0000>; + boot-log-size = <0x8000>; + boot-log-count = <0x01>; + console-size = <0x80000>; + pmsg-size = <0x30000>; + ftrace-size = <0x00>; + record-size = <0x14000>; + phandle = <0x493>; + }; + + minidump-smem@1f0000 { + reg = <0x00 0x1f0000 0x00 0x100>; + no-map; + status = "disabled"; + phandle = <0x1cf>; + }; + + minidump-mem@c000000 { + reg = <0x00 0xc000000 0x00 0x2000000>; + no-map; + status = "disabled"; + phandle = <0x1d0>; + }; + }; + + pcie-essd { + compatible = "regulator-fixed"; + regulator-name = "pcie_essd"; + regulator-min-microvolt = <0x2625a0>; + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + gpios = <0x181 0x0f 0x00>; + startup-delay-us = <0x1388>; + vin-supply = <0x1cd>; + status = "disabled"; + phandle = <0x1ba>; + }; + + pcie-clk1 { + compatible = "regulator-fixed"; + regulator-name = "pcie_clk1"; + regulator-boot-on; + regulator-always-on; + gpios = <0x181 0x15 0x01>; + vin-supply = <0x1cd>; + status = "okay"; + phandle = <0x494>; + }; + + pcie-clk2 { + compatible = "regulator-fixed"; + regulator-name = "pcie_clk2"; + regulator-boot-on; + regulator-always-on; + gpios = <0x181 0x16 0x01>; + status = "okay"; + phandle = <0x495>; + }; + + pcie-clk3 { + compatible = "regulator-fixed"; + regulator-name = "pcie_clk3"; + regulator-boot-on; + regulator-always-on; + gpios = <0xfe 0x09 0x01>; + status = "okay"; + phandle = <0x496>; + }; + + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; + + power { + label = ":power"; + linux,default-trigger = "ir-power-click"; + default-state = "on"; + gpios = <0x7b 0x15 0x00>; + status = "disabled"; + phandle = <0x498>; + }; + + user { + label = ":user"; + linux,default-trigger = "ir-user-click"; + default-state = "off"; + gpios = <0x182 0x03 0x00>; + phandle = <0x499>; + }; + }; + + bt-sco { + status = "disabled"; + compatible = "delta,dfbmcs320"; + #sound-dai-cells = <0x01>; + phandle = <0x1d2>; + }; + + bt-sound { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + simple-audio-card,mclk-fs = <0x100>; + simple-audio-card,name = "rockchip,bt"; + phandle = <0x49a>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + hdmi0-sound { + status = "okay"; + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <0x80>; + rockchip,card-name = "rockchip-hdmi0"; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,jack-det; + phandle = <0x49b>; + }; + + dp0-sound { + status = "disabled"; + compatible = "rockchip,hdmi"; + rockchip,card-name = "rockchip-dp0"; + rockchip,mclk-fs = <0x200>; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,jack-det; + phandle = <0x49c>; + }; + + spdif-tx1-dc { + status = "disabled"; + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0x00>; + phandle = <0x1d8>; + }; + + spdif-tx1-sound { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,mclk-fs = <0x80>; + simple-audio-card,name = "rockchip,spdif-tx1"; + phandle = <0x49d>; + + simple-audio-card,cpu { + sound-dai = <0x1d7>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; + + adc-keys { + status = "okay"; + compatible = "adc-keys"; + io-channels = <0x1d9 0x01>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <0x1b7740>; + poll-interval = <0x64>; + phandle = <0x49e>; + + recovery-key { + label = "F12"; + linux,code = <0x58>; + press-threshold-microvolt = <0x4268>; + }; + }; + + es8388-sound { + status = "okay"; + compatible = "firefly,multicodecs-card"; + rockchip,card-name = "rockchip-es8388"; + hp-det-gpio = <0x79 0x13 0x00>; + hp-con-gpio = <0x182 0x0b 0x00>; + linein-type = <0x01>; + rockchip,format = "i2s"; + rockchip,mclk-fs = <0x180>; + rockchip,cpu = <0x1da>; + rockchip,codec = <0x1db>; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + pinctrl-names = "default"; + pinctrl-0 = <0x1dc>; + firefly,not-use-dapm; + phandle = <0x49f>; + }; + + vcc5v0-host { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + enable-active-high; + gpio = <0x182 0x02 0x00>; + vin-supply = <0x1dd>; + status = "okay"; + phandle = <0x75>; + }; + + vcc-hub-reset-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_hub_reset"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "disabled"; + gpio = <0x182 0x04 0x00>; + phandle = <0x4a0>; + }; + + vbus5v0-typec-pwr-en-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbus5v0_typec_pwr_en"; + enable-active-high; + status = "disabled"; + gpio = <0x182 0x0c 0x00>; + phandle = <0x17c>; + }; + + vcc-hub3-reset-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_hub3_reset"; + regulator-always-on; + enable-active-high; + status = "disabled"; + gpio = <0x182 0x06 0x00>; + phandle = <0x4a1>; + }; + + vcc5v0-host3 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-max-microvolt = <0x4c4b40>; + enable-active-high; + gpio = <0x182 0x07 0x00>; + vin-supply = <0x1dd>; + status = "disabled"; + phandle = <0x4a2>; + }; + + vcc-sata-pwr-en-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sata_pwr_en"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "okay"; + gpio = <0x182 0x0c 0x00>; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + startup-delay-us = <0x1388>; + vin-supply = <0x1cd>; + phandle = <0x4a3>; + }; + + vcc-fan-pwr-en-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_fan_pwr_en"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "disabled"; + gpio = <0x182 0x0b 0x00>; + phandle = <0x4a4>; + }; + + vcc-sdcard-pwr-en-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sdcard_pwr_en"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + gpio = <0xfe 0x07 0x00>; + status = "okay"; + phandle = <0x4a5>; + }; + + vcc3v3-pcie30 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <0x325aa0>; + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + gpios = <0x182 0x04 0x00>; + startup-delay-us = <0x1388>; + vin-supply = <0x1cd>; + status = "okay"; + phandle = <0x1b8>; + }; + + pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + vin-supply = <0x1de>; + phandle = <0x4a6>; + }; + + pcie30-avdd0v75 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v75"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-max-microvolt = <0xb71b0>; + vin-supply = <0x1df>; + phandle = <0x4a7>; + }; + + hdmi1-sound { + status = "disabled"; + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <0x80>; + rockchip,card-name = "rockchip-hdmi1"; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,jack-det; + phandle = <0x4a8>; + }; + + dp1-sound { + status = "disabled"; + compatible = "rockchip,hdmi"; + rockchip,card-name = "rockchip,dp1"; + rockchip,mclk-fs = <0x200>; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,jack-det; + phandle = <0x4a9>; + }; + + wireless-bluetooth { + compatible = "bluetooth-platdata"; + clocks = <0x1e4>; + clock-names = "ext_clock"; + uart_rts_gpios = <0xfe 0x02 0x01>; + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + pinctrl-1 = <0x1e9>; + BT,power_gpio = <0x7b 0x16 0x00>; + BT,wake_gpio = <0x7b 0x15 0x00>; + BT,wake_host_irq = <0x7b 0x00 0x00>; + status = "disabled"; + phandle = <0x4aa>; + }; + + wireless-wlan { + compatible = "wlan-platdata"; + wifi_chip_type = "rtl8822ce"; + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + status = "okay"; + phandle = <0x4ab>; + }; + + hdmiin-sound { + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <0x80>; + rockchip,format = "i2s"; + rockchip,bitclock-master = <0x1eb>; + rockchip,frame-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,jack-det; + phandle = <0x4ac>; + }; + + pwm-fan { + compatible = "pwm-fan"; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + pwms = <0x1ed 0x00 0xc350 0x00>; + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + phandle = <0x4ad>; + }; + + mod-sleep-regulator { + compatible = "regulator-fixed"; + regulator-name = "mod_sleep"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "okay"; + gpio = <0x7b 0x15 0x00>; + pinctrl-names = "default"; + pinctrl-0 = <0x1ee>; + phandle = <0x4ae>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc-hub-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_hub"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "okay"; + gpio = <0x182 0x01 0x00>; + phandle = <0x4af>; + }; + + vcc-4g-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_4g"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "okay"; + gpio = <0x182 0x00 0x00>; + phandle = <0x4b0>; + }; + + usb-5v { + compatible = "regulator-fixed"; + regulator-name = "usb_5v"; + regulator-boot-on; + regulator-always-on; + enable-active-high; + status = "okay"; + gpio = <0xfe 0x03 0x00>; + pinctrl-names = "default"; + pinctrl-0 = <0x1ef>; + phandle = <0x4b1>; + }; + + cam0-cam1-switch { + compatible = "regulator-fixed"; + regulator-name = "cam0_cam1_switch"; + regulator-min-microvolt = <0x1b7740>; + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + status = "okay"; + enable-active-high; + gpio = <0x181 0x11 0x00>; + pinctrl-names = "default"; + pinctrl-0 = <0x1f0>; + phandle = <0x4b2>; + }; + + __symbols__ { + spll = "/clocks/spll"; + xin32k = "/clocks/xin32k"; + xin24m = "/clocks/xin24m"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + mclkin_i2s0 = "/clocks/mclkin-i2s0"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + cpu_l0 = "/cpus/cpu@0"; + cpu_l1 = "/cpus/cpu@100"; + cpu_l2 = "/cpus/cpu@200"; + cpu_l3 = "/cpus/cpu@300"; + cpu_b0 = "/cpus/cpu@400"; + cpu_b1 = "/cpus/cpu@500"; + cpu_b2 = "/cpus/cpu@600"; + cpu_b3 = "/cpus/cpu@700"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + l2_cache_l2 = "/cpus/l2-cache-l2"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + l2_cache_b2 = "/cpus/l2-cache-b2"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + l3_cache = "/cpus/l3-cache"; + cluster0_opp_table = "/cluster0-opp-table"; + cluster1_opp_table = "/cluster1-opp-table"; + cluster2_opp_table = "/cluster2-opp-table"; + arm_pmu = "/arm-pmu"; + csi2_dcphy0 = "/csi2-dcphy0"; + csi2_dcphy1 = "/csi2-dcphy1"; + csi2_dphy0 = "/csi2-dphy0"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + csi2_dphy1 = "/csi2-dphy1"; + csi2_dphy2 = "/csi2-dphy2"; + csi2_dphy3 = "/csi2-dphy3"; + csi2_dphy4 = "/csi2-dphy4"; + csi2_dphy5 = "/csi2-dphy5"; + display_subsystem = "/display-subsystem"; + route_dp0 = "/display-subsystem/route/route-dp0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_edp0 = "/display-subsystem/route/route-edp0"; + route_edp1 = "/display-subsystem/route/route-edp1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + route_rgb = "/display-subsystem/route/route-rgb"; + route_dp1 = "/display-subsystem/route/route-dp1"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + dmc = "/dmc"; + dmc_opp_table = "/dmc-opp-table"; + scmi = "/firmware/scmi"; + scmi_clk = "/firmware/scmi/protocol@14"; + scmi_reset = "/firmware/scmi/protocol@16"; + sdei = "/firmware/sdei"; + optee = "/firmware/optee"; + jpege_ccu = "/jpege-ccu"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + mipi0_csi2 = "/mipi0-csi2"; + mipi1_csi2 = "/mipi1-csi2"; + mipi2_csi2 = "/mipi2-csi2"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi3_csi2 = "/mipi3-csi2"; + mipi4_csi2 = "/mipi4-csi2"; + mipi5_csi2 = "/mipi5-csi2"; + mpp_srv = "/mpp-srv"; + rkcif_dvp = "/rkcif-dvp"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + rkisp0_vir0 = "/rkisp0-vir0"; + rkisp0_vir1 = "/rkisp0-vir1"; + rkisp0_vir2 = "/rkisp0-vir2"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + rkisp0_vir3 = "/rkisp0-vir3"; + rkisp1_vir0 = "/rkisp1-vir0"; + rkisp1_vir1 = "/rkisp1-vir1"; + rkisp1_vir2 = "/rkisp1-vir2"; + rkisp1_vir3 = "/rkisp1-vir3"; + rkispp0_vir0 = "/rkispp0-vir0"; + rkispp1_vir0 = "/rkispp1-vir0"; + rkvenc_ccu = "/rkvenc-ccu"; + rkvtunnel = "/rkvtunnel"; + rockchip_suspend = "/rockchip-suspend"; + rockchip_system_monitor = "/rockchip-system-monitor"; + thermal_zones = "/thermal-zones"; + soc_thermal = "/thermal-zones/soc-thermal"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + target = "/thermal-zones/soc-thermal/trips/trip-point-1"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + center_thermal = "/thermal-zones/center-thermal"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + npu_thermal = "/thermal-zones/npu-thermal"; + scmi_shmem = "/sram@10f000/sram@0"; + gpu = "/gpu@fb000000"; + gpu_opp_table = "/gpu-opp-table"; + usbdrd3_0 = "/usbdrd3_0"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + usb_host0_ehci = "/usb@fc800000"; + usb_host0_ohci = "/usb@fc840000"; + usb_host1_ehci = "/usb@fc880000"; + usb_host1_ohci = "/usb@fc8c0000"; + mmu600_pcie = "/iommu@fc900000"; + mmu600_php = "/iommu@fcb00000"; + usbhost3_0 = "/usbhost3_0"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + pmu0_grf = "/syscon@fd588000"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + pmu1_grf = "/syscon@fd58a000"; + sys_grf = "/syscon@fd58c000"; + rgb = "/syscon@fd58c000/rgb"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + bigcore0_grf = "/syscon@fd590000"; + bigcore1_grf = "/syscon@fd592000"; + litcore_grf = "/syscon@fd594000"; + dsu_grf = "/syscon@fd598000"; + gpu_grf = "/syscon@fd5a0000"; + npu_grf = "/syscon@fd5a2000"; + vop_grf = "/syscon@fd5a4000"; + vo0_grf = "/syscon@fd5a6000"; + vo1_grf = "/syscon@fd5a8000"; + usb_grf = "/syscon@fd5ac000"; + php_grf = "/syscon@fd5b0000"; + mipidphy0_grf = "/syscon@fd5b4000"; + mipidphy1_grf = "/syscon@fd5b5000"; + pipe_phy0_grf = "/syscon@fd5bc000"; + pipe_phy2_grf = "/syscon@fd5c4000"; + usbdpphy0_grf = "/syscon@fd5c8000"; + usb2phy0_grf = "/syscon@fd5d0000"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + usb2phy2_grf = "/syscon@fd5d8000"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + hdptxphy0_grf = "/syscon@fd5e0000"; + mipidcphy0_grf = "/syscon@fd5e8000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + ioc = "/syscon@fd5f0000"; + cru = "/clock-controller@fd7c0000"; + i2c0 = "/i2c@fd880000"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; + hym8563 = "/i2c@fd880000/hym8563@51"; + uart0 = "/serial@fd890000"; + pwm0 = "/pwm@fd8b0000"; + pwm1 = "/pwm@fd8b0010"; + pwm2 = "/pwm@fd8b0020"; + pwm3 = "/pwm@fd8b0030"; + pmu = "/power-management@fd8d8000"; + power = "/power-management@fd8d8000/power-controller"; + rknpu = "/npu@fdab0000"; + npu_opp_table = "/npu-opp-table"; + rknpu_mmu = "/iommu@fdab9000"; + vepu = "/vepu@fdb50000"; + vdpu = "/vdpu@fdb50400"; + vdpu_mmu = "/iommu@fdb50800"; + avsd = "/avsd-plus@fdb51000"; + rga3_core0 = "/rga@fdb60000"; + rga3_0_mmu = "/iommu@fdb60f00"; + rga3_core1 = "/rga@fdb70000"; + rga3_1_mmu = "/iommu@fdb70f00"; + rga2 = "/rga@fdb80000"; + jpegd = "/jpegd@fdb90000"; + jpegd_mmu = "/iommu@fdb90480"; + jpege0 = "/jpege-core@fdba0000"; + jpege0_mmu = "/iommu@fdba0800"; + jpege1 = "/jpege-core@fdba4000"; + jpege1_mmu = "/iommu@fdba4800"; + jpege2 = "/jpege-core@fdba8000"; + jpege2_mmu = "/iommu@fdba8800"; + jpege3 = "/jpege-core@fdbac000"; + jpege3_mmu = "/iommu@fdbac800"; + iep = "/iep@fdbb0000"; + iep_mmu = "/iommu@fdbb0800"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + rkvenc0_mmu = "/iommu@fdbdf000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + rkvenc1_mmu = "/iommu@fdbef000"; + venc_opp_table = "/venc-opp-table"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rkvdec1 = "/rkvdec-core@fdc48000"; + rkvdec1_mmu = "/iommu@fdc48700"; + av1d = "/av1d@fdc70000"; + av1d_mmu = "/iommu@fdca0000"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkisp0 = "/rkisp@fdcb0000"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + isp0_mmu = "/iommu@fdcb7f00"; + rkisp1 = "/rkisp@fdcc0000"; + isp1_mmu = "/iommu@fdcc7f00"; + rkispp0 = "/rkispp@fdcd0000"; + fec0_mmu = "/iommu@fdcd0f00"; + rkispp1 = "/rkispp@fdcd8000"; + fec1_mmu = "/iommu@fdcd8f00"; + rkcif = "/rkcif@fdce0000"; + rkcif_mmu = "/iommu@fdce0800"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + vop = "/vop@fdd90000"; + vop_out = "/vop@fdd90000/ports"; + vp0 = "/vop@fdd90000/ports/port@0"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + vp1 = "/vop@fdd90000/ports/port@1"; + vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + vp2 = "/vop@fdd90000/ports/port@2"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + vp3 = "/vop@fdd90000/ports/port@3"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + vop_mmu = "/iommu@fdd97e00"; + spdif_tx2 = "/spdif-tx@fddb0000"; + i2s4_8ch = "/i2s@fddc0000"; + spdif_tx3 = "/spdif-tx@fdde0000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s9_8ch = "/i2s@fddfc000"; + spdif_rx0 = "/spdif-rx@fde08000"; + dsi0 = "/dsi@fde20000"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + dsi1 = "/dsi@fde30000"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + hdcp0 = "/hdcp@fde40000"; + dp0 = "/dp@fde50000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + hdcp1 = "/hdcp@fde70000"; + hdmi0 = "/hdmi@fde80000"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + edp0 = "/edp@fdec0000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; + qos_gpu_m0 = "/qos@fdf35000"; + qos_gpu_m1 = "/qos@fdf35200"; + qos_gpu_m2 = "/qos@fdf35400"; + qos_gpu_m3 = "/qos@fdf35600"; + qos_rga3_1 = "/qos@fdf36000"; + qos_sdio = "/qos@fdf39000"; + qos_sdmmc = "/qos@fdf3d800"; + qos_usb3_1 = "/qos@fdf3e000"; + qos_usb3_0 = "/qos@fdf3e200"; + qos_usb2host_0 = "/qos@fdf3e400"; + qos_usb2host_1 = "/qos@fdf3e600"; + qos_fisheye0 = "/qos@fdf40000"; + qos_fisheye1 = "/qos@fdf40200"; + qos_isp0_mro = "/qos@fdf40400"; + qos_isp0_mwo = "/qos@fdf40500"; + qos_vicap_m0 = "/qos@fdf40600"; + qos_vicap_m1 = "/qos@fdf40800"; + qos_isp1_mwo = "/qos@fdf41000"; + qos_isp1_mro = "/qos@fdf41100"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + qos_rkvenc1_m1ro = "/qos@fdf61200"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + qos_rkvdec0 = "/qos@fdf62000"; + qos_rkvdec1 = "/qos@fdf63000"; + qos_av1 = "/qos@fdf64000"; + qos_iep = "/qos@fdf66000"; + qos_jpeg_dec = "/qos@fdf66200"; + qos_jpeg_enc0 = "/qos@fdf66400"; + qos_jpeg_enc1 = "/qos@fdf66600"; + qos_jpeg_enc2 = "/qos@fdf66800"; + qos_jpeg_enc3 = "/qos@fdf66a00"; + qos_rga2_mro = "/qos@fdf66c00"; + qos_rga2_mwo = "/qos@fdf66e00"; + qos_rga3_0 = "/qos@fdf67000"; + qos_vdpu = "/qos@fdf67200"; + qos_npu1 = "/qos@fdf70000"; + qos_npu2 = "/qos@fdf71000"; + qos_npu0_mwr = "/qos@fdf72000"; + qos_npu0_mro = "/qos@fdf72200"; + qos_mcu_npu = "/qos@fdf72400"; + qos_hdcp0 = "/qos@fdf80000"; + qos_hdcp1 = "/qos@fdf81000"; + qos_hdmirx = "/qos@fdf81200"; + qos_vop_m0 = "/qos@fdf82000"; + qos_vop_m1 = "/qos@fdf82200"; + dfi = "/dfi@fe060000"; + pcie2x1l1 = "/pcie@fe180000"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + pcie2x1l2 = "/pcie@fe190000"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + gmac_uio1 = "/uio@fe1c0000"; + gmac1 = "/ethernet@fe1c0000"; + mdio1 = "/ethernet@fe1c0000/mdio"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + sata0 = "/sata@fe210000"; + sata2 = "/sata@fe230000"; + sfc = "/spi@fe2b0000"; + sdmmc = "/mmc@fe2c0000"; + sdio = "/mmc@fe2d0000"; + sdhci = "/mmc@fe2e0000"; + crypto = "/crypto@fe370000"; + rng = "/rng@fe378000"; + i2s0_8ch = "/i2s@fe470000"; + i2s1_8ch = "/i2s@fe480000"; + i2s2_2ch = "/i2s@fe490000"; + i2s3_2ch = "/i2s@fe4a0000"; + pdm0 = "/pdm@fe4b0000"; + pdm1 = "/pdm@fe4c0000"; + vad = "/vad@fe4d0000"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + acdcdig_dsm = "/codec-digital@fe500000"; + hwlock = "/hwspinlock@fe5a0000"; + gic = "/interrupt-controller@fe600000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + dmac0 = "/dma-controller@fea10000"; + dmac1 = "/dma-controller@fea30000"; + can0 = "/can@fea50000"; + can1 = "/can@fea60000"; + can2 = "/can@fea70000"; + hw_decompress = "/decompress@fea80000"; + i2c1 = "/i2c@fea90000"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + i2c2 = "/i2c@feaa0000"; + i2c3 = "/i2c@feab0000"; + pca9555 = "/i2c@feab0000/gpio@21"; + i2c4 = "/i2c@feac0000"; + i2c5 = "/i2c@fead0000"; + rktimer = "/timer@feae0000"; + wdt = "/watchdog@feaf0000"; + spi0 = "/spi@feb00000"; + spi1 = "/spi@feb10000"; + spi2 = "/spi@feb20000"; + rk806single = "/spi@feb20000/rk806single@0"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + spi3 = "/spi@feb30000"; + uart1 = "/serial@feb40000"; + uart2 = "/serial@feb50000"; + uart3 = "/serial@feb60000"; + uart4 = "/serial@feb70000"; + uart5 = "/serial@feb80000"; + uart6 = "/serial@feb90000"; + uart7 = "/serial@feba0000"; + uart8 = "/serial@febb0000"; + uart9 = "/serial@febc0000"; + pwm4 = "/pwm@febd0000"; + pwm5 = "/pwm@febd0010"; + pwm6 = "/pwm@febd0020"; + pwm7 = "/pwm@febd0030"; + pwm8 = "/pwm@febe0000"; + pwm9 = "/pwm@febe0010"; + pwm10 = "/pwm@febe0020"; + pwm11 = "/pwm@febe0030"; + pwm12 = "/pwm@febf0000"; + pwm13 = "/pwm@febf0010"; + pwm14 = "/pwm@febf0020"; + pwm15 = "/pwm@febf0030"; + tsadc = "/tsadc@fec00000"; + saradc = "/saradc@fec10000"; + mailbox0 = "/mailbox@fec60000"; + mailbox1 = "/mailbox@fec70000"; + i2c6 = "/i2c@fec80000"; + es8388 = "/i2c@fec80000/es8388@11"; + usbc0 = "/i2c@fec80000/fusb302@22"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + imx415 = "/i2c@fec80000/imx415@37"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + i2c7 = "/i2c@fec90000"; + i2c8 = "/i2c@feca0000"; + spi4 = "/spi@fecb0000"; + otp = "/otp@fecc0000"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + otp_id = "/otp@fecc0000/id@7"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + mailbox2 = "/mailbox@fece0000"; + dmac2 = "/dma-controller@fed10000"; + hdptxphy0 = "/phy@fed60000"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + usbdp_phy0 = "/phy@fed80000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + mipidcphy0 = "/phy@feda0000"; + mipidcphy1 = "/phy@fedb0000"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + combphy0_ps = "/phy@fee00000"; + combphy2_psu = "/phy@fee20000"; + syssram = "/sram@ff001000"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + pinctrl = "/pinctrl"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + gpio1 = "/pinctrl/gpio@fec20000"; + gpio2 = "/pinctrl/gpio@fec30000"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpio4 = "/pinctrl/gpio@fec50000"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + cif_clk = "/pinctrl/cif/cif-clk"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + mcum1_pins = "/pinctrl/mcu/mcum1-pins"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + sata_pins = "/pinctrl/sata/sata-pins"; + sata_reset = "/pinctrl/sata/sata-reset"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + vop_pins = "/pinctrl/vop/vop-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + usbdrd3_1 = "/usbdrd3_1"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + pcie30_phy_grf = "/syscon@fd5b8000"; + pipe_phy1_grf = "/syscon@fd5c0000"; + usbdpphy1_grf = "/syscon@fd5cc000"; + usb2phy1_grf = "/syscon@fd5d4000"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spdif_tx5 = "/spdif-tx@fddb8000"; + i2s8_8ch = "/i2s@fddc8000"; + spdif_tx4 = "/spdif-tx@fdde8000"; + i2s6_8ch = "/i2s@fddf4000"; + i2s7_8ch = "/i2s@fddf8000"; + i2s10_8ch = "/i2s@fde00000"; + spdif_rx1 = "/spdif-rx@fde10000"; + spdif_rx2 = "/spdif-rx@fde18000"; + dp1 = "/dp@fde60000"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + hdmi1 = "/hdmi@fdea0000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + edp1 = "/edp@fded0000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; + pcie3x4 = "/pcie@fe150000"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + pcie3x2 = "/pcie@fe160000"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + pcie2x1l0 = "/pcie@fe170000"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + gmac_uio0 = "/uio@fe1b0000"; + gmac0 = "/ethernet@fe1b0000"; + mdio0 = "/ethernet@fe1b0000/mdio"; + rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; + gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; + gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; + gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; + sata1 = "/sata@fe220000"; + hdptxphy1 = "/phy@fed70000"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + usbdp_phy1 = "/phy@fed90000"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; + combphy1_ps = "/phy@fee10000"; + pcie30phy = "/phy@fee80000"; + vcc12v_dcin = "/vcc12v-dcin"; + vcc5v0_sys = "/vcc5v0-sys"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + vcc5v0_usb = "/vcc5v0-usb"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + chosen = "/chosen"; + cspmu = "/cspmu@fd10c000"; + debug = "/debug@fd104000"; + fiq_debugger = "/fiq-debugger"; + minidump = "/minidump"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + ramoops = "/reserved-memory/ramoops@110000"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + pcie_essd = "/pcie-essd"; + pcie_clk1 = "/pcie-clk1"; + pcie_clk2 = "/pcie-clk2"; + pcie_clk3 = "/pcie-clk3"; + firefly_leds = "/leds"; + power_led = "/leds/power"; + user_led = "/leds/user"; + bt_sco = "/bt-sco"; + bt_sound = "/bt-sound"; + hdmi0_sound = "/hdmi0-sound"; + dp0_sound = "/dp0-sound"; + spdif_tx1_dc = "/spdif-tx1-dc"; + spdif_tx1_sound = "/spdif-tx1-sound"; + adc_keys = "/adc-keys"; + es8388_sound = "/es8388-sound"; + vcc5v0_host = "/vcc5v0-host"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + vcc5v0_host3 = "/vcc5v0-host3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + hdmi1_sound = "/hdmi1-sound"; + dp1_sound = "/dp1-sound"; + wireless_bluetooth = "/wireless-bluetooth"; + wireless_wlan = "/wireless-wlan"; + hdmiin_sound = "/hdmiin-sound"; + fan = "/pwm-fan"; + mod_sleep = "/mod-sleep-regulator"; + vcc_hub = "/vcc-hub-regulator"; + vcc_4g = "/vcc-4g-regulator"; + usb_5v = "/usb-5v"; + cam0_cam1_switch = "/cam0-cam1-switch"; + }; +}; diff --git a/configs/vms/linux-rk3588-aarch64-smp.toml b/configs/vms/linux-rk3588-aarch64-smp.toml index a62e75a8..85feee8b 100644 --- a/configs/vms/linux-rk3588-aarch64-smp.toml +++ b/configs/vms/linux-rk3588-aarch64-smp.toml @@ -19,18 +19,18 @@ phys_cpu_sets = [1, 2, 4, 8] # [kernel] # The entry point of the kernel image. -entry_point = 0x1008_0000 +entry_point = 0x1020_0000 # The load address of the kernel image. -kernel_load_addr = 0x1008_0000 +kernel_load_addr = 0x1020_0000 # The load address of the device tree blob (DTB). dtb_load_addr = 0x1000_0000 # The location of image: "memory" | "fs". # load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "/path/to/linux-aarch64.bin" +kernel_path = "Image-5.10.198" # The file path of the device tree blob (DTB). -dtb_path = "/path/to/dtb" +dtb_path = "aio-3588jd4.dtb" # load from file system. # image_location = "fs". diff --git a/scripts/make/rk3588.mk b/scripts/make/rk3588.mk index 49c0a444..51f795cf 100644 --- a/scripts/make/rk3588.mk +++ b/scripts/make/rk3588.mk @@ -1,13 +1,16 @@ RK3588_GITHUB_URL = https://github.com/arceos-hypervisor/platform_tools/releases/download/latest/rk3588.zip -RK3588_MKIMG_FILE = ./tools/rk3588/mkimg -check-download: -ifeq ("$(wildcard $(RK3588_MKIMG_FILE))","") +RK3588_MKIMAGE = ./tools/rk3588/mkimage + +OUT_IMG := $(OUT_DIR)/$(APP_NAME)_$(PLAT_NAME).img + +.PHONY: build_image + +build_image: build +ifeq ($(wildcard $(RK3588_MKIMAGE)),) @echo "file not found, downloading from $(RK3588_GITHUB_URL)..."; wget $(RK3588_GITHUB_URL); unzip -o rk3588.zip -d tools; - rm rk3588.zip; + rm rk3588.zip; endif - -kernel: check-download build - $(RK3588_MKIMG_FILE) --dtb rk3588-firefly-itx-3588j.dtb --img $(OUT_BIN) - @echo 'Built the FIT-uImage boot.img' + $(RK3588_MKIMAGE) -n axvisor -A arm64 -O linux -T kernel -C none -a 0x00480000 -e 0x00480000 -d $(OUT_BIN) $(OUT_IMG) + @echo 'Built the uboot image ${OUT_IMG} successfully!' \ No newline at end of file From 8a016067f55db7459d6a397229b339e6e2105617 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Thu, 29 May 2025 15:58:57 +0800 Subject: [PATCH 19/62] [wip] on dtb parsing --- Cargo.lock | 9 +- Cargo.toml | 2 + configs/vms/linux-qemu-aarch64.toml | 4 +- configs/vms/{aio-3588jd4.dts => rk3588.dts} | 22668 +++++++++--------- src/vmm/images.rs | 34 + 5 files changed, 11385 insertions(+), 11332 deletions(-) rename configs/vms/{aio-3588jd4.dts => rk3588.dts} (99%) diff --git a/Cargo.lock b/Cargo.lock index 1eb589a4..8947f7b0 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -167,7 +167,7 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#e537c7b5125130e85b12a57390a251a86227c2ec" +source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#4dd7e5df7949336a11936c50b99ab1c608871060" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -571,6 +571,7 @@ dependencies = [ "bitflags 2.9.0", "cfg-if", "crate_interface", + "fdt-parser", "kspin", "lazyinit", "log", @@ -879,6 +880,12 @@ dependencies = [ "log", ] +[[package]] +name = "fdt-parser" +version = "0.4.16" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d09dfa244d6891db105eefae4f3aa5752adcab254a95e24c17c3ebd76f6d77ba" + [[package]] name = "getrandom" version = "0.2.15" diff --git a/Cargo.toml b/Cargo.toml index d5a4b78b..d51befc9 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -45,6 +45,8 @@ page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.2.0", features = ["arm-el2"] } +fdt-parser = "0.4" + [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm" } diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index c2674378..6816883d 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -22,11 +22,11 @@ entry_point = 0x8008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" +kernel_path = "rk3588.dtb" # The load address of the kernel image. kernel_load_addr = 0x8008_0000 # The file path of the device tree blob (DTB). -dtb_path = "linux-qemu.dtb" +dtb_path = "rk3588.dtb" # The load address of the device tree blob (DTB). dtb_load_addr = 0x8000_0000 diff --git a/configs/vms/aio-3588jd4.dts b/configs/vms/rk3588.dts similarity index 99% rename from configs/vms/aio-3588jd4.dts rename to configs/vms/rk3588.dts index e4289218..9f4eeb7a 100644 --- a/configs/vms/aio-3588jd4.dts +++ b/configs/vms/rk3588.dts @@ -1,13131 +1,13141 @@ /dts-v1/; / { - compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - interrupt-parent = <0x01>; #address-cells = <0x02>; - #size-cells = <0x02>; model = "Firefly AIO-3588JD4"; + serial-number = "a0deeea630de3975"; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - aliases { - csi2dcphy0 = "/csi2-dcphy0"; - csi2dcphy1 = "/csi2-dcphy1"; - csi2dphy0 = "/csi2-dphy0"; - csi2dphy1 = "/csi2-dphy1"; - csi2dphy2 = "/csi2-dphy2"; - csi2dphy3 = "/csi2-dphy3"; - csi2dphy4 = "/csi2-dphy4"; - csi2dphy5 = "/csi2-dphy5"; - dsi0 = "/dsi@fde20000"; - dsi1 = "/dsi@fde30000"; - ethernet1 = "/ethernet@fe1c0000"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - gpio1 = "/pinctrl/gpio@fec20000"; - gpio2 = "/pinctrl/gpio@fec30000"; - gpio3 = "/pinctrl/gpio@fec40000"; - gpio4 = "/pinctrl/gpio@fec50000"; - i2c0 = "/i2c@fd880000"; - i2c1 = "/i2c@fea90000"; - i2c2 = "/i2c@feaa0000"; - i2c3 = "/i2c@feab0000"; - i2c4 = "/i2c@feac0000"; - i2c5 = "/i2c@fead0000"; - i2c6 = "/i2c@fec80000"; - i2c7 = "/i2c@fec90000"; - i2c8 = "/i2c@feca0000"; - rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - rkvdec0 = "/rkvdec-core@fdc38000"; - rkvdec1 = "/rkvdec-core@fdc48000"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - jpege0 = "/jpege-core@fdba0000"; - jpege1 = "/jpege-core@fdba4000"; - jpege2 = "/jpege-core@fdba8000"; - jpege3 = "/jpege-core@fdbac000"; - serial0 = "/serial@fd890000"; - serial1 = "/serial@feb40000"; - serial2 = "/serial@feb50000"; - serial3 = "/serial@feb60000"; - serial4 = "/serial@feb70000"; - serial5 = "/serial@feb80000"; - serial6 = "/serial@feb90000"; - serial7 = "/serial@feba0000"; - serial8 = "/serial@febb0000"; - serial9 = "/serial@febc0000"; - spi0 = "/spi@feb00000"; - spi1 = "/spi@feb10000"; - spi2 = "/spi@feb20000"; - spi3 = "/spi@feb30000"; - spi4 = "/spi@fecb0000"; - spi5 = "/spi@fe2b0000"; - hdcp0 = "/hdcp@fde40000"; - hdcp1 = "/hdcp@fde70000"; - pwm0 = "/pwm@fd8b0000"; - pwm1 = "/pwm@fd8b0010"; - pwm2 = "/pwm@fd8b0020"; - pwm3 = "/pwm@fd8b0030"; - pwm4 = "/pwm@febd0000"; - pwm5 = "/pwm@febd0010"; - pwm6 = "/pwm@febd0020"; - pwm7 = "/pwm@febd0030"; - pwm8 = "/pwm@febe0000"; - pwm9 = "/pwm@febe0010"; - pwm10 = "/pwm@febe0020"; - pwm11 = "/pwm@febe0030"; - pwm12 = "/pwm@febf0000"; - pwm13 = "/pwm@febf0010"; - pwm14 = "/pwm@febf0020"; - pwm15 = "/pwm@febf0030"; - dp0 = "/dp@fde50000"; - dp1 = "/dp@fde60000"; - edp0 = "/edp@fdec0000"; - edp1 = "/edp@fded0000"; - ethernet0 = "/ethernet@fe1b0000"; - hdptx0 = "/phy@fed60000"; - hdptx1 = "/phy@fed70000"; - hdptxhdmi0 = "/hdmiphy@fed60000"; - hdptxhdmi1 = "/hdmiphy@fed70000"; - hdmi0 = "/hdmi@fde80000"; - hdmi1 = "/hdmi@fdea0000"; - hdmirx0 = "/hdmirx-controller@fdee0000"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - usbdp0 = "/phy@fed80000"; - usbdp1 = "/phy@fed90000"; - mmc0 = "/mmc@fe2e0000"; - mmc1 = "/mmc@fe2c0000"; - mmc2 = "/mmc@fe2d0000"; + pcie30-avdd1v8 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pcie30_avdd1v8"; + compatible = "regulator-fixed"; + phandle = <0x4a6>; + vin-supply = <0x1de>; }; - clocks { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - spll { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x29d7ab80>; - clock-output-names = "spll"; - phandle = <0x1f1>; - }; + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0x1f2>; - }; + vcc5v0-host3 { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host3"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a2>; + vin-supply = <0x1dd>; + }; - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0x1f3>; - }; + pwm@febd0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0030 0x00 0x10>; + phandle = <0x2d4>; + }; - hclk_vo1@fd7c08ec { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x264>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x05>; - }; + rkisp@fdcc0000 { + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + phandle = <0x5a>; + }; - aclk_vdpu_low_pre@fd7c08b0 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1bc>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1f4>; - }; + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; - hclk_vo0@fd7c08dc { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x26d>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x04>; - }; + serial@febb0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebb0000 0x00 0x100>; + phandle = <0x2d0>; + dmas = <0xf2 0x09 0xf2 0x0a>; + reg-shift = <0x02>; + }; - hclk_usb@fd7c08a8 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x264>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1f5>; - }; + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; - hclk_nvm@fd7c087c { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c087c 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x141>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x03>; - }; + csi2-dcphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20e>; + }; - aclk_usb@fd7c08a8 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x263>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x6a>; - }; - - hclk_isp1_pre@fd7c0868 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1e1>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1f6>; - }; + rkispp0-vir0 { + rockchip,hw = <0x5b>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x243>; + }; - aclk_isp1_pre@fd7c0868 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1e0>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1f7>; - }; + wireless-bluetooth { + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + clock-names = "ext_clock"; + BT,power_gpio = <0x7b 0x16 0x00>; + clocks = <0x1e4>; + BT,wake_gpio = <0x7b 0x15 0x00>; + uart_rts_gpios = <0xfe 0x02 0x01>; + compatible = "bluetooth-platdata"; + BT,wake_host_irq = <0x7b 0x00 0x00>; + pinctrl-1 = <0x1e9>; + status = "disabled"; + phandle = <0x4aa>; + }; - aclk_rkvdec0_pre@fd7c08a0 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1bc>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1f8>; - }; + pwm@febd0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0020 0x00 0x10>; + phandle = <0x2d3>; + }; - hclk_rkvdec0_pre@fd7c08a0 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1be>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1f9>; - }; + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; - aclk_rkvdec1_pre@fd7c08a4 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1bc>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1fa>; - }; + cam0-cam1-switch { + regulator-max-microvolt = <0x1b7740>; + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x181 0x11 0x00>; + pinctrl-0 = <0x1f0>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "cam0_cam1_switch"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b2>; + }; - hclk_rkvdec1_pre@fd7c08a4 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1be>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1fb>; - }; + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; - aclk_jpeg_decoder_pre@fd7c08b0 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1bc>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1fc>; - }; + mipi2-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "okay"; + firefly-compatible; + phandle = <0x226>; - aclk_rkvenc1_pre@fd7c08c0 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1c5>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1fd>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - hclk_rkvenc1_pre@fd7c08c0 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1c4>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1fe>; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; - aclk_hdcp0_pre@fd7c08dc { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x26c>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x1ff>; - }; + endpoint@0 { + remote-endpoint = <0x4d>; + reg = <0x00>; + phandle = <0x33>; + }; + }; - aclk_hdcp1_pre@fd7c08ec { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x263>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x200>; - }; + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; - pclk_av1_pre@fd7c0910 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1be>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x201>; + endpoint@0 { + remote-endpoint = <0x4e>; + reg = <0x00>; + phandle = <0x54>; + }; + }; }; + }; - aclk_av1_pre@fd7c0910 { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - clock-names = "link"; - clocks = <0x02 0x1bc>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x202>; - }; + iommu@fdc48700 { + power-domains = <0x60 0x0f>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x62 0x04>; + clocks = <0x02 0x195 0x02 0x194>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec1_mmu"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + phandle = <0xcc>; + rockchip,master-handle-irq; + }; - hclk_sdio_pre@fd7c092c { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c092c 0x00 0x10>; - clock-names = "link"; - clocks = <0x03>; - #power-domain-cells = <0x01>; - #clock-cells = <0x00>; - phandle = <0x203>; - }; + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; - pclk_vo0_grf@fd7c08dc { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x04>; - clocks = <0x04>; - clock-names = "link"; - #clock-cells = <0x00>; - phandle = <0x72>; - }; + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; - pclk_vo1_grf@fd7c08ec { - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x04>; - clocks = <0x05>; - clock-names = "link"; - #clock-cells = <0x00>; - phandle = <0x73>; - }; + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; - mclkin-i2s0 { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - clock-output-names = "i2s0_mclkin"; - phandle = <0x204>; - }; + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; - mclkin-i2s1 { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - clock-output-names = "i2s1_mclkin"; - phandle = <0x205>; - }; + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; - mclkin-i2s2 { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - clock-output-names = "i2s2_mclkin"; - phandle = <0x206>; - }; + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; - mclkin-i2s3 { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - clock-output-names = "i2s3_mclkin"; - phandle = <0x207>; + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; }; - mclkout-i2s0@fd58c318 { - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - clocks = <0x02 0x39>; - #clock-cells = <0x00>; - clock-output-names = "i2s0_mclkout_to_io"; - rockchip,bit-shift = <0x00>; - rockchip,bit-set-to-disable; - rockchip,clk-ignore-unused; - phandle = <0x179>; + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; }; + }; - mclkout-i2s1@fd58c318 { - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - clock-output-names = "i2s1_mclkout_to_io"; - rockchip,bit-shift = <0x01>; - rockchip,bit-set-to-disable; - rockchip,clk-ignore-unused; - phandle = <0x208>; - }; + uio@fe1c0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + phandle = <0x28e>; + rockchip,ethernet = <0x109>; + }; - mclkout-i2s1@fd58a000 { - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58a000 0x00 0x04>; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - clock-output-names = "i2s1m1_mclkout_to_io"; - rockchip,bit-shift = <0x06>; - rockchip,clk-ignore-unused; - phandle = <0x209>; - }; + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; - mclkout-i2s2@fd58c318 { - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - clocks = <0x02 0x28>; - #clock-cells = <0x00>; - clock-output-names = "i2s2_mclkout_to_io"; - rockchip,bit-shift = <0x02>; - rockchip,bit-set-to-disable; - rockchip,clk-ignore-unused; - phandle = <0x20a>; - }; + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; - mclkout-i2s3@fd58c318 { - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - clocks = <0x02 0x2e>; - #clock-cells = <0x00>; - clock-output-names = "i2s3_mclkout_to_io"; - rockchip,bit-shift = <0x07>; - rockchip,bit-set-to-disable; - rockchip,clk-ignore-unused; - phandle = <0x20b>; - }; + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; }; - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; - cpu-map { + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; - cluster0 { + eth0 { - core0 { - cpu = <0x06>; - }; + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; - core1 { - cpu = <0x07>; - }; + i2c3 { - core2 { - cpu = <0x08>; - }; + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; - core3 { - cpu = <0x09>; - }; + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; }; - cluster1 { + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; - core0 { - cpu = <0x0a>; - }; + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; - core1 { - cpu = <0x0b>; - }; + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; }; + }; - cluster2 { + pwm9 { - core0 { - cpu = <0x0c>; - }; + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; - core1 { - cpu = <0x0d>; - }; + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; }; }; - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x11>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x64>; - cpu-supply = <0x12>; - mem-supply = <0x12>; - phandle = <0x06>; + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; }; - cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x100>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x13>; - phandle = <0x07>; - }; + mipi { - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x200>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x14>; - phandle = <0x08>; - }; + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; - cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x300>; - enable-method = "psci"; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - operating-points-v2 = <0x0f>; - cpu-idle-states = <0x10>; - i-cache-size = <0x8000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x80>; - d-cache-size = <0x8000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x80>; - next-level-cache = <0x15>; - phandle = <0x09>; - }; + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; - cpu@400 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x400>; - enable-method = "psci"; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x02>; - operating-points-v2 = <0x16>; - cpu-idle-states = <0x10>; - i-cache-size = <0x10000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x100>; - d-cache-size = <0x10000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x100>; - next-level-cache = <0x17>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x12c>; - cpu-supply = <0x18>; - mem-supply = <0x18>; - phandle = <0x0a>; - }; + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; - cpu@500 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x500>; - enable-method = "psci"; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x02>; - operating-points-v2 = <0x16>; - cpu-idle-states = <0x10>; - i-cache-size = <0x10000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x100>; - d-cache-size = <0x10000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x100>; - next-level-cache = <0x19>; - phandle = <0x0b>; - }; + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; - cpu@600 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x600>; - enable-method = "psci"; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x03>; - operating-points-v2 = <0x1a>; - cpu-idle-states = <0x10>; - i-cache-size = <0x10000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x100>; - d-cache-size = <0x10000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x100>; - next-level-cache = <0x1b>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x12c>; - cpu-supply = <0x1c>; - mem-supply = <0x1c>; - phandle = <0x0c>; - }; + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; - cpu@700 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x700>; - enable-method = "psci"; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x03>; - operating-points-v2 = <0x1a>; - cpu-idle-states = <0x10>; - i-cache-size = <0x10000>; - i-cache-line-size = <0x40>; - i-cache-sets = <0x100>; - d-cache-size = <0x10000>; - d-cache-line-size = <0x40>; - d-cache-sets = <0x100>; - next-level-cache = <0x1d>; - phandle = <0x0d>; - }; + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; - idle-states { - entry-method = "psci"; + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - phandle = <0x10>; + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; }; - }; - l2-cache-l0 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x11>; - }; + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; - l2-cache-l1 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x13>; - }; + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; - l2-cache-l2 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x14>; - }; + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; - l2-cache-l3 { - compatible = "cache"; - cache-size = <0x20000>; - cache-line-size = <0x40>; - cache-sets = <0x200>; - next-level-cache = <0x1e>; - phandle = <0x15>; + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; }; - l2-cache-b0 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <0x40>; - cache-sets = <0x400>; - next-level-cache = <0x1e>; - phandle = <0x17>; - }; + pwm14 { - l2-cache-b1 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <0x40>; - cache-sets = <0x400>; - next-level-cache = <0x1e>; - phandle = <0x19>; - }; + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; - l2-cache-b2 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <0x40>; - cache-sets = <0x400>; - next-level-cache = <0x1e>; - phandle = <0x1b>; - }; + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; - l2-cache-b3 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <0x40>; - cache-sets = <0x400>; - next-level-cache = <0x1e>; - phandle = <0x1d>; + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; }; - l3-cache { - compatible = "cache"; - cache-size = <0x300000>; - cache-line-size = <0x40>; - cache-sets = <0x1000>; - phandle = <0x1e>; + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; }; - }; - cluster0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - nvmem-cells = <0x1f 0x20 0x21>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,supported-hw; - rockchip,opp-shared-dsu; - rockchip,pvtm-hw = <0x06>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; - rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; - rockchip,pvtm-pvtpll; - rockchip,pvtm-offset = <0x64>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-freq = <0x159b40>; - rockchip,pvtm-volt = <0xb71b0>; - rockchip,pvtm-ref-temp = <0x19>; - rockchip,pvtm-temp-prop = <0xf4 0xf4>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,grf = <0x22>; - rockchip,dsu-grf = <0x23>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - low-volt-mem-read-margin = <0x04>; - intermediate-threshold-freq = <0xf6180>; - rockchip,reboot-freq = <0x159b40>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x2710>; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,high-temp = <0x14c08>; - rockchip,high-temp-max-freq = <0x188940>; - phandle = <0x0f>; + headphone { - opp-408000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - clock-latency-ns = <0x9c40>; + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; }; - opp-600000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + npu { - opp-816000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - clock-latency-ns = <0x9c40>; + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; }; - opp-1008000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + wireless-bluetooth { - opp-1200000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; - opp-1416000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; - opp-1608000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; - opp-1800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - clock-latency-ns = <0x9c40>; + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; }; - opp-j-m-408000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + pcie30x1 { - opp-j-m-600000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; - opp-j-m-816000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; - opp-j-m-1008000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; - opp-j-m-1200000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; - opp-j-1296000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; }; - opp-j-m-1416000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; + uart8 { - opp-j-m-1608000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; - opp-j-m-1704000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x6590fa00>; - opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - }; + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; - cluster1-opp-table { - compatible = "operating-points-v2"; - opp-shared; - nvmem-cells = <0x24 0x25 0x21>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,supported-hw; - rockchip,pvtm-hw = <0x06>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - rockchip,pvtm-pvtpll; - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-volt = <0xb71b0>; - rockchip,pvtm-ref-temp = <0x19>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,grf = <0x26>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - low-volt-mem-read-margin = <0x04>; - intermediate-threshold-freq = <0xf6180>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,reboot-freq = <0x1b7740>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x2710>; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,high-temp = <0x14c08>; - rockchip,high-temp-max-freq = <0x21b100>; - phandle = <0x16>; + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; - opp-408000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; - opp-600000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; - opp-816000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; - opp-1008000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; }; - opp-1200000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2 { - opp-1416000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; - opp-1608000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; - opp-1800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; - opp-2016000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x7829b800>; - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; - opp-2208000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x839b6800>; - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; - opp-2256000000 { - opp-supported-hw = <0xf9 0x13>; - opp-hz = <0x00 0x8677d400>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; - opp-2304000000 { - opp-supported-hw = <0xf9 0x24>; - opp-hz = <0x00 0x89544000>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; - opp-2352000000 { - opp-supported-hw = <0xf9 0x48>; - opp-hz = <0x00 0x8c30ac00>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; - opp-2400000000 { - opp-supported-hw = <0xf9 0x80>; - opp-hz = <0x00 0x8f0d1800>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; }; - opp-j-m-408000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; + pcfg-pull-up-drv-level-15 { + drive-strength = <0x0f>; + phandle = <0x462>; + bias-pull-up; }; - opp-j-m-600000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; + pcfg-pull-down-drv-level-13 { + drive-strength = <0x0d>; + bias-pull-down; + phandle = <0x469>; }; - opp-j-m-816000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; }; - opp-j-m-1008000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2s1 { - opp-j-m-1200000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; - opp-j-m-1416000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; - opp-j-m-1608000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; - opp-j-m-1800000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; - opp-j-m-2016000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x7829b800>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - }; + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; - cluster2-opp-table { - compatible = "operating-points-v2"; - opp-shared; - nvmem-cells = <0x27 0x28 0x21>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,supported-hw; - rockchip,pvtm-hw = <0x06>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - rockchip,pvtm-pvtpll; - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-volt = <0xb71b0>; - rockchip,pvtm-ref-temp = <0x19>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,grf = <0x29>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - low-volt-mem-read-margin = <0x04>; - intermediate-threshold-freq = <0xf6180>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,reboot-freq = <0x1b7740>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x2710>; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,high-temp = <0x14c08>; - rockchip,high-temp-max-freq = <0x21b100>; - phandle = <0x1a>; + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; - opp-408000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; - opp-600000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; - opp-816000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; - opp-1008000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; - opp-1200000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; - opp-1416000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; - opp-1608000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; - opp-1800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; - opp-2016000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x7829b800>; - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; - opp-2208000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x839b6800>; - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; - opp-2256000000 { - opp-supported-hw = <0xf9 0x13>; - opp-hz = <0x00 0x8677d400>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; - opp-2304000000 { - opp-supported-hw = <0xf9 0x24>; - opp-hz = <0x00 0x89544000>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; - opp-2352000000 { - opp-supported-hw = <0xf9 0x48>; - opp-hz = <0x00 0x8c30ac00>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; - opp-2400000000 { - opp-supported-hw = <0xf9 0x80>; - opp-hz = <0x00 0x8f0d1800>; - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - clock-latency-ns = <0x9c40>; - }; + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; - opp-j-m-408000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x18519600>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; - opp-j-m-600000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; }; - opp-j-m-816000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x30a32c00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + ddrphych2 { - opp-j-m-1008000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; }; - opp-j-m-1200000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; + pcfg-pull-none-drv-level-12 { + drive-strength = <0x0c>; + bias-disable; + phandle = <0x456>; }; - opp-j-m-1416000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x54667200>; - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-suspend; - }; + i2c1 { - opp-j-m-1608000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x5fd82200>; - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; - opp-j-m-1800000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x6b49d200>; - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; - opp-j-m-2016000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x7829b800>; - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - clock-latency-ns = <0x9c40>; + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; }; - }; - arm-pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0x01 0x07 0x08>; - interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; - phandle = <0x20c>; - }; + pwm7 { - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x2a 0x2b 0x2c>; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; - csi2-dcphy0 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x20d>; - }; + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; - csi2-dcphy1 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x20e>; - }; + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; - csi2-dphy0 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "okay"; - firefly-compatible; - phandle = <0x20f>; + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + pcfg-pull-none-drv-level-5 { + drive-strength = <0x05>; + bias-disable; + phandle = <0x2f1>; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; + gmac0 { - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x31>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x183>; - }; + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x32>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x184>; - }; + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; }; - port@1 { - reg = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x33>; - phandle = <0x4d>; - }; + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; }; - }; - }; - csi2-dphy1 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x210>; - }; + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; - csi2-dphy2 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x211>; - }; + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; - csi2-dphy3 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x212>; - }; + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; - csi2-dphy4 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x213>; - }; + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; - csi2-dphy5 { - compatible = "rockchip,rk3588-csi2-dphy"; - rockchip,hw = <0x2d 0x2e>; - phys = <0x2f 0x30>; - phy-names = "dcphy0\0dcphy1"; - status = "disabled"; - phandle = <0x214>; - }; + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x34>; - clocks = <0x35 0x36>; - clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; - memory-region = <0x37>; - memory-region-names = "drm-logo"; - phandle = <0x215>; + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + }; - route { + pwm12 { - route-dp0 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x38>; - phandle = <0x216>; + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; }; - route-dsi0 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x39>; - phandle = <0x217>; + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; }; + }; - route-dsi1 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x3a>; - phandle = <0x218>; - }; + usb-typec { - route-edp0 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x3b>; - phandle = <0x219>; + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; }; - route-edp1 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - phandle = <0x21a>; + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; }; + }; - route-hdmi0 { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x3c>; - phandle = <0x21b>; + uart6 { + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; }; - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x3d>; - phandle = <0x21c>; + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; }; - route-dp1 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x3e>; - phandle = <0x21d>; + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; }; - route-hdmi1 { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x3f>; - phandle = <0x21e>; + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; }; - }; - }; - dmc { - compatible = "rockchip,rk3588-dmc"; - interrupts = <0x00 0x49 0x04>; - interrupt-names = "complete"; - devfreq-events = <0x40>; - clocks = <0x0e 0x04>; - clock-names = "dmc_clk"; - operating-points-v2 = <0x41>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; - auto-freq-en = <0x01>; - status = "disabled"; - center-supply = <0x42>; - mem-supply = <0x43>; - phandle = <0x21f>; - }; + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; - dmc-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0x44 0x45 0x21>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,supported-hw; - rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x2710>; - rockchip,low-temp-min-volt = <0xb71b0>; - phandle = <0x41>; + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; - opp-528000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; }; - opp-1068000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3fa86300>; - opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + pcfg-pull-down-drv-level-8 { + drive-strength = <0x08>; + bias-pull-down; + phandle = <0x464>; }; - opp-1560000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x5cfbb600>; - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; - }; + gpu { - opp-2750000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0xa3e9ab80>; - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; }; - opp-j-m-528000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; + spi0 { - opp-j-m-1068000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x3fa86300>; - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; - opp-j-m-1560000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x5cfbb600>; - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; - opp-j-m-2750000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0xa3e9ab80>; - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - }; + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; - firmware { + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; - scmi { - compatible = "arm,scmi-smc"; - shmem = <0x46>; - arm,smc-id = <0x82000010>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x220>; + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; - protocol@14 { - reg = <0x14>; - #clock-cells = <0x01>; - assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; - assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; - phandle = <0x0e>; + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; }; - protocol@16 { - reg = <0x16>; - #reset-cells = <0x01>; - phandle = <0x11a>; + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; }; - }; - sdei { - compatible = "arm,sdei-1.0"; - method = "smc"; - phandle = <0x221>; - }; + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - phandle = <0x222>; - }; - }; + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; - jpege-ccu { - compatible = "rockchip,vpu-jpege-ccu"; - status = "okay"; - phandle = <0xbd>; - }; + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; - mipi-dcphy-dummy { - phandle = <0x223>; - }; + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; - mipi0-csi2 { - compatible = "rockchip,rk3588-mipi-csi2"; - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - status = "disabled"; - phandle = <0x224>; - }; + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + }; - mipi1-csi2 { - compatible = "rockchip,rk3588-mipi-csi2"; - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - status = "disabled"; - phandle = <0x225>; - }; + fspi { - mipi2-csi2 { - compatible = "rockchip,rk3588-mipi-csi2"; - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - status = "okay"; - firefly-compatible; - phandle = <0x226>; + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x4d>; - phandle = <0x33>; - }; + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; }; - port@1 { - reg = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x4e>; - phandle = <0x54>; - }; + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; }; }; - }; - mipi3-csi2 { - compatible = "rockchip,rk3588-mipi-csi2"; - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - status = "disabled"; - phandle = <0x227>; - }; + pcfg-pull-up-drv-level-13 { + drive-strength = <0x0d>; + phandle = <0x460>; + bias-pull-up; + }; - mipi4-csi2 { - compatible = "rockchip,rk3588-mipi-csi2"; - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - status = "disabled"; - phandle = <0x228>; - }; + clk32k { - mipi5-csi2 { - compatible = "rockchip,rk3588-mipi-csi2"; - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - status = "disabled"; - phandle = <0x229>; - }; + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; - mpp-srv { - compatible = "rockchip,mpp-service"; - rockchip,taskqueue-count = <0x0c>; - rockchip,resetgroup-count = <0x01>; - status = "okay"; - phandle = <0xb8>; - }; + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; - rkcif-dvp { - compatible = "rockchip,rkcif-dvp"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "disabled"; - phandle = <0x51>; - }; + pcfg-pull-down-drv-level-11 { + drive-strength = <0x0b>; + bias-pull-down; + phandle = <0x467>; + }; - rkcif-dvp-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x51>; - status = "disabled"; - phandle = <0x22a>; - }; + pcie30phy { - rkcif-mipi-lvds { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "disabled"; - phandle = <0x52>; - }; + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; - rkcif-mipi-lvds-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x52>; - status = "disabled"; - phandle = <0x22b>; - }; + pcfg-pull-up-drv-level-0 { + drive-strength = <0x00>; + phandle = <0x2f3>; + bias-pull-up; + }; - rkcif-mipi-lvds-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x52>; - status = "disabled"; - phandle = <0x22c>; - }; + ddrphych0 { - rkcif-mipi-lvds-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x52>; - status = "disabled"; - phandle = <0x22d>; - }; + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; - rkcif-mipi-lvds-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x52>; - status = "disabled"; - phandle = <0x22e>; - }; + pcfg-pull-none-drv-level-10 { + drive-strength = <0x0a>; + bias-disable; + phandle = <0x454>; + }; - rkcif-mipi-lvds1 { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "disabled"; - phandle = <0x53>; - }; + pwm5 { - rkcif-mipi-lvds1-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x53>; - status = "disabled"; - phandle = <0x22f>; - }; + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; - rkcif-mipi-lvds1-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x53>; - status = "disabled"; - phandle = <0x230>; - }; + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; - rkcif-mipi-lvds1-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x53>; - status = "disabled"; - phandle = <0x231>; - }; + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + }; - rkcif-mipi-lvds1-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x53>; - status = "disabled"; - phandle = <0x232>; - }; + pcfg-pull-none-drv-level-3 { + drive-strength = <0x03>; + bias-disable; + phandle = <0x2ef>; + }; - rkcif-mipi-lvds2 { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "okay"; - phandle = <0x55>; + pwm10 { - port { + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; - endpoint { - remote-endpoint = <0x54>; - phandle = <0x4e>; + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; }; }; - }; - rkcif-mipi-lvds2-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x55>; - status = "okay"; - phandle = <0x233>; + pcfg-pull-down-smt { + input-schmitt-enable; + bias-pull-down; + phandle = <0x2ff>; + }; - port { + gpio@fec50000 { + gpio-controller; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec50000 0x00 0x100>; + phandle = <0x10d>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + }; - endpoint { - remote-endpoint = <0x56>; - phandle = <0x59>; - }; + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; }; - }; - rkcif-mipi-lvds2-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x55>; - status = "disabled"; - phandle = <0x234>; - }; + uart4 { - rkcif-mipi-lvds2-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x55>; - status = "disabled"; - phandle = <0x235>; - }; + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; - rkcif-mipi-lvds2-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x55>; - status = "disabled"; - phandle = <0x236>; - }; + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; - rkcif-mipi-lvds3 { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "disabled"; - phandle = <0x57>; - }; + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; - rkcif-mipi-lvds3-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x57>; - status = "disabled"; - phandle = <0x237>; - }; + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; - rkcif-mipi-lvds3-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x57>; - status = "disabled"; - phandle = <0x238>; - }; + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; - rkcif-mipi-lvds3-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x57>; - status = "disabled"; - phandle = <0x239>; - }; + spdif0 { - rkcif-mipi-lvds3-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x57>; - status = "disabled"; - phandle = <0x23a>; - }; + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; - rkisp0-vir0 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x58>; - status = "disabled"; - phandle = <0x23b>; - }; + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; - rkisp0-vir1 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x58>; - status = "disabled"; - phandle = <0x23c>; - }; + pcfg-pull-down-drv-level-6 { + drive-strength = <0x06>; + bias-pull-down; + phandle = <0x2fd>; + }; - rkisp0-vir2 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x58>; - status = "okay"; - phandle = <0x23d>; + pcfg-pull-up-drv-level-9 { + drive-strength = <0x09>; + phandle = <0x45c>; + bias-pull-up; + }; - port { - #address-cells = <0x01>; - #size-cells = <0x00>; + pcfg-pull-none-drv-level-1-smt { + drive-strength = <0x01>; + bias-disable; + input-schmitt-enable; + phandle = <0x19c>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x59>; - phandle = <0x56>; - }; + pcfg-pull-up-drv-level-11 { + drive-strength = <0x0b>; + phandle = <0x45e>; + bias-pull-up; }; - }; - rkisp0-vir3 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x58>; - status = "disabled"; - phandle = <0x23e>; - }; - - rkisp1-vir0 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x5a>; - status = "disabled"; - phandle = <0x23f>; - }; + mcu { - rkisp1-vir1 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x5a>; - status = "disabled"; - phandle = <0x240>; - }; + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; - rkisp1-vir2 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x5a>; - status = "disabled"; - phandle = <0x241>; - }; + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + }; - rkisp1-vir3 { - compatible = "rockchip,rkisp-vir"; - rockchip,hw = <0x5a>; - status = "disabled"; - phandle = <0x242>; - }; + i2c8 { - rkispp0-vir0 { - compatible = "rockchip,rk3588-rkispp-vir"; - rockchip,hw = <0x5b>; - status = "disabled"; - phandle = <0x243>; - }; + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; - rkispp1-vir0 { - compatible = "rockchip,rk3588-rkispp-vir"; - rockchip,hw = <0x5c>; - status = "disabled"; - phandle = <0x244>; - }; + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; - rkvenc-ccu { - compatible = "rockchip,rkv-encoder-v2-ccu"; - status = "okay"; - phandle = <0xc3>; - }; + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; - rkvtunnel { - compatible = "rockchip,video-tunnel"; - status = "disabled"; - phandle = <0x245>; - }; + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; - rockchip-suspend { - compatible = "rockchip,pm-rk3588"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5000604>; - rockchip,wakeup-config = <0x100>; - phandle = <0x246>; - }; + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + }; - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - phandle = <0x247>; - }; + dp0 { - thermal-zones { - phandle = <0x248>; + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x834>; - thermal-sensors = <0x5d 0x00>; - phandle = <0x249>; + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; - trips { + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + }; - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x24a>; - }; + pcfg-pull-none-drv-level-5-smt { + drive-strength = <0x05>; + bias-disable; + input-schmitt-enable; + phandle = <0x19b>; + }; - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x5e>; - }; + pwm3 { - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0x24b>; - }; + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; }; - cooling-maps { - - map0 { - trip = <0x5e>; - cooling-device = <0x06 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map1 { - trip = <0x5e>; - cooling-device = <0x0a 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; - map2 { - trip = <0x5e>; - cooling-device = <0x0c 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; - map3 { - trip = <0x5e>; - cooling-device = <0x5f 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; }; }; - bigcore0-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x5d 0x01>; - phandle = <0x24c>; + pcfg-pull-none-drv-level-1 { + drive-strength = <0x01>; + bias-disable; + phandle = <0x2ee>; }; - bigcore1-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x5d 0x02>; - phandle = <0x24d>; - }; + sata2 { - littlecore-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x5d 0x03>; - phandle = <0x24e>; - }; + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; - center-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x5d 0x04>; - phandle = <0x24f>; + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; }; - gpu-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x5d 0x05>; - phandle = <0x250>; - }; + cam { - npu-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - thermal-sensors = <0x5d 0x06>; - phandle = <0x251>; + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; }; - }; - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; + uart2 { - sram@10f000 { - compatible = "mmio-sram"; - reg = <0x00 0x10f000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0x10f000 0x100>; + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; - sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x100>; - phandle = <0x46>; - }; - }; + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; - gpu@fb000000 { - compatible = "arm,mali-bifrost"; - reg = <0x00 0xfb000000 0x00 0x200000>; - interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; - clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; - assigned-clocks = <0x0e 0x05>; - assigned-clock-rates = <0xbebc200>; - power-domains = <0x60 0x0c>; - operating-points-v2 = <0x61>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0xba6>; - upthreshold = <0x1e>; - downdifferential = <0x0a>; - status = "okay"; - mali-supply = <0x62>; - mem-supply = <0x62>; - phandle = <0x5f>; - }; + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; - gpu-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0x63 0x64 0x21>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,supported-hw; - rockchip,pvtm-hw = <0x04>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - rockchip,pvtm-pvtpll; - rockchip,pvtm-offset = <0x1c>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-volt = <0xb71b0>; - rockchip,pvtm-ref-temp = <0x19>; - rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; - rockchip,pvtm-thermal-zone = "gpu-thermal"; - rockchip,opp-clocks = <0x02 0x114>; - rockchip,grf = <0x65>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - low-volt-mem-read-margin = <0x04>; - intermediate-threshold-freq = <0x61a80>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x2710>; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,high-temp = <0x14c08>; - rockchip,high-temp-max-freq = "\0\f5"; - phandle = <0x61>; + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; - opp-300000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x11e1a300>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; }; - opp-400000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + pcfg-pull-down-drv-level-4 { + drive-strength = <0x04>; + bias-pull-down; + phandle = <0x2fb>; }; - opp-500000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x1dcd6500>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + pcfg-pull-up-drv-level-7 { + drive-strength = <0x07>; + phandle = <0x45a>; + bias-pull-up; }; - opp-600000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + i2c6 { - opp-700000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; - opp-800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - }; + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; - opp-900000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - }; + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; - opp-1000000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; - opp-j-m-300000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x11e1a300>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; }; - opp-j-m-400000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1 { - opp-j-m-500000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x1dcd6500>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; - opp-j-m-600000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; - opp-j-m-700000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; - opp-j-850000000 { - opp-supported-hw = <0x04 0xffff>; - opp-hz = <0x00 0x32a9f880>; - opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; - opp-m-800000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; - opp-m-900000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; - opp-m-1000000000 { - opp-supported-hw = <0x02 0xffff>; - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - }; + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; - usbdrd3_0 { - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; - clock-names = "ref\0suspend\0bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "okay"; - phandle = <0x252>; + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; - usb@fc000000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfc000000 0x00 0x400000>; - interrupts = <0x00 0xdc 0x04>; - power-domains = <0x60 0x1f>; - resets = <0x02 0x2a4>; - reset-names = "usb3-otg"; - dr_mode = "host"; - phys = <0x66 0x67>; - phy-names = "usb2-phy\0usb3-phy"; - phy_type = "utmi_wide"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - quirk-skip-phy-init; - status = "okay"; - usb-role-switch; - phandle = <0x253>; + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; - port { - #address-cells = <0x01>; - #size-cells = <0x00>; + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x68>; - phandle = <0x17d>; - }; + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; }; }; - }; - usb@fc800000 { - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - reg = <0x00 0xfc800000 0x00 0x40000>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6b>; - phys = <0x6c>; - phy-names = "usb2-phy"; - power-domains = <0x60 0x1f>; - status = "okay"; - phandle = <0x254>; - }; + cpu { - usb@fc840000 { - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - reg = <0x00 0xfc840000 0x00 0x40000>; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - phys = <0x6c>; - phy-names = "usb2-phy"; - power-domains = <0x60 0x1f>; - status = "okay"; - phandle = <0x6b>; - }; + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; - usb@fc880000 { - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - reg = <0x00 0xfc880000 0x00 0x40000>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6e>; - phys = <0x6f>; - phy-names = "usb2-phy"; - power-domains = <0x60 0x1f>; - status = "okay"; - phandle = <0x255>; - }; + gpio-func { - usb@fc8c0000 { - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - reg = <0x00 0xfc8c0000 0x00 0x40000>; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - phys = <0x6f>; - phy-names = "usb2-phy"; - power-domains = <0x60 0x1f>; - status = "okay"; - phandle = <0x6e>; - }; + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; - iommu@fc900000 { - compatible = "arm,smmu-v3"; - reg = <0x00 0xfc900000 0x00 0x200000>; - interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - #iommu-cells = <0x01>; - status = "disabled"; - phandle = <0x256>; - }; + pcie20x1 { - iommu@fcb00000 { - compatible = "arm,smmu-v3"; - reg = <0x00 0xfcb00000 0x00 0x200000>; - interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - #iommu-cells = <0x01>; - status = "disabled"; - phandle = <0x257>; - }; + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; - usbhost3_0 { - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; - clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "disabled"; - phandle = <0x258>; + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; - usb@fcd00000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfcd00000 0x00 0x400000>; - interrupts = <0x00 0xde 0x04>; - resets = <0x02 0x237>; - reset-names = "usb3-host"; - dr_mode = "host"; - phys = <0x70 0x04>; - phy-names = "usb3-phy"; - phy_type = "utmi_wide"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - status = "disabled"; - phandle = <0x259>; + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; }; - }; - syscon@fd588000 { - compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd588000 0x00 0x2000>; - phandle = <0x25a>; + leds { - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x80>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - mode-panic = <0x5242c307>; - mode-watchdog = <0x5242c308>; - mode-quiescent = <0x5242c30e>; - mode-winusb = <0x5242c30f>; - phandle = <0x25b>; + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; }; - }; - syscon@fd58a000 { - compatible = "rockchip,rk3588-pmu1-grf\0syscon"; - reg = <0x00 0xfd58a000 0x00 0x2000>; - phandle = <0x104>; - }; + pwm1 { - syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd58c000 0x00 0x1000>; - phandle = <0xc8>; + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; - rgb { - compatible = "rockchip,rk3588-rgb"; - pinctrl-names = "default"; - pinctrl-0 = <0x71>; - status = "disabled"; - phandle = <0x25c>; + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; + sata0 { - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x3d>; - status = "disabled"; - phandle = <0xf0>; - }; - }; + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; }; }; - }; - syscon@fd590000 { - compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; - reg = <0x00 0xfd590000 0x00 0x100>; - phandle = <0x26>; - }; + refclk { - syscon@fd592000 { - compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; - reg = <0x00 0xfd592000 0x00 0x100>; - phandle = <0x29>; - }; + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; - syscon@fd594000 { - compatible = "rockchip,rk3588-litcore-grf\0syscon"; - reg = <0x00 0xfd594000 0x00 0x100>; - phandle = <0x22>; - }; + pcie30x4 { - syscon@fd598000 { - compatible = "rockchip,rk3588-dsu-grf\0syscon"; - reg = <0x00 0xfd598000 0x00 0x100>; - phandle = <0x23>; - }; + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; - syscon@fd5a0000 { - compatible = "rockchip,rk3588-gpu-grf\0syscon"; - reg = <0x00 0xfd5a0000 0x00 0x100>; - phandle = <0x65>; - }; + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; - syscon@fd5a2000 { - compatible = "rockchip,rk3588-npu-grf\0syscon"; - reg = <0x00 0xfd5a2000 0x00 0x100>; - phandle = <0xb6>; - }; + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; - syscon@fd5a4000 { - compatible = "rockchip,rk3588-vop-grf\0syscon"; - reg = <0x00 0xfd5a4000 0x00 0x2000>; - phandle = <0xd7>; - }; + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; - syscon@fd5a6000 { - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a6000 0x00 0x2000>; - clocks = <0x72>; - phandle = <0xf5>; - }; + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + }; - syscon@fd5a8000 { - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a8000 0x00 0x100>; - clocks = <0x73>; - phandle = <0xd8>; - }; + can2 { - syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf\0syscon"; - reg = <0x00 0xfd5ac000 0x00 0x4000>; - phandle = <0x74>; - }; + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; - syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf\0syscon"; - reg = <0x00 0xfd5b0000 0x00 0x1000>; - phandle = <0x76>; - }; + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + }; - syscon@fd5b4000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b4000 0x00 0x1000>; - phandle = <0x192>; - }; + litcpu { - syscon@fd5b5000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b5000 0x00 0x1000>; - phandle = <0x193>; - }; + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; - syscon@fd5bc000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5bc000 0x00 0x100>; - phandle = <0x194>; - }; + sata { - syscon@fd5c4000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c4000 0x00 0x100>; - phandle = <0x195>; - }; + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; - syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5c8000 0x00 0x4000>; - phandle = <0x18c>; - }; + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; - syscon@fd5d0000 { - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d0000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x18b>; + tsadc { - usb2-phy@0 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0x00 0x10>; - interrupts = <0x00 0x189 0x04>; - resets = <0x02 0xc0047 0x02 0x488>; - reset-names = "phy\0apb"; - clocks = <0x02 0x2b5>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy0"; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - status = "okay"; - phandle = <0x18d>; + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; - otg-port { - #phy-cells = <0x00>; - status = "okay"; - rockchip,typec-vbus-det; - phandle = <0x66>; + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; }; }; - }; - syscon@fd5d8000 { - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d8000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x25d>; + uart0 { - usb2-phy@8000 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0x8000 0x10>; - interrupts = <0x00 0x187 0x04>; - resets = <0x02 0xc0049 0x02 0x48a>; - reset-names = "phy\0apb"; - clocks = <0x02 0x2b5>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy2"; - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x69>; + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; - host-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x75>; - phandle = <0x6c>; + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; }; - }; - }; - syscon@fd5dc000 { - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5dc000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x25e>; + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; - usb2-phy@c000 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0xc000 0x10>; - interrupts = <0x00 0x188 0x04>; - resets = <0x02 0xc004a 0x02 0x48b>; - reset-names = "phy\0apb"; - clocks = <0x02 0x2b5>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy3"; - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x6d>; + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; - host-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x75>; - phandle = <0x6f>; + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; }; }; - }; - - syscon@fd5e0000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e0000 0x00 0x100>; - phandle = <0x18a>; - }; - syscon@fd5e8000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5e8000 0x00 0x4000>; - phandle = <0x190>; - }; + pcfg-pull-down-drv-level-2 { + drive-strength = <0x02>; + bias-pull-down; + phandle = <0x2f9>; + }; - syscon@fd5ec000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5ec000 0x00 0x4000>; - phandle = <0x191>; - }; - - syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc\0syscon"; - reg = <0x00 0xfd5f0000 0x00 0x10000>; - phandle = <0x196>; - }; - - clock-controller@fd7c0000 { - compatible = "rockchip,rk3588-cru"; - rockchip,grf = <0x76>; - reg = <0x00 0xfd7c0000 0x00 0x5c000>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; - assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; - phandle = <0x02>; - }; - - i2c@fd880000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfd880000 0x00 0x1000>; - clocks = <0x02 0x287 0x02 0x286>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x13d 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x77>; - resets = <0x02 0xc0022 0x02 0xc0021>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x25f>; - - rk8602@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - regulator-name = "vdd_cpu_big0_s0"; - regulator-min-microvolt = <0x86470>; - regulator-max-microvolt = <0x100590>; - regulator-ramp-delay = <0x8fc>; - rockchip,suspend-voltage-selector = <0x01>; - regulator-boot-on; - regulator-always-on; - phandle = <0x18>; - - regulator-state-mem { - regulator-off-in-suspend; - }; + pcfg-pull-up-drv-level-5 { + drive-strength = <0x05>; + phandle = <0x2f6>; + bias-pull-up; }; - rk8603@43 { - compatible = "rockchip,rk8603"; - reg = <0x43>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - regulator-name = "vdd_cpu_big1_s0"; - regulator-min-microvolt = <0x86470>; - regulator-max-microvolt = <0x100590>; - regulator-ramp-delay = <0x8fc>; - rockchip,suspend-voltage-selector = <0x01>; - regulator-boot-on; - regulator-always-on; - phandle = <0x1c>; - - regulator-state-mem { - regulator-off-in-suspend; - }; + gpio@fec20000 { + gpio-controller; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec20000 0x00 0x100>; + phandle = <0xfe>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; }; - pc9202@3c { - status = "okay"; - compatible = "firefly,pc9202"; - reg = <0x3c>; - index = <0x00>; - wd-en-gpio = <0x79 0x15 0x00>; - driver-names = "wdt_core"; + pcfg-pull-none-drv-level-15 { + drive-strength = <0x0f>; + bias-disable; + phandle = <0x459>; }; - hym8563@51 { - status = "okay"; - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <0x7a>; - interrupt-parent = <0x7b>; - interrupts = <0x08 0x08>; - wakeup-source; - phandle = <0x1e4>; + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; }; - }; - serial@fd890000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfd890000 0x00 0x100>; - interrupts = <0x00 0x14b 0x04>; - clocks = <0x02 0x2ae 0x02 0x2af>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x7c 0x06 0x7c 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x7d>; - status = "disabled"; - phandle = <0x260>; - }; + i2c4 { - pwm@fd8b0000 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfd8b0000 0x00 0x10>; - interrupts = <0x00 0x158 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x261>; - }; + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; - pwm@fd8b0010 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfd8b0010 0x00 0x10>; - interrupts = <0x00 0x158 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x262>; - }; + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; - pwm@fd8b0020 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfd8b0020 0x00 0x10>; - interrupts = <0x00 0x158 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x263>; - }; + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; - pwm@fd8b0030 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfd8b0030 0x00 0x10>; - interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x264>; - }; + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; - power-management@fd8d8000 { - compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfd8d8000 0x00 0x400>; - phandle = <0xd9>; + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + }; - power-controller { - compatible = "rockchip,rk3588-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x60>; + emmc { - power-domain@8 { - reg = <0x08>; - #address-cells = <0x01>; - #size-cells = <0x00>; + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; - power-domain@9 { - reg = <0x09>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; - pm_qos = <0x82 0x83 0x84>; + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; - power-domain@10 { - reg = <0x0a>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - pm_qos = <0x85>; - }; + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; - power-domain@11 { - reg = <0x0b>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - pm_qos = <0x86>; - }; - }; + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; }; - power-domain@12 { - reg = <0x0c>; - clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; - pm_qos = <0x87 0x88 0x89 0x8a>; + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; }; + }; - power-domain@13 { - reg = <0x0d>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - power-domain@14 { - reg = <0x0e>; - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; - pm_qos = <0x8b>; - }; + pcfg-pull-none-drv-level-8 { + drive-strength = <0x08>; + bias-disable; + phandle = <0x452>; + }; - power-domain@15 { - reg = <0x0f>; - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; - pm_qos = <0x8c>; - }; + pwm15 { - power-domain@16 { - reg = <0x10>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x1c4 0x02 0x1c5>; - pm_qos = <0x8d 0x8e 0x8f>; + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; - power-domain@17 { - reg = <0x11>; - clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; - pm_qos = <0x90 0x91 0x92>; - }; - }; + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; }; - power-domain@21 { - reg = <0x15>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; - pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; - power-domain@23 { - reg = <0x17>; - clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; - pm_qos = <0x9b>; - }; + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + }; - power-domain@14 { - reg = <0x0e>; - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; - pm_qos = <0x8b>; - }; + pcie30x2 { - power-domain@15 { - reg = <0x0f>; - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; - pm_qos = <0x8c>; - }; + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; - power-domain@22 { - reg = <0x16>; - clocks = <0x02 0x1ba 0x02 0x1b9>; - pm_qos = <0x9c>; - }; + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; }; - power-domain@24 { - reg = <0x18>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; - pm_qos = <0x9d 0x9e>; + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; - power-domain@25 { - reg = <0x19>; - clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; - pm_qos = <0x9f>; - }; + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; }; - power-domain@26 { - reg = <0x1a>; - clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; - pm_qos = <0xa0 0xa1>; + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; }; + }; - power-domain@27 { - reg = <0x1b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; - pm_qos = <0xa2 0xa3 0xa4 0xa5>; + can0 { - power-domain@28 { - reg = <0x1c>; - clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; - pm_qos = <0xa6 0xa7>; - }; + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; - power-domain@29 { - reg = <0x1d>; - clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; - pm_qos = <0xa8 0xa9>; - }; + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; }; + }; - power-domain@30 { - reg = <0x1e>; - clocks = <0x02 0x189 0x02 0x18a>; - pm_qos = <0xaa>; + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + uart9 { + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; }; - power-domain@31 { - reg = <0x1f>; - clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; - pm_qos = <0xab 0xac 0xad 0xae>; + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; }; - power-domain@33 { - reg = <0x21>; - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; }; - power-domain@34 { - reg = <0x22>; - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; }; - power-domain@37 { - reg = <0x25>; - clocks = <0x02 0x199 0x02 0x140>; - pm_qos = <0xaf>; + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; }; - power-domain@38 { - reg = <0x26>; - clocks = <0x02 0x3c 0x02 0x3d>; + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; }; - power-domain@40 { - reg = <0x28>; - pm_qos = <0xb0>; + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; }; - }; - }; - pvtm@fda40000 { - compatible = "rockchip,rk3588-bigcore0-pvtm"; - reg = <0x00 0xfda40000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; - pvtm@0 { - reg = <0x00>; - clocks = <0x02 0x2c6 0x02 0x15>; - clock-names = "clk\0pclk"; + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; }; - }; - - pvtm@fda50000 { - compatible = "rockchip,rk3588-bigcore1-pvtm"; - reg = <0x00 0xfda50000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - pvtm@1 { - reg = <0x01>; - clocks = <0x02 0x2c8 0x02 0x17>; - clock-names = "clk\0pclk"; + pcfg-pull-none-drv-level-2-smt { + drive-strength = <0x02>; + bias-disable; + input-schmitt-enable; + phandle = <0x301>; }; - }; - - pvtm@fda60000 { - compatible = "rockchip,rk3588-litcore-pvtm"; - reg = <0x00 0xfda60000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - pvtm@2 { - reg = <0x02>; - clocks = <0x02 0x2ca 0x02 0x1b>; - clock-names = "clk\0pclk"; + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; }; - }; - pvtm@fdaf0000 { - compatible = "rockchip,rk3588-npu-pvtm"; - reg = <0x00 0xfdaf0000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; + spi3 { - pvtm@3 { - reg = <0x03>; - clocks = <0x02 0x12b 0x02 0x129>; - clock-names = "clk\0pclk"; - resets = <0x02 0x1de 0x02 0x1dc>; - reset-names = "rts\0rst-p"; - }; - }; + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; - pvtm@fdb30000 { - compatible = "rockchip,rk3588-gpu-pvtm"; - reg = <0x00 0xfdb30000 0x00 0x100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - pvtm@4 { - reg = <0x04>; - clocks = <0x02 0x118>; - clock-names = "clk"; - resets = <0x02 0x430 0x02 0x42f>; - reset-names = "rts\0rst-p"; - }; - }; + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; - npu@fdab0000 { - compatible = "rockchip,rk3588-rknpu"; - reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; - clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; - clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; - assigned-clocks = <0x0e 0x06>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; - reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; - power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; - power-domain-names = "npu0\0npu1\0npu2"; - operating-points-v2 = <0xb1>; - iommus = <0xb2>; - status = "okay"; - rknpu-supply = <0xb3>; - mem-supply = <0xb3>; - phandle = <0x265>; - }; + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; - npu-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0xb4 0xb5 0x21>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,supported-hw; - rockchip,pvtm-hw = <0x06>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - rockchip,pvtm-pvtpll; - rockchip,pvtm-offset = <0x50>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-volt = <0xb71b0>; - rockchip,pvtm-ref-temp = <0x19>; - rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; - rockchip,pvtm-thermal-zone = "npu-thermal"; - rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; - rockchip,grf = <0xb6>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - low-volt-mem-read-margin = <0x04>; - intermediate-threshold-freq = <0x7a120>; - rockchip,init-freq = <0xf4240>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x2710>; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,high-temp = <0x14c08>; - rockchip,high-temp-max-freq = "\0\f5"; - phandle = <0xb1>; + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; - opp-300000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x11e1a300>; - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; - opp-400000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; - opp-500000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x1dcd6500>; - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; - opp-600000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; - opp-700000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; - opp-800000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - }; + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; - opp-900000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x35a4e900>; - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - }; + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; - opp-1000000000 { - opp-supported-hw = <0xf9 0xffff>; - opp-hz = <0x00 0x3b9aca00>; - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; }; - opp-j-m-300000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x11e1a300>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + pcfg-pull-down-drv-level-14 { + drive-strength = <0x0e>; + bias-pull-down; + phandle = <0x46a>; }; - opp-j-m-400000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + bt656 { - opp-j-m-500000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x1dcd6500>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; }; - opp-j-m-600000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x23c34600>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + pcfg-pull-down-drv-level-0 { + drive-strength = <0x00>; + bias-pull-down; + phandle = <0x2f7>; }; - opp-j-m-700000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x29b92700>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + pcfg-pull-up-drv-level-3 { + drive-strength = <0x03>; + phandle = <0x2f4>; + bias-pull-up; }; - opp-j-m-800000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - }; + i2s2 { - opp-j-m-950000000 { - opp-supported-hw = <0x06 0xffff>; - opp-hz = <0x00 0x389fd980>; - opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - }; + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; - iommu@fdab9000 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; - clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; - clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xb2>; - }; + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; - vepu@fdb50000 { - compatible = "rockchip,vpu-encoder-v2"; - reg = <0x00 0xfdb50000 0x00 0x400>; - interrupts = <0x00 0x78 0x04>; - interrupt-names = "irq_vepu"; - clocks = <0x02 0x1c0 0x02 0x1c1>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1c0>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - reset-names = "shared_video_a\0shared_video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xb7>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,resetgroup-node = <0x00>; - power-domains = <0x60 0x15>; - status = "disabled"; - phandle = <0x266>; - }; + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; - vdpu@fdb50400 { - compatible = "rockchip,vpu-decoder-v2"; - reg = <0x00 0xfdb50400 0x00 0x400>; - interrupts = <0x00 0x77 0x04>; - interrupt-names = "irq_vdpu"; - clocks = <0x02 0x1c0 0x02 0x1c1>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1c0>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - reset-names = "shared_video_a\0shared_video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xb7>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,resetgroup-node = <0x00>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x267>; - }; + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; - iommu@fdb50800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdb50800 0x00 0x40>; - interrupts = <0x00 0x76 0x04>; - interrupt-names = "irq_vdpu_mmu"; - clocks = <0x02 0x1c0 0x02 0x1c1>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x15>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xb7>; - }; + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; - avsd-plus@fdb51000 { - compatible = "rockchip,avs-plus-decoder"; - reg = <0x00 0xfdb51000 0x00 0x200>; - interrupts = <0x00 0x77 0x04>; - interrupt-names = "irq_avsd"; - clocks = <0x02 0x1c0 0x02 0x1c1>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1c0>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - reset-names = "shared_video_a\0shared_video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xb7>; - power-domains = <0x60 0x15>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - phandle = <0x268>; - }; + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; - rga@fdb60000 { - compatible = "rockchip,rga3_core0"; - reg = <0x00 0xfdb60000 0x00 0x1000>; - interrupts = <0x00 0x72 0x04>; - interrupt-names = "rga3_core0_irq"; - clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; - clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; - power-domains = <0x60 0x16>; - iommus = <0xb9>; - status = "okay"; - phandle = <0x269>; - }; + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; - iommu@fdb60f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdb60f00 0x00 0x100>; - interrupts = <0x00 0x72 0x04>; - interrupt-names = "rga3_0_mmu"; - clocks = <0x02 0x1ba 0x02 0x1b9>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x16>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xb9>; - }; + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; - rga@fdb70000 { - compatible = "rockchip,rga3_core1"; - reg = <0x00 0xfdb70000 0x00 0x1000>; - interrupts = <0x00 0x73 0x04>; - interrupt-names = "rga3_core1_irq"; - clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; - clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; - power-domains = <0x60 0x1e>; - iommus = <0xba>; - status = "okay"; - phandle = <0x26a>; - }; + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; - iommu@fdb70f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdb70f00 0x00 0x100>; - interrupts = <0x00 0x73 0x04>; - interrupt-names = "rga3_1_mmu"; - clocks = <0x02 0x18a 0x02 0x189>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x1e>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xba>; - }; + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; - rga@fdb80000 { - compatible = "rockchip,rga2_core0"; - reg = <0x00 0xfdb80000 0x00 0x1000>; - interrupts = <0x00 0x74 0x04>; - interrupt-names = "rga2_irq"; - clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; - clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x26b>; - }; + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; - jpegd@fdb90000 { - compatible = "rockchip,rkv-jpeg-decoder-v1"; - reg = <0x00 0xfdb90000 0x00 0x400>; - interrupts = <0x00 0x81 0x04>; - interrupt-names = "irq_jpegd"; - clocks = <0x02 0x1b4 0x02 0x1b5>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x23c34600 0x00>; - assigned-clocks = <0x02 0x1b4>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x2d2 0x02 0x2d3>; - reset-names = "video_a\0video_h"; - rockchip,skip-pmu-idle-request; - iommus = <0xbb>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x01>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x26c>; - }; + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; - iommu@fdb90480 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdb90480 0x00 0x40>; - interrupts = <0x00 0x82 0x04>; - interrupt-names = "irq_jpegd_mmu"; - clocks = <0x02 0x1b4 0x02 0x1b5>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x15>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xbb>; - }; + pcfg-pull-none-drv-level-6-smt { + drive-strength = <0x06>; + bias-disable; + input-schmitt-enable; + phandle = <0x304>; + }; - jpege-core@fdba0000 { - compatible = "rockchip,vpu-jpege-core"; - reg = <0x00 0xfdba0000 0x00 0x400>; - interrupts = <0x00 0x7a 0x04>; - interrupt-names = "irq_jpege0"; - clocks = <0x02 0x1ac 0x02 0x1ad>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1ac>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ca 0x02 0x2cb>; - reset-names = "video_a\0video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xbc>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,ccu = <0xbd>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x26d>; - }; + ddrphych3 { - iommu@fdba0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdba0800 0x00 0x40>; - interrupts = <0x00 0x79 0x04>; - interrupt-names = "irq_jpege0_mmu"; - clocks = <0x02 0x1ac 0x02 0x1ad>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x15>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xbc>; - }; + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; - jpege-core@fdba4000 { - compatible = "rockchip,vpu-jpege-core"; - reg = <0x00 0xfdba4000 0x00 0x400>; - interrupts = <0x00 0x7c 0x04>; - interrupt-names = "irq_jpege1"; - clocks = <0x02 0x1ae 0x02 0x1af>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1ae>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2cc 0x02 0x2cd>; - reset-names = "video_a\0video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xbe>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,ccu = <0xbd>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x26e>; - }; + pcfg-pull-none-drv-level-13 { + drive-strength = <0x0d>; + bias-disable; + phandle = <0x457>; + }; - iommu@fdba4800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdba4800 0x00 0x40>; - interrupts = <0x00 0x7b 0x04>; - interrupt-names = "irq_jpege1_mmu"; - clocks = <0x02 0x1ae 0x02 0x1af>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x15>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xbe>; - }; + i2c2 { - jpege-core@fdba8000 { - compatible = "rockchip,vpu-jpege-core"; - reg = <0x00 0xfdba8000 0x00 0x400>; - interrupts = <0x00 0x7e 0x04>; - interrupt-names = "irq_jpege2"; - clocks = <0x02 0x1b0 0x02 0x1b1>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1b0>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ce 0x02 0x2cf>; - reset-names = "video_a\0video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xbf>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,ccu = <0xbd>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x26f>; - }; + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; - iommu@fdba8800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdba8800 0x00 0x40>; - interrupts = <0x00 0x7d 0x04>; - interrupt-names = "irq_jpege2_mmu"; - clocks = <0x02 0x1b0 0x02 0x1b1>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x15>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xbf>; - }; + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; - jpege-core@fdbac000 { - compatible = "rockchip,vpu-jpege-core"; - reg = <0x00 0xfdbac000 0x00 0x400>; - interrupts = <0x00 0x80 0x04>; - interrupt-names = "irq_jpege3"; - clocks = <0x02 0x1b2 0x02 0x1b3>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1b2>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d0 0x02 0x2d1>; - reset-names = "video_a\0video_h"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - iommus = <0xc0>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,ccu = <0xbd>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0x270>; - }; + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; - iommu@fdbac800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdbac800 0x00 0x40>; - interrupts = <0x00 0x7f 0x04>; - interrupt-names = "irq_jpege3_mmu"; - clocks = <0x02 0x1b2 0x02 0x1b3>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x15>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xc0>; - }; + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; - iep@fdbb0000 { - compatible = "rockchip,iep-v2"; - reg = <0x00 0xfdbb0000 0x00 0x500>; - interrupts = <0x00 0x75 0x04>; - interrupt-names = "irq_iep"; - clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; - clock-names = "aclk\0hclk\0sclk"; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clocks = <0x02 0x1aa>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; - reset-names = "rst_a\0rst_h\0rst_s"; - rockchip,skip-pmu-idle-request; - rockchip,disable-auto-freq; - power-domains = <0x60 0x15>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x06>; - iommus = <0xc1>; - status = "okay"; - phandle = <0x271>; - }; + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + }; - iommu@fdbb0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdbb0800 0x00 0x100>; - interrupts = <0x00 0x75 0x04>; - interrupt-names = "irq_iep_mmu"; - clocks = <0x02 0x1aa 0x02 0x1a9>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - power-domains = <0x60 0x15>; - status = "okay"; - phandle = <0xc1>; - }; + auddsm { - rkvenc-core@fdbd0000 { - compatible = "rockchip,rkv-encoder-v2-core"; - reg = <0x00 0xfdbd0000 0x00 0x6000>; - interrupts = <0x00 0x65 0x04>; - interrupt-names = "irq_rkvenc0"; - clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; - reset-names = "video_a\0video_h\0video_core"; - rockchip,skip-pmu-idle-request; - iommus = <0xc2>; - rockchip,srv = <0xb8>; - rockchip,ccu = <0xc3>; - rockchip,taskqueue-node = <0x07>; - rockchip,task-capacity = <0x08>; - power-domains = <0x60 0x10>; - operating-points-v2 = <0xc4>; - status = "okay"; - phandle = <0x272>; - }; + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; - iommu@fdbdf000 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; - interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; - interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; - clocks = <0x02 0x1c5 0x02 0x1c4>; - clock-names = "aclk\0iface"; - rockchip,disable-mmu-reset; - rockchip,enable-cmd-retry; - rockchip,shootdown-entire; - #iommu-cells = <0x00>; - power-domains = <0x60 0x10>; - status = "okay"; - phandle = <0xc2>; - }; + pwm8 { - rkvenc-core@fdbe0000 { - compatible = "rockchip,rkv-encoder-v2-core"; - reg = <0x00 0xfdbe0000 0x00 0x6000>; - interrupts = <0x00 0x68 0x04>; - interrupt-names = "irq_rkvenc1"; - clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x305 0x02 0x304 0x02 0x306>; - reset-names = "video_a\0video_h\0video_core"; - rockchip,skip-pmu-idle-request; - iommus = <0xc5>; - rockchip,srv = <0xb8>; - rockchip,ccu = <0xc3>; - rockchip,taskqueue-node = <0x07>; - rockchip,task-capacity = <0x08>; - power-domains = <0x60 0x11>; - operating-points-v2 = <0xc4>; - status = "okay"; - phandle = <0x273>; - }; + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; - iommu@fdbef000 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; - interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; - clocks = <0x02 0x1ca 0x02 0x1c9>; - lock-names = "aclk\0iface"; - rockchip,disable-mmu-reset; - rockchip,enable-cmd-retry; - rockchip,shootdown-entire; - #iommu-cells = <0x00>; - power-domains = <0x60 0x11>; - status = "okay"; - phandle = <0xc5>; - }; + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; - venc-opp-table { - compatible = "operating-points-v2"; - nvmem-cells = <0xc6 0xc7>; - nvmem-cell-names = "leakage\0opp-info"; - rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; - rockchip,grf = <0xc8>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - phandle = <0xc4>; + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + }; - opp-800000000 { - opp-hz = <0x00 0x2faf0800>; - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; }; - }; - rkvdec-ccu@fdc30000 { - compatible = "rockchip,rkv-decoder-v2-ccu"; - reg = <0x00 0xfdc30000 0x00 0x100>; - reg-names = "ccu"; - clocks = <0x02 0x18e>; - clock-names = "aclk_ccu"; - assigned-clocks = <0x02 0x18e>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x282>; - reset-names = "video_ccu"; - rockchip,skip-pmu-idle-request; - rockchip,ccu-mode = <0x01>; - power-domains = <0x60 0x0e>; - status = "okay"; - phandle = <0xca>; - }; + pcfg-pull-none-drv-level-6 { + drive-strength = <0x06>; + bias-disable; + phandle = <0x2f2>; + }; - rkvdec-core@fdc38000 { - compatible = "rockchip,rkv-decoder-v2"; - reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; - reg-names = "regs\0link"; - interrupts = <0x00 0x5f 0x04>; - interrupt-names = "irq_rkvdec0"; - clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,skip-pmu-idle-request; - iommus = <0xc9>; - rockchip,srv = <0xb8>; - rockchip,ccu = <0xca>; - rockchip,core-mask = <0x10001>; - rockchip,task-capacity = <0x10>; - rockchip,taskqueue-node = <0x09>; - rockchip,sram = <0xcb>; - rockchip,rcb-iova = <0xfff00000 0x100000>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - rockchip,rcb-min-width = <0x200>; - power-domains = <0x60 0x0e>; - status = "okay"; - phandle = <0x274>; - }; + jtag { - iommu@fdc38700 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; - interrupts = <0x00 0x60 0x04>; - interrupt-names = "irq_rkvdec0_mmu"; - clocks = <0x02 0x190 0x02 0x18f>; - clock-names = "aclk\0iface"; - rockchip,disable-mmu-reset; - rockchip,enable-cmd-retry; - rockchip,shootdown-entire; - rockchip,master-handle-irq; - #iommu-cells = <0x00>; - power-domains = <0x60 0x0e>; - status = "okay"; - phandle = <0xc9>; - }; + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; - rkvdec-core@fdc48000 { - compatible = "rockchip,rkv-decoder-v2"; - reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; - reg-names = "regs\0link"; - interrupts = <0x00 0x61 0x04>; - interrupt-names = "irq_rkvdec1"; - clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,skip-pmu-idle-request; - iommus = <0xcc>; - rockchip,srv = <0xb8>; - rockchip,ccu = <0xca>; - rockchip,core-mask = <0x20002>; - rockchip,task-capacity = <0x10>; - rockchip,taskqueue-node = <0x09>; - rockchip,sram = <0xcd>; - rockchip,rcb-iova = <0xffe00000 0x100000>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - rockchip,rcb-min-width = <0x200>; - power-domains = <0x60 0x0f>; - status = "okay"; - phandle = <0x275>; - }; + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; - iommu@fdc48700 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; - interrupts = <0x00 0x62 0x04>; - interrupt-names = "irq_rkvdec1_mmu"; - clocks = <0x02 0x195 0x02 0x194>; - clock-names = "aclk\0iface"; - rockchip,disable-mmu-reset; - rockchip,enable-cmd-retry; - rockchip,shootdown-entire; - rockchip,master-handle-irq; - #iommu-cells = <0x00>; - power-domains = <0x60 0x0f>; - status = "okay"; - phandle = <0xcc>; - }; + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + }; - av1d@fdc70000 { - compatible = "rockchip,av1-decoder"; - reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; - reg-names = "vcd\0cache\0afbc"; - interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; - interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; - clocks = <0x02 0x49 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - rockchip,normal-rates = <0x17d78400 0x17d78400>; - assigned-clocks = <0x02 0x49 0x02 0x4b>; - assigned-clock-rates = <0x17d78400 0x17d78400>; - resets = <0x02 0x442 0x02 0x445>; - reset-names = "video_a\0video_h"; - iommus = <0xce>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x0b>; - power-domains = <0x60 0x17>; - status = "okay"; - phandle = <0x276>; - }; + gpio@fd8a0000 { + gpio-controller; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfd8a0000 0x00 0x100>; + phandle = <0x7b>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + }; - iommu@fdca0000 { - compatible = "rockchip,iommu-av1"; - reg = <0x00 0xfdca0000 0x00 0x600>; - interrupts = <0x00 0x6d 0x04>; - interrupt-names = "irq_av1d_mmu"; - clocks = <0x02 0x49 0x02 0x4b>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - power-domains = <0x60 0x17>; - status = "okay"; - phandle = <0xce>; - }; + gmac1 { - rkisp-unite@fdcb0000 { - compatible = "rockchip,rk3588-rkisp-unite"; - reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; - power-domains = <0x60 0x1c>; - iommus = <0xcf>; - status = "disabled"; - phandle = <0x277>; - }; + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; - rkisp@fdcb0000 { - compatible = "rockchip,rk3588-rkisp"; - reg = <0x00 0xfdcb0000 0x00 0x7f00>; - interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - power-domains = <0x60 0x1b>; - iommus = <0xd0>; - status = "okay"; - phandle = <0x58>; - }; + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; - rkisp-unite-mmu@fdcb7f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; - interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; - interrupt-names = "isp0_mmu\0isp1_mmu"; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; - clock-names = "aclk0\0iface0\0aclk1\0iface1"; - power-domains = <0x60 0x1c>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "disabled"; - phandle = <0xcf>; - }; + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; - iommu@fdcb7f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdcb7f00 0x00 0x100>; - interrupts = <0x00 0x84 0x04>; - interrupt-names = "isp0_mmu"; - clocks = <0x02 0x1de 0x02 0x1df>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x1b>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "okay"; - phandle = <0xd0>; - }; + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; - rkisp@fdcc0000 { - compatible = "rockchip,rk3588-rkisp"; - reg = <0x00 0xfdcc0000 0x00 0x7f00>; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - power-domains = <0x60 0x1c>; - iommus = <0xd1>; - status = "disabled"; - phandle = <0x5a>; - }; + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; - iommu@fdcc7f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdcc7f00 0x00 0x100>; - interrupts = <0x00 0x88 0x04>; - interrupt-names = "isp1_mmu"; - clocks = <0x02 0x120 0x02 0x121>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x1c>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "disabled"; - phandle = <0xd1>; - }; + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; - rkispp@fdcd0000 { - compatible = "rockchip,rk3588-rkispp"; - reg = <0x00 0xfdcd0000 0x00 0xf00>; - interrupts = <0x00 0x8b 0x04>; - interrupt-names = "fec_irq"; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d6>; - assigned-clock-rates = <0x5f5e100>; - power-domains = <0x60 0x1d>; - iommus = <0xd2>; - status = "disabled"; - phandle = <0x5b>; - }; + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; - iommu@fdcd0f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdcd0f00 0x00 0x100>; - interrupts = <0x00 0x8c 0x04>; - interrupt-names = "fec0_mmu"; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - clock-names = "aclk\0iface\0pclk"; - power-domains = <0x60 0x1d>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "disabled"; - phandle = <0xd2>; - }; + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; - rkispp@fdcd8000 { - compatible = "rockchip,rk3588-rkispp"; - reg = <0x00 0xfdcd8000 0x00 0xf00>; - interrupts = <0x00 0x8d 0x04>; - interrupt-names = "fec_irq"; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d9>; - assigned-clock-rates = <0x5f5e100>; - power-domains = <0x60 0x1d>; - iommus = <0xd3>; - status = "disabled"; - phandle = <0x5c>; - }; + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; - iommu@fdcd8f00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdcd8f00 0x00 0x100>; - interrupts = <0x00 0x8e 0x04>; - interrupt-names = "fec1_mmu"; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - clock-names = "aclk\0iface\0pclk"; - power-domains = <0x60 0x1d>; - #iommu-cells = <0x00>; - rockchip,disable-mmu-reset; - status = "disabled"; - phandle = <0xd3>; - }; + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; - rkcif@fdce0000 { - compatible = "rockchip,rk3588-cif"; - reg = <0x00 0xfdce0000 0x00 0x800>; - reg-names = "cif_regs"; - interrupts = <0x00 0x9b 0x04>; - interrupt-names = "cif-intr"; - clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; - resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; - assigned-clocks = <0x02 0x1e3>; - assigned-clock-rates = <0x23c34600>; - power-domains = <0x60 0x1b>; - rockchip,grf = <0xc8>; - iommus = <0x50>; - nvmem-cells = <0x21 0xd4 0xd5>; - nvmem-cell-names = "specification\0package_low\0package_high"; - status = "okay"; - phandle = <0x4f>; - }; + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; - iommu@fdce0800 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; - interrupts = <0x00 0x71 0x04>; - interrupt-names = "cif_mmu"; - clocks = <0x02 0x1e4 0x02 0x1e5>; - clock-names = "aclk\0iface"; - power-domains = <0x60 0x1b>; - rockchip,disable-mmu-reset; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x50>; - }; + pwm13 { - mipi0-csi2-hw@fdd10000 { - compatible = "rockchip,rk3588-mipi-csi2-hw"; - reg = <0x00 0xfdd10000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x02 0x1cf>; - clock-names = "pclk_csi2host"; - resets = <0x02 0x324>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x47>; - }; + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; - mipi1-csi2-hw@fdd20000 { - compatible = "rockchip,rk3588-mipi-csi2-hw"; - reg = <0x00 0xfdd20000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x02 0x1d0>; - clock-names = "pclk_csi2host"; - resets = <0x02 0x325>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x48>; - }; + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; - mipi2-csi2-hw@fdd30000 { - compatible = "rockchip,rk3588-mipi-csi2-hw"; - reg = <0x00 0xfdd30000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x02 0x1d1>; - clock-names = "pclk_csi2host"; - resets = <0x02 0x326>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x49>; - }; + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + }; - mipi3-csi2-hw@fdd40000 { - compatible = "rockchip,rk3588-mipi-csi2-hw"; - reg = <0x00 0xfdd40000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x02 0x1d2>; - clock-names = "pclk_csi2host"; - resets = <0x02 0x327>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x4a>; - }; + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; - mipi4-csi2-hw@fdd50000 { - compatible = "rockchip,rk3588-mipi-csi2-hw"; - reg = <0x00 0xfdd50000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x02 0x1d3>; - clock-names = "pclk_csi2host"; - resets = <0x02 0x328>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x4b>; - }; + uart7 { - mipi5-csi2-hw@fdd60000 { - compatible = "rockchip,rk3588-mipi-csi2-hw"; - reg = <0x00 0xfdd60000 0x00 0x10000>; - reg-names = "csihost_regs"; - interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; - interrupt-names = "csi-intr1\0csi-intr2"; - clocks = <0x02 0x1d4>; - clock-names = "pclk_csi2host"; - resets = <0x02 0x329>; - reset-names = "srst_csihost_p"; - status = "okay"; - phandle = <0x4c>; - }; + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; - vop@fdd90000 { - compatible = "rockchip,rk3588-vop"; - reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2cb41780>; - resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; - reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; - iommus = <0xd6>; - power-domains = <0x60 0x18>; - rockchip,grf = <0xc8>; - rockchip,vop-grf = <0xd7>; - rockchip,vo1-grf = <0xd8>; - rockchip,pmu = <0xd9>; - status = "okay"; - phandle = <0x278>; + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x34>; + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - rockchip,plane-mask = <0x05>; - rockchip,primary-plane = <0x02>; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2faf0800>; - phandle = <0x279>; + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xda>; - phandle = <0xf7>; - }; + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xdb>; - phandle = <0x102>; - }; + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xdc>; - phandle = <0x3c>; - }; + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0xdd>; - phandle = <0x1a6>; - }; + pcfg-pull-down-drv-level-9 { + drive-strength = <0x09>; + bias-pull-down; + phandle = <0x465>; + }; - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0xde>; - phandle = <0x1b0>; - }; + spi1 { - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0xdf>; - phandle = <0x1ad>; - }; + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; }; - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - rockchip,plane-mask = <0x0a>; - rockchip,primary-plane = <0x03>; - phandle = <0x27a>; + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xe0>; - phandle = <0x38>; - }; + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xe1>; - phandle = <0x103>; - }; + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xe2>; - phandle = <0xff>; - }; + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0xe3>; - phandle = <0x3e>; - }; + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0xe4>; - phandle = <0x1b1>; - }; + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0xe5>; - phandle = <0x3f>; - }; + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; }; - port@2 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x02>; - assigned-clocks = <0x02 0x273>; - assigned-clock-parents = <0x02 0x04>; - rockchip,plane-mask = <0x140>; - rockchip,primary-plane = <0x08>; - phandle = <0x27b>; + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xe6>; - phandle = <0xf8>; - }; + pcfg-pull-up-drv-level-14 { + drive-strength = <0x0e>; + phandle = <0x461>; + bias-pull-up; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xe7>; - phandle = <0x3b>; - }; + pcfg-output-low-pull-down { + bias-pull-down; + phandle = <0x30b>; + output-low; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xe8>; - phandle = <0x100>; - }; + pcfg-pull-down-drv-level-12 { + drive-strength = <0x0c>; + bias-pull-down; + phandle = <0x468>; + }; - endpoint@3 { - reg = <0x03>; - remote-endpoint = <0xe9>; - phandle = <0xf3>; - }; + pcfg-pull-up-drv-level-1 { + drive-strength = <0x01>; + phandle = <0x19f>; + bias-pull-up; + }; - endpoint@4 { - reg = <0x04>; - remote-endpoint = <0xea>; - phandle = <0xf4>; - }; + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; - endpoint@5 { - reg = <0x05>; - remote-endpoint = <0xeb>; - phandle = <0x1a7>; - }; + sdmmc { - endpoint@6 { - reg = <0x06>; - remote-endpoint = <0xec>; - phandle = <0x1b2>; - }; + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; - endpoint@7 { - reg = <0x07>; - remote-endpoint = <0xed>; - phandle = <0x1ae>; - }; + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; }; - port@3 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x03>; - rockchip,plane-mask = <0x280>; - rockchip,primary-plane = <0x09>; - phandle = <0x27c>; + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xee>; - phandle = <0x39>; - }; + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xef>; - phandle = <0x3a>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xf0>; - phandle = <0x3d>; - }; + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; }; }; - }; - iommu@fdd97e00 { - compatible = "rockchip,iommu-v2"; - reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; - interrupts = <0x00 0x9c 0x04>; - interrupt-names = "vop_mmu"; - clocks = <0x02 0x270 0x02 0x26f>; - clock-names = "aclk\0iface"; - #iommu-cells = <0x00>; - rockchip,disable-device-link-resume; - rockchip,shootdown-entire; - status = "okay"; - phandle = <0xd6>; - }; + i2s0 { - spdif-tx@fddb0000 { - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - reg = <0x00 0xfddb0000 0x00 0x1000>; - interrupts = <0x00 0xc3 0x04>; - dmas = <0xf1 0x06>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x02 0x209 0x02 0x204>; - assigned-clocks = <0x02 0x205>; - assigned-clock-parents = <0x02 0x05>; - power-domains = <0x60 0x19>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x1d5>; - }; + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; - i2s@fddc0000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfddc0000 0x00 0x1000>; - interrupts = <0x00 0xb8 0x04>; - clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x1f9>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf2 0x00>; - dma-names = "tx"; - power-domains = <0x60 0x19>; - resets = <0x02 0x38d>; - reset-names = "tx-m"; - rockchip,playback-only; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x27d>; - }; + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; - spdif-tx@fdde0000 { - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - reg = <0x00 0xfdde0000 0x00 0x1000>; - interrupts = <0x00 0xc4 0x04>; - dmas = <0xf1 0x07>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x02 0x257 0x02 0x253>; - assigned-clocks = <0x02 0x254>; - assigned-clock-parents = <0x02 0x05>; - power-domains = <0x60 0x1a>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x27e>; - }; + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; - i2s@fddf0000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfddf0000 0x00 0x1000>; - interrupts = <0x00 0xb9 0x04>; - clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x243>; - assigned-clock-parents = <0x02 0x07>; - dmas = <0xf2 0x02>; - dma-names = "tx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x3e8>; - reset-names = "tx-m"; - rockchip,always-on; - rockchip,hdmi-path; - rockchip,playback-only; - #sound-dai-cells = <0x00>; - status = "okay"; - phandle = <0x1d3>; - }; + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; - i2s@fddfc000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfddfc000 0x00 0x1000>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x23f>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf2 0x17>; - dma-names = "rx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x413>; - reset-names = "rx-m"; - rockchip,capture-only; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x27f>; - }; + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; - spdif-rx@fde08000 { - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - reg = <0x00 0xfde08000 0x00 0x1000>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x02 0x25e 0x02 0x25d>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x25e>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0x7c 0x15>; - dma-names = "rx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x3fd>; - reset-names = "spdifrx-m"; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x280>; - }; + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; - dsi@fde20000 { - compatible = "rockchip,rk3588-mipi-dsi2"; - reg = <0x00 0xfde20000 0x00 0x10000>; - interrupts = <0x00 0xa7 0x04>; - clocks = <0x02 0x278 0x02 0x27a>; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x354>; - reset-names = "apb"; - power-domains = <0x60 0x18>; - phys = <0x2f>; - phy-names = "dcphy"; - rockchip,grf = <0xd7>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x281>; + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x282>; + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xf3>; - status = "disabled"; - phandle = <0xe9>; - }; + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x39>; - status = "disabled"; - phandle = <0xee>; - }; + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; }; }; - }; - dsi@fde30000 { - compatible = "rockchip,rk3588-mipi-dsi2"; - reg = <0x00 0xfde30000 0x00 0x10000>; - interrupts = <0x00 0xa8 0x04>; - clocks = <0x02 0x279 0x02 0x27b>; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x355>; - reset-names = "apb"; - power-domains = <0x60 0x18>; - phys = <0x30>; - phy-names = "dcphy"; - rockchip,grf = <0xd7>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x283>; + ddrphych1 { - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x284>; + pcfg-pull-none-drv-level-11 { + drive-strength = <0x0b>; + bias-disable; + phandle = <0x455>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xf4>; - status = "disabled"; - phandle = <0xea>; - }; + i2c0 { - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x3a>; - status = "disabled"; - phandle = <0xef>; - }; + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; }; - }; - }; - - hdcp@fde40000 { - compatible = "rockchip,rk3588-hdcp"; - reg = <0x00 0xfde40000 0x00 0x80>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - power-domains = <0x60 0x19>; - rockchip,vo-grf = <0xf5>; - status = "disabled"; - phandle = <0x285>; - }; - dp@fde50000 { - compatible = "rockchip,rk3588-dp"; - reg = <0x00 0xfde50000 0x00 0x4000>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cc>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x388>; - phys = <0xf6>; - power-domains = <0x60 0x19>; - #sound-dai-cells = <0x01>; - status = "disabled"; - phandle = <0x1d6>; + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; + pwm6 { - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xf7>; - status = "disabled"; - phandle = <0xda>; - }; + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x38>; - status = "disabled"; - phandle = <0xe0>; - }; + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xf8>; - status = "disabled"; - phandle = <0xe6>; - }; + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; }; + }; - port@1 { - reg = <0x01>; + hym8563 { - endpoint { - phandle = <0x286>; - }; + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; }; }; - }; - hdcp@fde70000 { - compatible = "rockchip,rk3588-hdcp"; - reg = <0x00 0xfde70000 0x00 0x80>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - power-domains = <0x60 0x1a>; - rockchip,vo-grf = <0xd8>; - status = "disabled"; - phandle = <0x287>; - }; + pcfg-pull-none-drv-level-4 { + drive-strength = <0x04>; + bias-disable; + phandle = <0x2f0>; + }; - hdmi@fde80000 { - compatible = "rockchip,rk3588-dw-hdmi"; - reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; - interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; - clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d0 0x02 0x49c>; - reset-names = "ref\0hdp"; - power-domains = <0x60 0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; - reg-io-width = <0x04>; - rockchip,grf = <0xc8>; - rockchip,vo1_grf = <0xd8>; - phys = <0xfd>; - phy-names = "hdmi"; - #sound-dai-cells = <0x00>; - status = "okay"; - enable-gpios = <0xfe 0x08 0x00>; - phandle = <0x1d4>; + pcfg-output-high-pull-up { + output-high; + phandle = <0x306>; + bias-pull-up; + }; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + pwm11 { - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x288>; + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x3c>; - status = "okay"; - phandle = <0xdc>; - }; + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xff>; - status = "disabled"; - phandle = <0xe2>; - }; + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x100>; - status = "disabled"; - phandle = <0xe8>; - }; + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; }; }; - }; - edp@fdec0000 { - compatible = "rockchip,rk3588-edp"; - reg = <0x00 0xfdec0000 0x00 0x1000>; - interrupts = <0x00 0xa3 0x04>; - clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e1 0x02 0x3e0>; - reset-names = "dp\0apb"; - phys = <0x101>; - phy-names = "dp"; - power-domains = <0x60 0x1a>; - rockchip,grf = <0xd8>; - status = "disabled"; - phandle = <0x289>; + bt1120 { - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; + pcfg-output-low-pull-up { + phandle = <0x30a>; + bias-pull-up; + output-low; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x102>; - status = "disabled"; - phandle = <0xdb>; - }; + uart5 { - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x103>; - status = "disabled"; - phandle = <0xe1>; - }; + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x3b>; - status = "disabled"; - phandle = <0xe7>; - }; + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; }; - port@1 { - reg = <0x01>; + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; - endpoint { - phandle = <0x28a>; - }; + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; }; - }; - }; - qos@fdf35000 { - compatible = "syscon"; - reg = <0x00 0xfdf35000 0x00 0x20>; - phandle = <0x87>; - }; + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; - qos@fdf35200 { - compatible = "syscon"; - reg = <0x00 0xfdf35200 0x00 0x20>; - phandle = <0x88>; - }; + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; - qos@fdf35400 { - compatible = "syscon"; - reg = <0x00 0xfdf35400 0x00 0x20>; - phandle = <0x89>; - }; + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + }; - qos@fdf35600 { - compatible = "syscon"; - reg = <0x00 0xfdf35600 0x00 0x20>; - phandle = <0x8a>; - }; + sdio { - qos@fdf36000 { - compatible = "syscon"; - reg = <0x00 0xfdf36000 0x00 0x20>; - phandle = <0xaa>; - }; + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; - qos@fdf39000 { - compatible = "syscon"; - reg = <0x00 0xfdf39000 0x00 0x20>; - phandle = <0xaf>; - }; + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; - qos@fdf3d800 { - compatible = "syscon"; - reg = <0x00 0xfdf3d800 0x00 0x20>; - phandle = <0xb0>; - }; + spdif1 { - qos@fdf3e000 { - compatible = "syscon"; - reg = <0x00 0xfdf3e000 0x00 0x20>; - phandle = <0xac>; - }; + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; - qos@fdf3e200 { - compatible = "syscon"; - reg = <0x00 0xfdf3e200 0x00 0x20>; - phandle = <0xab>; - }; + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; - qos@fdf3e400 { - compatible = "syscon"; - reg = <0x00 0xfdf3e400 0x00 0x20>; - phandle = <0xad>; - }; + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + }; - qos@fdf3e600 { - compatible = "syscon"; - reg = <0x00 0xfdf3e600 0x00 0x20>; - phandle = <0xae>; - }; + pcfg-pull-down-drv-level-7 { + drive-strength = <0x07>; + bias-pull-down; + phandle = <0x463>; + }; - qos@fdf40000 { - compatible = "syscon"; - reg = <0x00 0xfdf40000 0x00 0x20>; - phandle = <0xa8>; - }; + gpio@fec30000 { + gpio-controller; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec30000 0x00 0x100>; + phandle = <0x79>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + }; - qos@fdf40200 { - compatible = "syscon"; - reg = <0x00 0xfdf40200 0x00 0x20>; - phandle = <0xa9>; - }; + pcfg-pull-up-drv-level-12 { + drive-strength = <0x0c>; + phandle = <0x45f>; + bias-pull-up; + }; - qos@fdf40400 { - compatible = "syscon"; - reg = <0x00 0xfdf40400 0x00 0x20>; - phandle = <0xa2>; - }; + pcfg-pull-down-drv-level-10 { + drive-strength = <0x0a>; + bias-pull-down; + phandle = <0x466>; + }; - qos@fdf40500 { - compatible = "syscon"; - reg = <0x00 0xfdf40500 0x00 0x20>; - phandle = <0xa3>; - }; + dp1 { - qos@fdf40600 { - compatible = "syscon"; - reg = <0x00 0xfdf40600 0x00 0x20>; - phandle = <0xa4>; - }; + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; - qos@fdf40800 { - compatible = "syscon"; - reg = <0x00 0xfdf40800 0x00 0x20>; - phandle = <0xa5>; - }; + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; - qos@fdf41000 { - compatible = "syscon"; - reg = <0x00 0xfdf41000 0x00 0x20>; - phandle = <0xa6>; - }; + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; - qos@fdf41100 { - compatible = "syscon"; - reg = <0x00 0xfdf41100 0x00 0x20>; - phandle = <0xa7>; - }; + vop { - qos@fdf60000 { - compatible = "syscon"; - reg = <0x00 0xfdf60000 0x00 0x20>; - phandle = <0x8d>; - }; + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; - qos@fdf60200 { - compatible = "syscon"; - reg = <0x00 0xfdf60200 0x00 0x20>; - phandle = <0x8e>; - }; + pwm4 { - qos@fdf60400 { - compatible = "syscon"; - reg = <0x00 0xfdf60400 0x00 0x20>; - phandle = <0x8f>; - }; + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; - qos@fdf61000 { - compatible = "syscon"; - reg = <0x00 0xfdf61000 0x00 0x20>; - phandle = <0x90>; - }; + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + }; - qos@fdf61200 { - compatible = "syscon"; - reg = <0x00 0xfdf61200 0x00 0x20>; - phandle = <0x91>; - }; + pcfg-pull-none-drv-level-2 { + drive-strength = <0x02>; + bias-disable; + phandle = <0x1a0>; + }; - qos@fdf61400 { - compatible = "syscon"; - reg = <0x00 0xfdf61400 0x00 0x20>; - phandle = <0x92>; - }; + pcfg-pull-none-drv-level-3-smt { + drive-strength = <0x03>; + bias-disable; + input-schmitt-enable; + phandle = <0x302>; + }; - qos@fdf62000 { - compatible = "syscon"; - reg = <0x00 0xfdf62000 0x00 0x20>; - phandle = <0x8b>; - }; + uart3 { - qos@fdf63000 { - compatible = "syscon"; - reg = <0x00 0xfdf63000 0x00 0x20>; - phandle = <0x8c>; - }; + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; - qos@fdf64000 { - compatible = "syscon"; - reg = <0x00 0xfdf64000 0x00 0x20>; - phandle = <0x9b>; - }; + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; - qos@fdf66000 { - compatible = "syscon"; - reg = <0x00 0xfdf66000 0x00 0x20>; - phandle = <0x93>; - }; + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; - qos@fdf66200 { - compatible = "syscon"; - reg = <0x00 0xfdf66200 0x00 0x20>; - phandle = <0x94>; - }; + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; - qos@fdf66400 { - compatible = "syscon"; - reg = <0x00 0xfdf66400 0x00 0x20>; - phandle = <0x95>; - }; + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; - qos@fdf66600 { - compatible = "syscon"; - reg = <0x00 0xfdf66600 0x00 0x20>; - phandle = <0x96>; - }; + pcfg-pull-down-drv-level-5 { + drive-strength = <0x05>; + bias-pull-down; + phandle = <0x2fc>; + }; - qos@fdf66800 { - compatible = "syscon"; - reg = <0x00 0xfdf66800 0x00 0x20>; - phandle = <0x97>; - }; + pcfg-pull-up-drv-level-8 { + drive-strength = <0x08>; + phandle = <0x45b>; + bias-pull-up; + }; - qos@fdf66a00 { - compatible = "syscon"; - reg = <0x00 0xfdf66a00 0x00 0x20>; - phandle = <0x98>; - }; + pcfg-pull-up-drv-level-10 { + drive-strength = <0x0a>; + phandle = <0x45d>; + bias-pull-up; + }; - qos@fdf66c00 { - compatible = "syscon"; - reg = <0x00 0xfdf66c00 0x00 0x20>; - phandle = <0x99>; - }; + pcfg-output-low { + phandle = <0x309>; + output-low; + }; - qos@fdf66e00 { - compatible = "syscon"; - reg = <0x00 0xfdf66e00 0x00 0x20>; - phandle = <0x9a>; - }; + i2c7 { - qos@fdf67000 { - compatible = "syscon"; - reg = <0x00 0xfdf67000 0x00 0x20>; - phandle = <0x9c>; - }; + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; - qos@fdf67200 { - compatible = "syscon"; - reg = <0x00 0xfdf67200 0x00 0x20>; - phandle = <0x28b>; - }; + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; - qos@fdf70000 { - compatible = "syscon"; - reg = <0x00 0xfdf70000 0x00 0x20>; - phandle = <0x85>; - }; + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; - qos@fdf71000 { - compatible = "syscon"; - reg = <0x00 0xfdf71000 0x00 0x20>; - phandle = <0x86>; - }; + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + }; - qos@fdf72000 { - compatible = "syscon"; - reg = <0x00 0xfdf72000 0x00 0x20>; - phandle = <0x82>; - }; + pwm2 { - qos@fdf72200 { - compatible = "syscon"; - reg = <0x00 0xfdf72200 0x00 0x20>; - phandle = <0x83>; - }; + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; - qos@fdf72400 { - compatible = "syscon"; - reg = <0x00 0xfdf72400 0x00 0x20>; - phandle = <0x84>; - }; + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; - qos@fdf80000 { - compatible = "syscon"; - reg = <0x00 0xfdf80000 0x00 0x20>; - phandle = <0x9f>; - }; + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + }; - qos@fdf81000 { - compatible = "syscon"; - reg = <0x00 0xfdf81000 0x00 0x20>; - phandle = <0xa0>; - }; + pcfg-pull-none-drv-level-0 { + drive-strength = <0x00>; + bias-disable; + phandle = <0x2ed>; + }; - qos@fdf81200 { - compatible = "syscon"; - reg = <0x00 0xfdf81200 0x00 0x20>; - phandle = <0xa1>; - }; + sata1 { - qos@fdf82000 { - compatible = "syscon"; - reg = <0x00 0xfdf82000 0x00 0x20>; - phandle = <0x9d>; - }; + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; - qos@fdf82200 { - compatible = "syscon"; - reg = <0x00 0xfdf82200 0x00 0x20>; - phandle = <0x9e>; - }; + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + }; - dfi@fe060000 { - compatible = "rockchip,rk3588-dfi"; - reg = <0x00 0xfe060000 0x00 0x10000>; - rockchip,pmu_grf = <0x104>; - status = "disabled"; - phandle = <0x40>; - }; + pmu { - pcie@fe180000 { - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x30 0x3f>; - clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - device_type = "pci"; - interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; - linux,pci-domain = <0x03>; - num-ib-windows = <0x08>; - num-ob-windows = <0x08>; - num-viewport = <0x04>; - max-link-speed = <0x02>; - msi-map = <0x3000 0x106 0x3000 0x1000>; - num-lanes = <0x01>; - phys = <0x70 0x02>; - phy-names = "pcie-phy"; - ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; - reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; - reg-names = "pcie-apb\0pcie-dbi"; - resets = <0x02 0x210 0x02 0x21f>; - reset-names = "pcie\0periph"; - rockchip,pipe-grf = <0x76>; - status = "disabled"; - phandle = <0x28c>; + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0xf5 0x01>; - phandle = <0x105>; + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; }; - }; - pcie@fe190000 { - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x40 0x4f>; - clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - device_type = "pci"; - interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; - linux,pci-domain = <0x04>; - num-ib-windows = <0x08>; - num-ob-windows = <0x08>; - num-viewport = <0x04>; - max-link-speed = <0x02>; - msi-map = <0x4000 0x106 0x4000 0x1000>; - num-lanes = <0x01>; - phys = <0x108 0x02>; - phy-names = "pcie-phy"; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; - reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; - reg-names = "pcie-apb\0pcie-dbi"; - resets = <0x02 0x211 0x02 0x220>; - reset-names = "pcie\0periph"; - rockchip,pipe-grf = <0x76>; - status = "disabled"; - phandle = <0x28d>; + uart1 { - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0xfa 0x01>; - phandle = <0x107>; - }; - }; + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; - uio@fe1c0000 { - compatible = "rockchip,uio-gmac"; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - rockchip,ethernet = <0x109>; - status = "disabled"; - phandle = <0x28e>; - }; + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; - ethernet@fe1c0000 { - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; - interrupt-names = "macirq\0eth_wake_irq"; - rockchip,grf = <0xc8>; - rockchip,php_grf = <0x76>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - resets = <0x02 0x20b>; - reset-names = "stmmaceth"; - power-domains = <0x60 0x21>; - snps,mixed-burst; - snps,tso; - snps,axi-config = <0x10a>; - snps,mtl-rx-config = <0x10b>; - snps,mtl-tx-config = <0x10c>; - status = "okay"; - phy-mode = "rgmii-rxid"; - clock_in_out = "output"; - snps,reset-gpio = <0x10d 0x08 0x01>; - snps,reset-active-low; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - pinctrl-names = "default"; - pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; - tx_delay = <0x40>; - phy-handle = <0x113>; - phandle = <0x109>; + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x28f>; + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x113>; + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; }; - }; - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - snps,rd_osr_lmt = <0x08>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - phandle = <0x10a>; - }; + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x10b>; + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; - queue0 { + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; }; }; - tx-queues-config { - snps,tx-queues-to-use = <0x01>; - phandle = <0x10c>; + hdmi { - queue0 { + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; }; - }; - }; - sata@fe210000 { - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - reg = <0x00 0xfe210000 0x00 0x1000>; - clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x111 0x04>; - interrupt-names = "hostc"; - phys = <0x108 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - status = "okay"; - phandle = <0x290>; - }; + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; - sata@fe230000 { - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - reg = <0x00 0xfe230000 0x00 0x1000>; - clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x113 0x04>; - interrupt-names = "hostc"; - phys = <0x70 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; - status = "disabled"; - phandle = <0x291>; - }; + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; - spi@fe2b0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x02 0x13d 0x02 0x13e>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x13d>; - assigned-clock-rates = <0x5f5e100>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x292>; - }; + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; - mmc@fe2c0000 { - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <0x8f0d180>; - pinctrl-names = "default"; - pinctrl-0 = <0x114 0x115 0x116 0x117>; - power-domains = <0x60 0x28>; - status = "okay"; - no-sdio; - no-mmc; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vqmmc-supply = <0x118>; - phandle = <0x293>; - }; + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; - mmc@fe2d0000 { - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2d0000 0x00 0x4000>; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <0xbebc200>; - pinctrl-names = "default"; - pinctrl-0 = <0x119>; - power-domains = <0x60 0x25>; - status = "disabled"; - phandle = <0x294>; - }; + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; - mmc@fe2e0000 { - compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; - reg = <0x00 0xfe2e0000 0x00 0x10000>; - interrupts = <0x00 0xcd 0x04>; - assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; - clock-names = "core\0bus\0axi\0block\0timer"; - resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; - reset-names = "core\0bus\0axi\0block\0timer"; - max-frequency = <0xbebc200>; - status = "okay"; - bus-width = <0x08>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - phandle = <0x295>; - }; + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; - crypto@fe370000 { - compatible = "rockchip,rk3588-crypto"; - reg = <0x00 0xfe370000 0x00 0x2000>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; - clock-names = "aclk\0hclk\0sclk\0pka"; - resets = <0x11a 0x0f>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0x296>; - }; + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; - rng@fe378000 { - compatible = "rockchip,trngv1"; - reg = <0x00 0xfe378000 0x00 0x200>; - interrupts = <0x00 0x190 0x04>; - clocks = <0x0e 0x0c>; - clock-names = "hclk_trng"; - resets = <0x11a 0x30>; - reset-names = "reset"; - status = "okay"; - phandle = <0x297>; - }; + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; - i2s@fe470000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfe470000 0x00 0x1000>; - interrupts = <0x00 0xb4 0x04>; - clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x31 0x02 0x35>; - assigned-clock-parents = <0x02 0x05 0x02 0x05>; - dmas = <0x7c 0x00 0x7c 0x01>; - dma-names = "tx\0rx"; - power-domains = <0x60 0x26>; - resets = <0x02 0x77 0x02 0x7a>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; - pinctrl-1 = <0x11f>; - pinctrl-2 = <0x11b 0x11c>; - #sound-dai-cells = <0x00>; - status = "okay"; - phandle = <0x1da>; - }; + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; - i2s@fe480000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfe480000 0x00 0x1000>; - interrupts = <0x00 0xb5 0x04>; - clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x7c 0x02 0x7c 0x03>; - dma-names = "tx\0rx"; - resets = <0x02 0xc002a 0x02 0xc002d>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x1d1>; - }; + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; - i2s@fe490000 { - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xfe490000 0x00 0x1000>; - interrupts = <0x00 0xb6 0x04>; - clocks = <0x02 0x27 0x02 0x22>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x24>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf1 0x00 0xf1 0x01>; - dma-names = "tx\0rx"; - power-domains = <0x60 0x26>; - rockchip,clk-trcm = <0x01>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-0 = <0x12a 0x12b>; - pinctrl-1 = <0x12c>; - pinctrl-2 = <0x12d 0x12e>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x298>; - }; + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; - i2s@fe4a0000 { - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xfe4a0000 0x00 0x1000>; - interrupts = <0x00 0xb7 0x04>; - clocks = <0x02 0x2d 0x02 0x23>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x2a>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf1 0x02 0xf1 0x03>; - dma-names = "tx\0rx"; - power-domains = <0x60 0x26>; - rockchip,clk-trcm = <0x01>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-0 = <0x12f 0x130>; - pinctrl-1 = <0x131>; - pinctrl-2 = <0x132 0x133>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x299>; - }; + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; - pdm@fe4b0000 { - compatible = "rockchip,rk3588-pdm"; - reg = <0x00 0xfe4b0000 0x00 0x1000>; - clocks = <0x02 0x29f 0x02 0x29e>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x7c 0x04>; - dma-names = "rx"; - pinctrl-names = "default\0idle\0clk"; - pinctrl-0 = <0x134 0x135 0x136 0x137>; - pinctrl-1 = <0x138>; - pinctrl-2 = <0x139 0x13a>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x29a>; - }; + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; - pdm@fe4c0000 { - compatible = "rockchip,rk3588-pdm"; - reg = <0x00 0xfe4c0000 0x00 0x1000>; - clocks = <0x02 0x3b 0x02 0x3a>; - clock-names = "pdm_clk\0pdm_hclk"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf1 0x04>; - dma-names = "rx"; - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; - pinctrl-1 = <0x13f>; - pinctrl-2 = <0x140 0x141>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x29b>; - }; + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; - vad@fe4d0000 { - compatible = "rockchip,rk3588-vad"; - reg = <0x00 0xfe4d0000 0x00 0x1000>; - reg-names = "vad"; - clocks = <0x02 0x2a0>; - clock-names = "hclk"; - interrupts = <0x00 0xca 0x04>; - rockchip,audio-src = <0x00>; - rockchip,det-channel = <0x00>; - rockchip,mode = <0x00>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x29c>; - }; + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; - spdif-tx@fe4e0000 { - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - reg = <0x00 0xfe4e0000 0x00 0x1000>; - interrupts = <0x00 0xc1 0x04>; - dmas = <0x7c 0x05>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x02 0x41 0x02 0x3e>; - assigned-clocks = <0x02 0x3f>; - assigned-clock-parents = <0x02 0x05>; - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x142>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x29d>; - }; + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; - spdif-tx@fe4f0000 { - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - reg = <0x00 0xfe4f0000 0x00 0x1000>; - interrupts = <0x00 0xc2 0x04>; - dmas = <0xf1 0x05>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x02 0x47 0x02 0x44>; - assigned-clocks = <0x02 0x45>; - assigned-clock-parents = <0x02 0x05>; - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x143>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x1d7>; - }; + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; - codec-digital@fe500000 { - compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; - reg = <0x00 0xfe500000 0x00 0x1000>; - clocks = <0x02 0x29 0x02 0x2f>; - clock-names = "dac\0pclk"; - power-domains = <0x60 0x26>; - resets = <0x02 0x84>; - reset-names = "reset"; - rockchip,grf = <0xc8>; - rockchip,pwm-output-mode; - pinctrl-names = "default"; - pinctrl-0 = <0x144>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x29e>; - }; + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; - hwspinlock@fe5a0000 { - compatible = "rockchip,hwspinlock"; - reg = <0x00 0xfe5a0000 0x00 0x100>; - #hwlock-cells = <0x01>; - phandle = <0x29f>; - }; + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; - interrupt-controller@fe600000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <0x03>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - interrupt-controller; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; - interrupts = <0x01 0x09 0x04>; - phandle = <0x01>; + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; - msi-controller@fe640000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <0x01>; - reg = <0x00 0xfe640000 0x00 0x20000>; - phandle = <0x106>; - }; + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; - msi-controller@fe660000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <0x01>; - reg = <0x00 0xfe660000 0x00 0x20000>; - phandle = <0x1b6>; - }; - }; + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; - dma-controller@fea10000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea10000 0x00 0x4000>; - interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; - clocks = <0x02 0x78>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0x7c>; - }; + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; - dma-controller@fea30000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea30000 0x00 0x4000>; - interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; - clocks = <0x02 0x79>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0xf1>; - }; + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; - can@fea50000 { - compatible = "rockchip,can-2.0"; - reg = <0x00 0xfea50000 0x00 0x1000>; - interrupts = <0x00 0x155 0x04>; - clocks = <0x02 0x70 0x02 0x6f>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xb9 0x02 0xb8>; - reset-names = "can\0can-apb"; - pinctrl-names = "default"; - pinctrl-0 = <0x145>; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "disabled"; - phandle = <0x2a0>; - }; + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; - can@fea60000 { - compatible = "rockchip,can-2.0"; - reg = <0x00 0xfea60000 0x00 0x1000>; - interrupts = <0x00 0x156 0x04>; - clocks = <0x02 0x72 0x02 0x71>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xbb 0x02 0xba>; - reset-names = "can\0can-apb"; - pinctrl-names = "default"; - pinctrl-0 = <0x146>; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "okay"; - assigned-clocks = <0x02 0x72>; - assigned-clock-rates = <0xbebc200>; - phandle = <0x2a1>; - }; + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; - can@fea70000 { - compatible = "rockchip,can-2.0"; - reg = <0x00 0xfea70000 0x00 0x1000>; - interrupts = <0x00 0x157 0x04>; - clocks = <0x02 0x74 0x02 0x73>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xbd 0x02 0xbc>; - reset-names = "can\0can-apb"; - pinctrl-names = "default"; - pinctrl-0 = <0x147>; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - status = "disabled"; - phandle = <0x2a2>; - }; + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; - decompress@fea80000 { - compatible = "rockchip,hw-decompress"; - reg = <0x00 0xfea80000 0x00 0x1000>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; - clock-names = "aclk\0dclk\0pclk"; - resets = <0x02 0x118>; - reset-names = "dresetn"; - status = "disabled"; - phandle = <0x2a3>; - }; + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; - i2c@fea90000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfea90000 0x00 0x1000>; - clocks = <0x02 0x8d 0x02 0x85>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x13e 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x148>; - resets = <0x02 0xb0 0x02 0xa8>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x2a4>; + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; - rk8602@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - regulator-name = "vdd_npu_s0"; - regulator-min-microvolt = <0x86470>; - regulator-max-microvolt = <0xe7ef0>; - regulator-ramp-delay = <0x8fc>; - rockchip,suspend-voltage-selector = <0x01>; - regulator-boot-on; - regulator-always-on; - phandle = <0xb3>; + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; - regulator-state-mem { - regulator-off-in-suspend; + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; }; - }; - }; - i2c@feaa0000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfeaa0000 0x00 0x1000>; - clocks = <0x02 0x8e 0x02 0x86>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x13f 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x149>; - resets = <0x02 0xb1 0x02 0xa9>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x2a5>; - }; + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; - i2c@feab0000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfeab0000 0x00 0x1000>; - clocks = <0x02 0x8f 0x02 0x87>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x140 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x14a>; - resets = <0x02 0xb2 0x02 0xaa>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x2a6>; + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; - gpio@21 { - status = "okay"; - compatible = "nxp,pca9555"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-group-num = <0xc8>; - phandle = <0x182>; - }; - }; + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; - i2c@feac0000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfeac0000 0x00 0x1000>; - clocks = <0x02 0x90 0x02 0x88>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x141 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x14b>; - resets = <0x02 0xb3 0x02 0xab>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x2a7>; + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; - pc9202@3c { - status = "okay"; - compatible = "firefly,pc9202"; - reg = <0x3c>; - index = <0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x14c>; - wd-en-gpio = <0x7b 0x14 0x00>; - driver-names = "wdt_base"; - }; - }; + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; - i2c@fead0000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfead0000 0x00 0x1000>; - clocks = <0x02 0x91 0x02 0x89>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x142 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x14d>; - resets = <0x02 0xb4 0x02 0xac>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x2a8>; - }; + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; - timer@feae0000 { - compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfeae0000 0x00 0x20>; - interrupts = <0x00 0x121 0x04>; - clocks = <0x02 0x5c 0x02 0x5f>; - clock-names = "pclk\0timer"; - phandle = <0x2a9>; - }; + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; - watchdog@feaf0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xfeaf0000 0x00 0x100>; - clocks = <0x02 0x6c 0x02 0x6b>; - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x13b 0x04>; - status = "okay"; - phandle = <0x2aa>; - }; + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; - spi@feb00000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfeb00000 0x00 0x1000>; - interrupts = <0x00 0x146 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0xa3 0x02 0x9e>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x7c 0x0e 0x7c 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default"; - pinctrl-0 = <0x14e 0x14f 0x150>; - num-cs = <0x02>; - status = "disabled"; - phandle = <0x2ab>; - }; + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + }; - spi@feb10000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfeb10000 0x00 0x1000>; - interrupts = <0x00 0x147 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0xa4 0x02 0x9f>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x7c 0x10 0x7c 0x11>; - dma-names = "tx\0rx"; - pinctrl-names = "default"; - pinctrl-0 = <0x151 0x152 0x153>; - num-cs = <0x02>; - status = "disabled"; - phandle = <0x2ac>; - }; + pcfg-pull-down-drv-level-3 { + drive-strength = <0x03>; + bias-pull-down; + phandle = <0x2fa>; + }; - spi@feb20000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfeb20000 0x00 0x1000>; - interrupts = <0x00 0x148 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0xa5 0x02 0xa0>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0xf1 0x0f 0xf1 0x10>; - dma-names = "tx\0rx"; - pinctrl-names = "default"; - pinctrl-0 = <0x154 0x155>; - num-cs = <0x01>; - status = "okay"; - assigned-clocks = <0x02 0xa5>; - assigned-clock-rates = <0xbebc200>; - phandle = <0x2ad>; + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; + }; - rk806single@0 { - compatible = "rockchip,rk806"; - spi-max-frequency = <0xf4240>; - reg = <0x00>; - interrupt-parent = <0x7b>; - interrupts = <0x07 0x08>; - pinctrl-names = "default\0pmic-power-off"; - pinctrl-0 = <0x156 0x157 0x158 0x159>; - pinctrl-1 = <0x15a>; - low_voltage_threshold = <0xbb8>; - shutdown_voltage_threshold = <0xa8c>; - shutdown_temperture_threshold = <0xa0>; - hotdie_temperture_threshold = <0x73>; - pmic-reset-func = <0x01>; - vcc1-supply = <0x78>; - vcc2-supply = <0x78>; - vcc3-supply = <0x78>; - vcc4-supply = <0x78>; - vcc5-supply = <0x78>; - vcc6-supply = <0x78>; - vcc7-supply = <0x78>; - vcc8-supply = <0x78>; - vcc9-supply = <0x78>; - vcc10-supply = <0x78>; - vcc11-supply = <0x15b>; - vcc12-supply = <0x78>; - vcc13-supply = <0x15c>; - vcc14-supply = <0x15c>; - vcca-supply = <0x78>; - phandle = <0x2ae>; + i2c5 { - pwrkey { - status = "okay"; + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; }; - pinctrl_rk806 { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0x2af>; + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; - rk806_dvs1_null { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - phandle = <0x157>; - }; + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; - rk806_dvs1_slp { - pins = "gpio_pwrctrl1"; - function = "pin_fun1"; - phandle = <0x2b0>; - }; + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; - rk806_dvs1_pwrdn { - pins = "gpio_pwrctrl1"; - function = "pin_fun2"; - phandle = <0x15a>; - }; + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; - rk806_dvs1_rst { - pins = "gpio_pwrctrl1"; - function = "pin_fun3"; - phandle = <0x2b1>; - }; + pcfg-pull-none-drv-level-9 { + drive-strength = <0x09>; + bias-disable; + phandle = <0x453>; + }; - rk806_dvs2_null { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - phandle = <0x158>; - }; + pdm0 { - rk806_dvs2_slp { - pins = "gpio_pwrctrl2"; - function = "pin_fun1"; - phandle = <0x2b2>; - }; + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; - rk806_dvs2_pwrdn { - pins = "gpio_pwrctrl2"; - function = "pin_fun2"; - phandle = <0x2b3>; - }; + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; - rk806_dvs2_rst { - pins = "gpio_pwrctrl2"; - function = "pin_fun3"; - phandle = <0x2b4>; - }; + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; - rk806_dvs2_dvs { - pins = "gpio_pwrctrl2"; - function = "pin_fun4"; - phandle = <0x2b5>; - }; + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; - rk806_dvs2_gpio { - pins = "gpio_pwrctrl2"; - function = "pin_fun5"; - phandle = <0x2b6>; - }; + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; - rk806_dvs3_null { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - phandle = <0x159>; - }; + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; - rk806_dvs3_slp { - pins = "gpio_pwrctrl3"; - function = "pin_fun1"; - phandle = <0x2b7>; - }; + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; - rk806_dvs3_pwrdn { - pins = "gpio_pwrctrl3"; - function = "pin_fun2"; - phandle = <0x2b8>; - }; + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; - rk806_dvs3_rst { - pins = "gpio_pwrctrl3"; - function = "pin_fun3"; - phandle = <0x2b9>; - }; + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; - rk806_dvs3_dvs { - pins = "gpio_pwrctrl3"; - function = "pin_fun4"; - phandle = <0x2ba>; - }; + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; - rk806_dvs3_gpio { - pins = "gpio_pwrctrl3"; - function = "pin_fun5"; - phandle = <0x2bb>; - }; + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; }; - regulators { + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; - DCDC_REG1 { - regulator-boot-on; - regulator-min-microvolt = <0x86470>; - regulator-max-microvolt = <0xe7ef0>; - regulator-ramp-delay = <0x30d4>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <0x190>; - phandle = <0x62>; + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + }; - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x86470>; - regulator-max-microvolt = <0xe7ef0>; - regulator-ramp-delay = <0x30d4>; - regulator-name = "vdd_cpu_lit_s0"; - phandle = <0x12>; + pcfg-output-high-pull-none { + bias-disable; + output-high; + phandle = <0x308>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + pwm0 { - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-max-microvolt = <0xb71b0>; - regulator-ramp-delay = <0x30d4>; - regulator-name = "vdd_log_s0"; - phandle = <0x43>; + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x86470>; - regulator-max-microvolt = <0xe7ef0>; - regulator-init-microvolt = <0xb71b0>; - regulator-ramp-delay = <0x30d4>; - regulator-name = "vdd_vdenc_s0"; - phandle = <0x2bc>; + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + cif { - DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-max-microvolt = <0xdbba0>; - regulator-ramp-delay = <0x30d4>; - regulator-name = "vdd_ddr_s0"; - phandle = <0x42>; + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; - DCDC_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - phandle = <0x2bd>; + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + }; - DCDC_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1e8480>; - regulator-max-microvolt = <0x1e8480>; - regulator-name = "vdd_2v0_pldo_s3"; - phandle = <0x15b>; + can1 { - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1e8480>; - }; - }; + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; - DCDC_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s3"; - phandle = <0x2be>; + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + }; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; + pcfg-output-low-pull-none { + bias-disable; + phandle = <0x30c>; + output-low; + }; - DCDC_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - phandle = <0x2bf>; + gpio@fec40000 { + gpio-controller; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec40000 0x00 0x100>; + phandle = <0x181>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + spi4 { - DCDC_REG10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s3"; - phandle = <0x2c0>; + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; - PLDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "avcc_1v8_s0"; - phandle = <0x1de>; + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; - PLDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s0"; - phandle = <0x177>; + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; - PLDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x124f80>; - regulator-max-microvolt = <0x124f80>; - regulator-name = "avdd_1v2_s0"; - phandle = <0x2c1>; + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + }; - PLDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s0"; - phandle = <0x2c2>; + pcfg-pull-down-drv-level-15 { + drive-strength = <0x0f>; + bias-pull-down; + phandle = <0x46b>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + pcfg-pull-up-smt { + input-schmitt-enable; + phandle = <0x2fe>; + bias-pull-up; + }; - PLDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vccio_sd_s0"; - phandle = <0x118>; + pcfg-pull-down-drv-level-1 { + drive-strength = <0x01>; + bias-pull-down; + phandle = <0x2f8>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + pcfg-pull-up-drv-level-4 { + drive-strength = <0x04>; + phandle = <0x2f5>; + bias-pull-up; + }; - PLDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "pldo6_s3"; - phandle = <0x2c3>; + wireless-wlan { - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; - NLDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xb71b0>; - regulator-max-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s3"; - phandle = <0x2c4>; + wdt-pc9202 { - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xb71b0>; - }; - }; + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; - NLDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xcf850>; - regulator-max-microvolt = <0xcf850>; - regulator-name = "vdd_ddr_pll_s0"; - phandle = <0x2c5>; + pcfg-pull-none-drv-level-0-smt { + drive-strength = <0x00>; + bias-disable; + input-schmitt-enable; + phandle = <0x300>; + }; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; + i2s3 { - NLDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xb71b0>; - regulator-max-microvolt = <0xb71b0>; - regulator-name = "avdd_0v75_s0"; - phandle = <0x1df>; + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; - NLDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xcf850>; - regulator-max-microvolt = <0xcf850>; - regulator-name = "vdd_0v85_s0"; - phandle = <0x2c6>; + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; - NLDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xb71b0>; - regulator-max-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s0"; - phandle = <0x2c7>; + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; }; }; - }; - - spi@feb30000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfeb30000 0x00 0x1000>; - interrupts = <0x00 0x149 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0xa6 0x02 0xa1>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0xf1 0x11 0xf1 0x12>; - dma-names = "tx\0rx"; - pinctrl-names = "default"; - pinctrl-0 = <0x15d 0x15e 0x15f>; - num-cs = <0x02>; - status = "disabled"; - phandle = <0x2c8>; - }; - serial@feb40000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeb40000 0x00 0x100>; - interrupts = <0x00 0x14c 0x04>; - clocks = <0x02 0xb7 0x02 0xab>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x7c 0x08 0x7c 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x160>; - status = "okay"; - phandle = <0x2c9>; + pcfg-pull-none-drv-level-14 { + drive-strength = <0x0e>; + bias-disable; + phandle = <0x458>; + }; }; - serial@feb50000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeb50000 0x00 0x100>; - interrupts = <0x00 0x14d 0x04>; - clocks = <0x02 0xbb 0x02 0xac>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x7c 0x0a 0x7c 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x161>; + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; status = "disabled"; - phandle = <0x2ca>; + rockchip,cif = <0x1a1>; + phandle = <0x473>; }; - serial@feb60000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeb60000 0x00 0x100>; - interrupts = <0x00 0x14e 0x04>; - clocks = <0x02 0xbf 0x02 0xad>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x7c 0x0c 0x7c 0x0d>; - pinctrl-names = "default"; - pinctrl-0 = <0x162>; + bt-sco { + #sound-dai-cells = <0x01>; + compatible = "delta,dfbmcs320"; status = "disabled"; - phandle = <0x2cb>; + phandle = <0x1d2>; }; - serial@feb70000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeb70000 0x00 0x100>; - interrupts = <0x00 0x14f 0x04>; - clocks = <0x02 0xc3 0x02 0xae>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0xf1 0x09 0xf1 0x0a>; - pinctrl-names = "default"; - pinctrl-0 = <0x163>; - status = "disabled"; - phandle = <0x2cc>; + phy@fed80000 { + svid = <0xff01>; + orientation-switch; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + reg = <0x00 0xfed80000 0x00 0x10000>; + phandle = <0x2ea>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x18b>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@1 { + remote-endpoint = <0x18f>; + reg = <0x01>; + phandle = <0x17f>; + }; + + endpoint@0 { + remote-endpoint = <0x18e>; + reg = <0x00>; + phandle = <0x17e>; + }; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; }; - serial@feb80000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeb80000 0x00 0x100>; - interrupts = <0x00 0x150 0x04>; - clocks = <0x02 0xc7 0x02 0xaf>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0xf1 0x0b 0xf1 0x0c>; - pinctrl-names = "default"; - pinctrl-0 = <0x164>; - status = "disabled"; - phandle = <0x2cd>; + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; + + msi-controller@fe640000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + #msi-cells = <0x01>; + }; + + msi-controller@fe660000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + #msi-cells = <0x01>; + }; }; - serial@feb90000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeb90000 0x00 0x100>; - interrupts = <0x00 0x151 0x04>; - clocks = <0x02 0xcb 0x02 0xb0>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0xf1 0x0d 0xf1 0x0e>; + ethernet@fe1c0000 { + power-domains = <0x60 0x21>; pinctrl-names = "default"; - pinctrl-0 = <0x165>; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x10b>; + snps,reset-active-low; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x10c>; + local-mac-address = [de 2f 1a d4 a9 85]; + resets = <0x02 0x20b>; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; status = "okay"; - phandle = <0x2ce>; - }; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x08 0x01>; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x109>; + phy-handle = <0x113>; + reset-names = "stmmaceth"; + tx_delay = <0x40>; + snps,axi-config = <0x10a>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - serial@feba0000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfeba0000 0x00 0x100>; - interrupts = <0x00 0x152 0x04>; - clocks = <0x02 0xcf 0x02 0xb1>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0xf2 0x07 0xf2 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0x166>; - status = "disabled"; - phandle = <0x2cf>; - }; + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x28f>; - serial@febb0000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfebb0000 0x00 0x100>; - interrupts = <0x00 0x153 0x04>; - clocks = <0x02 0xd3 0x02 0xb2>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0xf2 0x09 0xf2 0x0a>; - pinctrl-names = "default"; - pinctrl-0 = <0x167>; - status = "disabled"; - phandle = <0x2d0>; - }; + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; - serial@febc0000 { - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - reg = <0x00 0xfebc0000 0x00 0x100>; - interrupts = <0x00 0x154 0x04>; - clocks = <0x02 0xd7 0x02 0xb3>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0xf2 0x0b 0xf2 0x0c>; - pinctrl-names = "default"; - pinctrl-0 = <0x168>; - status = "disabled"; - phandle = <0x2d1>; + tx-queues-config { + phandle = <0x10c>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x10a>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; }; - pwm@febd0000 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebd0000 0x00 0x10>; - interrupts = <0x00 0x15a 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x169>; - clocks = <0x02 0x54 0x02 0x53>; - clock-names = "pwm\0pclk"; + pcie-essd { + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + regulator-min-microvolt = <0x2625a0>; + regulator-name = "pcie_essd"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; status = "disabled"; - phandle = <0x2d2>; + phandle = <0x1ba>; + vin-supply = <0x1cd>; + gpios = <0x181 0x0f 0x00>; }; - pwm@febd0010 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebd0010 0x00 0x10>; - interrupts = <0x00 0x15a 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x16a>; - clocks = <0x02 0x54 0x02 0x53>; - clock-names = "pwm\0pclk"; + iommu@fdab9000 { + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; status = "okay"; - phandle = <0x1ed>; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + phandle = <0xb2>; }; - pwm@febd0020 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebd0020 0x00 0x10>; - interrupts = <0x00 0x15a 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x16b>; - clocks = <0x02 0x54 0x02 0x53>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d3>; - }; + otp@fecc0000 { + #address-cells = <0x01>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + phandle = <0x2e7>; + reset-names = "otpc\0apb\0arb"; - pwm@febd0030 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebd0030 0x00 0x10>; - interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x16c>; - clocks = <0x02 0x54 0x02 0x53>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d4>; - }; + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; - pwm@febe0000 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebe0000 0x00 0x10>; - interrupts = <0x00 0x15c 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x16d>; - clocks = <0x02 0x57 0x02 0x56>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d5>; - }; + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; - pwm@febe0010 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebe0010 0x00 0x10>; - interrupts = <0x00 0x15c 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x16e>; - clocks = <0x02 0x57 0x02 0x56>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d6>; - }; + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; - pwm@febe0020 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebe0020 0x00 0x10>; - interrupts = <0x00 0x15c 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x16f>; - clocks = <0x02 0x57 0x02 0x56>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d7>; - }; + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; - pwm@febe0030 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebe0030 0x00 0x10>; - interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x170>; - clocks = <0x02 0x57 0x02 0x56>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d8>; - }; + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; - pwm@febf0000 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebf0000 0x00 0x10>; - interrupts = <0x00 0x15e 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x171>; - clocks = <0x02 0x5a 0x02 0x59>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2d9>; + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpu-version@1c { + bits = <0x03 0x03>; + reg = <0x1c 0x01>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-low@6 { + bits = <0x05 0x03>; + reg = <0x06 0x01>; + phandle = <0xd4>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + package-serial-number-high@5 { + bits = <0x00 0x01>; + reg = <0x05 0x01>; + phandle = <0xd5>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + specification-serial-number@6 { + bits = <0x00 0x05>; + reg = <0x06 0x01>; + phandle = <0x21>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; }; - pwm@febf0010 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebf0010 0x00 0x10>; - interrupts = <0x00 0x15e 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x172>; - clocks = <0x02 0x5a 0x02 0x59>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2da>; + i2s@fddf0000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3e8>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + phandle = <0x1d3>; + dmas = <0xf2 0x02>; + reset-names = "tx-m"; + rockchip,hdmi-path; }; - pwm@febf0020 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebf0020 0x00 0x10>; - interrupts = <0x00 0x15e 0x04>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x173>; - clocks = <0x02 0x5a 0x02 0x59>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0x2db>; + dma-controller@fea10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + phandle = <0x7c>; + #dma-cells = <0x01>; }; - pwm@febf0030 { - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xfebf0030 0x00 0x10>; - interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; - #pwm-cells = <0x03>; + pwm@febd0000 { pinctrl-names = "active"; - pinctrl-0 = <0x174>; - clocks = <0x02 0x5a 0x02 0x59>; + pinctrl-0 = <0x169>; clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; status = "disabled"; - phandle = <0x2dc>; + reg = <0x00 0xfebd0000 0x00 0x10>; + phandle = <0x2d2>; }; - tsadc@fec00000 { - compatible = "rockchip,rk3588-tsadc"; - reg = <0x00 0xfec00000 0x00 0x400>; - interrupts = <0x00 0x18d 0x04>; - clocks = <0x02 0xaa 0x02 0xa9>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0xaa>; - assigned-clock-rates = <0x1e8480>; - resets = <0x02 0xc1 0x02 0xc0>; - reset-names = "tsadc\0tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - rockchip,hw-tshut-mode = <0x00>; - rockchip,hw-tshut-polarity = <0x00>; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x175>; - pinctrl-1 = <0x176>; - status = "okay"; - phandle = <0x5d>; - }; - - saradc@fec10000 { - compatible = "rockchip,rk3588-saradc"; - reg = <0x00 0xfec10000 0x00 0x10000>; - interrupts = <0x00 0x18e 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x9d 0x02 0x9c>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xbe>; - reset-names = "saradc-apb"; + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; status = "okay"; - vref-supply = <0x177>; - phandle = <0x1d9>; - }; - - mailbox@fec60000 { - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - reg = <0x00 0xfec60000 0x00 0x200>; - interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; - clocks = <0x02 0x4c>; - clock-names = "pclk_mailbox"; - #mbox-cells = <0x01>; - status = "disabled"; - phandle = <0x2dd>; - }; - - mailbox@fec70000 { - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - reg = <0x00 0xfec70000 0x00 0x200>; - interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; - clocks = <0x02 0x4d>; - clock-names = "pclk_mailbox"; - #mbox-cells = <0x01>; - status = "disabled"; - phandle = <0x2de>; + phandle = <0xc3>; }; - i2c@fec80000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfec80000 0x00 0x1000>; - clocks = <0x02 0x92 0x02 0x8a>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x143 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x178>; - resets = <0x02 0xb5 0x02 0xad>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x2df>; - - es8388@11 { - status = "okay"; - #sound-dai-cells = <0x00>; - compatible = "everest,es8388\0everest,es8323"; - reg = <0x11>; - clocks = <0x179>; - clock-names = "mclk"; - assigned-clocks = <0x179>; - assigned-clock-rates = <0xbb8000>; - pinctrl-names = "default"; - pinctrl-0 = <0x17a>; - phandle = <0x1db>; - }; + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; - fusb302@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <0x7b>; - interrupts = <0x1b 0x08>; + rgb { pinctrl-names = "default"; - pinctrl-0 = <0x17b>; - vbus-supply = <0x17c>; + pinctrl-0 = <0x71>; + compatible = "rockchip,rk3588-rgb"; status = "disabled"; - phandle = <0x2e0>; + phandle = <0x25c>; ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x17d>; - phandle = <0x68>; - }; - }; - }; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - power-role = "dual"; - try-power-role = "sink"; - op-sink-microwatt = <0xf4240>; - sink-pdos = <0x4019064>; - source-pdos = <0x401912c>; - phandle = <0x2e1>; - - altmodes { - #address-cells = <0x01>; - #size-cells = <0x00>; - - altmode@0 { - reg = <0x00>; - svid = <0xff01>; - vdo = <0xffffffff>; - }; - }; - - ports { #address-cells = <0x01>; #size-cells = <0x00>; + reg = <0x00>; - port@0 { - reg = <0x00>; - - endpoint { - remote-endpoint = <0x17e>; - phandle = <0x18e>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x17f>; - phandle = <0x18f>; - }; + endpoint@2 { + remote-endpoint = <0x3d>; + status = "disabled"; + reg = <0x02>; + phandle = <0xf0>; }; }; }; }; - - XC7160b@1b { - compatible = "firefly,xc7160"; - reg = <0x1b>; - clocks = <0x02 0x100>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - power-domains = <0x60 0x1b>; - power-gpios = <0x181 0x1d 0x01>; - reset-gpios = <0x182 0x05 0x00>; - pwdn-gpios = <0xfe 0x04 0x00>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "NC"; - rockchip,camera-module-lens-name = "NC"; - phandle = <0x2e2>; - - port { - - endpoint { - remote-endpoint = <0x183>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x31>; - }; - }; - }; - - imx415@37 { - compatible = "sony,imx415"; - reg = <0x37>; - clocks = <0x02 0x100>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - power-domains = <0x60 0x1b>; - power-gpios = <0x181 0x1d 0x00>; - reset-gpios = <0x182 0x05 0x01>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-index = <0x00>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - phandle = <0x2e3>; - - port { - - endpoint { - remote-endpoint = <0x184>; - data-lanes = <0x01 0x02 0x03 0x04>; - phandle = <0x32>; - }; - }; - }; }; - i2c@fec90000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfec90000 0x00 0x1000>; - clocks = <0x02 0x93 0x02 0x8b>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x144 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x185>; - resets = <0x02 0xb6 0x02 0xae>; - reset-names = "i2c\0apb"; + spi@fe2b0000 { #address-cells = <0x01>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; #size-cells = <0x00>; + compatible = "rockchip,sfc"; status = "disabled"; - phandle = <0x2e4>; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + phandle = <0x292>; }; - i2c@feca0000 { - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - reg = <0x00 0xfeca0000 0x00 0x1000>; - clocks = <0x02 0x94 0x02 0x8c>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x145 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x186>; - resets = <0x02 0xb7 0x02 0xaf>; - reset-names = "i2c\0apb"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x2e5>; + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; }; - spi@fecb0000 { - compatible = "rockchip,rk3066-spi"; - reg = <0x00 0xfecb0000 0x00 0x1000>; - interrupts = <0x00 0x14a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0xa7 0x02 0xa2>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0xf2 0x0d 0xf2 0x0e>; - dma-names = "tx\0rx"; - pinctrl-names = "default"; - pinctrl-0 = <0x187 0x188 0x189>; - num-cs = <0x02>; - status = "disabled"; - phandle = <0x2e6>; + mmc@fe2c0000 { + power-domains = <0x60 0x28>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + cap-sd-highspeed; + vqmmc-supply = <0x118>; + no-mmc; + bus-width = <0x04>; + no-sdio; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "okay"; + disable-wp; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + phandle = <0x293>; + sd-uhs-sdr104; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; }; - otp@fecc0000 { - compatible = "rockchip,rk3588-otp"; - reg = <0x00 0xfecc0000 0x00 0x400>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; - clock-names = "otpc\0apb\0arb\0phy"; - resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; - reset-names = "otpc\0apb\0arb"; - phandle = <0x2e7>; + serial@feb80000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb80000 0x00 0x100>; + phandle = <0x2cd>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + reg-shift = <0x02>; + }; - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x2c>; - }; + phy@fee10000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x1cb>; + reg = <0x00 0xfee10000 0x00 0x100>; + phandle = <0x1bc>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + }; - package-serial-number-high@5 { - reg = <0x05 0x01>; - bits = <0x00 0x01>; - phandle = <0xd5>; - }; + can@fea60000 { + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + clock-names = "baudclk\0apb_pclk"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0xbb 0x02 0xba>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + compatible = "rockchip,can-2.0"; + status = "okay"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea60000 0x00 0x1000>; + phandle = <0x2a1>; + reset-names = "can\0can-apb"; + }; - package-serial-number-low@6 { - reg = <0x06 0x01>; - bits = <0x05 0x03>; - phandle = <0xd4>; - }; + pdm@fe4c0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x140 0x141>; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + clocks = <0x02 0x3b 0x02 0x3a>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x13f>; + status = "disabled"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + phandle = <0x29b>; + dmas = <0xf1 0x04>; + }; - specification-serial-number@6 { - reg = <0x06 0x01>; - bits = <0x00 0x05>; - phandle = <0x21>; - }; + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x239>; + }; - id@7 { - reg = <0x07 0x10>; - phandle = <0x2a>; - }; + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; - cpu-version@1c { - reg = <0x1c 0x01>; - bits = <0x03 0x03>; - phandle = <0x2b>; - }; + usb@fc800000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc800000 0x00 0x40000>; + phandle = <0x254>; + }; - cpub0-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x24>; - }; + i2c@fd880000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x77>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xc0022 0x02 0xc0021>; + interrupts = <0x00 0x13d 0x04>; + clocks = <0x02 0x287 0x02 0x286>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfd880000 0x00 0x1000>; + phandle = <0x25f>; + reset-names = "i2c\0apb"; - cpub1-leakage@18 { - reg = <0x18 0x01>; - phandle = <0x27>; + hym8563@51 { + pinctrl-names = "default"; + clock-output-names = "hym8563"; + pinctrl-0 = <0x7a>; + wakeup-source; + interrupts = <0x08 0x08>; + #clock-cells = <0x00>; + interrupt-parent = <0x7b>; + clock-frequency = <0x8000>; + compatible = "haoyu,hym8563"; + status = "okay"; + reg = <0x51>; + phandle = <0x1e4>; }; - cpul-leakage@19 { - reg = <0x19 0x01>; - phandle = <0x1f>; - }; + rk8602@42 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0x18>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; - log-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x44>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; - gpu-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x63>; - }; + rk8603@43 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8603"; + reg = <0x43>; + phandle = <0x1c>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; - npu-leakage@28 { - reg = <0x28 0x01>; - phandle = <0xb4>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; - codec-leakage@29 { - reg = <0x29 0x01>; - phandle = <0xc6>; + pc9202@3c { + index = <0x00>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + reg = <0x3c>; }; + }; - cpul-opp-info@3d { - reg = <0x3d 0x06>; - phandle = <0x20>; - }; + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x237>; + }; - cpub01-opp-info@43 { - reg = <0x43 0x06>; - phandle = <0x25>; - }; + serial@fd890000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfd890000 0x00 0x100>; + phandle = <0x260>; + dmas = <0x7c 0x06 0x7c 0x07>; + reg-shift = <0x02>; + }; - cpub23-opp-info@49 { - reg = <0x49 0x06>; - phandle = <0x28>; - }; + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; - gpu-opp-info@4f { - reg = <0x4f 0x06>; - phandle = <0x64>; + gpu-opp-table { + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x04>; + nvmem-cells = <0x63 0x64 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x65>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0x61>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x61a80>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; }; - npu-opp-info@55 { - reg = <0x55 0x06>; - phandle = <0xb5>; + opp-300000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; }; - dmc-opp-info@5b { - reg = <0x5b 0x06>; - phandle = <0x45>; + opp-500000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; }; - vop-opp-info@61 { - reg = <0x61 0x06>; - phandle = <0x2e8>; + opp-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x02 0xffff>; }; - venc-opp-info@67 { - reg = <0x67 0x06>; - phandle = <0xc7>; + opp-j-850000000 { + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-hz = <0x00 0x32a9f880>; + opp-supported-hw = <0x04 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; }; - }; - mailbox@fece0000 { - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - reg = <0x00 0xfece0000 0x00 0x200>; - interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; - clocks = <0x02 0x4e>; - clock-names = "pclk_mailbox"; - #mbox-cells = <0x01>; - status = "disabled"; - phandle = <0x2e9>; - }; + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; - dma-controller@fed10000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfed10000 0x00 0x4000>; - interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; - clocks = <0x02 0x7a>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - arm,pl330-periph-burst; - phandle = <0xf2>; - }; + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; - phy@fed60000 { - compatible = "rockchip,rk3588-hdptx-phy"; - reg = <0x00 0xfed60000 0x00 0x2000>; - clocks = <0x02 0x2b5 0x02 0x267>; - clock-names = "ref\0apb"; - resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; - reset-names = "apb\0init\0cmn\0lane"; - rockchip,grf = <0x18a>; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0x101>; - }; + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; - hdmiphy@fed60000 { - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - reg = <0x00 0xfed60000 0x00 0x2000>; - clocks = <0x02 0x2b5 0x02 0x267>; - clock-names = "ref\0apb"; - resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - rockchip,grf = <0x18a>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0xfd>; + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x35>; + opp-m-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; }; - }; - phy@fed80000 { - compatible = "rockchip,rk3588-usbdp-phy"; - reg = <0x00 0xfed80000 0x00 0x10000>; - rockchip,u2phy-grf = <0x18b>; - rockchip,usb-grf = <0x74>; - rockchip,usbdpphy-grf = <0x18c>; - rockchip,vo-grf = <0xf5>; - clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - status = "okay"; - orientation-switch; - svid = <0xff01>; - sbu1-dc-gpios = <0x10d 0x06 0x00>; - sbu2-dc-gpios = <0x10d 0x07 0x00>; - phandle = <0x2ea>; + opp-400000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + }; - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0xf6>; + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; }; - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x67>; + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; }; - port { - #address-cells = <0x01>; - #size-cells = <0x00>; + opp-m-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x18e>; - phandle = <0x17e>; - }; + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x18f>; - phandle = <0x17f>; - }; + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; }; - }; - phy@feda0000 { - compatible = "rockchip,rk3588-mipi-dcphy"; - reg = <0x00 0xfeda0000 0x00 0x10000>; - rockchip,grf = <0x190>; - clocks = <0x02 0x108 0x02 0x2b6>; - clock-names = "pclk\0ref"; - resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x2f>; - }; - - phy@fedb0000 { - compatible = "rockchip,rk3588-mipi-dcphy"; - reg = <0x00 0xfedb0000 0x00 0x10000>; - rockchip,grf = <0x191>; - clocks = <0x02 0x109 0x02 0x2b6>; - clock-names = "pclk\0ref"; - resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x30>; - }; - - csi2-dphy0-hw@fedc0000 { - compatible = "rockchip,rk3588-csi2-dphy-hw"; - reg = <0x00 0xfedc0000 0x00 0x8000>; - clocks = <0x02 0x10c>; - clock-names = "pclk"; - resets = <0x02 0x17 0x02 0x16>; - reset-names = "srst_csiphy0\0srst_p_csiphy0"; - rockchip,grf = <0x192>; - rockchip,sys_grf = <0xc8>; - status = "okay"; - phandle = <0x2d>; + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; }; csi2-dphy1-hw@fedc8000 { - compatible = "rockchip,rk3588-csi2-dphy-hw"; - reg = <0x00 0xfedc8000 0x00 0x8000>; - clocks = <0x02 0x10d>; clock-names = "pclk"; resets = <0x02 0x19 0x02 0x18>; - reset-names = "srst_csiphy1\0srst_p_csiphy1"; - rockchip,grf = <0x193>; - rockchip,sys_grf = <0xc8>; + clocks = <0x02 0x10d>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; status = "okay"; + rockchip,grf = <0x193>; + reg = <0x00 0xfedc8000 0x00 0x8000>; phandle = <0x2e>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,sys_grf = <0xc8>; }; - phy@fee00000 { - compatible = "rockchip,rk3588-naneng-combphy"; - reg = <0x00 0xfee00000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bd>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20005 0x02 0x4d6>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x76>; - rockchip,pipe-phy-grf = <0x194>; - status = "okay"; - phandle = <0x108>; + hdcp@fde40000 { + power-domains = <0x60 0x19>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde40000 0x00 0x80>; + phandle = <0x285>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xf5>; }; - phy@fee20000 { - compatible = "rockchip,rk3588-naneng-combphy"; - reg = <0x00 0xfee20000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bf>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20007 0x02 0x4d8>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x76>; - rockchip,pipe-phy-grf = <0x195>; - rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; - status = "disabled"; - phandle = <0x70>; + iommu@fdbac800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7f 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege3_mmu"; + reg = <0x00 0xfdbac800 0x00 0x40>; + phandle = <0xc0>; }; - sram@ff001000 { - compatible = "mmio-sram"; - reg = <0x00 0xff001000 0x00 0xef000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x00 0x00 0xff001000 0xef000>; - phandle = <0x2eb>; + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; - rkvdec-sram@0 { - reg = <0x00 0x78000>; - phandle = <0xcb>; - }; + rga@fdb70000 { + power-domains = <0x60 0x1e>; + iommus = <0xba>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + compatible = "rockchip,rga3_core1"; + status = "okay"; + interrupt-names = "rga3_core1_irq"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + phandle = <0x26a>; + }; - rkvdec-sram@78000 { - reg = <0x78000 0x77000>; - phandle = <0xcd>; - }; + spi@feb00000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x14e 0x14f 0x150>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x146 0x04>; + clocks = <0x02 0xa3 0x02 0x9e>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + phandle = <0x2ab>; + dmas = <0x7c 0x0e 0x7c 0x0f>; }; - pinctrl { - compatible = "rockchip,rk3588-pinctrl"; - rockchip,grf = <0x196>; - #address-cells = <0x02>; + pcie@fe170000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x20 0x2f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x20f 0x02 0x21e>; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; #size-cells = <0x02>; - ranges; - phandle = <0x197>; - - gpio@fd8a0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfd8a0000 0x00 0x100>; - interrupts = <0x00 0x115 0x04>; - clocks = <0x02 0x284 0x02 0x285>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x00 0x20>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x7b>; - }; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1bc 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + linux,pci-domain = <0x02>; + phandle = <0x487>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; - gpio@fec20000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfec20000 0x00 0x100>; - interrupts = <0x00 0x116 0x04>; - clocks = <0x02 0x7d 0x02 0x7e>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x20 0x20>; + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf0 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1bb>; interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xfe>; }; + }; - gpio@fec30000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfec30000 0x00 0x100>; - interrupts = <0x00 0x117 0x04>; - clocks = <0x02 0x7f 0x02 0x80>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x40 0x20>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x79>; - }; + i2s@fe470000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x11b 0x11c>; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + resets = <0x02 0x77 0x02 0x7a>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + pinctrl-1 = <0x11f>; + status = "okay"; + reg = <0x00 0xfe470000 0x00 0x1000>; + phandle = <0x1da>; + dmas = <0x7c 0x00 0x7c 0x01>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; - gpio@fec40000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfec40000 0x00 0x100>; - interrupts = <0x00 0x118 0x04>; - clocks = <0x02 0x81 0x02 0x82>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x60 0x20>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x181>; - }; + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; - gpio@fec50000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xfec50000 0x00 0x100>; - interrupts = <0x00 0x119 0x04>; - clocks = <0x02 0x83 0x02 0x84>; - gpio-controller; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x80 0x20>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x10d>; - }; + csi2-dphy5 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x214>; + }; - pcfg-pull-up { - bias-pull-up; - phandle = <0x19e>; - }; + usb@fc840000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc840000 0x00 0x40000>; + phandle = <0x6b>; + }; - pcfg-pull-down { - bias-pull-down; - phandle = <0x2ec>; - }; + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; - pcfg-pull-none { - bias-disable; - phandle = <0x198>; - }; + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x236>; + }; - pcfg-pull-none-drv-level-0 { - bias-disable; - drive-strength = <0x00>; - phandle = <0x2ed>; - }; + rkisp1-vir1 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x240>; + }; - pcfg-pull-none-drv-level-1 { - bias-disable; - drive-strength = <0x01>; - phandle = <0x2ee>; - }; + i2c@feaa0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x149>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb1 0x02 0xa9>; + interrupts = <0x00 0x13f 0x04>; + clocks = <0x02 0x8e 0x02 0x86>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + phandle = <0x2a5>; + reset-names = "i2c\0apb"; + }; - pcfg-pull-none-drv-level-2 { - bias-disable; - drive-strength = <0x02>; - phandle = <0x1a0>; - }; + dmc { + downdifferential = <0x14>; + clock-names = "dmc_clk"; + interrupts = <0x00 0x49 0x04>; + clocks = <0x0e 0x04>; + upthreshold = <0x28>; + center-supply = <0x42>; + devfreq-events = <0x40>; + compatible = "rockchip,rk3588-dmc"; + status = "disabled"; + interrupt-names = "complete"; + mem-supply = <0x43>; + phandle = <0x21f>; + operating-points-v2 = <0x41>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + }; - pcfg-pull-none-drv-level-3 { - bias-disable; - drive-strength = <0x03>; - phandle = <0x2ef>; - }; + hdmi1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,card-name = "rockchip-hdmi1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a8>; + rockchip,mclk-fs = <0x80>; + }; - pcfg-pull-none-drv-level-4 { - bias-disable; - drive-strength = <0x04>; - phandle = <0x2f0>; - }; + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; - pcfg-pull-none-drv-level-5 { - bias-disable; - drive-strength = <0x05>; - phandle = <0x2f1>; - }; + mipi-dcphy-dummy { + phandle = <0x223>; + }; - pcfg-pull-none-drv-level-6 { - bias-disable; - drive-strength = <0x06>; - phandle = <0x2f2>; - }; + jpege-core@fdbac000 { + power-domains = <0x60 0x15>; + iommus = <0xc0>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b2>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + interrupts = <0x00 0x80 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege3"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbac000 0x00 0x400>; + phandle = <0x270>; + reset-names = "video_a\0video_h"; + }; - pcfg-pull-up-drv-level-0 { - bias-pull-up; - drive-strength = <0x00>; - phandle = <0x2f3>; - }; + iommu@fdce0800 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x71 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "cif_mmu"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + phandle = <0x50>; + }; - pcfg-pull-up-drv-level-1 { - bias-pull-up; - drive-strength = <0x01>; - phandle = <0x19f>; - }; + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; - pcfg-pull-up-drv-level-2 { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x199>; - }; + syscon@fd5a8000 { + clocks = <0x73>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + phandle = <0xd8>; + }; - pcfg-pull-up-drv-level-3 { - bias-pull-up; - drive-strength = <0x03>; - phandle = <0x2f4>; - }; + dp0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,card-name = "rockchip-dp0"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x49c>; + rockchip,mclk-fs = <0x200>; + }; - pcfg-pull-up-drv-level-4 { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0x2f5>; - }; + rkcif-mipi-lvds4 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a1>; + }; - pcfg-pull-up-drv-level-5 { - bias-pull-up; - drive-strength = <0x05>; - phandle = <0x2f6>; - }; - - pcfg-pull-up-drv-level-6 { - bias-pull-up; - drive-strength = <0x06>; - phandle = <0x19a>; - }; + usb@fc880000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc880000 0x00 0x40000>; + phandle = <0x255>; + }; - pcfg-pull-down-drv-level-0 { - bias-pull-down; - drive-strength = <0x00>; - phandle = <0x2f7>; - }; + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; - pcfg-pull-down-drv-level-1 { - bias-pull-down; - drive-strength = <0x01>; - phandle = <0x2f8>; - }; + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; - pcfg-pull-down-drv-level-2 { - bias-pull-down; - drive-strength = <0x02>; - phandle = <0x2f9>; - }; + mipi1-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x225>; + }; - pcfg-pull-down-drv-level-3 { - bias-pull-down; - drive-strength = <0x03>; - phandle = <0x2fa>; - }; + hdmiphy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1ac>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - pcfg-pull-down-drv-level-4 { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x2fb>; + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; }; + }; - pcfg-pull-down-drv-level-5 { - bias-pull-down; - drive-strength = <0x05>; - phandle = <0x2fc>; - }; + i2c@fec80000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x178>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb5 0x02 0xad>; + interrupts = <0x00 0x143 0x04>; + clocks = <0x02 0x92 0x02 0x8a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfec80000 0x00 0x1000>; + phandle = <0x2df>; + reset-names = "i2c\0apb"; - pcfg-pull-down-drv-level-6 { - bias-pull-down; - drive-strength = <0x06>; - phandle = <0x2fd>; - }; + imx415@37 { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + reset-gpios = <0x182 0x05 0x01>; + rockchip,camera-module-index = <0x00>; + compatible = "sony,imx415"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x00>; + reg = <0x37>; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; - pcfg-pull-up-smt { - bias-pull-up; - input-schmitt-enable; - phandle = <0x2fe>; - }; + port { - pcfg-pull-down-smt { - bias-pull-down; - input-schmitt-enable; - phandle = <0x2ff>; + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x184>; + phandle = <0x32>; + }; + }; }; - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x19d>; + es8388@11 { + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + clocks = <0x179>; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + status = "okay"; + reg = <0x11>; + phandle = <0x1db>; }; - pcfg-pull-none-drv-level-0-smt { - bias-disable; - drive-strength = <0x00>; - input-schmitt-enable; - phandle = <0x300>; - }; + XC7160b@1b { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + pwdn-gpios = <0xfe 0x04 0x00>; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "NC"; + reset-gpios = <0x182 0x05 0x00>; + rockchip,camera-module-index = <0x00>; + compatible = "firefly,xc7160"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x01>; + reg = <0x1b>; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; - pcfg-pull-none-drv-level-1-smt { - bias-disable; - drive-strength = <0x01>; - input-schmitt-enable; - phandle = <0x19c>; - }; + port { - pcfg-pull-none-drv-level-2-smt { - bias-disable; - drive-strength = <0x02>; - input-schmitt-enable; - phandle = <0x301>; + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x183>; + phandle = <0x31>; + }; + }; }; - pcfg-pull-none-drv-level-3-smt { - bias-disable; - drive-strength = <0x03>; - input-schmitt-enable; - phandle = <0x302>; - }; + fusb302@22 { + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + interrupts = <0x1b 0x08>; + vbus-supply = <0x17c>; + interrupt-parent = <0x7b>; + compatible = "fcs,fusb302"; + status = "disabled"; + reg = <0x22>; + phandle = <0x2e0>; - pcfg-pull-none-drv-level-4-smt { - bias-disable; - drive-strength = <0x04>; - input-schmitt-enable; - phandle = <0x303>; - }; + connector { + sink-pdos = <0x4019064>; + power-role = "dual"; + source-pdos = <0x401912c>; + data-role = "dual"; + label = "USB-C"; + try-power-role = "sink"; + compatible = "usb-c-connector"; + op-sink-microwatt = <0xf4240>; + phandle = <0x2e1>; - pcfg-pull-none-drv-level-5-smt { - bias-disable; - drive-strength = <0x05>; - input-schmitt-enable; - phandle = <0x19b>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - pcfg-pull-none-drv-level-6-smt { - bias-disable; - drive-strength = <0x06>; - input-schmitt-enable; - phandle = <0x304>; - }; + port@0 { + reg = <0x00>; - pcfg-output-high { - output-high; - phandle = <0x305>; - }; + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; - pcfg-output-high-pull-up { - output-high; - bias-pull-up; - phandle = <0x306>; - }; + port@1 { + reg = <0x01>; - pcfg-output-high-pull-down { - output-high; - bias-pull-down; - phandle = <0x307>; - }; - - pcfg-output-high-pull-none { - output-high; - bias-disable; - phandle = <0x308>; - }; - - pcfg-output-low { - output-low; - phandle = <0x309>; - }; + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; - pcfg-output-low-pull-up { - output-low; - bias-pull-up; - phandle = <0x30a>; - }; + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; - pcfg-output-low-pull-down { - output-low; - bias-pull-down; - phandle = <0x30b>; - }; + altmode@0 { + svid = <0xff01>; + vdo = <0xffffffff>; + reg = <0x00>; + }; + }; + }; - pcfg-output-low-pull-none { - output-low; - bias-disable; - phandle = <0x30c>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - auddsm { + port@0 { + reg = <0x00>; - auddsm-pins { - rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; - phandle = <0x144>; + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; }; }; + }; - bt1120 { + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; - bt1120-pins { - rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; - phandle = <0x71>; - }; - }; + vbus5v0-typec-pwr-en-regulator { + gpio = <0x182 0x0c 0x00>; + enable-active-high; + regulator-name = "vbus5v0_typec_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x17c>; + }; - can0 { + mipi2-csi2-hw@fdd30000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x326>; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + clocks = <0x02 0x1d1>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + phandle = <0x49>; + reset-names = "srst_csihost_p"; + }; - can0m0-pins { - rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; - phandle = <0x145>; - }; + spdif-rx@fde18000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x401>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde18000 0x00 0x1000>; + phandle = <0x480>; + dmas = <0x7c 0x17>; + reset-names = "spdifrx-m"; + }; - can0m1-pins { - rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; - phandle = <0x30d>; - }; - }; + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; - can1 { + rkisp0-vir3 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23e>; + }; - can1m0-pins { - rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; - phandle = <0x30e>; - }; + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; - can1m1-pins { - rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; - phandle = <0x146>; - }; - }; + rkcif@fdce0000 { + power-domains = <0x60 0x1b>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + reg-names = "cif_regs"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + interrupts = <0x00 0x9b 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + compatible = "rockchip,rk3588-cif"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "cif-intr"; + nvmem-cell-names = "specification\0package_low\0package_high"; + reg = <0x00 0xfdce0000 0x00 0x800>; + phandle = <0x4f>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + }; - can2 { + edp@fdec0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x101>; + reg = <0x00 0xfdec0000 0x00 0x1000>; + phandle = <0x289>; + reset-names = "dp\0apb"; - can2m0-pins { - rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; - phandle = <0x147>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - can2m1-pins { - rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; - phandle = <0x30f>; - }; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; - cif { + endpoint@1 { + remote-endpoint = <0x103>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe1>; + }; - cif-clk { - rockchip,pins = <0x04 0x0c 0x01 0x198>; - phandle = <0x310>; - }; + endpoint@2 { + remote-endpoint = <0x3b>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe7>; + }; - cif-dvp-clk { - rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; - phandle = <0x311>; + endpoint@0 { + remote-endpoint = <0x102>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdb>; + }; }; - cif-dvp-bus16 { - rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; - phandle = <0x312>; - }; + port@1 { + reg = <0x01>; - cif-dvp-bus8 { - rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; - phandle = <0x313>; + endpoint { + phandle = <0x28a>; + }; }; }; + }; - clk32k { - - clk32k-in { - rockchip,pins = <0x00 0x0a 0x01 0x198>; - phandle = <0x314>; - }; - - clk32k-out0 { - rockchip,pins = <0x00 0x0a 0x02 0x198>; - phandle = <0x315>; - }; - - clk32k-out1 { - rockchip,pins = <0x02 0x15 0x01 0x198>; - phandle = <0x316>; - }; - }; + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; - cpu { + dp@fde60000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0x1a5>; + reg = <0x00 0xfde60000 0x00 0x4000>; + phandle = <0x1e3>; - cpu-pins { - rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; - phandle = <0x317>; - }; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - ddrphych0 { + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; - ddrphych0-pins { - rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; - phandle = <0x318>; - }; - }; + endpoint@1 { + remote-endpoint = <0x3e>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe3>; + }; - ddrphych1 { + endpoint@2 { + remote-endpoint = <0x1a7>; + status = "disabled"; + reg = <0x02>; + phandle = <0xeb>; + }; - ddrphych1-pins { - rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; - phandle = <0x319>; + endpoint@0 { + remote-endpoint = <0x1a6>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdd>; + }; }; - }; - ddrphych2 { + port@1 { + reg = <0x01>; - ddrphych2-pins { - rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; - phandle = <0x31a>; + endpoint { + phandle = <0x481>; + }; }; }; + }; - ddrphych3 { + vcc5v0-usbdcin { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usbdcin"; + compatible = "regulator-fixed"; + phandle = <0x48c>; + vin-supply = <0x1cd>; + }; - ddrphych3-pins { - rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; - phandle = <0x31b>; - }; - }; + rkvdec-core@fdc48000 { + power-domains = <0x60 0x0f>; + iommus = <0xcc>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + interrupts = <0x00 0x61 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec1"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xffe00000 0x100000>; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + phandle = <0x275>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcd>; + }; - dp0 { + vcc-1v1-nldo-s3 { + regulator-max-microvolt = <0x10c8e0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-name = "vcc_1v1_nldo_s3"; + compatible = "regulator-fixed"; + phandle = <0x15c>; + vin-supply = <0x78>; + }; - dp0m0-pins { - rockchip,pins = <0x04 0x0c 0x05 0x198>; - phandle = <0x31c>; - }; + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; - dp0m1-pins { - rockchip,pins = <0x00 0x14 0x0a 0x198>; - phandle = <0x31d>; - }; + power-controller { + #address-cells = <0x01>; + #size-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-power-controller"; + status = "okay"; + phandle = <0x60>; - dp0m2-pins { - rockchip,pins = <0x01 0x00 0x05 0x198>; - phandle = <0x31e>; + power-domain@37 { + clocks = <0x02 0x199 0x02 0x140>; + reg = <0x25>; + pm_qos = <0xaf>; }; - }; - dp1 { + power-domain@27 { + #address-cells = <0x01>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + #size-cells = <0x00>; + reg = <0x1b>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; - dp1m0-pins { - rockchip,pins = <0x03 0x1d 0x05 0x198>; - phandle = <0x31f>; - }; + power-domain@29 { + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + reg = <0x1d>; + pm_qos = <0xa8 0xa9>; + }; - dp1m1-pins { - rockchip,pins = <0x00 0x15 0x0a 0x198>; - phandle = <0x320>; + power-domain@28 { + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + reg = <0x1c>; + pm_qos = <0xa6 0xa7>; + }; }; - dp1m2-pins { - rockchip,pins = <0x01 0x01 0x05 0x198>; - phandle = <0x321>; + power-domain@33 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x21>; }; - }; - emmc { + power-domain@13 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x0d>; - emmc-rstnout { - rockchip,pins = <0x02 0x03 0x01 0x198>; - phandle = <0x322>; - }; + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; - emmc-bus8 { - rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; - phandle = <0x323>; - }; + power-domain@16 { + #address-cells = <0x01>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + #size-cells = <0x00>; + reg = <0x10>; + pm_qos = <0x8d 0x8e 0x8f>; - emmc-clk { - rockchip,pins = <0x02 0x01 0x01 0x199>; - phandle = <0x324>; - }; + power-domain@17 { + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + reg = <0x11>; + pm_qos = <0x90 0x91 0x92>; + }; + }; - emmc-cmd { - rockchip,pins = <0x02 0x00 0x01 0x199>; - phandle = <0x325>; + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; }; - emmc-data-strobe { - rockchip,pins = <0x02 0x02 0x01 0x198>; - phandle = <0x326>; + power-domain@31 { + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + reg = <0x1f>; + pm_qos = <0xab 0xac 0xad 0xae>; }; - }; - eth1 { + power-domain@21 { + #address-cells = <0x01>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + #size-cells = <0x00>; + reg = <0x15>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; - eth1-pins { - rockchip,pins = <0x03 0x06 0x01 0x198>; - phandle = <0x327>; - }; - }; + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; - fspi { + power-domain@23 { + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + reg = <0x17>; + pm_qos = <0x9b>; + }; - fspim0-pins { - rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; - phandle = <0x328>; - }; - - fspim0-cs1 { - rockchip,pins = <0x02 0x1f 0x02 0x199>; - phandle = <0x329>; - }; + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; - fspim2-pins { - rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; - phandle = <0x32a>; + power-domain@22 { + clocks = <0x02 0x1ba 0x02 0x1b9>; + reg = <0x16>; + pm_qos = <0x9c>; + }; }; - fspim2-cs1 { - rockchip,pins = <0x03 0x15 0x02 0x199>; - phandle = <0x32b>; + power-domain@38 { + clocks = <0x02 0x3c 0x02 0x3d>; + reg = <0x26>; }; - fspim1-pins { - rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; - phandle = <0x32c>; - }; + power-domain@8 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x08>; - fspim1-cs1 { - rockchip,pins = <0x02 0x0d 0x03 0x199>; - phandle = <0x32d>; - }; - }; + power-domain@9 { + #address-cells = <0x01>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + #size-cells = <0x00>; + reg = <0x09>; + pm_qos = <0x82 0x83 0x84>; - gmac1 { + power-domain@11 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0b>; + pm_qos = <0x86>; + }; - gmac1-miim { - rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; - phandle = <0x10e>; + power-domain@10 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0a>; + pm_qos = <0x85>; + }; + }; }; - gmac1-clkinout { - rockchip,pins = <0x03 0x0e 0x01 0x198>; - phandle = <0x32e>; + power-domain@26 { + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + reg = <0x1a>; + pm_qos = <0xa0 0xa1>; }; - gmac1-rx-bus2 { - rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; - phandle = <0x110>; + power-domain@34 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x22>; }; - gmac1-tx-bus2 { - rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; - phandle = <0x10f>; - }; + power-domain@24 { + #address-cells = <0x01>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + #size-cells = <0x00>; + reg = <0x18>; + pm_qos = <0x9d 0x9e>; - gmac1-rgmii-clk { - rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; - phandle = <0x111>; + power-domain@25 { + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + reg = <0x19>; + pm_qos = <0x9f>; + }; }; - gmac1-rgmii-bus { - rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; - phandle = <0x112>; + power-domain@12 { + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + reg = <0x0c>; + pm_qos = <0x87 0x88 0x89 0x8a>; }; - gmac1-ppsclk { - rockchip,pins = <0x03 0x11 0x01 0x198>; - phandle = <0x32f>; + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; }; - gmac1-ppstrig { - rockchip,pins = <0x03 0x10 0x01 0x198>; - phandle = <0x330>; + power-domain@30 { + clocks = <0x02 0x189 0x02 0x18a>; + reg = <0x1e>; + pm_qos = <0xaa>; }; + }; + }; - gmac1-ptp-ref-clk { - rockchip,pins = <0x03 0x0f 0x01 0x198>; - phandle = <0x331>; - }; + csi2-dphy3 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x212>; + }; - gmac1-txer { - rockchip,pins = <0x03 0x0a 0x01 0x198>; - phandle = <0x332>; - }; - }; + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; - gpu { + pwm@fd8b0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + phandle = <0x264>; + }; - gpu-pins { - rockchip,pins = <0x00 0x15 0x02 0x198>; - phandle = <0x333>; - }; - }; + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x234>; + }; - hdmi { + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; - hdmim0-rx-cec { - rockchip,pins = <0x04 0x0d 0x05 0x198>; - phandle = <0x334>; - }; + vdpu@fdb50400 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-decoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "okay"; + interrupt-names = "irq_vdpu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50400 0x00 0x400>; + phandle = <0x267>; + reset-names = "shared_video_a\0shared_video_h"; + }; - hdmim0-rx-hpdin { - rockchip,pins = <0x04 0x0e 0x05 0x198>; - phandle = <0x335>; - }; + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; - hdmim0-rx-scl { - rockchip,pins = <0x00 0x1a 0x0b 0x198>; - phandle = <0x336>; - }; + pwm@febe0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0030 0x00 0x10>; + phandle = <0x2d8>; + }; - hdmim0-rx-sda { - rockchip,pins = <0x00 0x19 0x0b 0x198>; - phandle = <0x337>; - }; + display-subsystem { + memory-region-names = "drm-logo"; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + ports = <0x34>; + memory-region = <0x37>; + clocks = <0x35 0x36>; + compatible = "rockchip,display-subsystem"; + phandle = <0x215>; - hdmim0-tx0-cec { - rockchip,pins = <0x04 0x11 0x05 0x198>; - phandle = <0xf9>; - }; + route { - hdmim0-tx0-hpd { - rockchip,pins = <0x01 0x05 0x05 0x198>; - phandle = <0xfa>; + route-edp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21a>; }; - hdmim0-tx0-scl { - rockchip,pins = <0x04 0x0f 0x05 0x19b>; - phandle = <0xfb>; + route-hdmi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3f>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21e>; }; - hdmim0-tx0-sda { - rockchip,pins = <0x04 0x10 0x05 0x19c>; - phandle = <0xfc>; - }; - - hdmim0-tx1-hpd { - rockchip,pins = <0x01 0x06 0x05 0x198>; - phandle = <0x1a9>; + route-dp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3e>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21d>; }; - hdmim1-rx { - rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; - phandle = <0x1b3>; + route-dsi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3a>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x218>; }; - hdmim1-rx-cec { - rockchip,pins = <0x03 0x19 0x05 0x198>; - phandle = <0x338>; + route-edp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3b>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x219>; }; - hdmim1-rx-hpdin { - rockchip,pins = <0x03 0x1c 0x05 0x198>; - phandle = <0x339>; + route-hdmi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3c>; + logo,mode = "center"; + status = "okay"; + phandle = <0x21b>; }; - hdmim1-rx-scl { - rockchip,pins = <0x03 0x1a 0x05 0x19d>; - phandle = <0x33a>; + route-dp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x38>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x216>; }; - hdmim1-rx-sda { - rockchip,pins = <0x03 0x1b 0x05 0x19d>; - phandle = <0x33b>; + route-rgb { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3d>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21c>; }; - hdmim1-tx0-cec { - rockchip,pins = <0x00 0x19 0x0d 0x198>; - phandle = <0x33c>; + route-dsi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x39>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x217>; }; + }; + }; - hdmim1-tx0-hpd { - rockchip,pins = <0x03 0x1c 0x03 0x198>; - phandle = <0x33d>; - }; + serial@febc0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebc0000 0x00 0x100>; + phandle = <0x2d1>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + reg-shift = <0x02>; + }; - hdmim1-tx0-scl { - rockchip,pins = <0x00 0x1d 0x0b 0x19b>; - phandle = <0x33e>; - }; + adc-keys { + io-channels = <0x1d9 0x01>; + poll-interval = <0x64>; + keyup-threshold-microvolt = <0x1b7740>; + compatible = "adc-keys"; + status = "okay"; + phandle = <0x49e>; + io-channel-names = "buttons"; - hdmim1-tx0-sda { - rockchip,pins = <0x00 0x1c 0x0b 0x19c>; - phandle = <0x33f>; - }; + recovery-key { + press-threshold-microvolt = <0x4268>; + label = "F12"; + linux,code = <0x58>; + }; + }; - hdmim1-tx1-cec { - rockchip,pins = <0x00 0x1a 0x0d 0x198>; - phandle = <0x340>; - }; + pvtm@fdaf0000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; - hdmim1-tx1-hpd { - rockchip,pins = <0x03 0x0f 0x05 0x198>; - phandle = <0x341>; - }; + pvtm@3 { + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + clocks = <0x02 0x12b 0x02 0x129>; + reg = <0x03>; + reset-names = "rts\0rst-p"; + }; + }; - hdmim1-tx1-scl { - rockchip,pins = <0x03 0x16 0x05 0x19b>; - phandle = <0x1aa>; - }; + codec-digital@fe500000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + clock-names = "dac\0pclk"; + resets = <0x02 0x84>; + clocks = <0x02 0x29 0x02 0x2f>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + status = "disabled"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfe500000 0x00 0x1000>; + phandle = <0x29e>; + reset-names = "reset"; + rockchip,pwm-output-mode; + }; - hdmim1-tx1-sda { - rockchip,pins = <0x03 0x15 0x05 0x19c>; - phandle = <0x1ab>; - }; + pwm@fd8b0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + phandle = <0x263>; + }; - hdmim2-rx-cec { - rockchip,pins = <0x01 0x0f 0x05 0x198>; - phandle = <0x342>; - }; + rkcif-mipi-lvds2 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "okay"; + phandle = <0x55>; - hdmim2-rx-hpdin { - rockchip,pins = <0x01 0x0e 0x05 0x198>; - phandle = <0x343>; - }; + port { - hdmim2-rx-scl { - rockchip,pins = <0x01 0x1e 0x05 0x198>; - phandle = <0x344>; + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; }; + }; + }; - hdmim2-rx-sda { - rockchip,pins = <0x01 0x1f 0x05 0x198>; - phandle = <0x345>; - }; + pwm@febe0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0020 0x00 0x10>; + phandle = <0x2d7>; + }; - hdmim2-tx0-scl { - rockchip,pins = <0x03 0x17 0x05 0x19b>; - phandle = <0x346>; - }; + vcc-fan-pwr-en-regulator { + regulator-boot-on; + gpio = <0x182 0x0b 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_fan_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a4>; + }; - hdmim2-tx0-sda { - rockchip,pins = <0x03 0x18 0x05 0x19c>; - phandle = <0x347>; - }; + iommu@fdba0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x79 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege0_mmu"; + reg = <0x00 0xfdba0800 0x00 0x40>; + phandle = <0xbc>; + }; - hdmim2-tx1-cec { - rockchip,pins = <0x03 0x14 0x05 0x198>; - phandle = <0x1a8>; - }; + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x231>; + }; - hdmim2-tx1-scl { - rockchip,pins = <0x01 0x04 0x05 0x19b>; - phandle = <0x348>; - }; - - hdmim2-tx1-sda { - rockchip,pins = <0x01 0x03 0x05 0x19c>; - phandle = <0x349>; - }; - - hdmi-debug0 { - rockchip,pins = <0x01 0x07 0x07 0x198>; - phandle = <0x34a>; - }; - - hdmi-debug1 { - rockchip,pins = <0x01 0x08 0x07 0x198>; - phandle = <0x34b>; - }; + arm-pmu { + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + interrupts = <0x01 0x07 0x08>; + compatible = "arm,armv8-pmuv3"; + phandle = <0x20c>; + }; - hdmi-debug2 { - rockchip,pins = <0x01 0x09 0x07 0x198>; - phandle = <0x34c>; - }; + pvtm@fda40000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; - hdmi-debug3 { - rockchip,pins = <0x01 0x0a 0x07 0x198>; - phandle = <0x34d>; - }; + pvtm@0 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c6 0x02 0x15>; + reg = <0x00>; + }; + }; - hdmi-debug4 { - rockchip,pins = <0x01 0x0b 0x07 0x198>; - phandle = <0x34e>; - }; + pwm@fd8b0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + phandle = <0x262>; + }; - hdmi-debug5 { - rockchip,pins = <0x01 0x0c 0x07 0x198>; - phandle = <0x34f>; - }; + i2s@fddc0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x38d>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + phandle = <0x27d>; + dmas = <0xf2 0x00>; + reset-names = "tx-m"; + }; - hdmi-debug6 { - rockchip,pins = <0x01 0x00 0x07 0x198>; - phandle = <0x350>; - }; + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; - hdmim0-tx1-cec { - rockchip,pins = <0x02 0x14 0x04 0x198>; - phandle = <0x351>; - }; + syscon@fd5d4000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + phandle = <0x1c8>; - hdmim0-tx1-scl { - rockchip,pins = <0x02 0x0d 0x04 0x198>; - phandle = <0x352>; - }; + usb2-phy@4000 { + clock-output-names = "usb480m_phy1"; + clock-names = "phyclk"; + resets = <0x02 0xc0048 0x02 0x489>; + interrupts = <0x00 0x18a 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x4000 0x10>; + phandle = <0x1ca>; + reset-names = "phy\0apb"; - hdmim0-tx1-sda { - rockchip,pins = <0x02 0x0c 0x04 0x198>; - phandle = <0x353>; + otg-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a3>; }; }; + }; - i2c0 { + rkisp0-vir1 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23c>; + }; - i2c0m0-xfer { - rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; - phandle = <0x354>; - }; + pwm@febe0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0010 0x00 0x10>; + phandle = <0x2d6>; + }; - i2c0m2-xfer { - rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; - phandle = <0x77>; - }; + thermal-zones { + phandle = <0x248>; - i2c0m1-xfer { - rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; - phandle = <0x355>; - }; + bigcore1-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; }; - i2c1 { - - i2c1m0-xfer { - rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; - phandle = <0x356>; - }; + soc-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x00>; + sustainable-power = <0x834>; + phandle = <0x249>; - i2c1m1-xfer { - rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; - phandle = <0x357>; - }; + trips { - i2c1m2-xfer { - rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; - phandle = <0x148>; - }; + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; - i2c1m3-xfer { - rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; - phandle = <0x358>; - }; + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; - i2c1m4-xfer { - rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; - phandle = <0x359>; + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; }; - }; - i2c2 { - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; - phandle = <0x149>; - }; + cooling-maps { - i2c2m2-xfer { - rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; - phandle = <0x35a>; - }; + map2 { + trip = <0x5e>; + cooling-device = <0x0c 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; - i2c2m3-xfer { - rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; - phandle = <0x35b>; - }; + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; - i2c2m4-xfer { - rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; - phandle = <0x35c>; - }; + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; - i2c2m1-xfer { - rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; - phandle = <0x35d>; + map1 { + trip = <0x5e>; + cooling-device = <0x0a 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; }; }; - i2c3 { - - i2c3m0-xfer { - rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; - phandle = <0x35e>; - }; + npu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; - i2c3m1-xfer { - rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; - phandle = <0x35f>; - }; + center-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; - i2c3m2-xfer { - rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; - phandle = <0x14a>; - }; + gpu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; - i2c3m4-xfer { - rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; - phandle = <0x360>; - }; + littlecore-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; - i2c3m3-xfer { - rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; - phandle = <0x361>; - }; + bigcore0-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; }; + }; - i2c4 { + iommu@fdbdf000 { + power-domains = <0x60 0x10>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + phandle = <0xc2>; + }; - i2c4m0-xfer { - rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; - phandle = <0x362>; - }; + serial@feb50000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14d 0x04>; + clocks = <0x02 0xbb 0x02 0xac>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb50000 0x00 0x100>; + phandle = <0x2ca>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + reg-shift = <0x02>; + }; - i2c4m2-xfer { - rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; - phandle = <0x363>; - }; + iommu@fdcd0f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8c 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec0_mmu"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + phandle = <0xd2>; + }; - i2c4m3-xfer { - rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; - phandle = <0x364>; - }; + vcc5v0-host { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x02 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x75>; + vin-supply = <0x1dd>; + }; - i2c4m4-xfer { - rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; - phandle = <0x365>; - }; + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; - i2c4m1-xfer { - rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; - phandle = <0x14b>; - }; + phy@fed90000 { + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + reg = <0x00 0xfed90000 0x00 0x10000>; + phandle = <0x48b>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; }; - i2c5 { + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; - i2c5m0-xfer { - rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; - phandle = <0x14d>; - }; + jpege-core@fdba0000 { + power-domains = <0x60 0x15>; + iommus = <0xbc>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ac>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + interrupts = <0x00 0x7a 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba0000 0x00 0x400>; + phandle = <0x26d>; + reset-names = "video_a\0video_h"; + }; - i2c5m1-xfer { - rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; - phandle = <0x366>; - }; + vcc5v0-sys { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_sys"; + compatible = "regulator-fixed"; + phandle = <0x78>; + vin-supply = <0x1cd>; + }; - i2c5m2-xfer { - rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; - phandle = <0x367>; - }; + pwm@fd8b0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + phandle = <0x261>; + }; - i2c5m3-xfer { - rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; - phandle = <0x368>; - }; + vop@fdd90000 { + power-domains = <0x60 0x18>; + iommus = <0xd6>; + rockchip,vop-grf = <0xd7>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + reg-names = "regs\0gamma_lut"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + compatible = "rockchip,rk3588-vop"; + rockchip,pmu = <0xd9>; + status = "okay"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + phandle = <0x278>; + rockchip,vo1-grf = <0xd8>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; - i2c5m4-xfer { - rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; - phandle = <0x369>; - }; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; - i2c6 { + port@0 { + rockchip,primary-plane = <0x02>; + rockchip,plane-mask = <0x05>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x279>; - i2c6m0-xfer { - rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; - phandle = <0x178>; - }; - - i2c6m1-xfer { - rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; - phandle = <0x36a>; - }; - - i2c6m3-xfer { - rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; - phandle = <0x36b>; - }; - - i2c6m4-xfer { - rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; - phandle = <0x36c>; - }; + endpoint@5 { + remote-endpoint = <0xdf>; + reg = <0x05>; + phandle = <0x1ad>; + }; - i2c6m2-xfer { - rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; - phandle = <0x36d>; - }; - }; + endpoint@3 { + remote-endpoint = <0xdd>; + reg = <0x03>; + phandle = <0x1a6>; + }; - i2c7 { + endpoint@1 { + remote-endpoint = <0xdb>; + reg = <0x01>; + phandle = <0x102>; + }; - i2c7m0-xfer { - rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; - phandle = <0x185>; - }; + endpoint@4 { + remote-endpoint = <0xde>; + reg = <0x04>; + phandle = <0x1b0>; + }; - i2c7m2-xfer { - rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; - phandle = <0x36e>; - }; + endpoint@2 { + remote-endpoint = <0xdc>; + reg = <0x02>; + phandle = <0x3c>; + }; - i2c7m3-xfer { - rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; - phandle = <0x36f>; + endpoint@0 { + remote-endpoint = <0xda>; + reg = <0x00>; + phandle = <0xf7>; + }; }; - i2c7m1-xfer { - rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; - phandle = <0x370>; - }; - }; + port@3 { + rockchip,primary-plane = <0x09>; + rockchip,plane-mask = <0x280>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + phandle = <0x27c>; - i2c8 { + endpoint@1 { + remote-endpoint = <0xef>; + reg = <0x01>; + phandle = <0x3a>; + }; - i2c8m0-xfer { - rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; - phandle = <0x186>; - }; + endpoint@2 { + remote-endpoint = <0xf0>; + reg = <0x02>; + phandle = <0x3d>; + }; - i2c8m2-xfer { - rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; - phandle = <0x371>; + endpoint@0 { + remote-endpoint = <0xee>; + reg = <0x00>; + phandle = <0x39>; + }; }; - i2c8m3-xfer { - rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; - phandle = <0x372>; - }; + port@1 { + rockchip,primary-plane = <0x03>; + rockchip,plane-mask = <0x0a>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + phandle = <0x27a>; - i2c8m4-xfer { - rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; - phandle = <0x373>; - }; + endpoint@5 { + remote-endpoint = <0xe5>; + reg = <0x05>; + phandle = <0x3f>; + }; - i2c8m1-xfer { - rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; - phandle = <0x374>; - }; - }; + endpoint@3 { + remote-endpoint = <0xe3>; + reg = <0x03>; + phandle = <0x3e>; + }; - i2s0 { + endpoint@1 { + remote-endpoint = <0xe1>; + reg = <0x01>; + phandle = <0x103>; + }; - i2s0-idle { - rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; - phandle = <0x11f>; - }; + endpoint@4 { + remote-endpoint = <0xe4>; + reg = <0x04>; + phandle = <0x1b1>; + }; - i2s0-lrck { - rockchip,pins = <0x01 0x15 0x01 0x19d>; - phandle = <0x11b>; - }; + endpoint@2 { + remote-endpoint = <0xe2>; + reg = <0x02>; + phandle = <0xff>; + }; - i2s0-mclk { - rockchip,pins = <0x01 0x12 0x01 0x19d>; - phandle = <0x17a>; + endpoint@0 { + remote-endpoint = <0xe0>; + reg = <0x00>; + phandle = <0x38>; + }; }; - i2s0-sclk { - rockchip,pins = <0x01 0x13 0x01 0x19d>; - phandle = <0x11c>; - }; + port@2 { + rockchip,primary-plane = <0x08>; + rockchip,plane-mask = <0x140>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + #size-cells = <0x00>; + reg = <0x02>; + phandle = <0x27b>; - i2s0-sdi0 { - rockchip,pins = <0x01 0x1c 0x02 0x198>; - phandle = <0x11d>; - }; + endpoint@5 { + remote-endpoint = <0xeb>; + reg = <0x05>; + phandle = <0x1a7>; + }; - i2s0-sdi1 { - rockchip,pins = <0x01 0x1b 0x02 0x198>; - phandle = <0x375>; - }; + endpoint@3 { + remote-endpoint = <0xe9>; + reg = <0x03>; + phandle = <0xf3>; + }; - i2s0-sdi2 { - rockchip,pins = <0x01 0x1a 0x02 0x198>; - phandle = <0x376>; - }; + endpoint@1 { + remote-endpoint = <0xe7>; + reg = <0x01>; + phandle = <0x3b>; + }; - i2s0-sdi3 { - rockchip,pins = <0x01 0x19 0x02 0x198>; - phandle = <0x377>; - }; + endpoint@6 { + remote-endpoint = <0xec>; + reg = <0x06>; + phandle = <0x1b2>; + }; - i2s0-sdo0 { - rockchip,pins = <0x01 0x17 0x01 0x198>; - phandle = <0x11e>; - }; + endpoint@4 { + remote-endpoint = <0xea>; + reg = <0x04>; + phandle = <0xf4>; + }; - i2s0-sdo1 { - rockchip,pins = <0x01 0x18 0x01 0x198>; - phandle = <0x378>; - }; + endpoint@2 { + remote-endpoint = <0xe8>; + reg = <0x02>; + phandle = <0x100>; + }; - i2s0-sdo2 { - rockchip,pins = <0x01 0x19 0x01 0x198>; - phandle = <0x379>; - }; + endpoint@0 { + remote-endpoint = <0xe6>; + reg = <0x00>; + phandle = <0xf8>; + }; - i2s0-sdo3 { - rockchip,pins = <0x01 0x1a 0x01 0x198>; - phandle = <0x37a>; + endpoint@7 { + remote-endpoint = <0xed>; + reg = <0x07>; + phandle = <0x1ae>; + }; }; }; + }; - i2s1 { + csi2-dphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x210>; + }; - i2s1m0-lrck { - rockchip,pins = <0x04 0x02 0x03 0x19d>; - phandle = <0x120>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x04 0x00 0x03 0x19d>; - phandle = <0x37b>; - }; - - i2s1m0-sclk { - rockchip,pins = <0x04 0x01 0x03 0x19d>; - phandle = <0x121>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x04 0x05 0x03 0x198>; - phandle = <0x122>; - }; + pwm@febe0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0000 0x00 0x10>; + phandle = <0x2d5>; + }; - i2s1m0-sdi1 { - rockchip,pins = <0x04 0x06 0x03 0x198>; - phandle = <0x123>; - }; + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; - i2s1m0-sdi2 { - rockchip,pins = <0x04 0x07 0x03 0x198>; - phandle = <0x124>; - }; + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; - i2s1m0-sdi3 { - rockchip,pins = <0x04 0x08 0x03 0x198>; - phandle = <0x125>; - }; + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; - i2s1m0-sdo0 { - rockchip,pins = <0x04 0x09 0x03 0x198>; - phandle = <0x126>; - }; + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; - i2s1m0-sdo1 { - rockchip,pins = <0x04 0x0a 0x03 0x198>; - phandle = <0x127>; - }; + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; - i2s1m0-sdo2 { - rockchip,pins = <0x04 0x0b 0x03 0x198>; - phandle = <0x128>; - }; + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; + }; - i2s1m0-sdo3 { - rockchip,pins = <0x04 0x0c 0x03 0x198>; - phandle = <0x129>; - }; + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; + }; - i2s1m1-lrck { - rockchip,pins = <0x00 0x0f 0x01 0x19d>; - phandle = <0x37c>; - }; + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; - i2s1m1-mclk { - rockchip,pins = <0x00 0x0d 0x01 0x19d>; - phandle = <0x37d>; - }; + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; - i2s1m1-sclk { - rockchip,pins = <0x00 0x0e 0x01 0x19d>; - phandle = <0x37e>; - }; + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; - i2s1m1-sdi0 { - rockchip,pins = <0x00 0x15 0x01 0x198>; - phandle = <0x37f>; - }; + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; - i2s1m1-sdi1 { - rockchip,pins = <0x00 0x16 0x01 0x198>; - phandle = <0x380>; - }; + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; - i2s1m1-sdi2 { - rockchip,pins = <0x00 0x17 0x01 0x198>; - phandle = <0x381>; - }; + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; - i2s1m1-sdi3 { - rockchip,pins = <0x00 0x18 0x01 0x198>; - phandle = <0x382>; - }; + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; + }; - i2s1m1-sdo0 { - rockchip,pins = <0x00 0x19 0x01 0x198>; - phandle = <0x383>; - }; + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; - i2s1m1-sdo1 { - rockchip,pins = <0x00 0x1a 0x01 0x198>; - phandle = <0x384>; - }; + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; - i2s1m1-sdo2 { - rockchip,pins = <0x00 0x1c 0x01 0x198>; - phandle = <0x385>; - }; + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; + }; - i2s1m1-sdo3 { - rockchip,pins = <0x00 0x1d 0x01 0x198>; - phandle = <0x386>; - }; + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; }; - i2s2 { - - i2s2m1-idle { - rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; - phandle = <0x12c>; - }; - - i2s2m1-lrck { - rockchip,pins = <0x03 0x0e 0x03 0x19d>; - phandle = <0x12d>; - }; - - i2s2m1-mclk { - rockchip,pins = <0x03 0x0c 0x03 0x19d>; - phandle = <0x387>; - }; - - i2s2m1-sclk { - rockchip,pins = <0x03 0x0d 0x03 0x19d>; - phandle = <0x12e>; - }; - - i2s2m1-sdi { - rockchip,pins = <0x03 0x0a 0x03 0x198>; - phandle = <0x12a>; - }; - - i2s2m1-sdo { - rockchip,pins = <0x03 0x0b 0x03 0x198>; - phandle = <0x12b>; - }; - - i2s2m0-idle { - rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; - phandle = <0x388>; - }; - - i2s2m0-lrck { - rockchip,pins = <0x02 0x10 0x02 0x19d>; - phandle = <0x389>; - }; - - i2s2m0-mclk { - rockchip,pins = <0x02 0x0e 0x02 0x19d>; - phandle = <0x38a>; - }; - - i2s2m0-sclk { - rockchip,pins = <0x02 0x0f 0x02 0x19d>; - phandle = <0x38b>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x13 0x02 0x198>; - phandle = <0x38c>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x04 0x13 0x02 0x198>; - phandle = <0x38d>; - }; + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; }; - i2s3 { - - i2s3-idle { - rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; - phandle = <0x131>; - }; - - i2s3-lrck { - rockchip,pins = <0x03 0x02 0x03 0x19d>; - phandle = <0x132>; - }; + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; - i2s3-mclk { - rockchip,pins = <0x03 0x00 0x03 0x19d>; - phandle = <0x38e>; - }; + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; - i2s3-sclk { - rockchip,pins = <0x03 0x01 0x03 0x19d>; - phandle = <0x133>; - }; + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; + }; - i2s3-sdi { - rockchip,pins = <0x03 0x04 0x03 0x198>; - phandle = <0x12f>; - }; + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; - i2s3-sdo { - rockchip,pins = <0x03 0x03 0x03 0x198>; - phandle = <0x130>; - }; + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; }; - jtag { + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; - jtagm0-pins { - rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; - phandle = <0x38f>; - }; + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; + }; - jtagm1-pins { - rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; - phandle = <0x390>; - }; + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; + }; - jtagm2-pins { - rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; - phandle = <0x391>; - }; + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; }; - litcpu { + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; + }; - litcpu-pins { - rockchip,pins = <0x00 0x1b 0x01 0x198>; - phandle = <0x392>; - }; + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; }; - mcu { + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; + }; - mcum0-pins { - rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; - phandle = <0x393>; - }; + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; - mcum1-pins { - rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; - phandle = <0x394>; - }; + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; }; - mipi { + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; - mipim0-camera0-clk { - rockchip,pins = <0x04 0x09 0x01 0x198>; - phandle = <0x395>; - }; - - mipim0-camera1-clk { - rockchip,pins = <0x01 0x0e 0x02 0x198>; - phandle = <0x396>; - }; + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; + }; + }; - mipim0-camera2-clk { - rockchip,pins = <0x01 0x0f 0x02 0x198>; - phandle = <0x397>; - }; + usb@fc8c0000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + phandle = <0x6e>; + }; - mipim0-camera3-clk { - rockchip,pins = <0x01 0x1e 0x02 0x198>; - phandle = <0x398>; - }; + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; - mipim0-camera4-clk { - rockchip,pins = <0x01 0x1f 0x02 0x198>; - phandle = <0x399>; - }; + mipi0-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x224>; + }; - mipim1-camera0-clk { - rockchip,pins = <0x03 0x05 0x04 0x198>; - phandle = <0x39a>; - }; + cluster1-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x24 0x25 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x26>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x16>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; - mipim1-camera1-clk { - rockchip,pins = <0x03 0x06 0x04 0x198>; - phandle = <0x180>; - }; + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; - mipim1-camera2-clk { - rockchip,pins = <0x03 0x07 0x04 0x198>; - phandle = <0x39b>; - }; + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; - mipim1-camera3-clk { - rockchip,pins = <0x03 0x08 0x04 0x198>; - phandle = <0x39c>; - }; + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; - mipim1-camera4-clk { - rockchip,pins = <0x03 0x09 0x04 0x198>; - phandle = <0x39d>; - }; + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; - mipi-te0 { - rockchip,pins = <0x03 0x12 0x02 0x198>; - phandle = <0x39e>; - }; + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; - mipi-te1 { - rockchip,pins = <0x03 0x13 0x02 0x198>; - phandle = <0x39f>; - }; + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; }; - npu { + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; - npu-pins { - rockchip,pins = <0x00 0x16 0x02 0x198>; - phandle = <0x3a0>; - }; + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; }; - pcie20x1 { + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; - pcie20x1m0-pins { - rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; - phandle = <0x3a1>; - }; + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; - pcie20x1m1-pins { - rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; - phandle = <0x3a2>; - }; + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; - pcie20x1-2-button-rstn { - rockchip,pins = <0x04 0x0b 0x04 0x198>; - phandle = <0x3a3>; - }; + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; }; - pcie30phy { + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; - pcie30phy-pins { - rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; - phandle = <0x3a4>; - }; + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; }; - pcie30x1 { + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; - pcie30x1m0-pins { - rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; - phandle = <0x3a5>; - }; - - pcie30x1m1-pins { - rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; - phandle = <0x3a6>; - }; - - pcie30x1m2-pins { - rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; - phandle = <0x3a7>; - }; - - pcie30x1-0-button-rstn { - rockchip,pins = <0x04 0x09 0x04 0x198>; - phandle = <0x3a8>; - }; + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; - pcie30x1-1-button-rstn { - rockchip,pins = <0x04 0x0a 0x04 0x198>; - phandle = <0x3a9>; - }; + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; }; - pcie30x2 { + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; - pcie30x2m0-pins { - rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; - phandle = <0x3aa>; - }; + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; - pcie30x2m1-pins { - rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; - phandle = <0x3ab>; - }; + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; - pcie30x2m2-pins { - rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; - phandle = <0x3ac>; - }; + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; - pcie30x2m3-pins { - rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; - phandle = <0x3ad>; - }; + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; - pcie30x2-button-rstn { - rockchip,pins = <0x03 0x11 0x04 0x198>; - phandle = <0x3ae>; - }; + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; }; + }; - pcie30x4 { + mmc@fe2d0000 { + power-domains = <0x60 0x25>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "disabled"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + phandle = <0x294>; + max-frequency = <0xbebc200>; + }; - pcie30x4m0-pins { - rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; - phandle = <0x3af>; - }; + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22e>; + }; - pcie30x4m1-pins { - rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; - phandle = <0x3b0>; - }; + serial@feb90000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb90000 0x00 0x100>; + phandle = <0x2ce>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + reg-shift = <0x02>; + }; - pcie30x4m2-pins { - rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; - phandle = <0x3b1>; - }; + i2s@fddf8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x3c3>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "okay"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + phandle = <0x1ec>; + dmas = <0xf2 0x15>; + reset-names = "rx-m"; + }; - pcie30x4m3-pins { - rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; - phandle = <0x3b2>; - }; + phy@fee20000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x195>; + reg = <0x00 0xfee20000 0x00 0x100>; + phandle = <0x70>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + }; - pcie30x4-button-rstn { - rockchip,pins = <0x03 0x1d 0x04 0x198>; - phandle = <0x3b3>; - }; - }; + csi2-dphy0-hw@fedc0000 { + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + clocks = <0x02 0x10c>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x192>; + reg = <0x00 0xfedc0000 0x00 0x8000>; + phandle = <0x2d>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,sys_grf = <0xc8>; + }; - pdm0 { + can@fea70000 { + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea70000 0x00 0x1000>; + phandle = <0x2a2>; + reset-names = "can\0can-apb"; + }; - pdm0m0-clk { - rockchip,pins = <0x01 0x16 0x03 0x198>; - phandle = <0x139>; - }; + mailbox@fec60000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec60000 0x00 0x200>; + phandle = <0x2dd>; + }; - pdm0m0-clk1 { - rockchip,pins = <0x01 0x14 0x03 0x198>; - phandle = <0x13a>; - }; + usbdrd3_1 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x47a>; - pdm0m0-idle { - rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; - phandle = <0x138>; - }; - - pdm0m0-sdi0 { - rockchip,pins = <0x01 0x1d 0x03 0x198>; - phandle = <0x134>; - }; + usb@fc400000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x2a7>; + interrupts = <0x00 0xdd 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x1a3 0x1a4>; + reg = <0x00 0xfc400000 0x00 0x400000>; + phandle = <0x47b>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; - pdm0m0-sdi1 { - rockchip,pins = <0x01 0x19 0x03 0x198>; - phandle = <0x135>; - }; + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; - pdm0m0-sdi2 { - rockchip,pins = <0x01 0x1a 0x03 0x198>; - phandle = <0x136>; - }; + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; - pdm0m0-sdi3 { - rockchip,pins = <0x01 0x1b 0x03 0x198>; - phandle = <0x137>; - }; + user { + linux,default-trigger = "ir-user-click"; + label = ":user"; + default-state = "off"; + phandle = <0x499>; + gpios = <0x182 0x03 0x00>; + }; - pdm0m1-clk { - rockchip,pins = <0x00 0x10 0x02 0x198>; - phandle = <0x3b4>; - }; + power { + linux,default-trigger = "ir-power-click"; + label = ":power"; + default-state = "on"; + status = "disabled"; + phandle = <0x498>; + gpios = <0x7b 0x15 0x00>; + }; + }; - pdm0m1-clk1 { - rockchip,pins = <0x00 0x14 0x02 0x198>; - phandle = <0x3b5>; - }; + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x479>; + }; - pdm0m1-idle { - rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; - phandle = <0x3b6>; - }; + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; - pdm0m1-sdi0 { - rockchip,pins = <0x00 0x17 0x02 0x198>; - phandle = <0x3b7>; - }; + spdif-tx@fdde0000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc4 0x04>; + clocks = <0x02 0x257 0x02 0x253>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + phandle = <0x27e>; + dmas = <0xf1 0x07>; + }; - pdm0m1-sdi1 { - rockchip,pins = <0x00 0x18 0x02 0x198>; - phandle = <0x3b8>; - }; + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; - pdm0m1-sdi2 { - rockchip,pins = <0x00 0x1c 0x02 0x198>; - phandle = <0x3b9>; - }; + psci { + method = "smc"; + compatible = "arm,psci-1.0"; + }; - pdm0m1-sdi3 { - rockchip,pins = <0x00 0x1e 0x02 0x198>; - phandle = <0x3ba>; - }; - }; + rkcif-mipi-lvds { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x52>; + }; - pdm1 { + rga@fdb80000 { + power-domains = <0x60 0x15>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + interrupts = <0x00 0x74 0x04>; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + compatible = "rockchip,rga2_core0"; + status = "okay"; + interrupt-names = "rga2_irq"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + phandle = <0x26b>; + }; - pdm1m0-clk { - rockchip,pins = <0x04 0x1d 0x02 0x198>; - phandle = <0x140>; - }; + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; - pdm1m0-clk1 { - rockchip,pins = <0x04 0x1c 0x02 0x198>; - phandle = <0x141>; - }; + spi@feb10000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x151 0x152 0x153>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x147 0x04>; + clocks = <0x02 0xa4 0x02 0x9f>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + phandle = <0x2ac>; + dmas = <0x7c 0x10 0x7c 0x11>; + }; - pdm1m0-idle { - rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; - phandle = <0x13f>; - }; + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x472>; + }; - pdm1m0-sdi0 { - rockchip,pins = <0x04 0x1b 0x02 0x198>; - phandle = <0x13b>; - }; + hdmi@fdea0000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "disabled"; + rockchip,grf = <0xc8>; + phys = <0x1ac>; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + phandle = <0x1e1>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; - pdm1m0-sdi1 { - rockchip,pins = <0x04 0x1a 0x02 0x198>; - phandle = <0x13c>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - pdm1m0-sdi2 { - rockchip,pins = <0x04 0x19 0x02 0x198>; - phandle = <0x13d>; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x482>; - pdm1m0-sdi3 { - rockchip,pins = <0x04 0x18 0x02 0x198>; - phandle = <0x13e>; - }; + endpoint@1 { + remote-endpoint = <0x3f>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe5>; + }; - pdm1m1-clk { - rockchip,pins = <0x01 0x0c 0x02 0x198>; - phandle = <0x3bb>; - }; + endpoint@2 { + remote-endpoint = <0x1ae>; + status = "disabled"; + reg = <0x02>; + phandle = <0xed>; + }; - pdm1m1-clk1 { - rockchip,pins = <0x01 0x0b 0x02 0x198>; - phandle = <0x3bc>; - }; - - pdm1m1-idle { - rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; - phandle = <0x3bd>; - }; - - pdm1m1-sdi0 { - rockchip,pins = <0x01 0x07 0x02 0x198>; - phandle = <0x3be>; - }; - - pdm1m1-sdi1 { - rockchip,pins = <0x01 0x08 0x02 0x198>; - phandle = <0x3bf>; - }; - - pdm1m1-sdi2 { - rockchip,pins = <0x01 0x09 0x02 0x198>; - phandle = <0x3c0>; - }; - - pdm1m1-sdi3 { - rockchip,pins = <0x01 0x0a 0x02 0x198>; - phandle = <0x3c1>; - }; - }; - - pmic { - - pmic-pins { - rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; - phandle = <0x156>; + endpoint@0 { + remote-endpoint = <0x1ad>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdf>; + }; }; }; + }; - pmu { + pcie@fe180000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x30 0x3f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x210 0x02 0x21f>; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x70 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + linux,pci-domain = <0x03>; + phandle = <0x28c>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; - pmu-pins { - rockchip,pins = <0x00 0x05 0x03 0x198>; - phandle = <0x3c2>; - }; + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf5 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x105>; + interrupt-controller; }; + }; - pwm0 { + i2s@fe480000 { + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + resets = <0x02 0xc002a 0x02 0xc002d>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfe480000 0x00 0x1000>; + phandle = <0x1d1>; + dmas = <0x7c 0x02 0x7c 0x03>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x03 0x198>; - phandle = <0x7e>; - }; + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; - pwm0m1-pins { - rockchip,pins = <0x01 0x1a 0x0b 0x198>; - phandle = <0x3c3>; - }; + i2c@feab0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14a>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb2 0x02 0xaa>; + interrupts = <0x00 0x140 0x04>; + clocks = <0x02 0x8f 0x02 0x87>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + phandle = <0x2a6>; + reset-names = "i2c\0apb"; - pwm0m2-pins { - rockchip,pins = <0x01 0x02 0x0b 0x198>; - phandle = <0x3c4>; - }; + gpio@21 { + gpio-controller; + gpio-group-num = <0xc8>; + compatible = "nxp,pca9555"; + status = "okay"; + reg = <0x21>; + phandle = <0x182>; + #gpio-cells = <0x02>; }; + }; - pwm1 { - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x03 0x198>; - phandle = <0x7f>; - }; - - pwm1m1-pins { - rockchip,pins = <0x01 0x1b 0x0b 0x198>; - phandle = <0x3c5>; - }; - - pwm1m2-pins { - rockchip,pins = <0x01 0x03 0x0b 0x198>; - phandle = <0x3c6>; - }; - }; + iommu@fdcb7f00 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x84 0x04>; + clocks = <0x02 0x1de 0x02 0x1df>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "isp0_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + phandle = <0xd0>; + }; - pwm2 { + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; - pwm2m0-pins { - rockchip,pins = <0x00 0x14 0x03 0x198>; - phandle = <0x80>; - }; + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; - pwm2m1-pins { - rockchip,pins = <0x03 0x09 0x0b 0x198>; - phandle = <0x3c7>; - }; + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; - pwm2m2-pins { - rockchip,pins = <0x04 0x12 0x0b 0x198>; - phandle = <0x3c8>; - }; - }; + mipi5-csi2-hw@fdd60000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x329>; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + clocks = <0x02 0x1d4>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + phandle = <0x4c>; + reset-names = "srst_csihost_p"; + }; - pwm3 { + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; - pwm3m0-pins { - rockchip,pins = <0x00 0x1c 0x03 0x198>; - phandle = <0x81>; - }; + timer@feae0000 { + clock-names = "pclk\0timer"; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + phandle = <0x2a9>; + }; - pwm3m1-pins { - rockchip,pins = <0x03 0x0a 0x0b 0x198>; - phandle = <0x3c9>; - }; + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22c>; + }; - pwm3m2-pins { - rockchip,pins = <0x01 0x12 0x0b 0x198>; - phandle = <0x3ca>; - }; + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; - pwm3m3-pins { - rockchip,pins = <0x01 0x07 0x0b 0x198>; - phandle = <0x3cb>; - }; - }; - - pwm4 { - - pwm4m0-pins { - rockchip,pins = <0x00 0x15 0x0b 0x198>; - phandle = <0x169>; - }; + i2c@fec90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x185>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb6 0x02 0xae>; + interrupts = <0x00 0x144 0x04>; + clocks = <0x02 0x93 0x02 0x8b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfec90000 0x00 0x1000>; + phandle = <0x2e4>; + reset-names = "i2c\0apb"; + }; - pwm4m1-pins { - rockchip,pins = <0x04 0x13 0x0b 0x198>; - phandle = <0x3cc>; - }; - }; + avsd-plus@fdb51000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,avs-plus-decoder"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_avsd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb51000 0x00 0x200>; + phandle = <0x268>; + reset-names = "shared_video_a\0shared_video_h"; + }; - pwm5 { + dp1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,card-name = "rockchip,dp1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a9>; + rockchip,mclk-fs = <0x200>; + }; - pwm5m0-pins { - rockchip,pins = <0x00 0x09 0x03 0x198>; - phandle = <0x3cd>; - }; + mipi1-csi2-hw@fdd20000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x325>; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + clocks = <0x02 0x1d0>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + phandle = <0x48>; + reset-names = "srst_csihost_p"; + }; - pwm5m1-pins { - rockchip,pins = <0x00 0x16 0x0b 0x198>; - phandle = <0x16a>; - }; + iep@fdbb0000 { + power-domains = <0x60 0x15>; + iommus = <0xc1>; + clock-names = "aclk\0hclk\0sclk"; + assigned-clocks = <0x02 0x1aa>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + rockchip,disable-auto-freq; + compatible = "rockchip,iep-v2"; + status = "okay"; + interrupt-names = "irq_iep"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbb0000 0x00 0x500>; + phandle = <0x271>; + reset-names = "rst_a\0rst_h\0rst_s"; + }; - pwm5m2-pins { - rockchip,pins = <0x04 0x14 0x0b 0x198>; - phandle = <0x3ce>; - }; - }; + dsi@fde20000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x2f>; + reg = <0x00 0xfde20000 0x00 0x10000>; + phandle = <0x281>; + reset-names = "apb"; - pwm6 { + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - pwm6m0-pins { - rockchip,pins = <0x00 0x17 0x0b 0x198>; - phandle = <0x16b>; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x282>; - pwm6m1-pins { - rockchip,pins = <0x04 0x11 0x0b 0x198>; - phandle = <0x3cf>; - }; + endpoint@1 { + remote-endpoint = <0x39>; + status = "disabled"; + reg = <0x01>; + phandle = <0xee>; + }; - pwm6m2-pins { - rockchip,pins = <0x04 0x15 0x0b 0x198>; - phandle = <0x3d0>; + endpoint@0 { + remote-endpoint = <0xf3>; + status = "disabled"; + reg = <0x00>; + phandle = <0xe9>; + }; }; }; + }; - pwm7 { + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x477>; + }; - pwm7m0-pins { - rockchip,pins = <0x00 0x18 0x0b 0x198>; - phandle = <0x16c>; - }; + edp@fded0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x1af>; + reg = <0x00 0xfded0000 0x00 0x1000>; + phandle = <0x483>; + reset-names = "dp\0apb"; - pwm7m1-pins { - rockchip,pins = <0x04 0x1c 0x0b 0x198>; - phandle = <0x3d1>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - pwm7m2-pins { - rockchip,pins = <0x01 0x13 0x0b 0x198>; - phandle = <0x3d2>; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; - pwm7m3-pins { - rockchip,pins = <0x04 0x16 0x0b 0x198>; - phandle = <0x3d3>; - }; - }; + endpoint@1 { + remote-endpoint = <0x1b1>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe4>; + }; - pwm8 { + endpoint@2 { + remote-endpoint = <0x1b2>; + status = "disabled"; + reg = <0x02>; + phandle = <0xec>; + }; - pwm8m0-pins { - rockchip,pins = <0x03 0x07 0x0b 0x198>; - phandle = <0x16d>; + endpoint@0 { + remote-endpoint = <0x1b0>; + status = "disabled"; + reg = <0x00>; + phandle = <0xde>; + }; }; - pwm8m1-pins { - rockchip,pins = <0x04 0x18 0x0b 0x198>; - phandle = <0x3d4>; - }; + port@1 { + reg = <0x01>; - pwm8m2-pins { - rockchip,pins = <0x03 0x18 0x0b 0x198>; - phandle = <0x3d5>; + endpoint { + phandle = <0x484>; + }; }; }; + }; - pwm9 { + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; - pwm9m0-pins { - rockchip,pins = <0x03 0x08 0x0b 0x198>; - phandle = <0x16e>; - }; + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; - pwm9m1-pins { - rockchip,pins = <0x04 0x19 0x0b 0x198>; - phandle = <0x3d6>; - }; + npu-opp-table { + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,init-freq = <0xf4240>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0xb4 0xb5 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0xb6>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0xb1>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x7a120>; + rockchip,pvtm-volt = <0xb71b0>; - pwm9m2-pins { - rockchip,pins = <0x03 0x19 0x0b 0x198>; - phandle = <0x3d7>; - }; + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; }; - pwm10 { - - pwm10m0-pins { - rockchip,pins = <0x03 0x00 0x0b 0x198>; - phandle = <0x16f>; - }; - - pwm10m1-pins { - rockchip,pins = <0x04 0x1b 0x0b 0x198>; - phandle = <0x3d8>; - }; + opp-300000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; - pwm10m2-pins { - rockchip,pins = <0x03 0x1b 0x0b 0x198>; - phandle = <0x3d9>; - }; + opp-500000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; }; - pwm11 { + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; - pwm11m0-pins { - rockchip,pins = <0x03 0x01 0x0b 0x198>; - phandle = <0x170>; - }; + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; - pwm11m1-pins { - rockchip,pins = <0x04 0x0c 0x0b 0x198>; - phandle = <0x3da>; - }; + opp-j-m-950000000 { + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-hz = <0x00 0x389fd980>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + }; - pwm11m2-pins { - rockchip,pins = <0x01 0x14 0x0b 0x198>; - phandle = <0x3db>; - }; + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; - pwm11m3-pins { - rockchip,pins = <0x03 0x1d 0x0b 0x198>; - phandle = <0x3dc>; - }; + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; }; - pwm12 { + opp-j-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x06 0xffff>; + }; - pwm12m0-pins { - rockchip,pins = <0x03 0x0d 0x0b 0x198>; - phandle = <0x171>; - }; + opp-400000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; - pwm12m1-pins { - rockchip,pins = <0x04 0x0d 0x0b 0x198>; - phandle = <0x3dd>; - }; + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; }; - pwm13 { + opp-600000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; - pwm13m0-pins { - rockchip,pins = <0x03 0x0e 0x0b 0x198>; - phandle = <0x172>; - }; + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; - pwm13m1-pins { - rockchip,pins = <0x04 0x0e 0x0b 0x198>; - phandle = <0x3de>; - }; + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; - pwm13m2-pins { - rockchip,pins = <0x01 0x0f 0x0b 0x198>; - phandle = <0x3df>; - }; + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; }; + }; - pwm14 { + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; - pwm14m0-pins { - rockchip,pins = <0x03 0x12 0x0b 0x198>; - phandle = <0x173>; - }; + syscon@fd5dc000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + phandle = <0x25e>; - pwm14m1-pins { - rockchip,pins = <0x04 0x0a 0x0b 0x198>; - phandle = <0x3e0>; - }; + usb2-phy@c000 { + clock-output-names = "usb480m_phy3"; + clock-names = "phyclk"; + resets = <0x02 0xc004a 0x02 0x48b>; + interrupts = <0x00 0x188 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0xc000 0x10>; + phandle = <0x6d>; + reset-names = "phy\0apb"; - pwm14m2-pins { - rockchip,pins = <0x01 0x1e 0x0b 0x198>; - phandle = <0x3e1>; + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6f>; }; }; + }; - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x13 0x0b 0x198>; - phandle = <0x174>; - }; + pcie-clk3 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk3"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x496>; + gpios = <0xfe 0x09 0x01>; + }; - pwm15m1-pins { - rockchip,pins = <0x04 0x0b 0x0b 0x198>; - phandle = <0x3e2>; - }; + pwm@febf0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0030 0x00 0x10>; + phandle = <0x2dc>; + }; - pwm15m2-pins { - rockchip,pins = <0x01 0x16 0x0b 0x198>; - phandle = <0x3e3>; - }; + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + phandle = <0x29f>; + #hwlock-cells = <0x01>; + }; - pwm15m3-pins { - rockchip,pins = <0x01 0x1f 0x0b 0x198>; - phandle = <0x3e4>; - }; - }; + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x474>; + }; - refclk { + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; - refclk-pins { - rockchip,pins = <0x00 0x00 0x01 0x198>; - phandle = <0x3e5>; - }; + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; }; + }; - sata { - - sata-pins { - rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; - phandle = <0x3e6>; - }; + hdmirx-controller@fdee0000 { + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1b3 0x1b4>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + reg-names = "hdmirx_regs"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + hpd-trigger-level = <0x01>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + status = "disabled"; + rockchip,grf = <0xc8>; + interrupt-names = "cec\0hdmi\0dma"; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + reg = <0x00 0xfdee0000 0x00 0x6000>; + phandle = <0x1eb>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + rockchip,vo1_grf = <0xd8>; + }; - sata-reset { - rockchip,pins = <0x04 0x11 0x00 0x198>; - phandle = <0x3e7>; - }; - }; + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; - sata0 { + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; - sata0m0-pins { - rockchip,pins = <0x04 0x0e 0x06 0x198>; - phandle = <0x3e8>; - }; + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; - sata0m1-pins { - rockchip,pins = <0x01 0x0b 0x06 0x198>; - phandle = <0x3e9>; - }; + reboot-mode { + mode-normal = <0x5242c300>; + mode-loader = <0x5242c301>; + mode-quiescent = <0x5242c30e>; + mode-bootloader = <0x5242c301>; + mode-recovery = <0x5242c303>; + mode-watchdog = <0x5242c308>; + mode-ums = <0x5242c30c>; + mode-fastboot = <0x5242c309>; + offset = <0x80>; + compatible = "syscon-reboot-mode"; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + mode-charge = <0x5242c30b>; + mode-panic = <0x5242c307>; }; + }; - sata1 { + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; - sata1m0-pins { - rockchip,pins = <0x04 0x0d 0x06 0x198>; - phandle = <0x3ea>; - }; + iommu@fdb60f00 { + power-domains = <0x60 0x16>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_0_mmu"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + phandle = <0xb9>; + }; - sata1m1-pins { - rockchip,pins = <0x01 0x01 0x06 0x198>; - phandle = <0x3eb>; - }; - }; + pwm@febf0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0020 0x00 0x10>; + phandle = <0x2db>; + }; - sata2 { + rkispp@fdcd0000 { + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8b 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + phandle = <0x5b>; + }; - sata2m0-pins { - rockchip,pins = <0x04 0x09 0x06 0x198>; - phandle = <0x3ec>; - }; + tsadc@fec00000 { + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + clock-names = "tsadc\0apb_pclk"; + rockchip,hw-tshut-polarity = <0x00>; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + interrupts = <0x00 0x18d 0x04>; + rockchip,hw-tshut-mode = <0x00>; + clocks = <0x02 0xaa 0x02 0xa9>; + #thermal-sensor-cells = <0x01>; + compatible = "rockchip,rk3588-tsadc"; + pinctrl-1 = <0x176>; + status = "okay"; + reg = <0x00 0xfec00000 0x00 0x400>; + phandle = <0x5d>; + reset-names = "tsadc\0tsadc-apb"; + rockchip,hw-tshut-temp = <0x1d4c0>; + }; - sata2m1-pins { - rockchip,pins = <0x01 0x0f 0x06 0x198>; - phandle = <0x3ed>; - }; - }; + iommu@fdbb0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_iep_mmu"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + phandle = <0xc1>; + }; - sdio { + phy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0x101>; + reset-names = "apb\0init\0cmn\0lane"; + }; - sdiom1-pins { - rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; - phandle = <0x119>; - }; + pvtm@fda50000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; - sdiom0-pins { - rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; - phandle = <0x3ee>; - }; + pvtm@1 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c8 0x02 0x17>; + reg = <0x01>; }; + }; - sdmmc { - - sdmmc-bus4 { - rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; - phandle = <0x117>; - }; + csi2-dcphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20d>; + }; - sdmmc-clk { - rockchip,pins = <0x04 0x1d 0x01 0x199>; - phandle = <0x114>; - }; + mailbox@fece0000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfece0000 0x00 0x200>; + phandle = <0x2e9>; + }; - sdmmc-cmd { - rockchip,pins = <0x04 0x1c 0x01 0x199>; - phandle = <0x115>; - }; + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x23a>; + }; - sdmmc-det { - rockchip,pins = <0x00 0x04 0x01 0x19e>; - phandle = <0x116>; - }; + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x22f>; + }; - sdmmc-pwren { - rockchip,pins = <0x00 0x05 0x02 0x198>; - phandle = <0x3ef>; - }; - }; + dfi@fe060000 { + rockchip,pmu_grf = <0x104>; + compatible = "rockchip,rk3588-dfi"; + status = "disabled"; + reg = <0x00 0xfe060000 0x00 0x10000>; + phandle = <0x40>; + }; - spdif0 { + iommu@fdca0000 { + power-domains = <0x60 0x17>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x6d 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-av1"; + status = "okay"; + interrupt-names = "irq_av1d_mmu"; + reg = <0x00 0xfdca0000 0x00 0x600>; + phandle = <0xce>; + }; - spdif0m0-tx { - rockchip,pins = <0x01 0x0e 0x03 0x198>; - phandle = <0x142>; - }; + mipi5-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x229>; + }; - spdif0m1-tx { - rockchip,pins = <0x04 0x0c 0x06 0x198>; - phandle = <0x3f0>; - }; - }; + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; - spdif1 { + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; - spdif1m0-tx { - rockchip,pins = <0x01 0x0f 0x03 0x198>; - phandle = <0x143>; - }; + iommu@fdba8800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7d 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege2_mmu"; + reg = <0x00 0xfdba8800 0x00 0x40>; + phandle = <0xbf>; + }; - spdif1m1-tx { - rockchip,pins = <0x04 0x09 0x02 0x198>; - phandle = <0x3f1>; - }; + mpp-srv { + rockchip,resetgroup-count = <0x01>; + rockchip,taskqueue-count = <0x0c>; + compatible = "rockchip,mpp-service"; + status = "okay"; + phandle = <0xb8>; + }; - spdif1m2-tx { - rockchip,pins = <0x04 0x11 0x03 0x198>; - phandle = <0x3f2>; - }; - }; + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; - spi0 { + pwm@febf0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0010 0x00 0x10>; + phandle = <0x2da>; + }; - spi0m0-pins { - rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; - phandle = <0x150>; - }; + iommu@fdbef000 { + power-domains = <0x60 0x11>; + rockchip,shootdown-entire; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + phandle = <0xc5>; + lock-names = "aclk\0iface"; + }; - spi0m0-cs0 { - rockchip,pins = <0x00 0x19 0x08 0x19a>; - phandle = <0x14e>; - }; + serial@feb60000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb60000 0x00 0x100>; + phandle = <0x2cb>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + reg-shift = <0x02>; + }; - spi0m0-cs1 { - rockchip,pins = <0x00 0x0f 0x08 0x19a>; - phandle = <0x14f>; - }; + hdmiin-sound { + rockchip,jack-det; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,bitclock-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,format = "i2s"; + compatible = "rockchip,hdmi"; + phandle = <0x4ac>; + rockchip,frame-master = <0x1eb>; + rockchip,mclk-fs = <0x80>; + }; - spi0m1-pins { - rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; - phandle = <0x3f3>; - }; + i2s@fddc8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x391>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + phandle = <0x47c>; + dmas = <0xf2 0x16>; + reset-names = "tx-m"; + }; - spi0m1-cs0 { - rockchip,pins = <0x04 0x0a 0x08 0x19a>; - phandle = <0x3f4>; - }; + pcie30-avdd0v75 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "pcie30_avdd0v75"; + compatible = "regulator-fixed"; + phandle = <0x4a7>; + vin-supply = <0x1df>; + }; - spi0m1-cs1 { - rockchip,pins = <0x04 0x09 0x08 0x19a>; - phandle = <0x3f5>; - }; + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; + }; - spi0m2-pins { - rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; - phandle = <0x3f6>; - }; + rockchip-suspend { + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; - spi0m2-cs0 { - rockchip,pins = <0x01 0x0c 0x08 0x19a>; - phandle = <0x3f7>; - }; - - spi0m2-cs1 { - rockchip,pins = <0x01 0x0d 0x08 0x19a>; - phandle = <0x3f8>; - }; - - spi0m3-pins { - rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; - phandle = <0x3f9>; - }; - - spi0m3-cs0 { - rockchip,pins = <0x03 0x1c 0x08 0x19a>; - phandle = <0x3fa>; - }; - - spi0m3-cs1 { - rockchip,pins = <0x03 0x1d 0x08 0x19a>; - phandle = <0x3fb>; - }; - }; + decompress@fea80000 { + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + compatible = "rockchip,hw-decompress"; + status = "disabled"; + reg = <0x00 0xfea80000 0x00 0x1000>; + phandle = <0x2a3>; + reset-names = "dresetn"; + }; - spi1 { + dma-controller@fea30000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + phandle = <0xf1>; + #dma-cells = <0x01>; + }; - spi1m1-pins { - rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; - phandle = <0x153>; - }; + pwm@febf0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0000 0x00 0x10>; + phandle = <0x2d9>; + }; - spi1m1-cs0 { - rockchip,pins = <0x03 0x12 0x08 0x19a>; - phandle = <0x151>; - }; + iommu@fdcd8f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8e 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec1_mmu"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + phandle = <0xd3>; + }; - spi1m1-cs1 { - rockchip,pins = <0x03 0x13 0x08 0x19a>; - phandle = <0x152>; - }; + spdif-tx@fddb0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc3 0x04>; + clocks = <0x02 0x209 0x02 0x204>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + phandle = <0x1d5>; + dmas = <0xf1 0x06>; + }; - spi1m2-pins { - rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; - phandle = <0x3fc>; - }; + rkisp1-vir2 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x241>; + }; - spi1m2-cs0 { - rockchip,pins = <0x01 0x1b 0x08 0x19a>; - phandle = <0x3fd>; - }; + pcie-clk1 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk1"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x494>; + vin-supply = <0x1cd>; + gpios = <0x181 0x15 0x01>; + }; - spi1m2-cs1 { - rockchip,pins = <0x01 0x1d 0x08 0x19a>; - phandle = <0x3fe>; - }; + jpege-core@fdba8000 { + power-domains = <0x60 0x15>; + iommus = <0xbf>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + interrupts = <0x00 0x7e 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege2"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba8000 0x00 0x400>; + phandle = <0x26f>; + reset-names = "video_a\0video_h"; + }; - spi1m0-pins { - rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; - phandle = <0x3ff>; - }; + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; - spi1m0-cs0 { - rockchip,pins = <0x02 0x13 0x08 0x19f>; - phandle = <0x400>; - }; + spdif-tx1-sound { + simple-audio-card,name = "rockchip,spdif-tx1"; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49d>; + simple-audio-card,mclk-fs = <0x80>; - spi1m0-cs1 { - rockchip,pins = <0x02 0x14 0x08 0x19f>; - phandle = <0x401>; - }; + simple-audio-card,cpu { + sound-dai = <0x1d7>; }; - spi2 { - - spi2m0-pins { - rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; - phandle = <0x402>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x01 0x07 0x08 0x19a>; - phandle = <0x403>; - }; - - spi2m0-cs1 { - rockchip,pins = <0x01 0x08 0x08 0x19a>; - phandle = <0x404>; - }; + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; - spi2m1-pins { - rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; - phandle = <0x405>; - }; + mmc@fe2e0000 { + mmc-hs400-enhanced-strobe; + clock-names = "core\0bus\0axi\0block\0timer"; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + bus-width = <0x08>; + non-removable; + no-sdio; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + mmc-hs400-1_8v; + interrupts = <0x00 0xcd 0x04>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + no-sd; + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + status = "okay"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + phandle = <0x295>; + max-frequency = <0xbebc200>; + reset-names = "core\0bus\0axi\0block\0timer"; + }; - spi2m1-cs0 { - rockchip,pins = <0x04 0x07 0x08 0x19a>; - phandle = <0x406>; - }; + dma-controller@fed10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + phandle = <0xf2>; + #dma-cells = <0x01>; + }; - spi2m1-cs1 { - rockchip,pins = <0x04 0x08 0x08 0x19a>; - phandle = <0x407>; - }; + iommu@fc900000 { + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfc900000 0x00 0x200000>; + phandle = <0x256>; + }; - spi2m2-pins { - rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; - phandle = <0x155>; - }; + mailbox@fec70000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec70000 0x00 0x200>; + phandle = <0x2de>; + }; - spi2m2-cs0 { - rockchip,pins = <0x00 0x09 0x01 0x19f>; - phandle = <0x154>; - }; + pcie@fe150000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1b8>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x00 0x0f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20d 0x02 0x21c>; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x0e 0x00>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + #interrupt-cells = <0x01>; + status = "okay"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + linux,pci-domain = <0x00>; + phandle = <0x485>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; - spi2m2-cs1 { - rockchip,pins = <0x00 0x08 0x01 0x19f>; - phandle = <0x408>; - }; + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0x104 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b5>; + interrupt-controller; }; + }; - spi3 { - - spi3m1-pins { - rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; - phandle = <0x15f>; - }; - - spi3m1-cs0 { - rockchip,pins = <0x04 0x10 0x08 0x19a>; - phandle = <0x15d>; - }; - - spi3m1-cs1 { - rockchip,pins = <0x04 0x11 0x08 0x19a>; - phandle = <0x15e>; - }; - - spi3m2-pins { - rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; - phandle = <0x409>; - }; - - spi3m2-cs0 { - rockchip,pins = <0x00 0x1c 0x08 0x19a>; - phandle = <0x40a>; - }; + rng@fe378000 { + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + compatible = "rockchip,trngv1"; + status = "okay"; + reg = <0x00 0xfe378000 0x00 0x200>; + phandle = <0x297>; + reset-names = "reset"; + }; - spi3m2-cs1 { - rockchip,pins = <0x00 0x1d 0x08 0x19a>; - phandle = <0x40b>; - }; + sata@fe220000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + reg = <0x00 0xfe220000 0x00 0x1000>; + phandle = <0x48a>; + ports-implemented = <0x01>; + }; - spi3m3-pins { - rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; - phandle = <0x40c>; - }; + rkcif-mipi-lvds5 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a2>; + }; - spi3m3-cs0 { - rockchip,pins = <0x03 0x14 0x08 0x19a>; - phandle = <0x40d>; - }; + vcc-sata-pwr-en-regulator { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + gpio = <0x182 0x0c 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_sata_pwr_en"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a3>; + vin-supply = <0x1cd>; + }; - spi3m3-cs1 { - rockchip,pins = <0x03 0x15 0x08 0x19a>; - phandle = <0x40e>; - }; + pwm-fan { + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + compatible = "pwm-fan"; + phandle = <0x4ad>; + pwms = <0x1ed 0x00 0xc350 0x00>; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + }; - spi3m0-pins { - rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; - phandle = <0x40f>; - }; + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; - spi3m0-cs0 { - rockchip,pins = <0x04 0x12 0x08 0x19f>; - phandle = <0x410>; - }; + spdif-tx@fe4e0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc1 0x04>; + clocks = <0x02 0x41 0x02 0x3e>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + phandle = <0x29d>; + dmas = <0x7c 0x05>; + }; - spi3m0-cs1 { - rockchip,pins = <0x04 0x13 0x08 0x19f>; - phandle = <0x411>; - }; - }; + vad@fe4d0000 { + rockchip,det-channel = <0x00>; + rockchip,audio-src = <0x00>; + clock-names = "hclk"; + reg-names = "vad"; + interrupts = <0x00 0xca 0x04>; + clocks = <0x02 0x2a0>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-vad"; + status = "disabled"; + rockchip,mode = <0x00>; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + phandle = <0x29c>; + }; - spi4 { + jpegd@fdb90000 { + power-domains = <0x60 0x15>; + iommus = <0xbb>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b4>; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + interrupts = <0x00 0x81 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + compatible = "rockchip,rkv-jpeg-decoder-v1"; + status = "okay"; + interrupt-names = "irq_jpegd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb90000 0x00 0x400>; + phandle = <0x26c>; + reset-names = "video_a\0video_h"; + }; - spi4m0-pins { - rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; - phandle = <0x189>; - }; + cpuinfo { + nvmem-cells = <0x2a 0x2b 0x2c>; + compatible = "rockchip,cpuinfo"; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; - spi4m0-cs0 { - rockchip,pins = <0x01 0x13 0x08 0x19a>; - phandle = <0x187>; - }; + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; - spi4m0-cs1 { - rockchip,pins = <0x01 0x14 0x08 0x19a>; - phandle = <0x188>; - }; + spi@feb20000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x01>; + pinctrl-0 = <0x154 0x155>; + clock-names = "spiclk\0apb_pclk"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x148 0x04>; + clocks = <0x02 0xa5 0x02 0xa0>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "okay"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + phandle = <0x2ad>; + dmas = <0xf1 0x0f 0xf1 0x10>; - spi4m1-pins { - rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; - phandle = <0x412>; - }; + rk806single@0 { + vcc11-supply = <0x15b>; + pinctrl-names = "default\0pmic-power-off"; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + interrupts = <0x07 0x08>; + spi-max-frequency = <0xf4240>; + interrupt-parent = <0x7b>; + low_voltage_threshold = <0xbb8>; + vcca-supply = <0x78>; + vcc1-supply = <0x78>; + pmic-reset-func = <0x01>; + vcc2-supply = <0x78>; + hotdie_temperture_threshold = <0x73>; + compatible = "rockchip,rk806"; + vcc3-supply = <0x78>; + pinctrl-1 = <0x15a>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + reg = <0x00>; + phandle = <0x2ae>; + vcc6-supply = <0x78>; + shutdown_voltage_threshold = <0xa8c>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + shutdown_temperture_threshold = <0xa0>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; - spi4m1-cs0 { - rockchip,pins = <0x03 0x03 0x08 0x19a>; - phandle = <0x413>; - }; + pinctrl_rk806 { + gpio-controller; + phandle = <0x2af>; + #gpio-cells = <0x02>; - spi4m1-cs1 { - rockchip,pins = <0x03 0x04 0x08 0x19a>; - phandle = <0x414>; - }; + rk806_dvs2_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b4>; + }; - spi4m2-pins { - rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; - phandle = <0x415>; - }; + rk806_dvs3_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl3"; + phandle = <0x159>; + }; - spi4m2-cs0 { - rockchip,pins = <0x01 0x03 0x08 0x19a>; - phandle = <0x416>; - }; - }; + rk806_dvs3_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl3"; + phandle = <0x2ba>; + }; - tsadc { + rk806_dvs3_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b9>; + }; - tsadcm1-shut { - rockchip,pins = <0x00 0x02 0x02 0x198>; - phandle = <0x417>; - }; + rk806_dvs2_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x158>; + }; - tsadc-shut { - rockchip,pins = <0x00 0x01 0x02 0x198>; - phandle = <0x176>; - }; + rk806_dvs1_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl1"; + phandle = <0x15a>; + }; - tsadc-shut-org { - rockchip,pins = <0x00 0x01 0x01 0x198>; - phandle = <0x418>; - }; - }; + rk806_dvs1_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b0>; + }; - uart0 { + rk806_dvs1_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x157>; + }; - uart0m0-xfer { - rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; - phandle = <0x419>; - }; + rk806_dvs3_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl3"; + phandle = <0x2bb>; + }; - uart0m1-xfer { - rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; - phandle = <0x7d>; - }; + rk806_dvs2_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b6>; + }; - uart0m2-xfer { - rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; - phandle = <0x41a>; - }; + rk806_dvs2_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b2>; + }; - uart0-ctsn { - rockchip,pins = <0x00 0x19 0x04 0x198>; - phandle = <0x41b>; - }; + rk806_dvs2_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b3>; + }; - uart0-rtsn { - rockchip,pins = <0x00 0x16 0x04 0x198>; - phandle = <0x41c>; - }; - }; + rk806_dvs1_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b1>; + }; - uart1 { + rk806_dvs3_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b7>; + }; - uart1m1-xfer { - rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; - phandle = <0x160>; - }; + rk806_dvs2_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b5>; + }; - uart1m1-ctsn { - rockchip,pins = <0x01 0x1f 0x0a 0x198>; - phandle = <0x41d>; + rk806_dvs3_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b8>; + }; }; - uart1m1-rtsn { - rockchip,pins = <0x01 0x1e 0x0a 0x198>; - phandle = <0x41e>; + pwrkey { + status = "okay"; }; - uart1m2-xfer { - rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; - phandle = <0x41f>; - }; + regulators { - uart1m2-ctsn { - rockchip,pins = <0x00 0x18 0x0a 0x198>; - phandle = <0x420>; - }; + PLDO_REG2 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; - uart1m2-rtsn { - rockchip,pins = <0x00 0x17 0x0a 0x198>; - phandle = <0x421>; - }; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; - uart1m0-xfer { - rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; - phandle = <0x422>; - }; + DCDC_REG4 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-init-microvolt = <0xb71b0>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x2bc>; - uart1m0-ctsn { - rockchip,pins = <0x02 0x11 0x0a 0x198>; - phandle = <0x423>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart1m0-rtsn { - rockchip,pins = <0x02 0x10 0x0a 0x198>; - phandle = <0x424>; - }; - }; + DCDC_REG2 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x12>; - uart2 { + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart2m0-xfer { - rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; - phandle = <0x1ce>; - }; + NLDO_REG4 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; - uart2m1-xfer { - rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; - phandle = <0x161>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart2m2-xfer { - rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; - phandle = <0x425>; - }; + DCDC_REG9 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; - uart2-ctsn { - rockchip,pins = <0x03 0x0c 0x0a 0x198>; - phandle = <0x426>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart2-rtsn { - rockchip,pins = <0x03 0x0b 0x0a 0x198>; - phandle = <0x427>; - }; - }; + NLDO_REG2 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; - uart3 { + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; - uart3m0-xfer { - rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; - phandle = <0x428>; - }; + PLDO_REG5 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; - uart3m1-xfer { - rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; - phandle = <0x162>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart3m2-xfer { - rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; - phandle = <0x429>; - }; + DCDC_REG7 { + regulator-max-microvolt = <0x1e8480>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; - uart3-ctsn { - rockchip,pins = <0x01 0x13 0x0a 0x198>; - phandle = <0x42a>; - }; + regulator-state-mem { + regulator-suspend-microvolt = <0x1e8480>; + regulator-on-in-suspend; + }; + }; - uart3-rtsn { - rockchip,pins = <0x01 0x12 0x0a 0x198>; - phandle = <0x42b>; - }; - }; + PLDO_REG3 { + regulator-max-microvolt = <0x124f80>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; - uart4 { + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart4m0-xfer { - rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; - phandle = <0x42c>; - }; + DCDC_REG5 { + regulator-max-microvolt = <0xdbba0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x42>; - uart4m1-xfer { - rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; - phandle = <0x163>; - }; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; - uart4m2-xfer { - rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; - phandle = <0x42d>; - }; + DCDC_REG10 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; - uart4-ctsn { - rockchip,pins = <0x01 0x17 0x0a 0x198>; - phandle = <0x42e>; - }; + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; - uart4-rtsn { - rockchip,pins = <0x01 0x15 0x0a 0x198>; - phandle = <0x42f>; - }; - }; + PLDO_REG1 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; - uart5 { + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart5m0-xfer { - rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; - phandle = <0x430>; - }; + DCDC_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x43>; - uart5m0-ctsn { - rockchip,pins = <0x04 0x1a 0x0a 0x198>; - phandle = <0x431>; - }; + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; - uart5m0-rtsn { - rockchip,pins = <0x04 0x1b 0x0a 0x198>; - phandle = <0x432>; - }; + DCDC_REG1 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-enable-ramp-delay = <0x190>; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x62>; - uart5m1-xfer { - rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; - phandle = <0x164>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart5m1-ctsn { - rockchip,pins = <0x02 0x02 0x0a 0x198>; - phandle = <0x433>; - }; + NLDO_REG5 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; - uart5m1-rtsn { - rockchip,pins = <0x02 0x03 0x0a 0x198>; - phandle = <0x434>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart5m2-xfer { - rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; - phandle = <0x435>; - }; - }; + NLDO_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; - uart6 { + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart6m1-xfer { - rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; - phandle = <0x165>; - }; + PLDO_REG6 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; - uart6m1-ctsn { - rockchip,pins = <0x01 0x03 0x0a 0x198>; - phandle = <0x436>; - }; + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; - uart6m1-rtsn { - rockchip,pins = <0x01 0x02 0x0a 0x198>; - phandle = <0x1e5>; - }; - - uart6m2-xfer { - rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; - phandle = <0x437>; - }; - - uart6m0-xfer { - rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; - phandle = <0x438>; - }; - - uart6m0-ctsn { - rockchip,pins = <0x02 0x09 0x0a 0x198>; - phandle = <0x439>; - }; - - uart6m0-rtsn { - rockchip,pins = <0x02 0x08 0x0a 0x198>; - phandle = <0x43a>; - }; - }; - - uart7 { + DCDC_REG8 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; - uart7m1-xfer { - rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; - phandle = <0x166>; - }; + regulator-state-mem { + regulator-suspend-microvolt = <0x325aa0>; + regulator-on-in-suspend; + }; + }; - uart7m1-ctsn { - rockchip,pins = <0x03 0x13 0x0a 0x198>; - phandle = <0x43b>; - }; + NLDO_REG1 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; - uart7m1-rtsn { - rockchip,pins = <0x03 0x12 0x0a 0x198>; - phandle = <0x43c>; - }; + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; - uart7m2-xfer { - rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; - phandle = <0x43d>; - }; + PLDO_REG4 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; - uart7m0-xfer { - rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; - phandle = <0x43e>; - }; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; - uart7m0-ctsn { - rockchip,pins = <0x04 0x16 0x0a 0x198>; - phandle = <0x43f>; - }; + DCDC_REG6 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; - uart7m0-rtsn { - rockchip,pins = <0x04 0x12 0x0a 0x198>; - phandle = <0x440>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; }; }; + }; - uart8 { - - uart8m0-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; - phandle = <0x441>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x04 0x0b 0x0a 0x198>; - phandle = <0x442>; - }; - - uart8m0-rtsn { - rockchip,pins = <0x04 0x0a 0x0a 0x198>; - phandle = <0x443>; - }; - - uart8m1-xfer { - rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; - phandle = <0x167>; - }; - - uart8m1-ctsn { - rockchip,pins = <0x03 0x05 0x0a 0x198>; - phandle = <0x444>; - }; - - uart8m1-rtsn { - rockchip,pins = <0x03 0x04 0x0a 0x198>; - phandle = <0x445>; - }; + usbhost3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "disabled"; + phandle = <0x258>; - uart8-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e>; - phandle = <0x446>; - }; + usb@fcd00000 { + snps,dis_enblslpm_quirk; + phy-names = "usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x237>; + interrupts = <0x00 0xde 0x04>; + snps,dis_rxdet_inp3_quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "disabled"; + snps,parkmode-disable-ss-quirk; + phys = <0x70 0x04>; + reg = <0x00 0xfcd00000 0x00 0x400000>; + phandle = <0x259>; + dr_mode = "host"; + reset-names = "usb3-host"; + snps,dis-tx-ipgap-linecheck-quirk; }; + }; - uart9 { - - uart9m1-xfer { - rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; - phandle = <0x168>; - }; - - uart9m1-ctsn { - rockchip,pins = <0x04 0x01 0x0a 0x198>; - phandle = <0x447>; - }; - - uart9m1-rtsn { - rockchip,pins = <0x04 0x00 0x0a 0x198>; - phandle = <0x448>; - }; - - uart9m2-xfer { - rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; - phandle = <0x449>; - }; - - uart9m2-ctsn { - rockchip,pins = <0x03 0x1b 0x0a 0x198>; - phandle = <0x44a>; - }; - - uart9m2-rtsn { - rockchip,pins = <0x03 0x1a 0x0a 0x198>; - phandle = <0x44b>; - }; - - uart9m0-xfer { - rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; - phandle = <0x44c>; - }; - - uart9m0-ctsn { - rockchip,pins = <0x04 0x15 0x0a 0x198>; - phandle = <0x44d>; - }; + pcie@fe190000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x40 0x4f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x211 0x02 0x220>; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x108 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + linux,pci-domain = <0x04>; + phandle = <0x28d>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; - uart9m0-rtsn { - rockchip,pins = <0x04 0x14 0x0a 0x198>; - phandle = <0x44e>; - }; + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xfa 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x107>; + interrupt-controller; }; + }; - vop { + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x238>; + }; - vop-pins { - rockchip,pins = <0x01 0x02 0x01 0x198>; - phandle = <0x44f>; - }; - }; + aliases { + i2c3 = "/i2c@feab0000"; + ethernet0 = "/ethernet@fe1b0000"; + pwm9 = "/pwm@febe0010"; + pwm14 = "/pwm@febf0020"; + spi2 = "/spi@feb20000"; + usbdp0 = "/phy@fed80000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + dsi1 = "/dsi@fde30000"; + hdmi1 = "/hdmi@fdea0000"; + serial7 = "/serial@feba0000"; + i2c1 = "/i2c@fea90000"; + pwm7 = "/pwm@febd0030"; + pwm12 = "/pwm@febf0000"; + jpege3 = "/jpege-core@fdbac000"; + spi0 = "/spi@feb00000"; + hdptx1 = "/phy@fed70000"; + csi2dphy5 = "/csi2-dphy5"; + serial5 = "/serial@feb80000"; + csi2dcphy1 = "/csi2-dcphy1"; + pwm5 = "/pwm@febd0010"; + mmc1 = "/mmc@fe2c0000"; + pwm10 = "/pwm@febe0020"; + jpege1 = "/jpege-core@fdba4000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + csi2dphy3 = "/csi2-dphy3"; + serial3 = "/serial@feb60000"; + edp0 = "/edp@fdec0000"; + pwm3 = "/pwm@fd8b0030"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + csi2dphy1 = "/csi2-dphy1"; + serial1 = "/serial@feb40000"; + pwm1 = "/pwm@fd8b0010"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + spi5 = "/spi@fe2b0000"; + gpio3 = "/pinctrl/gpio@fec40000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + i2c4 = "/i2c@feac0000"; + ethernet1 = "/ethernet@fe1c0000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + pwm15 = "/pwm@febf0030"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + spi3 = "/spi@feb30000"; + usbdp1 = "/phy@fed90000"; + gpio1 = "/pinctrl/gpio@fec20000"; + serial8 = "/serial@febb0000"; + i2c2 = "/i2c@feaa0000"; + pwm8 = "/pwm@febe0000"; + pwm13 = "/pwm@febf0010"; + spi1 = "/spi@feb10000"; + dsi0 = "/dsi@fde20000"; + hdmi0 = "/hdmi@fde80000"; + serial6 = "/serial@feb90000"; + i2c0 = "/i2c@fd880000"; + pwm6 = "/pwm@febd0020"; + mmc2 = "/mmc@fe2d0000"; + pwm11 = "/pwm@febe0030"; + jpege2 = "/jpege-core@fdba8000"; + hdptx0 = "/phy@fed60000"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + dp1 = "/dp@fde60000"; + csi2dphy4 = "/csi2-dphy4"; + serial4 = "/serial@feb70000"; + edp1 = "/edp@fded0000"; + csi2dcphy0 = "/csi2-dcphy0"; + pwm4 = "/pwm@febd0000"; + mmc0 = "/mmc@fe2e0000"; + jpege0 = "/jpege-core@fdba0000"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2c7 = "/i2c@fec90000"; + csi2dphy2 = "/csi2-dphy2"; + serial2 = "/serial@feb50000"; + pwm2 = "/pwm@fd8b0020"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdcp0 = "/hdcp@fde40000"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + csi2dphy0 = "/csi2-dphy0"; + serial0 = "/serial@fd890000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm0 = "/pwm@fd8b0000"; + spi4 = "/spi@fecb0000"; + gpio2 = "/pinctrl/gpio@fec30000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + serial9 = "/serial@febc0000"; + }; - bt656 { + spdif-tx@fdde8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc5 0x04>; + clocks = <0x02 0x25c 0x02 0x258>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + phandle = <0x47d>; + dmas = <0xf1 0x08>; + }; - bt656-pins { - rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; - phandle = <0x450>; - }; - }; + i2s@fe490000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x12d 0x12e>; + pinctrl-0 = <0x12a 0x12b>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x12c>; + status = "disabled"; + reg = <0x00 0xfe490000 0x00 0x1000>; + phandle = <0x298>; + dmas = <0xf1 0x00 0xf1 0x01>; + rockchip,clk-trcm = <0x01>; + }; - gpio-func { + syscon@fd5d0000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + phandle = <0x18b>; - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x198>; - phandle = <0x175>; + usb2-phy@0 { + clock-output-names = "usb480m_phy0"; + clock-names = "phyclk"; + resets = <0x02 0xc0047 0x02 0x488>; + interrupts = <0x00 0x189 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x00 0x10>; + phandle = <0x18d>; + reset-names = "phy\0apb"; + + otg-port { + #phy-cells = <0x00>; + rockchip,typec-vbus-det; + status = "okay"; + phandle = <0x66>; }; }; + }; - pcfg-pull-none-drv-level-7 { - bias-disable; - drive-strength = <0x07>; - phandle = <0x451>; - }; + i2c@feac0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14b>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb3 0x02 0xab>; + interrupts = <0x00 0x141 0x04>; + clocks = <0x02 0x90 0x02 0x88>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + phandle = <0x2a7>; + reset-names = "i2c\0apb"; - pcfg-pull-none-drv-level-8 { - bias-disable; - drive-strength = <0x08>; - phandle = <0x452>; + pc9202@3c { + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + index = <0x01>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + reg = <0x3c>; }; + }; - pcfg-pull-none-drv-level-9 { - bias-disable; - drive-strength = <0x09>; - phandle = <0x453>; - }; + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x476>; + }; - pcfg-pull-none-drv-level-10 { - bias-disable; - drive-strength = <0x0a>; - phandle = <0x454>; - }; + firmware { - pcfg-pull-none-drv-level-11 { - bias-disable; - drive-strength = <0x0b>; - phandle = <0x455>; + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + phandle = <0x222>; }; - pcfg-pull-none-drv-level-12 { - bias-disable; - drive-strength = <0x0c>; - phandle = <0x456>; + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; }; - pcfg-pull-none-drv-level-13 { - bias-disable; - drive-strength = <0x0d>; - phandle = <0x457>; - }; + scmi { + shmem = <0x46>; + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; - pcfg-pull-none-drv-level-14 { - bias-disable; - drive-strength = <0x0e>; - phandle = <0x458>; - }; + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; + }; - pcfg-pull-none-drv-level-15 { - bias-disable; - drive-strength = <0x0f>; - phandle = <0x459>; - }; - - pcfg-pull-up-drv-level-7 { - bias-pull-up; - drive-strength = <0x07>; - phandle = <0x45a>; - }; - - pcfg-pull-up-drv-level-8 { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0x45b>; + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; + }; }; + }; - pcfg-pull-up-drv-level-9 { - bias-pull-up; - drive-strength = <0x09>; - phandle = <0x45c>; - }; + rkvenc-core@fdbd0000 { + power-domains = <0x60 0x10>; + iommus = <0xc2>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + interrupts = <0x00 0x65 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + phandle = <0x272>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; - pcfg-pull-up-drv-level-10 { - bias-pull-up; - drive-strength = <0x0a>; - phandle = <0x45d>; - }; + iommu@fdcc7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x88 0x04>; + clocks = <0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp1_mmu"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xd1>; + }; - pcfg-pull-up-drv-level-11 { - bias-pull-up; - drive-strength = <0x0b>; - phandle = <0x45e>; - }; + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22b>; + }; - pcfg-pull-up-drv-level-12 { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0x45f>; - }; + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; - pcfg-pull-up-drv-level-13 { - bias-pull-up; - drive-strength = <0x0d>; - phandle = <0x460>; - }; + gpu@fb000000 { + power-domains = <0x60 0x0c>; + downdifferential = <0x0a>; + mali-supply = <0x62>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + upthreshold = <0x1e>; + compatible = "arm,mali-bifrost"; + dynamic-power-coefficient = <0xba6>; + status = "okay"; + interrupt-names = "GPU\0MMU\0JOB"; + mem-supply = <0x62>; + reg = <0x00 0xfb000000 0x00 0x200000>; + phandle = <0x5f>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + }; - pcfg-pull-up-drv-level-14 { - bias-pull-up; - drive-strength = <0x0e>; - phandle = <0x461>; - }; + csi2-dphy4 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x213>; + }; - pcfg-pull-up-drv-level-15 { - bias-pull-up; - drive-strength = <0x0f>; - phandle = <0x462>; - }; + mipi4-csi2-hw@fdd50000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x328>; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + clocks = <0x02 0x1d3>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + phandle = <0x4b>; + reset-names = "srst_csihost_p"; + }; - pcfg-pull-down-drv-level-7 { - bias-pull-down; - drive-strength = <0x07>; - phandle = <0x463>; - }; + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; - pcfg-pull-down-drv-level-8 { - bias-pull-down; - drive-strength = <0x08>; - phandle = <0x464>; - }; + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x235>; + }; - pcfg-pull-down-drv-level-9 { - bias-pull-down; - drive-strength = <0x09>; - phandle = <0x465>; - }; + rkisp1-vir0 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23f>; + }; - pcfg-pull-down-drv-level-10 { - bias-pull-down; - drive-strength = <0x0a>; - phandle = <0x466>; - }; + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; - pcfg-pull-down-drv-level-11 { - bias-pull-down; - drive-strength = <0x0b>; - phandle = <0x467>; - }; + test-power { + status = "okay"; + }; - pcfg-pull-down-drv-level-12 { - bias-pull-down; - drive-strength = <0x0c>; - phandle = <0x468>; - }; + usb-5v { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0xfe 0x03 0x00>; + pinctrl-0 = <0x1ef>; + regulator-always-on; + enable-active-high; + regulator-name = "usb_5v"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b1>; + }; - pcfg-pull-down-drv-level-13 { - bias-pull-down; - drive-strength = <0x0d>; - phandle = <0x469>; - }; + phy@feda0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + clocks = <0x02 0x108 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x190>; + reg = <0x00 0xfeda0000 0x00 0x10000>; + phandle = <0x2f>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; - pcfg-pull-down-drv-level-14 { - bias-pull-down; - drive-strength = <0x0e>; - phandle = <0x46a>; - }; + mod-sleep-regulator { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x7b 0x15 0x00>; + pinctrl-0 = <0x1ee>; + regulator-always-on; + enable-active-high; + regulator-name = "mod_sleep"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4ae>; - pcfg-pull-down-drv-level-15 { - bias-pull-down; - drive-strength = <0x0f>; - phandle = <0x46b>; + regulator-state-mem { + regulator-on-in-suspend; }; + }; - eth0 { + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; - eth0-pins { - rockchip,pins = <0x02 0x13 0x01 0x198>; - phandle = <0x46c>; - }; - }; - - gmac0 { - - gmac0-miim { - rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; - phandle = <0x1c1>; - }; - - gmac0-clkinout { - rockchip,pins = <0x04 0x13 0x01 0x198>; - phandle = <0x46d>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; - phandle = <0x1c3>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; - phandle = <0x1c2>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; - phandle = <0x1c4>; - }; + crypto@fe370000 { + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + compatible = "rockchip,rk3588-crypto"; + status = "disabled"; + reg = <0x00 0xfe370000 0x00 0x2000>; + phandle = <0x296>; + reset-names = "crypto-rst"; + }; - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; - phandle = <0x1c5>; - }; + i2s@fddf4000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3ef>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + phandle = <0x1e0>; + dmas = <0xf2 0x04>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; - gmac0-ppsclk { - rockchip,pins = <0x02 0x14 0x01 0x198>; - phandle = <0x46e>; - }; + mipi0-csi2-hw@fdd10000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x324>; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + clocks = <0x02 0x1cf>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + phandle = <0x47>; + reset-names = "srst_csihost_p"; + }; - gmac0-ppstring { - rockchip,pins = <0x02 0x0d 0x01 0x198>; - phandle = <0x46f>; - }; + mipi4-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x228>; + }; - gmac0-ptp-refclk { - rockchip,pins = <0x02 0x0c 0x01 0x198>; - phandle = <0x470>; - }; + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; - gmac0-txer { - rockchip,pins = <0x04 0x16 0x01 0x198>; - phandle = <0x471>; - }; - }; + dsi@fde30000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x30>; + reg = <0x00 0xfde30000 0x00 0x10000>; + phandle = <0x283>; + reset-names = "apb"; - hym8563 { + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - hym8563-int { - rockchip,pins = <0x00 0x08 0x00 0x198>; - phandle = <0x7a>; - }; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x284>; - leds { + endpoint@1 { + remote-endpoint = <0x3a>; + status = "disabled"; + reg = <0x01>; + phandle = <0xef>; + }; - leds-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1ee>; + endpoint@0 { + remote-endpoint = <0xf4>; + status = "disabled"; + reg = <0x00>; + phandle = <0xea>; + }; }; }; + }; - headphone { + iommu@fcb00000 { + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + phandle = <0x257>; + }; - hp-det { - rockchip,pins = <0x02 0x13 0x00 0x198>; - phandle = <0x1dc>; - }; - }; + rkcif-mipi-lvds3 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x57>; + }; - usb-typec { + vcc-hub-regulator { + regulator-boot-on; + gpio = <0x182 0x01 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4af>; + }; - usb-5v-ctrl { - rockchip,pins = <0x01 0x03 0x00 0x198>; - phandle = <0x1ef>; - }; + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; - usbc0-int { - rockchip,pins = <0x00 0x1b 0x00 0x198>; - phandle = <0x17b>; - }; - }; + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; - hdmirx { + rkisp@fdcb0000 { + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + compatible = "rockchip,rk3588-rkisp"; + status = "okay"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + phandle = <0x58>; + }; - hdmirx-det { - rockchip,pins = <0x01 0x1d 0x00 0x198>; - phandle = <0x1b4>; - }; - }; + serial@feba0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeba0000 0x00 0x100>; + phandle = <0x2cf>; + dmas = <0xf2 0x07 0xf2 0x08>; + reg-shift = <0x02>; + }; - wireless-bluetooth { + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x232>; + }; - uart6-gpios { - rockchip,pins = <0x01 0x02 0x00 0x198>; - phandle = <0x1e9>; - }; + chosen { + linux,initrd-end = <0x00 0xaac72ae>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-start = <0x00 0xa200000>; + phandle = <0x48d>; + }; - bt-reset-gpio { - rockchip,pins = <0x00 0x16 0x00 0x198>; - phandle = <0x1e6>; - }; + hdmi@fde80000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "okay"; + rockchip,grf = <0xc8>; + phys = <0xfd>; + enable-gpios = <0xfe 0x08 0x00>; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + phandle = <0x1d4>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; - bt-wake-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1e7>; - }; + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; - bt-irq-gpio { - rockchip,pins = <0x00 0x00 0x00 0x198>; - phandle = <0x1e8>; - }; - }; + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x288>; - wireless-wlan { + endpoint@1 { + remote-endpoint = <0xff>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe2>; + }; - wifi-host-wake-irq { - rockchip,pins = <0x00 0x0a 0x00 0x198>; - phandle = <0x1ea>; + endpoint@2 { + remote-endpoint = <0x100>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe8>; + }; + + endpoint@0 { + remote-endpoint = <0x3c>; + status = "okay"; + reg = <0x00>; + phandle = <0xdc>; + }; }; }; + }; - wdt-pc9202 { + cluster2-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x27 0x28 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x29>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x1a>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; - wdt-en-base { - rockchip,pins = <0x00 0x14 0x00 0x198>; - phandle = <0x14c>; - }; + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; }; - cam { - - cam0-or-cam1-switch-pin { - rockchip,pins = <0x03 0x11 0x00 0x198>; - phandle = <0x1f0>; - }; + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; }; - }; - rkcif-mipi-lvds4 { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "disabled"; - phandle = <0x1a1>; - }; + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds4-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a1>; - status = "disabled"; - phandle = <0x472>; - }; + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds4-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a1>; - status = "disabled"; - phandle = <0x473>; - }; + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds4-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a1>; - status = "disabled"; - phandle = <0x474>; - }; + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds4-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a1>; - status = "disabled"; - phandle = <0x475>; - }; + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds5 { - compatible = "rockchip,rkcif-mipi-lvds"; - rockchip,hw = <0x4f>; - iommus = <0x50>; - status = "disabled"; - phandle = <0x1a2>; - }; + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds5-sditf { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a2>; - status = "disabled"; - phandle = <0x476>; - }; + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds5-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a2>; - status = "disabled"; - phandle = <0x477>; - }; + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; - rkcif-mipi-lvds5-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a2>; - status = "disabled"; - phandle = <0x478>; - }; + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; - rkcif-mipi-lvds5-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - rockchip,cif = <0x1a2>; - status = "disabled"; - phandle = <0x479>; - }; + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + clock-latency-ns = <0x9c40>; + }; - usbdrd3_1 { - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; - clock-names = "ref\0suspend\0bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - status = "okay"; - phandle = <0x47a>; + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; - usb@fc400000 { - compatible = "snps,dwc3"; - reg = <0x00 0xfc400000 0x00 0x400000>; - interrupts = <0x00 0xdd 0x04>; - power-domains = <0x60 0x1f>; - resets = <0x02 0x2a7>; - reset-names = "usb3-otg"; - dr_mode = "host"; - phys = <0x1a3 0x1a4>; - phy-names = "usb2-phy\0usb3-phy"; - phy_type = "utmi_wide"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-ss-quirk; - status = "okay"; - phandle = <0x47b>; + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; }; - }; - syscon@fd5b8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfd5b8000 0x00 0x10000>; - phandle = <0x1cc>; + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; }; - syscon@fd5c0000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c0000 0x00 0x100>; - phandle = <0x1cb>; + rkcif-dvp { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-dvp"; + status = "disabled"; + phandle = <0x51>; }; - syscon@fd5cc000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5cc000 0x00 0x4000>; - phandle = <0x1c9>; + rkisp0-vir2 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x59>; + reg = <0x00>; + phandle = <0x56>; + }; + }; }; - syscon@fd5d4000 { - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d4000 0x00 0x4000>; + i2c@fea90000 { + pinctrl-names = "default"; #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x1c8>; + pinctrl-0 = <0x148>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb0 0x02 0xa8>; + interrupts = <0x00 0x13e 0x04>; + clocks = <0x02 0x8d 0x02 0x85>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfea90000 0x00 0x1000>; + phandle = <0x2a4>; + reset-names = "i2c\0apb"; - usb2-phy@4000 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0x4000 0x10>; - interrupts = <0x00 0x18a 0x04>; - resets = <0x02 0xc0048 0x02 0x489>; - reset-names = "phy\0apb"; - clocks = <0x02 0x2b5>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy1"; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - status = "okay"; - phandle = <0x1ca>; + rk8602@42 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0xb3>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; - otg-port { - #phy-cells = <0x00>; - status = "okay"; - phy-supply = <0x75>; - phandle = <0x1a3>; + regulator-state-mem { + regulator-off-in-suspend; }; }; }; - syscon@fd5e4000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e4000 0x00 0x100>; - phandle = <0x1c7>; + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; }; - spdif-tx@fddb8000 { - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - reg = <0x00 0xfddb8000 0x00 0x1000>; - interrupts = <0x00 0xc6 0x04>; - dmas = <0xf1 0x16>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x02 0x20f 0x02 0x20a>; - assigned-clocks = <0x02 0x20b>; - assigned-clock-parents = <0x02 0x05>; - power-domains = <0x60 0x19>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x1e2>; + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; }; - i2s@fddc8000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfddc8000 0x00 0x1000>; - interrupts = <0x00 0xbc 0x04>; - clocks = <0x02 0x201 0x02 0x1fe>; - clock-names = "mclk_tx\0hclk"; - assigned-clocks = <0x02 0x1ff>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf2 0x16>; - dma-names = "tx"; - power-domains = <0x60 0x19>; - resets = <0x02 0x391>; - reset-names = "tx-m"; - rockchip,playback-only; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x47c>; - }; + venc-opp-table { + nvmem-cells = <0xc6 0xc7>; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,grf = <0xc8>; + nvmem-cell-names = "leakage\0opp-info"; + phandle = <0xc4>; - spdif-tx@fdde8000 { - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - reg = <0x00 0xfdde8000 0x00 0x1000>; - interrupts = <0x00 0xc5 0x04>; - dmas = <0xf1 0x08>; - dma-names = "tx"; - clock-names = "mclk\0hclk"; - clocks = <0x02 0x25c 0x02 0x258>; - assigned-clocks = <0x02 0x259>; - assigned-clock-parents = <0x02 0x05>; - power-domains = <0x60 0x1a>; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x47d>; + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; }; - i2s@fddf4000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfddf4000 0x00 0x1000>; - interrupts = <0x00 0xba 0x04>; - clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x249>; - assigned-clock-parents = <0x02 0x07>; - dmas = <0xf2 0x04>; - dma-names = "tx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x3ef>; - reset-names = "tx-m"; - rockchip,always-on; - rockchip,hdmi-path; - rockchip,playback-only; - #sound-dai-cells = <0x00>; + iommu@fdc38700 { + power-domains = <0x60 0x0e>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x60 0x04>; + clocks = <0x02 0x190 0x02 0x18f>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; status = "okay"; - phandle = <0x1e0>; + interrupt-names = "irq_rkvdec0_mmu"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + phandle = <0xc9>; + rockchip,master-handle-irq; }; - i2s@fddf8000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfddf8000 0x00 0x1000>; - interrupts = <0x00 0xbb 0x04>; - clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x239>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf2 0x15>; - dma-names = "rx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x3c3>; - reset-names = "rx-m"; - rockchip,capture-only; - #sound-dai-cells = <0x00>; - status = "okay"; - phandle = <0x1ec>; + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; }; - i2s@fde00000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x00 0xfde00000 0x00 0x1000>; - interrupts = <0x00 0xbe 0x04>; - clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x234>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0xf2 0x18>; - dma-names = "rx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x417>; - reset-names = "rx-m"; - rockchip,capture-only; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x47e>; + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; }; - spdif-rx@fde10000 { - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - reg = <0x00 0xfde10000 0x00 0x1000>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x02 0x260 0x02 0x25f>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x260>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0x7c 0x16>; - dma-names = "rx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x3ff>; - reset-names = "spdifrx-m"; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x47f>; + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; }; - spdif-rx@fde18000 { - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - reg = <0x00 0xfde18000 0x00 0x1000>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x02 0x262 0x02 0x261>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x262>; - assigned-clock-parents = <0x02 0x05>; - dmas = <0x7c 0x17>; - dma-names = "rx"; - power-domains = <0x60 0x1a>; - resets = <0x02 0x401>; - reset-names = "spdifrx-m"; - #sound-dai-cells = <0x00>; + csi2-dphy2 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; status = "disabled"; - phandle = <0x480>; + phys = <0x2f 0x30>; + phandle = <0x211>; }; - dp@fde60000 { - compatible = "rockchip,rk3588-dp"; - reg = <0x00 0xfde60000 0x00 0x4000>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cd>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x389>; - phys = <0x1a5>; - power-domains = <0x60 0x19>; - #sound-dai-cells = <0x01>; - status = "disabled"; - phandle = <0x1e3>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x1a6>; - status = "disabled"; - phandle = <0xdd>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x3e>; - status = "disabled"; - phandle = <0xe3>; - }; + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x1a7>; - status = "disabled"; - phandle = <0xeb>; - }; - }; + uio@fe1b0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + phandle = <0x488>; + rockchip,ethernet = <0x1bd>; + }; - port@1 { - reg = <0x01>; + iommu@fdb70f00 { + power-domains = <0x60 0x1e>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_1_mmu"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + phandle = <0xba>; + }; - endpoint { - phandle = <0x481>; - }; - }; - }; + vcc5v0-usb { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usb"; + compatible = "regulator-fixed"; + phandle = <0x1dd>; + vin-supply = <0x1cd>; }; - hdmi@fdea0000 { - compatible = "rockchip,rk3588-dw-hdmi"; - reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; - interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; - clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d7 0x02 0x49d>; - reset-names = "ref\0hdp"; - power-domains = <0x60 0x1a>; + fiq-debugger { pinctrl-names = "default"; - pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; - reg-io-width = <0x04>; - rockchip,grf = <0xc8>; - rockchip,vo1_grf = <0xd8>; - phys = <0x1ac>; - phy-names = "hdmi"; - #sound-dai-cells = <0x00>; - status = "disabled"; - phandle = <0x1e1>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "okay"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x482>; + phy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1af>; + reset-names = "apb\0init\0cmn\0lane"; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x1ad>; - status = "disabled"; - phandle = <0xdf>; - }; + ethernet@fe1b0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x1bf>; + snps,reset-active-low; + pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x1c0>; + local-mac-address = [da 2f 1a d4 a9 85]; + resets = <0x02 0x20a>; + interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x02 0x01>; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x1bd>; + phy-handle = <0x1c6>; + reset-names = "stmmaceth"; + tx_delay = <0x31>; + snps,axi-config = <0x1be>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x3f>; - status = "disabled"; - phandle = <0xe5>; - }; + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x489>; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x1ae>; - status = "disabled"; - phandle = <0xed>; - }; + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1c6>; }; }; - }; - - edp@fded0000 { - compatible = "rockchip,rk3588-edp"; - reg = <0x00 0xfded0000 0x00 0x1000>; - interrupts = <0x00 0xa4 0x04>; - clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e4 0x02 0x3e3>; - reset-names = "dp\0apb"; - phys = <0x1af>; - phy-names = "dp"; - power-domains = <0x60 0x1a>; - rockchip,grf = <0xd8>; - status = "disabled"; - phandle = <0x483>; - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; + tx-queues-config { + phandle = <0x1c0>; + snps,tx-queues-to-use = <0x01>; - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; + queue0 { + }; + }; - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x1b0>; - status = "disabled"; - phandle = <0xde>; - }; + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x1be>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x1b1>; - status = "disabled"; - phandle = <0xe4>; - }; + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x1bf>; - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0x1b2>; - status = "disabled"; - phandle = <0xec>; - }; + queue0 { }; + }; + }; - port@1 { - reg = <0x01>; + pvtm@fda60000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; - endpoint { - phandle = <0x484>; - }; - }; + pvtm@2 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2ca 0x02 0x1b>; + reg = <0x02>; }; }; - hdmirx-controller@fdee0000 { - compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; - reg = <0x00 0xfdee0000 0x00 0x6000>; - reg-names = "hdmirx_regs"; - power-domains = <0x60 0x1a>; - rockchip,grf = <0xc8>; - rockchip,vo1_grf = <0xd8>; - interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; - interrupt-names = "cec\0hdmi\0dma"; - clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; - clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; - resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; - reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; - pinctrl-0 = <0x1b3 0x1b4>; - pinctrl-names = "default"; + rkispp@fdcd8000 { + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8d 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + compatible = "rockchip,rk3588-rkispp"; status = "disabled"; - #sound-dai-cells = <0x01>; - hpd-trigger-level = <0x01>; - hdmirx-det-gpios = <0xfe 0x1d 0x01>; - phandle = <0x1eb>; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + phandle = <0x5c>; }; - pcie@fe150000 { - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x00 0x0f>; - clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - device_type = "pci"; - interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; - linux,pci-domain = <0x00>; - num-ib-windows = <0x10>; - num-ob-windows = <0x10>; - num-viewport = <0x08>; - max-link-speed = <0x03>; - msi-map = <0x00 0x1b6 0x00 0x1000>; - num-lanes = <0x01>; - phys = <0x1b7>; - phy-names = "pcie-phy"; - power-domains = <0x60 0x22>; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; - reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; - reg-names = "pcie-apb\0pcie-dbi"; - resets = <0x02 0x20d 0x02 0x21c>; - reset-names = "pcie\0periph"; - rockchip,pipe-grf = <0x76>; - status = "okay"; - reset-gpios = <0x10d 0x0e 0x00>; - vpcie3v3-supply = <0x1b8>; - phandle = <0x485>; + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0x104 0x01>; - phandle = <0x1b5>; - }; + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; }; - pcie@fe160000 { - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x10 0x1f>; - clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - device_type = "pci"; - interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; - linux,pci-domain = <0x01>; - num-ib-windows = <0x10>; - num-ob-windows = <0x10>; - num-viewport = <0x08>; - max-link-speed = <0x03>; - msi-map = <0x1000 0x1b6 0x1000 0x1000>; - num-lanes = <0x02>; - phys = <0x1b7>; - phy-names = "pcie-phy"; - power-domains = <0x60 0x22>; - ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; - reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; - reg-names = "pcie-apb\0pcie-dbi"; - resets = <0x02 0x20e 0x02 0x21d>; - reset-names = "pcie\0periph"; - rockchip,pipe-grf = <0x76>; + rkcif-mipi-lvds1 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; status = "disabled"; - reset-gpios = <0x10d 0x08 0x00>; - vpcie3v3-supply = <0x1ba>; - phandle = <0x486>; + phandle = <0x53>; + }; - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0xff 0x01>; - phandle = <0x1b9>; - }; + av1d@fdc70000 { + power-domains = <0x60 0x17>; + iommus = <0xce>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + reg-names = "vcd\0cache\0afbc"; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + compatible = "rockchip,av1-decoder"; + status = "okay"; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + phandle = <0x276>; + reset-names = "video_a\0video_h"; }; - pcie@fe170000 { - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - #address-cells = <0x03>; - #size-cells = <0x02>; - bus-range = <0x20 0x2f>; - clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - device_type = "pci"; - interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - #interrupt-cells = <0x01>; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; - linux,pci-domain = <0x02>; - num-ib-windows = <0x08>; - num-ob-windows = <0x08>; - num-viewport = <0x04>; - max-link-speed = <0x02>; - msi-map = <0x2000 0x106 0x2000 0x1000>; - num-lanes = <0x01>; - phys = <0x1bc 0x02>; - phy-names = "pcie-phy"; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; - reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; - reg-names = "pcie-apb\0pcie-dbi"; - resets = <0x02 0x20f 0x02 0x21e>; - reset-names = "pcie\0periph"; - rockchip,pipe-grf = <0x76>; + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + vcc-hub-reset-regulator { + regulator-boot-on; + gpio = <0x182 0x04 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub_reset"; + compatible = "regulator-fixed"; status = "disabled"; - phandle = <0x487>; + phandle = <0x4a0>; + }; - legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - interrupt-parent = <0x01>; - interrupts = <0x00 0xf0 0x01>; - phandle = <0x1bb>; - }; + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; }; - uio@fe1b0000 { - compatible = "rockchip,uio-gmac"; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - rockchip,ethernet = <0x1bd>; + serial@feb70000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; status = "disabled"; - phandle = <0x488>; + reg = <0x00 0xfeb70000 0x00 0x100>; + phandle = <0x2cc>; + dmas = <0xf1 0x09 0xf1 0x0a>; + reg-shift = <0x02>; }; - ethernet@fe1b0000 { - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - reg = <0x00 0xfe1b0000 0x00 0x10000>; - interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; - interrupt-names = "macirq\0eth_wake_irq"; - rockchip,grf = <0xc8>; - rockchip,php_grf = <0x76>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - resets = <0x02 0x20a>; - reset-names = "stmmaceth"; - power-domains = <0x60 0x21>; - snps,mixed-burst; - snps,tso; - snps,axi-config = <0x1be>; - snps,mtl-rx-config = <0x1bf>; - snps,mtl-tx-config = <0x1c0>; + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; status = "okay"; - phy-mode = "rgmii-rxid"; - clock_in_out = "output"; - snps,reset-gpio = <0x10d 0x02 0x01>; - snps,reset-active-low; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - pinctrl-names = "default"; - pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; - tx_delay = <0x31>; - phy-handle = <0x1c6>; - phandle = <0x1bd>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x489>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x1c6>; - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - snps,rd_osr_lmt = <0x08>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - phandle = <0x1be>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x1bf>; - - queue0 { - }; - }; + rockchip,cif = <0x55>; + phandle = <0x233>; - tx-queues-config { - snps,tx-queues-to-use = <0x01>; - phandle = <0x1c0>; + port { - queue0 { + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; }; }; }; - sata@fe220000 { - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - reg = <0x00 0xfe220000 0x00 0x1000>; - clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x112 0x04>; - interrupt-names = "hostc"; - phys = <0x1bc 0x01>; - phy-names = "sata-phy"; - ports-implemented = <0x01>; + i2c@feca0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x186>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb7 0x02 0xaf>; + interrupts = <0x00 0x145 0x04>; + clocks = <0x02 0x94 0x02 0x8c>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; status = "disabled"; - phandle = <0x48a>; + reg = <0x00 0xfeca0000 0x00 0x1000>; + phandle = <0x2e5>; + reset-names = "i2c\0apb"; }; - phy@fed70000 { - compatible = "rockchip,rk3588-hdptx-phy"; - reg = <0x00 0xfed70000 0x00 0x2000>; - clocks = <0x02 0x2b5 0x02 0x268>; - clock-names = "ref\0apb"; - resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; - reset-names = "apb\0init\0cmn\0lane"; - rockchip,grf = <0x1c7>; - #phy-cells = <0x00>; - status = "disabled"; - phandle = <0x1af>; + vcc-sdcard-pwr-en-regulator { + regulator-boot-on; + gpio = <0xfe 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_sdcard_pwr_en"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a5>; }; - hdmiphy@fed70000 { - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - reg = <0x00 0xfed70000 0x00 0x2000>; - clocks = <0x02 0x2b5 0x02 0x268>; - clock-names = "ref\0apb"; - resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - rockchip,grf = <0x1c7>; - #phy-cells = <0x00>; + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; status = "disabled"; - phandle = <0x1ac>; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x36>; - }; + rockchip,cif = <0x53>; + phandle = <0x230>; }; - phy@fed90000 { - compatible = "rockchip,rk3588-usbdp-phy"; - reg = <0x00 0xfed90000 0x00 0x10000>; - rockchip,u2phy-grf = <0x1c8>; - rockchip,usb-grf = <0x74>; - rockchip,usbdpphy-grf = <0x1c9>; - rockchip,vo-grf = <0xf5>; - clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - status = "okay"; - rockchip,dp-lane-mux = <0x02 0x03>; - phandle = <0x48b>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a5>; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a4>; - }; + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; }; - phy@fee10000 { - compatible = "rockchip,rk3588-naneng-combphy"; - reg = <0x00 0xfee10000 0x00 0x100>; - #phy-cells = <0x01>; - clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + phy@fee00000 { + rockchip,pipe-grf = <0x76>; clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2be>; + assigned-clocks = <0x02 0x2bd>; assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20006 0x02 0x4d7>; - reset-names = "combphy-apb\0combphy"; - rockchip,pipe-grf = <0x76>; - rockchip,pipe-phy-grf = <0x1cb>; - rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; - status = "disabled"; - phandle = <0x1bc>; - }; - - phy@fee80000 { - compatible = "rockchip,rk3588-pcie3-phy"; - reg = <0x00 0xfee80000 0x00 0x20000>; - #phy-cells = <0x00>; - clocks = <0x02 0x188>; - clock-names = "pclk"; - resets = <0x02 0x2000a>; - reset-names = "phy"; - rockchip,pipe-grf = <0x76>; - rockchip,phy-grf = <0x1cc>; - status = "okay"; - rockchip,pcie30-phymode = <0x01>; - phandle = <0x1b7>; - }; - - test-power { + resets = <0x02 0x20005 0x02 0x4d6>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + reset-names = "combphy-apb\0combphy"; }; - vcc12v-dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xb71b00>; - regulator-max-microvolt = <0xb71b00>; - phandle = <0x1cd>; - }; - - vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - vin-supply = <0x1cd>; - phandle = <0x78>; - }; - - vcc5v0-usbdcin { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usbdcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - vin-supply = <0x1cd>; - phandle = <0x48c>; - }; - - vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - vin-supply = <0x1cd>; - phandle = <0x1dd>; - }; - - vcc-1v1-nldo-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x10c8e0>; - regulator-max-microvolt = <0x10c8e0>; - vin-supply = <0x78>; - phandle = <0x15c>; - }; - - chosen { - bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 ro rootwait overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all"; - phandle = <0x48d>; - }; - - cspmu@fd10c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; - phandle = <0x48e>; + can@fea50000 { + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea50000 0x00 0x1000>; + phandle = <0x2a0>; + reset-names = "can\0can-apb"; }; - debug@fd104000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; - phandle = <0x48f>; + pdm@fe4b0000 { + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x139 0x13a>; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + clock-names = "pdm_clk\0pdm_hclk"; + clocks = <0x02 0x29f 0x02 0x29e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x138>; + status = "disabled"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + phandle = <0x29a>; + dmas = <0x7c 0x04>; }; - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x1a7 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0x1ce>; - status = "okay"; - phandle = <0x490>; + rkisp-unite-mmu@fdcb7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp0_mmu\0isp1_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xcf>; }; - minidump { - compatible = "rockchip,minidump"; - smem-region = <0x1cf>; - minidump-region = <0x1d0>; - status = "disabled"; - phandle = <0x491>; + syscon@fd5a6000 { + clocks = <0x72>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + phandle = <0xf5>; }; - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; - cma { - compatible = "shared-dma-pool"; - reusable; - size = <0x00 0x800000>; - linux,cma-default; - reg = <0x00 0x10000000 0x00 0x10000000>; + l2-cache-b0 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x17>; }; - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x37>; + l2-cache-l3 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x15>; }; - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x492>; + cpu@300 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x15>; + i-cache-size = <0x8000>; + reg = <0x300>; + enable-method = "psci"; + phandle = <0x09>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; }; - ramoops@110000 { - compatible = "ramoops"; - reg = <0x00 0x110000 0x00 0xe0000>; - boot-log-size = <0x8000>; - boot-log-count = <0x01>; - console-size = <0x80000>; - pmsg-size = <0x30000>; - ftrace-size = <0x00>; - record-size = <0x14000>; - phandle = <0x493>; + l2-cache-l1 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x13>; }; - minidump-smem@1f0000 { - reg = <0x00 0x1f0000 0x00 0x100>; - no-map; - status = "disabled"; - phandle = <0x1cf>; + cpu@600 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + cpu-supply = <0x1c>; + clocks = <0x0e 0x03>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + dynamic-power-coefficient = <0x12c>; + d-cache-size = <0x10000>; + next-level-cache = <0x1b>; + i-cache-size = <0x10000>; + mem-supply = <0x1c>; + reg = <0x600>; + enable-method = "psci"; + phandle = <0x0c>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x1a>; + i-cache-sets = <0x100>; + #cooling-cells = <0x02>; }; - minidump-mem@c000000 { - reg = <0x00 0xc000000 0x00 0x2000000>; - no-map; - status = "disabled"; - phandle = <0x1d0>; + l2-cache-b3 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x1d>; }; - }; - - pcie-essd { - compatible = "regulator-fixed"; - regulator-name = "pcie_essd"; - regulator-min-microvolt = <0x2625a0>; - regulator-max-microvolt = <0x2625a0>; - enable-active-high; - gpios = <0x181 0x0f 0x00>; - startup-delay-us = <0x1388>; - vin-supply = <0x1cd>; - status = "disabled"; - phandle = <0x1ba>; - }; - pcie-clk1 { - compatible = "regulator-fixed"; - regulator-name = "pcie_clk1"; - regulator-boot-on; - regulator-always-on; - gpios = <0x181 0x15 0x01>; - vin-supply = <0x1cd>; - status = "okay"; - phandle = <0x494>; - }; - - pcie-clk2 { - compatible = "regulator-fixed"; - regulator-name = "pcie_clk2"; - regulator-boot-on; - regulator-always-on; - gpios = <0x181 0x16 0x01>; - status = "okay"; - phandle = <0x495>; - }; + idle-states { + entry-method = "psci"; - pcie-clk3 { - compatible = "regulator-fixed"; - regulator-name = "pcie_clk3"; - regulator-boot-on; - regulator-always-on; - gpios = <0xfe 0x09 0x01>; - status = "okay"; - phandle = <0x496>; - }; + cpu-sleep { + entry-latency-us = <0x64>; + local-timer-stop; + exit-latency-us = <0x78>; + arm,psci-suspend-param = <0x10000>; + compatible = "arm,idle-state"; + phandle = <0x10>; + min-residency-us = <0x3e8>; + }; + }; - leds { - compatible = "gpio-leds"; - status = "okay"; - phandle = <0x497>; + cpu-map { - power { - label = ":power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <0x7b 0x15 0x00>; - status = "disabled"; - phandle = <0x498>; - }; + cluster2 { - user { - label = ":user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <0x182 0x03 0x00>; - phandle = <0x499>; - }; - }; + core1 { + cpu = <0x0d>; + }; - bt-sco { - status = "disabled"; - compatible = "delta,dfbmcs320"; - #sound-dai-cells = <0x01>; - phandle = <0x1d2>; - }; + core0 { + cpu = <0x0c>; + }; + }; - bt-sound { - status = "disabled"; - compatible = "simple-audio-card"; - simple-audio-card,format = "dsp_a"; - simple-audio-card,bitclock-inversion = <0x00>; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,name = "rockchip,bt"; - phandle = <0x49a>; + cluster0 { - simple-audio-card,cpu { - sound-dai = <0x1d1>; - }; + core3 { + cpu = <0x09>; + }; - simple-audio-card,codec { - sound-dai = <0x1d2 0x01>; - }; - }; + core1 { + cpu = <0x07>; + }; - hdmi0-sound { - status = "okay"; - compatible = "rockchip,hdmi"; - rockchip,mclk-fs = <0x80>; - rockchip,card-name = "rockchip-hdmi0"; - rockchip,cpu = <0x1d3>; - rockchip,codec = <0x1d4>; - rockchip,jack-det; - phandle = <0x49b>; - }; + core2 { + cpu = <0x08>; + }; - dp0-sound { - status = "disabled"; - compatible = "rockchip,hdmi"; - rockchip,card-name = "rockchip-dp0"; - rockchip,mclk-fs = <0x200>; - rockchip,cpu = <0x1d5>; - rockchip,codec = <0x1d6 0x01>; - rockchip,jack-det; - phandle = <0x49c>; - }; + core0 { + cpu = <0x06>; + }; + }; - spdif-tx1-dc { - status = "disabled"; - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0x00>; - phandle = <0x1d8>; - }; + cluster1 { - spdif-tx1-sound { - status = "disabled"; - compatible = "simple-audio-card"; - simple-audio-card,mclk-fs = <0x80>; - simple-audio-card,name = "rockchip,spdif-tx1"; - phandle = <0x49d>; + core1 { + cpu = <0x0b>; + }; - simple-audio-card,cpu { - sound-dai = <0x1d7>; + core0 { + cpu = <0x0a>; + }; + }; }; - simple-audio-card,codec { - sound-dai = <0x1d8>; + l3-cache { + cache-size = <0x300000>; + cache-sets = <0x1000>; + compatible = "cache"; + cache-line-size = <0x40>; + phandle = <0x1e>; }; - }; - - adc-keys { - status = "okay"; - compatible = "adc-keys"; - io-channels = <0x1d9 0x01>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <0x1b7740>; - poll-interval = <0x64>; - phandle = <0x49e>; - recovery-key { - label = "F12"; - linux,code = <0x58>; - press-threshold-microvolt = <0x4268>; + cpu@200 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x14>; + i-cache-size = <0x8000>; + reg = <0x200>; + enable-method = "psci"; + phandle = <0x08>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; }; - }; - es8388-sound { - status = "okay"; - compatible = "firefly,multicodecs-card"; - rockchip,card-name = "rockchip-es8388"; - hp-det-gpio = <0x79 0x13 0x00>; - hp-con-gpio = <0x182 0x0b 0x00>; - linein-type = <0x01>; - rockchip,format = "i2s"; - rockchip,mclk-fs = <0x180>; - rockchip,cpu = <0x1da>; - rockchip,codec = <0x1db>; - rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; - pinctrl-names = "default"; - pinctrl-0 = <0x1dc>; - firefly,not-use-dapm; - phandle = <0x49f>; - }; + l2-cache-b1 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x19>; + }; - vcc5v0-host { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - enable-active-high; - gpio = <0x182 0x02 0x00>; - vin-supply = <0x1dd>; - status = "okay"; - phandle = <0x75>; - }; + cpu@500 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x02>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + d-cache-size = <0x10000>; + next-level-cache = <0x19>; + i-cache-size = <0x10000>; + reg = <0x500>; + enable-method = "psci"; + phandle = <0x0b>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x16>; + i-cache-sets = <0x100>; + }; - vcc-hub-reset-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_hub_reset"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - status = "disabled"; - gpio = <0x182 0x04 0x00>; - phandle = <0x4a0>; - }; + cpu@0 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + cpu-supply = <0x12>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + dynamic-power-coefficient = <0x64>; + d-cache-size = <0x8000>; + next-level-cache = <0x11>; + i-cache-size = <0x8000>; + mem-supply = <0x12>; + reg = <0x00>; + enable-method = "psci"; + phandle = <0x06>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + #cooling-cells = <0x02>; + }; - vbus5v0-typec-pwr-en-regulator { - compatible = "regulator-fixed"; - regulator-name = "vbus5v0_typec_pwr_en"; - enable-active-high; - status = "disabled"; - gpio = <0x182 0x0c 0x00>; - phandle = <0x17c>; + l2-cache-l2 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x14>; + }; + + l2-cache-l0 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + cpu@100 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x13>; + i-cache-size = <0x8000>; + reg = <0x100>; + enable-method = "psci"; + phandle = <0x07>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + cpu@400 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + cpu-supply = <0x18>; + clocks = <0x0e 0x02>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + dynamic-power-coefficient = <0x12c>; + d-cache-size = <0x10000>; + next-level-cache = <0x17>; + i-cache-size = <0x10000>; + mem-supply = <0x18>; + reg = <0x400>; + enable-method = "psci"; + phandle = <0x0a>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x16>; + i-cache-sets = <0x100>; + #cooling-cells = <0x02>; + }; + + l2-cache-b2 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x1b>; + }; + + cpu@700 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x03>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + d-cache-size = <0x10000>; + next-level-cache = <0x1d>; + i-cache-size = <0x10000>; + reg = <0x700>; + enable-method = "psci"; + phandle = <0x0d>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x1a>; + i-cache-sets = <0x100>; + }; }; vcc-hub3-reset-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_hub3_reset"; + gpio = <0x182 0x06 0x00>; regulator-always-on; enable-active-high; + regulator-name = "vcc_hub3_reset"; + compatible = "regulator-fixed"; status = "disabled"; - gpio = <0x182 0x06 0x00>; phandle = <0x4a1>; }; - vcc5v0-host3 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host3"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x4c4b40>; - enable-active-high; - gpio = <0x182 0x07 0x00>; - vin-supply = <0x1dd>; + rkispp1-vir0 { + rockchip,hw = <0x5c>; + compatible = "rockchip,rk3588-rkispp-vir"; status = "disabled"; - phandle = <0x4a2>; + phandle = <0x244>; }; - vcc-sata-pwr-en-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sata_pwr_en"; - regulator-boot-on; - regulator-always-on; - enable-active-high; + saradc@fec10000 { + vref-supply = <0x177>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + interrupts = <0x00 0x18e 0x04>; + clocks = <0x02 0x9d 0x02 0x9c>; + #io-channel-cells = <0x01>; + compatible = "rockchip,rk3588-saradc"; status = "okay"; - gpio = <0x182 0x0c 0x00>; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - startup-delay-us = <0x1388>; - vin-supply = <0x1cd>; - phandle = <0x4a3>; + reg = <0x00 0xfec10000 0x00 0x10000>; + phandle = <0x1d9>; + reset-names = "saradc-apb"; }; - vcc-fan-pwr-en-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_fan_pwr_en"; - regulator-boot-on; - regulator-always-on; - enable-active-high; + rkisp0-vir0 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; status = "disabled"; - gpio = <0x182 0x0b 0x00>; - phandle = <0x4a4>; - }; - - vcc-sdcard-pwr-en-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sdcard_pwr_en"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - gpio = <0xfe 0x07 0x00>; - status = "okay"; - phandle = <0x4a5>; - }; - - vcc3v3-pcie30 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - enable-active-high; - gpios = <0x182 0x04 0x00>; - startup-delay-us = <0x1388>; - vin-supply = <0x1cd>; - status = "okay"; - phandle = <0x1b8>; - }; - - pcie30-avdd1v8 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - vin-supply = <0x1de>; - phandle = <0x4a6>; - }; - - pcie30-avdd0v75 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v75"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-max-microvolt = <0xb71b0>; - vin-supply = <0x1df>; - phandle = <0x4a7>; - }; - - hdmi1-sound { - status = "disabled"; - compatible = "rockchip,hdmi"; - rockchip,mclk-fs = <0x80>; - rockchip,card-name = "rockchip-hdmi1"; - rockchip,cpu = <0x1e0>; - rockchip,codec = <0x1e1>; - rockchip,jack-det; - phandle = <0x4a8>; - }; - - dp1-sound { - status = "disabled"; - compatible = "rockchip,hdmi"; - rockchip,card-name = "rockchip,dp1"; - rockchip,mclk-fs = <0x200>; - rockchip,cpu = <0x1e2>; - rockchip,codec = <0x1e3 0x01>; - rockchip,jack-det; - phandle = <0x4a9>; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - clocks = <0x1e4>; - clock-names = "ext_clock"; - uart_rts_gpios = <0xfe 0x02 0x01>; - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; - pinctrl-1 = <0x1e9>; - BT,power_gpio = <0x7b 0x16 0x00>; - BT,wake_gpio = <0x7b 0x15 0x00>; - BT,wake_host_irq = <0x7b 0x00 0x00>; - status = "disabled"; - phandle = <0x4aa>; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - wifi_chip_type = "rtl8822ce"; - pinctrl-names = "default"; - pinctrl-0 = <0x1ea>; - WIFI,host_wake_irq = <0x182 0x0a 0x00>; - status = "okay"; - phandle = <0x4ab>; - }; - - hdmiin-sound { - compatible = "rockchip,hdmi"; - rockchip,mclk-fs = <0x80>; - rockchip,format = "i2s"; - rockchip,bitclock-master = <0x1eb>; - rockchip,frame-master = <0x1eb>; - rockchip,card-name = "rockchip,hdmiin"; - rockchip,cpu = <0x1ec>; - rockchip,codec = <0x1eb 0x00>; - rockchip,jack-det; - phandle = <0x4ac>; - }; - - pwm-fan { - compatible = "pwm-fan"; - #cooling-cells = <0x02>; - fan-supply = <0x78>; - pwms = <0x1ed 0x00 0xc350 0x00>; - cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; - rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; - phandle = <0x4ad>; - }; - - mod-sleep-regulator { - compatible = "regulator-fixed"; - regulator-name = "mod_sleep"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - status = "okay"; - gpio = <0x7b 0x15 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x1ee>; - phandle = <0x4ae>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc-hub-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_hub"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - status = "okay"; - gpio = <0x182 0x01 0x00>; - phandle = <0x4af>; - }; - - vcc-4g-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_4g"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - status = "okay"; - gpio = <0x182 0x00 0x00>; - phandle = <0x4b0>; - }; - - usb-5v { - compatible = "regulator-fixed"; - regulator-name = "usb_5v"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - status = "okay"; - gpio = <0xfe 0x03 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x1ef>; - phandle = <0x4b1>; - }; - - cam0-cam1-switch { - compatible = "regulator-fixed"; - regulator-name = "cam0_cam1_switch"; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - status = "okay"; - enable-active-high; - gpio = <0x181 0x11 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x1f0>; - phandle = <0x4b2>; + phandle = <0x23b>; }; __symbols__ { - spll = "/clocks/spll"; - xin32k = "/clocks/xin32k"; - xin24m = "/clocks/xin24m"; - hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; - aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; - hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; - hclk_usb = "/clocks/hclk_usb@fd7c08a8"; - hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; - aclk_usb = "/clocks/aclk_usb@fd7c08a8"; - hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; - aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; - aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; - hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; - aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; - hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; - aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; - aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; - hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; - aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; - aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; - pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; - aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; - hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; - pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; - pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2c3 = "/i2c@feab0000"; + scmi_shmem = "/sram@10f000/sram@0"; + rkispp0_vir0 = "/rkispp0-vir0"; + qos_jpeg_enc0 = "/qos@fdf66400"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + usb_host1_ohci = "/usb@fc8c0000"; + pwm9 = "/pwm@febe0010"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + qos_usb3_1 = "/qos@fdf3e000"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + hwlock = "/hwspinlock@fe5a0000"; + pcie3x2 = "/pcie@fe160000"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; mclkin_i2s0 = "/clocks/mclkin-i2s0"; - mclkin_i2s1 = "/clocks/mclkin-i2s1"; - mclkin_i2s2 = "/clocks/mclkin-i2s2"; - mclkin_i2s3 = "/clocks/mclkin-i2s3"; - mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; - mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; - mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; - mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; - mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; - cpu_l0 = "/cpus/cpu@0"; - cpu_l1 = "/cpus/cpu@100"; - cpu_l2 = "/cpus/cpu@200"; - cpu_l3 = "/cpus/cpu@300"; - cpu_b0 = "/cpus/cpu@400"; - cpu_b1 = "/cpus/cpu@500"; - cpu_b2 = "/cpus/cpu@600"; - cpu_b3 = "/cpus/cpu@700"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - l2_cache_l0 = "/cpus/l2-cache-l0"; - l2_cache_l1 = "/cpus/l2-cache-l1"; - l2_cache_l2 = "/cpus/l2-cache-l2"; - l2_cache_l3 = "/cpus/l2-cache-l3"; - l2_cache_b0 = "/cpus/l2-cache-b0"; - l2_cache_b1 = "/cpus/l2-cache-b1"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + rkvenc0_mmu = "/iommu@fdbdf000"; + pwm14 = "/pwm@febf0020"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + mipi2_csi2 = "/mipi2-csi2"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + pcie2x1l1 = "/pcie@fe180000"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + optee = "/firmware/optee"; l2_cache_b2 = "/cpus/l2-cache-b2"; - l2_cache_b3 = "/cpus/l2-cache-b3"; - l3_cache = "/cpus/l3-cache"; - cluster0_opp_table = "/cluster0-opp-table"; - cluster1_opp_table = "/cluster1-opp-table"; - cluster2_opp_table = "/cluster2-opp-table"; - arm_pmu = "/arm-pmu"; - csi2_dcphy0 = "/csi2-dcphy0"; - csi2_dcphy1 = "/csi2-dcphy1"; - csi2_dphy0 = "/csi2-dphy0"; - mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; - mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; - csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; - csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + vdpu = "/vdpu@fdb50400"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + thermal_zones = "/thermal-zones"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + qos_iep = "/qos@fdf66000"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + vp1 = "/vop@fdd90000/ports/port@1"; + bigcore1_grf = "/syscon@fd592000"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + cpu_l1 = "/cpus/cpu@100"; + uart8 = "/serial@febb0000"; + rkisp1_vir3 = "/rkisp1-vir3"; + qos_vop_m1 = "/qos@fdf82200"; + pcie_clk2 = "/pcie-clk2"; + cluster2_opp_table = "/cluster2-opp-table"; + usb_grf = "/syscon@fd5ac000"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + jpege0_mmu = "/iommu@fdba0800"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + power_led = "/leds/power"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; csi2_dphy1 = "/csi2-dphy1"; - csi2_dphy2 = "/csi2-dphy2"; - csi2_dphy3 = "/csi2-dphy3"; - csi2_dphy4 = "/csi2-dphy4"; - csi2_dphy5 = "/csi2-dphy5"; - display_subsystem = "/display-subsystem"; - route_dp0 = "/display-subsystem/route/route-dp0"; - route_dsi0 = "/display-subsystem/route/route-dsi0"; - route_dsi1 = "/display-subsystem/route/route-dsi1"; - route_edp0 = "/display-subsystem/route/route-edp0"; + spi2 = "/spi@feb20000"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + vo1_grf = "/syscon@fd5a8000"; + pcie_essd = "/pcie-essd"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + saradc = "/saradc@fec10000"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + dsi1 = "/dsi@fde30000"; + venc_opp_table = "/venc-opp-table"; + qos_isp0_mwo = "/qos@fdf40500"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; route_edp1 = "/display-subsystem/route/route-edp1"; - route_hdmi0 = "/display-subsystem/route/route-hdmi0"; - route_rgb = "/display-subsystem/route/route-rgb"; - route_dp1 = "/display-subsystem/route/route-dp1"; - route_hdmi1 = "/display-subsystem/route/route-hdmi1"; - dmc = "/dmc"; - dmc_opp_table = "/dmc-opp-table"; - scmi = "/firmware/scmi"; - scmi_clk = "/firmware/scmi/protocol@14"; - scmi_reset = "/firmware/scmi/protocol@16"; + hdmi1 = "/hdmi@fdea0000"; + crypto = "/crypto@fe370000"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + dfi = "/dfi@fe060000"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pinctrl = "/pinctrl"; + rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + mailbox1 = "/mailbox@fec70000"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + combphy1_ps = "/phy@fee10000"; + hdptxphy0_grf = "/syscon@fd5e0000"; sdei = "/firmware/sdei"; - optee = "/firmware/optee"; - jpege_ccu = "/jpege-ccu"; - mipi_dcphy1 = "/mipi-dcphy-dummy"; - mipi_dcphy0 = "/mipi-dcphy-dummy"; - mipi0_csi2 = "/mipi0-csi2"; - mipi1_csi2 = "/mipi1-csi2"; - mipi2_csi2 = "/mipi2-csi2"; - mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; - mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; - mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; - mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; - mipi3_csi2 = "/mipi3-csi2"; - mipi4_csi2 = "/mipi4-csi2"; - mipi5_csi2 = "/mipi5-csi2"; - mpp_srv = "/mpp-srv"; - rkcif_dvp = "/rkcif-dvp"; - rkcif_dvp_sditf = "/rkcif-dvp-sditf"; - rkcif_mipi_lvds = "/rkcif-mipi-lvds"; - rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; - rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; - rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; - rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; - rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; - rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; - rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; - cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; - rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; - mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; - rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; - rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; - rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; - rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; - rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; - rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; - rkisp0_vir0 = "/rkisp0-vir0"; - rkisp0_vir1 = "/rkisp0-vir1"; - rkisp0_vir2 = "/rkisp0-vir2"; - isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; - rkisp0_vir3 = "/rkisp0-vir3"; - rkisp1_vir0 = "/rkisp1-vir0"; - rkisp1_vir1 = "/rkisp1-vir1"; - rkisp1_vir2 = "/rkisp1-vir2"; - rkisp1_vir3 = "/rkisp1-vir3"; - rkispp0_vir0 = "/rkispp0-vir0"; - rkispp1_vir0 = "/rkispp1-vir0"; - rkvenc_ccu = "/rkvenc-ccu"; - rkvtunnel = "/rkvtunnel"; - rockchip_suspend = "/rockchip-suspend"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + route_rgb = "/display-subsystem/route/route-rgb"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + i2c1 = "/i2c@fea90000"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + pwm7 = "/pwm@febd0030"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + gmac0 = "/ethernet@fe1b0000"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; rockchip_system_monitor = "/rockchip-system-monitor"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pwm12 = "/pwm@febf0000"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + i2s1_8ch = "/i2s@fe480000"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + vcc_4g = "/vcc-4g-regulator"; + firefly_leds = "/leds"; + jpege3 = "/jpege-core@fdbac000"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + pmu1_grf = "/syscon@fd58a000"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + usbc0 = "/i2c@fec80000/fusb302@22"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + uart6 = "/serial@feb90000"; + rkisp1_vir1 = "/rkisp1-vir1"; + sdhci = "/mmc@fe2e0000"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; - bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; - little_core_thermal = "/thermal-zones/littlecore-thermal"; - center_thermal = "/thermal-zones/center-thermal"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - npu_thermal = "/thermal-zones/npu-thermal"; - scmi_shmem = "/sram@10f000/sram@0"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; gpu = "/gpu@fb000000"; - gpu_opp_table = "/gpu-opp-table"; - usbdrd3_0 = "/usbdrd3_0"; - usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; - dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; - usb_host0_ehci = "/usb@fc800000"; + spi0 = "/spi@feb00000"; + iep = "/iep@fdbb0000"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + spdif_tx5 = "/spdif-tx@fddb8000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; usb_host0_ohci = "/usb@fc840000"; - usb_host1_ehci = "/usb@fc880000"; - usb_host1_ohci = "/usb@fc8c0000"; - mmu600_pcie = "/iommu@fc900000"; - mmu600_php = "/iommu@fcb00000"; - usbhost3_0 = "/usbhost3_0"; - usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; - pmu0_grf = "/syscon@fd588000"; - reboot_mode = "/syscon@fd588000/reboot-mode"; - pmu1_grf = "/syscon@fd58a000"; - sys_grf = "/syscon@fd58c000"; - rgb = "/syscon@fd58c000/rgb"; - rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; - bigcore0_grf = "/syscon@fd590000"; - bigcore1_grf = "/syscon@fd592000"; - litcore_grf = "/syscon@fd594000"; - dsu_grf = "/syscon@fd598000"; - gpu_grf = "/syscon@fd5a0000"; - npu_grf = "/syscon@fd5a2000"; - vop_grf = "/syscon@fd5a4000"; - vo0_grf = "/syscon@fd5a6000"; - vo1_grf = "/syscon@fd5a8000"; - usb_grf = "/syscon@fd5ac000"; - php_grf = "/syscon@fd5b0000"; - mipidphy0_grf = "/syscon@fd5b4000"; - mipidphy1_grf = "/syscon@fd5b5000"; - pipe_phy0_grf = "/syscon@fd5bc000"; - pipe_phy2_grf = "/syscon@fd5c4000"; - usbdpphy0_grf = "/syscon@fd5c8000"; - usb2phy0_grf = "/syscon@fd5d0000"; - u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; - u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; - usb2phy2_grf = "/syscon@fd5d8000"; - u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; - u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; - usb2phy3_grf = "/syscon@fd5dc000"; - u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; - u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; - hdptxphy0_grf = "/syscon@fd5e0000"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; mipidcphy0_grf = "/syscon@fd5e8000"; - mipidcphy1_grf = "/syscon@fd5ec000"; - ioc = "/syscon@fd5f0000"; - cru = "/clock-controller@fd7c0000"; - i2c0 = "/i2c@fd880000"; - vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; - vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; - vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; - hym8563 = "/i2c@fd880000/hym8563@51"; - uart0 = "/serial@fd890000"; - pwm0 = "/pwm@fd8b0000"; - pwm1 = "/pwm@fd8b0010"; - pwm2 = "/pwm@fd8b0020"; - pwm3 = "/pwm@fd8b0030"; - pmu = "/power-management@fd8d8000"; - power = "/power-management@fd8d8000/power-controller"; - rknpu = "/npu@fdab0000"; - npu_opp_table = "/npu-opp-table"; - rknpu_mmu = "/iommu@fdab9000"; - vepu = "/vepu@fdb50000"; - vdpu = "/vdpu@fdb50400"; - vdpu_mmu = "/iommu@fdb50800"; - avsd = "/avsd-plus@fdb51000"; - rga3_core0 = "/rga@fdb60000"; - rga3_0_mmu = "/iommu@fdb60f00"; - rga3_core1 = "/rga@fdb70000"; - rga3_1_mmu = "/iommu@fdb70f00"; - rga2 = "/rga@fdb80000"; - jpegd = "/jpegd@fdb90000"; - jpegd_mmu = "/iommu@fdb90480"; - jpege0 = "/jpege-core@fdba0000"; - jpege0_mmu = "/iommu@fdba0800"; - jpege1 = "/jpege-core@fdba4000"; - jpege1_mmu = "/iommu@fdba4800"; - jpege2 = "/jpege-core@fdba8000"; - jpege2_mmu = "/iommu@fdba8800"; - jpege3 = "/jpege-core@fdbac000"; - jpege3_mmu = "/iommu@fdbac800"; - iep = "/iep@fdbb0000"; - iep_mmu = "/iommu@fdbb0800"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - rkvenc0_mmu = "/iommu@fdbdf000"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - rkvenc1_mmu = "/iommu@fdbef000"; - venc_opp_table = "/venc-opp-table"; - rkvdec_ccu = "/rkvdec-ccu@fdc30000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - rkvdec0_mmu = "/iommu@fdc38700"; - rkvdec1 = "/rkvdec-core@fdc48000"; - rkvdec1_mmu = "/iommu@fdc48700"; - av1d = "/av1d@fdc70000"; - av1d_mmu = "/iommu@fdca0000"; - rkisp_unite = "/rkisp-unite@fdcb0000"; - rkisp0 = "/rkisp@fdcb0000"; - rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; - isp0_mmu = "/iommu@fdcb7f00"; - rkisp1 = "/rkisp@fdcc0000"; - isp1_mmu = "/iommu@fdcc7f00"; - rkispp0 = "/rkispp@fdcd0000"; - fec0_mmu = "/iommu@fdcd0f00"; - rkispp1 = "/rkispp@fdcd8000"; - fec1_mmu = "/iommu@fdcd8f00"; - rkcif = "/rkcif@fdce0000"; - rkcif_mmu = "/iommu@fdce0800"; - mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; - mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; - mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; - mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; - mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; - mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; - vop = "/vop@fdd90000"; - vop_out = "/vop@fdd90000/ports"; - vp0 = "/vop@fdd90000/ports/port@0"; - vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; - vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; - vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; - vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; - vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; - vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; - vp1 = "/vop@fdd90000/ports/port@1"; + pcie30phy = "/phy@fee80000"; + dmc = "/dmc"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + mipidcphy1 = "/phy@fedb0000"; + dp1_sound = "/dp1-sound"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + scmi = "/firmware/scmi"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + l3_cache = "/cpus/l3-cache"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mipi1_csi2 = "/mipi1-csi2"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + usbdp_phy0 = "/phy@fed80000"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + i2s9_8ch = "/i2s@fddfc000"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + i2s2_2ch = "/i2s@fe490000"; + pwm5 = "/pwm@febd0010"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + rkisp0_vir3 = "/rkisp0-vir3"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; - vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; - vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; - vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; - vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; - vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; - vp2 = "/vop@fdd90000/ports/port@2"; - vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; - vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; - vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; - vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; - vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + qos_isp0_mro = "/qos@fdf40400"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + pwm10 = "/pwm@febe0020"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + rktimer = "/timer@feae0000"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + jpege1 = "/jpege-core@fdba4000"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; - vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; - vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; - vp3 = "/vop@fdd90000/ports/port@3"; - vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; - vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; - vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; - vop_mmu = "/iommu@fdd97e00"; - spdif_tx2 = "/spdif-tx@fddb0000"; - i2s4_8ch = "/i2s@fddc0000"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + cpu_b3 = "/cpus/cpu@700"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + dmc_opp_table = "/dmc-opp-table"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + uart4 = "/serial@feb70000"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + dmac2 = "/dma-controller@fed10000"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + qos_gpu_m2 = "/qos@fdf35400"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + cluster0_opp_table = "/cluster0-opp-table"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + otp_id = "/otp@fecc0000/id@7"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + qos_rga3_0 = "/qos@fdf67000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; spdif_tx3 = "/spdif-tx@fdde0000"; - i2s5_8ch = "/i2s@fddf0000"; - i2s9_8ch = "/i2s@fddfc000"; - spdif_rx0 = "/spdif-rx@fde08000"; - dsi0 = "/dsi@fde20000"; - dsi0_in = "/dsi@fde20000/ports/port@0"; - dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; - dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; - dsi1 = "/dsi@fde30000"; - dsi1_in = "/dsi@fde30000/ports/port@0"; - dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; - dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; - hdcp0 = "/hdcp@fde40000"; + rkispp0 = "/rkispp@fdcd0000"; + xin32k = "/clocks/xin32k"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + qos_usb2host_1 = "/qos@fdf3e600"; + bt_sco = "/bt-sco"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + adc_keys = "/adc-keys"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; dp0 = "/dp@fde50000"; - dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; - dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; - dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; - dp0_out = "/dp@fde50000/ports/port@1/endpoint"; - hdcp1 = "/hdcp@fde70000"; - hdmi0 = "/hdmi@fde80000"; - hdmi0_in = "/hdmi@fde80000/ports/port@0"; - hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; - hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; - hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + syssram = "/sram@ff001000"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + qos_hdmirx = "/qos@fdf81200"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + hw_decompress = "/decompress@fea80000"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + rkvenc1_mmu = "/iommu@fdbef000"; edp0 = "/edp@fdec0000"; - edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; - edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; - edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + rkvenc_ccu = "/rkvenc-ccu"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + power = "/power-management@fd8d8000/power-controller"; + vad = "/vad@fe4d0000"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + pwm3 = "/pwm@fd8b0030"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + rkcif_mmu = "/iommu@fdce0800"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + sata2 = "/sata@fe230000"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + hdmiin_sound = "/hdmiin-sound"; + rkisp0_vir1 = "/rkisp0-vir1"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + qos_hdcp1 = "/qos@fdf81000"; + scmi_reset = "/firmware/scmi/protocol@16"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; - qos_gpu_m0 = "/qos@fdf35000"; - qos_gpu_m1 = "/qos@fdf35200"; - qos_gpu_m2 = "/qos@fdf35400"; - qos_gpu_m3 = "/qos@fdf35600"; - qos_rga3_1 = "/qos@fdf36000"; - qos_sdio = "/qos@fdf39000"; - qos_sdmmc = "/qos@fdf3d800"; - qos_usb3_1 = "/qos@fdf3e000"; - qos_usb3_0 = "/qos@fdf3e200"; - qos_usb2host_0 = "/qos@fdf3e400"; - qos_usb2host_1 = "/qos@fdf3e600"; - qos_fisheye0 = "/qos@fdf40000"; - qos_fisheye1 = "/qos@fdf40200"; - qos_isp0_mro = "/qos@fdf40400"; - qos_isp0_mwo = "/qos@fdf40500"; - qos_vicap_m0 = "/qos@fdf40600"; - qos_vicap_m1 = "/qos@fdf40800"; - qos_isp1_mwo = "/qos@fdf41000"; - qos_isp1_mro = "/qos@fdf41100"; - qos_rkvenc0_m0ro = "/qos@fdf60000"; - qos_rkvenc0_m1ro = "/qos@fdf60200"; - qos_rkvenc0_m2wo = "/qos@fdf60400"; - qos_rkvenc1_m0ro = "/qos@fdf61000"; + rkisp0 = "/rkisp@fdcb0000"; + dsu_grf = "/syscon@fd598000"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + csi2_dcphy0 = "/csi2-dcphy0"; + usb2phy0_grf = "/syscon@fd5d0000"; + scmi_clk = "/firmware/scmi/protocol@14"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + jpege1_mmu = "/iommu@fdba4800"; qos_rkvenc1_m1ro = "/qos@fdf61200"; - qos_rkvenc1_m2wo = "/qos@fdf61400"; - qos_rkvdec0 = "/qos@fdf62000"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + vcc5v0_host = "/vcc5v0-host"; + cru = "/clock-controller@fd7c0000"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + cpu_b1 = "/cpus/cpu@500"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + rknpu_mmu = "/iommu@fdab9000"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + qos_isp1_mwo = "/qos@fdf41000"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + rga3_0_mmu = "/iommu@fdb60f00"; + uart2 = "/serial@feb50000"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + fec0_mmu = "/iommu@fdcd0f00"; + mipi0_csi2 = "/mipi0-csi2"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; qos_rkvdec1 = "/qos@fdf63000"; + dmac0 = "/dma-controller@fea10000"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + qos_gpu_m0 = "/qos@fdf35000"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; qos_av1 = "/qos@fdf64000"; - qos_iep = "/qos@fdf66000"; - qos_jpeg_dec = "/qos@fdf66200"; - qos_jpeg_enc0 = "/qos@fdf66400"; - qos_jpeg_enc1 = "/qos@fdf66600"; - qos_jpeg_enc2 = "/qos@fdf66800"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + jpegd_mmu = "/iommu@fdb90480"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + otp = "/otp@fecc0000"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; qos_jpeg_enc3 = "/qos@fdf66a00"; - qos_rga2_mro = "/qos@fdf66c00"; - qos_rga2_mwo = "/qos@fdf66e00"; - qos_rga3_0 = "/qos@fdf67000"; - qos_vdpu = "/qos@fdf67200"; - qos_npu1 = "/qos@fdf70000"; - qos_npu2 = "/qos@fdf71000"; - qos_npu0_mwr = "/qos@fdf72000"; - qos_npu0_mro = "/qos@fdf72200"; - qos_mcu_npu = "/qos@fdf72400"; - qos_hdcp0 = "/qos@fdf80000"; - qos_hdcp1 = "/qos@fdf81000"; - qos_hdmirx = "/qos@fdf81200"; - qos_vop_m0 = "/qos@fdf82000"; - qos_vop_m1 = "/qos@fdf82200"; - dfi = "/dfi@fe060000"; - pcie2x1l1 = "/pcie@fe180000"; - pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; - pcie2x1l2 = "/pcie@fe190000"; - pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; - gmac_uio1 = "/uio@fe1c0000"; - gmac1 = "/ethernet@fe1c0000"; - mdio1 = "/ethernet@fe1c0000/mdio"; - rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; - gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; - gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; - gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; - sata0 = "/sata@fe210000"; - sata2 = "/sata@fe230000"; - sfc = "/spi@fe2b0000"; - sdmmc = "/mmc@fe2c0000"; - sdio = "/mmc@fe2d0000"; - sdhci = "/mmc@fe2e0000"; - crypto = "/crypto@fe370000"; - rng = "/rng@fe378000"; - i2s0_8ch = "/i2s@fe470000"; - i2s1_8ch = "/i2s@fe480000"; - i2s2_2ch = "/i2s@fe490000"; - i2s3_2ch = "/i2s@fe4a0000"; - pdm0 = "/pdm@fe4b0000"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; pdm1 = "/pdm@fe4c0000"; - vad = "/vad@fe4d0000"; - spdif_tx0 = "/spdif-tx@fe4e0000"; - spdif_tx1 = "/spdif-tx@fe4f0000"; - acdcdig_dsm = "/codec-digital@fe500000"; - hwlock = "/hwspinlock@fe5a0000"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + qos_vicap_m0 = "/qos@fdf40600"; gic = "/interrupt-controller@fe600000"; - its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; - its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; - dmac0 = "/dma-controller@fea10000"; - dmac1 = "/dma-controller@fea30000"; - can0 = "/can@fea50000"; - can1 = "/can@fea60000"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + hdptxphy1 = "/phy@fed70000"; + route_dp1 = "/display-subsystem/route/route-dp1"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + usbdrd3_1 = "/usbdrd3_1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + pwm1 = "/pwm@fd8b0010"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; + sata0 = "/sata@fe210000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; can2 = "/can@fea70000"; - hw_decompress = "/decompress@fea80000"; - i2c1 = "/i2c@fea90000"; - vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; - vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; - i2c2 = "/i2c@feaa0000"; - i2c3 = "/i2c@feab0000"; - pca9555 = "/i2c@feab0000/gpio@21"; - i2c4 = "/i2c@feac0000"; - i2c5 = "/i2c@fead0000"; - rktimer = "/timer@feae0000"; - wdt = "/watchdog@feaf0000"; - spi0 = "/spi@feb00000"; - spi1 = "/spi@feb10000"; - spi2 = "/spi@feb20000"; - rk806single = "/spi@feb20000/rk806single@0"; - pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; - rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; - rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + spll = "/clocks/spll"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + sata_pins = "/pinctrl/sata/sata-pins"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + qos_npu1 = "/qos@fdf70000"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; - rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; - rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; - rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; - rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; - rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; - rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; - rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; - rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; - rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; - rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; - rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; - rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; - rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; - vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; - vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; - vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; - vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; - vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; - vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; - vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; - avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; - vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; - avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; - vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; - vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; - pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; - vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; - vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; - avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; - vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; - vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; - spi3 = "/spi@feb30000"; - uart1 = "/serial@feb40000"; - uart2 = "/serial@feb50000"; - uart3 = "/serial@feb60000"; - uart4 = "/serial@feb70000"; - uart5 = "/serial@feb80000"; - uart6 = "/serial@feb90000"; - uart7 = "/serial@feba0000"; - uart8 = "/serial@febb0000"; - uart9 = "/serial@febc0000"; - pwm4 = "/pwm@febd0000"; - pwm5 = "/pwm@febd0010"; - pwm6 = "/pwm@febd0020"; - pwm7 = "/pwm@febd0030"; - pwm8 = "/pwm@febe0000"; - pwm9 = "/pwm@febe0010"; - pwm10 = "/pwm@febe0020"; - pwm11 = "/pwm@febe0030"; - pwm12 = "/pwm@febf0000"; - pwm13 = "/pwm@febf0010"; - pwm14 = "/pwm@febf0020"; - pwm15 = "/pwm@febf0030"; - tsadc = "/tsadc@fec00000"; - saradc = "/saradc@fec10000"; - mailbox0 = "/mailbox@fec60000"; - mailbox1 = "/mailbox@fec70000"; - i2c6 = "/i2c@fec80000"; + pipe_phy0_grf = "/syscon@fd5bc000"; es8388 = "/i2c@fec80000/es8388@11"; - usbc0 = "/i2c@fec80000/fusb302@22"; - usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; - usb_con = "/i2c@fec80000/fusb302@22/connector"; - usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; - dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; - XC7160 = "/i2c@fec80000/XC7160b@1b"; - xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; - imx415 = "/i2c@fec80000/imx415@37"; - imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; - i2c7 = "/i2c@fec90000"; - i2c8 = "/i2c@feca0000"; - spi4 = "/spi@fecb0000"; - otp = "/otp@fecc0000"; - cpu_code = "/otp@fecc0000/cpu-code@2"; - package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; - package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; - specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; - otp_id = "/otp@fecc0000/id@7"; - otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; - cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; - cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; - cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; - log_leakage = "/otp@fecc0000/log-leakage@1a"; - gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; - npu_leakage = "/otp@fecc0000/npu-leakage@28"; - codec_leakage = "/otp@fecc0000/codec-leakage@29"; - cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; - cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; - cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; - gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; - npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; - dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; - vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; - venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; - mailbox2 = "/mailbox@fece0000"; - dmac2 = "/dma-controller@fed10000"; - hdptxphy0 = "/phy@fed60000"; - hdptxphy_hdmi0 = "/hdmiphy@fed60000"; - hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; - usbdp_phy0 = "/phy@fed80000"; - usbdp_phy0_dp = "/phy@fed80000/dp-port"; - usbdp_phy0_u3 = "/phy@fed80000/u3-port"; - usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; - usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; - mipidcphy0 = "/phy@feda0000"; - mipidcphy1 = "/phy@fedb0000"; - csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; - csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; - combphy0_ps = "/phy@fee00000"; - combphy2_psu = "/phy@fee20000"; - syssram = "/sram@ff001000"; - rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; - rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - gpio1 = "/pinctrl/gpio@fec20000"; - gpio2 = "/pinctrl/gpio@fec30000"; + spdif_rx2 = "/spdif-rx@fde18000"; + usb_host1_ehci = "/usb@fc880000"; + xin24m = "/clocks/xin24m"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + acdcdig_dsm = "/codec-digital@fe500000"; + vop_grf = "/syscon@fd5a4000"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + i2s6_8ch = "/i2s@fddf4000"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + mipidphy0_grf = "/syscon@fd5b4000"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + csi2_dphy4 = "/csi2-dphy4"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + qos_sdio = "/qos@fdf39000"; + tsadc = "/tsadc@fec00000"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + mdio1 = "/ethernet@fe1c0000/mdio"; gpio3 = "/pinctrl/gpio@fec40000"; - gpio4 = "/pinctrl/gpio@fec50000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; - pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; - pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; - pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; - pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; - pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; - pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; - pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; - pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; - pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; - pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; - pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + gpu_opp_table = "/gpu-opp-table"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + vdpu_mmu = "/iommu@fdb50800"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + combphy0_ps = "/phy@fee00000"; + rgb = "/syscon@fd58c000/rgb"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + uart0 = "/serial@fd890000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; - pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; - pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; - pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; - pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; - pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; - pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; - pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; - pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; - pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; - pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; - pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; - pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; - pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; - pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; - pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; - pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; - pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; - pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; - pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; - auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + qos_rga2_mwo = "/qos@fdf66e00"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; - can0m0_pins = "/pinctrl/can0/can0m0-pins"; - can0m1_pins = "/pinctrl/can0/can0m1-pins"; - can1m0_pins = "/pinctrl/can1/can1m0-pins"; - can1m1_pins = "/pinctrl/can1/can1m1-pins"; - can2m0_pins = "/pinctrl/can2/can2m0-pins"; - can2m1_pins = "/pinctrl/can2/can2m1-pins"; - cif_clk = "/pinctrl/cif/cif-clk"; - cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; - cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; - cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; - clk32k_in = "/pinctrl/clk32k/clk32k-in"; - clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; - clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; - cpu_pins = "/pinctrl/cpu/cpu-pins"; - ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; - ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; - ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; - ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; - dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; - dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; - dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; - dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; - dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; - dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; - eth1_pins = "/pinctrl/eth1/eth1-pins"; - fspim0_pins = "/pinctrl/fspi/fspim0-pins"; - fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; - fspim2_pins = "/pinctrl/fspi/fspim2-pins"; - fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; - fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + qos_fisheye0 = "/qos@fdf40000"; + i2c4 = "/i2c@feac0000"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + qos_jpeg_enc1 = "/qos@fdf66600"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s3_2ch = "/i2s@fe4a0000"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; - gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; - gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; - gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; - gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; - gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; - gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; - gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; - gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; - gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; - gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; - gpu_pins = "/pinctrl/gpu/gpu-pins"; - hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; - hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; - hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; - hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; - hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; - hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; - hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; - hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; - hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; - hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; - hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; - hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; - hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; - hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; - hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; - hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; - hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; - hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; - hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; - hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; - hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; - hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; - hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; - hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; - hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; - hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; - hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; - hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; - hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; - hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; - hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; - hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; - hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; - hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; - hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; - hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; - hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; - hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; - hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; - hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; - i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; - i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; - i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; - i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; - i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; - i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; - i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; - i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; - i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; - i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; - i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; - i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; - i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; - i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; - i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; - i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; - i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; - i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; - i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; - i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; - i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; - i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; - i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; - i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; - i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; - i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; - i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; - i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; - i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + qos_isp1_mro = "/qos@fdf41100"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_jpeg_dec = "/qos@fdf66200"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + isp0_mmu = "/iommu@fdcb7f00"; + qos_npu0_mwr = "/qos@fdf72000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + pwm15 = "/pwm@febf0030"; + vop_mmu = "/iommu@fdd97e00"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + pcie2x1l2 = "/pcie@fe190000"; i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; - i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; - i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; - i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; - i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; - i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; - i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + iep_mmu = "/iommu@fdbb0800"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + can0 = "/can@fea50000"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + arm_pmu = "/arm-pmu"; + vp2 = "/vop@fdd90000/ports/port@2"; + rk806single = "/spi@feb20000/rk806single@0"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; + rng = "/rng@fe378000"; + cpu_l2 = "/cpus/cpu@200"; + uart9 = "/serial@febc0000"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + usbdpphy0_grf = "/syscon@fd5c8000"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + pcie_clk3 = "/pcie-clk3"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + rkcif = "/rkcif@fdce0000"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + spdif_rx0 = "/spdif-rx@fde08000"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + csi2_dphy2 = "/csi2-dphy2"; + spi3 = "/spi@feb30000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + gpio1 = "/pinctrl/gpio@fec20000"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + vcc5v0_sys = "/vcc5v0-sys"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; - i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; - i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; - i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; - i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; - i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; - i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; - i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; - i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; - i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; - i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; - i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; - i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; - i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; - i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; - i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; - i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; - i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; - i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; - i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; - i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; - i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; - i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; - i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; - i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + wdt = "/watchdog@feaf0000"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + cspmu = "/cspmu@fd10c000"; + gmac_uio0 = "/uio@fe1b0000"; + av1d_mmu = "/iommu@fdca0000"; + mailbox2 = "/mailbox@fece0000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + rga3_core0 = "/rga@fdb60000"; i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; - i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; - i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; - i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; - i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; - i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; - i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + i2c2 = "/i2c@feaa0000"; + npu_grf = "/syscon@fd5a2000"; i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; - i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; - i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; - i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; - i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; - i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; - i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; - i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; - i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; - i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; - i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; - i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; - i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; - i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; - i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; - i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; - i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; - i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; - i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; - i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; - i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; - i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; - i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; - i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; - i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; - i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; - jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; - jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; - jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; - litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; - mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + mipi5_csi2 = "/mipi5-csi2"; + pwm8 = "/pwm@febe0000"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + rga2 = "/rga@fdb80000"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + qos_usb3_0 = "/qos@fdf3e200"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; mcum1_pins = "/pinctrl/mcu/mcum1-pins"; - mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; - mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; - mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; - mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; - mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; - mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; - mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; - mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; - mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; - mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; - mipi_te0 = "/pinctrl/mipi/mipi-te0"; - mipi_te1 = "/pinctrl/mipi/mipi-te1"; - npu_pins = "/pinctrl/npu/npu-pins"; - pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; - pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; - pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; - pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; - pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; - pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; - pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; - pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; - pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; - pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; - pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; - pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; - pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; - pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; - pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; - pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; - pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; - pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; - pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; - pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + usb_host0_ehci = "/usb@fc800000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + gmac1 = "/ethernet@fe1c0000"; + i2s10_8ch = "/i2s@fde00000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + usb2phy1_grf = "/syscon@fd5d4000"; pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; - pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; - pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; - pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; - pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; - pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; - pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; - pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; - pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; - pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; - pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; - pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; - pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; - pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + jpege2_mmu = "/iommu@fdba8800"; + pwm13 = "/pwm@febf0010"; + pcie2x1l0 = "/pcie@fe170000"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + qos_rga2_mro = "/qos@fdf66c00"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + pca9555 = "/i2c@feab0000/gpio@21"; + qos_sdmmc = "/qos@fdf3d800"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + rknpu = "/npu@fdab0000"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + vp0 = "/vop@fdd90000/ports/port@0"; + rga3_1_mmu = "/iommu@fdb70f00"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + cpu_l0 = "/cpus/cpu@0"; + uart7 = "/serial@feba0000"; + rkisp1_vir2 = "/rkisp1-vir2"; + fec1_mmu = "/iommu@fdcd8f00"; + qos_vop_m0 = "/qos@fdf82000"; + pcie_clk1 = "/pcie-clk1"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + hdmi0_sound = "/hdmi0-sound"; + ioc = "/syscon@fd5f0000"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + avsd = "/avsd-plus@fdb51000"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + sfc = "/spi@fe2b0000"; + csi2_dphy0 = "/csi2-dphy0"; + spi1 = "/spi@feb10000"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + gpu_grf = "/syscon@fd5a0000"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + wireless_bluetooth = "/wireless-bluetooth"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + bt_sound = "/bt-sound"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + dsi0 = "/dsi@fde20000"; pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; - pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; - pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; - pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; - pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; - pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + route_edp0 = "/display-subsystem/route/route-edp0"; + hdmi0 = "/hdmi@fde80000"; + es8388_sound = "/es8388-sound"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + vop_out = "/vop@fdd90000/ports"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + usbdp_phy1 = "/phy@fed90000"; + mailbox0 = "/mailbox@fec60000"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + sdmmc = "/mmc@fe2c0000"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + i2c0 = "/i2c@fd880000"; pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; - pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; - pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; - pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; - pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; - pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; - pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; - pmic_pins = "/pinctrl/pmic/pmic-pins"; - pmu_pins = "/pinctrl/pmu/pmu-pins"; - pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; - pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; - pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; - pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; - pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; - pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; - pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; - pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; - pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; - pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; - pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; - pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; - pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; - pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; - pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; - pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; - pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; - pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; - pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; - pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; - pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; - pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; - pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; - pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; - pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; - pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; - pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; - pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + soc_thermal = "/thermal-zones/soc-thermal"; + cluster1_opp_table = "/cluster1-opp-table"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; - pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; - pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; - pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; - pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; - pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; - pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; - pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; - pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; - pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; - pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; - pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; - pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; - pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; - pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; - pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; - pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; - pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; - pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; - pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pwm6 = "/pwm@febd0020"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + hym8563 = "/i2c@fd880000/hym8563@51"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + qos_mcu_npu = "/qos@fdf72400"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; - pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; - refclk_pins = "/pinctrl/refclk/refclk-pins"; - sata_pins = "/pinctrl/sata/sata-pins"; - sata_reset = "/pinctrl/sata/sata-reset"; - sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; - sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; - sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; - sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; - sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; - sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + pipe_phy1_grf = "/syscon@fd5c0000"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm11 = "/pwm@febe0030"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + i2s7_8ch = "/i2s@fddf8000"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + mipidphy1_grf = "/syscon@fd5b5000"; + usbhost3_0 = "/usbhost3_0"; + jpege2 = "/jpege-core@fdba8000"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + av1d = "/av1d@fdc70000"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; - sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; - spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; - spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; - spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; - spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; - spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; - spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; - spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + rockchip_suspend = "/rockchip-suspend"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + npu_thermal = "/thermal-zones/npu-thermal"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + uart5 = "/serial@feb80000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + rkisp1_vir0 = "/rkisp1-vir0"; + fiq_debugger = "/fiq-debugger"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; - spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; - spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; - spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; - spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; - spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; - spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; - spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; - spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; - spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; - spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; - spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; - spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; - spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; - spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; - spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; - spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; - spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; - spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + sdio = "/mmc@fe2d0000"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + qos_gpu_m3 = "/qos@fdf35600"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + user_led = "/leds/user"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; - spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; - spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; - spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; - spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; - spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; - spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; - spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; - spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; - spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; - spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; - spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; - spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; - spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; - spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; - spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; - spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; - spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; - spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; - spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; - spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; - spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; - spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; - spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; - spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; - spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; - spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; - spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; - spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; - tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; - tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; - tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; - uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; - uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; - uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + qos_rga3_1 = "/qos@fdf36000"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + spdif_tx4 = "/spdif-tx@fdde8000"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + rkispp1 = "/rkispp@fdcd8000"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + mipi4_csi2 = "/mipi4-csi2"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + vcc5v0_host3 = "/vcc5v0-host3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + dp1 = "/dp@fde60000"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + vop_pins = "/pinctrl/vop/vop-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + vcc_hub = "/vcc-hub-regulator"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + mipidcphy0 = "/phy@feda0000"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + vop = "/vop@fdd90000"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + vepu = "/vepu@fdb50000"; + cif_clk = "/pinctrl/cif/cif-clk"; + pcie30_phy_grf = "/syscon@fd5b8000"; + isp1_mmu = "/iommu@fdcc7f00"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + rkvdec1_mmu = "/iommu@fdc48700"; + edp1 = "/edp@fded0000"; + cam0_cam1_switch = "/cam0-cam1-switch"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + center_thermal = "/thermal-zones/center-thermal"; uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; - uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; - uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; - uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; - uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; - uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; - uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; - uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; - uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; - uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; - uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; - uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; - uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; - uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; - uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; - uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; - uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; - uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; - uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; - uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; - uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; - uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; - uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; - uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; - uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; - uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; - uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; - uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; - uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; - uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; - uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; - uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; - uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; - uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; - uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; - uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; - uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; - uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; - uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; - uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; - uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; - uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; - uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; - uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; - uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; - uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; - uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; - uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; - uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; - uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; - uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; - uart8_xfer = "/pinctrl/uart8/uart8-xfer"; - uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; - uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; - uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; - uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; - uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; - uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; - uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; - uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; - uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; - vop_pins = "/pinctrl/vop/vop-pins"; - bt656_pins = "/pinctrl/bt656/bt656-pins"; - tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; - pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; - pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + pwm4 = "/pwm@febd0000"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + rkisp0_vir2 = "/rkisp0-vir2"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + l2_cache_l2 = "/cpus/l2-cache-l2"; pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; - pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; - pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; - pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; - pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; - pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; - pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; - pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; - pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; - pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; - pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; - pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; - pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; - pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; - pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; - pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; - pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; - pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; - pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; - pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; - pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; - pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; - pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; - pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; - pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; - eth0_pins = "/pinctrl/eth0/eth0-pins"; - gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; - gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; - gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; - gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; - gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; - gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; - gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; - gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; - gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; - gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; - hym8563_int = "/pinctrl/hym8563/hym8563-int"; - leds_gpio = "/pinctrl/leds/leds-gpio"; - hp_det = "/pinctrl/headphone/hp-det"; - usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; - usbc0_int = "/pinctrl/usb-typec/usbc0-int"; - hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; - uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; - bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; - bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; - bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; - wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; - wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; - cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; - rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; - rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; - rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; - rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; - rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; - rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; - usbdrd3_1 = "/usbdrd3_1"; - usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; - pcie30_phy_grf = "/syscon@fd5b8000"; - pipe_phy1_grf = "/syscon@fd5c0000"; + qos_vdpu = "/qos@fdf67200"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + rkisp1 = "/rkisp@fdcc0000"; usbdpphy1_grf = "/syscon@fd5cc000"; - usb2phy1_grf = "/syscon@fd5d4000"; - u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; - u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; - hdptxphy1_grf = "/syscon@fd5e4000"; - spdif_tx5 = "/spdif-tx@fddb8000"; - i2s8_8ch = "/i2s@fddc8000"; - spdif_tx4 = "/spdif-tx@fdde8000"; - i2s6_8ch = "/i2s@fddf4000"; - i2s7_8ch = "/i2s@fddf8000"; - i2s10_8ch = "/i2s@fde00000"; - spdif_rx1 = "/spdif-rx@fde10000"; - spdif_rx2 = "/spdif-rx@fde18000"; - dp1 = "/dp@fde60000"; - dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; - dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; - dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; - dp1_out = "/dp@fde60000/ports/port@1/endpoint"; - hdmi1 = "/hdmi@fdea0000"; - hdmi1_in = "/hdmi@fdea0000/ports/port@0"; - hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; - hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; - hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; - edp1 = "/edp@fded0000"; - edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; - edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; - edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; - edp1_out = "/edp@fded0000/ports/port@1/endpoint"; - hdmirx_ctrler = "/hdmirx-controller@fdee0000"; - pcie3x4 = "/pcie@fe150000"; - pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; - pcie3x2 = "/pcie@fe160000"; - pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; - pcie2x1l0 = "/pcie@fe170000"; - pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; - gmac_uio0 = "/uio@fe1b0000"; - gmac0 = "/ethernet@fe1b0000"; - mdio0 = "/ethernet@fe1b0000/mdio"; - rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; - gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; - gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; - gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; - sata1 = "/sata@fe220000"; - hdptxphy1 = "/phy@fed70000"; - hdptxphy_hdmi1 = "/hdmiphy@fed70000"; - hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; - usbdp_phy1 = "/phy@fed90000"; - usbdp_phy1_dp = "/phy@fed90000/dp-port"; - usbdp_phy1_u3 = "/phy@fed90000/u3-port"; - combphy1_ps = "/phy@fee10000"; - pcie30phy = "/phy@fee80000"; - vcc12v_dcin = "/vcc12v-dcin"; - vcc5v0_sys = "/vcc5v0-sys"; - vcc5v0_usbdcin = "/vcc5v0-usbdcin"; - vcc5v0_usb = "/vcc5v0-usb"; - vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + csi2_dcphy1 = "/csi2-dcphy1"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; chosen = "/chosen"; - cspmu = "/cspmu@fd10c000"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + mpp_srv = "/mpp-srv"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; debug = "/debug@fd104000"; - fiq_debugger = "/fiq-debugger"; - minidump = "/minidump"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; - ramoops = "/reserved-memory/ramoops@110000"; - minidump_smem = "/reserved-memory/minidump-smem@1f0000"; - minidump_mem = "/reserved-memory/minidump-mem@c000000"; - pcie_essd = "/pcie-essd"; - pcie_clk1 = "/pcie-clk1"; - pcie_clk2 = "/pcie-clk2"; - pcie_clk3 = "/pcie-clk3"; - firefly_leds = "/leds"; - power_led = "/leds/power"; - user_led = "/leds/user"; - bt_sco = "/bt-sco"; - bt_sound = "/bt-sound"; - hdmi0_sound = "/hdmi0-sound"; - dp0_sound = "/dp0-sound"; + jpege0 = "/jpege-core@fdba0000"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + cpu_b2 = "/cpus/cpu@600"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + bigcore0_grf = "/syscon@fd590000"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + uart3 = "/serial@feb60000"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + dmac1 = "/dma-controller@fea30000"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + qos_gpu_m1 = "/qos@fdf35200"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + spdif_tx2 = "/spdif-tx@fddb0000"; + npu_opp_table = "/npu-opp-table"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + vo0_grf = "/syscon@fd5a6000"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + qos_usb2host_0 = "/qos@fdf3e400"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2c7 = "/i2c@fec90000"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + sata_reset = "/pinctrl/sata/sata-reset"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + qos_vicap_m1 = "/qos@fdf40800"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + usb2phy2_grf = "/syscon@fd5d8000"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + jpege3_mmu = "/iommu@fdbac800"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; spdif_tx1_dc = "/spdif-tx1-dc"; - spdif_tx1_sound = "/spdif-tx1-sound"; - adc_keys = "/adc-keys"; - es8388_sound = "/es8388-sound"; - vcc5v0_host = "/vcc5v0-host"; - vcc_hub_reset = "/vcc-hub-reset-regulator"; - vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; - vcc_hub3_reset = "/vcc-hub3-reset-regulator"; - vcc5v0_host3 = "/vcc5v0-host3"; - vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; - vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; - vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; - vcc3v3_pcie30 = "/vcc3v3-pcie30"; - pcie30_avdd1v8 = "/pcie30-avdd1v8"; - pcie30_avdd0v75 = "/pcie30-avdd0v75"; - hdmi1_sound = "/hdmi1-sound"; - dp1_sound = "/dp1-sound"; - wireless_bluetooth = "/wireless-bluetooth"; - wireless_wlan = "/wireless-wlan"; - hdmiin_sound = "/hdmiin-sound"; - fan = "/pwm-fan"; - mod_sleep = "/mod-sleep-regulator"; - vcc_hub = "/vcc-hub-regulator"; - vcc_4g = "/vcc-4g-regulator"; - usb_5v = "/usb-5v"; - cam0_cam1_switch = "/cam0-cam1-switch"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + php_grf = "/syscon@fd5b0000"; + pwm2 = "/pwm@fd8b0020"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + sata1 = "/sata@fe220000"; + rkispp1_vir0 = "/rkispp1-vir0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + rkisp0_vir0 = "/rkisp0-vir0"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + qos_hdcp0 = "/qos@fdf80000"; + qos_npu0_mro = "/qos@fdf72200"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + display_subsystem = "/display-subsystem"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + qos_npu2 = "/qos@fdf71000"; + i2s0_8ch = "/i2s@fe470000"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + pmu = "/power-management@fd8d8000"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + csi2_dphy5 = "/csi2-dphy5"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + mipi3_csi2 = "/mipi3-csi2"; + pmu0_grf = "/syscon@fd588000"; + fan = "/pwm-fan"; + cpu_b0 = "/cpus/cpu@400"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + mmu600_php = "/iommu@fcb00000"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + hdmi1_sound = "/hdmi1-sound"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + mod_sleep = "/mod-sleep-regulator"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + uart1 = "/serial@feb40000"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + qos_rkvdec0 = "/qos@fdf62000"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + imx415 = "/i2c@fec80000/imx415@37"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + i2s4_8ch = "/i2s@fddc0000"; + ramoops = "/reserved-memory/ramoops@110000"; + dp0_sound = "/dp0-sound"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vcc12v_dcin = "/vcc12v-dcin"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + hdcp0 = "/hdcp@fde40000"; + qos_fisheye1 = "/qos@fdf40200"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + spdif_tx1_sound = "/spdif-tx1-sound"; + qos_jpeg_enc2 = "/qos@fdf66800"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + pdm0 = "/pdm@fe4b0000"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + pcie3x4 = "/pcie@fe150000"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + jpege_ccu = "/jpege-ccu"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + pipe_phy2_grf = "/syscon@fd5c4000"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + usb_5v = "/usb-5v"; + i2s8_8ch = "/i2s@fddc8000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + hdptxphy0 = "/phy@fed60000"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + route_dp0 = "/display-subsystem/route/route-dp0"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + usbdrd3_0 = "/usbdrd3_0"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + pwm0 = "/pwm@fd8b0000"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + can1 = "/can@fea60000"; + rkvtunnel = "/rkvtunnel"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + combphy2_psu = "/phy@fee20000"; + vp3 = "/vop@fdd90000/ports/port@3"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + mmu600_pcie = "/iommu@fc900000"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + cpu_l3 = "/cpus/cpu@300"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + spdif_rx1 = "/spdif-rx@fde10000"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + rkcif_dvp = "/rkcif-dvp"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + wireless_wlan = "/wireless-wlan"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + csi2_dphy3 = "/csi2-dphy3"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + spi4 = "/spi@fecb0000"; + litcore_grf = "/syscon@fd594000"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + sys_grf = "/syscon@fd58c000"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + mdio0 = "/ethernet@fe1b0000/mdio"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + gpio2 = "/pinctrl/gpio@fec30000"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + gmac_uio1 = "/uio@fe1c0000"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + jpegd = "/jpegd@fdb90000"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + rga3_core1 = "/rga@fdb70000"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + vcc5v0_usb = "/vcc5v0-usb"; + minidump = "/minidump"; + }; + + rkvdec-ccu@fdc30000 { + power-domains = <0x60 0x0e>; + rockchip,ccu-mode = <0x01>; + clock-names = "aclk_ccu"; + reg-names = "ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + clocks = <0x02 0x18e>; + compatible = "rockchip,rkv-decoder-v2-ccu"; + status = "okay"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdc30000 0x00 0x100>; + phandle = <0xca>; + reset-names = "video_ccu"; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + iommu@fdb50800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x76 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_vdpu_mmu"; + reg = <0x00 0xfdb50800 0x00 0x40>; + phandle = <0xb7>; + }; + + rga@fdb60000 { + power-domains = <0x60 0x16>; + iommus = <0xb9>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + compatible = "rockchip,rga3_core0"; + status = "okay"; + interrupt-names = "rga3_core0_irq"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + phandle = <0x269>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + vepu@fdb50000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x78 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-encoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_vepu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50000 0x00 0x400>; + phandle = <0x266>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + mipi3-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x227>; + }; + + hdmi0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,card-name = "rockchip-hdmi0"; + compatible = "rockchip,hdmi"; + status = "okay"; + phandle = <0x49b>; + rockchip,mclk-fs = <0x80>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + minidump-smem@1f0000 { + status = "disabled"; + reg = <0x00 0x1f0000 0x00 0x100>; + phandle = <0x1cf>; + no-map; + }; + + minidump-mem@c000000 { + status = "disabled"; + reg = <0x00 0xc000000 0x00 0x2000000>; + phandle = <0x1d0>; + no-map; + }; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reusable; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0xedf00000 0x00 0x2e0000>; + phandle = <0x37>; + }; + + ramoops@110000 { + boot-log-count = <0x01>; + record-size = <0x14000>; + pmsg-size = <0x30000>; + compatible = "ramoops"; + console-size = <0x80000>; + reg = <0x00 0x110000 0x00 0xe0000>; + phandle = <0x493>; + boot-log-size = <0x8000>; + ftrace-size = <0x00>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + }; + + pcie@fe160000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1ba>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x10 0x1f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20e 0x02 0x21d>; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x08 0x00>; + num-lanes = <0x02>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + linux,pci-domain = <0x01>; + phandle = <0x486>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xff 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b9>; + interrupt-controller; + }; + }; + + spdif-tx@fddb8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc6 0x04>; + clocks = <0x02 0x20f 0x02 0x20a>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + phandle = <0x1e2>; + dmas = <0xf1 0x16>; + }; + + pvtm@fdb30000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + + pvtm@4 { + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + clocks = <0x02 0x118>; + reg = <0x04>; + reset-names = "rts\0rst-p"; + }; + }; + + spdif-tx1-dc { + #sound-dai-cells = <0x00>; + compatible = "linux,spdif-dit"; + status = "disabled"; + phandle = <0x1d8>; + }; + + csi2-dphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "okay"; + phys = <0x2f 0x30>; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x32>; + reg = <0x01>; + phandle = <0x184>; + }; + + endpoint@0 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x31>; + reg = <0x00>; + phandle = <0x183>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x33>; + reg = <0x00>; + phandle = <0x4d>; + }; + }; + }; + }; + + rkisp-unite@fdcb0000 { + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp-unite"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + phandle = <0x277>; + }; + + sata@fe230000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + reg = <0x00 0xfe230000 0x00 0x1000>; + phandle = <0x291>; + ports-implemented = <0x01>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + bt-sound { + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49a>; + simple-audio-card,mclk-fs = <0x100>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + iommu@fdb90480 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x82 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpegd_mmu"; + reg = <0x00 0xfdb90480 0x00 0x40>; + phandle = <0xbb>; + }; + + hdcp@fde70000 { + power-domains = <0x60 0x1a>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde70000 0x00 0x80>; + phandle = <0x287>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xd8>; + }; + + spdif-tx@fe4f0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc2 0x04>; + clocks = <0x02 0x47 0x02 0x44>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + phandle = <0x1d7>; + dmas = <0xf1 0x05>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22d>; + }; + + es8388-sound { + pinctrl-names = "default"; + rockchip,cpu = <0x1da>; + pinctrl-0 = <0x1dc>; + rockchip,codec = <0x1db>; + hp-det-gpio = <0x79 0x13 0x00>; + rockchip,card-name = "rockchip-es8388"; + rockchip,format = "i2s"; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + compatible = "firefly,multicodecs-card"; + linein-type = <0x01>; + status = "okay"; + phandle = <0x49f>; + hp-con-gpio = <0x182 0x0b 0x00>; + firefly,not-use-dapm; + rockchip,mclk-fs = <0x180>; + }; + + spi@feb30000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x15d 0x15e 0x15f>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x149 0x04>; + clocks = <0x02 0xa6 0x02 0xa1>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + phandle = <0x2c8>; + dmas = <0xf1 0x11 0xf1 0x12>; + }; + + phy@fee80000 { + rockchip,pipe-grf = <0x76>; + clock-names = "pclk"; + rockchip,pcie30-phymode = <0x01>; + resets = <0x02 0x2000a>; + clocks = <0x02 0x188>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-pcie3-phy"; + status = "okay"; + reg = <0x00 0xfee80000 0x00 0x20000>; + phandle = <0x1b7>; + reset-names = "phy"; + rockchip,phy-grf = <0x1cc>; + }; + + vcc12v-dcin { + regulator-max-microvolt = <0xb71b00>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b00>; + regulator-name = "vcc12v_dcin"; + compatible = "regulator-fixed"; + phandle = <0x1cd>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + i2s@fde00000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x417>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfde00000 0x00 0x1000>; + phandle = <0x47e>; + dmas = <0xf2 0x18>; + reset-names = "rx-m"; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + i2s@fddfc000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x413>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + phandle = <0x27f>; + dmas = <0xf2 0x17>; + reset-names = "rx-m"; + }; + + usbdrd3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + usb-role-switch; + phy_type = "utmi_wide"; + quirk-skip-phy-init; + resets = <0x02 0x2a4>; + interrupts = <0x00 0xdc 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x66 0x67>; + reg = <0x00 0xfc000000 0x00 0x400000>; + phandle = <0x253>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x68>; + reg = <0x00>; + phandle = <0x17d>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x478>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x51>; + phandle = <0x22a>; + }; + + iommu@fdd97e00 { + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "vop_mmu"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + phandle = <0xd6>; + rockchip,disable-device-link-resume; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + i2c@fead0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14d>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb4 0x02 0xac>; + interrupts = <0x00 0x142 0x04>; + clocks = <0x02 0x91 0x02 0x89>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfead0000 0x00 0x1000>; + phandle = <0x2a8>; + reset-names = "i2c\0apb"; + }; + + iommu@fdba4800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7b 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege1_mmu"; + reg = <0x00 0xfdba4800 0x00 0x40>; + phandle = <0xbe>; + }; + + spdif-rx@fde10000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3ff>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde10000 0x00 0x1000>; + phandle = <0x47f>; + dmas = <0x7c 0x16>; + reset-names = "spdifrx-m"; + }; + + npu@fdab0000 { + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + iommus = <0xb2>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + power-domain-names = "npu0\0npu1\0npu2"; + rknpu-supply = <0xb3>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + compatible = "rockchip,rk3588-rknpu"; + status = "okay"; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + mem-supply = <0xb3>; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + phandle = <0x265>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + operating-points-v2 = <0xb1>; + }; + + hdmiphy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "okay"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0xfd>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + dmc-opp-table { + nvmem-cells = <0x44 0x45 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + phandle = <0x41>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,supported-hw; + + opp-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-1068000000 { + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-528000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0x06 0xffff>; + }; + }; + + rkvenc-core@fdbe0000 { + power-domains = <0x60 0x11>; + iommus = <0xc5>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + interrupts = <0x00 0x68 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + phandle = <0x273>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + watchdog@feaf0000 { + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + clocks = <0x02 0x6c 0x02 0x6b>; + compatible = "snps,dw-wdt"; + status = "okay"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + phandle = <0x2aa>; + }; + + syscon@fd5d8000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + phandle = <0x25d>; + + usb2-phy@8000 { + clock-output-names = "usb480m_phy2"; + clock-names = "phyclk"; + resets = <0x02 0xc0049 0x02 0x48a>; + interrupts = <0x00 0x187 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x8000 0x10>; + phandle = <0x69>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6c>; + }; + }; + }; + + cluster0-opp-table { + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,dsu-grf = <0x23>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x1f 0x20 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,opp-shared-dsu; + rockchip,high-temp-max-freq = <0x188940>; + opp-shared; + rockchip,reboot-freq = <0x159b40>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x22>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + phandle = <0x0f>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-1200000000 { + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-hz = <0x00 0x6590fa00>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + }; + + opp-j-1296000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-supported-hw = <0x04 0xffff>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-suspend; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + }; + + vcc-4g-regulator { + regulator-boot-on; + gpio = <0x182 0x00 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_4g"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b0>; + }; + + spi@fecb0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x187 0x188 0x189>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x14a 0x04>; + clocks = <0x02 0xa7 0x02 0xa2>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + phandle = <0x2e6>; + dmas = <0xf2 0x0d 0xf2 0x0e>; + }; + + spdif-rx@fde08000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3fd>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde08000 0x00 0x1000>; + phandle = <0x280>; + dmas = <0x7c 0x15>; + reset-names = "spdifrx-m"; + }; + + mipi3-csi2-hw@fdd40000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x327>; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + clocks = <0x02 0x1d2>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + phandle = <0x4a>; + reset-names = "srst_csihost_p"; + }; + + memory { + device_type = "memory"; + reg = <0x00 0x200000 0x00 0x8200000 0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; + }; + + jpege-core@fdba4000 { + power-domains = <0x60 0x15>; + iommus = <0xbe>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ae>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + interrupts = <0x00 0x7c 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba4000 0x00 0x400>; + phandle = <0x26e>; + reset-names = "video_a\0video_h"; + }; + + wireless-wlan { + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + wifi_chip_type = "rtl8822ce"; + compatible = "wlan-platdata"; + status = "okay"; + phandle = <0x4ab>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x475>; + }; + + dp@fde50000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0xf6>; + reg = <0x00 0xfde50000 0x00 0x4000>; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x38>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe0>; + }; + + endpoint@2 { + remote-endpoint = <0xf8>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe6>; + }; + + endpoint@0 { + remote-endpoint = <0xf7>; + status = "disabled"; + reg = <0x00>; + phandle = <0xda>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + rockchip-system-monitor { + rockchip,thermal-zone = "soc-thermal"; + compatible = "rockchip,system-monitor"; + phandle = <0x247>; + }; + + vcc3v3-pcie30 { + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc3v3_pcie30"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x1b8>; + vin-supply = <0x1cd>; + gpios = <0x182 0x04 0x00>; + }; + + phy@fedb0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + clocks = <0x02 0x109 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x191>; + reg = <0x00 0xfedb0000 0x00 0x10000>; + phandle = <0x30>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + rkvdec-core@fdc38000 { + power-domains = <0x60 0x0e>; + iommus = <0xc9>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + interrupts = <0x00 0x5f 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec0"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xfff00000 0x100000>; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + phandle = <0x274>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcb>; + }; + + minidump { + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + compatible = "rockchip,minidump"; + status = "disabled"; + phandle = <0x491>; }; }; diff --git a/src/vmm/images.rs b/src/vmm/images.rs index 478e6e12..c1314129 100644 --- a/src/vmm/images.rs +++ b/src/vmm/images.rs @@ -35,6 +35,40 @@ fn load_vm_images_from_memory(config: AxVMCrateConfig, vm: VMRef) -> AxResult { // Load DTB image if let Some(buffer) = vm_imags.dtb { + // extern crate fdt_rs; + + // use fdt_rs::base::*; + // use fdt_rs::prelude::*; + // // Initialize the devtree using an &[u8] array. + // let devtree = unsafe { + // // Get the actual size of the device tree after reading its header. + // let size = DevTree::read_totalsize(buffer).unwrap(); + // let buf = &buffer[..size]; + + // // Create the device tree handle + // DevTree::new(buf).unwrap() + // }; + + // let mut node_iter = devtree.nodes(); + // while let Some(node) = node_iter.next().unwrap() { + // warn!("DTB {}", node.name().unwrap()); + // } + + use fdt_parser::Fdt; + + let fdt = Fdt::from_bytes(buffer) + .expect("Failed to parse DTB image, perhaps the DTB is invalid or corrupted"); + + for nodes in fdt.all_nodes() { + warn!("DTB node: {:?}", nodes.name()); + } + + for mem in fdt.memory() { + for region in mem.regions() { + warn!("DTB memory region: {:?}", region); + } + } + load_vm_image_from_memory(buffer, config.kernel.dtb_load_addr.unwrap(), vm.clone()) .expect("Failed to load DTB images"); } From 7f150749065af5b1fc6fdba31f2290a911f1b262 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Thu, 29 May 2025 22:32:16 +0800 Subject: [PATCH 20/62] [feat] introduce dtb parsing during vm config setup --- Boot-on-rk3588.md | 27 +++- Cargo.lock | 45 +++---- Cargo.toml | 22 ++++ .../vms/{rk3588.dts => aio-rk3588-jd4.dts} | 2 +- configs/vms/linux-qemu-aarch64.toml | 20 +-- configs/vms/linux-rk3588-aarch64-smp.toml | 4 +- src/vmm/config.rs | 124 +++++++++++++++++- src/vmm/images.rs | 34 ----- 8 files changed, 201 insertions(+), 77 deletions(-) rename configs/vms/{rk3588.dts => aio-rk3588-jd4.dts} (99%) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 881b5566..9d1db8e7 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -1,3 +1,28 @@ +## Setup TFTP Server + +```bash +sudo apt-get install tftpd-hpa tftp-hpa +sudo chmod 777 /srv/tftp +``` + +judge if TFTP works + +```bash +echo "TFTP Server Test" > /srv/tftp/testfile.txt +tftp localhost +tftp> get testfile.txt +tftp> quit +cat testfile.txt +``` + +You should see `TFTP Server Test` on your screen. + +## Compile device tree + +```bash +dtc -o aio-rk3588-jd4.dtb -O dtb -I dts aio-rk3588-jd4.dts +``` + ## Compile AxVisor * compile @@ -20,7 +45,7 @@ cp axvisor_aarch64-rk3588j.img /srv/tftp/axvisor ```bash # 这是 tftp 服务器所在的主机 ip -setenv serverip 192.168.50.18 +setenv serverip 192.168.50.97 # 这是 rk3588 所在设备的 ip (Firefly Linux 自己 DHCP 拿到的地址) setenv ipaddr 192.168.50.8 # 使用 tftp 加载镜像到指定内存地址并 boot diff --git a/Cargo.lock b/Cargo.lock index 8947f7b0..4a102467 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,10 +117,9 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver", "axerrno", "axfeat", @@ -150,7 +149,6 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_gicv2#eee14941d490719f6689e82f9a87caea6767bdc3" dependencies = [ "tock-registers 0.8.1", ] @@ -167,7 +165,6 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#4dd7e5df7949336a11936c50b99ab1c608871060" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -190,7 +187,6 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -208,7 +204,6 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "allocator", "axerrno", @@ -218,6 +213,13 @@ dependencies = [ "memory_addr", ] +[[package]] +name = "axconfig" +version = "0.1.0" +dependencies = [ + "axconfig-gen-macros", +] + [[package]] name = "axconfig" version = "0.1.0" @@ -251,7 +253,6 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git#8652ce80b2c53310fb7b0f8ac275f2dfcfbb1338" dependencies = [ "axaddrspace", "axdevice_base", @@ -265,7 +266,6 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#28d49f147793997a9db1ebb75a34295cde2a107d" dependencies = [ "axaddrspace", "axerrno", @@ -277,10 +277,9 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver_base", "axdriver_block", "axdriver_pci", @@ -335,7 +334,6 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", "axdriver", @@ -350,7 +348,6 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axdriver", "axdriver_block", @@ -404,14 +401,13 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "aarch64-cpu 10.0.0", "arm-gic-driver", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig", + "axconfig 0.1.0", "axlog", "bitflags 2.9.0", "cfg-if", @@ -453,7 +449,6 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "cfg-if", "crate_interface", @@ -464,10 +459,9 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axerrno", "axhal", "kspin", @@ -480,7 +474,6 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "crate_interface", "lazyinit", @@ -489,10 +482,9 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0", "axdriver", "axfs", "axhal", @@ -509,7 +501,6 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "arceos_api", "axerrno", @@ -521,7 +512,6 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ "axtask", "kspin", @@ -530,9 +520,8 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm#20d52d36d2eeb05edd7240c0e0b0cf17993c38bc" dependencies = [ - "axconfig", + "axconfig 0.1.0", "axhal", "cfg-if", "cpumask", @@ -550,7 +539,6 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git#34fc1067c4e9dddf3e43e7d290bcb5cf4127382e" dependencies = [ "axaddrspace", "axerrno", @@ -563,7 +551,7 @@ name = "axvisor" version = "0.1.0" dependencies = [ "axaddrspace", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm)", "axerrno", "axstd", "axvcpu", @@ -590,7 +578,6 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git#69b48a93cedb031a78f59d6219bd323d12e96a71" dependencies = [ "arm_vcpu", "axaddrspace", @@ -1809,3 +1796,7 @@ dependencies = [ "quote", "syn 2.0.100", ] + +[[patch.unused]] +name = "arm_vgic" +version = "0.0.0" diff --git a/Cargo.toml b/Cargo.toml index d51befc9..304687fe 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -53,3 +53,25 @@ axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = " prettyplease = "0.2" quote = "1.0" syn = "2.0" + + +[patch."https://github.com/arceos-hypervisor/arceos.git".axstd] +path = "crates/arceos/ulib/axstd" +[patch."https://github.com/arceos-hypervisor/arceos.git".axhal] +path = "crates/arceos/modules/axhal" +[patch."https://github.com/arceos-hypervisor/axvm.git".axvm] +path = "crates/axvm" +[patch."https://github.com/arceos-hypervisor/axvcpu.git".axvcpu] +path = "crates/axvcpu" +[patch."https://github.com/arceos-hypervisor/axaddrspace.git".axaddrspace] +path = "crates/axaddrspace" +[patch."https://github.com/arceos-hypervisor/arm_vcpu.git".arm_vcpu] +path = "crates/arm_vcpu" +[patch."https://github.com/arceos-hypervisor/axdevice.git".axdevice] +path = "crates/axdevice" +[patch."https://github.com/arceos-hypervisor/arm_vgic.git".arm_vgic] +path = "crates/arm_vgic" +[patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] +path = "crates/axdevice_crates/axdevice_base" +[patch."https://github.com/arceos-hypervisor/arm_gicv2.git".arm_gicv2] +path = "crates/arm_gicv2" diff --git a/configs/vms/rk3588.dts b/configs/vms/aio-rk3588-jd4.dts similarity index 99% rename from configs/vms/rk3588.dts rename to configs/vms/aio-rk3588-jd4.dts index 9f4eeb7a..bfe760b8 100644 --- a/configs/vms/rk3588.dts +++ b/configs/vms/aio-rk3588-jd4.dts @@ -12971,7 +12971,7 @@ memory { device_type = "memory"; - reg = <0x00 0x200000 0x00 0x8200000 0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; + reg = <0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; }; jpege-core@fdba4000 { diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index 6816883d..3459987f 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -22,11 +22,11 @@ entry_point = 0x8008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "rk3588.dtb" +kernel_path = "Image-5.10.198.bin" # The load address of the kernel image. kernel_load_addr = 0x8008_0000 # The file path of the device tree blob (DTB). -dtb_path = "rk3588.dtb" +dtb_path = "aio-rk3588-jd4.dtb" # The load address of the device tree blob (DTB). dtb_load_addr = 0x8000_0000 @@ -47,7 +47,7 @@ dtb_load_addr = 0x8000_0000 # Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ - [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL + # [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL ] # @@ -56,13 +56,13 @@ memory_regions = [ [devices] # Pass-through devices. passthrough_devices = [ - ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], - ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], - ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], - ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 - # a003200.virtio_mmio virtio_mmio@a003200 - ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], + # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], + # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], + # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], + # # a003000.virtio_mmio virtio_mmio@a003000 + # # a003200.virtio_mmio virtio_mmio@a003200 + # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], ] # Emu_devices. diff --git a/configs/vms/linux-rk3588-aarch64-smp.toml b/configs/vms/linux-rk3588-aarch64-smp.toml index 85feee8b..c7ed47d4 100644 --- a/configs/vms/linux-rk3588-aarch64-smp.toml +++ b/configs/vms/linux-rk3588-aarch64-smp.toml @@ -28,9 +28,9 @@ dtb_load_addr = 0x1000_0000 # load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "Image-5.10.198" +kernel_path = "Image-5.10.198.bin" # The file path of the device tree blob (DTB). -dtb_path = "aio-3588jd4.dtb" +dtb_path = "aio-rk3588-jd4.dtb" # load from file system. # image_location = "fs". diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 32d2e181..64013a18 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -1,4 +1,10 @@ -use axvm::config::{AxVMConfig, AxVMCrateConfig}; +use alloc::string::ToString; +use alloc::vec::Vec; + +use axaddrspace::MappingFlags; +use axvm::config::{ + AxVMConfig, AxVMCrateConfig, PassThroughDeviceConfig, VmMemConfig, VmMemMappingType, +}; use crate::vmm::{VM, images::load_vm_images, vm_list::push_vm}; @@ -22,13 +28,127 @@ pub mod config { include!(concat!(env!("OUT_DIR"), "/vm_configs.rs")); } +pub fn get_vm_dtb(vm_cfg: &AxVMConfig) -> Option<&'static [u8]> { + let vm_imags = config::get_memory_images() + .iter() + .find(|&v| v.id == vm_cfg.id()) + .expect("VM images is missed, Perhaps add `VM_CONFIGS=PATH/CONFIGS/FILE` command."); + vm_imags.dtb +} + +pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { + use fdt_parser::{Fdt, Status}; + + let fdt = Fdt::from_bytes(dtb) + .expect("Failed to parse DTB image, perhaps the DTB is invalid or corrupted"); + + let mut dram_regions = Vec::new(); + for mem in fdt.memory() { + for region in mem.regions() { + if region.size == 0 { + continue; + } + dram_regions.push((region.address as usize, region.size as usize)); + } + } + + for mem in fdt.memory() { + for region in mem.regions() { + // Skip empty regions + if region.size == 0 { + continue; + } + warn!("DTB memory region: {:?}", region); + vm_cfg.add_memory_region(VmMemConfig { + gpa: region.address as usize, + size: region.size as usize, + flags: (MappingFlags::READ | MappingFlags::WRITE | MappingFlags::EXECUTE).bits(), + map_type: VmMemMappingType::MapIentical, + }); + } + } + + for reserved in fdt.reserved_memory() { + warn!("Find reserved memory: {:?}", reserved.name()); + } + + for mem_reserved in fdt.memory_reservation_block() { + warn!("Find memory reservation block: {:?}", mem_reserved); + } + + for node in fdt.all_nodes() { + trace!("DTB node: {:?}", node.name()); + let name = node.name(); + if name == "memory" { + // Skip the memory node, as we handle memory regions separately. + continue; + } + + if let Some(status) = node.status() { + if status == Status::Disabled { + // Skip disabled nodes + warn!("Skipping disabled DTB node: {}", name); + continue; + } + } + + if let Some(regs) = node.reg() { + for reg in regs { + if reg.address < 0x1000 { + // Skip registers with address less than 0x10000. + warn!( + "Skipping DTB node {} with register address {:#x} < 0x10000", + node.name(), + reg.address + ); + continue; + } + + if let Some(size) = reg.size { + let start = reg.address as usize; + let end = start + size as usize; + if vm_cfg.contains_memory_range(&(start..end)) { + warn!( + "Skipping DTB node {} with register address {:#x} and size {:#x} as it overlaps with existing memory regions", + node.name(), + reg.address, + size + ); + continue; + } + + let pt_dev = PassThroughDeviceConfig { + name: node.name().to_string(), + base_gpa: reg.address as _, + base_hpa: reg.address as _, + length: size as _, + irq_id: 0, + }; + info!("Adding {:x?}", pt_dev); + vm_cfg.add_pass_through_device(pt_dev); + } + } + } + } +} + pub fn init_guest_vms() { let gvm_raw_configs = config::static_vm_configs(); for raw_cfg_str in gvm_raw_configs { let vm_create_config = AxVMCrateConfig::from_toml(raw_cfg_str).expect("Failed to resolve VM config"); - let vm_config = AxVMConfig::from(vm_create_config.clone()); + let mut vm_config = AxVMConfig::from(vm_create_config.clone()); + + // Overlay VM config with the given DTB. + if let Some(dtb) = get_vm_dtb(&vm_config) { + parse_vm_dtb(&mut vm_config, dtb); + } else { + warn!( + "VM[{}] DTB not found in memory, skipping...", + vm_config.id() + ); + } info!("Creating VM[{}] {:?}", vm_config.id(), vm_config.name()); diff --git a/src/vmm/images.rs b/src/vmm/images.rs index c1314129..478e6e12 100644 --- a/src/vmm/images.rs +++ b/src/vmm/images.rs @@ -35,40 +35,6 @@ fn load_vm_images_from_memory(config: AxVMCrateConfig, vm: VMRef) -> AxResult { // Load DTB image if let Some(buffer) = vm_imags.dtb { - // extern crate fdt_rs; - - // use fdt_rs::base::*; - // use fdt_rs::prelude::*; - // // Initialize the devtree using an &[u8] array. - // let devtree = unsafe { - // // Get the actual size of the device tree after reading its header. - // let size = DevTree::read_totalsize(buffer).unwrap(); - // let buf = &buffer[..size]; - - // // Create the device tree handle - // DevTree::new(buf).unwrap() - // }; - - // let mut node_iter = devtree.nodes(); - // while let Some(node) = node_iter.next().unwrap() { - // warn!("DTB {}", node.name().unwrap()); - // } - - use fdt_parser::Fdt; - - let fdt = Fdt::from_bytes(buffer) - .expect("Failed to parse DTB image, perhaps the DTB is invalid or corrupted"); - - for nodes in fdt.all_nodes() { - warn!("DTB node: {:?}", nodes.name()); - } - - for mem in fdt.memory() { - for region in mem.regions() { - warn!("DTB memory region: {:?}", region); - } - } - load_vm_image_from_memory(buffer, config.kernel.dtb_load_addr.unwrap(), vm.clone()) .expect("Failed to load DTB images"); } From fc70c4b860d3b0221b8a4387eb15b32185f6f8d9 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Sun, 1 Jun 2025 21:55:37 +0800 Subject: [PATCH 21/62] [wip] data abort @1000a0 --- Boot-on-rk3588.md | 8 +- Makefile | 3 + configs/platforms/aarch64-rk3588j-hv.toml | 9 +- configs/vms/aio-rk3588-jd4.dts | 298 +- configs/vms/linux-rk3588-aarch64-smp.toml | 100 +- configs/vms/rk3588jd4.dts | 13141 ++++++++++++++++++++ scripts/make/rk3588.mk | 13 +- src/hal.rs | 2 +- src/vmm/config.rs | 10 +- 9 files changed, 13202 insertions(+), 382 deletions(-) create mode 100644 configs/vms/rk3588jd4.dts diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 9d1db8e7..6a95b7ad 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -29,11 +29,10 @@ dtc -o aio-rk3588-jd4.dtb -O dtb -I dts aio-rk3588-jd4.dts ```bash make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml defconfig -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml image -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp.toml image +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp.toml LOG=debug GICV3=y upload ``` -* copy to tftp dir +* copy to tftp dir (make xxx upload will copy the image to `/srv/tftp/axvisor` automatically) ```bash cp axvisor_aarch64-rk3588j.img /srv/tftp/axvisor @@ -49,6 +48,7 @@ setenv serverip 192.168.50.97 # 这是 rk3588 所在设备的 ip (Firefly Linux 自己 DHCP 拿到的地址) setenv ipaddr 192.168.50.8 # 使用 tftp 加载镜像到指定内存地址并 boot -tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; +setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; ``` +tftp 0x00480000 ${serverip}:Image.bin;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; diff --git a/Makefile b/Makefile index 3dd0e426..75350f82 100644 --- a/Makefile +++ b/Makefile @@ -187,6 +187,9 @@ gdb: # Temporarily used for building image for the `aarch64-rk3588j` platform. image: build_image +upload: image + $(call upload_image) + clippy: oldconfig ifeq ($(origin ARCH), command line) $(call cargo_clippy,--target $(TARGET)) diff --git a/configs/platforms/aarch64-rk3588j-hv.toml b/configs/platforms/aarch64-rk3588j-hv.toml index de34e4ab..14e0602d 100644 --- a/configs/platforms/aarch64-rk3588j-hv.toml +++ b/configs/platforms/aarch64-rk3588j-hv.toml @@ -32,11 +32,6 @@ kernel-aspace-size = "0x0000_ffff_ffff_f000" [devices] # MMIO regions with format (`base_paddr`, `size`). mmio-regions = [ - # ["0x0900_0000", "0x1000"], # PL011 UART - # ["0x0800_0000", "0x5_0000"], # GICv2 with Virtualization (GICV@0x0803_0000, GICH@0x0804_0000) - # ["0x0a00_0000", "0x4000"], # VirtIO - # ["0x1000_0000", "0x2eff_0000"], # PCI memory ranges (ranges 1: 32-bit MMIO space) - # ["0x40_1000_0000", "0x1000_0000"], # PCI config space [0xfeb50000, 0x1000], # uart8250 UART0 [0xfe600000, 0x10000], # gic-v3 gicd [0xfe680000, 0x100000], # gic-v3 gicr @@ -59,10 +54,10 @@ uart-paddr = 0xfeb5_0000 # uint uart-irq = 0x14d # uint # GICC Address +gicc-paddr = 0xfe610000 # uint +# GICD Address gicd-paddr = 0xfe600000 # uint # GICR Address -gicc-paddr = 0xfe680000 # uint -# GICR Address gicr-paddr = 0xfe680000 # uint # PSCI diff --git a/configs/vms/aio-rk3588-jd4.dts b/configs/vms/aio-rk3588-jd4.dts index bfe760b8..40549136 100644 --- a/configs/vms/aio-rk3588-jd4.dts +++ b/configs/vms/aio-rk3588-jd4.dts @@ -9539,7 +9539,7 @@ chosen { linux,initrd-end = <0x00 0xaac72ae>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; linux,initrd-start = <0x00 0xa200000>; phandle = <0x48d>; }; @@ -10347,306 +10347,70 @@ #address-cells = <0x01>; #size-cells = <0x00>; - l2-cache-b0 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x17>; - }; - - l2-cache-l3 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x15>; - }; - - cpu@300 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a55"; - d-cache-size = <0x8000>; - next-level-cache = <0x15>; - i-cache-size = <0x8000>; - reg = <0x300>; + reg = <0x00>; enable-method = "psci"; - phandle = <0x09>; - d-cache-sets = <0x80>; + clocks = <0x0e 0x00>; + cpu-idle-states = <0x10>; operating-points-v2 = <0x0f>; + capacity-dmips-mhz = <0x212>; + + cpu-supply = <0x12>; + mem-supply = <0x12>; + dynamic-power-coefficient = <0x64>; + + i-cache-line-size = <0x40>; + i-cache-size = <0x8000>; i-cache-sets = <0x80>; + + d-cache-line-size = <0x40>; + d-cache-size = <0x8000>; + d-cache-sets = <0x80>; + + next-level-cache = <0x11>; + #cooling-cells = <0x02>; + phandle = <0x06>; }; - l2-cache-l1 { + l2-cache-l0 { + compatible = "cache"; cache-size = <0x20000>; cache-sets = <0x200>; - compatible = "cache"; cache-line-size = <0x40>; next-level-cache = <0x1e>; - phandle = <0x13>; - }; - - cpu@600 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - cpu-supply = <0x1c>; - clocks = <0x0e 0x03>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - dynamic-power-coefficient = <0x12c>; - d-cache-size = <0x10000>; - next-level-cache = <0x1b>; - i-cache-size = <0x10000>; - mem-supply = <0x1c>; - reg = <0x600>; - enable-method = "psci"; - phandle = <0x0c>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x1a>; - i-cache-sets = <0x100>; - #cooling-cells = <0x02>; + phandle = <0x11>; }; - l2-cache-b3 { - cache-size = <0x80000>; - cache-sets = <0x400>; + l3-cache { compatible = "cache"; + cache-size = <0x300000>; + cache-sets = <0x1000>; cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x1d>; + phandle = <0x1e>; }; idle-states { entry-method = "psci"; cpu-sleep { + compatible = "arm,idle-state"; entry-latency-us = <0x64>; - local-timer-stop; exit-latency-us = <0x78>; + min-residency-us = <0x3e8>; + local-timer-stop; arm,psci-suspend-param = <0x10000>; - compatible = "arm,idle-state"; phandle = <0x10>; - min-residency-us = <0x3e8>; }; }; cpu-map { - - cluster2 { - - core1 { - cpu = <0x0d>; - }; - - core0 { - cpu = <0x0c>; - }; - }; - cluster0 { - - core3 { - cpu = <0x09>; - }; - - core1 { - cpu = <0x07>; - }; - - core2 { - cpu = <0x08>; - }; - core0 { cpu = <0x06>; }; }; - - cluster1 { - - core1 { - cpu = <0x0b>; - }; - - core0 { - cpu = <0x0a>; - }; - }; - }; - - l3-cache { - cache-size = <0x300000>; - cache-sets = <0x1000>; - compatible = "cache"; - cache-line-size = <0x40>; - phandle = <0x1e>; - }; - - cpu@200 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - d-cache-size = <0x8000>; - next-level-cache = <0x14>; - i-cache-size = <0x8000>; - reg = <0x200>; - enable-method = "psci"; - phandle = <0x08>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - }; - - l2-cache-b1 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x19>; - }; - - cpu@500 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x02>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - d-cache-size = <0x10000>; - next-level-cache = <0x19>; - i-cache-size = <0x10000>; - reg = <0x500>; - enable-method = "psci"; - phandle = <0x0b>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x16>; - i-cache-sets = <0x100>; - }; - - cpu@0 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - cpu-supply = <0x12>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - dynamic-power-coefficient = <0x64>; - d-cache-size = <0x8000>; - next-level-cache = <0x11>; - i-cache-size = <0x8000>; - mem-supply = <0x12>; - reg = <0x00>; - enable-method = "psci"; - phandle = <0x06>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - #cooling-cells = <0x02>; - }; - - l2-cache-l2 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x14>; - }; - - l2-cache-l0 { - cache-size = <0x20000>; - cache-sets = <0x200>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x11>; - }; - - cpu@100 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x212>; - clocks = <0x0e 0x00>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a55"; - d-cache-size = <0x8000>; - next-level-cache = <0x13>; - i-cache-size = <0x8000>; - reg = <0x100>; - enable-method = "psci"; - phandle = <0x07>; - d-cache-sets = <0x80>; - operating-points-v2 = <0x0f>; - i-cache-sets = <0x80>; - }; - - cpu@400 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - cpu-supply = <0x18>; - clocks = <0x0e 0x02>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - dynamic-power-coefficient = <0x12c>; - d-cache-size = <0x10000>; - next-level-cache = <0x17>; - i-cache-size = <0x10000>; - mem-supply = <0x18>; - reg = <0x400>; - enable-method = "psci"; - phandle = <0x0a>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x16>; - i-cache-sets = <0x100>; - #cooling-cells = <0x02>; - }; - - l2-cache-b2 { - cache-size = <0x80000>; - cache-sets = <0x400>; - compatible = "cache"; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x1b>; - }; - - cpu@700 { - d-cache-line-size = <0x40>; - capacity-dmips-mhz = <0x400>; - clocks = <0x0e 0x03>; - i-cache-line-size = <0x40>; - cpu-idle-states = <0x10>; - device_type = "cpu"; - compatible = "arm,cortex-a76"; - d-cache-size = <0x10000>; - next-level-cache = <0x1d>; - i-cache-size = <0x10000>; - reg = <0x700>; - enable-method = "psci"; - phandle = <0x0d>; - d-cache-sets = <0x100>; - operating-points-v2 = <0x1a>; - i-cache-sets = <0x100>; }; }; diff --git a/configs/vms/linux-rk3588-aarch64-smp.toml b/configs/vms/linux-rk3588-aarch64-smp.toml index c7ed47d4..b91a14c3 100644 --- a/configs/vms/linux-rk3588-aarch64-smp.toml +++ b/configs/vms/linux-rk3588-aarch64-smp.toml @@ -28,7 +28,7 @@ dtb_load_addr = 0x1000_0000 # load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "Image-5.10.198.bin" +kernel_path = "Image.bin" # The file path of the device tree blob (DTB). dtb_path = "aio-rk3588-jd4.dtb" @@ -50,7 +50,7 @@ dtb_path = "aio-rk3588-jd4.dtb" # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL - [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL + # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL ] @@ -64,98 +64,4 @@ emu_devices = [] # Pass-through devices. # Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [ - [ - "ramoops", - 0x11_0000, - 0x11_0000, - 0xf_0000, - 0x17, - ], - [ - "sram", - 0x10_f000, - 0x10_f000, - 0x1000, - 0x17, - ], - [ - "gpu", - 0xfb00_0000, - 0xfb00_0000, - 0x20_0000, - 0x17, - ], - [ - "uart8250 UART", - 0xfd00_0000, - 0xfd00_0000, - 0x200_0000, - 0x17, - ], - [ - "usb", - 0xfc00_0000, - 0xfc00_0000, - 0x100_0000, - 0x17, - ], - [ - "uncached", - 0x0, - 0x0, - 0x10_f000, - 0x17, - ], - # [ - # "gicr", - # 0xfe68_0000, - # 0xfe68_0000, - # 0x10_0000, - # 0x1, - # ], - # [ - # "uncached", - # 0xf300_0000, - # 0xf300_0000, - # 0x100_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0xf400_0000, - # 0xf400_0000, - # 0x100_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0xa_4100_0000, - # 0xa_4100_0000, - # 0x40_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0xa_40c0_0000, - # 0xa_40c0_0000, - # 0x40_0000, - # 0x17, - # ], - # [ - # "uncached", - # 0x920_0000, - # 0x920_0000, - # 0x20_0000, - # 0x17, - # ], -] - - -# [0xfe600000, 0x10000], # gic-v3 gicd -# [0xfe680000, 0x10_0000], # gic-v3 gicr - - # [0xa41000000, 0x400000], - # [0xa40c00000, 0x400000], - # [0xf4000000,0x1000000], - # [0xf3000000,0x1000000], \ No newline at end of file +passthrough_devices = [] diff --git a/configs/vms/rk3588jd4.dts b/configs/vms/rk3588jd4.dts new file mode 100644 index 00000000..9f4eeb7a --- /dev/null +++ b/configs/vms/rk3588jd4.dts @@ -0,0 +1,13141 @@ +/dts-v1/; + +/ { + #address-cells = <0x02>; + model = "Firefly AIO-3588JD4"; + serial-number = "a0deeea630de3975"; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; + + pcie30-avdd1v8 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pcie30_avdd1v8"; + compatible = "regulator-fixed"; + phandle = <0x4a6>; + vin-supply = <0x1de>; + }; + + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + vcc5v0-host3 { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host3"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a2>; + vin-supply = <0x1dd>; + }; + + pwm@febd0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0030 0x00 0x10>; + phandle = <0x2d4>; + }; + + rkisp@fdcc0000 { + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + phandle = <0x5a>; + }; + + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; + + serial@febb0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebb0000 0x00 0x100>; + phandle = <0x2d0>; + dmas = <0xf2 0x09 0xf2 0x0a>; + reg-shift = <0x02>; + }; + + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; + + csi2-dcphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20e>; + }; + + rkispp0-vir0 { + rockchip,hw = <0x5b>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x243>; + }; + + wireless-bluetooth { + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + clock-names = "ext_clock"; + BT,power_gpio = <0x7b 0x16 0x00>; + clocks = <0x1e4>; + BT,wake_gpio = <0x7b 0x15 0x00>; + uart_rts_gpios = <0xfe 0x02 0x01>; + compatible = "bluetooth-platdata"; + BT,wake_host_irq = <0x7b 0x00 0x00>; + pinctrl-1 = <0x1e9>; + status = "disabled"; + phandle = <0x4aa>; + }; + + pwm@febd0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0020 0x00 0x10>; + phandle = <0x2d3>; + }; + + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; + + cam0-cam1-switch { + regulator-max-microvolt = <0x1b7740>; + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x181 0x11 0x00>; + pinctrl-0 = <0x1f0>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "cam0_cam1_switch"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b2>; + }; + + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; + + mipi2-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "okay"; + firefly-compatible; + phandle = <0x226>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x4d>; + reg = <0x00>; + phandle = <0x33>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x4e>; + reg = <0x00>; + phandle = <0x54>; + }; + }; + }; + }; + + iommu@fdc48700 { + power-domains = <0x60 0x0f>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x62 0x04>; + clocks = <0x02 0x195 0x02 0x194>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec1_mmu"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + phandle = <0xcc>; + rockchip,master-handle-irq; + }; + + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; + + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; + + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; + + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; + + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; + }; + + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; + + uio@fe1c0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + phandle = <0x28e>; + rockchip,ethernet = <0x109>; + }; + + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; + + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; + + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; + }; + + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; + + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; + + eth0 { + + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; + + i2c3 { + + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; + + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; + }; + + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; + + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; + + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; + }; + }; + + pwm9 { + + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; + + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + }; + + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; + }; + + mipi { + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + }; + + pwm14 { + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + }; + + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + wireless-bluetooth { + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + }; + + pcie30x1 { + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + }; + + uart8 { + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + }; + + spi2 { + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; + }; + + pcfg-pull-up-drv-level-15 { + drive-strength = <0x0f>; + phandle = <0x462>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-13 { + drive-strength = <0x0d>; + bias-pull-down; + phandle = <0x469>; + }; + + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; + }; + + i2s1 { + + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; + + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; + + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; + + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; + + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; + + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; + + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; + + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; + + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; + + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; + + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; + + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; + + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; + + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; + + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; + + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; + + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; + + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; + + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; + + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; + + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; + + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; + }; + + ddrphych2 { + + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; + }; + + pcfg-pull-none-drv-level-12 { + drive-strength = <0x0c>; + bias-disable; + phandle = <0x456>; + }; + + i2c1 { + + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; + + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; + + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; + }; + + pwm7 { + + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; + + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; + + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; + + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + }; + + pcfg-pull-none-drv-level-5 { + drive-strength = <0x05>; + bias-disable; + phandle = <0x2f1>; + }; + + gmac0 { + + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; + + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; + }; + + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; + + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; + }; + + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; + + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; + + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; + + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; + + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; + + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + }; + + pwm12 { + + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; + }; + + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; + }; + }; + + usb-typec { + + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; + }; + + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; + }; + }; + + uart6 { + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; + }; + + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; + }; + + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; + }; + + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; + }; + + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; + + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; + + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; + }; + + pcfg-pull-down-drv-level-8 { + drive-strength = <0x08>; + bias-pull-down; + phandle = <0x464>; + }; + + gpu { + + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; + }; + + spi0 { + + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; + + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; + + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; + + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; + + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; + + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; + }; + + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; + }; + + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; + + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; + + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; + + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; + + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + }; + + fspi { + + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; + + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; + + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; + + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; + }; + + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; + + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; + }; + }; + + pcfg-pull-up-drv-level-13 { + drive-strength = <0x0d>; + phandle = <0x460>; + bias-pull-up; + }; + + clk32k { + + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; + + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; + + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; + + pcfg-pull-down-drv-level-11 { + drive-strength = <0x0b>; + bias-pull-down; + phandle = <0x467>; + }; + + pcie30phy { + + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; + + pcfg-pull-up-drv-level-0 { + drive-strength = <0x00>; + phandle = <0x2f3>; + bias-pull-up; + }; + + ddrphych0 { + + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; + + pcfg-pull-none-drv-level-10 { + drive-strength = <0x0a>; + bias-disable; + phandle = <0x454>; + }; + + pwm5 { + + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; + + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; + + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + }; + + pcfg-pull-none-drv-level-3 { + drive-strength = <0x03>; + bias-disable; + phandle = <0x2ef>; + }; + + pwm10 { + + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; + + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; + }; + }; + + pcfg-pull-down-smt { + input-schmitt-enable; + bias-pull-down; + phandle = <0x2ff>; + }; + + gpio@fec50000 { + gpio-controller; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec50000 0x00 0x100>; + phandle = <0x10d>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + }; + + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; + }; + + uart4 { + + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; + + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; + + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; + + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; + + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; + + spdif0 { + + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; + + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; + + pcfg-pull-down-drv-level-6 { + drive-strength = <0x06>; + bias-pull-down; + phandle = <0x2fd>; + }; + + pcfg-pull-up-drv-level-9 { + drive-strength = <0x09>; + phandle = <0x45c>; + bias-pull-up; + }; + + pcfg-pull-none-drv-level-1-smt { + drive-strength = <0x01>; + bias-disable; + input-schmitt-enable; + phandle = <0x19c>; + }; + + pcfg-pull-up-drv-level-11 { + drive-strength = <0x0b>; + phandle = <0x45e>; + bias-pull-up; + }; + + mcu { + + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; + + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + }; + + i2c8 { + + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; + + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; + + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; + + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; + + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + }; + + dp0 { + + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; + + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; + + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + }; + + pcfg-pull-none-drv-level-5-smt { + drive-strength = <0x05>; + bias-disable; + input-schmitt-enable; + phandle = <0x19b>; + }; + + pwm3 { + + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; + }; + + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; + + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; + + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; + }; + }; + + pcfg-pull-none-drv-level-1 { + drive-strength = <0x01>; + bias-disable; + phandle = <0x2ee>; + }; + + sata2 { + + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; + + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; + }; + + cam { + + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; + }; + + uart2 { + + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; + + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; + + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; + + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; + + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; + }; + + pcfg-pull-down-drv-level-4 { + drive-strength = <0x04>; + bias-pull-down; + phandle = <0x2fb>; + }; + + pcfg-pull-up-drv-level-7 { + drive-strength = <0x07>; + phandle = <0x45a>; + bias-pull-up; + }; + + i2c6 { + + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; + + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; + + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; + + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; + + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; + }; + + pdm1 { + + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; + + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; + + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; + + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; + + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; + + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; + + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; + + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; + + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; + + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; + + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; + }; + }; + + cpu { + + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; + + gpio-func { + + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; + + pcie20x1 { + + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; + + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; + + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; + }; + + leds { + + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; + }; + + pwm1 { + + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; + + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; + + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; + + sata0 { + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + }; + + refclk { + + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; + + pcie30x4 { + + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; + + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; + + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; + + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; + + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + }; + + can2 { + + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; + + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + }; + + litcpu { + + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; + + sata { + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; + + tsadc { + + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; + + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; + }; + }; + + uart0 { + + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; + + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; + }; + + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; + + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; + + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; + }; + }; + + pcfg-pull-down-drv-level-2 { + drive-strength = <0x02>; + bias-pull-down; + phandle = <0x2f9>; + }; + + pcfg-pull-up-drv-level-5 { + drive-strength = <0x05>; + phandle = <0x2f6>; + bias-pull-up; + }; + + gpio@fec20000 { + gpio-controller; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec20000 0x00 0x100>; + phandle = <0xfe>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; + }; + + pcfg-pull-none-drv-level-15 { + drive-strength = <0x0f>; + bias-disable; + phandle = <0x459>; + }; + + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; + }; + + i2c4 { + + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; + + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; + + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; + + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; + + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + }; + + emmc { + + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; + + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; + + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; + + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; + }; + + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; + }; + }; + + pcfg-pull-none-drv-level-8 { + drive-strength = <0x08>; + bias-disable; + phandle = <0x452>; + }; + + pwm15 { + + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; + + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; + }; + + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; + + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + }; + + pcie30x2 { + + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; + + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; + }; + + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; + + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; + }; + + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; + }; + }; + + can0 { + + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; + + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; + }; + }; + + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + uart9 { + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; + }; + + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; + }; + + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; + }; + + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; + }; + + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; + }; + + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; + }; + + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; + }; + + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; + + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; + }; + + pcfg-pull-none-drv-level-2-smt { + drive-strength = <0x02>; + bias-disable; + input-schmitt-enable; + phandle = <0x301>; + }; + + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; + }; + + spi3 { + + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; + + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; + + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; + + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; + + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; + + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; + + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; + + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; + + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; + + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; + + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; + + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; + }; + + pcfg-pull-down-drv-level-14 { + drive-strength = <0x0e>; + bias-pull-down; + phandle = <0x46a>; + }; + + bt656 { + + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; + }; + + pcfg-pull-down-drv-level-0 { + drive-strength = <0x00>; + bias-pull-down; + phandle = <0x2f7>; + }; + + pcfg-pull-up-drv-level-3 { + drive-strength = <0x03>; + phandle = <0x2f4>; + bias-pull-up; + }; + + i2s2 { + + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; + + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; + + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; + + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; + + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; + + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; + + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; + + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; + + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; + + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; + + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; + + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; + + pcfg-pull-none-drv-level-6-smt { + drive-strength = <0x06>; + bias-disable; + input-schmitt-enable; + phandle = <0x304>; + }; + + ddrphych3 { + + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; + + pcfg-pull-none-drv-level-13 { + drive-strength = <0x0d>; + bias-disable; + phandle = <0x457>; + }; + + i2c2 { + + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; + + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; + + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; + + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; + + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + }; + + auddsm { + + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; + + pwm8 { + + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; + + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; + + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + }; + + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; + }; + + pcfg-pull-none-drv-level-6 { + drive-strength = <0x06>; + bias-disable; + phandle = <0x2f2>; + }; + + jtag { + + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; + + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; + + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + }; + + gpio@fd8a0000 { + gpio-controller; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfd8a0000 0x00 0x100>; + phandle = <0x7b>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + }; + + gmac1 { + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; + + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; + + pwm13 { + + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; + + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; + + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + }; + + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; + + uart7 { + + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; + + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; + + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; + + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; + + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; + + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; + + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; + + pcfg-pull-down-drv-level-9 { + drive-strength = <0x09>; + bias-pull-down; + phandle = <0x465>; + }; + + spi1 { + + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; + }; + + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; + + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; + + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; + + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; + + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; + + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; + + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; + }; + + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + }; + + pcfg-pull-up-drv-level-14 { + drive-strength = <0x0e>; + phandle = <0x461>; + bias-pull-up; + }; + + pcfg-output-low-pull-down { + bias-pull-down; + phandle = <0x30b>; + output-low; + }; + + pcfg-pull-down-drv-level-12 { + drive-strength = <0x0c>; + bias-pull-down; + phandle = <0x468>; + }; + + pcfg-pull-up-drv-level-1 { + drive-strength = <0x01>; + phandle = <0x19f>; + bias-pull-up; + }; + + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; + + sdmmc { + + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; + + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; + }; + + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; + + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; + + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; + }; + }; + + i2s0 { + + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; + + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; + + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; + + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; + + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; + + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; + + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; + + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; + + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; + + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; + + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; + }; + }; + + ddrphych1 { + + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; + + pcfg-pull-none-drv-level-11 { + drive-strength = <0x0b>; + bias-disable; + phandle = <0x455>; + }; + + i2c0 { + + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; + }; + + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; + + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + }; + + pwm6 { + + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; + + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; + + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; + }; + }; + + hym8563 { + + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; + }; + }; + + pcfg-pull-none-drv-level-4 { + drive-strength = <0x04>; + bias-disable; + phandle = <0x2f0>; + }; + + pcfg-output-high-pull-up { + output-high; + phandle = <0x306>; + bias-pull-up; + }; + + pwm11 { + + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; + + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; + + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; + + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; + }; + }; + + bt1120 { + + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; + + pcfg-output-low-pull-up { + phandle = <0x30a>; + bias-pull-up; + output-low; + }; + + uart5 { + + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; + + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; + }; + + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; + + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; + }; + + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; + + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; + + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + }; + + sdio { + + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; + + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; + + spdif1 { + + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; + + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; + + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + }; + + pcfg-pull-down-drv-level-7 { + drive-strength = <0x07>; + bias-pull-down; + phandle = <0x463>; + }; + + gpio@fec30000 { + gpio-controller; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec30000 0x00 0x100>; + phandle = <0x79>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + }; + + pcfg-pull-up-drv-level-12 { + drive-strength = <0x0c>; + phandle = <0x45f>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-10 { + drive-strength = <0x0a>; + bias-pull-down; + phandle = <0x466>; + }; + + dp1 { + + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; + + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; + + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; + + vop { + + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; + + pwm4 { + + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; + + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + }; + + pcfg-pull-none-drv-level-2 { + drive-strength = <0x02>; + bias-disable; + phandle = <0x1a0>; + }; + + pcfg-pull-none-drv-level-3-smt { + drive-strength = <0x03>; + bias-disable; + input-schmitt-enable; + phandle = <0x302>; + }; + + uart3 { + + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; + + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; + + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; + + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; + + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; + + pcfg-pull-down-drv-level-5 { + drive-strength = <0x05>; + bias-pull-down; + phandle = <0x2fc>; + }; + + pcfg-pull-up-drv-level-8 { + drive-strength = <0x08>; + phandle = <0x45b>; + bias-pull-up; + }; + + pcfg-pull-up-drv-level-10 { + drive-strength = <0x0a>; + phandle = <0x45d>; + bias-pull-up; + }; + + pcfg-output-low { + phandle = <0x309>; + output-low; + }; + + i2c7 { + + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; + + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; + + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; + + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + }; + + pwm2 { + + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; + + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; + + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + }; + + pcfg-pull-none-drv-level-0 { + drive-strength = <0x00>; + bias-disable; + phandle = <0x2ed>; + }; + + sata1 { + + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; + + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + }; + + pmu { + + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; + + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; + }; + + uart1 { + + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; + + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; + + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; + + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; + + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; + }; + + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; + + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; + + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; + }; + }; + + hdmi { + + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; + }; + + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; + + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; + + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; + + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; + + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; + + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; + + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; + + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; + + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; + + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; + + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; + + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; + + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; + + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; + + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; + + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; + + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; + + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; + + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; + + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; + + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; + + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; + + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; + + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; + + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; + + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; + + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; + + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; + + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; + + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; + + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; + }; + + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; + + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; + + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; + + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; + + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; + + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; + + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; + + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; + + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + }; + + pcfg-pull-down-drv-level-3 { + drive-strength = <0x03>; + bias-pull-down; + phandle = <0x2fa>; + }; + + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; + }; + + i2c5 { + + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; + }; + + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; + + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; + + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; + + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; + + pcfg-pull-none-drv-level-9 { + drive-strength = <0x09>; + bias-disable; + phandle = <0x453>; + }; + + pdm0 { + + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; + + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; + + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; + + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; + + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; + + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; + + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; + + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; + + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; + + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; + + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; + }; + + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; + + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; + + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + }; + + pcfg-output-high-pull-none { + bias-disable; + output-high; + phandle = <0x308>; + }; + + pwm0 { + + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; + + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; + + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; + + cif { + + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; + + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; + + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; + + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + }; + + can1 { + + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; + + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + }; + + pcfg-output-low-pull-none { + bias-disable; + phandle = <0x30c>; + output-low; + }; + + gpio@fec40000 { + gpio-controller; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec40000 0x00 0x100>; + phandle = <0x181>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + }; + + spi4 { + + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; + + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; + + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; + + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; + + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; + + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; + + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; + + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + }; + + pcfg-pull-down-drv-level-15 { + drive-strength = <0x0f>; + bias-pull-down; + phandle = <0x46b>; + }; + + pcfg-pull-up-smt { + input-schmitt-enable; + phandle = <0x2fe>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-1 { + drive-strength = <0x01>; + bias-pull-down; + phandle = <0x2f8>; + }; + + pcfg-pull-up-drv-level-4 { + drive-strength = <0x04>; + phandle = <0x2f5>; + bias-pull-up; + }; + + wireless-wlan { + + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; + + wdt-pc9202 { + + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; + + pcfg-pull-none-drv-level-0-smt { + drive-strength = <0x00>; + bias-disable; + input-schmitt-enable; + phandle = <0x300>; + }; + + i2s3 { + + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; + + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; + + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; + + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; + + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; + + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; + }; + }; + + pcfg-pull-none-drv-level-14 { + drive-strength = <0x0e>; + bias-disable; + phandle = <0x458>; + }; + }; + + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x473>; + }; + + bt-sco { + #sound-dai-cells = <0x01>; + compatible = "delta,dfbmcs320"; + status = "disabled"; + phandle = <0x1d2>; + }; + + phy@fed80000 { + svid = <0xff01>; + orientation-switch; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + reg = <0x00 0xfed80000 0x00 0x10000>; + phandle = <0x2ea>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x18b>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@1 { + remote-endpoint = <0x18f>; + reg = <0x01>; + phandle = <0x17f>; + }; + + endpoint@0 { + remote-endpoint = <0x18e>; + reg = <0x00>; + phandle = <0x17e>; + }; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; + }; + + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; + + msi-controller@fe640000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + #msi-cells = <0x01>; + }; + + msi-controller@fe660000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + #msi-cells = <0x01>; + }; + }; + + ethernet@fe1c0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x10b>; + snps,reset-active-low; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x10c>; + local-mac-address = [de 2f 1a d4 a9 85]; + resets = <0x02 0x20b>; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x08 0x01>; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x109>; + phy-handle = <0x113>; + reset-names = "stmmaceth"; + tx_delay = <0x40>; + snps,axi-config = <0x10a>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x28f>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; + + tx-queues-config { + phandle = <0x10c>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x10a>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; + }; + + pcie-essd { + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + regulator-min-microvolt = <0x2625a0>; + regulator-name = "pcie_essd"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x1ba>; + vin-supply = <0x1cd>; + gpios = <0x181 0x0f 0x00>; + }; + + iommu@fdab9000 { + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + phandle = <0xb2>; + }; + + otp@fecc0000 { + #address-cells = <0x01>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + phandle = <0x2e7>; + reset-names = "otpc\0apb\0arb"; + + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; + + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; + + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; + + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; + + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; + + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpu-version@1c { + bits = <0x03 0x03>; + reg = <0x1c 0x01>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-low@6 { + bits = <0x05 0x03>; + reg = <0x06 0x01>; + phandle = <0xd4>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + package-serial-number-high@5 { + bits = <0x00 0x01>; + reg = <0x05 0x01>; + phandle = <0xd5>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + specification-serial-number@6 { + bits = <0x00 0x05>; + reg = <0x06 0x01>; + phandle = <0x21>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; + }; + + i2s@fddf0000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3e8>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + phandle = <0x1d3>; + dmas = <0xf2 0x02>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + dma-controller@fea10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + phandle = <0x7c>; + #dma-cells = <0x01>; + }; + + pwm@febd0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x169>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0000 0x00 0x10>; + phandle = <0x2d2>; + }; + + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; + status = "okay"; + phandle = <0xc3>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + + rgb { + pinctrl-names = "default"; + pinctrl-0 = <0x71>; + compatible = "rockchip,rk3588-rgb"; + status = "disabled"; + phandle = <0x25c>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@2 { + remote-endpoint = <0x3d>; + status = "disabled"; + reg = <0x02>; + phandle = <0xf0>; + }; + }; + }; + }; + }; + + spi@fe2b0000 { + #address-cells = <0x01>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; + #size-cells = <0x00>; + compatible = "rockchip,sfc"; + status = "disabled"; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + phandle = <0x292>; + }; + + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; + }; + + mmc@fe2c0000 { + power-domains = <0x60 0x28>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + cap-sd-highspeed; + vqmmc-supply = <0x118>; + no-mmc; + bus-width = <0x04>; + no-sdio; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "okay"; + disable-wp; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + phandle = <0x293>; + sd-uhs-sdr104; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; + }; + + serial@feb80000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb80000 0x00 0x100>; + phandle = <0x2cd>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + reg-shift = <0x02>; + }; + + phy@fee10000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x1cb>; + reg = <0x00 0xfee10000 0x00 0x100>; + phandle = <0x1bc>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + }; + + can@fea60000 { + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + clock-names = "baudclk\0apb_pclk"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0xbb 0x02 0xba>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + compatible = "rockchip,can-2.0"; + status = "okay"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea60000 0x00 0x1000>; + phandle = <0x2a1>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4c0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x140 0x141>; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + clocks = <0x02 0x3b 0x02 0x3a>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x13f>; + status = "disabled"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + phandle = <0x29b>; + dmas = <0xf1 0x04>; + }; + + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x239>; + }; + + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; + + usb@fc800000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc800000 0x00 0x40000>; + phandle = <0x254>; + }; + + i2c@fd880000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x77>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xc0022 0x02 0xc0021>; + interrupts = <0x00 0x13d 0x04>; + clocks = <0x02 0x287 0x02 0x286>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfd880000 0x00 0x1000>; + phandle = <0x25f>; + reset-names = "i2c\0apb"; + + hym8563@51 { + pinctrl-names = "default"; + clock-output-names = "hym8563"; + pinctrl-0 = <0x7a>; + wakeup-source; + interrupts = <0x08 0x08>; + #clock-cells = <0x00>; + interrupt-parent = <0x7b>; + clock-frequency = <0x8000>; + compatible = "haoyu,hym8563"; + status = "okay"; + reg = <0x51>; + phandle = <0x1e4>; + }; + + rk8602@42 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0x18>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk8603@43 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8603"; + reg = <0x43>; + phandle = <0x1c>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pc9202@3c { + index = <0x00>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x237>; + }; + + serial@fd890000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfd890000 0x00 0x100>; + phandle = <0x260>; + dmas = <0x7c 0x06 0x7c 0x07>; + reg-shift = <0x02>; + }; + + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; + + gpu-opp-table { + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x04>; + nvmem-cells = <0x63 0x64 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x65>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0x61>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x61a80>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-500000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x02 0xffff>; + }; + + opp-j-850000000 { + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-hz = <0x00 0x32a9f880>; + opp-supported-hw = <0x04 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-m-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-400000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + }; + + csi2-dphy1-hw@fedc8000 { + clock-names = "pclk"; + resets = <0x02 0x19 0x02 0x18>; + clocks = <0x02 0x10d>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x193>; + reg = <0x00 0xfedc8000 0x00 0x8000>; + phandle = <0x2e>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,sys_grf = <0xc8>; + }; + + hdcp@fde40000 { + power-domains = <0x60 0x19>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde40000 0x00 0x80>; + phandle = <0x285>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xf5>; + }; + + iommu@fdbac800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7f 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege3_mmu"; + reg = <0x00 0xfdbac800 0x00 0x40>; + phandle = <0xc0>; + }; + + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; + + rga@fdb70000 { + power-domains = <0x60 0x1e>; + iommus = <0xba>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + compatible = "rockchip,rga3_core1"; + status = "okay"; + interrupt-names = "rga3_core1_irq"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + phandle = <0x26a>; + }; + + spi@feb00000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x14e 0x14f 0x150>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x146 0x04>; + clocks = <0x02 0xa3 0x02 0x9e>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + phandle = <0x2ab>; + dmas = <0x7c 0x0e 0x7c 0x0f>; + }; + + pcie@fe170000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x20 0x2f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x20f 0x02 0x21e>; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1bc 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + linux,pci-domain = <0x02>; + phandle = <0x487>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf0 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1bb>; + interrupt-controller; + }; + }; + + i2s@fe470000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x11b 0x11c>; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + resets = <0x02 0x77 0x02 0x7a>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + pinctrl-1 = <0x11f>; + status = "okay"; + reg = <0x00 0xfe470000 0x00 0x1000>; + phandle = <0x1da>; + dmas = <0x7c 0x00 0x7c 0x01>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; + + csi2-dphy5 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x214>; + }; + + usb@fc840000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc840000 0x00 0x40000>; + phandle = <0x6b>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x236>; + }; + + rkisp1-vir1 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x240>; + }; + + i2c@feaa0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x149>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb1 0x02 0xa9>; + interrupts = <0x00 0x13f 0x04>; + clocks = <0x02 0x8e 0x02 0x86>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + phandle = <0x2a5>; + reset-names = "i2c\0apb"; + }; + + dmc { + downdifferential = <0x14>; + clock-names = "dmc_clk"; + interrupts = <0x00 0x49 0x04>; + clocks = <0x0e 0x04>; + upthreshold = <0x28>; + center-supply = <0x42>; + devfreq-events = <0x40>; + compatible = "rockchip,rk3588-dmc"; + status = "disabled"; + interrupt-names = "complete"; + mem-supply = <0x43>; + phandle = <0x21f>; + operating-points-v2 = <0x41>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + }; + + hdmi1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,card-name = "rockchip-hdmi1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a8>; + rockchip,mclk-fs = <0x80>; + }; + + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; + + mipi-dcphy-dummy { + phandle = <0x223>; + }; + + jpege-core@fdbac000 { + power-domains = <0x60 0x15>; + iommus = <0xc0>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b2>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + interrupts = <0x00 0x80 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege3"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbac000 0x00 0x400>; + phandle = <0x270>; + reset-names = "video_a\0video_h"; + }; + + iommu@fdce0800 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x71 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "cif_mmu"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + phandle = <0x50>; + }; + + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; + + syscon@fd5a8000 { + clocks = <0x73>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + phandle = <0xd8>; + }; + + dp0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,card-name = "rockchip-dp0"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x49c>; + rockchip,mclk-fs = <0x200>; + }; + + rkcif-mipi-lvds4 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a1>; + }; + + usb@fc880000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc880000 0x00 0x40000>; + phandle = <0x255>; + }; + + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; + + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; + + mipi1-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x225>; + }; + + hdmiphy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1ac>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; + }; + }; + + i2c@fec80000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x178>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb5 0x02 0xad>; + interrupts = <0x00 0x143 0x04>; + clocks = <0x02 0x92 0x02 0x8a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfec80000 0x00 0x1000>; + phandle = <0x2df>; + reset-names = "i2c\0apb"; + + imx415@37 { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + reset-gpios = <0x182 0x05 0x01>; + rockchip,camera-module-index = <0x00>; + compatible = "sony,imx415"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x00>; + reg = <0x37>; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x184>; + phandle = <0x32>; + }; + }; + }; + + es8388@11 { + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + clocks = <0x179>; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + status = "okay"; + reg = <0x11>; + phandle = <0x1db>; + }; + + XC7160b@1b { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + pwdn-gpios = <0xfe 0x04 0x00>; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "NC"; + reset-gpios = <0x182 0x05 0x00>; + rockchip,camera-module-index = <0x00>; + compatible = "firefly,xc7160"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x01>; + reg = <0x1b>; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x183>; + phandle = <0x31>; + }; + }; + }; + + fusb302@22 { + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + interrupts = <0x1b 0x08>; + vbus-supply = <0x17c>; + interrupt-parent = <0x7b>; + compatible = "fcs,fusb302"; + status = "disabled"; + reg = <0x22>; + phandle = <0x2e0>; + + connector { + sink-pdos = <0x4019064>; + power-role = "dual"; + source-pdos = <0x401912c>; + data-role = "dual"; + label = "USB-C"; + try-power-role = "sink"; + compatible = "usb-c-connector"; + op-sink-microwatt = <0xf4240>; + phandle = <0x2e1>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; + + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; + + altmode@0 { + svid = <0xff01>; + vdo = <0xffffffff>; + reg = <0x00>; + }; + }; + }; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; + }; + }; + }; + + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; + + vbus5v0-typec-pwr-en-regulator { + gpio = <0x182 0x0c 0x00>; + enable-active-high; + regulator-name = "vbus5v0_typec_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x17c>; + }; + + mipi2-csi2-hw@fdd30000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x326>; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + clocks = <0x02 0x1d1>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + phandle = <0x49>; + reset-names = "srst_csihost_p"; + }; + + spdif-rx@fde18000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x401>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde18000 0x00 0x1000>; + phandle = <0x480>; + dmas = <0x7c 0x17>; + reset-names = "spdifrx-m"; + }; + + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; + + rkisp0-vir3 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23e>; + }; + + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; + + rkcif@fdce0000 { + power-domains = <0x60 0x1b>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + reg-names = "cif_regs"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + interrupts = <0x00 0x9b 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + compatible = "rockchip,rk3588-cif"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "cif-intr"; + nvmem-cell-names = "specification\0package_low\0package_high"; + reg = <0x00 0xfdce0000 0x00 0x800>; + phandle = <0x4f>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + }; + + edp@fdec0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x101>; + reg = <0x00 0xfdec0000 0x00 0x1000>; + phandle = <0x289>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x103>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe1>; + }; + + endpoint@2 { + remote-endpoint = <0x3b>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe7>; + }; + + endpoint@0 { + remote-endpoint = <0x102>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdb>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x28a>; + }; + }; + }; + }; + + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; + + dp@fde60000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0x1a5>; + reg = <0x00 0xfde60000 0x00 0x4000>; + phandle = <0x1e3>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x3e>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe3>; + }; + + endpoint@2 { + remote-endpoint = <0x1a7>; + status = "disabled"; + reg = <0x02>; + phandle = <0xeb>; + }; + + endpoint@0 { + remote-endpoint = <0x1a6>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdd>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x481>; + }; + }; + }; + }; + + vcc5v0-usbdcin { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usbdcin"; + compatible = "regulator-fixed"; + phandle = <0x48c>; + vin-supply = <0x1cd>; + }; + + rkvdec-core@fdc48000 { + power-domains = <0x60 0x0f>; + iommus = <0xcc>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + interrupts = <0x00 0x61 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec1"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xffe00000 0x100000>; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + phandle = <0x275>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcd>; + }; + + vcc-1v1-nldo-s3 { + regulator-max-microvolt = <0x10c8e0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-name = "vcc_1v1_nldo_s3"; + compatible = "regulator-fixed"; + phandle = <0x15c>; + vin-supply = <0x78>; + }; + + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; + + power-controller { + #address-cells = <0x01>; + #size-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-power-controller"; + status = "okay"; + phandle = <0x60>; + + power-domain@37 { + clocks = <0x02 0x199 0x02 0x140>; + reg = <0x25>; + pm_qos = <0xaf>; + }; + + power-domain@27 { + #address-cells = <0x01>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + #size-cells = <0x00>; + reg = <0x1b>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; + + power-domain@29 { + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + reg = <0x1d>; + pm_qos = <0xa8 0xa9>; + }; + + power-domain@28 { + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + reg = <0x1c>; + pm_qos = <0xa6 0xa7>; + }; + }; + + power-domain@33 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x21>; + }; + + power-domain@13 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x0d>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@16 { + #address-cells = <0x01>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + #size-cells = <0x00>; + reg = <0x10>; + pm_qos = <0x8d 0x8e 0x8f>; + + power-domain@17 { + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + reg = <0x11>; + pm_qos = <0x90 0x91 0x92>; + }; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + }; + + power-domain@31 { + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + reg = <0x1f>; + pm_qos = <0xab 0xac 0xad 0xae>; + }; + + power-domain@21 { + #address-cells = <0x01>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + #size-cells = <0x00>; + reg = <0x15>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@23 { + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + reg = <0x17>; + pm_qos = <0x9b>; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + + power-domain@22 { + clocks = <0x02 0x1ba 0x02 0x1b9>; + reg = <0x16>; + pm_qos = <0x9c>; + }; + }; + + power-domain@38 { + clocks = <0x02 0x3c 0x02 0x3d>; + reg = <0x26>; + }; + + power-domain@8 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x08>; + + power-domain@9 { + #address-cells = <0x01>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + #size-cells = <0x00>; + reg = <0x09>; + pm_qos = <0x82 0x83 0x84>; + + power-domain@11 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0b>; + pm_qos = <0x86>; + }; + + power-domain@10 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0a>; + pm_qos = <0x85>; + }; + }; + }; + + power-domain@26 { + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + reg = <0x1a>; + pm_qos = <0xa0 0xa1>; + }; + + power-domain@34 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x22>; + }; + + power-domain@24 { + #address-cells = <0x01>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + #size-cells = <0x00>; + reg = <0x18>; + pm_qos = <0x9d 0x9e>; + + power-domain@25 { + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + reg = <0x19>; + pm_qos = <0x9f>; + }; + }; + + power-domain@12 { + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + reg = <0x0c>; + pm_qos = <0x87 0x88 0x89 0x8a>; + }; + + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; + }; + + power-domain@30 { + clocks = <0x02 0x189 0x02 0x18a>; + reg = <0x1e>; + pm_qos = <0xaa>; + }; + }; + }; + + csi2-dphy3 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x212>; + }; + + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; + + pwm@fd8b0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + phandle = <0x264>; + }; + + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x234>; + }; + + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; + + vdpu@fdb50400 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-decoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "okay"; + interrupt-names = "irq_vdpu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50400 0x00 0x400>; + phandle = <0x267>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; + + pwm@febe0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0030 0x00 0x10>; + phandle = <0x2d8>; + }; + + display-subsystem { + memory-region-names = "drm-logo"; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + ports = <0x34>; + memory-region = <0x37>; + clocks = <0x35 0x36>; + compatible = "rockchip,display-subsystem"; + phandle = <0x215>; + + route { + + route-edp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21a>; + }; + + route-hdmi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3f>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21e>; + }; + + route-dp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3e>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21d>; + }; + + route-dsi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3a>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x218>; + }; + + route-edp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3b>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x219>; + }; + + route-hdmi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3c>; + logo,mode = "center"; + status = "okay"; + phandle = <0x21b>; + }; + + route-dp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x38>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x216>; + }; + + route-rgb { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3d>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21c>; + }; + + route-dsi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x39>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x217>; + }; + }; + }; + + serial@febc0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebc0000 0x00 0x100>; + phandle = <0x2d1>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + reg-shift = <0x02>; + }; + + adc-keys { + io-channels = <0x1d9 0x01>; + poll-interval = <0x64>; + keyup-threshold-microvolt = <0x1b7740>; + compatible = "adc-keys"; + status = "okay"; + phandle = <0x49e>; + io-channel-names = "buttons"; + + recovery-key { + press-threshold-microvolt = <0x4268>; + label = "F12"; + linux,code = <0x58>; + }; + }; + + pvtm@fdaf0000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; + + pvtm@3 { + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + clocks = <0x02 0x12b 0x02 0x129>; + reg = <0x03>; + reset-names = "rts\0rst-p"; + }; + }; + + codec-digital@fe500000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + clock-names = "dac\0pclk"; + resets = <0x02 0x84>; + clocks = <0x02 0x29 0x02 0x2f>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + status = "disabled"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfe500000 0x00 0x1000>; + phandle = <0x29e>; + reset-names = "reset"; + rockchip,pwm-output-mode; + }; + + pwm@fd8b0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + phandle = <0x263>; + }; + + rkcif-mipi-lvds2 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "okay"; + phandle = <0x55>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; + }; + }; + }; + + pwm@febe0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0020 0x00 0x10>; + phandle = <0x2d7>; + }; + + vcc-fan-pwr-en-regulator { + regulator-boot-on; + gpio = <0x182 0x0b 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_fan_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a4>; + }; + + iommu@fdba0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x79 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege0_mmu"; + reg = <0x00 0xfdba0800 0x00 0x40>; + phandle = <0xbc>; + }; + + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x231>; + }; + + arm-pmu { + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + interrupts = <0x01 0x07 0x08>; + compatible = "arm,armv8-pmuv3"; + phandle = <0x20c>; + }; + + pvtm@fda40000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; + + pvtm@0 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c6 0x02 0x15>; + reg = <0x00>; + }; + }; + + pwm@fd8b0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + phandle = <0x262>; + }; + + i2s@fddc0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x38d>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + phandle = <0x27d>; + dmas = <0xf2 0x00>; + reset-names = "tx-m"; + }; + + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; + + syscon@fd5d4000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + phandle = <0x1c8>; + + usb2-phy@4000 { + clock-output-names = "usb480m_phy1"; + clock-names = "phyclk"; + resets = <0x02 0xc0048 0x02 0x489>; + interrupts = <0x00 0x18a 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x4000 0x10>; + phandle = <0x1ca>; + reset-names = "phy\0apb"; + + otg-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a3>; + }; + }; + }; + + rkisp0-vir1 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23c>; + }; + + pwm@febe0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0010 0x00 0x10>; + phandle = <0x2d6>; + }; + + thermal-zones { + phandle = <0x248>; + + bigcore1-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; + }; + + soc-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x00>; + sustainable-power = <0x834>; + phandle = <0x249>; + + trips { + + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; + + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; + + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; + }; + + cooling-maps { + + map2 { + trip = <0x5e>; + cooling-device = <0x0c 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map1 { + trip = <0x5e>; + cooling-device = <0x0a 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + }; + }; + + npu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; + + center-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; + + gpu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; + + littlecore-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; + + bigcore0-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; + }; + }; + + iommu@fdbdf000 { + power-domains = <0x60 0x10>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + phandle = <0xc2>; + }; + + serial@feb50000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14d 0x04>; + clocks = <0x02 0xbb 0x02 0xac>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb50000 0x00 0x100>; + phandle = <0x2ca>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + reg-shift = <0x02>; + }; + + iommu@fdcd0f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8c 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec0_mmu"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + phandle = <0xd2>; + }; + + vcc5v0-host { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x02 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x75>; + vin-supply = <0x1dd>; + }; + + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; + + phy@fed90000 { + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + reg = <0x00 0xfed90000 0x00 0x10000>; + phandle = <0x48b>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; + + jpege-core@fdba0000 { + power-domains = <0x60 0x15>; + iommus = <0xbc>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ac>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + interrupts = <0x00 0x7a 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba0000 0x00 0x400>; + phandle = <0x26d>; + reset-names = "video_a\0video_h"; + }; + + vcc5v0-sys { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_sys"; + compatible = "regulator-fixed"; + phandle = <0x78>; + vin-supply = <0x1cd>; + }; + + pwm@fd8b0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + phandle = <0x261>; + }; + + vop@fdd90000 { + power-domains = <0x60 0x18>; + iommus = <0xd6>; + rockchip,vop-grf = <0xd7>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + reg-names = "regs\0gamma_lut"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + compatible = "rockchip,rk3588-vop"; + rockchip,pmu = <0xd9>; + status = "okay"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + phandle = <0x278>; + rockchip,vo1-grf = <0xd8>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; + + port@0 { + rockchip,primary-plane = <0x02>; + rockchip,plane-mask = <0x05>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x279>; + + endpoint@5 { + remote-endpoint = <0xdf>; + reg = <0x05>; + phandle = <0x1ad>; + }; + + endpoint@3 { + remote-endpoint = <0xdd>; + reg = <0x03>; + phandle = <0x1a6>; + }; + + endpoint@1 { + remote-endpoint = <0xdb>; + reg = <0x01>; + phandle = <0x102>; + }; + + endpoint@4 { + remote-endpoint = <0xde>; + reg = <0x04>; + phandle = <0x1b0>; + }; + + endpoint@2 { + remote-endpoint = <0xdc>; + reg = <0x02>; + phandle = <0x3c>; + }; + + endpoint@0 { + remote-endpoint = <0xda>; + reg = <0x00>; + phandle = <0xf7>; + }; + }; + + port@3 { + rockchip,primary-plane = <0x09>; + rockchip,plane-mask = <0x280>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + phandle = <0x27c>; + + endpoint@1 { + remote-endpoint = <0xef>; + reg = <0x01>; + phandle = <0x3a>; + }; + + endpoint@2 { + remote-endpoint = <0xf0>; + reg = <0x02>; + phandle = <0x3d>; + }; + + endpoint@0 { + remote-endpoint = <0xee>; + reg = <0x00>; + phandle = <0x39>; + }; + }; + + port@1 { + rockchip,primary-plane = <0x03>; + rockchip,plane-mask = <0x0a>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + phandle = <0x27a>; + + endpoint@5 { + remote-endpoint = <0xe5>; + reg = <0x05>; + phandle = <0x3f>; + }; + + endpoint@3 { + remote-endpoint = <0xe3>; + reg = <0x03>; + phandle = <0x3e>; + }; + + endpoint@1 { + remote-endpoint = <0xe1>; + reg = <0x01>; + phandle = <0x103>; + }; + + endpoint@4 { + remote-endpoint = <0xe4>; + reg = <0x04>; + phandle = <0x1b1>; + }; + + endpoint@2 { + remote-endpoint = <0xe2>; + reg = <0x02>; + phandle = <0xff>; + }; + + endpoint@0 { + remote-endpoint = <0xe0>; + reg = <0x00>; + phandle = <0x38>; + }; + }; + + port@2 { + rockchip,primary-plane = <0x08>; + rockchip,plane-mask = <0x140>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + #size-cells = <0x00>; + reg = <0x02>; + phandle = <0x27b>; + + endpoint@5 { + remote-endpoint = <0xeb>; + reg = <0x05>; + phandle = <0x1a7>; + }; + + endpoint@3 { + remote-endpoint = <0xe9>; + reg = <0x03>; + phandle = <0xf3>; + }; + + endpoint@1 { + remote-endpoint = <0xe7>; + reg = <0x01>; + phandle = <0x3b>; + }; + + endpoint@6 { + remote-endpoint = <0xec>; + reg = <0x06>; + phandle = <0x1b2>; + }; + + endpoint@4 { + remote-endpoint = <0xea>; + reg = <0x04>; + phandle = <0xf4>; + }; + + endpoint@2 { + remote-endpoint = <0xe8>; + reg = <0x02>; + phandle = <0x100>; + }; + + endpoint@0 { + remote-endpoint = <0xe6>; + reg = <0x00>; + phandle = <0xf8>; + }; + + endpoint@7 { + remote-endpoint = <0xed>; + reg = <0x07>; + phandle = <0x1ae>; + }; + }; + }; + }; + + csi2-dphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x210>; + }; + + pwm@febe0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0000 0x00 0x10>; + phandle = <0x2d5>; + }; + + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; + + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; + + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; + + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; + + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; + }; + + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; + }; + + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; + + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; + + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; + + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; + + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; + + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; + + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; + }; + + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; + + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; + + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; + }; + + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; + }; + + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; + }; + + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; + + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; + + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; + }; + + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; + + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; + }; + + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; + + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; + }; + + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; + }; + + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; + }; + + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; + }; + + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; + }; + + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; + }; + + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; + + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; + }; + + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; + + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; + }; + }; + + usb@fc8c0000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + phandle = <0x6e>; + }; + + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; + + mipi0-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x224>; + }; + + cluster1-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x24 0x25 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x26>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x16>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + mmc@fe2d0000 { + power-domains = <0x60 0x25>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "disabled"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + phandle = <0x294>; + max-frequency = <0xbebc200>; + }; + + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22e>; + }; + + serial@feb90000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb90000 0x00 0x100>; + phandle = <0x2ce>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + reg-shift = <0x02>; + }; + + i2s@fddf8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x3c3>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "okay"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + phandle = <0x1ec>; + dmas = <0xf2 0x15>; + reset-names = "rx-m"; + }; + + phy@fee20000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x195>; + reg = <0x00 0xfee20000 0x00 0x100>; + phandle = <0x70>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + }; + + csi2-dphy0-hw@fedc0000 { + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + clocks = <0x02 0x10c>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x192>; + reg = <0x00 0xfedc0000 0x00 0x8000>; + phandle = <0x2d>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,sys_grf = <0xc8>; + }; + + can@fea70000 { + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea70000 0x00 0x1000>; + phandle = <0x2a2>; + reset-names = "can\0can-apb"; + }; + + mailbox@fec60000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec60000 0x00 0x200>; + phandle = <0x2dd>; + }; + + usbdrd3_1 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x47a>; + + usb@fc400000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x2a7>; + interrupts = <0x00 0xdd 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x1a3 0x1a4>; + reg = <0x00 0xfc400000 0x00 0x400000>; + phandle = <0x47b>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; + + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; + + user { + linux,default-trigger = "ir-user-click"; + label = ":user"; + default-state = "off"; + phandle = <0x499>; + gpios = <0x182 0x03 0x00>; + }; + + power { + linux,default-trigger = "ir-power-click"; + label = ":power"; + default-state = "on"; + status = "disabled"; + phandle = <0x498>; + gpios = <0x7b 0x15 0x00>; + }; + }; + + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x479>; + }; + + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; + + spdif-tx@fdde0000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc4 0x04>; + clocks = <0x02 0x257 0x02 0x253>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + phandle = <0x27e>; + dmas = <0xf1 0x07>; + }; + + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0"; + }; + + rkcif-mipi-lvds { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x52>; + }; + + rga@fdb80000 { + power-domains = <0x60 0x15>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + interrupts = <0x00 0x74 0x04>; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + compatible = "rockchip,rga2_core0"; + status = "okay"; + interrupt-names = "rga2_irq"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + phandle = <0x26b>; + }; + + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; + + spi@feb10000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x151 0x152 0x153>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x147 0x04>; + clocks = <0x02 0xa4 0x02 0x9f>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + phandle = <0x2ac>; + dmas = <0x7c 0x10 0x7c 0x11>; + }; + + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x472>; + }; + + hdmi@fdea0000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "disabled"; + rockchip,grf = <0xc8>; + phys = <0x1ac>; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + phandle = <0x1e1>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x482>; + + endpoint@1 { + remote-endpoint = <0x3f>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe5>; + }; + + endpoint@2 { + remote-endpoint = <0x1ae>; + status = "disabled"; + reg = <0x02>; + phandle = <0xed>; + }; + + endpoint@0 { + remote-endpoint = <0x1ad>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdf>; + }; + }; + }; + }; + + pcie@fe180000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x30 0x3f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x210 0x02 0x21f>; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x70 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + linux,pci-domain = <0x03>; + phandle = <0x28c>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf5 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x105>; + interrupt-controller; + }; + }; + + i2s@fe480000 { + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + resets = <0x02 0xc002a 0x02 0xc002d>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfe480000 0x00 0x1000>; + phandle = <0x1d1>; + dmas = <0x7c 0x02 0x7c 0x03>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; + + i2c@feab0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14a>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb2 0x02 0xaa>; + interrupts = <0x00 0x140 0x04>; + clocks = <0x02 0x8f 0x02 0x87>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + phandle = <0x2a6>; + reset-names = "i2c\0apb"; + + gpio@21 { + gpio-controller; + gpio-group-num = <0xc8>; + compatible = "nxp,pca9555"; + status = "okay"; + reg = <0x21>; + phandle = <0x182>; + #gpio-cells = <0x02>; + }; + }; + + iommu@fdcb7f00 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x84 0x04>; + clocks = <0x02 0x1de 0x02 0x1df>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "isp0_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + phandle = <0xd0>; + }; + + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; + + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; + + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; + + mipi5-csi2-hw@fdd60000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x329>; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + clocks = <0x02 0x1d4>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + phandle = <0x4c>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; + + timer@feae0000 { + clock-names = "pclk\0timer"; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + phandle = <0x2a9>; + }; + + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22c>; + }; + + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; + + i2c@fec90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x185>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb6 0x02 0xae>; + interrupts = <0x00 0x144 0x04>; + clocks = <0x02 0x93 0x02 0x8b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfec90000 0x00 0x1000>; + phandle = <0x2e4>; + reset-names = "i2c\0apb"; + }; + + avsd-plus@fdb51000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,avs-plus-decoder"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_avsd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb51000 0x00 0x200>; + phandle = <0x268>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + dp1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,card-name = "rockchip,dp1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a9>; + rockchip,mclk-fs = <0x200>; + }; + + mipi1-csi2-hw@fdd20000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x325>; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + clocks = <0x02 0x1d0>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + phandle = <0x48>; + reset-names = "srst_csihost_p"; + }; + + iep@fdbb0000 { + power-domains = <0x60 0x15>; + iommus = <0xc1>; + clock-names = "aclk\0hclk\0sclk"; + assigned-clocks = <0x02 0x1aa>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + rockchip,disable-auto-freq; + compatible = "rockchip,iep-v2"; + status = "okay"; + interrupt-names = "irq_iep"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbb0000 0x00 0x500>; + phandle = <0x271>; + reset-names = "rst_a\0rst_h\0rst_s"; + }; + + dsi@fde20000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x2f>; + reg = <0x00 0xfde20000 0x00 0x10000>; + phandle = <0x281>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x282>; + + endpoint@1 { + remote-endpoint = <0x39>; + status = "disabled"; + reg = <0x01>; + phandle = <0xee>; + }; + + endpoint@0 { + remote-endpoint = <0xf3>; + status = "disabled"; + reg = <0x00>; + phandle = <0xe9>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x477>; + }; + + edp@fded0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x1af>; + reg = <0x00 0xfded0000 0x00 0x1000>; + phandle = <0x483>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x1b1>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe4>; + }; + + endpoint@2 { + remote-endpoint = <0x1b2>; + status = "disabled"; + reg = <0x02>; + phandle = <0xec>; + }; + + endpoint@0 { + remote-endpoint = <0x1b0>; + status = "disabled"; + reg = <0x00>; + phandle = <0xde>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x484>; + }; + }; + }; + }; + + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; + + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; + + npu-opp-table { + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,init-freq = <0xf4240>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0xb4 0xb5 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0xb6>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0xb1>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x7a120>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-500000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-950000000 { + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-hz = <0x00 0x389fd980>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-400000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + }; + }; + + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; + + syscon@fd5dc000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + phandle = <0x25e>; + + usb2-phy@c000 { + clock-output-names = "usb480m_phy3"; + clock-names = "phyclk"; + resets = <0x02 0xc004a 0x02 0x48b>; + interrupts = <0x00 0x188 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0xc000 0x10>; + phandle = <0x6d>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6f>; + }; + }; + }; + + pcie-clk3 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk3"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x496>; + gpios = <0xfe 0x09 0x01>; + }; + + pwm@febf0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0030 0x00 0x10>; + phandle = <0x2dc>; + }; + + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + phandle = <0x29f>; + #hwlock-cells = <0x01>; + }; + + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x474>; + }; + + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; + + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; + }; + + hdmirx-controller@fdee0000 { + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1b3 0x1b4>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + reg-names = "hdmirx_regs"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + hpd-trigger-level = <0x01>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + status = "disabled"; + rockchip,grf = <0xc8>; + interrupt-names = "cec\0hdmi\0dma"; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + reg = <0x00 0xfdee0000 0x00 0x6000>; + phandle = <0x1eb>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + rockchip,vo1_grf = <0xd8>; + }; + + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; + + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; + + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; + + reboot-mode { + mode-normal = <0x5242c300>; + mode-loader = <0x5242c301>; + mode-quiescent = <0x5242c30e>; + mode-bootloader = <0x5242c301>; + mode-recovery = <0x5242c303>; + mode-watchdog = <0x5242c308>; + mode-ums = <0x5242c30c>; + mode-fastboot = <0x5242c309>; + offset = <0x80>; + compatible = "syscon-reboot-mode"; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + mode-charge = <0x5242c30b>; + mode-panic = <0x5242c307>; + }; + }; + + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; + + iommu@fdb60f00 { + power-domains = <0x60 0x16>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_0_mmu"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + phandle = <0xb9>; + }; + + pwm@febf0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0020 0x00 0x10>; + phandle = <0x2db>; + }; + + rkispp@fdcd0000 { + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8b 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + phandle = <0x5b>; + }; + + tsadc@fec00000 { + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + clock-names = "tsadc\0apb_pclk"; + rockchip,hw-tshut-polarity = <0x00>; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + interrupts = <0x00 0x18d 0x04>; + rockchip,hw-tshut-mode = <0x00>; + clocks = <0x02 0xaa 0x02 0xa9>; + #thermal-sensor-cells = <0x01>; + compatible = "rockchip,rk3588-tsadc"; + pinctrl-1 = <0x176>; + status = "okay"; + reg = <0x00 0xfec00000 0x00 0x400>; + phandle = <0x5d>; + reset-names = "tsadc\0tsadc-apb"; + rockchip,hw-tshut-temp = <0x1d4c0>; + }; + + iommu@fdbb0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_iep_mmu"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + phandle = <0xc1>; + }; + + phy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0x101>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + pvtm@fda50000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; + + pvtm@1 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c8 0x02 0x17>; + reg = <0x01>; + }; + }; + + csi2-dcphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20d>; + }; + + mailbox@fece0000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfece0000 0x00 0x200>; + phandle = <0x2e9>; + }; + + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x23a>; + }; + + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x22f>; + }; + + dfi@fe060000 { + rockchip,pmu_grf = <0x104>; + compatible = "rockchip,rk3588-dfi"; + status = "disabled"; + reg = <0x00 0xfe060000 0x00 0x10000>; + phandle = <0x40>; + }; + + iommu@fdca0000 { + power-domains = <0x60 0x17>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x6d 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-av1"; + status = "okay"; + interrupt-names = "irq_av1d_mmu"; + reg = <0x00 0xfdca0000 0x00 0x600>; + phandle = <0xce>; + }; + + mipi5-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x229>; + }; + + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; + + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; + + iommu@fdba8800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7d 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege2_mmu"; + reg = <0x00 0xfdba8800 0x00 0x40>; + phandle = <0xbf>; + }; + + mpp-srv { + rockchip,resetgroup-count = <0x01>; + rockchip,taskqueue-count = <0x0c>; + compatible = "rockchip,mpp-service"; + status = "okay"; + phandle = <0xb8>; + }; + + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; + + pwm@febf0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0010 0x00 0x10>; + phandle = <0x2da>; + }; + + iommu@fdbef000 { + power-domains = <0x60 0x11>; + rockchip,shootdown-entire; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + phandle = <0xc5>; + lock-names = "aclk\0iface"; + }; + + serial@feb60000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb60000 0x00 0x100>; + phandle = <0x2cb>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + reg-shift = <0x02>; + }; + + hdmiin-sound { + rockchip,jack-det; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,bitclock-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,format = "i2s"; + compatible = "rockchip,hdmi"; + phandle = <0x4ac>; + rockchip,frame-master = <0x1eb>; + rockchip,mclk-fs = <0x80>; + }; + + i2s@fddc8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x391>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + phandle = <0x47c>; + dmas = <0xf2 0x16>; + reset-names = "tx-m"; + }; + + pcie30-avdd0v75 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "pcie30_avdd0v75"; + compatible = "regulator-fixed"; + phandle = <0x4a7>; + vin-supply = <0x1df>; + }; + + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; + }; + + rockchip-suspend { + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; + + decompress@fea80000 { + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + compatible = "rockchip,hw-decompress"; + status = "disabled"; + reg = <0x00 0xfea80000 0x00 0x1000>; + phandle = <0x2a3>; + reset-names = "dresetn"; + }; + + dma-controller@fea30000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + phandle = <0xf1>; + #dma-cells = <0x01>; + }; + + pwm@febf0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0000 0x00 0x10>; + phandle = <0x2d9>; + }; + + iommu@fdcd8f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8e 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec1_mmu"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + phandle = <0xd3>; + }; + + spdif-tx@fddb0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc3 0x04>; + clocks = <0x02 0x209 0x02 0x204>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + phandle = <0x1d5>; + dmas = <0xf1 0x06>; + }; + + rkisp1-vir2 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x241>; + }; + + pcie-clk1 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk1"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x494>; + vin-supply = <0x1cd>; + gpios = <0x181 0x15 0x01>; + }; + + jpege-core@fdba8000 { + power-domains = <0x60 0x15>; + iommus = <0xbf>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + interrupts = <0x00 0x7e 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege2"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba8000 0x00 0x400>; + phandle = <0x26f>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; + + spdif-tx1-sound { + simple-audio-card,name = "rockchip,spdif-tx1"; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49d>; + simple-audio-card,mclk-fs = <0x80>; + + simple-audio-card,cpu { + sound-dai = <0x1d7>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; + + mmc@fe2e0000 { + mmc-hs400-enhanced-strobe; + clock-names = "core\0bus\0axi\0block\0timer"; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + bus-width = <0x08>; + non-removable; + no-sdio; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + mmc-hs400-1_8v; + interrupts = <0x00 0xcd 0x04>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + no-sd; + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + status = "okay"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + phandle = <0x295>; + max-frequency = <0xbebc200>; + reset-names = "core\0bus\0axi\0block\0timer"; + }; + + dma-controller@fed10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + phandle = <0xf2>; + #dma-cells = <0x01>; + }; + + iommu@fc900000 { + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfc900000 0x00 0x200000>; + phandle = <0x256>; + }; + + mailbox@fec70000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec70000 0x00 0x200>; + phandle = <0x2de>; + }; + + pcie@fe150000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1b8>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x00 0x0f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20d 0x02 0x21c>; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x0e 0x00>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + #interrupt-cells = <0x01>; + status = "okay"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + linux,pci-domain = <0x00>; + phandle = <0x485>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0x104 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b5>; + interrupt-controller; + }; + }; + + rng@fe378000 { + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + compatible = "rockchip,trngv1"; + status = "okay"; + reg = <0x00 0xfe378000 0x00 0x200>; + phandle = <0x297>; + reset-names = "reset"; + }; + + sata@fe220000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + reg = <0x00 0xfe220000 0x00 0x1000>; + phandle = <0x48a>; + ports-implemented = <0x01>; + }; + + rkcif-mipi-lvds5 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a2>; + }; + + vcc-sata-pwr-en-regulator { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + gpio = <0x182 0x0c 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_sata_pwr_en"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a3>; + vin-supply = <0x1cd>; + }; + + pwm-fan { + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + compatible = "pwm-fan"; + phandle = <0x4ad>; + pwms = <0x1ed 0x00 0xc350 0x00>; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + }; + + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; + + spdif-tx@fe4e0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc1 0x04>; + clocks = <0x02 0x41 0x02 0x3e>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + phandle = <0x29d>; + dmas = <0x7c 0x05>; + }; + + vad@fe4d0000 { + rockchip,det-channel = <0x00>; + rockchip,audio-src = <0x00>; + clock-names = "hclk"; + reg-names = "vad"; + interrupts = <0x00 0xca 0x04>; + clocks = <0x02 0x2a0>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-vad"; + status = "disabled"; + rockchip,mode = <0x00>; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + phandle = <0x29c>; + }; + + jpegd@fdb90000 { + power-domains = <0x60 0x15>; + iommus = <0xbb>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b4>; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + interrupts = <0x00 0x81 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + compatible = "rockchip,rkv-jpeg-decoder-v1"; + status = "okay"; + interrupt-names = "irq_jpegd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb90000 0x00 0x400>; + phandle = <0x26c>; + reset-names = "video_a\0video_h"; + }; + + cpuinfo { + nvmem-cells = <0x2a 0x2b 0x2c>; + compatible = "rockchip,cpuinfo"; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; + + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; + + spi@feb20000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x01>; + pinctrl-0 = <0x154 0x155>; + clock-names = "spiclk\0apb_pclk"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x148 0x04>; + clocks = <0x02 0xa5 0x02 0xa0>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "okay"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + phandle = <0x2ad>; + dmas = <0xf1 0x0f 0xf1 0x10>; + + rk806single@0 { + vcc11-supply = <0x15b>; + pinctrl-names = "default\0pmic-power-off"; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + interrupts = <0x07 0x08>; + spi-max-frequency = <0xf4240>; + interrupt-parent = <0x7b>; + low_voltage_threshold = <0xbb8>; + vcca-supply = <0x78>; + vcc1-supply = <0x78>; + pmic-reset-func = <0x01>; + vcc2-supply = <0x78>; + hotdie_temperture_threshold = <0x73>; + compatible = "rockchip,rk806"; + vcc3-supply = <0x78>; + pinctrl-1 = <0x15a>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + reg = <0x00>; + phandle = <0x2ae>; + vcc6-supply = <0x78>; + shutdown_voltage_threshold = <0xa8c>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + shutdown_temperture_threshold = <0xa0>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; + + pinctrl_rk806 { + gpio-controller; + phandle = <0x2af>; + #gpio-cells = <0x02>; + + rk806_dvs2_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b4>; + }; + + rk806_dvs3_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl3"; + phandle = <0x159>; + }; + + rk806_dvs3_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl3"; + phandle = <0x2ba>; + }; + + rk806_dvs3_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b9>; + }; + + rk806_dvs2_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x158>; + }; + + rk806_dvs1_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl1"; + phandle = <0x15a>; + }; + + rk806_dvs1_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b0>; + }; + + rk806_dvs1_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x157>; + }; + + rk806_dvs3_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl3"; + phandle = <0x2bb>; + }; + + rk806_dvs2_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b6>; + }; + + rk806_dvs2_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b2>; + }; + + rk806_dvs2_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b3>; + }; + + rk806_dvs1_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b1>; + }; + + rk806_dvs3_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b7>; + }; + + rk806_dvs2_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b5>; + }; + + rk806_dvs3_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b8>; + }; + }; + + pwrkey { + status = "okay"; + }; + + regulators { + + PLDO_REG2 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + DCDC_REG4 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-init-microvolt = <0xb71b0>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x2bc>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG2 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x12>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG4 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG9 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG2 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + PLDO_REG5 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG7 { + regulator-max-microvolt = <0x1e8480>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1e8480>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG3 { + regulator-max-microvolt = <0x124f80>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG5 { + regulator-max-microvolt = <0xdbba0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x42>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + DCDC_REG10 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG1 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x43>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG1 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-enable-ramp-delay = <0x190>; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x62>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG5 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG6 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG8 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x325aa0>; + regulator-on-in-suspend; + }; + }; + + NLDO_REG1 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG4 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG6 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + }; + + usbhost3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "disabled"; + phandle = <0x258>; + + usb@fcd00000 { + snps,dis_enblslpm_quirk; + phy-names = "usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x237>; + interrupts = <0x00 0xde 0x04>; + snps,dis_rxdet_inp3_quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "disabled"; + snps,parkmode-disable-ss-quirk; + phys = <0x70 0x04>; + reg = <0x00 0xfcd00000 0x00 0x400000>; + phandle = <0x259>; + dr_mode = "host"; + reset-names = "usb3-host"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + pcie@fe190000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x40 0x4f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x211 0x02 0x220>; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x108 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + linux,pci-domain = <0x04>; + phandle = <0x28d>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xfa 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x107>; + interrupt-controller; + }; + }; + + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x238>; + }; + + aliases { + i2c3 = "/i2c@feab0000"; + ethernet0 = "/ethernet@fe1b0000"; + pwm9 = "/pwm@febe0010"; + pwm14 = "/pwm@febf0020"; + spi2 = "/spi@feb20000"; + usbdp0 = "/phy@fed80000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + dsi1 = "/dsi@fde30000"; + hdmi1 = "/hdmi@fdea0000"; + serial7 = "/serial@feba0000"; + i2c1 = "/i2c@fea90000"; + pwm7 = "/pwm@febd0030"; + pwm12 = "/pwm@febf0000"; + jpege3 = "/jpege-core@fdbac000"; + spi0 = "/spi@feb00000"; + hdptx1 = "/phy@fed70000"; + csi2dphy5 = "/csi2-dphy5"; + serial5 = "/serial@feb80000"; + csi2dcphy1 = "/csi2-dcphy1"; + pwm5 = "/pwm@febd0010"; + mmc1 = "/mmc@fe2c0000"; + pwm10 = "/pwm@febe0020"; + jpege1 = "/jpege-core@fdba4000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + csi2dphy3 = "/csi2-dphy3"; + serial3 = "/serial@feb60000"; + edp0 = "/edp@fdec0000"; + pwm3 = "/pwm@fd8b0030"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + csi2dphy1 = "/csi2-dphy1"; + serial1 = "/serial@feb40000"; + pwm1 = "/pwm@fd8b0010"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + spi5 = "/spi@fe2b0000"; + gpio3 = "/pinctrl/gpio@fec40000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + i2c4 = "/i2c@feac0000"; + ethernet1 = "/ethernet@fe1c0000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + pwm15 = "/pwm@febf0030"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + spi3 = "/spi@feb30000"; + usbdp1 = "/phy@fed90000"; + gpio1 = "/pinctrl/gpio@fec20000"; + serial8 = "/serial@febb0000"; + i2c2 = "/i2c@feaa0000"; + pwm8 = "/pwm@febe0000"; + pwm13 = "/pwm@febf0010"; + spi1 = "/spi@feb10000"; + dsi0 = "/dsi@fde20000"; + hdmi0 = "/hdmi@fde80000"; + serial6 = "/serial@feb90000"; + i2c0 = "/i2c@fd880000"; + pwm6 = "/pwm@febd0020"; + mmc2 = "/mmc@fe2d0000"; + pwm11 = "/pwm@febe0030"; + jpege2 = "/jpege-core@fdba8000"; + hdptx0 = "/phy@fed60000"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + dp1 = "/dp@fde60000"; + csi2dphy4 = "/csi2-dphy4"; + serial4 = "/serial@feb70000"; + edp1 = "/edp@fded0000"; + csi2dcphy0 = "/csi2-dcphy0"; + pwm4 = "/pwm@febd0000"; + mmc0 = "/mmc@fe2e0000"; + jpege0 = "/jpege-core@fdba0000"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2c7 = "/i2c@fec90000"; + csi2dphy2 = "/csi2-dphy2"; + serial2 = "/serial@feb50000"; + pwm2 = "/pwm@fd8b0020"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdcp0 = "/hdcp@fde40000"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + csi2dphy0 = "/csi2-dphy0"; + serial0 = "/serial@fd890000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm0 = "/pwm@fd8b0000"; + spi4 = "/spi@fecb0000"; + gpio2 = "/pinctrl/gpio@fec30000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + serial9 = "/serial@febc0000"; + }; + + spdif-tx@fdde8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc5 0x04>; + clocks = <0x02 0x25c 0x02 0x258>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + phandle = <0x47d>; + dmas = <0xf1 0x08>; + }; + + i2s@fe490000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x12d 0x12e>; + pinctrl-0 = <0x12a 0x12b>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x12c>; + status = "disabled"; + reg = <0x00 0xfe490000 0x00 0x1000>; + phandle = <0x298>; + dmas = <0xf1 0x00 0xf1 0x01>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5d0000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + phandle = <0x18b>; + + usb2-phy@0 { + clock-output-names = "usb480m_phy0"; + clock-names = "phyclk"; + resets = <0x02 0xc0047 0x02 0x488>; + interrupts = <0x00 0x189 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x00 0x10>; + phandle = <0x18d>; + reset-names = "phy\0apb"; + + otg-port { + #phy-cells = <0x00>; + rockchip,typec-vbus-det; + status = "okay"; + phandle = <0x66>; + }; + }; + }; + + i2c@feac0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14b>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb3 0x02 0xab>; + interrupts = <0x00 0x141 0x04>; + clocks = <0x02 0x90 0x02 0x88>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + phandle = <0x2a7>; + reset-names = "i2c\0apb"; + + pc9202@3c { + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + index = <0x01>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x476>; + }; + + firmware { + + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + phandle = <0x222>; + }; + + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; + }; + + scmi { + shmem = <0x46>; + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; + + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; + }; + + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; + }; + }; + }; + + rkvenc-core@fdbd0000 { + power-domains = <0x60 0x10>; + iommus = <0xc2>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + interrupts = <0x00 0x65 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + phandle = <0x272>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + iommu@fdcc7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x88 0x04>; + clocks = <0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp1_mmu"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xd1>; + }; + + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22b>; + }; + + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; + + gpu@fb000000 { + power-domains = <0x60 0x0c>; + downdifferential = <0x0a>; + mali-supply = <0x62>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + upthreshold = <0x1e>; + compatible = "arm,mali-bifrost"; + dynamic-power-coefficient = <0xba6>; + status = "okay"; + interrupt-names = "GPU\0MMU\0JOB"; + mem-supply = <0x62>; + reg = <0x00 0xfb000000 0x00 0x200000>; + phandle = <0x5f>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + }; + + csi2-dphy4 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x213>; + }; + + mipi4-csi2-hw@fdd50000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x328>; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + clocks = <0x02 0x1d3>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + phandle = <0x4b>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; + + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x235>; + }; + + rkisp1-vir0 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23f>; + }; + + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; + + test-power { + status = "okay"; + }; + + usb-5v { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0xfe 0x03 0x00>; + pinctrl-0 = <0x1ef>; + regulator-always-on; + enable-active-high; + regulator-name = "usb_5v"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b1>; + }; + + phy@feda0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + clocks = <0x02 0x108 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x190>; + reg = <0x00 0xfeda0000 0x00 0x10000>; + phandle = <0x2f>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + mod-sleep-regulator { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x7b 0x15 0x00>; + pinctrl-0 = <0x1ee>; + regulator-always-on; + enable-active-high; + regulator-name = "mod_sleep"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4ae>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; + + crypto@fe370000 { + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + compatible = "rockchip,rk3588-crypto"; + status = "disabled"; + reg = <0x00 0xfe370000 0x00 0x2000>; + phandle = <0x296>; + reset-names = "crypto-rst"; + }; + + i2s@fddf4000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3ef>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + phandle = <0x1e0>; + dmas = <0xf2 0x04>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + mipi0-csi2-hw@fdd10000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x324>; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + clocks = <0x02 0x1cf>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + phandle = <0x47>; + reset-names = "srst_csihost_p"; + }; + + mipi4-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x228>; + }; + + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; + + dsi@fde30000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x30>; + reg = <0x00 0xfde30000 0x00 0x10000>; + phandle = <0x283>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x284>; + + endpoint@1 { + remote-endpoint = <0x3a>; + status = "disabled"; + reg = <0x01>; + phandle = <0xef>; + }; + + endpoint@0 { + remote-endpoint = <0xf4>; + status = "disabled"; + reg = <0x00>; + phandle = <0xea>; + }; + }; + }; + }; + + iommu@fcb00000 { + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + phandle = <0x257>; + }; + + rkcif-mipi-lvds3 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x57>; + }; + + vcc-hub-regulator { + regulator-boot-on; + gpio = <0x182 0x01 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4af>; + }; + + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; + + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; + + rkisp@fdcb0000 { + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + compatible = "rockchip,rk3588-rkisp"; + status = "okay"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + phandle = <0x58>; + }; + + serial@feba0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeba0000 0x00 0x100>; + phandle = <0x2cf>; + dmas = <0xf2 0x07 0xf2 0x08>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x232>; + }; + + chosen { + linux,initrd-end = <0x00 0xaac72ae>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=1 rcu_nocbs=all comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-start = <0x00 0xa200000>; + phandle = <0x48d>; + }; + + hdmi@fde80000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "okay"; + rockchip,grf = <0xc8>; + phys = <0xfd>; + enable-gpios = <0xfe 0x08 0x00>; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + phandle = <0x1d4>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x288>; + + endpoint@1 { + remote-endpoint = <0xff>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe2>; + }; + + endpoint@2 { + remote-endpoint = <0x100>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe8>; + }; + + endpoint@0 { + remote-endpoint = <0x3c>; + status = "okay"; + reg = <0x00>; + phandle = <0xdc>; + }; + }; + }; + }; + + cluster2-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x27 0x28 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x29>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x1a>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + rkcif-dvp { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-dvp"; + status = "disabled"; + phandle = <0x51>; + }; + + rkisp0-vir2 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x59>; + reg = <0x00>; + phandle = <0x56>; + }; + }; + }; + + i2c@fea90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x148>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb0 0x02 0xa8>; + interrupts = <0x00 0x13e 0x04>; + clocks = <0x02 0x8d 0x02 0x85>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfea90000 0x00 0x1000>; + phandle = <0x2a4>; + reset-names = "i2c\0apb"; + + rk8602@42 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0xb3>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; + }; + + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; + }; + + venc-opp-table { + nvmem-cells = <0xc6 0xc7>; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,grf = <0xc8>; + nvmem-cell-names = "leakage\0opp-info"; + phandle = <0xc4>; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + }; + + iommu@fdc38700 { + power-domains = <0x60 0x0e>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x60 0x04>; + clocks = <0x02 0x190 0x02 0x18f>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec0_mmu"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + phandle = <0xc9>; + rockchip,master-handle-irq; + }; + + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; + }; + + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; + }; + + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; + }; + + csi2-dphy2 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x211>; + }; + + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; + + uio@fe1b0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + phandle = <0x488>; + rockchip,ethernet = <0x1bd>; + }; + + iommu@fdb70f00 { + power-domains = <0x60 0x1e>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_1_mmu"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + phandle = <0xba>; + }; + + vcc5v0-usb { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usb"; + compatible = "regulator-fixed"; + phandle = <0x1dd>; + vin-supply = <0x1cd>; + }; + + fiq-debugger { + pinctrl-names = "default"; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "okay"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; + + phy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1af>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + ethernet@fe1b0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x1bf>; + snps,reset-active-low; + pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x1c0>; + local-mac-address = [da 2f 1a d4 a9 85]; + resets = <0x02 0x20a>; + interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x02 0x01>; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x1bd>; + phy-handle = <0x1c6>; + reset-names = "stmmaceth"; + tx_delay = <0x31>; + snps,axi-config = <0x1be>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x489>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1c6>; + }; + }; + + tx-queues-config { + phandle = <0x1c0>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x1be>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x1bf>; + + queue0 { + }; + }; + }; + + pvtm@fda60000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; + + pvtm@2 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2ca 0x02 0x1b>; + reg = <0x02>; + }; + }; + + rkispp@fdcd8000 { + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8d 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + phandle = <0x5c>; + }; + + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; + + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; + }; + + rkcif-mipi-lvds1 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x53>; + }; + + av1d@fdc70000 { + power-domains = <0x60 0x17>; + iommus = <0xce>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + reg-names = "vcd\0cache\0afbc"; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + compatible = "rockchip,av1-decoder"; + status = "okay"; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + phandle = <0x276>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + vcc-hub-reset-regulator { + regulator-boot-on; + gpio = <0x182 0x04 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a0>; + }; + + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; + }; + + serial@feb70000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb70000 0x00 0x100>; + phandle = <0x2cc>; + dmas = <0xf1 0x09 0xf1 0x0a>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "okay"; + rockchip,cif = <0x55>; + phandle = <0x233>; + + port { + + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; + }; + }; + }; + + i2c@feca0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x186>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb7 0x02 0xaf>; + interrupts = <0x00 0x145 0x04>; + clocks = <0x02 0x94 0x02 0x8c>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeca0000 0x00 0x1000>; + phandle = <0x2e5>; + reset-names = "i2c\0apb"; + }; + + vcc-sdcard-pwr-en-regulator { + regulator-boot-on; + gpio = <0xfe 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_sdcard_pwr_en"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a5>; + }; + + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x230>; + }; + + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; + }; + + phy@fee00000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bd>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20005 0x02 0x4d6>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + reset-names = "combphy-apb\0combphy"; + }; + + can@fea50000 { + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea50000 0x00 0x1000>; + phandle = <0x2a0>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4b0000 { + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x139 0x13a>; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + clock-names = "pdm_clk\0pdm_hclk"; + clocks = <0x02 0x29f 0x02 0x29e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x138>; + status = "disabled"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + phandle = <0x29a>; + dmas = <0x7c 0x04>; + }; + + rkisp-unite-mmu@fdcb7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp0_mmu\0isp1_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xcf>; + }; + + syscon@fd5a6000 { + clocks = <0x72>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + phandle = <0xf5>; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + l2-cache-b0 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x17>; + }; + + l2-cache-l3 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x15>; + }; + + cpu@300 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x15>; + i-cache-size = <0x8000>; + reg = <0x300>; + enable-method = "psci"; + phandle = <0x09>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + l2-cache-l1 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x13>; + }; + + cpu@600 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + cpu-supply = <0x1c>; + clocks = <0x0e 0x03>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + dynamic-power-coefficient = <0x12c>; + d-cache-size = <0x10000>; + next-level-cache = <0x1b>; + i-cache-size = <0x10000>; + mem-supply = <0x1c>; + reg = <0x600>; + enable-method = "psci"; + phandle = <0x0c>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x1a>; + i-cache-sets = <0x100>; + #cooling-cells = <0x02>; + }; + + l2-cache-b3 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x1d>; + }; + + idle-states { + entry-method = "psci"; + + cpu-sleep { + entry-latency-us = <0x64>; + local-timer-stop; + exit-latency-us = <0x78>; + arm,psci-suspend-param = <0x10000>; + compatible = "arm,idle-state"; + phandle = <0x10>; + min-residency-us = <0x3e8>; + }; + }; + + cpu-map { + + cluster2 { + + core1 { + cpu = <0x0d>; + }; + + core0 { + cpu = <0x0c>; + }; + }; + + cluster0 { + + core3 { + cpu = <0x09>; + }; + + core1 { + cpu = <0x07>; + }; + + core2 { + cpu = <0x08>; + }; + + core0 { + cpu = <0x06>; + }; + }; + + cluster1 { + + core1 { + cpu = <0x0b>; + }; + + core0 { + cpu = <0x0a>; + }; + }; + }; + + l3-cache { + cache-size = <0x300000>; + cache-sets = <0x1000>; + compatible = "cache"; + cache-line-size = <0x40>; + phandle = <0x1e>; + }; + + cpu@200 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x14>; + i-cache-size = <0x8000>; + reg = <0x200>; + enable-method = "psci"; + phandle = <0x08>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + l2-cache-b1 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x19>; + }; + + cpu@500 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x02>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + d-cache-size = <0x10000>; + next-level-cache = <0x19>; + i-cache-size = <0x10000>; + reg = <0x500>; + enable-method = "psci"; + phandle = <0x0b>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x16>; + i-cache-sets = <0x100>; + }; + + cpu@0 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + cpu-supply = <0x12>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + dynamic-power-coefficient = <0x64>; + d-cache-size = <0x8000>; + next-level-cache = <0x11>; + i-cache-size = <0x8000>; + mem-supply = <0x12>; + reg = <0x00>; + enable-method = "psci"; + phandle = <0x06>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + #cooling-cells = <0x02>; + }; + + l2-cache-l2 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x14>; + }; + + l2-cache-l0 { + cache-size = <0x20000>; + cache-sets = <0x200>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + cpu@100 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a55"; + d-cache-size = <0x8000>; + next-level-cache = <0x13>; + i-cache-size = <0x8000>; + reg = <0x100>; + enable-method = "psci"; + phandle = <0x07>; + d-cache-sets = <0x80>; + operating-points-v2 = <0x0f>; + i-cache-sets = <0x80>; + }; + + cpu@400 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + cpu-supply = <0x18>; + clocks = <0x0e 0x02>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + dynamic-power-coefficient = <0x12c>; + d-cache-size = <0x10000>; + next-level-cache = <0x17>; + i-cache-size = <0x10000>; + mem-supply = <0x18>; + reg = <0x400>; + enable-method = "psci"; + phandle = <0x0a>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x16>; + i-cache-sets = <0x100>; + #cooling-cells = <0x02>; + }; + + l2-cache-b2 { + cache-size = <0x80000>; + cache-sets = <0x400>; + compatible = "cache"; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x1b>; + }; + + cpu@700 { + d-cache-line-size = <0x40>; + capacity-dmips-mhz = <0x400>; + clocks = <0x0e 0x03>; + i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; + device_type = "cpu"; + compatible = "arm,cortex-a76"; + d-cache-size = <0x10000>; + next-level-cache = <0x1d>; + i-cache-size = <0x10000>; + reg = <0x700>; + enable-method = "psci"; + phandle = <0x0d>; + d-cache-sets = <0x100>; + operating-points-v2 = <0x1a>; + i-cache-sets = <0x100>; + }; + }; + + vcc-hub3-reset-regulator { + gpio = <0x182 0x06 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub3_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a1>; + }; + + rkispp1-vir0 { + rockchip,hw = <0x5c>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x244>; + }; + + saradc@fec10000 { + vref-supply = <0x177>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + interrupts = <0x00 0x18e 0x04>; + clocks = <0x02 0x9d 0x02 0x9c>; + #io-channel-cells = <0x01>; + compatible = "rockchip,rk3588-saradc"; + status = "okay"; + reg = <0x00 0xfec10000 0x00 0x10000>; + phandle = <0x1d9>; + reset-names = "saradc-apb"; + }; + + rkisp0-vir0 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23b>; + }; + + __symbols__ { + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2c3 = "/i2c@feab0000"; + scmi_shmem = "/sram@10f000/sram@0"; + rkispp0_vir0 = "/rkispp0-vir0"; + qos_jpeg_enc0 = "/qos@fdf66400"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + usb_host1_ohci = "/usb@fc8c0000"; + pwm9 = "/pwm@febe0010"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + qos_usb3_1 = "/qos@fdf3e000"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + hwlock = "/hwspinlock@fe5a0000"; + pcie3x2 = "/pcie@fe160000"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; + mclkin_i2s0 = "/clocks/mclkin-i2s0"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + rkvenc0_mmu = "/iommu@fdbdf000"; + pwm14 = "/pwm@febf0020"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + mipi2_csi2 = "/mipi2-csi2"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + pcie2x1l1 = "/pcie@fe180000"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + optee = "/firmware/optee"; + l2_cache_b2 = "/cpus/l2-cache-b2"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + vdpu = "/vdpu@fdb50400"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + thermal_zones = "/thermal-zones"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + qos_iep = "/qos@fdf66000"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + vp1 = "/vop@fdd90000/ports/port@1"; + bigcore1_grf = "/syscon@fd592000"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + cpu_l1 = "/cpus/cpu@100"; + uart8 = "/serial@febb0000"; + rkisp1_vir3 = "/rkisp1-vir3"; + qos_vop_m1 = "/qos@fdf82200"; + pcie_clk2 = "/pcie-clk2"; + cluster2_opp_table = "/cluster2-opp-table"; + usb_grf = "/syscon@fd5ac000"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + jpege0_mmu = "/iommu@fdba0800"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + power_led = "/leds/power"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; + csi2_dphy1 = "/csi2-dphy1"; + spi2 = "/spi@feb20000"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + vo1_grf = "/syscon@fd5a8000"; + pcie_essd = "/pcie-essd"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + saradc = "/saradc@fec10000"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + dsi1 = "/dsi@fde30000"; + venc_opp_table = "/venc-opp-table"; + qos_isp0_mwo = "/qos@fdf40500"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; + route_edp1 = "/display-subsystem/route/route-edp1"; + hdmi1 = "/hdmi@fdea0000"; + crypto = "/crypto@fe370000"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + dfi = "/dfi@fe060000"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pinctrl = "/pinctrl"; + rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + mailbox1 = "/mailbox@fec70000"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + combphy1_ps = "/phy@fee10000"; + hdptxphy0_grf = "/syscon@fd5e0000"; + sdei = "/firmware/sdei"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + route_rgb = "/display-subsystem/route/route-rgb"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + i2c1 = "/i2c@fea90000"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + pwm7 = "/pwm@febd0030"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + gmac0 = "/ethernet@fe1b0000"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; + rockchip_system_monitor = "/rockchip-system-monitor"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pwm12 = "/pwm@febf0000"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + i2s1_8ch = "/i2s@fe480000"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + vcc_4g = "/vcc-4g-regulator"; + firefly_leds = "/leds"; + jpege3 = "/jpege-core@fdbac000"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + pmu1_grf = "/syscon@fd58a000"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + usbc0 = "/i2c@fec80000/fusb302@22"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + uart6 = "/serial@feb90000"; + rkisp1_vir1 = "/rkisp1-vir1"; + sdhci = "/mmc@fe2e0000"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; + target = "/thermal-zones/soc-thermal/trips/trip-point-1"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; + gpu = "/gpu@fb000000"; + spi0 = "/spi@feb00000"; + iep = "/iep@fdbb0000"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + spdif_tx5 = "/spdif-tx@fddb8000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; + usb_host0_ohci = "/usb@fc840000"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; + mipidcphy0_grf = "/syscon@fd5e8000"; + vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; + pcie30phy = "/phy@fee80000"; + dmc = "/dmc"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + mipidcphy1 = "/phy@fedb0000"; + dp1_sound = "/dp1-sound"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + scmi = "/firmware/scmi"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + l3_cache = "/cpus/l3-cache"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mipi1_csi2 = "/mipi1-csi2"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + usbdp_phy0 = "/phy@fed80000"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + i2s9_8ch = "/i2s@fddfc000"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + i2s2_2ch = "/i2s@fe490000"; + pwm5 = "/pwm@febd0010"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + rkisp0_vir3 = "/rkisp0-vir3"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; + vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; + qos_isp0_mro = "/qos@fdf40400"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + pwm10 = "/pwm@febe0020"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + rktimer = "/timer@feae0000"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + jpege1 = "/jpege-core@fdba4000"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; + vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + cpu_b3 = "/cpus/cpu@700"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + dmc_opp_table = "/dmc-opp-table"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + uart4 = "/serial@feb70000"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + dmac2 = "/dma-controller@fed10000"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + qos_gpu_m2 = "/qos@fdf35400"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + cluster0_opp_table = "/cluster0-opp-table"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + otp_id = "/otp@fecc0000/id@7"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + qos_rga3_0 = "/qos@fdf67000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; + spdif_tx3 = "/spdif-tx@fdde0000"; + rkispp0 = "/rkispp@fdcd0000"; + xin32k = "/clocks/xin32k"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + qos_usb2host_1 = "/qos@fdf3e600"; + bt_sco = "/bt-sco"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + adc_keys = "/adc-keys"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + syssram = "/sram@ff001000"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + qos_hdmirx = "/qos@fdf81200"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + hw_decompress = "/decompress@fea80000"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + rkvenc1_mmu = "/iommu@fdbef000"; + edp0 = "/edp@fdec0000"; + rkvenc_ccu = "/rkvenc-ccu"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + power = "/power-management@fd8d8000/power-controller"; + vad = "/vad@fe4d0000"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + pwm3 = "/pwm@fd8b0030"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + rkcif_mmu = "/iommu@fdce0800"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + sata2 = "/sata@fe230000"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + hdmiin_sound = "/hdmiin-sound"; + rkisp0_vir1 = "/rkisp0-vir1"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + qos_hdcp1 = "/qos@fdf81000"; + scmi_reset = "/firmware/scmi/protocol@16"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; + edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; + rkisp0 = "/rkisp@fdcb0000"; + dsu_grf = "/syscon@fd598000"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + csi2_dcphy0 = "/csi2-dcphy0"; + usb2phy0_grf = "/syscon@fd5d0000"; + scmi_clk = "/firmware/scmi/protocol@14"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + jpege1_mmu = "/iommu@fdba4800"; + qos_rkvenc1_m1ro = "/qos@fdf61200"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + vcc5v0_host = "/vcc5v0-host"; + cru = "/clock-controller@fd7c0000"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + cpu_b1 = "/cpus/cpu@500"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + rknpu_mmu = "/iommu@fdab9000"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + qos_isp1_mwo = "/qos@fdf41000"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + rga3_0_mmu = "/iommu@fdb60f00"; + uart2 = "/serial@feb50000"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + fec0_mmu = "/iommu@fdcd0f00"; + mipi0_csi2 = "/mipi0-csi2"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; + qos_rkvdec1 = "/qos@fdf63000"; + dmac0 = "/dma-controller@fea10000"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + qos_gpu_m0 = "/qos@fdf35000"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; + qos_av1 = "/qos@fdf64000"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + jpegd_mmu = "/iommu@fdb90480"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + otp = "/otp@fecc0000"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + qos_jpeg_enc3 = "/qos@fdf66a00"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; + pdm1 = "/pdm@fe4c0000"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + qos_vicap_m0 = "/qos@fdf40600"; + gic = "/interrupt-controller@fe600000"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + hdptxphy1 = "/phy@fed70000"; + route_dp1 = "/display-subsystem/route/route-dp1"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + usbdrd3_1 = "/usbdrd3_1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + pwm1 = "/pwm@fd8b0010"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; + sata0 = "/sata@fe210000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; + can2 = "/can@fea70000"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + spll = "/clocks/spll"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + sata_pins = "/pinctrl/sata/sata-pins"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + qos_npu1 = "/qos@fdf70000"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; + rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; + pipe_phy0_grf = "/syscon@fd5bc000"; + es8388 = "/i2c@fec80000/es8388@11"; + spdif_rx2 = "/spdif-rx@fde18000"; + usb_host1_ehci = "/usb@fc880000"; + xin24m = "/clocks/xin24m"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + acdcdig_dsm = "/codec-digital@fe500000"; + vop_grf = "/syscon@fd5a4000"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + i2s6_8ch = "/i2s@fddf4000"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + mipidphy0_grf = "/syscon@fd5b4000"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + csi2_dphy4 = "/csi2-dphy4"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + qos_sdio = "/qos@fdf39000"; + tsadc = "/tsadc@fec00000"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + mdio1 = "/ethernet@fe1c0000/mdio"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpu_opp_table = "/gpu-opp-table"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + vdpu_mmu = "/iommu@fdb50800"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + combphy0_ps = "/phy@fee00000"; + rgb = "/syscon@fd58c000/rgb"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + uart0 = "/serial@fd890000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; + pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; + pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + qos_rga2_mwo = "/qos@fdf66e00"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; + bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + qos_fisheye0 = "/qos@fdf40000"; + i2c4 = "/i2c@feac0000"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + qos_jpeg_enc1 = "/qos@fdf66600"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s3_2ch = "/i2s@fe4a0000"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; + fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; + hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + qos_isp1_mro = "/qos@fdf41100"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_jpeg_dec = "/qos@fdf66200"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + isp0_mmu = "/iommu@fdcb7f00"; + qos_npu0_mwr = "/qos@fdf72000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + pwm15 = "/pwm@febf0030"; + vop_mmu = "/iommu@fdd97e00"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + pcie2x1l2 = "/pcie@fe190000"; + i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + iep_mmu = "/iommu@fdbb0800"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + can0 = "/can@fea50000"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + arm_pmu = "/arm-pmu"; + vp2 = "/vop@fdd90000/ports/port@2"; + rk806single = "/spi@feb20000/rk806single@0"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; + rng = "/rng@fe378000"; + cpu_l2 = "/cpus/cpu@200"; + uart9 = "/serial@febc0000"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + usbdpphy0_grf = "/syscon@fd5c8000"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + pcie_clk3 = "/pcie-clk3"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + rkcif = "/rkcif@fdce0000"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + spdif_rx0 = "/spdif-rx@fde08000"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + csi2_dphy2 = "/csi2-dphy2"; + spi3 = "/spi@feb30000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + gpio1 = "/pinctrl/gpio@fec20000"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + vcc5v0_sys = "/vcc5v0-sys"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; + i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + wdt = "/watchdog@feaf0000"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + cspmu = "/cspmu@fd10c000"; + gmac_uio0 = "/uio@fe1b0000"; + av1d_mmu = "/iommu@fdca0000"; + mailbox2 = "/mailbox@fece0000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + rga3_core0 = "/rga@fdb60000"; + i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + i2c2 = "/i2c@feaa0000"; + npu_grf = "/syscon@fd5a2000"; + i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; + mipi5_csi2 = "/mipi5-csi2"; + pwm8 = "/pwm@febe0000"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + rga2 = "/rga@fdb80000"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + qos_usb3_0 = "/qos@fdf3e200"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; + mcum1_pins = "/pinctrl/mcu/mcum1-pins"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + usb_host0_ehci = "/usb@fc800000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + gmac1 = "/ethernet@fe1c0000"; + i2s10_8ch = "/i2s@fde00000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + usb2phy1_grf = "/syscon@fd5d4000"; + pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; + jpege2_mmu = "/iommu@fdba8800"; + pwm13 = "/pwm@febf0010"; + pcie2x1l0 = "/pcie@fe170000"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + qos_rga2_mro = "/qos@fdf66c00"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + pca9555 = "/i2c@feab0000/gpio@21"; + qos_sdmmc = "/qos@fdf3d800"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + rknpu = "/npu@fdab0000"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + vp0 = "/vop@fdd90000/ports/port@0"; + rga3_1_mmu = "/iommu@fdb70f00"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + cpu_l0 = "/cpus/cpu@0"; + uart7 = "/serial@feba0000"; + rkisp1_vir2 = "/rkisp1-vir2"; + fec1_mmu = "/iommu@fdcd8f00"; + qos_vop_m0 = "/qos@fdf82000"; + pcie_clk1 = "/pcie-clk1"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + hdmi0_sound = "/hdmi0-sound"; + ioc = "/syscon@fd5f0000"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + avsd = "/avsd-plus@fdb51000"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + sfc = "/spi@fe2b0000"; + csi2_dphy0 = "/csi2-dphy0"; + spi1 = "/spi@feb10000"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + gpu_grf = "/syscon@fd5a0000"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + wireless_bluetooth = "/wireless-bluetooth"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + bt_sound = "/bt-sound"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + dsi0 = "/dsi@fde20000"; + pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + route_edp0 = "/display-subsystem/route/route-edp0"; + hdmi0 = "/hdmi@fde80000"; + es8388_sound = "/es8388-sound"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + vop_out = "/vop@fdd90000/ports"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + usbdp_phy1 = "/phy@fed90000"; + mailbox0 = "/mailbox@fec60000"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + sdmmc = "/mmc@fe2c0000"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + i2c0 = "/i2c@fd880000"; + pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + soc_thermal = "/thermal-zones/soc-thermal"; + cluster1_opp_table = "/cluster1-opp-table"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; + pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; + pwm6 = "/pwm@febd0020"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + hym8563 = "/i2c@fd880000/hym8563@51"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + qos_mcu_npu = "/qos@fdf72400"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; + pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; + pipe_phy1_grf = "/syscon@fd5c0000"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm11 = "/pwm@febe0030"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + i2s7_8ch = "/i2s@fddf8000"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + mipidphy1_grf = "/syscon@fd5b5000"; + usbhost3_0 = "/usbhost3_0"; + jpege2 = "/jpege-core@fdba8000"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + av1d = "/av1d@fdc70000"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; + sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; + rockchip_suspend = "/rockchip-suspend"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + npu_thermal = "/thermal-zones/npu-thermal"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + uart5 = "/serial@feb80000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + rkisp1_vir0 = "/rkisp1-vir0"; + fiq_debugger = "/fiq-debugger"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; + spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; + sdio = "/mmc@fe2d0000"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + qos_gpu_m3 = "/qos@fdf35600"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + user_led = "/leds/user"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; + qos_rga3_1 = "/qos@fdf36000"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + spdif_tx4 = "/spdif-tx@fdde8000"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + rkispp1 = "/rkispp@fdcd8000"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + mipi4_csi2 = "/mipi4-csi2"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + vcc5v0_host3 = "/vcc5v0-host3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + dp1 = "/dp@fde60000"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + vop_pins = "/pinctrl/vop/vop-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + vcc_hub = "/vcc-hub-regulator"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + mipidcphy0 = "/phy@feda0000"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + vop = "/vop@fdd90000"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + vepu = "/vepu@fdb50000"; + cif_clk = "/pinctrl/cif/cif-clk"; + pcie30_phy_grf = "/syscon@fd5b8000"; + isp1_mmu = "/iommu@fdcc7f00"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + rkvdec1_mmu = "/iommu@fdc48700"; + edp1 = "/edp@fded0000"; + cam0_cam1_switch = "/cam0-cam1-switch"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + center_thermal = "/thermal-zones/center-thermal"; + uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; + uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; + pwm4 = "/pwm@febd0000"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + rkisp0_vir2 = "/rkisp0-vir2"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + l2_cache_l2 = "/cpus/l2-cache-l2"; + pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; + qos_vdpu = "/qos@fdf67200"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + rkisp1 = "/rkisp@fdcc0000"; + usbdpphy1_grf = "/syscon@fd5cc000"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + csi2_dcphy1 = "/csi2-dcphy1"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; + chosen = "/chosen"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + mpp_srv = "/mpp-srv"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; + debug = "/debug@fd104000"; + jpege0 = "/jpege-core@fdba0000"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + cpu_b2 = "/cpus/cpu@600"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + bigcore0_grf = "/syscon@fd590000"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + uart3 = "/serial@feb60000"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + dmac1 = "/dma-controller@fea30000"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + qos_gpu_m1 = "/qos@fdf35200"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + spdif_tx2 = "/spdif-tx@fddb0000"; + npu_opp_table = "/npu-opp-table"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + vo0_grf = "/syscon@fd5a6000"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + qos_usb2host_0 = "/qos@fdf3e400"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2c7 = "/i2c@fec90000"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + sata_reset = "/pinctrl/sata/sata-reset"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + qos_vicap_m1 = "/qos@fdf40800"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + usb2phy2_grf = "/syscon@fd5d8000"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + jpege3_mmu = "/iommu@fdbac800"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; + spdif_tx1_dc = "/spdif-tx1-dc"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + php_grf = "/syscon@fd5b0000"; + pwm2 = "/pwm@fd8b0020"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + sata1 = "/sata@fe220000"; + rkispp1_vir0 = "/rkispp1-vir0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + rkisp0_vir0 = "/rkisp0-vir0"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + qos_hdcp0 = "/qos@fdf80000"; + qos_npu0_mro = "/qos@fdf72200"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + display_subsystem = "/display-subsystem"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + qos_npu2 = "/qos@fdf71000"; + i2s0_8ch = "/i2s@fe470000"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + pmu = "/power-management@fd8d8000"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + csi2_dphy5 = "/csi2-dphy5"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + mipi3_csi2 = "/mipi3-csi2"; + pmu0_grf = "/syscon@fd588000"; + fan = "/pwm-fan"; + cpu_b0 = "/cpus/cpu@400"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + mmu600_php = "/iommu@fcb00000"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + hdmi1_sound = "/hdmi1-sound"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + mod_sleep = "/mod-sleep-regulator"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + uart1 = "/serial@feb40000"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + qos_rkvdec0 = "/qos@fdf62000"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + imx415 = "/i2c@fec80000/imx415@37"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + i2s4_8ch = "/i2s@fddc0000"; + ramoops = "/reserved-memory/ramoops@110000"; + dp0_sound = "/dp0-sound"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vcc12v_dcin = "/vcc12v-dcin"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + hdcp0 = "/hdcp@fde40000"; + qos_fisheye1 = "/qos@fdf40200"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + spdif_tx1_sound = "/spdif-tx1-sound"; + qos_jpeg_enc2 = "/qos@fdf66800"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + pdm0 = "/pdm@fe4b0000"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + pcie3x4 = "/pcie@fe150000"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + jpege_ccu = "/jpege-ccu"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + pipe_phy2_grf = "/syscon@fd5c4000"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + usb_5v = "/usb-5v"; + i2s8_8ch = "/i2s@fddc8000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + hdptxphy0 = "/phy@fed60000"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + route_dp0 = "/display-subsystem/route/route-dp0"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + usbdrd3_0 = "/usbdrd3_0"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + pwm0 = "/pwm@fd8b0000"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + can1 = "/can@fea60000"; + rkvtunnel = "/rkvtunnel"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + combphy2_psu = "/phy@fee20000"; + vp3 = "/vop@fdd90000/ports/port@3"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + mmu600_pcie = "/iommu@fc900000"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + cpu_l3 = "/cpus/cpu@300"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + spdif_rx1 = "/spdif-rx@fde10000"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + rkcif_dvp = "/rkcif-dvp"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + wireless_wlan = "/wireless-wlan"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + csi2_dphy3 = "/csi2-dphy3"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + spi4 = "/spi@fecb0000"; + litcore_grf = "/syscon@fd594000"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + sys_grf = "/syscon@fd58c000"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + mdio0 = "/ethernet@fe1b0000/mdio"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + gpio2 = "/pinctrl/gpio@fec30000"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + gmac_uio1 = "/uio@fe1c0000"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + jpegd = "/jpegd@fdb90000"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + rga3_core1 = "/rga@fdb70000"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + vcc5v0_usb = "/vcc5v0-usb"; + minidump = "/minidump"; + }; + + rkvdec-ccu@fdc30000 { + power-domains = <0x60 0x0e>; + rockchip,ccu-mode = <0x01>; + clock-names = "aclk_ccu"; + reg-names = "ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + clocks = <0x02 0x18e>; + compatible = "rockchip,rkv-decoder-v2-ccu"; + status = "okay"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdc30000 0x00 0x100>; + phandle = <0xca>; + reset-names = "video_ccu"; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + iommu@fdb50800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x76 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_vdpu_mmu"; + reg = <0x00 0xfdb50800 0x00 0x40>; + phandle = <0xb7>; + }; + + rga@fdb60000 { + power-domains = <0x60 0x16>; + iommus = <0xb9>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + compatible = "rockchip,rga3_core0"; + status = "okay"; + interrupt-names = "rga3_core0_irq"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + phandle = <0x269>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + vepu@fdb50000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x78 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-encoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_vepu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50000 0x00 0x400>; + phandle = <0x266>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + mipi3-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x227>; + }; + + hdmi0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,card-name = "rockchip-hdmi0"; + compatible = "rockchip,hdmi"; + status = "okay"; + phandle = <0x49b>; + rockchip,mclk-fs = <0x80>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + minidump-smem@1f0000 { + status = "disabled"; + reg = <0x00 0x1f0000 0x00 0x100>; + phandle = <0x1cf>; + no-map; + }; + + minidump-mem@c000000 { + status = "disabled"; + reg = <0x00 0xc000000 0x00 0x2000000>; + phandle = <0x1d0>; + no-map; + }; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reusable; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0xedf00000 0x00 0x2e0000>; + phandle = <0x37>; + }; + + ramoops@110000 { + boot-log-count = <0x01>; + record-size = <0x14000>; + pmsg-size = <0x30000>; + compatible = "ramoops"; + console-size = <0x80000>; + reg = <0x00 0x110000 0x00 0xe0000>; + phandle = <0x493>; + boot-log-size = <0x8000>; + ftrace-size = <0x00>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + }; + + pcie@fe160000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1ba>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x10 0x1f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20e 0x02 0x21d>; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x08 0x00>; + num-lanes = <0x02>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + linux,pci-domain = <0x01>; + phandle = <0x486>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xff 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b9>; + interrupt-controller; + }; + }; + + spdif-tx@fddb8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc6 0x04>; + clocks = <0x02 0x20f 0x02 0x20a>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + phandle = <0x1e2>; + dmas = <0xf1 0x16>; + }; + + pvtm@fdb30000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + + pvtm@4 { + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + clocks = <0x02 0x118>; + reg = <0x04>; + reset-names = "rts\0rst-p"; + }; + }; + + spdif-tx1-dc { + #sound-dai-cells = <0x00>; + compatible = "linux,spdif-dit"; + status = "disabled"; + phandle = <0x1d8>; + }; + + csi2-dphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "okay"; + phys = <0x2f 0x30>; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x32>; + reg = <0x01>; + phandle = <0x184>; + }; + + endpoint@0 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x31>; + reg = <0x00>; + phandle = <0x183>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x33>; + reg = <0x00>; + phandle = <0x4d>; + }; + }; + }; + }; + + rkisp-unite@fdcb0000 { + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp-unite"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + phandle = <0x277>; + }; + + sata@fe230000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + reg = <0x00 0xfe230000 0x00 0x1000>; + phandle = <0x291>; + ports-implemented = <0x01>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + bt-sound { + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49a>; + simple-audio-card,mclk-fs = <0x100>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + iommu@fdb90480 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x82 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpegd_mmu"; + reg = <0x00 0xfdb90480 0x00 0x40>; + phandle = <0xbb>; + }; + + hdcp@fde70000 { + power-domains = <0x60 0x1a>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde70000 0x00 0x80>; + phandle = <0x287>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xd8>; + }; + + spdif-tx@fe4f0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc2 0x04>; + clocks = <0x02 0x47 0x02 0x44>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + phandle = <0x1d7>; + dmas = <0xf1 0x05>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22d>; + }; + + es8388-sound { + pinctrl-names = "default"; + rockchip,cpu = <0x1da>; + pinctrl-0 = <0x1dc>; + rockchip,codec = <0x1db>; + hp-det-gpio = <0x79 0x13 0x00>; + rockchip,card-name = "rockchip-es8388"; + rockchip,format = "i2s"; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + compatible = "firefly,multicodecs-card"; + linein-type = <0x01>; + status = "okay"; + phandle = <0x49f>; + hp-con-gpio = <0x182 0x0b 0x00>; + firefly,not-use-dapm; + rockchip,mclk-fs = <0x180>; + }; + + spi@feb30000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x15d 0x15e 0x15f>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x149 0x04>; + clocks = <0x02 0xa6 0x02 0xa1>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + phandle = <0x2c8>; + dmas = <0xf1 0x11 0xf1 0x12>; + }; + + phy@fee80000 { + rockchip,pipe-grf = <0x76>; + clock-names = "pclk"; + rockchip,pcie30-phymode = <0x01>; + resets = <0x02 0x2000a>; + clocks = <0x02 0x188>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-pcie3-phy"; + status = "okay"; + reg = <0x00 0xfee80000 0x00 0x20000>; + phandle = <0x1b7>; + reset-names = "phy"; + rockchip,phy-grf = <0x1cc>; + }; + + vcc12v-dcin { + regulator-max-microvolt = <0xb71b00>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b00>; + regulator-name = "vcc12v_dcin"; + compatible = "regulator-fixed"; + phandle = <0x1cd>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + i2s@fde00000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x417>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfde00000 0x00 0x1000>; + phandle = <0x47e>; + dmas = <0xf2 0x18>; + reset-names = "rx-m"; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + i2s@fddfc000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x413>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + phandle = <0x27f>; + dmas = <0xf2 0x17>; + reset-names = "rx-m"; + }; + + usbdrd3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + usb-role-switch; + phy_type = "utmi_wide"; + quirk-skip-phy-init; + resets = <0x02 0x2a4>; + interrupts = <0x00 0xdc 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x66 0x67>; + reg = <0x00 0xfc000000 0x00 0x400000>; + phandle = <0x253>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x68>; + reg = <0x00>; + phandle = <0x17d>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x478>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x51>; + phandle = <0x22a>; + }; + + iommu@fdd97e00 { + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "vop_mmu"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + phandle = <0xd6>; + rockchip,disable-device-link-resume; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + i2c@fead0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14d>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb4 0x02 0xac>; + interrupts = <0x00 0x142 0x04>; + clocks = <0x02 0x91 0x02 0x89>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfead0000 0x00 0x1000>; + phandle = <0x2a8>; + reset-names = "i2c\0apb"; + }; + + iommu@fdba4800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7b 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege1_mmu"; + reg = <0x00 0xfdba4800 0x00 0x40>; + phandle = <0xbe>; + }; + + spdif-rx@fde10000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3ff>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde10000 0x00 0x1000>; + phandle = <0x47f>; + dmas = <0x7c 0x16>; + reset-names = "spdifrx-m"; + }; + + npu@fdab0000 { + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + iommus = <0xb2>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + power-domain-names = "npu0\0npu1\0npu2"; + rknpu-supply = <0xb3>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + compatible = "rockchip,rk3588-rknpu"; + status = "okay"; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + mem-supply = <0xb3>; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + phandle = <0x265>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + operating-points-v2 = <0xb1>; + }; + + hdmiphy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "okay"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0xfd>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + dmc-opp-table { + nvmem-cells = <0x44 0x45 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + phandle = <0x41>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,supported-hw; + + opp-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-1068000000 { + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-528000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0x06 0xffff>; + }; + }; + + rkvenc-core@fdbe0000 { + power-domains = <0x60 0x11>; + iommus = <0xc5>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + interrupts = <0x00 0x68 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + phandle = <0x273>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + watchdog@feaf0000 { + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + clocks = <0x02 0x6c 0x02 0x6b>; + compatible = "snps,dw-wdt"; + status = "okay"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + phandle = <0x2aa>; + }; + + syscon@fd5d8000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + phandle = <0x25d>; + + usb2-phy@8000 { + clock-output-names = "usb480m_phy2"; + clock-names = "phyclk"; + resets = <0x02 0xc0049 0x02 0x48a>; + interrupts = <0x00 0x187 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x8000 0x10>; + phandle = <0x69>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6c>; + }; + }; + }; + + cluster0-opp-table { + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,dsu-grf = <0x23>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x1f 0x20 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,opp-shared-dsu; + rockchip,high-temp-max-freq = <0x188940>; + opp-shared; + rockchip,reboot-freq = <0x159b40>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x22>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + phandle = <0x0f>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-1200000000 { + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-hz = <0x00 0x6590fa00>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + }; + + opp-j-1296000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-supported-hw = <0x04 0xffff>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-suspend; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + }; + + vcc-4g-regulator { + regulator-boot-on; + gpio = <0x182 0x00 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_4g"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b0>; + }; + + spi@fecb0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x187 0x188 0x189>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x14a 0x04>; + clocks = <0x02 0xa7 0x02 0xa2>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + phandle = <0x2e6>; + dmas = <0xf2 0x0d 0xf2 0x0e>; + }; + + spdif-rx@fde08000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3fd>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde08000 0x00 0x1000>; + phandle = <0x280>; + dmas = <0x7c 0x15>; + reset-names = "spdifrx-m"; + }; + + mipi3-csi2-hw@fdd40000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x327>; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + clocks = <0x02 0x1d2>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + phandle = <0x4a>; + reset-names = "srst_csihost_p"; + }; + + memory { + device_type = "memory"; + reg = <0x00 0x200000 0x00 0x8200000 0x00 0x9400000 0x00 0xe6c00000 0x01 0x00 0x01 0x00 0x02 0xf0000000 0x00 0x10000000 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; + }; + + jpege-core@fdba4000 { + power-domains = <0x60 0x15>; + iommus = <0xbe>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ae>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + interrupts = <0x00 0x7c 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba4000 0x00 0x400>; + phandle = <0x26e>; + reset-names = "video_a\0video_h"; + }; + + wireless-wlan { + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + wifi_chip_type = "rtl8822ce"; + compatible = "wlan-platdata"; + status = "okay"; + phandle = <0x4ab>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x475>; + }; + + dp@fde50000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0xf6>; + reg = <0x00 0xfde50000 0x00 0x4000>; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x38>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe0>; + }; + + endpoint@2 { + remote-endpoint = <0xf8>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe6>; + }; + + endpoint@0 { + remote-endpoint = <0xf7>; + status = "disabled"; + reg = <0x00>; + phandle = <0xda>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + rockchip-system-monitor { + rockchip,thermal-zone = "soc-thermal"; + compatible = "rockchip,system-monitor"; + phandle = <0x247>; + }; + + vcc3v3-pcie30 { + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc3v3_pcie30"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x1b8>; + vin-supply = <0x1cd>; + gpios = <0x182 0x04 0x00>; + }; + + phy@fedb0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + clocks = <0x02 0x109 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x191>; + reg = <0x00 0xfedb0000 0x00 0x10000>; + phandle = <0x30>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + rkvdec-core@fdc38000 { + power-domains = <0x60 0x0e>; + iommus = <0xc9>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + interrupts = <0x00 0x5f 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec0"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xfff00000 0x100000>; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + phandle = <0x274>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcb>; + }; + + minidump { + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + compatible = "rockchip,minidump"; + status = "disabled"; + phandle = <0x491>; + }; +}; diff --git a/scripts/make/rk3588.mk b/scripts/make/rk3588.mk index 51f795cf..34f534fc 100644 --- a/scripts/make/rk3588.mk +++ b/scripts/make/rk3588.mk @@ -13,4 +13,15 @@ ifeq ($(wildcard $(RK3588_MKIMAGE)),) rm rk3588.zip; endif $(RK3588_MKIMAGE) -n axvisor -A arm64 -O linux -T kernel -C none -a 0x00480000 -e 0x00480000 -d $(OUT_BIN) $(OUT_IMG) - @echo 'Built the uboot image ${OUT_IMG} successfully!' \ No newline at end of file + @echo 'Built the uboot image ${OUT_IMG} successfully!' + +define upload_image + @echo "Uploading image to RK3588..." + cp $(OUT_IMG) /srv/tftp/axvisor + @echo "Image uploaded to /srv/tftp/axvisor" + @echo "You can now boot the image using the RK3588 board." + @echo "Coping this command to uboot console:" + @echo "" + @echo 'setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 192.168.50.97:axvisor;tftp 0x10000000 192.168.50.97:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000;' + @echo "" +endef \ No newline at end of file diff --git a/src/hal.rs b/src/hal.rs index 3a73f51c..2893c04f 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -74,7 +74,7 @@ impl AxVCpuHal for AxVCpuHalImpl { #[cfg(target_arch = "aarch64")] fn irq_hanlder() { - let irq_num = axhal::irq::fetch_irq(); + let irq_num = Self::irq_fetch(); debug!("IRQ handler {irq_num}"); axhal::irq::handler_irq(irq_num); } diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 64013a18..d36c155d 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -87,8 +87,8 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { if let Some(status) = node.status() { if status == Status::Disabled { // Skip disabled nodes - warn!("Skipping disabled DTB node: {}", name); - continue; + trace!("DTB node: {} is disabled", name); + // continue; } } @@ -96,7 +96,7 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { for reg in regs { if reg.address < 0x1000 { // Skip registers with address less than 0x10000. - warn!( + trace!( "Skipping DTB node {} with register address {:#x} < 0x10000", node.name(), reg.address @@ -108,7 +108,7 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { let start = reg.address as usize; let end = start + size as usize; if vm_cfg.contains_memory_range(&(start..end)) { - warn!( + trace!( "Skipping DTB node {} with register address {:#x} and size {:#x} as it overlaps with existing memory regions", node.name(), reg.address, @@ -124,7 +124,7 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { length: size as _, irq_id: 0, }; - info!("Adding {:x?}", pt_dev); + trace!("Adding {:x?}", pt_dev); vm_cfg.add_pass_through_device(pt_dev); } } From 526371e2882a5dd2910b3c5a94d44ff9393ae088 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Sun, 1 Jun 2025 22:19:05 +0800 Subject: [PATCH 22/62] [wip] add how to prepare linux kernel binary --- Boot-on-rk3588.md | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 6a95b7ad..221eaaf5 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -23,8 +23,20 @@ You should see `TFTP Server Test` on your screen. dtc -o aio-rk3588-jd4.dtb -O dtb -I dts aio-rk3588-jd4.dts ``` +## Prepare Linux kernel bianry + +```bash +scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/arch/arm64/boot/Image configs/vms/Image.bin +``` + ## Compile AxVisor +* get deps +```bash +./tool/dev_env.py +cd crates/arceos && git checkout rk3588_jd4 +``` + * compile ```bash From b441b8c9bb2c9cb613880aeb117f8ce8a51d6bb0 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Thu, 5 Jun 2025 15:43:13 +0800 Subject: [PATCH 23/62] add place-holder implementation for new `axvisor_api`s --- Cargo.lock | 4 ++-- src/hal.rs | 17 +++++++++++++++++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 77563749..adc4b7f6 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -615,7 +615,7 @@ dependencies = [ [[package]] name = "axvisor_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#7782e173650a761a326bd1aeb5c3ed468d86e6db" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" dependencies = [ "axaddrspace", "axvisor_api_proc", @@ -626,7 +626,7 @@ dependencies = [ [[package]] name = "axvisor_api_proc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#7782e173650a761a326bd1aeb5c3ed468d86e6db" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" dependencies = [ "proc-macro-crate", "proc-macro2", diff --git a/src/hal.rs b/src/hal.rs index ece30cbf..a97df904 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -274,4 +274,21 @@ mod arch_api_impl { use axstd::os::arceos::modules::axhal::irq::MyVgic; MyVgic::get_gicd().lock().get_iidr() } + + #[cfg(target_arch = "aarch64")] + extern fn get_host_gicd_base() -> memory_addr::PhysAddr { + unimplemented!() + } + + #[cfg(target_arch = "aarch64")] + extern fn get_host_gicr_base() -> memory_addr::PhysAddr { + unimplemented!() + } +} + +#[axvisor_api::api_mod_impl(axvisor_api::host)] +mod host_api_impl { + extern fn get_host_cpu_num() -> usize { + std::os::arceos::modules::axconfig::SMP + } } From 9d23528523c0a3c87382704f05cbd12ab47976e4 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 6 Jun 2025 17:44:28 +0800 Subject: [PATCH 24/62] [feat] Support load ramdisk image from memory --- build.rs | 20 ++++++++++++++++++++ src/vmm/images.rs | 6 ++++++ 2 files changed, 26 insertions(+) diff --git a/build.rs b/build.rs index 0106e6ed..3d4c1fad 100644 --- a/build.rs +++ b/build.rs @@ -102,6 +102,7 @@ struct MemoryImage { pub kernel: PathBuf, pub dtb: Option, pub bios: Option, + pub ramdisk: Option, } fn parse_config_file(config_file: &ConfigFile) -> Option { @@ -138,11 +139,19 @@ fn parse_config_file(config_file: &ConfigFile) -> Option { .and_then(|v| v.as_str()) .map(|v| convert_to_absolute(CONFIGS_DIR_PATH, v)); + let ramdisk = config + .get("kernel")? + .as_table()? + .get("ramdisk_path") + .and_then(|v| v.as_str()) + .map(|v| convert_to_absolute(CONFIGS_DIR_PATH, v)); + Some(MemoryImage { id, kernel, dtb, bios, + ramdisk, }) } @@ -174,12 +183,21 @@ fn generate_guest_img_loading_functions( None => quote! { None }, }; + let ramdisk = match files.ramdisk { + Some(v) => { + let s = v.display().to_string(); + quote! { Some(include_bytes!(#s)) } + } + None => quote! { None }, + }; + memory_images.push(quote! { MemoryImage { id: #id, kernel: include_bytes!(#kernel), dtb: #dtb, bios: #bios, + ramdisk: #ramdisk, } }); } @@ -196,6 +214,8 @@ fn generate_guest_img_loading_functions( pub dtb: Option<&'static [u8]>, /// bios image pub bios: Option<&'static [u8]>, + /// ramdisk image + pub ramdisk: Option<&'static [u8]>, } /// Get memory images from config file. diff --git a/src/vmm/images.rs b/src/vmm/images.rs index 478e6e12..f894b304 100644 --- a/src/vmm/images.rs +++ b/src/vmm/images.rs @@ -44,6 +44,12 @@ fn load_vm_images_from_memory(config: AxVMCrateConfig, vm: VMRef) -> AxResult { load_vm_image_from_memory(buffer, config.kernel.bios_load_addr.unwrap(), vm.clone()) .expect("Failed to load BIOS images"); } + + // Load Ramdisk image + if let Some(buffer) = vm_imags.ramdisk { + load_vm_image_from_memory(buffer, config.kernel.ramdisk_load_addr.unwrap(), vm.clone()) + .expect("Failed to load Ramdisk images"); + }; #[cfg(target_arch = "aarch64")] { for mem_region in &config.kernel.memory_regions { From 1a9b3a3be4e3e3f54cd377e3d94a7813fb23171f Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 6 Jun 2025 17:45:06 +0800 Subject: [PATCH 25/62] [feat/rk3588] Add ramdisk image config for rk3588 --- Boot-on-rk3588.md | 5 +++-- configs/vms/linux-rk3588-aarch64-smp.toml | 5 +++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 221eaaf5..dae08704 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -12,7 +12,7 @@ echo "TFTP Server Test" > /srv/tftp/testfile.txt tftp localhost tftp> get testfile.txt tftp> quit -cat testfile.txt +cat testfile.txt ``` You should see `TFTP Server Test` on your screen. @@ -27,6 +27,7 @@ dtc -o aio-rk3588-jd4.dtb -O dtb -I dts aio-rk3588-jd4.dts ```bash scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/arch/arm64/boot/Image configs/vms/Image.bin +scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/ramdisk.img configs/vms/ramdisk.img ``` ## Compile AxVisor @@ -58,7 +59,7 @@ cp axvisor_aarch64-rk3588j.img /srv/tftp/axvisor # 这是 tftp 服务器所在的主机 ip setenv serverip 192.168.50.97 # 这是 rk3588 所在设备的 ip (Firefly Linux 自己 DHCP 拿到的地址) -setenv ipaddr 192.168.50.8 +setenv ipaddr 192.168.50.8 # 使用 tftp 加载镜像到指定内存地址并 boot setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; ``` diff --git a/configs/vms/linux-rk3588-aarch64-smp.toml b/configs/vms/linux-rk3588-aarch64-smp.toml index b91a14c3..16d7c973 100644 --- a/configs/vms/linux-rk3588-aarch64-smp.toml +++ b/configs/vms/linux-rk3588-aarch64-smp.toml @@ -24,6 +24,8 @@ entry_point = 0x1020_0000 kernel_load_addr = 0x1020_0000 # The load address of the device tree blob (DTB). dtb_load_addr = 0x1000_0000 +# The load address of the ramdisk image. +ramdisk_load_addr = 0x0a20_0000 # The location of image: "memory" | "fs". # load from memory image_location = "memory" @@ -31,6 +33,9 @@ image_location = "memory" kernel_path = "Image.bin" # The file path of the device tree blob (DTB). dtb_path = "aio-rk3588-jd4.dtb" +# The file path of the ramdisk image. +ramdisk_path = "ramdisk.img" + # load from file system. # image_location = "fs". From a08744961a522b9293c36adba536b05a1d3e5eb9 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Fri, 6 Jun 2025 17:49:29 +0800 Subject: [PATCH 26/62] [wip] boot Linux and arceos --- Cargo.lock | 4 - Cargo.toml | 3 + configs/platforms/aarch64-qemu-virt-hv.toml | 2 +- configs/vms/arceos-aarch64.toml | 13 +- configs/vms/linux-qemu-aarch64.toml | 6 +- configs/vms/qemu_gicv3.dts | 410 ++++++++++++++++++++ scripts/make/qemu.mk | 4 +- src/vmm/config.rs | 2 +- 8 files changed, 428 insertions(+), 16 deletions(-) create mode 100644 configs/vms/qemu_gicv3.dts diff --git a/Cargo.lock b/Cargo.lock index 4a102467..923238f8 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1083,8 +1083,6 @@ checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" [[package]] name = "page_table_entry" version = "0.5.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c097d641745a066856a26eed6e486d4430bb3e32c94f1203ea09c63239b360a0" dependencies = [ "aarch64-cpu 10.0.0", "bitflags 2.9.0", @@ -1095,8 +1093,6 @@ dependencies = [ [[package]] name = "page_table_multiarch" version = "0.5.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4647889585d29762d747be0916d6d28db72967a697d142be86f187a6b496832a" dependencies = [ "log", "memory_addr", diff --git a/Cargo.toml b/Cargo.toml index 304687fe..40063f26 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -75,3 +75,6 @@ path = "crates/arm_vgic" path = "crates/axdevice_crates/axdevice_base" [patch."https://github.com/arceos-hypervisor/arm_gicv2.git".arm_gicv2] path = "crates/arm_gicv2" +[patch.crates-io] +page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} +page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} \ No newline at end of file diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index b5c2001a..9e8aa6d8 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -90,7 +90,7 @@ pci-ranges = [ [0x80_0000_0000, 0x80_0000_0000], # 64-bit MMIO space ] # [(uint, uint)] # UART Address -uart-paddr = 0x0900_0000 # uint +uart-paddr = 0x0904_0000 # uint # UART IRQ number uart-irq = 1 # uint diff --git a/configs/vms/arceos-aarch64.toml b/configs/vms/arceos-aarch64.toml index d2f87d93..47271868 100644 --- a/configs/vms/arceos-aarch64.toml +++ b/configs/vms/arceos-aarch64.toml @@ -2,7 +2,7 @@ # [base] # Guest vm id. -id = 1 +id = 2 # Guest vm name. name = "arceos" # Virtualization type. @@ -10,21 +10,21 @@ vm_type = 1 # The number of virtual CPUs. cpu_num = 1 # Guest vm physical cpu sets. -phys_cpu_sets = [1] +phys_cpu_sets = [2] # # Vm kernel configs # [kernel] # The entry point of the kernel image. -entry_point = 0x4008_0000 +entry_point = 0x4020_0000 # The location of image: "memory" | "fs". # Load from file system. -image_location = "fs" +image_location = "memory" # The file path of the kernel image. -kernel_path = "arceos-aarch64.bin" +kernel_path = "/home/hky/workspace/arceos/axvisor/crates/arceos/examples/helloworld/helloworld_aarch64-qemu-virt_1.bin" # The load address of the kernel image. -kernel_load_addr = 0x4008_0000 +kernel_load_addr = 0x4020_0000 ## Load from memory # image_location = "memory" ## The file path of the kernel image. @@ -50,6 +50,7 @@ emu_devices = [] passthrough_devices = [ ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + ["pl011@9040000", 0x904_0000, 0x904_0000, 0x1000, 0x1], ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], # a003000.virtio_mmio virtio_mmio@a003000 diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index 3459987f..9ad71adb 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -22,11 +22,11 @@ entry_point = 0x8008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "Image-5.10.198.bin" +kernel_path = "linux-6.6.62.bin" # The load address of the kernel image. kernel_load_addr = 0x8008_0000 # The file path of the device tree blob (DTB). -dtb_path = "aio-rk3588-jd4.dtb" +dtb_path = "qemu_gicv3.dtb" # The load address of the device tree blob (DTB). dtb_load_addr = 0x8000_0000 @@ -63,6 +63,8 @@ passthrough_devices = [ # # a003000.virtio_mmio virtio_mmio@a003000 # # a003200.virtio_mmio virtio_mmio@a003200 # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], + ["low-memory", 0x0, 0x0, 0x2000_0000, 0x1], + ["pci", 0x8000000000, 0x8000000000, 0x10000, 0x1], ] # Emu_devices. diff --git a/configs/vms/qemu_gicv3.dts b/configs/vms/qemu_gicv3.dts new file mode 100644 index 00000000..73b3158f --- /dev/null +++ b/configs/vms/qemu_gicv3.dts @@ -0,0 +1,410 @@ +/dts-v1/; + +/ { + interrupt-parent = <0x8003>; + dma-coherent; + model = "linux,dummy-virt"; + #size-cells = <0x02>; + #address-cells = <0x02>; + compatible = "linux,dummy-virt"; + + psci { + migrate = <0xc4000005>; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + method = "smc"; + compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; + }; + + memory@40000000 { + reg = <0x00 0x80000000 0x00 0x40000000>; + device_type = "memory"; + }; + + platform-bus@c000000 { + interrupt-parent = <0x8003>; + ranges = <0x00 0x00 0xc000000 0x2000000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "qemu,platform\0simple-bus"; + }; + + fw-cfg@9020000 { + dma-coherent; + reg = <0x00 0x9020000 0x00 0x18>; + compatible = "qemu,fw-cfg-mmio"; + }; + + virtio_mmio@a000000 { + dma-coherent; + interrupts = <0x00 0x10 0x01>; + reg = <0x00 0xa000000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000200 { + dma-coherent; + interrupts = <0x00 0x11 0x01>; + reg = <0x00 0xa000200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000400 { + dma-coherent; + interrupts = <0x00 0x12 0x01>; + reg = <0x00 0xa000400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000600 { + dma-coherent; + interrupts = <0x00 0x13 0x01>; + reg = <0x00 0xa000600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000800 { + dma-coherent; + interrupts = <0x00 0x14 0x01>; + reg = <0x00 0xa000800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000a00 { + dma-coherent; + interrupts = <0x00 0x15 0x01>; + reg = <0x00 0xa000a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000c00 { + dma-coherent; + interrupts = <0x00 0x16 0x01>; + reg = <0x00 0xa000c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000e00 { + dma-coherent; + interrupts = <0x00 0x17 0x01>; + reg = <0x00 0xa000e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001000 { + dma-coherent; + interrupts = <0x00 0x18 0x01>; + reg = <0x00 0xa001000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001200 { + dma-coherent; + interrupts = <0x00 0x19 0x01>; + reg = <0x00 0xa001200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001400 { + dma-coherent; + interrupts = <0x00 0x1a 0x01>; + reg = <0x00 0xa001400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001600 { + dma-coherent; + interrupts = <0x00 0x1b 0x01>; + reg = <0x00 0xa001600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001800 { + dma-coherent; + interrupts = <0x00 0x1c 0x01>; + reg = <0x00 0xa001800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001a00 { + dma-coherent; + interrupts = <0x00 0x1d 0x01>; + reg = <0x00 0xa001a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001c00 { + dma-coherent; + interrupts = <0x00 0x1e 0x01>; + reg = <0x00 0xa001c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001e00 { + dma-coherent; + interrupts = <0x00 0x1f 0x01>; + reg = <0x00 0xa001e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002000 { + dma-coherent; + interrupts = <0x00 0x20 0x01>; + reg = <0x00 0xa002000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002200 { + dma-coherent; + interrupts = <0x00 0x21 0x01>; + reg = <0x00 0xa002200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002400 { + dma-coherent; + interrupts = <0x00 0x22 0x01>; + reg = <0x00 0xa002400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002600 { + dma-coherent; + interrupts = <0x00 0x23 0x01>; + reg = <0x00 0xa002600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002800 { + dma-coherent; + interrupts = <0x00 0x24 0x01>; + reg = <0x00 0xa002800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002a00 { + dma-coherent; + interrupts = <0x00 0x25 0x01>; + reg = <0x00 0xa002a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002c00 { + dma-coherent; + interrupts = <0x00 0x26 0x01>; + reg = <0x00 0xa002c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002e00 { + dma-coherent; + interrupts = <0x00 0x27 0x01>; + reg = <0x00 0xa002e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003000 { + dma-coherent; + interrupts = <0x00 0x28 0x01>; + reg = <0x00 0xa003000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003200 { + dma-coherent; + interrupts = <0x00 0x29 0x01>; + reg = <0x00 0xa003200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003400 { + dma-coherent; + interrupts = <0x00 0x2a 0x01>; + reg = <0x00 0xa003400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003600 { + dma-coherent; + interrupts = <0x00 0x2b 0x01>; + reg = <0x00 0xa003600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003800 { + dma-coherent; + interrupts = <0x00 0x2c 0x01>; + reg = <0x00 0xa003800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003a00 { + dma-coherent; + interrupts = <0x00 0x2d 0x01>; + reg = <0x00 0xa003a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003c00 { + dma-coherent; + interrupts = <0x00 0x2e 0x01>; + reg = <0x00 0xa003c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003e00 { + dma-coherent; + interrupts = <0x00 0x2f 0x01>; + reg = <0x00 0xa003e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + poweroff { + gpios = <0x8005 0x03 0x00>; + linux,code = <0x74>; + label = "GPIO Key Poweroff"; + }; + }; + + pl061@9030000 { + phandle = <0x8005>; + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x07 0x04>; + gpio-controller; + #gpio-cells = <0x02>; + compatible = "arm,pl061\0arm,primecell"; + reg = <0x00 0x9030000 0x00 0x1000>; + }; + + pcie@10000000 { + interrupt-map-mask = <0x1800 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x05 0x04>; + #interrupt-cells = <0x01>; + ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; + reg = <0x40 0x10000000 0x00 0x10000000>; + msi-map = <0x00 0x8004 0x00 0x10000>; + dma-coherent; + bus-range = <0x00 0xff>; + linux,pci-domain = <0x00>; + #size-cells = <0x02>; + #address-cells = <0x03>; + device_type = "pci"; + compatible = "pci-host-ecam-generic"; + }; + + pl031@9010000 { + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x02 0x04>; + reg = <0x00 0x9010000 0x00 0x1000>; + compatible = "arm,pl031\0arm,primecell"; + }; + + pl011@9000000 { + clock-names = "uartclk\0apb_pclk"; + clocks = <0x8000 0x8000>; + interrupts = <0x00 0x01 0x04>; + reg = <0x00 0x9000000 0x00 0x1000>; + compatible = "arm,pl011\0arm,primecell"; + }; + + pmu { + interrupts = <0x01 0x07 0x04>; + compatible = "arm,armv8-pmuv3"; + }; + + intc@8000000 { + phandle = <0x8003>; + interrupts = <0x01 0x09 0x04>; + reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80a0000 0x00 0xf60000>; + #redistributor-regions = <0x01>; + compatible = "arm,gic-v3"; + ranges; + #size-cells = <0x02>; + #address-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x03>; + + its@8080000 { + phandle = <0x8004>; + reg = <0x00 0x8080000 0x00 0x20000>; + #msi-cells = <0x01>; + msi-controller; + compatible = "arm,gic-v3-its"; + }; + }; + + flash@0 { + bank-width = <0x04>; + reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; + compatible = "cfi-flash"; + }; + + cpus { + #size-cells = <0x00>; + #address-cells = <0x01>; + + cpu-map { + + socket0 { + + cluster0 { + + core0 { + cpu = <0x8002>; + }; + + //core1 { + // cpu = <0x8001>; + //}; + }; + }; + }; + + cpu@0 { + phandle = <0x8002>; + reg = <0x00>; + enable-method = "psci"; + compatible = "arm,cortex-a57"; + device_type = "cpu"; + }; + + //cpu@1 { + // phandle = <0x8001>; + // reg = <0x01>; + // enable-method = "psci"; + // compatible = "arm,cortex-a57"; + // device_type = "cpu"; + //}; + }; + + timer { + interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; + always-on; + compatible = "arm,armv8-timer\0arm,armv7-timer"; + }; + + apb-pclk { + phandle = <0x8000>; + clock-output-names = "clk24mhz"; + clock-frequency = <0x16e3600>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + }; + + aliases { + serial0 = "/pl011@9000000"; + }; + + chosen { + bootargs = "earlycon console=ttyAMA0 root=/dev/vda rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; + stdout-path = "/pl011@9000000"; + rng-seed = <0x79361ef3 0x1a4e5964 0x9fb01da 0x749b376f 0x7036ec7c 0xdea25f0c 0x79d7ee4e 0xe2e216af>; + kaslr-seed = <0x2758c1 0xf528d3d5>; + }; +}; diff --git a/scripts/make/qemu.mk b/scripts/make/qemu.mk index 8f73b1d3..50b5058d 100644 --- a/scripts/make/qemu.mk +++ b/scripts/make/qemu.mk @@ -36,7 +36,7 @@ qemu_args-$(NET) += \ -device virtio-net-$(vdev-suffix),netdev=net0 ifeq ($(NET_DEV), user) - qemu_args-$(NET) += -netdev user,id=net0,hostfwd=tcp::5555-:5555,hostfwd=udp::5555-:5555 + qemu_args-$(NET) += -netdev user,id=net0,hostfwd=tcp::5555-:22,hostfwd=udp::5555-:5555 else ifeq ($(NET_DEV), tap) qemu_args-$(NET) += -netdev tap,id=net0,script=scripts/net/qemu-ifup.sh,downscript=no,vhost=$(VHOST),vhostforce=$(VHOST) QEMU := sudo $(QEMU) @@ -68,7 +68,7 @@ ifeq ($(ARCH), aarch64) ifeq ($(GICV3),y) qemu_args-y += -machine virt,virtualization=on,gic-version=3 else - qemu_args-y += -machine virt,virtualization=on,gic-version=2 + qemu_args-y += -machine virt,virtualization=on,gic-version=3 endif endif diff --git a/src/vmm/config.rs b/src/vmm/config.rs index d36c155d..ba21db7e 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -79,7 +79,7 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { for node in fdt.all_nodes() { trace!("DTB node: {:?}", node.name()); let name = node.name(); - if name == "memory" { + if name.starts_with("memory") { // Skip the memory node, as we handle memory regions separately. continue; } From a29e9407ac79edfc9a7c74eab89bd95ebe97150d Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Sat, 7 Jun 2025 15:52:37 +0800 Subject: [PATCH 27/62] [feat] add scripts of boot Linux and arceos on qemu --- Boot-on-qemu.md | 17 +++++++++++++++++ Boot-on-rk3588.md | 1 - 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 Boot-on-qemu.md diff --git a/Boot-on-qemu.md b/Boot-on-qemu.md new file mode 100644 index 00000000..fbbf4dc8 --- /dev/null +++ b/Boot-on-qemu.md @@ -0,0 +1,17 @@ +## Compile AxVisor + +* get deps +```bash +./tool/dev_env.py +cd crates/arceos && git checkout rk3588_jd4_qemu +cd crates/axvm && git checkout dtb +cd crates/axvcpu && git checkout 4_level_paging +cd crates/axaddrspace && git checkout 4_level_paging +``` + + +```bash +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/hky/workspace/Linux/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y + +telnet localhost 4321 +``` \ No newline at end of file diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 221eaaf5..b59c5ec4 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -63,4 +63,3 @@ setenv ipaddr 192.168.50.8 setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; ``` tftp 0x00480000 ${serverip}:Image.bin;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; - From 5e1367662d667350fb207d25414301c0c4ab6327 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Sat, 7 Jun 2025 16:10:30 +0800 Subject: [PATCH 28/62] [feat] Remove unnecessary cooling-maps to allow automatic fan speed control after boot --- configs/vms/aio-rk3588-jd4.dts | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/configs/vms/aio-rk3588-jd4.dts b/configs/vms/aio-rk3588-jd4.dts index 40549136..b1681d82 100644 --- a/configs/vms/aio-rk3588-jd4.dts +++ b/configs/vms/aio-rk3588-jd4.dts @@ -5714,12 +5714,6 @@ cooling-maps { - map2 { - trip = <0x5e>; - cooling-device = <0x0c 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - map0 { trip = <0x5e>; cooling-device = <0x06 0xffffffff 0xffffffff>; @@ -5731,12 +5725,6 @@ cooling-device = <0x5f 0xffffffff 0xffffffff>; contribution = <0x400>; }; - - map1 { - trip = <0x5e>; - cooling-device = <0x0a 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; }; }; From 634cac8a9371b5c9b7b6b2f6c92e2305097c22fa Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Sat, 7 Jun 2025 20:52:18 +0800 Subject: [PATCH 29/62] [fix] bad repo in Boot-on-qemu.md orz --- Boot-on-qemu.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Boot-on-qemu.md b/Boot-on-qemu.md index fbbf4dc8..b2a5ecab 100644 --- a/Boot-on-qemu.md +++ b/Boot-on-qemu.md @@ -5,7 +5,7 @@ ./tool/dev_env.py cd crates/arceos && git checkout rk3588_jd4_qemu cd crates/axvm && git checkout dtb -cd crates/axvcpu && git checkout 4_level_paging +cd crates/arm_vcpu && git checkout 4_level_paging cd crates/axaddrspace && git checkout 4_level_paging ``` From b5181943452eb9f6b264b4e2f72c188edc0bd908 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Mon, 9 Jun 2025 22:43:46 +0800 Subject: [PATCH 30/62] [doc/rk3588] Update boot Linux VM instruction on custom kernel branch --- Boot-on-rk3588.md | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index dae08704..e0997162 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -1,3 +1,5 @@ +# Boot A Linux VM on the Firefly AIO-3588JD4 Board + ## Setup TFTP Server ```bash @@ -5,7 +7,7 @@ sudo apt-get install tftpd-hpa tftp-hpa sudo chmod 777 /srv/tftp ``` -judge if TFTP works +Check if TFTP works ```bash echo "TFTP Server Test" > /srv/tftp/testfile.txt @@ -20,11 +22,15 @@ You should see `TFTP Server Test` on your screen. ## Compile device tree ```bash -dtc -o aio-rk3588-jd4.dtb -O dtb -I dts aio-rk3588-jd4.dts +dtc -o configs/vms/aio-rk3588-jd4.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4.dts ``` ## Prepare Linux kernel bianry +Prepare RK3588 SDK following manufacturer's instruction, checkout the Linux kernel repository to this branch: https://github.com/arceos-hypervisor/firefly-linux-bsp/tree/axvisor-wip, then build the kernel. + +Copy the kernel and ramdisk image to AxVisor directory: + ```bash scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/arch/arm64/boot/Image configs/vms/Image.bin scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/ramdisk.img configs/vms/ramdisk.img @@ -33,6 +39,7 @@ scp xxx@192.168.xxx.xxx:/home/xxx/firefly_rk3588_SDK/kernel/ramdisk.img configs/ ## Compile AxVisor * get deps + ```bash ./tool/dev_env.py cd crates/arceos && git checkout rk3588_jd4 From 0720a7e2e05304637bfcbb9d983fa1067b7a8e25 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Sat, 7 Jun 2025 16:16:22 +0800 Subject: [PATCH 31/62] [bug] Temporary fix for linux boot failure --- src/vmm/config.rs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/vmm/config.rs b/src/vmm/config.rs index d36c155d..a47406b5 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -130,6 +130,14 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { } } } + + vm_cfg.add_pass_through_device(PassThroughDeviceConfig { + name: "Fake Node".to_string(), + base_gpa: 0x0, + base_hpa: 0x0, + length: 0x20_0000, + irq_id: 0, + }); } pub fn init_guest_vms() { From 4f4bf972a59d917176b5792883b59b8a070c8739 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Mon, 9 Jun 2025 16:19:01 +0800 Subject: [PATCH 32/62] [feat/rk3588] Add device tree and config for booting 2 VMs (Linux+ArceOS) --- configs/vms/aio-rk3588-jd4-vm1.dts | 12795 +++++++++++++++ configs/vms/aio-rk3588-jd4-vm2.dts | 12823 ++++++++++++++++ configs/vms/arceos-rk3588-aarch64-vm2.toml | 50 + configs/vms/linux-rk3588-aarch64-smp-vm1.toml | 72 + 4 files changed, 25740 insertions(+) create mode 100644 configs/vms/aio-rk3588-jd4-vm1.dts create mode 100644 configs/vms/aio-rk3588-jd4-vm2.dts create mode 100644 configs/vms/arceos-rk3588-aarch64-vm2.toml create mode 100644 configs/vms/linux-rk3588-aarch64-smp-vm1.toml diff --git a/configs/vms/aio-rk3588-jd4-vm1.dts b/configs/vms/aio-rk3588-jd4-vm1.dts new file mode 100644 index 00000000..560b772b --- /dev/null +++ b/configs/vms/aio-rk3588-jd4-vm1.dts @@ -0,0 +1,12795 @@ +/dts-v1/; + +/ { + #address-cells = <0x02>; + model = "Firefly AIO-3588JD4"; + serial-number = "a0deeea630de3975"; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; + + pcie30-avdd1v8 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pcie30_avdd1v8"; + compatible = "regulator-fixed"; + phandle = <0x4a6>; + vin-supply = <0x1de>; + }; + + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + vcc5v0-host3 { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host3"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a2>; + vin-supply = <0x1dd>; + }; + + pwm@febd0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0030 0x00 0x10>; + phandle = <0x2d4>; + }; + + rkisp@fdcc0000 { + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + phandle = <0x5a>; + }; + + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; + + serial@febb0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebb0000 0x00 0x100>; + phandle = <0x2d0>; + dmas = <0xf2 0x09 0xf2 0x0a>; + reg-shift = <0x02>; + }; + + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; + + csi2-dcphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20e>; + }; + + rkispp0-vir0 { + rockchip,hw = <0x5b>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x243>; + }; + + wireless-bluetooth { + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + clock-names = "ext_clock"; + BT,power_gpio = <0x7b 0x16 0x00>; + clocks = <0x1e4>; + BT,wake_gpio = <0x7b 0x15 0x00>; + uart_rts_gpios = <0xfe 0x02 0x01>; + compatible = "bluetooth-platdata"; + BT,wake_host_irq = <0x7b 0x00 0x00>; + pinctrl-1 = <0x1e9>; + status = "disabled"; + phandle = <0x4aa>; + }; + + pwm@febd0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0020 0x00 0x10>; + phandle = <0x2d3>; + }; + + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; + + cam0-cam1-switch { + regulator-max-microvolt = <0x1b7740>; + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x181 0x11 0x00>; + pinctrl-0 = <0x1f0>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "cam0_cam1_switch"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b2>; + }; + + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; + + mipi2-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "okay"; + firefly-compatible; + phandle = <0x226>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x4d>; + reg = <0x00>; + phandle = <0x33>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x4e>; + reg = <0x00>; + phandle = <0x54>; + }; + }; + }; + }; + + iommu@fdc48700 { + power-domains = <0x60 0x0f>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x62 0x04>; + clocks = <0x02 0x195 0x02 0x194>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec1_mmu"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + phandle = <0xcc>; + rockchip,master-handle-irq; + }; + + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; + + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; + + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; + + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; + + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; + }; + + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; + + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; + + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; + + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; + }; + + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; + + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; + + eth0 { + + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; + + i2c3 { + + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; + + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; + }; + + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; + + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; + + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; + }; + }; + + pwm9 { + + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; + + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + }; + + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; + }; + + mipi { + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + }; + + pwm14 { + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + }; + + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + wireless-bluetooth { + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + }; + + pcie30x1 { + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + }; + + uart8 { + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + }; + + spi2 { + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; + }; + + pcfg-pull-up-drv-level-15 { + drive-strength = <0x0f>; + phandle = <0x462>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-13 { + drive-strength = <0x0d>; + bias-pull-down; + phandle = <0x469>; + }; + + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; + }; + + i2s1 { + + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; + + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; + + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; + + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; + + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; + + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; + + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; + + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; + + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; + + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; + + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; + + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; + + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; + + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; + + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; + + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; + + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; + + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; + + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; + + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; + + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; + + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; + }; + + ddrphych2 { + + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; + }; + + pcfg-pull-none-drv-level-12 { + drive-strength = <0x0c>; + bias-disable; + phandle = <0x456>; + }; + + i2c1 { + + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; + + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; + + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; + }; + + pwm7 { + + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; + + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; + + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; + + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + }; + + pcfg-pull-none-drv-level-5 { + drive-strength = <0x05>; + bias-disable; + phandle = <0x2f1>; + }; + + gmac0 { + + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; + + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; + }; + + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; + + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; + }; + + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; + + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; + + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; + + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; + + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; + + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + }; + + pwm12 { + + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; + }; + + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; + }; + }; + + usb-typec { + + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; + }; + + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; + }; + }; + + uart6 { + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; + }; + + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; + }; + + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; + }; + + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; + }; + + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; + + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; + + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; + }; + + pcfg-pull-down-drv-level-8 { + drive-strength = <0x08>; + bias-pull-down; + phandle = <0x464>; + }; + + gpu { + + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; + }; + + spi0 { + + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; + + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; + + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; + + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; + + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; + + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; + }; + + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; + }; + + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; + + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; + + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; + + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; + + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + }; + + fspi { + + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; + + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; + + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; + + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; + }; + + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; + + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; + }; + }; + + pcfg-pull-up-drv-level-13 { + drive-strength = <0x0d>; + phandle = <0x460>; + bias-pull-up; + }; + + clk32k { + + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; + + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; + + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; + + pcfg-pull-down-drv-level-11 { + drive-strength = <0x0b>; + bias-pull-down; + phandle = <0x467>; + }; + + pcie30phy { + + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; + + pcfg-pull-up-drv-level-0 { + drive-strength = <0x00>; + phandle = <0x2f3>; + bias-pull-up; + }; + + ddrphych0 { + + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; + + pcfg-pull-none-drv-level-10 { + drive-strength = <0x0a>; + bias-disable; + phandle = <0x454>; + }; + + pwm5 { + + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; + + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; + + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + }; + + pcfg-pull-none-drv-level-3 { + drive-strength = <0x03>; + bias-disable; + phandle = <0x2ef>; + }; + + pwm10 { + + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; + + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; + }; + }; + + pcfg-pull-down-smt { + input-schmitt-enable; + bias-pull-down; + phandle = <0x2ff>; + }; + + gpio@fec50000 { + gpio-controller; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec50000 0x00 0x100>; + phandle = <0x10d>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + }; + + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; + }; + + uart4 { + + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; + + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; + + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; + + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; + + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; + + spdif0 { + + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; + + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; + + pcfg-pull-down-drv-level-6 { + drive-strength = <0x06>; + bias-pull-down; + phandle = <0x2fd>; + }; + + pcfg-pull-up-drv-level-9 { + drive-strength = <0x09>; + phandle = <0x45c>; + bias-pull-up; + }; + + pcfg-pull-none-drv-level-1-smt { + drive-strength = <0x01>; + bias-disable; + input-schmitt-enable; + phandle = <0x19c>; + }; + + pcfg-pull-up-drv-level-11 { + drive-strength = <0x0b>; + phandle = <0x45e>; + bias-pull-up; + }; + + mcu { + + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; + + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + }; + + i2c8 { + + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; + + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; + + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; + + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; + + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + }; + + dp0 { + + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; + + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; + + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + }; + + pcfg-pull-none-drv-level-5-smt { + drive-strength = <0x05>; + bias-disable; + input-schmitt-enable; + phandle = <0x19b>; + }; + + pwm3 { + + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; + }; + + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; + + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; + + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; + }; + }; + + pcfg-pull-none-drv-level-1 { + drive-strength = <0x01>; + bias-disable; + phandle = <0x2ee>; + }; + + sata2 { + + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; + + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; + }; + + cam { + + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; + }; + + uart2 { + + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; + + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; + + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; + + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; + + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; + }; + + pcfg-pull-down-drv-level-4 { + drive-strength = <0x04>; + bias-pull-down; + phandle = <0x2fb>; + }; + + pcfg-pull-up-drv-level-7 { + drive-strength = <0x07>; + phandle = <0x45a>; + bias-pull-up; + }; + + i2c6 { + + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; + + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; + + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; + + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; + + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; + }; + + pdm1 { + + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; + + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; + + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; + + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; + + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; + + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; + + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; + + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; + + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; + + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; + + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; + }; + }; + + cpu { + + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; + + gpio-func { + + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; + + pcie20x1 { + + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; + + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; + + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; + }; + + leds { + + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; + }; + + pwm1 { + + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; + + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; + + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; + + sata0 { + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + }; + + refclk { + + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; + + pcie30x4 { + + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; + + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; + + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; + + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; + + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + }; + + can2 { + + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; + + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + }; + + litcpu { + + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; + + sata { + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; + + tsadc { + + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; + + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; + }; + }; + + uart0 { + + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; + + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; + }; + + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; + + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; + + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; + }; + }; + + pcfg-pull-down-drv-level-2 { + drive-strength = <0x02>; + bias-pull-down; + phandle = <0x2f9>; + }; + + pcfg-pull-up-drv-level-5 { + drive-strength = <0x05>; + phandle = <0x2f6>; + bias-pull-up; + }; + + gpio@fec20000 { + gpio-controller; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec20000 0x00 0x100>; + phandle = <0xfe>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; + }; + + pcfg-pull-none-drv-level-15 { + drive-strength = <0x0f>; + bias-disable; + phandle = <0x459>; + }; + + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; + }; + + i2c4 { + + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; + + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; + + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; + + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; + + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + }; + + emmc { + + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; + + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; + + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; + + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; + }; + + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; + }; + }; + + pcfg-pull-none-drv-level-8 { + drive-strength = <0x08>; + bias-disable; + phandle = <0x452>; + }; + + pwm15 { + + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; + + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; + }; + + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; + + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + }; + + pcie30x2 { + + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; + + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; + }; + + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; + + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; + }; + + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; + }; + }; + + can0 { + + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; + + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; + }; + }; + + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + uart9 { + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; + }; + + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; + }; + + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; + }; + + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; + }; + + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; + }; + + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; + }; + + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; + }; + + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; + + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; + }; + + pcfg-pull-none-drv-level-2-smt { + drive-strength = <0x02>; + bias-disable; + input-schmitt-enable; + phandle = <0x301>; + }; + + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; + }; + + spi3 { + + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; + + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; + + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; + + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; + + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; + + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; + + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; + + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; + + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; + + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; + + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; + + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; + }; + + pcfg-pull-down-drv-level-14 { + drive-strength = <0x0e>; + bias-pull-down; + phandle = <0x46a>; + }; + + bt656 { + + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; + }; + + pcfg-pull-down-drv-level-0 { + drive-strength = <0x00>; + bias-pull-down; + phandle = <0x2f7>; + }; + + pcfg-pull-up-drv-level-3 { + drive-strength = <0x03>; + phandle = <0x2f4>; + bias-pull-up; + }; + + i2s2 { + + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; + + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; + + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; + + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; + + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; + + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; + + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; + + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; + + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; + + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; + + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; + + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; + + pcfg-pull-none-drv-level-6-smt { + drive-strength = <0x06>; + bias-disable; + input-schmitt-enable; + phandle = <0x304>; + }; + + ddrphych3 { + + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; + + pcfg-pull-none-drv-level-13 { + drive-strength = <0x0d>; + bias-disable; + phandle = <0x457>; + }; + + i2c2 { + + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; + + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; + + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; + + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; + + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + }; + + auddsm { + + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; + + pwm8 { + + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; + + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; + + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + }; + + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; + }; + + pcfg-pull-none-drv-level-6 { + drive-strength = <0x06>; + bias-disable; + phandle = <0x2f2>; + }; + + jtag { + + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; + + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; + + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + }; + + gpio@fd8a0000 { + gpio-controller; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfd8a0000 0x00 0x100>; + phandle = <0x7b>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + }; + + gmac1 { + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; + + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; + + pwm13 { + + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; + + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; + + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + }; + + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; + + uart7 { + + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; + + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; + + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; + + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; + + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; + + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; + + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; + + pcfg-pull-down-drv-level-9 { + drive-strength = <0x09>; + bias-pull-down; + phandle = <0x465>; + }; + + spi1 { + + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; + }; + + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; + + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; + + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; + + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; + + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; + + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; + + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; + }; + + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + }; + + pcfg-pull-up-drv-level-14 { + drive-strength = <0x0e>; + phandle = <0x461>; + bias-pull-up; + }; + + pcfg-output-low-pull-down { + bias-pull-down; + phandle = <0x30b>; + output-low; + }; + + pcfg-pull-down-drv-level-12 { + drive-strength = <0x0c>; + bias-pull-down; + phandle = <0x468>; + }; + + pcfg-pull-up-drv-level-1 { + drive-strength = <0x01>; + phandle = <0x19f>; + bias-pull-up; + }; + + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; + + sdmmc { + + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; + + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; + }; + + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; + + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; + + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; + }; + }; + + i2s0 { + + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; + + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; + + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; + + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; + + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; + + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; + + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; + + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; + + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; + + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; + + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; + }; + }; + + ddrphych1 { + + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; + + pcfg-pull-none-drv-level-11 { + drive-strength = <0x0b>; + bias-disable; + phandle = <0x455>; + }; + + i2c0 { + + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; + }; + + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; + + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + }; + + pwm6 { + + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; + + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; + + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; + }; + }; + + hym8563 { + + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; + }; + }; + + pcfg-pull-none-drv-level-4 { + drive-strength = <0x04>; + bias-disable; + phandle = <0x2f0>; + }; + + pcfg-output-high-pull-up { + output-high; + phandle = <0x306>; + bias-pull-up; + }; + + pwm11 { + + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; + + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; + + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; + + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; + }; + }; + + bt1120 { + + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; + + pcfg-output-low-pull-up { + phandle = <0x30a>; + bias-pull-up; + output-low; + }; + + uart5 { + + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; + + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; + }; + + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; + + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; + }; + + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; + + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; + + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + }; + + sdio { + + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; + + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; + + spdif1 { + + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; + + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; + + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + }; + + pcfg-pull-down-drv-level-7 { + drive-strength = <0x07>; + bias-pull-down; + phandle = <0x463>; + }; + + gpio@fec30000 { + gpio-controller; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec30000 0x00 0x100>; + phandle = <0x79>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + }; + + pcfg-pull-up-drv-level-12 { + drive-strength = <0x0c>; + phandle = <0x45f>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-10 { + drive-strength = <0x0a>; + bias-pull-down; + phandle = <0x466>; + }; + + dp1 { + + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; + + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; + + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; + + vop { + + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; + + pwm4 { + + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; + + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + }; + + pcfg-pull-none-drv-level-2 { + drive-strength = <0x02>; + bias-disable; + phandle = <0x1a0>; + }; + + pcfg-pull-none-drv-level-3-smt { + drive-strength = <0x03>; + bias-disable; + input-schmitt-enable; + phandle = <0x302>; + }; + + uart3 { + + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; + + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; + + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; + + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; + + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; + + pcfg-pull-down-drv-level-5 { + drive-strength = <0x05>; + bias-pull-down; + phandle = <0x2fc>; + }; + + pcfg-pull-up-drv-level-8 { + drive-strength = <0x08>; + phandle = <0x45b>; + bias-pull-up; + }; + + pcfg-pull-up-drv-level-10 { + drive-strength = <0x0a>; + phandle = <0x45d>; + bias-pull-up; + }; + + pcfg-output-low { + phandle = <0x309>; + output-low; + }; + + i2c7 { + + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; + + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; + + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; + + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + }; + + pwm2 { + + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; + + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; + + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + }; + + pcfg-pull-none-drv-level-0 { + drive-strength = <0x00>; + bias-disable; + phandle = <0x2ed>; + }; + + sata1 { + + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; + + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + }; + + pmu { + + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; + + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; + }; + + uart1 { + + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; + + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; + + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; + + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; + + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; + }; + + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; + + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; + + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; + }; + }; + + hdmi { + + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; + }; + + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; + + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; + + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; + + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; + + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; + + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; + + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; + + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; + + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; + + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; + + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; + + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; + + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; + + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; + + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; + + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; + + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; + + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; + + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; + + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; + + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; + + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; + + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; + + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; + + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; + + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; + + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; + + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; + + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; + + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; + + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; + }; + + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; + + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; + + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; + + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; + + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; + + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; + + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; + + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; + + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + }; + + pcfg-pull-down-drv-level-3 { + drive-strength = <0x03>; + bias-pull-down; + phandle = <0x2fa>; + }; + + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; + }; + + i2c5 { + + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; + }; + + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; + + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; + + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; + + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; + + pcfg-pull-none-drv-level-9 { + drive-strength = <0x09>; + bias-disable; + phandle = <0x453>; + }; + + pdm0 { + + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; + + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; + + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; + + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; + + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; + + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; + + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; + + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; + + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; + + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; + + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; + }; + + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; + + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; + + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + }; + + pcfg-output-high-pull-none { + bias-disable; + output-high; + phandle = <0x308>; + }; + + pwm0 { + + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; + + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; + + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; + + cif { + + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; + + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; + + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; + + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + }; + + can1 { + + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; + + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + }; + + pcfg-output-low-pull-none { + bias-disable; + phandle = <0x30c>; + output-low; + }; + + gpio@fec40000 { + gpio-controller; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec40000 0x00 0x100>; + phandle = <0x181>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + }; + + spi4 { + + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; + + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; + + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; + + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; + + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; + + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; + + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; + + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + }; + + pcfg-pull-down-drv-level-15 { + drive-strength = <0x0f>; + bias-pull-down; + phandle = <0x46b>; + }; + + pcfg-pull-up-smt { + input-schmitt-enable; + phandle = <0x2fe>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-1 { + drive-strength = <0x01>; + bias-pull-down; + phandle = <0x2f8>; + }; + + pcfg-pull-up-drv-level-4 { + drive-strength = <0x04>; + phandle = <0x2f5>; + bias-pull-up; + }; + + wireless-wlan { + + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; + + wdt-pc9202 { + + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; + + pcfg-pull-none-drv-level-0-smt { + drive-strength = <0x00>; + bias-disable; + input-schmitt-enable; + phandle = <0x300>; + }; + + i2s3 { + + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; + + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; + + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; + + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; + + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; + + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; + }; + }; + + pcfg-pull-none-drv-level-14 { + drive-strength = <0x0e>; + bias-disable; + phandle = <0x458>; + }; + }; + + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x473>; + }; + + bt-sco { + #sound-dai-cells = <0x01>; + compatible = "delta,dfbmcs320"; + status = "disabled"; + phandle = <0x1d2>; + }; + + phy@fed80000 { + svid = <0xff01>; + orientation-switch; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + reg = <0x00 0xfed80000 0x00 0x10000>; + phandle = <0x2ea>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x18b>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@1 { + remote-endpoint = <0x18f>; + reg = <0x01>; + phandle = <0x17f>; + }; + + endpoint@0 { + remote-endpoint = <0x18e>; + reg = <0x00>; + phandle = <0x17e>; + }; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; + }; + + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; + + msi-controller@fe640000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + #msi-cells = <0x01>; + }; + + msi-controller@fe660000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + #msi-cells = <0x01>; + }; + }; + + pcie-essd { + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + regulator-min-microvolt = <0x2625a0>; + regulator-name = "pcie_essd"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x1ba>; + vin-supply = <0x1cd>; + gpios = <0x181 0x0f 0x00>; + }; + + iommu@fdab9000 { + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + phandle = <0xb2>; + }; + + otp@fecc0000 { + #address-cells = <0x01>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + phandle = <0x2e7>; + reset-names = "otpc\0apb\0arb"; + + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; + + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; + + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; + + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; + + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; + + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpu-version@1c { + bits = <0x03 0x03>; + reg = <0x1c 0x01>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-low@6 { + bits = <0x05 0x03>; + reg = <0x06 0x01>; + phandle = <0xd4>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + package-serial-number-high@5 { + bits = <0x00 0x01>; + reg = <0x05 0x01>; + phandle = <0xd5>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + specification-serial-number@6 { + bits = <0x00 0x05>; + reg = <0x06 0x01>; + phandle = <0x21>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; + }; + + i2s@fddf0000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3e8>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + phandle = <0x1d3>; + dmas = <0xf2 0x02>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + dma-controller@fea10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + phandle = <0x7c>; + #dma-cells = <0x01>; + }; + + pwm@febd0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x169>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0000 0x00 0x10>; + phandle = <0x2d2>; + }; + + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; + status = "okay"; + phandle = <0xc3>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + + rgb { + pinctrl-names = "default"; + pinctrl-0 = <0x71>; + compatible = "rockchip,rk3588-rgb"; + status = "disabled"; + phandle = <0x25c>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@2 { + remote-endpoint = <0x3d>; + status = "disabled"; + reg = <0x02>; + phandle = <0xf0>; + }; + }; + }; + }; + }; + + spi@fe2b0000 { + #address-cells = <0x01>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; + #size-cells = <0x00>; + compatible = "rockchip,sfc"; + status = "disabled"; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + phandle = <0x292>; + }; + + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; + }; + + mmc@fe2c0000 { + power-domains = <0x60 0x28>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + cap-sd-highspeed; + vqmmc-supply = <0x118>; + no-mmc; + bus-width = <0x04>; + no-sdio; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "okay"; + disable-wp; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + phandle = <0x293>; + sd-uhs-sdr104; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; + }; + + serial@feb80000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb80000 0x00 0x100>; + phandle = <0x2cd>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + reg-shift = <0x02>; + }; + + phy@fee10000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x1cb>; + reg = <0x00 0xfee10000 0x00 0x100>; + phandle = <0x1bc>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + }; + + can@fea60000 { + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + clock-names = "baudclk\0apb_pclk"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0xbb 0x02 0xba>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + compatible = "rockchip,can-2.0"; + status = "okay"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea60000 0x00 0x1000>; + phandle = <0x2a1>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4c0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x140 0x141>; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + clocks = <0x02 0x3b 0x02 0x3a>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x13f>; + status = "disabled"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + phandle = <0x29b>; + dmas = <0xf1 0x04>; + }; + + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x239>; + }; + + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; + + usb@fc800000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc800000 0x00 0x40000>; + phandle = <0x254>; + }; + + i2c@fd880000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x77>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xc0022 0x02 0xc0021>; + interrupts = <0x00 0x13d 0x04>; + clocks = <0x02 0x287 0x02 0x286>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfd880000 0x00 0x1000>; + phandle = <0x25f>; + reset-names = "i2c\0apb"; + + hym8563@51 { + pinctrl-names = "default"; + clock-output-names = "hym8563"; + pinctrl-0 = <0x7a>; + wakeup-source; + interrupts = <0x08 0x08>; + #clock-cells = <0x00>; + interrupt-parent = <0x7b>; + clock-frequency = <0x8000>; + compatible = "haoyu,hym8563"; + status = "okay"; + reg = <0x51>; + phandle = <0x1e4>; + }; + + rk8602@42 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0x18>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk8603@43 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8603"; + reg = <0x43>; + phandle = <0x1c>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pc9202@3c { + index = <0x00>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x237>; + }; + + serial@fd890000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfd890000 0x00 0x100>; + phandle = <0x260>; + dmas = <0x7c 0x06 0x7c 0x07>; + reg-shift = <0x02>; + }; + + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; + + gpu-opp-table { + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x04>; + nvmem-cells = <0x63 0x64 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x65>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0x61>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x61a80>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-500000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x02 0xffff>; + }; + + opp-j-850000000 { + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-hz = <0x00 0x32a9f880>; + opp-supported-hw = <0x04 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-m-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-400000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + }; + + csi2-dphy1-hw@fedc8000 { + clock-names = "pclk"; + resets = <0x02 0x19 0x02 0x18>; + clocks = <0x02 0x10d>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x193>; + reg = <0x00 0xfedc8000 0x00 0x8000>; + phandle = <0x2e>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,sys_grf = <0xc8>; + }; + + hdcp@fde40000 { + power-domains = <0x60 0x19>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde40000 0x00 0x80>; + phandle = <0x285>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xf5>; + }; + + iommu@fdbac800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7f 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege3_mmu"; + reg = <0x00 0xfdbac800 0x00 0x40>; + phandle = <0xc0>; + }; + + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; + + rga@fdb70000 { + power-domains = <0x60 0x1e>; + iommus = <0xba>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + compatible = "rockchip,rga3_core1"; + status = "okay"; + interrupt-names = "rga3_core1_irq"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + phandle = <0x26a>; + }; + + spi@feb00000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x14e 0x14f 0x150>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x146 0x04>; + clocks = <0x02 0xa3 0x02 0x9e>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + phandle = <0x2ab>; + dmas = <0x7c 0x0e 0x7c 0x0f>; + }; + + pcie@fe170000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x20 0x2f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x20f 0x02 0x21e>; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1bc 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + linux,pci-domain = <0x02>; + phandle = <0x487>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf0 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1bb>; + interrupt-controller; + }; + }; + + i2s@fe470000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x11b 0x11c>; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + resets = <0x02 0x77 0x02 0x7a>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + pinctrl-1 = <0x11f>; + status = "okay"; + reg = <0x00 0xfe470000 0x00 0x1000>; + phandle = <0x1da>; + dmas = <0x7c 0x00 0x7c 0x01>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; + + csi2-dphy5 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x214>; + }; + + usb@fc840000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc840000 0x00 0x40000>; + phandle = <0x6b>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x236>; + }; + + rkisp1-vir1 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x240>; + }; + + i2c@feaa0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x149>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb1 0x02 0xa9>; + interrupts = <0x00 0x13f 0x04>; + clocks = <0x02 0x8e 0x02 0x86>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + phandle = <0x2a5>; + reset-names = "i2c\0apb"; + }; + + dmc { + downdifferential = <0x14>; + clock-names = "dmc_clk"; + interrupts = <0x00 0x49 0x04>; + clocks = <0x0e 0x04>; + upthreshold = <0x28>; + center-supply = <0x42>; + devfreq-events = <0x40>; + compatible = "rockchip,rk3588-dmc"; + status = "disabled"; + interrupt-names = "complete"; + mem-supply = <0x43>; + phandle = <0x21f>; + operating-points-v2 = <0x41>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + }; + + hdmi1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,card-name = "rockchip-hdmi1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a8>; + rockchip,mclk-fs = <0x80>; + }; + + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; + + mipi-dcphy-dummy { + phandle = <0x223>; + }; + + jpege-core@fdbac000 { + power-domains = <0x60 0x15>; + iommus = <0xc0>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b2>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + interrupts = <0x00 0x80 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege3"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbac000 0x00 0x400>; + phandle = <0x270>; + reset-names = "video_a\0video_h"; + }; + + iommu@fdce0800 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x71 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "cif_mmu"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + phandle = <0x50>; + }; + + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; + + syscon@fd5a8000 { + clocks = <0x73>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + phandle = <0xd8>; + }; + + dp0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,card-name = "rockchip-dp0"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x49c>; + rockchip,mclk-fs = <0x200>; + }; + + rkcif-mipi-lvds4 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a1>; + }; + + usb@fc880000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc880000 0x00 0x40000>; + phandle = <0x255>; + }; + + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; + + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; + + mipi1-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x225>; + }; + + hdmiphy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1ac>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; + }; + }; + + i2c@fec80000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x178>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb5 0x02 0xad>; + interrupts = <0x00 0x143 0x04>; + clocks = <0x02 0x92 0x02 0x8a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfec80000 0x00 0x1000>; + phandle = <0x2df>; + reset-names = "i2c\0apb"; + + imx415@37 { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + reset-gpios = <0x182 0x05 0x01>; + rockchip,camera-module-index = <0x00>; + compatible = "sony,imx415"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x00>; + reg = <0x37>; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x184>; + phandle = <0x32>; + }; + }; + }; + + es8388@11 { + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + clocks = <0x179>; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + status = "okay"; + reg = <0x11>; + phandle = <0x1db>; + }; + + XC7160b@1b { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + pwdn-gpios = <0xfe 0x04 0x00>; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "NC"; + reset-gpios = <0x182 0x05 0x00>; + rockchip,camera-module-index = <0x00>; + compatible = "firefly,xc7160"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x01>; + reg = <0x1b>; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x183>; + phandle = <0x31>; + }; + }; + }; + + fusb302@22 { + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + interrupts = <0x1b 0x08>; + vbus-supply = <0x17c>; + interrupt-parent = <0x7b>; + compatible = "fcs,fusb302"; + status = "disabled"; + reg = <0x22>; + phandle = <0x2e0>; + + connector { + sink-pdos = <0x4019064>; + power-role = "dual"; + source-pdos = <0x401912c>; + data-role = "dual"; + label = "USB-C"; + try-power-role = "sink"; + compatible = "usb-c-connector"; + op-sink-microwatt = <0xf4240>; + phandle = <0x2e1>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; + + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; + + altmode@0 { + svid = <0xff01>; + vdo = <0xffffffff>; + reg = <0x00>; + }; + }; + }; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; + }; + }; + }; + + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; + + vbus5v0-typec-pwr-en-regulator { + gpio = <0x182 0x0c 0x00>; + enable-active-high; + regulator-name = "vbus5v0_typec_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x17c>; + }; + + mipi2-csi2-hw@fdd30000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x326>; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + clocks = <0x02 0x1d1>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + phandle = <0x49>; + reset-names = "srst_csihost_p"; + }; + + spdif-rx@fde18000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x401>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde18000 0x00 0x1000>; + phandle = <0x480>; + dmas = <0x7c 0x17>; + reset-names = "spdifrx-m"; + }; + + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; + + rkisp0-vir3 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23e>; + }; + + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; + + rkcif@fdce0000 { + power-domains = <0x60 0x1b>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + reg-names = "cif_regs"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + interrupts = <0x00 0x9b 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + compatible = "rockchip,rk3588-cif"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "cif-intr"; + nvmem-cell-names = "specification\0package_low\0package_high"; + reg = <0x00 0xfdce0000 0x00 0x800>; + phandle = <0x4f>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + }; + + edp@fdec0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x101>; + reg = <0x00 0xfdec0000 0x00 0x1000>; + phandle = <0x289>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x103>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe1>; + }; + + endpoint@2 { + remote-endpoint = <0x3b>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe7>; + }; + + endpoint@0 { + remote-endpoint = <0x102>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdb>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x28a>; + }; + }; + }; + }; + + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; + + dp@fde60000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0x1a5>; + reg = <0x00 0xfde60000 0x00 0x4000>; + phandle = <0x1e3>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x3e>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe3>; + }; + + endpoint@2 { + remote-endpoint = <0x1a7>; + status = "disabled"; + reg = <0x02>; + phandle = <0xeb>; + }; + + endpoint@0 { + remote-endpoint = <0x1a6>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdd>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x481>; + }; + }; + }; + }; + + vcc5v0-usbdcin { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usbdcin"; + compatible = "regulator-fixed"; + phandle = <0x48c>; + vin-supply = <0x1cd>; + }; + + rkvdec-core@fdc48000 { + power-domains = <0x60 0x0f>; + iommus = <0xcc>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + interrupts = <0x00 0x61 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec1"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xffe00000 0x100000>; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + phandle = <0x275>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcd>; + }; + + vcc-1v1-nldo-s3 { + regulator-max-microvolt = <0x10c8e0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-name = "vcc_1v1_nldo_s3"; + compatible = "regulator-fixed"; + phandle = <0x15c>; + vin-supply = <0x78>; + }; + + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; + + power-controller { + #address-cells = <0x01>; + #size-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-power-controller"; + status = "okay"; + phandle = <0x60>; + + power-domain@37 { + clocks = <0x02 0x199 0x02 0x140>; + reg = <0x25>; + pm_qos = <0xaf>; + }; + + power-domain@27 { + #address-cells = <0x01>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + #size-cells = <0x00>; + reg = <0x1b>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; + + power-domain@29 { + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + reg = <0x1d>; + pm_qos = <0xa8 0xa9>; + }; + + power-domain@28 { + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + reg = <0x1c>; + pm_qos = <0xa6 0xa7>; + }; + }; + + power-domain@33 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x21>; + }; + + power-domain@13 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x0d>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@16 { + #address-cells = <0x01>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + #size-cells = <0x00>; + reg = <0x10>; + pm_qos = <0x8d 0x8e 0x8f>; + + power-domain@17 { + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + reg = <0x11>; + pm_qos = <0x90 0x91 0x92>; + }; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + }; + + power-domain@31 { + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + reg = <0x1f>; + pm_qos = <0xab 0xac 0xad 0xae>; + }; + + power-domain@21 { + #address-cells = <0x01>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + #size-cells = <0x00>; + reg = <0x15>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@23 { + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + reg = <0x17>; + pm_qos = <0x9b>; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + + power-domain@22 { + clocks = <0x02 0x1ba 0x02 0x1b9>; + reg = <0x16>; + pm_qos = <0x9c>; + }; + }; + + power-domain@38 { + clocks = <0x02 0x3c 0x02 0x3d>; + reg = <0x26>; + }; + + power-domain@8 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x08>; + + power-domain@9 { + #address-cells = <0x01>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + #size-cells = <0x00>; + reg = <0x09>; + pm_qos = <0x82 0x83 0x84>; + + power-domain@11 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0b>; + pm_qos = <0x86>; + }; + + power-domain@10 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0a>; + pm_qos = <0x85>; + }; + }; + }; + + power-domain@26 { + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + reg = <0x1a>; + pm_qos = <0xa0 0xa1>; + }; + + power-domain@34 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x22>; + }; + + power-domain@24 { + #address-cells = <0x01>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + #size-cells = <0x00>; + reg = <0x18>; + pm_qos = <0x9d 0x9e>; + + power-domain@25 { + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + reg = <0x19>; + pm_qos = <0x9f>; + }; + }; + + power-domain@12 { + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + reg = <0x0c>; + pm_qos = <0x87 0x88 0x89 0x8a>; + }; + + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; + }; + + power-domain@30 { + clocks = <0x02 0x189 0x02 0x18a>; + reg = <0x1e>; + pm_qos = <0xaa>; + }; + }; + }; + + csi2-dphy3 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x212>; + }; + + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; + + pwm@fd8b0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + phandle = <0x264>; + }; + + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x234>; + }; + + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; + + vdpu@fdb50400 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-decoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "okay"; + interrupt-names = "irq_vdpu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50400 0x00 0x400>; + phandle = <0x267>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; + + pwm@febe0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0030 0x00 0x10>; + phandle = <0x2d8>; + }; + + display-subsystem { + memory-region-names = "drm-logo"; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + ports = <0x34>; + memory-region = <0x37>; + clocks = <0x35 0x36>; + compatible = "rockchip,display-subsystem"; + phandle = <0x215>; + + route { + + route-edp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21a>; + }; + + route-hdmi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3f>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21e>; + }; + + route-dp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3e>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21d>; + }; + + route-dsi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3a>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x218>; + }; + + route-edp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3b>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x219>; + }; + + route-hdmi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3c>; + logo,mode = "center"; + status = "okay"; + phandle = <0x21b>; + }; + + route-dp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x38>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x216>; + }; + + route-rgb { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3d>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21c>; + }; + + route-dsi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x39>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x217>; + }; + }; + }; + + serial@febc0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebc0000 0x00 0x100>; + phandle = <0x2d1>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + reg-shift = <0x02>; + }; + + adc-keys { + io-channels = <0x1d9 0x01>; + poll-interval = <0x64>; + keyup-threshold-microvolt = <0x1b7740>; + compatible = "adc-keys"; + status = "okay"; + phandle = <0x49e>; + io-channel-names = "buttons"; + + recovery-key { + press-threshold-microvolt = <0x4268>; + label = "F12"; + linux,code = <0x58>; + }; + }; + + pvtm@fdaf0000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; + + pvtm@3 { + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + clocks = <0x02 0x12b 0x02 0x129>; + reg = <0x03>; + reset-names = "rts\0rst-p"; + }; + }; + + codec-digital@fe500000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + clock-names = "dac\0pclk"; + resets = <0x02 0x84>; + clocks = <0x02 0x29 0x02 0x2f>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + status = "disabled"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfe500000 0x00 0x1000>; + phandle = <0x29e>; + reset-names = "reset"; + rockchip,pwm-output-mode; + }; + + pwm@fd8b0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + phandle = <0x263>; + }; + + rkcif-mipi-lvds2 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "okay"; + phandle = <0x55>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; + }; + }; + }; + + pwm@febe0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0020 0x00 0x10>; + phandle = <0x2d7>; + }; + + vcc-fan-pwr-en-regulator { + regulator-boot-on; + gpio = <0x182 0x0b 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_fan_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a4>; + }; + + iommu@fdba0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x79 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege0_mmu"; + reg = <0x00 0xfdba0800 0x00 0x40>; + phandle = <0xbc>; + }; + + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x231>; + }; + + arm-pmu { + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + interrupts = <0x01 0x07 0x08>; + compatible = "arm,armv8-pmuv3"; + phandle = <0x20c>; + }; + + pvtm@fda40000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; + + pvtm@0 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c6 0x02 0x15>; + reg = <0x00>; + }; + }; + + pwm@fd8b0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + phandle = <0x262>; + }; + + i2s@fddc0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x38d>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + phandle = <0x27d>; + dmas = <0xf2 0x00>; + reset-names = "tx-m"; + }; + + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; + + syscon@fd5d4000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + phandle = <0x1c8>; + + usb2-phy@4000 { + clock-output-names = "usb480m_phy1"; + clock-names = "phyclk"; + resets = <0x02 0xc0048 0x02 0x489>; + interrupts = <0x00 0x18a 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x4000 0x10>; + phandle = <0x1ca>; + reset-names = "phy\0apb"; + + otg-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a3>; + }; + }; + }; + + rkisp0-vir1 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23c>; + }; + + pwm@febe0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0010 0x00 0x10>; + phandle = <0x2d6>; + }; + + thermal-zones { + phandle = <0x248>; + + bigcore1-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; + }; + + soc-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x00>; + sustainable-power = <0x834>; + phandle = <0x249>; + + trips { + + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; + + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; + + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; + }; + + cooling-maps { + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + }; + }; + + npu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; + + center-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; + + gpu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; + + littlecore-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; + + bigcore0-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; + }; + }; + + iommu@fdbdf000 { + power-domains = <0x60 0x10>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + phandle = <0xc2>; + }; + + iommu@fdcd0f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8c 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec0_mmu"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + phandle = <0xd2>; + }; + + vcc5v0-host { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x02 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x75>; + vin-supply = <0x1dd>; + }; + + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; + + phy@fed90000 { + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + reg = <0x00 0xfed90000 0x00 0x10000>; + phandle = <0x48b>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; + + jpege-core@fdba0000 { + power-domains = <0x60 0x15>; + iommus = <0xbc>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ac>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + interrupts = <0x00 0x7a 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba0000 0x00 0x400>; + phandle = <0x26d>; + reset-names = "video_a\0video_h"; + }; + + vcc5v0-sys { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_sys"; + compatible = "regulator-fixed"; + phandle = <0x78>; + vin-supply = <0x1cd>; + }; + + pwm@fd8b0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + phandle = <0x261>; + }; + + vop@fdd90000 { + power-domains = <0x60 0x18>; + iommus = <0xd6>; + rockchip,vop-grf = <0xd7>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + reg-names = "regs\0gamma_lut"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + compatible = "rockchip,rk3588-vop"; + rockchip,pmu = <0xd9>; + status = "okay"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + phandle = <0x278>; + rockchip,vo1-grf = <0xd8>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; + + port@0 { + rockchip,primary-plane = <0x02>; + rockchip,plane-mask = <0x05>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x279>; + + endpoint@5 { + remote-endpoint = <0xdf>; + reg = <0x05>; + phandle = <0x1ad>; + }; + + endpoint@3 { + remote-endpoint = <0xdd>; + reg = <0x03>; + phandle = <0x1a6>; + }; + + endpoint@1 { + remote-endpoint = <0xdb>; + reg = <0x01>; + phandle = <0x102>; + }; + + endpoint@4 { + remote-endpoint = <0xde>; + reg = <0x04>; + phandle = <0x1b0>; + }; + + endpoint@2 { + remote-endpoint = <0xdc>; + reg = <0x02>; + phandle = <0x3c>; + }; + + endpoint@0 { + remote-endpoint = <0xda>; + reg = <0x00>; + phandle = <0xf7>; + }; + }; + + port@3 { + rockchip,primary-plane = <0x09>; + rockchip,plane-mask = <0x280>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + phandle = <0x27c>; + + endpoint@1 { + remote-endpoint = <0xef>; + reg = <0x01>; + phandle = <0x3a>; + }; + + endpoint@2 { + remote-endpoint = <0xf0>; + reg = <0x02>; + phandle = <0x3d>; + }; + + endpoint@0 { + remote-endpoint = <0xee>; + reg = <0x00>; + phandle = <0x39>; + }; + }; + + port@1 { + rockchip,primary-plane = <0x03>; + rockchip,plane-mask = <0x0a>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + phandle = <0x27a>; + + endpoint@5 { + remote-endpoint = <0xe5>; + reg = <0x05>; + phandle = <0x3f>; + }; + + endpoint@3 { + remote-endpoint = <0xe3>; + reg = <0x03>; + phandle = <0x3e>; + }; + + endpoint@1 { + remote-endpoint = <0xe1>; + reg = <0x01>; + phandle = <0x103>; + }; + + endpoint@4 { + remote-endpoint = <0xe4>; + reg = <0x04>; + phandle = <0x1b1>; + }; + + endpoint@2 { + remote-endpoint = <0xe2>; + reg = <0x02>; + phandle = <0xff>; + }; + + endpoint@0 { + remote-endpoint = <0xe0>; + reg = <0x00>; + phandle = <0x38>; + }; + }; + + port@2 { + rockchip,primary-plane = <0x08>; + rockchip,plane-mask = <0x140>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + #size-cells = <0x00>; + reg = <0x02>; + phandle = <0x27b>; + + endpoint@5 { + remote-endpoint = <0xeb>; + reg = <0x05>; + phandle = <0x1a7>; + }; + + endpoint@3 { + remote-endpoint = <0xe9>; + reg = <0x03>; + phandle = <0xf3>; + }; + + endpoint@1 { + remote-endpoint = <0xe7>; + reg = <0x01>; + phandle = <0x3b>; + }; + + endpoint@6 { + remote-endpoint = <0xec>; + reg = <0x06>; + phandle = <0x1b2>; + }; + + endpoint@4 { + remote-endpoint = <0xea>; + reg = <0x04>; + phandle = <0xf4>; + }; + + endpoint@2 { + remote-endpoint = <0xe8>; + reg = <0x02>; + phandle = <0x100>; + }; + + endpoint@0 { + remote-endpoint = <0xe6>; + reg = <0x00>; + phandle = <0xf8>; + }; + + endpoint@7 { + remote-endpoint = <0xed>; + reg = <0x07>; + phandle = <0x1ae>; + }; + }; + }; + }; + + csi2-dphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x210>; + }; + + pwm@febe0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0000 0x00 0x10>; + phandle = <0x2d5>; + }; + + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; + + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; + + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; + + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; + + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; + }; + + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; + }; + + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; + + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; + + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; + + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; + + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; + + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; + + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; + }; + + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; + + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; + + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; + }; + + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; + }; + + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; + }; + + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; + + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; + + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; + }; + + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; + + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; + }; + + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; + + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; + }; + + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; + }; + + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; + }; + + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; + }; + + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; + }; + + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; + }; + + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; + + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; + }; + + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; + + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; + }; + }; + + usb@fc8c0000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + phandle = <0x6e>; + }; + + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; + + mipi0-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x224>; + }; + + cluster1-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x24 0x25 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x26>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x16>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + mmc@fe2d0000 { + power-domains = <0x60 0x25>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "disabled"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + phandle = <0x294>; + max-frequency = <0xbebc200>; + }; + + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22e>; + }; + + serial@feb90000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb90000 0x00 0x100>; + phandle = <0x2ce>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + reg-shift = <0x02>; + }; + + i2s@fddf8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x3c3>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "okay"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + phandle = <0x1ec>; + dmas = <0xf2 0x15>; + reset-names = "rx-m"; + }; + + phy@fee20000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x195>; + reg = <0x00 0xfee20000 0x00 0x100>; + phandle = <0x70>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + }; + + csi2-dphy0-hw@fedc0000 { + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + clocks = <0x02 0x10c>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x192>; + reg = <0x00 0xfedc0000 0x00 0x8000>; + phandle = <0x2d>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,sys_grf = <0xc8>; + }; + + can@fea70000 { + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea70000 0x00 0x1000>; + phandle = <0x2a2>; + reset-names = "can\0can-apb"; + }; + + mailbox@fec60000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec60000 0x00 0x200>; + phandle = <0x2dd>; + }; + + usbdrd3_1 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x47a>; + + usb@fc400000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x2a7>; + interrupts = <0x00 0xdd 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x1a3 0x1a4>; + reg = <0x00 0xfc400000 0x00 0x400000>; + phandle = <0x47b>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; + + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; + + user { + linux,default-trigger = "ir-user-click"; + label = ":user"; + default-state = "off"; + phandle = <0x499>; + gpios = <0x182 0x03 0x00>; + }; + + power { + linux,default-trigger = "ir-power-click"; + label = ":power"; + default-state = "on"; + status = "disabled"; + phandle = <0x498>; + gpios = <0x7b 0x15 0x00>; + }; + }; + + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x479>; + }; + + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; + + spdif-tx@fdde0000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc4 0x04>; + clocks = <0x02 0x257 0x02 0x253>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + phandle = <0x27e>; + dmas = <0xf1 0x07>; + }; + + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0"; + }; + + rkcif-mipi-lvds { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x52>; + }; + + rga@fdb80000 { + power-domains = <0x60 0x15>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + interrupts = <0x00 0x74 0x04>; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + compatible = "rockchip,rga2_core0"; + status = "okay"; + interrupt-names = "rga2_irq"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + phandle = <0x26b>; + }; + + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; + + spi@feb10000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x151 0x152 0x153>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x147 0x04>; + clocks = <0x02 0xa4 0x02 0x9f>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + phandle = <0x2ac>; + dmas = <0x7c 0x10 0x7c 0x11>; + }; + + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x472>; + }; + + hdmi@fdea0000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "disabled"; + rockchip,grf = <0xc8>; + phys = <0x1ac>; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + phandle = <0x1e1>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x482>; + + endpoint@1 { + remote-endpoint = <0x3f>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe5>; + }; + + endpoint@2 { + remote-endpoint = <0x1ae>; + status = "disabled"; + reg = <0x02>; + phandle = <0xed>; + }; + + endpoint@0 { + remote-endpoint = <0x1ad>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdf>; + }; + }; + }; + }; + + pcie@fe180000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x30 0x3f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x210 0x02 0x21f>; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x70 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + linux,pci-domain = <0x03>; + phandle = <0x28c>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf5 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x105>; + interrupt-controller; + }; + }; + + i2s@fe480000 { + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + resets = <0x02 0xc002a 0x02 0xc002d>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfe480000 0x00 0x1000>; + phandle = <0x1d1>; + dmas = <0x7c 0x02 0x7c 0x03>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; + + i2c@feab0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14a>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb2 0x02 0xaa>; + interrupts = <0x00 0x140 0x04>; + clocks = <0x02 0x8f 0x02 0x87>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + phandle = <0x2a6>; + reset-names = "i2c\0apb"; + + gpio@21 { + gpio-controller; + gpio-group-num = <0xc8>; + compatible = "nxp,pca9555"; + status = "okay"; + reg = <0x21>; + phandle = <0x182>; + #gpio-cells = <0x02>; + }; + }; + + iommu@fdcb7f00 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x84 0x04>; + clocks = <0x02 0x1de 0x02 0x1df>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "isp0_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + phandle = <0xd0>; + }; + + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; + + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; + + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; + + mipi5-csi2-hw@fdd60000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x329>; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + clocks = <0x02 0x1d4>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + phandle = <0x4c>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; + + timer@feae0000 { + clock-names = "pclk\0timer"; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + phandle = <0x2a9>; + }; + + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22c>; + }; + + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; + + i2c@fec90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x185>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb6 0x02 0xae>; + interrupts = <0x00 0x144 0x04>; + clocks = <0x02 0x93 0x02 0x8b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfec90000 0x00 0x1000>; + phandle = <0x2e4>; + reset-names = "i2c\0apb"; + }; + + avsd-plus@fdb51000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,avs-plus-decoder"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_avsd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb51000 0x00 0x200>; + phandle = <0x268>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + dp1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,card-name = "rockchip,dp1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a9>; + rockchip,mclk-fs = <0x200>; + }; + + mipi1-csi2-hw@fdd20000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x325>; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + clocks = <0x02 0x1d0>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + phandle = <0x48>; + reset-names = "srst_csihost_p"; + }; + + iep@fdbb0000 { + power-domains = <0x60 0x15>; + iommus = <0xc1>; + clock-names = "aclk\0hclk\0sclk"; + assigned-clocks = <0x02 0x1aa>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + rockchip,disable-auto-freq; + compatible = "rockchip,iep-v2"; + status = "okay"; + interrupt-names = "irq_iep"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbb0000 0x00 0x500>; + phandle = <0x271>; + reset-names = "rst_a\0rst_h\0rst_s"; + }; + + dsi@fde20000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x2f>; + reg = <0x00 0xfde20000 0x00 0x10000>; + phandle = <0x281>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x282>; + + endpoint@1 { + remote-endpoint = <0x39>; + status = "disabled"; + reg = <0x01>; + phandle = <0xee>; + }; + + endpoint@0 { + remote-endpoint = <0xf3>; + status = "disabled"; + reg = <0x00>; + phandle = <0xe9>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x477>; + }; + + edp@fded0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x1af>; + reg = <0x00 0xfded0000 0x00 0x1000>; + phandle = <0x483>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x1b1>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe4>; + }; + + endpoint@2 { + remote-endpoint = <0x1b2>; + status = "disabled"; + reg = <0x02>; + phandle = <0xec>; + }; + + endpoint@0 { + remote-endpoint = <0x1b0>; + status = "disabled"; + reg = <0x00>; + phandle = <0xde>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x484>; + }; + }; + }; + }; + + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; + + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; + + npu-opp-table { + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,init-freq = <0xf4240>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0xb4 0xb5 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0xb6>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0xb1>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x7a120>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-500000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-950000000 { + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-hz = <0x00 0x389fd980>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-400000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + }; + }; + + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; + + syscon@fd5dc000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + phandle = <0x25e>; + + usb2-phy@c000 { + clock-output-names = "usb480m_phy3"; + clock-names = "phyclk"; + resets = <0x02 0xc004a 0x02 0x48b>; + interrupts = <0x00 0x188 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0xc000 0x10>; + phandle = <0x6d>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6f>; + }; + }; + }; + + pcie-clk3 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk3"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x496>; + gpios = <0xfe 0x09 0x01>; + }; + + pwm@febf0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0030 0x00 0x10>; + phandle = <0x2dc>; + }; + + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + phandle = <0x29f>; + #hwlock-cells = <0x01>; + }; + + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x474>; + }; + + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; + + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; + }; + + hdmirx-controller@fdee0000 { + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1b3 0x1b4>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + reg-names = "hdmirx_regs"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + hpd-trigger-level = <0x01>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + status = "disabled"; + rockchip,grf = <0xc8>; + interrupt-names = "cec\0hdmi\0dma"; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + reg = <0x00 0xfdee0000 0x00 0x6000>; + phandle = <0x1eb>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + rockchip,vo1_grf = <0xd8>; + }; + + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; + + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; + + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; + + reboot-mode { + mode-normal = <0x5242c300>; + mode-loader = <0x5242c301>; + mode-quiescent = <0x5242c30e>; + mode-bootloader = <0x5242c301>; + mode-recovery = <0x5242c303>; + mode-watchdog = <0x5242c308>; + mode-ums = <0x5242c30c>; + mode-fastboot = <0x5242c309>; + offset = <0x80>; + compatible = "syscon-reboot-mode"; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + mode-charge = <0x5242c30b>; + mode-panic = <0x5242c307>; + }; + }; + + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; + + iommu@fdb60f00 { + power-domains = <0x60 0x16>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_0_mmu"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + phandle = <0xb9>; + }; + + pwm@febf0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0020 0x00 0x10>; + phandle = <0x2db>; + }; + + rkispp@fdcd0000 { + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8b 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + phandle = <0x5b>; + }; + + tsadc@fec00000 { + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + clock-names = "tsadc\0apb_pclk"; + rockchip,hw-tshut-polarity = <0x00>; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + interrupts = <0x00 0x18d 0x04>; + rockchip,hw-tshut-mode = <0x00>; + clocks = <0x02 0xaa 0x02 0xa9>; + #thermal-sensor-cells = <0x01>; + compatible = "rockchip,rk3588-tsadc"; + pinctrl-1 = <0x176>; + status = "okay"; + reg = <0x00 0xfec00000 0x00 0x400>; + phandle = <0x5d>; + reset-names = "tsadc\0tsadc-apb"; + rockchip,hw-tshut-temp = <0x1d4c0>; + }; + + iommu@fdbb0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_iep_mmu"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + phandle = <0xc1>; + }; + + phy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0x101>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + pvtm@fda50000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; + + pvtm@1 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c8 0x02 0x17>; + reg = <0x01>; + }; + }; + + csi2-dcphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20d>; + }; + + mailbox@fece0000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfece0000 0x00 0x200>; + phandle = <0x2e9>; + }; + + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x23a>; + }; + + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x22f>; + }; + + dfi@fe060000 { + rockchip,pmu_grf = <0x104>; + compatible = "rockchip,rk3588-dfi"; + status = "disabled"; + reg = <0x00 0xfe060000 0x00 0x10000>; + phandle = <0x40>; + }; + + iommu@fdca0000 { + power-domains = <0x60 0x17>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x6d 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-av1"; + status = "okay"; + interrupt-names = "irq_av1d_mmu"; + reg = <0x00 0xfdca0000 0x00 0x600>; + phandle = <0xce>; + }; + + mipi5-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x229>; + }; + + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; + + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; + + iommu@fdba8800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7d 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege2_mmu"; + reg = <0x00 0xfdba8800 0x00 0x40>; + phandle = <0xbf>; + }; + + mpp-srv { + rockchip,resetgroup-count = <0x01>; + rockchip,taskqueue-count = <0x0c>; + compatible = "rockchip,mpp-service"; + status = "okay"; + phandle = <0xb8>; + }; + + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; + + pwm@febf0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0010 0x00 0x10>; + phandle = <0x2da>; + }; + + iommu@fdbef000 { + power-domains = <0x60 0x11>; + rockchip,shootdown-entire; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + phandle = <0xc5>; + lock-names = "aclk\0iface"; + }; + + serial@feb60000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb60000 0x00 0x100>; + phandle = <0x2cb>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + reg-shift = <0x02>; + }; + + hdmiin-sound { + rockchip,jack-det; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,bitclock-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,format = "i2s"; + compatible = "rockchip,hdmi"; + phandle = <0x4ac>; + rockchip,frame-master = <0x1eb>; + rockchip,mclk-fs = <0x80>; + }; + + i2s@fddc8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x391>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + phandle = <0x47c>; + dmas = <0xf2 0x16>; + reset-names = "tx-m"; + }; + + pcie30-avdd0v75 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "pcie30_avdd0v75"; + compatible = "regulator-fixed"; + phandle = <0x4a7>; + vin-supply = <0x1df>; + }; + + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; + }; + + rockchip-suspend { + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; + + decompress@fea80000 { + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + compatible = "rockchip,hw-decompress"; + status = "disabled"; + reg = <0x00 0xfea80000 0x00 0x1000>; + phandle = <0x2a3>; + reset-names = "dresetn"; + }; + + dma-controller@fea30000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + phandle = <0xf1>; + #dma-cells = <0x01>; + }; + + pwm@febf0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0000 0x00 0x10>; + phandle = <0x2d9>; + }; + + iommu@fdcd8f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8e 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec1_mmu"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + phandle = <0xd3>; + }; + + spdif-tx@fddb0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc3 0x04>; + clocks = <0x02 0x209 0x02 0x204>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + phandle = <0x1d5>; + dmas = <0xf1 0x06>; + }; + + rkisp1-vir2 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x241>; + }; + + pcie-clk1 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk1"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x494>; + vin-supply = <0x1cd>; + gpios = <0x181 0x15 0x01>; + }; + + jpege-core@fdba8000 { + power-domains = <0x60 0x15>; + iommus = <0xbf>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + interrupts = <0x00 0x7e 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege2"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba8000 0x00 0x400>; + phandle = <0x26f>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; + + spdif-tx1-sound { + simple-audio-card,name = "rockchip,spdif-tx1"; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49d>; + simple-audio-card,mclk-fs = <0x80>; + + simple-audio-card,cpu { + sound-dai = <0x1d7>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; + + mmc@fe2e0000 { + mmc-hs400-enhanced-strobe; + clock-names = "core\0bus\0axi\0block\0timer"; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + bus-width = <0x08>; + non-removable; + no-sdio; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + mmc-hs400-1_8v; + interrupts = <0x00 0xcd 0x04>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + no-sd; + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + status = "okay"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + phandle = <0x295>; + max-frequency = <0xbebc200>; + reset-names = "core\0bus\0axi\0block\0timer"; + }; + + dma-controller@fed10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + phandle = <0xf2>; + #dma-cells = <0x01>; + }; + + iommu@fc900000 { + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfc900000 0x00 0x200000>; + phandle = <0x256>; + }; + + mailbox@fec70000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec70000 0x00 0x200>; + phandle = <0x2de>; + }; + + pcie@fe150000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1b8>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x00 0x0f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20d 0x02 0x21c>; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x0e 0x00>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + #interrupt-cells = <0x01>; + status = "okay"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + linux,pci-domain = <0x00>; + phandle = <0x485>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0x104 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b5>; + interrupt-controller; + }; + }; + + rng@fe378000 { + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + compatible = "rockchip,trngv1"; + status = "okay"; + reg = <0x00 0xfe378000 0x00 0x200>; + phandle = <0x297>; + reset-names = "reset"; + }; + + sata@fe220000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + reg = <0x00 0xfe220000 0x00 0x1000>; + phandle = <0x48a>; + ports-implemented = <0x01>; + }; + + rkcif-mipi-lvds5 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a2>; + }; + + vcc-sata-pwr-en-regulator { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + gpio = <0x182 0x0c 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_sata_pwr_en"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a3>; + vin-supply = <0x1cd>; + }; + + pwm-fan { + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + compatible = "pwm-fan"; + phandle = <0x4ad>; + pwms = <0x1ed 0x00 0xc350 0x00>; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + }; + + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; + + spdif-tx@fe4e0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc1 0x04>; + clocks = <0x02 0x41 0x02 0x3e>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + phandle = <0x29d>; + dmas = <0x7c 0x05>; + }; + + vad@fe4d0000 { + rockchip,det-channel = <0x00>; + rockchip,audio-src = <0x00>; + clock-names = "hclk"; + reg-names = "vad"; + interrupts = <0x00 0xca 0x04>; + clocks = <0x02 0x2a0>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-vad"; + status = "disabled"; + rockchip,mode = <0x00>; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + phandle = <0x29c>; + }; + + jpegd@fdb90000 { + power-domains = <0x60 0x15>; + iommus = <0xbb>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b4>; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + interrupts = <0x00 0x81 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + compatible = "rockchip,rkv-jpeg-decoder-v1"; + status = "okay"; + interrupt-names = "irq_jpegd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb90000 0x00 0x400>; + phandle = <0x26c>; + reset-names = "video_a\0video_h"; + }; + + cpuinfo { + nvmem-cells = <0x2a 0x2b 0x2c>; + compatible = "rockchip,cpuinfo"; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; + + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; + + spi@feb20000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x01>; + pinctrl-0 = <0x154 0x155>; + clock-names = "spiclk\0apb_pclk"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x148 0x04>; + clocks = <0x02 0xa5 0x02 0xa0>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "okay"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + phandle = <0x2ad>; + dmas = <0xf1 0x0f 0xf1 0x10>; + + rk806single@0 { + vcc11-supply = <0x15b>; + pinctrl-names = "default\0pmic-power-off"; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + interrupts = <0x07 0x08>; + spi-max-frequency = <0xf4240>; + interrupt-parent = <0x7b>; + low_voltage_threshold = <0xbb8>; + vcca-supply = <0x78>; + vcc1-supply = <0x78>; + pmic-reset-func = <0x01>; + vcc2-supply = <0x78>; + hotdie_temperture_threshold = <0x73>; + compatible = "rockchip,rk806"; + vcc3-supply = <0x78>; + pinctrl-1 = <0x15a>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + reg = <0x00>; + phandle = <0x2ae>; + vcc6-supply = <0x78>; + shutdown_voltage_threshold = <0xa8c>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + shutdown_temperture_threshold = <0xa0>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; + + pinctrl_rk806 { + gpio-controller; + phandle = <0x2af>; + #gpio-cells = <0x02>; + + rk806_dvs2_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b4>; + }; + + rk806_dvs3_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl3"; + phandle = <0x159>; + }; + + rk806_dvs3_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl3"; + phandle = <0x2ba>; + }; + + rk806_dvs3_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b9>; + }; + + rk806_dvs2_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x158>; + }; + + rk806_dvs1_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl1"; + phandle = <0x15a>; + }; + + rk806_dvs1_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b0>; + }; + + rk806_dvs1_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x157>; + }; + + rk806_dvs3_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl3"; + phandle = <0x2bb>; + }; + + rk806_dvs2_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b6>; + }; + + rk806_dvs2_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b2>; + }; + + rk806_dvs2_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b3>; + }; + + rk806_dvs1_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b1>; + }; + + rk806_dvs3_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b7>; + }; + + rk806_dvs2_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b5>; + }; + + rk806_dvs3_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b8>; + }; + }; + + pwrkey { + status = "okay"; + }; + + regulators { + + PLDO_REG2 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + DCDC_REG4 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-init-microvolt = <0xb71b0>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x2bc>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG2 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x12>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG4 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG9 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG2 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + PLDO_REG5 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG7 { + regulator-max-microvolt = <0x1e8480>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1e8480>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG3 { + regulator-max-microvolt = <0x124f80>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG5 { + regulator-max-microvolt = <0xdbba0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x42>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + DCDC_REG10 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG1 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x43>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG1 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-enable-ramp-delay = <0x190>; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x62>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG5 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG6 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG8 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x325aa0>; + regulator-on-in-suspend; + }; + }; + + NLDO_REG1 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG4 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG6 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + }; + + usbhost3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "disabled"; + phandle = <0x258>; + + usb@fcd00000 { + snps,dis_enblslpm_quirk; + phy-names = "usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x237>; + interrupts = <0x00 0xde 0x04>; + snps,dis_rxdet_inp3_quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "disabled"; + snps,parkmode-disable-ss-quirk; + phys = <0x70 0x04>; + reg = <0x00 0xfcd00000 0x00 0x400000>; + phandle = <0x259>; + dr_mode = "host"; + reset-names = "usb3-host"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + pcie@fe190000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x40 0x4f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x211 0x02 0x220>; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x108 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + linux,pci-domain = <0x04>; + phandle = <0x28d>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xfa 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x107>; + interrupt-controller; + }; + }; + + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x238>; + }; + + aliases { + i2c3 = "/i2c@feab0000"; + ethernet0 = "/ethernet@fe1b0000"; + pwm9 = "/pwm@febe0010"; + pwm14 = "/pwm@febf0020"; + spi2 = "/spi@feb20000"; + usbdp0 = "/phy@fed80000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + dsi1 = "/dsi@fde30000"; + hdmi1 = "/hdmi@fdea0000"; + serial7 = "/serial@feba0000"; + i2c1 = "/i2c@fea90000"; + pwm7 = "/pwm@febd0030"; + pwm12 = "/pwm@febf0000"; + jpege3 = "/jpege-core@fdbac000"; + spi0 = "/spi@feb00000"; + hdptx1 = "/phy@fed70000"; + csi2dphy5 = "/csi2-dphy5"; + serial5 = "/serial@feb80000"; + csi2dcphy1 = "/csi2-dcphy1"; + pwm5 = "/pwm@febd0010"; + mmc1 = "/mmc@fe2c0000"; + pwm10 = "/pwm@febe0020"; + jpege1 = "/jpege-core@fdba4000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + csi2dphy3 = "/csi2-dphy3"; + serial3 = "/serial@feb60000"; + edp0 = "/edp@fdec0000"; + pwm3 = "/pwm@fd8b0030"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + csi2dphy1 = "/csi2-dphy1"; + serial1 = "/serial@feb40000"; + pwm1 = "/pwm@fd8b0010"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + spi5 = "/spi@fe2b0000"; + gpio3 = "/pinctrl/gpio@fec40000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + i2c4 = "/i2c@feac0000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + pwm15 = "/pwm@febf0030"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + spi3 = "/spi@feb30000"; + usbdp1 = "/phy@fed90000"; + gpio1 = "/pinctrl/gpio@fec20000"; + serial8 = "/serial@febb0000"; + i2c2 = "/i2c@feaa0000"; + pwm8 = "/pwm@febe0000"; + pwm13 = "/pwm@febf0010"; + spi1 = "/spi@feb10000"; + dsi0 = "/dsi@fde20000"; + hdmi0 = "/hdmi@fde80000"; + serial6 = "/serial@feb90000"; + i2c0 = "/i2c@fd880000"; + pwm6 = "/pwm@febd0020"; + mmc2 = "/mmc@fe2d0000"; + pwm11 = "/pwm@febe0030"; + jpege2 = "/jpege-core@fdba8000"; + hdptx0 = "/phy@fed60000"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + dp1 = "/dp@fde60000"; + csi2dphy4 = "/csi2-dphy4"; + serial4 = "/serial@feb70000"; + edp1 = "/edp@fded0000"; + csi2dcphy0 = "/csi2-dcphy0"; + pwm4 = "/pwm@febd0000"; + mmc0 = "/mmc@fe2e0000"; + jpege0 = "/jpege-core@fdba0000"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2c7 = "/i2c@fec90000"; + csi2dphy2 = "/csi2-dphy2"; + pwm2 = "/pwm@fd8b0020"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdcp0 = "/hdcp@fde40000"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + csi2dphy0 = "/csi2-dphy0"; + serial0 = "/serial@fd890000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm0 = "/pwm@fd8b0000"; + spi4 = "/spi@fecb0000"; + gpio2 = "/pinctrl/gpio@fec30000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + serial9 = "/serial@febc0000"; + }; + + spdif-tx@fdde8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc5 0x04>; + clocks = <0x02 0x25c 0x02 0x258>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + phandle = <0x47d>; + dmas = <0xf1 0x08>; + }; + + i2s@fe490000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x12d 0x12e>; + pinctrl-0 = <0x12a 0x12b>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x12c>; + status = "disabled"; + reg = <0x00 0xfe490000 0x00 0x1000>; + phandle = <0x298>; + dmas = <0xf1 0x00 0xf1 0x01>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5d0000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + phandle = <0x18b>; + + usb2-phy@0 { + clock-output-names = "usb480m_phy0"; + clock-names = "phyclk"; + resets = <0x02 0xc0047 0x02 0x488>; + interrupts = <0x00 0x189 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x00 0x10>; + phandle = <0x18d>; + reset-names = "phy\0apb"; + + otg-port { + #phy-cells = <0x00>; + rockchip,typec-vbus-det; + status = "okay"; + phandle = <0x66>; + }; + }; + }; + + i2c@feac0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14b>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb3 0x02 0xab>; + interrupts = <0x00 0x141 0x04>; + clocks = <0x02 0x90 0x02 0x88>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + phandle = <0x2a7>; + reset-names = "i2c\0apb"; + + pc9202@3c { + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + index = <0x01>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x476>; + }; + + firmware { + + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + phandle = <0x222>; + }; + + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; + }; + + scmi { + shmem = <0x46>; + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; + + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; + }; + + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; + }; + }; + }; + + rkvenc-core@fdbd0000 { + power-domains = <0x60 0x10>; + iommus = <0xc2>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + interrupts = <0x00 0x65 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + phandle = <0x272>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + iommu@fdcc7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x88 0x04>; + clocks = <0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp1_mmu"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xd1>; + }; + + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22b>; + }; + + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; + + gpu@fb000000 { + power-domains = <0x60 0x0c>; + downdifferential = <0x0a>; + mali-supply = <0x62>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + upthreshold = <0x1e>; + compatible = "arm,mali-bifrost"; + dynamic-power-coefficient = <0xba6>; + status = "okay"; + interrupt-names = "GPU\0MMU\0JOB"; + mem-supply = <0x62>; + reg = <0x00 0xfb000000 0x00 0x200000>; + phandle = <0x5f>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + }; + + csi2-dphy4 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x213>; + }; + + mipi4-csi2-hw@fdd50000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x328>; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + clocks = <0x02 0x1d3>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + phandle = <0x4b>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; + + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x235>; + }; + + rkisp1-vir0 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23f>; + }; + + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; + + test-power { + status = "okay"; + }; + + usb-5v { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0xfe 0x03 0x00>; + pinctrl-0 = <0x1ef>; + regulator-always-on; + enable-active-high; + regulator-name = "usb_5v"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b1>; + }; + + phy@feda0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + clocks = <0x02 0x108 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x190>; + reg = <0x00 0xfeda0000 0x00 0x10000>; + phandle = <0x2f>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + mod-sleep-regulator { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x7b 0x15 0x00>; + pinctrl-0 = <0x1ee>; + regulator-always-on; + enable-active-high; + regulator-name = "mod_sleep"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4ae>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; + + crypto@fe370000 { + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + compatible = "rockchip,rk3588-crypto"; + status = "disabled"; + reg = <0x00 0xfe370000 0x00 0x2000>; + phandle = <0x296>; + reset-names = "crypto-rst"; + }; + + i2s@fddf4000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3ef>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + phandle = <0x1e0>; + dmas = <0xf2 0x04>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + mipi0-csi2-hw@fdd10000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x324>; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + clocks = <0x02 0x1cf>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + phandle = <0x47>; + reset-names = "srst_csihost_p"; + }; + + mipi4-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x228>; + }; + + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; + + dsi@fde30000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x30>; + reg = <0x00 0xfde30000 0x00 0x10000>; + phandle = <0x283>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x284>; + + endpoint@1 { + remote-endpoint = <0x3a>; + status = "disabled"; + reg = <0x01>; + phandle = <0xef>; + }; + + endpoint@0 { + remote-endpoint = <0xf4>; + status = "disabled"; + reg = <0x00>; + phandle = <0xea>; + }; + }; + }; + }; + + iommu@fcb00000 { + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + phandle = <0x257>; + }; + + rkcif-mipi-lvds3 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x57>; + }; + + vcc-hub-regulator { + regulator-boot-on; + gpio = <0x182 0x01 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4af>; + }; + + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; + + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; + + rkisp@fdcb0000 { + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + compatible = "rockchip,rk3588-rkisp"; + status = "okay"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + phandle = <0x58>; + }; + + serial@feba0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeba0000 0x00 0x100>; + phandle = <0x2cf>; + dmas = <0xf2 0x07 0xf2 0x08>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x232>; + }; + + chosen { + linux,initrd-end = <0x00 0xaac72ae>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait console=ttyS1,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-start = <0x00 0xa200000>; + phandle = <0x48d>; + }; + + hdmi@fde80000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "okay"; + rockchip,grf = <0xc8>; + phys = <0xfd>; + enable-gpios = <0xfe 0x08 0x00>; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + phandle = <0x1d4>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x288>; + + endpoint@1 { + remote-endpoint = <0xff>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe2>; + }; + + endpoint@2 { + remote-endpoint = <0x100>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe8>; + }; + + endpoint@0 { + remote-endpoint = <0x3c>; + status = "okay"; + reg = <0x00>; + phandle = <0xdc>; + }; + }; + }; + }; + + cluster2-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x27 0x28 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x29>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x1a>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + rkcif-dvp { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-dvp"; + status = "disabled"; + phandle = <0x51>; + }; + + rkisp0-vir2 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x59>; + reg = <0x00>; + phandle = <0x56>; + }; + }; + }; + + i2c@fea90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x148>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb0 0x02 0xa8>; + interrupts = <0x00 0x13e 0x04>; + clocks = <0x02 0x8d 0x02 0x85>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfea90000 0x00 0x1000>; + phandle = <0x2a4>; + reset-names = "i2c\0apb"; + + rk8602@42 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0xb3>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; + }; + + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; + }; + + venc-opp-table { + nvmem-cells = <0xc6 0xc7>; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,grf = <0xc8>; + nvmem-cell-names = "leakage\0opp-info"; + phandle = <0xc4>; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + }; + + iommu@fdc38700 { + power-domains = <0x60 0x0e>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x60 0x04>; + clocks = <0x02 0x190 0x02 0x18f>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec0_mmu"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + phandle = <0xc9>; + rockchip,master-handle-irq; + }; + + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; + }; + + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; + }; + + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; + }; + + csi2-dphy2 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x211>; + }; + + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; + + uio@fe1b0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + phandle = <0x488>; + rockchip,ethernet = <0x1bd>; + }; + + iommu@fdb70f00 { + power-domains = <0x60 0x1e>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_1_mmu"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + phandle = <0xba>; + }; + + vcc5v0-usb { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usb"; + compatible = "regulator-fixed"; + phandle = <0x1dd>; + vin-supply = <0x1cd>; + }; + + fiq-debugger { + pinctrl-names = "default"; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "disabled"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; + + phy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1af>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + ethernet@fe1b0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x1bf>; + snps,reset-active-low; + pinctrl-0 = <0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x1c0>; + local-mac-address = [a6 50 47 45 20 4f]; + resets = <0x02 0x20a>; + interrupts = <0x00 0xe3 0x04 0x00 0xe2 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x167 0x02 0x16c 0x02 0x142>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x02 0x01>; + reg = <0x00 0xfe1b0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x1bd>; + phy-handle = <0x1c6>; + reset-names = "stmmaceth"; + tx_delay = <0x31>; + snps,axi-config = <0x1be>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x489>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1c6>; + }; + }; + + tx-queues-config { + phandle = <0x1c0>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x1be>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x1bf>; + + queue0 { + }; + }; + }; + + pvtm@fda60000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; + + pvtm@2 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2ca 0x02 0x1b>; + reg = <0x02>; + }; + }; + + rkispp@fdcd8000 { + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8d 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + phandle = <0x5c>; + }; + + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; + + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; + }; + + rkcif-mipi-lvds1 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x53>; + }; + + av1d@fdc70000 { + power-domains = <0x60 0x17>; + iommus = <0xce>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + reg-names = "vcd\0cache\0afbc"; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + compatible = "rockchip,av1-decoder"; + status = "okay"; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + phandle = <0x276>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + vcc-hub-reset-regulator { + regulator-boot-on; + gpio = <0x182 0x04 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a0>; + }; + + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; + }; + + serial@feb70000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb70000 0x00 0x100>; + phandle = <0x2cc>; + dmas = <0xf1 0x09 0xf1 0x0a>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "okay"; + rockchip,cif = <0x55>; + phandle = <0x233>; + + port { + + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; + }; + }; + }; + + i2c@feca0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x186>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb7 0x02 0xaf>; + interrupts = <0x00 0x145 0x04>; + clocks = <0x02 0x94 0x02 0x8c>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeca0000 0x00 0x1000>; + phandle = <0x2e5>; + reset-names = "i2c\0apb"; + }; + + vcc-sdcard-pwr-en-regulator { + regulator-boot-on; + gpio = <0xfe 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_sdcard_pwr_en"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a5>; + }; + + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x230>; + }; + + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; + }; + + phy@fee00000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bd>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20005 0x02 0x4d6>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + reset-names = "combphy-apb\0combphy"; + }; + + can@fea50000 { + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea50000 0x00 0x1000>; + phandle = <0x2a0>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4b0000 { + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x139 0x13a>; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + clock-names = "pdm_clk\0pdm_hclk"; + clocks = <0x02 0x29f 0x02 0x29e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x138>; + status = "disabled"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + phandle = <0x29a>; + dmas = <0x7c 0x04>; + }; + + rkisp-unite-mmu@fdcb7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp0_mmu\0isp1_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xcf>; + }; + + syscon@fd5a6000 { + clocks = <0x72>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + phandle = <0xf5>; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x00>; + enable-method = "psci"; + clocks = <0x0e 0x00>; + cpu-idle-states = <0x10>; + operating-points-v2 = <0x0f>; + capacity-dmips-mhz = <0x212>; + + cpu-supply = <0x12>; + mem-supply = <0x12>; + dynamic-power-coefficient = <0x64>; + + i-cache-line-size = <0x40>; + i-cache-size = <0x8000>; + i-cache-sets = <0x80>; + + d-cache-line-size = <0x40>; + d-cache-size = <0x8000>; + d-cache-sets = <0x80>; + + next-level-cache = <0x11>; + #cooling-cells = <0x02>; + phandle = <0x06>; + }; + + l2-cache-l0 { + compatible = "cache"; + cache-size = <0x20000>; + cache-sets = <0x200>; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + l3-cache { + compatible = "cache"; + cache-size = <0x300000>; + cache-sets = <0x1000>; + cache-line-size = <0x40>; + phandle = <0x1e>; + }; + + idle-states { + entry-method = "psci"; + + cpu-sleep { + compatible = "arm,idle-state"; + entry-latency-us = <0x64>; + exit-latency-us = <0x78>; + min-residency-us = <0x3e8>; + local-timer-stop; + arm,psci-suspend-param = <0x10000>; + phandle = <0x10>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <0x06>; + }; + }; + }; + }; + + vcc-hub3-reset-regulator { + gpio = <0x182 0x06 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub3_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a1>; + }; + + rkispp1-vir0 { + rockchip,hw = <0x5c>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x244>; + }; + + saradc@fec10000 { + vref-supply = <0x177>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + interrupts = <0x00 0x18e 0x04>; + clocks = <0x02 0x9d 0x02 0x9c>; + #io-channel-cells = <0x01>; + compatible = "rockchip,rk3588-saradc"; + status = "okay"; + reg = <0x00 0xfec10000 0x00 0x10000>; + phandle = <0x1d9>; + reset-names = "saradc-apb"; + }; + + rkisp0-vir0 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23b>; + }; + + __symbols__ { + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2c3 = "/i2c@feab0000"; + scmi_shmem = "/sram@10f000/sram@0"; + rkispp0_vir0 = "/rkispp0-vir0"; + qos_jpeg_enc0 = "/qos@fdf66400"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + usb_host1_ohci = "/usb@fc8c0000"; + pwm9 = "/pwm@febe0010"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + qos_usb3_1 = "/qos@fdf3e000"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + hwlock = "/hwspinlock@fe5a0000"; + pcie3x2 = "/pcie@fe160000"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; + mclkin_i2s0 = "/clocks/mclkin-i2s0"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + rkvenc0_mmu = "/iommu@fdbdf000"; + pwm14 = "/pwm@febf0020"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + mipi2_csi2 = "/mipi2-csi2"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + pcie2x1l1 = "/pcie@fe180000"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + optee = "/firmware/optee"; + l2_cache_b2 = "/cpus/l2-cache-b2"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + vdpu = "/vdpu@fdb50400"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + thermal_zones = "/thermal-zones"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + qos_iep = "/qos@fdf66000"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + vp1 = "/vop@fdd90000/ports/port@1"; + bigcore1_grf = "/syscon@fd592000"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + cpu_l1 = "/cpus/cpu@100"; + uart8 = "/serial@febb0000"; + rkisp1_vir3 = "/rkisp1-vir3"; + qos_vop_m1 = "/qos@fdf82200"; + pcie_clk2 = "/pcie-clk2"; + cluster2_opp_table = "/cluster2-opp-table"; + usb_grf = "/syscon@fd5ac000"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + jpege0_mmu = "/iommu@fdba0800"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + power_led = "/leds/power"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; + csi2_dphy1 = "/csi2-dphy1"; + spi2 = "/spi@feb20000"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + vo1_grf = "/syscon@fd5a8000"; + pcie_essd = "/pcie-essd"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + saradc = "/saradc@fec10000"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + dsi1 = "/dsi@fde30000"; + venc_opp_table = "/venc-opp-table"; + qos_isp0_mwo = "/qos@fdf40500"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; + route_edp1 = "/display-subsystem/route/route-edp1"; + hdmi1 = "/hdmi@fdea0000"; + crypto = "/crypto@fe370000"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + dfi = "/dfi@fe060000"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pinctrl = "/pinctrl"; + rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + mailbox1 = "/mailbox@fec70000"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + combphy1_ps = "/phy@fee10000"; + hdptxphy0_grf = "/syscon@fd5e0000"; + sdei = "/firmware/sdei"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + route_rgb = "/display-subsystem/route/route-rgb"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + i2c1 = "/i2c@fea90000"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + pwm7 = "/pwm@febd0030"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + gmac0 = "/ethernet@fe1b0000"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; + rockchip_system_monitor = "/rockchip-system-monitor"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pwm12 = "/pwm@febf0000"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + i2s1_8ch = "/i2s@fe480000"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + vcc_4g = "/vcc-4g-regulator"; + firefly_leds = "/leds"; + jpege3 = "/jpege-core@fdbac000"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + pmu1_grf = "/syscon@fd58a000"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + usbc0 = "/i2c@fec80000/fusb302@22"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + uart6 = "/serial@feb90000"; + rkisp1_vir1 = "/rkisp1-vir1"; + sdhci = "/mmc@fe2e0000"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; + target = "/thermal-zones/soc-thermal/trips/trip-point-1"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; + gpu = "/gpu@fb000000"; + spi0 = "/spi@feb00000"; + iep = "/iep@fdbb0000"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + spdif_tx5 = "/spdif-tx@fddb8000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; + usb_host0_ohci = "/usb@fc840000"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; + mipidcphy0_grf = "/syscon@fd5e8000"; + vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; + pcie30phy = "/phy@fee80000"; + dmc = "/dmc"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + mipidcphy1 = "/phy@fedb0000"; + dp1_sound = "/dp1-sound"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + scmi = "/firmware/scmi"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + l3_cache = "/cpus/l3-cache"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mipi1_csi2 = "/mipi1-csi2"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + usbdp_phy0 = "/phy@fed80000"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + i2s9_8ch = "/i2s@fddfc000"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + i2s2_2ch = "/i2s@fe490000"; + pwm5 = "/pwm@febd0010"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + rkisp0_vir3 = "/rkisp0-vir3"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; + vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; + qos_isp0_mro = "/qos@fdf40400"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + pwm10 = "/pwm@febe0020"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + rktimer = "/timer@feae0000"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + jpege1 = "/jpege-core@fdba4000"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; + vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + cpu_b3 = "/cpus/cpu@700"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + dmc_opp_table = "/dmc-opp-table"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + uart4 = "/serial@feb70000"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + dmac2 = "/dma-controller@fed10000"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + qos_gpu_m2 = "/qos@fdf35400"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + cluster0_opp_table = "/cluster0-opp-table"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + otp_id = "/otp@fecc0000/id@7"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + qos_rga3_0 = "/qos@fdf67000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; + spdif_tx3 = "/spdif-tx@fdde0000"; + rkispp0 = "/rkispp@fdcd0000"; + xin32k = "/clocks/xin32k"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + qos_usb2host_1 = "/qos@fdf3e600"; + bt_sco = "/bt-sco"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + adc_keys = "/adc-keys"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + syssram = "/sram@ff001000"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + qos_hdmirx = "/qos@fdf81200"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + hw_decompress = "/decompress@fea80000"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + rkvenc1_mmu = "/iommu@fdbef000"; + edp0 = "/edp@fdec0000"; + rkvenc_ccu = "/rkvenc-ccu"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + power = "/power-management@fd8d8000/power-controller"; + vad = "/vad@fe4d0000"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + pwm3 = "/pwm@fd8b0030"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + rkcif_mmu = "/iommu@fdce0800"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + sata2 = "/sata@fe230000"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + hdmiin_sound = "/hdmiin-sound"; + rkisp0_vir1 = "/rkisp0-vir1"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + qos_hdcp1 = "/qos@fdf81000"; + scmi_reset = "/firmware/scmi/protocol@16"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; + edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; + rkisp0 = "/rkisp@fdcb0000"; + dsu_grf = "/syscon@fd598000"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + csi2_dcphy0 = "/csi2-dcphy0"; + usb2phy0_grf = "/syscon@fd5d0000"; + scmi_clk = "/firmware/scmi/protocol@14"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + jpege1_mmu = "/iommu@fdba4800"; + qos_rkvenc1_m1ro = "/qos@fdf61200"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + vcc5v0_host = "/vcc5v0-host"; + cru = "/clock-controller@fd7c0000"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + cpu_b1 = "/cpus/cpu@500"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + rknpu_mmu = "/iommu@fdab9000"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + qos_isp1_mwo = "/qos@fdf41000"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + rga3_0_mmu = "/iommu@fdb60f00"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + fec0_mmu = "/iommu@fdcd0f00"; + mipi0_csi2 = "/mipi0-csi2"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; + qos_rkvdec1 = "/qos@fdf63000"; + dmac0 = "/dma-controller@fea10000"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + qos_gpu_m0 = "/qos@fdf35000"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; + qos_av1 = "/qos@fdf64000"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + jpegd_mmu = "/iommu@fdb90480"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + otp = "/otp@fecc0000"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + qos_jpeg_enc3 = "/qos@fdf66a00"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; + pdm1 = "/pdm@fe4c0000"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + qos_vicap_m0 = "/qos@fdf40600"; + gic = "/interrupt-controller@fe600000"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + hdptxphy1 = "/phy@fed70000"; + route_dp1 = "/display-subsystem/route/route-dp1"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + usbdrd3_1 = "/usbdrd3_1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + pwm1 = "/pwm@fd8b0010"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config"; + sata0 = "/sata@fe210000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; + can2 = "/can@fea70000"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + spll = "/clocks/spll"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + sata_pins = "/pinctrl/sata/sata-pins"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + qos_npu1 = "/qos@fdf70000"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; + rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; + pipe_phy0_grf = "/syscon@fd5bc000"; + es8388 = "/i2c@fec80000/es8388@11"; + spdif_rx2 = "/spdif-rx@fde18000"; + usb_host1_ehci = "/usb@fc880000"; + xin24m = "/clocks/xin24m"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + acdcdig_dsm = "/codec-digital@fe500000"; + vop_grf = "/syscon@fd5a4000"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + i2s6_8ch = "/i2s@fddf4000"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + mipidphy0_grf = "/syscon@fd5b4000"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + csi2_dphy4 = "/csi2-dphy4"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + qos_sdio = "/qos@fdf39000"; + tsadc = "/tsadc@fec00000"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpu_opp_table = "/gpu-opp-table"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + vdpu_mmu = "/iommu@fdb50800"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + combphy0_ps = "/phy@fee00000"; + rgb = "/syscon@fd58c000/rgb"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + uart0 = "/serial@fd890000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; + pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; + pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + qos_rga2_mwo = "/qos@fdf66e00"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; + bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + qos_fisheye0 = "/qos@fdf40000"; + i2c4 = "/i2c@feac0000"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + qos_jpeg_enc1 = "/qos@fdf66600"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s3_2ch = "/i2s@fe4a0000"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; + fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; + hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + qos_isp1_mro = "/qos@fdf41100"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_jpeg_dec = "/qos@fdf66200"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + isp0_mmu = "/iommu@fdcb7f00"; + qos_npu0_mwr = "/qos@fdf72000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + pwm15 = "/pwm@febf0030"; + vop_mmu = "/iommu@fdd97e00"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + pcie2x1l2 = "/pcie@fe190000"; + i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + iep_mmu = "/iommu@fdbb0800"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + can0 = "/can@fea50000"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + arm_pmu = "/arm-pmu"; + vp2 = "/vop@fdd90000/ports/port@2"; + rk806single = "/spi@feb20000/rk806single@0"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config"; + rng = "/rng@fe378000"; + cpu_l2 = "/cpus/cpu@200"; + uart9 = "/serial@febc0000"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + usbdpphy0_grf = "/syscon@fd5c8000"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + pcie_clk3 = "/pcie-clk3"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + rkcif = "/rkcif@fdce0000"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + spdif_rx0 = "/spdif-rx@fde08000"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + csi2_dphy2 = "/csi2-dphy2"; + spi3 = "/spi@feb30000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + gpio1 = "/pinctrl/gpio@fec20000"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + vcc5v0_sys = "/vcc5v0-sys"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; + i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + wdt = "/watchdog@feaf0000"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + cspmu = "/cspmu@fd10c000"; + gmac_uio0 = "/uio@fe1b0000"; + av1d_mmu = "/iommu@fdca0000"; + mailbox2 = "/mailbox@fece0000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + rga3_core0 = "/rga@fdb60000"; + i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + i2c2 = "/i2c@feaa0000"; + npu_grf = "/syscon@fd5a2000"; + i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; + mipi5_csi2 = "/mipi5-csi2"; + pwm8 = "/pwm@febe0000"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + rga2 = "/rga@fdb80000"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + qos_usb3_0 = "/qos@fdf3e200"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; + mcum1_pins = "/pinctrl/mcu/mcum1-pins"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + usb_host0_ehci = "/usb@fc800000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + i2s10_8ch = "/i2s@fde00000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + usb2phy1_grf = "/syscon@fd5d4000"; + pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; + jpege2_mmu = "/iommu@fdba8800"; + pwm13 = "/pwm@febf0010"; + pcie2x1l0 = "/pcie@fe170000"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + qos_rga2_mro = "/qos@fdf66c00"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + pca9555 = "/i2c@feab0000/gpio@21"; + qos_sdmmc = "/qos@fdf3d800"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + rknpu = "/npu@fdab0000"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + vp0 = "/vop@fdd90000/ports/port@0"; + rga3_1_mmu = "/iommu@fdb70f00"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + cpu_l0 = "/cpus/cpu@0"; + uart7 = "/serial@feba0000"; + rkisp1_vir2 = "/rkisp1-vir2"; + fec1_mmu = "/iommu@fdcd8f00"; + qos_vop_m0 = "/qos@fdf82000"; + pcie_clk1 = "/pcie-clk1"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + hdmi0_sound = "/hdmi0-sound"; + ioc = "/syscon@fd5f0000"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + avsd = "/avsd-plus@fdb51000"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + sfc = "/spi@fe2b0000"; + csi2_dphy0 = "/csi2-dphy0"; + spi1 = "/spi@feb10000"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + gpu_grf = "/syscon@fd5a0000"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + wireless_bluetooth = "/wireless-bluetooth"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + bt_sound = "/bt-sound"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + dsi0 = "/dsi@fde20000"; + pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + route_edp0 = "/display-subsystem/route/route-edp0"; + hdmi0 = "/hdmi@fde80000"; + es8388_sound = "/es8388-sound"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + vop_out = "/vop@fdd90000/ports"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + usbdp_phy1 = "/phy@fed90000"; + mailbox0 = "/mailbox@fec60000"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + sdmmc = "/mmc@fe2c0000"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + i2c0 = "/i2c@fd880000"; + pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + soc_thermal = "/thermal-zones/soc-thermal"; + cluster1_opp_table = "/cluster1-opp-table"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; + pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; + pwm6 = "/pwm@febd0020"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + hym8563 = "/i2c@fd880000/hym8563@51"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + qos_mcu_npu = "/qos@fdf72400"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; + pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; + pipe_phy1_grf = "/syscon@fd5c0000"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm11 = "/pwm@febe0030"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + i2s7_8ch = "/i2s@fddf8000"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + mipidphy1_grf = "/syscon@fd5b5000"; + usbhost3_0 = "/usbhost3_0"; + jpege2 = "/jpege-core@fdba8000"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + av1d = "/av1d@fdc70000"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; + sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; + rockchip_suspend = "/rockchip-suspend"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + npu_thermal = "/thermal-zones/npu-thermal"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + uart5 = "/serial@feb80000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + rkisp1_vir0 = "/rkisp1-vir0"; + fiq_debugger = "/fiq-debugger"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; + spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; + sdio = "/mmc@fe2d0000"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + qos_gpu_m3 = "/qos@fdf35600"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + user_led = "/leds/user"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; + qos_rga3_1 = "/qos@fdf36000"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + spdif_tx4 = "/spdif-tx@fdde8000"; + rkispp1 = "/rkispp@fdcd8000"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + mipi4_csi2 = "/mipi4-csi2"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + vcc5v0_host3 = "/vcc5v0-host3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + dp1 = "/dp@fde60000"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + vop_pins = "/pinctrl/vop/vop-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + vcc_hub = "/vcc-hub-regulator"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + mipidcphy0 = "/phy@feda0000"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + vop = "/vop@fdd90000"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + vepu = "/vepu@fdb50000"; + cif_clk = "/pinctrl/cif/cif-clk"; + pcie30_phy_grf = "/syscon@fd5b8000"; + isp1_mmu = "/iommu@fdcc7f00"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + rkvdec1_mmu = "/iommu@fdc48700"; + edp1 = "/edp@fded0000"; + cam0_cam1_switch = "/cam0-cam1-switch"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + center_thermal = "/thermal-zones/center-thermal"; + uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; + uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; + pwm4 = "/pwm@febd0000"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + rkisp0_vir2 = "/rkisp0-vir2"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + l2_cache_l2 = "/cpus/l2-cache-l2"; + pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; + qos_vdpu = "/qos@fdf67200"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + rkisp1 = "/rkisp@fdcc0000"; + usbdpphy1_grf = "/syscon@fd5cc000"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + csi2_dcphy1 = "/csi2-dcphy1"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; + chosen = "/chosen"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + mpp_srv = "/mpp-srv"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; + debug = "/debug@fd104000"; + jpege0 = "/jpege-core@fdba0000"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + cpu_b2 = "/cpus/cpu@600"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + bigcore0_grf = "/syscon@fd590000"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + uart3 = "/serial@feb60000"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + dmac1 = "/dma-controller@fea30000"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + qos_gpu_m1 = "/qos@fdf35200"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + spdif_tx2 = "/spdif-tx@fddb0000"; + npu_opp_table = "/npu-opp-table"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + vo0_grf = "/syscon@fd5a6000"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + qos_usb2host_0 = "/qos@fdf3e400"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2c7 = "/i2c@fec90000"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + sata_reset = "/pinctrl/sata/sata-reset"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + qos_vicap_m1 = "/qos@fdf40800"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + usb2phy2_grf = "/syscon@fd5d8000"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + jpege3_mmu = "/iommu@fdbac800"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; + spdif_tx1_dc = "/spdif-tx1-dc"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + php_grf = "/syscon@fd5b0000"; + pwm2 = "/pwm@fd8b0020"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + sata1 = "/sata@fe220000"; + rkispp1_vir0 = "/rkispp1-vir0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + rkisp0_vir0 = "/rkisp0-vir0"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + qos_hdcp0 = "/qos@fdf80000"; + qos_npu0_mro = "/qos@fdf72200"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + display_subsystem = "/display-subsystem"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + qos_npu2 = "/qos@fdf71000"; + i2s0_8ch = "/i2s@fe470000"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + pmu = "/power-management@fd8d8000"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + csi2_dphy5 = "/csi2-dphy5"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + mipi3_csi2 = "/mipi3-csi2"; + pmu0_grf = "/syscon@fd588000"; + fan = "/pwm-fan"; + cpu_b0 = "/cpus/cpu@400"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + mmu600_php = "/iommu@fcb00000"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + hdmi1_sound = "/hdmi1-sound"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + mod_sleep = "/mod-sleep-regulator"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + uart1 = "/serial@feb40000"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + qos_rkvdec0 = "/qos@fdf62000"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + imx415 = "/i2c@fec80000/imx415@37"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + i2s4_8ch = "/i2s@fddc0000"; + ramoops = "/reserved-memory/ramoops@110000"; + dp0_sound = "/dp0-sound"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vcc12v_dcin = "/vcc12v-dcin"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + hdcp0 = "/hdcp@fde40000"; + qos_fisheye1 = "/qos@fdf40200"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + spdif_tx1_sound = "/spdif-tx1-sound"; + qos_jpeg_enc2 = "/qos@fdf66800"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + pdm0 = "/pdm@fe4b0000"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + pcie3x4 = "/pcie@fe150000"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + jpege_ccu = "/jpege-ccu"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + pipe_phy2_grf = "/syscon@fd5c4000"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + usb_5v = "/usb-5v"; + i2s8_8ch = "/i2s@fddc8000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + hdptxphy0 = "/phy@fed60000"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + route_dp0 = "/display-subsystem/route/route-dp0"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + usbdrd3_0 = "/usbdrd3_0"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + pwm0 = "/pwm@fd8b0000"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + can1 = "/can@fea60000"; + rkvtunnel = "/rkvtunnel"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + combphy2_psu = "/phy@fee20000"; + vp3 = "/vop@fdd90000/ports/port@3"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + mmu600_pcie = "/iommu@fc900000"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + cpu_l3 = "/cpus/cpu@300"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + spdif_rx1 = "/spdif-rx@fde10000"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + rkcif_dvp = "/rkcif-dvp"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + wireless_wlan = "/wireless-wlan"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + csi2_dphy3 = "/csi2-dphy3"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + spi4 = "/spi@fecb0000"; + litcore_grf = "/syscon@fd594000"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + sys_grf = "/syscon@fd58c000"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + mdio0 = "/ethernet@fe1b0000/mdio"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + gpio2 = "/pinctrl/gpio@fec30000"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + jpegd = "/jpegd@fdb90000"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + rga3_core1 = "/rga@fdb70000"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + vcc5v0_usb = "/vcc5v0-usb"; + minidump = "/minidump"; + }; + + rkvdec-ccu@fdc30000 { + power-domains = <0x60 0x0e>; + rockchip,ccu-mode = <0x01>; + clock-names = "aclk_ccu"; + reg-names = "ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + clocks = <0x02 0x18e>; + compatible = "rockchip,rkv-decoder-v2-ccu"; + status = "okay"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdc30000 0x00 0x100>; + phandle = <0xca>; + reset-names = "video_ccu"; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + iommu@fdb50800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x76 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_vdpu_mmu"; + reg = <0x00 0xfdb50800 0x00 0x40>; + phandle = <0xb7>; + }; + + rga@fdb60000 { + power-domains = <0x60 0x16>; + iommus = <0xb9>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + compatible = "rockchip,rga3_core0"; + status = "okay"; + interrupt-names = "rga3_core0_irq"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + phandle = <0x269>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + vepu@fdb50000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x78 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-encoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_vepu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50000 0x00 0x400>; + phandle = <0x266>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + mipi3-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x227>; + }; + + hdmi0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,card-name = "rockchip-hdmi0"; + compatible = "rockchip,hdmi"; + status = "okay"; + phandle = <0x49b>; + rockchip,mclk-fs = <0x80>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + minidump-smem@1f0000 { + status = "disabled"; + reg = <0x00 0x1f0000 0x00 0x100>; + phandle = <0x1cf>; + no-map; + }; + + minidump-mem@c000000 { + status = "disabled"; + reg = <0x00 0xc000000 0x00 0x2000000>; + phandle = <0x1d0>; + no-map; + }; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reusable; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0xedf00000 0x00 0x2e0000>; + phandle = <0x37>; + }; + + ramoops@110000 { + boot-log-count = <0x01>; + record-size = <0x14000>; + pmsg-size = <0x30000>; + compatible = "ramoops"; + console-size = <0x80000>; + reg = <0x00 0x110000 0x00 0xe0000>; + phandle = <0x493>; + boot-log-size = <0x8000>; + ftrace-size = <0x00>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + }; + + pcie@fe160000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1ba>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x10 0x1f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20e 0x02 0x21d>; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x08 0x00>; + num-lanes = <0x02>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + linux,pci-domain = <0x01>; + phandle = <0x486>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xff 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b9>; + interrupt-controller; + }; + }; + + spdif-tx@fddb8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc6 0x04>; + clocks = <0x02 0x20f 0x02 0x20a>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + phandle = <0x1e2>; + dmas = <0xf1 0x16>; + }; + + pvtm@fdb30000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + + pvtm@4 { + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + clocks = <0x02 0x118>; + reg = <0x04>; + reset-names = "rts\0rst-p"; + }; + }; + + spdif-tx1-dc { + #sound-dai-cells = <0x00>; + compatible = "linux,spdif-dit"; + status = "disabled"; + phandle = <0x1d8>; + }; + + csi2-dphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "okay"; + phys = <0x2f 0x30>; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x32>; + reg = <0x01>; + phandle = <0x184>; + }; + + endpoint@0 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x31>; + reg = <0x00>; + phandle = <0x183>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x33>; + reg = <0x00>; + phandle = <0x4d>; + }; + }; + }; + }; + + rkisp-unite@fdcb0000 { + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp-unite"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + phandle = <0x277>; + }; + + sata@fe230000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + reg = <0x00 0xfe230000 0x00 0x1000>; + phandle = <0x291>; + ports-implemented = <0x01>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + bt-sound { + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49a>; + simple-audio-card,mclk-fs = <0x100>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + iommu@fdb90480 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x82 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpegd_mmu"; + reg = <0x00 0xfdb90480 0x00 0x40>; + phandle = <0xbb>; + }; + + hdcp@fde70000 { + power-domains = <0x60 0x1a>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde70000 0x00 0x80>; + phandle = <0x287>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xd8>; + }; + + spdif-tx@fe4f0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc2 0x04>; + clocks = <0x02 0x47 0x02 0x44>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + phandle = <0x1d7>; + dmas = <0xf1 0x05>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22d>; + }; + + es8388-sound { + pinctrl-names = "default"; + rockchip,cpu = <0x1da>; + pinctrl-0 = <0x1dc>; + rockchip,codec = <0x1db>; + hp-det-gpio = <0x79 0x13 0x00>; + rockchip,card-name = "rockchip-es8388"; + rockchip,format = "i2s"; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + compatible = "firefly,multicodecs-card"; + linein-type = <0x01>; + status = "okay"; + phandle = <0x49f>; + hp-con-gpio = <0x182 0x0b 0x00>; + firefly,not-use-dapm; + rockchip,mclk-fs = <0x180>; + }; + + spi@feb30000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x15d 0x15e 0x15f>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x149 0x04>; + clocks = <0x02 0xa6 0x02 0xa1>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + phandle = <0x2c8>; + dmas = <0xf1 0x11 0xf1 0x12>; + }; + + phy@fee80000 { + rockchip,pipe-grf = <0x76>; + clock-names = "pclk"; + rockchip,pcie30-phymode = <0x01>; + resets = <0x02 0x2000a>; + clocks = <0x02 0x188>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-pcie3-phy"; + status = "okay"; + reg = <0x00 0xfee80000 0x00 0x20000>; + phandle = <0x1b7>; + reset-names = "phy"; + rockchip,phy-grf = <0x1cc>; + }; + + vcc12v-dcin { + regulator-max-microvolt = <0xb71b00>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b00>; + regulator-name = "vcc12v_dcin"; + compatible = "regulator-fixed"; + phandle = <0x1cd>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + i2s@fde00000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x417>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfde00000 0x00 0x1000>; + phandle = <0x47e>; + dmas = <0xf2 0x18>; + reset-names = "rx-m"; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + i2s@fddfc000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x413>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + phandle = <0x27f>; + dmas = <0xf2 0x17>; + reset-names = "rx-m"; + }; + + usbdrd3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + usb-role-switch; + phy_type = "utmi_wide"; + quirk-skip-phy-init; + resets = <0x02 0x2a4>; + interrupts = <0x00 0xdc 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x66 0x67>; + reg = <0x00 0xfc000000 0x00 0x400000>; + phandle = <0x253>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x68>; + reg = <0x00>; + phandle = <0x17d>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x478>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x51>; + phandle = <0x22a>; + }; + + iommu@fdd97e00 { + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "vop_mmu"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + phandle = <0xd6>; + rockchip,disable-device-link-resume; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + i2c@fead0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14d>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb4 0x02 0xac>; + interrupts = <0x00 0x142 0x04>; + clocks = <0x02 0x91 0x02 0x89>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfead0000 0x00 0x1000>; + phandle = <0x2a8>; + reset-names = "i2c\0apb"; + }; + + iommu@fdba4800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7b 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege1_mmu"; + reg = <0x00 0xfdba4800 0x00 0x40>; + phandle = <0xbe>; + }; + + spdif-rx@fde10000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3ff>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde10000 0x00 0x1000>; + phandle = <0x47f>; + dmas = <0x7c 0x16>; + reset-names = "spdifrx-m"; + }; + + npu@fdab0000 { + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + iommus = <0xb2>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + power-domain-names = "npu0\0npu1\0npu2"; + rknpu-supply = <0xb3>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + compatible = "rockchip,rk3588-rknpu"; + status = "okay"; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + mem-supply = <0xb3>; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + phandle = <0x265>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + operating-points-v2 = <0xb1>; + }; + + hdmiphy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "okay"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0xfd>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + dmc-opp-table { + nvmem-cells = <0x44 0x45 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + phandle = <0x41>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,supported-hw; + + opp-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-1068000000 { + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-528000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0x06 0xffff>; + }; + }; + + rkvenc-core@fdbe0000 { + power-domains = <0x60 0x11>; + iommus = <0xc5>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + interrupts = <0x00 0x68 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + phandle = <0x273>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + watchdog@feaf0000 { + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + clocks = <0x02 0x6c 0x02 0x6b>; + compatible = "snps,dw-wdt"; + status = "okay"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + phandle = <0x2aa>; + }; + + syscon@fd5d8000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + phandle = <0x25d>; + + usb2-phy@8000 { + clock-output-names = "usb480m_phy2"; + clock-names = "phyclk"; + resets = <0x02 0xc0049 0x02 0x48a>; + interrupts = <0x00 0x187 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x8000 0x10>; + phandle = <0x69>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6c>; + }; + }; + }; + + cluster0-opp-table { + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,dsu-grf = <0x23>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x1f 0x20 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,opp-shared-dsu; + rockchip,high-temp-max-freq = <0x188940>; + opp-shared; + rockchip,reboot-freq = <0x159b40>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x22>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + phandle = <0x0f>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-1200000000 { + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-hz = <0x00 0x6590fa00>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + }; + + opp-j-1296000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-supported-hw = <0x04 0xffff>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-suspend; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + }; + + vcc-4g-regulator { + regulator-boot-on; + gpio = <0x182 0x00 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_4g"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b0>; + }; + + spi@fecb0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x187 0x188 0x189>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x14a 0x04>; + clocks = <0x02 0xa7 0x02 0xa2>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + phandle = <0x2e6>; + dmas = <0xf2 0x0d 0xf2 0x0e>; + }; + + spdif-rx@fde08000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3fd>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde08000 0x00 0x1000>; + phandle = <0x280>; + dmas = <0x7c 0x15>; + reset-names = "spdifrx-m"; + }; + + mipi3-csi2-hw@fdd40000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x327>; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + clocks = <0x02 0x1d2>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + phandle = <0x4a>; + reset-names = "srst_csihost_p"; + }; + + // DTB memory region: { address: 0x9400000, size: 0xe6c00000 } 3.6G + // DTB memory region: { address: 0x2f0000000, size: 0x10000000 } 256M + + memory { + device_type = "memory"; + reg = <0x00 0x9400000 0x00 0xe6c00000 0x02 0xf0000000 0x00 0x10000000 >; + }; + + jpege-core@fdba4000 { + power-domains = <0x60 0x15>; + iommus = <0xbe>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ae>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + interrupts = <0x00 0x7c 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba4000 0x00 0x400>; + phandle = <0x26e>; + reset-names = "video_a\0video_h"; + }; + + wireless-wlan { + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + wifi_chip_type = "rtl8822ce"; + compatible = "wlan-platdata"; + status = "okay"; + phandle = <0x4ab>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x475>; + }; + + dp@fde50000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0xf6>; + reg = <0x00 0xfde50000 0x00 0x4000>; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x38>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe0>; + }; + + endpoint@2 { + remote-endpoint = <0xf8>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe6>; + }; + + endpoint@0 { + remote-endpoint = <0xf7>; + status = "disabled"; + reg = <0x00>; + phandle = <0xda>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + rockchip-system-monitor { + rockchip,thermal-zone = "soc-thermal"; + compatible = "rockchip,system-monitor"; + phandle = <0x247>; + }; + + vcc3v3-pcie30 { + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc3v3_pcie30"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x1b8>; + vin-supply = <0x1cd>; + gpios = <0x182 0x04 0x00>; + }; + + phy@fedb0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + clocks = <0x02 0x109 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x191>; + reg = <0x00 0xfedb0000 0x00 0x10000>; + phandle = <0x30>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + rkvdec-core@fdc38000 { + power-domains = <0x60 0x0e>; + iommus = <0xc9>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + interrupts = <0x00 0x5f 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec0"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xfff00000 0x100000>; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + phandle = <0x274>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcb>; + }; + + minidump { + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + compatible = "rockchip,minidump"; + status = "disabled"; + phandle = <0x491>; + }; +}; diff --git a/configs/vms/aio-rk3588-jd4-vm2.dts b/configs/vms/aio-rk3588-jd4-vm2.dts new file mode 100644 index 00000000..79cedc5f --- /dev/null +++ b/configs/vms/aio-rk3588-jd4-vm2.dts @@ -0,0 +1,12823 @@ +/dts-v1/; + +/ { + #address-cells = <0x02>; + model = "Firefly AIO-3588JD4"; + serial-number = "a0deeea630de3975"; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; + + pcie30-avdd1v8 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pcie30_avdd1v8"; + compatible = "regulator-fixed"; + phandle = <0x4a6>; + vin-supply = <0x1de>; + }; + + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + vcc5v0-host3 { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host3"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a2>; + vin-supply = <0x1dd>; + }; + + pwm@febd0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x16c>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0030 0x00 0x10>; + phandle = <0x2d4>; + }; + + rkisp@fdcc0000 { + power-domains = <0x60 0x1c>; + iommus = <0xd1>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcc0000 0x00 0x7f00>; + phandle = <0x5a>; + }; + + qos@fdf66600 { + compatible = "syscon"; + reg = <0x00 0xfdf66600 0x00 0x20>; + phandle = <0x96>; + }; + + serial@febb0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x167>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x153 0x04>; + clocks = <0x02 0xd3 0x02 0xb2>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebb0000 0x00 0x100>; + phandle = <0x2d0>; + dmas = <0xf2 0x09 0xf2 0x0a>; + reg-shift = <0x02>; + }; + + qos@fdf41000 { + compatible = "syscon"; + reg = <0x00 0xfdf41000 0x00 0x20>; + phandle = <0xa6>; + }; + + csi2-dcphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20e>; + }; + + rkispp0-vir0 { + rockchip,hw = <0x5b>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x243>; + }; + + wireless-bluetooth { + pinctrl-names = "default\0rts_gpio"; + pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; + clock-names = "ext_clock"; + BT,power_gpio = <0x7b 0x16 0x00>; + clocks = <0x1e4>; + BT,wake_gpio = <0x7b 0x15 0x00>; + uart_rts_gpios = <0xfe 0x02 0x01>; + compatible = "bluetooth-platdata"; + BT,wake_host_irq = <0x7b 0x00 0x00>; + pinctrl-1 = <0x1e9>; + status = "disabled"; + phandle = <0x4aa>; + }; + + pwm@febd0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16b>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0020 0x00 0x10>; + phandle = <0x2d3>; + }; + + qos@fdf39000 { + compatible = "syscon"; + reg = <0x00 0xfdf39000 0x00 0x20>; + phandle = <0xaf>; + }; + + cam0-cam1-switch { + regulator-max-microvolt = <0x1b7740>; + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x181 0x11 0x00>; + pinctrl-0 = <0x1f0>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "cam0_cam1_switch"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b2>; + }; + + qos@fdf3e400 { + compatible = "syscon"; + reg = <0x00 0xfdf3e400 0x00 0x20>; + phandle = <0xad>; + }; + + mipi2-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "okay"; + firefly-compatible; + phandle = <0x226>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x4d>; + reg = <0x00>; + phandle = <0x33>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x4e>; + reg = <0x00>; + phandle = <0x54>; + }; + }; + }; + }; + + iommu@fdc48700 { + power-domains = <0x60 0x0f>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x62 0x04>; + clocks = <0x02 0x195 0x02 0x194>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec1_mmu"; + reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; + phandle = <0xcc>; + rockchip,master-handle-irq; + }; + + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; + + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; + + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; + + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; + + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; + }; + + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; + + uio@fe1c0000 { + compatible = "rockchip,uio-gmac"; + status = "disabled"; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + phandle = <0x28e>; + rockchip,ethernet = <0x109>; + }; + + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; + + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; + + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; + }; + + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; + + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; + + eth0 { + + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; + }; + }; + + i2c3 { + + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; + }; + + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; + }; + + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; + }; + + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; + }; + + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; + }; + }; + + pwm9 { + + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; + }; + + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; + }; + + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + }; + + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; + }; + + mipi { + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + }; + + pwm14 { + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + }; + + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + wireless-bluetooth { + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + }; + + pcie30x1 { + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + }; + + uart8 { + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + }; + + spi2 { + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m1-cs0 { + rockchip,pins = <0x04 0x07 0x08 0x19a>; + phandle = <0x406>; + }; + }; + + pcfg-pull-up-drv-level-15 { + drive-strength = <0x0f>; + phandle = <0x462>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-13 { + drive-strength = <0x0d>; + bias-pull-down; + phandle = <0x469>; + }; + + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; + }; + + i2s1 { + + i2s1m0-sdo1 { + rockchip,pins = <0x04 0x0a 0x03 0x198>; + phandle = <0x127>; + }; + + i2s1m1-sdi1 { + rockchip,pins = <0x00 0x16 0x01 0x198>; + phandle = <0x380>; + }; + + i2s1m0-sdi3 { + rockchip,pins = <0x04 0x08 0x03 0x198>; + phandle = <0x125>; + }; + + i2s1m0-mclk { + rockchip,pins = <0x04 0x00 0x03 0x19d>; + phandle = <0x37b>; + }; + + i2s1m0-sdi1 { + rockchip,pins = <0x04 0x06 0x03 0x198>; + phandle = <0x123>; + }; + + i2s1m1-sdo2 { + rockchip,pins = <0x00 0x1c 0x01 0x198>; + phandle = <0x385>; + }; + + i2s1m1-sdo0 { + rockchip,pins = <0x00 0x19 0x01 0x198>; + phandle = <0x383>; + }; + + i2s1m0-sdo2 { + rockchip,pins = <0x04 0x0b 0x03 0x198>; + phandle = <0x128>; + }; + + i2s1m1-sdi2 { + rockchip,pins = <0x00 0x17 0x01 0x198>; + phandle = <0x381>; + }; + + i2s1m0-sdo0 { + rockchip,pins = <0x04 0x09 0x03 0x198>; + phandle = <0x126>; + }; + + i2s1m1-sdi0 { + rockchip,pins = <0x00 0x15 0x01 0x198>; + phandle = <0x37f>; + }; + + i2s1m0-sdi2 { + rockchip,pins = <0x04 0x07 0x03 0x198>; + phandle = <0x124>; + }; + + i2s1m1-sclk { + rockchip,pins = <0x00 0x0e 0x01 0x19d>; + phandle = <0x37e>; + }; + + i2s1m0-sdi0 { + rockchip,pins = <0x04 0x05 0x03 0x198>; + phandle = <0x122>; + }; + + i2s1m1-sdo3 { + rockchip,pins = <0x00 0x1d 0x01 0x198>; + phandle = <0x386>; + }; + + i2s1m1-lrck { + rockchip,pins = <0x00 0x0f 0x01 0x19d>; + phandle = <0x37c>; + }; + + i2s1m0-sclk { + rockchip,pins = <0x04 0x01 0x03 0x19d>; + phandle = <0x121>; + }; + + i2s1m1-sdo1 { + rockchip,pins = <0x00 0x1a 0x01 0x198>; + phandle = <0x384>; + }; + + i2s1m0-sdo3 { + rockchip,pins = <0x04 0x0c 0x03 0x198>; + phandle = <0x129>; + }; + + i2s1m1-sdi3 { + rockchip,pins = <0x00 0x18 0x01 0x198>; + phandle = <0x382>; + }; + + i2s1m0-lrck { + rockchip,pins = <0x04 0x02 0x03 0x19d>; + phandle = <0x120>; + }; + + i2s1m1-mclk { + rockchip,pins = <0x00 0x0d 0x01 0x19d>; + phandle = <0x37d>; + }; + }; + + ddrphych2 { + + ddrphych2-pins { + rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; + phandle = <0x31a>; + }; + }; + + pcfg-pull-none-drv-level-12 { + drive-strength = <0x0c>; + bias-disable; + phandle = <0x456>; + }; + + i2c1 { + + i2c1m2-xfer { + rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; + phandle = <0x148>; + }; + + i2c1m1-xfer { + rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; + phandle = <0x357>; + }; + + i2c1m0-xfer { + rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; + phandle = <0x356>; + }; + + i2c1m4-xfer { + rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; + phandle = <0x359>; + }; + + i2c1m3-xfer { + rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; + phandle = <0x358>; + }; + }; + + pwm7 { + + pwm7m3-pins { + rockchip,pins = <0x04 0x16 0x0b 0x198>; + phandle = <0x3d3>; + }; + + pwm7m2-pins { + rockchip,pins = <0x01 0x13 0x0b 0x198>; + phandle = <0x3d2>; + }; + + pwm7m1-pins { + rockchip,pins = <0x04 0x1c 0x0b 0x198>; + phandle = <0x3d1>; + }; + + pwm7m0-pins { + rockchip,pins = <0x00 0x18 0x0b 0x198>; + phandle = <0x16c>; + }; + }; + + pcfg-pull-none-drv-level-5 { + drive-strength = <0x05>; + bias-disable; + phandle = <0x2f1>; + }; + + gmac0 { + + gmac0-clkinout { + rockchip,pins = <0x04 0x13 0x01 0x198>; + phandle = <0x46d>; + }; + + gmac0-miim { + rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; + phandle = <0x1c1>; + }; + + gmac0-tx-bus2 { + rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; + phandle = <0x1c2>; + }; + + gmac0-rgmii-bus { + rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; + phandle = <0x1c5>; + }; + + gmac0-ppsclk { + rockchip,pins = <0x02 0x14 0x01 0x198>; + phandle = <0x46e>; + }; + + gmac0-txer { + rockchip,pins = <0x04 0x16 0x01 0x198>; + phandle = <0x471>; + }; + + gmac0-ptp-refclk { + rockchip,pins = <0x02 0x0c 0x01 0x198>; + phandle = <0x470>; + }; + + gmac0-rx-bus2 { + rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; + phandle = <0x1c3>; + }; + + gmac0-rgmii-clk { + rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; + phandle = <0x1c4>; + }; + + gmac0-ppstring { + rockchip,pins = <0x02 0x0d 0x01 0x198>; + phandle = <0x46f>; + }; + }; + + pwm12 { + + pwm12m1-pins { + rockchip,pins = <0x04 0x0d 0x0b 0x198>; + phandle = <0x3dd>; + }; + + pwm12m0-pins { + rockchip,pins = <0x03 0x0d 0x0b 0x198>; + phandle = <0x171>; + }; + }; + + usb-typec { + + usbc0-int { + rockchip,pins = <0x00 0x1b 0x00 0x198>; + phandle = <0x17b>; + }; + + usb-5v-ctrl { + rockchip,pins = <0x01 0x03 0x00 0x198>; + phandle = <0x1ef>; + }; + }; + + uart6 { + + uart6m1-ctsn { + rockchip,pins = <0x01 0x03 0x0a 0x198>; + phandle = <0x436>; + }; + + uart6m2-xfer { + rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; + phandle = <0x437>; + }; + + uart6m0-ctsn { + rockchip,pins = <0x02 0x09 0x0a 0x198>; + phandle = <0x439>; + }; + + uart6m1-xfer { + rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; + phandle = <0x165>; + }; + + uart6m0-xfer { + rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; + phandle = <0x438>; + }; + + uart6m1-rtsn { + rockchip,pins = <0x01 0x02 0x0a 0x198>; + phandle = <0x1e5>; + }; + + uart6m0-rtsn { + rockchip,pins = <0x02 0x08 0x0a 0x198>; + phandle = <0x43a>; + }; + }; + + pcfg-pull-down-drv-level-8 { + drive-strength = <0x08>; + bias-pull-down; + phandle = <0x464>; + }; + + gpu { + + gpu-pins { + rockchip,pins = <0x00 0x15 0x02 0x198>; + phandle = <0x333>; + }; + }; + + spi0 { + + spi0m2-cs1 { + rockchip,pins = <0x01 0x0d 0x08 0x19a>; + phandle = <0x3f8>; + }; + + spi0m0-cs0 { + rockchip,pins = <0x00 0x19 0x08 0x19a>; + phandle = <0x14e>; + }; + + spi0m3-pins { + rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; + phandle = <0x3f9>; + }; + + spi0m3-cs1 { + rockchip,pins = <0x03 0x1d 0x08 0x19a>; + phandle = <0x3fb>; + }; + + spi0m2-pins { + rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; + phandle = <0x3f6>; + }; + + spi0m1-cs0 { + rockchip,pins = <0x04 0x0a 0x08 0x19a>; + phandle = <0x3f4>; + }; + + spi0m1-pins { + rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; + phandle = <0x3f3>; + }; + + spi0m0-cs1 { + rockchip,pins = <0x00 0x0f 0x08 0x19a>; + phandle = <0x14f>; + }; + + spi0m2-cs0 { + rockchip,pins = <0x01 0x0c 0x08 0x19a>; + phandle = <0x3f7>; + }; + + spi0m0-pins { + rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; + phandle = <0x150>; + }; + + spi0m1-cs1 { + rockchip,pins = <0x04 0x09 0x08 0x19a>; + phandle = <0x3f5>; + }; + + spi0m3-cs0 { + rockchip,pins = <0x03 0x1c 0x08 0x19a>; + phandle = <0x3fa>; + }; + }; + + fspi { + + fspim0-cs1 { + rockchip,pins = <0x02 0x1f 0x02 0x199>; + phandle = <0x329>; + }; + + fspim1-pins { + rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; + phandle = <0x32c>; + }; + + fspim0-pins { + rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; + phandle = <0x328>; + }; + + fspim1-cs1 { + rockchip,pins = <0x02 0x0d 0x03 0x199>; + phandle = <0x32d>; + }; + + fspim2-cs1 { + rockchip,pins = <0x03 0x15 0x02 0x199>; + phandle = <0x32b>; + }; + + fspim2-pins { + rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; + phandle = <0x32a>; + }; + }; + + pcfg-pull-up-drv-level-13 { + drive-strength = <0x0d>; + phandle = <0x460>; + bias-pull-up; + }; + + clk32k { + + clk32k-out0 { + rockchip,pins = <0x00 0x0a 0x02 0x198>; + phandle = <0x315>; + }; + + clk32k-in { + rockchip,pins = <0x00 0x0a 0x01 0x198>; + phandle = <0x314>; + }; + + clk32k-out1 { + rockchip,pins = <0x02 0x15 0x01 0x198>; + phandle = <0x316>; + }; + }; + + pcfg-pull-down-drv-level-11 { + drive-strength = <0x0b>; + bias-pull-down; + phandle = <0x467>; + }; + + pcie30phy { + + pcie30phy-pins { + rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; + phandle = <0x3a4>; + }; + }; + + pcfg-pull-up-drv-level-0 { + drive-strength = <0x00>; + phandle = <0x2f3>; + bias-pull-up; + }; + + ddrphych0 { + + ddrphych0-pins { + rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; + phandle = <0x318>; + }; + }; + + pcfg-pull-none-drv-level-10 { + drive-strength = <0x0a>; + bias-disable; + phandle = <0x454>; + }; + + pwm5 { + + pwm5m2-pins { + rockchip,pins = <0x04 0x14 0x0b 0x198>; + phandle = <0x3ce>; + }; + + pwm5m1-pins { + rockchip,pins = <0x00 0x16 0x0b 0x198>; + phandle = <0x16a>; + }; + + pwm5m0-pins { + rockchip,pins = <0x00 0x09 0x03 0x198>; + phandle = <0x3cd>; + }; + }; + + pcfg-pull-none-drv-level-3 { + drive-strength = <0x03>; + bias-disable; + phandle = <0x2ef>; + }; + + pwm10 { + + pwm10m2-pins { + rockchip,pins = <0x03 0x1b 0x0b 0x198>; + phandle = <0x3d9>; + }; + + pwm10m1-pins { + rockchip,pins = <0x04 0x1b 0x0b 0x198>; + phandle = <0x3d8>; + }; + + pwm10m0-pins { + rockchip,pins = <0x03 0x00 0x0b 0x198>; + phandle = <0x16f>; + }; + }; + + pcfg-pull-down-smt { + input-schmitt-enable; + bias-pull-down; + phandle = <0x2ff>; + }; + + gpio@fec50000 { + gpio-controller; + interrupts = <0x00 0x119 0x04>; + clocks = <0x02 0x83 0x02 0x84>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec50000 0x00 0x100>; + phandle = <0x10d>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x80 0x20>; + interrupt-controller; + }; + + pcfg-pull-down { + bias-pull-down; + phandle = <0x2ec>; + }; + + uart4 { + + uart4m2-xfer { + rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; + phandle = <0x42d>; + }; + + uart4-ctsn { + rockchip,pins = <0x01 0x17 0x0a 0x198>; + phandle = <0x42e>; + }; + + uart4m1-xfer { + rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; + phandle = <0x163>; + }; + + uart4m0-xfer { + rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; + phandle = <0x42c>; + }; + + uart4-rtsn { + rockchip,pins = <0x01 0x15 0x0a 0x198>; + phandle = <0x42f>; + }; + }; + + spdif0 { + + spdif0m0-tx { + rockchip,pins = <0x01 0x0e 0x03 0x198>; + phandle = <0x142>; + }; + + spdif0m1-tx { + rockchip,pins = <0x04 0x0c 0x06 0x198>; + phandle = <0x3f0>; + }; + }; + + pcfg-pull-down-drv-level-6 { + drive-strength = <0x06>; + bias-pull-down; + phandle = <0x2fd>; + }; + + pcfg-pull-up-drv-level-9 { + drive-strength = <0x09>; + phandle = <0x45c>; + bias-pull-up; + }; + + pcfg-pull-none-drv-level-1-smt { + drive-strength = <0x01>; + bias-disable; + input-schmitt-enable; + phandle = <0x19c>; + }; + + pcfg-pull-up-drv-level-11 { + drive-strength = <0x0b>; + phandle = <0x45e>; + bias-pull-up; + }; + + mcu { + + mcum1-pins { + rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; + phandle = <0x394>; + }; + + mcum0-pins { + rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; + phandle = <0x393>; + }; + }; + + i2c8 { + + i2c8m4-xfer { + rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; + phandle = <0x373>; + }; + + i2c8m3-xfer { + rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; + phandle = <0x372>; + }; + + i2c8m2-xfer { + rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; + phandle = <0x371>; + }; + + i2c8m1-xfer { + rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; + phandle = <0x374>; + }; + + i2c8m0-xfer { + rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; + phandle = <0x186>; + }; + }; + + dp0 { + + dp0m0-pins { + rockchip,pins = <0x04 0x0c 0x05 0x198>; + phandle = <0x31c>; + }; + + dp0m2-pins { + rockchip,pins = <0x01 0x00 0x05 0x198>; + phandle = <0x31e>; + }; + + dp0m1-pins { + rockchip,pins = <0x00 0x14 0x0a 0x198>; + phandle = <0x31d>; + }; + }; + + pcfg-pull-none-drv-level-5-smt { + drive-strength = <0x05>; + bias-disable; + input-schmitt-enable; + phandle = <0x19b>; + }; + + pwm3 { + + pwm3m2-pins { + rockchip,pins = <0x01 0x12 0x0b 0x198>; + phandle = <0x3ca>; + }; + + pwm3m1-pins { + rockchip,pins = <0x03 0x0a 0x0b 0x198>; + phandle = <0x3c9>; + }; + + pwm3m0-pins { + rockchip,pins = <0x00 0x1c 0x03 0x198>; + phandle = <0x81>; + }; + + pwm3m3-pins { + rockchip,pins = <0x01 0x07 0x0b 0x198>; + phandle = <0x3cb>; + }; + }; + + pcfg-pull-none-drv-level-1 { + drive-strength = <0x01>; + bias-disable; + phandle = <0x2ee>; + }; + + sata2 { + + sata2m1-pins { + rockchip,pins = <0x01 0x0f 0x06 0x198>; + phandle = <0x3ed>; + }; + + sata2m0-pins { + rockchip,pins = <0x04 0x09 0x06 0x198>; + phandle = <0x3ec>; + }; + }; + + cam { + + cam0-or-cam1-switch-pin { + rockchip,pins = <0x03 0x11 0x00 0x198>; + phandle = <0x1f0>; + }; + }; + + uart2 { + + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; + }; + + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; + }; + + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; + }; + + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; + }; + + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; + }; + }; + + pcfg-pull-down-drv-level-4 { + drive-strength = <0x04>; + bias-pull-down; + phandle = <0x2fb>; + }; + + pcfg-pull-up-drv-level-7 { + drive-strength = <0x07>; + phandle = <0x45a>; + bias-pull-up; + }; + + i2c6 { + + i2c6m4-xfer { + rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; + phandle = <0x36c>; + }; + + i2c6m3-xfer { + rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; + phandle = <0x36b>; + }; + + i2c6m2-xfer { + rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; + phandle = <0x36d>; + }; + + i2c6m1-xfer { + rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; + phandle = <0x36a>; + }; + + i2c6m0-xfer { + rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; + phandle = <0x178>; + }; + }; + + pdm1 { + + pdm1m1-sdi3 { + rockchip,pins = <0x01 0x0a 0x02 0x198>; + phandle = <0x3c1>; + }; + + pdm1m0-clk { + rockchip,pins = <0x04 0x1d 0x02 0x198>; + phandle = <0x140>; + }; + + pdm1m1-sdi1 { + rockchip,pins = <0x01 0x08 0x02 0x198>; + phandle = <0x3bf>; + }; + + pdm1m0-sdi3 { + rockchip,pins = <0x04 0x18 0x02 0x198>; + phandle = <0x13e>; + }; + + pdm1m0-sdi1 { + rockchip,pins = <0x04 0x1a 0x02 0x198>; + phandle = <0x13c>; + }; + + pdm1m1-clk { + rockchip,pins = <0x01 0x0c 0x02 0x198>; + phandle = <0x3bb>; + }; + + pdm1m1-clk1 { + rockchip,pins = <0x01 0x0b 0x02 0x198>; + phandle = <0x3bc>; + }; + + pdm1m1-idle { + rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; + phandle = <0x3bd>; + }; + + pdm1m0-clk1 { + rockchip,pins = <0x04 0x1c 0x02 0x198>; + phandle = <0x141>; + }; + + pdm1m1-sdi2 { + rockchip,pins = <0x01 0x09 0x02 0x198>; + phandle = <0x3c0>; + }; + + pdm1m0-idle { + rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; + phandle = <0x13f>; + }; + + pdm1m1-sdi0 { + rockchip,pins = <0x01 0x07 0x02 0x198>; + phandle = <0x3be>; + }; + + pdm1m0-sdi2 { + rockchip,pins = <0x04 0x19 0x02 0x198>; + phandle = <0x13d>; + }; + + pdm1m0-sdi0 { + rockchip,pins = <0x04 0x1b 0x02 0x198>; + phandle = <0x13b>; + }; + }; + + cpu { + + cpu-pins { + rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; + phandle = <0x317>; + }; + }; + + gpio-func { + + tsadc-gpio-func { + rockchip,pins = <0x00 0x01 0x00 0x198>; + phandle = <0x175>; + }; + }; + + pcie20x1 { + + pcie20x1-2-button-rstn { + rockchip,pins = <0x04 0x0b 0x04 0x198>; + phandle = <0x3a3>; + }; + + pcie20x1m1-pins { + rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; + phandle = <0x3a2>; + }; + + pcie20x1m0-pins { + rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; + phandle = <0x3a1>; + }; + }; + + leds { + + leds-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1ee>; + }; + }; + + pwm1 { + + pwm1m1-pins { + rockchip,pins = <0x01 0x1b 0x0b 0x198>; + phandle = <0x3c5>; + }; + + pwm1m0-pins { + rockchip,pins = <0x00 0x10 0x03 0x198>; + phandle = <0x7f>; + }; + + pwm1m2-pins { + rockchip,pins = <0x01 0x03 0x0b 0x198>; + phandle = <0x3c6>; + }; + }; + + sata0 { + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + }; + + refclk { + + refclk-pins { + rockchip,pins = <0x00 0x00 0x01 0x198>; + phandle = <0x3e5>; + }; + }; + + pcie30x4 { + + pcie30x4m2-pins { + rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; + phandle = <0x3b1>; + }; + + pcie30x4m1-pins { + rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; + phandle = <0x3b0>; + }; + + pcie30x4-button-rstn { + rockchip,pins = <0x03 0x1d 0x04 0x198>; + phandle = <0x3b3>; + }; + + pcie30x4m0-pins { + rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; + phandle = <0x3af>; + }; + + pcie30x4m3-pins { + rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; + phandle = <0x3b2>; + }; + }; + + can2 { + + can2m1-pins { + rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; + phandle = <0x30f>; + }; + + can2m0-pins { + rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; + phandle = <0x147>; + }; + }; + + litcpu { + + litcpu-pins { + rockchip,pins = <0x00 0x1b 0x01 0x198>; + phandle = <0x392>; + }; + }; + + sata { + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; + + tsadc { + + tsadc-shut { + rockchip,pins = <0x00 0x01 0x02 0x198>; + phandle = <0x176>; + }; + + tsadc-shut-org { + rockchip,pins = <0x00 0x01 0x01 0x198>; + phandle = <0x418>; + }; + + tsadcm1-shut { + rockchip,pins = <0x00 0x02 0x02 0x198>; + phandle = <0x417>; + }; + }; + + uart0 { + + uart0m1-xfer { + rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; + phandle = <0x7d>; + }; + + uart0m0-xfer { + rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; + phandle = <0x419>; + }; + + uart0-rtsn { + rockchip,pins = <0x00 0x16 0x04 0x198>; + phandle = <0x41c>; + }; + + uart0-ctsn { + rockchip,pins = <0x00 0x19 0x04 0x198>; + phandle = <0x41b>; + }; + + uart0m2-xfer { + rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; + phandle = <0x41a>; + }; + }; + + pcfg-pull-down-drv-level-2 { + drive-strength = <0x02>; + bias-pull-down; + phandle = <0x2f9>; + }; + + pcfg-pull-up-drv-level-5 { + drive-strength = <0x05>; + phandle = <0x2f6>; + bias-pull-up; + }; + + gpio@fec20000 { + gpio-controller; + interrupts = <0x00 0x116 0x04>; + clocks = <0x02 0x7d 0x02 0x7e>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec20000 0x00 0x100>; + phandle = <0xfe>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x20 0x20>; + interrupt-controller; + }; + + pcfg-pull-none-drv-level-15 { + drive-strength = <0x0f>; + bias-disable; + phandle = <0x459>; + }; + + eth1 { + + eth1-pins { + rockchip,pins = <0x03 0x06 0x01 0x198>; + phandle = <0x327>; + }; + }; + + i2c4 { + + i2c4m3-xfer { + rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; + phandle = <0x364>; + }; + + i2c4m2-xfer { + rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; + phandle = <0x363>; + }; + + i2c4m1-xfer { + rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; + phandle = <0x14b>; + }; + + i2c4m0-xfer { + rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; + phandle = <0x362>; + }; + + i2c4m4-xfer { + rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; + phandle = <0x365>; + }; + }; + + emmc { + + emmc-data-strobe { + rockchip,pins = <0x02 0x02 0x01 0x198>; + phandle = <0x326>; + }; + + emmc-clk { + rockchip,pins = <0x02 0x01 0x01 0x199>; + phandle = <0x324>; + }; + + emmc-bus8 { + rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; + phandle = <0x323>; + }; + + emmc-cmd { + rockchip,pins = <0x02 0x00 0x01 0x199>; + phandle = <0x325>; + }; + + emmc-rstnout { + rockchip,pins = <0x02 0x03 0x01 0x198>; + phandle = <0x322>; + }; + }; + + pcfg-pull-none-drv-level-8 { + drive-strength = <0x08>; + bias-disable; + phandle = <0x452>; + }; + + pwm15 { + + pwm15m0-pins { + rockchip,pins = <0x03 0x13 0x0b 0x198>; + phandle = <0x174>; + }; + + pwm15m3-pins { + rockchip,pins = <0x01 0x1f 0x0b 0x198>; + phandle = <0x3e4>; + }; + + pwm15m2-pins { + rockchip,pins = <0x01 0x16 0x0b 0x198>; + phandle = <0x3e3>; + }; + + pwm15m1-pins { + rockchip,pins = <0x04 0x0b 0x0b 0x198>; + phandle = <0x3e2>; + }; + }; + + pcie30x2 { + + pcie30x2m2-pins { + rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; + phandle = <0x3ac>; + }; + + pcie30x2m1-pins { + rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; + phandle = <0x3ab>; + }; + + pcie30x2-button-rstn { + rockchip,pins = <0x03 0x11 0x04 0x198>; + phandle = <0x3ae>; + }; + + pcie30x2m0-pins { + rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; + phandle = <0x3aa>; + }; + + pcie30x2m3-pins { + rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; + phandle = <0x3ad>; + }; + }; + + can0 { + + can0m0-pins { + rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; + phandle = <0x145>; + }; + + can0m1-pins { + rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; + phandle = <0x30d>; + }; + }; + + pcfg-output-high { + output-high; + phandle = <0x305>; + }; + + uart9 { + + uart9m0-rtsn { + rockchip,pins = <0x04 0x14 0x0a 0x198>; + phandle = <0x44e>; + }; + + uart9m2-ctsn { + rockchip,pins = <0x03 0x1b 0x0a 0x198>; + phandle = <0x44a>; + }; + + uart9m1-ctsn { + rockchip,pins = <0x04 0x01 0x0a 0x198>; + phandle = <0x447>; + }; + + uart9m2-xfer { + rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; + phandle = <0x449>; + }; + + uart9m0-ctsn { + rockchip,pins = <0x04 0x15 0x0a 0x198>; + phandle = <0x44d>; + }; + + uart9m1-xfer { + rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; + phandle = <0x168>; + }; + + uart9m0-xfer { + rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; + phandle = <0x44c>; + }; + + uart9m2-rtsn { + rockchip,pins = <0x03 0x1a 0x0a 0x198>; + phandle = <0x44b>; + }; + + uart9m1-rtsn { + rockchip,pins = <0x04 0x00 0x0a 0x198>; + phandle = <0x448>; + }; + }; + + pcfg-pull-none-drv-level-2-smt { + drive-strength = <0x02>; + bias-disable; + input-schmitt-enable; + phandle = <0x301>; + }; + + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; + }; + + spi3 { + + spi3m3-cs1 { + rockchip,pins = <0x03 0x15 0x08 0x19a>; + phandle = <0x40e>; + }; + + spi3m1-cs0 { + rockchip,pins = <0x04 0x10 0x08 0x19a>; + phandle = <0x15d>; + }; + + spi3m3-pins { + rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; + phandle = <0x40c>; + }; + + spi3m0-cs1 { + rockchip,pins = <0x04 0x13 0x08 0x19f>; + phandle = <0x411>; + }; + + spi3m2-cs0 { + rockchip,pins = <0x00 0x1c 0x08 0x19a>; + phandle = <0x40a>; + }; + + spi3m2-pins { + rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; + phandle = <0x409>; + }; + + spi3m1-cs1 { + rockchip,pins = <0x04 0x11 0x08 0x19a>; + phandle = <0x15e>; + }; + + spi3m1-pins { + rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; + phandle = <0x15f>; + }; + + spi3m3-cs0 { + rockchip,pins = <0x03 0x14 0x08 0x19a>; + phandle = <0x40d>; + }; + + spi3m0-pins { + rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; + phandle = <0x40f>; + }; + + spi3m2-cs1 { + rockchip,pins = <0x00 0x1d 0x08 0x19a>; + phandle = <0x40b>; + }; + + spi3m0-cs0 { + rockchip,pins = <0x04 0x12 0x08 0x19f>; + phandle = <0x410>; + }; + }; + + pcfg-pull-down-drv-level-14 { + drive-strength = <0x0e>; + bias-pull-down; + phandle = <0x46a>; + }; + + bt656 { + + bt656-pins { + rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; + phandle = <0x450>; + }; + }; + + pcfg-pull-down-drv-level-0 { + drive-strength = <0x00>; + bias-pull-down; + phandle = <0x2f7>; + }; + + pcfg-pull-up-drv-level-3 { + drive-strength = <0x03>; + phandle = <0x2f4>; + bias-pull-up; + }; + + i2s2 { + + i2s2m0-lrck { + rockchip,pins = <0x02 0x10 0x02 0x19d>; + phandle = <0x389>; + }; + + i2s2m1-mclk { + rockchip,pins = <0x03 0x0c 0x03 0x19d>; + phandle = <0x387>; + }; + + i2s2m0-mclk { + rockchip,pins = <0x02 0x0e 0x02 0x19d>; + phandle = <0x38a>; + }; + + i2s2m1-sdo { + rockchip,pins = <0x03 0x0b 0x03 0x198>; + phandle = <0x12b>; + }; + + i2s2m0-sdi { + rockchip,pins = <0x02 0x13 0x02 0x198>; + phandle = <0x38c>; + }; + + i2s2m1-idle { + rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; + phandle = <0x12c>; + }; + + i2s2m1-sdi { + rockchip,pins = <0x03 0x0a 0x03 0x198>; + phandle = <0x12a>; + }; + + i2s2m0-idle { + rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; + phandle = <0x388>; + }; + + i2s2m1-sclk { + rockchip,pins = <0x03 0x0d 0x03 0x19d>; + phandle = <0x12e>; + }; + + i2s2m1-lrck { + rockchip,pins = <0x03 0x0e 0x03 0x19d>; + phandle = <0x12d>; + }; + + i2s2m0-sclk { + rockchip,pins = <0x02 0x0f 0x02 0x19d>; + phandle = <0x38b>; + }; + + i2s2m0-sdo { + rockchip,pins = <0x04 0x13 0x02 0x198>; + phandle = <0x38d>; + }; + }; + + pcfg-pull-none-drv-level-6-smt { + drive-strength = <0x06>; + bias-disable; + input-schmitt-enable; + phandle = <0x304>; + }; + + ddrphych3 { + + ddrphych3-pins { + rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; + phandle = <0x31b>; + }; + }; + + pcfg-pull-none-drv-level-13 { + drive-strength = <0x0d>; + bias-disable; + phandle = <0x457>; + }; + + i2c2 { + + i2c2m2-xfer { + rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; + phandle = <0x35a>; + }; + + i2c2m1-xfer { + rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; + phandle = <0x35d>; + }; + + i2c2m0-xfer { + rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; + phandle = <0x149>; + }; + + i2c2m4-xfer { + rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; + phandle = <0x35c>; + }; + + i2c2m3-xfer { + rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; + phandle = <0x35b>; + }; + }; + + auddsm { + + auddsm-pins { + rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; + phandle = <0x144>; + }; + }; + + pwm8 { + + pwm8m2-pins { + rockchip,pins = <0x03 0x18 0x0b 0x198>; + phandle = <0x3d5>; + }; + + pwm8m1-pins { + rockchip,pins = <0x04 0x18 0x0b 0x198>; + phandle = <0x3d4>; + }; + + pwm8m0-pins { + rockchip,pins = <0x03 0x07 0x0b 0x198>; + phandle = <0x16d>; + }; + }; + + pmic { + + pmic-pins { + rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; + phandle = <0x156>; + }; + }; + + pcfg-pull-none-drv-level-6 { + drive-strength = <0x06>; + bias-disable; + phandle = <0x2f2>; + }; + + jtag { + + jtagm2-pins { + rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; + phandle = <0x391>; + }; + + jtagm1-pins { + rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; + phandle = <0x390>; + }; + + jtagm0-pins { + rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; + phandle = <0x38f>; + }; + }; + + gpio@fd8a0000 { + gpio-controller; + interrupts = <0x00 0x115 0x04>; + clocks = <0x02 0x284 0x02 0x285>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfd8a0000 0x00 0x100>; + phandle = <0x7b>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x00 0x20>; + interrupt-controller; + }; + + gmac1 { + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; + + pcfg-pull-none { + bias-disable; + phandle = <0x198>; + }; + + pwm13 { + + pwm13m2-pins { + rockchip,pins = <0x01 0x0f 0x0b 0x198>; + phandle = <0x3df>; + }; + + pwm13m1-pins { + rockchip,pins = <0x04 0x0e 0x0b 0x198>; + phandle = <0x3de>; + }; + + pwm13m0-pins { + rockchip,pins = <0x03 0x0e 0x0b 0x198>; + phandle = <0x172>; + }; + }; + + pcfg-output-high-pull-down { + output-high; + bias-pull-down; + phandle = <0x307>; + }; + + uart7 { + + uart7m1-ctsn { + rockchip,pins = <0x03 0x13 0x0a 0x198>; + phandle = <0x43b>; + }; + + uart7m2-xfer { + rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; + phandle = <0x43d>; + }; + + uart7m0-ctsn { + rockchip,pins = <0x04 0x16 0x0a 0x198>; + phandle = <0x43f>; + }; + + uart7m1-xfer { + rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; + phandle = <0x166>; + }; + + uart7m0-xfer { + rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; + phandle = <0x43e>; + }; + + uart7m1-rtsn { + rockchip,pins = <0x03 0x12 0x0a 0x198>; + phandle = <0x43c>; + }; + + uart7m0-rtsn { + rockchip,pins = <0x04 0x12 0x0a 0x198>; + phandle = <0x440>; + }; + }; + + pcfg-pull-down-drv-level-9 { + drive-strength = <0x09>; + bias-pull-down; + phandle = <0x465>; + }; + + spi1 { + + spi1m1-cs1 { + rockchip,pins = <0x03 0x13 0x08 0x19a>; + phandle = <0x152>; + }; + + spi1m2-cs1 { + rockchip,pins = <0x01 0x1d 0x08 0x19a>; + phandle = <0x3fe>; + }; + + spi1m0-cs0 { + rockchip,pins = <0x02 0x13 0x08 0x19f>; + phandle = <0x400>; + }; + + spi1m2-pins { + rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; + phandle = <0x3fc>; + }; + + spi1m1-pins { + rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; + phandle = <0x153>; + }; + + spi1m1-cs0 { + rockchip,pins = <0x03 0x12 0x08 0x19a>; + phandle = <0x151>; + }; + + spi1m0-pins { + rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; + phandle = <0x3ff>; + }; + + spi1m0-cs1 { + rockchip,pins = <0x02 0x14 0x08 0x19f>; + phandle = <0x401>; + }; + + spi1m2-cs0 { + rockchip,pins = <0x01 0x1b 0x08 0x19a>; + phandle = <0x3fd>; + }; + }; + + pcfg-pull-up-drv-level-14 { + drive-strength = <0x0e>; + phandle = <0x461>; + bias-pull-up; + }; + + pcfg-output-low-pull-down { + bias-pull-down; + phandle = <0x30b>; + output-low; + }; + + pcfg-pull-down-drv-level-12 { + drive-strength = <0x0c>; + bias-pull-down; + phandle = <0x468>; + }; + + pcfg-pull-up-drv-level-1 { + drive-strength = <0x01>; + phandle = <0x19f>; + bias-pull-up; + }; + + pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + phandle = <0x19d>; + }; + + sdmmc { + + sdmmc-det { + rockchip,pins = <0x00 0x04 0x01 0x19e>; + phandle = <0x116>; + }; + + sdmmc-pwren { + rockchip,pins = <0x00 0x05 0x02 0x198>; + phandle = <0x3ef>; + }; + + sdmmc-bus4 { + rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; + phandle = <0x117>; + }; + + sdmmc-cmd { + rockchip,pins = <0x04 0x1c 0x01 0x199>; + phandle = <0x115>; + }; + + sdmmc-clk { + rockchip,pins = <0x04 0x1d 0x01 0x199>; + phandle = <0x114>; + }; + }; + + i2s0 { + + i2s0-sclk { + rockchip,pins = <0x01 0x13 0x01 0x19d>; + phandle = <0x11c>; + }; + + i2s0-sdo3 { + rockchip,pins = <0x01 0x1a 0x01 0x198>; + phandle = <0x37a>; + }; + + i2s0-lrck { + rockchip,pins = <0x01 0x15 0x01 0x19d>; + phandle = <0x11b>; + }; + + i2s0-sdo1 { + rockchip,pins = <0x01 0x18 0x01 0x198>; + phandle = <0x378>; + }; + + i2s0-sdi3 { + rockchip,pins = <0x01 0x19 0x02 0x198>; + phandle = <0x377>; + }; + + i2s0-mclk { + rockchip,pins = <0x01 0x12 0x01 0x19d>; + phandle = <0x17a>; + }; + + i2s0-sdi1 { + rockchip,pins = <0x01 0x1b 0x02 0x198>; + phandle = <0x375>; + }; + + i2s0-sdo2 { + rockchip,pins = <0x01 0x19 0x01 0x198>; + phandle = <0x379>; + }; + + i2s0-idle { + rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; + phandle = <0x11f>; + }; + + i2s0-sdo0 { + rockchip,pins = <0x01 0x17 0x01 0x198>; + phandle = <0x11e>; + }; + + i2s0-sdi2 { + rockchip,pins = <0x01 0x1a 0x02 0x198>; + phandle = <0x376>; + }; + + i2s0-sdi0 { + rockchip,pins = <0x01 0x1c 0x02 0x198>; + phandle = <0x11d>; + }; + }; + + ddrphych1 { + + ddrphych1-pins { + rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; + phandle = <0x319>; + }; + }; + + pcfg-pull-none-drv-level-11 { + drive-strength = <0x0b>; + bias-disable; + phandle = <0x455>; + }; + + i2c0 { + + i2c0m2-xfer { + rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; + phandle = <0x77>; + }; + + i2c0m1-xfer { + rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; + phandle = <0x355>; + }; + + i2c0m0-xfer { + rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; + phandle = <0x354>; + }; + }; + + pwm6 { + + pwm6m2-pins { + rockchip,pins = <0x04 0x15 0x0b 0x198>; + phandle = <0x3d0>; + }; + + pwm6m1-pins { + rockchip,pins = <0x04 0x11 0x0b 0x198>; + phandle = <0x3cf>; + }; + + pwm6m0-pins { + rockchip,pins = <0x00 0x17 0x0b 0x198>; + phandle = <0x16b>; + }; + }; + + hym8563 { + + hym8563-int { + rockchip,pins = <0x00 0x08 0x00 0x198>; + phandle = <0x7a>; + }; + }; + + pcfg-pull-none-drv-level-4 { + drive-strength = <0x04>; + bias-disable; + phandle = <0x2f0>; + }; + + pcfg-output-high-pull-up { + output-high; + phandle = <0x306>; + bias-pull-up; + }; + + pwm11 { + + pwm11m3-pins { + rockchip,pins = <0x03 0x1d 0x0b 0x198>; + phandle = <0x3dc>; + }; + + pwm11m2-pins { + rockchip,pins = <0x01 0x14 0x0b 0x198>; + phandle = <0x3db>; + }; + + pwm11m1-pins { + rockchip,pins = <0x04 0x0c 0x0b 0x198>; + phandle = <0x3da>; + }; + + pwm11m0-pins { + rockchip,pins = <0x03 0x01 0x0b 0x198>; + phandle = <0x170>; + }; + }; + + bt1120 { + + bt1120-pins { + rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; + phandle = <0x71>; + }; + }; + + pcfg-output-low-pull-up { + phandle = <0x30a>; + bias-pull-up; + output-low; + }; + + uart5 { + + uart5m1-ctsn { + rockchip,pins = <0x02 0x02 0x0a 0x198>; + phandle = <0x433>; + }; + + uart5m2-xfer { + rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; + phandle = <0x435>; + }; + + uart5m0-ctsn { + rockchip,pins = <0x04 0x1a 0x0a 0x198>; + phandle = <0x431>; + }; + + uart5m1-xfer { + rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; + phandle = <0x164>; + }; + + uart5m0-xfer { + rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; + phandle = <0x430>; + }; + + uart5m1-rtsn { + rockchip,pins = <0x02 0x03 0x0a 0x198>; + phandle = <0x434>; + }; + + uart5m0-rtsn { + rockchip,pins = <0x04 0x1b 0x0a 0x198>; + phandle = <0x432>; + }; + }; + + sdio { + + sdiom1-pins { + rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; + phandle = <0x119>; + }; + + sdiom0-pins { + rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; + phandle = <0x3ee>; + }; + }; + + spdif1 { + + spdif1m0-tx { + rockchip,pins = <0x01 0x0f 0x03 0x198>; + phandle = <0x143>; + }; + + spdif1m2-tx { + rockchip,pins = <0x04 0x11 0x03 0x198>; + phandle = <0x3f2>; + }; + + spdif1m1-tx { + rockchip,pins = <0x04 0x09 0x02 0x198>; + phandle = <0x3f1>; + }; + }; + + pcfg-pull-down-drv-level-7 { + drive-strength = <0x07>; + bias-pull-down; + phandle = <0x463>; + }; + + gpio@fec30000 { + gpio-controller; + interrupts = <0x00 0x117 0x04>; + clocks = <0x02 0x7f 0x02 0x80>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec30000 0x00 0x100>; + phandle = <0x79>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x40 0x20>; + interrupt-controller; + }; + + pcfg-pull-up-drv-level-12 { + drive-strength = <0x0c>; + phandle = <0x45f>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-10 { + drive-strength = <0x0a>; + bias-pull-down; + phandle = <0x466>; + }; + + dp1 { + + dp1m1-pins { + rockchip,pins = <0x00 0x15 0x0a 0x198>; + phandle = <0x320>; + }; + + dp1m0-pins { + rockchip,pins = <0x03 0x1d 0x05 0x198>; + phandle = <0x31f>; + }; + + dp1m2-pins { + rockchip,pins = <0x01 0x01 0x05 0x198>; + phandle = <0x321>; + }; + }; + + vop { + + vop-pins { + rockchip,pins = <0x01 0x02 0x01 0x198>; + phandle = <0x44f>; + }; + }; + + pwm4 { + + pwm4m1-pins { + rockchip,pins = <0x04 0x13 0x0b 0x198>; + phandle = <0x3cc>; + }; + + pwm4m0-pins { + rockchip,pins = <0x00 0x15 0x0b 0x198>; + phandle = <0x169>; + }; + }; + + pcfg-pull-none-drv-level-2 { + drive-strength = <0x02>; + bias-disable; + phandle = <0x1a0>; + }; + + pcfg-pull-none-drv-level-3-smt { + drive-strength = <0x03>; + bias-disable; + input-schmitt-enable; + phandle = <0x302>; + }; + + uart3 { + + uart3m2-xfer { + rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; + phandle = <0x429>; + }; + + uart3m1-xfer { + rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; + phandle = <0x162>; + }; + + uart3-ctsn { + rockchip,pins = <0x01 0x13 0x0a 0x198>; + phandle = <0x42a>; + }; + + uart3m0-xfer { + rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; + phandle = <0x428>; + }; + + uart3-rtsn { + rockchip,pins = <0x01 0x12 0x0a 0x198>; + phandle = <0x42b>; + }; + }; + + pcfg-pull-down-drv-level-5 { + drive-strength = <0x05>; + bias-pull-down; + phandle = <0x2fc>; + }; + + pcfg-pull-up-drv-level-8 { + drive-strength = <0x08>; + phandle = <0x45b>; + bias-pull-up; + }; + + pcfg-pull-up-drv-level-10 { + drive-strength = <0x0a>; + phandle = <0x45d>; + bias-pull-up; + }; + + pcfg-output-low { + phandle = <0x309>; + output-low; + }; + + i2c7 { + + i2c7m3-xfer { + rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; + phandle = <0x36f>; + }; + + i2c7m2-xfer { + rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; + phandle = <0x36e>; + }; + + i2c7m1-xfer { + rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; + phandle = <0x370>; + }; + + i2c7m0-xfer { + rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; + phandle = <0x185>; + }; + }; + + pwm2 { + + pwm2m2-pins { + rockchip,pins = <0x04 0x12 0x0b 0x198>; + phandle = <0x3c8>; + }; + + pwm2m1-pins { + rockchip,pins = <0x03 0x09 0x0b 0x198>; + phandle = <0x3c7>; + }; + + pwm2m0-pins { + rockchip,pins = <0x00 0x14 0x03 0x198>; + phandle = <0x80>; + }; + }; + + pcfg-pull-none-drv-level-0 { + drive-strength = <0x00>; + bias-disable; + phandle = <0x2ed>; + }; + + sata1 { + + sata1m1-pins { + rockchip,pins = <0x01 0x01 0x06 0x198>; + phandle = <0x3eb>; + }; + + sata1m0-pins { + rockchip,pins = <0x04 0x0d 0x06 0x198>; + phandle = <0x3ea>; + }; + }; + + pmu { + + pmu-pins { + rockchip,pins = <0x00 0x05 0x03 0x198>; + phandle = <0x3c2>; + }; + }; + + hdmirx { + + hdmirx-det { + rockchip,pins = <0x01 0x1d 0x00 0x198>; + phandle = <0x1b4>; + }; + }; + + uart1 { + + uart1m0-ctsn { + rockchip,pins = <0x02 0x11 0x0a 0x198>; + phandle = <0x423>; + }; + + uart1m1-xfer { + rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; + phandle = <0x160>; + }; + + uart1m0-xfer { + rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; + phandle = <0x422>; + }; + + uart1m2-rtsn { + rockchip,pins = <0x00 0x17 0x0a 0x198>; + phandle = <0x421>; + }; + + uart1m1-rtsn { + rockchip,pins = <0x01 0x1e 0x0a 0x198>; + phandle = <0x41e>; + }; + + uart1m0-rtsn { + rockchip,pins = <0x02 0x10 0x0a 0x198>; + phandle = <0x424>; + }; + + uart1m2-ctsn { + rockchip,pins = <0x00 0x18 0x0a 0x198>; + phandle = <0x420>; + }; + + uart1m1-ctsn { + rockchip,pins = <0x01 0x1f 0x0a 0x198>; + phandle = <0x41d>; + }; + + uart1m2-xfer { + rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; + phandle = <0x41f>; + }; + }; + + hdmi { + + hdmim1-rx-cec { + rockchip,pins = <0x03 0x19 0x05 0x198>; + phandle = <0x338>; + }; + + hdmim0-rx-scl { + rockchip,pins = <0x00 0x1a 0x0b 0x198>; + phandle = <0x336>; + }; + + hdmim0-rx-sda { + rockchip,pins = <0x00 0x19 0x0b 0x198>; + phandle = <0x337>; + }; + + hdmim0-tx0-cec { + rockchip,pins = <0x04 0x11 0x05 0x198>; + phandle = <0xf9>; + }; + + hdmim2-rx-cec { + rockchip,pins = <0x01 0x0f 0x05 0x198>; + phandle = <0x342>; + }; + + hdmim1-rx-scl { + rockchip,pins = <0x03 0x1a 0x05 0x19d>; + phandle = <0x33a>; + }; + + hdmim1-rx-sda { + rockchip,pins = <0x03 0x1b 0x05 0x19d>; + phandle = <0x33b>; + }; + + hdmim0-tx0-scl { + rockchip,pins = <0x04 0x0f 0x05 0x19b>; + phandle = <0xfb>; + }; + + hdmim0-tx0-sda { + rockchip,pins = <0x04 0x10 0x05 0x19c>; + phandle = <0xfc>; + }; + + hdmim2-rx-scl { + rockchip,pins = <0x01 0x1e 0x05 0x198>; + phandle = <0x344>; + }; + + hdmim2-rx-sda { + rockchip,pins = <0x01 0x1f 0x05 0x198>; + phandle = <0x345>; + }; + + hdmim0-tx0-hpd { + rockchip,pins = <0x01 0x05 0x05 0x198>; + phandle = <0xfa>; + }; + + hdmim2-rx-hpdin { + rockchip,pins = <0x01 0x0e 0x05 0x198>; + phandle = <0x343>; + }; + + hdmi-debug6 { + rockchip,pins = <0x01 0x00 0x07 0x198>; + phandle = <0x350>; + }; + + hdmim2-tx0-scl { + rockchip,pins = <0x03 0x17 0x05 0x19b>; + phandle = <0x346>; + }; + + hdmim2-tx0-sda { + rockchip,pins = <0x03 0x18 0x05 0x19c>; + phandle = <0x347>; + }; + + hdmi-debug4 { + rockchip,pins = <0x01 0x0b 0x07 0x198>; + phandle = <0x34e>; + }; + + hdmim0-tx1-cec { + rockchip,pins = <0x02 0x14 0x04 0x198>; + phandle = <0x351>; + }; + + hdmim0-tx1-scl { + rockchip,pins = <0x02 0x0d 0x04 0x198>; + phandle = <0x352>; + }; + + hdmim0-tx1-sda { + rockchip,pins = <0x02 0x0c 0x04 0x198>; + phandle = <0x353>; + }; + + hdmi-debug2 { + rockchip,pins = <0x01 0x09 0x07 0x198>; + phandle = <0x34c>; + }; + + hdmim0-tx1-hpd { + rockchip,pins = <0x01 0x06 0x05 0x198>; + phandle = <0x1a9>; + }; + + hdmim1-rx { + rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; + phandle = <0x1b3>; + }; + + hdmim2-tx1-cec { + rockchip,pins = <0x03 0x14 0x05 0x198>; + phandle = <0x1a8>; + }; + + hdmi-debug0 { + rockchip,pins = <0x01 0x07 0x07 0x198>; + phandle = <0x34a>; + }; + + hdmim2-tx1-scl { + rockchip,pins = <0x01 0x04 0x05 0x19b>; + phandle = <0x348>; + }; + + hdmim2-tx1-sda { + rockchip,pins = <0x01 0x03 0x05 0x19c>; + phandle = <0x349>; + }; + + hdmim1-tx0-cec { + rockchip,pins = <0x00 0x19 0x0d 0x198>; + phandle = <0x33c>; + }; + + hdmim1-tx0-scl { + rockchip,pins = <0x00 0x1d 0x0b 0x19b>; + phandle = <0x33e>; + }; + + hdmim1-tx0-sda { + rockchip,pins = <0x00 0x1c 0x0b 0x19c>; + phandle = <0x33f>; + }; + + hdmim1-tx0-hpd { + rockchip,pins = <0x03 0x1c 0x03 0x198>; + phandle = <0x33d>; + }; + + hdmim0-rx-hpdin { + rockchip,pins = <0x04 0x0e 0x05 0x198>; + phandle = <0x335>; + }; + + hdmi-debug5 { + rockchip,pins = <0x01 0x0c 0x07 0x198>; + phandle = <0x34f>; + }; + + hdmi-debug3 { + rockchip,pins = <0x01 0x0a 0x07 0x198>; + phandle = <0x34d>; + }; + + hdmim1-tx1-cec { + rockchip,pins = <0x00 0x1a 0x0d 0x198>; + phandle = <0x340>; + }; + + hdmi-debug1 { + rockchip,pins = <0x01 0x08 0x07 0x198>; + phandle = <0x34b>; + }; + + hdmim1-tx1-scl { + rockchip,pins = <0x03 0x16 0x05 0x19b>; + phandle = <0x1aa>; + }; + + hdmim1-tx1-sda { + rockchip,pins = <0x03 0x15 0x05 0x19c>; + phandle = <0x1ab>; + }; + + hdmim1-tx1-hpd { + rockchip,pins = <0x03 0x0f 0x05 0x198>; + phandle = <0x341>; + }; + + hdmim1-rx-hpdin { + rockchip,pins = <0x03 0x1c 0x05 0x198>; + phandle = <0x339>; + }; + + hdmim0-rx-cec { + rockchip,pins = <0x04 0x0d 0x05 0x198>; + phandle = <0x334>; + }; + }; + + pcfg-pull-down-drv-level-3 { + drive-strength = <0x03>; + bias-pull-down; + phandle = <0x2fa>; + }; + + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; + }; + + i2c5 { + + i2c5m3-xfer { + rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; + phandle = <0x368>; + }; + + i2c5m2-xfer { + rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; + phandle = <0x367>; + }; + + i2c5m1-xfer { + rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; + phandle = <0x366>; + }; + + i2c5m0-xfer { + rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; + phandle = <0x14d>; + }; + + i2c5m4-xfer { + rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; + phandle = <0x369>; + }; + }; + + pcfg-pull-none-drv-level-9 { + drive-strength = <0x09>; + bias-disable; + phandle = <0x453>; + }; + + pdm0 { + + pdm0m1-sdi3 { + rockchip,pins = <0x00 0x1e 0x02 0x198>; + phandle = <0x3ba>; + }; + + pdm0m1-clk { + rockchip,pins = <0x00 0x10 0x02 0x198>; + phandle = <0x3b4>; + }; + + pdm0m1-sdi1 { + rockchip,pins = <0x00 0x18 0x02 0x198>; + phandle = <0x3b8>; + }; + + pdm0m0-sdi3 { + rockchip,pins = <0x01 0x1b 0x03 0x198>; + phandle = <0x137>; + }; + + pdm0m0-sdi1 { + rockchip,pins = <0x01 0x19 0x03 0x198>; + phandle = <0x135>; + }; + + pdm0m1-clk1 { + rockchip,pins = <0x00 0x14 0x02 0x198>; + phandle = <0x3b5>; + }; + + pdm0m1-idle { + rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; + phandle = <0x3b6>; + }; + + pdm0m0-clk1 { + rockchip,pins = <0x01 0x14 0x03 0x198>; + phandle = <0x13a>; + }; + + pdm0m1-sdi2 { + rockchip,pins = <0x00 0x1c 0x02 0x198>; + phandle = <0x3b9>; + }; + + pdm0m0-idle { + rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; + phandle = <0x138>; + }; + + pdm0m1-sdi0 { + rockchip,pins = <0x00 0x17 0x02 0x198>; + phandle = <0x3b7>; + }; + + pdm0m0-sdi2 { + rockchip,pins = <0x01 0x1a 0x03 0x198>; + phandle = <0x136>; + }; + + pdm0m0-sdi0 { + rockchip,pins = <0x01 0x1d 0x03 0x198>; + phandle = <0x134>; + }; + + pdm0m0-clk { + rockchip,pins = <0x01 0x16 0x03 0x198>; + phandle = <0x139>; + }; + }; + + pcfg-output-high-pull-none { + bias-disable; + output-high; + phandle = <0x308>; + }; + + pwm0 { + + pwm0m1-pins { + rockchip,pins = <0x01 0x1a 0x0b 0x198>; + phandle = <0x3c3>; + }; + + pwm0m0-pins { + rockchip,pins = <0x00 0x0f 0x03 0x198>; + phandle = <0x7e>; + }; + + pwm0m2-pins { + rockchip,pins = <0x01 0x02 0x0b 0x198>; + phandle = <0x3c4>; + }; + }; + + cif { + + cif-dvp-clk { + rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; + phandle = <0x311>; + }; + + cif-clk { + rockchip,pins = <0x04 0x0c 0x01 0x198>; + phandle = <0x310>; + }; + + cif-dvp-bus8 { + rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; + phandle = <0x313>; + }; + + cif-dvp-bus16 { + rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; + phandle = <0x312>; + }; + }; + + can1 { + + can1m1-pins { + rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; + phandle = <0x146>; + }; + + can1m0-pins { + rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; + phandle = <0x30e>; + }; + }; + + pcfg-output-low-pull-none { + bias-disable; + phandle = <0x30c>; + output-low; + }; + + gpio@fec40000 { + gpio-controller; + interrupts = <0x00 0x118 0x04>; + clocks = <0x02 0x81 0x02 0x82>; + compatible = "rockchip,gpio-bank"; + #interrupt-cells = <0x02>; + reg = <0x00 0xfec40000 0x00 0x100>; + phandle = <0x181>; + #gpio-cells = <0x02>; + gpio-ranges = <0x197 0x00 0x60 0x20>; + interrupt-controller; + }; + + spi4 { + + spi4m0-cs0 { + rockchip,pins = <0x01 0x13 0x08 0x19a>; + phandle = <0x187>; + }; + + spi4m1-cs0 { + rockchip,pins = <0x03 0x03 0x08 0x19a>; + phandle = <0x413>; + }; + + spi4m2-pins { + rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; + phandle = <0x415>; + }; + + spi4m0-cs1 { + rockchip,pins = <0x01 0x14 0x08 0x19a>; + phandle = <0x188>; + }; + + spi4m1-pins { + rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; + phandle = <0x412>; + }; + + spi4m2-cs0 { + rockchip,pins = <0x01 0x03 0x08 0x19a>; + phandle = <0x416>; + }; + + spi4m0-pins { + rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; + phandle = <0x189>; + }; + + spi4m1-cs1 { + rockchip,pins = <0x03 0x04 0x08 0x19a>; + phandle = <0x414>; + }; + }; + + pcfg-pull-down-drv-level-15 { + drive-strength = <0x0f>; + bias-pull-down; + phandle = <0x46b>; + }; + + pcfg-pull-up-smt { + input-schmitt-enable; + phandle = <0x2fe>; + bias-pull-up; + }; + + pcfg-pull-down-drv-level-1 { + drive-strength = <0x01>; + bias-pull-down; + phandle = <0x2f8>; + }; + + pcfg-pull-up-drv-level-4 { + drive-strength = <0x04>; + phandle = <0x2f5>; + bias-pull-up; + }; + + wireless-wlan { + + wifi-host-wake-irq { + rockchip,pins = <0x00 0x0a 0x00 0x198>; + phandle = <0x1ea>; + }; + }; + + wdt-pc9202 { + + wdt-en-base { + rockchip,pins = <0x00 0x14 0x00 0x198>; + phandle = <0x14c>; + }; + }; + + pcfg-pull-none-drv-level-0-smt { + drive-strength = <0x00>; + bias-disable; + input-schmitt-enable; + phandle = <0x300>; + }; + + i2s3 { + + i2s3-sdi { + rockchip,pins = <0x03 0x04 0x03 0x198>; + phandle = <0x12f>; + }; + + i2s3-idle { + rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; + phandle = <0x131>; + }; + + i2s3-sclk { + rockchip,pins = <0x03 0x01 0x03 0x19d>; + phandle = <0x133>; + }; + + i2s3-lrck { + rockchip,pins = <0x03 0x02 0x03 0x19d>; + phandle = <0x132>; + }; + + i2s3-sdo { + rockchip,pins = <0x03 0x03 0x03 0x198>; + phandle = <0x130>; + }; + + i2s3-mclk { + rockchip,pins = <0x03 0x00 0x03 0x19d>; + phandle = <0x38e>; + }; + }; + + pcfg-pull-none-drv-level-14 { + drive-strength = <0x0e>; + bias-disable; + phandle = <0x458>; + }; + }; + + rkcif-mipi-lvds4-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x473>; + }; + + bt-sco { + #sound-dai-cells = <0x01>; + compatible = "delta,dfbmcs320"; + status = "disabled"; + phandle = <0x1d2>; + }; + + phy@fed80000 { + svid = <0xff01>; + orientation-switch; + sbu2-dc-gpios = <0x10d 0x07 0x00>; + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; + clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + reg = <0x00 0xfed80000 0x00 0x10000>; + phandle = <0x2ea>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x18b>; + sbu1-dc-gpios = <0x10d 0x06 0x00>; + rockchip,usbdpphy-grf = <0x18c>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0xf6>; + }; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@1 { + remote-endpoint = <0x18f>; + reg = <0x01>; + phandle = <0x17f>; + }; + + endpoint@0 { + remote-endpoint = <0x18e>; + reg = <0x00>; + phandle = <0x17e>; + }; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x67>; + }; + }; + + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; + + msi-controller@fe640000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe640000 0x00 0x20000>; + phandle = <0x106>; + #msi-cells = <0x01>; + }; + + msi-controller@fe660000 { + msi-controller; + compatible = "arm,gic-v3-its"; + reg = <0x00 0xfe660000 0x00 0x20000>; + phandle = <0x1b6>; + #msi-cells = <0x01>; + }; + }; + + ethernet@fe1c0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x10b>; + snps,reset-active-low; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x10c>; + local-mac-address = [a6 50 47 45 20 1c]; + resets = <0x02 0x20b>; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "macirq\0eth_wake_irq"; + snps,reset-gpio = <0x10d 0x08 0x01>; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x109>; + phy-handle = <0x113>; + reset-names = "stmmaceth"; + tx_delay = <0x40>; + snps,axi-config = <0x10a>; + snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x28f>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; + + tx-queues-config { + phandle = <0x10c>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x10a>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; + }; + + pcie-essd { + regulator-max-microvolt = <0x2625a0>; + enable-active-high; + regulator-min-microvolt = <0x2625a0>; + regulator-name = "pcie_essd"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x1ba>; + vin-supply = <0x1cd>; + gpios = <0x181 0x0f 0x00>; + }; + + iommu@fdab9000 { + clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; + reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; + phandle = <0xb2>; + }; + + otp@fecc0000 { + #address-cells = <0x01>; + clock-names = "otpc\0apb\0arb\0phy"; + resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; + clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-otp"; + reg = <0x00 0xfecc0000 0x00 0x400>; + phandle = <0x2e7>; + reset-names = "otpc\0apb\0arb"; + + id@7 { + reg = <0x07 0x10>; + phandle = <0x2a>; + }; + + cpul-opp-info@3d { + reg = <0x3d 0x06>; + phandle = <0x20>; + }; + + cpub1-leakage@18 { + reg = <0x18 0x01>; + phandle = <0x27>; + }; + + vop-opp-info@61 { + reg = <0x61 0x06>; + phandle = <0x2e8>; + }; + + cpul-leakage@19 { + reg = <0x19 0x01>; + phandle = <0x1f>; + }; + + codec-leakage@29 { + reg = <0x29 0x01>; + phandle = <0xc6>; + }; + + cpu-version@1c { + bits = <0x03 0x03>; + reg = <0x1c 0x01>; + phandle = <0x2b>; + }; + + cpub0-leakage@17 { + reg = <0x17 0x01>; + phandle = <0x24>; + }; + + log-leakage@1a { + reg = <0x1a 0x01>; + phandle = <0x44>; + }; + + cpu-code@2 { + reg = <0x02 0x02>; + phandle = <0x2c>; + }; + + package-serial-number-low@6 { + bits = <0x05 0x03>; + reg = <0x06 0x01>; + phandle = <0xd4>; + }; + + npu-opp-info@55 { + reg = <0x55 0x06>; + phandle = <0xb5>; + }; + + package-serial-number-high@5 { + bits = <0x00 0x01>; + reg = <0x05 0x01>; + phandle = <0xd5>; + }; + + cpub01-opp-info@43 { + reg = <0x43 0x06>; + phandle = <0x25>; + }; + + dmc-opp-info@5b { + reg = <0x5b 0x06>; + phandle = <0x45>; + }; + + npu-leakage@28 { + reg = <0x28 0x01>; + phandle = <0xb4>; + }; + + gpu-leakage@1b { + reg = <0x1b 0x01>; + phandle = <0x63>; + }; + + specification-serial-number@6 { + bits = <0x00 0x05>; + reg = <0x06 0x01>; + phandle = <0x21>; + }; + + venc-opp-info@67 { + reg = <0x67 0x06>; + phandle = <0xc7>; + }; + + gpu-opp-info@4f { + reg = <0x4f 0x06>; + phandle = <0x64>; + }; + + cpub23-opp-info@49 { + reg = <0x49 0x06>; + phandle = <0x28>; + }; + }; + + i2s@fddf0000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x243>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3e8>; + interrupts = <0x00 0xb9 0x04>; + clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf0000 0x00 0x1000>; + phandle = <0x1d3>; + dmas = <0xf2 0x02>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + dma-controller@fea10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; + clocks = <0x02 0x78>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea10000 0x00 0x4000>; + phandle = <0x7c>; + #dma-cells = <0x01>; + }; + + pwm@febd0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x169>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebd0000 0x00 0x10>; + phandle = <0x2d2>; + }; + + rkvenc-ccu { + compatible = "rockchip,rkv-encoder-v2-ccu"; + status = "okay"; + phandle = <0xc3>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + + rgb { + pinctrl-names = "default"; + pinctrl-0 = <0x71>; + compatible = "rockchip,rk3588-rgb"; + status = "disabled"; + phandle = <0x25c>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@2 { + remote-endpoint = <0x3d>; + status = "disabled"; + reg = <0x02>; + phandle = <0xf0>; + }; + }; + }; + }; + }; + + spi@fe2b0000 { + #address-cells = <0x01>; + clock-names = "clk_sfc\0hclk_sfc"; + assigned-clocks = <0x02 0x13d>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0xce 0x04>; + clocks = <0x02 0x13d 0x02 0x13e>; + #size-cells = <0x00>; + compatible = "rockchip,sfc"; + status = "disabled"; + reg = <0x00 0xfe2b0000 0x00 0x4000>; + phandle = <0x292>; + }; + + qos@fdf82200 { + compatible = "syscon"; + reg = <0x00 0xfdf82200 0x00 0x20>; + phandle = <0x9e>; + }; + + mmc@fe2c0000 { + power-domains = <0x60 0x28>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x114 0x115 0x116 0x117>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + cap-sd-highspeed; + vqmmc-supply = <0x118>; + no-mmc; + bus-width = <0x04>; + no-sdio; + interrupts = <0x00 0xcb 0x04>; + clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "okay"; + disable-wp; + reg = <0x00 0xfe2c0000 0x00 0x4000>; + phandle = <0x293>; + sd-uhs-sdr104; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; + }; + + serial@feb80000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x164>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x150 0x04>; + clocks = <0x02 0xc7 0x02 0xaf>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb80000 0x00 0x100>; + phandle = <0x2cd>; + dmas = <0xf1 0x0b 0xf1 0x0c>; + reg-shift = <0x02>; + }; + + phy@fee10000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2be>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20006 0x02 0x4d7>; + clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x1cb>; + reg = <0x00 0xfee10000 0x00 0x100>; + phandle = <0x1bc>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; + }; + + can@fea60000 { + pinctrl-names = "default"; + pinctrl-0 = <0x146>; + clock-names = "baudclk\0apb_pclk"; + assigned-clocks = <0x02 0x72>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0xbb 0x02 0xba>; + interrupts = <0x00 0x156 0x04>; + clocks = <0x02 0x72 0x02 0x71>; + compatible = "rockchip,can-2.0"; + status = "okay"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea60000 0x00 0x1000>; + phandle = <0x2a1>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4c0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x140 0x141>; + pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; + clock-names = "pdm_clk\0pdm_hclk"; + assigned-clocks = <0x02 0x3b>; + assigned-clock-parents = <0x02 0x05>; + clocks = <0x02 0x3b 0x02 0x3a>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x13f>; + status = "disabled"; + reg = <0x00 0xfe4c0000 0x00 0x1000>; + phandle = <0x29b>; + dmas = <0xf1 0x04>; + }; + + rkcif-mipi-lvds3-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x239>; + }; + + qos@fdf66e00 { + compatible = "syscon"; + reg = <0x00 0xfdf66e00 0x00 0x20>; + phandle = <0x9a>; + }; + + usb@fc800000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6b>; + interrupts = <0x00 0xd7 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc800000 0x00 0x40000>; + phandle = <0x254>; + }; + + i2c@fd880000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x77>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xc0022 0x02 0xc0021>; + interrupts = <0x00 0x13d 0x04>; + clocks = <0x02 0x287 0x02 0x286>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfd880000 0x00 0x1000>; + phandle = <0x25f>; + reset-names = "i2c\0apb"; + + hym8563@51 { + pinctrl-names = "default"; + clock-output-names = "hym8563"; + pinctrl-0 = <0x7a>; + wakeup-source; + interrupts = <0x08 0x08>; + #clock-cells = <0x00>; + interrupt-parent = <0x7b>; + clock-frequency = <0x8000>; + compatible = "haoyu,hym8563"; + status = "okay"; + reg = <0x51>; + phandle = <0x1e4>; + }; + + rk8602@42 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0x18>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk8603@43 { + regulator-max-microvolt = <0x100590>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8603"; + reg = <0x43>; + phandle = <0x1c>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pc9202@3c { + index = <0x00>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x79 0x15 0x00>; + driver-names = "wdt_core"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds3-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x237>; + }; + + serial@fd890000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x7d>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14b 0x04>; + clocks = <0x02 0x2ae 0x02 0x2af>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfd890000 0x00 0x100>; + phandle = <0x260>; + dmas = <0x7c 0x06 0x7c 0x07>; + reg-shift = <0x02>; + }; + + qos@fdf70000 { + compatible = "syscon"; + reg = <0x00 0xfdf70000 0x00 0x20>; + phandle = <0x85>; + }; + + gpu-opp-table { + rockchip,pvtm-offset = <0x1c>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x04>; + nvmem-cells = <0x63 0x64 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "gpu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x114>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x65>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0x61>; + rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x61a80>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-500000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x02 0xffff>; + }; + + opp-j-850000000 { + opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-hz = <0x00 0x32a9f880>; + opp-supported-hw = <0x04 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-m-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-400000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + }; + + opp-m-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0x02 0xffff>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + }; + }; + + csi2-dphy1-hw@fedc8000 { + clock-names = "pclk"; + resets = <0x02 0x19 0x02 0x18>; + clocks = <0x02 0x10d>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x193>; + reg = <0x00 0xfedc8000 0x00 0x8000>; + phandle = <0x2e>; + reset-names = "srst_csiphy1\0srst_p_csiphy1"; + rockchip,sys_grf = <0xc8>; + }; + + hdcp@fde40000 { + power-domains = <0x60 0x19>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; + interrupts = <0x00 0x9f 0x04>; + clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde40000 0x00 0x80>; + phandle = <0x285>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xf5>; + }; + + iommu@fdbac800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7f 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege3_mmu"; + reg = <0x00 0xfdbac800 0x00 0x40>; + phandle = <0xc0>; + }; + + qos@fdf40400 { + compatible = "syscon"; + reg = <0x00 0xfdf40400 0x00 0x20>; + phandle = <0xa2>; + }; + + rga@fdb70000 { + power-domains = <0x60 0x1e>; + iommus = <0xba>; + clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; + compatible = "rockchip,rga3_core1"; + status = "okay"; + interrupt-names = "rga3_core1_irq"; + reg = <0x00 0xfdb70000 0x00 0x1000>; + phandle = <0x26a>; + }; + + spi@feb00000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x14e 0x14f 0x150>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x146 0x04>; + clocks = <0x02 0xa3 0x02 0x9e>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb00000 0x00 0x1000>; + phandle = <0x2ab>; + dmas = <0x7c 0x0e 0x7c 0x0f>; + }; + + pcie@fe170000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x20 0x2f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x20f 0x02 0x21e>; + interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; + clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; + msi-map = <0x2000 0x106 0x2000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1bc 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; + linux,pci-domain = <0x02>; + phandle = <0x487>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf0 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1bb>; + interrupt-controller; + }; + }; + + i2s@fe470000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x11b 0x11c>; + pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x31 0x02 0x35>; + assigned-clock-parents = <0x02 0x05 0x02 0x05>; + resets = <0x02 0x77 0x02 0x7a>; + interrupts = <0x00 0xb4 0x04>; + clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + pinctrl-1 = <0x11f>; + status = "okay"; + reg = <0x00 0xfe470000 0x00 0x1000>; + phandle = <0x1da>; + dmas = <0x7c 0x00 0x7c 0x01>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd594000 { + compatible = "rockchip,rk3588-litcore-grf\0syscon"; + reg = <0x00 0xfd594000 0x00 0x100>; + phandle = <0x22>; + }; + + csi2-dphy5 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x214>; + }; + + usb@fc840000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xd8 0x04>; + clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6c>; + reg = <0x00 0xfc840000 0x00 0x40000>; + phandle = <0x6b>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + rkcif-mipi-lvds2-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x236>; + }; + + rkisp1-vir1 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x240>; + }; + + i2c@feaa0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x149>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb1 0x02 0xa9>; + interrupts = <0x00 0x13f 0x04>; + clocks = <0x02 0x8e 0x02 0x86>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeaa0000 0x00 0x1000>; + phandle = <0x2a5>; + reset-names = "i2c\0apb"; + }; + + dmc { + downdifferential = <0x14>; + clock-names = "dmc_clk"; + interrupts = <0x00 0x49 0x04>; + clocks = <0x0e 0x04>; + upthreshold = <0x28>; + center-supply = <0x42>; + devfreq-events = <0x40>; + compatible = "rockchip,rk3588-dmc"; + status = "disabled"; + interrupt-names = "complete"; + mem-supply = <0x43>; + phandle = <0x21f>; + operating-points-v2 = <0x41>; + system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; + auto-freq-en = <0x01>; + }; + + hdmi1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e0>; + rockchip,codec = <0x1e1>; + rockchip,card-name = "rockchip-hdmi1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a8>; + rockchip,mclk-fs = <0x80>; + }; + + qos@fdf3d800 { + compatible = "syscon"; + reg = <0x00 0xfdf3d800 0x00 0x20>; + phandle = <0xb0>; + }; + + mipi-dcphy-dummy { + phandle = <0x223>; + }; + + jpege-core@fdbac000 { + power-domains = <0x60 0x15>; + iommus = <0xc0>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b2>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d0 0x02 0x2d1>; + interrupts = <0x00 0x80 0x04>; + clocks = <0x02 0x1b2 0x02 0x1b3>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege3"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbac000 0x00 0x400>; + phandle = <0x270>; + reset-names = "video_a\0video_h"; + }; + + iommu@fdce0800 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x71 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "cif_mmu"; + reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; + phandle = <0x50>; + }; + + qos@fdf35400 { + compatible = "syscon"; + reg = <0x00 0xfdf35400 0x00 0x20>; + phandle = <0x89>; + }; + + syscon@fd5a8000 { + clocks = <0x73>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a8000 0x00 0x100>; + phandle = <0xd8>; + }; + + dp0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d5>; + rockchip,codec = <0x1d6 0x01>; + rockchip,card-name = "rockchip-dp0"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x49c>; + rockchip,mclk-fs = <0x200>; + }; + + rkcif-mipi-lvds4 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a1>; + }; + + usb@fc880000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + companion = <0x6e>; + interrupts = <0x00 0xda 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ehci\0generic-ehci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc880000 0x00 0x40000>; + phandle = <0x255>; + }; + + qos@fdf62000 { + compatible = "syscon"; + reg = <0x00 0xfdf62000 0x00 0x20>; + phandle = <0x8b>; + }; + + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; + }; + + mipi1-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x225>; + }; + + hdmiphy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1ac>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x36>; + }; + }; + + i2c@fec80000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x178>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb5 0x02 0xad>; + interrupts = <0x00 0x143 0x04>; + clocks = <0x02 0x92 0x02 0x8a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfec80000 0x00 0x1000>; + phandle = <0x2df>; + reset-names = "i2c\0apb"; + + imx415@37 { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "CMK-OT2022-PX1"; + reset-gpios = <0x182 0x05 0x01>; + rockchip,camera-module-index = <0x00>; + compatible = "sony,imx415"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x00>; + reg = <0x37>; + rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + phandle = <0x2e3>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x184>; + phandle = <0x32>; + }; + }; + }; + + es8388@11 { + pinctrl-names = "default"; + pinctrl-0 = <0x17a>; + clock-names = "mclk"; + assigned-clocks = <0x179>; + assigned-clock-rates = <0xbb8000>; + clocks = <0x179>; + #sound-dai-cells = <0x00>; + compatible = "everest,es8388\0everest,es8323"; + status = "okay"; + reg = <0x11>; + phandle = <0x1db>; + }; + + XC7160b@1b { + power-domains = <0x60 0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <0x180>; + clock-names = "xvclk"; + pwdn-gpios = <0xfe 0x04 0x00>; + clocks = <0x02 0x100>; + firefly,clkout-enabled-index = <0x00>; + rockchip,camera-module-name = "NC"; + reset-gpios = <0x182 0x05 0x00>; + rockchip,camera-module-index = <0x00>; + compatible = "firefly,xc7160"; + rockchip,camera-module-facing = "back"; + power-gpios = <0x181 0x1d 0x01>; + reg = <0x1b>; + rockchip,camera-module-lens-name = "NC"; + phandle = <0x2e2>; + + port { + + endpoint { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x183>; + phandle = <0x31>; + }; + }; + }; + + fusb302@22 { + pinctrl-names = "default"; + pinctrl-0 = <0x17b>; + interrupts = <0x1b 0x08>; + vbus-supply = <0x17c>; + interrupt-parent = <0x7b>; + compatible = "fcs,fusb302"; + status = "disabled"; + reg = <0x22>; + phandle = <0x2e0>; + + connector { + sink-pdos = <0x4019064>; + power-role = "dual"; + source-pdos = <0x401912c>; + data-role = "dual"; + label = "USB-C"; + try-power-role = "sink"; + compatible = "usb-c-connector"; + op-sink-microwatt = <0xf4240>; + phandle = <0x2e1>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x17e>; + phandle = <0x18e>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x17f>; + phandle = <0x18f>; + }; + }; + }; + + altmodes { + #address-cells = <0x01>; + #size-cells = <0x00>; + + altmode@0 { + svid = <0xff01>; + vdo = <0xffffffff>; + reg = <0x00>; + }; + }; + }; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint@0 { + remote-endpoint = <0x17d>; + phandle = <0x68>; + }; + }; + }; + }; + }; + + syscon@fd5e8000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5e8000 0x00 0x4000>; + phandle = <0x190>; + }; + + vbus5v0-typec-pwr-en-regulator { + gpio = <0x182 0x0c 0x00>; + enable-active-high; + regulator-name = "vbus5v0_typec_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x17c>; + }; + + mipi2-csi2-hw@fdd30000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x326>; + interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; + clocks = <0x02 0x1d1>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd30000 0x00 0x10000>; + phandle = <0x49>; + reset-names = "srst_csihost_p"; + }; + + spdif-rx@fde18000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x262>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x401>; + interrupts = <0x00 0xc9 0x04>; + clocks = <0x02 0x262 0x02 0x261>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde18000 0x00 0x1000>; + phandle = <0x480>; + dmas = <0x7c 0x17>; + reset-names = "spdifrx-m"; + }; + + syscon@fd5a2000 { + compatible = "rockchip,rk3588-npu-grf\0syscon"; + reg = <0x00 0xfd5a2000 0x00 0x100>; + phandle = <0xb6>; + }; + + rkisp0-vir3 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23e>; + }; + + qos@fdf66200 { + compatible = "syscon"; + reg = <0x00 0xfdf66200 0x00 0x20>; + phandle = <0x94>; + }; + + rkcif@fdce0000 { + power-domains = <0x60 0x1b>; + iommus = <0x50>; + nvmem-cells = <0x21 0xd4 0xd5>; + clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; + reg-names = "cif_regs"; + assigned-clocks = <0x02 0x1e3>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; + interrupts = <0x00 0x9b 0x04>; + clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; + compatible = "rockchip,rk3588-cif"; + status = "okay"; + rockchip,grf = <0xc8>; + interrupt-names = "cif-intr"; + nvmem-cell-names = "specification\0package_low\0package_high"; + reg = <0x00 0xfdce0000 0x00 0x800>; + phandle = <0x4f>; + reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; + }; + + edp@fdec0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e1 0x02 0x3e0>; + interrupts = <0x00 0xa3 0x04>; + clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x101>; + reg = <0x00 0xfdec0000 0x00 0x1000>; + phandle = <0x289>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x103>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe1>; + }; + + endpoint@2 { + remote-endpoint = <0x3b>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe7>; + }; + + endpoint@0 { + remote-endpoint = <0x102>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdb>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x28a>; + }; + }; + }; + }; + + qos@fdf72400 { + compatible = "syscon"; + reg = <0x00 0xfdf72400 0x00 0x20>; + phandle = <0x84>; + }; + + dp@fde60000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cd>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x389>; + interrupts = <0x00 0xa2 0x04>; + clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0x1a5>; + reg = <0x00 0xfde60000 0x00 0x4000>; + phandle = <0x1e3>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x3e>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe3>; + }; + + endpoint@2 { + remote-endpoint = <0x1a7>; + status = "disabled"; + reg = <0x02>; + phandle = <0xeb>; + }; + + endpoint@0 { + remote-endpoint = <0x1a6>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdd>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x481>; + }; + }; + }; + }; + + vcc5v0-usbdcin { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usbdcin"; + compatible = "regulator-fixed"; + phandle = <0x48c>; + vin-supply = <0x1cd>; + }; + + rkvdec-core@fdc48000 { + power-domains = <0x60 0x0f>; + iommus = <0xcc>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,core-mask = <0x20002>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; + interrupts = <0x00 0x61 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec1"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xffe00000 0x100000>; + reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; + phandle = <0x275>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcd>; + }; + + vcc-1v1-nldo-s3 { + regulator-max-microvolt = <0x10c8e0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x10c8e0>; + regulator-name = "vcc_1v1_nldo_s3"; + compatible = "regulator-fixed"; + phandle = <0x15c>; + vin-supply = <0x78>; + }; + + power-management@fd8d8000 { + compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; + reg = <0x00 0xfd8d8000 0x00 0x400>; + phandle = <0xd9>; + + power-controller { + #address-cells = <0x01>; + #size-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-power-controller"; + status = "okay"; + phandle = <0x60>; + + power-domain@37 { + clocks = <0x02 0x199 0x02 0x140>; + reg = <0x25>; + pm_qos = <0xaf>; + }; + + power-domain@27 { + #address-cells = <0x01>; + clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; + #size-cells = <0x00>; + reg = <0x1b>; + pm_qos = <0xa2 0xa3 0xa4 0xa5>; + + power-domain@29 { + clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; + reg = <0x1d>; + pm_qos = <0xa8 0xa9>; + }; + + power-domain@28 { + clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; + reg = <0x1c>; + pm_qos = <0xa6 0xa7>; + }; + }; + + power-domain@33 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x21>; + }; + + power-domain@13 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x0d>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@16 { + #address-cells = <0x01>; + clocks = <0x02 0x1c4 0x02 0x1c5>; + #size-cells = <0x00>; + reg = <0x10>; + pm_qos = <0x8d 0x8e 0x8f>; + + power-domain@17 { + clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; + reg = <0x11>; + pm_qos = <0x90 0x91 0x92>; + }; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + }; + + power-domain@31 { + clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; + reg = <0x1f>; + pm_qos = <0xab 0xac 0xad 0xae>; + }; + + power-domain@21 { + #address-cells = <0x01>; + clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; + #size-cells = <0x00>; + reg = <0x15>; + pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; + + power-domain@15 { + clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; + reg = <0x0f>; + pm_qos = <0x8c>; + }; + + power-domain@23 { + clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; + reg = <0x17>; + pm_qos = <0x9b>; + }; + + power-domain@14 { + clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; + reg = <0x0e>; + pm_qos = <0x8b>; + }; + + power-domain@22 { + clocks = <0x02 0x1ba 0x02 0x1b9>; + reg = <0x16>; + pm_qos = <0x9c>; + }; + }; + + power-domain@38 { + clocks = <0x02 0x3c 0x02 0x3d>; + reg = <0x26>; + }; + + power-domain@8 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x08>; + + power-domain@9 { + #address-cells = <0x01>; + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; + #size-cells = <0x00>; + reg = <0x09>; + pm_qos = <0x82 0x83 0x84>; + + power-domain@11 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0b>; + pm_qos = <0x86>; + }; + + power-domain@10 { + clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; + reg = <0x0a>; + pm_qos = <0x85>; + }; + }; + }; + + power-domain@26 { + clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; + reg = <0x1a>; + pm_qos = <0xa0 0xa1>; + }; + + power-domain@34 { + clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; + reg = <0x22>; + }; + + power-domain@24 { + #address-cells = <0x01>; + clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; + #size-cells = <0x00>; + reg = <0x18>; + pm_qos = <0x9d 0x9e>; + + power-domain@25 { + clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; + reg = <0x19>; + pm_qos = <0x9f>; + }; + }; + + power-domain@12 { + clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; + reg = <0x0c>; + pm_qos = <0x87 0x88 0x89 0x8a>; + }; + + power-domain@40 { + reg = <0x28>; + pm_qos = <0xb0>; + }; + + power-domain@30 { + clocks = <0x02 0x189 0x02 0x18a>; + reg = <0x1e>; + pm_qos = <0xaa>; + }; + }; + }; + + csi2-dphy3 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x212>; + }; + + qos@fdf3e000 { + compatible = "syscon"; + reg = <0x00 0xfdf3e000 0x00 0x20>; + phandle = <0xac>; + }; + + pwm@fd8b0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x81>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0030 0x00 0x10>; + phandle = <0x264>; + }; + + rkcif-mipi-lvds2-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x234>; + }; + + syscon@fd5cc000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5cc000 0x00 0x4000>; + phandle = <0x1c9>; + }; + + vdpu@fdb50400 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-decoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "okay"; + interrupt-names = "irq_vdpu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50400 0x00 0x400>; + phandle = <0x267>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + qos@fdf60200 { + compatible = "syscon"; + reg = <0x00 0xfdf60200 0x00 0x20>; + phandle = <0x8e>; + }; + + pwm@febe0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x170>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0030 0x00 0x10>; + phandle = <0x2d8>; + }; + + display-subsystem { + memory-region-names = "drm-logo"; + clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; + ports = <0x34>; + memory-region = <0x37>; + clocks = <0x35 0x36>; + compatible = "rockchip,display-subsystem"; + phandle = <0x215>; + + route { + + route-edp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21a>; + }; + + route-hdmi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3f>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21e>; + }; + + route-dp1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3e>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21d>; + }; + + route-dsi1 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3a>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x218>; + }; + + route-edp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3b>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x219>; + }; + + route-hdmi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3c>; + logo,mode = "center"; + status = "okay"; + phandle = <0x21b>; + }; + + route-dp0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x38>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x216>; + }; + + route-rgb { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x3d>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x21c>; + }; + + route-dsi0 { + logo,kernel = "logo_kernel.bmp"; + logo,uboot = "logo.bmp"; + charge_logo,mode = "center"; + connect = <0x39>; + logo,mode = "center"; + status = "disabled"; + phandle = <0x217>; + }; + }; + }; + + serial@febc0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x168>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x154 0x04>; + clocks = <0x02 0xd7 0x02 0xb3>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfebc0000 0x00 0x100>; + phandle = <0x2d1>; + dmas = <0xf2 0x0b 0xf2 0x0c>; + reg-shift = <0x02>; + }; + + adc-keys { + io-channels = <0x1d9 0x01>; + poll-interval = <0x64>; + keyup-threshold-microvolt = <0x1b7740>; + compatible = "adc-keys"; + status = "okay"; + phandle = <0x49e>; + io-channel-names = "buttons"; + + recovery-key { + press-threshold-microvolt = <0x4268>; + label = "F12"; + linux,code = <0x58>; + }; + }; + + pvtm@fdaf0000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-npu-pvtm"; + reg = <0x00 0xfdaf0000 0x00 0x100>; + + pvtm@3 { + clock-names = "clk\0pclk"; + resets = <0x02 0x1de 0x02 0x1dc>; + clocks = <0x02 0x12b 0x02 0x129>; + reg = <0x03>; + reset-names = "rts\0rst-p"; + }; + }; + + codec-digital@fe500000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x144>; + clock-names = "dac\0pclk"; + resets = <0x02 0x84>; + clocks = <0x02 0x29 0x02 0x2f>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; + status = "disabled"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfe500000 0x00 0x1000>; + phandle = <0x29e>; + reset-names = "reset"; + rockchip,pwm-output-mode; + }; + + pwm@fd8b0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x80>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0020 0x00 0x10>; + phandle = <0x263>; + }; + + rkcif-mipi-lvds2 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "okay"; + phandle = <0x55>; + + port { + + endpoint { + remote-endpoint = <0x54>; + phandle = <0x4e>; + }; + }; + }; + + pwm@febe0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x16f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0020 0x00 0x10>; + phandle = <0x2d7>; + }; + + vcc-fan-pwr-en-regulator { + regulator-boot-on; + gpio = <0x182 0x0b 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_fan_pwr_en"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a4>; + }; + + iommu@fdba0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x79 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege0_mmu"; + reg = <0x00 0xfdba0800 0x00 0x40>; + phandle = <0xbc>; + }; + + rkcif-mipi-lvds1-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x231>; + }; + + arm-pmu { + interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; + interrupts = <0x01 0x07 0x08>; + compatible = "arm,armv8-pmuv3"; + phandle = <0x20c>; + }; + + pvtm@fda40000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore0-pvtm"; + reg = <0x00 0xfda40000 0x00 0x100>; + + pvtm@0 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c6 0x02 0x15>; + reg = <0x00>; + }; + }; + + pwm@fd8b0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x7f>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0010 0x00 0x10>; + phandle = <0x262>; + }; + + i2s@fddc0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x1f9>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x38d>; + interrupts = <0x00 0xb8 0x04>; + clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc0000 0x00 0x1000>; + phandle = <0x27d>; + dmas = <0xf2 0x00>; + reset-names = "tx-m"; + }; + + qos@fdf61400 { + compatible = "syscon"; + reg = <0x00 0xfdf61400 0x00 0x20>; + phandle = <0x92>; + }; + + syscon@fd5d4000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d4000 0x00 0x4000>; + phandle = <0x1c8>; + + usb2-phy@4000 { + clock-output-names = "usb480m_phy1"; + clock-names = "phyclk"; + resets = <0x02 0xc0048 0x02 0x489>; + interrupts = <0x00 0x18a 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x4000 0x10>; + phandle = <0x1ca>; + reset-names = "phy\0apb"; + + otg-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a3>; + }; + }; + }; + + rkisp0-vir1 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23c>; + }; + + pwm@febe0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0010 0x00 0x10>; + phandle = <0x2d6>; + }; + + thermal-zones { + phandle = <0x248>; + + bigcore1-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x02>; + phandle = <0x24d>; + }; + + soc-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x00>; + sustainable-power = <0x834>; + phandle = <0x249>; + + trips { + + trip-point-0 { + temperature = <0x124f8>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x24a>; + }; + + trip-point-1 { + temperature = <0x14c08>; + hysteresis = <0x7d0>; + type = "passive"; + phandle = <0x5e>; + }; + + soc-crit { + temperature = <0x1c138>; + hysteresis = <0x7d0>; + type = "critical"; + phandle = <0x24b>; + }; + }; + + cooling-maps { + + map2 { + trip = <0x5e>; + cooling-device = <0x0c 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map0 { + trip = <0x5e>; + cooling-device = <0x06 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map3 { + trip = <0x5e>; + cooling-device = <0x5f 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + + map1 { + trip = <0x5e>; + cooling-device = <0x0a 0xffffffff 0xffffffff>; + contribution = <0x400>; + }; + }; + }; + + npu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x06>; + phandle = <0x251>; + }; + + center-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x04>; + phandle = <0x24f>; + }; + + gpu-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x05>; + phandle = <0x250>; + }; + + littlecore-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x03>; + phandle = <0x24e>; + }; + + bigcore0-thermal { + polling-delay = <0x3e8>; + polling-delay-passive = <0x14>; + thermal-sensors = <0x5d 0x01>; + phandle = <0x24c>; + }; + }; + + iommu@fdbdf000 { + power-domains = <0x60 0x10>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; + reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; + phandle = <0xc2>; + }; + + serial@feb50000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14d 0x04>; + clocks = <0x02 0xbb 0x02 0xac>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb50000 0x00 0x100>; + phandle = <0x2ca>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + reg-shift = <0x02>; + }; + + iommu@fdcd0f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8c 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec0_mmu"; + reg = <0x00 0xfdcd0f00 0x00 0x100>; + phandle = <0xd2>; + }; + + vcc5v0-host { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + gpio = <0x182 0x02 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_host"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x75>; + vin-supply = <0x1dd>; + }; + + qos@fdf66a00 { + compatible = "syscon"; + reg = <0x00 0xfdf66a00 0x00 0x20>; + phandle = <0x98>; + }; + + phy@fed90000 { + clock-names = "refclk\0immortal\0pclk\0utmi"; + resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; + clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; + compatible = "rockchip,rk3588-usbdp-phy"; + status = "okay"; + rockchip,dp-lane-mux = <0x02 0x03>; + reg = <0x00 0xfed90000 0x00 0x10000>; + phandle = <0x48b>; + rockchip,usb-grf = <0x74>; + reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; + rockchip,u2phy-grf = <0x1c8>; + rockchip,usbdpphy-grf = <0x1c9>; + rockchip,vo-grf = <0xf5>; + + dp-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a5>; + }; + + u3-port { + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x1a4>; + }; + }; + + jpege-core@fdba0000 { + power-domains = <0x60 0x15>; + iommus = <0xbc>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ac>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ca 0x02 0x2cb>; + interrupts = <0x00 0x7a 0x04>; + clocks = <0x02 0x1ac 0x02 0x1ad>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba0000 0x00 0x400>; + phandle = <0x26d>; + reset-names = "video_a\0video_h"; + }; + + vcc5v0-sys { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_sys"; + compatible = "regulator-fixed"; + phandle = <0x78>; + vin-supply = <0x1cd>; + }; + + pwm@fd8b0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x7e>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x158 0x04>; + clocks = <0x02 0x2a5 0x02 0x2a4>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfd8b0000 0x00 0x10>; + phandle = <0x261>; + }; + + vop@fdd90000 { + power-domains = <0x60 0x18>; + iommus = <0xd6>; + rockchip,vop-grf = <0xd7>; + clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; + reg-names = "regs\0gamma_lut"; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2cb41780>; + resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; + compatible = "rockchip,rk3588-vop"; + rockchip,pmu = <0xd9>; + status = "okay"; + rockchip,grf = <0xc8>; + reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; + phandle = <0x278>; + rockchip,vo1-grf = <0xd8>; + reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + phandle = <0x34>; + + port@0 { + rockchip,primary-plane = <0x02>; + rockchip,plane-mask = <0x05>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x270>; + assigned-clock-rates = <0x2faf0800>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x279>; + + endpoint@5 { + remote-endpoint = <0xdf>; + reg = <0x05>; + phandle = <0x1ad>; + }; + + endpoint@3 { + remote-endpoint = <0xdd>; + reg = <0x03>; + phandle = <0x1a6>; + }; + + endpoint@1 { + remote-endpoint = <0xdb>; + reg = <0x01>; + phandle = <0x102>; + }; + + endpoint@4 { + remote-endpoint = <0xde>; + reg = <0x04>; + phandle = <0x1b0>; + }; + + endpoint@2 { + remote-endpoint = <0xdc>; + reg = <0x02>; + phandle = <0x3c>; + }; + + endpoint@0 { + remote-endpoint = <0xda>; + reg = <0x00>; + phandle = <0xf7>; + }; + }; + + port@3 { + rockchip,primary-plane = <0x09>; + rockchip,plane-mask = <0x280>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + phandle = <0x27c>; + + endpoint@1 { + remote-endpoint = <0xef>; + reg = <0x01>; + phandle = <0x3a>; + }; + + endpoint@2 { + remote-endpoint = <0xf0>; + reg = <0x02>; + phandle = <0x3d>; + }; + + endpoint@0 { + remote-endpoint = <0xee>; + reg = <0x00>; + phandle = <0x39>; + }; + }; + + port@1 { + rockchip,primary-plane = <0x03>; + rockchip,plane-mask = <0x0a>; + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + phandle = <0x27a>; + + endpoint@5 { + remote-endpoint = <0xe5>; + reg = <0x05>; + phandle = <0x3f>; + }; + + endpoint@3 { + remote-endpoint = <0xe3>; + reg = <0x03>; + phandle = <0x3e>; + }; + + endpoint@1 { + remote-endpoint = <0xe1>; + reg = <0x01>; + phandle = <0x103>; + }; + + endpoint@4 { + remote-endpoint = <0xe4>; + reg = <0x04>; + phandle = <0x1b1>; + }; + + endpoint@2 { + remote-endpoint = <0xe2>; + reg = <0x02>; + phandle = <0xff>; + }; + + endpoint@0 { + remote-endpoint = <0xe0>; + reg = <0x00>; + phandle = <0x38>; + }; + }; + + port@2 { + rockchip,primary-plane = <0x08>; + rockchip,plane-mask = <0x140>; + #address-cells = <0x01>; + assigned-clocks = <0x02 0x273>; + assigned-clock-parents = <0x02 0x04>; + #size-cells = <0x00>; + reg = <0x02>; + phandle = <0x27b>; + + endpoint@5 { + remote-endpoint = <0xeb>; + reg = <0x05>; + phandle = <0x1a7>; + }; + + endpoint@3 { + remote-endpoint = <0xe9>; + reg = <0x03>; + phandle = <0xf3>; + }; + + endpoint@1 { + remote-endpoint = <0xe7>; + reg = <0x01>; + phandle = <0x3b>; + }; + + endpoint@6 { + remote-endpoint = <0xec>; + reg = <0x06>; + phandle = <0x1b2>; + }; + + endpoint@4 { + remote-endpoint = <0xea>; + reg = <0x04>; + phandle = <0xf4>; + }; + + endpoint@2 { + remote-endpoint = <0xe8>; + reg = <0x02>; + phandle = <0x100>; + }; + + endpoint@0 { + remote-endpoint = <0xe6>; + reg = <0x00>; + phandle = <0xf8>; + }; + + endpoint@7 { + remote-endpoint = <0xed>; + reg = <0x07>; + phandle = <0x1ae>; + }; + }; + }; + }; + + csi2-dphy1 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x210>; + }; + + pwm@febe0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x16d>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15c 0x04>; + clocks = <0x02 0x57 0x02 0x56>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebe0000 0x00 0x10>; + phandle = <0x2d5>; + }; + + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; + + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; + + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; + + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; + + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; + }; + + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; + }; + + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; + + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; + + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; + + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; + + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; + + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; + + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; + }; + + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; + + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; + + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; + }; + + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; + }; + + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; + }; + + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; + + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; + + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; + }; + + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; + + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; + }; + + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; + + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; + }; + + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; + }; + + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; + }; + + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; + }; + + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; + }; + + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; + }; + + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; + + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; + }; + + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; + + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; + }; + }; + + usb@fc8c0000 { + power-domains = <0x60 0x1f>; + phy-names = "usb2-phy"; + clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; + interrupts = <0x00 0xdb 0x04>; + clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; + compatible = "rockchip,rk3588-ohci\0generic-ohci"; + status = "okay"; + phys = <0x6f>; + reg = <0x00 0xfc8c0000 0x00 0x40000>; + phandle = <0x6e>; + }; + + qos@fdf40000 { + compatible = "syscon"; + reg = <0x00 0xfdf40000 0x00 0x20>; + phandle = <0xa8>; + }; + + mipi0-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x224>; + }; + + cluster1-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x24 0x25 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x26>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x16>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + mmc@fe2d0000 { + power-domains = <0x60 0x25>; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <0x119>; + clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; + interrupts = <0x00 0xcc 0x04>; + clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; + compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; + status = "disabled"; + reg = <0x00 0xfe2d0000 0x00 0x4000>; + phandle = <0x294>; + max-frequency = <0xbebc200>; + }; + + rkcif-mipi-lvds-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22e>; + }; + + serial@feb90000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x165>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x151 0x04>; + clocks = <0x02 0xcb 0x02 0xb0>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb90000 0x00 0x100>; + phandle = <0x2ce>; + dmas = <0xf1 0x0d 0xf1 0x0e>; + reg-shift = <0x02>; + }; + + i2s@fddf8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x239>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x3c3>; + interrupts = <0x00 0xbb 0x04>; + clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "okay"; + reg = <0x00 0xfddf8000 0x00 0x1000>; + phandle = <0x1ec>; + dmas = <0xf2 0x15>; + reset-names = "rx-m"; + }; + + phy@fee20000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bf>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20007 0x02 0x4d8>; + clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "disabled"; + rockchip,pipe-phy-grf = <0x195>; + reg = <0x00 0xfee20000 0x00 0x100>; + phandle = <0x70>; + reset-names = "combphy-apb\0combphy"; + rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; + }; + + csi2-dphy0-hw@fedc0000 { + clock-names = "pclk"; + resets = <0x02 0x17 0x02 0x16>; + clocks = <0x02 0x10c>; + compatible = "rockchip,rk3588-csi2-dphy-hw"; + status = "okay"; + rockchip,grf = <0x192>; + reg = <0x00 0xfedc0000 0x00 0x8000>; + phandle = <0x2d>; + reset-names = "srst_csiphy0\0srst_p_csiphy0"; + rockchip,sys_grf = <0xc8>; + }; + + can@fea70000 { + pinctrl-names = "default"; + pinctrl-0 = <0x147>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xbd 0x02 0xbc>; + interrupts = <0x00 0x157 0x04>; + clocks = <0x02 0x74 0x02 0x73>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea70000 0x00 0x1000>; + phandle = <0x2a2>; + reset-names = "can\0can-apb"; + }; + + mailbox@fec60000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; + clocks = <0x02 0x4c>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec60000 0x00 0x200>; + phandle = <0x2dd>; + }; + + usbdrd3_1 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x47a>; + + usb@fc400000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x2a7>; + interrupts = <0x00 0xdd 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x1a3 0x1a4>; + reg = <0x00 0xfc400000 0x00 0x400000>; + phandle = <0x47b>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; + + leds { + compatible = "gpio-leds"; + status = "okay"; + phandle = <0x497>; + + user { + linux,default-trigger = "ir-user-click"; + label = ":user"; + default-state = "off"; + phandle = <0x499>; + gpios = <0x182 0x03 0x00>; + }; + + power { + linux,default-trigger = "ir-power-click"; + label = ":power"; + default-state = "on"; + status = "disabled"; + phandle = <0x498>; + gpios = <0x7b 0x15 0x00>; + }; + }; + + rkcif-mipi-lvds5-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x479>; + }; + + qos@fdf80000 { + compatible = "syscon"; + reg = <0x00 0xfdf80000 0x00 0x20>; + phandle = <0x9f>; + }; + + spdif-tx@fdde0000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x254>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc4 0x04>; + clocks = <0x02 0x257 0x02 0x253>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde0000 0x00 0x1000>; + phandle = <0x27e>; + dmas = <0xf1 0x07>; + }; + + qos@fdf35000 { + compatible = "syscon"; + reg = <0x00 0xfdf35000 0x00 0x20>; + phandle = <0x87>; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0"; + }; + + rkcif-mipi-lvds { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x52>; + }; + + rga@fdb80000 { + power-domains = <0x60 0x15>; + clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; + interrupts = <0x00 0x74 0x04>; + clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; + compatible = "rockchip,rga2_core0"; + status = "okay"; + interrupt-names = "rga2_irq"; + reg = <0x00 0xfdb80000 0x00 0x1000>; + phandle = <0x26b>; + }; + + qos@fdf66800 { + compatible = "syscon"; + reg = <0x00 0xfdf66800 0x00 0x20>; + phandle = <0x97>; + }; + + spi@feb10000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x151 0x152 0x153>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x147 0x04>; + clocks = <0x02 0xa4 0x02 0x9f>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb10000 0x00 0x1000>; + phandle = <0x2ac>; + dmas = <0x7c 0x10 0x7c 0x11>; + }; + + rkcif-mipi-lvds4-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x472>; + }; + + hdmi@fdea0000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d7 0x02 0x49d>; + interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; + clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "disabled"; + rockchip,grf = <0xc8>; + phys = <0x1ac>; + reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; + phandle = <0x1e1>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x482>; + + endpoint@1 { + remote-endpoint = <0x3f>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe5>; + }; + + endpoint@2 { + remote-endpoint = <0x1ae>; + status = "disabled"; + reg = <0x02>; + phandle = <0xed>; + }; + + endpoint@0 { + remote-endpoint = <0x1ad>; + status = "disabled"; + reg = <0x00>; + phandle = <0xdf>; + }; + }; + }; + }; + + pcie@fe180000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x30 0x3f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x210 0x02 0x21f>; + interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; + clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; + interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; + msi-map = <0x3000 0x106 0x3000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x70 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; + linux,pci-domain = <0x03>; + phandle = <0x28c>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xf5 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x105>; + interrupt-controller; + }; + }; + + i2s@fe480000 { + pinctrl-names = "default"; + pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + resets = <0x02 0xc002a 0x02 0xc002d>; + interrupts = <0x00 0xb5 0x04>; + clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfe480000 0x00 0x1000>; + phandle = <0x1d1>; + dmas = <0x7c 0x02 0x7c 0x03>; + reset-names = "tx-m\0rx-m"; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5c0000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c0000 0x00 0x100>; + phandle = <0x1cb>; + }; + + i2c@feab0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14a>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb2 0x02 0xaa>; + interrupts = <0x00 0x140 0x04>; + clocks = <0x02 0x8f 0x02 0x87>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeab0000 0x00 0x1000>; + phandle = <0x2a6>; + reset-names = "i2c\0apb"; + + gpio@21 { + gpio-controller; + gpio-group-num = <0xc8>; + compatible = "nxp,pca9555"; + status = "okay"; + reg = <0x21>; + phandle = <0x182>; + #gpio-cells = <0x02>; + }; + }; + + iommu@fdcb7f00 { + power-domains = <0x60 0x1b>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x84 0x04>; + clocks = <0x02 0x1de 0x02 0x1df>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "isp0_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100>; + phandle = <0xd0>; + }; + + qos@fdf3e600 { + compatible = "syscon"; + reg = <0x00 0xfdf3e600 0x00 0x20>; + phandle = <0xae>; + }; + + syscon@fd5b8000 { + compatible = "rockchip,pcie30-phy-grf\0syscon"; + reg = <0x00 0xfd5b8000 0x00 0x10000>; + phandle = <0x1cc>; + }; + + qos@fdf81200 { + compatible = "syscon"; + reg = <0x00 0xfdf81200 0x00 0x20>; + phandle = <0xa1>; + }; + + mipi5-csi2-hw@fdd60000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x329>; + interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; + clocks = <0x02 0x1d4>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd60000 0x00 0x10000>; + phandle = <0x4c>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf72000 { + compatible = "syscon"; + reg = <0x00 0xfdf72000 0x00 0x20>; + phandle = <0x82>; + }; + + timer@feae0000 { + clock-names = "pclk\0timer"; + interrupts = <0x00 0x121 0x04>; + clocks = <0x02 0x5c 0x02 0x5f>; + compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; + reg = <0x00 0xfeae0000 0x00 0x20>; + phandle = <0x2a9>; + }; + + rkcif-mipi-lvds-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22c>; + }; + + syscon@fd5b5000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b5000 0x00 0x1000>; + phandle = <0x193>; + }; + + i2c@fec90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x185>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb6 0x02 0xae>; + interrupts = <0x00 0x144 0x04>; + clocks = <0x02 0x93 0x02 0x8b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfec90000 0x00 0x1000>; + phandle = <0x2e4>; + reset-names = "i2c\0apb"; + }; + + avsd-plus@fdb51000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x77 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,avs-plus-decoder"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_avsd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb51000 0x00 0x200>; + phandle = <0x268>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + dp1-sound { + rockchip,jack-det; + rockchip,cpu = <0x1e2>; + rockchip,codec = <0x1e3 0x01>; + rockchip,card-name = "rockchip,dp1"; + compatible = "rockchip,hdmi"; + status = "disabled"; + phandle = <0x4a9>; + rockchip,mclk-fs = <0x200>; + }; + + mipi1-csi2-hw@fdd20000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x325>; + interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; + clocks = <0x02 0x1d0>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd20000 0x00 0x10000>; + phandle = <0x48>; + reset-names = "srst_csihost_p"; + }; + + iep@fdbb0000 { + power-domains = <0x60 0x15>; + iommus = <0xc1>; + clock-names = "aclk\0hclk\0sclk"; + assigned-clocks = <0x02 0x1aa>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x06>; + rockchip,disable-auto-freq; + compatible = "rockchip,iep-v2"; + status = "okay"; + interrupt-names = "irq_iep"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbb0000 0x00 0x500>; + phandle = <0x271>; + reset-names = "rst_a\0rst_h\0rst_s"; + }; + + dsi@fde20000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x354>; + interrupts = <0x00 0xa7 0x04>; + clocks = <0x02 0x278 0x02 0x27a>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x2f>; + reg = <0x00 0xfde20000 0x00 0x10000>; + phandle = <0x281>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x282>; + + endpoint@1 { + remote-endpoint = <0x39>; + status = "disabled"; + reg = <0x01>; + phandle = <0xee>; + }; + + endpoint@0 { + remote-endpoint = <0xf3>; + status = "disabled"; + reg = <0x00>; + phandle = <0xe9>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x477>; + }; + + edp@fded0000 { + power-domains = <0x60 0x1a>; + phy-names = "dp"; + clock-names = "dp\0pclk\0spdif\0hclk"; + resets = <0x02 0x3e4 0x02 0x3e3>; + interrupts = <0x00 0xa4 0x04>; + clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; + compatible = "rockchip,rk3588-edp"; + status = "disabled"; + rockchip,grf = <0xd8>; + phys = <0x1af>; + reg = <0x00 0xfded0000 0x00 0x1000>; + phandle = <0x483>; + reset-names = "dp\0apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x1b1>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe4>; + }; + + endpoint@2 { + remote-endpoint = <0x1b2>; + status = "disabled"; + reg = <0x02>; + phandle = <0xec>; + }; + + endpoint@0 { + remote-endpoint = <0x1b0>; + status = "disabled"; + reg = <0x00>; + phandle = <0xde>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x484>; + }; + }; + }; + }; + + qos@fdf67000 { + compatible = "syscon"; + reg = <0x00 0xfdf67000 0x00 0x20>; + phandle = <0x9c>; + }; + + qos@fdf64000 { + compatible = "syscon"; + reg = <0x00 0xfdf64000 0x00 0x20>; + phandle = <0x9b>; + }; + + npu-opp-table { + rockchip,pvtm-offset = <0x50>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,init-freq = <0xf4240>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0xb4 0xb5 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; + rockchip,pvtm-thermal-zone = "npu-thermal"; + rockchip,high-temp-max-freq = "\0\f5"; + rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; + rockchip,pvtm-freq = "\0\f5"; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0xb6>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; + phandle = <0xb1>; + rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0x7a120>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-700000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-300000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-500000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-400000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-700000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x29b92700>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-950000000 { + opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-hz = <0x00 0x389fd980>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-900000000 { + opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + opp-hz = <0x00 0x35a4e900>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; + opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + }; + + opp-j-m-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-400000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x17d78400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-j-m-300000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x11e1a300>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-600000000 { + opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; + opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; + }; + + opp-1000000000 { + opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; + opp-hz = <0x00 0x3b9aca00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; + }; + + opp-j-m-500000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x1dcd6500>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; + }; + }; + + syscon@fd590000 { + compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; + reg = <0x00 0xfd590000 0x00 0x100>; + phandle = <0x26>; + }; + + syscon@fd5dc000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5dc000 0x00 0x4000>; + phandle = <0x25e>; + + usb2-phy@c000 { + clock-output-names = "usb480m_phy3"; + clock-names = "phyclk"; + resets = <0x02 0xc004a 0x02 0x48b>; + interrupts = <0x00 0x188 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0xc000 0x10>; + phandle = <0x6d>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6f>; + }; + }; + }; + + pcie-clk3 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk3"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x496>; + gpios = <0xfe 0x09 0x01>; + }; + + pwm@febf0030 { + pinctrl-names = "active"; + pinctrl-0 = <0x174>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0030 0x00 0x10>; + phandle = <0x2dc>; + }; + + hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0x00 0xfe5a0000 0x00 0x100>; + phandle = <0x29f>; + #hwlock-cells = <0x01>; + }; + + rkcif-mipi-lvds4-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x474>; + }; + + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; + + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; + }; + + hdmirx-controller@fdee0000 { + power-domains = <0x60 0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <0x1b3 0x1b4>; + clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; + reg-names = "hdmirx_regs"; + resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; + interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; + clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; + hpd-trigger-level = <0x01>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; + status = "disabled"; + rockchip,grf = <0xc8>; + interrupt-names = "cec\0hdmi\0dma"; + hdmirx-det-gpios = <0xfe 0x1d 0x01>; + reg = <0x00 0xfdee0000 0x00 0x6000>; + phandle = <0x1eb>; + reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; + rockchip,vo1_grf = <0xd8>; + }; + + qos@fdf61000 { + compatible = "syscon"; + reg = <0x00 0xfdf61000 0x00 0x20>; + phandle = <0x90>; + }; + + qos@fdf40600 { + compatible = "syscon"; + reg = <0x00 0xfdf40600 0x00 0x20>; + phandle = <0xa4>; + }; + + syscon@fd588000 { + compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd588000 0x00 0x2000>; + phandle = <0x25a>; + + reboot-mode { + mode-normal = <0x5242c300>; + mode-loader = <0x5242c301>; + mode-quiescent = <0x5242c30e>; + mode-bootloader = <0x5242c301>; + mode-recovery = <0x5242c303>; + mode-watchdog = <0x5242c308>; + mode-ums = <0x5242c30c>; + mode-fastboot = <0x5242c309>; + offset = <0x80>; + compatible = "syscon-reboot-mode"; + mode-winusb = <0x5242c30f>; + phandle = <0x25b>; + mode-charge = <0x5242c30b>; + mode-panic = <0x5242c307>; + }; + }; + + syscon@fd5a4000 { + compatible = "rockchip,rk3588-vop-grf\0syscon"; + reg = <0x00 0xfd5a4000 0x00 0x2000>; + phandle = <0xd7>; + }; + + iommu@fdb60f00 { + power-domains = <0x60 0x16>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_0_mmu"; + reg = <0x00 0xfdb60f00 0x00 0x100>; + phandle = <0xb9>; + }; + + pwm@febf0020 { + pinctrl-names = "active"; + pinctrl-0 = <0x173>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0020 0x00 0x10>; + phandle = <0x2db>; + }; + + rkispp@fdcd0000 { + power-domains = <0x60 0x1d>; + iommus = <0xd2>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d6>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8b 0x04>; + clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd0000 0x00 0xf00>; + phandle = <0x5b>; + }; + + tsadc@fec00000 { + pinctrl-names = "gpio\0otpout"; + pinctrl-0 = <0x175>; + clock-names = "tsadc\0apb_pclk"; + rockchip,hw-tshut-polarity = <0x00>; + assigned-clocks = <0x02 0xaa>; + assigned-clock-rates = <0x1e8480>; + resets = <0x02 0xc1 0x02 0xc0>; + interrupts = <0x00 0x18d 0x04>; + rockchip,hw-tshut-mode = <0x00>; + clocks = <0x02 0xaa 0x02 0xa9>; + #thermal-sensor-cells = <0x01>; + compatible = "rockchip,rk3588-tsadc"; + pinctrl-1 = <0x176>; + status = "okay"; + reg = <0x00 0xfec00000 0x00 0x400>; + phandle = <0x5d>; + reset-names = "tsadc\0tsadc-apb"; + rockchip,hw-tshut-temp = <0x1d4c0>; + }; + + iommu@fdbb0800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x75 0x04>; + clocks = <0x02 0x1aa 0x02 0x1a9>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_iep_mmu"; + reg = <0x00 0xfdbb0800 0x00 0x100>; + phandle = <0xc1>; + }; + + phy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0x101>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + pvtm@fda50000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-bigcore1-pvtm"; + reg = <0x00 0xfda50000 0x00 0x100>; + + pvtm@1 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2c8 0x02 0x17>; + reg = <0x01>; + }; + }; + + csi2-dcphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x20d>; + }; + + mailbox@fece0000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; + clocks = <0x02 0x4e>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfece0000 0x00 0x200>; + phandle = <0x2e9>; + }; + + rkcif-mipi-lvds3-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x23a>; + }; + + rkcif-mipi-lvds1-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x22f>; + }; + + dfi@fe060000 { + rockchip,pmu_grf = <0x104>; + compatible = "rockchip,rk3588-dfi"; + status = "disabled"; + reg = <0x00 0xfe060000 0x00 0x10000>; + phandle = <0x40>; + }; + + iommu@fdca0000 { + power-domains = <0x60 0x17>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x6d 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-av1"; + status = "okay"; + interrupt-names = "irq_av1d_mmu"; + reg = <0x00 0xfdca0000 0x00 0x600>; + phandle = <0xce>; + }; + + mipi5-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x229>; + }; + + qos@fdf35600 { + compatible = "syscon"; + reg = <0x00 0xfdf35600 0x00 0x20>; + phandle = <0x8a>; + }; + + syscon@fd5e4000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e4000 0x00 0x100>; + phandle = <0x1c7>; + }; + + iommu@fdba8800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7d 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege2_mmu"; + reg = <0x00 0xfdba8800 0x00 0x40>; + phandle = <0xbf>; + }; + + mpp-srv { + rockchip,resetgroup-count = <0x01>; + rockchip,taskqueue-count = <0x0c>; + compatible = "rockchip,mpp-service"; + status = "okay"; + phandle = <0xb8>; + }; + + cspmu@fd10c000 { + compatible = "rockchip,cspmu"; + reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; + phandle = <0x48e>; + }; + + pwm@febf0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x172>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0010 0x00 0x10>; + phandle = <0x2da>; + }; + + iommu@fdbef000 { + power-domains = <0x60 0x11>; + rockchip,shootdown-entire; + interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; + reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; + phandle = <0xc5>; + lock-names = "aclk\0iface"; + }; + + serial@feb60000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x162>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14e 0x04>; + clocks = <0x02 0xbf 0x02 0xad>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb60000 0x00 0x100>; + phandle = <0x2cb>; + dmas = <0x7c 0x0c 0x7c 0x0d>; + reg-shift = <0x02>; + }; + + hdmiin-sound { + rockchip,jack-det; + rockchip,cpu = <0x1ec>; + rockchip,codec = <0x1eb 0x00>; + rockchip,bitclock-master = <0x1eb>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,format = "i2s"; + compatible = "rockchip,hdmi"; + phandle = <0x4ac>; + rockchip,frame-master = <0x1eb>; + rockchip,mclk-fs = <0x80>; + }; + + i2s@fddc8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk_tx\0hclk"; + assigned-clocks = <0x02 0x1ff>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x391>; + interrupts = <0x00 0xbc 0x04>; + clocks = <0x02 0x201 0x02 0x1fe>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "disabled"; + reg = <0x00 0xfddc8000 0x00 0x1000>; + phandle = <0x47c>; + dmas = <0xf2 0x16>; + reset-names = "tx-m"; + }; + + pcie30-avdd0v75 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "pcie30_avdd0v75"; + compatible = "regulator-fixed"; + phandle = <0x4a7>; + vin-supply = <0x1df>; + }; + + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; + }; + + rockchip-suspend { + rockchip,sleep-debug-en = <0x01>; + rockchip,sleep-mode-config = <0x5000604>; + compatible = "rockchip,pm-rk3588"; + status = "okay"; + rockchip,wakeup-config = <0x100>; + phandle = <0x246>; + }; + + decompress@fea80000 { + clock-names = "aclk\0dclk\0pclk"; + resets = <0x02 0x118>; + interrupts = <0x00 0x55 0x04>; + clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; + compatible = "rockchip,hw-decompress"; + status = "disabled"; + reg = <0x00 0xfea80000 0x00 0x1000>; + phandle = <0x2a3>; + reset-names = "dresetn"; + }; + + dma-controller@fea30000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; + clocks = <0x02 0x79>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfea30000 0x00 0x4000>; + phandle = <0xf1>; + #dma-cells = <0x01>; + }; + + pwm@febf0000 { + pinctrl-names = "active"; + pinctrl-0 = <0x171>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15e 0x04>; + clocks = <0x02 0x5a 0x02 0x59>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "disabled"; + reg = <0x00 0xfebf0000 0x00 0x10>; + phandle = <0x2d9>; + }; + + iommu@fdcd8f00 { + power-domains = <0x60 0x1d>; + clock-names = "aclk\0iface\0pclk"; + interrupts = <0x00 0x8e 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "fec1_mmu"; + reg = <0x00 0xfdcd8f00 0x00 0x100>; + phandle = <0xd3>; + }; + + spdif-tx@fddb0000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x205>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc3 0x04>; + clocks = <0x02 0x209 0x02 0x204>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb0000 0x00 0x1000>; + phandle = <0x1d5>; + dmas = <0xf1 0x06>; + }; + + rkisp1-vir2 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x241>; + }; + + pcie-clk1 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk1"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x494>; + vin-supply = <0x1cd>; + gpios = <0x181 0x15 0x01>; + }; + + jpege-core@fdba8000 { + power-domains = <0x60 0x15>; + iommus = <0xbf>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2ce 0x02 0x2cf>; + interrupts = <0x00 0x7e 0x04>; + clocks = <0x02 0x1b0 0x02 0x1b1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege2"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba8000 0x00 0x400>; + phandle = <0x26f>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf66400 { + compatible = "syscon"; + reg = <0x00 0xfdf66400 0x00 0x20>; + phandle = <0x95>; + }; + + spdif-tx1-sound { + simple-audio-card,name = "rockchip,spdif-tx1"; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49d>; + simple-audio-card,mclk-fs = <0x80>; + + simple-audio-card,cpu { + sound-dai = <0x1d7>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d8>; + }; + }; + + mmc@fe2e0000 { + mmc-hs400-enhanced-strobe; + clock-names = "core\0bus\0axi\0block\0timer"; + assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; + bus-width = <0x08>; + non-removable; + no-sdio; + assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; + resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; + mmc-hs400-1_8v; + interrupts = <0x00 0xcd 0x04>; + clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; + no-sd; + compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; + status = "okay"; + reg = <0x00 0xfe2e0000 0x00 0x10000>; + phandle = <0x295>; + max-frequency = <0xbebc200>; + reset-names = "core\0bus\0axi\0block\0timer"; + }; + + dma-controller@fed10000 { + clock-names = "apb_pclk"; + interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; + clocks = <0x02 0x7a>; + arm,pl330-periph-burst; + compatible = "arm,pl330\0arm,primecell"; + reg = <0x00 0xfed10000 0x00 0x4000>; + phandle = <0xf2>; + #dma-cells = <0x01>; + }; + + iommu@fc900000 { + interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfc900000 0x00 0x200000>; + phandle = <0x256>; + }; + + mailbox@fec70000 { + clock-names = "pclk_mailbox"; + interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; + clocks = <0x02 0x4d>; + #mbox-cells = <0x01>; + compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; + status = "disabled"; + reg = <0x00 0xfec70000 0x00 0x200>; + phandle = <0x2de>; + }; + + pcie@fe150000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1b8>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x00 0x0f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20d 0x02 0x21c>; + interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; + clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x0e 0x00>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; + msi-map = <0x00 0x1b6 0x00 0x1000>; + #interrupt-cells = <0x01>; + status = "okay"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; + linux,pci-domain = <0x00>; + phandle = <0x485>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0x104 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b5>; + interrupt-controller; + }; + }; + + rng@fe378000 { + clock-names = "hclk_trng"; + resets = <0x11a 0x30>; + interrupts = <0x00 0x190 0x04>; + clocks = <0x0e 0x0c>; + compatible = "rockchip,trngv1"; + status = "okay"; + reg = <0x00 0xfe378000 0x00 0x200>; + phandle = <0x297>; + reset-names = "reset"; + }; + + sata@fe220000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x112 0x04>; + clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x1bc 0x01>; + reg = <0x00 0xfe220000 0x00 0x1000>; + phandle = <0x48a>; + ports-implemented = <0x01>; + }; + + rkcif-mipi-lvds5 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x1a2>; + }; + + vcc-sata-pwr-en-regulator { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + gpio = <0x182 0x0c 0x00>; + regulator-always-on; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_sata_pwr_en"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a3>; + vin-supply = <0x1cd>; + }; + + pwm-fan { + cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; + rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; + compatible = "pwm-fan"; + phandle = <0x4ad>; + pwms = <0x1ed 0x00 0xc350 0x00>; + #cooling-cells = <0x02>; + fan-supply = <0x78>; + }; + + qos@fdf3e200 { + compatible = "syscon"; + reg = <0x00 0xfdf3e200 0x00 0x20>; + phandle = <0xab>; + }; + + spdif-tx@fe4e0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x142>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x3f>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc1 0x04>; + clocks = <0x02 0x41 0x02 0x3e>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4e0000 0x00 0x1000>; + phandle = <0x29d>; + dmas = <0x7c 0x05>; + }; + + vad@fe4d0000 { + rockchip,det-channel = <0x00>; + rockchip,audio-src = <0x00>; + clock-names = "hclk"; + reg-names = "vad"; + interrupts = <0x00 0xca 0x04>; + clocks = <0x02 0x2a0>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-vad"; + status = "disabled"; + rockchip,mode = <0x00>; + reg = <0x00 0xfe4d0000 0x00 0x1000>; + phandle = <0x29c>; + }; + + jpegd@fdb90000 { + power-domains = <0x60 0x15>; + iommus = <0xbb>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1b4>; + rockchip,normal-rates = <0x23c34600 0x00>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x2d2 0x02 0x2d3>; + interrupts = <0x00 0x81 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x01>; + compatible = "rockchip,rkv-jpeg-decoder-v1"; + status = "okay"; + interrupt-names = "irq_jpegd"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb90000 0x00 0x400>; + phandle = <0x26c>; + reset-names = "video_a\0video_h"; + }; + + cpuinfo { + nvmem-cells = <0x2a 0x2b 0x2c>; + compatible = "rockchip,cpuinfo"; + nvmem-cell-names = "id\0cpu-version\0cpu-code"; + }; + + qos@fdf60400 { + compatible = "syscon"; + reg = <0x00 0xfdf60400 0x00 0x20>; + phandle = <0x8f>; + }; + + spi@feb20000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x01>; + pinctrl-0 = <0x154 0x155>; + clock-names = "spiclk\0apb_pclk"; + assigned-clocks = <0x02 0xa5>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x148 0x04>; + clocks = <0x02 0xa5 0x02 0xa0>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "okay"; + reg = <0x00 0xfeb20000 0x00 0x1000>; + phandle = <0x2ad>; + dmas = <0xf1 0x0f 0xf1 0x10>; + + rk806single@0 { + vcc11-supply = <0x15b>; + pinctrl-names = "default\0pmic-power-off"; + vcc12-supply = <0x78>; + vcc13-supply = <0x15c>; + vcc14-supply = <0x15c>; + pinctrl-0 = <0x156 0x157 0x158 0x159>; + interrupts = <0x07 0x08>; + spi-max-frequency = <0xf4240>; + interrupt-parent = <0x7b>; + low_voltage_threshold = <0xbb8>; + vcca-supply = <0x78>; + vcc1-supply = <0x78>; + pmic-reset-func = <0x01>; + vcc2-supply = <0x78>; + hotdie_temperture_threshold = <0x73>; + compatible = "rockchip,rk806"; + vcc3-supply = <0x78>; + pinctrl-1 = <0x15a>; + vcc4-supply = <0x78>; + vcc5-supply = <0x78>; + reg = <0x00>; + phandle = <0x2ae>; + vcc6-supply = <0x78>; + shutdown_voltage_threshold = <0xa8c>; + vcc7-supply = <0x78>; + vcc8-supply = <0x78>; + shutdown_temperture_threshold = <0xa0>; + vcc9-supply = <0x78>; + vcc10-supply = <0x78>; + + pinctrl_rk806 { + gpio-controller; + phandle = <0x2af>; + #gpio-cells = <0x02>; + + rk806_dvs2_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b4>; + }; + + rk806_dvs3_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl3"; + phandle = <0x159>; + }; + + rk806_dvs3_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl3"; + phandle = <0x2ba>; + }; + + rk806_dvs3_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b9>; + }; + + rk806_dvs2_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x158>; + }; + + rk806_dvs1_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl1"; + phandle = <0x15a>; + }; + + rk806_dvs1_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b0>; + }; + + rk806_dvs1_null { + function = "pin_fun0"; + pins = "gpio_pwrctrl2"; + phandle = <0x157>; + }; + + rk806_dvs3_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl3"; + phandle = <0x2bb>; + }; + + rk806_dvs2_gpio { + function = "pin_fun5"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b6>; + }; + + rk806_dvs2_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b2>; + }; + + rk806_dvs2_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b3>; + }; + + rk806_dvs1_rst { + function = "pin_fun3"; + pins = "gpio_pwrctrl1"; + phandle = <0x2b1>; + }; + + rk806_dvs3_slp { + function = "pin_fun1"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b7>; + }; + + rk806_dvs2_dvs { + function = "pin_fun4"; + pins = "gpio_pwrctrl2"; + phandle = <0x2b5>; + }; + + rk806_dvs3_pwrdn { + function = "pin_fun2"; + pins = "gpio_pwrctrl3"; + phandle = <0x2b8>; + }; + }; + + pwrkey { + status = "okay"; + }; + + regulators { + + PLDO_REG2 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s0"; + phandle = <0x177>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0x1b7740>; + }; + }; + + DCDC_REG4 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-init-microvolt = <0xb71b0>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x2bc>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG2 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x12>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG4 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_0v85_s0"; + phandle = <0x2c6>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG9 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vddq_ddr_s0"; + phandle = <0x2bf>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG2 { + regulator-max-microvolt = <0xcf850>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xcf850>; + regulator-name = "vdd_ddr_pll_s0"; + phandle = <0x2c5>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + PLDO_REG5 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vccio_sd_s0"; + phandle = <0x118>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG7 { + regulator-max-microvolt = <0x1e8480>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1e8480>; + regulator-name = "vdd_2v0_pldo_s3"; + phandle = <0x15b>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1e8480>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG3 { + regulator-max-microvolt = <0x124f80>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x124f80>; + regulator-name = "avdd_1v2_s0"; + phandle = <0x2c1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG5 { + regulator-max-microvolt = <0xdbba0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x42>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <0xcf850>; + }; + }; + + DCDC_REG10 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "vcc_1v8_s3"; + phandle = <0x2c0>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG1 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "avcc_1v8_s0"; + phandle = <0x1de>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xa4cb8>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x43>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG1 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + regulator-enable-ramp-delay = <0x190>; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <0x30d4>; + phandle = <0x62>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG5 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s0"; + phandle = <0x2c7>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + NLDO_REG3 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "avdd_0v75_s0"; + phandle = <0x1df>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + PLDO_REG6 { + regulator-max-microvolt = <0x1b7740>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + regulator-name = "pldo6_s3"; + phandle = <0x2c3>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x1b7740>; + regulator-on-in-suspend; + }; + }; + + DCDC_REG8 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s3"; + phandle = <0x2be>; + + regulator-state-mem { + regulator-suspend-microvolt = <0x325aa0>; + regulator-on-in-suspend; + }; + }; + + NLDO_REG1 { + regulator-max-microvolt = <0xb71b0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b0>; + regulator-name = "vdd_0v75_s3"; + phandle = <0x2c4>; + + regulator-state-mem { + regulator-suspend-microvolt = <0xb71b0>; + regulator-on-in-suspend; + }; + }; + + PLDO_REG4 { + regulator-max-microvolt = <0x325aa0>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc_3v3_s0"; + phandle = <0x2c2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + DCDC_REG6 { + regulator-boot-on; + regulator-always-on; + regulator-name = "vdd2_ddr_s3"; + phandle = <0x2bd>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + }; + + usbhost3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; + clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "disabled"; + phandle = <0x258>; + + usb@fcd00000 { + snps,dis_enblslpm_quirk; + phy-names = "usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + phy_type = "utmi_wide"; + resets = <0x02 0x237>; + interrupts = <0x00 0xde 0x04>; + snps,dis_rxdet_inp3_quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "disabled"; + snps,parkmode-disable-ss-quirk; + phys = <0x70 0x04>; + reg = <0x00 0xfcd00000 0x00 0x400000>; + phandle = <0x259>; + dr_mode = "host"; + reset-names = "usb3-host"; + snps,dis-tx-ipgap-linecheck-quirk; + }; + }; + + pcie@fe190000 { + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x40 0x4f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x08>; + resets = <0x02 0x211 0x02 0x220>; + interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; + clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; + interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x02>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + num-lanes = <0x01>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; + msi-map = <0x4000 0x106 0x4000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x108 0x02>; + num-viewport = <0x04>; + reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; + linux,pci-domain = <0x04>; + phandle = <0x28d>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x08>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xfa 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x107>; + interrupt-controller; + }; + }; + + rkcif-mipi-lvds3-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x57>; + phandle = <0x238>; + }; + + aliases { + i2c3 = "/i2c@feab0000"; + pwm9 = "/pwm@febe0010"; + pwm14 = "/pwm@febf0020"; + spi2 = "/spi@feb20000"; + usbdp0 = "/phy@fed80000"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + dsi1 = "/dsi@fde30000"; + hdmi1 = "/hdmi@fdea0000"; + serial7 = "/serial@feba0000"; + i2c1 = "/i2c@fea90000"; + pwm7 = "/pwm@febd0030"; + pwm12 = "/pwm@febf0000"; + jpege3 = "/jpege-core@fdbac000"; + spi0 = "/spi@feb00000"; + hdptx1 = "/phy@fed70000"; + csi2dphy5 = "/csi2-dphy5"; + serial5 = "/serial@feb80000"; + csi2dcphy1 = "/csi2-dcphy1"; + pwm5 = "/pwm@febd0010"; + mmc1 = "/mmc@fe2c0000"; + pwm10 = "/pwm@febe0020"; + jpege1 = "/jpege-core@fdba4000"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + csi2dphy3 = "/csi2-dphy3"; + serial3 = "/serial@feb60000"; + edp0 = "/edp@fdec0000"; + pwm3 = "/pwm@fd8b0030"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + csi2dphy1 = "/csi2-dphy1"; + serial1 = "/serial@feb40000"; + pwm1 = "/pwm@fd8b0010"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + spi5 = "/spi@fe2b0000"; + gpio3 = "/pinctrl/gpio@fec40000"; + hdptxhdmi1 = "/hdmiphy@fed70000"; + rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; + i2c4 = "/i2c@feac0000"; + ethernet1 = "/ethernet@fe1c0000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + pwm15 = "/pwm@febf0030"; + hdmirx0 = "/hdmirx-controller@fdee0000"; + spi3 = "/spi@feb30000"; + usbdp1 = "/phy@fed90000"; + gpio1 = "/pinctrl/gpio@fec20000"; + serial8 = "/serial@febb0000"; + i2c2 = "/i2c@feaa0000"; + pwm8 = "/pwm@febe0000"; + pwm13 = "/pwm@febf0010"; + spi1 = "/spi@feb10000"; + dsi0 = "/dsi@fde20000"; + hdmi0 = "/hdmi@fde80000"; + serial6 = "/serial@feb90000"; + i2c0 = "/i2c@fd880000"; + pwm6 = "/pwm@febd0020"; + mmc2 = "/mmc@fe2d0000"; + pwm11 = "/pwm@febe0030"; + jpege2 = "/jpege-core@fdba8000"; + hdptx0 = "/phy@fed60000"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + dp1 = "/dp@fde60000"; + csi2dphy4 = "/csi2-dphy4"; + serial4 = "/serial@feb70000"; + edp1 = "/edp@fded0000"; + csi2dcphy0 = "/csi2-dcphy0"; + pwm4 = "/pwm@febd0000"; + mmc0 = "/mmc@fe2e0000"; + jpege0 = "/jpege-core@fdba0000"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2c7 = "/i2c@fec90000"; + csi2dphy2 = "/csi2-dphy2"; + serial2 = "/serial@feb50000"; + pwm2 = "/pwm@fd8b0020"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdcp0 = "/hdcp@fde40000"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + csi2dphy0 = "/csi2-dphy0"; + serial0 = "/serial@fd890000"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm0 = "/pwm@fd8b0000"; + spi4 = "/spi@fecb0000"; + gpio2 = "/pinctrl/gpio@fec30000"; + hdptxhdmi0 = "/hdmiphy@fed60000"; + serial9 = "/serial@febc0000"; + }; + + spdif-tx@fdde8000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x259>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc5 0x04>; + clocks = <0x02 0x25c 0x02 0x258>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfdde8000 0x00 0x1000>; + phandle = <0x47d>; + dmas = <0xf1 0x08>; + }; + + i2s@fe490000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x12d 0x12e>; + pinctrl-0 = <0x12a 0x12b>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x24>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb6 0x04>; + clocks = <0x02 0x27 0x02 0x22>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x12c>; + status = "disabled"; + reg = <0x00 0xfe490000 0x00 0x1000>; + phandle = <0x298>; + dmas = <0xf1 0x00 0xf1 0x01>; + rockchip,clk-trcm = <0x01>; + }; + + syscon@fd5d0000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d0000 0x00 0x4000>; + phandle = <0x18b>; + + usb2-phy@0 { + clock-output-names = "usb480m_phy0"; + clock-names = "phyclk"; + resets = <0x02 0xc0047 0x02 0x488>; + interrupts = <0x00 0x189 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + rockchip,usbctrl-grf = <0x74>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x00 0x10>; + phandle = <0x18d>; + reset-names = "phy\0apb"; + + otg-port { + #phy-cells = <0x00>; + rockchip,typec-vbus-det; + status = "okay"; + phandle = <0x66>; + }; + }; + }; + + i2c@feac0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14b>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb3 0x02 0xab>; + interrupts = <0x00 0x141 0x04>; + clocks = <0x02 0x90 0x02 0x88>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfeac0000 0x00 0x1000>; + phandle = <0x2a7>; + reset-names = "i2c\0apb"; + + pc9202@3c { + pinctrl-names = "default"; + pinctrl-0 = <0x14c>; + index = <0x01>; + compatible = "firefly,pc9202"; + status = "okay"; + wd-en-gpio = <0x7b 0x14 0x00>; + driver-names = "wdt_base"; + reg = <0x3c>; + }; + }; + + rkcif-mipi-lvds5-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x476>; + }; + + firmware { + + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + phandle = <0x222>; + }; + + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; + }; + + scmi { + shmem = <0x46>; + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; + + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; + }; + + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; + }; + }; + }; + + rkvenc-core@fdbd0000 { + power-domains = <0x60 0x10>; + iommus = <0xc2>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; + interrupts = <0x00 0x65 0x04>; + clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc0"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbd0000 0x00 0x6000>; + phandle = <0x272>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + iommu@fdcc7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x88 0x04>; + clocks = <0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp1_mmu"; + reg = <0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xd1>; + }; + + rkcif-mipi-lvds-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22b>; + }; + + syscon@fd5c8000 { + compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; + reg = <0x00 0xfd5c8000 0x00 0x4000>; + phandle = <0x18c>; + }; + + gpu@fb000000 { + power-domains = <0x60 0x0c>; + downdifferential = <0x0a>; + mali-supply = <0x62>; + clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; + assigned-clocks = <0x0e 0x05>; + assigned-clock-rates = <0xbebc200>; + interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; + clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; + upthreshold = <0x1e>; + compatible = "arm,mali-bifrost"; + dynamic-power-coefficient = <0xba6>; + status = "okay"; + interrupt-names = "GPU\0MMU\0JOB"; + mem-supply = <0x62>; + reg = <0x00 0xfb000000 0x00 0x200000>; + phandle = <0x5f>; + operating-points-v2 = <0x61>; + #cooling-cells = <0x02>; + }; + + csi2-dphy4 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x213>; + }; + + mipi4-csi2-hw@fdd50000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x328>; + interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; + clocks = <0x02 0x1d3>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd50000 0x00 0x10000>; + phandle = <0x4b>; + reset-names = "srst_csihost_p"; + }; + + qos@fdf82000 { + compatible = "syscon"; + reg = <0x00 0xfdf82000 0x00 0x20>; + phandle = <0x9d>; + }; + + rkcif-mipi-lvds2-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x55>; + phandle = <0x235>; + }; + + rkisp1-vir0 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23f>; + }; + + qos@fdf41100 { + compatible = "syscon"; + reg = <0x00 0xfdf41100 0x00 0x20>; + phandle = <0xa7>; + }; + + test-power { + status = "okay"; + }; + + usb-5v { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0xfe 0x03 0x00>; + pinctrl-0 = <0x1ef>; + regulator-always-on; + enable-active-high; + regulator-name = "usb_5v"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b1>; + }; + + phy@feda0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; + clocks = <0x02 0x108 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x190>; + reg = <0x00 0xfeda0000 0x00 0x10000>; + phandle = <0x2f>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + mod-sleep-regulator { + pinctrl-names = "default"; + regulator-boot-on; + gpio = <0x7b 0x15 0x00>; + pinctrl-0 = <0x1ee>; + regulator-always-on; + enable-active-high; + regulator-name = "mod_sleep"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4ae>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + qos@fdf66c00 { + compatible = "syscon"; + reg = <0x00 0xfdf66c00 0x00 0x20>; + phandle = <0x99>; + }; + + crypto@fe370000 { + clock-names = "aclk\0hclk\0sclk\0pka"; + resets = <0x11a 0x0f>; + interrupts = <0x00 0xd1 0x04>; + clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; + compatible = "rockchip,rk3588-crypto"; + status = "disabled"; + reg = <0x00 0xfe370000 0x00 0x2000>; + phandle = <0x296>; + reset-names = "crypto-rst"; + }; + + i2s@fddf4000 { + power-domains = <0x60 0x1a>; + rockchip,always-on; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x249>; + assigned-clock-parents = <0x02 0x07>; + resets = <0x02 0x3ef>; + interrupts = <0x00 0xba 0x04>; + clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + rockchip,playback-only; + status = "okay"; + reg = <0x00 0xfddf4000 0x00 0x1000>; + phandle = <0x1e0>; + dmas = <0xf2 0x04>; + reset-names = "tx-m"; + rockchip,hdmi-path; + }; + + mipi0-csi2-hw@fdd10000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x324>; + interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; + clocks = <0x02 0x1cf>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd10000 0x00 0x10000>; + phandle = <0x47>; + reset-names = "srst_csihost_p"; + }; + + mipi4-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x228>; + }; + + jpege-ccu { + compatible = "rockchip,vpu-jpege-ccu"; + status = "okay"; + phandle = <0xbd>; + }; + + dsi@fde30000 { + power-domains = <0x60 0x18>; + #address-cells = <0x01>; + phy-names = "dcphy"; + clock-names = "pclk\0sys_clk"; + resets = <0x02 0x355>; + interrupts = <0x00 0xa8 0x04>; + clocks = <0x02 0x279 0x02 0x27b>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dsi2"; + status = "disabled"; + rockchip,grf = <0xd7>; + phys = <0x30>; + reg = <0x00 0xfde30000 0x00 0x10000>; + phandle = <0x283>; + reset-names = "apb"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x284>; + + endpoint@1 { + remote-endpoint = <0x3a>; + status = "disabled"; + reg = <0x01>; + phandle = <0xef>; + }; + + endpoint@0 { + remote-endpoint = <0xf4>; + status = "disabled"; + reg = <0x00>; + phandle = <0xea>; + }; + }; + }; + }; + + iommu@fcb00000 { + interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; + #iommu-cells = <0x01>; + compatible = "arm,smmu-v3"; + status = "disabled"; + interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; + reg = <0x00 0xfcb00000 0x00 0x200000>; + phandle = <0x257>; + }; + + rkcif-mipi-lvds3 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x57>; + }; + + vcc-hub-regulator { + regulator-boot-on; + gpio = <0x182 0x01 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4af>; + }; + + syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf\0syscon"; + reg = <0x00 0xfd5ac000 0x00 0x4000>; + phandle = <0x74>; + }; + + qos@fdf40200 { + compatible = "syscon"; + reg = <0x00 0xfdf40200 0x00 0x20>; + phandle = <0xa9>; + }; + + rkisp@fdcb0000 { + power-domains = <0x60 0x1b>; + iommus = <0xd0>; + clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; + interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; + compatible = "rockchip,rk3588-rkisp"; + status = "okay"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x7f00>; + phandle = <0x58>; + }; + + serial@feba0000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x166>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x152 0x04>; + clocks = <0x02 0xcf 0x02 0xb1>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeba0000 0x00 0x100>; + phandle = <0x2cf>; + dmas = <0xf2 0x07 0xf2 0x08>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds1-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x232>; + }; + + chosen { + linux,initrd-end = <0x00 0xaac72ae>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyS2,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-start = <0x00 0xa200000>; + phandle = <0x48d>; + }; + + hdmi@fde80000 { + power-domains = <0x60 0x1a>; + reg-io-width = <0x04>; + pinctrl-names = "default"; + phy-names = "hdmi"; + pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; + clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; + resets = <0x02 0x3d0 0x02 0x49c>; + interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; + clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-dw-hdmi"; + status = "okay"; + rockchip,grf = <0xc8>; + phys = <0xfd>; + enable-gpios = <0xfe 0x08 0x00>; + reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; + phandle = <0x1d4>; + reset-names = "ref\0hdp"; + rockchip,vo1_grf = <0xd8>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + phandle = <0x288>; + + endpoint@1 { + remote-endpoint = <0xff>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe2>; + }; + + endpoint@2 { + remote-endpoint = <0x100>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe8>; + }; + + endpoint@0 { + remote-endpoint = <0x3c>; + status = "okay"; + reg = <0x00>; + phandle = <0xdc>; + }; + }; + }; + }; + + cluster2-opp-table { + rockchip,pvtm-offset = <0x18>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x27 0x28 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,pvtm-low-len-sel = <0x03>; + rockchip,high-temp-max-freq = <0x21b100>; + opp-shared; + rockchip,reboot-freq = <0x1b7740>; + rockchip,pvtm-freq = <0x188940>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x29>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; + phandle = <0x1a>; + rockchip,idle-threshold-freq = <0x21b100>; + rockchip,pvtm-temp-prop = <0x10e 0x10e>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-j-m-2016000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + }; + + opp-1200000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2256000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8677d400>; + opp-supported-hw = <0xf9 0x13>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2400000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8f0d1800>; + opp-supported-hw = <0xf9 0x80>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2208000000 { + opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; + opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; + opp-hz = <0x00 0x839b6800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; + opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; + opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1800000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + }; + + opp-2352000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x8c30ac00>; + opp-supported-hw = <0xf9 0x48>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + clock-latency-ns = <0x9c40>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-2016000000 { + opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; + opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; + opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; + opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; + opp-hz = <0x00 0x7829b800>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; + opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; + opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; + }; + + opp-1416000000 { + opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; + opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; + clock-latency-ns = <0x9c40>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + }; + + opp-2304000000 { + opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; + opp-hz = <0x00 0x89544000>; + opp-supported-hw = <0xf9 0x24>; + clock-latency-ns = <0x9c40>; + }; + }; + + rkcif-dvp { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-dvp"; + status = "disabled"; + phandle = <0x51>; + }; + + rkisp0-vir2 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "okay"; + phandle = <0x23d>; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x59>; + reg = <0x00>; + phandle = <0x56>; + }; + }; + }; + + i2c@fea90000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x148>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb0 0x02 0xa8>; + interrupts = <0x00 0x13e 0x04>; + clocks = <0x02 0x8d 0x02 0x85>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "okay"; + reg = <0x00 0xfea90000 0x00 0x1000>; + phandle = <0x2a4>; + reset-names = "i2c\0apb"; + + rk8602@42 { + regulator-max-microvolt = <0xe7ef0>; + regulator-boot-on; + rockchip,suspend-voltage-selector = <0x01>; + regulator-always-on; + regulator-min-microvolt = <0x86470>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <0x8fc>; + compatible = "rockchip,rk8602"; + reg = <0x42>; + phandle = <0xb3>; + vin-supply = <0x78>; + regulator-compatible = "rk860x-reg"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + syscon@fd58a000 { + compatible = "rockchip,rk3588-pmu1-grf\0syscon"; + reg = <0x00 0xfd58a000 0x00 0x2000>; + phandle = <0x104>; + }; + + syscon@fd5ec000 { + compatible = "rockchip,mipi-dcphy-grf\0syscon"; + reg = <0x00 0xfd5ec000 0x00 0x4000>; + phandle = <0x191>; + }; + + venc-opp-table { + nvmem-cells = <0xc6 0xc7>; + rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,grf = <0xc8>; + nvmem-cell-names = "leakage\0opp-info"; + phandle = <0xc4>; + + opp-800000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; + opp-hz = <0x00 0x2faf0800>; + opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; + }; + }; + + iommu@fdc38700 { + power-domains = <0x60 0x0e>; + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x60 0x04>; + clocks = <0x02 0x190 0x02 0x18f>; + rockchip,enable-cmd-retry; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "okay"; + interrupt-names = "irq_rkvdec0_mmu"; + reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; + phandle = <0xc9>; + rockchip,master-handle-irq; + }; + + qos@fdf35200 { + compatible = "syscon"; + reg = <0x00 0xfdf35200 0x00 0x20>; + phandle = <0x88>; + }; + + qos@fdf71000 { + compatible = "syscon"; + reg = <0x00 0xfdf71000 0x00 0x20>; + phandle = <0x86>; + }; + + syscon@fd598000 { + compatible = "rockchip,rk3588-dsu-grf\0syscon"; + reg = <0x00 0xfd598000 0x00 0x100>; + phandle = <0x23>; + }; + + csi2-dphy2 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "disabled"; + phys = <0x2f 0x30>; + phandle = <0x211>; + }; + + syscon@fd5b4000 { + compatible = "rockchip,mipi-dphy-grf\0syscon"; + reg = <0x00 0xfd5b4000 0x00 0x1000>; + phandle = <0x192>; + }; + + iommu@fdb70f00 { + power-domains = <0x60 0x1e>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x73 0x04>; + clocks = <0x02 0x18a 0x02 0x189>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "rga3_1_mmu"; + reg = <0x00 0xfdb70f00 0x00 0x100>; + phandle = <0xba>; + }; + + vcc5v0-usb { + regulator-max-microvolt = <0x4c4b40>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc5v0_usb"; + compatible = "regulator-fixed"; + phandle = <0x1dd>; + vin-supply = <0x1cd>; + }; + + fiq-debugger { + pinctrl-names = "default"; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "okay"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; + + phy@fed70000 { + clock-names = "ref\0apb"; + resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; + clocks = <0x02 0x2b5 0x02 0x268>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy"; + status = "disabled"; + rockchip,grf = <0x1c7>; + reg = <0x00 0xfed70000 0x00 0x2000>; + phandle = <0x1af>; + reset-names = "apb\0init\0cmn\0lane"; + }; + + pvtm@fda60000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-litcore-pvtm"; + reg = <0x00 0xfda60000 0x00 0x100>; + + pvtm@2 { + clock-names = "clk\0pclk"; + clocks = <0x02 0x2ca 0x02 0x1b>; + reg = <0x02>; + }; + }; + + rkispp@fdcd8000 { + power-domains = <0x60 0x1d>; + iommus = <0xd3>; + clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; + assigned-clocks = <0x02 0x1d9>; + assigned-clock-rates = <0x5f5e100>; + interrupts = <0x00 0x8d 0x04>; + clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; + compatible = "rockchip,rk3588-rkispp"; + status = "disabled"; + interrupt-names = "fec_irq"; + reg = <0x00 0xfdcd8000 0x00 0xf00>; + phandle = <0x5c>; + }; + + qos@fdf66000 { + compatible = "syscon"; + reg = <0x00 0xfdf66000 0x00 0x20>; + phandle = <0x93>; + }; + + syscon@fd592000 { + compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; + reg = <0x00 0xfd592000 0x00 0x100>; + phandle = <0x29>; + }; + + rkcif-mipi-lvds1 { + iommus = <0x50>; + rockchip,hw = <0x4f>; + compatible = "rockchip,rkcif-mipi-lvds"; + status = "disabled"; + phandle = <0x53>; + }; + + av1d@fdc70000 { + power-domains = <0x60 0x17>; + iommus = <0xce>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + reg-names = "vcd\0cache\0afbc"; + assigned-clocks = <0x02 0x49 0x02 0x4b>; + rockchip,normal-rates = <0x17d78400 0x17d78400>; + assigned-clock-rates = <0x17d78400 0x17d78400>; + resets = <0x02 0x442 0x02 0x445>; + interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; + clocks = <0x02 0x49 0x02 0x4b>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x0b>; + compatible = "rockchip,av1-decoder"; + status = "okay"; + interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; + reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; + phandle = <0x276>; + reset-names = "video_a\0video_h"; + }; + + qos@fdf40500 { + compatible = "syscon"; + reg = <0x00 0xfdf40500 0x00 0x20>; + phandle = <0xa3>; + }; + + vcc-hub-reset-regulator { + regulator-boot-on; + gpio = <0x182 0x04 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a0>; + }; + + qos@fdf72200 { + compatible = "syscon"; + reg = <0x00 0xfdf72200 0x00 0x20>; + phandle = <0x83>; + }; + + serial@feb70000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x163>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14f 0x04>; + clocks = <0x02 0xc3 0x02 0xae>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "disabled"; + reg = <0x00 0xfeb70000 0x00 0x100>; + phandle = <0x2cc>; + dmas = <0xf1 0x09 0xf1 0x0a>; + reg-shift = <0x02>; + }; + + rkcif-mipi-lvds2-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "okay"; + rockchip,cif = <0x55>; + phandle = <0x233>; + + port { + + endpoint { + remote-endpoint = <0x56>; + phandle = <0x59>; + }; + }; + }; + + i2c@feca0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x186>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb7 0x02 0xaf>; + interrupts = <0x00 0x145 0x04>; + clocks = <0x02 0x94 0x02 0x8c>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfeca0000 0x00 0x1000>; + phandle = <0x2e5>; + reset-names = "i2c\0apb"; + }; + + vcc-sdcard-pwr-en-regulator { + regulator-boot-on; + gpio = <0xfe 0x07 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_sdcard_pwr_en"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4a5>; + }; + + rkcif-mipi-lvds1-sditf-vir1 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x53>; + phandle = <0x230>; + }; + + qos@fdf63000 { + compatible = "syscon"; + reg = <0x00 0xfdf63000 0x00 0x20>; + phandle = <0x8c>; + }; + + phy@fee00000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + assigned-clocks = <0x02 0x2bd>; + assigned-clock-rates = <0x5f5e100>; + resets = <0x02 0x20005 0x02 0x4d6>; + clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + reset-names = "combphy-apb\0combphy"; + }; + + can@fea50000 { + pinctrl-names = "default"; + pinctrl-0 = <0x145>; + clock-names = "baudclk\0apb_pclk"; + resets = <0x02 0xb9 0x02 0xb8>; + interrupts = <0x00 0x155 0x04>; + clocks = <0x02 0x70 0x02 0x6f>; + compatible = "rockchip,can-2.0"; + status = "disabled"; + tx-fifo-depth = <0x01>; + rx-fifo-depth = <0x06>; + reg = <0x00 0xfea50000 0x00 0x1000>; + phandle = <0x2a0>; + reset-names = "can\0can-apb"; + }; + + pdm@fe4b0000 { + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x139 0x13a>; + pinctrl-0 = <0x134 0x135 0x136 0x137>; + clock-names = "pdm_clk\0pdm_hclk"; + clocks = <0x02 0x29f 0x02 0x29e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-pdm"; + pinctrl-1 = <0x138>; + status = "disabled"; + reg = <0x00 0xfe4b0000 0x00 0x1000>; + phandle = <0x29a>; + dmas = <0x7c 0x04>; + }; + + rkisp-unite-mmu@fdcb7f00 { + power-domains = <0x60 0x1c>; + clock-names = "aclk0\0iface0\0aclk1\0iface1"; + interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + rockchip,disable-mmu-reset; + status = "disabled"; + interrupt-names = "isp0_mmu\0isp1_mmu"; + reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; + phandle = <0xcf>; + }; + + syscon@fd5a6000 { + clocks = <0x72>; + compatible = "rockchip,rk3588-vo-grf\0syscon"; + reg = <0x00 0xfd5a6000 0x00 0x2000>; + phandle = <0xf5>; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x00>; + enable-method = "psci"; + clocks = <0x0e 0x00>; + cpu-idle-states = <0x10>; + operating-points-v2 = <0x0f>; + capacity-dmips-mhz = <0x212>; + + cpu-supply = <0x12>; + mem-supply = <0x12>; + dynamic-power-coefficient = <0x64>; + + i-cache-line-size = <0x40>; + i-cache-size = <0x8000>; + i-cache-sets = <0x80>; + + d-cache-line-size = <0x40>; + d-cache-size = <0x8000>; + d-cache-sets = <0x80>; + + next-level-cache = <0x11>; + #cooling-cells = <0x02>; + phandle = <0x06>; + }; + + l2-cache-l0 { + compatible = "cache"; + cache-size = <0x20000>; + cache-sets = <0x200>; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; + + l3-cache { + compatible = "cache"; + cache-size = <0x300000>; + cache-sets = <0x1000>; + cache-line-size = <0x40>; + phandle = <0x1e>; + }; + + idle-states { + entry-method = "psci"; + + cpu-sleep { + compatible = "arm,idle-state"; + entry-latency-us = <0x64>; + exit-latency-us = <0x78>; + min-residency-us = <0x3e8>; + local-timer-stop; + arm,psci-suspend-param = <0x10000>; + phandle = <0x10>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <0x06>; + }; + }; + }; + }; + + vcc-hub3-reset-regulator { + gpio = <0x182 0x06 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_hub3_reset"; + compatible = "regulator-fixed"; + status = "disabled"; + phandle = <0x4a1>; + }; + + rkispp1-vir0 { + rockchip,hw = <0x5c>; + compatible = "rockchip,rk3588-rkispp-vir"; + status = "disabled"; + phandle = <0x244>; + }; + + saradc@fec10000 { + vref-supply = <0x177>; + clock-names = "saradc\0apb_pclk"; + resets = <0x02 0xbe>; + interrupts = <0x00 0x18e 0x04>; + clocks = <0x02 0x9d 0x02 0x9c>; + #io-channel-cells = <0x01>; + compatible = "rockchip,rk3588-saradc"; + status = "okay"; + reg = <0x00 0xfec10000 0x00 0x10000>; + phandle = <0x1d9>; + reset-names = "saradc-apb"; + }; + + rkisp0-vir0 { + rockchip,hw = <0x58>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x23b>; + }; + + __symbols__ { + i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; + i2c3 = "/i2c@feab0000"; + scmi_shmem = "/sram@10f000/sram@0"; + rkispp0_vir0 = "/rkispp0-vir0"; + qos_jpeg_enc0 = "/qos@fdf66400"; + i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; + dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; + pmic_pins = "/pinctrl/pmic/pmic-pins"; + usb_host1_ohci = "/usb@fc8c0000"; + pwm9 = "/pwm@febe0010"; + i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; + leds_gpio = "/pinctrl/leds/leds-gpio"; + i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; + qos_usb3_1 = "/qos@fdf3e000"; + hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; + i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; + gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; + pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; + sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; + spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; + hwlock = "/hwspinlock@fe5a0000"; + pcie3x2 = "/pcie@fe160000"; + i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; + mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; + mclkin_i2s0 = "/clocks/mclkin-i2s0"; + edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; + rkvenc0_mmu = "/iommu@fdbdf000"; + pwm14 = "/pwm@febf0020"; + rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; + mipi2_csi2 = "/mipi2-csi2"; + can2m1_pins = "/pinctrl/can2/can2m1-pins"; + pcie2x1l1 = "/pcie@fe180000"; + hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; + qos_rkvenc0_m2wo = "/qos@fdf60400"; + pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; + optee = "/firmware/optee"; + l2_cache_b2 = "/cpus/l2-cache-b2"; + pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; + vdpu = "/vdpu@fdb50400"; + i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; + usbdp_phy0_u3 = "/phy@fed80000/u3-port"; + thermal_zones = "/thermal-zones"; + hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; + hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; + uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; + spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; + pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; + spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; + venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; + qos_iep = "/qos@fdf66000"; + pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; + spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; + uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; + vp1 = "/vop@fdd90000/ports/port@1"; + bigcore1_grf = "/syscon@fd592000"; + uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; + uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; + fspim1_pins = "/pinctrl/fspi/fspim1-pins"; + cpu_l1 = "/cpus/cpu@100"; + uart8 = "/serial@febb0000"; + rkisp1_vir3 = "/rkisp1-vir3"; + qos_vop_m1 = "/qos@fdf82200"; + pcie_clk2 = "/pcie-clk2"; + cluster2_opp_table = "/cluster2-opp-table"; + usb_grf = "/syscon@fd5ac000"; + pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; + jpege0_mmu = "/iommu@fdba0800"; + spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; + u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; + power_led = "/leds/power"; + aclk_usb = "/clocks/aclk_usb@fd7c08a8"; + csi2_dphy1 = "/csi2-dphy1"; + spi2 = "/spi@feb20000"; + uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; + spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; + pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; + vo1_grf = "/syscon@fd5a8000"; + pcie_essd = "/pcie-essd"; + i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; + gpio0 = "/pinctrl/gpio@fd8a0000"; + saradc = "/saradc@fec10000"; + i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; + i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; + csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; + emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; + mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; + xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; + rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; + dsi1 = "/dsi@fde30000"; + venc_opp_table = "/venc-opp-table"; + qos_isp0_mwo = "/qos@fdf40500"; + pmu_pins = "/pinctrl/pmu/pmu-pins"; + gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; + spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; + mipi_dcphy0 = "/mipi-dcphy-dummy"; + minidump_mem = "/reserved-memory/minidump-mem@c000000"; + avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; + pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; + route_edp1 = "/display-subsystem/route/route-edp1"; + hdmi1 = "/hdmi@fdea0000"; + crypto = "/crypto@fe370000"; + hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; + dfi = "/dfi@fe060000"; + can0m0_pins = "/pinctrl/can0/can0m0-pins"; + pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; + pinctrl = "/pinctrl"; + pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; + dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; + i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; + vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; + pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; + pcie30_avdd1v8 = "/pcie30-avdd1v8"; + usb2phy3_grf = "/syscon@fd5dc000"; + u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; + hym8563_int = "/pinctrl/hym8563/hym8563-int"; + mailbox1 = "/mailbox@fec70000"; + pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; + combphy1_ps = "/phy@fee10000"; + hdptxphy0_grf = "/syscon@fd5e0000"; + sdei = "/firmware/sdei"; + vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; + uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; + uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; + uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; + dp0_out = "/dp@fde50000/ports/port@1/endpoint"; + uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; + route_rgb = "/display-subsystem/route/route-rgb"; + csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; + i2c1 = "/i2c@fea90000"; + pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; + cpu_code = "/otp@fecc0000/cpu-code@2"; + pwm7 = "/pwm@febd0030"; + mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; + gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; + hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; + pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; + gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; + i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; + vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; + i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; + i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; + rockchip_system_monitor = "/rockchip-system-monitor"; + pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; + pwm12 = "/pwm@febf0000"; + emmc_cmd = "/pinctrl/emmc/emmc-cmd"; + i2s1_8ch = "/i2s@fe480000"; + pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; + uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; + vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; + pcfg_pull_none = "/pinctrl/pcfg-pull-none"; + i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; + vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; + hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; + vcc_4g = "/vcc-4g-regulator"; + firefly_leds = "/leds"; + jpege3 = "/jpege-core@fdbac000"; + l2_cache_b0 = "/cpus/l2-cache-b0"; + pmu1_grf = "/syscon@fd58a000"; + aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; + can1m0_pins = "/pinctrl/can1/can1m0-pins"; + spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; + pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; + mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; + i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; + clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; + dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; + pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; + usbc0 = "/i2c@fec80000/fusb302@22"; + eth1_pins = "/pinctrl/eth1/eth1-pins"; + pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; + csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; + pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; + dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; + hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; + usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; + uart6 = "/serial@feb90000"; + rkisp1_vir1 = "/rkisp1-vir1"; + sdhci = "/mmc@fe2e0000"; + uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; + target = "/thermal-zones/soc-thermal/trips/trip-point-1"; + rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; + pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; + uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; + uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; + uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; + rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; + rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; + u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; + i2s5_8ch = "/i2s@fddf0000"; + i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; + gpu = "/gpu@fb000000"; + spi0 = "/spi@feb00000"; + iep = "/iep@fdbb0000"; + pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; + spdif_tx5 = "/spdif-tx@fddb8000"; + hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; + drm_logo = "/reserved-memory/drm-logo@00000000"; + i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; + rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; + gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; + usb_host0_ohci = "/usb@fc840000"; + mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; + i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; + i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; + vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; + cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; + i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; + pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; + mipidcphy0_grf = "/syscon@fd5e8000"; + vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; + pcie30phy = "/phy@fee80000"; + dmc = "/dmc"; + i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; + mipidcphy1 = "/phy@fedb0000"; + dp1_sound = "/dp1-sound"; + hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; + scmi = "/firmware/scmi"; + pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; + gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; + pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; + i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; + l3_cache = "/cpus/l3-cache"; + i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; + pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; + litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; + mipi1_csi2 = "/mipi1-csi2"; + can2m0_pins = "/pinctrl/can2/can2m0-pins"; + pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; + usbdp_phy0 = "/phy@fed80000"; + pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; + pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; + vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; + i2s9_8ch = "/i2s@fddfc000"; + pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; + vcc_hub3_reset = "/vcc-hub3-reset-regulator"; + dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; + otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; + pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; + spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; + pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; + XC7160 = "/i2c@fec80000/XC7160b@1b"; + rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; + uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; + uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; + hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; + hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; + uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; + i2s2_2ch = "/i2s@fe490000"; + pwm5 = "/pwm@febd0010"; + uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; + uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; + fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; + fspim0_pins = "/pinctrl/fspi/fspim0-pins"; + rkisp0_vir3 = "/rkisp0-vir3"; + l2_cache_l3 = "/cpus/l2-cache-l3"; + rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; + hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; + hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; + vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; + qos_isp0_mro = "/qos@fdf40400"; + spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; + vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; + pwm10 = "/pwm@febe0020"; + i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; + rktimer = "/timer@feae0000"; + cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; + i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; + hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; + pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; + jpege1 = "/jpege-core@fdba4000"; + pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; + i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; + rkcif_dvp_sditf = "/rkcif-dvp-sditf"; + rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; + vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; + vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; + its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; + cpu_b3 = "/cpus/cpu@700"; + vcc_hub_reset = "/vcc-hub-reset-regulator"; + spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; + vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; + pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; + pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; + vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; + pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; + dmc_opp_table = "/dmc-opp-table"; + pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; + uart4 = "/serial@feb70000"; + pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; + spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; + pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; + mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; + mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; + rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; + pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; + dmac2 = "/dma-controller@fed10000"; + pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; + qos_gpu_m2 = "/qos@fdf35400"; + i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; + cluster0_opp_table = "/cluster0-opp-table"; + spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; + otp_id = "/otp@fecc0000/id@7"; + uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; + uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; + qos_rga3_0 = "/qos@fdf67000"; + usbdp_phy0_dp = "/phy@fed80000/dp-port"; + uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; + uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; + npu_pins = "/pinctrl/npu/npu-pins"; + pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; + spdif_tx3 = "/spdif-tx@fdde0000"; + rkispp0 = "/rkispp@fdcd0000"; + xin32k = "/clocks/xin32k"; + vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; + qos_usb2host_1 = "/qos@fdf3e600"; + bt_sco = "/bt-sco"; + pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; + adc_keys = "/adc-keys"; + rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; + i2c8 = "/i2c@feca0000"; + dp0 = "/dp@fde50000"; + mipi_te1 = "/pinctrl/mipi/mipi-te1"; + i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; + i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; + pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; + syssram = "/sram@ff001000"; + pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; + qos_hdmirx = "/qos@fdf81200"; + i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; + pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; + vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; + hw_decompress = "/decompress@fea80000"; + pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; + mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; + gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; + uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; + vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; + mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; + rkvenc1_mmu = "/iommu@fdbef000"; + edp0 = "/edp@fdec0000"; + rkvenc_ccu = "/rkvenc-ccu"; + rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; + power = "/power-management@fd8d8000/power-controller"; + vad = "/vad@fe4d0000"; + spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; + pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; + spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; + pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; + vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; + aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; + pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; + i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; + pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; + eth0_pins = "/pinctrl/eth0/eth0-pins"; + rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; + pwm3 = "/pwm@fd8b0030"; + pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; + rkcif_mmu = "/iommu@fdce0800"; + usbc0_int = "/pinctrl/usb-typec/usbc0-int"; + gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; + sata2 = "/sata@fe230000"; + uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; + dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; + hdmiin_sound = "/hdmiin-sound"; + rkisp0_vir1 = "/rkisp0-vir1"; + uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; + spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; + l2_cache_l1 = "/cpus/l2-cache-l1"; + pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; + uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; + pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; + vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; + qos_hdcp1 = "/qos@fdf81000"; + scmi_reset = "/firmware/scmi/protocol@16"; + vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; + uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; + uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; + usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; + hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; + edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; + rkisp0 = "/rkisp@fdcb0000"; + dsu_grf = "/syscon@fd598000"; + vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; + gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; + uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; + csi2_dcphy0 = "/csi2-dcphy0"; + usb2phy0_grf = "/syscon@fd5d0000"; + scmi_clk = "/firmware/scmi/protocol@14"; + emmc_clk = "/pinctrl/emmc/emmc-clk"; + jpege1_mmu = "/iommu@fdba4800"; + qos_rkvenc1_m1ro = "/qos@fdf61200"; + spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; + vcc5v0_host = "/vcc5v0-host"; + cru = "/clock-controller@fd7c0000"; + hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; + pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; + rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; + cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; + i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; + aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; + cpu_b1 = "/cpus/cpu@500"; + i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; + rknpu_mmu = "/iommu@fdab9000"; + rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; + i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; + i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; + pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; + qos_isp1_mwo = "/qos@fdf41000"; + mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + vcc5v0_usbdcin = "/vcc5v0-usbdcin"; + spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; + reboot_mode = "/syscon@fd588000/reboot-mode"; + rga3_0_mmu = "/iommu@fdb60f00"; + uart2 = "/serial@feb50000"; + imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; + rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; + pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; + fec0_mmu = "/iommu@fdcd0f00"; + mipi0_csi2 = "/mipi0-csi2"; + spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; + pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; + pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; + tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; + qos_rkvdec1 = "/qos@fdf63000"; + dmac0 = "/dma-controller@fea10000"; + vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; + pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; + qos_gpu_m0 = "/qos@fdf35000"; + pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; + i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; + qos_av1 = "/qos@fdf64000"; + pcfg_output_low = "/pinctrl/pcfg-output-low"; + spdif_tx1 = "/spdif-tx@fe4f0000"; + hdptxphy1_grf = "/syscon@fd5e4000"; + spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; + dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; + jpegd_mmu = "/iommu@fdb90480"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; + vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; + dp1_out = "/dp@fde60000/ports/port@1/endpoint"; + otp = "/otp@fecc0000"; + uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; + uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; + hdcp1 = "/hdcp@fde70000"; + rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; + i2c6 = "/i2c@fec80000"; + qos_jpeg_enc3 = "/qos@fdf66a00"; + i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; + refclk_pins = "/pinctrl/refclk/refclk-pins"; + pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; + hdptxphy_hdmi1 = "/hdmiphy@fed70000"; + mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; + pdm1 = "/pdm@fe4c0000"; + vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; + pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; + pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; + qos_vicap_m0 = "/qos@fdf40600"; + gic = "/interrupt-controller@fe600000"; + vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; + uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; + i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; + mclkin_i2s3 = "/clocks/mclkin-i2s3"; + hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; + hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; + i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; + spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; + sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; + i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; + rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; + hdptxphy1 = "/phy@fed70000"; + route_dp1 = "/display-subsystem/route/route-dp1"; + hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; + i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; + pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; + pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; + usbdrd3_1 = "/usbdrd3_1"; + spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; + pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; + rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; + pwm1 = "/pwm@fd8b0010"; + pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; + threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; + pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; + sata0 = "/sata@fe210000"; + dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; + can2 = "/can@fea70000"; + pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; + usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; + rkvenc0 = "/rkvenc-core@fdbd0000"; + bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; + sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; + spll = "/clocks/spll"; + uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; + sata_pins = "/pinctrl/sata/sata-pins"; + pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; + qos_npu1 = "/qos@fdf70000"; + uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; + uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; + pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; + rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; + pipe_phy0_grf = "/syscon@fd5bc000"; + es8388 = "/i2c@fec80000/es8388@11"; + spdif_rx2 = "/spdif-rx@fde18000"; + usb_host1_ehci = "/usb@fc880000"; + xin24m = "/clocks/xin24m"; + pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; + mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; + acdcdig_dsm = "/codec-digital@fe500000"; + vop_grf = "/syscon@fd5a4000"; + rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; + i2s6_8ch = "/i2s@fddf4000"; + i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; + pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; + pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; + pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; + pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; + mipidphy0_grf = "/syscon@fd5b4000"; + route_dsi1 = "/display-subsystem/route/route-dsi1"; + route_hdmi0 = "/display-subsystem/route/route-hdmi0"; + rkvdec_ccu = "/rkvdec-ccu@fdc30000"; + csi2_dphy4 = "/csi2-dphy4"; + gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; + qos_sdio = "/qos@fdf39000"; + tsadc = "/tsadc@fec00000"; + pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; + hclk_usb = "/clocks/hclk_usb@fd7c08a8"; + avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; + edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; + mdio1 = "/ethernet@fe1c0000/mdio"; + gpio3 = "/pinctrl/gpio@fec40000"; + gpu_opp_table = "/gpu-opp-table"; + cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; + pcfg_output_high = "/pinctrl/pcfg-output-high"; + i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; + vdpu_mmu = "/iommu@fdb50800"; + i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; + combphy0_ps = "/phy@fee00000"; + rgb = "/syscon@fd58c000/rgb"; + hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; + i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; + uart0 = "/serial@fd890000"; + mipidcphy1_grf = "/syscon@fd5ec000"; + pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; + vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; + gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; + uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; + pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; + pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; + pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; + i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; + qos_rga2_mwo = "/qos@fdf66e00"; + spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; + pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; + dsi1_in = "/dsi@fde30000/ports/port@0"; + vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; + pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; + spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; + pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; + bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; + dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; + i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; + mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; + u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; + vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; + qos_fisheye0 = "/qos@fdf40000"; + i2c4 = "/i2c@feac0000"; + sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; + uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; + qos_jpeg_enc1 = "/qos@fdf66600"; + i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; + i2s3_2ch = "/i2s@fe4a0000"; + uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; + cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; + pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; + fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; + vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; + hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; + uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; + qos_isp1_mro = "/qos@fdf41100"; + ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; + spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; + qos_rkvenc0_m1ro = "/qos@fdf60200"; + qos_jpeg_dec = "/qos@fdf66200"; + mclkin_i2s1 = "/clocks/mclkin-i2s1"; + edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; + pcie30_avdd0v75 = "/pcie30-avdd0v75"; + isp0_mmu = "/iommu@fdcb7f00"; + qos_npu0_mwr = "/qos@fdf72000"; + rkvdec0 = "/rkvdec-core@fdc38000"; + rkvdec0_mmu = "/iommu@fdc38700"; + rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; + pwm15 = "/pwm@febf0030"; + vop_mmu = "/iommu@fdd97e00"; + rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; + pcie2x1l2 = "/pcie@fe190000"; + i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; + package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; + iep_mmu = "/iommu@fdbb0800"; + l2_cache_b3 = "/cpus/l2-cache-b3"; + i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; + vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; + spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; + pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; + can0 = "/can@fea50000"; + spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; + pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; + pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; + arm_pmu = "/arm-pmu"; + vp2 = "/vop@fdd90000/ports/port@2"; + rk806single = "/spi@feb20000/rk806single@0"; + spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; + pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; + rng = "/rng@fe378000"; + cpu_l2 = "/cpus/cpu@200"; + uart9 = "/serial@febc0000"; + spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; + rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; + rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; + usbdpphy0_grf = "/syscon@fd5c8000"; + mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; + pcie_clk3 = "/pcie-clk3"; + mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; + vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; + rkcif = "/rkcif@fdce0000"; + gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; + wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; + vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; + spdif_rx0 = "/spdif-rx@fde08000"; + sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; + hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; + hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; + spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; + pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; + csi2_dphy2 = "/csi2-dphy2"; + spi3 = "/spi@feb30000"; + edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; + gpio1 = "/pinctrl/gpio@fec20000"; + tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; + usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; + i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; + spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; + rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; + i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; + hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; + spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; + mipi_dcphy1 = "/mipi-dcphy-dummy"; + vcc5v0_sys = "/vcc5v0-sys"; + aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; + usb_con = "/i2c@fec80000/fusb302@22/connector"; + hdmirx_ctrler = "/hdmirx-controller@fdee0000"; + i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; + pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; + pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; + spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; + wdt = "/watchdog@feaf0000"; + vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; + cspmu = "/cspmu@fd10c000"; + av1d_mmu = "/iommu@fdca0000"; + mailbox2 = "/mailbox@fece0000"; + mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; + pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; + rga3_core0 = "/rga@fdb60000"; + i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; + bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; + pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; + spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; + pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; + i2c2 = "/i2c@feaa0000"; + npu_grf = "/syscon@fd5a2000"; + i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; + mipi5_csi2 = "/mipi5-csi2"; + pwm8 = "/pwm@febe0000"; + log_leakage = "/otp@fecc0000/log-leakage@1a"; + cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; + vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; + rga2 = "/rga@fdb80000"; + emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; + qos_usb3_0 = "/qos@fdf3e200"; + sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; + uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; + pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; + hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; + cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; + mcum1_pins = "/pinctrl/mcu/mcum1-pins"; + pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; + edp1_out = "/edp@fded0000/ports/port@1/endpoint"; + hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; + usb_host0_ehci = "/usb@fc800000"; + edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; + gmac1 = "/ethernet@fe1c0000"; + i2s10_8ch = "/i2s@fde00000"; + hdmi1_in = "/hdmi@fdea0000/ports/port@0"; + usb2phy1_grf = "/syscon@fd5d4000"; + pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; + jpege2_mmu = "/iommu@fdba8800"; + pwm13 = "/pwm@febf0010"; + pcie2x1l0 = "/pcie@fe170000"; + hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; + hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; + l2_cache_b1 = "/cpus/l2-cache-b1"; + cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; + qos_rga2_mro = "/qos@fdf66c00"; + aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; + i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; + vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; + hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; + pca9555 = "/i2c@feab0000/gpio@21"; + qos_sdmmc = "/qos@fdf3d800"; + clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; + i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; + cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; + rknpu = "/npu@fdab0000"; + pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; + spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; + vp0 = "/vop@fdd90000/ports/port@0"; + rga3_1_mmu = "/iommu@fdb70f00"; + jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; + cpu_l0 = "/cpus/cpu@0"; + uart7 = "/serial@feba0000"; + rkisp1_vir2 = "/rkisp1-vir2"; + fec1_mmu = "/iommu@fdcd8f00"; + qos_vop_m0 = "/qos@fdf82000"; + pcie_clk1 = "/pcie-clk1"; + gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; + spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; + pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; + hdmi0_sound = "/hdmi0-sound"; + ioc = "/syscon@fd5f0000"; + spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; + avsd = "/avsd-plus@fdb51000"; + rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; + u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; + sfc = "/spi@fe2b0000"; + csi2_dphy0 = "/csi2-dphy0"; + spi1 = "/spi@feb10000"; + spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; + gpu_grf = "/syscon@fd5a0000"; + pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; + wireless_bluetooth = "/wireless-bluetooth"; + pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; + sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; + uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; + pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; + i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; + pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; + bt_sound = "/bt-sound"; + qos_rkvenc1_m0ro = "/qos@fdf61000"; + mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; + dsi0 = "/dsi@fde20000"; + pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; + uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; + ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; + route_edp0 = "/display-subsystem/route/route-edp0"; + hdmi0 = "/hdmi@fde80000"; + es8388_sound = "/es8388-sound"; + hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; + pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; + pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; + i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; + vop_out = "/vop@fdd90000/ports"; + vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; + hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; + pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; + hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; + hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; + cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; + clk32k_in = "/pinctrl/clk32k/clk32k-in"; + usbdp_phy1 = "/phy@fed90000"; + mailbox0 = "/mailbox@fec60000"; + i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; + pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; + sdmmc = "/mmc@fe2c0000"; + hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; + hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; + vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; + vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; + vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; + gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; + i2c0 = "/i2c@fd880000"; + pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; + pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; + soc_thermal = "/thermal-zones/soc-thermal"; + cluster1_opp_table = "/cluster1-opp-table"; + i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; + spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; + npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; + pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; + pwm6 = "/pwm@febd0020"; + spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; + hym8563 = "/i2c@fd880000/hym8563@51"; + i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; + rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; + hp_det = "/pinctrl/headphone/hp-det"; + hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; + vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; + qos_mcu_npu = "/qos@fdf72400"; + auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; + i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; + pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; + pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; + pipe_phy1_grf = "/syscon@fd5c0000"; + pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; + pwm11 = "/pwm@febe0030"; + rkisp_unite = "/rkisp-unite@fdcb0000"; + rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; + vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; + hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; + rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; + i2s7_8ch = "/i2s@fddf8000"; + uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; + mipidphy1_grf = "/syscon@fd5b5000"; + usbhost3_0 = "/usbhost3_0"; + jpege2 = "/jpege-core@fdba8000"; + pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; + pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; + vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; + mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; + av1d = "/av1d@fdc70000"; + uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; + sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; + rockchip_suspend = "/rockchip-suspend"; + rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; + pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; + npu_thermal = "/thermal-zones/npu-thermal"; + i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; + pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; + cpu_pins = "/pinctrl/cpu/cpu-pins"; + dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; + bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; + uart5 = "/serial@feb80000"; + dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; + rkisp1_vir0 = "/rkisp1-vir0"; + fiq_debugger = "/fiq-debugger"; + usbdp_phy1_u3 = "/phy@fed90000/u3-port"; + spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; + sdio = "/mmc@fe2d0000"; + rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; + spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; + qos_gpu_m3 = "/qos@fdf35600"; + pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; + pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; + user_led = "/leds/user"; + rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; + i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; + uart8_xfer = "/pinctrl/uart8/uart8-xfer"; + u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; + pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; + vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; + spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; + qos_rga3_1 = "/qos@fdf36000"; + i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; + pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; + spdif_tx4 = "/spdif-tx@fdde8000"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + rkispp1 = "/rkispp@fdcd8000"; + hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; + u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; + hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; + i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; + mipi4_csi2 = "/mipi4-csi2"; + mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; + vcc5v0_host3 = "/vcc5v0-host3"; + rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; + vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; + dp1 = "/dp@fde60000"; + emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; + pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; + vop_pins = "/pinctrl/vop/vop-pins"; + pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; + fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; + vcc_hub = "/vcc-hub-regulator"; + mcum0_pins = "/pinctrl/mcu/mcum0-pins"; + pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; + uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; + mipidcphy0 = "/phy@feda0000"; + uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; + vcc3v3_pcie30 = "/vcc3v3-pcie30"; + pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; + mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; + i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; + vop = "/vop@fdd90000"; + gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; + usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; + vepu = "/vepu@fdb50000"; + cif_clk = "/pinctrl/cif/cif-clk"; + pcie30_phy_grf = "/syscon@fd5b8000"; + isp1_mmu = "/iommu@fdcc7f00"; + pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; + rkvdec1_mmu = "/iommu@fdc48700"; + edp1 = "/edp@fded0000"; + cam0_cam1_switch = "/cam0-cam1-switch"; + gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; + i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; + dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; + hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; + i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; + pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; + gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; + rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; + center_thermal = "/thermal-zones/center-thermal"; + uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; + uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; + pwm4 = "/pwm@febd0000"; + vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; + jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; + rkisp0_vir2 = "/rkisp0-vir2"; + i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; + l2_cache_l2 = "/cpus/l2-cache-l2"; + pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; + qos_vdpu = "/qos@fdf67200"; + vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; + spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; + pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; + spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; + rkisp1 = "/rkisp@fdcc0000"; + usbdpphy1_grf = "/syscon@fd5cc000"; + mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; + mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; + csi2_dcphy1 = "/csi2-dcphy1"; + hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; + hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; + spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; + chosen = "/chosen"; + soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; + rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; + mpp_srv = "/mpp-srv"; + hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; + dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; + debug = "/debug@fd104000"; + jpege0 = "/jpege-core@fdba0000"; + pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; + pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; + pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; + vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; + qos_rkvenc0_m0ro = "/qos@fdf60000"; + its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; + cpu_b2 = "/cpus/cpu@600"; + uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; + usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; + tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; + spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; + pcfg_pull_down = "/pinctrl/pcfg-pull-down"; + dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; + ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; + dsi0_in = "/dsi@fde20000/ports/port@0"; + pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; + spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; + bigcore0_grf = "/syscon@fd590000"; + cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; + uart3 = "/serial@feb60000"; + aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; + pcfg_pull_up = "/pinctrl/pcfg-pull-up"; + rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; + codec_leakage = "/otp@fecc0000/codec-leakage@29"; + pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; + dmac1 = "/dma-controller@fea30000"; + pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; + i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; + qos_gpu_m1 = "/qos@fdf35200"; + i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; + spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; + gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; + csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; + pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; + spdif_tx2 = "/spdif-tx@fddb0000"; + npu_opp_table = "/npu-opp-table"; + spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; + vo0_grf = "/syscon@fd5a6000"; + i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; + qos_usb2host_0 = "/qos@fdf3e400"; + spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; + i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; + i2c7 = "/i2c@fec90000"; + mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; + mipi_te0 = "/pinctrl/mipi/mipi-te0"; + sata_reset = "/pinctrl/sata/sata-reset"; + dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; + pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; + pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; + pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; + qos_vicap_m1 = "/qos@fdf40800"; + sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; + uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; + usb2phy2_grf = "/syscon@fd5d8000"; + rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; + uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; + jpege3_mmu = "/iommu@fdbac800"; + vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; + i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; + mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; + spdif_tx1_dc = "/spdif-tx1-dc"; + uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; + wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; + i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; + uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; + pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; + sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; + pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; + php_grf = "/syscon@fd5b0000"; + pwm2 = "/pwm@fd8b0020"; + pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; + i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; + mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; + sata1 = "/sata@fe220000"; + rkispp1_vir0 = "/rkispp1-vir0"; + dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; + CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; + rkisp0_vir0 = "/rkisp0-vir0"; + spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; + specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; + l2_cache_l0 = "/cpus/l2-cache-l0"; + pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; + qos_hdcp0 = "/qos@fdf80000"; + qos_npu0_mro = "/qos@fdf72200"; + usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; + rkvenc1 = "/rkvenc-core@fdbe0000"; + display_subsystem = "/display-subsystem"; + i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; + pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; + qos_npu2 = "/qos@fdf71000"; + i2s0_8ch = "/i2s@fe470000"; + i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; + pmu = "/power-management@fd8d8000"; + gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; + pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; + route_hdmi1 = "/display-subsystem/route/route-hdmi1"; + csi2_dphy5 = "/csi2-dphy5"; + spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; + mipi3_csi2 = "/mipi3-csi2"; + pmu0_grf = "/syscon@fd588000"; + fan = "/pwm-fan"; + cpu_b0 = "/cpus/cpu@400"; + vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; + qos_rkvenc1_m2wo = "/qos@fdf61400"; + gpio4 = "/pinctrl/gpio@fec50000"; + hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; + pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; + aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; + mmu600_php = "/iommu@fcb00000"; + cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; + pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; + pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; + pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; + bt656_pins = "/pinctrl/bt656/bt656-pins"; + hdmi1_sound = "/hdmi1-sound"; + uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; + uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; + pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; + mod_sleep = "/mod-sleep-regulator"; + gpu_thermal = "/thermal-zones/gpu-thermal"; + hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; + uart1 = "/serial@feb40000"; + rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; + pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; + qos_rkvdec0 = "/qos@fdf62000"; + vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; + uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; + pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; + fspim2_pins = "/pinctrl/fspi/fspim2-pins"; + i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; + gpu_pins = "/pinctrl/gpu/gpu-pins"; + imx415 = "/i2c@fec80000/imx415@37"; + vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; + i2s4_8ch = "/i2s@fddc0000"; + ramoops = "/reserved-memory/ramoops@110000"; + dp0_sound = "/dp0-sound"; + spdif_tx0 = "/spdif-tx@fe4e0000"; + dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; + i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; + mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; + vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; + vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; + vcc12v_dcin = "/vcc12v-dcin"; + vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; + uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; + gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; + package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; + hdcp0 = "/hdcp@fde40000"; + qos_fisheye1 = "/qos@fdf40200"; + rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; + i2c5 = "/i2c@fead0000"; + jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; + i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; + spdif_tx1_sound = "/spdif-tx1-sound"; + qos_jpeg_enc2 = "/qos@fdf66800"; + hdmi0_in = "/hdmi@fde80000/ports/port@0"; + i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; + i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; + hdptxphy_hdmi0 = "/hdmiphy@fed60000"; + sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; + usbdp_phy1_dp = "/phy@fed90000/dp-port"; + npu_leakage = "/otp@fecc0000/npu-leakage@28"; + aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; + pdm0 = "/pdm@fe4b0000"; + gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; + pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; + hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; + pcie3x4 = "/pcie@fe150000"; + can0m1_pins = "/pinctrl/can0/can0m1-pins"; + mclkin_i2s2 = "/clocks/mclkin-i2s2"; + jpege_ccu = "/jpege-ccu"; + pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; + hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; + pipe_phy2_grf = "/syscon@fd5c4000"; + dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; + rkvdec1 = "/rkvdec-core@fdc48000"; + pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; + pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; + little_core_thermal = "/thermal-zones/littlecore-thermal"; + rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; + usb_5v = "/usb-5v"; + i2s8_8ch = "/i2s@fddc8000"; + drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; + rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; + hdptxphy0 = "/phy@fed60000"; + pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; + u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; + route_dp0 = "/display-subsystem/route/route-dp0"; + hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; + hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; + uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; + pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; + usbdrd3_0 = "/usbdrd3_0"; + ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; + bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; + pwm0 = "/pwm@fd8b0000"; + uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; + pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; + hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; + hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; + can1 = "/can@fea60000"; + rkvtunnel = "/rkvtunnel"; + pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; + rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; + combphy2_psu = "/phy@fee20000"; + vp3 = "/vop@fdd90000/ports/port@3"; + rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; + mmu600_pcie = "/iommu@fc900000"; + hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; + i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; + cpu_l3 = "/cpus/cpu@300"; + spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; + vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; + spdif_rx1 = "/spdif-rx@fde10000"; + gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; + rkcif_dvp = "/rkcif-dvp"; + i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; + wireless_wlan = "/wireless-wlan"; + rkcif_mipi_lvds = "/rkcif-mipi-lvds"; + avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; + i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; + pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; + hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; + route_dsi0 = "/display-subsystem/route/route-dsi0"; + rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; + csi2_dphy3 = "/csi2-dphy3"; + pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; + spi4 = "/spi@fecb0000"; + litcore_grf = "/syscon@fd594000"; + isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; + i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; + sys_grf = "/syscon@fd58c000"; + edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; + rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; + gpio2 = "/pinctrl/gpio@fec30000"; + spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; + aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; + can1m1_pins = "/pinctrl/can1/can1m1-pins"; + rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; + hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; + mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; + dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; + pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; + pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; + hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; + bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; + hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; + hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; + uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; + pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; + mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; + rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; + pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; + gmac_uio1 = "/uio@fe1c0000"; + usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; + jpegd = "/jpegd@fdb90000"; + uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; + minidump_smem = "/reserved-memory/minidump-smem@1f0000"; + i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; + uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; + rga3_core1 = "/rga@fdb70000"; + i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; + uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; + vcc5v0_usb = "/vcc5v0-usb"; + minidump = "/minidump"; + }; + + rkvdec-ccu@fdc30000 { + power-domains = <0x60 0x0e>; + rockchip,ccu-mode = <0x01>; + clock-names = "aclk_ccu"; + reg-names = "ccu"; + assigned-clocks = <0x02 0x18e>; + assigned-clock-rates = <0x23c34600>; + resets = <0x02 0x282>; + clocks = <0x02 0x18e>; + compatible = "rockchip,rkv-decoder-v2-ccu"; + status = "okay"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdc30000 0x00 0x100>; + phandle = <0xca>; + reset-names = "video_ccu"; + }; + + qos@fdf60000 { + compatible = "syscon"; + reg = <0x00 0xfdf60000 0x00 0x20>; + phandle = <0x8d>; + }; + + iommu@fdb50800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x76 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_vdpu_mmu"; + reg = <0x00 0xfdb50800 0x00 0x40>; + phandle = <0xb7>; + }; + + rga@fdb60000 { + power-domains = <0x60 0x16>; + iommus = <0xb9>; + clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; + interrupts = <0x00 0x72 0x04>; + clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; + compatible = "rockchip,rga3_core0"; + status = "okay"; + interrupt-names = "rga3_core0_irq"; + reg = <0x00 0xfdb60000 0x00 0x1000>; + phandle = <0x269>; + }; + + qos@fdf67200 { + compatible = "syscon"; + reg = <0x00 0xfdf67200 0x00 0x20>; + phandle = <0x28b>; + }; + + vepu@fdb50000 { + power-domains = <0x60 0x15>; + iommus = <0xb7>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1c0>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2c8 0x02 0x2c9>; + interrupts = <0x00 0x78 0x04>; + clocks = <0x02 0x1c0 0x02 0x1c1>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x00>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-encoder-v2"; + rockchip,resetgroup-node = <0x00>; + status = "disabled"; + interrupt-names = "irq_vepu"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdb50000 0x00 0x400>; + phandle = <0x266>; + reset-names = "shared_video_a\0shared_video_h"; + }; + + mipi3-csi2 { + rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; + compatible = "rockchip,rk3588-mipi-csi2"; + status = "disabled"; + phandle = <0x227>; + }; + + hdmi0-sound { + rockchip,jack-det; + rockchip,cpu = <0x1d3>; + rockchip,codec = <0x1d4>; + rockchip,card-name = "rockchip-hdmi0"; + compatible = "rockchip,hdmi"; + status = "okay"; + phandle = <0x49b>; + rockchip,mclk-fs = <0x80>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + minidump-smem@1f0000 { + status = "disabled"; + reg = <0x00 0x1f0000 0x00 0x100>; + phandle = <0x1cf>; + no-map; + }; + + minidump-mem@c000000 { + status = "disabled"; + reg = <0x00 0xc000000 0x00 0x2000000>; + phandle = <0x1d0>; + no-map; + }; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reusable; + }; + + drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x00 0xedf00000 0x00 0x2e0000>; + phandle = <0x37>; + }; + + ramoops@110000 { + boot-log-count = <0x01>; + record-size = <0x14000>; + pmsg-size = <0x30000>; + compatible = "ramoops"; + console-size = <0x80000>; + reg = <0x00 0x110000 0x00 0xe0000>; + phandle = <0x493>; + boot-log-size = <0x8000>; + ftrace-size = <0x00>; + }; + + drm-cubic-lut@00000000 { + compatible = "rockchip,drm-cubic-lut"; + reg = <0x00 0x00 0x00 0x00>; + phandle = <0x492>; + }; + }; + + pcie@fe160000 { + power-domains = <0x60 0x22>; + vpcie3v3-supply = <0x1ba>; + #address-cells = <0x03>; + rockchip,pipe-grf = <0x76>; + phy-names = "pcie-phy"; + bus-range = <0x10 0x1f>; + clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; + reg-names = "pcie-apb\0pcie-dbi"; + num-ob-windows = <0x10>; + resets = <0x02 0x20e 0x02 0x21d>; + interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; + clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; + interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; + #size-cells = <0x02>; + max-link-speed = <0x03>; + device_type = "pci"; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + reset-gpios = <0x10d 0x08 0x00>; + num-lanes = <0x02>; + compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; + ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; + msi-map = <0x1000 0x1b6 0x1000 0x1000>; + #interrupt-cells = <0x01>; + status = "disabled"; + interrupt-names = "sys\0pmc\0msg\0legacy\0err"; + phys = <0x1b7>; + num-viewport = <0x08>; + reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; + linux,pci-domain = <0x01>; + phandle = <0x486>; + reset-names = "pcie\0periph"; + num-ib-windows = <0x10>; + + legacy-interrupt-controller { + #address-cells = <0x00>; + interrupts = <0x00 0xff 0x01>; + interrupt-parent = <0x01>; + #interrupt-cells = <0x01>; + phandle = <0x1b9>; + interrupt-controller; + }; + }; + + spdif-tx@fddb8000 { + power-domains = <0x60 0x19>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x20b>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc6 0x04>; + clocks = <0x02 0x20f 0x02 0x20a>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfddb8000 0x00 0x1000>; + phandle = <0x1e2>; + dmas = <0xf1 0x16>; + }; + + pvtm@fdb30000 { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-gpu-pvtm"; + reg = <0x00 0xfdb30000 0x00 0x100>; + + pvtm@4 { + clock-names = "clk"; + resets = <0x02 0x430 0x02 0x42f>; + clocks = <0x02 0x118>; + reg = <0x04>; + reset-names = "rts\0rst-p"; + }; + }; + + spdif-tx1-dc { + #sound-dai-cells = <0x00>; + compatible = "linux,spdif-dit"; + status = "disabled"; + phandle = <0x1d8>; + }; + + csi2-dphy0 { + rockchip,hw = <0x2d 0x2e>; + phy-names = "dcphy0\0dcphy1"; + compatible = "rockchip,rk3588-csi2-dphy"; + status = "okay"; + phys = <0x2f 0x30>; + firefly-compatible; + phandle = <0x20f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x32>; + reg = <0x01>; + phandle = <0x184>; + }; + + endpoint@0 { + data-lanes = <0x01 0x02 0x03 0x04>; + remote-endpoint = <0x31>; + reg = <0x00>; + phandle = <0x183>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@0 { + remote-endpoint = <0x33>; + reg = <0x00>; + phandle = <0x4d>; + }; + }; + }; + }; + + rkisp-unite@fdcb0000 { + power-domains = <0x60 0x1c>; + iommus = <0xcf>; + clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; + interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; + clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; + compatible = "rockchip,rk3588-rkisp-unite"; + status = "disabled"; + interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; + reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; + phandle = <0x277>; + }; + + sata@fe230000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x113 0x04>; + clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "disabled"; + interrupt-names = "hostc"; + phys = <0x70 0x01>; + reg = <0x00 0xfe230000 0x00 0x1000>; + phandle = <0x291>; + ports-implemented = <0x01>; + }; + + syscon@fd5a0000 { + compatible = "rockchip,rk3588-gpu-grf\0syscon"; + reg = <0x00 0xfd5a0000 0x00 0x100>; + phandle = <0x65>; + }; + + bt-sound { + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <0x00>; + compatible = "simple-audio-card"; + status = "disabled"; + phandle = <0x49a>; + simple-audio-card,mclk-fs = <0x100>; + + simple-audio-card,cpu { + sound-dai = <0x1d1>; + }; + + simple-audio-card,codec { + sound-dai = <0x1d2 0x01>; + }; + }; + + iommu@fdb90480 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x82 0x04>; + clocks = <0x02 0x1b4 0x02 0x1b5>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpegd_mmu"; + reg = <0x00 0xfdb90480 0x00 0x40>; + phandle = <0xbb>; + }; + + hdcp@fde70000 { + power-domains = <0x60 0x1a>; + clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; + resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; + interrupts = <0x00 0xa0 0x04>; + clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; + compatible = "rockchip,rk3588-hdcp"; + status = "disabled"; + reg = <0x00 0xfde70000 0x00 0x80>; + phandle = <0x287>; + reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; + rockchip,vo-grf = <0xd8>; + }; + + spdif-tx@fe4f0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default"; + pinctrl-0 = <0x143>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x45>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xc2 0x04>; + clocks = <0x02 0x47 0x02 0x44>; + dma-names = "tx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; + status = "disabled"; + reg = <0x00 0xfe4f0000 0x00 0x1000>; + phandle = <0x1d7>; + dmas = <0xf1 0x05>; + }; + + rkcif-mipi-lvds-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x52>; + phandle = <0x22d>; + }; + + es8388-sound { + pinctrl-names = "default"; + rockchip,cpu = <0x1da>; + pinctrl-0 = <0x1dc>; + rockchip,codec = <0x1db>; + hp-det-gpio = <0x79 0x13 0x00>; + rockchip,card-name = "rockchip-es8388"; + rockchip,format = "i2s"; + rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; + compatible = "firefly,multicodecs-card"; + linein-type = <0x01>; + status = "okay"; + phandle = <0x49f>; + hp-con-gpio = <0x182 0x0b 0x00>; + firefly,not-use-dapm; + rockchip,mclk-fs = <0x180>; + }; + + spi@feb30000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x15d 0x15e 0x15f>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x149 0x04>; + clocks = <0x02 0xa6 0x02 0xa1>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfeb30000 0x00 0x1000>; + phandle = <0x2c8>; + dmas = <0xf1 0x11 0xf1 0x12>; + }; + + phy@fee80000 { + rockchip,pipe-grf = <0x76>; + clock-names = "pclk"; + rockchip,pcie30-phymode = <0x01>; + resets = <0x02 0x2000a>; + clocks = <0x02 0x188>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-pcie3-phy"; + status = "okay"; + reg = <0x00 0xfee80000 0x00 0x20000>; + phandle = <0x1b7>; + reset-names = "phy"; + rockchip,phy-grf = <0x1cc>; + }; + + vcc12v-dcin { + regulator-max-microvolt = <0xb71b00>; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <0xb71b00>; + regulator-name = "vcc12v_dcin"; + compatible = "regulator-fixed"; + phandle = <0x1cd>; + }; + + qos@fdf61200 { + compatible = "syscon"; + reg = <0x00 0xfdf61200 0x00 0x20>; + phandle = <0x91>; + }; + + i2s@fde00000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x234>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x417>; + interrupts = <0x00 0xbe 0x04>; + clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfde00000 0x00 0x1000>; + phandle = <0x47e>; + dmas = <0xf2 0x18>; + reset-names = "rx-m"; + }; + + qos@fdf40800 { + compatible = "syscon"; + reg = <0x00 0xfdf40800 0x00 0x20>; + phandle = <0xa5>; + }; + + i2s@fddfc000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk_tx\0mclk_rx\0hclk"; + assigned-clocks = <0x02 0x23f>; + assigned-clock-parents = <0x02 0x05>; + rockchip,capture-only; + resets = <0x02 0x413>; + interrupts = <0x00 0xbd 0x04>; + clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s-tdm"; + status = "disabled"; + reg = <0x00 0xfddfc000 0x00 0x1000>; + phandle = <0x27f>; + dmas = <0xf2 0x17>; + reset-names = "rx-m"; + }; + + usbdrd3_0 { + #address-cells = <0x02>; + clock-names = "ref\0suspend\0bus"; + clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; + ranges; + status = "okay"; + phandle = <0x252>; + + usb@fc000000 { + power-domains = <0x60 0x1f>; + snps,dis-u1-entry-quirk; + snps,dis_enblslpm_quirk; + phy-names = "usb2-phy\0usb3-phy"; + snps,dis-u2-freeclk-exists-quirk; + usb-role-switch; + phy_type = "utmi_wide"; + quirk-skip-phy-init; + resets = <0x02 0x2a4>; + interrupts = <0x00 0xdc 0x04>; + snps,dis-u2-entry-quirk; + compatible = "snps,dwc3"; + snps,parkmode-disable-hs-quirk; + snps,dis-del-phy-power-chg-quirk; + status = "okay"; + snps,parkmode-disable-ss-quirk; + phys = <0x66 0x67>; + reg = <0x00 0xfc000000 0x00 0x400000>; + phandle = <0x253>; + dr_mode = "host"; + reset-names = "usb3-otg"; + snps,dis-tx-ipgap-linecheck-quirk; + + port { + #address-cells = <0x01>; + #size-cells = <0x00>; + + endpoint@0 { + remote-endpoint = <0x68>; + reg = <0x00>; + phandle = <0x17d>; + }; + }; + }; + }; + + rkcif-mipi-lvds5-sditf-vir2 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a2>; + phandle = <0x478>; + }; + + rkcif-dvp-sditf { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x51>; + phandle = <0x22a>; + }; + + iommu@fdd97e00 { + rockchip,shootdown-entire; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x9c 0x04>; + clocks = <0x02 0x270 0x02 0x26f>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "vop_mmu"; + reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; + phandle = <0xd6>; + rockchip,disable-device-link-resume; + }; + + rkvtunnel { + compatible = "rockchip,video-tunnel"; + status = "disabled"; + phandle = <0x245>; + }; + + syscon@fd5e0000 { + compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; + reg = <0x00 0xfd5e0000 0x00 0x100>; + phandle = <0x18a>; + }; + + i2c@fead0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14d>; + clock-names = "i2c\0pclk"; + resets = <0x02 0xb4 0x02 0xac>; + interrupts = <0x00 0x142 0x04>; + clocks = <0x02 0x91 0x02 0x89>; + #size-cells = <0x00>; + compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; + status = "disabled"; + reg = <0x00 0xfead0000 0x00 0x1000>; + phandle = <0x2a8>; + reset-names = "i2c\0apb"; + }; + + iommu@fdba4800 { + power-domains = <0x60 0x15>; + clock-names = "aclk\0iface"; + interrupts = <0x00 0x7b 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + #iommu-cells = <0x00>; + compatible = "rockchip,iommu-v2"; + status = "okay"; + interrupt-names = "irq_jpege1_mmu"; + reg = <0x00 0xfdba4800 0x00 0x40>; + phandle = <0xbe>; + }; + + spdif-rx@fde10000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x260>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3ff>; + interrupts = <0x00 0xc8 0x04>; + clocks = <0x02 0x260 0x02 0x25f>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde10000 0x00 0x1000>; + phandle = <0x47f>; + dmas = <0x7c 0x16>; + reset-names = "spdifrx-m"; + }; + + npu@fdab0000 { + power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; + iommus = <0xb2>; + clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; + assigned-clocks = <0x0e 0x06>; + power-domain-names = "npu0\0npu1\0npu2"; + rknpu-supply = <0xb3>; + assigned-clock-rates = <0xbebc200>; + resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; + interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; + clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; + compatible = "rockchip,rk3588-rknpu"; + status = "okay"; + interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; + mem-supply = <0xb3>; + reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; + phandle = <0x265>; + reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; + operating-points-v2 = <0xb1>; + }; + + hdmiphy@fed60000 { + clock-names = "ref\0apb"; + resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; + clocks = <0x02 0x2b5 0x02 0x267>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + status = "okay"; + rockchip,grf = <0x18a>; + reg = <0x00 0xfed60000 0x00 0x2000>; + phandle = <0xfd>; + reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; + + clk-port { + #clock-cells = <0x00>; + status = "okay"; + phandle = <0x35>; + }; + }; + + dmc-opp-table { + nvmem-cells = <0x44 0x45 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + phandle = <0x41>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,supported-hw; + + opp-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; + }; + + opp-j-m-1560000000 { + opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x5cfbb600>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-j-m-528000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0x06 0xffff>; + }; + + opp-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-1068000000 { + opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; + }; + + opp-j-m-2750000000 { + opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0xa3e9ab80>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + }; + + opp-528000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; + opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; + opp-hz = <0x00 0x1f78a400>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; + opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; + }; + + opp-j-m-1068000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; + opp-hz = <0x00 0x3fa86300>; + opp-supported-hw = <0x06 0xffff>; + }; + }; + + rkvenc-core@fdbe0000 { + power-domains = <0x60 0x11>; + iommus = <0xc5>; + rockchip,ccu = <0xc3>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; + assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; + rockchip,task-capacity = <0x08>; + rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; + assigned-clock-rates = <0x1dcd6500 0x2faf0800>; + resets = <0x02 0x305 0x02 0x304 0x02 0x306>; + interrupts = <0x00 0x68 0x04>; + clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x07>; + compatible = "rockchip,rkv-encoder-v2-core"; + status = "okay"; + interrupt-names = "irq_rkvenc1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdbe0000 0x00 0x6000>; + phandle = <0x273>; + reset-names = "video_a\0video_h\0video_core"; + operating-points-v2 = <0xc4>; + }; + + debug@fd104000 { + compatible = "rockchip,debug"; + reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; + phandle = <0x48f>; + }; + + watchdog@feaf0000 { + clock-names = "tclk\0pclk"; + interrupts = <0x00 0x13b 0x04>; + clocks = <0x02 0x6c 0x02 0x6b>; + compatible = "snps,dw-wdt"; + status = "okay"; + reg = <0x00 0xfeaf0000 0x00 0x100>; + phandle = <0x2aa>; + }; + + syscon@fd5d8000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd5d8000 0x00 0x4000>; + phandle = <0x25d>; + + usb2-phy@8000 { + clock-output-names = "usb480m_phy2"; + clock-names = "phyclk"; + resets = <0x02 0xc0049 0x02 0x48a>; + interrupts = <0x00 0x187 0x04>; + clocks = <0x02 0x2b5>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-usb2phy"; + status = "okay"; + reg = <0x8000 0x10>; + phandle = <0x69>; + reset-names = "phy\0apb"; + + host-port { + phy-supply = <0x75>; + #phy-cells = <0x00>; + status = "okay"; + phandle = <0x6c>; + }; + }; + }; + + cluster0-opp-table { + rockchip,pvtm-offset = <0x64>; + rockchip,pvtm-sample-time = <0x44c>; + rockchip,dsu-grf = <0x23>; + rockchip,pvtm-hw = <0x06>; + nvmem-cells = <0x1f 0x20 0x21>; + rockchip,low-temp = <0x2710>; + rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; + rockchip,pvtm-thermal-zone = "soc-thermal"; + rockchip,opp-shared-dsu; + rockchip,high-temp-max-freq = <0x188940>; + opp-shared; + rockchip,reboot-freq = <0x159b40>; + rockchip,pvtm-freq = <0x159b40>; + rockchip,pvtm-ref-temp = <0x19>; + low-volt-mem-read-margin = <0x04>; + volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; + compatible = "operating-points-v2"; + rockchip,low-temp-min-volt = <0xb71b0>; + rockchip,grf = <0x22>; + nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; + rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; + phandle = <0x0f>; + rockchip,pvtm-temp-prop = <0xf4 0xf4>; + rockchip,temp-hysteresis = <0x1388>; + rockchip,high-temp = <0x14c08>; + rockchip,pvtm-pvtpll; + rockchip,supported-hw; + intermediate-threshold-freq = <0xf6180>; + rockchip,pvtm-volt = <0xb71b0>; + + opp-1200000000 { + opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; + }; + + opp-j-m-1416000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-supported-hw = <0x06 0xffff>; + opp-suspend; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + }; + + opp-1008000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1704000000 { + opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + opp-hz = <0x00 0x6590fa00>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + }; + + opp-j-m-1200000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x47868c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1008000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x3c14dc00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-816000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1800000000 { + opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; + opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; + opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; + opp-hz = <0x00 0x6b49d200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; + }; + + opp-j-m-600000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1608000000 { + opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; + opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; + opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + }; + + opp-j-1296000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; + opp-supported-hw = <0x04 0xffff>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + }; + + opp-j-m-408000000 { + opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0x06 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-816000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x30a32c00>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-j-m-1608000000 { + opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; + opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; + opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; + opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; + opp-hz = <0x00 0x5fd82200>; + opp-supported-hw = <0x06 0xffff>; + opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; + opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; + }; + + opp-600000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x23c34600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + + opp-1416000000 { + opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; + opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; + opp-hz = <0x00 0x54667200>; + opp-supported-hw = <0xf9 0xffff>; + opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; + opp-suspend; + opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; + clock-latency-ns = <0x9c40>; + opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; + }; + + opp-408000000 { + opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; + opp-hz = <0x00 0x18519600>; + opp-supported-hw = <0xf9 0xffff>; + clock-latency-ns = <0x9c40>; + }; + }; + + vcc-4g-regulator { + regulator-boot-on; + gpio = <0x182 0x00 0x00>; + regulator-always-on; + enable-active-high; + regulator-name = "vcc_4g"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x4b0>; + }; + + spi@fecb0000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + num-cs = <0x02>; + pinctrl-0 = <0x187 0x188 0x189>; + clock-names = "spiclk\0apb_pclk"; + interrupts = <0x00 0x14a 0x04>; + clocks = <0x02 0xa7 0x02 0xa2>; + #size-cells = <0x00>; + dma-names = "tx\0rx"; + compatible = "rockchip,rk3066-spi"; + status = "disabled"; + reg = <0x00 0xfecb0000 0x00 0x1000>; + phandle = <0x2e6>; + dmas = <0xf2 0x0d 0xf2 0x0e>; + }; + + spdif-rx@fde08000 { + power-domains = <0x60 0x1a>; + clock-names = "mclk\0hclk"; + assigned-clocks = <0x02 0x25e>; + assigned-clock-parents = <0x02 0x05>; + resets = <0x02 0x3fd>; + interrupts = <0x00 0xc7 0x04>; + clocks = <0x02 0x25e 0x02 0x25d>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; + status = "disabled"; + reg = <0x00 0xfde08000 0x00 0x1000>; + phandle = <0x280>; + dmas = <0x7c 0x15>; + reset-names = "spdifrx-m"; + }; + + mipi3-csi2-hw@fdd40000 { + clock-names = "pclk_csi2host"; + reg-names = "csihost_regs"; + resets = <0x02 0x327>; + interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; + clocks = <0x02 0x1d2>; + compatible = "rockchip,rk3588-mipi-csi2-hw"; + status = "okay"; + interrupt-names = "csi-intr1\0csi-intr2"; + reg = <0x00 0xfdd40000 0x00 0x10000>; + phandle = <0x4a>; + reset-names = "srst_csihost_p"; + }; + + // DTB memory region: { address: 0x100000000, size: 0x100000000 } 4G + memory { + device_type = "memory"; + reg = <0x01 0x00000000 0x01 0x00000000>; + }; + + jpege-core@fdba4000 { + power-domains = <0x60 0x15>; + iommus = <0xbe>; + rockchip,ccu = <0xbd>; + clock-names = "aclk_vcodec\0hclk_vcodec"; + assigned-clocks = <0x02 0x1ae>; + rockchip,normal-rates = <0x2367b880 0x00>; + assigned-clock-rates = <0x2367b880>; + resets = <0x02 0x2cc 0x02 0x2cd>; + interrupts = <0x00 0x7c 0x04>; + clocks = <0x02 0x1ae 0x02 0x1af>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x02>; + rockchip,disable-auto-freq; + compatible = "rockchip,vpu-jpege-core"; + status = "okay"; + interrupt-names = "irq_jpege1"; + rockchip,skip-pmu-idle-request; + reg = <0x00 0xfdba4000 0x00 0x400>; + phandle = <0x26e>; + reset-names = "video_a\0video_h"; + }; + + wireless-wlan { + pinctrl-names = "default"; + pinctrl-0 = <0x1ea>; + WIFI,host_wake_irq = <0x182 0x0a 0x00>; + wifi_chip_type = "rtl8822ce"; + compatible = "wlan-platdata"; + status = "okay"; + phandle = <0x4ab>; + }; + + rkcif-mipi-lvds4-sditf-vir3 { + compatible = "rockchip,rkcif-sditf"; + status = "disabled"; + rockchip,cif = <0x1a1>; + phandle = <0x475>; + }; + + dp@fde50000 { + power-domains = <0x60 0x19>; + clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; + assigned-clocks = <0x02 0x2cc>; + assigned-clock-rates = <0xf42400>; + resets = <0x02 0x388>; + interrupts = <0x00 0xa1 0x04>; + clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; + #sound-dai-cells = <0x01>; + compatible = "rockchip,rk3588-dp"; + status = "disabled"; + phys = <0xf6>; + reg = <0x00 0xfde50000 0x00 0x4000>; + phandle = <0x1d6>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x38>; + status = "disabled"; + reg = <0x01>; + phandle = <0xe0>; + }; + + endpoint@2 { + remote-endpoint = <0xf8>; + status = "disabled"; + reg = <0x02>; + phandle = <0xe6>; + }; + + endpoint@0 { + remote-endpoint = <0xf7>; + status = "disabled"; + reg = <0x00>; + phandle = <0xda>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + phandle = <0x286>; + }; + }; + }; + }; + + rockchip-system-monitor { + rockchip,thermal-zone = "soc-thermal"; + compatible = "rockchip,system-monitor"; + phandle = <0x247>; + }; + + vcc3v3-pcie30 { + regulator-max-microvolt = <0x325aa0>; + enable-active-high; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc3v3_pcie30"; + startup-delay-us = <0x1388>; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x1b8>; + vin-supply = <0x1cd>; + gpios = <0x182 0x04 0x00>; + }; + + phy@fedb0000 { + clock-names = "pclk\0ref"; + resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; + clocks = <0x02 0x109 0x02 0x2b6>; + #phy-cells = <0x00>; + compatible = "rockchip,rk3588-mipi-dcphy"; + status = "okay"; + rockchip,grf = <0x191>; + reg = <0x00 0xfedb0000 0x00 0x10000>; + phandle = <0x30>; + reset-names = "m_phy\0apb\0grf\0s_phy"; + }; + + rkvdec-core@fdc38000 { + power-domains = <0x60 0x0e>; + iommus = <0xc9>; + rockchip,ccu = <0xca>; + clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; + reg-names = "regs\0link"; + assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,core-mask = <0x10001>; + rockchip,task-capacity = <0x10>; + rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; + assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; + resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; + interrupts = <0x00 0x5f 0x04>; + rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; + clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; + rockchip,rcb-min-width = <0x200>; + rockchip,srv = <0xb8>; + rockchip,taskqueue-node = <0x09>; + compatible = "rockchip,rkv-decoder-v2"; + status = "okay"; + interrupt-names = "irq_rkvdec0"; + rockchip,skip-pmu-idle-request; + rockchip,rcb-iova = <0xfff00000 0x100000>; + reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; + phandle = <0x274>; + reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; + rockchip,sram = <0xcb>; + }; + + minidump { + smem-region = <0x1cf>; + minidump-region = <0x1d0>; + compatible = "rockchip,minidump"; + status = "disabled"; + phandle = <0x491>; + }; +}; diff --git a/configs/vms/arceos-rk3588-aarch64-vm2.toml b/configs/vms/arceos-rk3588-aarch64-vm2.toml new file mode 100644 index 00000000..92a96b70 --- /dev/null +++ b/configs/vms/arceos-rk3588-aarch64-vm2.toml @@ -0,0 +1,50 @@ +# Vm base info configs +# +[base] +# Guest vm id. +id = 2 +# Guest vm name. +name = "arceos" +# Virtualization type. +vm_type = 1 +# The number of virtual CPUs. +cpu_num = 1 +# Guest vm physical cpu sets. +phys_cpu_sets = [2] + +# +# Vm kernel configs +# +[kernel] +# The entry point of the kernel image. +entry_point = 0x1_0048_0000 +# The load address of the kernel image. +kernel_load_addr = 0x1_0048_0000 +# The location of image: "memory" | "fs". +# Load from memory +image_location = "memory" +# The file path of the kernel image. +kernel_path = "helloworld_aarch64-rk3588j.bin" +## The file path of the device tree blob (DTB). +# dtb_path = "" +# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). +# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. +memory_regions = [ + [0x1_0000_0000, 0x1000_0000, 0x7, 1], # ram 256M MAP_IDENTICAL + # [0x940_0000, 0xe6c0_0000, 0x7, 1], # ram 256M MAP_IDENTICAL +] + +# +# Device specifications +# +[devices] +# Emu_devices. +# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. +emu_devices = [] + +# Pass-through devices. +# Name Base-Ipa Base-Pa Length Alloc-Irq. +passthrough_devices = [ + ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], + ["uart@feb50000", 0xfeb5_0000, 0xfeb4_0000, 0x1000, 0x1], +] diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml new file mode 100644 index 00000000..c60ecabb --- /dev/null +++ b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml @@ -0,0 +1,72 @@ +# Vm base info configs +# +[base] +# Guest vm id. +id = 1 +# Guest vm name. +name = "linux" +# Virtualization type. +vm_type = 1 +# The number of virtual CPUs. +cpu_num = 4 +# Guest vm physical cpu sets. +# phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] +phys_cpu_ids = [0x00, 0x100, 0x200, 0x300] +phys_cpu_sets = [1, 2, 4, 8] + +# +# Vm kernel configs +# +[kernel] +# The entry point of the kernel image. +entry_point = 0x1020_0000 +# The load address of the kernel image. +kernel_load_addr = 0x1020_0000 +# The load address of the device tree blob (DTB). +dtb_load_addr = 0x1000_0000 +# The load address of the ramdisk image. +ramdisk_load_addr = 0x0a20_0000 +# The location of image: "memory" | "fs". +# load from memory +image_location = "memory" +# The file path of the kernel image. +kernel_path = "Image.bin" +# The file path of the device tree blob (DTB). +dtb_path = "aio-rk3588-jd4-vm1.dtb" +# The file path of the ramdisk image. +ramdisk_path = "ramdisk.img" + + +# load from file system. +# image_location = "fs". +## The file path of the kernel image. +# kernel_path = "linux-arceos-aarch64.bin" +## The file path of the device tree blob (DTB). +# dtb_path = "linux-rk3588.dtb" + +## The file path of the ramdisk image. +# ramdisk_path = "" +## The load address of the ramdisk image. +# ramdisk_load_addr = 0 +## The path of the disk image. +# disk_path = "disk.img" + +# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). +# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. +memory_regions = [ + # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL + # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL + # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL +] + +# +# Device specifications +# +[devices] +# Emu_devices. +# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. +emu_devices = [] + +# Pass-through devices. +# Name Base-Ipa Base-Pa Length Alloc-Irq. +passthrough_devices = [] From e6672fbbfb799db432df976c689a31642fc2c19e Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Mon, 9 Jun 2025 16:13:09 +0800 Subject: [PATCH 33/62] Remove absolute path in config and readme --- Boot-on-qemu.md | 8 +++++++- configs/vms/arceos-aarch64.toml | 4 ++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/Boot-on-qemu.md b/Boot-on-qemu.md index b2a5ecab..a16276fb 100644 --- a/Boot-on-qemu.md +++ b/Boot-on-qemu.md @@ -9,9 +9,15 @@ cd crates/arm_vcpu && git checkout 4_level_paging cd crates/axaddrspace && git checkout 4_level_paging ``` +* build dtb ```bash -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/hky/workspace/Linux/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y +dtc -o configs/vms/qemu_gicv3.dtb -O dtb -I dts configs/vms/qemu_gicv3.dts +``` + +```bash +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-qemu-virt-hv.toml defconfig +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-qemu-virt-hv.toml LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=configs/vms/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y telnet localhost 4321 ``` \ No newline at end of file diff --git a/configs/vms/arceos-aarch64.toml b/configs/vms/arceos-aarch64.toml index 47271868..c00ca0a2 100644 --- a/configs/vms/arceos-aarch64.toml +++ b/configs/vms/arceos-aarch64.toml @@ -22,7 +22,7 @@ entry_point = 0x4020_0000 # Load from file system. image_location = "memory" # The file path of the kernel image. -kernel_path = "/home/hky/workspace/arceos/axvisor/crates/arceos/examples/helloworld/helloworld_aarch64-qemu-virt_1.bin" +kernel_path = "helloworld_aarch64-qemu-virt_1.bin" # The load address of the kernel image. kernel_load_addr = 0x4020_0000 ## Load from memory @@ -53,7 +53,7 @@ passthrough_devices = [ ["pl011@9040000", 0x904_0000, 0x904_0000, 0x1000, 0x1], ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], - # a003000.virtio_mmio virtio_mmio@a003000 + # a003000.virtio_mmio virtio_mmio@a003000 # a003200.virtio_mmio virtio_mmio@a003200 ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], ] \ No newline at end of file From 6b6c98163b7c78eaffdd71337a6dc9609c42d8c3 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Mon, 9 Jun 2025 23:37:39 +0800 Subject: [PATCH 34/62] [wip] introduce ivc channel with publisher subscriber model --- Cargo.lock | 11 ++++ Cargo.toml | 6 +- configs/vms/linux-qemu-aarch64.toml | 2 +- scripts/make/rk3588.mk | 2 +- src/vmm/hvc.rs | 42 ++++++++++++++ src/vmm/ivc.rs | 88 +++++++++++++++++++++++++++++ src/vmm/mod.rs | 2 + src/vmm/vcpus.rs | 17 ++++++ tool/dev_env.py | 1 + 9 files changed, 167 insertions(+), 4 deletions(-) create mode 100644 src/vmm/hvc.rs create mode 100644 src/vmm/ivc.rs diff --git a/Cargo.lock b/Cargo.lock index 923238f8..59637ce4 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -149,6 +149,7 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arm_gicv2#eee14941d490719f6689e82f9a87caea6767bdc3" dependencies = [ "tock-registers 0.8.1", ] @@ -437,6 +438,15 @@ dependencies = [ "x86_64 0.15.2", ] +[[package]] +name = "axhvc" +version = "0.1.0" +dependencies = [ + "axerrno", + "bit_field", + "numeric-enum-macro", +] + [[package]] name = "axio" version = "0.1.1" @@ -553,6 +563,7 @@ dependencies = [ "axaddrspace", "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm)", "axerrno", + "axhvc", "axstd", "axvcpu", "axvm", diff --git a/Cargo.toml b/Cargo.toml index 40063f26..faa50ae8 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -36,6 +36,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm axvm = { git = "https://github.com/arceos-hypervisor/axvm.git" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } +axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git" } # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" @@ -73,8 +74,9 @@ path = "crates/axdevice" path = "crates/arm_vgic" [patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] path = "crates/axdevice_crates/axdevice_base" -[patch."https://github.com/arceos-hypervisor/arm_gicv2.git".arm_gicv2] -path = "crates/arm_gicv2" +[patch."https://github.com/arceos-hypervisor/axhvc.git".axhvc] +path = "crates/axhvc" + [patch.crates-io] page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} \ No newline at end of file diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index 9ad71adb..dbcb8121 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -22,7 +22,7 @@ entry_point = 0x8008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" +kernel_path = "linux-5.10.198.bin" # The load address of the kernel image. kernel_load_addr = 0x8008_0000 # The file path of the device tree blob (DTB). diff --git a/scripts/make/rk3588.mk b/scripts/make/rk3588.mk index 34f534fc..ecd40280 100644 --- a/scripts/make/rk3588.mk +++ b/scripts/make/rk3588.mk @@ -22,6 +22,6 @@ define upload_image @echo "You can now boot the image using the RK3588 board." @echo "Coping this command to uboot console:" @echo "" - @echo 'setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 192.168.50.97:axvisor;tftp 0x10000000 192.168.50.97:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000;' + @echo 'setenv serverip 192.168.50.138;setenv ipaddr 192.168.50.8;tftp 0x00480000 192.168.50.138:axvisor;tftp 0x10000000 192.168.50.138:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000;' @echo "" endef \ No newline at end of file diff --git a/src/vmm/hvc.rs b/src/vmm/hvc.rs new file mode 100644 index 00000000..568c1793 --- /dev/null +++ b/src/vmm/hvc.rs @@ -0,0 +1,42 @@ +use axerrno::{AxResult, ax_err, ax_err_type}; +use axhvc::{HyperCallCode, HyperCallResult}; + +use crate::vmm::{VCpuRef, VMRef}; + +pub struct HyperCall { + vcpu: VCpuRef, + vm: VMRef, + code: HyperCallCode, + args: [u64; 6], +} + +impl HyperCall { + pub fn new(vcpu: VCpuRef, vm: VMRef, code: u64, args: [u64; 6]) -> AxResult { + let code = HyperCallCode::try_from(code as u32).map_err(|e| { + warn!("Invalid hypercall code: {} e {:?}", code, e); + ax_err_type!(InvalidInput) + })?; + + Ok(Self { + vcpu, + vm, + code, + args, + }) + } + + pub fn execute(&self) -> HyperCallResult { + match self.code { + HyperCallCode::HIVC_ALLOC_MEM => { + info!("VM[{}] HyperCall HIVC_ALLOC_MEM", self.vm.id()); + self.vm.map_region(gpa, hpa, size, flags); + + Ok(0) + } + _ => { + warn!("Unsupported hypercall code: {:?}", self.code); + return ax_err!(Unsupported); + } + } + } +} diff --git a/src/vmm/ivc.rs b/src/vmm/ivc.rs new file mode 100644 index 00000000..064392e9 --- /dev/null +++ b/src/vmm/ivc.rs @@ -0,0 +1,88 @@ +//! Inter-VM communication (IVC) module. +use alloc::vec::Vec; + +use axaddrspace::HostPhysAddr; +use axerrno::AxResult; +use page_table_multiarch::PagingHandler; + +pub struct IVCChannel { + publisher_vm_id: usize, + subscriber_vms: Vec, + shared_region_base: HostPhysAddr, + shared_region_size: usize, + _phatom: core::marker::PhantomData, +} + +impl core::fmt::Debug for IVCChannel { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!( + f, + "IVCChannel(publisher[{}], subscribers {:?}, base: {:?}, size: {:#x})", + self.publisher_vm_id, + self.subscriber_vms, + self.shared_region_base, + self.shared_region_size + ) + } +} + +impl Drop for IVCChannel { + fn drop(&mut self) { + // Free the shared region frame when the channel is dropped. + debug!( + "Dropping IVCChannel for VM[{}], shared region base: {:?}", + self.publisher_vm_id, self.shared_region_base + ); + H::dealloc_frame(self.shared_region_base); + } +} + +impl IVCChannel { + pub fn alloc(published_vm_id: usize, shared_region_size: usize) -> AxResult { + // TODO: support larger shared region sizes with alloc_frames API. + let shared_region_size = shared_region_size.min(4096); + let shared_region_base = H::alloc_frame().ok_or_else(|| { + axerrno::ax_err_type!(NoMemory, "Failed to allocate shared region frame") + })?; + + Ok(Self { + publisher_vm_id: published_vm_id, + subscriber_vms: Vec::new(), + shared_region_base, + shared_region_size, + _phatom: core::marker::PhantomData, + }) + } + + pub fn base_hpa(&self) -> HostPhysAddr { + self.shared_region_base + } + + pub fn size(&self) -> usize { + self.shared_region_size + } + + pub fn publisher_vm_id(&self) -> usize { + self.publisher_vm_id + } + + pub fn add_subscriber(&mut self, subscriber_vm_id: usize) { + if !self.subscriber_vms.contains(&subscriber_vm_id) { + self.subscriber_vms.push(subscriber_vm_id); + } + } + + pub fn remove_subscriber(&mut self, subscriber_vm_id: usize) { + if let Some(pos) = self + .subscriber_vms + .iter() + .position(|&id| id == subscriber_vm_id) + { + self.subscriber_vms.remove(pos); + } + } + + pub fn subscribers(&self) -> &[usize] { + &self.subscriber_vms + } +} diff --git a/src/vmm/mod.rs b/src/vmm/mod.rs index 0e9ab075..7840f43c 100644 --- a/src/vmm/mod.rs +++ b/src/vmm/mod.rs @@ -4,6 +4,8 @@ mod images; mod timer; mod vcpus; mod vm_list; +mod hvc; +mod ivc; use std::os::arceos::api::task::{self, AxWaitQueueHandle}; diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 1a084c01..10c58111 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -292,6 +292,23 @@ fn vcpu_run() { Ok(exit_reason) => match exit_reason { AxVCpuExitReason::Hypercall { nr, args } => { debug!("Hypercall [{}] args {:x?}", nr, args); + use crate::vmm::hvc::HyperCall; + + match HyperCall::new(vcpu.clone(), vm.clone(), nr, args) { + Ok(hypercall) => { + let ret_val = match hypercall.execute() { + Ok(ret_val) => ret_val as isize, + Err(err) => { + warn!("Hypercall [{:#x}] failed: {:?}", nr, err); + -1 + } + }; + // vcpu.set_return_value(ret_val as usize); + } + Err(err) => { + warn!("Hypercall [{:#x}] failed: {:?}", nr, err); + } + } } AxVCpuExitReason::FailEntry { hardware_entry_failure_reason, diff --git a/tool/dev_env.py b/tool/dev_env.py index 84c3c3d5..2dd2a40b 100755 --- a/tool/dev_env.py +++ b/tool/dev_env.py @@ -37,6 +37,7 @@ def main(): "arm_vgic", "arm_gicv2", "axdevice_crates", + "axhvc", ] for one in repos: From 4e2e1c22b05552a8337a537031dcac309ba35d36 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Tue, 10 Jun 2025 15:59:56 +0800 Subject: [PATCH 35/62] [feat] introduce IVCChannelHeader --- src/vmm/hvc.rs | 118 +++++++++++++++++++++++++++- src/vmm/ivc.rs | 201 +++++++++++++++++++++++++++++++++++++++++------ src/vmm/mod.rs | 4 +- src/vmm/vcpus.rs | 2 +- 4 files changed, 294 insertions(+), 31 deletions(-) diff --git a/src/vmm/hvc.rs b/src/vmm/hvc.rs index 568c1793..770456b5 100644 --- a/src/vmm/hvc.rs +++ b/src/vmm/hvc.rs @@ -1,6 +1,8 @@ +use axaddrspace::{GuestPhysAddr, MappingFlags}; use axerrno::{AxResult, ax_err, ax_err_type}; use axhvc::{HyperCallCode, HyperCallResult}; +use crate::vmm::ivc::{self, IVCChannel}; use crate::vmm::{VCpuRef, VMRef}; pub struct HyperCall { @@ -27,11 +29,119 @@ impl HyperCall { pub fn execute(&self) -> HyperCallResult { match self.code { - HyperCallCode::HIVC_ALLOC_MEM => { - info!("VM[{}] HyperCall HIVC_ALLOC_MEM", self.vm.id()); - self.vm.map_region(gpa, hpa, size, flags); + HyperCallCode::HIVCPublishChannel => { + // This is just a placeholder for the shared memory base address, + // it should be allocated dynamically. + const SHM_BASE_GPA_RAW: usize = 0xd000_0000; + let shm_base_gpa = GuestPhysAddr::from_usize(SHM_BASE_GPA_RAW); - Ok(0) + let key = self.args[0] as usize; + let shm_base_gpa_ptr = GuestPhysAddr::from_usize(self.args[1] as usize); + let shm_size_ptr = GuestPhysAddr::from_usize(self.args[2] as usize); + + let shm_region_size = self.vm.read_from_guest_of::(shm_size_ptr)?; + + info!("VM[{}] HyperCall {:?}", self.vm.id(), self.code); + let ivc_channel = + IVCChannel::alloc(self.vm.id(), key, shm_region_size, shm_base_gpa)?; + + let actual_size = ivc_channel.size(); + + self.vm.map_region( + shm_base_gpa, + ivc_channel.base_hpa(), + actual_size, + MappingFlags::READ | MappingFlags::WRITE, + )?; + + self.vm + .write_to_guest_of(shm_base_gpa_ptr, &shm_base_gpa.as_usize())?; + self.vm.write_to_guest_of(shm_size_ptr, &actual_size)?; + + ivc::insert_channel(self.vm.id(), ivc_channel)?; + + Ok(0) + } + HyperCallCode::HIVCUnPublishChannel => { + let key = self.args[0] as usize; + + info!( + "VM[{}] HyperCall {:?} with key {:#x}", + self.vm.id(), + self.code, + key + ); + let channel = ivc::remove_channel(self.vm.id(), key)?; + + self.vm + .unmap_region(channel.base_gpa_in_publisher(), channel.size())?; + + for (subscriber_id, subscriber_base_gpa) in channel.subscribers() { + warn!( + "TODO, you should unmap subscriber VM[{}] base GPA: {:?} size {:#x}", + subscriber_id, + subscriber_base_gpa, + channel.size() + ); + } + + Ok(0) + } + HyperCallCode::HIVCSubscribChannel => { + // This is just a placeholder for the shared memory base address, + // it should be allocated dynamically. + const SHM_BASE_GPA_RAW: usize = 0xe000_0000; + let shm_base_gpa = GuestPhysAddr::from_usize(SHM_BASE_GPA_RAW); + + let publisher_vm_id = self.args[0] as usize; + let key = self.args[1] as usize; + let shm_base_gpa_ptr = GuestPhysAddr::from_usize(self.args[2] as usize); + let shm_size_ptr = GuestPhysAddr::from_usize(self.args[3] as usize); + + info!( + "VM[{}] HyperCall {:?} to VM[{}]", + self.vm.id(), + self.code, + publisher_vm_id + ); + let (base_hpa, actual_size) = ivc::subscribe_to_channel_of_publisher( + publisher_vm_id, + key, + self.vm.id(), + shm_base_gpa, + )?; + + self.vm + .map_region(shm_base_gpa, base_hpa, actual_size, MappingFlags::READ)?; + + self.vm + .write_to_guest_of(shm_base_gpa_ptr, &shm_base_gpa.as_usize())?; + self.vm.write_to_guest_of(shm_size_ptr, &actual_size)?; + + info!( + "VM[{}] HyperCall HIVC_REGISTER_SUBSCRIBER success, base GPA: {:#x}, size: {}", + self.vm.id(), + shm_base_gpa, + actual_size + ); + + Ok(0) + } + HyperCallCode::HIVCUnSubscribChannel => { + let publisher_vm_id = self.args[0] as usize; + let key = self.args[1] as usize; + + info!( + "VM[{}] HyperCall {:?} from VM[{}]", + self.vm.id(), + self.code, + publisher_vm_id + ); + let (base_gpa, size) = + ivc::unsubscribe_from_channel_of_publisher(publisher_vm_id, key, self.vm.id())?; + self.vm.unmap_region(base_gpa, size)?; + + Ok(0) } _ => { warn!("Unsupported hypercall code: {:?}", self.code); diff --git a/src/vmm/ivc.rs b/src/vmm/ivc.rs index 064392e9..9a5072e5 100644 --- a/src/vmm/ivc.rs +++ b/src/vmm/ivc.rs @@ -1,18 +1,159 @@ //! Inter-VM communication (IVC) module. +use alloc::collections::BTreeMap; use alloc::vec::Vec; -use axaddrspace::HostPhysAddr; +use std::os::arceos::modules::axhal::paging::PagingHandlerImpl; +use std::sync::Mutex; + +use axaddrspace::{GuestPhysAddr, HostPhysAddr}; use axerrno::AxResult; use page_table_multiarch::PagingHandler; +/// A global btree map to store IVC channels, +/// indexed by (publisher_vm_id, channel_key). +static IVC_CHANNELS: Mutex>> = + Mutex::new(BTreeMap::new()); + +pub fn insert_channel( + publisher_vm_id: usize, + channel: IVCChannel, +) -> AxResult<()> { + let mut channels = IVC_CHANNELS.lock(); + if channels + .insert((publisher_vm_id, channel.key), channel) + .is_some() + { + Err(axerrno::ax_err_type!( + AlreadyExists, + "IVC channel already exists" + )) + } else { + Ok(()) + } +} + +pub fn remove_channel( + publisher_vm_id: usize, + key: usize, +) -> AxResult> { + IVC_CHANNELS + .lock() + .remove(&(publisher_vm_id, key)) + .ok_or_else(|| { + axerrno::ax_err_type!( + NotFound, + format!( + "IVC channel for publisher VM {} with key {} not found", + publisher_vm_id, key + ) + ) + }) +} + +/// Subcribe to a channel of a publisher VM with the given key, +/// return the shared region base address and size. +pub fn subscribe_to_channel_of_publisher<'a>( + publisher_vm_id: usize, + key: usize, + subscriber_vm_id: usize, + subscriber_gpa: GuestPhysAddr, +) -> AxResult<(HostPhysAddr, usize)> { + let mut channels = IVC_CHANNELS.lock(); + if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { + if channel.key == key { + // Add the subscriber VM ID to the channel. + channel.add_subscriber(subscriber_vm_id, subscriber_gpa); + Ok((channel.base_hpa(), channel.size())) + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!( + "IVC channel with key {} not matched for publisher VM {}", + key, publisher_vm_id + ) + )) + } + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!("IVC channel for publisher VM {} not found", publisher_vm_id) + )) + } +} + +pub fn unsubscribe_from_channel_of_publisher( + publisher_vm_id: usize, + key: usize, + subscriber_vm_id: usize, +) -> AxResult<(GuestPhysAddr, usize)> { + let mut channels = IVC_CHANNELS.lock(); + if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { + // Remove the subscriber VM ID from the channel. + if let Some(subscriber_gpa) = channel.remove_subscriber(subscriber_vm_id) { + Ok((subscriber_gpa, channel.size())) + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!( + "Subscriber VM {} not found in channel for publisher VM[{}] Key {:?}", + subscriber_vm_id, publisher_vm_id, key + ) + )) + } + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!("IVC channel for publisher VM {} not found", publisher_vm_id) + )) + } +} + pub struct IVCChannel { publisher_vm_id: usize, - subscriber_vms: Vec, + key: usize, + /// A list of subscriber VM IDs that are subscribed to this channel. + /// The key is the subscriber VM ID, and the value is the base address of the shared region in + /// guest physical address of the subscriber VM. + subscriber_vms: BTreeMap, shared_region_base: HostPhysAddr, shared_region_size: usize, + /// The base address of the shared memory region in guest physical address of the publisher VM. + base_gpa: GuestPhysAddr, _phatom: core::marker::PhantomData, } +#[repr(C)] +pub struct IVCChannelHeader { + pub publisher_id: u64, + pub key: u64, + pub content_size: u64, +} + +impl IVCChannel { + pub fn header(&self) -> &IVCChannelHeader { + unsafe { + // Map the shared region base to the header structure. + &*H::phys_to_virt(self.shared_region_base).as_mut_ptr_of::() + } + } + + pub fn header_mut(&mut self) -> &mut IVCChannelHeader { + unsafe { + // Map the shared region base to the mutable header structure. + &mut *H::phys_to_virt(self.shared_region_base).as_mut_ptr_of::() + } + } + + pub fn data_region(&self) -> *const u8 { + unsafe { + // Return a pointer to the data region, which starts after the header. + H::phys_to_virt(self.shared_region_base) + .as_mut_ptr() + .add(core::mem::size_of::()) + } + } +} + impl core::fmt::Debug for IVCChannel { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!( @@ -38,51 +179,63 @@ impl Drop for IVCChannel { } impl IVCChannel { - pub fn alloc(published_vm_id: usize, shared_region_size: usize) -> AxResult { + pub fn alloc( + publisher_vm_id: usize, + key: usize, + shared_region_size: usize, + base_gpa: GuestPhysAddr, + ) -> AxResult { // TODO: support larger shared region sizes with alloc_frames API. let shared_region_size = shared_region_size.min(4096); let shared_region_base = H::alloc_frame().ok_or_else(|| { axerrno::ax_err_type!(NoMemory, "Failed to allocate shared region frame") })?; - Ok(Self { - publisher_vm_id: published_vm_id, - subscriber_vms: Vec::new(), + let mut channel = IVCChannel { + publisher_vm_id, + key, + subscriber_vms: BTreeMap::new(), shared_region_base, shared_region_size, + base_gpa, _phatom: core::marker::PhantomData, - }) + }; + + channel.header_mut().publisher_id = publisher_vm_id as u64; + channel.header_mut().key = key as u64; + channel.header_mut().content_size = 0; + + debug!("Allocated IVCChannel: {:?}", channel); + + Ok(channel) } pub fn base_hpa(&self) -> HostPhysAddr { self.shared_region_base } - pub fn size(&self) -> usize { - self.shared_region_size + pub fn base_gpa_in_publisher(&self) -> GuestPhysAddr { + self.base_gpa } - pub fn publisher_vm_id(&self) -> usize { - self.publisher_vm_id + pub fn size(&self) -> usize { + self.shared_region_size } - pub fn add_subscriber(&mut self, subscriber_vm_id: usize) { - if !self.subscriber_vms.contains(&subscriber_vm_id) { - self.subscriber_vms.push(subscriber_vm_id); + pub fn add_subscriber(&mut self, subscriber_vm_id: usize, subscriber_gpa: GuestPhysAddr) { + if !self.subscriber_vms.contains_key(&subscriber_vm_id) { + self.subscriber_vms.insert(subscriber_vm_id, subscriber_gpa); } } - pub fn remove_subscriber(&mut self, subscriber_vm_id: usize) { - if let Some(pos) = self - .subscriber_vms - .iter() - .position(|&id| id == subscriber_vm_id) - { - self.subscriber_vms.remove(pos); - } + pub fn remove_subscriber(&mut self, subscriber_vm_id: usize) -> Option { + self.subscriber_vms.remove(&subscriber_vm_id) } - pub fn subscribers(&self) -> &[usize] { - &self.subscriber_vms + pub fn subscribers(&self) -> Vec<(usize, GuestPhysAddr)> { + self.subscriber_vms + .iter() + .map(|(vm_id, gpa)| (*vm_id, *gpa)) + .collect() } } diff --git a/src/vmm/mod.rs b/src/vmm/mod.rs index 7840f43c..1aca330e 100644 --- a/src/vmm/mod.rs +++ b/src/vmm/mod.rs @@ -1,11 +1,11 @@ mod config; +mod hvc; mod images; +mod ivc; #[allow(unused)] //TODO: remove this with "irq" feature. mod timer; mod vcpus; mod vm_list; -mod hvc; -mod ivc; use std::os::arceos::api::task::{self, AxWaitQueueHandle}; diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 10c58111..bb21ac5d 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -303,7 +303,7 @@ fn vcpu_run() { -1 } }; - // vcpu.set_return_value(ret_val as usize); + vcpu.set_return_value(ret_val as usize); } Err(err) => { warn!("Hypercall [{:#x}] failed: {:?}", nr, err); From 1e9b6f91aebb03fb4e55b86cf22e1c6fb2097742 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Tue, 10 Jun 2025 21:11:58 +0800 Subject: [PATCH 36/62] [feat] support simplex inter-VM communication channel --- Boot-on-qemu.md | 31 +++++++++++++++++++++++++++---- configs/vms/arceos-aarch64.toml | 2 +- src/vmm/ivc.rs | 27 ++++++++++++--------------- 3 files changed, 40 insertions(+), 20 deletions(-) diff --git a/Boot-on-qemu.md b/Boot-on-qemu.md index b2a5ecab..d5b42545 100644 --- a/Boot-on-qemu.md +++ b/Boot-on-qemu.md @@ -4,14 +4,37 @@ ```bash ./tool/dev_env.py cd crates/arceos && git checkout rk3588_jd4_qemu -cd crates/axvm && git checkout dtb -cd crates/arm_vcpu && git checkout 4_level_paging +cd crates/axvm && git checkout ivc +cd crates/axvcpu && git checkout ivc +cd crates/arm_vcpu && git checkout ivc_and_4lpt cd crates/axaddrspace && git checkout 4_level_paging +cd crates/axhvc && git checkout ivc ``` ```bash -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/hky/workspace/Linux/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y +make ARCH=aarch64 LOG=info VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/hky/workspace/Linux/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y telnet localhost 4321 -``` \ No newline at end of file +``` + +## Test AxVisor IVC + +* Compile arceos ivc tester as guest VM 2 + +repo: https://github.com/arceos-hypervisor/arceos/tree/ivc_tester + +```bash +make ARCH=aarch64 A=examples/ivc_tester defconfig +make ARCH=aarch64 A=examples/ivc_tester build +# You can get `examples/ivc_tester/ivc_tester_aarch64-qemu-virt.bin`, +# whose path should be set to `kernel_path` field in `configs/vms/arceos-aarch64.toml`. +``` + +* Build and install axvisor-driver + +```bash +git clone git@github.com:arceos-hypervisor/axvisor-tools.git --branch ivc +``` + +see its [README](https://github.com/arceos-hypervisor/axvisor-tools/blob/ivc/axvisor-driver/README.md) about how to compile it and how to subscribe messages from guest ArceOS's ivc publisher. diff --git a/configs/vms/arceos-aarch64.toml b/configs/vms/arceos-aarch64.toml index 47271868..bdcf16b9 100644 --- a/configs/vms/arceos-aarch64.toml +++ b/configs/vms/arceos-aarch64.toml @@ -22,7 +22,7 @@ entry_point = 0x4020_0000 # Load from file system. image_location = "memory" # The file path of the kernel image. -kernel_path = "/home/hky/workspace/arceos/axvisor/crates/arceos/examples/helloworld/helloworld_aarch64-qemu-virt_1.bin" +kernel_path = "/home/hky/workspace/arceos/arceos/examples/ivc_tester/ivc_tester_aarch64-qemu-virt.bin" # The load address of the kernel image. kernel_load_addr = 0x4020_0000 ## Load from memory diff --git a/src/vmm/ivc.rs b/src/vmm/ivc.rs index 9a5072e5..7d16d387 100644 --- a/src/vmm/ivc.rs +++ b/src/vmm/ivc.rs @@ -60,27 +60,22 @@ pub fn subscribe_to_channel_of_publisher<'a>( ) -> AxResult<(HostPhysAddr, usize)> { let mut channels = IVC_CHANNELS.lock(); if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { - if channel.key == key { - // Add the subscriber VM ID to the channel. - channel.add_subscriber(subscriber_vm_id, subscriber_gpa); - Ok((channel.base_hpa(), channel.size())) - } else { - Err(axerrno::ax_err_type!( - NotFound, - format!( - "IVC channel with key {} not matched for publisher VM {}", - key, publisher_vm_id - ) - )) - } + // Add the subscriber VM ID to the channel. + channel.add_subscriber(subscriber_vm_id, subscriber_gpa); + Ok((channel.base_hpa(), channel.size())) } else { Err(axerrno::ax_err_type!( NotFound, - format!("IVC channel for publisher VM {} not found", publisher_vm_id) + format!( + "IVC channel for publisher VM [{}] key {:#x} not found", + publisher_vm_id, key + ) )) } } +/// Unsubscribe from a channel of a publisher VM with the given key, +/// return the shared region base address and size. pub fn unsubscribe_from_channel_of_publisher( publisher_vm_id: usize, key: usize, @@ -95,7 +90,7 @@ pub fn unsubscribe_from_channel_of_publisher( Err(axerrno::ax_err_type!( NotFound, format!( - "Subscriber VM {} not found in channel for publisher VM[{}] Key {:?}", + "VM[{}] tries to subcriber non-existed channel publisher VM[{}] Key {:#x}", subscriber_vm_id, publisher_vm_id, key ) )) @@ -130,6 +125,7 @@ pub struct IVCChannelHeader { } impl IVCChannel { + #[allow(unused)] pub fn header(&self) -> &IVCChannelHeader { unsafe { // Map the shared region base to the header structure. @@ -144,6 +140,7 @@ impl IVCChannel { } } + #[allow(unused)] pub fn data_region(&self) -> *const u8 { unsafe { // Return a pointer to the data region, which starts after the header. From 41957ee55ae143461d1be3a7a34bece918bd8b6b Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 11 Jun 2025 16:18:15 +0800 Subject: [PATCH 37/62] [MILESTONE] working version of 2 Linux VMs on QEMU The first VM has almost everything from QEMU, the second has only a GITS-deprived GICv3 and a serial, with a initramfs. --- .gitignore | 3 + Cargo.lock | 108 ++++- Cargo.toml | 20 + Makefile | 1 + configs/platforms/aarch64-qemu-virt-hv.toml | 10 +- configs/vms/linux-qemu-aarch64-gicv3-a.toml | 75 ++++ configs/vms/linux-qemu-aarch64-gicv3-b.toml | 79 ++++ configs/vms/linux-qemu_gicv3-b.dts | 414 ++++++++++++++++++++ configs/vms/linux-qemu_gicv3.dts | 411 +++++++++++++++++++ scripts/make/qemu.mk | 21 +- src/hal.rs | 35 +- src/vmm/mod.rs | 1 + 12 files changed, 1144 insertions(+), 34 deletions(-) create mode 100644 configs/vms/linux-qemu-aarch64-gicv3-a.toml create mode 100644 configs/vms/linux-qemu-aarch64-gicv3-b.toml create mode 100644 configs/vms/linux-qemu_gicv3-b.dts create mode 100644 configs/vms/linux-qemu_gicv3.dts diff --git a/.gitignore b/.gitignore index ae6943b0..f37efa7f 100644 --- a/.gitignore +++ b/.gitignore @@ -22,3 +22,6 @@ rusty-tags.vi # tools should be downloaded from github tools/* + +# initramfs +*.cpio.gz diff --git a/Cargo.lock b/Cargo.lock index adc4b7f6..d9182075 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,7 +117,6 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", "axconfig", @@ -134,6 +133,18 @@ dependencies = [ "axtask", ] +[[package]] +name = "arm-gic-driver" +version = "0.13.0" +dependencies = [ + "aarch64-cpu 10.0.0", + "bitflags 2.9.0", + "enum_dispatch", + "log", + "rdif-intc", + "tock-registers 0.9.0", +] + [[package]] name = "arm_gicv2" version = "0.1.0" @@ -154,10 +165,10 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=debin%2Ftimer_api#4017f66587dc3c491987c92a8589ab86257d59ac" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", + "arm_vgic", "axaddrspace", "axdevice_base", "axerrno", @@ -173,19 +184,30 @@ dependencies = [ [[package]] name = "arm_vgic" version = "0.0.0" -source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=debin%2Ftimer_api#e1b039b7452ea387ee408fa4020542ba7134866c" dependencies = [ "arm_gicv2", "axaddrspace", "axdevice_base", "axerrno", "axvisor_api", + "bitmaps", "log", "memory_addr", "spin", "tock-registers 0.8.1", ] +[[package]] +name = "async-trait" +version = "0.1.88" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e539d3fca749fcee5236ab05e93a52867dd549cc157c8cb7f99595f3cedffdb5" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "autocfg" version = "1.4.0" @@ -195,7 +217,6 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -213,7 +234,6 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "allocator", "axerrno", @@ -226,7 +246,6 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axconfig-gen-macros", ] @@ -283,7 +302,6 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", "axconfig", @@ -341,7 +359,6 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", "axdriver", @@ -358,7 +375,6 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axdriver", "axdriver_block", @@ -412,9 +428,9 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "aarch64-cpu 10.0.0", + "arm-gic-driver", "arm_gicv2", "arm_pl011", "axalloc", @@ -461,7 +477,6 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axconfig", "axhal", @@ -474,7 +489,6 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "cfg-if", "crate_interface", @@ -485,7 +499,6 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", "axconfig", @@ -501,7 +514,6 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "crate_interface", "lazyinit", @@ -510,7 +522,6 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axalloc", "axconfig", @@ -531,7 +542,6 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "arceos_api", "axerrno", @@ -543,7 +553,6 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axtask", "kspin", @@ -552,7 +561,6 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#1341bedc09fc28c093cab5a25518bfae6387f79a" dependencies = [ "axconfig", "axhal", @@ -637,7 +645,6 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt#605c6bd93962259021d0dfb9769eac6162edfb29" dependencies = [ "arm_vcpu", "axaddrspace", @@ -902,6 +909,18 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89" +[[package]] +name = "enum_dispatch" +version = "0.3.13" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "aa18ce2bc66555b3218614519ac839ddb759a7d6720732f979ef8d13be147ecd" +dependencies = [ + "once_cell", + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "equivalent" version = "1.0.2" @@ -1233,6 +1252,37 @@ dependencies = [ "bitflags 2.9.0", ] +[[package]] +name = "rdif-base" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1eebdadebd31279dc6e240fef7bb0341ef09de1be05463553a11f1cfe1e9279a" +dependencies = [ + "async-trait", + "rdif-def", + "thiserror", +] + +[[package]] +name = "rdif-def" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c238eb44d86fabc99028adc973f896ce2202aeb6184cc8b89863f2d157d7ca06" +dependencies = [ + "thiserror", +] + +[[package]] +name = "rdif-intc" +version = "0.10.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c38f384a6e9001670f74ccf5c69ad2becfe29ae72a4469d6250041b280a4822d" +dependencies = [ + "cfg-if", + "rdif-base", + "thiserror", +] + [[package]] name = "regex" version = "1.11.1" @@ -1540,6 +1590,26 @@ dependencies = [ "unicode-ident", ] +[[package]] +name = "thiserror" +version = "2.0.12" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "567b8a2dae586314f7be2a752ec7474332959c6460e02bde30d702a66d488708" +dependencies = [ + "thiserror-impl", +] + +[[package]] +name = "thiserror-impl" +version = "2.0.12" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7f7cf42b4507d8ea322120659672cf1b9dbb93f8f2d4ecfd6e51350ff5b17a1d" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "timer_list" version = "0.1.0" diff --git a/Cargo.toml b/Cargo.toml index 5450eb45..4febe574 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -32,6 +32,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "deb "hv", "multitask", "smp", + "gicv3" # "sched_rr" ] } @@ -91,3 +92,22 @@ syn = "2.0" # "irq" # ]} # axconfig = { path = "../arceos-new/modules/axconfig" } + +[patch."https://github.com/arceos-hypervisor/arm_vcpu.git"] +arm_vcpu = { path = "../arm_vcpu" } + +[patch."https://github.com/arceos-hypervisor/arm_vgic.git"] +arm_vgic = { path = "../arm_vgic" } + +[patch."https://github.com/arceos-hypervisor/axvm.git"] +axvm = { path = "../axvm" } + +[patch."https://github.com/arceos-hypervisor/arceos.git"] +axstd = { path = "../arceos/ulib/axstd" } +axconfig = { path = "../arceos/modules/axconfig" } + +[patch."https://github.com/rcore-os/arm-gic-driver"] +arm-gic-driver = { path = "../arm-gic-driver" } + +[patch."https://github.com/arceos-hypervisor/axaddrspace.git"] +axaddrspace = { path = "../axaddrspace" } diff --git a/Makefile b/Makefile index 38d60386..c77bde43 100644 --- a/Makefile +++ b/Makefile @@ -39,6 +39,7 @@ SMP ?= 1 MODE ?= release LOG ?= warn V ?= +GICV3 ?= n EXTRA_CONFIG ?= OUT_CONFIG ?= $(PWD)/.axconfig.toml diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index a27b09e8..7c55124e 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -13,7 +13,7 @@ family = "aarch64-qemu-virt" # str # Base address of the whole physical memory. phys-memory-base = 0x4000_0000 # uint # Size of the whole physical memory. (2GB) -phys-memory-size = 0x8000_0000 # uint +phys-memory-size = 0x1_0000_0000 # uint # Base physical address of the kernel image. kernel-base-paddr = 0x4008_0000 # uint # Base virtual address of the kernel image. @@ -38,7 +38,8 @@ mmio-regions = [ [0x0900_0000, 0x1000], # PL011 UART1 [0x0904_0000, 0x1000], # PL011 UART2 [0x0910_0000, 0x1000], # PL031 RTC - [0x0800_0000, 0x5_0000], # GICv2 + # [0x0800_0000, 0x5_0000], # GICv2 + [0x0800_0000, 0x100_0000], # GICv3 [0x0a00_0000, 0x4000], # VirtIO [0x1000_0000, 0x2eff_0000], # PCI memory ranges (ranges 1: 32-bit MMIO space) [0x40_1000_0000, 0x1000_0000], # PCI config space @@ -97,8 +98,9 @@ uart-irq = 1 # uint gicc-paddr = 0x0801_0000 # uint # GIC Distributor base address gicd-paddr = 0x0800_0000 # uint -gicv-paddr = 0x0804_0000 -gich-paddr = 0x0803_0000 +gicv-paddr = 0x0804_0000 # uint +gich-paddr = 0x0803_0000 # uint +gicr-paddr = 0x080a_0000 # uint # PSCI psci-method = "smc" # str diff --git a/configs/vms/linux-qemu-aarch64-gicv3-a.toml b/configs/vms/linux-qemu-aarch64-gicv3-a.toml new file mode 100644 index 00000000..95642466 --- /dev/null +++ b/configs/vms/linux-qemu-aarch64-gicv3-a.toml @@ -0,0 +1,75 @@ +# Vm base info configs +# +[base] +# Guest vm id. +id = 1 +# Guest vm name. +name = "linux-qemu" +# Virtualization type. +vm_type = 1 +# The number of virtual CPUs. +cpu_num = 1 +# Guest vm physical cpu sets. +phys_cpu_sets = [1] +phys_cpu_ids = [0] + +# +# Vm kernel configs +# +[kernel] +# The entry point of the kernel image. +entry_point = 0x8008_0000 +# The location of image: "memory" | "fs". +# load from memory. +image_location = "memory" +# The file path of the kernel image. +kernel_path = "linux-6.6.62.bin" +# The load address of the kernel image. +kernel_load_addr = 0x8008_0000 +# The file path of the device tree blob (DTB). +dtb_path = "linux-qemu_gicv3.dtb" +# The load address of the device tree blob (DTB). +dtb_load_addr = 0x8000_0000 + +## load from file system +# image_location = "fs" +## The file path of the kernel image. +# kernel_path = "linux-arceos-aarch64.bin" +## The file path of the device tree blob (DTB). +# dtb_path = "linux-rk3588.dtb" + +## The file path of the ramdisk image. +# ramdisk_path = "" +## The load address of the ramdisk image. +# ramdisk_load_addr = 0 +## The path of the disk image. +# disk_path = "disk.img" + +# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). +# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. +memory_regions = [ + [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL +] + +# +# Device specifications +# +[devices] +# Pass-through devices. +passthrough_devices = [ + # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], + # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], + # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], + # a003000.virtio_mmio virtio_mmio@a003000 + # a003200.virtio_mmio virtio_mmio@a003200 + # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], + ["low-devices", 0x0, 0x0, 0x0800_0000, 0x1], + ["low-devices2", 0x09000000, 0x09000000, 0x1000_0000, 0x1], + ["pci", 0x8000000000, 0x8000000000, 0x10000, 0x1], + ["pci", 0x4010000000, 0x4010000000, 0x100000, 0x1], +] + +# Emu_devices. +# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. +emu_devices = [] \ No newline at end of file diff --git a/configs/vms/linux-qemu-aarch64-gicv3-b.toml b/configs/vms/linux-qemu-aarch64-gicv3-b.toml new file mode 100644 index 00000000..d080a791 --- /dev/null +++ b/configs/vms/linux-qemu-aarch64-gicv3-b.toml @@ -0,0 +1,79 @@ +# Vm base info configs +# +[base] +# Guest vm id. +id = 2 +# Guest vm name. +name = "linux-qemu-b" +# Virtualization type. +vm_type = 1 +# The number of virtual CPUs. +cpu_num = 1 +# Guest vm physical cpu sets. +phys_cpu_sets = [2] +phys_cpu_ids = [1] + +# +# Vm kernel configs +# +[kernel] +# The entry point of the kernel image. +entry_point = 0xc008_0000 +# The location of image: "memory" | "fs". +# load from memory. +image_location = "memory" +# The file path of the kernel image. +kernel_path = "linux-6.6.62.bin" +# The load address of the kernel image. +kernel_load_addr = 0xc008_0000 +# The file path of the device tree blob (DTB). +dtb_path = "linux-qemu_gicv3-b.dtb" +# The load address of the device tree blob (DTB). +dtb_load_addr = 0xc000_0000 +# Use `bios` to load initramfs. +bios_path = "initramfs-busybox-arm64.cpio.gz" +bios_load_addr = 0xfe00_0000 + +## load from file system +# image_location = "fs" +## The file path of the kernel image. +# kernel_path = "linux-arceos-aarch64.bin" +## The file path of the device tree blob (DTB). +# dtb_path = "linux-rk3588.dtb" + +## The file path of the ramdisk image. +# ramdisk_path = "" +## The load address of the ramdisk image. +# ramdisk_load_addr = 0 +## The path of the disk image. +# disk_path = "disk.img" + +# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). +# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. +memory_regions = [ + [0xc000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL +] + +# +# Device specifications +# +[devices] +# Pass-through devices. +passthrough_devices = [ + # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], + # ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + # ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], + # ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], + # a003000.virtio_mmio virtio_mmio@a003000 + # a003200.virtio_mmio virtio_mmio@a003200 + # ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], + + # ["low-memory", 0x0, 0x0, 0x2000_0000, 0x1], + ["pl011@9100000", 0x910_0000, 0x910_0000, 0x1000, 0x1], + # ["pci", 0x8000000000, 0x8000000000, 0x10000, 0x1], + # ["pci", 0x4010000000, 0x4010000000, 0x100000, 0x1], +] + +# Emu_devices. +# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. +emu_devices = [] \ No newline at end of file diff --git a/configs/vms/linux-qemu_gicv3-b.dts b/configs/vms/linux-qemu_gicv3-b.dts new file mode 100644 index 00000000..d362d68d --- /dev/null +++ b/configs/vms/linux-qemu_gicv3-b.dts @@ -0,0 +1,414 @@ +/dts-v1/; + +/ { + interrupt-parent = <0x8003>; + dma-coherent; + model = "linux,dummy-virt"; + #size-cells = <0x02>; + #address-cells = <0x02>; + compatible = "linux,dummy-virt"; + + psci { + migrate = <0xc4000005>; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + method = "smc"; + compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; + }; + + memory@c0000000 { + reg = <0x00 0xc0000000 0x00 0x40000000>; + device_type = "memory"; + }; + + // platform-bus@c000000 { + // interrupt-parent = <0x8003>; + // ranges = <0x00 0x00 0xc000000 0x2000000>; + // #address-cells = <0x01>; + // #size-cells = <0x01>; + // compatible = "qemu,platform\0simple-bus"; + // }; + + // fw-cfg@9020000 { + // dma-coherent; + // reg = <0x00 0x9020000 0x00 0x18>; + // compatible = "qemu,fw-cfg-mmio"; + // }; + + // virtio_mmio@a000000 { + // dma-coherent; + // interrupts = <0x00 0x10 0x01>; + // reg = <0x00 0xa000000 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000200 { + // dma-coherent; + // interrupts = <0x00 0x11 0x01>; + // reg = <0x00 0xa000200 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000400 { + // dma-coherent; + // interrupts = <0x00 0x12 0x01>; + // reg = <0x00 0xa000400 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000600 { + // dma-coherent; + // interrupts = <0x00 0x13 0x01>; + // reg = <0x00 0xa000600 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000800 { + // dma-coherent; + // interrupts = <0x00 0x14 0x01>; + // reg = <0x00 0xa000800 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000a00 { + // dma-coherent; + // interrupts = <0x00 0x15 0x01>; + // reg = <0x00 0xa000a00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000c00 { + // dma-coherent; + // interrupts = <0x00 0x16 0x01>; + // reg = <0x00 0xa000c00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a000e00 { + // dma-coherent; + // interrupts = <0x00 0x17 0x01>; + // reg = <0x00 0xa000e00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001000 { + // dma-coherent; + // interrupts = <0x00 0x18 0x01>; + // reg = <0x00 0xa001000 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001200 { + // dma-coherent; + // interrupts = <0x00 0x19 0x01>; + // reg = <0x00 0xa001200 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001400 { + // dma-coherent; + // interrupts = <0x00 0x1a 0x01>; + // reg = <0x00 0xa001400 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001600 { + // dma-coherent; + // interrupts = <0x00 0x1b 0x01>; + // reg = <0x00 0xa001600 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001800 { + // dma-coherent; + // interrupts = <0x00 0x1c 0x01>; + // reg = <0x00 0xa001800 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001a00 { + // dma-coherent; + // interrupts = <0x00 0x1d 0x01>; + // reg = <0x00 0xa001a00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001c00 { + // dma-coherent; + // interrupts = <0x00 0x1e 0x01>; + // reg = <0x00 0xa001c00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a001e00 { + // dma-coherent; + // interrupts = <0x00 0x1f 0x01>; + // reg = <0x00 0xa001e00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002000 { + // dma-coherent; + // interrupts = <0x00 0x20 0x01>; + // reg = <0x00 0xa002000 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002200 { + // dma-coherent; + // interrupts = <0x00 0x21 0x01>; + // reg = <0x00 0xa002200 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002400 { + // dma-coherent; + // interrupts = <0x00 0x22 0x01>; + // reg = <0x00 0xa002400 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002600 { + // dma-coherent; + // interrupts = <0x00 0x23 0x01>; + // reg = <0x00 0xa002600 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002800 { + // dma-coherent; + // interrupts = <0x00 0x24 0x01>; + // reg = <0x00 0xa002800 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002a00 { + // dma-coherent; + // interrupts = <0x00 0x25 0x01>; + // reg = <0x00 0xa002a00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002c00 { + // dma-coherent; + // interrupts = <0x00 0x26 0x01>; + // reg = <0x00 0xa002c00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a002e00 { + // dma-coherent; + // interrupts = <0x00 0x27 0x01>; + // reg = <0x00 0xa002e00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003000 { + // dma-coherent; + // interrupts = <0x00 0x28 0x01>; + // reg = <0x00 0xa003000 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003200 { + // dma-coherent; + // interrupts = <0x00 0x29 0x01>; + // reg = <0x00 0xa003200 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003400 { + // dma-coherent; + // interrupts = <0x00 0x2a 0x01>; + // reg = <0x00 0xa003400 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003600 { + // dma-coherent; + // interrupts = <0x00 0x2b 0x01>; + // reg = <0x00 0xa003600 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003800 { + // dma-coherent; + // interrupts = <0x00 0x2c 0x01>; + // reg = <0x00 0xa003800 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003a00 { + // dma-coherent; + // interrupts = <0x00 0x2d 0x01>; + // reg = <0x00 0xa003a00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003c00 { + // dma-coherent; + // interrupts = <0x00 0x2e 0x01>; + // reg = <0x00 0xa003c00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // virtio_mmio@a003e00 { + // dma-coherent; + // interrupts = <0x00 0x2f 0x01>; + // reg = <0x00 0xa003e00 0x00 0x200>; + // compatible = "virtio,mmio"; + // }; + + // gpio-keys { + // compatible = "gpio-keys"; + + // poweroff { + // gpios = <0x8005 0x03 0x00>; + // linux,code = <0x74>; + // label = "GPIO Key Poweroff"; + // }; + // }; + + // pl061@9030000 { + // phandle = <0x8005>; + // clock-names = "apb_pclk"; + // clocks = <0x8000>; + // interrupts = <0x00 0x07 0x04>; + // gpio-controller; + // #gpio-cells = <0x02>; + // compatible = "arm,pl061\0arm,primecell"; + // reg = <0x00 0x9030000 0x00 0x1000>; + // }; + + // pcie@10000000 { + // interrupt-map-mask = <0x1800 0x00 0x00 0x07>; + // interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x05 0x04>; + // #interrupt-cells = <0x01>; + // ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; + // // reg = <0x40 0x10000000 0x00 0x10000000>; + // reg = <0x00 0x10000000>; + // msi-map = <0x00 0x8004 0x00 0x10000>; + // dma-coherent; + // bus-range = <0x00 0xff>; + // linux,pci-domain = <0x00>; + // #size-cells = <0x02>; + // #address-cells = <0x03>; + // device_type = "pci"; + // compatible = "pci-host-ecam-generic"; + // }; + + // pl031@9010000 { + // clock-names = "apb_pclk"; + // clocks = <0x8000>; + // interrupts = <0x00 0x02 0x04>; + // reg = <0x00 0x9010000 0x00 0x1000>; + // compatible = "arm,pl031\0arm,primecell"; + // }; + + // pl011@9000000 { + // clock-names = "uartclk\0apb_pclk"; + // clocks = <0x8000 0x8000>; + // interrupts = <0x00 0x01 0x04>; + // reg = <0x00 0x9000000 0x00 0x1000>; + // compatible = "arm,pl011\0arm,primecell"; + // }; + + pl011@9100000 { + clock-names = "uartclk\0apb_pclk"; + clocks = <0x8000 0x8000>; + interrupts = <0x00 0x0a 0x04>; + reg = <0x00 0x9100000 0x00 0x1000>; + compatible = "arm,pl011\0arm,primecell"; + }; + + pmu { + interrupts = <0x01 0x07 0x04>; + compatible = "arm,armv8-pmuv3"; + }; + + intc@8000000 { + phandle = <0x8003>; + interrupts = <0x01 0x09 0x04>; + reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80c0000 0x00 0xf60000>; + #redistributor-regions = <0x01>; + compatible = "arm,gic-v3"; + ranges; + #size-cells = <0x02>; + #address-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x03>; + + // its@8080000 { + // phandle = <0x8004>; + // reg = <0x00 0x8080000 0x00 0x20000>; + // #msi-cells = <0x01>; + // msi-controller; + // compatible = "arm,gic-v3-its"; + // }; + }; + + // flash@0 { + // bank-width = <0x04>; + // reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; + // compatible = "cfi-flash"; + // }; + + cpus { + #size-cells = <0x00>; + #address-cells = <0x01>; + + cpu-map { + + socket0 { + + cluster0 { + + core0 { + cpu = <0x8001>; + }; + + //core1 { + // cpu = <0x8001>; + //}; + }; + }; + }; + + cpu@0 { + phandle = <0x8001>; + reg = <0x01>; + enable-method = "psci"; + compatible = "arm,cortex-a57"; + device_type = "cpu"; + }; + }; + + timer { + interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; + always-on; + compatible = "arm,armv8-timer\0arm,armv7-timer"; + }; + + apb-pclk { + phandle = <0x8000>; + clock-output-names = "clk24mhz"; + clock-frequency = <0x16e3600>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + }; + + aliases { + serial0 = "/pl011@9100000"; + }; + + chosen { + // initrd-start = <0xfe000000>; + // initrd-end = <0xff000000>; + // bootargs = "earlycon console=ttyAMA0 root=/dev/ram rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; + bootargs = "earlycon console=ttyAMA0 initrd=0xfe000000,0x1000000 audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; + stdout-path = "/pl011@9100000"; + rng-seed = <0x79361ef3 0x1a4e5964 0x9fb01da 0x749b376f 0x7036ec7c 0xdea25f0c 0x79d7ee4e 0xe2e216af>; + kaslr-seed = <0x2758c1 0xf528d3d5>; + }; +}; diff --git a/configs/vms/linux-qemu_gicv3.dts b/configs/vms/linux-qemu_gicv3.dts new file mode 100644 index 00000000..d6309569 --- /dev/null +++ b/configs/vms/linux-qemu_gicv3.dts @@ -0,0 +1,411 @@ +/dts-v1/; + +/ { + interrupt-parent = <0x8003>; + dma-coherent; + model = "linux,dummy-virt"; + #size-cells = <0x02>; + #address-cells = <0x02>; + compatible = "linux,dummy-virt"; + + psci { + migrate = <0xc4000005>; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + method = "smc"; + compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci"; + }; + + memory@40000000 { + reg = <0x00 0x80000000 0x00 0x40000000>; + device_type = "memory"; + }; + + platform-bus@c000000 { + interrupt-parent = <0x8003>; + ranges = <0x00 0x00 0xc000000 0x2000000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "qemu,platform\0simple-bus"; + }; + + fw-cfg@9020000 { + dma-coherent; + reg = <0x00 0x9020000 0x00 0x18>; + compatible = "qemu,fw-cfg-mmio"; + }; + + virtio_mmio@a000000 { + dma-coherent; + interrupts = <0x00 0x10 0x01>; + reg = <0x00 0xa000000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000200 { + dma-coherent; + interrupts = <0x00 0x11 0x01>; + reg = <0x00 0xa000200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000400 { + dma-coherent; + interrupts = <0x00 0x12 0x01>; + reg = <0x00 0xa000400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000600 { + dma-coherent; + interrupts = <0x00 0x13 0x01>; + reg = <0x00 0xa000600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000800 { + dma-coherent; + interrupts = <0x00 0x14 0x01>; + reg = <0x00 0xa000800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000a00 { + dma-coherent; + interrupts = <0x00 0x15 0x01>; + reg = <0x00 0xa000a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000c00 { + dma-coherent; + interrupts = <0x00 0x16 0x01>; + reg = <0x00 0xa000c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000e00 { + dma-coherent; + interrupts = <0x00 0x17 0x01>; + reg = <0x00 0xa000e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001000 { + dma-coherent; + interrupts = <0x00 0x18 0x01>; + reg = <0x00 0xa001000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001200 { + dma-coherent; + interrupts = <0x00 0x19 0x01>; + reg = <0x00 0xa001200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001400 { + dma-coherent; + interrupts = <0x00 0x1a 0x01>; + reg = <0x00 0xa001400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001600 { + dma-coherent; + interrupts = <0x00 0x1b 0x01>; + reg = <0x00 0xa001600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001800 { + dma-coherent; + interrupts = <0x00 0x1c 0x01>; + reg = <0x00 0xa001800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001a00 { + dma-coherent; + interrupts = <0x00 0x1d 0x01>; + reg = <0x00 0xa001a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001c00 { + dma-coherent; + interrupts = <0x00 0x1e 0x01>; + reg = <0x00 0xa001c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001e00 { + dma-coherent; + interrupts = <0x00 0x1f 0x01>; + reg = <0x00 0xa001e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002000 { + dma-coherent; + interrupts = <0x00 0x20 0x01>; + reg = <0x00 0xa002000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002200 { + dma-coherent; + interrupts = <0x00 0x21 0x01>; + reg = <0x00 0xa002200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002400 { + dma-coherent; + interrupts = <0x00 0x22 0x01>; + reg = <0x00 0xa002400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002600 { + dma-coherent; + interrupts = <0x00 0x23 0x01>; + reg = <0x00 0xa002600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002800 { + dma-coherent; + interrupts = <0x00 0x24 0x01>; + reg = <0x00 0xa002800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002a00 { + dma-coherent; + interrupts = <0x00 0x25 0x01>; + reg = <0x00 0xa002a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002c00 { + dma-coherent; + interrupts = <0x00 0x26 0x01>; + reg = <0x00 0xa002c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002e00 { + dma-coherent; + interrupts = <0x00 0x27 0x01>; + reg = <0x00 0xa002e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003000 { + dma-coherent; + interrupts = <0x00 0x28 0x01>; + reg = <0x00 0xa003000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003200 { + dma-coherent; + interrupts = <0x00 0x29 0x01>; + reg = <0x00 0xa003200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003400 { + dma-coherent; + interrupts = <0x00 0x2a 0x01>; + reg = <0x00 0xa003400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003600 { + dma-coherent; + interrupts = <0x00 0x2b 0x01>; + reg = <0x00 0xa003600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003800 { + dma-coherent; + interrupts = <0x00 0x2c 0x01>; + reg = <0x00 0xa003800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003a00 { + dma-coherent; + interrupts = <0x00 0x2d 0x01>; + reg = <0x00 0xa003a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003c00 { + dma-coherent; + interrupts = <0x00 0x2e 0x01>; + reg = <0x00 0xa003c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003e00 { + dma-coherent; + interrupts = <0x00 0x2f 0x01>; + reg = <0x00 0xa003e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + poweroff { + gpios = <0x8005 0x03 0x00>; + linux,code = <0x74>; + label = "GPIO Key Poweroff"; + }; + }; + + pl061@9030000 { + phandle = <0x8005>; + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x07 0x04>; + gpio-controller; + #gpio-cells = <0x02>; + compatible = "arm,pl061\0arm,primecell"; + reg = <0x00 0x9030000 0x00 0x1000>; + }; + + pcie@10000000 { + interrupt-map-mask = <0x1800 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8003 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8003 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8003 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8003 0x00 0x00 0x00 0x05 0x04>; + #interrupt-cells = <0x01>; + ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>; + reg = <0x40 0x10000000 0x00 0x10000000>; + // reg = <0x00 0x10000000>; + msi-map = <0x00 0x8004 0x00 0x10000>; + dma-coherent; + bus-range = <0x00 0xff>; + linux,pci-domain = <0x00>; + #size-cells = <0x02>; + #address-cells = <0x03>; + device_type = "pci"; + compatible = "pci-host-ecam-generic"; + }; + + pl031@9010000 { + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x02 0x04>; + reg = <0x00 0x9010000 0x00 0x1000>; + compatible = "arm,pl031\0arm,primecell"; + }; + + pl011@9040000 { + clock-names = "uartclk\0apb_pclk"; + clocks = <0x8000 0x8000>; + interrupts = <0x00 0x08 0x04>; + reg = <0x00 0x9040000 0x00 0x1000>; + compatible = "arm,pl011\0arm,primecell"; + }; + + pmu { + interrupts = <0x01 0x07 0x04>; + compatible = "arm,armv8-pmuv3"; + }; + + intc@8000000 { + phandle = <0x8003>; + interrupts = <0x01 0x09 0x04>; + reg = <0x00 0x8000000 0x00 0x10000 0x00 0x80a0000 0x00 0xf60000>; + #redistributor-regions = <0x01>; + compatible = "arm,gic-v3"; + ranges; + #size-cells = <0x02>; + #address-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x03>; + + its@8080000 { + phandle = <0x8004>; + reg = <0x00 0x8080000 0x00 0x20000>; + #msi-cells = <0x01>; + msi-controller; + compatible = "arm,gic-v3-its"; + }; + }; + + flash@0 { + bank-width = <0x04>; + reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; + compatible = "cfi-flash"; + }; + + cpus { + #size-cells = <0x00>; + #address-cells = <0x01>; + + cpu-map { + + socket0 { + + cluster0 { + + core0 { + cpu = <0x8002>; + }; + + //core1 { + // cpu = <0x8001>; + //}; + }; + }; + }; + + cpu@0 { + phandle = <0x8002>; + reg = <0x00>; + enable-method = "psci"; + compatible = "arm,cortex-a57"; + device_type = "cpu"; + }; + + //cpu@1 { + // phandle = <0x8001>; + // reg = <0x01>; + // enable-method = "psci"; + // compatible = "arm,cortex-a57"; + // device_type = "cpu"; + //}; + }; + + timer { + interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>; + always-on; + compatible = "arm,armv8-timer\0arm,armv7-timer"; + }; + + apb-pclk { + phandle = <0x8000>; + clock-output-names = "clk24mhz"; + clock-frequency = <0x16e3600>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + }; + + aliases { + serial0 = "/pl011@9040000"; + }; + + chosen { + bootargs = "earlycon console=ttyAMA0 root=/dev/vda rw audit=0 default_hugepagesz=32M hugepagesz=32M hugepages=4"; + stdout-path = "/pl011@9040000"; + rng-seed = <0x79361ef3 0x1a4e5964 0x9fb01da 0x749b376f 0x7036ec7c 0xdea25f0c 0x79d7ee4e 0xe2e216af>; + kaslr-seed = <0x2758c1 0xf528d3d5>; + }; +}; diff --git a/scripts/make/qemu.mk b/scripts/make/qemu.mk index 3225a076..a792fe6d 100644 --- a/scripts/make/qemu.mk +++ b/scripts/make/qemu.mk @@ -3,7 +3,9 @@ QEMU := qemu-system-$(ARCH) TELNET_PORT ?= 4321 +AUX_TELNET_PORT ?= 4322 SECOND_SERIAL ?= n +THIRD_SERIAL ?= n ifeq ($(BUS), mmio) vdev-suffix := device @@ -24,9 +26,14 @@ qemu_args-riscv64 := \ qemu_args-aarch64 := \ -cpu cortex-a72 \ - -machine virt,virtualization=on,gic-version=2 \ -kernel $(OUT_BIN) +ifeq ($(GICV3),y) + qemu_args-aarch64 += -machine virt,virtualization=on,gic-version=3 +else + qemu_args-aarch64 += -machine virt,virtualization=on,gic-version=2,its=on +endif + qemu_args-y := -m $(MEM) -smp $(SMP) $(qemu_args-$(ARCH)) qemu_args-$(BLK) += \ @@ -63,19 +70,23 @@ qemu_args-$(GRAPHIC) += \ ifeq ($(GRAPHIC), n) qemu_args-y += -nographic -endif - -ifeq ($(ARCH), aarch64) - qemu_args-y += -machine virtualization=on,gic-version=2 endif ifeq ($(QEMU_LOG), y) qemu_args-y += -D qemu.log -d in_asm,int,mmu,pcall,cpu_reset,guest_errors endif +ifeq ($(SECOND_SERIAL), n) + ifeq ($(THIRD_SERIAL), y) + $(error "THIRD_SERIAL cannot be set to 'y' if SECOND_SERIAL is 'n'.") + endif +endif + qemu_args-$(SECOND_SERIAL) += -serial mon:stdio \ -serial telnet:localhost:$(TELNET_PORT),server +qemu_args-$(THIRD_SERIAL) += -serial telnet:localhost:$(AUX_TELNET_PORT),server + qemu_args-debug := $(qemu_args-y) -s -S # Do not use KVM for debugging diff --git a/src/hal.rs b/src/hal.rs index a97df904..80934d30 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -129,6 +129,8 @@ pub(crate) fn enable_virtualization() { static CORES: AtomicUsize = AtomicUsize::new(0); + info!("Enabling hardware virtualization support on all cores..."); + for cpu_id in 0..config::SMP { thread::spawn(move || { // Initialize cpu affinity here. @@ -137,6 +139,8 @@ pub(crate) fn enable_virtualization() { "Initialize CPU affinity failed!" ); + info!("Enabling hardware virtualization support on core {}", cpu_id); + vmm::init_timer_percpu(); let percpu = unsafe { AXVM_PER_CPU.current_ref_mut_raw() }; @@ -153,11 +157,15 @@ pub(crate) fn enable_virtualization() { }); } + info!("Waiting for all cores to enable hardware virtualization..."); + // Wait for all cores to enable virtualization. while CORES.load(Ordering::Acquire) != config::SMP { // Use `yield_now` instead of `core::hint::spin_loop` to avoid deadlock. thread::yield_now(); } + + info!("All cores have enabled hardware virtualization support."); } #[axvisor_api::api_mod_impl(axvisor_api::memory)] @@ -265,24 +273,39 @@ mod arch_api_impl { #[cfg(target_arch = "aarch64")] extern fn read_vgicd_typer() -> u32 { - use axstd::os::arceos::modules::axhal::irq::MyVgic; - MyVgic::get_gicd().lock().get_typer() + // use axstd::os::arceos::modules::axhal::irq::MyVgic; + // MyVgic::get_gicd().lock().get_typer() + + use std::os::arceos::modules::{axconfig, axhal}; + use memory_addr::pa; + + let typer_phys_addr = axconfig::devices::GICD_PADDR + 0x4; + let typer_virt_addr = axhal::mem::phys_to_virt(pa!(typer_phys_addr)); + + unsafe { + core::ptr::read_volatile(typer_virt_addr.as_ptr_of::()) + } } #[cfg(target_arch = "aarch64")] extern fn read_vgicd_iidr() -> u32 { - use axstd::os::arceos::modules::axhal::irq::MyVgic; - MyVgic::get_gicd().lock().get_iidr() + // use axstd::os::arceos::modules::axhal::irq::MyVgic; + // MyVgic::get_gicd().lock().get_iidr() +0 } #[cfg(target_arch = "aarch64")] extern fn get_host_gicd_base() -> memory_addr::PhysAddr { - unimplemented!() + use std::os::arceos::api::config; + + config::devices::GICD_PADDR.into() } #[cfg(target_arch = "aarch64")] extern fn get_host_gicr_base() -> memory_addr::PhysAddr { - unimplemented!() + use std::os::arceos::api::config; + + config::devices::GICR_PADDR.into() } } diff --git a/src/vmm/mod.rs b/src/vmm/mod.rs index b4624e86..ab170b14 100644 --- a/src/vmm/mod.rs +++ b/src/vmm/mod.rs @@ -28,6 +28,7 @@ static VMM: AxWaitQueueHandle = AxWaitQueueHandle::new(); static RUNNING_VM_COUNT: AtomicUsize = AtomicUsize::new(0); pub fn init() { + info!("Initializing VMM..."); // Initialize guest VM according to config file. config::init_guest_vms(); From 46785a6dd460694cc823e998d6845ff988797c52 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 11 Jun 2025 17:35:09 +0800 Subject: [PATCH 38/62] remove patches --- Cargo.lock | 48 ++++++++++++++++++++++++++++++++++++---------- Cargo.toml | 56 +++--------------------------------------------------- 2 files changed, 41 insertions(+), 63 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index d9182075..333736f5 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,9 +117,10 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axdriver", "axerrno", "axfeat", @@ -136,6 +137,7 @@ dependencies = [ [[package]] name = "arm-gic-driver" version = "0.13.0" +source = "git+https://github.com/rcore-os/arm-gic-driver?rev=ad1fddc194f1cf5b7602e7f35a7136f823465cb0#ad1fddc194f1cf5b7602e7f35a7136f823465cb0" dependencies = [ "aarch64-cpu 10.0.0", "bitflags 2.9.0", @@ -165,6 +167,7 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3#1fb5ac158dca756fb94d7fb03f8182da5f20cce2" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -184,6 +187,7 @@ dependencies = [ [[package]] name = "arm_vgic" version = "0.0.0" +source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=vmm_irq_gicv3#453e7b070573abefeb2ef1658234285591ad4b1d" dependencies = [ "arm_gicv2", "axaddrspace", @@ -217,6 +221,7 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -234,6 +239,7 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "allocator", "axerrno", @@ -246,6 +252,15 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#35b7bc57a6cca5ac063a1d7b2748433687660b7c" +dependencies = [ + "axconfig-gen-macros", +] + +[[package]] +name = "axconfig" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axconfig-gen-macros", ] @@ -275,7 +290,7 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt#a568439b883322d5873c33b44dc531124ebbfd19" +source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt_vgicv3#e806d495f17678ab43389dc6386fd37b317de713" dependencies = [ "arm_vgic", "axaddrspace", @@ -302,9 +317,10 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axdriver_base", "axdriver_block", "axdriver_pci", @@ -359,6 +375,7 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", "axdriver", @@ -375,6 +392,7 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axdriver", "axdriver_block", @@ -428,13 +446,14 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "aarch64-cpu 10.0.0", "arm-gic-driver", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axlog", "bitflags 2.9.0", "cfg-if", @@ -477,8 +496,9 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axhal", "kspin", "lazyinit", @@ -489,6 +509,7 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "cfg-if", "crate_interface", @@ -499,9 +520,10 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axerrno", "axhal", "kspin", @@ -514,6 +536,7 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "crate_interface", "lazyinit", @@ -522,9 +545,10 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axdriver", "axfs", "axhal", @@ -542,6 +566,7 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "arceos_api", "axerrno", @@ -553,6 +578,7 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axtask", "kspin", @@ -561,8 +587,9 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axhal", "cfg-if", "cpumask", @@ -580,7 +607,7 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#15bd90e3f175996a703b0e45fcfce22e91aa1d74" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#8a45916dd597ab7473e6693658f66d850f6e0f0e" dependencies = [ "axaddrspace", "axerrno", @@ -593,7 +620,7 @@ name = "axvisor" version = "0.1.0" dependencies = [ "axaddrspace", - "axconfig", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api)", "axdevice", "axdevice_base", "axerrno", @@ -645,6 +672,7 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3#02b4e6d49ac7386caad8f8724532580c4c87fd1f" dependencies = [ "arm_vcpu", "axaddrspace", diff --git a/Cargo.toml b/Cargo.toml index 4febe574..179ef36b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ lazyinit = "0.2" timer_list = "0.1.0" # System dependent modules provided by ArceOS. -axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "debin/timer_api", features = [ +axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_irq_gicv3", features = [ "alloc", "paging", # "fs", @@ -37,7 +37,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "deb ] } # System dependent modules provided by ArceOS-Hypervisor. -axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt" } +axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } @@ -51,7 +51,7 @@ page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.2", features = ["arm-el2"] } -axdevice = { git = "https://github.com/arceos-hypervisor/axdevice.git", branch = "inject_interrupt" } +axdevice = { git = "https://github.com/arceos-hypervisor/axdevice.git", branch = "inject_interrupt_vgicv3" } axdevice_base = { git = "https://github.com/arceos-hypervisor/axdevice_crates.git", branch = "inject_interrupt" } axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git", branch = "inject_interrupt" } @@ -61,53 +61,3 @@ axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = " prettyplease = "0.2" quote = "1.0" syn = "2.0" - -# [patch."https://github.com/arceos-hypervisor/axvcpu.git"] -# axvcpu = { path = "../axvcpu" } - -# [patch."https://github.com/arceos-hypervisor/axvisor_api.git"] -# axvisor_api = { path = "../axvisor_api" } - -# [patch."https://github.com/arceos-hypervisor/x86_vcpu.git"] -# x86_vcpu = { path = "../x86_vcpu" } - -# [patch."https://github.com/arceos-hypervisor/x86_vlapic.git"] -# x86_vlapic = { path = "../x86_vlapic" } - -# [patch."https://github.com/arceos-hypervisor/axvm.git"] -# axvm = { path = "../axvm" } - -# [patch."https://github.com/arceos-hypervisor/axdevice.git"] -# axdevice = { path = "../axdevice" } - -# [patch."https://github.com/arceos-hypervisor/axdevice_crates.git"] -# axdevice_base = { path = "../axdevice_crates/axdevice_base" } - -# [patch."https://github.com/arceos-hypervisor/arceos.git"] -# axstd = { path = "../arceos-new/ulib/axstd", features = [ -# "alloc", -# "paging", -# "ipi", -# "smp", -# "irq" -# ]} -# axconfig = { path = "../arceos-new/modules/axconfig" } - -[patch."https://github.com/arceos-hypervisor/arm_vcpu.git"] -arm_vcpu = { path = "../arm_vcpu" } - -[patch."https://github.com/arceos-hypervisor/arm_vgic.git"] -arm_vgic = { path = "../arm_vgic" } - -[patch."https://github.com/arceos-hypervisor/axvm.git"] -axvm = { path = "../axvm" } - -[patch."https://github.com/arceos-hypervisor/arceos.git"] -axstd = { path = "../arceos/ulib/axstd" } -axconfig = { path = "../arceos/modules/axconfig" } - -[patch."https://github.com/rcore-os/arm-gic-driver"] -arm-gic-driver = { path = "../arm-gic-driver" } - -[patch."https://github.com/arceos-hypervisor/axaddrspace.git"] -axaddrspace = { path = "../axaddrspace" } From fba41862ca244a4aae7aa469ba232fc507cae6ea Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Wed, 11 Jun 2025 17:57:19 +0800 Subject: [PATCH 39/62] [feat/rk3588] Add a minimal device tree and config for booting second Linux VM --- configs/vms/aio-rk3588-jd4-vm2.dts | 12912 +--------------- ...toml => linux-rk3588-aarch64-smp-vm2.toml} | 21 +- 2 files changed, 190 insertions(+), 12743 deletions(-) rename configs/vms/{linux-rk3588-aarch64-smp-vm1.toml => linux-rk3588-aarch64-smp-vm2.toml} (81%) diff --git a/configs/vms/aio-rk3588-jd4-vm2.dts b/configs/vms/aio-rk3588-jd4-vm2.dts index 79cedc5f..fc9561be 100644 --- a/configs/vms/aio-rk3588-jd4-vm2.dts +++ b/configs/vms/aio-rk3588-jd4-vm2.dts @@ -8,335 +8,193 @@ interrupt-parent = <0x01>; compatible = "rockchip,aio-3588jd4\0rockchip,rk3588"; - pcie30-avdd1v8 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pcie30_avdd1v8"; - compatible = "regulator-fixed"; - phandle = <0x4a6>; - vin-supply = <0x1de>; + chosen { + linux,initrd-start = <0x01 0x0a200000>; + linux,initrd-end = <0x01 0x0a320410>; + bootargs = "rw earlycon=uart8250,mmio32,0xfeb50000 console=ttyS2,115200n8 irqchip.gicv3_pseudo_nmi=0 initcall_debug"; + phandle = <0x48d>; }; - syscon@fd5bc000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5bc000 0x00 0x100>; - phandle = <0x194>; + memory { + device_type = "memory"; + reg = <0x01 0x00000000 0x00 0xe0000000 >; }; - vcc5v0-host3 { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host3"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a2>; - vin-supply = <0x1dd>; - }; + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; - pwm@febd0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x16c>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04 0x00 0x15b 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0030 0x00 0x10>; - phandle = <0x2d4>; - }; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x00>; + enable-method = "psci"; + clocks = <0x0e 0x00>; + cpu-idle-states = <0x10>; + operating-points-v2 = <0x0f>; + capacity-dmips-mhz = <0x212>; - rkisp@fdcc0000 { - power-domains = <0x60 0x1c>; - iommus = <0xd1>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcc0000 0x00 0x7f00>; - phandle = <0x5a>; - }; + cpu-supply = <0x12>; + mem-supply = <0x12>; + dynamic-power-coefficient = <0x64>; - qos@fdf66600 { - compatible = "syscon"; - reg = <0x00 0xfdf66600 0x00 0x20>; - phandle = <0x96>; - }; + i-cache-line-size = <0x40>; + i-cache-size = <0x8000>; + i-cache-sets = <0x80>; - serial@febb0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x167>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x153 0x04>; - clocks = <0x02 0xd3 0x02 0xb2>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebb0000 0x00 0x100>; - phandle = <0x2d0>; - dmas = <0xf2 0x09 0xf2 0x0a>; - reg-shift = <0x02>; - }; + d-cache-line-size = <0x40>; + d-cache-size = <0x8000>; + d-cache-sets = <0x80>; - qos@fdf41000 { - compatible = "syscon"; - reg = <0x00 0xfdf41000 0x00 0x20>; - phandle = <0xa6>; - }; + next-level-cache = <0x11>; + #cooling-cells = <0x02>; + phandle = <0x06>; + }; - csi2-dcphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20e>; - }; + l2-cache-l0 { + compatible = "cache"; + cache-size = <0x20000>; + cache-sets = <0x200>; + cache-line-size = <0x40>; + next-level-cache = <0x1e>; + phandle = <0x11>; + }; - rkispp0-vir0 { - rockchip,hw = <0x5b>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x243>; - }; + l3-cache { + compatible = "cache"; + cache-size = <0x300000>; + cache-sets = <0x1000>; + cache-line-size = <0x40>; + phandle = <0x1e>; + }; - wireless-bluetooth { - pinctrl-names = "default\0rts_gpio"; - pinctrl-0 = <0x1e5 0x1e6 0x1e7 0x1e8>; - clock-names = "ext_clock"; - BT,power_gpio = <0x7b 0x16 0x00>; - clocks = <0x1e4>; - BT,wake_gpio = <0x7b 0x15 0x00>; - uart_rts_gpios = <0xfe 0x02 0x01>; - compatible = "bluetooth-platdata"; - BT,wake_host_irq = <0x7b 0x00 0x00>; - pinctrl-1 = <0x1e9>; - status = "disabled"; - phandle = <0x4aa>; - }; + idle-states { + entry-method = "psci"; - pwm@febd0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16b>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0020 0x00 0x10>; - phandle = <0x2d3>; - }; + cpu-sleep { + compatible = "arm,idle-state"; + entry-latency-us = <0x64>; + exit-latency-us = <0x78>; + min-residency-us = <0x3e8>; + local-timer-stop; + arm,psci-suspend-param = <0x10000>; + phandle = <0x10>; + }; + }; - qos@fdf39000 { - compatible = "syscon"; - reg = <0x00 0xfdf39000 0x00 0x20>; - phandle = <0xaf>; + cpu-map { + cluster0 { + core0 { + cpu = <0x06>; + }; + }; + }; }; - cam0-cam1-switch { - regulator-max-microvolt = <0x1b7740>; - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x181 0x11 0x00>; - pinctrl-0 = <0x1f0>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "cam0_cam1_switch"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b2>; - }; + sram@10f000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0x10f000 0x100>; + reg = <0x00 0x10f000 0x00 0x100>; - qos@fdf3e400 { - compatible = "syscon"; - reg = <0x00 0xfdf3e400 0x00 0x20>; - phandle = <0xad>; + sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x00 0x100>; + phandle = <0x46>; + }; }; - mipi2-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "okay"; - firefly-compatible; - phandle = <0x226>; + firmware { + sdei { + method = "smc"; + compatible = "arm,sdei-1.0"; + phandle = <0x221>; + }; - ports { + scmi { + shmem = <0x46>; #address-cells = <0x01>; #size-cells = <0x00>; + compatible = "arm,scmi-smc"; + phandle = <0x220>; + arm,smc-id = <0x82000010>; - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x4d>; - reg = <0x00>; - phandle = <0x33>; - }; + protocol@16 { + #reset-cells = <0x01>; + reg = <0x16>; + phandle = <0x11a>; }; - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x4e>; - reg = <0x00>; - phandle = <0x54>; - }; + protocol@14 { + assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; + assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; + #clock-cells = <0x01>; + reg = <0x14>; + phandle = <0x0e>; }; }; }; - iommu@fdc48700 { - power-domains = <0x60 0x0f>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x62 0x04>; - clocks = <0x02 0x195 0x02 0x194>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec1_mmu"; - reg = <0x00 0xfdc48700 0x00 0x40 0x00 0xfdc48740 0x00 0x40>; - phandle = <0xcc>; - rockchip,master-handle-irq; - }; - - clock-controller@fd7c0000 { - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; - assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; - #clock-cells = <0x01>; - compatible = "rockchip,rk3588-cru"; - rockchip,grf = <0x76>; - reg = <0x00 0xfd7c0000 0x00 0x5c000>; - phandle = <0x02>; - }; - - qos@fdf81000 { - compatible = "syscon"; - reg = <0x00 0xfdf81000 0x00 0x20>; - phandle = <0xa0>; - }; - - qos@fdf36000 { - compatible = "syscon"; - reg = <0x00 0xfdf36000 0x00 0x20>; - phandle = <0xaa>; - }; - - i2s@fe4a0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x132 0x133>; - pinctrl-0 = <0x12f 0x130>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x2a>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb7 0x04>; - clocks = <0x02 0x2d 0x02 0x23>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x131>; - status = "disabled"; - reg = <0x00 0xfe4a0000 0x00 0x1000>; - phandle = <0x299>; - dmas = <0xf1 0x02 0xf1 0x03>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c4000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c4000 0x00 0x100>; - phandle = <0x195>; + timer { + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; + compatible = "arm,armv8-timer"; }; - sram@ff001000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0xff001000 0xef000>; - reg = <0x00 0xff001000 0x00 0xef000>; - phandle = <0x2eb>; - - rkvdec-sram@0 { - reg = <0x00 0x78000>; - phandle = <0xcb>; - }; + interrupt-controller@fe600000 { + #address-cells = <0x02>; + interrupts = <0x01 0x09 0x04>; + #size-cells = <0x02>; + compatible = "arm,gic-v3"; + ranges; + #interrupt-cells = <0x03>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + phandle = <0x01>; + interrupt-controller; - rkvdec-sram@78000 { - reg = <0x78000 0x77000>; - phandle = <0xcd>; - }; }; - uio@fe1c0000 { - compatible = "rockchip,uio-gmac"; - status = "disabled"; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - phandle = <0x28e>; - rockchip,ethernet = <0x109>; + psci { + method = "smc"; + compatible = "arm,psci-1.0"; }; - pwm@febd0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16a>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + serial@feb50000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x161>; + interrupts = <0x00 0x14d 0x04>; + // Avoid driver messing with CRU + clock-frequency = <24000000>; + // clock-names = "baudclk\0apb_pclk"; + // clocks = <0x02 0xbb 0x02 0xac>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; status = "okay"; - reg = <0x00 0xfebd0010 0x00 0x10>; - phandle = <0x1ed>; + reg = <0x00 0xfeb50000 0x00 0x100>; + phandle = <0x2ca>; + dmas = <0x7c 0x0a 0x7c 0x0b>; + reg-shift = <0x02>; }; - rkisp1-vir3 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x242>; + aliases { + serial2 = "/serial@feb50000"; }; - pcie-clk2 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk2"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x495>; - gpios = <0x181 0x16 0x01>; + __symbols__ { + chosen = "/chosen"; + gic = "/interrupt-controller@fe600000"; + uart2 = "/serial@feb50000"; + + scmi_shmem = "/sram@10f000/sram@0"; + scmi = "/firmware/scmi"; + scmi_reset = "/firmware/scmi/protocol@16"; + scmi_clk = "/firmware/scmi/protocol@14"; }; - serial@feb40000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x160>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14c 0x04>; - clocks = <0x02 0xb7 0x02 0xab>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb40000 0x00 0x100>; - phandle = <0x2c9>; - dmas = <0x7c 0x08 0x7c 0x09>; - reg-shift = <0x02>; + syscon@fd5f0000 { + compatible = "rockchip,rk3588-ioc\0syscon"; + reg = <0x00 0xfd5f0000 0x00 0x10000>; + phandle = <0x196>; }; pinctrl { @@ -347,12477 +205,63 @@ rockchip,grf = <0x196>; phandle = <0x197>; - eth0 { - - eth0-pins { - rockchip,pins = <0x02 0x13 0x01 0x198>; - phandle = <0x46c>; - }; - }; - - i2c3 { + uart2 { - i2c3m3-xfer { - rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; - phandle = <0x361>; + uart2-rtsn { + rockchip,pins = <0x03 0x0b 0x0a 0x198>; + phandle = <0x427>; }; - i2c3m2-xfer { - rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; - phandle = <0x14a>; + uart2m1-xfer { + rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; + phandle = <0x161>; }; - i2c3m1-xfer { - rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; - phandle = <0x35f>; + uart2m0-xfer { + rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; + phandle = <0x1ce>; }; - i2c3m0-xfer { - rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; - phandle = <0x35e>; + uart2-ctsn { + rockchip,pins = <0x03 0x0c 0x0a 0x198>; + phandle = <0x426>; }; - i2c3m4-xfer { - rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; - phandle = <0x360>; + uart2m2-xfer { + rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; + phandle = <0x425>; }; }; - pwm9 { + // output - pwm9m2-pins { - rockchip,pins = <0x03 0x19 0x0b 0x198>; - phandle = <0x3d7>; - }; - - pwm9m1-pins { - rockchip,pins = <0x04 0x19 0x0b 0x198>; - phandle = <0x3d6>; - }; + // pull up - pwm9m0-pins { - rockchip,pins = <0x03 0x08 0x0b 0x198>; - phandle = <0x16e>; - }; + pcfg-pull-up { + phandle = <0x19e>; + bias-pull-up; }; - pcfg-pull-none-drv-level-7 { - drive-strength = <0x07>; - bias-disable; - phandle = <0x451>; + pcfg-pull-up-drv-level-2 { + drive-strength = <0x02>; + phandle = <0x199>; + bias-pull-up; }; - mipi { - - mipi-te1 { - rockchip,pins = <0x03 0x13 0x02 0x198>; - phandle = <0x39f>; - }; - - mipim1-camera2-clk { - rockchip,pins = <0x03 0x07 0x04 0x198>; - phandle = <0x39b>; - }; - - mipim0-camera0-clk { - rockchip,pins = <0x04 0x09 0x01 0x198>; - phandle = <0x395>; - }; - - mipim0-camera4-clk { - rockchip,pins = <0x01 0x1f 0x02 0x198>; - phandle = <0x399>; - }; - - mipim1-camera3-clk { - rockchip,pins = <0x03 0x08 0x04 0x198>; - phandle = <0x39c>; - }; - - mipim0-camera1-clk { - rockchip,pins = <0x01 0x0e 0x02 0x198>; - phandle = <0x396>; - }; - - mipim1-camera0-clk { - rockchip,pins = <0x03 0x05 0x04 0x198>; - phandle = <0x39a>; - }; - - mipim1-camera4-clk { - rockchip,pins = <0x03 0x09 0x04 0x198>; - phandle = <0x39d>; - }; - - mipim0-camera2-clk { - rockchip,pins = <0x01 0x0f 0x02 0x198>; - phandle = <0x397>; - }; - - mipi-te0 { - rockchip,pins = <0x03 0x12 0x02 0x198>; - phandle = <0x39e>; - }; - - mipim1-camera1-clk { - rockchip,pins = <0x03 0x06 0x04 0x198>; - phandle = <0x180>; - }; - - mipim0-camera3-clk { - rockchip,pins = <0x01 0x1e 0x02 0x198>; - phandle = <0x398>; - }; + pcfg-pull-up-drv-level-6 { + drive-strength = <0x06>; + phandle = <0x19a>; + bias-pull-up; }; - pwm14 { + // pull down - pwm14m2-pins { - rockchip,pins = <0x01 0x1e 0x0b 0x198>; - phandle = <0x3e1>; - }; - - pwm14m1-pins { - rockchip,pins = <0x04 0x0a 0x0b 0x198>; - phandle = <0x3e0>; - }; - - pwm14m0-pins { - rockchip,pins = <0x03 0x12 0x0b 0x198>; - phandle = <0x173>; - }; - }; + // pull none - pcfg-pull-none-drv-level-4-smt { - drive-strength = <0x04>; + pcfg-pull-none { bias-disable; - input-schmitt-enable; - phandle = <0x303>; - }; - - headphone { - - hp-det { - rockchip,pins = <0x02 0x13 0x00 0x198>; - phandle = <0x1dc>; - }; + phandle = <0x198>; }; + }; - npu { - - npu-pins { - rockchip,pins = <0x00 0x16 0x02 0x198>; - phandle = <0x3a0>; - }; - }; - - wireless-bluetooth { - - bt-reset-gpio { - rockchip,pins = <0x00 0x16 0x00 0x198>; - phandle = <0x1e6>; - }; - - bt-irq-gpio { - rockchip,pins = <0x00 0x00 0x00 0x198>; - phandle = <0x1e8>; - }; - - bt-wake-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1e7>; - }; - - uart6-gpios { - rockchip,pins = <0x01 0x02 0x00 0x198>; - phandle = <0x1e9>; - }; - }; - - pcie30x1 { - - pcie30x1-1-button-rstn { - rockchip,pins = <0x04 0x0a 0x04 0x198>; - phandle = <0x3a9>; - }; - - pcie30x1m1-pins { - rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; - phandle = <0x3a6>; - }; - - pcie30x1m0-pins { - rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; - phandle = <0x3a5>; - }; - - pcie30x1-0-button-rstn { - rockchip,pins = <0x04 0x09 0x04 0x198>; - phandle = <0x3a8>; - }; - - pcie30x1m2-pins { - rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; - phandle = <0x3a7>; - }; - }; - - uart8 { - - uart8m0-rtsn { - rockchip,pins = <0x04 0x0a 0x0a 0x198>; - phandle = <0x443>; - }; - - uart8m1-ctsn { - rockchip,pins = <0x03 0x05 0x0a 0x198>; - phandle = <0x444>; - }; - - uart8m0-ctsn { - rockchip,pins = <0x04 0x0b 0x0a 0x198>; - phandle = <0x442>; - }; - - uart8m1-xfer { - rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; - phandle = <0x167>; - }; - - uart8m0-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; - phandle = <0x441>; - }; - - uart8-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e>; - phandle = <0x446>; - }; - - uart8m1-rtsn { - rockchip,pins = <0x03 0x04 0x0a 0x198>; - phandle = <0x445>; - }; - }; - - spi2 { - - spi2m0-cs1 { - rockchip,pins = <0x01 0x08 0x08 0x19a>; - phandle = <0x404>; - }; - - spi2m2-cs0 { - rockchip,pins = <0x00 0x09 0x01 0x19f>; - phandle = <0x154>; - }; - - spi2m1-cs1 { - rockchip,pins = <0x04 0x08 0x08 0x19a>; - phandle = <0x407>; - }; - - spi2m2-pins { - rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; - phandle = <0x155>; - }; - - spi2m1-pins { - rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; - phandle = <0x405>; - }; - - spi2m2-cs1 { - rockchip,pins = <0x00 0x08 0x01 0x19f>; - phandle = <0x408>; - }; - - spi2m0-cs0 { - rockchip,pins = <0x01 0x07 0x08 0x19a>; - phandle = <0x403>; - }; - - spi2m0-pins { - rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; - phandle = <0x402>; - }; - - spi2m1-cs0 { - rockchip,pins = <0x04 0x07 0x08 0x19a>; - phandle = <0x406>; - }; - }; - - pcfg-pull-up-drv-level-15 { - drive-strength = <0x0f>; - phandle = <0x462>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-13 { - drive-strength = <0x0d>; - bias-pull-down; - phandle = <0x469>; - }; - - pcfg-pull-up-drv-level-2 { - drive-strength = <0x02>; - phandle = <0x199>; - bias-pull-up; - }; - - i2s1 { - - i2s1m0-sdo1 { - rockchip,pins = <0x04 0x0a 0x03 0x198>; - phandle = <0x127>; - }; - - i2s1m1-sdi1 { - rockchip,pins = <0x00 0x16 0x01 0x198>; - phandle = <0x380>; - }; - - i2s1m0-sdi3 { - rockchip,pins = <0x04 0x08 0x03 0x198>; - phandle = <0x125>; - }; - - i2s1m0-mclk { - rockchip,pins = <0x04 0x00 0x03 0x19d>; - phandle = <0x37b>; - }; - - i2s1m0-sdi1 { - rockchip,pins = <0x04 0x06 0x03 0x198>; - phandle = <0x123>; - }; - - i2s1m1-sdo2 { - rockchip,pins = <0x00 0x1c 0x01 0x198>; - phandle = <0x385>; - }; - - i2s1m1-sdo0 { - rockchip,pins = <0x00 0x19 0x01 0x198>; - phandle = <0x383>; - }; - - i2s1m0-sdo2 { - rockchip,pins = <0x04 0x0b 0x03 0x198>; - phandle = <0x128>; - }; - - i2s1m1-sdi2 { - rockchip,pins = <0x00 0x17 0x01 0x198>; - phandle = <0x381>; - }; - - i2s1m0-sdo0 { - rockchip,pins = <0x04 0x09 0x03 0x198>; - phandle = <0x126>; - }; - - i2s1m1-sdi0 { - rockchip,pins = <0x00 0x15 0x01 0x198>; - phandle = <0x37f>; - }; - - i2s1m0-sdi2 { - rockchip,pins = <0x04 0x07 0x03 0x198>; - phandle = <0x124>; - }; - - i2s1m1-sclk { - rockchip,pins = <0x00 0x0e 0x01 0x19d>; - phandle = <0x37e>; - }; - - i2s1m0-sdi0 { - rockchip,pins = <0x04 0x05 0x03 0x198>; - phandle = <0x122>; - }; - - i2s1m1-sdo3 { - rockchip,pins = <0x00 0x1d 0x01 0x198>; - phandle = <0x386>; - }; - - i2s1m1-lrck { - rockchip,pins = <0x00 0x0f 0x01 0x19d>; - phandle = <0x37c>; - }; - - i2s1m0-sclk { - rockchip,pins = <0x04 0x01 0x03 0x19d>; - phandle = <0x121>; - }; - - i2s1m1-sdo1 { - rockchip,pins = <0x00 0x1a 0x01 0x198>; - phandle = <0x384>; - }; - - i2s1m0-sdo3 { - rockchip,pins = <0x04 0x0c 0x03 0x198>; - phandle = <0x129>; - }; - - i2s1m1-sdi3 { - rockchip,pins = <0x00 0x18 0x01 0x198>; - phandle = <0x382>; - }; - - i2s1m0-lrck { - rockchip,pins = <0x04 0x02 0x03 0x19d>; - phandle = <0x120>; - }; - - i2s1m1-mclk { - rockchip,pins = <0x00 0x0d 0x01 0x19d>; - phandle = <0x37d>; - }; - }; - - ddrphych2 { - - ddrphych2-pins { - rockchip,pins = <0x04 0x08 0x07 0x198 0x04 0x09 0x07 0x198 0x04 0x0a 0x07 0x198 0x04 0x0b 0x07 0x198>; - phandle = <0x31a>; - }; - }; - - pcfg-pull-none-drv-level-12 { - drive-strength = <0x0c>; - bias-disable; - phandle = <0x456>; - }; - - i2c1 { - - i2c1m2-xfer { - rockchip,pins = <0x00 0x1c 0x09 0x19d 0x00 0x1d 0x09 0x19d>; - phandle = <0x148>; - }; - - i2c1m1-xfer { - rockchip,pins = <0x00 0x08 0x02 0x19d 0x00 0x09 0x02 0x19d>; - phandle = <0x357>; - }; - - i2c1m0-xfer { - rockchip,pins = <0x00 0x0d 0x09 0x19d 0x00 0x0e 0x09 0x19d>; - phandle = <0x356>; - }; - - i2c1m4-xfer { - rockchip,pins = <0x01 0x1a 0x09 0x19d 0x01 0x1b 0x09 0x19d>; - phandle = <0x359>; - }; - - i2c1m3-xfer { - rockchip,pins = <0x02 0x1c 0x09 0x19d 0x02 0x1d 0x09 0x19d>; - phandle = <0x358>; - }; - }; - - pwm7 { - - pwm7m3-pins { - rockchip,pins = <0x04 0x16 0x0b 0x198>; - phandle = <0x3d3>; - }; - - pwm7m2-pins { - rockchip,pins = <0x01 0x13 0x0b 0x198>; - phandle = <0x3d2>; - }; - - pwm7m1-pins { - rockchip,pins = <0x04 0x1c 0x0b 0x198>; - phandle = <0x3d1>; - }; - - pwm7m0-pins { - rockchip,pins = <0x00 0x18 0x0b 0x198>; - phandle = <0x16c>; - }; - }; - - pcfg-pull-none-drv-level-5 { - drive-strength = <0x05>; - bias-disable; - phandle = <0x2f1>; - }; - - gmac0 { - - gmac0-clkinout { - rockchip,pins = <0x04 0x13 0x01 0x198>; - phandle = <0x46d>; - }; - - gmac0-miim { - rockchip,pins = <0x04 0x14 0x01 0x198 0x04 0x15 0x01 0x198>; - phandle = <0x1c1>; - }; - - gmac0-tx-bus2 { - rockchip,pins = <0x02 0x0e 0x01 0x19a 0x02 0x0f 0x01 0x19a 0x02 0x10 0x01 0x198>; - phandle = <0x1c2>; - }; - - gmac0-rgmii-bus { - rockchip,pins = <0x02 0x06 0x01 0x198 0x02 0x07 0x01 0x198 0x02 0x09 0x01 0x19a 0x02 0x0a 0x01 0x19a>; - phandle = <0x1c5>; - }; - - gmac0-ppsclk { - rockchip,pins = <0x02 0x14 0x01 0x198>; - phandle = <0x46e>; - }; - - gmac0-txer { - rockchip,pins = <0x04 0x16 0x01 0x198>; - phandle = <0x471>; - }; - - gmac0-ptp-refclk { - rockchip,pins = <0x02 0x0c 0x01 0x198>; - phandle = <0x470>; - }; - - gmac0-rx-bus2 { - rockchip,pins = <0x02 0x11 0x01 0x198 0x02 0x12 0x01 0x198 0x04 0x12 0x01 0x198>; - phandle = <0x1c3>; - }; - - gmac0-rgmii-clk { - rockchip,pins = <0x02 0x08 0x01 0x198 0x02 0x0b 0x01 0x198>; - phandle = <0x1c4>; - }; - - gmac0-ppstring { - rockchip,pins = <0x02 0x0d 0x01 0x198>; - phandle = <0x46f>; - }; - }; - - pwm12 { - - pwm12m1-pins { - rockchip,pins = <0x04 0x0d 0x0b 0x198>; - phandle = <0x3dd>; - }; - - pwm12m0-pins { - rockchip,pins = <0x03 0x0d 0x0b 0x198>; - phandle = <0x171>; - }; - }; - - usb-typec { - - usbc0-int { - rockchip,pins = <0x00 0x1b 0x00 0x198>; - phandle = <0x17b>; - }; - - usb-5v-ctrl { - rockchip,pins = <0x01 0x03 0x00 0x198>; - phandle = <0x1ef>; - }; - }; - - uart6 { - - uart6m1-ctsn { - rockchip,pins = <0x01 0x03 0x0a 0x198>; - phandle = <0x436>; - }; - - uart6m2-xfer { - rockchip,pins = <0x01 0x19 0x0a 0x19e 0x01 0x18 0x0a 0x19e>; - phandle = <0x437>; - }; - - uart6m0-ctsn { - rockchip,pins = <0x02 0x09 0x0a 0x198>; - phandle = <0x439>; - }; - - uart6m1-xfer { - rockchip,pins = <0x01 0x00 0x0a 0x19e 0x01 0x01 0x0a 0x19e>; - phandle = <0x165>; - }; - - uart6m0-xfer { - rockchip,pins = <0x02 0x06 0x0a 0x19e 0x02 0x07 0x0a 0x19e>; - phandle = <0x438>; - }; - - uart6m1-rtsn { - rockchip,pins = <0x01 0x02 0x0a 0x198>; - phandle = <0x1e5>; - }; - - uart6m0-rtsn { - rockchip,pins = <0x02 0x08 0x0a 0x198>; - phandle = <0x43a>; - }; - }; - - pcfg-pull-down-drv-level-8 { - drive-strength = <0x08>; - bias-pull-down; - phandle = <0x464>; - }; - - gpu { - - gpu-pins { - rockchip,pins = <0x00 0x15 0x02 0x198>; - phandle = <0x333>; - }; - }; - - spi0 { - - spi0m2-cs1 { - rockchip,pins = <0x01 0x0d 0x08 0x19a>; - phandle = <0x3f8>; - }; - - spi0m0-cs0 { - rockchip,pins = <0x00 0x19 0x08 0x19a>; - phandle = <0x14e>; - }; - - spi0m3-pins { - rockchip,pins = <0x03 0x1b 0x08 0x19a 0x03 0x19 0x08 0x19a 0x03 0x1a 0x08 0x19a>; - phandle = <0x3f9>; - }; - - spi0m3-cs1 { - rockchip,pins = <0x03 0x1d 0x08 0x19a>; - phandle = <0x3fb>; - }; - - spi0m2-pins { - rockchip,pins = <0x01 0x0b 0x08 0x19a 0x01 0x09 0x08 0x19a 0x01 0x0a 0x08 0x19a>; - phandle = <0x3f6>; - }; - - spi0m1-cs0 { - rockchip,pins = <0x04 0x0a 0x08 0x19a>; - phandle = <0x3f4>; - }; - - spi0m1-pins { - rockchip,pins = <0x04 0x02 0x08 0x19a 0x04 0x00 0x08 0x19a 0x04 0x01 0x08 0x19a>; - phandle = <0x3f3>; - }; - - spi0m0-cs1 { - rockchip,pins = <0x00 0x0f 0x08 0x19a>; - phandle = <0x14f>; - }; - - spi0m2-cs0 { - rockchip,pins = <0x01 0x0c 0x08 0x19a>; - phandle = <0x3f7>; - }; - - spi0m0-pins { - rockchip,pins = <0x00 0x16 0x08 0x19a 0x00 0x17 0x08 0x19a 0x00 0x10 0x08 0x19a>; - phandle = <0x150>; - }; - - spi0m1-cs1 { - rockchip,pins = <0x04 0x09 0x08 0x19a>; - phandle = <0x3f5>; - }; - - spi0m3-cs0 { - rockchip,pins = <0x03 0x1c 0x08 0x19a>; - phandle = <0x3fa>; - }; - }; - - fspi { - - fspim0-cs1 { - rockchip,pins = <0x02 0x1f 0x02 0x199>; - phandle = <0x329>; - }; - - fspim1-pins { - rockchip,pins = <0x02 0x0b 0x03 0x199 0x02 0x0c 0x03 0x199 0x02 0x06 0x03 0x199 0x02 0x07 0x03 0x199 0x02 0x08 0x03 0x199 0x02 0x09 0x03 0x199>; - phandle = <0x32c>; - }; - - fspim0-pins { - rockchip,pins = <0x02 0x00 0x02 0x199 0x02 0x1e 0x02 0x199 0x02 0x18 0x02 0x199 0x02 0x19 0x02 0x199 0x02 0x1a 0x02 0x199 0x02 0x1b 0x02 0x199>; - phandle = <0x328>; - }; - - fspim1-cs1 { - rockchip,pins = <0x02 0x0d 0x03 0x199>; - phandle = <0x32d>; - }; - - fspim2-cs1 { - rockchip,pins = <0x03 0x15 0x02 0x199>; - phandle = <0x32b>; - }; - - fspim2-pins { - rockchip,pins = <0x03 0x05 0x05 0x199 0x03 0x14 0x02 0x199 0x03 0x00 0x05 0x199 0x03 0x01 0x05 0x199 0x03 0x02 0x05 0x199 0x03 0x03 0x05 0x199>; - phandle = <0x32a>; - }; - }; - - pcfg-pull-up-drv-level-13 { - drive-strength = <0x0d>; - phandle = <0x460>; - bias-pull-up; - }; - - clk32k { - - clk32k-out0 { - rockchip,pins = <0x00 0x0a 0x02 0x198>; - phandle = <0x315>; - }; - - clk32k-in { - rockchip,pins = <0x00 0x0a 0x01 0x198>; - phandle = <0x314>; - }; - - clk32k-out1 { - rockchip,pins = <0x02 0x15 0x01 0x198>; - phandle = <0x316>; - }; - }; - - pcfg-pull-down-drv-level-11 { - drive-strength = <0x0b>; - bias-pull-down; - phandle = <0x467>; - }; - - pcie30phy { - - pcie30phy-pins { - rockchip,pins = <0x01 0x14 0x04 0x198 0x01 0x19 0x04 0x198>; - phandle = <0x3a4>; - }; - }; - - pcfg-pull-up-drv-level-0 { - drive-strength = <0x00>; - phandle = <0x2f3>; - bias-pull-up; - }; - - ddrphych0 { - - ddrphych0-pins { - rockchip,pins = <0x04 0x00 0x07 0x198 0x04 0x01 0x07 0x198 0x04 0x02 0x07 0x198 0x04 0x03 0x07 0x198>; - phandle = <0x318>; - }; - }; - - pcfg-pull-none-drv-level-10 { - drive-strength = <0x0a>; - bias-disable; - phandle = <0x454>; - }; - - pwm5 { - - pwm5m2-pins { - rockchip,pins = <0x04 0x14 0x0b 0x198>; - phandle = <0x3ce>; - }; - - pwm5m1-pins { - rockchip,pins = <0x00 0x16 0x0b 0x198>; - phandle = <0x16a>; - }; - - pwm5m0-pins { - rockchip,pins = <0x00 0x09 0x03 0x198>; - phandle = <0x3cd>; - }; - }; - - pcfg-pull-none-drv-level-3 { - drive-strength = <0x03>; - bias-disable; - phandle = <0x2ef>; - }; - - pwm10 { - - pwm10m2-pins { - rockchip,pins = <0x03 0x1b 0x0b 0x198>; - phandle = <0x3d9>; - }; - - pwm10m1-pins { - rockchip,pins = <0x04 0x1b 0x0b 0x198>; - phandle = <0x3d8>; - }; - - pwm10m0-pins { - rockchip,pins = <0x03 0x00 0x0b 0x198>; - phandle = <0x16f>; - }; - }; - - pcfg-pull-down-smt { - input-schmitt-enable; - bias-pull-down; - phandle = <0x2ff>; - }; - - gpio@fec50000 { - gpio-controller; - interrupts = <0x00 0x119 0x04>; - clocks = <0x02 0x83 0x02 0x84>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec50000 0x00 0x100>; - phandle = <0x10d>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x80 0x20>; - interrupt-controller; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x2ec>; - }; - - uart4 { - - uart4m2-xfer { - rockchip,pins = <0x01 0x0a 0x0a 0x19e 0x01 0x0b 0x0a 0x19e>; - phandle = <0x42d>; - }; - - uart4-ctsn { - rockchip,pins = <0x01 0x17 0x0a 0x198>; - phandle = <0x42e>; - }; - - uart4m1-xfer { - rockchip,pins = <0x03 0x18 0x0a 0x19e 0x03 0x19 0x0a 0x19e>; - phandle = <0x163>; - }; - - uart4m0-xfer { - rockchip,pins = <0x01 0x1b 0x0a 0x19e 0x01 0x1a 0x0a 0x19e>; - phandle = <0x42c>; - }; - - uart4-rtsn { - rockchip,pins = <0x01 0x15 0x0a 0x198>; - phandle = <0x42f>; - }; - }; - - spdif0 { - - spdif0m0-tx { - rockchip,pins = <0x01 0x0e 0x03 0x198>; - phandle = <0x142>; - }; - - spdif0m1-tx { - rockchip,pins = <0x04 0x0c 0x06 0x198>; - phandle = <0x3f0>; - }; - }; - - pcfg-pull-down-drv-level-6 { - drive-strength = <0x06>; - bias-pull-down; - phandle = <0x2fd>; - }; - - pcfg-pull-up-drv-level-9 { - drive-strength = <0x09>; - phandle = <0x45c>; - bias-pull-up; - }; - - pcfg-pull-none-drv-level-1-smt { - drive-strength = <0x01>; - bias-disable; - input-schmitt-enable; - phandle = <0x19c>; - }; - - pcfg-pull-up-drv-level-11 { - drive-strength = <0x0b>; - phandle = <0x45e>; - bias-pull-up; - }; - - mcu { - - mcum1-pins { - rockchip,pins = <0x03 0x1c 0x06 0x198 0x03 0x1d 0x06 0x198>; - phandle = <0x394>; - }; - - mcum0-pins { - rockchip,pins = <0x04 0x1c 0x05 0x198 0x04 0x1d 0x05 0x198>; - phandle = <0x393>; - }; - }; - - i2c8 { - - i2c8m4-xfer { - rockchip,pins = <0x03 0x12 0x09 0x19d 0x03 0x13 0x09 0x19d>; - phandle = <0x373>; - }; - - i2c8m3-xfer { - rockchip,pins = <0x04 0x10 0x09 0x19d 0x04 0x11 0x09 0x19d>; - phandle = <0x372>; - }; - - i2c8m2-xfer { - rockchip,pins = <0x01 0x1e 0x09 0x19d 0x01 0x1f 0x09 0x19d>; - phandle = <0x371>; - }; - - i2c8m1-xfer { - rockchip,pins = <0x02 0x08 0x09 0x19d 0x02 0x09 0x09 0x19d>; - phandle = <0x374>; - }; - - i2c8m0-xfer { - rockchip,pins = <0x04 0x1a 0x09 0x19d 0x04 0x1b 0x09 0x19d>; - phandle = <0x186>; - }; - }; - - dp0 { - - dp0m0-pins { - rockchip,pins = <0x04 0x0c 0x05 0x198>; - phandle = <0x31c>; - }; - - dp0m2-pins { - rockchip,pins = <0x01 0x00 0x05 0x198>; - phandle = <0x31e>; - }; - - dp0m1-pins { - rockchip,pins = <0x00 0x14 0x0a 0x198>; - phandle = <0x31d>; - }; - }; - - pcfg-pull-none-drv-level-5-smt { - drive-strength = <0x05>; - bias-disable; - input-schmitt-enable; - phandle = <0x19b>; - }; - - pwm3 { - - pwm3m2-pins { - rockchip,pins = <0x01 0x12 0x0b 0x198>; - phandle = <0x3ca>; - }; - - pwm3m1-pins { - rockchip,pins = <0x03 0x0a 0x0b 0x198>; - phandle = <0x3c9>; - }; - - pwm3m0-pins { - rockchip,pins = <0x00 0x1c 0x03 0x198>; - phandle = <0x81>; - }; - - pwm3m3-pins { - rockchip,pins = <0x01 0x07 0x0b 0x198>; - phandle = <0x3cb>; - }; - }; - - pcfg-pull-none-drv-level-1 { - drive-strength = <0x01>; - bias-disable; - phandle = <0x2ee>; - }; - - sata2 { - - sata2m1-pins { - rockchip,pins = <0x01 0x0f 0x06 0x198>; - phandle = <0x3ed>; - }; - - sata2m0-pins { - rockchip,pins = <0x04 0x09 0x06 0x198>; - phandle = <0x3ec>; - }; - }; - - cam { - - cam0-or-cam1-switch-pin { - rockchip,pins = <0x03 0x11 0x00 0x198>; - phandle = <0x1f0>; - }; - }; - - uart2 { - - uart2-rtsn { - rockchip,pins = <0x03 0x0b 0x0a 0x198>; - phandle = <0x427>; - }; - - uart2m1-xfer { - rockchip,pins = <0x04 0x19 0x0a 0x19e 0x04 0x18 0x0a 0x19e>; - phandle = <0x161>; - }; - - uart2m0-xfer { - rockchip,pins = <0x00 0x0e 0x0a 0x19e 0x00 0x0d 0x0a 0x19e>; - phandle = <0x1ce>; - }; - - uart2-ctsn { - rockchip,pins = <0x03 0x0c 0x0a 0x198>; - phandle = <0x426>; - }; - - uart2m2-xfer { - rockchip,pins = <0x03 0x0a 0x0a 0x19e 0x03 0x09 0x0a 0x19e>; - phandle = <0x425>; - }; - }; - - pcfg-pull-down-drv-level-4 { - drive-strength = <0x04>; - bias-pull-down; - phandle = <0x2fb>; - }; - - pcfg-pull-up-drv-level-7 { - drive-strength = <0x07>; - phandle = <0x45a>; - bias-pull-up; - }; - - i2c6 { - - i2c6m4-xfer { - rockchip,pins = <0x03 0x01 0x09 0x19d 0x03 0x00 0x09 0x19d>; - phandle = <0x36c>; - }; - - i2c6m3-xfer { - rockchip,pins = <0x04 0x09 0x09 0x19d 0x04 0x08 0x09 0x19d>; - phandle = <0x36b>; - }; - - i2c6m2-xfer { - rockchip,pins = <0x02 0x13 0x09 0x19d 0x02 0x12 0x09 0x19d>; - phandle = <0x36d>; - }; - - i2c6m1-xfer { - rockchip,pins = <0x01 0x13 0x09 0x19d 0x01 0x12 0x09 0x19d>; - phandle = <0x36a>; - }; - - i2c6m0-xfer { - rockchip,pins = <0x00 0x18 0x09 0x19d 0x00 0x17 0x09 0x19d>; - phandle = <0x178>; - }; - }; - - pdm1 { - - pdm1m1-sdi3 { - rockchip,pins = <0x01 0x0a 0x02 0x198>; - phandle = <0x3c1>; - }; - - pdm1m0-clk { - rockchip,pins = <0x04 0x1d 0x02 0x198>; - phandle = <0x140>; - }; - - pdm1m1-sdi1 { - rockchip,pins = <0x01 0x08 0x02 0x198>; - phandle = <0x3bf>; - }; - - pdm1m0-sdi3 { - rockchip,pins = <0x04 0x18 0x02 0x198>; - phandle = <0x13e>; - }; - - pdm1m0-sdi1 { - rockchip,pins = <0x04 0x1a 0x02 0x198>; - phandle = <0x13c>; - }; - - pdm1m1-clk { - rockchip,pins = <0x01 0x0c 0x02 0x198>; - phandle = <0x3bb>; - }; - - pdm1m1-clk1 { - rockchip,pins = <0x01 0x0b 0x02 0x198>; - phandle = <0x3bc>; - }; - - pdm1m1-idle { - rockchip,pins = <0x01 0x0c 0x00 0x198 0x01 0x0b 0x00 0x198>; - phandle = <0x3bd>; - }; - - pdm1m0-clk1 { - rockchip,pins = <0x04 0x1c 0x02 0x198>; - phandle = <0x141>; - }; - - pdm1m1-sdi2 { - rockchip,pins = <0x01 0x09 0x02 0x198>; - phandle = <0x3c0>; - }; - - pdm1m0-idle { - rockchip,pins = <0x04 0x1d 0x00 0x198 0x04 0x1c 0x00 0x198>; - phandle = <0x13f>; - }; - - pdm1m1-sdi0 { - rockchip,pins = <0x01 0x07 0x02 0x198>; - phandle = <0x3be>; - }; - - pdm1m0-sdi2 { - rockchip,pins = <0x04 0x19 0x02 0x198>; - phandle = <0x13d>; - }; - - pdm1m0-sdi0 { - rockchip,pins = <0x04 0x1b 0x02 0x198>; - phandle = <0x13b>; - }; - }; - - cpu { - - cpu-pins { - rockchip,pins = <0x00 0x19 0x02 0x198 0x00 0x1d 0x02 0x198>; - phandle = <0x317>; - }; - }; - - gpio-func { - - tsadc-gpio-func { - rockchip,pins = <0x00 0x01 0x00 0x198>; - phandle = <0x175>; - }; - }; - - pcie20x1 { - - pcie20x1-2-button-rstn { - rockchip,pins = <0x04 0x0b 0x04 0x198>; - phandle = <0x3a3>; - }; - - pcie20x1m1-pins { - rockchip,pins = <0x04 0x0f 0x04 0x198 0x04 0x11 0x04 0x198 0x04 0x10 0x04 0x198>; - phandle = <0x3a2>; - }; - - pcie20x1m0-pins { - rockchip,pins = <0x03 0x17 0x04 0x198 0x03 0x19 0x04 0x198 0x03 0x18 0x04 0x198>; - phandle = <0x3a1>; - }; - }; - - leds { - - leds-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1ee>; - }; - }; - - pwm1 { - - pwm1m1-pins { - rockchip,pins = <0x01 0x1b 0x0b 0x198>; - phandle = <0x3c5>; - }; - - pwm1m0-pins { - rockchip,pins = <0x00 0x10 0x03 0x198>; - phandle = <0x7f>; - }; - - pwm1m2-pins { - rockchip,pins = <0x01 0x03 0x0b 0x198>; - phandle = <0x3c6>; - }; - }; - - sata0 { - - sata0m1-pins { - rockchip,pins = <0x01 0x0b 0x06 0x198>; - phandle = <0x3e9>; - }; - - sata0m0-pins { - rockchip,pins = <0x04 0x0e 0x06 0x198>; - phandle = <0x3e8>; - }; - }; - - refclk { - - refclk-pins { - rockchip,pins = <0x00 0x00 0x01 0x198>; - phandle = <0x3e5>; - }; - }; - - pcie30x4 { - - pcie30x4m2-pins { - rockchip,pins = <0x03 0x14 0x04 0x198 0x03 0x16 0x04 0x198 0x03 0x15 0x04 0x198>; - phandle = <0x3b1>; - }; - - pcie30x4m1-pins { - rockchip,pins = <0x04 0x0c 0x04 0x198 0x04 0x0e 0x04 0x198 0x04 0x0d 0x04 0x198>; - phandle = <0x3b0>; - }; - - pcie30x4-button-rstn { - rockchip,pins = <0x03 0x1d 0x04 0x198>; - phandle = <0x3b3>; - }; - - pcie30x4m0-pins { - rockchip,pins = <0x00 0x16 0x0c 0x198 0x00 0x18 0x0c 0x198 0x00 0x17 0x0c 0x198>; - phandle = <0x3af>; - }; - - pcie30x4m3-pins { - rockchip,pins = <0x01 0x08 0x04 0x198 0x01 0x0a 0x04 0x198 0x01 0x09 0x04 0x198>; - phandle = <0x3b2>; - }; - }; - - can2 { - - can2m1-pins { - rockchip,pins = <0x00 0x1c 0x0a 0x198 0x00 0x1d 0x0a 0x198>; - phandle = <0x30f>; - }; - - can2m0-pins { - rockchip,pins = <0x03 0x14 0x09 0x198 0x03 0x15 0x09 0x198>; - phandle = <0x147>; - }; - }; - - litcpu { - - litcpu-pins { - rockchip,pins = <0x00 0x1b 0x01 0x198>; - phandle = <0x392>; - }; - }; - - sata { - - sata-reset { - rockchip,pins = <0x04 0x11 0x00 0x198>; - phandle = <0x3e7>; - }; - - sata-pins { - rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; - phandle = <0x3e6>; - }; - }; - - tsadc { - - tsadc-shut { - rockchip,pins = <0x00 0x01 0x02 0x198>; - phandle = <0x176>; - }; - - tsadc-shut-org { - rockchip,pins = <0x00 0x01 0x01 0x198>; - phandle = <0x418>; - }; - - tsadcm1-shut { - rockchip,pins = <0x00 0x02 0x02 0x198>; - phandle = <0x417>; - }; - }; - - uart0 { - - uart0m1-xfer { - rockchip,pins = <0x00 0x08 0x04 0x19e 0x00 0x09 0x04 0x19e>; - phandle = <0x7d>; - }; - - uart0m0-xfer { - rockchip,pins = <0x00 0x14 0x04 0x19e 0x00 0x15 0x04 0x19e>; - phandle = <0x419>; - }; - - uart0-rtsn { - rockchip,pins = <0x00 0x16 0x04 0x198>; - phandle = <0x41c>; - }; - - uart0-ctsn { - rockchip,pins = <0x00 0x19 0x04 0x198>; - phandle = <0x41b>; - }; - - uart0m2-xfer { - rockchip,pins = <0x04 0x04 0x0a 0x19e 0x04 0x03 0x0a 0x19e>; - phandle = <0x41a>; - }; - }; - - pcfg-pull-down-drv-level-2 { - drive-strength = <0x02>; - bias-pull-down; - phandle = <0x2f9>; - }; - - pcfg-pull-up-drv-level-5 { - drive-strength = <0x05>; - phandle = <0x2f6>; - bias-pull-up; - }; - - gpio@fec20000 { - gpio-controller; - interrupts = <0x00 0x116 0x04>; - clocks = <0x02 0x7d 0x02 0x7e>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec20000 0x00 0x100>; - phandle = <0xfe>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x20 0x20>; - interrupt-controller; - }; - - pcfg-pull-none-drv-level-15 { - drive-strength = <0x0f>; - bias-disable; - phandle = <0x459>; - }; - - eth1 { - - eth1-pins { - rockchip,pins = <0x03 0x06 0x01 0x198>; - phandle = <0x327>; - }; - }; - - i2c4 { - - i2c4m3-xfer { - rockchip,pins = <0x01 0x03 0x09 0x19d 0x01 0x02 0x09 0x19d>; - phandle = <0x364>; - }; - - i2c4m2-xfer { - rockchip,pins = <0x00 0x15 0x09 0x19d 0x00 0x14 0x09 0x19d>; - phandle = <0x363>; - }; - - i2c4m1-xfer { - rockchip,pins = <0x02 0x0d 0x09 0x19d 0x02 0x0c 0x09 0x19d>; - phandle = <0x14b>; - }; - - i2c4m0-xfer { - rockchip,pins = <0x03 0x06 0x09 0x19d 0x03 0x05 0x09 0x19d>; - phandle = <0x362>; - }; - - i2c4m4-xfer { - rockchip,pins = <0x01 0x17 0x09 0x19d 0x01 0x16 0x09 0x19d>; - phandle = <0x365>; - }; - }; - - emmc { - - emmc-data-strobe { - rockchip,pins = <0x02 0x02 0x01 0x198>; - phandle = <0x326>; - }; - - emmc-clk { - rockchip,pins = <0x02 0x01 0x01 0x199>; - phandle = <0x324>; - }; - - emmc-bus8 { - rockchip,pins = <0x02 0x18 0x01 0x199 0x02 0x19 0x01 0x199 0x02 0x1a 0x01 0x199 0x02 0x1b 0x01 0x199 0x02 0x1c 0x01 0x199 0x02 0x1d 0x01 0x199 0x02 0x1e 0x01 0x199 0x02 0x1f 0x01 0x199>; - phandle = <0x323>; - }; - - emmc-cmd { - rockchip,pins = <0x02 0x00 0x01 0x199>; - phandle = <0x325>; - }; - - emmc-rstnout { - rockchip,pins = <0x02 0x03 0x01 0x198>; - phandle = <0x322>; - }; - }; - - pcfg-pull-none-drv-level-8 { - drive-strength = <0x08>; - bias-disable; - phandle = <0x452>; - }; - - pwm15 { - - pwm15m0-pins { - rockchip,pins = <0x03 0x13 0x0b 0x198>; - phandle = <0x174>; - }; - - pwm15m3-pins { - rockchip,pins = <0x01 0x1f 0x0b 0x198>; - phandle = <0x3e4>; - }; - - pwm15m2-pins { - rockchip,pins = <0x01 0x16 0x0b 0x198>; - phandle = <0x3e3>; - }; - - pwm15m1-pins { - rockchip,pins = <0x04 0x0b 0x0b 0x198>; - phandle = <0x3e2>; - }; - }; - - pcie30x2 { - - pcie30x2m2-pins { - rockchip,pins = <0x03 0x1a 0x04 0x198 0x03 0x1c 0x04 0x198 0x03 0x1b 0x04 0x198>; - phandle = <0x3ac>; - }; - - pcie30x2m1-pins { - rockchip,pins = <0x04 0x06 0x04 0x198 0x04 0x08 0x04 0x198 0x04 0x07 0x04 0x198>; - phandle = <0x3ab>; - }; - - pcie30x2-button-rstn { - rockchip,pins = <0x03 0x11 0x04 0x198>; - phandle = <0x3ae>; - }; - - pcie30x2m0-pins { - rockchip,pins = <0x00 0x19 0x0c 0x198 0x00 0x1c 0x0c 0x198 0x00 0x1a 0x0c 0x198>; - phandle = <0x3aa>; - }; - - pcie30x2m3-pins { - rockchip,pins = <0x01 0x1f 0x04 0x198 0x01 0x0f 0x04 0x198 0x01 0x0e 0x04 0x198>; - phandle = <0x3ad>; - }; - }; - - can0 { - - can0m0-pins { - rockchip,pins = <0x00 0x10 0x0b 0x198 0x00 0x0f 0x0b 0x198>; - phandle = <0x145>; - }; - - can0m1-pins { - rockchip,pins = <0x04 0x1d 0x09 0x198 0x04 0x1c 0x09 0x198>; - phandle = <0x30d>; - }; - }; - - pcfg-output-high { - output-high; - phandle = <0x305>; - }; - - uart9 { - - uart9m0-rtsn { - rockchip,pins = <0x04 0x14 0x0a 0x198>; - phandle = <0x44e>; - }; - - uart9m2-ctsn { - rockchip,pins = <0x03 0x1b 0x0a 0x198>; - phandle = <0x44a>; - }; - - uart9m1-ctsn { - rockchip,pins = <0x04 0x01 0x0a 0x198>; - phandle = <0x447>; - }; - - uart9m2-xfer { - rockchip,pins = <0x03 0x1c 0x0a 0x19e 0x03 0x1d 0x0a 0x19e>; - phandle = <0x449>; - }; - - uart9m0-ctsn { - rockchip,pins = <0x04 0x15 0x0a 0x198>; - phandle = <0x44d>; - }; - - uart9m1-xfer { - rockchip,pins = <0x04 0x0d 0x0a 0x19e 0x04 0x0c 0x0a 0x19e>; - phandle = <0x168>; - }; - - uart9m0-xfer { - rockchip,pins = <0x02 0x14 0x0a 0x19e 0x02 0x12 0x0a 0x19e>; - phandle = <0x44c>; - }; - - uart9m2-rtsn { - rockchip,pins = <0x03 0x1a 0x0a 0x198>; - phandle = <0x44b>; - }; - - uart9m1-rtsn { - rockchip,pins = <0x04 0x00 0x0a 0x198>; - phandle = <0x448>; - }; - }; - - pcfg-pull-none-drv-level-2-smt { - drive-strength = <0x02>; - bias-disable; - input-schmitt-enable; - phandle = <0x301>; - }; - - pcfg-pull-up { - phandle = <0x19e>; - bias-pull-up; - }; - - spi3 { - - spi3m3-cs1 { - rockchip,pins = <0x03 0x15 0x08 0x19a>; - phandle = <0x40e>; - }; - - spi3m1-cs0 { - rockchip,pins = <0x04 0x10 0x08 0x19a>; - phandle = <0x15d>; - }; - - spi3m3-pins { - rockchip,pins = <0x03 0x18 0x08 0x19a 0x03 0x16 0x08 0x19a 0x03 0x17 0x08 0x19a>; - phandle = <0x40c>; - }; - - spi3m0-cs1 { - rockchip,pins = <0x04 0x13 0x08 0x19f>; - phandle = <0x411>; - }; - - spi3m2-cs0 { - rockchip,pins = <0x00 0x1c 0x08 0x19a>; - phandle = <0x40a>; - }; - - spi3m2-pins { - rockchip,pins = <0x00 0x1b 0x08 0x19a 0x00 0x18 0x08 0x19a 0x00 0x1a 0x08 0x19a>; - phandle = <0x409>; - }; - - spi3m1-cs1 { - rockchip,pins = <0x04 0x11 0x08 0x19a>; - phandle = <0x15e>; - }; - - spi3m1-pins { - rockchip,pins = <0x04 0x0f 0x08 0x19a 0x04 0x0d 0x08 0x19a 0x04 0x0e 0x08 0x19a>; - phandle = <0x15f>; - }; - - spi3m3-cs0 { - rockchip,pins = <0x03 0x14 0x08 0x19a>; - phandle = <0x40d>; - }; - - spi3m0-pins { - rockchip,pins = <0x04 0x16 0x08 0x19f 0x04 0x14 0x08 0x19f 0x04 0x15 0x08 0x19f>; - phandle = <0x40f>; - }; - - spi3m2-cs1 { - rockchip,pins = <0x00 0x1d 0x08 0x19a>; - phandle = <0x40b>; - }; - - spi3m0-cs0 { - rockchip,pins = <0x04 0x12 0x08 0x19f>; - phandle = <0x410>; - }; - }; - - pcfg-pull-down-drv-level-14 { - drive-strength = <0x0e>; - bias-pull-down; - phandle = <0x46a>; - }; - - bt656 { - - bt656-pins { - rockchip,pins = <0x04 0x08 0x02 0x1a0 0x04 0x00 0x02 0x1a0 0x04 0x01 0x02 0x1a0 0x04 0x02 0x02 0x1a0 0x04 0x03 0x02 0x1a0 0x04 0x04 0x02 0x1a0 0x04 0x05 0x02 0x1a0 0x04 0x06 0x02 0x1a0 0x04 0x07 0x02 0x1a0>; - phandle = <0x450>; - }; - }; - - pcfg-pull-down-drv-level-0 { - drive-strength = <0x00>; - bias-pull-down; - phandle = <0x2f7>; - }; - - pcfg-pull-up-drv-level-3 { - drive-strength = <0x03>; - phandle = <0x2f4>; - bias-pull-up; - }; - - i2s2 { - - i2s2m0-lrck { - rockchip,pins = <0x02 0x10 0x02 0x19d>; - phandle = <0x389>; - }; - - i2s2m1-mclk { - rockchip,pins = <0x03 0x0c 0x03 0x19d>; - phandle = <0x387>; - }; - - i2s2m0-mclk { - rockchip,pins = <0x02 0x0e 0x02 0x19d>; - phandle = <0x38a>; - }; - - i2s2m1-sdo { - rockchip,pins = <0x03 0x0b 0x03 0x198>; - phandle = <0x12b>; - }; - - i2s2m0-sdi { - rockchip,pins = <0x02 0x13 0x02 0x198>; - phandle = <0x38c>; - }; - - i2s2m1-idle { - rockchip,pins = <0x03 0x0e 0x00 0x198 0x03 0x0d 0x00 0x198>; - phandle = <0x12c>; - }; - - i2s2m1-sdi { - rockchip,pins = <0x03 0x0a 0x03 0x198>; - phandle = <0x12a>; - }; - - i2s2m0-idle { - rockchip,pins = <0x02 0x10 0x00 0x198 0x02 0x0f 0x00 0x198>; - phandle = <0x388>; - }; - - i2s2m1-sclk { - rockchip,pins = <0x03 0x0d 0x03 0x19d>; - phandle = <0x12e>; - }; - - i2s2m1-lrck { - rockchip,pins = <0x03 0x0e 0x03 0x19d>; - phandle = <0x12d>; - }; - - i2s2m0-sclk { - rockchip,pins = <0x02 0x0f 0x02 0x19d>; - phandle = <0x38b>; - }; - - i2s2m0-sdo { - rockchip,pins = <0x04 0x13 0x02 0x198>; - phandle = <0x38d>; - }; - }; - - pcfg-pull-none-drv-level-6-smt { - drive-strength = <0x06>; - bias-disable; - input-schmitt-enable; - phandle = <0x304>; - }; - - ddrphych3 { - - ddrphych3-pins { - rockchip,pins = <0x04 0x0c 0x07 0x198 0x04 0x0d 0x07 0x198 0x04 0x0e 0x07 0x198 0x04 0x0f 0x07 0x198>; - phandle = <0x31b>; - }; - }; - - pcfg-pull-none-drv-level-13 { - drive-strength = <0x0d>; - bias-disable; - phandle = <0x457>; - }; - - i2c2 { - - i2c2m2-xfer { - rockchip,pins = <0x02 0x03 0x09 0x19d 0x02 0x02 0x09 0x19d>; - phandle = <0x35a>; - }; - - i2c2m1-xfer { - rockchip,pins = <0x02 0x11 0x09 0x19d 0x02 0x10 0x09 0x19d>; - phandle = <0x35d>; - }; - - i2c2m0-xfer { - rockchip,pins = <0x00 0x0f 0x09 0x19d 0x00 0x10 0x09 0x19d>; - phandle = <0x149>; - }; - - i2c2m4-xfer { - rockchip,pins = <0x01 0x01 0x09 0x19d 0x01 0x00 0x09 0x19d>; - phandle = <0x35c>; - }; - - i2c2m3-xfer { - rockchip,pins = <0x01 0x15 0x09 0x19d 0x01 0x14 0x09 0x19d>; - phandle = <0x35b>; - }; - }; - - auddsm { - - auddsm-pins { - rockchip,pins = <0x03 0x01 0x04 0x198 0x03 0x02 0x04 0x198 0x03 0x03 0x04 0x198 0x03 0x04 0x04 0x198>; - phandle = <0x144>; - }; - }; - - pwm8 { - - pwm8m2-pins { - rockchip,pins = <0x03 0x18 0x0b 0x198>; - phandle = <0x3d5>; - }; - - pwm8m1-pins { - rockchip,pins = <0x04 0x18 0x0b 0x198>; - phandle = <0x3d4>; - }; - - pwm8m0-pins { - rockchip,pins = <0x03 0x07 0x0b 0x198>; - phandle = <0x16d>; - }; - }; - - pmic { - - pmic-pins { - rockchip,pins = <0x00 0x07 0x00 0x19e 0x00 0x02 0x01 0x198 0x00 0x03 0x01 0x198 0x00 0x11 0x01 0x198 0x00 0x12 0x01 0x198 0x00 0x13 0x01 0x198 0x00 0x1e 0x01 0x198>; - phandle = <0x156>; - }; - }; - - pcfg-pull-none-drv-level-6 { - drive-strength = <0x06>; - bias-disable; - phandle = <0x2f2>; - }; - - jtag { - - jtagm2-pins { - rockchip,pins = <0x00 0x0d 0x02 0x198 0x00 0x0e 0x02 0x198>; - phandle = <0x391>; - }; - - jtagm1-pins { - rockchip,pins = <0x04 0x18 0x05 0x198 0x04 0x19 0x05 0x198>; - phandle = <0x390>; - }; - - jtagm0-pins { - rockchip,pins = <0x04 0x1a 0x05 0x198 0x04 0x1b 0x05 0x198>; - phandle = <0x38f>; - }; - }; - - gpio@fd8a0000 { - gpio-controller; - interrupts = <0x00 0x115 0x04>; - clocks = <0x02 0x284 0x02 0x285>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfd8a0000 0x00 0x100>; - phandle = <0x7b>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x00 0x20>; - interrupt-controller; - }; - - gmac1 { - - gmac1-rgmii-clk { - rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; - phandle = <0x111>; - }; - - gmac1-rx-bus2 { - rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; - phandle = <0x110>; - }; - - gmac1-txer { - rockchip,pins = <0x03 0x0a 0x01 0x198>; - phandle = <0x332>; - }; - - gmac1-clkinout { - rockchip,pins = <0x03 0x0e 0x01 0x198>; - phandle = <0x32e>; - }; - - gmac1-ptp-ref-clk { - rockchip,pins = <0x03 0x0f 0x01 0x198>; - phandle = <0x331>; - }; - - gmac1-ppsclk { - rockchip,pins = <0x03 0x11 0x01 0x198>; - phandle = <0x32f>; - }; - - gmac1-ppstrig { - rockchip,pins = <0x03 0x10 0x01 0x198>; - phandle = <0x330>; - }; - - gmac1-rgmii-bus { - rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; - phandle = <0x112>; - }; - - gmac1-tx-bus2 { - rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; - phandle = <0x10f>; - }; - - gmac1-miim { - rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; - phandle = <0x10e>; - }; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0x198>; - }; - - pwm13 { - - pwm13m2-pins { - rockchip,pins = <0x01 0x0f 0x0b 0x198>; - phandle = <0x3df>; - }; - - pwm13m1-pins { - rockchip,pins = <0x04 0x0e 0x0b 0x198>; - phandle = <0x3de>; - }; - - pwm13m0-pins { - rockchip,pins = <0x03 0x0e 0x0b 0x198>; - phandle = <0x172>; - }; - }; - - pcfg-output-high-pull-down { - output-high; - bias-pull-down; - phandle = <0x307>; - }; - - uart7 { - - uart7m1-ctsn { - rockchip,pins = <0x03 0x13 0x0a 0x198>; - phandle = <0x43b>; - }; - - uart7m2-xfer { - rockchip,pins = <0x01 0x0c 0x0a 0x19e 0x01 0x0d 0x0a 0x19e>; - phandle = <0x43d>; - }; - - uart7m0-ctsn { - rockchip,pins = <0x04 0x16 0x0a 0x198>; - phandle = <0x43f>; - }; - - uart7m1-xfer { - rockchip,pins = <0x03 0x11 0x0a 0x19e 0x03 0x10 0x0a 0x19e>; - phandle = <0x166>; - }; - - uart7m0-xfer { - rockchip,pins = <0x02 0x0c 0x0a 0x19e 0x02 0x0d 0x0a 0x19e>; - phandle = <0x43e>; - }; - - uart7m1-rtsn { - rockchip,pins = <0x03 0x12 0x0a 0x198>; - phandle = <0x43c>; - }; - - uart7m0-rtsn { - rockchip,pins = <0x04 0x12 0x0a 0x198>; - phandle = <0x440>; - }; - }; - - pcfg-pull-down-drv-level-9 { - drive-strength = <0x09>; - bias-pull-down; - phandle = <0x465>; - }; - - spi1 { - - spi1m1-cs1 { - rockchip,pins = <0x03 0x13 0x08 0x19a>; - phandle = <0x152>; - }; - - spi1m2-cs1 { - rockchip,pins = <0x01 0x1d 0x08 0x19a>; - phandle = <0x3fe>; - }; - - spi1m0-cs0 { - rockchip,pins = <0x02 0x13 0x08 0x19f>; - phandle = <0x400>; - }; - - spi1m2-pins { - rockchip,pins = <0x01 0x1a 0x08 0x19a 0x01 0x18 0x08 0x19a 0x01 0x19 0x08 0x19a>; - phandle = <0x3fc>; - }; - - spi1m1-pins { - rockchip,pins = <0x03 0x11 0x08 0x19a 0x03 0x10 0x08 0x19a 0x03 0x0f 0x08 0x19a>; - phandle = <0x153>; - }; - - spi1m1-cs0 { - rockchip,pins = <0x03 0x12 0x08 0x19a>; - phandle = <0x151>; - }; - - spi1m0-pins { - rockchip,pins = <0x02 0x10 0x08 0x19f 0x02 0x11 0x08 0x19f 0x02 0x12 0x08 0x19f>; - phandle = <0x3ff>; - }; - - spi1m0-cs1 { - rockchip,pins = <0x02 0x14 0x08 0x19f>; - phandle = <0x401>; - }; - - spi1m2-cs0 { - rockchip,pins = <0x01 0x1b 0x08 0x19a>; - phandle = <0x3fd>; - }; - }; - - pcfg-pull-up-drv-level-14 { - drive-strength = <0x0e>; - phandle = <0x461>; - bias-pull-up; - }; - - pcfg-output-low-pull-down { - bias-pull-down; - phandle = <0x30b>; - output-low; - }; - - pcfg-pull-down-drv-level-12 { - drive-strength = <0x0c>; - bias-pull-down; - phandle = <0x468>; - }; - - pcfg-pull-up-drv-level-1 { - drive-strength = <0x01>; - phandle = <0x19f>; - bias-pull-up; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0x19d>; - }; - - sdmmc { - - sdmmc-det { - rockchip,pins = <0x00 0x04 0x01 0x19e>; - phandle = <0x116>; - }; - - sdmmc-pwren { - rockchip,pins = <0x00 0x05 0x02 0x198>; - phandle = <0x3ef>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x04 0x18 0x01 0x199 0x04 0x19 0x01 0x199 0x04 0x1a 0x01 0x199 0x04 0x1b 0x01 0x199>; - phandle = <0x117>; - }; - - sdmmc-cmd { - rockchip,pins = <0x04 0x1c 0x01 0x199>; - phandle = <0x115>; - }; - - sdmmc-clk { - rockchip,pins = <0x04 0x1d 0x01 0x199>; - phandle = <0x114>; - }; - }; - - i2s0 { - - i2s0-sclk { - rockchip,pins = <0x01 0x13 0x01 0x19d>; - phandle = <0x11c>; - }; - - i2s0-sdo3 { - rockchip,pins = <0x01 0x1a 0x01 0x198>; - phandle = <0x37a>; - }; - - i2s0-lrck { - rockchip,pins = <0x01 0x15 0x01 0x19d>; - phandle = <0x11b>; - }; - - i2s0-sdo1 { - rockchip,pins = <0x01 0x18 0x01 0x198>; - phandle = <0x378>; - }; - - i2s0-sdi3 { - rockchip,pins = <0x01 0x19 0x02 0x198>; - phandle = <0x377>; - }; - - i2s0-mclk { - rockchip,pins = <0x01 0x12 0x01 0x19d>; - phandle = <0x17a>; - }; - - i2s0-sdi1 { - rockchip,pins = <0x01 0x1b 0x02 0x198>; - phandle = <0x375>; - }; - - i2s0-sdo2 { - rockchip,pins = <0x01 0x19 0x01 0x198>; - phandle = <0x379>; - }; - - i2s0-idle { - rockchip,pins = <0x01 0x15 0x00 0x198 0x01 0x13 0x00 0x198>; - phandle = <0x11f>; - }; - - i2s0-sdo0 { - rockchip,pins = <0x01 0x17 0x01 0x198>; - phandle = <0x11e>; - }; - - i2s0-sdi2 { - rockchip,pins = <0x01 0x1a 0x02 0x198>; - phandle = <0x376>; - }; - - i2s0-sdi0 { - rockchip,pins = <0x01 0x1c 0x02 0x198>; - phandle = <0x11d>; - }; - }; - - ddrphych1 { - - ddrphych1-pins { - rockchip,pins = <0x04 0x04 0x07 0x198 0x04 0x05 0x07 0x198 0x04 0x06 0x07 0x198 0x04 0x07 0x07 0x198>; - phandle = <0x319>; - }; - }; - - pcfg-pull-none-drv-level-11 { - drive-strength = <0x0b>; - bias-disable; - phandle = <0x455>; - }; - - i2c0 { - - i2c0m2-xfer { - rockchip,pins = <0x00 0x19 0x03 0x19d 0x00 0x1a 0x03 0x19d>; - phandle = <0x77>; - }; - - i2c0m1-xfer { - rockchip,pins = <0x04 0x15 0x09 0x19d 0x04 0x16 0x09 0x19d>; - phandle = <0x355>; - }; - - i2c0m0-xfer { - rockchip,pins = <0x00 0x0b 0x02 0x19d 0x00 0x06 0x02 0x19d>; - phandle = <0x354>; - }; - }; - - pwm6 { - - pwm6m2-pins { - rockchip,pins = <0x04 0x15 0x0b 0x198>; - phandle = <0x3d0>; - }; - - pwm6m1-pins { - rockchip,pins = <0x04 0x11 0x0b 0x198>; - phandle = <0x3cf>; - }; - - pwm6m0-pins { - rockchip,pins = <0x00 0x17 0x0b 0x198>; - phandle = <0x16b>; - }; - }; - - hym8563 { - - hym8563-int { - rockchip,pins = <0x00 0x08 0x00 0x198>; - phandle = <0x7a>; - }; - }; - - pcfg-pull-none-drv-level-4 { - drive-strength = <0x04>; - bias-disable; - phandle = <0x2f0>; - }; - - pcfg-output-high-pull-up { - output-high; - phandle = <0x306>; - bias-pull-up; - }; - - pwm11 { - - pwm11m3-pins { - rockchip,pins = <0x03 0x1d 0x0b 0x198>; - phandle = <0x3dc>; - }; - - pwm11m2-pins { - rockchip,pins = <0x01 0x14 0x0b 0x198>; - phandle = <0x3db>; - }; - - pwm11m1-pins { - rockchip,pins = <0x04 0x0c 0x0b 0x198>; - phandle = <0x3da>; - }; - - pwm11m0-pins { - rockchip,pins = <0x03 0x01 0x0b 0x198>; - phandle = <0x170>; - }; - }; - - bt1120 { - - bt1120-pins { - rockchip,pins = <0x04 0x08 0x02 0x198 0x04 0x00 0x02 0x198 0x04 0x01 0x02 0x198 0x04 0x02 0x02 0x198 0x04 0x03 0x02 0x198 0x04 0x04 0x02 0x198 0x04 0x05 0x02 0x198 0x04 0x06 0x02 0x198 0x04 0x07 0x02 0x198 0x04 0x0a 0x02 0x198 0x04 0x0b 0x02 0x198 0x04 0x0c 0x02 0x198 0x04 0x0d 0x02 0x198 0x04 0x0e 0x02 0x198 0x04 0x0f 0x02 0x198 0x04 0x10 0x02 0x198 0x04 0x11 0x02 0x198>; - phandle = <0x71>; - }; - }; - - pcfg-output-low-pull-up { - phandle = <0x30a>; - bias-pull-up; - output-low; - }; - - uart5 { - - uart5m1-ctsn { - rockchip,pins = <0x02 0x02 0x0a 0x198>; - phandle = <0x433>; - }; - - uart5m2-xfer { - rockchip,pins = <0x02 0x1c 0x0a 0x19e 0x02 0x1d 0x0a 0x19e>; - phandle = <0x435>; - }; - - uart5m0-ctsn { - rockchip,pins = <0x04 0x1a 0x0a 0x198>; - phandle = <0x431>; - }; - - uart5m1-xfer { - rockchip,pins = <0x03 0x15 0x0a 0x19e 0x03 0x14 0x0a 0x19e>; - phandle = <0x164>; - }; - - uart5m0-xfer { - rockchip,pins = <0x04 0x1c 0x0a 0x19e 0x04 0x1d 0x0a 0x19e>; - phandle = <0x430>; - }; - - uart5m1-rtsn { - rockchip,pins = <0x02 0x03 0x0a 0x198>; - phandle = <0x434>; - }; - - uart5m0-rtsn { - rockchip,pins = <0x04 0x1b 0x0a 0x198>; - phandle = <0x432>; - }; - }; - - sdio { - - sdiom1-pins { - rockchip,pins = <0x03 0x05 0x02 0x198 0x03 0x04 0x02 0x19e 0x03 0x00 0x02 0x19e 0x03 0x01 0x02 0x19e 0x03 0x02 0x02 0x19e 0x03 0x03 0x02 0x19e>; - phandle = <0x119>; - }; - - sdiom0-pins { - rockchip,pins = <0x02 0x0b 0x02 0x198 0x02 0x0a 0x02 0x19e 0x02 0x06 0x02 0x19e 0x02 0x07 0x02 0x19e 0x02 0x08 0x02 0x19e 0x02 0x09 0x02 0x19e>; - phandle = <0x3ee>; - }; - }; - - spdif1 { - - spdif1m0-tx { - rockchip,pins = <0x01 0x0f 0x03 0x198>; - phandle = <0x143>; - }; - - spdif1m2-tx { - rockchip,pins = <0x04 0x11 0x03 0x198>; - phandle = <0x3f2>; - }; - - spdif1m1-tx { - rockchip,pins = <0x04 0x09 0x02 0x198>; - phandle = <0x3f1>; - }; - }; - - pcfg-pull-down-drv-level-7 { - drive-strength = <0x07>; - bias-pull-down; - phandle = <0x463>; - }; - - gpio@fec30000 { - gpio-controller; - interrupts = <0x00 0x117 0x04>; - clocks = <0x02 0x7f 0x02 0x80>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec30000 0x00 0x100>; - phandle = <0x79>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x40 0x20>; - interrupt-controller; - }; - - pcfg-pull-up-drv-level-12 { - drive-strength = <0x0c>; - phandle = <0x45f>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-10 { - drive-strength = <0x0a>; - bias-pull-down; - phandle = <0x466>; - }; - - dp1 { - - dp1m1-pins { - rockchip,pins = <0x00 0x15 0x0a 0x198>; - phandle = <0x320>; - }; - - dp1m0-pins { - rockchip,pins = <0x03 0x1d 0x05 0x198>; - phandle = <0x31f>; - }; - - dp1m2-pins { - rockchip,pins = <0x01 0x01 0x05 0x198>; - phandle = <0x321>; - }; - }; - - vop { - - vop-pins { - rockchip,pins = <0x01 0x02 0x01 0x198>; - phandle = <0x44f>; - }; - }; - - pwm4 { - - pwm4m1-pins { - rockchip,pins = <0x04 0x13 0x0b 0x198>; - phandle = <0x3cc>; - }; - - pwm4m0-pins { - rockchip,pins = <0x00 0x15 0x0b 0x198>; - phandle = <0x169>; - }; - }; - - pcfg-pull-none-drv-level-2 { - drive-strength = <0x02>; - bias-disable; - phandle = <0x1a0>; - }; - - pcfg-pull-none-drv-level-3-smt { - drive-strength = <0x03>; - bias-disable; - input-schmitt-enable; - phandle = <0x302>; - }; - - uart3 { - - uart3m2-xfer { - rockchip,pins = <0x04 0x06 0x0a 0x19e 0x04 0x05 0x0a 0x19e>; - phandle = <0x429>; - }; - - uart3m1-xfer { - rockchip,pins = <0x03 0x0e 0x0a 0x19e 0x03 0x0d 0x0a 0x19e>; - phandle = <0x162>; - }; - - uart3-ctsn { - rockchip,pins = <0x01 0x13 0x0a 0x198>; - phandle = <0x42a>; - }; - - uart3m0-xfer { - rockchip,pins = <0x01 0x10 0x0a 0x19e 0x01 0x11 0x0a 0x19e>; - phandle = <0x428>; - }; - - uart3-rtsn { - rockchip,pins = <0x01 0x12 0x0a 0x198>; - phandle = <0x42b>; - }; - }; - - pcfg-pull-down-drv-level-5 { - drive-strength = <0x05>; - bias-pull-down; - phandle = <0x2fc>; - }; - - pcfg-pull-up-drv-level-8 { - drive-strength = <0x08>; - phandle = <0x45b>; - bias-pull-up; - }; - - pcfg-pull-up-drv-level-10 { - drive-strength = <0x0a>; - phandle = <0x45d>; - bias-pull-up; - }; - - pcfg-output-low { - phandle = <0x309>; - output-low; - }; - - i2c7 { - - i2c7m3-xfer { - rockchip,pins = <0x04 0x0a 0x09 0x19d 0x04 0x0b 0x09 0x19d>; - phandle = <0x36f>; - }; - - i2c7m2-xfer { - rockchip,pins = <0x03 0x1a 0x09 0x19d 0x03 0x1b 0x09 0x19d>; - phandle = <0x36e>; - }; - - i2c7m1-xfer { - rockchip,pins = <0x04 0x13 0x09 0x19d 0x04 0x14 0x09 0x19d>; - phandle = <0x370>; - }; - - i2c7m0-xfer { - rockchip,pins = <0x01 0x18 0x09 0x19d 0x01 0x19 0x09 0x19d>; - phandle = <0x185>; - }; - }; - - pwm2 { - - pwm2m2-pins { - rockchip,pins = <0x04 0x12 0x0b 0x198>; - phandle = <0x3c8>; - }; - - pwm2m1-pins { - rockchip,pins = <0x03 0x09 0x0b 0x198>; - phandle = <0x3c7>; - }; - - pwm2m0-pins { - rockchip,pins = <0x00 0x14 0x03 0x198>; - phandle = <0x80>; - }; - }; - - pcfg-pull-none-drv-level-0 { - drive-strength = <0x00>; - bias-disable; - phandle = <0x2ed>; - }; - - sata1 { - - sata1m1-pins { - rockchip,pins = <0x01 0x01 0x06 0x198>; - phandle = <0x3eb>; - }; - - sata1m0-pins { - rockchip,pins = <0x04 0x0d 0x06 0x198>; - phandle = <0x3ea>; - }; - }; - - pmu { - - pmu-pins { - rockchip,pins = <0x00 0x05 0x03 0x198>; - phandle = <0x3c2>; - }; - }; - - hdmirx { - - hdmirx-det { - rockchip,pins = <0x01 0x1d 0x00 0x198>; - phandle = <0x1b4>; - }; - }; - - uart1 { - - uart1m0-ctsn { - rockchip,pins = <0x02 0x11 0x0a 0x198>; - phandle = <0x423>; - }; - - uart1m1-xfer { - rockchip,pins = <0x01 0x0f 0x0a 0x19e 0x01 0x0e 0x0a 0x19e>; - phandle = <0x160>; - }; - - uart1m0-xfer { - rockchip,pins = <0x02 0x0e 0x0a 0x19e 0x02 0x0f 0x0a 0x19e>; - phandle = <0x422>; - }; - - uart1m2-rtsn { - rockchip,pins = <0x00 0x17 0x0a 0x198>; - phandle = <0x421>; - }; - - uart1m1-rtsn { - rockchip,pins = <0x01 0x1e 0x0a 0x198>; - phandle = <0x41e>; - }; - - uart1m0-rtsn { - rockchip,pins = <0x02 0x10 0x0a 0x198>; - phandle = <0x424>; - }; - - uart1m2-ctsn { - rockchip,pins = <0x00 0x18 0x0a 0x198>; - phandle = <0x420>; - }; - - uart1m1-ctsn { - rockchip,pins = <0x01 0x1f 0x0a 0x198>; - phandle = <0x41d>; - }; - - uart1m2-xfer { - rockchip,pins = <0x00 0x1a 0x0a 0x19e 0x00 0x19 0x0a 0x19e>; - phandle = <0x41f>; - }; - }; - - hdmi { - - hdmim1-rx-cec { - rockchip,pins = <0x03 0x19 0x05 0x198>; - phandle = <0x338>; - }; - - hdmim0-rx-scl { - rockchip,pins = <0x00 0x1a 0x0b 0x198>; - phandle = <0x336>; - }; - - hdmim0-rx-sda { - rockchip,pins = <0x00 0x19 0x0b 0x198>; - phandle = <0x337>; - }; - - hdmim0-tx0-cec { - rockchip,pins = <0x04 0x11 0x05 0x198>; - phandle = <0xf9>; - }; - - hdmim2-rx-cec { - rockchip,pins = <0x01 0x0f 0x05 0x198>; - phandle = <0x342>; - }; - - hdmim1-rx-scl { - rockchip,pins = <0x03 0x1a 0x05 0x19d>; - phandle = <0x33a>; - }; - - hdmim1-rx-sda { - rockchip,pins = <0x03 0x1b 0x05 0x19d>; - phandle = <0x33b>; - }; - - hdmim0-tx0-scl { - rockchip,pins = <0x04 0x0f 0x05 0x19b>; - phandle = <0xfb>; - }; - - hdmim0-tx0-sda { - rockchip,pins = <0x04 0x10 0x05 0x19c>; - phandle = <0xfc>; - }; - - hdmim2-rx-scl { - rockchip,pins = <0x01 0x1e 0x05 0x198>; - phandle = <0x344>; - }; - - hdmim2-rx-sda { - rockchip,pins = <0x01 0x1f 0x05 0x198>; - phandle = <0x345>; - }; - - hdmim0-tx0-hpd { - rockchip,pins = <0x01 0x05 0x05 0x198>; - phandle = <0xfa>; - }; - - hdmim2-rx-hpdin { - rockchip,pins = <0x01 0x0e 0x05 0x198>; - phandle = <0x343>; - }; - - hdmi-debug6 { - rockchip,pins = <0x01 0x00 0x07 0x198>; - phandle = <0x350>; - }; - - hdmim2-tx0-scl { - rockchip,pins = <0x03 0x17 0x05 0x19b>; - phandle = <0x346>; - }; - - hdmim2-tx0-sda { - rockchip,pins = <0x03 0x18 0x05 0x19c>; - phandle = <0x347>; - }; - - hdmi-debug4 { - rockchip,pins = <0x01 0x0b 0x07 0x198>; - phandle = <0x34e>; - }; - - hdmim0-tx1-cec { - rockchip,pins = <0x02 0x14 0x04 0x198>; - phandle = <0x351>; - }; - - hdmim0-tx1-scl { - rockchip,pins = <0x02 0x0d 0x04 0x198>; - phandle = <0x352>; - }; - - hdmim0-tx1-sda { - rockchip,pins = <0x02 0x0c 0x04 0x198>; - phandle = <0x353>; - }; - - hdmi-debug2 { - rockchip,pins = <0x01 0x09 0x07 0x198>; - phandle = <0x34c>; - }; - - hdmim0-tx1-hpd { - rockchip,pins = <0x01 0x06 0x05 0x198>; - phandle = <0x1a9>; - }; - - hdmim1-rx { - rockchip,pins = <0x03 0x19 0x05 0x198 0x03 0x1a 0x05 0x19d 0x03 0x1b 0x05 0x19d 0x03 0x1c 0x05 0x198>; - phandle = <0x1b3>; - }; - - hdmim2-tx1-cec { - rockchip,pins = <0x03 0x14 0x05 0x198>; - phandle = <0x1a8>; - }; - - hdmi-debug0 { - rockchip,pins = <0x01 0x07 0x07 0x198>; - phandle = <0x34a>; - }; - - hdmim2-tx1-scl { - rockchip,pins = <0x01 0x04 0x05 0x19b>; - phandle = <0x348>; - }; - - hdmim2-tx1-sda { - rockchip,pins = <0x01 0x03 0x05 0x19c>; - phandle = <0x349>; - }; - - hdmim1-tx0-cec { - rockchip,pins = <0x00 0x19 0x0d 0x198>; - phandle = <0x33c>; - }; - - hdmim1-tx0-scl { - rockchip,pins = <0x00 0x1d 0x0b 0x19b>; - phandle = <0x33e>; - }; - - hdmim1-tx0-sda { - rockchip,pins = <0x00 0x1c 0x0b 0x19c>; - phandle = <0x33f>; - }; - - hdmim1-tx0-hpd { - rockchip,pins = <0x03 0x1c 0x03 0x198>; - phandle = <0x33d>; - }; - - hdmim0-rx-hpdin { - rockchip,pins = <0x04 0x0e 0x05 0x198>; - phandle = <0x335>; - }; - - hdmi-debug5 { - rockchip,pins = <0x01 0x0c 0x07 0x198>; - phandle = <0x34f>; - }; - - hdmi-debug3 { - rockchip,pins = <0x01 0x0a 0x07 0x198>; - phandle = <0x34d>; - }; - - hdmim1-tx1-cec { - rockchip,pins = <0x00 0x1a 0x0d 0x198>; - phandle = <0x340>; - }; - - hdmi-debug1 { - rockchip,pins = <0x01 0x08 0x07 0x198>; - phandle = <0x34b>; - }; - - hdmim1-tx1-scl { - rockchip,pins = <0x03 0x16 0x05 0x19b>; - phandle = <0x1aa>; - }; - - hdmim1-tx1-sda { - rockchip,pins = <0x03 0x15 0x05 0x19c>; - phandle = <0x1ab>; - }; - - hdmim1-tx1-hpd { - rockchip,pins = <0x03 0x0f 0x05 0x198>; - phandle = <0x341>; - }; - - hdmim1-rx-hpdin { - rockchip,pins = <0x03 0x1c 0x05 0x198>; - phandle = <0x339>; - }; - - hdmim0-rx-cec { - rockchip,pins = <0x04 0x0d 0x05 0x198>; - phandle = <0x334>; - }; - }; - - pcfg-pull-down-drv-level-3 { - drive-strength = <0x03>; - bias-pull-down; - phandle = <0x2fa>; - }; - - pcfg-pull-up-drv-level-6 { - drive-strength = <0x06>; - phandle = <0x19a>; - bias-pull-up; - }; - - i2c5 { - - i2c5m3-xfer { - rockchip,pins = <0x01 0x0e 0x09 0x19d 0x01 0x0f 0x09 0x19d>; - phandle = <0x368>; - }; - - i2c5m2-xfer { - rockchip,pins = <0x04 0x06 0x09 0x19d 0x04 0x07 0x09 0x19d>; - phandle = <0x367>; - }; - - i2c5m1-xfer { - rockchip,pins = <0x04 0x0e 0x09 0x19d 0x04 0x0f 0x09 0x19d>; - phandle = <0x366>; - }; - - i2c5m0-xfer { - rockchip,pins = <0x03 0x17 0x09 0x19d 0x03 0x18 0x09 0x19d>; - phandle = <0x14d>; - }; - - i2c5m4-xfer { - rockchip,pins = <0x02 0x0e 0x09 0x19d 0x02 0x0f 0x09 0x19d>; - phandle = <0x369>; - }; - }; - - pcfg-pull-none-drv-level-9 { - drive-strength = <0x09>; - bias-disable; - phandle = <0x453>; - }; - - pdm0 { - - pdm0m1-sdi3 { - rockchip,pins = <0x00 0x1e 0x02 0x198>; - phandle = <0x3ba>; - }; - - pdm0m1-clk { - rockchip,pins = <0x00 0x10 0x02 0x198>; - phandle = <0x3b4>; - }; - - pdm0m1-sdi1 { - rockchip,pins = <0x00 0x18 0x02 0x198>; - phandle = <0x3b8>; - }; - - pdm0m0-sdi3 { - rockchip,pins = <0x01 0x1b 0x03 0x198>; - phandle = <0x137>; - }; - - pdm0m0-sdi1 { - rockchip,pins = <0x01 0x19 0x03 0x198>; - phandle = <0x135>; - }; - - pdm0m1-clk1 { - rockchip,pins = <0x00 0x14 0x02 0x198>; - phandle = <0x3b5>; - }; - - pdm0m1-idle { - rockchip,pins = <0x00 0x10 0x00 0x198 0x00 0x14 0x00 0x198>; - phandle = <0x3b6>; - }; - - pdm0m0-clk1 { - rockchip,pins = <0x01 0x14 0x03 0x198>; - phandle = <0x13a>; - }; - - pdm0m1-sdi2 { - rockchip,pins = <0x00 0x1c 0x02 0x198>; - phandle = <0x3b9>; - }; - - pdm0m0-idle { - rockchip,pins = <0x01 0x16 0x00 0x198 0x01 0x14 0x00 0x198>; - phandle = <0x138>; - }; - - pdm0m1-sdi0 { - rockchip,pins = <0x00 0x17 0x02 0x198>; - phandle = <0x3b7>; - }; - - pdm0m0-sdi2 { - rockchip,pins = <0x01 0x1a 0x03 0x198>; - phandle = <0x136>; - }; - - pdm0m0-sdi0 { - rockchip,pins = <0x01 0x1d 0x03 0x198>; - phandle = <0x134>; - }; - - pdm0m0-clk { - rockchip,pins = <0x01 0x16 0x03 0x198>; - phandle = <0x139>; - }; - }; - - pcfg-output-high-pull-none { - bias-disable; - output-high; - phandle = <0x308>; - }; - - pwm0 { - - pwm0m1-pins { - rockchip,pins = <0x01 0x1a 0x0b 0x198>; - phandle = <0x3c3>; - }; - - pwm0m0-pins { - rockchip,pins = <0x00 0x0f 0x03 0x198>; - phandle = <0x7e>; - }; - - pwm0m2-pins { - rockchip,pins = <0x01 0x02 0x0b 0x198>; - phandle = <0x3c4>; - }; - }; - - cif { - - cif-dvp-clk { - rockchip,pins = <0x04 0x08 0x01 0x198 0x04 0x0a 0x01 0x198 0x04 0x0b 0x01 0x198>; - phandle = <0x311>; - }; - - cif-clk { - rockchip,pins = <0x04 0x0c 0x01 0x198>; - phandle = <0x310>; - }; - - cif-dvp-bus8 { - rockchip,pins = <0x04 0x00 0x01 0x198 0x04 0x01 0x01 0x198 0x04 0x02 0x01 0x198 0x04 0x03 0x01 0x198 0x04 0x04 0x01 0x198 0x04 0x05 0x01 0x198 0x04 0x06 0x01 0x198 0x04 0x07 0x01 0x198>; - phandle = <0x313>; - }; - - cif-dvp-bus16 { - rockchip,pins = <0x03 0x14 0x01 0x198 0x03 0x15 0x01 0x198 0x03 0x16 0x01 0x198 0x03 0x17 0x01 0x198 0x03 0x18 0x01 0x198 0x03 0x19 0x01 0x198 0x03 0x1a 0x01 0x198 0x03 0x1b 0x01 0x198>; - phandle = <0x312>; - }; - }; - - can1 { - - can1m1-pins { - rockchip,pins = <0x04 0x0a 0x0c 0x198 0x04 0x0b 0x0c 0x198>; - phandle = <0x146>; - }; - - can1m0-pins { - rockchip,pins = <0x03 0x0d 0x09 0x198 0x03 0x0e 0x09 0x198>; - phandle = <0x30e>; - }; - }; - - pcfg-output-low-pull-none { - bias-disable; - phandle = <0x30c>; - output-low; - }; - - gpio@fec40000 { - gpio-controller; - interrupts = <0x00 0x118 0x04>; - clocks = <0x02 0x81 0x02 0x82>; - compatible = "rockchip,gpio-bank"; - #interrupt-cells = <0x02>; - reg = <0x00 0xfec40000 0x00 0x100>; - phandle = <0x181>; - #gpio-cells = <0x02>; - gpio-ranges = <0x197 0x00 0x60 0x20>; - interrupt-controller; - }; - - spi4 { - - spi4m0-cs0 { - rockchip,pins = <0x01 0x13 0x08 0x19a>; - phandle = <0x187>; - }; - - spi4m1-cs0 { - rockchip,pins = <0x03 0x03 0x08 0x19a>; - phandle = <0x413>; - }; - - spi4m2-pins { - rockchip,pins = <0x01 0x02 0x08 0x19a 0x01 0x00 0x08 0x19a 0x01 0x01 0x08 0x19a>; - phandle = <0x415>; - }; - - spi4m0-cs1 { - rockchip,pins = <0x01 0x14 0x08 0x19a>; - phandle = <0x188>; - }; - - spi4m1-pins { - rockchip,pins = <0x03 0x02 0x08 0x19a 0x03 0x00 0x08 0x19a 0x03 0x01 0x08 0x19a>; - phandle = <0x412>; - }; - - spi4m2-cs0 { - rockchip,pins = <0x01 0x03 0x08 0x19a>; - phandle = <0x416>; - }; - - spi4m0-pins { - rockchip,pins = <0x01 0x12 0x08 0x19a 0x01 0x10 0x08 0x19a 0x01 0x11 0x08 0x19a>; - phandle = <0x189>; - }; - - spi4m1-cs1 { - rockchip,pins = <0x03 0x04 0x08 0x19a>; - phandle = <0x414>; - }; - }; - - pcfg-pull-down-drv-level-15 { - drive-strength = <0x0f>; - bias-pull-down; - phandle = <0x46b>; - }; - - pcfg-pull-up-smt { - input-schmitt-enable; - phandle = <0x2fe>; - bias-pull-up; - }; - - pcfg-pull-down-drv-level-1 { - drive-strength = <0x01>; - bias-pull-down; - phandle = <0x2f8>; - }; - - pcfg-pull-up-drv-level-4 { - drive-strength = <0x04>; - phandle = <0x2f5>; - bias-pull-up; - }; - - wireless-wlan { - - wifi-host-wake-irq { - rockchip,pins = <0x00 0x0a 0x00 0x198>; - phandle = <0x1ea>; - }; - }; - - wdt-pc9202 { - - wdt-en-base { - rockchip,pins = <0x00 0x14 0x00 0x198>; - phandle = <0x14c>; - }; - }; - - pcfg-pull-none-drv-level-0-smt { - drive-strength = <0x00>; - bias-disable; - input-schmitt-enable; - phandle = <0x300>; - }; - - i2s3 { - - i2s3-sdi { - rockchip,pins = <0x03 0x04 0x03 0x198>; - phandle = <0x12f>; - }; - - i2s3-idle { - rockchip,pins = <0x03 0x02 0x00 0x198 0x03 0x01 0x00 0x198>; - phandle = <0x131>; - }; - - i2s3-sclk { - rockchip,pins = <0x03 0x01 0x03 0x19d>; - phandle = <0x133>; - }; - - i2s3-lrck { - rockchip,pins = <0x03 0x02 0x03 0x19d>; - phandle = <0x132>; - }; - - i2s3-sdo { - rockchip,pins = <0x03 0x03 0x03 0x198>; - phandle = <0x130>; - }; - - i2s3-mclk { - rockchip,pins = <0x03 0x00 0x03 0x19d>; - phandle = <0x38e>; - }; - }; - - pcfg-pull-none-drv-level-14 { - drive-strength = <0x0e>; - bias-disable; - phandle = <0x458>; - }; - }; - - rkcif-mipi-lvds4-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x473>; - }; - - bt-sco { - #sound-dai-cells = <0x01>; - compatible = "delta,dfbmcs320"; - status = "disabled"; - phandle = <0x1d2>; - }; - - phy@fed80000 { - svid = <0xff01>; - orientation-switch; - sbu2-dc-gpios = <0x10d 0x07 0x00>; - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x28 0x02 0x29 0x02 0x2a 0x02 0x2b 0x02 0x482>; - clocks = <0x02 0x2b6 0x02 0x27f 0x02 0x269 0x18d>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - reg = <0x00 0xfed80000 0x00 0x10000>; - phandle = <0x2ea>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x18b>; - sbu1-dc-gpios = <0x10d 0x06 0x00>; - rockchip,usbdpphy-grf = <0x18c>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0xf6>; - }; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@1 { - remote-endpoint = <0x18f>; - reg = <0x01>; - phandle = <0x17f>; - }; - - endpoint@0 { - remote-endpoint = <0x18e>; - reg = <0x00>; - phandle = <0x17e>; - }; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x67>; - }; - }; - - interrupt-controller@fe600000 { - #address-cells = <0x02>; - interrupts = <0x01 0x09 0x04>; - #size-cells = <0x02>; - compatible = "arm,gic-v3"; - ranges; - #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; - phandle = <0x01>; - interrupt-controller; - - msi-controller@fe640000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe640000 0x00 0x20000>; - phandle = <0x106>; - #msi-cells = <0x01>; - }; - - msi-controller@fe660000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe660000 0x00 0x20000>; - phandle = <0x1b6>; - #msi-cells = <0x01>; - }; - }; - - ethernet@fe1c0000 { - power-domains = <0x60 0x21>; - pinctrl-names = "default"; - phy-mode = "rgmii-rxid"; - snps,mixed-burst; - snps,mtl-rx-config = <0x10b>; - snps,reset-active-low; - pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; - clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; - snps,mtl-tx-config = <0x10c>; - local-mac-address = [a6 50 47 45 20 1c]; - resets = <0x02 0x20b>; - interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; - clocks = <0x02 0x144 0x02 0x145 0x02 0x168 0x02 0x16d 0x02 0x143>; - clock_in_out = "output"; - snps,tso; - compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "macirq\0eth_wake_irq"; - snps,reset-gpio = <0x10d 0x08 0x01>; - reg = <0x00 0xfe1c0000 0x00 0x10000>; - rockchip,php_grf = <0x76>; - phandle = <0x109>; - phy-handle = <0x113>; - reset-names = "stmmaceth"; - tx_delay = <0x40>; - snps,axi-config = <0x10a>; - snps,reset-delays-us = <0x00 0x4e20 0x186a0>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - phandle = <0x28f>; - - phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x01>; - phandle = <0x113>; - }; - }; - - tx-queues-config { - phandle = <0x10c>; - snps,tx-queues-to-use = <0x01>; - - queue0 { - }; - }; - - stmmac-axi-config { - snps,wr_osr_lmt = <0x04>; - phandle = <0x10a>; - snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; - snps,rd_osr_lmt = <0x08>; - }; - - rx-queues-config { - snps,rx-queues-to-use = <0x01>; - phandle = <0x10b>; - - queue0 { - }; - }; - }; - - pcie-essd { - regulator-max-microvolt = <0x2625a0>; - enable-active-high; - regulator-min-microvolt = <0x2625a0>; - regulator-name = "pcie_essd"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x1ba>; - vin-supply = <0x1cd>; - gpios = <0x181 0x0f 0x00>; - }; - - iommu@fdab9000 { - clock-names = "aclk0\0aclk1\0aclk2\0iface0\0iface1\0iface2"; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "npu0_mmu\0npu1_mmu\0npu2_mmu"; - reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100 0x00 0xfdaca000 0x00 0x100 0x00 0xfdada000 0x00 0x100>; - phandle = <0xb2>; - }; - - otp@fecc0000 { - #address-cells = <0x01>; - clock-names = "otpc\0apb\0arb\0phy"; - resets = <0x02 0x12a 0x02 0x129 0x02 0x12b>; - clocks = <0x02 0x96 0x02 0x95 0x02 0x97 0x02 0x99>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-otp"; - reg = <0x00 0xfecc0000 0x00 0x400>; - phandle = <0x2e7>; - reset-names = "otpc\0apb\0arb"; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x2a>; - }; - - cpul-opp-info@3d { - reg = <0x3d 0x06>; - phandle = <0x20>; - }; - - cpub1-leakage@18 { - reg = <0x18 0x01>; - phandle = <0x27>; - }; - - vop-opp-info@61 { - reg = <0x61 0x06>; - phandle = <0x2e8>; - }; - - cpul-leakage@19 { - reg = <0x19 0x01>; - phandle = <0x1f>; - }; - - codec-leakage@29 { - reg = <0x29 0x01>; - phandle = <0xc6>; - }; - - cpu-version@1c { - bits = <0x03 0x03>; - reg = <0x1c 0x01>; - phandle = <0x2b>; - }; - - cpub0-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x24>; - }; - - log-leakage@1a { - reg = <0x1a 0x01>; - phandle = <0x44>; - }; - - cpu-code@2 { - reg = <0x02 0x02>; - phandle = <0x2c>; - }; - - package-serial-number-low@6 { - bits = <0x05 0x03>; - reg = <0x06 0x01>; - phandle = <0xd4>; - }; - - npu-opp-info@55 { - reg = <0x55 0x06>; - phandle = <0xb5>; - }; - - package-serial-number-high@5 { - bits = <0x00 0x01>; - reg = <0x05 0x01>; - phandle = <0xd5>; - }; - - cpub01-opp-info@43 { - reg = <0x43 0x06>; - phandle = <0x25>; - }; - - dmc-opp-info@5b { - reg = <0x5b 0x06>; - phandle = <0x45>; - }; - - npu-leakage@28 { - reg = <0x28 0x01>; - phandle = <0xb4>; - }; - - gpu-leakage@1b { - reg = <0x1b 0x01>; - phandle = <0x63>; - }; - - specification-serial-number@6 { - bits = <0x00 0x05>; - reg = <0x06 0x01>; - phandle = <0x21>; - }; - - venc-opp-info@67 { - reg = <0x67 0x06>; - phandle = <0xc7>; - }; - - gpu-opp-info@4f { - reg = <0x4f 0x06>; - phandle = <0x64>; - }; - - cpub23-opp-info@49 { - reg = <0x49 0x06>; - phandle = <0x28>; - }; - }; - - i2s@fddf0000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x243>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3e8>; - interrupts = <0x00 0xb9 0x04>; - clocks = <0x02 0x246 0x02 0x246 0x02 0x248>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf0000 0x00 0x1000>; - phandle = <0x1d3>; - dmas = <0xf2 0x02>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - dma-controller@fea10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x56 0x04 0x00 0x57 0x04>; - clocks = <0x02 0x78>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea10000 0x00 0x4000>; - phandle = <0x7c>; - #dma-cells = <0x01>; - }; - - pwm@febd0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x169>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebd0000 0x00 0x10>; - phandle = <0x2d2>; - }; - - rkvenc-ccu { - compatible = "rockchip,rkv-encoder-v2-ccu"; - status = "okay"; - phandle = <0xc3>; - }; - - syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd58c000 0x00 0x1000>; - phandle = <0xc8>; - - rgb { - pinctrl-names = "default"; - pinctrl-0 = <0x71>; - compatible = "rockchip,rk3588-rgb"; - status = "disabled"; - phandle = <0x25c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@2 { - remote-endpoint = <0x3d>; - status = "disabled"; - reg = <0x02>; - phandle = <0xf0>; - }; - }; - }; - }; - }; - - spi@fe2b0000 { - #address-cells = <0x01>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x13d>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0xce 0x04>; - clocks = <0x02 0x13d 0x02 0x13e>; - #size-cells = <0x00>; - compatible = "rockchip,sfc"; - status = "disabled"; - reg = <0x00 0xfe2b0000 0x00 0x4000>; - phandle = <0x292>; - }; - - qos@fdf82200 { - compatible = "syscon"; - reg = <0x00 0xfdf82200 0x00 0x20>; - phandle = <0x9e>; - }; - - mmc@fe2c0000 { - power-domains = <0x60 0x28>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x114 0x115 0x116 0x117>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - cap-sd-highspeed; - vqmmc-supply = <0x118>; - no-mmc; - bus-width = <0x04>; - no-sdio; - interrupts = <0x00 0xcb 0x04>; - clocks = <0x0e 0x17 0x0e 0x09 0x02 0x2c2 0x02 0x2c3>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "okay"; - disable-wp; - reg = <0x00 0xfe2c0000 0x00 0x4000>; - phandle = <0x293>; - sd-uhs-sdr104; - max-frequency = <0x8f0d180>; - cap-mmc-highspeed; - }; - - serial@feb80000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x164>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x150 0x04>; - clocks = <0x02 0xc7 0x02 0xaf>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb80000 0x00 0x100>; - phandle = <0x2cd>; - dmas = <0xf1 0x0b 0xf1 0x0c>; - reg-shift = <0x02>; - }; - - phy@fee10000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2be>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20006 0x02 0x4d7>; - clocks = <0x02 0x2be 0x02 0x186 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x1cb>; - reg = <0x00 0xfee10000 0x00 0x100>; - phandle = <0x1bc>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x00 0x00 0x00>; - }; - - can@fea60000 { - pinctrl-names = "default"; - pinctrl-0 = <0x146>; - clock-names = "baudclk\0apb_pclk"; - assigned-clocks = <0x02 0x72>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0xbb 0x02 0xba>; - interrupts = <0x00 0x156 0x04>; - clocks = <0x02 0x72 0x02 0x71>; - compatible = "rockchip,can-2.0"; - status = "okay"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea60000 0x00 0x1000>; - phandle = <0x2a1>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4c0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x140 0x141>; - pinctrl-0 = <0x13b 0x13c 0x13d 0x13e>; - clock-names = "pdm_clk\0pdm_hclk"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x05>; - clocks = <0x02 0x3b 0x02 0x3a>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x13f>; - status = "disabled"; - reg = <0x00 0xfe4c0000 0x00 0x1000>; - phandle = <0x29b>; - dmas = <0xf1 0x04>; - }; - - rkcif-mipi-lvds3-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x239>; - }; - - qos@fdf66e00 { - compatible = "syscon"; - reg = <0x00 0xfdf66e00 0x00 0x20>; - phandle = <0x9a>; - }; - - usb@fc800000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6b>; - interrupts = <0x00 0xd7 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc800000 0x00 0x40000>; - phandle = <0x254>; - }; - - i2c@fd880000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x77>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xc0022 0x02 0xc0021>; - interrupts = <0x00 0x13d 0x04>; - clocks = <0x02 0x287 0x02 0x286>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfd880000 0x00 0x1000>; - phandle = <0x25f>; - reset-names = "i2c\0apb"; - - hym8563@51 { - pinctrl-names = "default"; - clock-output-names = "hym8563"; - pinctrl-0 = <0x7a>; - wakeup-source; - interrupts = <0x08 0x08>; - #clock-cells = <0x00>; - interrupt-parent = <0x7b>; - clock-frequency = <0x8000>; - compatible = "haoyu,hym8563"; - status = "okay"; - reg = <0x51>; - phandle = <0x1e4>; - }; - - rk8602@42 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0x18>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk8603@43 { - regulator-max-microvolt = <0x100590>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8603"; - reg = <0x43>; - phandle = <0x1c>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pc9202@3c { - index = <0x00>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x79 0x15 0x00>; - driver-names = "wdt_core"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds3-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x237>; - }; - - serial@fd890000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x7d>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14b 0x04>; - clocks = <0x02 0x2ae 0x02 0x2af>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfd890000 0x00 0x100>; - phandle = <0x260>; - dmas = <0x7c 0x06 0x7c 0x07>; - reg-shift = <0x02>; - }; - - qos@fdf70000 { - compatible = "syscon"; - reg = <0x00 0xfdf70000 0x00 0x20>; - phandle = <0x85>; - }; - - gpu-opp-table { - rockchip,pvtm-offset = <0x1c>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x04>; - nvmem-cells = <0x63 0x64 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "gpu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x114>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x65>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0x61>; - rockchip,pvtm-temp-prop = <0xffffff79 0xffffff79>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x61a80>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-500000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x02 0xffff>; - }; - - opp-j-850000000 { - opp-microvolt = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-hz = <0x00 0x32a9f880>; - opp-supported-hw = <0x04 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-m-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-400000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - }; - - opp-m-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0x02 0xffff>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L2 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L1 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - }; - }; - - csi2-dphy1-hw@fedc8000 { - clock-names = "pclk"; - resets = <0x02 0x19 0x02 0x18>; - clocks = <0x02 0x10d>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x193>; - reg = <0x00 0xfedc8000 0x00 0x8000>; - phandle = <0x2e>; - reset-names = "srst_csiphy1\0srst_p_csiphy1"; - rockchip,sys_grf = <0xc8>; - }; - - hdcp@fde40000 { - power-domains = <0x60 0x19>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x37f 0x02 0x37d 0x02 0x37c 0x02 0x37b 0x02 0x381>; - interrupts = <0x00 0x9f 0x04>; - clocks = <0x02 0x1ed 0x02 0x1ef 0x02 0x1ee 0x02 0x1ec 0x02 0x1f1 0x02 0x1f2>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde40000 0x00 0x80>; - phandle = <0x285>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xf5>; - }; - - iommu@fdbac800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7f 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege3_mmu"; - reg = <0x00 0xfdbac800 0x00 0x40>; - phandle = <0xc0>; - }; - - qos@fdf40400 { - compatible = "syscon"; - reg = <0x00 0xfdf40400 0x00 0x20>; - phandle = <0xa2>; - }; - - rga@fdb70000 { - power-domains = <0x60 0x1e>; - iommus = <0xba>; - clock-names = "aclk_rga3_1\0hclk_rga3_1\0clk_rga3_1"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189 0x02 0x18b>; - compatible = "rockchip,rga3_core1"; - status = "okay"; - interrupt-names = "rga3_core1_irq"; - reg = <0x00 0xfdb70000 0x00 0x1000>; - phandle = <0x26a>; - }; - - spi@feb00000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x14e 0x14f 0x150>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x146 0x04>; - clocks = <0x02 0xa3 0x02 0x9e>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb00000 0x00 0x1000>; - phandle = <0x2ab>; - dmas = <0x7c 0x0e 0x7c 0x0f>; - }; - - pcie@fe170000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x20 0x2f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x20f 0x02 0x21e>; - interrupts = <0x00 0xf3 0x04 0x00 0xf2 0x04 0x00 0xf1 0x04 0x00 0xf0 0x04 0x00 0xef 0x04>; - clocks = <0x02 0x150 0x02 0x155 0x02 0x14b 0x02 0x15b 0x02 0x160 0x02 0x2c4>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1bb 0x00 0x00 0x00 0x00 0x02 0x1bb 0x01 0x00 0x00 0x00 0x03 0x1bb 0x02 0x00 0x00 0x00 0x04 0x1bb 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf2000000 0x00 0xf2000000 0x00 0x100000 0x81000000 0x00 0xf2100000 0x00 0xf2100000 0x00 0x100000 0x82000000 0x00 0xf2200000 0x00 0xf2200000 0x00 0xe00000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; - msi-map = <0x2000 0x106 0x2000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1bc 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe170000 0x00 0x10000 0x0a 0x40800000 0x00 0x400000>; - linux,pci-domain = <0x02>; - phandle = <0x487>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf0 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1bb>; - interrupt-controller; - }; - }; - - i2s@fe470000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x11b 0x11c>; - pinctrl-0 = <0x11b 0x11c 0x11d 0x11e>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x31 0x02 0x35>; - assigned-clock-parents = <0x02 0x05 0x02 0x05>; - resets = <0x02 0x77 0x02 0x7a>; - interrupts = <0x00 0xb4 0x04>; - clocks = <0x02 0x33 0x02 0x37 0x02 0x30>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - pinctrl-1 = <0x11f>; - status = "okay"; - reg = <0x00 0xfe470000 0x00 0x1000>; - phandle = <0x1da>; - dmas = <0x7c 0x00 0x7c 0x01>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd594000 { - compatible = "rockchip,rk3588-litcore-grf\0syscon"; - reg = <0x00 0xfd594000 0x00 0x100>; - phandle = <0x22>; - }; - - csi2-dphy5 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x214>; - }; - - usb@fc840000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xd8 0x04>; - clocks = <0x02 0x19d 0x02 0x19e 0x69 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6c>; - reg = <0x00 0xfc840000 0x00 0x40000>; - phandle = <0x6b>; - }; - - syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf\0syscon"; - reg = <0x00 0xfd5b0000 0x00 0x1000>; - phandle = <0x76>; - }; - - rkcif-mipi-lvds2-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x236>; - }; - - rkisp1-vir1 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x240>; - }; - - i2c@feaa0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x149>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb1 0x02 0xa9>; - interrupts = <0x00 0x13f 0x04>; - clocks = <0x02 0x8e 0x02 0x86>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeaa0000 0x00 0x1000>; - phandle = <0x2a5>; - reset-names = "i2c\0apb"; - }; - - dmc { - downdifferential = <0x14>; - clock-names = "dmc_clk"; - interrupts = <0x00 0x49 0x04>; - clocks = <0x0e 0x04>; - upthreshold = <0x28>; - center-supply = <0x42>; - devfreq-events = <0x40>; - compatible = "rockchip,rk3588-dmc"; - status = "disabled"; - interrupt-names = "complete"; - mem-supply = <0x43>; - phandle = <0x21f>; - operating-points-v2 = <0x41>; - system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x80000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08 0x40000 0x08 0x200000 0x08>; - auto-freq-en = <0x01>; - }; - - hdmi1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e0>; - rockchip,codec = <0x1e1>; - rockchip,card-name = "rockchip-hdmi1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a8>; - rockchip,mclk-fs = <0x80>; - }; - - qos@fdf3d800 { - compatible = "syscon"; - reg = <0x00 0xfdf3d800 0x00 0x20>; - phandle = <0xb0>; - }; - - mipi-dcphy-dummy { - phandle = <0x223>; - }; - - jpege-core@fdbac000 { - power-domains = <0x60 0x15>; - iommus = <0xc0>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b2>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d0 0x02 0x2d1>; - interrupts = <0x00 0x80 0x04>; - clocks = <0x02 0x1b2 0x02 0x1b3>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege3"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbac000 0x00 0x400>; - phandle = <0x270>; - reset-names = "video_a\0video_h"; - }; - - iommu@fdce0800 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x71 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "cif_mmu"; - reg = <0x00 0xfdce0800 0x00 0x100 0x00 0xfdce0900 0x00 0x100>; - phandle = <0x50>; - }; - - qos@fdf35400 { - compatible = "syscon"; - reg = <0x00 0xfdf35400 0x00 0x20>; - phandle = <0x89>; - }; - - syscon@fd5a8000 { - clocks = <0x73>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a8000 0x00 0x100>; - phandle = <0xd8>; - }; - - dp0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d5>; - rockchip,codec = <0x1d6 0x01>; - rockchip,card-name = "rockchip-dp0"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x49c>; - rockchip,mclk-fs = <0x200>; - }; - - rkcif-mipi-lvds4 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a1>; - }; - - usb@fc880000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - companion = <0x6e>; - interrupts = <0x00 0xda 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ehci\0generic-ehci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc880000 0x00 0x40000>; - phandle = <0x255>; - }; - - qos@fdf62000 { - compatible = "syscon"; - reg = <0x00 0xfdf62000 0x00 0x20>; - phandle = <0x8b>; - }; - - syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc\0syscon"; - reg = <0x00 0xfd5f0000 0x00 0x10000>; - phandle = <0x196>; - }; - - mipi1-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x225>; - }; - - hdmiphy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x491 0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041 0x02 0x48f 0x02 0x490>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1ac>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x36>; - }; - }; - - i2c@fec80000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x178>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb5 0x02 0xad>; - interrupts = <0x00 0x143 0x04>; - clocks = <0x02 0x92 0x02 0x8a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfec80000 0x00 0x1000>; - phandle = <0x2df>; - reset-names = "i2c\0apb"; - - imx415@37 { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - reset-gpios = <0x182 0x05 0x01>; - rockchip,camera-module-index = <0x00>; - compatible = "sony,imx415"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x00>; - reg = <0x37>; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; - phandle = <0x2e3>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x184>; - phandle = <0x32>; - }; - }; - }; - - es8388@11 { - pinctrl-names = "default"; - pinctrl-0 = <0x17a>; - clock-names = "mclk"; - assigned-clocks = <0x179>; - assigned-clock-rates = <0xbb8000>; - clocks = <0x179>; - #sound-dai-cells = <0x00>; - compatible = "everest,es8388\0everest,es8323"; - status = "okay"; - reg = <0x11>; - phandle = <0x1db>; - }; - - XC7160b@1b { - power-domains = <0x60 0x1b>; - pinctrl-names = "default"; - pinctrl-0 = <0x180>; - clock-names = "xvclk"; - pwdn-gpios = <0xfe 0x04 0x00>; - clocks = <0x02 0x100>; - firefly,clkout-enabled-index = <0x00>; - rockchip,camera-module-name = "NC"; - reset-gpios = <0x182 0x05 0x00>; - rockchip,camera-module-index = <0x00>; - compatible = "firefly,xc7160"; - rockchip,camera-module-facing = "back"; - power-gpios = <0x181 0x1d 0x01>; - reg = <0x1b>; - rockchip,camera-module-lens-name = "NC"; - phandle = <0x2e2>; - - port { - - endpoint { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x183>; - phandle = <0x31>; - }; - }; - }; - - fusb302@22 { - pinctrl-names = "default"; - pinctrl-0 = <0x17b>; - interrupts = <0x1b 0x08>; - vbus-supply = <0x17c>; - interrupt-parent = <0x7b>; - compatible = "fcs,fusb302"; - status = "disabled"; - reg = <0x22>; - phandle = <0x2e0>; - - connector { - sink-pdos = <0x4019064>; - power-role = "dual"; - source-pdos = <0x401912c>; - data-role = "dual"; - label = "USB-C"; - try-power-role = "sink"; - compatible = "usb-c-connector"; - op-sink-microwatt = <0xf4240>; - phandle = <0x2e1>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint { - remote-endpoint = <0x17e>; - phandle = <0x18e>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x17f>; - phandle = <0x18f>; - }; - }; - }; - - altmodes { - #address-cells = <0x01>; - #size-cells = <0x00>; - - altmode@0 { - svid = <0xff01>; - vdo = <0xffffffff>; - reg = <0x00>; - }; - }; - }; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x17d>; - phandle = <0x68>; - }; - }; - }; - }; - }; - - syscon@fd5e8000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5e8000 0x00 0x4000>; - phandle = <0x190>; - }; - - vbus5v0-typec-pwr-en-regulator { - gpio = <0x182 0x0c 0x00>; - enable-active-high; - regulator-name = "vbus5v0_typec_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x17c>; - }; - - mipi2-csi2-hw@fdd30000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x326>; - interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>; - clocks = <0x02 0x1d1>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd30000 0x00 0x10000>; - phandle = <0x49>; - reset-names = "srst_csihost_p"; - }; - - spdif-rx@fde18000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x262>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x401>; - interrupts = <0x00 0xc9 0x04>; - clocks = <0x02 0x262 0x02 0x261>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde18000 0x00 0x1000>; - phandle = <0x480>; - dmas = <0x7c 0x17>; - reset-names = "spdifrx-m"; - }; - - syscon@fd5a2000 { - compatible = "rockchip,rk3588-npu-grf\0syscon"; - reg = <0x00 0xfd5a2000 0x00 0x100>; - phandle = <0xb6>; - }; - - rkisp0-vir3 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23e>; - }; - - qos@fdf66200 { - compatible = "syscon"; - reg = <0x00 0xfdf66200 0x00 0x20>; - phandle = <0x94>; - }; - - rkcif@fdce0000 { - power-domains = <0x60 0x1b>; - iommus = <0x50>; - nvmem-cells = <0x21 0xd4 0xd5>; - clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_host0\0iclk_host1"; - reg-names = "cif_regs"; - assigned-clocks = <0x02 0x1e3>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x317 0x02 0x318 0x02 0x316 0x02 0x334 0x02 0x335 0x02 0x336 0x02 0x337 0x02 0x338 0x02 0x339>; - interrupts = <0x00 0x9b 0x04>; - clocks = <0x02 0x1e4 0x02 0x1e5 0x02 0x1e3 0x02 0x1cd 0x02 0x1ce>; - compatible = "rockchip,rk3588-cif"; - status = "okay"; - rockchip,grf = <0xc8>; - interrupt-names = "cif-intr"; - nvmem-cell-names = "specification\0package_low\0package_high"; - reg = <0x00 0xfdce0000 0x00 0x800>; - phandle = <0x4f>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_host0\0rst_cif_host1\0rst_cif_host2\0rst_cif_host3\0rst_cif_host4\0rst_cif_host5"; - }; - - edp@fdec0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e1 0x02 0x3e0>; - interrupts = <0x00 0xa3 0x04>; - clocks = <0x02 0x211 0x02 0x210 0x02 0x212 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x101>; - reg = <0x00 0xfdec0000 0x00 0x1000>; - phandle = <0x289>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x103>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe1>; - }; - - endpoint@2 { - remote-endpoint = <0x3b>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe7>; - }; - - endpoint@0 { - remote-endpoint = <0x102>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdb>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x28a>; - }; - }; - }; - }; - - qos@fdf72400 { - compatible = "syscon"; - reg = <0x00 0xfdf72400 0x00 0x20>; - phandle = <0x84>; - }; - - dp@fde60000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cd>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x389>; - interrupts = <0x00 0xa2 0x04>; - clocks = <0x02 0x1e7 0x02 0x2cd 0x02 0x201 0x02 0x20d 0x04 0x02 0x1eb>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0x1a5>; - reg = <0x00 0xfde60000 0x00 0x4000>; - phandle = <0x1e3>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x3e>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe3>; - }; - - endpoint@2 { - remote-endpoint = <0x1a7>; - status = "disabled"; - reg = <0x02>; - phandle = <0xeb>; - }; - - endpoint@0 { - remote-endpoint = <0x1a6>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdd>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x481>; - }; - }; - }; - }; - - vcc5v0-usbdcin { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usbdcin"; - compatible = "regulator-fixed"; - phandle = <0x48c>; - vin-supply = <0x1cd>; - }; - - rkvdec-core@fdc48000 { - power-domains = <0x60 0x0f>; - iommus = <0xcc>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x195 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,core-mask = <0x20002>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x293 0x02 0x292 0x02 0x298 0x02 0x296 0x02 0x297>; - interrupts = <0x00 0x61 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x195 0x02 0x194 0x02 0x198 0x02 0x196 0x02 0x197>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec1"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xffe00000 0x100000>; - reg = <0x00 0xfdc48100 0x00 0x400 0x00 0xfdc48000 0x00 0x100>; - phandle = <0x275>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcd>; - }; - - vcc-1v1-nldo-s3 { - regulator-max-microvolt = <0x10c8e0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x10c8e0>; - regulator-name = "vcc_1v1_nldo_s3"; - compatible = "regulator-fixed"; - phandle = <0x15c>; - vin-supply = <0x78>; - }; - - power-management@fd8d8000 { - compatible = "rockchip,rk3588-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xfd8d8000 0x00 0x400>; - phandle = <0xd9>; - - power-controller { - #address-cells = <0x01>; - #size-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-power-controller"; - status = "okay"; - phandle = <0x60>; - - power-domain@37 { - clocks = <0x02 0x199 0x02 0x140>; - reg = <0x25>; - pm_qos = <0xaf>; - }; - - power-domain@27 { - #address-cells = <0x01>; - clocks = <0x02 0x1e1 0x02 0x1e2 0x02 0x1df 0x02 0x1de 0x02 0x1e5 0x02 0x1e4>; - #size-cells = <0x00>; - reg = <0x1b>; - pm_qos = <0xa2 0xa3 0xa4 0xa5>; - - power-domain@29 { - clocks = <0x02 0x1d6 0x02 0x1d5 0x02 0x1d9 0x02 0x1d8 0x02 0x1e2>; - reg = <0x1d>; - pm_qos = <0xa8 0xa9>; - }; - - power-domain@28 { - clocks = <0x02 0x121 0x02 0x120 0x02 0x1e1 0x02 0x1e2>; - reg = <0x1c>; - pm_qos = <0xa6 0xa7>; - }; - }; - - power-domain@33 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x21>; - }; - - power-domain@13 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x0d>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc 0x02 0x195>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@16 { - #address-cells = <0x01>; - clocks = <0x02 0x1c4 0x02 0x1c5>; - #size-cells = <0x00>; - reg = <0x10>; - pm_qos = <0x8d 0x8e 0x8f>; - - power-domain@17 { - clocks = <0x02 0x1c9 0x02 0x1c4 0x02 0x1c5 0x02 0x1ca>; - reg = <0x11>; - pm_qos = <0x90 0x91 0x92>; - }; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190 0x02 0x18e>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - }; - - power-domain@31 { - clocks = <0x02 0x166 0x02 0x1a1 0x02 0x1a4 0x02 0x19d 0x02 0x19e 0x02 0x19f 0x02 0x1a0>; - reg = <0x1f>; - pm_qos = <0xab 0xac 0xad 0xae>; - }; - - power-domain@21 { - #address-cells = <0x01>; - clocks = <0x02 0x1be 0x02 0x1bd 0x02 0x1bc 0x02 0x1bf 0x02 0x1aa 0x02 0x1a9 0x02 0x1ac 0x02 0x1ad 0x02 0x1ae 0x02 0x1af 0x02 0x1b0 0x02 0x1b1 0x02 0x1b2 0x02 0x1b3 0x02 0x1b4 0x02 0x1b5 0x02 0x1b7 0x02 0x1b6>; - #size-cells = <0x00>; - reg = <0x15>; - pm_qos = <0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a>; - - power-domain@15 { - clocks = <0x02 0x194 0x02 0x1be 0x02 0x1bc>; - reg = <0x0f>; - pm_qos = <0x8c>; - }; - - power-domain@23 { - clocks = <0x02 0x4b 0x02 0x49 0x02 0x1be>; - reg = <0x17>; - pm_qos = <0x9b>; - }; - - power-domain@14 { - clocks = <0x02 0x18f 0x02 0x1be 0x02 0x1bc 0x02 0x190>; - reg = <0x0e>; - pm_qos = <0x8b>; - }; - - power-domain@22 { - clocks = <0x02 0x1ba 0x02 0x1b9>; - reg = <0x16>; - pm_qos = <0x9c>; - }; - }; - - power-domain@38 { - clocks = <0x02 0x3c 0x02 0x3d>; - reg = <0x26>; - }; - - power-domain@8 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x08>; - - power-domain@9 { - #address-cells = <0x01>; - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130 0x02 0x126>; - #size-cells = <0x00>; - reg = <0x09>; - pm_qos = <0x82 0x83 0x84>; - - power-domain@11 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0b>; - pm_qos = <0x86>; - }; - - power-domain@10 { - clocks = <0x02 0x12f 0x02 0x131 0x02 0x130>; - reg = <0x0a>; - pm_qos = <0x85>; - }; - }; - }; - - power-domain@26 { - clocks = <0x02 0x22e 0x02 0x22f 0x02 0x22d 0x02 0x218 0x02 0x217 0x02 0x22b 0x02 0x264>; - reg = <0x1a>; - pm_qos = <0xa0 0xa1>; - }; - - power-domain@34 { - clocks = <0x02 0x166 0x02 0x169 0x02 0x16a>; - reg = <0x22>; - }; - - power-domain@24 { - #address-cells = <0x01>; - clocks = <0x02 0x26e 0x02 0x26d 0x02 0x270>; - #size-cells = <0x00>; - reg = <0x18>; - pm_qos = <0x9d 0x9e>; - - power-domain@25 { - clocks = <0x02 0x1f6 0x02 0x1f7 0x02 0x1f5 0x02 0x1f3 0x02 0x1ee 0x02 0x1ed 0x02 0x26d>; - reg = <0x19>; - pm_qos = <0x9f>; - }; - }; - - power-domain@12 { - clocks = <0x02 0x114 0x02 0x115 0x02 0x116>; - reg = <0x0c>; - pm_qos = <0x87 0x88 0x89 0x8a>; - }; - - power-domain@40 { - reg = <0x28>; - pm_qos = <0xb0>; - }; - - power-domain@30 { - clocks = <0x02 0x189 0x02 0x18a>; - reg = <0x1e>; - pm_qos = <0xaa>; - }; - }; - }; - - csi2-dphy3 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x212>; - }; - - qos@fdf3e000 { - compatible = "syscon"; - reg = <0x00 0xfdf3e000 0x00 0x20>; - phandle = <0xac>; - }; - - pwm@fd8b0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04 0x00 0x159 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0030 0x00 0x10>; - phandle = <0x264>; - }; - - rkcif-mipi-lvds2-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x234>; - }; - - syscon@fd5cc000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5cc000 0x00 0x4000>; - phandle = <0x1c9>; - }; - - vdpu@fdb50400 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-decoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "okay"; - interrupt-names = "irq_vdpu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50400 0x00 0x400>; - phandle = <0x267>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - qos@fdf60200 { - compatible = "syscon"; - reg = <0x00 0xfdf60200 0x00 0x20>; - phandle = <0x8e>; - }; - - pwm@febe0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x170>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04 0x00 0x15d 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0030 0x00 0x10>; - phandle = <0x2d8>; - }; - - display-subsystem { - memory-region-names = "drm-logo"; - clock-names = "hdmi0_phy_pll\0hdmi1_phy_pll"; - ports = <0x34>; - memory-region = <0x37>; - clocks = <0x35 0x36>; - compatible = "rockchip,display-subsystem"; - phandle = <0x215>; - - route { - - route-edp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21a>; - }; - - route-hdmi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3f>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21e>; - }; - - route-dp1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3e>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21d>; - }; - - route-dsi1 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3a>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x218>; - }; - - route-edp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3b>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x219>; - }; - - route-hdmi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3c>; - logo,mode = "center"; - status = "okay"; - phandle = <0x21b>; - }; - - route-dp0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x38>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x216>; - }; - - route-rgb { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x3d>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x21c>; - }; - - route-dsi0 { - logo,kernel = "logo_kernel.bmp"; - logo,uboot = "logo.bmp"; - charge_logo,mode = "center"; - connect = <0x39>; - logo,mode = "center"; - status = "disabled"; - phandle = <0x217>; - }; - }; - }; - - serial@febc0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x168>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x154 0x04>; - clocks = <0x02 0xd7 0x02 0xb3>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfebc0000 0x00 0x100>; - phandle = <0x2d1>; - dmas = <0xf2 0x0b 0xf2 0x0c>; - reg-shift = <0x02>; - }; - - adc-keys { - io-channels = <0x1d9 0x01>; - poll-interval = <0x64>; - keyup-threshold-microvolt = <0x1b7740>; - compatible = "adc-keys"; - status = "okay"; - phandle = <0x49e>; - io-channel-names = "buttons"; - - recovery-key { - press-threshold-microvolt = <0x4268>; - label = "F12"; - linux,code = <0x58>; - }; - }; - - pvtm@fdaf0000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-npu-pvtm"; - reg = <0x00 0xfdaf0000 0x00 0x100>; - - pvtm@3 { - clock-names = "clk\0pclk"; - resets = <0x02 0x1de 0x02 0x1dc>; - clocks = <0x02 0x12b 0x02 0x129>; - reg = <0x03>; - reset-names = "rts\0rst-p"; - }; - }; - - codec-digital@fe500000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x144>; - clock-names = "dac\0pclk"; - resets = <0x02 0x84>; - clocks = <0x02 0x29 0x02 0x2f>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-codec-digital\0rockchip,codec-digital-v1"; - status = "disabled"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfe500000 0x00 0x1000>; - phandle = <0x29e>; - reset-names = "reset"; - rockchip,pwm-output-mode; - }; - - pwm@fd8b0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0020 0x00 0x10>; - phandle = <0x263>; - }; - - rkcif-mipi-lvds2 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "okay"; - phandle = <0x55>; - - port { - - endpoint { - remote-endpoint = <0x54>; - phandle = <0x4e>; - }; - }; - }; - - pwm@febe0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x16f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0020 0x00 0x10>; - phandle = <0x2d7>; - }; - - vcc-fan-pwr-en-regulator { - regulator-boot-on; - gpio = <0x182 0x0b 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_fan_pwr_en"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a4>; - }; - - iommu@fdba0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x79 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege0_mmu"; - reg = <0x00 0xfdba0800 0x00 0x40>; - phandle = <0xbc>; - }; - - rkcif-mipi-lvds1-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x231>; - }; - - arm-pmu { - interrupt-affinity = <0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d>; - interrupts = <0x01 0x07 0x08>; - compatible = "arm,armv8-pmuv3"; - phandle = <0x20c>; - }; - - pvtm@fda40000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore0-pvtm"; - reg = <0x00 0xfda40000 0x00 0x100>; - - pvtm@0 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c6 0x02 0x15>; - reg = <0x00>; - }; - }; - - pwm@fd8b0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0010 0x00 0x10>; - phandle = <0x262>; - }; - - i2s@fddc0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x1f9>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x38d>; - interrupts = <0x00 0xb8 0x04>; - clocks = <0x02 0x1fb 0x02 0x1fb 0x02 0x1f0>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc0000 0x00 0x1000>; - phandle = <0x27d>; - dmas = <0xf2 0x00>; - reset-names = "tx-m"; - }; - - qos@fdf61400 { - compatible = "syscon"; - reg = <0x00 0xfdf61400 0x00 0x20>; - phandle = <0x92>; - }; - - syscon@fd5d4000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d4000 0x00 0x4000>; - phandle = <0x1c8>; - - usb2-phy@4000 { - clock-output-names = "usb480m_phy1"; - clock-names = "phyclk"; - resets = <0x02 0xc0048 0x02 0x489>; - interrupts = <0x00 0x18a 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x4000 0x10>; - phandle = <0x1ca>; - reset-names = "phy\0apb"; - - otg-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a3>; - }; - }; - }; - - rkisp0-vir1 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23c>; - }; - - pwm@febe0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0010 0x00 0x10>; - phandle = <0x2d6>; - }; - - thermal-zones { - phandle = <0x248>; - - bigcore1-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x02>; - phandle = <0x24d>; - }; - - soc-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x00>; - sustainable-power = <0x834>; - phandle = <0x249>; - - trips { - - trip-point-0 { - temperature = <0x124f8>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x24a>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x5e>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0x24b>; - }; - }; - - cooling-maps { - - map2 { - trip = <0x5e>; - cooling-device = <0x0c 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map0 { - trip = <0x5e>; - cooling-device = <0x06 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map3 { - trip = <0x5e>; - cooling-device = <0x5f 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - - map1 { - trip = <0x5e>; - cooling-device = <0x0a 0xffffffff 0xffffffff>; - contribution = <0x400>; - }; - }; - }; - - npu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x06>; - phandle = <0x251>; - }; - - center-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x04>; - phandle = <0x24f>; - }; - - gpu-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x05>; - phandle = <0x250>; - }; - - littlecore-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x03>; - phandle = <0x24e>; - }; - - bigcore0-thermal { - polling-delay = <0x3e8>; - polling-delay-passive = <0x14>; - thermal-sensors = <0x5d 0x01>; - phandle = <0x24c>; - }; - }; - - iommu@fdbdf000 { - power-domains = <0x60 0x10>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x63 0x04 0x00 0x64 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc0_mmu0\0irq_rkvenc0_mmu1"; - reg = <0x00 0xfdbdf000 0x00 0x40 0x00 0xfdbdf040 0x00 0x40>; - phandle = <0xc2>; - }; - - serial@feb50000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x161>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14d 0x04>; - clocks = <0x02 0xbb 0x02 0xac>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb50000 0x00 0x100>; - phandle = <0x2ca>; - dmas = <0x7c 0x0a 0x7c 0x0b>; - reg-shift = <0x02>; - }; - - iommu@fdcd0f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8c 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec0_mmu"; - reg = <0x00 0xfdcd0f00 0x00 0x100>; - phandle = <0xd2>; - }; - - vcc5v0-host { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - gpio = <0x182 0x02 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_host"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x75>; - vin-supply = <0x1dd>; - }; - - qos@fdf66a00 { - compatible = "syscon"; - reg = <0x00 0xfdf66a00 0x00 0x20>; - phandle = <0x98>; - }; - - phy@fed90000 { - clock-names = "refclk\0immortal\0pclk\0utmi"; - resets = <0x02 0x2f 0x02 0x30 0x02 0x31 0x02 0x32 0x02 0x484>; - clocks = <0x02 0x2b6 0x02 0x280 0x02 0x26a 0x1ca>; - compatible = "rockchip,rk3588-usbdp-phy"; - status = "okay"; - rockchip,dp-lane-mux = <0x02 0x03>; - reg = <0x00 0xfed90000 0x00 0x10000>; - phandle = <0x48b>; - rockchip,usb-grf = <0x74>; - reset-names = "init\0cmn\0lane\0pcs_apb\0pma_apb"; - rockchip,u2phy-grf = <0x1c8>; - rockchip,usbdpphy-grf = <0x1c9>; - rockchip,vo-grf = <0xf5>; - - dp-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a5>; - }; - - u3-port { - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x1a4>; - }; - }; - - jpege-core@fdba0000 { - power-domains = <0x60 0x15>; - iommus = <0xbc>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ac>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ca 0x02 0x2cb>; - interrupts = <0x00 0x7a 0x04>; - clocks = <0x02 0x1ac 0x02 0x1ad>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba0000 0x00 0x400>; - phandle = <0x26d>; - reset-names = "video_a\0video_h"; - }; - - vcc5v0-sys { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_sys"; - compatible = "regulator-fixed"; - phandle = <0x78>; - vin-supply = <0x1cd>; - }; - - pwm@fd8b0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x158 0x04>; - clocks = <0x02 0x2a5 0x02 0x2a4>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfd8b0000 0x00 0x10>; - phandle = <0x261>; - }; - - vop@fdd90000 { - power-domains = <0x60 0x18>; - iommus = <0xd6>; - rockchip,vop-grf = <0xd7>; - clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0pclk_vop\0dclk_src_vp0\0dclk_src_vp1\0dclk_src_vp2"; - reg-names = "regs\0gamma_lut"; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2cb41780>; - resets = <0x02 0x349 0x02 0x348 0x02 0x34d 0x02 0x350 0x02 0x351 0x02 0x352>; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x02 0x26e 0x02 0x271 0x02 0x272 0x02 0x273>; - compatible = "rockchip,rk3588-vop"; - rockchip,pmu = <0xd9>; - status = "okay"; - rockchip,grf = <0xc8>; - reg = <0x00 0xfdd90000 0x00 0x4200 0x00 0xfdd95000 0x00 0x1000>; - phandle = <0x278>; - rockchip,vo1-grf = <0xd8>; - reset-names = "axi\0ahb\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x34>; - - port@0 { - rockchip,primary-plane = <0x02>; - rockchip,plane-mask = <0x05>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x270>; - assigned-clock-rates = <0x2faf0800>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x279>; - - endpoint@5 { - remote-endpoint = <0xdf>; - reg = <0x05>; - phandle = <0x1ad>; - }; - - endpoint@3 { - remote-endpoint = <0xdd>; - reg = <0x03>; - phandle = <0x1a6>; - }; - - endpoint@1 { - remote-endpoint = <0xdb>; - reg = <0x01>; - phandle = <0x102>; - }; - - endpoint@4 { - remote-endpoint = <0xde>; - reg = <0x04>; - phandle = <0x1b0>; - }; - - endpoint@2 { - remote-endpoint = <0xdc>; - reg = <0x02>; - phandle = <0x3c>; - }; - - endpoint@0 { - remote-endpoint = <0xda>; - reg = <0x00>; - phandle = <0xf7>; - }; - }; - - port@3 { - rockchip,primary-plane = <0x09>; - rockchip,plane-mask = <0x280>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x03>; - phandle = <0x27c>; - - endpoint@1 { - remote-endpoint = <0xef>; - reg = <0x01>; - phandle = <0x3a>; - }; - - endpoint@2 { - remote-endpoint = <0xf0>; - reg = <0x02>; - phandle = <0x3d>; - }; - - endpoint@0 { - remote-endpoint = <0xee>; - reg = <0x00>; - phandle = <0x39>; - }; - }; - - port@1 { - rockchip,primary-plane = <0x03>; - rockchip,plane-mask = <0x0a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - phandle = <0x27a>; - - endpoint@5 { - remote-endpoint = <0xe5>; - reg = <0x05>; - phandle = <0x3f>; - }; - - endpoint@3 { - remote-endpoint = <0xe3>; - reg = <0x03>; - phandle = <0x3e>; - }; - - endpoint@1 { - remote-endpoint = <0xe1>; - reg = <0x01>; - phandle = <0x103>; - }; - - endpoint@4 { - remote-endpoint = <0xe4>; - reg = <0x04>; - phandle = <0x1b1>; - }; - - endpoint@2 { - remote-endpoint = <0xe2>; - reg = <0x02>; - phandle = <0xff>; - }; - - endpoint@0 { - remote-endpoint = <0xe0>; - reg = <0x00>; - phandle = <0x38>; - }; - }; - - port@2 { - rockchip,primary-plane = <0x08>; - rockchip,plane-mask = <0x140>; - #address-cells = <0x01>; - assigned-clocks = <0x02 0x273>; - assigned-clock-parents = <0x02 0x04>; - #size-cells = <0x00>; - reg = <0x02>; - phandle = <0x27b>; - - endpoint@5 { - remote-endpoint = <0xeb>; - reg = <0x05>; - phandle = <0x1a7>; - }; - - endpoint@3 { - remote-endpoint = <0xe9>; - reg = <0x03>; - phandle = <0xf3>; - }; - - endpoint@1 { - remote-endpoint = <0xe7>; - reg = <0x01>; - phandle = <0x3b>; - }; - - endpoint@6 { - remote-endpoint = <0xec>; - reg = <0x06>; - phandle = <0x1b2>; - }; - - endpoint@4 { - remote-endpoint = <0xea>; - reg = <0x04>; - phandle = <0xf4>; - }; - - endpoint@2 { - remote-endpoint = <0xe8>; - reg = <0x02>; - phandle = <0x100>; - }; - - endpoint@0 { - remote-endpoint = <0xe6>; - reg = <0x00>; - phandle = <0xf8>; - }; - - endpoint@7 { - remote-endpoint = <0xed>; - reg = <0x07>; - phandle = <0x1ae>; - }; - }; - }; - }; - - csi2-dphy1 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x210>; - }; - - pwm@febe0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x16d>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15c 0x04>; - clocks = <0x02 0x57 0x02 0x56>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebe0000 0x00 0x10>; - phandle = <0x2d5>; - }; - - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "simple-bus"; - ranges; - - hclk_nvm@fd7c087c { - clock-names = "link"; - clocks = <0x02 0x141>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c087c 0x00 0x10>; - phandle = <0x03>; - }; - - mclkin-i2s0 { - clock-output-names = "i2s0_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x204>; - }; - - hclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c4>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fe>; - }; - - mclkout-i2s1@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1_mclkout_to_io"; - clocks = <0x02 0x291>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x208>; - rockchip,bit-shift = <0x01>; - }; - - mclkout-i2s1@fd58a000 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1m1_mclkout_to_io"; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58a000 0x00 0x04>; - phandle = <0x209>; - rockchip,bit-shift = <0x06>; - }; - - aclk_hdcp0_pre@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26c>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x1ff>; - }; - - xin32k { - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - compatible = "fixed-clock"; - phandle = <0x1f2>; - }; - - aclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x6a>; - }; - - hclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x1f5>; - }; - - hclk_vo0@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26d>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x04>; - }; - - pclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x201>; - }; - - mclkout-i2s2@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s2_mclkout_to_io"; - clocks = <0x02 0x28>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20a>; - rockchip,bit-shift = <0x02>; - }; - - aclk_vdpu_low_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1f4>; - }; - - mclkin-i2s3 { - clock-output-names = "i2s3_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x207>; - }; - - spll { - clock-output-names = "spll"; - #clock-cells = <0x00>; - clock-frequency = <0x29d7ab80>; - compatible = "fixed-clock"; - phandle = <0x1f1>; - }; - - xin24m { - clock-output-names = "xin24m"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x1f3>; - }; - - aclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x202>; - }; - - pclk_vo0_grf@fd7c08dc { - clock-names = "link"; - clocks = <0x04>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x04>; - phandle = <0x72>; - }; - - aclk_jpeg_decoder_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1fc>; - }; - - aclk_hdcp1_pre@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x200>; - }; - - mclkin-i2s1 { - clock-output-names = "i2s1_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x205>; - }; - - hclk_vo1@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x05>; - }; - - mclkout-i2s3@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s3_mclkout_to_io"; - clocks = <0x02 0x2e>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20b>; - rockchip,bit-shift = <0x07>; - }; - - aclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f8>; - }; - - aclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e0>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f7>; - }; - - pclk_vo1_grf@fd7c08ec { - clock-names = "link"; - clocks = <0x05>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x04>; - phandle = <0x73>; - }; - - aclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fa>; - }; - - hclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f9>; - }; - - hclk_sdio_pre@fd7c092c { - clock-names = "link"; - clocks = <0x03>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c092c 0x00 0x10>; - phandle = <0x203>; - }; - - hclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fb>; - }; - - hclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e1>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f6>; - }; - - mclkout-i2s0@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s0_mclkout_to_io"; - clocks = <0x02 0x39>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x179>; - rockchip,bit-shift = <0x00>; - }; - - mclkin-i2s2 { - clock-output-names = "i2s2_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x206>; - }; - - aclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c5>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fd>; - }; - }; - - usb@fc8c0000 { - power-domains = <0x60 0x1f>; - phy-names = "usb2-phy"; - clock-names = "usbhost\0arbiter\0utmi\0alk_usb"; - interrupts = <0x00 0xdb 0x04>; - clocks = <0x02 0x19f 0x02 0x1a0 0x6d 0x6a>; - compatible = "rockchip,rk3588-ohci\0generic-ohci"; - status = "okay"; - phys = <0x6f>; - reg = <0x00 0xfc8c0000 0x00 0x40000>; - phandle = <0x6e>; - }; - - qos@fdf40000 { - compatible = "syscon"; - reg = <0x00 0xfdf40000 0x00 0x20>; - phandle = <0xa8>; - }; - - mipi0-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x224>; - }; - - cluster1-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x24 0x25 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x26>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x16>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-microvolt-L2 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - mmc@fe2d0000 { - power-domains = <0x60 0x25>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <0x119>; - clock-names = "biu\0ciu\0ciu-drive\0ciu-sample"; - interrupts = <0x00 0xcc 0x04>; - clocks = <0x02 0x199 0x02 0x19a 0x02 0x2c0 0x02 0x2c1>; - compatible = "rockchip,rk3588-dw-mshc\0rockchip,rk3288-dw-mshc"; - status = "disabled"; - reg = <0x00 0xfe2d0000 0x00 0x4000>; - phandle = <0x294>; - max-frequency = <0xbebc200>; - }; - - rkcif-mipi-lvds-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22e>; - }; - - serial@feb90000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x165>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x151 0x04>; - clocks = <0x02 0xcb 0x02 0xb0>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb90000 0x00 0x100>; - phandle = <0x2ce>; - dmas = <0xf1 0x0d 0xf1 0x0e>; - reg-shift = <0x02>; - }; - - i2s@fddf8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x239>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x3c3>; - interrupts = <0x00 0xbb 0x04>; - clocks = <0x02 0x23c 0x02 0x23c 0x02 0x238>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "okay"; - reg = <0x00 0xfddf8000 0x00 0x1000>; - phandle = <0x1ec>; - dmas = <0xf2 0x15>; - reset-names = "rx-m"; - }; - - phy@fee20000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bf>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20007 0x02 0x4d8>; - clocks = <0x02 0x2bf 0x02 0x187 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "disabled"; - rockchip,pipe-phy-grf = <0x195>; - reg = <0x00 0xfee20000 0x00 0x100>; - phandle = <0x70>; - reset-names = "combphy-apb\0combphy"; - rockchip,pcie1ln-sel-bits = <0x100 0x01 0x01 0x00>; - }; - - csi2-dphy0-hw@fedc0000 { - clock-names = "pclk"; - resets = <0x02 0x17 0x02 0x16>; - clocks = <0x02 0x10c>; - compatible = "rockchip,rk3588-csi2-dphy-hw"; - status = "okay"; - rockchip,grf = <0x192>; - reg = <0x00 0xfedc0000 0x00 0x8000>; - phandle = <0x2d>; - reset-names = "srst_csiphy0\0srst_p_csiphy0"; - rockchip,sys_grf = <0xc8>; - }; - - can@fea70000 { - pinctrl-names = "default"; - pinctrl-0 = <0x147>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xbd 0x02 0xbc>; - interrupts = <0x00 0x157 0x04>; - clocks = <0x02 0x74 0x02 0x73>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea70000 0x00 0x1000>; - phandle = <0x2a2>; - reset-names = "can\0can-apb"; - }; - - mailbox@fec60000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 0x00 0x40 0x04>; - clocks = <0x02 0x4c>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec60000 0x00 0x200>; - phandle = <0x2dd>; - }; - - usbdrd3_1 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a6 0x02 0x1a5 0x02 0x1a4>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x47a>; - - usb@fc400000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x2a7>; - interrupts = <0x00 0xdd 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x1a3 0x1a4>; - reg = <0x00 0xfc400000 0x00 0x400000>; - phandle = <0x47b>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - sata@fe210000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x111 0x04>; - clocks = <0x02 0x171 0x02 0x16e 0x02 0x174 0x02 0x163 0x02 0x17e>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "okay"; - interrupt-names = "hostc"; - phys = <0x108 0x01>; - reg = <0x00 0xfe210000 0x00 0x1000>; - phandle = <0x290>; - ports-implemented = <0x01>; - }; - - leds { - compatible = "gpio-leds"; - status = "okay"; - phandle = <0x497>; - - user { - linux,default-trigger = "ir-user-click"; - label = ":user"; - default-state = "off"; - phandle = <0x499>; - gpios = <0x182 0x03 0x00>; - }; - - power { - linux,default-trigger = "ir-power-click"; - label = ":power"; - default-state = "on"; - status = "disabled"; - phandle = <0x498>; - gpios = <0x7b 0x15 0x00>; - }; - }; - - rkcif-mipi-lvds5-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x479>; - }; - - qos@fdf80000 { - compatible = "syscon"; - reg = <0x00 0xfdf80000 0x00 0x20>; - phandle = <0x9f>; - }; - - spdif-tx@fdde0000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x254>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc4 0x04>; - clocks = <0x02 0x257 0x02 0x253>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde0000 0x00 0x1000>; - phandle = <0x27e>; - dmas = <0xf1 0x07>; - }; - - qos@fdf35000 { - compatible = "syscon"; - reg = <0x00 0xfdf35000 0x00 0x20>; - phandle = <0x87>; - }; - - psci { - method = "smc"; - compatible = "arm,psci-1.0"; - }; - - rkcif-mipi-lvds { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x52>; - }; - - rga@fdb80000 { - power-domains = <0x60 0x15>; - clock-names = "aclk_rga2\0hclk_rga2\0clk_rga2"; - interrupts = <0x00 0x74 0x04>; - clocks = <0x02 0x1b7 0x02 0x1b6 0x02 0x1b8>; - compatible = "rockchip,rga2_core0"; - status = "okay"; - interrupt-names = "rga2_irq"; - reg = <0x00 0xfdb80000 0x00 0x1000>; - phandle = <0x26b>; - }; - - qos@fdf66800 { - compatible = "syscon"; - reg = <0x00 0xfdf66800 0x00 0x20>; - phandle = <0x97>; - }; - - spi@feb10000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x151 0x152 0x153>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x147 0x04>; - clocks = <0x02 0xa4 0x02 0x9f>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb10000 0x00 0x1000>; - phandle = <0x2ac>; - dmas = <0x7c 0x10 0x7c 0x11>; - }; - - rkcif-mipi-lvds4-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x472>; - }; - - hdmi@fdea0000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0x1a8 0x1a9 0x1aa 0x1ab>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d7 0x02 0x49d>; - interrupts = <0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0x169 0x04>; - clocks = <0x02 0x224 0x02 0x266 0x02 0x225 0x02 0x226 0x02 0x24c 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x36>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "disabled"; - rockchip,grf = <0xc8>; - phys = <0x1ac>; - reg = <0x00 0xfdea0000 0x00 0x10000 0x00 0xfdeb0000 0x00 0x10000>; - phandle = <0x1e1>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x482>; - - endpoint@1 { - remote-endpoint = <0x3f>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe5>; - }; - - endpoint@2 { - remote-endpoint = <0x1ae>; - status = "disabled"; - reg = <0x02>; - phandle = <0xed>; - }; - - endpoint@0 { - remote-endpoint = <0x1ad>; - status = "disabled"; - reg = <0x00>; - phandle = <0xdf>; - }; - }; - }; - }; - - pcie@fe180000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x30 0x3f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x210 0x02 0x21f>; - interrupts = <0x00 0xf8 0x04 0x00 0xf7 0x04 0x00 0xf6 0x04 0x00 0xf5 0x04 0x00 0xf4 0x04>; - clocks = <0x02 0x151 0x02 0x156 0x02 0x14c 0x02 0x15c 0x02 0x161 0x02 0x2c5>; - interrupt-map = <0x00 0x00 0x00 0x01 0x105 0x00 0x00 0x00 0x00 0x02 0x105 0x01 0x00 0x00 0x00 0x03 0x105 0x02 0x00 0x00 0x00 0x04 0x105 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf3000000 0x00 0xf3000000 0x00 0x100000 0x81000000 0x00 0xf3100000 0x00 0xf3100000 0x00 0x100000 0x82000000 0x00 0xf3200000 0x00 0xf3200000 0x00 0xe00000 0xc3000000 0x09 0xc0000000 0x09 0xc0000000 0x00 0x40000000>; - msi-map = <0x3000 0x106 0x3000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x70 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe180000 0x00 0x10000 0x0a 0x40c00000 0x00 0x400000>; - linux,pci-domain = <0x03>; - phandle = <0x28c>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xf5 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x105>; - interrupt-controller; - }; - }; - - i2s@fe480000 { - pinctrl-names = "default"; - pinctrl-0 = <0x120 0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - resets = <0x02 0xc002a 0x02 0xc002d>; - interrupts = <0x00 0xb5 0x04>; - clocks = <0x02 0x28c 0x02 0x290 0x02 0x288>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfe480000 0x00 0x1000>; - phandle = <0x1d1>; - dmas = <0x7c 0x02 0x7c 0x03>; - reset-names = "tx-m\0rx-m"; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5c0000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c0000 0x00 0x100>; - phandle = <0x1cb>; - }; - - i2c@feab0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14a>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb2 0x02 0xaa>; - interrupts = <0x00 0x140 0x04>; - clocks = <0x02 0x8f 0x02 0x87>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeab0000 0x00 0x1000>; - phandle = <0x2a6>; - reset-names = "i2c\0apb"; - - gpio@21 { - gpio-controller; - gpio-group-num = <0xc8>; - compatible = "nxp,pca9555"; - status = "okay"; - reg = <0x21>; - phandle = <0x182>; - #gpio-cells = <0x02>; - }; - }; - - iommu@fdcb7f00 { - power-domains = <0x60 0x1b>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x84 0x04>; - clocks = <0x02 0x1de 0x02 0x1df>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "isp0_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100>; - phandle = <0xd0>; - }; - - qos@fdf3e600 { - compatible = "syscon"; - reg = <0x00 0xfdf3e600 0x00 0x20>; - phandle = <0xae>; - }; - - syscon@fd5b8000 { - compatible = "rockchip,pcie30-phy-grf\0syscon"; - reg = <0x00 0xfd5b8000 0x00 0x10000>; - phandle = <0x1cc>; - }; - - qos@fdf81200 { - compatible = "syscon"; - reg = <0x00 0xfdf81200 0x00 0x20>; - phandle = <0xa1>; - }; - - mipi5-csi2-hw@fdd60000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x329>; - interrupts = <0x00 0x99 0x04 0x00 0x9a 0x04>; - clocks = <0x02 0x1d4>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd60000 0x00 0x10000>; - phandle = <0x4c>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf72000 { - compatible = "syscon"; - reg = <0x00 0xfdf72000 0x00 0x20>; - phandle = <0x82>; - }; - - timer@feae0000 { - clock-names = "pclk\0timer"; - interrupts = <0x00 0x121 0x04>; - clocks = <0x02 0x5c 0x02 0x5f>; - compatible = "rockchip,rk3588-timer\0rockchip,rk3288-timer"; - reg = <0x00 0xfeae0000 0x00 0x20>; - phandle = <0x2a9>; - }; - - rkcif-mipi-lvds-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22c>; - }; - - syscon@fd5b5000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b5000 0x00 0x1000>; - phandle = <0x193>; - }; - - i2c@fec90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x185>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb6 0x02 0xae>; - interrupts = <0x00 0x144 0x04>; - clocks = <0x02 0x93 0x02 0x8b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfec90000 0x00 0x1000>; - phandle = <0x2e4>; - reset-names = "i2c\0apb"; - }; - - avsd-plus@fdb51000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x77 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,avs-plus-decoder"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_avsd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb51000 0x00 0x200>; - phandle = <0x268>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - dp1-sound { - rockchip,jack-det; - rockchip,cpu = <0x1e2>; - rockchip,codec = <0x1e3 0x01>; - rockchip,card-name = "rockchip,dp1"; - compatible = "rockchip,hdmi"; - status = "disabled"; - phandle = <0x4a9>; - rockchip,mclk-fs = <0x200>; - }; - - mipi1-csi2-hw@fdd20000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x325>; - interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; - clocks = <0x02 0x1d0>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd20000 0x00 0x10000>; - phandle = <0x48>; - reset-names = "srst_csihost_p"; - }; - - iep@fdbb0000 { - power-domains = <0x60 0x15>; - iommus = <0xc1>; - clock-names = "aclk\0hclk\0sclk"; - assigned-clocks = <0x02 0x1aa>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2d5 0x02 0x2d4 0x02 0x2d6>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9 0x02 0x1ab>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x06>; - rockchip,disable-auto-freq; - compatible = "rockchip,iep-v2"; - status = "okay"; - interrupt-names = "irq_iep"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbb0000 0x00 0x500>; - phandle = <0x271>; - reset-names = "rst_a\0rst_h\0rst_s"; - }; - - dsi@fde20000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x354>; - interrupts = <0x00 0xa7 0x04>; - clocks = <0x02 0x278 0x02 0x27a>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x2f>; - reg = <0x00 0xfde20000 0x00 0x10000>; - phandle = <0x281>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x282>; - - endpoint@1 { - remote-endpoint = <0x39>; - status = "disabled"; - reg = <0x01>; - phandle = <0xee>; - }; - - endpoint@0 { - remote-endpoint = <0xf3>; - status = "disabled"; - reg = <0x00>; - phandle = <0xe9>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x477>; - }; - - edp@fded0000 { - power-domains = <0x60 0x1a>; - phy-names = "dp"; - clock-names = "dp\0pclk\0spdif\0hclk"; - resets = <0x02 0x3e4 0x02 0x3e3>; - interrupts = <0x00 0xa4 0x04>; - clocks = <0x02 0x214 0x02 0x213 0x02 0x215 0x05>; - compatible = "rockchip,rk3588-edp"; - status = "disabled"; - rockchip,grf = <0xd8>; - phys = <0x1af>; - reg = <0x00 0xfded0000 0x00 0x1000>; - phandle = <0x483>; - reset-names = "dp\0apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x1b1>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe4>; - }; - - endpoint@2 { - remote-endpoint = <0x1b2>; - status = "disabled"; - reg = <0x02>; - phandle = <0xec>; - }; - - endpoint@0 { - remote-endpoint = <0x1b0>; - status = "disabled"; - reg = <0x00>; - phandle = <0xde>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x484>; - }; - }; - }; - }; - - qos@fdf67000 { - compatible = "syscon"; - reg = <0x00 0xfdf67000 0x00 0x20>; - phandle = <0x9c>; - }; - - qos@fdf64000 { - compatible = "syscon"; - reg = <0x00 0xfdf64000 0x00 0x20>; - phandle = <0x9b>; - }; - - npu-opp-table { - rockchip,pvtm-offset = <0x50>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,init-freq = <0xf4240>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0xb4 0xb5 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x31f 0x00 0x320 0x333 0x01 0x334 0x34c 0x02 0x34d 0x365 0x03 0x366 0x37e 0x04 0x37f 0x270f 0x05>; - rockchip,pvtm-thermal-zone = "npu-thermal"; - rockchip,high-temp-max-freq = "\0\f5"; - rockchip,opp-clocks = <0x02 0x12a 0x02 0x12f>; - rockchip,pvtm-freq = "\0\f5"; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0xb6>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x32f 0x00 0x330 0x343 0x01 0x344 0x35c 0x02 0x35d 0x375 0x03 0x376 0x38e 0x04 0x38f 0x270f 0x05>; - phandle = <0xb1>; - rockchip,pvtm-temp-prop = <0xffffff8f 0xffffff8f>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0x7a120>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-700000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-300000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-500000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-400000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-700000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x29b92700>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-950000000 { - opp-microvolt = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - opp-microvolt-L4 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L2 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-hz = <0x00 0x389fd980>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-microvolt-L3 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-900000000 { - opp-microvolt = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - opp-hz = <0x00 0x35a4e900>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-microvolt-L3 = <0xba284 0xba284 0xcf850 0xba284 0xba284 0xcf850>; - opp-microvolt-L1 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - }; - - opp-j-m-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-400000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x17d78400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-j-m-300000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x11e1a300>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-600000000 { - opp-microvolt = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xcf850 0xa4cb8 0xa4cb8 0xcf850>; - opp-microvolt-L1 = <0xa7d8c 0xa7d8c 0xcf850 0xa7d8c 0xa7d8c 0xcf850>; - }; - - opp-1000000000 { - opp-microvolt = <0xcf850 0xcf850 0xcf850 0xcf850 0xcf850 0xcf850>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xcf850 0xc96a8 0xc96a8 0xcf850>; - opp-hz = <0x00 0x3b9aca00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xcf850 0xc042c 0xc042c 0xcf850>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xcf850 0xc65d4 0xc65d4 0xcf850>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xcf850 0xcc77c 0xcc77c 0xcf850>; - }; - - opp-j-m-500000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x1dcd6500>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L4 = <0xadf34 0xadf34 0xcf850 0xadf34 0xadf34 0xcf850>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xcf850 0xb40dc 0xb40dc 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xaae60 0xaae60 0xcf850 0xaae60 0xaae60 0xcf850>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xcf850 0xb1008 0xb1008 0xcf850>; - }; - }; - - syscon@fd590000 { - compatible = "rockchip,rk3588-bigcore0-grf\0syscon"; - reg = <0x00 0xfd590000 0x00 0x100>; - phandle = <0x26>; - }; - - syscon@fd5dc000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5dc000 0x00 0x4000>; - phandle = <0x25e>; - - usb2-phy@c000 { - clock-output-names = "usb480m_phy3"; - clock-names = "phyclk"; - resets = <0x02 0xc004a 0x02 0x48b>; - interrupts = <0x00 0x188 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0xc000 0x10>; - phandle = <0x6d>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6f>; - }; - }; - }; - - pcie-clk3 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk3"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x496>; - gpios = <0xfe 0x09 0x01>; - }; - - pwm@febf0030 { - pinctrl-names = "active"; - pinctrl-0 = <0x174>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04 0x00 0x15f 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0030 0x00 0x10>; - phandle = <0x2dc>; - }; - - hwspinlock@fe5a0000 { - compatible = "rockchip,hwspinlock"; - reg = <0x00 0xfe5a0000 0x00 0x100>; - phandle = <0x29f>; - #hwlock-cells = <0x01>; - }; - - rkcif-mipi-lvds4-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x474>; - }; - - sram@10f000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0x10f000 0x100>; - reg = <0x00 0x10f000 0x00 0x100>; - - sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x00 0x100>; - phandle = <0x46>; - }; - }; - - hdmirx-controller@fdee0000 { - power-domains = <0x60 0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <0x1b3 0x1b4>; - clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1"; - reg-names = "hdmirx_regs"; - resets = <0x02 0x3d9 0x02 0x3da 0x02 0x3db 0x02 0x3b7>; - interrupts = <0x00 0xb1 0x04 0x00 0x1b4 0x04 0x00 0xb3 0x04>; - clocks = <0x02 0x21a 0x02 0x21f 0x02 0x2b2 0x02 0x21b 0x02 0x21c 0x02 0x232 0x05>; - hpd-trigger-level = <0x01>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-hdmirx-ctrler\0rockchip,hdmirx-ctrler"; - status = "disabled"; - rockchip,grf = <0xc8>; - interrupt-names = "cec\0hdmi\0dma"; - hdmirx-det-gpios = <0xfe 0x1d 0x01>; - reg = <0x00 0xfdee0000 0x00 0x6000>; - phandle = <0x1eb>; - reset-names = "rst_a\0rst_p\0rst_ref\0rst_biu"; - rockchip,vo1_grf = <0xd8>; - }; - - qos@fdf61000 { - compatible = "syscon"; - reg = <0x00 0xfdf61000 0x00 0x20>; - phandle = <0x90>; - }; - - qos@fdf40600 { - compatible = "syscon"; - reg = <0x00 0xfdf40600 0x00 0x20>; - phandle = <0xa4>; - }; - - syscon@fd588000 { - compatible = "rockchip,rk3588-pmu0-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd588000 0x00 0x2000>; - phandle = <0x25a>; - - reboot-mode { - mode-normal = <0x5242c300>; - mode-loader = <0x5242c301>; - mode-quiescent = <0x5242c30e>; - mode-bootloader = <0x5242c301>; - mode-recovery = <0x5242c303>; - mode-watchdog = <0x5242c308>; - mode-ums = <0x5242c30c>; - mode-fastboot = <0x5242c309>; - offset = <0x80>; - compatible = "syscon-reboot-mode"; - mode-winusb = <0x5242c30f>; - phandle = <0x25b>; - mode-charge = <0x5242c30b>; - mode-panic = <0x5242c307>; - }; - }; - - syscon@fd5a4000 { - compatible = "rockchip,rk3588-vop-grf\0syscon"; - reg = <0x00 0xfd5a4000 0x00 0x2000>; - phandle = <0xd7>; - }; - - iommu@fdb60f00 { - power-domains = <0x60 0x16>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_0_mmu"; - reg = <0x00 0xfdb60f00 0x00 0x100>; - phandle = <0xb9>; - }; - - pwm@febf0020 { - pinctrl-names = "active"; - pinctrl-0 = <0x173>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0020 0x00 0x10>; - phandle = <0x2db>; - }; - - rkispp@fdcd0000 { - power-domains = <0x60 0x1d>; - iommus = <0xd2>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d6>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8b 0x04>; - clocks = <0x02 0x1d5 0x02 0x1d6 0x02 0x1d7>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd0000 0x00 0xf00>; - phandle = <0x5b>; - }; - - tsadc@fec00000 { - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x175>; - clock-names = "tsadc\0apb_pclk"; - rockchip,hw-tshut-polarity = <0x00>; - assigned-clocks = <0x02 0xaa>; - assigned-clock-rates = <0x1e8480>; - resets = <0x02 0xc1 0x02 0xc0>; - interrupts = <0x00 0x18d 0x04>; - rockchip,hw-tshut-mode = <0x00>; - clocks = <0x02 0xaa 0x02 0xa9>; - #thermal-sensor-cells = <0x01>; - compatible = "rockchip,rk3588-tsadc"; - pinctrl-1 = <0x176>; - status = "okay"; - reg = <0x00 0xfec00000 0x00 0x400>; - phandle = <0x5d>; - reset-names = "tsadc\0tsadc-apb"; - rockchip,hw-tshut-temp = <0x1d4c0>; - }; - - iommu@fdbb0800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x75 0x04>; - clocks = <0x02 0x1aa 0x02 0x1a9>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_iep_mmu"; - reg = <0x00 0xfdbb0800 0x00 0x100>; - phandle = <0xc1>; - }; - - phy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0x101>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - pvtm@fda50000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-bigcore1-pvtm"; - reg = <0x00 0xfda50000 0x00 0x100>; - - pvtm@1 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2c8 0x02 0x17>; - reg = <0x01>; - }; - }; - - csi2-dcphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x20d>; - }; - - mailbox@fece0000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x4d 0x04 0x00 0x4e 0x04 0x00 0x4f 0x04 0x00 0x50 0x04>; - clocks = <0x02 0x4e>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfece0000 0x00 0x200>; - phandle = <0x2e9>; - }; - - rkcif-mipi-lvds3-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x23a>; - }; - - rkcif-mipi-lvds1-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x22f>; - }; - - dfi@fe060000 { - rockchip,pmu_grf = <0x104>; - compatible = "rockchip,rk3588-dfi"; - status = "disabled"; - reg = <0x00 0xfe060000 0x00 0x10000>; - phandle = <0x40>; - }; - - iommu@fdca0000 { - power-domains = <0x60 0x17>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x6d 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-av1"; - status = "okay"; - interrupt-names = "irq_av1d_mmu"; - reg = <0x00 0xfdca0000 0x00 0x600>; - phandle = <0xce>; - }; - - mipi5-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x229>; - }; - - qos@fdf35600 { - compatible = "syscon"; - reg = <0x00 0xfdf35600 0x00 0x20>; - phandle = <0x8a>; - }; - - syscon@fd5e4000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e4000 0x00 0x100>; - phandle = <0x1c7>; - }; - - iommu@fdba8800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7d 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege2_mmu"; - reg = <0x00 0xfdba8800 0x00 0x40>; - phandle = <0xbf>; - }; - - mpp-srv { - rockchip,resetgroup-count = <0x01>; - rockchip,taskqueue-count = <0x0c>; - compatible = "rockchip,mpp-service"; - status = "okay"; - phandle = <0xb8>; - }; - - cspmu@fd10c000 { - compatible = "rockchip,cspmu"; - reg = <0x00 0xfd10c000 0x00 0x1000 0x00 0xfd10d000 0x00 0x1000 0x00 0xfd10e000 0x00 0x1000 0x00 0xfd10f000 0x00 0x1000 0x00 0xfd12c000 0x00 0x1000 0x00 0xfd12d000 0x00 0x1000 0x00 0xfd12e000 0x00 0x1000 0x00 0xfd12f000 0x00 0x1000>; - phandle = <0x48e>; - }; - - pwm@febf0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x172>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0010 0x00 0x10>; - phandle = <0x2da>; - }; - - iommu@fdbef000 { - power-domains = <0x60 0x11>; - rockchip,shootdown-entire; - interrupts = <0x00 0x66 0x04 0x00 0x67 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvenc1_mmu0\0irq_rkvenc1_mmu1"; - reg = <0x00 0xfdbef000 0x00 0x40 0x00 0xfdbef040 0x00 0x40>; - phandle = <0xc5>; - lock-names = "aclk\0iface"; - }; - - serial@feb60000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x162>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14e 0x04>; - clocks = <0x02 0xbf 0x02 0xad>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb60000 0x00 0x100>; - phandle = <0x2cb>; - dmas = <0x7c 0x0c 0x7c 0x0d>; - reg-shift = <0x02>; - }; - - hdmiin-sound { - rockchip,jack-det; - rockchip,cpu = <0x1ec>; - rockchip,codec = <0x1eb 0x00>; - rockchip,bitclock-master = <0x1eb>; - rockchip,card-name = "rockchip,hdmiin"; - rockchip,format = "i2s"; - compatible = "rockchip,hdmi"; - phandle = <0x4ac>; - rockchip,frame-master = <0x1eb>; - rockchip,mclk-fs = <0x80>; - }; - - i2s@fddc8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk_tx\0hclk"; - assigned-clocks = <0x02 0x1ff>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x391>; - interrupts = <0x00 0xbc 0x04>; - clocks = <0x02 0x201 0x02 0x1fe>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "disabled"; - reg = <0x00 0xfddc8000 0x00 0x1000>; - phandle = <0x47c>; - dmas = <0xf2 0x16>; - reset-names = "tx-m"; - }; - - pcie30-avdd0v75 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "pcie30_avdd0v75"; - compatible = "regulator-fixed"; - phandle = <0x4a7>; - vin-supply = <0x1df>; - }; - - timer { - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - compatible = "arm,armv8-timer"; - }; - - rockchip-suspend { - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x5000604>; - compatible = "rockchip,pm-rk3588"; - status = "okay"; - rockchip,wakeup-config = <0x100>; - phandle = <0x246>; - }; - - decompress@fea80000 { - clock-names = "aclk\0dclk\0pclk"; - resets = <0x02 0x118>; - interrupts = <0x00 0x55 0x04>; - clocks = <0x02 0x75 0x02 0x77 0x02 0x76>; - compatible = "rockchip,hw-decompress"; - status = "disabled"; - reg = <0x00 0xfea80000 0x00 0x1000>; - phandle = <0x2a3>; - reset-names = "dresetn"; - }; - - dma-controller@fea30000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x58 0x04 0x00 0x59 0x04>; - clocks = <0x02 0x79>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfea30000 0x00 0x4000>; - phandle = <0xf1>; - #dma-cells = <0x01>; - }; - - pwm@febf0000 { - pinctrl-names = "active"; - pinctrl-0 = <0x171>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15e 0x04>; - clocks = <0x02 0x5a 0x02 0x59>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "disabled"; - reg = <0x00 0xfebf0000 0x00 0x10>; - phandle = <0x2d9>; - }; - - iommu@fdcd8f00 { - power-domains = <0x60 0x1d>; - clock-names = "aclk\0iface\0pclk"; - interrupts = <0x00 0x8e 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "fec1_mmu"; - reg = <0x00 0xfdcd8f00 0x00 0x100>; - phandle = <0xd3>; - }; - - spdif-tx@fddb0000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x205>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc3 0x04>; - clocks = <0x02 0x209 0x02 0x204>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb0000 0x00 0x1000>; - phandle = <0x1d5>; - dmas = <0xf1 0x06>; - }; - - rkisp1-vir2 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x241>; - }; - - pcie-clk1 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk1"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x494>; - vin-supply = <0x1cd>; - gpios = <0x181 0x15 0x01>; - }; - - jpege-core@fdba8000 { - power-domains = <0x60 0x15>; - iommus = <0xbf>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2ce 0x02 0x2cf>; - interrupts = <0x00 0x7e 0x04>; - clocks = <0x02 0x1b0 0x02 0x1b1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege2"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba8000 0x00 0x400>; - phandle = <0x26f>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf66400 { - compatible = "syscon"; - reg = <0x00 0xfdf66400 0x00 0x20>; - phandle = <0x95>; - }; - - spdif-tx1-sound { - simple-audio-card,name = "rockchip,spdif-tx1"; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49d>; - simple-audio-card,mclk-fs = <0x80>; - - simple-audio-card,cpu { - sound-dai = <0x1d7>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d8>; - }; - }; - - mmc@fe2e0000 { - mmc-hs400-enhanced-strobe; - clock-names = "core\0bus\0axi\0block\0timer"; - assigned-clocks = <0x02 0x13b 0x02 0x13c 0x02 0x13a>; - bus-width = <0x08>; - non-removable; - no-sdio; - assigned-clock-rates = <0xbebc200 0x16e3600 0xbebc200>; - resets = <0x02 0x1f6 0x02 0x1f4 0x02 0x1f5 0x02 0x1f7 0x02 0x1f8>; - mmc-hs400-1_8v; - interrupts = <0x00 0xcd 0x04>; - clocks = <0x02 0x13a 0x02 0x138 0x02 0x139 0x02 0x13b 0x02 0x13c>; - no-sd; - compatible = "rockchip,rk3588-dwcmshc\0rockchip,dwcmshc-sdhci"; - status = "okay"; - reg = <0x00 0xfe2e0000 0x00 0x10000>; - phandle = <0x295>; - max-frequency = <0xbebc200>; - reset-names = "core\0bus\0axi\0block\0timer"; - }; - - dma-controller@fed10000 { - clock-names = "apb_pclk"; - interrupts = <0x00 0x5a 0x04 0x00 0x5b 0x04>; - clocks = <0x02 0x7a>; - arm,pl330-periph-burst; - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xfed10000 0x00 0x4000>; - phandle = <0xf2>; - #dma-cells = <0x01>; - }; - - iommu@fc900000 { - interrupts = <0x00 0x171 0x04 0x00 0x173 0x04 0x00 0x176 0x04 0x00 0x16f 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfc900000 0x00 0x200000>; - phandle = <0x256>; - }; - - mailbox@fec70000 { - clock-names = "pclk_mailbox"; - interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04>; - clocks = <0x02 0x4d>; - #mbox-cells = <0x01>; - compatible = "rockchip,rk3588-mailbox\0rockchip,rk3368-mailbox"; - status = "disabled"; - reg = <0x00 0xfec70000 0x00 0x200>; - phandle = <0x2de>; - }; - - pcie@fe150000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1b8>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x00 0x0f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20d 0x02 0x21c>; - interrupts = <0x00 0x107 0x04 0x00 0x106 0x04 0x00 0x105 0x04 0x00 0x104 0x04 0x00 0x103 0x04>; - clocks = <0x02 0x14e 0x02 0x153 0x02 0x149 0x02 0x158 0x02 0x15e 0x02 0x183>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b5 0x00 0x00 0x00 0x00 0x02 0x1b5 0x01 0x00 0x00 0x00 0x03 0x1b5 0x02 0x00 0x00 0x00 0x04 0x1b5 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x0e 0x00>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000 0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x82000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0xe00000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; - msi-map = <0x00 0x1b6 0x00 0x1000>; - #interrupt-cells = <0x01>; - status = "okay"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe150000 0x00 0x10000 0x0a 0x40000000 0x00 0x400000>; - linux,pci-domain = <0x00>; - phandle = <0x485>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0x104 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b5>; - interrupt-controller; - }; - }; - - rng@fe378000 { - clock-names = "hclk_trng"; - resets = <0x11a 0x30>; - interrupts = <0x00 0x190 0x04>; - clocks = <0x0e 0x0c>; - compatible = "rockchip,trngv1"; - status = "okay"; - reg = <0x00 0xfe378000 0x00 0x200>; - phandle = <0x297>; - reset-names = "reset"; - }; - - sata@fe220000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x112 0x04>; - clocks = <0x02 0x172 0x02 0x16f 0x02 0x175 0x02 0x164 0x02 0x17f>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x1bc 0x01>; - reg = <0x00 0xfe220000 0x00 0x1000>; - phandle = <0x48a>; - ports-implemented = <0x01>; - }; - - rkcif-mipi-lvds5 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x1a2>; - }; - - vcc-sata-pwr-en-regulator { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - gpio = <0x182 0x0c 0x00>; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_sata_pwr_en"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a3>; - vin-supply = <0x1cd>; - }; - - pwm-fan { - cooling-levels = <0x32 0x32 0x64 0x96 0xc8 0xff>; - rockchip,temp-trips = <0xc350 0x01 0xd6d8 0x02 0xea60 0x03 0xfde8 0x04 0x11170 0x05>; - compatible = "pwm-fan"; - phandle = <0x4ad>; - pwms = <0x1ed 0x00 0xc350 0x00>; - #cooling-cells = <0x02>; - fan-supply = <0x78>; - }; - - qos@fdf3e200 { - compatible = "syscon"; - reg = <0x00 0xfdf3e200 0x00 0x20>; - phandle = <0xab>; - }; - - spdif-tx@fe4e0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x142>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x3f>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc1 0x04>; - clocks = <0x02 0x41 0x02 0x3e>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4e0000 0x00 0x1000>; - phandle = <0x29d>; - dmas = <0x7c 0x05>; - }; - - vad@fe4d0000 { - rockchip,det-channel = <0x00>; - rockchip,audio-src = <0x00>; - clock-names = "hclk"; - reg-names = "vad"; - interrupts = <0x00 0xca 0x04>; - clocks = <0x02 0x2a0>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-vad"; - status = "disabled"; - rockchip,mode = <0x00>; - reg = <0x00 0xfe4d0000 0x00 0x1000>; - phandle = <0x29c>; - }; - - jpegd@fdb90000 { - power-domains = <0x60 0x15>; - iommus = <0xbb>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1b4>; - rockchip,normal-rates = <0x23c34600 0x00>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x2d2 0x02 0x2d3>; - interrupts = <0x00 0x81 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x01>; - compatible = "rockchip,rkv-jpeg-decoder-v1"; - status = "okay"; - interrupt-names = "irq_jpegd"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb90000 0x00 0x400>; - phandle = <0x26c>; - reset-names = "video_a\0video_h"; - }; - - cpuinfo { - nvmem-cells = <0x2a 0x2b 0x2c>; - compatible = "rockchip,cpuinfo"; - nvmem-cell-names = "id\0cpu-version\0cpu-code"; - }; - - qos@fdf60400 { - compatible = "syscon"; - reg = <0x00 0xfdf60400 0x00 0x20>; - phandle = <0x8f>; - }; - - spi@feb20000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x01>; - pinctrl-0 = <0x154 0x155>; - clock-names = "spiclk\0apb_pclk"; - assigned-clocks = <0x02 0xa5>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x148 0x04>; - clocks = <0x02 0xa5 0x02 0xa0>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "okay"; - reg = <0x00 0xfeb20000 0x00 0x1000>; - phandle = <0x2ad>; - dmas = <0xf1 0x0f 0xf1 0x10>; - - rk806single@0 { - vcc11-supply = <0x15b>; - pinctrl-names = "default\0pmic-power-off"; - vcc12-supply = <0x78>; - vcc13-supply = <0x15c>; - vcc14-supply = <0x15c>; - pinctrl-0 = <0x156 0x157 0x158 0x159>; - interrupts = <0x07 0x08>; - spi-max-frequency = <0xf4240>; - interrupt-parent = <0x7b>; - low_voltage_threshold = <0xbb8>; - vcca-supply = <0x78>; - vcc1-supply = <0x78>; - pmic-reset-func = <0x01>; - vcc2-supply = <0x78>; - hotdie_temperture_threshold = <0x73>; - compatible = "rockchip,rk806"; - vcc3-supply = <0x78>; - pinctrl-1 = <0x15a>; - vcc4-supply = <0x78>; - vcc5-supply = <0x78>; - reg = <0x00>; - phandle = <0x2ae>; - vcc6-supply = <0x78>; - shutdown_voltage_threshold = <0xa8c>; - vcc7-supply = <0x78>; - vcc8-supply = <0x78>; - shutdown_temperture_threshold = <0xa0>; - vcc9-supply = <0x78>; - vcc10-supply = <0x78>; - - pinctrl_rk806 { - gpio-controller; - phandle = <0x2af>; - #gpio-cells = <0x02>; - - rk806_dvs2_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b4>; - }; - - rk806_dvs3_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl3"; - phandle = <0x159>; - }; - - rk806_dvs3_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl3"; - phandle = <0x2ba>; - }; - - rk806_dvs3_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b9>; - }; - - rk806_dvs2_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x158>; - }; - - rk806_dvs1_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl1"; - phandle = <0x15a>; - }; - - rk806_dvs1_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b0>; - }; - - rk806_dvs1_null { - function = "pin_fun0"; - pins = "gpio_pwrctrl2"; - phandle = <0x157>; - }; - - rk806_dvs3_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl3"; - phandle = <0x2bb>; - }; - - rk806_dvs2_gpio { - function = "pin_fun5"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b6>; - }; - - rk806_dvs2_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b2>; - }; - - rk806_dvs2_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b3>; - }; - - rk806_dvs1_rst { - function = "pin_fun3"; - pins = "gpio_pwrctrl1"; - phandle = <0x2b1>; - }; - - rk806_dvs3_slp { - function = "pin_fun1"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b7>; - }; - - rk806_dvs2_dvs { - function = "pin_fun4"; - pins = "gpio_pwrctrl2"; - phandle = <0x2b5>; - }; - - rk806_dvs3_pwrdn { - function = "pin_fun2"; - pins = "gpio_pwrctrl3"; - phandle = <0x2b8>; - }; - }; - - pwrkey { - status = "okay"; - }; - - regulators { - - PLDO_REG2 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s0"; - phandle = <0x177>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - DCDC_REG4 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-init-microvolt = <0xb71b0>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_vdenc_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x2bc>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG2 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_cpu_lit_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x12>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG4 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_0v85_s0"; - phandle = <0x2c6>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG9 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vddq_ddr_s0"; - phandle = <0x2bf>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG2 { - regulator-max-microvolt = <0xcf850>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xcf850>; - regulator-name = "vdd_ddr_pll_s0"; - phandle = <0x2c5>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - PLDO_REG5 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vccio_sd_s0"; - phandle = <0x118>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG7 { - regulator-max-microvolt = <0x1e8480>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1e8480>; - regulator-name = "vdd_2v0_pldo_s3"; - phandle = <0x15b>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1e8480>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG3 { - regulator-max-microvolt = <0x124f80>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x124f80>; - regulator-name = "avdd_1v2_s0"; - phandle = <0x2c1>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG5 { - regulator-max-microvolt = <0xdbba0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_ddr_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x42>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xcf850>; - }; - }; - - DCDC_REG10 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "vcc_1v8_s3"; - phandle = <0x2c0>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG1 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "avcc_1v8_s0"; - phandle = <0x1de>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xa4cb8>; - regulator-name = "vdd_log_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x43>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG1 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - regulator-enable-ramp-delay = <0x190>; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_gpu_s0"; - regulator-ramp-delay = <0x30d4>; - phandle = <0x62>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG5 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s0"; - phandle = <0x2c7>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - NLDO_REG3 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "avdd_0v75_s0"; - phandle = <0x1df>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - PLDO_REG6 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "pldo6_s3"; - phandle = <0x2c3>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x1b7740>; - regulator-on-in-suspend; - }; - }; - - DCDC_REG8 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s3"; - phandle = <0x2be>; - - regulator-state-mem { - regulator-suspend-microvolt = <0x325aa0>; - regulator-on-in-suspend; - }; - }; - - NLDO_REG1 { - regulator-max-microvolt = <0xb71b0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b0>; - regulator-name = "vdd_0v75_s3"; - phandle = <0x2c4>; - - regulator-state-mem { - regulator-suspend-microvolt = <0xb71b0>; - regulator-on-in-suspend; - }; - }; - - PLDO_REG4 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3_s0"; - phandle = <0x2c2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - DCDC_REG6 { - regulator-boot-on; - regulator-always-on; - regulator-name = "vdd2_ddr_s3"; - phandle = <0x2bd>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; - }; - - usbhost3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus\0utmi\0php\0pipe"; - clocks = <0x02 0x179 0x02 0x178 0x02 0x177 0x02 0x17a 0x02 0x166 0x02 0x181>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "disabled"; - phandle = <0x258>; - - usb@fcd00000 { - snps,dis_enblslpm_quirk; - phy-names = "usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - phy_type = "utmi_wide"; - resets = <0x02 0x237>; - interrupts = <0x00 0xde 0x04>; - snps,dis_rxdet_inp3_quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "disabled"; - snps,parkmode-disable-ss-quirk; - phys = <0x70 0x04>; - reg = <0x00 0xfcd00000 0x00 0x400000>; - phandle = <0x259>; - dr_mode = "host"; - reset-names = "usb3-host"; - snps,dis-tx-ipgap-linecheck-quirk; - }; - }; - - pcie@fe190000 { - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x40 0x4f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x08>; - resets = <0x02 0x211 0x02 0x220>; - interrupts = <0x00 0xfd 0x04 0x00 0xfc 0x04 0x00 0xfb 0x04 0x00 0xfa 0x04 0x00 0xf9 0x04>; - clocks = <0x02 0x152 0x02 0x157 0x02 0x14d 0x02 0x15d 0x02 0x162 0x02 0x182>; - interrupt-map = <0x00 0x00 0x00 0x01 0x107 0x00 0x00 0x00 0x00 0x02 0x107 0x01 0x00 0x00 0x00 0x03 0x107 0x02 0x00 0x00 0x00 0x04 0x107 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x02>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - num-lanes = <0x01>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf4000000 0x00 0xf4000000 0x00 0x100000 0x81000000 0x00 0xf4100000 0x00 0xf4100000 0x00 0x100000 0x82000000 0x00 0xf4200000 0x00 0xf4200000 0x00 0xe00000 0xc3000000 0x0a 0x00 0x0a 0x00 0x00 0x40000000>; - msi-map = <0x4000 0x106 0x4000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x108 0x02>; - num-viewport = <0x04>; - reg = <0x00 0xfe190000 0x00 0x10000 0x0a 0x41000000 0x00 0x400000>; - linux,pci-domain = <0x04>; - phandle = <0x28d>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x08>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xfa 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x107>; - interrupt-controller; - }; - }; - - rkcif-mipi-lvds3-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x57>; - phandle = <0x238>; - }; - - aliases { - i2c3 = "/i2c@feab0000"; - pwm9 = "/pwm@febe0010"; - pwm14 = "/pwm@febf0020"; - spi2 = "/spi@feb20000"; - usbdp0 = "/phy@fed80000"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - dsi1 = "/dsi@fde30000"; - hdmi1 = "/hdmi@fdea0000"; - serial7 = "/serial@feba0000"; - i2c1 = "/i2c@fea90000"; - pwm7 = "/pwm@febd0030"; - pwm12 = "/pwm@febf0000"; - jpege3 = "/jpege-core@fdbac000"; - spi0 = "/spi@feb00000"; - hdptx1 = "/phy@fed70000"; - csi2dphy5 = "/csi2-dphy5"; - serial5 = "/serial@feb80000"; - csi2dcphy1 = "/csi2-dcphy1"; - pwm5 = "/pwm@febd0010"; - mmc1 = "/mmc@fe2c0000"; - pwm10 = "/pwm@febe0020"; - jpege1 = "/jpege-core@fdba4000"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - csi2dphy3 = "/csi2-dphy3"; - serial3 = "/serial@feb60000"; - edp0 = "/edp@fdec0000"; - pwm3 = "/pwm@fd8b0030"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - csi2dphy1 = "/csi2-dphy1"; - serial1 = "/serial@feb40000"; - pwm1 = "/pwm@fd8b0010"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - spi5 = "/spi@fe2b0000"; - gpio3 = "/pinctrl/gpio@fec40000"; - hdptxhdmi1 = "/hdmiphy@fed70000"; - rkcif_mipi_lvds0 = "/rkcif-mipi-lvds"; - i2c4 = "/i2c@feac0000"; - ethernet1 = "/ethernet@fe1c0000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - pwm15 = "/pwm@febf0030"; - hdmirx0 = "/hdmirx-controller@fdee0000"; - spi3 = "/spi@feb30000"; - usbdp1 = "/phy@fed90000"; - gpio1 = "/pinctrl/gpio@fec20000"; - serial8 = "/serial@febb0000"; - i2c2 = "/i2c@feaa0000"; - pwm8 = "/pwm@febe0000"; - pwm13 = "/pwm@febf0010"; - spi1 = "/spi@feb10000"; - dsi0 = "/dsi@fde20000"; - hdmi0 = "/hdmi@fde80000"; - serial6 = "/serial@feb90000"; - i2c0 = "/i2c@fd880000"; - pwm6 = "/pwm@febd0020"; - mmc2 = "/mmc@fe2d0000"; - pwm11 = "/pwm@febe0030"; - jpege2 = "/jpege-core@fdba8000"; - hdptx0 = "/phy@fed60000"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - dp1 = "/dp@fde60000"; - csi2dphy4 = "/csi2-dphy4"; - serial4 = "/serial@feb70000"; - edp1 = "/edp@fded0000"; - csi2dcphy0 = "/csi2-dcphy0"; - pwm4 = "/pwm@febd0000"; - mmc0 = "/mmc@fe2e0000"; - jpege0 = "/jpege-core@fdba0000"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2c7 = "/i2c@fec90000"; - csi2dphy2 = "/csi2-dphy2"; - serial2 = "/serial@feb50000"; - pwm2 = "/pwm@fd8b0020"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdcp0 = "/hdcp@fde40000"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - csi2dphy0 = "/csi2-dphy0"; - serial0 = "/serial@fd890000"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm0 = "/pwm@fd8b0000"; - spi4 = "/spi@fecb0000"; - gpio2 = "/pinctrl/gpio@fec30000"; - hdptxhdmi0 = "/hdmiphy@fed60000"; - serial9 = "/serial@febc0000"; - }; - - spdif-tx@fdde8000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x259>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc5 0x04>; - clocks = <0x02 0x25c 0x02 0x258>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfdde8000 0x00 0x1000>; - phandle = <0x47d>; - dmas = <0xf1 0x08>; - }; - - i2s@fe490000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x12d 0x12e>; - pinctrl-0 = <0x12a 0x12b>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x24>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb6 0x04>; - clocks = <0x02 0x27 0x02 0x22>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x12c>; - status = "disabled"; - reg = <0x00 0xfe490000 0x00 0x1000>; - phandle = <0x298>; - dmas = <0xf1 0x00 0xf1 0x01>; - rockchip,clk-trcm = <0x01>; - }; - - syscon@fd5d0000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d0000 0x00 0x4000>; - phandle = <0x18b>; - - usb2-phy@0 { - clock-output-names = "usb480m_phy0"; - clock-names = "phyclk"; - resets = <0x02 0xc0047 0x02 0x488>; - interrupts = <0x00 0x189 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - rockchip,usbctrl-grf = <0x74>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x00 0x10>; - phandle = <0x18d>; - reset-names = "phy\0apb"; - - otg-port { - #phy-cells = <0x00>; - rockchip,typec-vbus-det; - status = "okay"; - phandle = <0x66>; - }; - }; - }; - - i2c@feac0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14b>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb3 0x02 0xab>; - interrupts = <0x00 0x141 0x04>; - clocks = <0x02 0x90 0x02 0x88>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfeac0000 0x00 0x1000>; - phandle = <0x2a7>; - reset-names = "i2c\0apb"; - - pc9202@3c { - pinctrl-names = "default"; - pinctrl-0 = <0x14c>; - index = <0x01>; - compatible = "firefly,pc9202"; - status = "okay"; - wd-en-gpio = <0x7b 0x14 0x00>; - driver-names = "wdt_base"; - reg = <0x3c>; - }; - }; - - rkcif-mipi-lvds5-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x476>; - }; - - firmware { - - optee { - method = "smc"; - compatible = "linaro,optee-tz"; - phandle = <0x222>; - }; - - sdei { - method = "smc"; - compatible = "arm,sdei-1.0"; - phandle = <0x221>; - }; - - scmi { - shmem = <0x46>; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "arm,scmi-smc"; - phandle = <0x220>; - arm,smc-id = <0x82000010>; - - protocol@16 { - #reset-cells = <0x01>; - reg = <0x16>; - phandle = <0x11a>; - }; - - protocol@14 { - assigned-clocks = <0x0e 0x00 0x0e 0x02 0x0e 0x03>; - assigned-clock-rates = <0x30a32c00 0x30a32c00 0x30a32c00>; - #clock-cells = <0x01>; - reg = <0x14>; - phandle = <0x0e>; - }; - }; - }; - - rkvenc-core@fdbd0000 { - power-domains = <0x60 0x10>; - iommus = <0xc2>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1c5 0x02 0x1c6>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x2f5 0x02 0x2f4 0x02 0x2f6>; - interrupts = <0x00 0x65 0x04>; - clocks = <0x02 0x1c5 0x02 0x1c4 0x02 0x1c6>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc0"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbd0000 0x00 0x6000>; - phandle = <0x272>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - iommu@fdcc7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x88 0x04>; - clocks = <0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp1_mmu"; - reg = <0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xd1>; - }; - - rkcif-mipi-lvds-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22b>; - }; - - syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf\0syscon"; - reg = <0x00 0xfd5c8000 0x00 0x4000>; - phandle = <0x18c>; - }; - - gpu@fb000000 { - power-domains = <0x60 0x0c>; - downdifferential = <0x0a>; - mali-supply = <0x62>; - clock-names = "clk_mali\0clk_gpu_coregroup\0clk_gpu_stacks\0clk_gpu"; - assigned-clocks = <0x0e 0x05>; - assigned-clock-rates = <0xbebc200>; - interrupts = <0x00 0x5e 0x04 0x00 0x5d 0x04 0x00 0x5c 0x04>; - clocks = <0x0e 0x05 0x02 0x115 0x02 0x116 0x02 0x114>; - upthreshold = <0x1e>; - compatible = "arm,mali-bifrost"; - dynamic-power-coefficient = <0xba6>; - status = "okay"; - interrupt-names = "GPU\0MMU\0JOB"; - mem-supply = <0x62>; - reg = <0x00 0xfb000000 0x00 0x200000>; - phandle = <0x5f>; - operating-points-v2 = <0x61>; - #cooling-cells = <0x02>; - }; - - csi2-dphy4 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x213>; - }; - - mipi4-csi2-hw@fdd50000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x328>; - interrupts = <0x00 0x97 0x04 0x00 0x98 0x04>; - clocks = <0x02 0x1d3>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd50000 0x00 0x10000>; - phandle = <0x4b>; - reset-names = "srst_csihost_p"; - }; - - qos@fdf82000 { - compatible = "syscon"; - reg = <0x00 0xfdf82000 0x00 0x20>; - phandle = <0x9d>; - }; - - rkcif-mipi-lvds2-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x55>; - phandle = <0x235>; - }; - - rkisp1-vir0 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23f>; - }; - - qos@fdf41100 { - compatible = "syscon"; - reg = <0x00 0xfdf41100 0x00 0x20>; - phandle = <0xa7>; - }; - - test-power { - status = "okay"; - }; - - usb-5v { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0xfe 0x03 0x00>; - pinctrl-0 = <0x1ef>; - regulator-always-on; - enable-active-high; - regulator-name = "usb_5v"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b1>; - }; - - phy@feda0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0043 0x02 0x3e 0x02 0x3f 0x02 0xc0044>; - clocks = <0x02 0x108 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x190>; - reg = <0x00 0xfeda0000 0x00 0x10000>; - phandle = <0x2f>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - mod-sleep-regulator { - pinctrl-names = "default"; - regulator-boot-on; - gpio = <0x7b 0x15 0x00>; - pinctrl-0 = <0x1ee>; - regulator-always-on; - enable-active-high; - regulator-name = "mod_sleep"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4ae>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - qos@fdf66c00 { - compatible = "syscon"; - reg = <0x00 0xfdf66c00 0x00 0x20>; - phandle = <0x99>; - }; - - crypto@fe370000 { - clock-names = "aclk\0hclk\0sclk\0pka"; - resets = <0x11a 0x0f>; - interrupts = <0x00 0xd1 0x04>; - clocks = <0x0e 0x0b 0x0e 0x0c 0x0e 0x14 0x0e 0x15>; - compatible = "rockchip,rk3588-crypto"; - status = "disabled"; - reg = <0x00 0xfe370000 0x00 0x2000>; - phandle = <0x296>; - reset-names = "crypto-rst"; - }; - - i2s@fddf4000 { - power-domains = <0x60 0x1a>; - rockchip,always-on; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x249>; - assigned-clock-parents = <0x02 0x07>; - resets = <0x02 0x3ef>; - interrupts = <0x00 0xba 0x04>; - clocks = <0x02 0x24c 0x02 0x24c 0x02 0x252>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - rockchip,playback-only; - status = "okay"; - reg = <0x00 0xfddf4000 0x00 0x1000>; - phandle = <0x1e0>; - dmas = <0xf2 0x04>; - reset-names = "tx-m"; - rockchip,hdmi-path; - }; - - mipi0-csi2-hw@fdd10000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x324>; - interrupts = <0x00 0x8f 0x04 0x00 0x90 0x04>; - clocks = <0x02 0x1cf>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd10000 0x00 0x10000>; - phandle = <0x47>; - reset-names = "srst_csihost_p"; - }; - - mipi4-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x228>; - }; - - jpege-ccu { - compatible = "rockchip,vpu-jpege-ccu"; - status = "okay"; - phandle = <0xbd>; - }; - - dsi@fde30000 { - power-domains = <0x60 0x18>; - #address-cells = <0x01>; - phy-names = "dcphy"; - clock-names = "pclk\0sys_clk"; - resets = <0x02 0x355>; - interrupts = <0x00 0xa8 0x04>; - clocks = <0x02 0x279 0x02 0x27b>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dsi2"; - status = "disabled"; - rockchip,grf = <0xd7>; - phys = <0x30>; - reg = <0x00 0xfde30000 0x00 0x10000>; - phandle = <0x283>; - reset-names = "apb"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x284>; - - endpoint@1 { - remote-endpoint = <0x3a>; - status = "disabled"; - reg = <0x01>; - phandle = <0xef>; - }; - - endpoint@0 { - remote-endpoint = <0xf4>; - status = "disabled"; - reg = <0x00>; - phandle = <0xea>; - }; - }; - }; - }; - - iommu@fcb00000 { - interrupts = <0x00 0x17d 0x04 0x00 0x17f 0x04 0x00 0x182 0x04 0x00 0x17b 0x04>; - #iommu-cells = <0x01>; - compatible = "arm,smmu-v3"; - status = "disabled"; - interrupt-names = "eventq\0gerror\0priq\0cmdq-sync"; - reg = <0x00 0xfcb00000 0x00 0x200000>; - phandle = <0x257>; - }; - - rkcif-mipi-lvds3 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x57>; - }; - - vcc-hub-regulator { - regulator-boot-on; - gpio = <0x182 0x01 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4af>; - }; - - syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf\0syscon"; - reg = <0x00 0xfd5ac000 0x00 0x4000>; - phandle = <0x74>; - }; - - qos@fdf40200 { - compatible = "syscon"; - reg = <0x00 0xfdf40200 0x00 0x20>; - phandle = <0xa9>; - }; - - rkisp@fdcb0000 { - power-domains = <0x60 0x1b>; - iommus = <0xd0>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp_core\0clk_isp_core_marvin\0clk_isp_core_vicap"; - interrupts = <0x00 0x83 0x04 0x00 0x85 0x04 0x00 0x86 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd>; - compatible = "rockchip,rk3588-rkisp"; - status = "okay"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x7f00>; - phandle = <0x58>; - }; - - serial@feba0000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x166>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x152 0x04>; - clocks = <0x02 0xcf 0x02 0xb1>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeba0000 0x00 0x100>; - phandle = <0x2cf>; - dmas = <0xf2 0x07 0xf2 0x08>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds1-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x232>; - }; - - chosen { - linux,initrd-end = <0x00 0xaac72ae>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyS2,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; - linux,initrd-start = <0x00 0xa200000>; - phandle = <0x48d>; - }; - - hdmi@fde80000 { - power-domains = <0x60 0x1a>; - reg-io-width = <0x04>; - pinctrl-names = "default"; - phy-names = "hdmi"; - pinctrl-0 = <0xf9 0xfa 0xfb 0xfc>; - clock-names = "pclk\0hpd\0earc\0hdmitx_ref\0aud\0dclk_vp0\0dclk_vp1\0dclk_vp2\0dclk_vp3\0hclk_vo1\0link_clk"; - resets = <0x02 0x3d0 0x02 0x49c>; - interrupts = <0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0x168 0x04>; - clocks = <0x02 0x221 0x02 0x265 0x02 0x222 0x02 0x223 0x02 0x246 0x02 0x274 0x02 0x275 0x02 0x276 0x02 0x277 0x05 0x35>; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-dw-hdmi"; - status = "okay"; - rockchip,grf = <0xc8>; - phys = <0xfd>; - enable-gpios = <0xfe 0x08 0x00>; - reg = <0x00 0xfde80000 0x00 0x10000 0x00 0xfde90000 0x00 0x10000>; - phandle = <0x1d4>; - reset-names = "ref\0hdp"; - rockchip,vo1_grf = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - phandle = <0x288>; - - endpoint@1 { - remote-endpoint = <0xff>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe2>; - }; - - endpoint@2 { - remote-endpoint = <0x100>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe8>; - }; - - endpoint@0 { - remote-endpoint = <0x3c>; - status = "okay"; - reg = <0x00>; - phandle = <0xdc>; - }; - }; - }; - }; - - cluster2-opp-table { - rockchip,pvtm-offset = <0x18>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x27 0x28 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x603 0x00 0x604 0x61c 0x01 0x61d 0x635 0x02 0x636 0x64e 0x03 0x64f 0x66c 0x04 0x66d 0x68a 0x05 0x68b 0x6a8 0x06 0x6a9 0x270f 0x07>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,pvtm-low-len-sel = <0x03>; - rockchip,high-temp-max-freq = <0x21b100>; - opp-shared; - rockchip,reboot-freq = <0x1b7740>; - rockchip,pvtm-freq = <0x188940>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x29>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x63b 0x00 0x63c 0x64f 0x01 0x650 0x668 0x02 0x669 0x68b 0x03 0x68c 0x6ae 0x04 0x6af 0x6cf 0x05 0x6d0 0x6f0 0x06 0x6f1 0x270f 0x07>; - phandle = <0x1a>; - rockchip,idle-threshold-freq = <0x21b100>; - rockchip,pvtm-temp-prop = <0x10e 0x10e>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-j-m-2016000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L4 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-microvolt-L2 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L5 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L3 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - }; - - opp-1200000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2256000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8677d400>; - opp-supported-hw = <0xf9 0x13>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2400000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8f0d1800>; - opp-supported-hw = <0xf9 0x80>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L6 = <0xbd358 0xbd358 0xf4240 0xbd358 0xbd358 0xf4240>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xf4240 0xc3500 0xc3500 0xf4240>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xf4240 0xc96a8 0xc96a8 0xf4240>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L5 = <0xc042c 0xc042c 0xf4240 0xc042c 0xc042c 0xf4240>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xf4240 0xc65d4 0xc65d4 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2208000000 { - opp-microvolt = <0xf116c 0xf116c 0xf4240 0xf116c 0xf116c 0xf4240>; - opp-microvolt-L6 = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L4 = <0xeafc4 0xeafc4 0xf4240 0xeafc4 0xeafc4 0xf4240>; - opp-hz = <0x00 0x839b6800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - opp-microvolt-L5 = <0xe7ef0 0xe7ef0 0xf4240 0xe7ef0 0xe7ef0 0xf4240>; - opp-microvolt-L3 = <0xee098 0xee098 0xf4240 0xee098 0xee098 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xba284 0xba284 0xf4240 0xba284 0xba284 0xf4240>; - opp-microvolt-L6 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xf4240 0xb71b0 0xb71b0 0xf4240>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-microvolt-L3 = <0xb40dc 0xb40dc 0xf4240 0xb40dc 0xb40dc 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1800000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L6 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L4 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L2 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L5 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L3 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - }; - - opp-2352000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x8c30ac00>; - opp-supported-hw = <0xf9 0x48>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L6 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L4 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L7 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L5 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L3 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - clock-latency-ns = <0x9c40>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-2016000000 { - opp-microvolt = <0xe1d48 0xe1d48 0xf4240 0xe1d48 0xe1d48 0xf4240>; - opp-microvolt-L6 = <0xcf850 0xcf850 0xf4240 0xcf850 0xcf850 0xf4240>; - opp-microvolt-L4 = <0xd59f8 0xd59f8 0xf4240 0xd59f8 0xd59f8 0xf4240>; - opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240 0xdbba0 0xdbba0 0xf4240>; - opp-hz = <0x00 0x7829b800>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xcc77c 0xcc77c 0xf4240 0xcc77c 0xcc77c 0xf4240>; - opp-microvolt-L5 = <0xd2924 0xd2924 0xf4240 0xd2924 0xd2924 0xf4240>; - opp-microvolt-L3 = <0xd8acc 0xd8acc 0xf4240 0xd8acc 0xd8acc 0xf4240>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xdec74 0xdec74 0xf4240 0xdec74 0xdec74 0xf4240>; - }; - - opp-1416000000 { - opp-microvolt = <0xb1008 0xb1008 0xf4240 0xb1008 0xb1008 0xf4240>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L4 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - opp-microvolt-L2 = <0xadf34 0xadf34 0xf4240 0xadf34 0xadf34 0xf4240>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L7 = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-microvolt-L5 = <0xa7d8c 0xa7d8c 0xf4240 0xa7d8c 0xa7d8c 0xf4240>; - opp-microvolt-L3 = <0xaae60 0xaae60 0xf4240 0xaae60 0xaae60 0xf4240>; - clock-latency-ns = <0x9c40>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xf4240 0xa4cb8 0xa4cb8 0xf4240>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - }; - - opp-2304000000 { - opp-microvolt = <0xf4240 0xf4240 0xf4240 0xf4240 0xf4240 0xf4240>; - opp-hz = <0x00 0x89544000>; - opp-supported-hw = <0xf9 0x24>; - clock-latency-ns = <0x9c40>; - }; - }; - - rkcif-dvp { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-dvp"; - status = "disabled"; - phandle = <0x51>; - }; - - rkisp0-vir2 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "okay"; - phandle = <0x23d>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x59>; - reg = <0x00>; - phandle = <0x56>; - }; - }; - }; - - i2c@fea90000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x148>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb0 0x02 0xa8>; - interrupts = <0x00 0x13e 0x04>; - clocks = <0x02 0x8d 0x02 0x85>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "okay"; - reg = <0x00 0xfea90000 0x00 0x1000>; - phandle = <0x2a4>; - reset-names = "i2c\0apb"; - - rk8602@42 { - regulator-max-microvolt = <0xe7ef0>; - regulator-boot-on; - rockchip,suspend-voltage-selector = <0x01>; - regulator-always-on; - regulator-min-microvolt = <0x86470>; - regulator-name = "vdd_npu_s0"; - regulator-ramp-delay = <0x8fc>; - compatible = "rockchip,rk8602"; - reg = <0x42>; - phandle = <0xb3>; - vin-supply = <0x78>; - regulator-compatible = "rk860x-reg"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - syscon@fd58a000 { - compatible = "rockchip,rk3588-pmu1-grf\0syscon"; - reg = <0x00 0xfd58a000 0x00 0x2000>; - phandle = <0x104>; - }; - - syscon@fd5ec000 { - compatible = "rockchip,mipi-dcphy-grf\0syscon"; - reg = <0x00 0xfd5ec000 0x00 0x4000>; - phandle = <0x191>; - }; - - venc-opp-table { - nvmem-cells = <0xc6 0xc7>; - rockchip,leakage-voltage-sel = <0x01 0x0f 0x00 0x10 0x19 0x01 0x1a 0xfe 0x02>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,grf = <0xc8>; - nvmem-cell-names = "leakage\0opp-info"; - phandle = <0xc4>; - - opp-800000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xcf850 0xb71b0 0xb71b0 0xcf850>; - opp-hz = <0x00 0x2faf0800>; - opp-microvolt-L0 = <0xc3500 0xc3500 0xcf850 0xc3500 0xc3500 0xcf850>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xcf850 0xbd358 0xbd358 0xcf850>; - }; - }; - - iommu@fdc38700 { - power-domains = <0x60 0x0e>; - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x60 0x04>; - clocks = <0x02 0x190 0x02 0x18f>; - rockchip,enable-cmd-retry; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "okay"; - interrupt-names = "irq_rkvdec0_mmu"; - reg = <0x00 0xfdc38700 0x00 0x40 0x00 0xfdc38740 0x00 0x40>; - phandle = <0xc9>; - rockchip,master-handle-irq; - }; - - qos@fdf35200 { - compatible = "syscon"; - reg = <0x00 0xfdf35200 0x00 0x20>; - phandle = <0x88>; - }; - - qos@fdf71000 { - compatible = "syscon"; - reg = <0x00 0xfdf71000 0x00 0x20>; - phandle = <0x86>; - }; - - syscon@fd598000 { - compatible = "rockchip,rk3588-dsu-grf\0syscon"; - reg = <0x00 0xfd598000 0x00 0x100>; - phandle = <0x23>; - }; - - csi2-dphy2 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "disabled"; - phys = <0x2f 0x30>; - phandle = <0x211>; - }; - - syscon@fd5b4000 { - compatible = "rockchip,mipi-dphy-grf\0syscon"; - reg = <0x00 0xfd5b4000 0x00 0x1000>; - phandle = <0x192>; - }; - - iommu@fdb70f00 { - power-domains = <0x60 0x1e>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x73 0x04>; - clocks = <0x02 0x18a 0x02 0x189>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "rga3_1_mmu"; - reg = <0x00 0xfdb70f00 0x00 0x100>; - phandle = <0xba>; - }; - - vcc5v0-usb { - regulator-max-microvolt = <0x4c4b40>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-name = "vcc5v0_usb"; - compatible = "regulator-fixed"; - phandle = <0x1dd>; - vin-supply = <0x1cd>; - }; - - fiq-debugger { - pinctrl-names = "default"; - rockchip,irq-mode-enable = <0x01>; - rockchip,baudrate = <0x1c200>; - pinctrl-0 = <0x1ce>; - interrupts = <0x00 0x1a7 0x08>; - rockchip,wake-irq = <0x00>; - compatible = "rockchip,fiq-debugger"; - status = "okay"; - phandle = <0x490>; - rockchip,serial-id = <0x02>; - }; - - phy@fed70000 { - clock-names = "ref\0apb"; - resets = <0x02 0x486 0x02 0xc003f 0x02 0xc0040 0x02 0xc0041>; - clocks = <0x02 0x2b5 0x02 0x268>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy"; - status = "disabled"; - rockchip,grf = <0x1c7>; - reg = <0x00 0xfed70000 0x00 0x2000>; - phandle = <0x1af>; - reset-names = "apb\0init\0cmn\0lane"; - }; - - pvtm@fda60000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-litcore-pvtm"; - reg = <0x00 0xfda60000 0x00 0x100>; - - pvtm@2 { - clock-names = "clk\0pclk"; - clocks = <0x02 0x2ca 0x02 0x1b>; - reg = <0x02>; - }; - }; - - rkispp@fdcd8000 { - power-domains = <0x60 0x1d>; - iommus = <0xd3>; - clock-names = "aclk_ispp\0hclk_ispp\0clk_ispp"; - assigned-clocks = <0x02 0x1d9>; - assigned-clock-rates = <0x5f5e100>; - interrupts = <0x00 0x8d 0x04>; - clocks = <0x02 0x1d8 0x02 0x1d9 0x02 0x1da>; - compatible = "rockchip,rk3588-rkispp"; - status = "disabled"; - interrupt-names = "fec_irq"; - reg = <0x00 0xfdcd8000 0x00 0xf00>; - phandle = <0x5c>; - }; - - qos@fdf66000 { - compatible = "syscon"; - reg = <0x00 0xfdf66000 0x00 0x20>; - phandle = <0x93>; - }; - - syscon@fd592000 { - compatible = "rockchip,rk3588-bigcore1-grf\0syscon"; - reg = <0x00 0xfd592000 0x00 0x100>; - phandle = <0x29>; - }; - - rkcif-mipi-lvds1 { - iommus = <0x50>; - rockchip,hw = <0x4f>; - compatible = "rockchip,rkcif-mipi-lvds"; - status = "disabled"; - phandle = <0x53>; - }; - - av1d@fdc70000 { - power-domains = <0x60 0x17>; - iommus = <0xce>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - reg-names = "vcd\0cache\0afbc"; - assigned-clocks = <0x02 0x49 0x02 0x4b>; - rockchip,normal-rates = <0x17d78400 0x17d78400>; - assigned-clock-rates = <0x17d78400 0x17d78400>; - resets = <0x02 0x442 0x02 0x445>; - interrupts = <0x00 0x6c 0x04 0x00 0x6b 0x04 0x00 0x6a 0x04>; - clocks = <0x02 0x49 0x02 0x4b>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x0b>; - compatible = "rockchip,av1-decoder"; - status = "okay"; - interrupt-names = "irq_av1d\0irq_cache\0irq_afbc"; - reg = <0x00 0xfdc70000 0x00 0x800 0x00 0xfdc80000 0x00 0x400 0x00 0xfdc90000 0x00 0x400>; - phandle = <0x276>; - reset-names = "video_a\0video_h"; - }; - - qos@fdf40500 { - compatible = "syscon"; - reg = <0x00 0xfdf40500 0x00 0x20>; - phandle = <0xa3>; - }; - - vcc-hub-reset-regulator { - regulator-boot-on; - gpio = <0x182 0x04 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a0>; - }; - - qos@fdf72200 { - compatible = "syscon"; - reg = <0x00 0xfdf72200 0x00 0x20>; - phandle = <0x83>; - }; - - serial@feb70000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x163>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14f 0x04>; - clocks = <0x02 0xc3 0x02 0xae>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0xfeb70000 0x00 0x100>; - phandle = <0x2cc>; - dmas = <0xf1 0x09 0xf1 0x0a>; - reg-shift = <0x02>; - }; - - rkcif-mipi-lvds2-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "okay"; - rockchip,cif = <0x55>; - phandle = <0x233>; - - port { - - endpoint { - remote-endpoint = <0x56>; - phandle = <0x59>; - }; - }; - }; - - i2c@feca0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x186>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb7 0x02 0xaf>; - interrupts = <0x00 0x145 0x04>; - clocks = <0x02 0x94 0x02 0x8c>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfeca0000 0x00 0x1000>; - phandle = <0x2e5>; - reset-names = "i2c\0apb"; - }; - - vcc-sdcard-pwr-en-regulator { - regulator-boot-on; - gpio = <0xfe 0x07 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_sdcard_pwr_en"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4a5>; - }; - - rkcif-mipi-lvds1-sditf-vir1 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x53>; - phandle = <0x230>; - }; - - qos@fdf63000 { - compatible = "syscon"; - reg = <0x00 0xfdf63000 0x00 0x20>; - phandle = <0x8c>; - }; - - phy@fee00000 { - rockchip,pipe-grf = <0x76>; - clock-names = "refclk\0apbclk\0phpclk"; - assigned-clocks = <0x02 0x2bd>; - assigned-clock-rates = <0x5f5e100>; - resets = <0x02 0x20005 0x02 0x4d6>; - clocks = <0x02 0x2bd 0x02 0x185 0x02 0x166>; - #phy-cells = <0x01>; - compatible = "rockchip,rk3588-naneng-combphy"; - status = "okay"; - rockchip,pipe-phy-grf = <0x194>; - reg = <0x00 0xfee00000 0x00 0x100>; - phandle = <0x108>; - reset-names = "combphy-apb\0combphy"; - }; - - can@fea50000 { - pinctrl-names = "default"; - pinctrl-0 = <0x145>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x02 0xb9 0x02 0xb8>; - interrupts = <0x00 0x155 0x04>; - clocks = <0x02 0x70 0x02 0x6f>; - compatible = "rockchip,can-2.0"; - status = "disabled"; - tx-fifo-depth = <0x01>; - rx-fifo-depth = <0x06>; - reg = <0x00 0xfea50000 0x00 0x1000>; - phandle = <0x2a0>; - reset-names = "can\0can-apb"; - }; - - pdm@fe4b0000 { - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x139 0x13a>; - pinctrl-0 = <0x134 0x135 0x136 0x137>; - clock-names = "pdm_clk\0pdm_hclk"; - clocks = <0x02 0x29f 0x02 0x29e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-pdm"; - pinctrl-1 = <0x138>; - status = "disabled"; - reg = <0x00 0xfe4b0000 0x00 0x1000>; - phandle = <0x29a>; - dmas = <0x7c 0x04>; - }; - - rkisp-unite-mmu@fdcb7f00 { - power-domains = <0x60 0x1c>; - clock-names = "aclk0\0iface0\0aclk1\0iface1"; - interrupts = <0x00 0x84 0x04 0x00 0x88 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x120 0x02 0x121>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - rockchip,disable-mmu-reset; - status = "disabled"; - interrupt-names = "isp0_mmu\0isp1_mmu"; - reg = <0x00 0xfdcb7f00 0x00 0x100 0x00 0xfdcc7f00 0x00 0x100>; - phandle = <0xcf>; - }; - - syscon@fd5a6000 { - clocks = <0x72>; - compatible = "rockchip,rk3588-vo-grf\0syscon"; - reg = <0x00 0xfd5a6000 0x00 0x2000>; - phandle = <0xf5>; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x00>; - enable-method = "psci"; - clocks = <0x0e 0x00>; - cpu-idle-states = <0x10>; - operating-points-v2 = <0x0f>; - capacity-dmips-mhz = <0x212>; - - cpu-supply = <0x12>; - mem-supply = <0x12>; - dynamic-power-coefficient = <0x64>; - - i-cache-line-size = <0x40>; - i-cache-size = <0x8000>; - i-cache-sets = <0x80>; - - d-cache-line-size = <0x40>; - d-cache-size = <0x8000>; - d-cache-sets = <0x80>; - - next-level-cache = <0x11>; - #cooling-cells = <0x02>; - phandle = <0x06>; - }; - - l2-cache-l0 { - compatible = "cache"; - cache-size = <0x20000>; - cache-sets = <0x200>; - cache-line-size = <0x40>; - next-level-cache = <0x1e>; - phandle = <0x11>; - }; - - l3-cache { - compatible = "cache"; - cache-size = <0x300000>; - cache-sets = <0x1000>; - cache-line-size = <0x40>; - phandle = <0x1e>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - entry-latency-us = <0x64>; - exit-latency-us = <0x78>; - min-residency-us = <0x3e8>; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - phandle = <0x10>; - }; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <0x06>; - }; - }; - }; - }; - - vcc-hub3-reset-regulator { - gpio = <0x182 0x06 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_hub3_reset"; - compatible = "regulator-fixed"; - status = "disabled"; - phandle = <0x4a1>; - }; - - rkispp1-vir0 { - rockchip,hw = <0x5c>; - compatible = "rockchip,rk3588-rkispp-vir"; - status = "disabled"; - phandle = <0x244>; - }; - - saradc@fec10000 { - vref-supply = <0x177>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xbe>; - interrupts = <0x00 0x18e 0x04>; - clocks = <0x02 0x9d 0x02 0x9c>; - #io-channel-cells = <0x01>; - compatible = "rockchip,rk3588-saradc"; - status = "okay"; - reg = <0x00 0xfec10000 0x00 0x10000>; - phandle = <0x1d9>; - reset-names = "saradc-apb"; - }; - - rkisp0-vir0 { - rockchip,hw = <0x58>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x23b>; - }; - - __symbols__ { - i2s2m0_lrck = "/pinctrl/i2s2/i2s2m0-lrck"; - i2c3 = "/i2c@feab0000"; - scmi_shmem = "/sram@10f000/sram@0"; - rkispp0_vir0 = "/rkispp0-vir0"; - qos_jpeg_enc0 = "/qos@fdf66400"; - i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1"; - dp_altmode_mux = "/i2c@fec80000/fusb302@22/connector/ports/port@1/endpoint"; - pmic_pins = "/pinctrl/pmic/pmic-pins"; - usb_host1_ohci = "/usb@fc8c0000"; - pwm9 = "/pwm@febe0010"; - i2c6m4_xfer = "/pinctrl/i2c6/i2c6m4-xfer"; - leds_gpio = "/pinctrl/leds/leds-gpio"; - i2c3m3_xfer = "/pinctrl/i2c3/i2c3m3-xfer"; - qos_usb3_1 = "/qos@fdf3e000"; - hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4"; - i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer"; - gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus"; - pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0"; - hwlock = "/hwspinlock@fe5a0000"; - pcie3x2 = "/pcie@fe160000"; - i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk"; - mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk"; - mclkin_i2s0 = "/clocks/mclkin-i2s0"; - edp1_in_vp1 = "/edp@fded0000/ports/port@0/endpoint@1"; - rkvenc0_mmu = "/iommu@fdbdf000"; - pwm14 = "/pwm@febf0020"; - rk806_dvs2_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_rst"; - mipi2_csi2 = "/mipi2-csi2"; - can2m1_pins = "/pinctrl/can2/can2m1-pins"; - pcie2x1l1 = "/pcie@fe180000"; - hdmi0_in_vp2 = "/hdmi@fde80000/ports/port@0/endpoint@2"; - qos_rkvenc0_m2wo = "/qos@fdf60400"; - pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins"; - optee = "/firmware/optee"; - l2_cache_b2 = "/cpus/l2-cache-b2"; - pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins"; - vdpu = "/vdpu@fdb50400"; - i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo"; - usbdp_phy0_u3 = "/phy@fed80000/u3-port"; - thermal_zones = "/thermal-zones"; - hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl"; - hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda"; - uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn"; - spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0"; - pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller"; - spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx"; - venc_opp_info = "/otp@fecc0000/venc-opp-info@67"; - qos_iep = "/qos@fdf66000"; - pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3"; - spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1"; - uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer"; - vp1 = "/vop@fdd90000/ports/port@1"; - bigcore1_grf = "/syscon@fd592000"; - uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer"; - uart5m1_ctsn = "/pinctrl/uart5/uart5m1-ctsn"; - fspim1_pins = "/pinctrl/fspi/fspim1-pins"; - cpu_l1 = "/cpus/cpu@100"; - uart8 = "/serial@febb0000"; - rkisp1_vir3 = "/rkisp1-vir3"; - qos_vop_m1 = "/qos@fdf82200"; - pcie_clk2 = "/pcie-clk2"; - cluster2_opp_table = "/cluster2-opp-table"; - usb_grf = "/syscon@fd5ac000"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - jpege0_mmu = "/iommu@fdba0800"; - spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0"; - u2phy3 = "/syscon@fd5dc000/usb2-phy@c000"; - power_led = "/leds/power"; - aclk_usb = "/clocks/aclk_usb@fd7c08a8"; - csi2_dphy1 = "/csi2-dphy1"; - spi2 = "/spi@feb20000"; - uart2_rtsn = "/pinctrl/uart2/uart2-rtsn"; - spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1"; - pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15"; - vo1_grf = "/syscon@fd5a8000"; - pcie_essd = "/pcie-essd"; - i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer"; - gpio0 = "/pinctrl/gpio@fd8a0000"; - saradc = "/saradc@fec10000"; - i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3"; - i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer"; - csidphy0_out = "/csi2-dphy0/ports/port@1/endpoint@0"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - mclkout_i2s3 = "/clocks/mclkout-i2s3@fd58c318"; - xc7160_out0 = "/i2c@fec80000/XC7160b@1b/port/endpoint"; - rkcif_mipi_lvds1_sditf_vir1 = "/rkcif-mipi-lvds1-sditf-vir1"; - dsi1 = "/dsi@fde30000"; - venc_opp_table = "/venc-opp-table"; - qos_isp0_mwo = "/qos@fdf40500"; - pmu_pins = "/pinctrl/pmu/pmu-pins"; - gmac0_miim = "/pinctrl/gmac0/gmac0-miim"; - spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0"; - mipi_dcphy0 = "/mipi-dcphy-dummy"; - minidump_mem = "/reserved-memory/minidump-mem@c000000"; - avdd_1v2_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG3"; - pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins"; - route_edp1 = "/display-subsystem/route/route-edp1"; - hdmi1 = "/hdmi@fdea0000"; - crypto = "/crypto@fe370000"; - hdmi1_in_vp2 = "/hdmi@fdea0000/ports/port@0/endpoint@2"; - dfi = "/dfi@fe060000"; - can0m0_pins = "/pinctrl/can0/can0m0-pins"; - pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2"; - pinctrl = "/pinctrl"; - pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6"; - dp0m0_pins = "/pinctrl/dp0/dp0m0-pins"; - i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3"; - vcc_sata_pwr_en = "/vcc-sata-pwr-en-regulator"; - pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins"; - pcie30_avdd1v8 = "/pcie30-avdd1v8"; - usb2phy3_grf = "/syscon@fd5dc000"; - u2phy2_host = "/syscon@fd5d8000/usb2-phy@8000/host-port"; - hym8563_int = "/pinctrl/hym8563/hym8563-int"; - mailbox1 = "/mailbox@fec70000"; - pdm0m1_sdi3 = "/pinctrl/pdm0/pdm0m1-sdi3"; - combphy1_ps = "/phy@fee10000"; - hdptxphy0_grf = "/syscon@fd5e0000"; - sdei = "/firmware/sdei"; - vp0_out_dp1 = "/vop@fdd90000/ports/port@0/endpoint@3"; - uart5m2_xfer = "/pinctrl/uart5/uart5m2-xfer"; - uart9m2_ctsn = "/pinctrl/uart9/uart9m2-ctsn"; - uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer"; - dp0_out = "/dp@fde50000/ports/port@1/endpoint"; - uart6m1_ctsn = "/pinctrl/uart6/uart6m1-ctsn"; - route_rgb = "/display-subsystem/route/route-rgb"; - csidphy0_out1 = "/csi2-dphy0/ports/port@1/endpoint@0"; - i2c1 = "/i2c@fea90000"; - pinctrl_rk806 = "/spi@feb20000/rk806single@0/pinctrl_rk806"; - cpu_code = "/otp@fecc0000/cpu-code@2"; - pwm7 = "/pwm@febd0030"; - mipi5_csi2_hw = "/mipi5-csi2-hw@fdd60000"; - gpu_leakage = "/otp@fecc0000/gpu-leakage@1b"; - hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2"; - pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk"; - gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk"; - i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer"; - vdd_npu_s0 = "/i2c@fea90000/rk8602@42"; - i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer"; - i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pcie30x4m2_pins = "/pinctrl/pcie30x4/pcie30x4m2-pins"; - pwm12 = "/pwm@febf0000"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - i2s1_8ch = "/i2s@fe480000"; - pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins"; - uart4_ctsn = "/pinctrl/uart4/uart4-ctsn"; - vdd_cpu_big0_mem_s0 = "/i2c@fd880000/rk8602@42"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk"; - vp1_out_edp1 = "/vop@fdd90000/ports/port@1/endpoint@4"; - hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint@0"; - vcc_4g = "/vcc-4g-regulator"; - firefly_leds = "/leds"; - jpege3 = "/jpege-core@fdbac000"; - l2_cache_b0 = "/cpus/l2-cache-b0"; - pmu1_grf = "/syscon@fd58a000"; - aclk_rkvenc1_pre = "/clocks/aclk_rkvenc1_pre@fd7c08c0"; - can1m0_pins = "/pinctrl/can1/can1m0-pins"; - spi0m3_pins = "/pinctrl/spi0/spi0m3-pins"; - pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins"; - mipidphy0_in_ucam1 = "/csi2-dphy0/ports/port@0/endpoint@1"; - i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck"; - clk32k_out0 = "/pinctrl/clk32k/clk32k-out0"; - dp1m0_pins = "/pinctrl/dp1/dp1m0-pins"; - pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins"; - usbc0 = "/i2c@fec80000/fusb302@22"; - eth1_pins = "/pinctrl/eth1/eth1-pins"; - pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1"; - csi2_dphy0_hw = "/csi2-dphy0-hw@fedc0000"; - pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3"; - dsi0_in_vp3 = "/dsi@fde20000/ports/port@0/endpoint@1"; - hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec"; - usbc0_role_sw = "/i2c@fec80000/fusb302@22/ports/port@0/endpoint@0"; - uart6 = "/serial@feb90000"; - rkisp1_vir1 = "/rkisp1-vir1"; - sdhci = "/mmc@fe2e0000"; - uart6m2_xfer = "/pinctrl/uart6/uart6m2-xfer"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - rkcif_mipi_lvds_sditf_vir3 = "/rkcif-mipi-lvds-sditf-vir3"; - pcfg_pull_none_drv_level_0_smt = "/pinctrl/pcfg-pull-none-drv-level-0-smt"; - uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer"; - uart7m1_ctsn = "/pinctrl/uart7/uart7m1-ctsn"; - uart0m0_xfer = "/pinctrl/uart0/uart0m0-xfer"; - rgb_in_vp3 = "/syscon@fd58c000/rgb/ports/port@0/endpoint@2"; - rkcif_mipi_lvds5_sditf_vir2 = "/rkcif-mipi-lvds5-sditf-vir2"; - u2phy1 = "/syscon@fd5d4000/usb2-phy@4000"; - i2s5_8ch = "/i2s@fddf0000"; - i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo"; - gpu = "/gpu@fb000000"; - spi0 = "/spi@feb00000"; - iep = "/iep@fdbb0000"; - pcfg_pull_up_drv_level_13 = "/pinctrl/pcfg-pull-up-drv-level-13"; - spdif_tx5 = "/spdif-tx@fddb8000"; - hdptxphy_hdmi_clk1 = "/hdmiphy@fed70000/clk-port"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1"; - rk806_dvs3_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_null"; - gmac1_ppsclk = "/pinctrl/gmac1/gmac1-ppsclk"; - usb_host0_ohci = "/usb@fc840000"; - mclkout_i2s1 = "/clocks/mclkout-i2s1@fd58c318"; - i2c6m3_xfer = "/pinctrl/i2c6/i2c6m3-xfer"; - i2c3m2_xfer = "/pinctrl/i2c3/i2c3m2-xfer"; - vop_opp_info = "/otp@fecc0000/vop-opp-info@61"; - cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16"; - i2c0m1_xfer = "/pinctrl/i2c0/i2c0m1-xfer"; - pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins"; - mipidcphy0_grf = "/syscon@fd5e8000"; - vdd_cpu_big1_mem_s0 = "/i2c@fd880000/rk8603@43"; - pcie30phy = "/phy@fee80000"; - dmc = "/dmc"; - i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk"; - mipidcphy1 = "/phy@fedb0000"; - dp1_sound = "/dp1-sound"; - hdmi1_in_vp0 = "/hdmi@fdea0000/ports/port@0/endpoint@0"; - scmi = "/firmware/scmi"; - pcfg_pull_up_drv_level_0 = "/pinctrl/pcfg-pull-up-drv-level-0"; - gmac1_clkinout = "/pinctrl/gmac1/gmac1-clkinout"; - pcfg_pull_down_drv_level_4 = "/pinctrl/pcfg-pull-down-drv-level-4"; - i2s0_sdo1 = "/pinctrl/i2s0/i2s0-sdo1"; - l3_cache = "/cpus/l3-cache"; - i2s3_idle = "/pinctrl/i2s3/i2s3-idle"; - pcfg_pull_none_drv_level_4_smt = "/pinctrl/pcfg-pull-none-drv-level-4-smt"; - litcpu_pins = "/pinctrl/litcpu/litcpu-pins"; - mipi1_csi2 = "/mipi1-csi2"; - can2m0_pins = "/pinctrl/can2/can2m0-pins"; - pwm6m2_pins = "/pinctrl/pwm6/pwm6m2-pins"; - usbdp_phy0 = "/phy@fed80000"; - pdm0m1_sdi1 = "/pinctrl/pdm0/pdm0m1-sdi1"; - pwm3m1_pins = "/pinctrl/pwm3/pwm3m1-pins"; - vdd_log_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG3"; - i2s9_8ch = "/i2s@fddfc000"; - pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins"; - vcc_hub3_reset = "/vcc-hub3-reset-regulator"; - dsi1_in_vp3 = "/dsi@fde30000/ports/port@0/endpoint@1"; - otp_cpu_version = "/otp@fecc0000/cpu-version@1c"; - pcie2x1l0_intc = "/pcie@fe170000/legacy-interrupt-controller"; - spdif0m1_tx = "/pinctrl/spdif0/spdif0m1-tx"; - pcfg_pull_down_drv_level_15 = "/pinctrl/pcfg-pull-down-drv-level-15"; - XC7160 = "/i2c@fec80000/XC7160b@1b"; - rkcif_mipi_lvds4_sditf_vir3 = "/rkcif-mipi-lvds4-sditf-vir3"; - uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer"; - uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer"; - hdmim1_tx1_scl = "/pinctrl/hdmi/hdmim1-tx1-scl"; - hdmim1_tx1_sda = "/pinctrl/hdmi/hdmim1-tx1-sda"; - uart8m1_ctsn = "/pinctrl/uart8/uart8m1-ctsn"; - i2s2_2ch = "/i2s@fe490000"; - pwm5 = "/pwm@febd0010"; - uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer"; - uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn"; - fspim0_cs1 = "/pinctrl/fspi/fspim0-cs1"; - fspim0_pins = "/pinctrl/fspi/fspim0-pins"; - rkisp0_vir3 = "/rkisp0-vir3"; - l2_cache_l3 = "/cpus/l2-cache-l3"; - rk806_dvs3_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_dvs"; - hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0"; - hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd"; - vp1_out_dp0 = "/vop@fdd90000/ports/port@1/endpoint@0"; - qos_isp0_mro = "/qos@fdf40400"; - spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1"; - vdd_gpu_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - tsadc_shut = "/pinctrl/tsadc/tsadc-shut"; - pwm10 = "/pwm@febe0020"; - i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer"; - rktimer = "/timer@feae0000"; - cpub0_leakage = "/otp@fecc0000/cpub0-leakage@17"; - i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer"; - hclk_rkvdec1_pre = "/clocks/hclk_rkvdec1_pre@fd7c08a4"; - pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins"; - jpege1 = "/jpege-core@fdba4000"; - pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14"; - i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer"; - rkcif_dvp_sditf = "/rkcif-dvp-sditf"; - rkcif_mipi_lvds4_sditf = "/rkcif-mipi-lvds4-sditf"; - vp2_out_dp1 = "/vop@fdd90000/ports/port@2/endpoint@5"; - vp2_out_dsi0 = "/vop@fdd90000/ports/port@2/endpoint@3"; - its1 = "/interrupt-controller@fe600000/msi-controller@fe660000"; - cpu_b3 = "/cpus/cpu@700"; - vcc_hub_reset = "/vcc-hub-reset-regulator"; - spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1"; - vdd_npu_mem_s0 = "/i2c@fea90000/rk8602@42"; - pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins"; - pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1"; - vbus5v0_typec_pwr_en = "/vbus5v0-typec-pwr-en-regulator"; - pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins"; - dmc_opp_table = "/dmc-opp-table"; - pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn"; - uart4 = "/serial@feb70000"; - pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins"; - spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0"; - pldo6_s3 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG6"; - mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk"; - mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk"; - rkcif_mipi_lvds_sditf_vir1 = "/rkcif-mipi-lvds-sditf-vir1"; - pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9"; - dmac2 = "/dma-controller@fed10000"; - pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3"; - qos_gpu_m2 = "/qos@fdf35400"; - i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3"; - cluster0_opp_table = "/cluster0-opp-table"; - spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1"; - otp_id = "/otp@fecc0000/id@7"; - uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer"; - uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn"; - qos_rga3_0 = "/qos@fdf67000"; - usbdp_phy0_dp = "/phy@fed80000/dp-port"; - uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer"; - uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn"; - npu_pins = "/pinctrl/npu/npu-pins"; - pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11"; - spdif_tx3 = "/spdif-tx@fdde0000"; - rkispp0 = "/rkispp@fdcd0000"; - xin32k = "/clocks/xin32k"; - vcc_1v8_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG10"; - qos_usb2host_1 = "/qos@fdf3e600"; - bt_sco = "/bt-sco"; - pcfg_output_high_pull_none = "/pinctrl/pcfg-output-high-pull-none"; - adc_keys = "/adc-keys"; - rkcif_mipi_lvds4 = "/rkcif-mipi-lvds4"; - i2c8 = "/i2c@feca0000"; - dp0 = "/dp@fde50000"; - mipi_te1 = "/pinctrl/mipi/mipi-te1"; - i2c8m3_xfer = "/pinctrl/i2c8/i2c8m3-xfer"; - i2c5m2_xfer = "/pinctrl/i2c5/i2c5m2-xfer"; - pcie30x2_button_rstn = "/pinctrl/pcie30x2/pcie30x2-button-rstn"; - syssram = "/sram@ff001000"; - pcfg_pull_down_drv_level_2 = "/pinctrl/pcfg-pull-down-drv-level-2"; - qos_hdmirx = "/qos@fdf81200"; - i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer"; - pcie30x4m1_pins = "/pinctrl/pcie30x4/pcie30x4m1-pins"; - vdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG5"; - hw_decompress = "/decompress@fea80000"; - pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins"; - mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk"; - gmac1_txer = "/pinctrl/gmac1/gmac1-txer"; - uart3_ctsn = "/pinctrl/uart3/uart3-ctsn"; - vcc_sdcard_pwr_en = "/vcc-sdcard-pwr-en-regulator"; - mipi0_csi2_hw = "/mipi0-csi2-hw@fdd10000"; - rkvenc1_mmu = "/iommu@fdbef000"; - edp0 = "/edp@fdec0000"; - rkvenc_ccu = "/rkvenc-ccu"; - rk806_dvs3_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_rst"; - power = "/power-management@fd8d8000/power-controller"; - vad = "/vad@fe4d0000"; - spi3m3_pins = "/pinctrl/spi3/spi3m3-pins"; - pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins"; - spi0m2_pins = "/pinctrl/spi0/spi0m2-pins"; - pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins"; - vcc_3v3_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG4"; - aclk_isp1_pre = "/clocks/aclk_isp1_pre@fd7c0868"; - pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins"; - i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2"; - pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13"; - eth0_pins = "/pinctrl/eth0/eth0-pins"; - rkcif_mipi_lvds4_sditf_vir1 = "/rkcif-mipi-lvds4-sditf-vir1"; - pwm3 = "/pwm@fd8b0030"; - pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3"; - rkcif_mmu = "/iommu@fdce0800"; - usbc0_int = "/pinctrl/usb-typec/usbc0-int"; - gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2"; - sata2 = "/sata@fe230000"; - uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer"; - dp0_in_vp2 = "/dp@fde50000/ports/port@0/endpoint@2"; - hdmiin_sound = "/hdmiin-sound"; - rkisp0_vir1 = "/rkisp0-vir1"; - uart6_gpios = "/pinctrl/wireless-bluetooth/uart6-gpios"; - spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1"; - l2_cache_l1 = "/cpus/l2-cache-l1"; - pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8"; - uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer"; - pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins"; - vp2_out_hdmi0 = "/vop@fdd90000/ports/port@2/endpoint@2"; - qos_hdcp1 = "/qos@fdf81000"; - scmi_reset = "/firmware/scmi/protocol@16"; - vdd_cpu_lit_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - i2s0_mclk = "/pinctrl/i2s0/i2s0-mclk"; - uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer"; - uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn"; - usbhost_dwc3_0 = "/usbhost3_0/usb@fcd00000"; - hdmim0_rx_hpdin = "/pinctrl/hdmi/hdmim0-rx-hpdin"; - edp0_out = "/edp@fdec0000/ports/port@1/endpoint"; - rkisp0 = "/rkisp@fdcb0000"; - dsu_grf = "/syscon@fd598000"; - vcc_fan_pwr_en = "/vcc-fan-pwr-en-regulator"; - gmac1_rx_bus2 = "/pinctrl/gmac1/gmac1-rx-bus2"; - uart1m2_rtsn = "/pinctrl/uart1/uart1m2-rtsn"; - csi2_dcphy0 = "/csi2-dcphy0"; - usb2phy0_grf = "/syscon@fd5d0000"; - scmi_clk = "/firmware/scmi/protocol@14"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - jpege1_mmu = "/iommu@fdba4800"; - qos_rkvenc1_m1ro = "/qos@fdf61200"; - spi2m2_cs0 = "/pinctrl/spi2/spi2m2-cs0"; - vcc5v0_host = "/vcc5v0-host"; - cru = "/clock-controller@fd7c0000"; - hdmim0_tx0_cec = "/pinctrl/hdmi/hdmim0-tx0-cec"; - pcfg_pull_none_drv_level_12 = "/pinctrl/pcfg-pull-none-drv-level-12"; - rk806_dvs2_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_null"; - cpub01_opp_info = "/otp@fecc0000/cpub01-opp-info@43"; - i2s3_sdi = "/pinctrl/i2s3/i2s3-sdi"; - aclk_rkvdec0_pre = "/clocks/aclk_rkvdec0_pre@fd7c08a0"; - cpu_b1 = "/cpus/cpu@500"; - i2c6m2_xfer = "/pinctrl/i2c6/i2c6m2-xfer"; - rknpu_mmu = "/iommu@fdab9000"; - rkcif_mipi_lvds_sditf = "/rkcif-mipi-lvds-sditf"; - i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer"; - i2c0m0_xfer = "/pinctrl/i2c0/i2c0m0-xfer"; - pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins"; - qos_isp1_mwo = "/qos@fdf41000"; - mipi2_csi2_output1 = "/mipi2-csi2/ports/port@1/endpoint@0"; - gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; - vcc5v0_usbdcin = "/vcc5v0-usbdcin"; - spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0"; - reboot_mode = "/syscon@fd588000/reboot-mode"; - rga3_0_mmu = "/iommu@fdb60f00"; - uart2 = "/serial@feb50000"; - imx415_out0 = "/i2c@fec80000/imx415@37/port/endpoint"; - rkcif_mipi_lvds3_sditf_vir2 = "/rkcif-mipi-lvds3-sditf-vir2"; - pwm9m2_pins = "/pinctrl/pwm9/pwm9m2-pins"; - fec0_mmu = "/iommu@fdcd0f00"; - mipi0_csi2 = "/mipi0-csi2"; - spi1m2_pins = "/pinctrl/spi1/spi1m2-pins"; - pcfg_pull_up_drv_level_7 = "/pinctrl/pcfg-pull-up-drv-level-7"; - pwm6m1_pins = "/pinctrl/pwm6/pwm6m1-pins"; - tsadc_shut_org = "/pinctrl/tsadc/tsadc-shut-org"; - qos_rkvdec1 = "/qos@fdf63000"; - dmac0 = "/dma-controller@fea10000"; - vp2_out_edp1 = "/vop@fdd90000/ports/port@2/endpoint@6"; - pdm0m0_sdi1 = "/pinctrl/pdm0/pdm0m0-sdi1"; - qos_gpu_m0 = "/qos@fdf35000"; - pwm3m0_pins = "/pinctrl/pwm3/pwm3m0-pins"; - i2s0_sdi1 = "/pinctrl/i2s0/i2s0-sdi1"; - qos_av1 = "/qos@fdf64000"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - spdif_tx1 = "/spdif-tx@fe4f0000"; - hdptxphy1_grf = "/syscon@fd5e4000"; - spi4m0_cs0 = "/pinctrl/spi4/spi4m0-cs0"; - dp1_in_vp2 = "/dp@fde60000/ports/port@0/endpoint@2"; - jpegd_mmu = "/iommu@fdb90480"; - sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; - uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer"; - vp1_out_hdmi1 = "/vop@fdd90000/ports/port@1/endpoint@5"; - dp1_out = "/dp@fde60000/ports/port@1/endpoint"; - otp = "/otp@fecc0000"; - uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer"; - uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn"; - hdcp1 = "/hdcp@fde70000"; - rkcif_mipi_lvds2 = "/rkcif-mipi-lvds2"; - i2c6 = "/i2c@fec80000"; - qos_jpeg_enc3 = "/qos@fdf66a00"; - i2s2m1_idle = "/pinctrl/i2s2/i2s2m1-idle"; - refclk_pins = "/pinctrl/refclk/refclk-pins"; - pcie3x4_intc = "/pcie@fe150000/legacy-interrupt-controller"; - hdptxphy_hdmi1 = "/hdmiphy@fed70000"; - mipi2_lvds2_sditf = "/rkcif-mipi-lvds2-sditf/port/endpoint"; - pdm1 = "/pdm@fe4c0000"; - vdd_cpu_lit_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG2"; - pdm0m1_clk = "/pinctrl/pdm0/pdm0m1-clk"; - pcfg_pull_down_drv_level_0 = "/pinctrl/pcfg-pull-down-drv-level-0"; - qos_vicap_m0 = "/qos@fdf40600"; - gic = "/interrupt-controller@fe600000"; - vdd_cpu_big1_s0 = "/i2c@fd880000/rk8603@43"; - uart0_rtsn = "/pinctrl/uart0/uart0-rtsn"; - i2c7m2_xfer = "/pinctrl/i2c7/i2c7m2-xfer"; - mclkin_i2s3 = "/clocks/mclkin-i2s3"; - hdmim0_tx0_scl = "/pinctrl/hdmi/hdmim0-tx0-scl"; - hdmim0_tx0_sda = "/pinctrl/hdmi/hdmim0-tx0-sda"; - i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer"; - spdif1m0_tx = "/pinctrl/spdif1/spdif1m0-tx"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - i2c1m0_xfer = "/pinctrl/i2c1/i2c1m0-xfer"; - rkcif_mipi_lvds2_sditf_vir3 = "/rkcif-mipi-lvds2-sditf-vir3"; - hdptxphy1 = "/phy@fed70000"; - route_dp1 = "/display-subsystem/route/route-dp1"; - hdmim0_tx0_hpd = "/pinctrl/hdmi/hdmim0-tx0-hpd"; - i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0"; - pdm1m0_clk = "/pinctrl/pdm1/pdm1m0-clk"; - pcfg_pull_down_drv_level_11 = "/pinctrl/pcfg-pull-down-drv-level-11"; - usbdrd3_1 = "/usbdrd3_1"; - spi2m2_pins = "/pinctrl/spi2/spi2m2-pins"; - pwm7m1_pins = "/pinctrl/pwm7/pwm7m1-pins"; - rkcif_mipi_lvds1_sditf = "/rkcif-mipi-lvds1-sditf"; - pwm1 = "/pwm@fd8b0010"; - pdm1m0_sdi1 = "/pinctrl/pdm1/pdm1m0-sdi1"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - pwm4m0_pins = "/pinctrl/pwm4/pwm4m0-pins"; - sata0 = "/sata@fe210000"; - dp0_in_vp0 = "/dp@fde50000/ports/port@0/endpoint@0"; - can2 = "/can@fea70000"; - pcfg_pull_none_drv_level_6 = "/pinctrl/pcfg-pull-none-drv-level-6"; - usbdrd_dwc3_0 = "/usbdrd3_0/usb@fc000000"; - rkvenc0 = "/rkvenc-core@fdbd0000"; - bt_reset_gpio = "/pinctrl/wireless-bluetooth/bt-reset-gpio"; - sata1m1_pins = "/pinctrl/sata1/sata1m1-pins"; - spll = "/clocks/spll"; - uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer"; - sata_pins = "/pinctrl/sata/sata-pins"; - pcfg_pull_none_drv_level_1_smt = "/pinctrl/pcfg-pull-none-drv-level-1-smt"; - qos_npu1 = "/qos@fdf70000"; - uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer"; - uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn"; - pwm10m2_pins = "/pinctrl/pwm10/pwm10m2-pins"; - rk806_dvs1_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_pwrdn"; - pipe_phy0_grf = "/syscon@fd5bc000"; - es8388 = "/i2c@fec80000/es8388@11"; - spdif_rx2 = "/spdif-rx@fde18000"; - usb_host1_ehci = "/usb@fc880000"; - xin24m = "/clocks/xin24m"; - pcie20x1_2_button_rstn = "/pinctrl/pcie20x1/pcie20x1-2-button-rstn"; - mipi2_csi2_hw = "/mipi2-csi2-hw@fdd30000"; - acdcdig_dsm = "/codec-digital@fe500000"; - vop_grf = "/syscon@fd5a4000"; - rk806_dvs1_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_slp"; - i2s6_8ch = "/i2s@fddf4000"; - i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo"; - pcie30x1_1_button_rstn = "/pinctrl/pcie30x1/pcie30x1-1-button-rstn"; - pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down"; - pcfg_pull_none_drv_level_10 = "/pinctrl/pcfg-pull-none-drv-level-10"; - pdm0m1_clk1 = "/pinctrl/pdm0/pdm0m1-clk1"; - mipidphy0_grf = "/syscon@fd5b4000"; - route_dsi1 = "/display-subsystem/route/route-dsi1"; - route_hdmi0 = "/display-subsystem/route/route-hdmi0"; - rkvdec_ccu = "/rkvdec-ccu@fdc30000"; - csi2_dphy4 = "/csi2-dphy4"; - gmac1_rgmii_bus = "/pinctrl/gmac1/gmac1-rgmii-bus"; - qos_sdio = "/qos@fdf39000"; - tsadc = "/tsadc@fec00000"; - pcfg_output_high_pull_up = "/pinctrl/pcfg-output-high-pull-up"; - hclk_usb = "/clocks/hclk_usb@fd7c08a8"; - avcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG1"; - edp0_in_vp2 = "/edp@fdec0000/ports/port@0/endpoint@2"; - mdio1 = "/ethernet@fe1c0000/mdio"; - gpio3 = "/pinctrl/gpio@fec40000"; - gpu_opp_table = "/gpu-opp-table"; - cif_mipi2_in0 = "/rkcif-mipi-lvds2/port/endpoint"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - i2c8m2_xfer = "/pinctrl/i2c8/i2c8m2-xfer"; - vdpu_mmu = "/iommu@fdb50800"; - i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer"; - combphy0_ps = "/phy@fee00000"; - rgb = "/syscon@fd58c000/rgb"; - hclk_vo1 = "/clocks/hclk_vo1@fd7c08ec"; - i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer"; - uart0 = "/serial@fd890000"; - mipidcphy1_grf = "/syscon@fd5ec000"; - pcie30x4m0_pins = "/pinctrl/pcie30x4/pcie30x4m0-pins"; - vdd_ddr_pll_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG2"; - gmac0_txer = "/pinctrl/gmac0/gmac0-txer"; - uart2_ctsn = "/pinctrl/uart2/uart2-ctsn"; - pcfg_pull_up_drv_level_5 = "/pinctrl/pcfg-pull-up-drv-level-5"; - pcfg_pull_down_drv_level_9 = "/pinctrl/pcfg-pull-down-drv-level-9"; - pcfg_pull_none_drv_level_5_smt = "/pinctrl/pcfg-pull-none-drv-level-5-smt"; - i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi"; - qos_rga2_mwo = "/qos@fdf66e00"; - spi3m2_pins = "/pinctrl/spi3/spi3m2-pins"; - pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins"; - dsi1_in = "/dsi@fde30000/ports/port@0"; - vp3_out_dsi0 = "/vop@fdd90000/ports/port@3/endpoint@0"; - pclk_vo0_grf = "/clocks/pclk_vo0_grf@fd7c08dc"; - spi0m1_pins = "/pinctrl/spi0/spi0m1-pins"; - pwm5m0_pins = "/pinctrl/pwm5/pwm5m0-pins"; - bt1120_pins = "/pinctrl/bt1120/bt1120-pins"; - dp1_in_vp0 = "/dp@fde60000/ports/port@0/endpoint@0"; - i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2"; - mipi2_csi2_input0 = "/mipi2-csi2/ports/port@0/endpoint@0"; - u2phy0_otg = "/syscon@fd5d0000/usb2-phy@0/otg-port"; - vp0_out_edp0 = "/vop@fdd90000/ports/port@0/endpoint@1"; - qos_fisheye0 = "/qos@fdf40000"; - i2c4 = "/i2c@feac0000"; - sata2m1_pins = "/pinctrl/sata2/sata2m1-pins"; - uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer"; - qos_jpeg_enc1 = "/qos@fdf66600"; - i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2"; - i2s3_2ch = "/i2s@fe4a0000"; - uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer"; - cpul_leakage = "/otp@fecc0000/cpul-leakage@19"; - pwm11m2_pins = "/pinctrl/pwm11/pwm11m2-pins"; - fspim1_cs1 = "/pinctrl/fspi/fspim1-cs1"; - vdd_vdenc_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - pdm1m1_clk1 = "/pinctrl/pdm1/pdm1m1-clk1"; - hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5"; - uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn"; - qos_isp1_mro = "/qos@fdf41100"; - ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins"; - spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1"; - qos_rkvenc0_m1ro = "/qos@fdf60200"; - qos_jpeg_dec = "/qos@fdf66200"; - mclkin_i2s1 = "/clocks/mclkin-i2s1"; - edp1_in_vp2 = "/edp@fded0000/ports/port@0/endpoint@2"; - pcie30_avdd0v75 = "/pcie30-avdd0v75"; - isp0_mmu = "/iommu@fdcb7f00"; - qos_npu0_mwr = "/qos@fdf72000"; - rkvdec0 = "/rkvdec-core@fdc38000"; - rkvdec0_mmu = "/iommu@fdc38700"; - rk806_dvs1_null = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_null"; - pwm15 = "/pwm@febf0030"; - vop_mmu = "/iommu@fdd97e00"; - rkcif_mipi_lvds2_sditf_vir1 = "/rkcif-mipi-lvds2-sditf-vir1"; - pcie2x1l2 = "/pcie@fe190000"; - i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer"; - package_serial_number_low = "/otp@fecc0000/package-serial-number-low@6"; - iep_mmu = "/iommu@fdbb0800"; - l2_cache_b3 = "/cpus/l2-cache-b3"; - i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer"; - vcc_1v1_nldo_s3 = "/vcc-1v1-nldo-s3"; - spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1"; - pdm0m1_idle = "/pinctrl/pdm0/pdm0m1-idle"; - can0 = "/can@fea50000"; - spi4m2_pins = "/pinctrl/spi4/spi4m2-pins"; - pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4"; - pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins"; - arm_pmu = "/arm-pmu"; - vp2 = "/vop@fdd90000/ports/port@2"; - rk806single = "/spi@feb20000/rk806single@0"; - spi1m1_pins = "/pinctrl/spi1/spi1m1-pins"; - pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins"; - rng = "/rng@fe378000"; - cpu_l2 = "/cpus/cpu@200"; - uart9 = "/serial@febc0000"; - spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0"; - rk806_dvs3_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_gpio"; - rkcif_mipi_lvds5_sditf = "/rkcif-mipi-lvds5-sditf"; - usbdpphy0_grf = "/syscon@fd5c8000"; - mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk"; - pcie_clk3 = "/pcie-clk3"; - mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk"; - vp0_out_hdmi0 = "/vop@fdd90000/ports/port@0/endpoint@2"; - rkcif = "/rkcif@fdce0000"; - gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk"; - wdt_en_base = "/pinctrl/wdt-pc9202/wdt-en-base"; - vp3_out_rgb = "/vop@fdd90000/ports/port@3/endpoint@2"; - spdif_rx0 = "/spdif-rx@fde08000"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - hdmim2_tx0_scl = "/pinctrl/hdmi/hdmim2-tx0-scl"; - hdmim2_tx0_sda = "/pinctrl/hdmi/hdmim2-tx0-sda"; - spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1"; - pwm15m3_pins = "/pinctrl/pwm15/pwm15m3-pins"; - sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; - uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer"; - csi2_dphy2 = "/csi2-dphy2"; - spi3 = "/spi@feb30000"; - edp0_in_vp0 = "/edp@fdec0000/ports/port@0/endpoint@0"; - gpio1 = "/pinctrl/gpio@fec20000"; - tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut"; - usbdp_phy0_dp_altmode_mux = "/phy@fed80000/port/endpoint@1"; - i2s2m0_idle = "/pinctrl/i2s2/i2s2m0-idle"; - spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0"; - rkcif_mipi_lvds1_sditf_vir2 = "/rkcif-mipi-lvds1-sditf-vir2"; - i2s3_sclk = "/pinctrl/i2s3/i2s3-sclk"; - hdmim1_rx_hpdin = "/pinctrl/hdmi/hdmim1-rx-hpdin"; - spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1"; - mipi_dcphy1 = "/mipi-dcphy-dummy"; - vcc5v0_sys = "/vcc5v0-sys"; - aclk_hdcp0_pre = "/clocks/aclk_hdcp0_pre@fd7c08dc"; - usb_con = "/i2c@fec80000/fusb302@22/connector"; - hdmirx_ctrler = "/hdmirx-controller@fdee0000"; - i2c7m1_xfer = "/pinctrl/i2c7/i2c7m1-xfer"; - pcfg_pull_up_drv_level_3 = "/pinctrl/pcfg-pull-up-drv-level-3"; - rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; - i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer"; - pcfg_pull_down_drv_level_7 = "/pinctrl/pcfg-pull-down-drv-level-7"; - spdif0m0_tx = "/pinctrl/spdif0/spdif0m0-tx"; - wdt = "/watchdog@feaf0000"; - vdd_0v85_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG4"; - cspmu = "/cspmu@fd10c000"; - av1d_mmu = "/iommu@fdca0000"; - mailbox2 = "/mailbox@fece0000"; - mipi4_csi2_hw = "/mipi4-csi2-hw@fdd50000"; - pdm1m1_idle = "/pinctrl/pdm1/pdm1m1-idle"; - rga3_core0 = "/rga@fdb60000"; - i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0"; - bigcore1_thermal = "/thermal-zones/bigcore1-thermal"; - pcfg_output_low_pull_up = "/pinctrl/pcfg-output-low-pull-up"; - spi2m1_pins = "/pinctrl/spi2/spi2m1-pins"; - pwm7m0_pins = "/pinctrl/pwm7/pwm7m0-pins"; - i2c2 = "/i2c@feaa0000"; - npu_grf = "/syscon@fd5a2000"; - i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0"; - mipi5_csi2 = "/mipi5-csi2"; - pwm8 = "/pwm@febe0000"; - log_leakage = "/otp@fecc0000/log-leakage@1a"; - cpub23_opp_info = "/otp@fecc0000/cpub23-opp-info@49"; - vdd_vdenc_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG4"; - rga2 = "/rga@fdb80000"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - qos_usb3_0 = "/qos@fdf3e200"; - sata1m0_pins = "/pinctrl/sata1/sata1m0-pins"; - uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer"; - pwm13m2_pins = "/pinctrl/pwm13/pwm13m2-pins"; - hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3"; - cam0_or_cam1_switch_pin = "/pinctrl/cam/cam0-or-cam1-switch-pin"; - mcum1_pins = "/pinctrl/mcu/mcum1-pins"; - pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins"; - edp1_out = "/edp@fded0000/ports/port@1/endpoint"; - hclk_sdio_pre = "/clocks/hclk_sdio_pre@fd7c092c"; - usb_host0_ehci = "/usb@fc800000"; - edp1_in_vp0 = "/edp@fded0000/ports/port@0/endpoint@0"; - gmac1 = "/ethernet@fe1c0000"; - i2s10_8ch = "/i2s@fde00000"; - hdmi1_in = "/hdmi@fdea0000/ports/port@0"; - usb2phy1_grf = "/syscon@fd5d4000"; - pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1"; - jpege2_mmu = "/iommu@fdba8800"; - pwm13 = "/pwm@febf0010"; - pcie2x1l0 = "/pcie@fe170000"; - hdmi0_in_vp1 = "/hdmi@fde80000/ports/port@0/endpoint@1"; - hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec"; - l2_cache_b1 = "/cpus/l2-cache-b1"; - cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8"; - qos_rga2_mro = "/qos@fdf66c00"; - aclk_rkvdec1_pre = "/clocks/aclk_rkvdec1_pre@fd7c08a4"; - i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer"; - vdd_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG5"; - hdmirx_det = "/pinctrl/hdmirx/hdmirx-det"; - pca9555 = "/i2c@feab0000/gpio@21"; - qos_sdmmc = "/qos@fdf3d800"; - clk32k_out1 = "/pinctrl/clk32k/clk32k-out1"; - i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer"; - cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk"; - rknpu = "/npu@fdab0000"; - pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2"; - spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0"; - vp0 = "/vop@fdd90000/ports/port@0"; - rga3_1_mmu = "/iommu@fdb70f00"; - jtagm2_pins = "/pinctrl/jtag/jtagm2-pins"; - cpu_l0 = "/cpus/cpu@0"; - uart7 = "/serial@feba0000"; - rkisp1_vir2 = "/rkisp1-vir2"; - fec1_mmu = "/iommu@fdcd8f00"; - qos_vop_m0 = "/qos@fdf82000"; - pcie_clk1 = "/pcie-clk1"; - gmac1_ptp_ref_clk = "/pinctrl/gmac1/gmac1-ptp-ref-clk"; - spi3m1_pins = "/pinctrl/spi3/spi3m1-pins"; - pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins"; - hdmi0_sound = "/hdmi0-sound"; - ioc = "/syscon@fd5f0000"; - spi0m0_pins = "/pinctrl/spi0/spi0m0-pins"; - avsd = "/avsd-plus@fdb51000"; - rkcif_mipi_lvds5_sditf_vir3 = "/rkcif-mipi-lvds5-sditf-vir3"; - u2phy2 = "/syscon@fd5d8000/usb2-phy@8000"; - sfc = "/spi@fe2b0000"; - csi2_dphy0 = "/csi2-dphy0"; - spi1 = "/spi@feb10000"; - spi4m1_cs0 = "/pinctrl/spi4/spi4m1-cs0"; - gpu_grf = "/syscon@fd5a0000"; - pcfg_pull_up_drv_level_14 = "/pinctrl/pcfg-pull-up-drv-level-14"; - wireless_bluetooth = "/wireless-bluetooth"; - pclk_av1_pre = "/clocks/pclk_av1_pre@fd7c0910"; - sata2m0_pins = "/pinctrl/sata2/sata2m0-pins"; - uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer"; - pwm14m2_pins = "/pinctrl/pwm14/pwm14m2-pins"; - i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2"; - pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins"; - bt_sound = "/bt-sound"; - qos_rkvenc1_m0ro = "/qos@fdf61000"; - mclkout_i2s2 = "/clocks/mclkout-i2s2@fd58c318"; - dsi0 = "/dsi@fde20000"; - pdm1m0_clk1 = "/pinctrl/pdm1/pdm1m0-clk1"; - uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn"; - ddrphych2_pins = "/pinctrl/ddrphych2/ddrphych2-pins"; - route_edp0 = "/display-subsystem/route/route-edp0"; - hdmi0 = "/hdmi@fde80000"; - es8388_sound = "/es8388-sound"; - hdmi1_in_vp1 = "/hdmi@fdea0000/ports/port@0/endpoint@1"; - pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1"; - pcfg_pull_down_drv_level_5 = "/pinctrl/pcfg-pull-down-drv-level-5"; - i2s0_sdo2 = "/pinctrl/i2s0/i2s0-sdo2"; - vop_out = "/vop@fdd90000/ports"; - vdd_0v75_s3 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG1"; - hdmim1_rx = "/pinctrl/hdmi/hdmim1-rx"; - pcfg_pull_down_smt = "/pinctrl/pcfg-pull-down-smt"; - hdmim0_tx1_scl = "/pinctrl/hdmi/hdmim0-tx1-scl"; - hdmim0_tx1_sda = "/pinctrl/hdmi/hdmim0-tx1-sda"; - cpul_opp_info = "/otp@fecc0000/cpul-opp-info@3d"; - clk32k_in = "/pinctrl/clk32k/clk32k-in"; - usbdp_phy1 = "/phy@fed90000"; - mailbox0 = "/mailbox@fec60000"; - i2c6m0_xfer = "/pinctrl/i2c6/i2c6m0-xfer"; - pdm0m1_sdi2 = "/pinctrl/pdm0/pdm0m1-sdi2"; - sdmmc = "/mmc@fe2c0000"; - hclk_nvm = "/clocks/hclk_nvm@fd7c087c"; - hdmim0_tx1_hpd = "/pinctrl/hdmi/hdmim0-tx1-hpd"; - vp0_out_dp0 = "/vop@fdd90000/ports/port@0/endpoint@0"; - vddq_ddr_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG9"; - vcc_3v3_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG8"; - gmac0_ppstring = "/pinctrl/gmac0/gmac0-ppstring"; - i2c0 = "/i2c@fd880000"; - pdm1m1_clk = "/pinctrl/pdm1/pdm1m1-clk"; - pdm0m0_idle = "/pinctrl/pdm0/pdm0m0-idle"; - soc_thermal = "/thermal-zones/soc-thermal"; - cluster1_opp_table = "/cluster1-opp-table"; - i2s0_idle = "/pinctrl/i2s0/i2s0-idle"; - spi4m1_pins = "/pinctrl/spi4/spi4m1-pins"; - npu_opp_info = "/otp@fecc0000/npu-opp-info@55"; - pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins"; - pwm6 = "/pwm@febd0020"; - spi1m0_pins = "/pinctrl/spi1/spi1m0-pins"; - hym8563 = "/i2c@fd880000/hym8563@51"; - i2s1m1_sclk = "/pinctrl/i2s1/i2s1m1-sclk"; - rk806_dvs2_gpio = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_gpio"; - hp_det = "/pinctrl/headphone/hp-det"; - hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1"; - vp1_out_dp1 = "/vop@fdd90000/ports/port@1/endpoint@3"; - qos_mcu_npu = "/qos@fdf72400"; - auddsm_pins = "/pinctrl/auddsm/auddsm-pins"; - i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck"; - pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt"; - pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins"; - pipe_phy1_grf = "/syscon@fd5c0000"; - pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins"; - pwm11 = "/pwm@febe0030"; - rkisp_unite = "/rkisp-unite@fdcb0000"; - rkcif_mipi_lvds2_sditf = "/rkcif-mipi-lvds2-sditf"; - vp1_out_edp0 = "/vop@fdd90000/ports/port@1/endpoint@1"; - hclk_isp1_pre = "/clocks/hclk_isp1_pre@fd7c0868"; - rk806_dvs2_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_slp"; - i2s7_8ch = "/i2s@fddf8000"; - uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn"; - mipidphy1_grf = "/syscon@fd5b5000"; - usbhost3_0 = "/usbhost3_0"; - jpege2 = "/jpege-core@fdba8000"; - pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15"; - pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller"; - vp2_out_dsi1 = "/vop@fdd90000/ports/port@2/endpoint@4"; - mipidphy0_in_ucam0 = "/csi2-dphy0/ports/port@0/endpoint@0"; - av1d = "/av1d@fdc70000"; - uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn"; - sdiom1_pins = "/pinctrl/sdio/sdiom1-pins"; - rockchip_suspend = "/rockchip-suspend"; - rk806_dvs2_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_pwrdn"; - pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0"; - npu_thermal = "/thermal-zones/npu-thermal"; - i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer"; - pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2"; - cpu_pins = "/pinctrl/cpu/cpu-pins"; - dsi0_in_vp2 = "/dsi@fde20000/ports/port@0/endpoint@0"; - bt_wake_gpio = "/pinctrl/wireless-bluetooth/bt-wake-gpio"; - uart5 = "/serial@feb80000"; - dwc3_0_role_switch = "/usbdrd3_0/usb@fc000000/port/endpoint@0"; - rkisp1_vir0 = "/rkisp1-vir0"; - fiq_debugger = "/fiq-debugger"; - usbdp_phy1_u3 = "/phy@fed90000/u3-port"; - spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1"; - sdio = "/mmc@fe2d0000"; - rkcif_mipi_lvds_sditf_vir2 = "/rkcif-mipi-lvds-sditf-vir2"; - spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx"; - qos_gpu_m3 = "/qos@fdf35600"; - pdm1m0_idle = "/pinctrl/pdm1/pdm1m0-idle"; - pcfg_pull_none_drv_level_6_smt = "/pinctrl/pcfg-pull-none-drv-level-6-smt"; - user_led = "/leds/user"; - rkcif_mipi_lvds5_sditf_vir1 = "/rkcif-mipi-lvds5-sditf-vir1"; - i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi"; - uart8_xfer = "/pinctrl/uart8/uart8-xfer"; - u2phy0 = "/syscon@fd5d0000/usb2-phy@0"; - pclk_vo1_grf = "/clocks/pclk_vo1_grf@fd7c08ec"; - vdd_gpu_mem_s0 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG1"; - spi2m0_pins = "/pinctrl/spi2/spi2m0-pins"; - qos_rga3_1 = "/qos@fdf36000"; - i2s2m1_sclk = "/pinctrl/i2s2/i2s2m1-sclk"; - pcfg_pull_up_drv_level_12 = "/pinctrl/pcfg-pull-up-drv-level-12"; - spdif_tx4 = "/spdif-tx@fdde8000"; - gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; - rkispp1 = "/rkispp@fdcd8000"; - hdmim2_tx1_cec = "/pinctrl/hdmi/hdmim2-tx1-cec"; - u2phy1_otg = "/syscon@fd5d4000/usb2-phy@4000/otg-port"; - hdptxphy_hdmi_clk0 = "/hdmiphy@fed60000/clk-port"; - i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0"; - mipi4_csi2 = "/mipi4-csi2"; - mclkout_i2s0 = "/clocks/mclkout-i2s0@fd58c318"; - vcc5v0_host3 = "/vcc5v0-host3"; - rkcif_mipi_lvds5 = "/rkcif-mipi-lvds5"; - vdd_cpu_big0_s0 = "/i2c@fd880000/rk8602@42"; - dp1 = "/dp@fde60000"; - emmc_data_strobe = "/pinctrl/emmc/emmc-data-strobe"; - pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins"; - vop_pins = "/pinctrl/vop/vop-pins"; - pcie20x1m1_pins = "/pinctrl/pcie20x1/pcie20x1m1-pins"; - fspim2_cs1 = "/pinctrl/fspi/fspim2-cs1"; - vcc_hub = "/vcc-hub-regulator"; - mcum0_pins = "/pinctrl/mcu/mcum0-pins"; - pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins"; - uart9m2_rtsn = "/pinctrl/uart9/uart9m2-rtsn"; - mipidcphy0 = "/phy@feda0000"; - uart6m1_rtsn = "/pinctrl/uart6/uart6m1-rtsn"; - vcc3v3_pcie30 = "/vcc3v3-pcie30"; - pcfg_pull_down_drv_level_3 = "/pinctrl/pcfg-pull-down-drv-level-3"; - mipim1_camera0_clk = "/pinctrl/mipi/mipim1-camera0-clk"; - i2s0_sdo0 = "/pinctrl/i2s0/i2s0-sdo0"; - vop = "/vop@fdd90000"; - gmac0_ptp_refclk = "/pinctrl/gmac0/gmac0-ptp-refclk"; - usbdp_phy0_orientation_switch = "/phy@fed80000/port/endpoint@0"; - vepu = "/vepu@fdb50000"; - cif_clk = "/pinctrl/cif/cif-clk"; - pcie30_phy_grf = "/syscon@fd5b8000"; - isp1_mmu = "/iommu@fdcc7f00"; - pdm0m1_sdi0 = "/pinctrl/pdm0/pdm0m1-sdi0"; - rkvdec1_mmu = "/iommu@fdc48700"; - edp1 = "/edp@fded0000"; - cam0_cam1_switch = "/cam0-cam1-switch"; - gmac1_ppstrig = "/pinctrl/gmac1/gmac1-ppstrig"; - i2c8m0_xfer = "/pinctrl/i2c8/i2c8m0-xfer"; - dsi1_in_vp2 = "/dsi@fde30000/ports/port@0/endpoint@0"; - hdmim2_rx_hpdin = "/pinctrl/hdmi/hdmim2-rx-hpdin"; - i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3"; - pcfg_pull_down_drv_level_14 = "/pinctrl/pcfg-pull-down-drv-level-14"; - gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2"; - rkcif_mipi_lvds4_sditf_vir2 = "/rkcif-mipi-lvds4-sditf-vir2"; - center_thermal = "/thermal-zones/center-thermal"; - uart0_ctsn = "/pinctrl/uart0/uart0-ctsn"; - uart4_rtsn = "/pinctrl/uart4/uart4-rtsn"; - pwm4 = "/pwm@febd0000"; - vdd2_ddr_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG6"; - jtagm1_pins = "/pinctrl/jtag/jtagm1-pins"; - rkisp0_vir2 = "/rkisp0-vir2"; - i2c1m4_xfer = "/pinctrl/i2c1/i2c1m4-xfer"; - l2_cache_l2 = "/cpus/l2-cache-l2"; - pcfg_pull_none_drv_level_9 = "/pinctrl/pcfg-pull-none-drv-level-9"; - qos_vdpu = "/qos@fdf67200"; - vp2_out_hdmi1 = "/vop@fdd90000/ports/port@2/endpoint@7"; - spi3m0_pins = "/pinctrl/spi3/spi3m0-pins"; - pcfg_output_low_pull_none = "/pinctrl/pcfg-output-low-pull-none"; - spi0m2_cs0 = "/pinctrl/spi0/spi0m2-cs0"; - rkisp1 = "/rkisp@fdcc0000"; - usbdpphy1_grf = "/syscon@fd5cc000"; - mipim1_camera4_clk = "/pinctrl/mipi/mipim1-camera4-clk"; - mipim0_camera2_clk = "/pinctrl/mipi/mipim0-camera2-clk"; - csi2_dcphy1 = "/csi2-dcphy1"; - hdmim2_tx1_scl = "/pinctrl/hdmi/hdmim2-tx1-scl"; - hdmim2_tx1_sda = "/pinctrl/hdmi/hdmim2-tx1-sda"; - spi2m2_cs1 = "/pinctrl/spi2/spi2m2-cs1"; - chosen = "/chosen"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - rk806_dvs1_rst = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs1_rst"; - mpp_srv = "/mpp-srv"; - hclk_rkvenc1_pre = "/clocks/hclk_rkvenc1_pre@fd7c08c0"; - dp0m2_pins = "/pinctrl/dp0/dp0m2-pins"; - debug = "/debug@fd104000"; - jpege0 = "/jpege-core@fdba0000"; - pcfg_pull_none_drv_level_13 = "/pinctrl/pcfg-pull-none-drv-level-13"; - pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins"; - pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins"; - vp2_out_dp0 = "/vop@fdd90000/ports/port@2/endpoint@0"; - qos_rkvenc0_m0ro = "/qos@fdf60000"; - its0 = "/interrupt-controller@fe600000/msi-controller@fe640000"; - cpu_b2 = "/cpus/cpu@600"; - uart7m1_rtsn = "/pinctrl/uart7/uart7m1-rtsn"; - usb_5v_ctrl = "/pinctrl/usb-typec/usb-5v-ctrl"; - tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func"; - spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - dmc_opp_info = "/otp@fecc0000/dmc-opp-info@5b"; - ddrphych1_pins = "/pinctrl/ddrphych1/ddrphych1-pins"; - dsi0_in = "/dsi@fde20000/ports/port@0"; - pdm1m1_sdi0 = "/pinctrl/pdm1/pdm1m1-sdi0"; - spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1"; - bigcore0_grf = "/syscon@fd590000"; - cpub1_leakage = "/otp@fecc0000/cpub1-leakage@18"; - uart3 = "/serial@feb60000"; - aclk_hdcp1_pre = "/clocks/aclk_hdcp1_pre@fd7c08ec"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - rkcif_mipi_lvds3_sditf_vir3 = "/rkcif-mipi-lvds3-sditf-vir3"; - codec_leakage = "/otp@fecc0000/codec-leakage@29"; - pcfg_pull_up_drv_level_8 = "/pinctrl/pcfg-pull-up-drv-level-8"; - dmac1 = "/dma-controller@fea30000"; - pdm0m0_sdi2 = "/pinctrl/pdm0/pdm0m0-sdi2"; - i2s1m1_lrck = "/pinctrl/i2s1/i2s1m1-lrck"; - qos_gpu_m1 = "/qos@fdf35200"; - i2s0_sdi2 = "/pinctrl/i2s0/i2s0-sdi2"; - spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0"; - gpu_opp_info = "/otp@fecc0000/gpu-opp-info@4f"; - csi2_dphy1_hw = "/csi2-dphy1-hw@fedc8000"; - pcfg_pull_up_drv_level_10 = "/pinctrl/pcfg-pull-up-drv-level-10"; - spdif_tx2 = "/spdif-tx@fddb0000"; - npu_opp_table = "/npu-opp-table"; - spi4m0_cs1 = "/pinctrl/spi4/spi4m0-cs1"; - vo0_grf = "/syscon@fd5a6000"; - i2c2m4_xfer = "/pinctrl/i2c2/i2c2m4-xfer"; - qos_usb2host_0 = "/qos@fdf3e400"; - spi4m0_pins = "/pinctrl/spi4/spi4m0-pins"; - gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; - rkcif_mipi_lvds3 = "/rkcif-mipi-lvds3"; - i2s1m0_sclk = "/pinctrl/i2s1/i2s1m0-sclk"; - i2c7 = "/i2c@fec90000"; - mipi2_csi2_output = "/mipi2-csi2/ports/port@1/endpoint@0"; - mipi_te0 = "/pinctrl/mipi/mipi-te0"; - sata_reset = "/pinctrl/sata/sata-reset"; - dp1m2_pins = "/pinctrl/dp1/dp1m2-pins"; - pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins"; - pcfg_pull_down_drv_level_1 = "/pinctrl/pcfg-pull-down-drv-level-1"; - pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins"; - qos_vicap_m1 = "/qos@fdf40800"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - uart8m1_rtsn = "/pinctrl/uart8/uart8m1-rtsn"; - usb2phy2_grf = "/syscon@fd5d8000"; - rkvdec1_sram = "/sram@ff001000/rkvdec-sram@78000"; - uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn"; - jpege3_mmu = "/iommu@fdbac800"; - vcc_2v0_pldo_s3 = "/spi@feb20000/rk806single@0/regulators/DCDC_REG7"; - i2s3_mclk = "/pinctrl/i2s3/i2s3-mclk"; - mclkout_i2s1m1 = "/clocks/mclkout-i2s1@fd58a000"; - spdif_tx1_dc = "/spdif-tx1-dc"; - uart0m2_xfer = "/pinctrl/uart0/uart0m2-xfer"; - wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq"; - i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1"; - uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn"; - pcfg_pull_down_drv_level_12 = "/pinctrl/pcfg-pull-down-drv-level-12"; - sdiom0_pins = "/pinctrl/sdio/sdiom0-pins"; - pcfg_pull_up_smt = "/pinctrl/pcfg-pull-up-smt"; - php_grf = "/syscon@fd5b0000"; - pwm2 = "/pwm@fd8b0020"; - pdm1m0_sdi2 = "/pinctrl/pdm1/pdm1m0-sdi2"; - i2s2m1_lrck = "/pinctrl/i2s2/i2s2m1-lrck"; - mipi1_csi2_hw = "/mipi1-csi2-hw@fdd20000"; - sata1 = "/sata@fe220000"; - rkispp1_vir0 = "/rkispp1-vir0"; - dp0_in_vp1 = "/dp@fde50000/ports/port@0/endpoint@1"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - rkisp0_vir0 = "/rkisp0-vir0"; - spi3m3_cs0 = "/pinctrl/spi3/spi3m3-cs0"; - specification_serial_number = "/otp@fecc0000/specification-serial-number@6"; - l2_cache_l0 = "/cpus/l2-cache-l0"; - pcfg_pull_none_drv_level_7 = "/pinctrl/pcfg-pull-none-drv-level-7"; - qos_hdcp0 = "/qos@fdf80000"; - qos_npu0_mro = "/qos@fdf72200"; - usbdrd_dwc3_1 = "/usbdrd3_1/usb@fc400000"; - rkvenc1 = "/rkvenc-core@fdbe0000"; - display_subsystem = "/display-subsystem"; - i2c3m4_xfer = "/pinctrl/i2c3/i2c3m4-xfer"; - pcie30x2m3_pins = "/pinctrl/pcie30x2/pcie30x2m3-pins"; - qos_npu2 = "/qos@fdf71000"; - i2s0_8ch = "/i2s@fe470000"; - i2s2m0_sclk = "/pinctrl/i2s2/i2s2m0-sclk"; - pmu = "/power-management@fd8d8000"; - gmac1_tx_bus2 = "/pinctrl/gmac1/gmac1-tx-bus2"; - pcfg_pull_none_drv_level_11 = "/pinctrl/pcfg-pull-none-drv-level-11"; - route_hdmi1 = "/display-subsystem/route/route-hdmi1"; - csi2_dphy5 = "/csi2-dphy5"; - spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0"; - mipi3_csi2 = "/mipi3-csi2"; - pmu0_grf = "/syscon@fd588000"; - fan = "/pwm-fan"; - cpu_b0 = "/cpus/cpu@400"; - vccio_sd_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG5"; - qos_rkvenc1_m2wo = "/qos@fdf61400"; - gpio4 = "/pinctrl/gpio@fec50000"; - hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec"; - pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins"; - aclk_vdpu_low_pre = "/clocks/aclk_vdpu_low_pre@fd7c08b0"; - mmu600_php = "/iommu@fcb00000"; - cif_mipi2_in1 = "/rkcif-mipi-lvds2/port/endpoint"; - pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins"; - pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins"; - pcie20x1m0_pins = "/pinctrl/pcie20x1/pcie20x1m0-pins"; - bt656_pins = "/pinctrl/bt656/bt656-pins"; - hdmi1_sound = "/hdmi1-sound"; - uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn"; - uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn"; - pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller"; - mod_sleep = "/mod-sleep-regulator"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec"; - uart1 = "/serial@feb40000"; - rkcif_mipi_lvds3_sditf_vir1 = "/rkcif-mipi-lvds3-sditf-vir1"; - pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6"; - qos_rkvdec0 = "/qos@fdf62000"; - vp2_out_edp0 = "/vop@fdd90000/ports/port@2/endpoint@1"; - uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer"; - pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0"; - fspim2_pins = "/pinctrl/fspi/fspim2-pins"; - i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0"; - gpu_pins = "/pinctrl/gpu/gpu-pins"; - imx415 = "/i2c@fec80000/imx415@37"; - vp3_out_dsi1 = "/vop@fdd90000/ports/port@3/endpoint@1"; - i2s4_8ch = "/i2s@fddc0000"; - ramoops = "/reserved-memory/ramoops@110000"; - dp0_sound = "/dp0-sound"; - spdif_tx0 = "/spdif-tx@fe4e0000"; - dp1_in_vp1 = "/dp@fde60000/ports/port@0/endpoint@1"; - i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3"; - mipi2_csi2_input1 = "/mipi2-csi2/ports/port@0/endpoint@0"; - vcc_1v8_s0 = "/spi@feb20000/rk806single@0/regulators/PLDO_REG2"; - vp1_out_hdmi0 = "/vop@fdd90000/ports/port@1/endpoint@2"; - vcc12v_dcin = "/vcc12v-dcin"; - vp0_out_edp1 = "/vop@fdd90000/ports/port@0/endpoint@4"; - uart3_rtsn = "/pinctrl/uart3/uart3-rtsn"; - gmac1_rgmii_clk = "/pinctrl/gmac1/gmac1-rgmii-clk"; - package_serial_number_high = "/otp@fecc0000/package-serial-number-high@5"; - hdcp0 = "/hdcp@fde40000"; - qos_fisheye1 = "/qos@fdf40200"; - rkcif_mipi_lvds1 = "/rkcif-mipi-lvds1"; - i2c5 = "/i2c@fead0000"; - jtagm0_pins = "/pinctrl/jtag/jtagm0-pins"; - i2c4m4_xfer = "/pinctrl/i2c4/i2c4m4-xfer"; - spdif_tx1_sound = "/spdif-tx1-sound"; - qos_jpeg_enc2 = "/qos@fdf66800"; - hdmi0_in = "/hdmi@fde80000/ports/port@0"; - i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3"; - i2c1m3_xfer = "/pinctrl/i2c1/i2c1m3-xfer"; - hdptxphy_hdmi0 = "/hdmiphy@fed60000"; - sdmmc_pwren = "/pinctrl/sdmmc/sdmmc-pwren"; - usbdp_phy1_dp = "/phy@fed90000/dp-port"; - npu_leakage = "/otp@fecc0000/npu-leakage@28"; - aclk_jpeg_decoder_pre = "/clocks/aclk_jpeg_decoder_pre@fd7c08b0"; - pdm0 = "/pdm@fe4b0000"; - gmac1_miim = "/pinctrl/gmac1/gmac1-miim"; - pcfg_output_high_pull_down = "/pinctrl/pcfg-output-high-pull-down"; - hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6"; - pcie3x4 = "/pcie@fe150000"; - can0m1_pins = "/pinctrl/can0/can0m1-pins"; - mclkin_i2s2 = "/clocks/mclkin-i2s2"; - jpege_ccu = "/jpege-ccu"; - pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt"; - hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec"; - pipe_phy2_grf = "/syscon@fd5c4000"; - dp0m1_pins = "/pinctrl/dp0/dp0m1-pins"; - rkvdec1 = "/rkvdec-core@fdc48000"; - pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins"; - pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins"; - little_core_thermal = "/thermal-zones/littlecore-thermal"; - rk806_dvs3_slp = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_slp"; - usb_5v = "/usb-5v"; - i2s8_8ch = "/i2s@fddc8000"; - drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000"; - rkcif_mipi_lvds2_sditf_vir2 = "/rkcif-mipi-lvds2-sditf-vir2"; - hdptxphy0 = "/phy@fed60000"; - pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn"; - u2phy3_host = "/syscon@fd5dc000/usb2-phy@c000/host-port"; - route_dp0 = "/display-subsystem/route/route-dp0"; - hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl"; - hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda"; - uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn"; - pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10"; - usbdrd3_0 = "/usbdrd3_0"; - ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins"; - bt_irq_gpio = "/pinctrl/wireless-bluetooth/bt-irq-gpio"; - pwm0 = "/pwm@fd8b0000"; - uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer"; - pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0"; - hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl"; - hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda"; - can1 = "/can@fea60000"; - rkvtunnel = "/rkvtunnel"; - pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5"; - rkcif_mipi_lvds3_sditf = "/rkcif-mipi-lvds3-sditf"; - combphy2_psu = "/phy@fee20000"; - vp3 = "/vop@fdd90000/ports/port@3"; - rk806_dvs2_dvs = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs2_dvs"; - mmu600_pcie = "/iommu@fc900000"; - hdmim1_tx0_hpd = "/pinctrl/hdmi/hdmim1-tx0-hpd"; - i2s1m0_lrck = "/pinctrl/i2s1/i2s1m0-lrck"; - cpu_l3 = "/cpus/cpu@300"; - spi0m1_cs1 = "/pinctrl/spi0/spi0m1-cs1"; - vp0_out_hdmi1 = "/vop@fdd90000/ports/port@0/endpoint@5"; - spdif_rx1 = "/spdif-rx@fde10000"; - gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout"; - rkcif_dvp = "/rkcif-dvp"; - i2c5m4_xfer = "/pinctrl/i2c5/i2c5m4-xfer"; - wireless_wlan = "/wireless-wlan"; - rkcif_mipi_lvds = "/rkcif-mipi-lvds"; - avdd_0v75_s0 = "/spi@feb20000/rk806single@0/regulators/NLDO_REG3"; - i2c2m3_xfer = "/pinctrl/i2c2/i2c2m3-xfer"; - pcie30x4m3_pins = "/pinctrl/pcie30x4/pcie30x4m3-pins"; - hclk_rkvdec0_pre = "/clocks/hclk_rkvdec0_pre@fd7c08a0"; - route_dsi0 = "/display-subsystem/route/route-dsi0"; - rk806_dvs3_pwrdn = "/spi@feb20000/rk806single@0/pinctrl_rk806/rk806_dvs3_pwrdn"; - csi2_dphy3 = "/csi2-dphy3"; - pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins"; - spi4 = "/spi@fecb0000"; - litcore_grf = "/syscon@fd594000"; - isp0_vir2 = "/rkisp0-vir2/port/endpoint@0"; - i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk"; - sys_grf = "/syscon@fd58c000"; - edp0_in_vp1 = "/edp@fdec0000/ports/port@0/endpoint@1"; - rkisp_unite_mmu = "/rkisp-unite-mmu@fdcb7f00"; - gpio2 = "/pinctrl/gpio@fec30000"; - spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1"; - aclk_av1_pre = "/clocks/aclk_av1_pre@fd7c0910"; - can1m1_pins = "/pinctrl/can1/can1m1-pins"; - rkcif_mipi_lvds1_sditf_vir3 = "/rkcif-mipi-lvds1-sditf-vir3"; - hdmim2_rx_cec = "/pinctrl/hdmi/hdmim2-rx-cec"; - mipi3_csi2_hw = "/mipi3-csi2-hw@fdd40000"; - dp1m1_pins = "/pinctrl/dp1/dp1m1-pins"; - pwm2m2_pins = "/pinctrl/pwm2/pwm2m2-pins"; - pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins"; - hclk_vo0 = "/clocks/hclk_vo0@fd7c08dc"; - bigcore0_thermal = "/thermal-zones/bigcore0-thermal"; - hdmim1_rx_scl = "/pinctrl/hdmi/hdmim1-rx-scl"; - hdmim1_rx_sda = "/pinctrl/hdmi/hdmim1-rx-sda"; - uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn"; - pcfg_pull_up_drv_level_4 = "/pinctrl/pcfg-pull-up-drv-level-4"; - mipim1_camera1_clk = "/pinctrl/mipi/mipim1-camera1-clk"; - rkvdec0_sram = "/sram@ff001000/rkvdec-sram@0"; - pcfg_pull_down_drv_level_8 = "/pinctrl/pcfg-pull-down-drv-level-8"; - gmac_uio1 = "/uio@fe1c0000"; - usbc0_orien_sw = "/i2c@fec80000/fusb302@22/connector/ports/port@0/endpoint"; - jpegd = "/jpegd@fdb90000"; - uart3m2_xfer = "/pinctrl/uart3/uart3m2-xfer"; - minidump_smem = "/reserved-memory/minidump-smem@1f0000"; - i2s0_sclk = "/pinctrl/i2s0/i2s0-sclk"; - uart0m1_xfer = "/pinctrl/uart0/uart0m1-xfer"; - rga3_core1 = "/rga@fdb70000"; - i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1"; - uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn"; - vcc5v0_usb = "/vcc5v0-usb"; - minidump = "/minidump"; - }; - - rkvdec-ccu@fdc30000 { - power-domains = <0x60 0x0e>; - rockchip,ccu-mode = <0x01>; - clock-names = "aclk_ccu"; - reg-names = "ccu"; - assigned-clocks = <0x02 0x18e>; - assigned-clock-rates = <0x23c34600>; - resets = <0x02 0x282>; - clocks = <0x02 0x18e>; - compatible = "rockchip,rkv-decoder-v2-ccu"; - status = "okay"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdc30000 0x00 0x100>; - phandle = <0xca>; - reset-names = "video_ccu"; - }; - - qos@fdf60000 { - compatible = "syscon"; - reg = <0x00 0xfdf60000 0x00 0x20>; - phandle = <0x8d>; - }; - - iommu@fdb50800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x76 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_vdpu_mmu"; - reg = <0x00 0xfdb50800 0x00 0x40>; - phandle = <0xb7>; - }; - - rga@fdb60000 { - power-domains = <0x60 0x16>; - iommus = <0xb9>; - clock-names = "aclk_rga3_0\0hclk_rga3_0\0clk_rga3_0"; - interrupts = <0x00 0x72 0x04>; - clocks = <0x02 0x1ba 0x02 0x1b9 0x02 0x1bb>; - compatible = "rockchip,rga3_core0"; - status = "okay"; - interrupt-names = "rga3_core0_irq"; - reg = <0x00 0xfdb60000 0x00 0x1000>; - phandle = <0x269>; - }; - - qos@fdf67200 { - compatible = "syscon"; - reg = <0x00 0xfdf67200 0x00 0x20>; - phandle = <0x28b>; - }; - - vepu@fdb50000 { - power-domains = <0x60 0x15>; - iommus = <0xb7>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1c0>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2c8 0x02 0x2c9>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x02 0x1c0 0x02 0x1c1>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x00>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-encoder-v2"; - rockchip,resetgroup-node = <0x00>; - status = "disabled"; - interrupt-names = "irq_vepu"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdb50000 0x00 0x400>; - phandle = <0x266>; - reset-names = "shared_video_a\0shared_video_h"; - }; - - mipi3-csi2 { - rockchip,hw = <0x47 0x48 0x49 0x4a 0x4b 0x4c>; - compatible = "rockchip,rk3588-mipi-csi2"; - status = "disabled"; - phandle = <0x227>; - }; - - hdmi0-sound { - rockchip,jack-det; - rockchip,cpu = <0x1d3>; - rockchip,codec = <0x1d4>; - rockchip,card-name = "rockchip-hdmi0"; - compatible = "rockchip,hdmi"; - status = "okay"; - phandle = <0x49b>; - rockchip,mclk-fs = <0x80>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - minidump-smem@1f0000 { - status = "disabled"; - reg = <0x00 0x1f0000 0x00 0x100>; - phandle = <0x1cf>; - no-map; - }; - - minidump-mem@c000000 { - status = "disabled"; - reg = <0x00 0xc000000 0x00 0x2000000>; - phandle = <0x1d0>; - no-map; - }; - - cma { - linux,cma-default; - compatible = "shared-dma-pool"; - size = <0x00 0x800000>; - reg = <0x00 0x10000000 0x00 0x10000000>; - reusable; - }; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0xedf00000 0x00 0x2e0000>; - phandle = <0x37>; - }; - - ramoops@110000 { - boot-log-count = <0x01>; - record-size = <0x14000>; - pmsg-size = <0x30000>; - compatible = "ramoops"; - console-size = <0x80000>; - reg = <0x00 0x110000 0x00 0xe0000>; - phandle = <0x493>; - boot-log-size = <0x8000>; - ftrace-size = <0x00>; - }; - - drm-cubic-lut@00000000 { - compatible = "rockchip,drm-cubic-lut"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x492>; - }; - }; - - pcie@fe160000 { - power-domains = <0x60 0x22>; - vpcie3v3-supply = <0x1ba>; - #address-cells = <0x03>; - rockchip,pipe-grf = <0x76>; - phy-names = "pcie-phy"; - bus-range = <0x10 0x1f>; - clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe"; - reg-names = "pcie-apb\0pcie-dbi"; - num-ob-windows = <0x10>; - resets = <0x02 0x20e 0x02 0x21d>; - interrupts = <0x00 0x102 0x04 0x00 0x101 0x04 0x00 0x100 0x04 0x00 0xff 0x04 0x00 0xfe 0x04>; - clocks = <0x02 0x14f 0x02 0x154 0x02 0x14a 0x02 0x159 0x02 0x15f 0x02 0x184>; - interrupt-map = <0x00 0x00 0x00 0x01 0x1b9 0x00 0x00 0x00 0x00 0x02 0x1b9 0x01 0x00 0x00 0x00 0x03 0x1b9 0x02 0x00 0x00 0x00 0x04 0x1b9 0x03>; - #size-cells = <0x02>; - max-link-speed = <0x03>; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - reset-gpios = <0x10d 0x08 0x00>; - num-lanes = <0x02>; - compatible = "rockchip,rk3588-pcie\0snps,dw-pcie"; - ranges = <0x800 0x00 0xf1000000 0x00 0xf1000000 0x00 0x100000 0x81000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x82000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0xc3000000 0x09 0x40000000 0x09 0x40000000 0x00 0x40000000>; - msi-map = <0x1000 0x1b6 0x1000 0x1000>; - #interrupt-cells = <0x01>; - status = "disabled"; - interrupt-names = "sys\0pmc\0msg\0legacy\0err"; - phys = <0x1b7>; - num-viewport = <0x08>; - reg = <0x00 0xfe160000 0x00 0x10000 0x0a 0x40400000 0x00 0x400000>; - linux,pci-domain = <0x01>; - phandle = <0x486>; - reset-names = "pcie\0periph"; - num-ib-windows = <0x10>; - - legacy-interrupt-controller { - #address-cells = <0x00>; - interrupts = <0x00 0xff 0x01>; - interrupt-parent = <0x01>; - #interrupt-cells = <0x01>; - phandle = <0x1b9>; - interrupt-controller; - }; - }; - - spdif-tx@fddb8000 { - power-domains = <0x60 0x19>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x20b>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc6 0x04>; - clocks = <0x02 0x20f 0x02 0x20a>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfddb8000 0x00 0x1000>; - phandle = <0x1e2>; - dmas = <0xf1 0x16>; - }; - - pvtm@fdb30000 { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-gpu-pvtm"; - reg = <0x00 0xfdb30000 0x00 0x100>; - - pvtm@4 { - clock-names = "clk"; - resets = <0x02 0x430 0x02 0x42f>; - clocks = <0x02 0x118>; - reg = <0x04>; - reset-names = "rts\0rst-p"; - }; - }; - - spdif-tx1-dc { - #sound-dai-cells = <0x00>; - compatible = "linux,spdif-dit"; - status = "disabled"; - phandle = <0x1d8>; - }; - - csi2-dphy0 { - rockchip,hw = <0x2d 0x2e>; - phy-names = "dcphy0\0dcphy1"; - compatible = "rockchip,rk3588-csi2-dphy"; - status = "okay"; - phys = <0x2f 0x30>; - firefly-compatible; - phandle = <0x20f>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x32>; - reg = <0x01>; - phandle = <0x184>; - }; - - endpoint@0 { - data-lanes = <0x01 0x02 0x03 0x04>; - remote-endpoint = <0x31>; - reg = <0x00>; - phandle = <0x183>; - }; - }; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@0 { - remote-endpoint = <0x33>; - reg = <0x00>; - phandle = <0x4d>; - }; - }; - }; - }; - - rkisp-unite@fdcb0000 { - power-domains = <0x60 0x1c>; - iommus = <0xcf>; - clock-names = "aclk_isp0\0hclk_isp0\0clk_isp_core0\0clk_isp_core_marvin0\0clk_isp_core_vicap0\0aclk_isp1\0hclk_isp1\0clk_isp_core1\0clk_isp_core_marvin1\0clk_isp_core_vicap1"; - interrupts = <0x00 0x87 0x04 0x00 0x89 0x04 0x00 0x8a 0x04>; - clocks = <0x02 0x1de 0x02 0x1df 0x02 0x1db 0x02 0x1dc 0x02 0x1dd 0x02 0x120 0x02 0x121 0x02 0x11d 0x02 0x11e 0x02 0x11f>; - compatible = "rockchip,rk3588-rkisp-unite"; - status = "disabled"; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - reg = <0x00 0xfdcb0000 0x00 0x10000 0x00 0xfdcc0000 0x00 0x10000>; - phandle = <0x277>; - }; - - sata@fe230000 { - phy-names = "sata-phy"; - clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; - interrupts = <0x00 0x113 0x04>; - clocks = <0x02 0x173 0x02 0x170 0x02 0x176 0x02 0x165 0x02 0x180>; - compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; - status = "disabled"; - interrupt-names = "hostc"; - phys = <0x70 0x01>; - reg = <0x00 0xfe230000 0x00 0x1000>; - phandle = <0x291>; - ports-implemented = <0x01>; - }; - - syscon@fd5a0000 { - compatible = "rockchip,rk3588-gpu-grf\0syscon"; - reg = <0x00 0xfd5a0000 0x00 0x100>; - phandle = <0x65>; - }; - - bt-sound { - simple-audio-card,name = "rockchip,bt"; - simple-audio-card,format = "dsp_a"; - simple-audio-card,bitclock-inversion = <0x00>; - compatible = "simple-audio-card"; - status = "disabled"; - phandle = <0x49a>; - simple-audio-card,mclk-fs = <0x100>; - - simple-audio-card,cpu { - sound-dai = <0x1d1>; - }; - - simple-audio-card,codec { - sound-dai = <0x1d2 0x01>; - }; - }; - - iommu@fdb90480 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x82 0x04>; - clocks = <0x02 0x1b4 0x02 0x1b5>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpegd_mmu"; - reg = <0x00 0xfdb90480 0x00 0x40>; - phandle = <0xbb>; - }; - - hdcp@fde70000 { - power-domains = <0x60 0x1a>; - clock-names = "aclk\0pclk\0hclk\0hclk_key\0aclk_trng\0pclk_trng"; - resets = <0x02 0x3c8 0x02 0x3c6 0x02 0x3c5 0x02 0x3c4 0x02 0x3ca>; - interrupts = <0x00 0xa0 0x04>; - clocks = <0x02 0x217 0x02 0x219 0x02 0x218 0x02 0x216 0x02 0x228 0x02 0x229>; - compatible = "rockchip,rk3588-hdcp"; - status = "disabled"; - reg = <0x00 0xfde70000 0x00 0x80>; - phandle = <0x287>; - reset-names = "hdcp\0h_hdcp\0a_hdcp\0hdcp_key\0trng"; - rockchip,vo-grf = <0xd8>; - }; - - spdif-tx@fe4f0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default"; - pinctrl-0 = <0x143>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x45>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xc2 0x04>; - clocks = <0x02 0x47 0x02 0x44>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdif\0rockchip,rk3568-spdif"; - status = "disabled"; - reg = <0x00 0xfe4f0000 0x00 0x1000>; - phandle = <0x1d7>; - dmas = <0xf1 0x05>; - }; - - rkcif-mipi-lvds-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x52>; - phandle = <0x22d>; - }; - - es8388-sound { - pinctrl-names = "default"; - rockchip,cpu = <0x1da>; - pinctrl-0 = <0x1dc>; - rockchip,codec = <0x1db>; - hp-det-gpio = <0x79 0x13 0x00>; - rockchip,card-name = "rockchip-es8388"; - rockchip,format = "i2s"; - rockchip,audio-routing = "Headphone\0LOUT1\0Headphone\0ROUT1\0Speaker\0LOUT2\0Speaker\0ROUT2\0Headphone\0Headphone Power\0Headphone\0Headphone Power\0LINPUT2\0Main Mic\0RINPUT2\0Main Mic\0LINPUT1\0Headset Mic\0RINPUT1\0Headset Mic"; - compatible = "firefly,multicodecs-card"; - linein-type = <0x01>; - status = "okay"; - phandle = <0x49f>; - hp-con-gpio = <0x182 0x0b 0x00>; - firefly,not-use-dapm; - rockchip,mclk-fs = <0x180>; - }; - - spi@feb30000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x15d 0x15e 0x15f>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x149 0x04>; - clocks = <0x02 0xa6 0x02 0xa1>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfeb30000 0x00 0x1000>; - phandle = <0x2c8>; - dmas = <0xf1 0x11 0xf1 0x12>; - }; - - phy@fee80000 { - rockchip,pipe-grf = <0x76>; - clock-names = "pclk"; - rockchip,pcie30-phymode = <0x01>; - resets = <0x02 0x2000a>; - clocks = <0x02 0x188>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-pcie3-phy"; - status = "okay"; - reg = <0x00 0xfee80000 0x00 0x20000>; - phandle = <0x1b7>; - reset-names = "phy"; - rockchip,phy-grf = <0x1cc>; - }; - - vcc12v-dcin { - regulator-max-microvolt = <0xb71b00>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0xb71b00>; - regulator-name = "vcc12v_dcin"; - compatible = "regulator-fixed"; - phandle = <0x1cd>; - }; - - qos@fdf61200 { - compatible = "syscon"; - reg = <0x00 0xfdf61200 0x00 0x20>; - phandle = <0x91>; - }; - - i2s@fde00000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x234>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x417>; - interrupts = <0x00 0xbe 0x04>; - clocks = <0x02 0x237 0x02 0x237 0x02 0x233>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfde00000 0x00 0x1000>; - phandle = <0x47e>; - dmas = <0xf2 0x18>; - reset-names = "rx-m"; - }; - - qos@fdf40800 { - compatible = "syscon"; - reg = <0x00 0xfdf40800 0x00 0x20>; - phandle = <0xa5>; - }; - - i2s@fddfc000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - assigned-clocks = <0x02 0x23f>; - assigned-clock-parents = <0x02 0x05>; - rockchip,capture-only; - resets = <0x02 0x413>; - interrupts = <0x00 0xbd 0x04>; - clocks = <0x02 0x242 0x02 0x242 0x02 0x23e>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s-tdm"; - status = "disabled"; - reg = <0x00 0xfddfc000 0x00 0x1000>; - phandle = <0x27f>; - dmas = <0xf2 0x17>; - reset-names = "rx-m"; - }; - - usbdrd3_0 { - #address-cells = <0x02>; - clock-names = "ref\0suspend\0bus"; - clocks = <0x02 0x1a3 0x02 0x1a2 0x02 0x1a1>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-dwc3\0rockchip,rk3399-dwc3"; - ranges; - status = "okay"; - phandle = <0x252>; - - usb@fc000000 { - power-domains = <0x60 0x1f>; - snps,dis-u1-entry-quirk; - snps,dis_enblslpm_quirk; - phy-names = "usb2-phy\0usb3-phy"; - snps,dis-u2-freeclk-exists-quirk; - usb-role-switch; - phy_type = "utmi_wide"; - quirk-skip-phy-init; - resets = <0x02 0x2a4>; - interrupts = <0x00 0xdc 0x04>; - snps,dis-u2-entry-quirk; - compatible = "snps,dwc3"; - snps,parkmode-disable-hs-quirk; - snps,dis-del-phy-power-chg-quirk; - status = "okay"; - snps,parkmode-disable-ss-quirk; - phys = <0x66 0x67>; - reg = <0x00 0xfc000000 0x00 0x400000>; - phandle = <0x253>; - dr_mode = "host"; - reset-names = "usb3-otg"; - snps,dis-tx-ipgap-linecheck-quirk; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - remote-endpoint = <0x68>; - reg = <0x00>; - phandle = <0x17d>; - }; - }; - }; - }; - - rkcif-mipi-lvds5-sditf-vir2 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a2>; - phandle = <0x478>; - }; - - rkcif-dvp-sditf { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x51>; - phandle = <0x22a>; - }; - - iommu@fdd97e00 { - rockchip,shootdown-entire; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x9c 0x04>; - clocks = <0x02 0x270 0x02 0x26f>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "vop_mmu"; - reg = <0x00 0xfdd97e00 0x00 0x100 0x00 0xfdd97f00 0x00 0x100>; - phandle = <0xd6>; - rockchip,disable-device-link-resume; - }; - - rkvtunnel { - compatible = "rockchip,video-tunnel"; - status = "disabled"; - phandle = <0x245>; - }; - - syscon@fd5e0000 { - compatible = "rockchip,rk3588-hdptxphy-grf\0syscon"; - reg = <0x00 0xfd5e0000 0x00 0x100>; - phandle = <0x18a>; - }; - - i2c@fead0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - pinctrl-0 = <0x14d>; - clock-names = "i2c\0pclk"; - resets = <0x02 0xb4 0x02 0xac>; - interrupts = <0x00 0x142 0x04>; - clocks = <0x02 0x91 0x02 0x89>; - #size-cells = <0x00>; - compatible = "rockchip,rk3588-i2c\0rockchip,rk3399-i2c"; - status = "disabled"; - reg = <0x00 0xfead0000 0x00 0x1000>; - phandle = <0x2a8>; - reset-names = "i2c\0apb"; - }; - - iommu@fdba4800 { - power-domains = <0x60 0x15>; - clock-names = "aclk\0iface"; - interrupts = <0x00 0x7b 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - #iommu-cells = <0x00>; - compatible = "rockchip,iommu-v2"; - status = "okay"; - interrupt-names = "irq_jpege1_mmu"; - reg = <0x00 0xfdba4800 0x00 0x40>; - phandle = <0xbe>; - }; - - spdif-rx@fde10000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x260>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3ff>; - interrupts = <0x00 0xc8 0x04>; - clocks = <0x02 0x260 0x02 0x25f>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde10000 0x00 0x1000>; - phandle = <0x47f>; - dmas = <0x7c 0x16>; - reset-names = "spdifrx-m"; - }; - - npu@fdab0000 { - power-domains = <0x60 0x09 0x60 0x0a 0x60 0x0b>; - iommus = <0xb2>; - clock-names = "clk_npu\0aclk0\0aclk1\0aclk2\0hclk0\0hclk1\0hclk2\0pclk"; - assigned-clocks = <0x0e 0x06>; - power-domain-names = "npu0\0npu1\0npu2"; - rknpu-supply = <0xb3>; - assigned-clock-rates = <0xbebc200>; - resets = <0x02 0x1e6 0x02 0x1b0 0x02 0x1c0 0x02 0x1e8 0x02 0x1b2 0x02 0x1c2>; - interrupts = <0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04>; - clocks = <0x0e 0x06 0x02 0x12d 0x02 0x122 0x02 0x124 0x02 0x12e 0x02 0x123 0x02 0x125 0x02 0x131>; - compatible = "rockchip,rk3588-rknpu"; - status = "okay"; - interrupt-names = "npu0_irq\0npu1_irq\0npu2_irq"; - mem-supply = <0xb3>; - reg = <0x00 0xfdab0000 0x00 0x10000 0x00 0xfdac0000 0x00 0x10000 0x00 0xfdad0000 0x00 0x10000>; - phandle = <0x265>; - reset-names = "srst_a0\0srst_a1\0srst_a2\0srst_h0\0srst_h1\0srst_h2"; - operating-points-v2 = <0xb1>; - }; - - hdmiphy@fed60000 { - clock-names = "ref\0apb"; - resets = <0x02 0x48e 0x02 0x485 0x02 0xc003b 0x02 0xc003c 0x02 0xc003d 0x02 0x48c 0x02 0x48d>; - clocks = <0x02 0x2b5 0x02 0x267>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-hdptx-phy-hdmi"; - status = "okay"; - rockchip,grf = <0x18a>; - reg = <0x00 0xfed60000 0x00 0x2000>; - phandle = <0xfd>; - reset-names = "phy\0apb\0init\0cmn\0lane\0ropll\0lcpll"; - - clk-port { - #clock-cells = <0x00>; - status = "okay"; - phandle = <0x35>; - }; - }; - - dmc-opp-table { - nvmem-cells = <0x44 0x45 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,leakage-voltage-sel = <0x01 0x1f 0x00 0x20 0x2c 0x01 0x2d 0x39 0x02 0x3a 0xfe 0x03>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - phandle = <0x41>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,supported-hw; - - opp-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xadf34 0xadf34 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xb1008 0xb1008 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb1008 0xb1008 0xb71b0>; - }; - - opp-j-m-1560000000 { - opp-microvolt = <0xc3500 0xc3500 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x5cfbb600>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-j-m-528000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0x06 0xffff>; - }; - - opp-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-1068000000 { - opp-microvolt = <0xb1008 0xb1008 0xd59f8 0xb40dc 0xb40dc 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xd59f8 0xadf34 0xadf34 0xb71b0>; - }; - - opp-j-m-2750000000 { - opp-microvolt = <0xd59f8 0xd59f8 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L2 = <0xcc77c 0xcc77c 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0xa3e9ab80>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L3 = <0xc96a8 0xc8320 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-microvolt-L1 = <0xcf850 0xcf850 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - }; - - opp-528000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xd59f8 0xb1008 0xb1008 0xb71b0>; - opp-microvolt-L2 = <0xa4cb8 0xa4cb8 0xd59f8 0xa7d8c 0xa7d8c 0xb71b0>; - opp-hz = <0x00 0x1f78a400>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L3 = <0xa4cb8 0xa4cb8 0xd59f8 0xa4cb8 0xa4cb8 0xb71b0>; - opp-microvolt-L1 = <0xa4cb8 0xa4cb8 0xd59f8 0xaae60 0xaae60 0xb71b0>; - }; - - opp-j-m-1068000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xd59f8 0xb71b0 0xb71b0 0xb71b0>; - opp-hz = <0x00 0x3fa86300>; - opp-supported-hw = <0x06 0xffff>; - }; - }; - - rkvenc-core@fdbe0000 { - power-domains = <0x60 0x11>; - iommus = <0xc5>; - rockchip,ccu = <0xc3>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - assigned-clocks = <0x02 0x1ca 0x02 0x1cb>; - rockchip,task-capacity = <0x08>; - rockchip,normal-rates = <0x1dcd6500 0x00 0x2faf0800>; - assigned-clock-rates = <0x1dcd6500 0x2faf0800>; - resets = <0x02 0x305 0x02 0x304 0x02 0x306>; - interrupts = <0x00 0x68 0x04>; - clocks = <0x02 0x1ca 0x02 0x1c9 0x02 0x1cb>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x07>; - compatible = "rockchip,rkv-encoder-v2-core"; - status = "okay"; - interrupt-names = "irq_rkvenc1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdbe0000 0x00 0x6000>; - phandle = <0x273>; - reset-names = "video_a\0video_h\0video_core"; - operating-points-v2 = <0xc4>; - }; - - debug@fd104000 { - compatible = "rockchip,debug"; - reg = <0x00 0xfd104000 0x00 0x1000 0x00 0xfd105000 0x00 0x1000 0x00 0xfd106000 0x00 0x1000 0x00 0xfd107000 0x00 0x1000 0x00 0xfd124000 0x00 0x1000 0x00 0xfd125000 0x00 0x1000 0x00 0xfd126000 0x00 0x1000 0x00 0xfd127000 0x00 0x1000>; - phandle = <0x48f>; - }; - - watchdog@feaf0000 { - clock-names = "tclk\0pclk"; - interrupts = <0x00 0x13b 0x04>; - clocks = <0x02 0x6c 0x02 0x6b>; - compatible = "snps,dw-wdt"; - status = "okay"; - reg = <0x00 0xfeaf0000 0x00 0x100>; - phandle = <0x2aa>; - }; - - syscon@fd5d8000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "rockchip,rk3588-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xfd5d8000 0x00 0x4000>; - phandle = <0x25d>; - - usb2-phy@8000 { - clock-output-names = "usb480m_phy2"; - clock-names = "phyclk"; - resets = <0x02 0xc0049 0x02 0x48a>; - interrupts = <0x00 0x187 0x04>; - clocks = <0x02 0x2b5>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-usb2phy"; - status = "okay"; - reg = <0x8000 0x10>; - phandle = <0x69>; - reset-names = "phy\0apb"; - - host-port { - phy-supply = <0x75>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x6c>; - }; - }; - }; - - cluster0-opp-table { - rockchip,pvtm-offset = <0x64>; - rockchip,pvtm-sample-time = <0x44c>; - rockchip,dsu-grf = <0x23>; - rockchip,pvtm-hw = <0x06>; - nvmem-cells = <0x1f 0x20 0x21>; - rockchip,low-temp = <0x2710>; - rockchip,pvtm-voltage-sel-hw = <0x00 0x555 0x00 0x556 0x56b 0x01 0x56c 0x581 0x02 0x582 0x597 0x03 0x598 0x5ad 0x04 0x5ae 0x5c3 0x05 0x5c4 0x270f 0x06>; - rockchip,pvtm-thermal-zone = "soc-thermal"; - rockchip,opp-shared-dsu; - rockchip,high-temp-max-freq = <0x188940>; - opp-shared; - rockchip,reboot-freq = <0x159b40>; - rockchip,pvtm-freq = <0x159b40>; - rockchip,pvtm-ref-temp = <0x19>; - low-volt-mem-read-margin = <0x04>; - volt-mem-read-margin = <0xd0bd8 0x01 0xbac48 0x02 0xa4cb8 0x03 0x78d98 0x04>; - compatible = "operating-points-v2"; - rockchip,low-temp-min-volt = <0xb71b0>; - rockchip,grf = <0x22>; - nvmem-cell-names = "leakage\0opp-info\0specification_serial_number"; - rockchip,pvtm-voltage-sel = <0x00 0x582 0x00 0x583 0x59a 0x01 0x59b 0x5b2 0x02 0x5b3 0x5ca 0x03 0x5cb 0x5e2 0x04 0x5e3 0x5fa 0x05 0x5fb 0x270f 0x06>; - phandle = <0x0f>; - rockchip,pvtm-temp-prop = <0xf4 0xf4>; - rockchip,temp-hysteresis = <0x1388>; - rockchip,high-temp = <0x14c08>; - rockchip,pvtm-pvtpll; - rockchip,supported-hw; - intermediate-threshold-freq = <0xf6180>; - rockchip,pvtm-volt = <0xb71b0>; - - opp-1200000000 { - opp-microvolt = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L6 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L4 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L2 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-microvolt-L3 = <0xa7d8c 0xa7d8c 0xe7ef0 0xa7d8c 0xa7d8c 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xaae60 0xaae60 0xe7ef0 0xaae60 0xaae60 0xe7ef0>; - }; - - opp-j-m-1416000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-microvolt-L2 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-microvolt-L0 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-supported-hw = <0x06 0xffff>; - opp-suspend; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - }; - - opp-1008000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1704000000 { - opp-microvolt = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - opp-microvolt-L6 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-microvolt-L4 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L2 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - opp-hz = <0x00 0x6590fa00>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L3 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - }; - - opp-j-m-1200000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x47868c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1008000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x3c14dc00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-816000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1800000000 { - opp-microvolt = <0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0 0xe7ef0>; - opp-microvolt-L6 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - opp-microvolt-L4 = <0xdbba0 0xdbba0 0xe7ef0 0xdbba0 0xdbba0 0xe7ef0>; - opp-microvolt-L2 = <0xe1d48 0xe1d48 0xe7ef0 0xe1d48 0xe1d48 0xe7ef0>; - opp-hz = <0x00 0x6b49d200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L3 = <0xdec74 0xdec74 0xe7ef0 0xdec74 0xdec74 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xe4e1c 0xe4e1c 0xe7ef0 0xe4e1c 0xe4e1c 0xe7ef0>; - }; - - opp-j-m-600000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1608000000 { - opp-microvolt = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - opp-microvolt-L6 = <0xc042c 0xc042c 0xe7ef0 0xc042c 0xc042c 0xe7ef0>; - opp-microvolt-L4 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L2 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xc3500 0xc3500 0xe7ef0 0xc3500 0xc3500 0xe7ef0>; - opp-microvolt-L3 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - }; - - opp-j-1296000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt-L0 = <0xbd358 0xbd358 0xe7ef0 0xbd358 0xbd358 0xe7ef0>; - opp-supported-hw = <0x04 0xffff>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - }; - - opp-j-m-408000000 { - opp-microvolt = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0x06 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-816000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x30a32c00>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-j-m-1608000000 { - opp-microvolt = <0xd8acc 0xd8acc 0xe7ef0 0xd8acc 0xd8acc 0xe7ef0>; - opp-microvolt-L6 = <0xc65d4 0xc65d4 0xe7ef0 0xc65d4 0xc65d4 0xe7ef0>; - opp-microvolt-L4 = <0xcc77c 0xcc77c 0xe7ef0 0xcc77c 0xcc77c 0xe7ef0>; - opp-microvolt-L2 = <0xd2924 0xd2924 0xe7ef0 0xd2924 0xd2924 0xe7ef0>; - opp-hz = <0x00 0x5fd82200>; - opp-supported-hw = <0x06 0xffff>; - opp-microvolt-L5 = <0xc96a8 0xc96a8 0xe7ef0 0xc96a8 0xc96a8 0xe7ef0>; - opp-microvolt-L3 = <0xcf850 0xcf850 0xe7ef0 0xcf850 0xcf850 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xd59f8 0xd59f8 0xe7ef0 0xd59f8 0xd59f8 0xe7ef0>; - }; - - opp-600000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x23c34600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - - opp-1416000000 { - opp-microvolt = <0xba284 0xba284 0xe7ef0 0xba284 0xba284 0xe7ef0>; - opp-microvolt-L6 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-microvolt-L4 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - opp-microvolt-L2 = <0xb40dc 0xb40dc 0xe7ef0 0xb40dc 0xb40dc 0xe7ef0>; - opp-hz = <0x00 0x54667200>; - opp-supported-hw = <0xf9 0xffff>; - opp-microvolt-L5 = <0xadf34 0xadf34 0xe7ef0 0xadf34 0xadf34 0xe7ef0>; - opp-suspend; - opp-microvolt-L3 = <0xb1008 0xb1008 0xe7ef0 0xb1008 0xb1008 0xe7ef0>; - clock-latency-ns = <0x9c40>; - opp-microvolt-L1 = <0xb71b0 0xb71b0 0xe7ef0 0xb71b0 0xb71b0 0xe7ef0>; - }; - - opp-408000000 { - opp-microvolt = <0xa4cb8 0xa4cb8 0xe7ef0 0xa4cb8 0xa4cb8 0xe7ef0>; - opp-hz = <0x00 0x18519600>; - opp-supported-hw = <0xf9 0xffff>; - clock-latency-ns = <0x9c40>; - }; - }; - - vcc-4g-regulator { - regulator-boot-on; - gpio = <0x182 0x00 0x00>; - regulator-always-on; - enable-active-high; - regulator-name = "vcc_4g"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x4b0>; - }; - - spi@fecb0000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x02>; - pinctrl-0 = <0x187 0x188 0x189>; - clock-names = "spiclk\0apb_pclk"; - interrupts = <0x00 0x14a 0x04>; - clocks = <0x02 0xa7 0x02 0xa2>; - #size-cells = <0x00>; - dma-names = "tx\0rx"; - compatible = "rockchip,rk3066-spi"; - status = "disabled"; - reg = <0x00 0xfecb0000 0x00 0x1000>; - phandle = <0x2e6>; - dmas = <0xf2 0x0d 0xf2 0x0e>; - }; - - spdif-rx@fde08000 { - power-domains = <0x60 0x1a>; - clock-names = "mclk\0hclk"; - assigned-clocks = <0x02 0x25e>; - assigned-clock-parents = <0x02 0x05>; - resets = <0x02 0x3fd>; - interrupts = <0x00 0xc7 0x04>; - clocks = <0x02 0x25e 0x02 0x25d>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-spdifrx\0rockchip,rk3308-spdifrx"; - status = "disabled"; - reg = <0x00 0xfde08000 0x00 0x1000>; - phandle = <0x280>; - dmas = <0x7c 0x15>; - reset-names = "spdifrx-m"; - }; - - mipi3-csi2-hw@fdd40000 { - clock-names = "pclk_csi2host"; - reg-names = "csihost_regs"; - resets = <0x02 0x327>; - interrupts = <0x00 0x95 0x04 0x00 0x96 0x04>; - clocks = <0x02 0x1d2>; - compatible = "rockchip,rk3588-mipi-csi2-hw"; - status = "okay"; - interrupt-names = "csi-intr1\0csi-intr2"; - reg = <0x00 0xfdd40000 0x00 0x10000>; - phandle = <0x4a>; - reset-names = "srst_csihost_p"; - }; - - // DTB memory region: { address: 0x100000000, size: 0x100000000 } 4G - memory { - device_type = "memory"; - reg = <0x01 0x00000000 0x01 0x00000000>; - }; - - jpege-core@fdba4000 { - power-domains = <0x60 0x15>; - iommus = <0xbe>; - rockchip,ccu = <0xbd>; - clock-names = "aclk_vcodec\0hclk_vcodec"; - assigned-clocks = <0x02 0x1ae>; - rockchip,normal-rates = <0x2367b880 0x00>; - assigned-clock-rates = <0x2367b880>; - resets = <0x02 0x2cc 0x02 0x2cd>; - interrupts = <0x00 0x7c 0x04>; - clocks = <0x02 0x1ae 0x02 0x1af>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x02>; - rockchip,disable-auto-freq; - compatible = "rockchip,vpu-jpege-core"; - status = "okay"; - interrupt-names = "irq_jpege1"; - rockchip,skip-pmu-idle-request; - reg = <0x00 0xfdba4000 0x00 0x400>; - phandle = <0x26e>; - reset-names = "video_a\0video_h"; - }; - - wireless-wlan { - pinctrl-names = "default"; - pinctrl-0 = <0x1ea>; - WIFI,host_wake_irq = <0x182 0x0a 0x00>; - wifi_chip_type = "rtl8822ce"; - compatible = "wlan-platdata"; - status = "okay"; - phandle = <0x4ab>; - }; - - rkcif-mipi-lvds4-sditf-vir3 { - compatible = "rockchip,rkcif-sditf"; - status = "disabled"; - rockchip,cif = <0x1a1>; - phandle = <0x475>; - }; - - dp@fde50000 { - power-domains = <0x60 0x19>; - clock-names = "apb\0aux\0i2s\0spdif\0hclk\0hdcp"; - assigned-clocks = <0x02 0x2cc>; - assigned-clock-rates = <0xf42400>; - resets = <0x02 0x388>; - interrupts = <0x00 0xa1 0x04>; - clocks = <0x02 0x1e6 0x02 0x2cc 0x02 0x1fb 0x02 0x207 0x04 0x02 0x1ea>; - #sound-dai-cells = <0x01>; - compatible = "rockchip,rk3588-dp"; - status = "disabled"; - phys = <0xf6>; - reg = <0x00 0xfde50000 0x00 0x4000>; - phandle = <0x1d6>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x38>; - status = "disabled"; - reg = <0x01>; - phandle = <0xe0>; - }; - - endpoint@2 { - remote-endpoint = <0xf8>; - status = "disabled"; - reg = <0x02>; - phandle = <0xe6>; - }; - - endpoint@0 { - remote-endpoint = <0xf7>; - status = "disabled"; - reg = <0x00>; - phandle = <0xda>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - phandle = <0x286>; - }; - }; - }; - }; - - rockchip-system-monitor { - rockchip,thermal-zone = "soc-thermal"; - compatible = "rockchip,system-monitor"; - phandle = <0x247>; - }; - - vcc3v3-pcie30 { - regulator-max-microvolt = <0x325aa0>; - enable-active-high; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pcie30"; - startup-delay-us = <0x1388>; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x1b8>; - vin-supply = <0x1cd>; - gpios = <0x182 0x04 0x00>; - }; - - phy@fedb0000 { - clock-names = "pclk\0ref"; - resets = <0x02 0xc0045 0x02 0x43 0x02 0x44 0x02 0xc0046>; - clocks = <0x02 0x109 0x02 0x2b6>; - #phy-cells = <0x00>; - compatible = "rockchip,rk3588-mipi-dcphy"; - status = "okay"; - rockchip,grf = <0x191>; - reg = <0x00 0xfedb0000 0x00 0x10000>; - phandle = <0x30>; - reset-names = "m_phy\0apb\0grf\0s_phy"; - }; - - rkvdec-core@fdc38000 { - power-domains = <0x60 0x0e>; - iommus = <0xc9>; - rockchip,ccu = <0xca>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core\0clk_cabac\0clk_hevc_cabac"; - reg-names = "regs\0link"; - assigned-clocks = <0x02 0x190 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,core-mask = <0x10001>; - rockchip,task-capacity = <0x10>; - rockchip,normal-rates = <0x2faf0800 0x00 0x23c34600 0x23c34600 0x3b9aca00>; - assigned-clock-rates = <0x2faf0800 0x23c34600 0x23c34600 0x3b9aca00>; - resets = <0x02 0x284 0x02 0x283 0x02 0x289 0x02 0x287 0x02 0x288>; - interrupts = <0x00 0x5f 0x04>; - rockchip,rcb-info = <0x88 0x6000 0x89 0xc000 0x8d 0x16000 0x8c 0xc000 0x8b 0x2c000 0x85 0xc000 0x86 0x2000 0x87 0x1100 0x8a 0x3300 0x8e 0x47300>; - clocks = <0x02 0x190 0x02 0x18f 0x02 0x193 0x02 0x191 0x02 0x192>; - rockchip,rcb-min-width = <0x200>; - rockchip,srv = <0xb8>; - rockchip,taskqueue-node = <0x09>; - compatible = "rockchip,rkv-decoder-v2"; - status = "okay"; - interrupt-names = "irq_rkvdec0"; - rockchip,skip-pmu-idle-request; - rockchip,rcb-iova = <0xfff00000 0x100000>; - reg = <0x00 0xfdc38100 0x00 0x400 0x00 0xfdc38000 0x00 0x100>; - phandle = <0x274>; - reset-names = "video_a\0video_h\0video_core\0video_cabac\0video_hevc_cabac"; - rockchip,sram = <0xcb>; - }; - - minidump { - smem-region = <0x1cf>; - minidump-region = <0x1d0>; - compatible = "rockchip,minidump"; - status = "disabled"; - phandle = <0x491>; - }; }; diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml similarity index 81% rename from configs/vms/linux-rk3588-aarch64-smp-vm1.toml rename to configs/vms/linux-rk3588-aarch64-smp-vm2.toml index c60ecabb..f66b2d04 100644 --- a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml +++ b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml @@ -2,9 +2,9 @@ # [base] # Guest vm id. -id = 1 +id = 2 # Guest vm name. -name = "linux" +name = "linux-minimal" # Virtualization type. vm_type = 1 # The number of virtual CPUs. @@ -19,22 +19,22 @@ phys_cpu_sets = [1, 2, 4, 8] # [kernel] # The entry point of the kernel image. -entry_point = 0x1020_0000 +entry_point = 0x1_1020_0000 # The load address of the kernel image. -kernel_load_addr = 0x1020_0000 +kernel_load_addr = 0x1_1020_0000 # The load address of the device tree blob (DTB). -dtb_load_addr = 0x1000_0000 +dtb_load_addr = 0x1_1000_0000 # The load address of the ramdisk image. -ramdisk_load_addr = 0x0a20_0000 +ramdisk_load_addr = 0x1_0a20_0000 # The location of image: "memory" | "fs". # load from memory image_location = "memory" # The file path of the kernel image. kernel_path = "Image.bin" # The file path of the device tree blob (DTB). -dtb_path = "aio-rk3588-jd4-vm1.dtb" +dtb_path = "aio-rk3588-jd4-vm2.dtb" # The file path of the ramdisk image. -ramdisk_path = "ramdisk.img" +ramdisk_path = "initramfs-busybox-arm64.img" # load from file system. @@ -69,4 +69,7 @@ emu_devices = [] # Pass-through devices. # Name Base-Ipa Base-Pa Length Alloc-Irq. -passthrough_devices = [] +passthrough_devices = [ + # ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], + # ["uart@feb50000", 0xfeb5_0000, 0xfeb4_0000, 0x1000, 0x1], +] From 37af056fb0ad90cbe60ea6d4d3fac850d8e9d127 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Thu, 12 Jun 2025 22:39:51 +0800 Subject: [PATCH 40/62] test with kernel 5.10.198 --- Cargo.lock | 37 +++++++----- Cargo.toml | 33 +++-------- configs/platforms/aarch64-qemu-virt-hv.toml | 1 - configs/vms/arceos-aarch64-gicv3-tester.toml | 60 ++++++++++++++++++++ configs/vms/linux-qemu-aarch64-gicv3-a.toml | 3 +- configs/vms/linux-qemu-aarch64-gicv3-b.toml | 3 +- tool/conn_2_serial.sh | 35 ++++++++++++ 7 files changed, 130 insertions(+), 42 deletions(-) create mode 100644 configs/vms/arceos-aarch64-gicv3-tester.toml create mode 100755 tool/conn_2_serial.sh diff --git a/Cargo.lock b/Cargo.lock index 3c8a75d7..d973c52e 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -167,7 +167,7 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3#1fb5ac158dca756fb94d7fb03f8182da5f20cce2" +source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3_ivc#f8e65147cf8801f590678388c05b005044fe3522" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -175,7 +175,7 @@ dependencies = [ "axaddrspace", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvisor_api", "log", "numeric-enum-macro", @@ -623,6 +623,17 @@ dependencies = [ "percpu", ] +[[package]] +name = "axvcpu" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc#aed8ed74c9be9bd0c0a71a8a38bf5a144540f87f" +dependencies = [ + "axaddrspace", + "axerrno", + "memory_addr", + "percpu", +] + [[package]] name = "axvisor" version = "0.1.0" @@ -634,16 +645,15 @@ dependencies = [ "axerrno", "axhvc", "axstd", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvisor_api", "axvm", "bitflags 2.9.0", - "cpumask", - "crate_interface", - "kernel_guard", "cfg-if", + "cpumask", "crate_interface", "fdt-parser", + "kernel_guard", "kspin", "lazyinit", "log", @@ -684,14 +694,13 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3#02b4e6d49ac7386caad8f8724532580c4c87fd1f" dependencies = [ "arm_vcpu", "axaddrspace", "axdevice", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvmconfig", "cfg-if", "cpumask", @@ -1192,6 +1201,8 @@ checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" [[package]] name = "page_table_entry" version = "0.5.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c097d641745a066856a26eed6e486d4430bb3e32c94f1203ea09c63239b360a0" dependencies = [ "aarch64-cpu 10.0.0", "bitflags 2.9.0", @@ -1202,6 +1213,8 @@ dependencies = [ [[package]] name = "page_table_multiarch" version = "0.5.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4647889585d29762d747be0916d6d28db72967a697d142be86f187a6b496832a" dependencies = [ "log", "memory_addr", @@ -1427,7 +1440,7 @@ source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_ dependencies = [ "axaddrspace", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1921,7 +1934,7 @@ dependencies = [ "axaddrspace", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1973,7 +1986,3 @@ dependencies = [ "quote", "syn 2.0.100", ] - -[[patch.unused]] -name = "arm_vgic" -version = "0.0.0" diff --git a/Cargo.toml b/Cargo.toml index a425ad3c..c4d9f00d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -38,8 +38,8 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm ] } # System dependent modules provided by ArceOS-Hypervisor. -axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3" } -axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } +axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3_ivc" } +axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt_vgicv3_ivc" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git" } @@ -66,28 +66,11 @@ prettyplease = "0.2" quote = "1.0" syn = "2.0" +[patch."https://github.com/arceos-hypervisor/axvm.git"] +axvm = { path = "../axvm" } -[patch."https://github.com/arceos-hypervisor/arceos.git".axstd] -path = "crates/arceos/ulib/axstd" -[patch."https://github.com/arceos-hypervisor/arceos.git".axhal] -path = "crates/arceos/modules/axhal" -[patch."https://github.com/arceos-hypervisor/axvm.git".axvm] -path = "crates/axvm" -[patch."https://github.com/arceos-hypervisor/axvcpu.git".axvcpu] -path = "crates/axvcpu" -[patch."https://github.com/arceos-hypervisor/axaddrspace.git".axaddrspace] -path = "crates/axaddrspace" -[patch."https://github.com/arceos-hypervisor/arm_vcpu.git".arm_vcpu] -path = "crates/arm_vcpu" -[patch."https://github.com/arceos-hypervisor/axdevice.git".axdevice] -path = "crates/axdevice" -[patch."https://github.com/arceos-hypervisor/arm_vgic.git".arm_vgic] -path = "crates/arm_vgic" -[patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] -path = "crates/axdevice_crates/axdevice_base" -[patch."https://github.com/arceos-hypervisor/axhvc.git".axhvc] -path = "crates/axhvc" +[patch."https://github.com/arceos-hypervisor/axaddrspace.git"] +axaddrspace = { path = "../axaddrspace" } -[patch.crates-io] -page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} -page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} \ No newline at end of file +[patch."https://github.com/arceos-hypervisor/axhvc.git"] +axhvc = { path = "../axhvc" } diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index c3f06e09..66e18305 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -101,7 +101,6 @@ gicc-paddr = 0x0801_0000 # uint gicd-paddr = 0x0800_0000 # uint gicv-paddr = 0x0804_0000 # uint gich-paddr = 0x0803_0000 # uint -gicr-paddr = 0x080a_0000 # uint # GIC Redistributor base address gicr-paddr = 0x080a_0000 diff --git a/configs/vms/arceos-aarch64-gicv3-tester.toml b/configs/vms/arceos-aarch64-gicv3-tester.toml new file mode 100644 index 00000000..e2952adb --- /dev/null +++ b/configs/vms/arceos-aarch64-gicv3-tester.toml @@ -0,0 +1,60 @@ +# Vm base info configs +# +[base] +# Guest vm id. +id = 1 +# Guest vm name. +name = "arceos" +# Virtualization type. +vm_type = 1 +# The number of virtual CPUs. +cpu_num = 1 +# Guest vm physical cpu sets. +phys_cpu_sets = [1] + +# +# Vm kernel configs +# +[kernel] +# The entry point of the kernel image. +entry_point = 0x4020_0000 +# The location of image: "memory" | "fs". +# Load from file system. +image_location = "memory" +# The file path of the kernel image. +kernel_path = "/home/smx/source/lectures/arceos-repos/arceos-new/zignore-gicv3-test/gicv3_tester_aarch64-qemu-virt-01-task-print-time-smp1.bin" +# The load address of the kernel image. +kernel_load_addr = 0x4020_0000 +## Load from memory +# image_location = "memory" +## The file path of the kernel image. +# kernel_path = "" +## The file path of the device tree blob (DTB). +# dtb_path = "" +# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). +# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. +memory_regions = [ + [0x4000_0000, 0x100_0000, 0x7, 0], # Low RAM 16M 0b00111 R|W|EXECUTE + +] + +# +# Device specifications +# +[devices] +# Emu_devices. +# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. +emu_devices = [] + +# Pass-through devices. +# Name Base-Ipa Base-Pa Length Alloc-Irq. +passthrough_devices = [ + # ["intc@8000000", 0x800_0000, 0x800_0000, 0x50_000, 0x1], + # ["intc@8000000", 0x800_0000, 0x800_0000, 0x100_0000, 0x1], + ["pl011@9000000", 0x900_0000, 0x900_0000, 0x1000, 0x1], + ["pl031@9010000", 0x901_0000, 0x901_0000, 0x1000, 0x1], + ["pl061@9030000", 0x903_0000, 0x903_0000, 0x1000, 0x1], + # a003000.virtio_mmio virtio_mmio@a003000 + # a003200.virtio_mmio virtio_mmio@a003200 + ["virtio_mmio", 0xa00_0000, 0xa00_0000, 0x4000, 0x1], +] \ No newline at end of file diff --git a/configs/vms/linux-qemu-aarch64-gicv3-a.toml b/configs/vms/linux-qemu-aarch64-gicv3-a.toml index 95642466..93f90902 100644 --- a/configs/vms/linux-qemu-aarch64-gicv3-a.toml +++ b/configs/vms/linux-qemu-aarch64-gicv3-a.toml @@ -23,7 +23,8 @@ entry_point = 0x8008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" +# kernel_path = "linux-6.6.62.bin" +kernel_path = "linux-5.10.198.bin" # The load address of the kernel image. kernel_load_addr = 0x8008_0000 # The file path of the device tree blob (DTB). diff --git a/configs/vms/linux-qemu-aarch64-gicv3-b.toml b/configs/vms/linux-qemu-aarch64-gicv3-b.toml index d080a791..bfa38d10 100644 --- a/configs/vms/linux-qemu-aarch64-gicv3-b.toml +++ b/configs/vms/linux-qemu-aarch64-gicv3-b.toml @@ -23,7 +23,8 @@ entry_point = 0xc008_0000 # load from memory. image_location = "memory" # The file path of the kernel image. -kernel_path = "linux-6.6.62.bin" +# kernel_path = "linux-6.6.62.bin" +kernel_path = "linux-5.10.198.bin" # The load address of the kernel image. kernel_load_addr = 0xc008_0000 # The file path of the device tree blob (DTB). diff --git a/tool/conn_2_serial.sh b/tool/conn_2_serial.sh new file mode 100755 index 00000000..a925c9d3 --- /dev/null +++ b/tool/conn_2_serial.sh @@ -0,0 +1,35 @@ +#!/bin/bash + +# Print usage information +if [[ "$1" == "--help" || "$1" == "-h" ]]; then + echo "Usage: $0 [FIRST_PORT] [SECOND_PORT]" + echo "Default ports are 4321 and 4322 if not specified." + exit 0 +fi + +# Determine the first and second ports to use +FIRST_PORT=${1:-4321} +SECOND_PORT=${2:-4322} + +# Create tmux session if it doesn't exist +if ! tmux has-session -t "mysession"; then + tmux new-session -d -s mysession + tmux split-window -h +fi + +# Send C-c to both panes to clear any previous commands +tmux send-keys -t mysession:0.0 C-c +tmux send-keys -t mysession:0.1 C-c + +# Send telnet commands to both panes +tmux send-keys -t mysession:0.0 "telnet localhost ${FIRST_PORT}" C-m +tmux send-keys -t mysession:0.1 "sleep 2; telnet localhost ${SECOND_PORT}" C-m + +# Attach to the tmux session if not already attached +session=$(tmux list-sessions 2>/dev/null | grep 'mysession') +if [[ -n "$session" && "$session" == *"attached"* ]]; then + echo "Session 'mysession' is already attached." + exit 0 +fi + +tmux attach-session -t mysession From 454e98cfbf05ea12a81f81e1f32ab74f082bf915 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 13 Jun 2025 15:53:53 +0800 Subject: [PATCH 41/62] [feat] Delay boot of second VM to allow first VM to initialize clocks --- Cargo.lock | 44 ++++++++++---------------------------------- src/vmm/vcpus.rs | 14 +++++++++++--- 2 files changed, 21 insertions(+), 37 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index a37e16cb..28e51dde 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -117,10 +117,9 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axdriver", "axerrno", "axfeat", @@ -150,7 +149,6 @@ dependencies = [ [[package]] name = "arm_gicv2" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_gicv2?branch=debin%2F2vm_timer#0ad077649e030b9836a5dc55a5a01b1fd0246e11" dependencies = [ "tock-registers 0.8.1", ] @@ -167,7 +165,6 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3#1fb5ac158dca756fb94d7fb03f8182da5f20cce2" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -187,7 +184,6 @@ dependencies = [ [[package]] name = "arm_vgic" version = "0.0.0" -source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=vmm_irq_gicv3#453e7b070573abefeb2ef1658234285591ad4b1d" dependencies = [ "arm_gicv2", "axaddrspace", @@ -238,7 +234,6 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "allocator", "axerrno", @@ -251,7 +246,6 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#35b7bc57a6cca5ac063a1d7b2748433687660b7c" dependencies = [ "axconfig-gen-macros", ] @@ -259,7 +253,7 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#35b7bc57a6cca5ac063a1d7b2748433687660b7c" dependencies = [ "axconfig-gen-macros", ] @@ -289,7 +283,6 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt_vgicv3#e806d495f17678ab43389dc6386fd37b317de713" dependencies = [ "arm_vgic", "axaddrspace", @@ -304,7 +297,6 @@ dependencies = [ [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#9e42a6c1714b42d352d7f8c8a146024c29bf3888" dependencies = [ "axaddrspace", "axerrno", @@ -316,10 +308,9 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axdriver_base", "axdriver_block", "axdriver_pci", @@ -374,7 +365,6 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", "axdriver", @@ -391,7 +381,6 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axdriver", "axdriver_block", @@ -445,14 +434,13 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "aarch64-cpu 10.0.0", "arm-gic-driver", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axlog", "bitflags 2.9.0", "cfg-if", @@ -495,9 +483,8 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axhal", "kspin", "lazyinit", @@ -508,7 +495,6 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "cfg-if", "crate_interface", @@ -519,10 +505,9 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axerrno", "axhal", "kspin", @@ -535,7 +520,6 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "crate_interface", "lazyinit", @@ -544,10 +528,9 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axdriver", "axfs", "axhal", @@ -565,7 +548,6 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "arceos_api", "axerrno", @@ -577,7 +559,6 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ "axtask", "kspin", @@ -586,9 +567,8 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig 0.1.0", "axhal", "cfg-if", "cpumask", @@ -606,7 +586,6 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#8a45916dd597ab7473e6693658f66d850f6e0f0e" dependencies = [ "axaddrspace", "axerrno", @@ -628,8 +607,10 @@ dependencies = [ "axvisor_api", "axvm", "bitflags 2.9.0", + "cfg-if", "cpumask", "crate_interface", + "fdt-parser", "kernel_guard", "kspin", "lazyinit", @@ -671,7 +652,6 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3#02b4e6d49ac7386caad8f8724532580c4c87fd1f" dependencies = [ "arm_vcpu", "axaddrspace", @@ -1960,7 +1940,3 @@ dependencies = [ "quote", "syn 2.0.100", ] - -[[patch.unused]] -name = "arm_vgic" -version = "0.0.0" diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 4180a61a..2ed4ddf0 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -1,11 +1,14 @@ use alloc::{collections::BTreeMap, vec::Vec}; -use std::os::arceos::api; -use std::os::arceos::modules::{axhal, axtask}; - use axaddrspace::GuestPhysAddr; +use axstd::sync::atomic::{AtomicUsize, Ordering}; use axtask::{AxTaskRef, TaskExtRef, TaskInner, WaitQueue}; use axvcpu::{AxVCpuExitReason, VCpuState}; +use core::time::Duration; +use std::os::arceos::api; +use std::os::arceos::api::task::{AxCpuMask, ax_wait_queue_wake}; +use std::os::arceos::modules::axhal::time::busy_wait; +use std::os::arceos::modules::{axhal, axtask}; use crate::task::TaskExt; use crate::vmm::{VCpuRef, VMRef}; @@ -295,6 +298,11 @@ fn vcpu_run() { let vm_id = vm.id(); let vcpu_id = vcpu.id(); + // boot delay + let boot_delay_sec = (vm_id - 1) * 5; + info!("VM[{}] boot delay: {}s", vm_id, boot_delay_sec); + busy_wait(Duration::from_secs(boot_delay_sec as _)); + info!("VM[{}] VCpu[{}] waiting for running", vm.id(), vcpu.id()); wait_for(vm_id, || vm.running()); From 4a4d315f6bf248a1de673d0c8cd2a97191d31642 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 13 Jun 2025 15:58:02 +0800 Subject: [PATCH 42/62] [feat/vgic] Parse GIC SPIs from DTB and collect them to setup vGIC --- configs/platforms/aarch64-rk3588j-hv.toml | 1 + src/vmm/config.rs | 65 +++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/configs/platforms/aarch64-rk3588j-hv.toml b/configs/platforms/aarch64-rk3588j-hv.toml index 14e0602d..f2e847f2 100644 --- a/configs/platforms/aarch64-rk3588j-hv.toml +++ b/configs/platforms/aarch64-rk3588j-hv.toml @@ -34,6 +34,7 @@ kernel-aspace-size = "0x0000_ffff_ffff_f000" mmio-regions = [ [0xfeb50000, 0x1000], # uart8250 UART0 [0xfe600000, 0x10000], # gic-v3 gicd + [0xfe640000, 0x40000], # gic-v3 gits [0xfe680000, 0x100000], # gic-v3 gicr [0xa41000000, 0x400000], [0xa40c00000, 0x400000], diff --git a/src/vmm/config.rs b/src/vmm/config.rs index ec7a0f63..3ba3581b 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -92,6 +92,71 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { } } + // Skip the interrupt controller, as we will use vGIC + // TODO: filter with compatible property and parse its phandle from DT; maybe needs a second pass? + const GIC_PHANDLE: usize = 1; + if name.starts_with("interrupt-controller") { + info!("skipping node {} to use vGIC", name); + continue; + } + + // Collect all GIC_SPI interrupts and add them to vGIC + if let Some(interrupts) = node.interrupts() { + // TODO: skip non-GIC interrupt + if let Some(parent) = node.interrupt_parent() { + trace!("node: {}, intr parent: {}", name, parent.node.name()); + if let Some(phandle) = parent.node.phandle() { + if phandle.as_usize() != GIC_PHANDLE { + warn!( + "node: {}, intr parent: {}, phandle: 0x{:x} is not GIC!", + name, + parent.node.name(), + phandle.as_usize() + ); + } + } else { + warn!( + "node: {}, intr parent: {} no phandle!", + name, + parent.node.name(), + ); + } + } else { + warn!("node: {} no interrupt parent!", name); + } + + trace!("node: {} interrupts:", name); + + for interrupt in interrupts { + // + for (k, v) in interrupt.enumerate() { + match k { + 0 => { + if v == 0 { + trace!("node: {}, GIC_SPI", name); + } else { + warn!( + "node: {}, intr type: {}, not GIC_SPI, not supported!", + name, v + ); + break; + } + } + 1 => { + trace!("node: {}, interrupt id: 0x{:x}", name, v); + vm_cfg.add_pass_through_spi(v); + } + 2 => { + trace!("node: {}, interrupt mode: 0x{:x}", name, v); + } + _ => { + warn!("unknown interrupt property {}:0x{:x}", k, v) + } + } + } + } + } + if let Some(regs) = node.reg() { for reg in regs { if reg.address < 0x1000 { From ce993c0b0477beaa6e383b11f85e62e29a9718bf Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 13 Jun 2025 16:15:59 +0800 Subject: [PATCH 43/62] [feat/rk3588] Update VM config to boot two Linux VMs - Add 'clk_ignore_unused' to the first Linux's bootargs so that it will configure but won't disable clocks assigned to the second VM's devices. - Add 'fixed-clock' clock nodes in the second Linux's DTS so that devices which require clocks can be probed properly. Meanwhile, the second Linux cannot mess with these clocks since they are fixed. - Serial port and 1G ethernet are happy with fixed frequency clocks; however MMC controller needs a variable clock to probe a SD card which is hard to implement. So we just boot the second Linux with NFS rootfs. --- configs/vms/aio-rk3588-jd4-vm1.dts | 16 +- configs/vms/aio-rk3588-jd4-vm2.dts | 255 +++++++++++++++++- configs/vms/linux-rk3588-aarch64-smp-vm1.toml | 76 ++++++ configs/vms/linux-rk3588-aarch64-smp-vm2.toml | 8 +- 4 files changed, 331 insertions(+), 24 deletions(-) create mode 100644 configs/vms/linux-rk3588-aarch64-smp-vm1.toml diff --git a/configs/vms/aio-rk3588-jd4-vm1.dts b/configs/vms/aio-rk3588-jd4-vm1.dts index 560b772b..f14c3d4e 100644 --- a/configs/vms/aio-rk3588-jd4-vm1.dts +++ b/configs/vms/aio-rk3588-jd4-vm1.dts @@ -3553,13 +3553,6 @@ #msi-cells = <0x01>; }; - msi-controller@fe660000 { - msi-controller; - compatible = "arm,gic-v3-its"; - reg = <0x00 0xfe660000 0x00 0x20000>; - phandle = <0x1b6>; - #msi-cells = <0x01>; - }; }; pcie-essd { @@ -9433,8 +9426,8 @@ }; chosen { - linux,initrd-end = <0x00 0xaac72ae>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait console=ttyS1,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot"; + linux,initrd-end = <0x00 0xaac8000>; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait console=ttyS1,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot clk_ignore_unused"; linux,initrd-start = <0x00 0xa200000>; phandle = <0x48d>; }; @@ -12620,12 +12613,11 @@ reset-names = "srst_csihost_p"; }; - // DTB memory region: { address: 0x9400000, size: 0xe6c00000 } 3.6G - // DTB memory region: { address: 0x2f0000000, size: 0x10000000 } 256M + // DTB memory region: { address: 0x0940_0000, size: 0xc6c0_0000 } ~3.3G memory { device_type = "memory"; - reg = <0x00 0x9400000 0x00 0xe6c00000 0x02 0xf0000000 0x00 0x10000000 >; + reg = <0x00 0x9400000 0x00 0xc6c00000>; }; jpege-core@fdba4000 { diff --git a/configs/vms/aio-rk3588-jd4-vm2.dts b/configs/vms/aio-rk3588-jd4-vm2.dts index fc9561be..35a1b9af 100644 --- a/configs/vms/aio-rk3588-jd4-vm2.dts +++ b/configs/vms/aio-rk3588-jd4-vm2.dts @@ -10,14 +10,19 @@ chosen { linux,initrd-start = <0x01 0x0a200000>; - linux,initrd-end = <0x01 0x0a320410>; - bootargs = "rw earlycon=uart8250,mmio32,0xfeb50000 console=ttyS2,115200n8 irqchip.gicv3_pseudo_nmi=0 initcall_debug"; + linux,initrd-end = <0x01 0xaac8000>; + // **Replace : with your own NFS server IP and rootfs export path!** + bootargs = "rw earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=/dev/nfs nfsroot=:"; phandle = <0x48d>; }; + // DTB memory region: { address: 0xe000_0000, size: 0x1000_0000 } 256M + // DTB memory region: { address: 0x1_0000_0000, size: 0xe000_0000 } 3.7G + + memory { device_type = "memory"; - reg = <0x01 0x00000000 0x00 0xe0000000 >; + reg = <0x00 0xe0000000 0x00 0x10000000 0x01 0x00000000 0x00 0xe0000000>; }; cpus { @@ -148,7 +153,7 @@ compatible = "arm,gic-v3"; ranges; #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe680000 0x00 0x100000>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe6a0000 0x00 0x100000>; phandle = <0x01>; interrupt-controller; @@ -159,25 +164,198 @@ compatible = "arm,psci-1.0"; }; + // dummy clocks that are configured by VM1 + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + // serial + serial_baud_24m { + clock-output-names = "serial_baud_24m"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + phandle = <0xbb>; + }; + + serial_pclk_100m { + clock-output-names = "serial_pclk_100m"; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + phandle = <0xac>; + }; + + // ethernet + gmac_125m { + clock-output-names = "gmac_125m"; + compatible = "fixed-clock"; + clock-frequency = <125000000>; + #clock-cells = <0>; + phandle = <0x144>; + }; + + gmac_50m { + clock-output-names = "gmac_50m"; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + phandle = <0x145>; + }; + + gmac1_pclk_150m { + clock-output-names = "gmac1_pclk_150m"; + compatible = "fixed-clock"; + clock-frequency = <150000000>; + #clock-cells = <0>; + phandle = <0x168>; + }; + + gmac1_aclk_396m { + clock-output-names = "gmac1_aclk_396m"; + compatible = "fixed-clock"; + clock-frequency = <396000000>; + #clock-cells = <0>; + phandle = <0x16d>; + }; + + gmac1_ptp_ref_100m { + clock-output-names = "gmac1_ptp_ref_100m"; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + phandle = <0x143>; + }; + }; + serial@feb50000 { reg-io-width = <0x04>; pinctrl-names = "default"; pinctrl-0 = <0x161>; interrupts = <0x00 0x14d 0x04>; // Avoid driver messing with CRU - clock-frequency = <24000000>; - // clock-names = "baudclk\0apb_pclk"; - // clocks = <0x02 0xbb 0x02 0xac>; + clock-names = "baudclk\0apb_pclk"; + clocks = <0xbb 0xac>; compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; + status = "disabled"; reg = <0x00 0xfeb50000 0x00 0x100>; phandle = <0x2ca>; dmas = <0x7c 0x0a 0x7c 0x0b>; reg-shift = <0x02>; }; + fiq-debugger { + pinctrl-names = "default"; + rockchip,irq-mode-enable = <0x01>; + rockchip,baudrate = <0x1c200>; + pinctrl-0 = <0x1ce>; + interrupts = <0x00 0x1a7 0x08>; + rockchip,wake-irq = <0x00>; + compatible = "rockchip,fiq-debugger"; + status = "okay"; + phandle = <0x490>; + rockchip,serial-id = <0x02>; + }; + + syscon@fd5b0000 { + compatible = "rockchip,rk3588-php-grf\0syscon"; + reg = <0x00 0xfd5b0000 0x00 0x1000>; + phandle = <0x76>; + }; + + syscon@fd58c000 { + compatible = "rockchip,rk3588-sys-grf\0syscon\0simple-mfd"; + reg = <0x00 0xfd58c000 0x00 0x1000>; + phandle = <0xc8>; + }; + + + ethernet@fe1c0000 { + power-domains = <0x60 0x21>; + pinctrl-names = "default"; + phy-mode = "rgmii-rxid"; + snps,mixed-burst; + snps,mtl-rx-config = <0x10b>; + pinctrl-0 = <0x10e 0x10f 0x110 0x111 0x112>; + clock-names = "stmmaceth\0clk_mac_ref\0pclk_mac\0aclk_mac\0ptp_ref"; + snps,mtl-tx-config = <0x10c>; + local-mac-address = [a6 50 47 45 20 ee]; + interrupt-names = "macirq\0eth_wake_irq"; + interrupts = <0x00 0xea 0x04 0x00 0xe9 0x04>; + clocks = <0x144 0x145 0x168 0x16d 0x143>; + clock_in_out = "output"; + snps,tso; + compatible = "rockchip,rk3588-gmac\0snps,dwmac-4.20a"; + status = "okay"; + rockchip,grf = <0xc8>; + // reset-names = "stmmaceth"; + // resets = <0x02 0x20b>; + // snps,reset-active-low; + // snps,reset-gpio = <0x10d 0x08 0x01>; + // snps,reset-delays-us = <0x00 0x4e20 0x186a0>; + reg = <0x00 0xfe1c0000 0x00 0x10000>; + rockchip,php_grf = <0x76>; + phandle = <0x109>; + phy-handle = <0x113>; + tx_delay = <0x40>; + snps,axi-config = <0x10a>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + phandle = <0x28f>; + + phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x113>; + }; + }; + + tx-queues-config { + phandle = <0x10c>; + snps,tx-queues-to-use = <0x01>; + + queue0 { + }; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x04>; + phandle = <0x10a>; + snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>; + snps,rd_osr_lmt = <0x08>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x10b>; + + queue0 { + }; + }; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + cma { + linux,cma-default; + compatible = "shared-dma-pool"; + size = <0x00 0x800000>; + reusable; + }; + }; + aliases { serial2 = "/serial@feb50000"; + ethernet1 = "/ethernet@fe1c0000"; + mmc1 = "/mmc@fe2c0000"; }; __symbols__ { @@ -189,6 +367,14 @@ scmi = "/firmware/scmi"; scmi_reset = "/firmware/scmi/protocol@16"; scmi_clk = "/firmware/scmi/protocol@14"; + + gmac1 = "/ethernet@fe1c0000"; + mdio1 = "/ethernet@fe1c0000/mdio"; + rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1"; + gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config"; + gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; + gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + }; syscon@fd5f0000 { @@ -233,6 +419,59 @@ }; }; + gmac1 { + + gmac1-rgmii-clk { + rockchip,pins = <0x03 0x05 0x01 0x198 0x03 0x04 0x01 0x198>; + phandle = <0x111>; + }; + + gmac1-rx-bus2 { + rockchip,pins = <0x03 0x07 0x01 0x198 0x03 0x08 0x01 0x198 0x03 0x09 0x01 0x198>; + phandle = <0x110>; + }; + + gmac1-txer { + rockchip,pins = <0x03 0x0a 0x01 0x198>; + phandle = <0x332>; + }; + + gmac1-clkinout { + rockchip,pins = <0x03 0x0e 0x01 0x198>; + phandle = <0x32e>; + }; + + gmac1-ptp-ref-clk { + rockchip,pins = <0x03 0x0f 0x01 0x198>; + phandle = <0x331>; + }; + + gmac1-ppsclk { + rockchip,pins = <0x03 0x11 0x01 0x198>; + phandle = <0x32f>; + }; + + gmac1-ppstrig { + rockchip,pins = <0x03 0x10 0x01 0x198>; + phandle = <0x330>; + }; + + gmac1-rgmii-bus { + rockchip,pins = <0x03 0x02 0x01 0x198 0x03 0x03 0x01 0x198 0x03 0x00 0x01 0x19a 0x03 0x01 0x01 0x19a>; + phandle = <0x112>; + }; + + gmac1-tx-bus2 { + rockchip,pins = <0x03 0x0b 0x01 0x19a 0x03 0x0c 0x01 0x19a 0x03 0x0d 0x01 0x198>; + phandle = <0x10f>; + }; + + gmac1-miim { + rockchip,pins = <0x03 0x12 0x01 0x198 0x03 0x13 0x01 0x198>; + phandle = <0x10e>; + }; + }; + // output // pull up diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml new file mode 100644 index 00000000..3cb2e729 --- /dev/null +++ b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml @@ -0,0 +1,76 @@ +# Vm base info configs +# +[base] +# Guest vm id. +id = 1 +# Guest vm name. +name = "linux-full" +# Virtualization type. +vm_type = 1 +# The number of virtual CPUs. +cpu_num = 1 +# Guest vm physical cpu sets. +# phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] +phys_cpu_ids = [0x00] +phys_cpu_sets = [1] + +# +# Vm kernel configs +# +[kernel] +# The entry point of the kernel image. +entry_point = 0x1020_0000 +# The load address of the kernel image. +kernel_load_addr = 0x1020_0000 +# The load address of the device tree blob (DTB). +dtb_load_addr = 0x1000_0000 +# The load address of the ramdisk image. +ramdisk_load_addr = 0x0a20_0000 +# The location of image: "memory" | "fs". +# load from memory +image_location = "memory" +# The file path of the kernel image. +kernel_path = "Image.bin" +# The file path of the device tree blob (DTB). +dtb_path = "aio-rk3588-jd4-vm1.dtb" +# The file path of the ramdisk image. +ramdisk_path = "ramdisk.img" +# ramdisk_path = "initramfs-busybox-arm64-vm1.img" + + +# load from file system. +# image_location = "fs". +## The file path of the kernel image. +# kernel_path = "linux-arceos-aarch64.bin" +## The file path of the device tree blob (DTB). +# dtb_path = "linux-rk3588.dtb" + +## The file path of the ramdisk image. +# ramdisk_path = "" +## The load address of the ramdisk image. +# ramdisk_load_addr = 0 +## The path of the disk image. +# disk_path = "disk.img" + +# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). +# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. +memory_regions = [ + # [0x0, 0x10_f000, 0x7, 1], # passthrough uncahed MAP_IDENTICAL + # [0x940_0000, 0xe6c00000, 0x7, 1], # ram 3G MAP_IDENTICAL + # [0x4000_0000, 0x4000_0000, 0x7, 1], # ram 1G MAP_IDENTICAL +] + +# +# Device specifications +# +[devices] +# Emu_devices. +# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. +emu_devices = [] + +# Pass-through devices. +# Name Base-Ipa Base-Pa Length Alloc-Irq. +passthrough_devices = [ + # ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], + # ["uart@feb50000", 0xfeb5_0000, 0xfeb4_0000, 0x1000, 0x1], +] diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm2.toml b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml index f66b2d04..a5270341 100644 --- a/configs/vms/linux-rk3588-aarch64-smp-vm2.toml +++ b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml @@ -8,11 +8,11 @@ name = "linux-minimal" # Virtualization type. vm_type = 1 # The number of virtual CPUs. -cpu_num = 4 +cpu_num = 1 # Guest vm physical cpu sets. # phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] -phys_cpu_ids = [0x00, 0x100, 0x200, 0x300] -phys_cpu_sets = [1, 2, 4, 8] +phys_cpu_ids = [0x100] +phys_cpu_sets = [2] # # Vm kernel configs @@ -34,7 +34,7 @@ kernel_path = "Image.bin" # The file path of the device tree blob (DTB). dtb_path = "aio-rk3588-jd4-vm2.dtb" # The file path of the ramdisk image. -ramdisk_path = "initramfs-busybox-arm64.img" +ramdisk_path = "ramdisk.img" # load from file system. From 040757692aa86015cc08e8b0d94066d20e95cbd3 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Fri, 13 Jun 2025 18:58:08 +0800 Subject: [PATCH 44/62] nasty sendipi handling --- Cargo.lock | 7 +++++-- Cargo.toml | 11 +---------- scripts.txt | 22 ++++++++++++++++++++++ src/vmm/vcpus.rs | 34 ++++++++++++++++++++++++++++++++++ tool/conn_2_serial.sh | 8 ++++---- 5 files changed, 66 insertions(+), 16 deletions(-) create mode 100644 scripts.txt diff --git a/Cargo.lock b/Cargo.lock index d973c52e..4613abfe 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -167,7 +167,7 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3_ivc#f8e65147cf8801f590678388c05b005044fe3522" +source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3_ivc#ad1d617150275e40c13804ab3e4a9d123e814104" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", @@ -221,6 +221,7 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" dependencies = [ "axerrno", "bit_field", @@ -486,6 +487,7 @@ dependencies = [ [[package]] name = "axhvc" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axhvc.git?branch=ivc#29ca8af1e2db294b9f266ec43a3989c36f2e23b4" dependencies = [ "axerrno", "bit_field", @@ -626,7 +628,7 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc#aed8ed74c9be9bd0c0a71a8a38bf5a144540f87f" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc#17cccf90a74a41570d564a42de29d04dfb1c0ab1" dependencies = [ "axaddrspace", "axerrno", @@ -694,6 +696,7 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3_ivc#56bca9658bbada112bec531a4ea6b55a7556cd69" dependencies = [ "arm_vcpu", "axaddrspace", diff --git a/Cargo.toml b/Cargo.toml index c4d9f00d..ec7fd473 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -41,7 +41,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3_ivc" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt_vgicv3_ivc" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } -axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git" } +axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git", branch = "ivc" } # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" @@ -65,12 +65,3 @@ axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = " prettyplease = "0.2" quote = "1.0" syn = "2.0" - -[patch."https://github.com/arceos-hypervisor/axvm.git"] -axvm = { path = "../axvm" } - -[patch."https://github.com/arceos-hypervisor/axaddrspace.git"] -axaddrspace = { path = "../axaddrspace" } - -[patch."https://github.com/arceos-hypervisor/axhvc.git"] -axhvc = { path = "../axhvc" } diff --git a/scripts.txt b/scripts.txt new file mode 100644 index 00000000..bb3369e9 --- /dev/null +++ b/scripts.txt @@ -0,0 +1,22 @@ + +# 原版双VM +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y + +# 原版单VM +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y + +# 单VM：去掉NET，去掉第二个串口 +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml GICV3=y SMP=2 DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run + +# 单VM：使用第二个串口 +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64-gicv3-a.toml GICV3=y SMP=1 SECOND_SERIAL=y DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run QEMU=/home/smx/source/3rd/qemu-9.2.4/build/qemu-system-aarch64 + +# 单VM：使用第二个串口，SMP2 +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64-gicv3-a.toml GICV3=y SMP=2 SECOND_SERIAL=y DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run QEMU=/home/smx/source/3rd/qemu-9.2.4/build/qemu-system-aarch64 + +# 双VM：三串口配置 +make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64-gicv3-a.toml:configs/vms/linux-qemu-aarch64-gicv3-b.toml GICV3=y SMP=2 SECOND_SERIAL=y THIRD_SERIAL=y DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run QEMU=/home/smx/source/3rd/qemu-9.2.4/build/qemu-system-aarch64 + +# GICv3 EL1测试 +make ACCEL=n ARCH=aarch64 LOG=info VM_CONFIGS=configs/vms/arceos-aarch64-gicv3-tester.toml GICV3=y LOG=debug run + diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 9d62525f..467e9164 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -387,6 +387,40 @@ fn vcpu_run() { warn!("VM[{}] run VCpu[{}] SystemDown", vm_id, vcpu_id); vm.shutdown().expect("VM shutdown failed"); } + AxVCpuExitReason::SendIPI { target_cpu, target_cpu_aux, send_to_all, send_to_self, vector } => { + if send_to_all || send_to_self { + unimplemented!("SendIPI with send_to_all or send_to_self is not implemented yet"); + } + + #[cfg(target_arch = "aarch64")] + { + let aff3 = (target_cpu >> 24) & 0xff; + let aff2 = (target_cpu >> 16) & 0xff; + let aff1 = (target_cpu >> 8) & 0xff; + let irm = (send_to_all as u64); + + let icc_sgi1r_value = + (vector as u64) << 24 | + aff3 << 48 | + aff2 << 32 | + aff1 << 16 | + irm << 40 | + target_cpu_aux; + + debug!( + "VM[{}] run VCpu[{}] SendIPI, target_cpu={:#x}, target_cpu_aux={:#x}, vector={}, icc_sgi1r_value={:#x}", + vm_id, vcpu_id, target_cpu, target_cpu_aux, vector, icc_sgi1r_value + ); + + unsafe { + core::arch::asm!( + "msr icc_sgi1r_el1, {0}", + in(reg) icc_sgi1r_value, + options(nostack, nomem, preserves_flags) + ); + } + } + } _ => { warn!("Unhandled VM-Exit"); } diff --git a/tool/conn_2_serial.sh b/tool/conn_2_serial.sh index a925c9d3..3953cf1f 100755 --- a/tool/conn_2_serial.sh +++ b/tool/conn_2_serial.sh @@ -15,12 +15,12 @@ SECOND_PORT=${2:-4322} if ! tmux has-session -t "mysession"; then tmux new-session -d -s mysession tmux split-window -h +else + # Send C-c to both panes to clear any previous commands + tmux send-keys -t mysession:0.0 C-c + tmux send-keys -t mysession:0.1 C-c fi -# Send C-c to both panes to clear any previous commands -tmux send-keys -t mysession:0.0 C-c -tmux send-keys -t mysession:0.1 C-c - # Send telnet commands to both panes tmux send-keys -t mysession:0.0 "telnet localhost ${FIRST_PORT}" C-m tmux send-keys -t mysession:0.1 "sleep 2; telnet localhost ${SECOND_PORT}" C-m From 94059c0bb8330d80a664030517db856e20704db3 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Thu, 12 Jun 2025 18:42:26 +0800 Subject: [PATCH 45/62] [feat] make IVCChannel as a emulated device type --- Boot-on-qemu.md | 2 + Cargo.lock | 7 +- Cargo.toml | 4 + configs/platforms/aarch64-qemu-virt-hv.toml | 1 + configs/vms/arceos-aarch64.toml | 4 +- configs/vms/linux-qemu-aarch64.toml | 4 +- src/vmm/hvc.rs | 48 ++++++------ src/vmm/ivc.rs | 82 ++++++++++++++++----- src/vmm/vcpus.rs | 7 +- 9 files changed, 109 insertions(+), 50 deletions(-) diff --git a/Boot-on-qemu.md b/Boot-on-qemu.md index d5b42545..2a9ff51a 100644 --- a/Boot-on-qemu.md +++ b/Boot-on-qemu.md @@ -9,6 +9,8 @@ cd crates/axvcpu && git checkout ivc cd crates/arm_vcpu && git checkout ivc_and_4lpt cd crates/axaddrspace && git checkout 4_level_paging cd crates/axhvc && git checkout ivc +cd crates/axdevice && git checkout ivc +cd crates/axvmconfig && git checkout ivc ``` diff --git a/Cargo.lock b/Cargo.lock index 59637ce4..4b25c40b 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -262,6 +262,8 @@ dependencies = [ "cfg-if", "log", "memory_addr", + "range-alloc", + "spin", ] [[package]] @@ -610,7 +612,6 @@ dependencies = [ [[package]] name = "axvmconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvmconfig.git#19e73fc71c48c0af49f6fda960c144b297e41435" dependencies = [ "axerrno", "log", @@ -1169,6 +1170,10 @@ dependencies = [ "proc-macro2", ] +[[package]] +name = "range-alloc" +version = "0.1.4" + [[package]] name = "raw-cpuid" version = "10.7.0" diff --git a/Cargo.toml b/Cargo.toml index faa50ae8..0bac1187 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -76,6 +76,10 @@ path = "crates/arm_vgic" path = "crates/axdevice_crates/axdevice_base" [patch."https://github.com/arceos-hypervisor/axhvc.git".axhvc] path = "crates/axhvc" +[patch."https://github.com/arceos-hypervisor/axvmconfig.git".axvmconfig] +path = "crates/axvmconfig" +[patch."https://github.com/arceos-hypervisor/range-alloc.git".range-alloc] +path = "crates/range-alloc" [patch.crates-io] page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index 9e8aa6d8..24e9151b 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -91,6 +91,7 @@ pci-ranges = [ ] # [(uint, uint)] # UART Address uart-paddr = 0x0904_0000 # uint +# uart-paddr = 0x0900_0000 # uint # UART IRQ number uart-irq = 1 # uint diff --git a/configs/vms/arceos-aarch64.toml b/configs/vms/arceos-aarch64.toml index bdcf16b9..663c700b 100644 --- a/configs/vms/arceos-aarch64.toml +++ b/configs/vms/arceos-aarch64.toml @@ -43,7 +43,9 @@ memory_regions = [ [devices] # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] +emu_devices = [ + ["ivc-channel", 0x3000_0000, 0x1000_0000, 0x0, 0x1, []], +] # Pass-through devices. # Name Base-Ipa Base-Pa Length Alloc-Irq. diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index dbcb8121..218966d3 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -69,4 +69,6 @@ passthrough_devices = [ # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] \ No newline at end of file +emu_devices = [ + ["ivc-channel", 0xd000_0000, 0x1000_0000, 0x0, 0x1, []], +] \ No newline at end of file diff --git a/src/vmm/hvc.rs b/src/vmm/hvc.rs index 770456b5..5e7ce754 100644 --- a/src/vmm/hvc.rs +++ b/src/vmm/hvc.rs @@ -30,18 +30,21 @@ impl HyperCall { pub fn execute(&self) -> HyperCallResult { match self.code { HyperCallCode::HIVCPublishChannel => { - // This is just a placeholder for the shared memory base address, - // it should be allocated dynamically. - const SHM_BASE_GPA_RAW: usize = 0xd000_0000; - let shm_base_gpa = GuestPhysAddr::from_usize(SHM_BASE_GPA_RAW); - let key = self.args[0] as usize; let shm_base_gpa_ptr = GuestPhysAddr::from_usize(self.args[1] as usize); let shm_size_ptr = GuestPhysAddr::from_usize(self.args[2] as usize); + info!( + "VM[{}] HyperCall {:?} key {:#x}", + self.vm.id(), + self.code, + key + ); + // User will pass the size of the shared memory region, + // we will allocate the shared memory region based on this size. let shm_region_size = self.vm.read_from_guest_of::(shm_size_ptr)?; + let (shm_base_gpa, shm_region_size) = self.vm.alloc_ivc_channel(shm_region_size)?; - info!("VM[{}] HyperCall {:?}", self.vm.id(), self.code); let ivc_channel = IVCChannel::alloc(self.vm.id(), key, shm_region_size, shm_base_gpa)?; @@ -71,28 +74,12 @@ impl HyperCall { self.code, key ); - let channel = ivc::remove_channel(self.vm.id(), key)?; - - self.vm - .unmap_region(channel.base_gpa_in_publisher(), channel.size())?; - - for (subscriber_id, subscriber_base_gpa) in channel.subscribers() { - warn!( - "TODO, you should unmap subscriber VM[{}] base GPA: {:?} size {:#x}", - subscriber_id, - subscriber_base_gpa, - channel.size() - ); - } + let (base_gpa, size) = ivc::unpublish_channel(self.vm.id(), key)?.unwrap(); + self.vm.unmap_region(base_gpa, size)?; Ok(0) } HyperCallCode::HIVCSubscribChannel => { - // This is just a placeholder for the shared memory base address, - // it should be allocated dynamically. - const SHM_BASE_GPA_RAW: usize = 0xe000_0000; - let shm_base_gpa = GuestPhysAddr::from_usize(SHM_BASE_GPA_RAW); - let publisher_vm_id = self.args[0] as usize; let key = self.args[1] as usize; let shm_base_gpa_ptr = GuestPhysAddr::from_usize(self.args[2] as usize); @@ -104,6 +91,10 @@ impl HyperCall { self.code, publisher_vm_id ); + + let shm_size = ivc::get_channel_size(publisher_vm_id, key)?; + let (shm_base_gpa, _) = self.vm.alloc_ivc_channel(shm_size)?; + let (base_hpa, actual_size) = ivc::subscribe_to_channel_of_publisher( publisher_vm_id, key, @@ -111,8 +102,13 @@ impl HyperCall { shm_base_gpa, )?; - self.vm - .map_region(shm_base_gpa, base_hpa, actual_size, MappingFlags::READ)?; + // TODO: seperate the mapping flags of metadata and data. + self.vm.map_region( + shm_base_gpa, + base_hpa, + actual_size, + MappingFlags::READ | MappingFlags::WRITE, + )?; self.vm .write_to_guest_of(shm_base_gpa_ptr, &shm_base_gpa.as_usize())?; diff --git a/src/vmm/ivc.rs b/src/vmm/ivc.rs index 7d16d387..873c503e 100644 --- a/src/vmm/ivc.rs +++ b/src/vmm/ivc.rs @@ -32,22 +32,57 @@ pub fn insert_channel( } } -pub fn remove_channel( +/// Try to remove a channel according to the publisher VM ID and key. +/// If the channel still has subscribers, it will just mark it as unpublished +/// (by setting its base GPA to None). +/// If the channel is successfully unpublished, it will return the base GPA and size of the channel. +/// If the channel does not exist, it will return an error. +pub fn unpublish_channel( publisher_vm_id: usize, key: usize, -) -> AxResult> { - IVC_CHANNELS - .lock() - .remove(&(publisher_vm_id, key)) - .ok_or_else(|| { +) -> AxResult> { + let mut channels = IVC_CHANNELS.lock(); + if let Some(mut channel) = channels.remove(&(publisher_vm_id, key)) { + let base_gpa = channel.base_gpa_in_publisher().ok_or_else(|| { axerrno::ax_err_type!( NotFound, format!( - "IVC channel for publisher VM {} with key {} not found", + "IVC channel for publisher VM {} with key {} has no base GPA, it may have been marked as unpublished", publisher_vm_id, key ) ) - }) + })?; + let size = channel.size(); + if !channel.subscribers().is_empty() { + channel.base_gpa = None; // Mark the channel as removed. + // If there are still subscribers, just return None. + channels.insert((publisher_vm_id, key), channel); + } + Ok(Some((base_gpa, size))) + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!( + "IVC channel for publisher VM {} with key {} not found", + publisher_vm_id, key + ) + )) + } +} + +pub fn get_channel_size(publisher_vm_id: usize, key: usize) -> AxResult { + let channels = IVC_CHANNELS.lock(); + if let Some(channel) = channels.get(&(publisher_vm_id, key)) { + Ok(channel.size()) + } else { + Err(axerrno::ax_err_type!( + NotFound, + format!( + "IVC channel for publisher VM {} with key {} not found", + publisher_vm_id, key + ) + )) + } } /// Subcribe to a channel of a publisher VM with the given key, @@ -75,14 +110,15 @@ pub fn subscribe_to_channel_of_publisher<'a>( } /// Unsubscribe from a channel of a publisher VM with the given key, -/// return the shared region base address and size. +/// if the channel has been unpublished (i.e., the base GPA is None) and has no subscribers, +/// it will remove the channel from the global map. pub fn unsubscribe_from_channel_of_publisher( publisher_vm_id: usize, key: usize, subscriber_vm_id: usize, ) -> AxResult<(GuestPhysAddr, usize)> { let mut channels = IVC_CHANNELS.lock(); - if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { + let (base_gpa, size) = if let Some(channel) = channels.get_mut(&(publisher_vm_id, key)) { // Remove the subscriber VM ID from the channel. if let Some(subscriber_gpa) = channel.remove_subscriber(subscriber_vm_id) { Ok((subscriber_gpa, channel.size())) @@ -90,7 +126,7 @@ pub fn unsubscribe_from_channel_of_publisher( Err(axerrno::ax_err_type!( NotFound, format!( - "VM[{}] tries to subcriber non-existed channel publisher VM[{}] Key {:#x}", + "VM[{}] tries to unsubscribe non-existed channel publisher VM[{}] Key {:#x}", subscriber_vm_id, publisher_vm_id, key ) )) @@ -100,7 +136,17 @@ pub fn unsubscribe_from_channel_of_publisher( NotFound, format!("IVC channel for publisher VM {} not found", publisher_vm_id) )) + }?; + + // If the channel has no subscribers and has been unpublished (base GPA is None), + // remove it from the global map. + if channels.get(&(publisher_vm_id, key)).map_or(false, |c| { + c.subscribers().is_empty() && c.base_gpa.is_none() + }) { + channels.remove(&(publisher_vm_id, key)); } + + Ok((base_gpa, size)) } pub struct IVCChannel { @@ -113,7 +159,8 @@ pub struct IVCChannel { shared_region_base: HostPhysAddr, shared_region_size: usize, /// The base address of the shared memory region in guest physical address of the publisher VM. - base_gpa: GuestPhysAddr, + /// `None` if the channel has been unpublished (but still has subscribers). + base_gpa: Option, _phatom: core::marker::PhantomData, } @@ -121,7 +168,6 @@ pub struct IVCChannel { pub struct IVCChannelHeader { pub publisher_id: u64, pub key: u64, - pub content_size: u64, } impl IVCChannel { @@ -155,11 +201,12 @@ impl core::fmt::Debug for IVCChannel { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!( f, - "IVCChannel(publisher[{}], subscribers {:?}, base: {:?}, size: {:#x})", + "IVCChannel(publisher[{}], subscribers {:?}, base: {:?}, size: {:#x}, gpa: {:?})", self.publisher_vm_id, self.subscriber_vms, self.shared_region_base, - self.shared_region_size + self.shared_region_size, + self.base_gpa ) } } @@ -194,13 +241,12 @@ impl IVCChannel { subscriber_vms: BTreeMap::new(), shared_region_base, shared_region_size, - base_gpa, + base_gpa: Some(base_gpa), _phatom: core::marker::PhantomData, }; channel.header_mut().publisher_id = publisher_vm_id as u64; channel.header_mut().key = key as u64; - channel.header_mut().content_size = 0; debug!("Allocated IVCChannel: {:?}", channel); @@ -211,7 +257,7 @@ impl IVCChannel { self.shared_region_base } - pub fn base_gpa_in_publisher(&self) -> GuestPhysAddr { + pub fn base_gpa_in_publisher(&self) -> Option { self.base_gpa } diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index bb21ac5d..a0ce8f51 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -3,7 +3,7 @@ use alloc::{collections::BTreeMap, vec::Vec}; use core::sync::atomic::{AtomicUsize, Ordering}; use std::os::arceos::{ api::task::{AxCpuMask, ax_wait_queue_wake}, - modules::axtask, + modules::{axhal::time::busy_wait, axtask}, }; use axaddrspace::GuestPhysAddr; @@ -373,8 +373,9 @@ fn vcpu_run() { } }, Err(err) => { - warn!("VM[{}] run VCpu[{}] get error {:?}", vm_id, vcpu_id, err); - wait(vm_id) + error!("VM[{}] run VCpu[{}] get error {:?}", vm_id, vcpu_id, err); + // wait(vm_id) + vm.shutdown().expect("VM shutdown failed"); } } From f52e792e38ce1952057a88f485bd3d5d880aae9b Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 13 Jun 2025 23:21:16 +0800 Subject: [PATCH 46/62] [doc/rk3588] Update instructions on how to boot two Linux VMs on rk3588 --- Boot-on-rk3588.md | 42 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 5 deletions(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index cd6b975a..3db41c2d 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -1,4 +1,4 @@ -# Boot A Linux VM on the Firefly AIO-3588JD4 Board +# Boot Two Linux VMs on the Firefly AIO-3588JD4 Board ## Setup TFTP Server @@ -19,10 +19,35 @@ cat testfile.txt You should see `TFTP Server Test` on your screen. +## Setup an NFS Server for the rootfs of VM2 + +```bash +sudo apt install nfs-kernel-server +sudo mkdir -p /srv/nfs/firefly-rootfs +# Download rootfs image from firefly wiki, assume rootfs.img +# expand image and partition +sudo dd if=/dev/zero of=rootfs.img bs=1M count=0 seek=16384 +# ... will show which loop device the image is mounted on, assume loopX +sudo losetup -f --show rootfs.img +sudo e2fsck -f /dev/loopX && sudo resize2fs /dev/loopX +sudo losetup -D /dev/loopX +# now mount the image file to rootfs path +sudo mount -t loop rootfs.img /srv/nfs/firefly-rootfs +# Add to NFS exports +sudo cat <> /etc/exports +/srv/nfs 192.168.XXX.0/24(rw,async,no_subtree_check,fsid=0) +/srv/nfs/firefly-rootfs 192.168.XXX.0/24(rw,async,no_subtree_check,no_root_squash) +EOF +sudo exportfs -ar +``` + ## Compile device tree +Before compiling the DTS, edit the bootargs in `aio-rk3588-jd4-vm2.dts` and replace `:` with your own NFS server IP and rootfs export path setup in the previous step. + ```bash -dtc -o configs/vms/aio-rk3588-jd4.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4.dts +dtc -o configs/vms/aio-rk3588-jd4-vm1.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4-vm1.dts +dtc -o configs/vms/aio-rk3588-jd4-vm2.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4-vm2.dts ``` ## Prepare Linux kernel bianry @@ -48,8 +73,8 @@ cd crates/arceos && git checkout rk3588_jd4 * compile ```bash -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml defconfig -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp.toml LOG=debug GICV3=y upload +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml SMP=2 defconfig +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp-vm1.toml:configs/vms/linux-rk3588-aarch64-smp-vm2.toml LOG=debug GICV3=y upload ``` * copy to tftp dir (make xxx upload will copy the image to `/srv/tftp/axvisor` automatically) @@ -70,4 +95,11 @@ setenv ipaddr 192.168.50.8 # 使用 tftp 加载镜像到指定内存地址并 boot setenv serverip 192.168.50.97;setenv ipaddr 192.168.50.8;tftp 0x00480000 ${serverip}:axvisor;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; ``` -tftp 0x00480000 ${serverip}:Image.bin;tftp 0x10000000 ${serverip}:rk3588_dtb.bin;bootm 0x00480000 - 0x10000000; + +The VM2 will wait for several seconds before boot to allow VM1 to setup clocks of the whole SoC first. + +The VM1 output goes to the RS232 on the board (ttyS1 in Linux and serial@feb40000 in the device tree), and the VM2 output goes to the USB Type-C (ttyS2/ttyFIQ0 in Linux and serial@feb5000 in the device tree). + +## Known Issues + +- Resets of the ethernet in VM2 is not working, and reconfigure the NIC (e.g. with NetworkManager) may cause the VM2 to hang. Currently the initramfs will attempt to autoconfig the eth port then mount NFS as the rootfs. You may override the configuration with `ip=` kernel bootarg. From 83e9f2bbe7f2262551206511908f4aba61be507f Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 13 Jun 2025 23:22:27 +0800 Subject: [PATCH 47/62] [wip] Update config to boot SMP VMs --- configs/vms/aio-rk3588-jd4-vm1.dts | 32 ++++++++++ configs/vms/aio-rk3588-jd4-vm2.dts | 64 +++++++++++++------ configs/vms/linux-rk3588-aarch64-smp-vm1.toml | 6 +- configs/vms/linux-rk3588-aarch64-smp-vm2.toml | 6 +- 4 files changed, 82 insertions(+), 26 deletions(-) diff --git a/configs/vms/aio-rk3588-jd4-vm1.dts b/configs/vms/aio-rk3588-jd4-vm1.dts index f14c3d4e..a75a58f6 100644 --- a/configs/vms/aio-rk3588-jd4-vm1.dts +++ b/configs/vms/aio-rk3588-jd4-vm1.dts @@ -10262,6 +10262,25 @@ phandle = <0x06>; }; + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + operating-points-v2 = <0x0f>; + cpu-idle-states = <0x10>; + i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x80>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x80>; + next-level-cache = <0x13>; + phandle = <0x07>; + }; + l2-cache-l0 { compatible = "cache"; cache-size = <0x20000>; @@ -10271,6 +10290,15 @@ phandle = <0x11>; }; + l2-cache-l1 { + compatible = "cache"; + cache-size = <0x20000>; + cache-line-size = <0x40>; + cache-sets = <0x200>; + next-level-cache = <0x1e>; + phandle = <0x13>; + }; + l3-cache { compatible = "cache"; cache-size = <0x300000>; @@ -10298,6 +10326,10 @@ core0 { cpu = <0x06>; }; + + core1 { + cpu = <0x07>; + }; }; }; }; diff --git a/configs/vms/aio-rk3588-jd4-vm2.dts b/configs/vms/aio-rk3588-jd4-vm2.dts index 35a1b9af..724c53b5 100644 --- a/configs/vms/aio-rk3588-jd4-vm2.dts +++ b/configs/vms/aio-rk3588-jd4-vm2.dts @@ -29,40 +29,60 @@ #address-cells = <0x01>; #size-cells = <0x00>; - cpu@0 { + cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a55"; - reg = <0x00>; + reg = <0x200>; enable-method = "psci"; + capacity-dmips-mhz = <0x212>; clocks = <0x0e 0x00>; - cpu-idle-states = <0x10>; operating-points-v2 = <0x0f>; - capacity-dmips-mhz = <0x212>; - - cpu-supply = <0x12>; - mem-supply = <0x12>; - dynamic-power-coefficient = <0x64>; - - i-cache-line-size = <0x40>; + cpu-idle-states = <0x10>; i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; i-cache-sets = <0x80>; - - d-cache-line-size = <0x40>; d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; d-cache-sets = <0x80>; + next-level-cache = <0x14>; + phandle = <0x08>; + }; - next-level-cache = <0x11>; - #cooling-cells = <0x02>; - phandle = <0x06>; + cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x300>; + enable-method = "psci"; + capacity-dmips-mhz = <0x212>; + clocks = <0x0e 0x00>; + operating-points-v2 = <0x0f>; + cpu-idle-states = <0x10>; + i-cache-size = <0x8000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x80>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x80>; + next-level-cache = <0x15>; + phandle = <0x09>; }; - l2-cache-l0 { + l2-cache-l2 { compatible = "cache"; cache-size = <0x20000>; + cache-line-size = <0x40>; cache-sets = <0x200>; + next-level-cache = <0x1e>; + phandle = <0x14>; + }; + + l2-cache-l3 { + compatible = "cache"; + cache-size = <0x20000>; cache-line-size = <0x40>; + cache-sets = <0x200>; next-level-cache = <0x1e>; - phandle = <0x11>; + phandle = <0x15>; }; l3-cache { @@ -89,8 +109,12 @@ cpu-map { cluster0 { - core0 { - cpu = <0x06>; + core2 { + cpu = <0x08>; + }; + + core3 { + cpu = <0x09>; }; }; }; @@ -153,7 +177,7 @@ compatible = "arm,gic-v3"; ranges; #interrupt-cells = <0x03>; - reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe6a0000 0x00 0x100000>; + reg = <0x00 0xfe600000 0x00 0x10000 0x00 0xfe6c0000 0x00 0x100000>; phandle = <0x01>; interrupt-controller; diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml index 3cb2e729..a2edd1af 100644 --- a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml +++ b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml @@ -8,11 +8,11 @@ name = "linux-full" # Virtualization type. vm_type = 1 # The number of virtual CPUs. -cpu_num = 1 +cpu_num = 2 # Guest vm physical cpu sets. # phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] -phys_cpu_ids = [0x00] -phys_cpu_sets = [1] +phys_cpu_ids = [0x00, 0x100] +phys_cpu_sets = [1, 2] # # Vm kernel configs diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm2.toml b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml index a5270341..c0afbed6 100644 --- a/configs/vms/linux-rk3588-aarch64-smp-vm2.toml +++ b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml @@ -8,11 +8,11 @@ name = "linux-minimal" # Virtualization type. vm_type = 1 # The number of virtual CPUs. -cpu_num = 1 +cpu_num = 2 # Guest vm physical cpu sets. # phys_cpu_sets = [1, 2, 4, 8, 16, 32, 64, 128] -phys_cpu_ids = [0x100] -phys_cpu_sets = [2] +phys_cpu_ids = [0x200, 0x300] +phys_cpu_sets = [4, 8] # # Vm kernel configs From 64a39f6a82b2e6d1827c8fa6f6ab1a5577639f21 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Fri, 13 Jun 2025 23:36:17 +0800 Subject: [PATCH 48/62] nasty sendipi handling --- Cargo.lock | 45 +++++++++++++++++++++++++++++++++++++++------ Cargo.toml | 5 +++-- src/vmm/vcpus.rs | 34 ++++++++++++++++++++++++++++++++++ 3 files changed, 76 insertions(+), 8 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 28e51dde..d15f36f2 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -173,7 +173,7 @@ dependencies = [ "axdevice_base", "axerrno", "axvcpu", - "axvisor_api", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "log", "numeric-enum-macro", "percpu", @@ -189,7 +189,7 @@ dependencies = [ "axaddrspace", "axdevice_base", "axerrno", - "axvisor_api", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "bitmaps", "log", "memory_addr", @@ -471,6 +471,16 @@ dependencies = [ "x86_64 0.15.2", ] +[[package]] +name = "axhvc" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axhvc.git?branch=ivc#29ca8af1e2db294b9f266ec43a3989c36f2e23b4" +dependencies = [ + "axerrno", + "bit_field", + "numeric-enum-macro", +] + [[package]] name = "axio" version = "0.1.1" @@ -602,9 +612,10 @@ dependencies = [ "axdevice", "axdevice_base", "axerrno", + "axhvc", "axstd", "axvcpu", - "axvisor_api", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "axvm", "bitflags 2.9.0", "cfg-if", @@ -633,7 +644,17 @@ version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" dependencies = [ "axaddrspace", - "axvisor_api_proc", + "axvisor_api_proc 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "crate_interface", + "memory_addr", +] + +[[package]] +name = "axvisor_api" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#ebb860c795a4d2e828b8595dca5ad9dff84e4883" +dependencies = [ + "axvisor_api_proc 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", "crate_interface", "memory_addr", ] @@ -649,6 +670,17 @@ dependencies = [ "syn 2.0.100", ] +[[package]] +name = "axvisor_api_proc" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#ebb860c795a4d2e828b8595dca5ad9dff84e4883" +dependencies = [ + "proc-macro-crate", + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "axvm" version = "0.1.0" @@ -1390,11 +1422,12 @@ dependencies = [ [[package]] name = "riscv_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_interrupt#7614ffff7e164661d6894a71628d4634914fc93f" +source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_interrupt_vgicv3_ivc#30c743b825778fd740c8e09988872e8a818ffe47" dependencies = [ "axaddrspace", "axerrno", "axvcpu", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1912,7 +1945,7 @@ dependencies = [ "axaddrspace", "axdevice_base", "axerrno", - "axvisor_api", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "bit", "log", "memory_addr", diff --git a/Cargo.toml b/Cargo.toml index de7054be..202baf5c 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -41,8 +41,9 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } +axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git", branch = "ivc" } -# System independent crates provided by ArceOS, these crates could be imported by remote url. +# System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" axerrno = "0.1.0" cpumask = "0.1.0" @@ -88,4 +89,4 @@ path = "crates/axdevice_crates/axdevice_base" path = "crates/arm_gicv2" [patch.crates-io] page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} -page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} \ No newline at end of file +page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 2ed4ddf0..a94bde00 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -390,6 +390,40 @@ fn vcpu_run() { warn!("VM[{}] run VCpu[{}] SystemDown", vm_id, vcpu_id); vm.shutdown().expect("VM shutdown failed"); } + AxVCpuExitReason::SendIPI { target_cpu, target_cpu_aux, send_to_all, send_to_self, vector } => { + if send_to_all || send_to_self { + unimplemented!("SendIPI with send_to_all or send_to_self is not implemented yet"); + } + + #[cfg(target_arch = "aarch64")] + { + let aff3 = (target_cpu >> 24) & 0xff; + let aff2 = (target_cpu >> 16) & 0xff; + let aff1 = (target_cpu >> 8) & 0xff; + let irm = (send_to_all as u64); + + let icc_sgi1r_value = + (vector as u64) << 24 | + aff3 << 48 | + aff2 << 32 | + aff1 << 16 | + irm << 40 | + target_cpu_aux; + + debug!( + "VM[{}] run VCpu[{}] SendIPI, target_cpu={:#x}, target_cpu_aux={:#x}, vector={}, icc_sgi1r_value={:#x}", + vm_id, vcpu_id, target_cpu, target_cpu_aux, vector, icc_sgi1r_value + ); + + unsafe { + core::arch::asm!( + "msr icc_sgi1r_el1, {0}", + in(reg) icc_sgi1r_value, + options(nostack, nomem, preserves_flags) + ); + } + } + } _ => { warn!("Unhandled VM-Exit"); } From 0ea27567ffd3747a6753cee6d159030644c57cde Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Sat, 14 Jun 2025 00:34:53 +0800 Subject: [PATCH 49/62] [doc/rk3588] Update instruction to boot SMP VMs --- Boot-on-rk3588.md | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 3db41c2d..bcea1b34 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -73,8 +73,8 @@ cd crates/arceos && git checkout rk3588_jd4 * compile ```bash -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml SMP=2 defconfig -make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp-vm1.toml:configs/vms/linux-rk3588-aarch64-smp-vm2.toml LOG=debug GICV3=y upload +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml SMP=4 defconfig +make ARCH=aarch64 PLATFORM=configs/platforms/aarch64-rk3588j-hv.toml SMP=4 VM_CONFIGS=configs/vms/linux-rk3588-aarch64-smp-vm1.toml:configs/vms/linux-rk3588-aarch64-smp-vm2.toml LOG=debug GICV3=y upload ``` * copy to tftp dir (make xxx upload will copy the image to `/srv/tftp/axvisor` automatically) @@ -102,4 +102,5 @@ The VM1 output goes to the RS232 on the board (ttyS1 in Linux and serial@feb4000 ## Known Issues -- Resets of the ethernet in VM2 is not working, and reconfigure the NIC (e.g. with NetworkManager) may cause the VM2 to hang. Currently the initramfs will attempt to autoconfig the eth port then mount NFS as the rootfs. You may override the configuration with `ip=` kernel bootarg. +* Resets of the ethernet in VM2 is not working, and reconfigure the NIC (e.g. with NetworkManager) may cause the VM2 to hang. Currently the initramfs will attempt to autoconfig the eth port then mount NFS as the rootfs. You may override the configuration with `ip=` kernel bootarg. +* Execute `reboot` in either VM would reset the whole board, which may be unexpected for the other VM. You may `shutdown` VM2 first, then do shutdown or reboot in VM1. From e88d5afa2e19ccf7eeccf3faf8d7d085ce360955 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Sun, 15 Jun 2025 10:38:54 +0800 Subject: [PATCH 50/62] [feat/rk3588] Use PREEMT_RT kernel for Linux VM2 --- configs/vms/linux-rk3588-aarch64-smp-vm2.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm2.toml b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml index c0afbed6..32181b06 100644 --- a/configs/vms/linux-rk3588-aarch64-smp-vm2.toml +++ b/configs/vms/linux-rk3588-aarch64-smp-vm2.toml @@ -30,7 +30,7 @@ ramdisk_load_addr = 0x1_0a20_0000 # load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "Image.bin" +kernel_path = "Image-5.10.198-rt89-preempt.bin" # The file path of the device tree blob (DTB). dtb_path = "aio-rk3588-jd4-vm2.dtb" # The file path of the ramdisk image. From 60ed75709b10672b47e1e9eec0b35a076db50bfb Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Sun, 15 Jun 2025 10:43:50 +0800 Subject: [PATCH 51/62] Assign arceos VM to 3rd physical core for 2-core Linux VM1 --- configs/vms/arceos-rk3588-aarch64-vm2.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/vms/arceos-rk3588-aarch64-vm2.toml b/configs/vms/arceos-rk3588-aarch64-vm2.toml index 92a96b70..d53ce9bf 100644 --- a/configs/vms/arceos-rk3588-aarch64-vm2.toml +++ b/configs/vms/arceos-rk3588-aarch64-vm2.toml @@ -10,7 +10,7 @@ vm_type = 1 # The number of virtual CPUs. cpu_num = 1 # Guest vm physical cpu sets. -phys_cpu_sets = [2] +phys_cpu_sets = [4] # # Vm kernel configs From 81055972ee09d90e81c2dfdcc72742e91b6acf90 Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Sun, 15 Jun 2025 14:51:30 +0800 Subject: [PATCH 52/62] [wip] prepare to merge --- Cargo.lock | 114 +++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 106 insertions(+), 8 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 4b25c40b..a5949678 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -146,6 +146,14 @@ dependencies = [ "tock-registers 0.9.0", ] +[[package]] +name = "arm_gicv2" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arm_gicv2.git?branch=debin%2F2vm_timer#0ad077649e030b9836a5dc55a5a01b1fd0246e11" +dependencies = [ + "tock-registers 0.8.1", +] + [[package]] name = "arm_gicv2" version = "0.1.0" @@ -169,9 +177,12 @@ version = "0.1.0" dependencies = [ "aarch64-cpu 9.4.0", "aarch64_sysreg", + "arm_vgic", "axaddrspace", + "axdevice_base", "axerrno", "axvcpu", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "log", "numeric-enum-macro", "percpu", @@ -179,6 +190,22 @@ dependencies = [ "tock-registers 0.8.1", ] +[[package]] +name = "arm_vgic" +version = "0.0.0" +dependencies = [ + "arm_gicv2 0.1.0 (git+https://github.com/arceos-hypervisor/arm_gicv2.git?branch=debin%2F2vm_timer)", + "axaddrspace", + "axdevice_base", + "axerrno", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "bitmaps", + "log", + "memory_addr", + "spin", + "tock-registers 0.8.1", +] + [[package]] name = "autocfg" version = "1.4.0" @@ -255,6 +282,7 @@ dependencies = [ name = "axdevice" version = "0.1.0" dependencies = [ + "arm_vgic", "axaddrspace", "axdevice_base", "axerrno", @@ -407,7 +435,7 @@ version = "0.1.0" dependencies = [ "aarch64-cpu 10.0.0", "arm-gic-driver", - "arm_gicv2", + "arm_gicv2 0.1.0 (git+https://github.com/arceos-hypervisor/arm_gicv2)", "arm_pl011", "axalloc", "axconfig 0.1.0", @@ -445,7 +473,6 @@ name = "axhvc" version = "0.1.0" dependencies = [ "axerrno", - "bit_field", "numeric-enum-macro", ] @@ -588,6 +615,49 @@ dependencies = [ "toml", ] +[[package]] +name = "axvisor_api" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" +dependencies = [ + "axaddrspace", + "axvisor_api_proc 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "crate_interface", + "memory_addr", +] + +[[package]] +name = "axvisor_api" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#ebb860c795a4d2e828b8595dca5ad9dff84e4883" +dependencies = [ + "axvisor_api_proc 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", + "crate_interface", + "memory_addr", +] + +[[package]] +name = "axvisor_api_proc" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" +dependencies = [ + "proc-macro-crate", + "proc-macro2", + "quote", + "syn 2.0.100", +] + +[[package]] +name = "axvisor_api_proc" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#ebb860c795a4d2e828b8595dca5ad9dff84e4883" +dependencies = [ + "proc-macro-crate", + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "axvm" version = "0.1.0" @@ -595,10 +665,12 @@ dependencies = [ "arm_vcpu", "axaddrspace", "axdevice", + "axdevice_base", "axerrno", "axvcpu", "axvmconfig", "cfg-if", + "cpumask", "log", "memory_addr", "page_table_entry", @@ -613,6 +685,7 @@ dependencies = [ name = "axvmconfig" version = "0.1.0" dependencies = [ + "axdevice_base", "axerrno", "log", "serde", @@ -1152,6 +1225,15 @@ dependencies = [ "syn 2.0.100", ] +[[package]] +name = "proc-macro-crate" +version = "3.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "edce586971a4dfaa28950c6f18ed55e0406c1ab88bbce2c6f6293a7aaba73d35" +dependencies = [ + "toml_edit 0.22.24", +] + [[package]] name = "proc-macro2" version = "1.0.94" @@ -1297,11 +1379,12 @@ dependencies = [ [[package]] name = "riscv_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#4000ae3cd546423c20785d7d93f81a80233cc35a" +source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_interrupt_vgicv3_ivc#30c743b825778fd740c8e09988872e8a818ffe47" dependencies = [ "axaddrspace", "axerrno", "axvcpu", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1770,9 +1853,10 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git#2cc42349f23c9a38723710a38d34b080255520e4" +source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#b240131f84db2ff61d114340c07049dcf20209b4" dependencies = [ "axaddrspace", + "axdevice_base", "axerrno", "axvcpu", "bit_field", @@ -1783,9 +1867,27 @@ dependencies = [ "memory_addr", "numeric-enum-macro", "page_table_entry", + "paste", "raw-cpuid 11.5.0", "x86", "x86_64 0.15.2", + "x86_vlapic", +] + +[[package]] +name = "x86_vlapic" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/x86_vlapic.git?branch=timer#5ac0b3f1e76efe46b42fb825818e83e801e49ab2" +dependencies = [ + "axaddrspace", + "axdevice_base", + "axerrno", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "bit", + "log", + "memory_addr", + "paste", + "tock-registers 0.9.0", ] [[package]] @@ -1808,7 +1910,3 @@ dependencies = [ "quote", "syn 2.0.100", ] - -[[patch.unused]] -name = "arm_vgic" -version = "0.0.0" From 627f8414e939b462b30c0afec15363b0ce3ec09f Mon Sep 17 00:00:00 2001 From: hky1999 <976929993@qq.com> Date: Sun, 15 Jun 2025 15:43:49 +0800 Subject: [PATCH 53/62] [wip] merge ivc branch, modify configuration --- Cargo.lock | 42 ++++++++++++++--------------- Cargo.toml | 31 +-------------------- configs/vms/arceos-aarch64.toml | 2 +- configs/vms/linux-qemu-aarch64.toml | 2 +- 4 files changed, 23 insertions(+), 54 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index bcb879e8..2edf5043 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -155,14 +155,6 @@ dependencies = [ "tock-registers 0.8.1", ] -[[package]] -name = "arm_gicv2" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_gicv2#eee14941d490719f6689e82f9a87caea6767bdc3" -dependencies = [ - "tock-registers 0.8.1", -] - [[package]] name = "arm_pl011" version = "0.1.0" @@ -183,7 +175,7 @@ dependencies = [ "axaddrspace", "axdevice_base", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "log", "numeric-enum-macro", @@ -195,8 +187,9 @@ dependencies = [ [[package]] name = "arm_vgic" version = "0.0.0" +source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=vmm_irq_gicv3#453e7b070573abefeb2ef1658234285591ad4b1d" dependencies = [ - "arm_gicv2 0.1.0 (git+https://github.com/arceos-hypervisor/arm_gicv2.git?branch=debin%2F2vm_timer)", + "arm_gicv2", "axaddrspace", "axdevice_base", "axerrno", @@ -208,6 +201,17 @@ dependencies = [ "tock-registers 0.8.1", ] +[[package]] +name = "async-trait" +version = "0.1.88" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e539d3fca749fcee5236ab05e93a52867dd549cc157c8cb7f99595f3cedffdb5" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "autocfg" version = "1.4.0" @@ -296,8 +300,6 @@ dependencies = [ "cfg-if", "log", "memory_addr", - "range-alloc", - "spin", ] [[package]] @@ -448,7 +450,7 @@ source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gic dependencies = [ "aarch64-cpu 10.0.0", "arm-gic-driver", - "arm_gicv2 0.1.0 (git+https://github.com/arceos-hypervisor/arm_gicv2)", + "arm_gicv2", "arm_pl011", "axalloc", "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", @@ -485,7 +487,7 @@ dependencies = [ [[package]] name = "axhvc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axhvc.git?branch=ivc#29ca8af1e2db294b9f266ec43a3989c36f2e23b4" +source = "git+https://github.com/arceos-hypervisor/axhvc.git#e4ca6f919b9900f35e42b9b30863550a50432220" dependencies = [ "axerrno", "numeric-enum-macro", @@ -645,7 +647,7 @@ dependencies = [ "axhvc", "axstd", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", - "axvisor_api", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "axvm", "bitflags 2.9.0", "cfg-if", @@ -714,7 +716,7 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3_ivc#56bca9658bbada112bec531a4ea6b55a7556cd69" +source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3_ivc#231eddbab0f7b14b0c1c1a7fa0876dc5878bf124" dependencies = [ "arm_vcpu", "axaddrspace", @@ -738,8 +740,8 @@ dependencies = [ [[package]] name = "axvmconfig" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axvmconfig.git#19e73fc71c48c0af49f6fda960c144b297e41435" dependencies = [ - "axdevice_base", "axerrno", "log", "serde", @@ -1310,10 +1312,6 @@ dependencies = [ "proc-macro2", ] -[[package]] -name = "range-alloc" -version = "0.1.4" - [[package]] name = "raw-cpuid" version = "10.7.0" @@ -1465,7 +1463,7 @@ source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_ dependencies = [ "axaddrspace", "axerrno", - "axvcpu", + "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", "bit_field", "bitflags 2.9.0", diff --git a/Cargo.toml b/Cargo.toml index 0f836d6f..a5eb12b3 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -41,7 +41,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3_ivc" } axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt_vgicv3_ivc" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } -axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git", branch = "ivc" } +axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git" } # System independent crates provided by ArceOS, these crates could be imported by remote url. crate_interface = "0.1" @@ -65,32 +65,3 @@ axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = " prettyplease = "0.2" quote = "1.0" syn = "2.0" - -[patch."https://github.com/arceos-hypervisor/arceos.git".axstd] -path = "crates/arceos/ulib/axstd" -[patch."https://github.com/arceos-hypervisor/arceos.git".axhal] -path = "crates/arceos/modules/axhal" -[patch."https://github.com/arceos-hypervisor/axvm.git".axvm] -path = "crates/axvm" -[patch."https://github.com/arceos-hypervisor/axvcpu.git".axvcpu] -path = "crates/axvcpu" -[patch."https://github.com/arceos-hypervisor/axaddrspace.git".axaddrspace] -path = "crates/axaddrspace" -[patch."https://github.com/arceos-hypervisor/arm_vcpu.git".arm_vcpu] -path = "crates/arm_vcpu" -[patch."https://github.com/arceos-hypervisor/axdevice.git".axdevice] -path = "crates/axdevice" -[patch."https://github.com/arceos-hypervisor/arm_vgic.git".arm_vgic] -path = "crates/arm_vgic" -[patch."https://github.com/arceos-hypervisor/axdevice_crates.git".axdevice_base] -path = "crates/axdevice_crates/axdevice_base" -[patch."https://github.com/arceos-hypervisor/axhvc.git".axhvc] -path = "crates/axhvc" -[patch."https://github.com/arceos-hypervisor/axvmconfig.git".axvmconfig] -path = "crates/axvmconfig" -[patch."https://github.com/arceos-hypervisor/range-alloc.git".range-alloc] -path = "crates/range-alloc" - -[patch.crates-io] -page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} -page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} diff --git a/configs/vms/arceos-aarch64.toml b/configs/vms/arceos-aarch64.toml index 663c700b..0886a7e7 100644 --- a/configs/vms/arceos-aarch64.toml +++ b/configs/vms/arceos-aarch64.toml @@ -44,7 +44,7 @@ memory_regions = [ # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. emu_devices = [ - ["ivc-channel", 0x3000_0000, 0x1000_0000, 0x0, 0x1, []], + ["ivc-channel", 0x3000_0000, 0x1000_0000, 0x0, 0xa, []], ] # Pass-through devices. diff --git a/configs/vms/linux-qemu-aarch64.toml b/configs/vms/linux-qemu-aarch64.toml index 218966d3..355f229c 100644 --- a/configs/vms/linux-qemu-aarch64.toml +++ b/configs/vms/linux-qemu-aarch64.toml @@ -70,5 +70,5 @@ passthrough_devices = [ # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. emu_devices = [ - ["ivc-channel", 0xd000_0000, 0x1000_0000, 0x0, 0x1, []], + ["ivc-channel", 0xd000_0000, 0x1000_0000, 0x0, 0xa, []], ] \ No newline at end of file From bf095ea96658e00cbc7bcbc7e1f4a321eef1789b Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Tue, 17 Jun 2025 14:04:17 +0800 Subject: [PATCH 54/62] [feat] reorder clocks for proper initialization in Linux kernel --- configs/vms/aio-rk3588-jd4-vm1.dts | 1356 ++++++++++++++-------------- 1 file changed, 678 insertions(+), 678 deletions(-) diff --git a/configs/vms/aio-rk3588-jd4-vm1.dts b/configs/vms/aio-rk3588-jd4-vm1.dts index a75a58f6..9bea6bd9 100644 --- a/configs/vms/aio-rk3588-jd4-vm1.dts +++ b/configs/vms/aio-rk3588-jd4-vm1.dts @@ -217,424 +217,764 @@ rockchip,master-handle-irq; }; - clock-controller@fd7c0000 { - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; - assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; - #clock-cells = <0x01>; - compatible = "rockchip,rk3588-cru"; - rockchip,grf = <0x76>; - reg = <0x00 0xfd7c0000 0x00 0x5c000>; - phandle = <0x02>; - }; - - qos@fdf81000 { - compatible = "syscon"; - reg = <0x00 0xfdf81000 0x00 0x20>; - phandle = <0xa0>; - }; + clocks { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; - qos@fdf36000 { - compatible = "syscon"; - reg = <0x00 0xfdf36000 0x00 0x20>; - phandle = <0xaa>; - }; + hclk_nvm@fd7c087c { + clock-names = "link"; + clocks = <0x02 0x141>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c087c 0x00 0x10>; + phandle = <0x03>; + }; - i2s@fe4a0000 { - power-domains = <0x60 0x26>; - pinctrl-names = "default\0idle\0clk"; - pinctrl-2 = <0x132 0x133>; - pinctrl-0 = <0x12f 0x130>; - clock-names = "i2s_clk\0i2s_hclk"; - assigned-clocks = <0x02 0x2a>; - assigned-clock-parents = <0x02 0x05>; - interrupts = <0x00 0xb7 0x04>; - clocks = <0x02 0x2d 0x02 0x23>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; - pinctrl-1 = <0x131>; - status = "disabled"; - reg = <0x00 0xfe4a0000 0x00 0x1000>; - phandle = <0x299>; - dmas = <0xf1 0x02 0xf1 0x03>; - rockchip,clk-trcm = <0x01>; - }; + mclkin-i2s0 { + clock-output-names = "i2s0_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x204>; + }; - syscon@fd5c4000 { - compatible = "rockchip,pipe-phy-grf\0syscon"; - reg = <0x00 0xfd5c4000 0x00 0x100>; - phandle = <0x195>; - }; + hclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c4>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fe>; + }; - sram@ff001000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "mmio-sram"; - ranges = <0x00 0x00 0xff001000 0xef000>; - reg = <0x00 0xff001000 0x00 0xef000>; - phandle = <0x2eb>; + mclkout-i2s1@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1_mclkout_to_io"; + clocks = <0x02 0x291>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x208>; + rockchip,bit-shift = <0x01>; + }; - rkvdec-sram@0 { - reg = <0x00 0x78000>; - phandle = <0xcb>; + mclkout-i2s1@fd58a000 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s1m1_mclkout_to_io"; + clocks = <0x02 0x291>; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58a000 0x00 0x04>; + phandle = <0x209>; + rockchip,bit-shift = <0x06>; }; - rkvdec-sram@78000 { - reg = <0x78000 0x77000>; - phandle = <0xcd>; + aclk_hdcp0_pre@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26c>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x1ff>; }; - }; - pwm@febd0010 { - pinctrl-names = "active"; - pinctrl-0 = <0x16a>; - clock-names = "pwm\0pclk"; - interrupts = <0x00 0x15a 0x04>; - clocks = <0x02 0x54 0x02 0x53>; - #pwm-cells = <0x03>; - compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; - status = "okay"; - reg = <0x00 0xfebd0010 0x00 0x10>; - phandle = <0x1ed>; - }; + xin32k { + clock-output-names = "xin32k"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + compatible = "fixed-clock"; + phandle = <0x1f2>; + }; - rkisp1-vir3 { - rockchip,hw = <0x5a>; - compatible = "rockchip,rkisp-vir"; - status = "disabled"; - phandle = <0x242>; - }; + aclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x6a>; + }; - pcie-clk2 { - regulator-boot-on; - regulator-always-on; - regulator-name = "pcie_clk2"; - compatible = "regulator-fixed"; - status = "okay"; - phandle = <0x495>; - gpios = <0x181 0x16 0x01>; - }; + hclk_usb@fd7c08a8 { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a8 0x00 0x10>; + phandle = <0x1f5>; + }; - serial@feb40000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x160>; - clock-names = "baudclk\0apb_pclk"; - interrupts = <0x00 0x14c 0x04>; - clocks = <0x02 0xb7 0x02 0xab>; - compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0xfeb40000 0x00 0x100>; - phandle = <0x2c9>; - dmas = <0x7c 0x08 0x7c 0x09>; - reg-shift = <0x02>; - }; + hclk_vo0@fd7c08dc { + clock-names = "link"; + clocks = <0x02 0x26d>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x10>; + phandle = <0x04>; + }; - pinctrl { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "rockchip,rk3588-pinctrl"; - ranges; - rockchip,grf = <0x196>; - phandle = <0x197>; + pclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x201>; + }; - eth0 { + mclkout-i2s2@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s2_mclkout_to_io"; + clocks = <0x02 0x28>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20a>; + rockchip,bit-shift = <0x02>; + }; - eth0-pins { - rockchip,pins = <0x02 0x13 0x01 0x198>; - phandle = <0x46c>; - }; + aclk_vdpu_low_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1f4>; }; - i2c3 { + mclkin-i2s3 { + clock-output-names = "i2s3_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x207>; + }; - i2c3m3-xfer { - rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; - phandle = <0x361>; - }; + spll { + clock-output-names = "spll"; + #clock-cells = <0x00>; + clock-frequency = <0x29d7ab80>; + compatible = "fixed-clock"; + phandle = <0x1f1>; + }; - i2c3m2-xfer { - rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; - phandle = <0x14a>; - }; - - i2c3m1-xfer { - rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; - phandle = <0x35f>; - }; - - i2c3m0-xfer { - rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; - phandle = <0x35e>; - }; - - i2c3m4-xfer { - rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; - phandle = <0x360>; - }; + xin24m { + clock-output-names = "xin24m"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x1f3>; }; - pwm9 { - - pwm9m2-pins { - rockchip,pins = <0x03 0x19 0x0b 0x198>; - phandle = <0x3d7>; - }; - - pwm9m1-pins { - rockchip,pins = <0x04 0x19 0x0b 0x198>; - phandle = <0x3d6>; - }; - - pwm9m0-pins { - rockchip,pins = <0x03 0x08 0x0b 0x198>; - phandle = <0x16e>; - }; + aclk_av1_pre@fd7c0910 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0910 0x00 0x10>; + phandle = <0x202>; }; - pcfg-pull-none-drv-level-7 { - drive-strength = <0x07>; - bias-disable; - phandle = <0x451>; + pclk_vo0_grf@fd7c08dc { + clock-names = "link"; + clocks = <0x04>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08dc 0x00 0x04>; + phandle = <0x72>; }; - mipi { - - mipi-te1 { - rockchip,pins = <0x03 0x13 0x02 0x198>; - phandle = <0x39f>; - }; - - mipim1-camera2-clk { - rockchip,pins = <0x03 0x07 0x04 0x198>; - phandle = <0x39b>; - }; - - mipim0-camera0-clk { - rockchip,pins = <0x04 0x09 0x01 0x198>; - phandle = <0x395>; - }; - - mipim0-camera4-clk { - rockchip,pins = <0x01 0x1f 0x02 0x198>; - phandle = <0x399>; - }; - - mipim1-camera3-clk { - rockchip,pins = <0x03 0x08 0x04 0x198>; - phandle = <0x39c>; - }; - - mipim0-camera1-clk { - rockchip,pins = <0x01 0x0e 0x02 0x198>; - phandle = <0x396>; - }; - - mipim1-camera0-clk { - rockchip,pins = <0x03 0x05 0x04 0x198>; - phandle = <0x39a>; - }; - - mipim1-camera4-clk { - rockchip,pins = <0x03 0x09 0x04 0x198>; - phandle = <0x39d>; - }; - - mipim0-camera2-clk { - rockchip,pins = <0x01 0x0f 0x02 0x198>; - phandle = <0x397>; - }; - - mipi-te0 { - rockchip,pins = <0x03 0x12 0x02 0x198>; - phandle = <0x39e>; - }; + aclk_jpeg_decoder_pre@fd7c08b0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08b0 0x00 0x10>; + phandle = <0x1fc>; + }; - mipim1-camera1-clk { - rockchip,pins = <0x03 0x06 0x04 0x198>; - phandle = <0x180>; - }; + aclk_hdcp1_pre@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x263>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x200>; + }; - mipim0-camera3-clk { - rockchip,pins = <0x01 0x1e 0x02 0x198>; - phandle = <0x398>; - }; + mclkin-i2s1 { + clock-output-names = "i2s1_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x205>; }; - pwm14 { + hclk_vo1@fd7c08ec { + clock-names = "link"; + clocks = <0x02 0x264>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x10>; + phandle = <0x05>; + }; - pwm14m2-pins { - rockchip,pins = <0x01 0x1e 0x0b 0x198>; - phandle = <0x3e1>; - }; + mclkout-i2s3@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s3_mclkout_to_io"; + clocks = <0x02 0x2e>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x20b>; + rockchip,bit-shift = <0x07>; + }; - pwm14m1-pins { - rockchip,pins = <0x04 0x0a 0x0b 0x198>; - phandle = <0x3e0>; - }; + aclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f8>; + }; - pwm14m0-pins { - rockchip,pins = <0x03 0x12 0x0b 0x198>; - phandle = <0x173>; - }; + aclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e0>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f7>; }; - pcfg-pull-none-drv-level-4-smt { - drive-strength = <0x04>; - bias-disable; - input-schmitt-enable; - phandle = <0x303>; + pclk_vo1_grf@fd7c08ec { + clock-names = "link"; + clocks = <0x05>; + #clock-cells = <0x00>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08ec 0x00 0x04>; + phandle = <0x73>; }; - headphone { + aclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1bc>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fa>; + }; - hp-det { - rockchip,pins = <0x02 0x13 0x00 0x198>; - phandle = <0x1dc>; - }; + hclk_rkvdec0_pre@fd7c08a0 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a0 0x00 0x10>; + phandle = <0x1f9>; }; - npu { + hclk_sdio_pre@fd7c092c { + clock-names = "link"; + clocks = <0x03>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c092c 0x00 0x10>; + phandle = <0x203>; + }; - npu-pins { - rockchip,pins = <0x00 0x16 0x02 0x198>; - phandle = <0x3a0>; - }; + hclk_rkvdec1_pre@fd7c08a4 { + clock-names = "link"; + clocks = <0x02 0x1be>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08a4 0x00 0x10>; + phandle = <0x1fb>; }; - wireless-bluetooth { + hclk_isp1_pre@fd7c0868 { + clock-names = "link"; + clocks = <0x02 0x1e1>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c0868 0x00 0x10>; + phandle = <0x1f6>; + }; - bt-reset-gpio { - rockchip,pins = <0x00 0x16 0x00 0x198>; - phandle = <0x1e6>; - }; - - bt-irq-gpio { - rockchip,pins = <0x00 0x00 0x00 0x198>; - phandle = <0x1e8>; - }; + mclkout-i2s0@fd58c318 { + rockchip,clk-ignore-unused; + clock-output-names = "i2s0_mclkout_to_io"; + clocks = <0x02 0x39>; + rockchip,bit-set-to-disable; + #clock-cells = <0x00>; + compatible = "rockchip,clk-out"; + reg = <0x00 0xfd58c318 0x00 0x04>; + phandle = <0x179>; + rockchip,bit-shift = <0x00>; + }; - bt-wake-gpio { - rockchip,pins = <0x00 0x15 0x00 0x198>; - phandle = <0x1e7>; - }; + mclkin-i2s2 { + clock-output-names = "i2s2_mclkin"; + #clock-cells = <0x00>; + clock-frequency = <0x00>; + compatible = "fixed-clock"; + phandle = <0x206>; + }; - uart6-gpios { - rockchip,pins = <0x01 0x02 0x00 0x198>; - phandle = <0x1e9>; - }; + aclk_rkvenc1_pre@fd7c08c0 { + clock-names = "link"; + clocks = <0x02 0x1c5>; + #clock-cells = <0x00>; + #power-domain-cells = <0x01>; + compatible = "rockchip,rk3588-clock-gate-link"; + reg = <0x00 0xfd7c08c0 0x00 0x10>; + phandle = <0x1fd>; }; + }; - pcie30x1 { + clock-controller@fd7c0000 { + #reset-cells = <0x01>; + assigned-clocks = <0x02 0x09 0x02 0x05 0x02 0x08 0x02 0x07 0x02 0xd8 0x02 0xda 0x02 0xd9 0x02 0x10e 0x02 0x10f 0x02 0x110 0x02 0x299 0x02 0x29a 0x02 0x7b 0x02 0xec 0x02 0x114 0x02 0x208 0x02 0x20e 0x02 0x21f 0x02 0x77>; + assigned-clock-rates = <0x4190ab00 0x2ee00000 0x32a9f880 0x46cf7100 0x29d7ab80 0x17d78400 0x1dcd6500 0x2cb41780 0x5f5e100 0x17d78400 0x5f5e100 0xbebc200 0x165a0bc0 0x8f0d180 0xbebc200 0xb71b00 0xb71b00 0x5e69ec0 0x1312d00>; + #clock-cells = <0x01>; + compatible = "rockchip,rk3588-cru"; + rockchip,grf = <0x76>; + reg = <0x00 0xfd7c0000 0x00 0x5c000>; + phandle = <0x02>; + }; - pcie30x1-1-button-rstn { - rockchip,pins = <0x04 0x0a 0x04 0x198>; - phandle = <0x3a9>; - }; + qos@fdf81000 { + compatible = "syscon"; + reg = <0x00 0xfdf81000 0x00 0x20>; + phandle = <0xa0>; + }; - pcie30x1m1-pins { - rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; - phandle = <0x3a6>; - }; + qos@fdf36000 { + compatible = "syscon"; + reg = <0x00 0xfdf36000 0x00 0x20>; + phandle = <0xaa>; + }; - pcie30x1m0-pins { - rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; - phandle = <0x3a5>; - }; + i2s@fe4a0000 { + power-domains = <0x60 0x26>; + pinctrl-names = "default\0idle\0clk"; + pinctrl-2 = <0x132 0x133>; + pinctrl-0 = <0x12f 0x130>; + clock-names = "i2s_clk\0i2s_hclk"; + assigned-clocks = <0x02 0x2a>; + assigned-clock-parents = <0x02 0x05>; + interrupts = <0x00 0xb7 0x04>; + clocks = <0x02 0x2d 0x02 0x23>; + dma-names = "tx\0rx"; + #sound-dai-cells = <0x00>; + compatible = "rockchip,rk3588-i2s\0rockchip,rk3066-i2s"; + pinctrl-1 = <0x131>; + status = "disabled"; + reg = <0x00 0xfe4a0000 0x00 0x1000>; + phandle = <0x299>; + dmas = <0xf1 0x02 0xf1 0x03>; + rockchip,clk-trcm = <0x01>; + }; - pcie30x1-0-button-rstn { - rockchip,pins = <0x04 0x09 0x04 0x198>; - phandle = <0x3a8>; - }; + syscon@fd5c4000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5c4000 0x00 0x100>; + phandle = <0x195>; + }; - pcie30x1m2-pins { - rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; - phandle = <0x3a7>; - }; + sram@ff001000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "mmio-sram"; + ranges = <0x00 0x00 0xff001000 0xef000>; + reg = <0x00 0xff001000 0x00 0xef000>; + phandle = <0x2eb>; + + rkvdec-sram@0 { + reg = <0x00 0x78000>; + phandle = <0xcb>; }; - uart8 { + rkvdec-sram@78000 { + reg = <0x78000 0x77000>; + phandle = <0xcd>; + }; + }; - uart8m0-rtsn { - rockchip,pins = <0x04 0x0a 0x0a 0x198>; - phandle = <0x443>; - }; + pwm@febd0010 { + pinctrl-names = "active"; + pinctrl-0 = <0x16a>; + clock-names = "pwm\0pclk"; + interrupts = <0x00 0x15a 0x04>; + clocks = <0x02 0x54 0x02 0x53>; + #pwm-cells = <0x03>; + compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm"; + status = "okay"; + reg = <0x00 0xfebd0010 0x00 0x10>; + phandle = <0x1ed>; + }; - uart8m1-ctsn { - rockchip,pins = <0x03 0x05 0x0a 0x198>; - phandle = <0x444>; - }; + rkisp1-vir3 { + rockchip,hw = <0x5a>; + compatible = "rockchip,rkisp-vir"; + status = "disabled"; + phandle = <0x242>; + }; - uart8m0-ctsn { - rockchip,pins = <0x04 0x0b 0x0a 0x198>; - phandle = <0x442>; - }; + pcie-clk2 { + regulator-boot-on; + regulator-always-on; + regulator-name = "pcie_clk2"; + compatible = "regulator-fixed"; + status = "okay"; + phandle = <0x495>; + gpios = <0x181 0x16 0x01>; + }; - uart8m1-xfer { - rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; - phandle = <0x167>; - }; + serial@feb40000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x160>; + clock-names = "baudclk\0apb_pclk"; + interrupts = <0x00 0x14c 0x04>; + clocks = <0x02 0xb7 0x02 0xab>; + compatible = "rockchip,rk3588-uart\0snps,dw-apb-uart"; + status = "okay"; + reg = <0x00 0xfeb40000 0x00 0x100>; + phandle = <0x2c9>; + dmas = <0x7c 0x08 0x7c 0x09>; + reg-shift = <0x02>; + }; - uart8m0-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; - phandle = <0x441>; - }; + pinctrl { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "rockchip,rk3588-pinctrl"; + ranges; + rockchip,grf = <0x196>; + phandle = <0x197>; - uart8-xfer { - rockchip,pins = <0x04 0x09 0x0a 0x19e>; - phandle = <0x446>; - }; + eth0 { - uart8m1-rtsn { - rockchip,pins = <0x03 0x04 0x0a 0x198>; - phandle = <0x445>; + eth0-pins { + rockchip,pins = <0x02 0x13 0x01 0x198>; + phandle = <0x46c>; }; }; - spi2 { + i2c3 { - spi2m0-cs1 { - rockchip,pins = <0x01 0x08 0x08 0x19a>; - phandle = <0x404>; + i2c3m3-xfer { + rockchip,pins = <0x02 0x0a 0x09 0x19d 0x02 0x0b 0x09 0x19d>; + phandle = <0x361>; }; - spi2m2-cs0 { - rockchip,pins = <0x00 0x09 0x01 0x19f>; - phandle = <0x154>; + i2c3m2-xfer { + rockchip,pins = <0x04 0x04 0x09 0x19d 0x04 0x05 0x09 0x19d>; + phandle = <0x14a>; }; - spi2m1-cs1 { - rockchip,pins = <0x04 0x08 0x08 0x19a>; - phandle = <0x407>; + i2c3m1-xfer { + rockchip,pins = <0x03 0x0f 0x09 0x19d 0x03 0x10 0x09 0x19d>; + phandle = <0x35f>; }; - spi2m2-pins { - rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; - phandle = <0x155>; + i2c3m0-xfer { + rockchip,pins = <0x01 0x11 0x09 0x19d 0x01 0x10 0x09 0x19d>; + phandle = <0x35e>; }; - spi2m1-pins { - rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; - phandle = <0x405>; + i2c3m4-xfer { + rockchip,pins = <0x04 0x18 0x09 0x19d 0x04 0x19 0x09 0x19d>; + phandle = <0x360>; }; + }; - spi2m2-cs1 { - rockchip,pins = <0x00 0x08 0x01 0x19f>; - phandle = <0x408>; - }; + pwm9 { - spi2m0-cs0 { - rockchip,pins = <0x01 0x07 0x08 0x19a>; - phandle = <0x403>; + pwm9m2-pins { + rockchip,pins = <0x03 0x19 0x0b 0x198>; + phandle = <0x3d7>; }; - spi2m0-pins { - rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; - phandle = <0x402>; + pwm9m1-pins { + rockchip,pins = <0x04 0x19 0x0b 0x198>; + phandle = <0x3d6>; }; - spi2m1-cs0 { + pwm9m0-pins { + rockchip,pins = <0x03 0x08 0x0b 0x198>; + phandle = <0x16e>; + }; + }; + + pcfg-pull-none-drv-level-7 { + drive-strength = <0x07>; + bias-disable; + phandle = <0x451>; + }; + + mipi { + + mipi-te1 { + rockchip,pins = <0x03 0x13 0x02 0x198>; + phandle = <0x39f>; + }; + + mipim1-camera2-clk { + rockchip,pins = <0x03 0x07 0x04 0x198>; + phandle = <0x39b>; + }; + + mipim0-camera0-clk { + rockchip,pins = <0x04 0x09 0x01 0x198>; + phandle = <0x395>; + }; + + mipim0-camera4-clk { + rockchip,pins = <0x01 0x1f 0x02 0x198>; + phandle = <0x399>; + }; + + mipim1-camera3-clk { + rockchip,pins = <0x03 0x08 0x04 0x198>; + phandle = <0x39c>; + }; + + mipim0-camera1-clk { + rockchip,pins = <0x01 0x0e 0x02 0x198>; + phandle = <0x396>; + }; + + mipim1-camera0-clk { + rockchip,pins = <0x03 0x05 0x04 0x198>; + phandle = <0x39a>; + }; + + mipim1-camera4-clk { + rockchip,pins = <0x03 0x09 0x04 0x198>; + phandle = <0x39d>; + }; + + mipim0-camera2-clk { + rockchip,pins = <0x01 0x0f 0x02 0x198>; + phandle = <0x397>; + }; + + mipi-te0 { + rockchip,pins = <0x03 0x12 0x02 0x198>; + phandle = <0x39e>; + }; + + mipim1-camera1-clk { + rockchip,pins = <0x03 0x06 0x04 0x198>; + phandle = <0x180>; + }; + + mipim0-camera3-clk { + rockchip,pins = <0x01 0x1e 0x02 0x198>; + phandle = <0x398>; + }; + }; + + pwm14 { + + pwm14m2-pins { + rockchip,pins = <0x01 0x1e 0x0b 0x198>; + phandle = <0x3e1>; + }; + + pwm14m1-pins { + rockchip,pins = <0x04 0x0a 0x0b 0x198>; + phandle = <0x3e0>; + }; + + pwm14m0-pins { + rockchip,pins = <0x03 0x12 0x0b 0x198>; + phandle = <0x173>; + }; + }; + + pcfg-pull-none-drv-level-4-smt { + drive-strength = <0x04>; + bias-disable; + input-schmitt-enable; + phandle = <0x303>; + }; + + headphone { + + hp-det { + rockchip,pins = <0x02 0x13 0x00 0x198>; + phandle = <0x1dc>; + }; + }; + + npu { + + npu-pins { + rockchip,pins = <0x00 0x16 0x02 0x198>; + phandle = <0x3a0>; + }; + }; + + wireless-bluetooth { + + bt-reset-gpio { + rockchip,pins = <0x00 0x16 0x00 0x198>; + phandle = <0x1e6>; + }; + + bt-irq-gpio { + rockchip,pins = <0x00 0x00 0x00 0x198>; + phandle = <0x1e8>; + }; + + bt-wake-gpio { + rockchip,pins = <0x00 0x15 0x00 0x198>; + phandle = <0x1e7>; + }; + + uart6-gpios { + rockchip,pins = <0x01 0x02 0x00 0x198>; + phandle = <0x1e9>; + }; + }; + + pcie30x1 { + + pcie30x1-1-button-rstn { + rockchip,pins = <0x04 0x0a 0x04 0x198>; + phandle = <0x3a9>; + }; + + pcie30x1m1-pins { + rockchip,pins = <0x04 0x03 0x04 0x198 0x04 0x05 0x04 0x198 0x04 0x04 0x04 0x198 0x04 0x00 0x04 0x198 0x04 0x02 0x04 0x198 0x04 0x01 0x04 0x198>; + phandle = <0x3a6>; + }; + + pcie30x1m0-pins { + rockchip,pins = <0x00 0x10 0x0c 0x198 0x00 0x15 0x0c 0x198 0x00 0x14 0x0c 0x198 0x00 0x0d 0x0c 0x198 0x00 0x0f 0x0c 0x198 0x00 0x0e 0x0c 0x198>; + phandle = <0x3a5>; + }; + + pcie30x1-0-button-rstn { + rockchip,pins = <0x04 0x09 0x04 0x198>; + phandle = <0x3a8>; + }; + + pcie30x1m2-pins { + rockchip,pins = <0x01 0x0d 0x04 0x198 0x01 0x0c 0x04 0x198 0x01 0x0b 0x04 0x198 0x01 0x00 0x04 0x198 0x01 0x07 0x04 0x198 0x01 0x01 0x04 0x198>; + phandle = <0x3a7>; + }; + }; + + uart8 { + + uart8m0-rtsn { + rockchip,pins = <0x04 0x0a 0x0a 0x198>; + phandle = <0x443>; + }; + + uart8m1-ctsn { + rockchip,pins = <0x03 0x05 0x0a 0x198>; + phandle = <0x444>; + }; + + uart8m0-ctsn { + rockchip,pins = <0x04 0x0b 0x0a 0x198>; + phandle = <0x442>; + }; + + uart8m1-xfer { + rockchip,pins = <0x03 0x03 0x0a 0x19e 0x03 0x02 0x0a 0x19e>; + phandle = <0x167>; + }; + + uart8m0-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e 0x04 0x08 0x0a 0x19e>; + phandle = <0x441>; + }; + + uart8-xfer { + rockchip,pins = <0x04 0x09 0x0a 0x19e>; + phandle = <0x446>; + }; + + uart8m1-rtsn { + rockchip,pins = <0x03 0x04 0x0a 0x198>; + phandle = <0x445>; + }; + }; + + spi2 { + + spi2m0-cs1 { + rockchip,pins = <0x01 0x08 0x08 0x19a>; + phandle = <0x404>; + }; + + spi2m2-cs0 { + rockchip,pins = <0x00 0x09 0x01 0x19f>; + phandle = <0x154>; + }; + + spi2m1-cs1 { + rockchip,pins = <0x04 0x08 0x08 0x19a>; + phandle = <0x407>; + }; + + spi2m2-pins { + rockchip,pins = <0x00 0x05 0x01 0x19f 0x00 0x0b 0x01 0x19f 0x00 0x06 0x01 0x19f>; + phandle = <0x155>; + }; + + spi2m1-pins { + rockchip,pins = <0x04 0x06 0x08 0x19a 0x04 0x04 0x08 0x19a 0x04 0x05 0x08 0x19a>; + phandle = <0x405>; + }; + + spi2m2-cs1 { + rockchip,pins = <0x00 0x08 0x01 0x19f>; + phandle = <0x408>; + }; + + spi2m0-cs0 { + rockchip,pins = <0x01 0x07 0x08 0x19a>; + phandle = <0x403>; + }; + + spi2m0-pins { + rockchip,pins = <0x01 0x06 0x08 0x19a 0x01 0x04 0x08 0x19a 0x01 0x05 0x08 0x19a>; + phandle = <0x402>; + }; + + spi2m1-cs0 { rockchip,pins = <0x04 0x07 0x08 0x19a>; phandle = <0x406>; }; @@ -6033,346 +6373,6 @@ phandle = <0x2d5>; }; - clocks { - #address-cells = <0x02>; - #size-cells = <0x02>; - compatible = "simple-bus"; - ranges; - - hclk_nvm@fd7c087c { - clock-names = "link"; - clocks = <0x02 0x141>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c087c 0x00 0x10>; - phandle = <0x03>; - }; - - mclkin-i2s0 { - clock-output-names = "i2s0_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x204>; - }; - - hclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c4>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fe>; - }; - - mclkout-i2s1@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1_mclkout_to_io"; - clocks = <0x02 0x291>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x208>; - rockchip,bit-shift = <0x01>; - }; - - mclkout-i2s1@fd58a000 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s1m1_mclkout_to_io"; - clocks = <0x02 0x291>; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58a000 0x00 0x04>; - phandle = <0x209>; - rockchip,bit-shift = <0x06>; - }; - - aclk_hdcp0_pre@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26c>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x1ff>; - }; - - xin32k { - clock-output-names = "xin32k"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - compatible = "fixed-clock"; - phandle = <0x1f2>; - }; - - aclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x6a>; - }; - - hclk_usb@fd7c08a8 { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a8 0x00 0x10>; - phandle = <0x1f5>; - }; - - hclk_vo0@fd7c08dc { - clock-names = "link"; - clocks = <0x02 0x26d>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x10>; - phandle = <0x04>; - }; - - pclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x201>; - }; - - mclkout-i2s2@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s2_mclkout_to_io"; - clocks = <0x02 0x28>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20a>; - rockchip,bit-shift = <0x02>; - }; - - aclk_vdpu_low_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1f4>; - }; - - mclkin-i2s3 { - clock-output-names = "i2s3_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x207>; - }; - - spll { - clock-output-names = "spll"; - #clock-cells = <0x00>; - clock-frequency = <0x29d7ab80>; - compatible = "fixed-clock"; - phandle = <0x1f1>; - }; - - xin24m { - clock-output-names = "xin24m"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x1f3>; - }; - - aclk_av1_pre@fd7c0910 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0910 0x00 0x10>; - phandle = <0x202>; - }; - - pclk_vo0_grf@fd7c08dc { - clock-names = "link"; - clocks = <0x04>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08dc 0x00 0x04>; - phandle = <0x72>; - }; - - aclk_jpeg_decoder_pre@fd7c08b0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08b0 0x00 0x10>; - phandle = <0x1fc>; - }; - - aclk_hdcp1_pre@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x263>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x200>; - }; - - mclkin-i2s1 { - clock-output-names = "i2s1_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x205>; - }; - - hclk_vo1@fd7c08ec { - clock-names = "link"; - clocks = <0x02 0x264>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x10>; - phandle = <0x05>; - }; - - mclkout-i2s3@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s3_mclkout_to_io"; - clocks = <0x02 0x2e>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x20b>; - rockchip,bit-shift = <0x07>; - }; - - aclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f8>; - }; - - aclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e0>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f7>; - }; - - pclk_vo1_grf@fd7c08ec { - clock-names = "link"; - clocks = <0x05>; - #clock-cells = <0x00>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08ec 0x00 0x04>; - phandle = <0x73>; - }; - - aclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1bc>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fa>; - }; - - hclk_rkvdec0_pre@fd7c08a0 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a0 0x00 0x10>; - phandle = <0x1f9>; - }; - - hclk_sdio_pre@fd7c092c { - clock-names = "link"; - clocks = <0x03>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c092c 0x00 0x10>; - phandle = <0x203>; - }; - - hclk_rkvdec1_pre@fd7c08a4 { - clock-names = "link"; - clocks = <0x02 0x1be>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08a4 0x00 0x10>; - phandle = <0x1fb>; - }; - - hclk_isp1_pre@fd7c0868 { - clock-names = "link"; - clocks = <0x02 0x1e1>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c0868 0x00 0x10>; - phandle = <0x1f6>; - }; - - mclkout-i2s0@fd58c318 { - rockchip,clk-ignore-unused; - clock-output-names = "i2s0_mclkout_to_io"; - clocks = <0x02 0x39>; - rockchip,bit-set-to-disable; - #clock-cells = <0x00>; - compatible = "rockchip,clk-out"; - reg = <0x00 0xfd58c318 0x00 0x04>; - phandle = <0x179>; - rockchip,bit-shift = <0x00>; - }; - - mclkin-i2s2 { - clock-output-names = "i2s2_mclkin"; - #clock-cells = <0x00>; - clock-frequency = <0x00>; - compatible = "fixed-clock"; - phandle = <0x206>; - }; - - aclk_rkvenc1_pre@fd7c08c0 { - clock-names = "link"; - clocks = <0x02 0x1c5>; - #clock-cells = <0x00>; - #power-domain-cells = <0x01>; - compatible = "rockchip,rk3588-clock-gate-link"; - reg = <0x00 0xfd7c08c0 0x00 0x10>; - phandle = <0x1fd>; - }; - }; - usb@fc8c0000 { power-domains = <0x60 0x1f>; phy-names = "usb2-phy"; From ed4a058f092e31c8638a98f4035c30fe05a8835b Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Tue, 17 Jun 2025 14:05:22 +0800 Subject: [PATCH 55/62] [wip] Use gicv3 tester app and DTB for ArceOS VM2 --- Cargo.toml | 6 +++--- configs/vms/arceos-rk3588-aarch64-vm2.toml | 13 ++++++------- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 202baf5c..b5607d6f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -33,7 +33,7 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm "hv", "multitask", "smp", - "gicv3" + "gicv3", # "sched_rr" ] } @@ -88,5 +88,5 @@ path = "crates/axdevice_crates/axdevice_base" [patch."https://github.com/arceos-hypervisor/arm_gicv2.git".arm_gicv2] path = "crates/arm_gicv2" [patch.crates-io] -page_table_multiarch = {path = "crates/page_table_multiarch/page_table_multiarch"} -page_table_entry = {path = "crates/page_table_multiarch/page_table_entry"} +page_table_multiarch = { path = "crates/page_table_multiarch/page_table_multiarch" } +page_table_entry = { path = "crates/page_table_multiarch/page_table_entry" } diff --git a/configs/vms/arceos-rk3588-aarch64-vm2.toml b/configs/vms/arceos-rk3588-aarch64-vm2.toml index d53ce9bf..d7044a93 100644 --- a/configs/vms/arceos-rk3588-aarch64-vm2.toml +++ b/configs/vms/arceos-rk3588-aarch64-vm2.toml @@ -20,19 +20,18 @@ phys_cpu_sets = [4] entry_point = 0x1_0048_0000 # The load address of the kernel image. kernel_load_addr = 0x1_0048_0000 +# The load address of the device tree blob (DTB). +dtb_load_addr = 0x1_1000_0000 # The location of image: "memory" | "fs". # Load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "helloworld_aarch64-rk3588j.bin" -## The file path of the device tree blob (DTB). -# dtb_path = "" +kernel_path = "gicv3_tester_aarch64-rk3588j-guest.bin" +# The file path of the device tree blob (DTB). +dtb_path = "aio-rk3588-jd4-vm2.dtb" # Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. -memory_regions = [ - [0x1_0000_0000, 0x1000_0000, 0x7, 1], # ram 256M MAP_IDENTICAL - # [0x940_0000, 0xe6c0_0000, 0x7, 1], # ram 256M MAP_IDENTICAL -] +memory_regions = [] # # Device specifications From 21783c7a6944a4f226e86a97ac24066ec8c799e5 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Wed, 25 Jun 2025 12:03:45 +0800 Subject: [PATCH 56/62] [feat/rk3588] Remove CMA ranges for PCIe, USB and SATA driver to work properly --- configs/vms/aio-rk3588-jd4-vm1.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/vms/aio-rk3588-jd4-vm1.dts b/configs/vms/aio-rk3588-jd4-vm1.dts index 9bea6bd9..a1b14c66 100644 --- a/configs/vms/aio-rk3588-jd4-vm1.dts +++ b/configs/vms/aio-rk3588-jd4-vm1.dts @@ -11699,7 +11699,6 @@ linux,cma-default; compatible = "shared-dma-pool"; size = <0x00 0x800000>; - reg = <0x00 0x10000000 0x00 0x10000000>; reusable; }; From 3bc6e215c624a3329f064826e20d6ef3c9b75de1 Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Wed, 25 Jun 2025 12:05:07 +0800 Subject: [PATCH 57/62] [feat/rk3588] Linux VM1 use PREEMPT_RT kernel --- configs/vms/linux-rk3588-aarch64-smp-vm1.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml index a2edd1af..4bde427e 100644 --- a/configs/vms/linux-rk3588-aarch64-smp-vm1.toml +++ b/configs/vms/linux-rk3588-aarch64-smp-vm1.toml @@ -30,7 +30,7 @@ ramdisk_load_addr = 0x0a20_0000 # load from memory image_location = "memory" # The file path of the kernel image. -kernel_path = "Image.bin" +kernel_path = "Image-5.10.198-rt89-preempt.bin" # The file path of the device tree blob (DTB). dtb_path = "aio-rk3588-jd4-vm1.dtb" # The file path of the ramdisk image. @@ -72,5 +72,5 @@ emu_devices = [] # Name Base-Ipa Base-Pa Length Alloc-Irq. passthrough_devices = [ # ["uart@feb40000", 0xfeb4_0000, 0xfeb4_0000, 0x1000, 0x1], - # ["uart@feb50000", 0xfeb5_0000, 0xfeb4_0000, 0x1000, 0x1], + # ["uart@feb50000", 0xfeb5_0000, 0xfeb5_0000, 0x1000, 0x1], ] From 95d58f2b57c2b7e46aa26b76204505678d058baa Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Wed, 25 Jun 2025 12:30:01 +0800 Subject: [PATCH 58/62] [feat/rk3588] Linux VM2 SATA disk support - Passthrough SATA controller and PHY to VM2 DTS - Keep them in VM1 DTS then VM1 can reset and negotiate properly - Disable SATA drive in VM1's bootargs, so that it won't try accessing the drive and conflict with VM2. --- Boot-on-rk3588.md | 20 ++++- configs/vms/aio-rk3588-jd4-vm1.dts | 2 +- configs/vms/aio-rk3588-jd4-vm2.dts | 130 ++++++++++++++++++++++++++++- 3 files changed, 145 insertions(+), 7 deletions(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index bcea1b34..d458d1ab 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -19,7 +19,19 @@ cat testfile.txt You should see `TFTP Server Test` on your screen. -## Setup an NFS Server for the rootfs of VM2 +## Setup rootfs for VM2 + +### SATA disk + +Burn the rootfs image to an **M.2 SATA** SSD with whatever tools you prefer (e.g. dd, rufus, Balena Etcher, or even a loop mount and rsync), and install it to the back of the board. Specify the proper partition identifier (e.g. `/dev/sda1`) in the DTS bootargs. + +The kernel need built with SCSI disk, libata and AHCI platform support, or the corresponding kernel modules need to be put into the initramfs image. The default config in the Firefly SDK builds them as kernel modules but are not included in the initramfs image, hence the kernel failed to recognize the disk and mount the root partition. + +### NFS-root (optional) + +This works when directly attached storage is not available for VM2. + +Setup an NFS server: ```bash sudo apt install nfs-kernel-server @@ -41,9 +53,9 @@ EOF sudo exportfs -ar ``` -## Compile device tree +Before compiling the DTS, edit the bootargs in `aio-rk3588-jd4-vm2.dts` and specify an NFS root as `root=/dev/nfs nfsroot=:` where `:` is your own NFS server IP and rootfs export path setup in the previous step. -Before compiling the DTS, edit the bootargs in `aio-rk3588-jd4-vm2.dts` and replace `:` with your own NFS server IP and rootfs export path setup in the previous step. +## Compile device tree ```bash dtc -o configs/vms/aio-rk3588-jd4-vm1.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4-vm1.dts @@ -102,5 +114,5 @@ The VM1 output goes to the RS232 on the board (ttyS1 in Linux and serial@feb4000 ## Known Issues -* Resets of the ethernet in VM2 is not working, and reconfigure the NIC (e.g. with NetworkManager) may cause the VM2 to hang. Currently the initramfs will attempt to autoconfig the eth port then mount NFS as the rootfs. You may override the configuration with `ip=` kernel bootarg. +* Resets of the ethernet in VM2 is not working, and reconfigure the NIC (e.g. with NetworkManager) may cause the VM2 to hang. Currently the initramfs will attempt to autoconfig the eth port when NFS-root is used. You may override the configuration with `ip=` kernel bootarg. * Execute `reboot` in either VM would reset the whole board, which may be unexpected for the other VM. You may `shutdown` VM2 first, then do shutdown or reboot in VM1. diff --git a/configs/vms/aio-rk3588-jd4-vm1.dts b/configs/vms/aio-rk3588-jd4-vm1.dts index a1b14c66..a588f4bb 100644 --- a/configs/vms/aio-rk3588-jd4-vm1.dts +++ b/configs/vms/aio-rk3588-jd4-vm1.dts @@ -9427,7 +9427,7 @@ chosen { linux,initrd-end = <0x00 0xaac8000>; - bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait console=ttyS1,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot clk_ignore_unused"; + bootargs = "storagemedia=emmc androidboot.storagemedia=emmc androidboot.mode=normal storagenode=/mmc@fe2e0000 androidboot.verifiedbootstate=orange ro rootwait console=ttyS1,115200n8 irqchip.gicv3_pseudo_nmi=0 root=PARTLABEL=rootfs rootfstype=ext4 overlayroot=device:dev=PARTLABEL=userdata,fstype=ext4,mkfs=1 coherent_pool=1m systemd.gpt_auto=0 cgroup_enable=memory swapaccount=1 net.ifnames=0 rcupdate.rcu_expedited=0 comm-05/28/2025 androidboot.fwver=ddr-v1.15-d5483af87d,spl-v1.13,bl31-v1.44,bl32-v1.15,uboot--boot clk_ignore_unused libata.force=1.00:disable"; linux,initrd-start = <0x00 0xa200000>; phandle = <0x48d>; }; diff --git a/configs/vms/aio-rk3588-jd4-vm2.dts b/configs/vms/aio-rk3588-jd4-vm2.dts index 724c53b5..5fc9d3b2 100644 --- a/configs/vms/aio-rk3588-jd4-vm2.dts +++ b/configs/vms/aio-rk3588-jd4-vm2.dts @@ -11,8 +11,7 @@ chosen { linux,initrd-start = <0x01 0x0a200000>; linux,initrd-end = <0x01 0xaac8000>; - // **Replace : with your own NFS server IP and rootfs export path!** - bootargs = "rw earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=/dev/nfs nfsroot=:"; + bootargs = "rw earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=/dev/sda1"; phandle = <0x48d>; }; @@ -252,6 +251,70 @@ #clock-cells = <0>; phandle = <0x143>; }; + + sata0_aclk_396m { + clock-output-names = "sata0_aclk_396m"; + compatible = "fixed-clock"; + clock-frequency = <396000000>; + #clock-cells = <0>; + phandle = <0x171>; + }; + + sata0_pmalive_24m { + clock-output-names = "sata0_pmalive_24m"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + phandle = <0x16e>; + }; + + sata0_rxoob_50m { + clock-output-names = "sata0_rxoob_50m"; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + phandle = <0x174>; + }; + + sata0_pipephy_ref_24m { + clock-output-names = "sata0_pipephy_ref_24m"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + phandle = <0x163>; + }; + + sata0_pipephy_asic_0 { + clock-output-names = "sata0_pipephy_asic_0"; + compatible = "fixed-clock"; + clock-frequency = <0>; + #clock-cells = <0>; + phandle = <0x17e>; + }; + + phy0_refclk_100m { + clock-output-names = "phy0_refclk_100m"; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + phandle = <0x2bd>; + }; + + phy0_apbclk_100m { + clock-output-names = "phy0_apbclk_100m"; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + phandle = <0x185>; + }; + + phy0_phpclk_150m { + clock-output-names = "phy0_phpclk_150m"; + compatible = "fixed-clock"; + clock-frequency = <150000000>; + #clock-cells = <0>; + phandle = <0x166>; + }; }; serial@feb50000 { @@ -295,6 +358,39 @@ phandle = <0xc8>; }; + syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf\0syscon"; + reg = <0x00 0xfd5bc000 0x00 0x100>; + phandle = <0x194>; + }; + + sata@fe210000 { + phy-names = "sata-phy"; + clock-names = "sata\0pmalive\0rxoob\0ref\0asic"; + interrupts = <0x00 0x111 0x04>; + clocks = <0x171 0x16e 0x174 0x163 0x17e>; + compatible = "rockchip,rk-ahci\0snps,dwc-ahci"; + status = "okay"; + interrupt-names = "hostc"; + phys = <0x108 0x01>; + reg = <0x00 0xfe210000 0x00 0x1000>; + phandle = <0x290>; + ports-implemented = <0x01>; + }; + + phy@fee00000 { + rockchip,pipe-grf = <0x76>; + clock-names = "refclk\0apbclk\0phpclk"; + clocks = <0x2bd 0x185 0x166>; + #phy-cells = <0x01>; + compatible = "rockchip,rk3588-naneng-combphy"; + status = "okay"; + rockchip,pipe-phy-grf = <0x194>; + reg = <0x00 0xfee00000 0x00 0x100>; + phandle = <0x108>; + // resets = <0x02 0x20005 0x02 0x4d6>; + // reset-names = "combphy-apb\0combphy"; + }; ethernet@fe1c0000 { power-domains = <0x60 0x21>; @@ -399,6 +495,10 @@ gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config"; gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config"; + sata0 = "/sata@fe210000"; + sata0m0_pins = "/pinctrl/sata0/sata0m0-pins"; + sata0m1_pins = "/pinctrl/sata0/sata0m1-pins"; + }; syscon@fd5f0000 { @@ -496,6 +596,32 @@ }; }; + sata { + + sata-reset { + rockchip,pins = <0x04 0x11 0x00 0x198>; + phandle = <0x3e7>; + }; + + sata-pins { + rockchip,pins = <0x00 0x16 0x0d 0x198 0x00 0x1c 0x0d 0x198 0x00 0x1d 0x0d 0x198>; + phandle = <0x3e6>; + }; + }; + + sata0 { + + sata0m1-pins { + rockchip,pins = <0x01 0x0b 0x06 0x198>; + phandle = <0x3e9>; + }; + + sata0m0-pins { + rockchip,pins = <0x04 0x0e 0x06 0x198>; + phandle = <0x3e8>; + }; + }; + // output // pull up From c308cfccc1170099960298ebcec02fa18f0c852c Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Thu, 26 Jun 2025 12:00:33 +0800 Subject: [PATCH 59/62] [doc] Fix typo --- Boot-on-rk3588.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index d458d1ab..38a7ef6f 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -62,7 +62,7 @@ dtc -o configs/vms/aio-rk3588-jd4-vm1.dtb -O dtb -I dts configs/vms/aio-rk3588-j dtc -o configs/vms/aio-rk3588-jd4-vm2.dtb -O dtb -I dts configs/vms/aio-rk3588-jd4-vm2.dts ``` -## Prepare Linux kernel bianry +## Prepare Linux kernel binary Prepare RK3588 SDK following manufacturer's instruction, checkout the Linux kernel repository to this branch: https://github.com/arceos-hypervisor/firefly-linux-bsp/tree/axvisor-wip, then build the kernel. From f900a6b15ba6d8dd36524ccc65ed1fe00945774a Mon Sep 17 00:00:00 2001 From: Gallium70 <52118815+Gallium70@users.noreply.github.com> Date: Thu, 26 Jun 2025 12:00:18 +0800 Subject: [PATCH 60/62] [doc/rk3588] Update kernel branch to PREEMT_RT --- Boot-on-rk3588.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Boot-on-rk3588.md b/Boot-on-rk3588.md index 38a7ef6f..58507836 100644 --- a/Boot-on-rk3588.md +++ b/Boot-on-rk3588.md @@ -64,7 +64,7 @@ dtc -o configs/vms/aio-rk3588-jd4-vm2.dtb -O dtb -I dts configs/vms/aio-rk3588-j ## Prepare Linux kernel binary -Prepare RK3588 SDK following manufacturer's instruction, checkout the Linux kernel repository to this branch: https://github.com/arceos-hypervisor/firefly-linux-bsp/tree/axvisor-wip, then build the kernel. +Prepare RK3588 SDK following manufacturer's instruction, checkout the Linux kernel repository to this branch: https://github.com/arceos-hypervisor/firefly-linux-bsp/tree/axvisor-rk3588-jd4-rt89, then build the kernel. This branch has PREEMPT_RT patches and native SCS, SATA and AHCI support, bootable on both VMs. Copy the kernel and ramdisk image to AxVisor directory: From 3d199d2825d75c0164859dfe6e7bc1ca156c8632 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Tue, 1 Jul 2025 22:10:38 +0800 Subject: [PATCH 61/62] cargo.lock updates after merging --- Cargo.lock | 33 +++++++++++++++++++++++---------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index cb066775..111a76d4 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -173,7 +173,7 @@ dependencies = [ "aarch64_sysreg", "arm_vgic", "axaddrspace", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", "axerrno", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", @@ -187,12 +187,12 @@ dependencies = [ [[package]] name = "arm_vgic" version = "0.0.0" +source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=vmm_irq_gicv3#c7ef009489a1c3c71817330ca87365c55fc73426" dependencies = [ - "arm_gicv2", "axaddrspace", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git)", "axerrno", - "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", "bitmaps", "log", "memory_addr", @@ -293,7 +293,7 @@ source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_in dependencies = [ "arm_vgic", "axaddrspace", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", "axerrno", "axvmconfig", "cfg-if", @@ -313,6 +313,18 @@ dependencies = [ "serde", ] +[[package]] +name = "axdevice_base" +version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#00e436cdadf19ddb2c23d044280873072c21325a" +dependencies = [ + "axaddrspace", + "axerrno", + "cfg-if", + "memory_addr", + "serde", +] + [[package]] name = "axdriver" version = "0.1.0" @@ -504,8 +516,9 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" dependencies = [ - "axconfig 0.1.0", + "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", "axhal", "kspin", "lazyinit", @@ -640,7 +653,7 @@ dependencies = [ "axaddrspace", "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api)", "axdevice", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", "axerrno", "axhvc", "axstd", @@ -719,7 +732,7 @@ dependencies = [ "arm_vcpu", "axaddrspace", "axdevice", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", "axerrno", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", "axvmconfig", @@ -1954,7 +1967,7 @@ version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#b240131f84db2ff61d114340c07049dcf20209b4" dependencies = [ "axaddrspace", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", "axerrno", "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", "bit_field", @@ -1978,7 +1991,7 @@ version = "0.1.0" source = "git+https://github.com/arceos-hypervisor/x86_vlapic.git?branch=timer#5ac0b3f1e76efe46b42fb825818e83e801e49ab2" dependencies = [ "axaddrspace", - "axdevice_base", + "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", "axerrno", "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", "bit", From 4e5691692df6f59d1f84f6b41c969aab82dcf397 Mon Sep 17 00:00:00 2001 From: aarkegz Date: Wed, 16 Jul 2025 10:59:27 +0800 Subject: [PATCH 62/62] update all dependencies to merged version --- Cargo.lock | 257 +++++++++----------- Cargo.toml | 16 +- configs/platforms/aarch64-qemu-virt-hv.toml | 6 +- configs/vms/linux-qemu-aarch64-gicv3-a.toml | 10 +- configs/vms/linux-qemu-aarch64-gicv3-b.toml | 9 +- configs/vms/nimbos-riscv64.toml | 2 +- scripts.txt | 22 -- src/hal.rs | 13 +- src/utils/arch/aarch64/cache.rs | 2 +- src/vmm/config.rs | 37 +-- src/vmm/mock.rs | 2 +- src/vmm/mod.rs | 11 +- src/vmm/vcpus.rs | 49 ++-- 13 files changed, 209 insertions(+), 227 deletions(-) delete mode 100644 scripts.txt diff --git a/Cargo.lock b/Cargo.lock index 111a76d4..a933db68 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2,15 +2,6 @@ # It is not intended for manual editing. version = 4 -[[package]] -name = "aarch64-cpu" -version = "9.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ac42a04a61c19fc8196dd728022a784baecc5d63d7e256c01ad1b3fbfab26287" -dependencies = [ - "tock-registers 0.8.1", -] - [[package]] name = "aarch64-cpu" version = "10.0.0" @@ -117,10 +108,10 @@ dependencies = [ [[package]] name = "arceos_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axdriver", "axerrno", "axfeat", @@ -139,7 +130,7 @@ name = "arm-gic-driver" version = "0.13.0" source = "git+https://github.com/rcore-os/arm-gic-driver?rev=ad1fddc194f1cf5b7602e7f35a7136f823465cb0#ad1fddc194f1cf5b7602e7f35a7136f823465cb0" dependencies = [ - "aarch64-cpu 10.0.0", + "aarch64-cpu", "bitflags 2.9.0", "enum_dispatch", "log", @@ -167,37 +158,37 @@ dependencies = [ [[package]] name = "arm_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git?branch=inject_interrupt_vgicv3_ivc#ad1d617150275e40c13804ab3e4a9d123e814104" +source = "git+https://github.com/arceos-hypervisor/arm_vcpu.git#3a406117f8820442963bd963325a2ff6f82bcaca" dependencies = [ - "aarch64-cpu 9.4.0", - "aarch64_sysreg", - "arm_vgic", + "aarch64-cpu", "axaddrspace", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", + "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", - "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "axvcpu", + "axvisor_api", "log", "numeric-enum-macro", "percpu", "spin", - "tock-registers 0.8.1", + "tock-registers 0.9.0", ] [[package]] name = "arm_vgic" version = "0.0.0" -source = "git+https://github.com/arceos-hypervisor/arm_vgic.git?branch=vmm_irq_gicv3#c7ef009489a1c3c71817330ca87365c55fc73426" +source = "git+https://github.com/arceos-hypervisor/arm_vgic.git#75450c6124666b9e39763f6a0110903ecdaa3b8f" dependencies = [ + "aarch64-cpu", + "aarch64_sysreg", "axaddrspace", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git)", + "axdevice_base", "axerrno", - "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", + "axvisor_api", "bitmaps", "log", "memory_addr", "spin", - "tock-registers 0.8.1", + "tock-registers 0.10.0", ] [[package]] @@ -220,7 +211,7 @@ checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "axaddrspace" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#2ed4d076e01f966710bd6480131abd3a9ffb8930" +source = "git+https://github.com/arceos-hypervisor/axaddrspace.git#dcc7ac91ced6c5ff0e56f90caf2ec7a88ef5a6e9" dependencies = [ "axerrno", "bit_field", @@ -238,7 +229,7 @@ dependencies = [ [[package]] name = "axalloc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "allocator", "axerrno", @@ -251,15 +242,7 @@ dependencies = [ [[package]] name = "axconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api#35b7bc57a6cca5ac063a1d7b2748433687660b7c" -dependencies = [ - "axconfig-gen-macros", -] - -[[package]] -name = "axconfig" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axconfig-gen-macros", ] @@ -289,37 +272,28 @@ dependencies = [ [[package]] name = "axdevice" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice.git?branch=inject_interrupt_vgicv3#e806d495f17678ab43389dc6386fd37b317de713" +source = "git+https://github.com/arceos-hypervisor/axdevice.git#17d2b013066d5a7b4e1b1d6b72b025e40b83dcae" dependencies = [ "arm_vgic", "axaddrspace", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", + "axdevice_base", "axerrno", "axvmconfig", "cfg-if", "log", "memory_addr", + "range-alloc", + "spin", ] [[package]] name = "axdevice_base" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt#9e42a6c1714b42d352d7f8c8a146024c29bf3888" -dependencies = [ - "axaddrspace", - "axerrno", - "cfg-if", - "memory_addr", - "serde", -] - -[[package]] -name = "axdevice_base" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#00e436cdadf19ddb2c23d044280873072c21325a" +source = "git+https://github.com/arceos-hypervisor/axdevice_crates.git#a474580797920daebb032870cc3f8ff4edbe88ec" dependencies = [ "axaddrspace", "axerrno", + "axvmconfig", "cfg-if", "memory_addr", "serde", @@ -328,10 +302,10 @@ dependencies = [ [[package]] name = "axdriver" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axdriver_base", "axdriver_block", "axdriver_pci", @@ -386,7 +360,7 @@ dependencies = [ [[package]] name = "axfeat" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axalloc", "axdriver", @@ -403,7 +377,7 @@ dependencies = [ [[package]] name = "axfs" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axdriver", "axdriver_block", @@ -457,14 +431,14 @@ dependencies = [ [[package]] name = "axhal" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ - "aarch64-cpu 10.0.0", + "aarch64-cpu", "arm-gic-driver", "arm_gicv2", "arm_pl011", "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axlog", "bitflags 2.9.0", "cfg-if", @@ -485,7 +459,7 @@ dependencies = [ "page_table_multiarch", "percpu", "raw-cpuid 11.5.0", - "riscv 0.12.1", + "riscv 0.14.0", "riscv_plic", "sbi-rt", "static_assertions", @@ -516,9 +490,9 @@ dependencies = [ [[package]] name = "axipi" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axhal", "kspin", "lazyinit", @@ -529,7 +503,7 @@ dependencies = [ [[package]] name = "axlog" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "cfg-if", "crate_interface", @@ -540,10 +514,10 @@ dependencies = [ [[package]] name = "axmm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axerrno", "axhal", "kspin", @@ -556,7 +530,7 @@ dependencies = [ [[package]] name = "axns" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "crate_interface", "lazyinit", @@ -565,10 +539,10 @@ dependencies = [ [[package]] name = "axruntime" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axalloc", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axdriver", "axfs", "axhal", @@ -586,7 +560,7 @@ dependencies = [ [[package]] name = "axstd" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "arceos_api", "axerrno", @@ -598,7 +572,7 @@ dependencies = [ [[package]] name = "axsync" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ "axtask", "kspin", @@ -607,9 +581,9 @@ dependencies = [ [[package]] name = "axtask" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3#00480405fc3e89f40d6d4263054687ba5918c873" +source = "git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_inject_interrupt#d8410dadec2d8f7d35b34fb7fa108238cfa05fcb" dependencies = [ - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=vmm_irq_gicv3)", + "axconfig", "axhal", "cfg-if", "cpumask", @@ -627,21 +601,11 @@ dependencies = [ [[package]] name = "axvcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt#8a45916dd597ab7473e6693658f66d850f6e0f0e" -dependencies = [ - "axaddrspace", - "axerrno", - "memory_addr", - "percpu", -] - -[[package]] -name = "axvcpu" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc#17cccf90a74a41570d564a42de29d04dfb1c0ab1" +source = "git+https://github.com/arceos-hypervisor/axvcpu.git#0dae892519655342b8c7918460a6208d8c251526" dependencies = [ "axaddrspace", "axerrno", + "axvisor_api", "memory_addr", "percpu", ] @@ -651,14 +615,14 @@ name = "axvisor" version = "0.1.0" dependencies = [ "axaddrspace", - "axconfig 0.1.0 (git+https://github.com/arceos-hypervisor/arceos.git?branch=debin%2Ftimer_api)", + "axconfig", "axdevice", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", + "axdevice_base", "axerrno", "axhvc", "axstd", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", - "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "axvcpu", + "axvisor_api", "axvm", "bitflags 2.9.0", "cfg-if", @@ -684,20 +648,10 @@ dependencies = [ [[package]] name = "axvisor_api" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#4102b0a4d8bce0eef45959ad82fb932aee362841" dependencies = [ "axaddrspace", - "axvisor_api_proc 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", - "crate_interface", - "memory_addr", -] - -[[package]] -name = "axvisor_api" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#ebb860c795a4d2e828b8595dca5ad9dff84e4883" -dependencies = [ - "axvisor_api_proc 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", + "axvisor_api_proc", "crate_interface", "memory_addr", ] @@ -705,18 +659,7 @@ dependencies = [ [[package]] name = "axvisor_api_proc" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt#a40fbf91fe582edae2b1fea274c52aab8804f97d" -dependencies = [ - "proc-macro-crate", - "proc-macro2", - "quote", - "syn 2.0.100", -] - -[[package]] -name = "axvisor_api_proc" -version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#ebb860c795a4d2e828b8595dca5ad9dff84e4883" +source = "git+https://github.com/arceos-hypervisor/axvisor_api.git#4102b0a4d8bce0eef45959ad82fb932aee362841" dependencies = [ "proc-macro-crate", "proc-macro2", @@ -727,14 +670,15 @@ dependencies = [ [[package]] name = "axvm" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvm.git?branch=inject_interrupt_vgicv3_ivc#231eddbab0f7b14b0c1c1a7fa0876dc5878bf124" +source = "git+https://github.com/arceos-hypervisor/axvm.git#93b8ee5bb40c9705f667af783e6da065531f6869" dependencies = [ "arm_vcpu", + "arm_vgic", "axaddrspace", "axdevice", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", + "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", + "axvcpu", "axvmconfig", "cfg-if", "cpumask", @@ -751,9 +695,10 @@ dependencies = [ [[package]] name = "axvmconfig" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/axvmconfig.git#19e73fc71c48c0af49f6fda960c144b297e41435" +source = "git+https://github.com/arceos-hypervisor/axvmconfig.git#6704074b63f79ed904d98cc27cd166779c3546d6" dependencies = [ "axerrno", + "enumerable", "log", "serde", "serde_repr", @@ -1004,6 +949,27 @@ dependencies = [ "syn 2.0.100", ] +[[package]] +name = "enumerable" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d05481ae0c653c7de79f2f62d515b09049fed59cbfc5755a4afe55c95181492b" +dependencies = [ + "enumerable_derive", +] + +[[package]] +name = "enumerable_derive" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ef47b28174f7ef4ccb124c8766565006263114c1cc129cd119a66f1e15635125" +dependencies = [ + "proc-macro-crate", + "proc-macro2", + "quote", + "syn 2.0.100", +] + [[package]] name = "equivalent" version = "1.0.2" @@ -1192,15 +1158,15 @@ dependencies = [ [[package]] name = "memory_addr" -version = "0.3.2" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5438b8df0f13e16e1f46140de247695a95952a5a4479e47197a8711bf1063373" +checksum = "3d4054cba279515fa87761b101d857333ce06391dbe8f18a11347204a7111416" [[package]] name = "memory_set" -version = "0.3.2" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a4552d02c866c57e8b06b919ea8c2f8f398cad245b8f6aac726657bc972d663d" +checksum = "e7d47cbc25a4d00427f9070fd768eaf907f19c903fb72b547b19db2d56b9408e" dependencies = [ "memory_addr", ] @@ -1234,11 +1200,11 @@ checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" [[package]] name = "page_table_entry" -version = "0.5.3" +version = "0.5.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c097d641745a066856a26eed6e486d4430bb3e32c94f1203ea09c63239b360a0" +checksum = "ba811ef8ca8fb33d776e128624cb4fe25c9804cab96f83b822d4322431e6dd5a" dependencies = [ - "aarch64-cpu 10.0.0", + "aarch64-cpu", "bitflags 2.9.0", "memory_addr", "x86_64 0.15.2", @@ -1246,14 +1212,15 @@ dependencies = [ [[package]] name = "page_table_multiarch" -version = "0.5.3" +version = "0.5.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4647889585d29762d747be0916d6d28db72967a697d142be86f187a6b496832a" +checksum = "98cb76e21ce462270afd83b331599d5b83f876c2a98c0a70382b20d73e1da6be" dependencies = [ + "bitmaps", "log", "memory_addr", "page_table_entry", - "riscv 0.12.1", + "riscv 0.14.0", "x86", ] @@ -1323,6 +1290,11 @@ dependencies = [ "proc-macro2", ] +[[package]] +name = "range-alloc" +version = "0.1.4" +source = "git+https://github.com/arceos-hypervisor/range-alloc.git#fc826e54dab9072be5358a1b0e7fc34503d6630d" + [[package]] name = "raw-cpuid" version = "10.7.0" @@ -1415,9 +1387,9 @@ dependencies = [ [[package]] name = "riscv" -version = "0.12.1" +version = "0.14.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5ea8ff73d3720bdd0a97925f0bf79ad2744b6da8ff36be3840c48ac81191d7a7" +checksum = "0f1671c79a01a149fe000af2429ce9ccc8e58cdecda72672355d50e5536b363c" dependencies = [ "critical-section", "embedded-hal", @@ -1433,9 +1405,9 @@ source = "git+https://github.com/KuangjuX/riscv-decode.git#0e346d0ad041987023caa [[package]] name = "riscv-macros" -version = "0.1.0" +version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f265be5d634272320a7de94cea15c22a3bfdd4eb42eb43edc528415f066a1f25" +checksum = "e8c4aa1ea1af6dcc83a61be12e8189f9b293c3ba5a487778a4cd89fb060fdbbc" dependencies = [ "proc-macro2", "quote", @@ -1470,12 +1442,12 @@ dependencies = [ [[package]] name = "riscv_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git?branch=inject_interrupt_vgicv3_ivc#30c743b825778fd740c8e09988872e8a818ffe47" +source = "git+https://github.com/arceos-hypervisor/riscv_vcpu.git#f25f274f88376c2b4a80dcb5549f46a9b4b10559" dependencies = [ "axaddrspace", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt_vgicv3_ivc)", - "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git)", + "axvcpu", + "axvisor_api", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1489,7 +1461,7 @@ dependencies = [ "rustsbi", "sbi-rt", "sbi-spec", - "tock-registers 0.8.1", + "tock-registers 0.9.0", ] [[package]] @@ -1727,6 +1699,12 @@ version = "0.9.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "2b9e2fdb3a1e862c0661768b7ed25390811df1947a8acbfbefe09b47078d93c4" +[[package]] +name = "tock-registers" +version = "0.10.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b0293f99756f16ff352cc78c99673766a305bdb5ed7652e78df649e9967c885a" + [[package]] name = "toml" version = "0.8.14" @@ -1964,12 +1942,13 @@ dependencies = [ [[package]] name = "x86_vcpu" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git?branch=inject_interrupt#b240131f84db2ff61d114340c07049dcf20209b4" +source = "git+https://github.com/arceos-hypervisor/x86_vcpu.git#a18a499bd166088ff05e19805cfe9aafa21aab96" dependencies = [ "axaddrspace", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", + "axdevice_base", "axerrno", - "axvcpu 0.1.0 (git+https://github.com/arceos-hypervisor/axvcpu.git?branch=inject_interrupt)", + "axvcpu", + "axvisor_api", "bit_field", "bitflags 2.9.0", "cfg-if", @@ -1988,17 +1967,17 @@ dependencies = [ [[package]] name = "x86_vlapic" version = "0.1.0" -source = "git+https://github.com/arceos-hypervisor/x86_vlapic.git?branch=timer#5ac0b3f1e76efe46b42fb825818e83e801e49ab2" +source = "git+https://github.com/arceos-hypervisor/x86_vlapic.git#1f3edfb03f9ac99bfe567b73fb59779eaac32235" dependencies = [ "axaddrspace", - "axdevice_base 0.1.0 (git+https://github.com/arceos-hypervisor/axdevice_crates.git?branch=inject_interrupt)", + "axdevice_base", "axerrno", - "axvisor_api 0.1.0 (git+https://github.com/arceos-hypervisor/axvisor_api.git?branch=inject_interrupt)", + "axvisor_api", "bit", "log", "memory_addr", "paste", - "tock-registers 0.9.0", + "tock-registers 0.10.0", ] [[package]] diff --git a/Cargo.toml b/Cargo.toml index 911ab8b7..9d10ab99 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -24,7 +24,7 @@ lazyinit = "0.2" timer_list = "0.1.0" # System dependent modules provided by ArceOS. -axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_irq_gicv3", features = [ +axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_inject_interrupt", features = [ "alloc", "paging", # "fs", @@ -38,8 +38,8 @@ axstd = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm ] } # System dependent modules provided by ArceOS-Hypervisor. -axvm = { git = "https://github.com/arceos-hypervisor/axvm.git", branch = "inject_interrupt_vgicv3_ivc" } -axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git", branch = "inject_interrupt_vgicv3_ivc" } +axvm = { git = "https://github.com/arceos-hypervisor/axvm.git" } +axvcpu = { git = "https://github.com/arceos-hypervisor/axvcpu.git" } axaddrspace = { git = "https://github.com/arceos-hypervisor/axaddrspace.git" } axhvc = { git = "https://github.com/arceos-hypervisor/axhvc.git" } @@ -48,20 +48,20 @@ crate_interface = "0.1" axerrno = "0.1.0" cpumask = "0.1.0" kernel_guard = "0.1" -memory_addr = "0.3" +memory_addr = "0.4" page_table_entry = { version = "0.5", features = ["arm-el2"] } page_table_multiarch = "0.5" percpu = { version = "0.2", features = ["arm-el2"] } -axdevice = { git = "https://github.com/arceos-hypervisor/axdevice.git", branch = "inject_interrupt_vgicv3" } -axdevice_base = { git = "https://github.com/arceos-hypervisor/axdevice_crates.git", branch = "inject_interrupt" } -axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git", branch = "inject_interrupt" } +axdevice = { git = "https://github.com/arceos-hypervisor/axdevice.git" } +axdevice_base = { git = "https://github.com/arceos-hypervisor/axdevice_crates.git" } +axvisor_api = { git = "https://github.com/arceos-hypervisor/axvisor_api.git" } fdt-parser = "0.4" [build-dependencies] toml = { git = "https://github.com/arceos-hypervisor/toml.git", branch = "no_std" } -axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "debin/timer_api" } +axconfig = { git = "https://github.com/arceos-hypervisor/arceos.git", branch = "vmm_inject_interrupt" } prettyplease = "0.2" quote = "1.0" syn = "2.0" diff --git a/configs/platforms/aarch64-qemu-virt-hv.toml b/configs/platforms/aarch64-qemu-virt-hv.toml index c90efbe4..7192d01a 100644 --- a/configs/platforms/aarch64-qemu-virt-hv.toml +++ b/configs/platforms/aarch64-qemu-virt-hv.toml @@ -91,8 +91,7 @@ pci-ranges = [ [0x80_0000_0000, 0x80_0000_0000], # 64-bit MMIO space ] # [(uint, uint)] # UART Address -uart-paddr = 0x0904_0000 # uint -# uart-paddr = 0x0900_0000 # uint +uart-paddr = 0x0900_0000 # uint # UART IRQ number uart-irq = 1 # uint @@ -103,6 +102,9 @@ gicd-paddr = 0x0800_0000 # uint gicv-paddr = 0x0804_0000 # uint gich-paddr = 0x0803_0000 # uint +# GIC Redistributor base address +gicr-paddr = 0x080a_0000 + # PSCI psci-method = "smc" # str diff --git a/configs/vms/linux-qemu-aarch64-gicv3-a.toml b/configs/vms/linux-qemu-aarch64-gicv3-a.toml index 93f90902..92e244a6 100644 --- a/configs/vms/linux-qemu-aarch64-gicv3-a.toml +++ b/configs/vms/linux-qemu-aarch64-gicv3-a.toml @@ -49,7 +49,7 @@ dtb_load_addr = 0x8000_0000 # Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ - [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL + # [0x8000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL ] # @@ -73,4 +73,10 @@ passthrough_devices = [ # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] \ No newline at end of file +emu_devices = [ + ["gppt-gicd", 0x0800_0000, 0x1_0000, 0, 0x21, []], + ["gppt-gicr", 0x080a_0000, 0x2_0000, 0, 0x20, [1, 0x2_0000, 0]], # 1 vcpu, stride 0x20000, starts with pcpu 0 + ["gppt-gits", 0x0808_0000, 0x2_0000, 0, 0x22, [0x0808_0000]], # host_gits_base +] + +interrupt_mode = "passthrough" diff --git a/configs/vms/linux-qemu-aarch64-gicv3-b.toml b/configs/vms/linux-qemu-aarch64-gicv3-b.toml index bfa38d10..0cfadd40 100644 --- a/configs/vms/linux-qemu-aarch64-gicv3-b.toml +++ b/configs/vms/linux-qemu-aarch64-gicv3-b.toml @@ -52,7 +52,7 @@ bios_load_addr = 0xfe00_0000 # Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`). # For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`. memory_regions = [ - [0xc000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL + # [0xc000_0000, 0x4000_0000, 0x7, 1], # System RAM 1G MAP_IDENTICAL ] # @@ -77,4 +77,9 @@ passthrough_devices = [ # Emu_devices. # Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig. -emu_devices = [] \ No newline at end of file +emu_devices = [ + ["gppt-gicd", 0x0800_0000, 0x1_0000, 0, 0x21, []], + ["gppt-gicr", 0x080c_0000, 0x2_0000, 0, 0x20, [1, 0x2_0000, 1]], # 1 vcpu, stride 0x20000 +] + +interrupt_mode = "passthrough" \ No newline at end of file diff --git a/configs/vms/nimbos-riscv64.toml b/configs/vms/nimbos-riscv64.toml index 6c29657c..381c194f 100644 --- a/configs/vms/nimbos-riscv64.toml +++ b/configs/vms/nimbos-riscv64.toml @@ -20,7 +20,7 @@ phys_cpu_sets = [1] entry_point = 0x9020_0000 # The location of image: "memory" | "fs". # Load from file system. -image_location = "fs" +image_location = "memory" # The file path of the kernel image. kernel_path = "nimbos-riscv64.bin" # The load address of the kernel image. diff --git a/scripts.txt b/scripts.txt deleted file mode 100644 index bb3369e9..00000000 --- a/scripts.txt +++ /dev/null @@ -1,22 +0,0 @@ - -# 原版双VM -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml:configs/vms/arceos-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y - -# 原版单VM -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml GICV3=y NET=y SMP=2 run DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4.img SECOND_SERIAL=y - -# 单VM：去掉NET，去掉第二个串口 -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64.toml GICV3=y SMP=2 DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run - -# 单VM：使用第二个串口 -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64-gicv3-a.toml GICV3=y SMP=1 SECOND_SERIAL=y DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run QEMU=/home/smx/source/3rd/qemu-9.2.4/build/qemu-system-aarch64 - -# 单VM：使用第二个串口，SMP2 -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64-gicv3-a.toml GICV3=y SMP=2 SECOND_SERIAL=y DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run QEMU=/home/smx/source/3rd/qemu-9.2.4/build/qemu-system-aarch64 - -# 双VM：三串口配置 -make ARCH=aarch64 LOG=debug VM_CONFIGS=configs/vms/linux-qemu-aarch64-gicv3-a.toml:configs/vms/linux-qemu-aarch64-gicv3-b.toml GICV3=y SMP=2 SECOND_SERIAL=y THIRD_SERIAL=y DISK_IMG=/home/smx/source/lectures/arceos-repos/axvisor/ubuntu-22.04-rootfs_ext4-a.img run QEMU=/home/smx/source/3rd/qemu-9.2.4/build/qemu-system-aarch64 - -# GICv3 EL1测试 -make ACCEL=n ARCH=aarch64 LOG=info VM_CONFIGS=configs/vms/arceos-aarch64-gicv3-tester.toml GICV3=y LOG=debug run - diff --git a/src/hal.rs b/src/hal.rs index d1b5f060..1717f805 100644 --- a/src/hal.rs +++ b/src/hal.rs @@ -139,7 +139,10 @@ pub(crate) fn enable_virtualization() { "Initialize CPU affinity failed!" ); - info!("Enabling hardware virtualization support on core {}", cpu_id); + info!( + "Enabling hardware virtualization support on core {}", + cpu_id + ); vmm::init_timer_percpu(); @@ -276,22 +279,20 @@ mod arch_api_impl { // use axstd::os::arceos::modules::axhal::irq::MyVgic; // MyVgic::get_gicd().lock().get_typer() - use std::os::arceos::modules::{axconfig, axhal}; use memory_addr::pa; + use std::os::arceos::modules::{axconfig, axhal}; let typer_phys_addr = axconfig::devices::GICD_PADDR + 0x4; let typer_virt_addr = axhal::mem::phys_to_virt(pa!(typer_phys_addr)); - unsafe { - core::ptr::read_volatile(typer_virt_addr.as_ptr_of::()) - } + unsafe { core::ptr::read_volatile(typer_virt_addr.as_ptr_of::()) } } #[cfg(target_arch = "aarch64")] extern fn read_vgicd_iidr() -> u32 { // use axstd::os::arceos::modules::axhal::irq::MyVgic; // MyVgic::get_gicd().lock().get_iidr() -0 + 0 } #[cfg(target_arch = "aarch64")] diff --git a/src/utils/arch/aarch64/cache.rs b/src/utils/arch/aarch64/cache.rs index 594776ad..f8750672 100644 --- a/src/utils/arch/aarch64/cache.rs +++ b/src/utils/arch/aarch64/cache.rs @@ -2,7 +2,7 @@ use core::arch::global_asm; global_asm!(include_str!("cache.S")); -unsafe extern "C" { +unsafe extern { /// Invalidate the data cache. pub unsafe fn cache_invalidate_d(start: usize, len: usize); /// Clean and invalidate the data cache. diff --git a/src/vmm/config.rs b/src/vmm/config.rs index 3ba3581b..d65805af 100644 --- a/src/vmm/config.rs +++ b/src/vmm/config.rs @@ -62,8 +62,12 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { vm_cfg.add_memory_region(VmMemConfig { gpa: region.address as usize, size: region.size as usize, - flags: (MappingFlags::READ | MappingFlags::WRITE | MappingFlags::EXECUTE).bits(), - map_type: VmMemMappingType::MapIentical, + flags: (MappingFlags::READ + | MappingFlags::WRITE + | MappingFlags::EXECUTE + | MappingFlags::USER) + .bits(), + map_type: VmMemMappingType::MapIdentical, }); } } @@ -95,7 +99,10 @@ pub fn parse_vm_dtb(vm_cfg: &mut AxVMConfig, dtb: &[u8]) { // Skip the interrupt controller, as we will use vGIC // TODO: filter with compatible property and parse its phandle from DT; maybe needs a second pass? const GIC_PHANDLE: usize = 1; - if name.starts_with("interrupt-controller") { + if name.starts_with("interrupt-controller") + || name.starts_with("intc") + || name.starts_with("its") + { info!("skipping node {} to use vGIC", name); continue; } @@ -226,29 +233,7 @@ pub fn init_guest_vms() { info!("Creating VM[{}] {:?}", vm_config.id(), vm_config.name()); // Create VM. - // let vm = VM::new(vm_config).expect("Failed to create VM"); - // %%% temp action! - let vm = VM::temp_new_with_device_adder(vm_config, |devices| { - let mock_timer = super::mock::MockTimer::new(); - let mock_timer = alloc::sync::Arc::new(mock_timer); - - // devices.add_mmio_dev(mock_timer.clone()); - - // use std::os::arceos::modules::axhal; - - // fn schedule_next(action: impl Fn() + Send + Sync + 'static) { - // super::timer::register_timer(axhal::time::monotonic_time_nanos() + 1_000_000_000, move |time| { - // info!("Timer fired at {:?}", time); - // action(); - // schedule_next(action); - // }); - // } - - // schedule_next(move || { - // mock_timer.tick(); - // }); - }) - .expect("Failed to create VM"); + let vm = VM::new(vm_config).expect("Failed to create VM"); push_vm(vm.clone()); // Load corresponding images for VM. diff --git a/src/vmm/mock.rs b/src/vmm/mock.rs index 315c3789..1c99a01d 100644 --- a/src/vmm/mock.rs +++ b/src/vmm/mock.rs @@ -14,7 +14,7 @@ pub struct MockTimer { impl BaseDeviceOps for MockTimer { fn emu_type(&self) -> axdevice_base::EmuDeviceType { - axdevice_base::EmuDeviceType::EmuDeviceTConsole // just a placeholder + axdevice_base::EmuDeviceType::Dummy // just a placeholder } fn address_range(&self) -> GuestPhysAddrRange { diff --git a/src/vmm/mod.rs b/src/vmm/mod.rs index 982fce8f..f75e710c 100644 --- a/src/vmm/mod.rs +++ b/src/vmm/mod.rs @@ -1,15 +1,20 @@ mod config; mod hvc; mod images; +mod ivc; mod mock; pub mod timer; -mod ivc; mod vcpus; mod vm_list; - use core::sync::atomic::{AtomicUsize, Ordering}; -use std::os::arceos::{api::task::{self, AxWaitQueueHandle}, modules::{axhal, axtask::{self, TaskExtRef}}}; +use std::os::arceos::{ + api::task::{self, AxWaitQueueHandle}, + modules::{ + axhal, + axtask::{self, TaskExtRef}, + }, +}; use axerrno::{AxResult, ax_err_type}; diff --git a/src/vmm/vcpus.rs b/src/vmm/vcpus.rs index 71912431..6f3f2b55 100644 --- a/src/vmm/vcpus.rs +++ b/src/vmm/vcpus.rs @@ -1,10 +1,21 @@ use alloc::{collections::BTreeMap, vec::Vec}; -use core::sync::atomic::{AtomicUsize, Ordering}; -use std::os::arceos::{api::{self, task::{ax_wait_queue_wake, AxCpuMask}}, modules::{axhal, axtask}}; +use core::{ + sync::atomic::{AtomicUsize, Ordering}, + time::Duration, +}; +use std::os::arceos::{ + api::{ + self, + task::{AxCpuMask, ax_wait_queue_wake}, + }, + modules::{ + axhal::{self, time::busy_wait}, + axtask, + }, +}; use axaddrspace::GuestPhysAddr; -use axstd::sync::atomic::{AtomicUsize, Ordering}; use axtask::{AxTaskRef, TaskExtRef, TaskInner, WaitQueue}; use axvcpu::{AxVCpuExitReason, VCpuState}; @@ -393,9 +404,17 @@ fn vcpu_run() { warn!("VM[{}] run VCpu[{}] SystemDown", vm_id, vcpu_id); vm.shutdown().expect("VM shutdown failed"); } - AxVCpuExitReason::SendIPI { target_cpu, target_cpu_aux, send_to_all, send_to_self, vector } => { + AxVCpuExitReason::SendIPI { + target_cpu, + target_cpu_aux, + send_to_all, + send_to_self, + vector, + } => { if send_to_all || send_to_self { - unimplemented!("SendIPI with send_to_all or send_to_self is not implemented yet"); + unimplemented!( + "SendIPI with send_to_all or send_to_self is not implemented yet" + ); } #[cfg(target_arch = "aarch64")] @@ -405,13 +424,12 @@ fn vcpu_run() { let aff1 = (target_cpu >> 8) & 0xff; let irm = (send_to_all as u64); - let icc_sgi1r_value = - (vector as u64) << 24 | - aff3 << 48 | - aff2 << 32 | - aff1 << 16 | - irm << 40 | - target_cpu_aux; + let icc_sgi1r_value = (vector as u64) << 24 + | aff3 << 48 + | aff2 << 32 + | aff1 << 16 + | irm << 40 + | target_cpu_aux; debug!( "VM[{}] run VCpu[{}] SendIPI, target_cpu={:#x}, target_cpu_aux={:#x}, vector={}, icc_sgi1r_value={:#x}", @@ -427,8 +445,11 @@ fn vcpu_run() { } } } - _ => { - warn!("Unhandled VM-Exit"); + e => { + warn!( + "VM[{}] run VCpu[{}] unhandled vmexit: {:?}", + vm_id, vcpu_id, e + ); } }, Err(err) => {