@@ -34,7 +34,7 @@ A5 PC5 PD5
3434
3535#define PORTD_OFFSET 0
3636#define PORTB_OFFSET 8
37- #define PORTC_OFFSET 16
37+ #define PORTC_OFFSET 14
3838
3939#undef PORTA
4040#undef PORTB
@@ -94,9 +94,9 @@ pinPort mapping[20] = {
9494/* * DDR Classes**/
9595class DDRClass {
9696 public:
97- DDRClass (uint8_t _offset):offset(_offset){}
97+ DDRClass (uint8_t _offset, uint8_t _limit ):offset(_offset),limit(_limit ){}
9898 DDRClass& operator =(int value){
99- for (int i=0 ; i<6 ; i++) {
99+ for (int i=0 ; i<limit ; i++) {
100100 if (value & (1 << i)) {
101101 mapping[i + offset].port ->DIR |= ( 1 << mapping[i + offset].pin );
102102 } else {
@@ -106,19 +106,19 @@ class DDRClass {
106106 return *this ;
107107 }
108108 private:
109- uint8_t offset;
109+ uint8_t offset, limit ;
110110};
111111
112- DDRClass DDRB (PORTB_OFFSET);
113- DDRClass DDRC (PORTC_OFFSET);
114- DDRClass DDRD (PORTD_OFFSET);
112+ DDRClass DDRB (PORTB_OFFSET, 6 );
113+ DDRClass DDRC (PORTC_OFFSET, 6 );
114+ DDRClass DDRD (PORTD_OFFSET, 8 );
115115
116116/* * PORT Classes**/
117117class PORTClass {
118118 public:
119- PORTClass (uint8_t _offset):offset(_offset){}
119+ PORTClass (uint8_t _offset, uint8_t _limit ):offset(_offset),limit(_limit ){}
120120 PORTClass& operator =(int value){
121- for (int i=0 ; i<6 ; i++) {
121+ for (int i=0 ; i<limit ; i++) {
122122 if (value & (1 << i)) {
123123#ifdef COMPATIBILITY_DEBUG
124124 printPortAndPin ((int ) mapping[i + offset].port , mapping[i + offset].pin , true );
@@ -134,9 +134,9 @@ class PORTClass {
134134 return *this ;
135135 }
136136 private:
137- uint8_t offset;
137+ uint8_t offset, limit ;
138138};
139139
140- PORTClass PORTB (PORTB_OFFSET);
141- PORTClass PORTC (PORTC_OFFSET);
142- PORTClass PORTD (PORTD_OFFSET);
140+ PORTClass PORTB (PORTB_OFFSET, 6 );
141+ PORTClass PORTC (PORTC_OFFSET, 6 );
142+ PORTClass PORTD (PORTD_OFFSET, 8 );
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