diff --git a/components/asic/CMakeLists.txt b/components/asic/CMakeLists.txt index df9403cb1..d080f21e1 100644 --- a/components/asic/CMakeLists.txt +++ b/components/asic/CMakeLists.txt @@ -1,5 +1,6 @@ idf_component_register( SRCS + "bm1340.c" "bm1370.c" "bm1368.c" "bm1366.c" diff --git a/components/asic/asic.c b/components/asic/asic.c index 3310577aa..f5a175c0c 100644 --- a/components/asic/asic.c +++ b/components/asic/asic.c @@ -6,6 +6,7 @@ #include "bm1366.h" #include "bm1368.h" #include "bm1370.h" +#include "bm1340.h" #include "asic.h" #include "device_config.h" @@ -28,7 +29,9 @@ uint8_t ASIC_init(GlobalState * GLOBAL_STATE) return BM1368_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->DEVICE_CONFIG.family.asic_count, GLOBAL_STATE->DEVICE_CONFIG.family.asic.difficulty); case BM1370: return BM1370_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->DEVICE_CONFIG.family.asic_count, GLOBAL_STATE->DEVICE_CONFIG.family.asic.difficulty); - } + case BM1340: + return BM1340_init(GLOBAL_STATE->POWER_MANAGEMENT_MODULE.frequency_value, GLOBAL_STATE->DEVICE_CONFIG.family.asic_count, GLOBAL_STATE->DEVICE_CONFIG.family.asic.difficulty); + } return ESP_OK; } @@ -43,7 +46,9 @@ task_result * ASIC_process_work(GlobalState * GLOBAL_STATE) return BM1368_process_work(GLOBAL_STATE); case BM1370: return BM1370_process_work(GLOBAL_STATE); - } + case BM1340: + return BM1340_process_work(GLOBAL_STATE); + } return NULL; } @@ -58,6 +63,8 @@ int ASIC_set_max_baud(GlobalState * GLOBAL_STATE) return BM1368_set_max_baud(); case BM1370: return BM1370_set_max_baud(); + case BM1340: + return BM1340_set_max_baud(); } return 0; } @@ -77,6 +84,9 @@ void ASIC_send_work(GlobalState * GLOBAL_STATE, void * next_job) case BM1370: BM1370_send_work(GLOBAL_STATE, next_job); break; + case BM1340: + BM1340_send_work(GLOBAL_STATE, next_job); + break; } } @@ -95,6 +105,9 @@ void ASIC_set_version_mask(GlobalState * GLOBAL_STATE, uint32_t mask) case BM1370: BM1370_set_version_mask(mask); break; + case BM1340: + BM1340_set_version_mask(mask); + break; } } @@ -113,6 +126,9 @@ bool ASIC_set_frequency(GlobalState * GLOBAL_STATE, float frequency) case BM1370: do_frequency_transition(frequency, BM1370_send_hash_frequency); return true; + case BM1340: + do_frequency_transition(frequency, BM1340_send_hash_frequency); + return true; } return false; } @@ -127,6 +143,7 @@ double ASIC_get_asic_job_frequency_ms(GlobalState * GLOBAL_STATE) return 2000; case BM1368: case BM1370: + case BM1340: return 500; } return 500; diff --git a/components/asic/bm1340.c b/components/asic/bm1340.c new file mode 100644 index 000000000..b8cc6f5fd --- /dev/null +++ b/components/asic/bm1340.c @@ -0,0 +1,352 @@ +#include "bm1340.h" + +#include "crc.h" +#include "global_state.h" +#include "serial.h" +#include "utils.h" + +#include "esp_log.h" +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "frequency_transition_bmXX.h" +#include "pll.h" + +#include +#include +#include +#include +#include +#include + +#define BM1340_CHIP_ID 0x1340 +#define BM1340_CHIP_ID_RESPONSE_LENGTH 11 + +#define TYPE_JOB 0x20 +#define TYPE_CMD 0x40 + +#define GROUP_SINGLE 0x00 +#define GROUP_ALL 0x10 + +#define CMD_SETADDRESS 0x00 +#define CMD_WRITE 0x01 +#define CMD_READ 0x02 +#define CMD_INACTIVE 0x03 + +#define MISC_CONTROL 0x18 + +typedef struct __attribute__((__packed__)) +{ + uint16_t preamble; + uint32_t nonce; + uint8_t midstate_num; + uint8_t job_id; + uint16_t version; + uint8_t crc; +} bm1340_asic_result_t; + +static const char * TAG = "bm1340"; + +static task_result result; + +/// @brief +/// @param ftdi +/// @param header +/// @param data +/// @param len +static void _send_BM1340(uint8_t header, uint8_t * data, uint8_t data_len, bool debug) +{ + packet_type_t packet_type = (header & TYPE_JOB) ? JOB_PACKET : CMD_PACKET; + uint8_t total_length = (packet_type == JOB_PACKET) ? (data_len + 6) : (data_len + 5); + + // allocate memory for buffer + unsigned char * buf = malloc(total_length); + + // add the preamble + buf[0] = 0x55; + buf[1] = 0xAA; + + // add the header field + buf[2] = header; + + // add the length field + buf[3] = (packet_type == JOB_PACKET) ? (data_len + 4) : (data_len + 3); + + // add the data + memcpy(buf + 4, data, data_len); + + // add the correct crc type + if (packet_type == JOB_PACKET) { + uint16_t crc16_total = crc16_false(buf + 2, data_len + 2); + buf[4 + data_len] = (crc16_total >> 8) & 0xFF; + buf[5 + data_len] = crc16_total & 0xFF; + } else { + buf[4 + data_len] = crc5(buf + 2, data_len + 2); + } + + // send serial data + if (SERIAL_send(buf, total_length, debug) == 0) { + ESP_LOGE(TAG, "Failed to send data to BM1340"); + } + + free(buf); +} + +static void _send_simple(uint8_t * data, uint8_t total_length) +{ + unsigned char * buf = malloc(total_length); + memcpy(buf, data, total_length); + SERIAL_send(buf, total_length, BM1340_SERIALTX_DEBUG); + + free(buf); +} + +static void _send_chain_inactive(void) +{ + + unsigned char read_address[2] = {0x00, 0x00}; + // send serial data + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_INACTIVE), read_address, 2, BM1340_SERIALTX_DEBUG); +} + +static void _set_chip_address(uint8_t chipAddr) +{ + + unsigned char read_address[2] = {chipAddr, 0x00}; + // send serial data + _send_BM1340((TYPE_CMD | GROUP_SINGLE | CMD_SETADDRESS), read_address, 2, BM1340_SERIALTX_DEBUG); +} + +void BM1340_set_version_mask(uint32_t version_mask) +{ + int versions_to_roll = version_mask >> 13; + uint8_t version_byte0 = (versions_to_roll >> 8); + uint8_t version_byte1 = (versions_to_roll & 0xFF); + uint8_t version_cmd[] = {0x00, 0xA4, 0x90, 0x00, version_byte0, version_byte1}; + _send_BM1340(TYPE_CMD | GROUP_ALL | CMD_WRITE, version_cmd, 6, BM1340_SERIALTX_DEBUG); +} + +void BM1340_send_hash_frequency(float target_freq) +{ + uint8_t fb_divider, refdiv, postdiv1, postdiv2; + float frequency; + + pll_get_parameters(target_freq, 160, 239, &fb_divider, &refdiv, &postdiv1, &postdiv2, &frequency); + + uint8_t vdo_scale = (fb_divider * FREQ_MULT / refdiv >= 2400) ? 0x50 : 0x40; + uint8_t postdiv = (((postdiv1 - 1) & 0xf) << 4) | ((postdiv2 - 1) & 0xf); + uint8_t freqbuf[6] = {0x00, 0x08, vdo_scale, fb_divider, refdiv, postdiv}; + + _send_BM1340(TYPE_CMD | GROUP_ALL | CMD_WRITE, freqbuf, 6, BM1340_SERIALTX_DEBUG); + + ESP_LOGI(TAG, "Setting Frequency to %g MHz (%g)", target_freq, frequency); +} + +uint8_t BM1340_init(float frequency, uint16_t asic_count, uint16_t difficulty) +{ + // set version mask + for (int i = 0; i < 3; i++) { + BM1340_set_version_mask(STRATUM_DEFAULT_VERSION_MASK); + } + + //read register 00 on all chips (should respond AA 55 13 68 00 00 00 00 00 00 0F) + unsigned char init3[7] = {0x55, 0xAA, 0x52, 0x05, 0x00, 0x00, 0x0A}; + _send_simple(init3, 7); + + int chip_counter = count_asic_chips(asic_count, BM1340_CHIP_ID, BM1340_CHIP_ID_RESPONSE_LENGTH); + + if (chip_counter == 0) { + return 0; + } + + // set version mask + BM1340_set_version_mask(STRATUM_DEFAULT_VERSION_MASK); + + //Reg_A8 + //unsigned char init5[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0xA8, 0x00, 0x07, 0x00, 0x00, 0x03}; + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0xA8, 0x00, 0x07, 0x00, 0x00}, 6, BM1340_SERIALTX_DEBUG); + + //Misc Control + //TX: 55 AA 51 09 [00 18 F0 00 C1 00] 04 //command all chips, write chip address 00, register 18, data F0 00 C1 00 - Misc Control + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x18, 0xF0, 0x00, 0xC1, 0x00}, 6, BM1340_SERIALTX_DEBUG); //from S21Pro dump + //_send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x18, 0xFF, 0x0F, 0xC1, 0x00}, 6, BM1340_SERIALTX_DEBUG); //from S21 dump + + //chain inactive + _send_chain_inactive(); + // unsigned char init7[7] = {0x55, 0xAA, 0x53, 0x05, 0x00, 0x00, 0x03}; + // _send_simple(init7, 7); + + // split the chip address space evenly + uint8_t address_interval = (uint8_t) (256 / chip_counter); + for (uint8_t i = 0; i < chip_counter; i++) { + _set_chip_address(i * address_interval); + // unsigned char init8[7] = {0x55, 0xAA, 0x40, 0x05, 0x00, 0x00, 0x1C}; + // _send_simple(init8, 7); + } + + //Core Register Control + //unsigned char init9[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x3C, 0x80, 0x00, 0x8B, 0x00, 0x12}; + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x3C, 0x80, 0x00, 0x8B, 0x00}, 6, BM1340_SERIALTX_DEBUG); + + //Core Register Control + //TX: 55 AA 51 09 [00 3C 80 00 80 0C] 11 //command all chips, write chip address 00, register 3C, data 80 00 80 0C - Core Register Control + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x3C, 0x80, 0x00, 0x80, 0x0C}, 6, BM1340_SERIALTX_DEBUG); //from S21Pro dump + //_send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x3C, 0x80, 0x00, 0x80, 0x18}, 6, BM1340_SERIALTX_DEBUG); //from S21 dump + + //set difficulty mask + uint8_t difficulty_mask[6]; + get_difficulty_mask(difficulty, difficulty_mask); + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), difficulty_mask, 6, BM1340_SERIALTX_DEBUG); + + //Analog Mux Control -- not sent on S21 Pro? + // unsigned char init12[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x54, 0x00, 0x00, 0x00, 0x03, 0x1D}; + // _send_simple(init12, 11); + + //Set the IO Driver Strength on chip 00 + //TX: 55 AA 51 09 [00 58 00 01 11 11] 0D //command all chips, write chip address 00, register 58, data 01 11 11 11 - Set the IO Driver Strength on chip 00 + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x58, 0x00, 0x01, 0x11, 0x11}, 6, BM1340_SERIALTX_DEBUG); //from S21Pro dump + //_send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x58, 0x02, 0x11, 0x11, 0x11}, 6, BM1340_SERIALTX_DEBUG); //from S21Pro dump + + + for (uint8_t i = 0; i < chip_counter; i++) { + //TX: 55 AA 41 09 00 [A8 00 07 01 F0] 15 // Reg_A8 + unsigned char set_a8_register[6] = {i * address_interval, 0xA8, 0x00, 0x07, 0x01, 0xF0}; + _send_BM1340((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_a8_register, 6, BM1340_SERIALTX_DEBUG); + //TX: 55 AA 41 09 00 [18 F0 00 C1 00] 0C // Misc Control + unsigned char set_18_register[6] = {i * address_interval, 0x18, 0xF0, 0x00, 0xC1, 0x00}; + _send_BM1340((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_18_register, 6, BM1340_SERIALTX_DEBUG); + //TX: 55 AA 41 09 00 [3C 80 00 8B 00] 1A // Core Register Control + unsigned char set_3c_register_first[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x8B, 0x00}; + _send_BM1340((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_first, 6, BM1340_SERIALTX_DEBUG); + //TX: 55 AA 41 09 00 [3C 80 00 80 0C] 19 // Core Register Control + unsigned char set_3c_register_second[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x80, 0x0C}; + _send_BM1340((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_second, 6, BM1340_SERIALTX_DEBUG); + //TX: 55 AA 41 09 00 [3C 80 00 82 AA] 05 // Core Register Control + unsigned char set_3c_register_third[6] = {i * address_interval, 0x3C, 0x80, 0x00, 0x82, 0xAA}; + _send_BM1340((TYPE_CMD | GROUP_SINGLE | CMD_WRITE), set_3c_register_third, 6, BM1340_SERIALTX_DEBUG); + } + + //Some misc settings? + // TX: 55 AA 51 09 [00 B9 00 00 44 80] 0D //command all chips, write chip address 00, register B9, data 00 00 44 80 + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0xB9, 0x00, 0x00, 0x44, 0x80}, 6, BM1340_SERIALTX_DEBUG); + // TX: 55 AA 51 09 [00 54 00 00 00 02] 18 //command all chips, write chip address 00, register 54, data 00 00 00 02 - Analog Mux Control - rumored to control the temp diode + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x54, 0x00, 0x00, 0x00, 0x02}, 6, BM1340_SERIALTX_DEBUG); + // TX: 55 AA 51 09 [00 B9 00 00 44 80] 0D //command all chips, write chip address 00, register B9, data 00 00 44 80 -- duplicate of first command in series + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0xB9, 0x00, 0x00, 0x44, 0x80}, 6, BM1340_SERIALTX_DEBUG); + // TX: 55 AA 51 09 [00 3C 80 00 8D EE] 1B //command all chips, write chip address 00, register 3C, data 80 00 8D EE + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), (uint8_t[]){0x00, 0x3C, 0x80, 0x00, 0x8D, 0xEE}, 6, BM1340_SERIALTX_DEBUG); + + //ramp up the hash frequency + do_frequency_transition(frequency, BM1340_send_hash_frequency); + + //register 10 is still a bit of a mystery. discussion: https://github.com/bitaxeorg/ESP-Miner/pull/167 + + // unsigned char set_10_hash_counting[6] = {0x00, 0x10, 0x00, 0x00, 0x11, 0x5A}; //S19k Pro Default + // unsigned char set_10_hash_counting[6] = {0x00, 0x10, 0x00, 0x00, 0x14, 0x46}; //S19XP-Luxos Default + // unsigned char set_10_hash_counting[6] = {0x00, 0x10, 0x00, 0x00, 0x15, 0x1C}; //S19XP-Stock Default + //unsigned char set_10_hash_counting[6] = {0x00, 0x10, 0x00, 0x00, 0x15, 0xA4}; //S21-Stock Default + unsigned char set_10_hash_counting[6] = {0x00, 0x10, 0x00, 0x00, 0x1E, 0xB5}; //S21 Pro-Stock Default + // unsigned char set_10_hash_counting[6] = {0x00, 0x10, 0x00, 0x0F, 0x00, 0x00}; //supposedly the "full" 32bit nonce range + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), set_10_hash_counting, 6, BM1340_SERIALTX_DEBUG); + + return chip_counter; +} + +// static void _send_read_address(void) +// { + +// unsigned char read_address[2] = {0x00, 0x00}; +// // send serial data +// _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_READ), read_address, 2, BM1340_SERIALTX_DEBUG); +// } + +// Baud formula = 25M/((denominator+1)*8) +// The denominator is 5 bits found in the misc_control (bits 9-13) +int BM1340_set_default_baud(void) +{ + // default divider of 26 (11010) for 115,749 + unsigned char baudrate[9] = {0x00, MISC_CONTROL, 0x00, 0x00, 0b01111010, 0b00110001}; // baudrate - misc_control + _send_BM1340((TYPE_CMD | GROUP_ALL | CMD_WRITE), baudrate, 6, BM1340_SERIALTX_DEBUG); + return 115749; +} + +int BM1340_set_max_baud(void) +{ + // divider of 0 for 3,125,000 + ESP_LOGI(TAG, "Setting max baud of 1000000 "); + + unsigned char init8[11] = {0x55, 0xAA, 0x51, 0x09, 0x00, 0x28, 0x11, 0x30, 0x02, 0x00, 0x03}; + _send_simple(init8, 11); + return 1000000; +} + +static uint8_t id = 0; + +void BM1340_send_work(void * pvParameters, bm_job * next_bm_job) +{ + GlobalState * GLOBAL_STATE = (GlobalState *) pvParameters; + + BM1340_job job; + id = (id + 24) % 128; + job.job_id = id; + job.num_midstates = 0x01; + memcpy(&job.starting_nonce, &next_bm_job->starting_nonce, 4); + memcpy(&job.nbits, &next_bm_job->target, 4); + memcpy(&job.ntime, &next_bm_job->ntime, 4); + memcpy(job.merkle_root, next_bm_job->merkle_root_be, 32); + memcpy(job.prev_block_hash, next_bm_job->prev_block_hash_be, 32); + memcpy(&job.version, &next_bm_job->version, 4); + + if (GLOBAL_STATE->ASIC_TASK_MODULE.active_jobs[job.job_id] != NULL) { + free_bm_job(GLOBAL_STATE->ASIC_TASK_MODULE.active_jobs[job.job_id]); + } + + GLOBAL_STATE->ASIC_TASK_MODULE.active_jobs[job.job_id] = next_bm_job; + + pthread_mutex_lock(&GLOBAL_STATE->valid_jobs_lock); + GLOBAL_STATE->valid_jobs[job.job_id] = 1; + pthread_mutex_unlock(&GLOBAL_STATE->valid_jobs_lock); + + //debug sent jobs - this can get crazy if the interval is short + #if BM1340_DEBUG_JOBS + ESP_LOGI(TAG, "Send Job: %02X", job.job_id); + #endif + + _send_BM1340((TYPE_JOB | GROUP_SINGLE | CMD_WRITE), (uint8_t *)&job, sizeof(BM1340_job), BM1340_DEBUG_WORK); +} + +task_result * BM1340_process_work(void * pvParameters) +{ + bm1340_asic_result_t asic_result = {0}; + + if (receive_work((uint8_t *)&asic_result, sizeof(asic_result)) == ESP_FAIL) { + return NULL; + } + + // uint8_t job_id = asic_result.job_id; + // uint8_t rx_job_id = ((int8_t)job_id & 0xf0) >> 1; + // ESP_LOGI(TAG, "Job ID: %02X, RX: %02X", job_id, rx_job_id); + + // uint8_t job_id = asic_result.job_id & 0xf8; + // ESP_LOGI(TAG, "Job ID: %02X, Core: %01X", job_id, asic_result.job_id & 0x07); + + uint8_t job_id = (asic_result.job_id & 0xf0) >> 1; + uint8_t core_id = (uint8_t)((ntohl(asic_result.nonce) >> 25) & 0x7f); // BM1340 has 80 cores, so it should be coded on 7 bits + uint8_t small_core_id = asic_result.job_id & 0x0f; // BM1340 has 16 small cores, so it should be coded on 4 bits + uint32_t version_bits = (ntohs(asic_result.version) << 13); // shift the 16 bit value left 13 + ESP_LOGI(TAG, "Job ID: %02X, Core: %d/%d, Ver: %08" PRIX32, job_id, core_id, small_core_id, version_bits); + + GlobalState * GLOBAL_STATE = (GlobalState *) pvParameters; + + if (GLOBAL_STATE->valid_jobs[job_id] == 0) { + ESP_LOGW(TAG, "Invalid job nonce found, 0x%02X", job_id); + return NULL; + } + + uint32_t rolled_version = GLOBAL_STATE->ASIC_TASK_MODULE.active_jobs[job_id]->version | version_bits; + + result.job_id = job_id; + result.nonce = asic_result.nonce; + result.rolled_version = rolled_version; + + return &result; +} diff --git a/components/asic/common.c b/components/asic/common.c index f996038a0..784a18ad0 100644 --- a/components/asic/common.c +++ b/components/asic/common.c @@ -50,6 +50,8 @@ int count_asic_chips(uint16_t asic_count, uint16_t chip_id, int chip_id_response break; } + ESP_LOG_BUFFER_HEX(TAG, buffer, received); + if (received != chip_id_response_length) { ESP_LOGE(TAG, "Invalid CHIP_ID response length: expected %d, got %d", chip_id_response_length, received); ESP_LOG_BUFFER_HEX(TAG, buffer, received); diff --git a/components/asic/include/bm1340.h b/components/asic/include/bm1340.h new file mode 100644 index 000000000..ea32677b9 --- /dev/null +++ b/components/asic/include/bm1340.h @@ -0,0 +1,32 @@ +#ifndef BM1340_H_ +#define BM1340_H_ + +#include "common.h" +#include "mining.h" + +#define BM1340_SERIALTX_DEBUG true +#define BM1340_SERIALRX_DEBUG true +#define BM1340_DEBUG_WORK false //causes insane amount of debug output +#define BM1340_DEBUG_JOBS false //causes insane amount of debug output + +typedef struct __attribute__((__packed__)) +{ + uint8_t job_id; + uint8_t num_midstates; + uint8_t starting_nonce[4]; + uint8_t nbits[4]; + uint8_t ntime[4]; + uint8_t merkle_root[32]; + uint8_t prev_block_hash[32]; + uint8_t version[4]; +} BM1340_job; + +uint8_t BM1340_init(float frequency, uint16_t asic_count, uint16_t difficulty); +void BM1340_send_work(void * GLOBAL_STATE, bm_job * next_bm_job); +void BM1340_set_version_mask(uint32_t version_mask); +int BM1340_set_max_baud(void); +int BM1340_set_default_baud(void); +void BM1340_send_hash_frequency(float frequency); +task_result * BM1340_process_work(void * GLOBAL_STATE); + +#endif /* BM1340_H_ */ diff --git a/components/asic/serial.c b/components/asic/serial.c index 69fd33258..fbe8e5aed 100644 --- a/components/asic/serial.c +++ b/components/asic/serial.c @@ -73,7 +73,11 @@ int16_t SERIAL_rx(uint8_t *buf, uint16_t size, uint16_t timeout_ms) { int16_t bytes_read = uart_read_bytes(UART_NUM_1, buf, size, timeout_ms / portTICK_PERIOD_MS); - #if BM1397_SERIALRX_DEBUG || BM1366_SERIALRX_DEBUG || BM1368_SERIALRX_DEBUG || BM1370_SERIALRX_DEBUG + #if (defined(BM1397_SERIALRX_DEBUG) && BM1397_SERIALRX_DEBUG == true) || \ + (defined(BM1366_SERIALRX_DEBUG) && BM1366_SERIALRX_DEBUG == true) || \ + (defined(BM1368_SERIALRX_DEBUG) && BM1368_SERIALRX_DEBUG == true) || \ + (defined(BM1370_SERIALRX_DEBUG) && BM1370_SERIALRX_DEBUG == true) || \ + (defined(BM1340_SERIALRX_DEBUG) && BM1340_SERIALRX_DEBUG == true) size_t buff_len = 0; if (bytes_read > 0) { uart_get_buffered_data_len(UART_NUM_1, &buff_len); diff --git a/config-1200x.cvs b/config-1200x.cvs new file mode 100644 index 000000000..41b738d81 --- /dev/null +++ b/config-1200x.cvs @@ -0,0 +1,27 @@ +key,type,encoding,value +main,namespace,, +hostname,data,string,bitaxe +wifissid,data,string,myssid +wifipass,data,string,password +stratumurl,data,string,public-pool.io +stratumport,data,u16,21496 +stratumuser,data,string,bc1qnp980s5fpp8l94p5cvttmtdqy8rvrq74qly2yrfmzkdsntqzlc5qkc4rkq.bitaxe +stratumpass,data,string,x +stratumdiff,data,u16,1000 +stratumxnsub,data,u16,0 +fbstratumurl,data,string,solo.ckpool.org +fbstratumport,data,u16,3333 +fbstratumuser,data,string,bc1qnp980s5fpp8l94p5cvttmtdqy8rvrq74qly2yrfmzkdsntqzlc5qkc4rkq.bitaxe +fbstratumpass,data,string,x +fbstratumdiff,data,u16,1000 +fbstratumxnsum,data,u16,0 +asicfrequency,data,u16,342 +asicvoltage,data,u16,1100 +asicmodel,data,string,BM1340 +devicemodel,data,string,naja +boardversion,data,string,1200 +rotation,data,u16,0 +autofanspeed,data,u16,0 +fanspeed,data,u16,100 +selftest,data,u16,0 +overheat_mode,data,u16,0 \ No newline at end of file diff --git a/main/device_config.h b/main/device_config.h index cfde3bf3b..d91ff168c 100644 --- a/main/device_config.h +++ b/main/device_config.h @@ -13,6 +13,7 @@ typedef enum BM1366, BM1368, BM1370, + BM1340, } Asic; typedef struct { @@ -39,6 +40,7 @@ typedef enum SUPRA, GAMMA, GAMMA_TURBO, + NAJA, } Family; typedef struct { @@ -74,22 +76,26 @@ static const uint16_t BM1397_FREQUENCY_OPTIONS[] = {400, 425, 450, 475, 485, 500 static const uint16_t BM1366_FREQUENCY_OPTIONS[] = {400, 425, 450, 475, 485, 500, 525, 550, 575, 0}; static const uint16_t BM1368_FREQUENCY_OPTIONS[] = {400, 425, 450, 475, 485, 490, 500, 525, 550, 575, 0}; static const uint16_t BM1370_FREQUENCY_OPTIONS[] = {400, 490, 525, 550, 600, 625, 0}; +static const uint16_t BM1340_FREQUENCY_OPTIONS[] = {400, 490, 525, 550, 600, 625, 0}; static const uint16_t BM1397_VOLTAGE_OPTIONS[] = {1100, 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500, 0}; static const uint16_t BM1366_VOLTAGE_OPTIONS[] = {1100, 1150, 1200, 1250, 1300, 0}; static const uint16_t BM1368_VOLTAGE_OPTIONS[] = {1100, 1150, 1166, 1200, 1250, 1300, 0}; static const uint16_t BM1370_VOLTAGE_OPTIONS[] = {1000, 1060, 1100, 1150, 1200, 1250, 0}; +static const uint16_t BM1340_VOLTAGE_OPTIONS[] = {1000, 1060, 1100, 1150, 1200, 1250, 0}; static const AsicConfig ASIC_BM1397 = { .id = BM1397, .name = "BM1397", .chip_id = 1397, .default_frequency_mhz = 425, .frequency_options = BM1397_FREQUENCY_OPTIONS, .default_voltage_mv = 1400, .voltage_options = BM1397_VOLTAGE_OPTIONS, .difficulty = 256, .core_count = 168, .small_core_count = 672, .hashrate_test_percentage_target = 0.85, }; static const AsicConfig ASIC_BM1366 = { .id = BM1366, .name = "BM1366", .chip_id = 1366, .default_frequency_mhz = 485, .frequency_options = BM1366_FREQUENCY_OPTIONS, .default_voltage_mv = 1200, .voltage_options = BM1366_VOLTAGE_OPTIONS, .difficulty = 256, .core_count = 112, .small_core_count = 894, .hashrate_test_percentage_target = 0.85, }; static const AsicConfig ASIC_BM1368 = { .id = BM1368, .name = "BM1368", .chip_id = 1368, .default_frequency_mhz = 490, .frequency_options = BM1368_FREQUENCY_OPTIONS, .default_voltage_mv = 1166, .voltage_options = BM1368_VOLTAGE_OPTIONS, .difficulty = 256, .core_count = 80, .small_core_count = 1276, .hashrate_test_percentage_target = 0.80, }; static const AsicConfig ASIC_BM1370 = { .id = BM1370, .name = "BM1370", .chip_id = 1370, .default_frequency_mhz = 525, .frequency_options = BM1370_FREQUENCY_OPTIONS, .default_voltage_mv = 1150, .voltage_options = BM1370_VOLTAGE_OPTIONS, .difficulty = 256, .core_count = 128, .small_core_count = 2040, .hashrate_test_percentage_target = 0.85, }; +static const AsicConfig ASIC_BM1340 = { .id = BM1340, .name = "BM1340", .chip_id = 1340, .default_frequency_mhz = 345, .frequency_options = BM1340_FREQUENCY_OPTIONS, .default_voltage_mv = 1000, .voltage_options = BM1340_VOLTAGE_OPTIONS, .difficulty = 256, .core_count = 128, .small_core_count = 6725, .hashrate_test_percentage_target = 0.85, }; static const AsicConfig default_asic_configs[] = { ASIC_BM1397, ASIC_BM1366, ASIC_BM1368, ASIC_BM1370, + ASIC_BM1340, }; static const FamilyConfig FAMILY_MAX = { .id = MAX, .name = "Max", .asic = ASIC_BM1397, .asic_count = 1, .max_power = 25, .power_offset = 5, .nominal_voltage = 5, .swarm_color = "red", }; @@ -98,6 +104,7 @@ static const FamilyConfig FAMILY_HEX = { .id = HEX, .name = "Hex static const FamilyConfig FAMILY_SUPRA = { .id = SUPRA, .name = "Supra", .asic = ASIC_BM1368, .asic_count = 1, .max_power = 40, .power_offset = 5, .nominal_voltage = 5, .swarm_color = "blue", }; static const FamilyConfig FAMILY_GAMMA = { .id = GAMMA, .name = "Gamma", .asic = ASIC_BM1370, .asic_count = 1, .max_power = 40, .power_offset = 5, .nominal_voltage = 5, .swarm_color = "green", }; static const FamilyConfig FAMILY_GAMMA_TURBO = { .id = GAMMA_TURBO, .name = "GammaTurbo", .asic = ASIC_BM1370, .asic_count = 2, .max_power = 60, .power_offset = 10, .nominal_voltage = 12, .swarm_color = "cyan", }; +static const FamilyConfig FAMILY_NAJA = { .id = NAJA, .name = "Naja", .asic = ASIC_BM1340, .asic_count = 2, .max_power = 60, .power_offset = 10, .nominal_voltage = 12, .swarm_color = "magenta",}; static const FamilyConfig default_families[] = { FAMILY_MAX, @@ -106,6 +113,7 @@ static const FamilyConfig default_families[] = { FAMILY_SUPRA, FAMILY_GAMMA, FAMILY_GAMMA_TURBO, + FAMILY_NAJA, }; static const DeviceConfig default_configs[] = { @@ -126,6 +134,7 @@ static const DeviceConfig default_configs[] = { { .board_version = "601", .family = FAMILY_GAMMA, .EMC2101 = true, .emc_ideality_factor = 0x24, .emc_beta_compensation = 0x00, .TPS546 = true, .power_consumption_target = 19, }, { .board_version = "602", .family = FAMILY_GAMMA, .EMC2101 = true, .emc_ideality_factor = 0x24, .emc_beta_compensation = 0x00, .TPS546 = true, .power_consumption_target = 22, }, { .board_version = "800", .family = FAMILY_GAMMA_TURBO, .EMC2103 = true, .emc_temp_offset = -10, .TPS546 = true, .power_consumption_target = 12, }, + { .board_version = "1200", .family = FAMILY_NAJA, .EMC2103 = true, .emc_temp_offset = -10, .TPS546 = true, .power_consumption_target = 12, }, }; esp_err_t device_config_init(void * pvParameters); diff --git a/main/http_server/openapi.yaml b/main/http_server/openapi.yaml index 93bbcc9c1..cd0f44495 100644 --- a/main/http_server/openapi.yaml +++ b/main/http_server/openapi.yaml @@ -545,6 +545,7 @@ paths: - BM1366 - BM1368 - BM1370 + - BM1340 - BM1397 examples: - "BM1366" diff --git a/main/power/vcore.c b/main/power/vcore.c index fcdb15ae6..d24e31030 100644 --- a/main/power/vcore.c +++ b/main/power/vcore.c @@ -14,6 +14,22 @@ static const char *TAG = "vcore"; +static TPS546_CONFIG TPS546_CONFIG_NAJA = { + /* vin voltage */ + .TPS546_INIT_VIN_ON = 11.0, + .TPS546_INIT_VIN_OFF = 10.5, + .TPS546_INIT_VIN_UV_WARN_LIMIT = 11.0, + .TPS546_INIT_VIN_OV_FAULT_LIMIT = 14.0, + /* vout voltage */ + .TPS546_INIT_SCALE_LOOP = 0.25, + .TPS546_INIT_VOUT_MIN = 1, + .TPS546_INIT_VOUT_MAX = 3, + .TPS546_INIT_VOUT_COMMAND = 1.2, + /* iout current */ + .TPS546_INIT_IOUT_OC_WARN_LIMIT = 50.00, /* A */ + .TPS546_INIT_IOUT_OC_FAULT_LIMIT = 55.00 /* A */ +}; + static TPS546_CONFIG TPS546_CONFIG_GAMMATURBO = { /* vin voltage */ .TPS546_INIT_VIN_ON = 11.0, diff --git a/main/self_test/self_test.c b/main/self_test/self_test.c index 84fc2ccf7..d9b03878a 100644 --- a/main/self_test/self_test.c +++ b/main/self_test/self_test.c @@ -30,6 +30,7 @@ #include "bm1366.h" #include "bm1368.h" #include "bm1370.h" +#include "bm1340.h" #include "asic.h" #include "device_config.h" #include "asic_reset.h"