how to do bit slice on a signal

[dev2-137]

Hi,
i have a signal in my vcd in the form:
$var wire 768 3 blk_src[11:0] $end

in simvision you can expend this signal and you will see 12 items inside eacjh of 64 bits

i want to be able to get the blk_src[n] tv of it (n in [0..11])

is there a way to do it?

the only way to get a tv for this sig is:
vcd['tb_top.DUT.blk_fsm_src[11:0]'].tv
how can ii create the tv from only one of its 12 items?
smething like vcd['tb_top.DUT.blk_src[11:0]'][4].tv

thanks
dev2

[cirosantilli]

There's nothing built-in for that in this lib I think, we only store tvs for the entire signal, you'd just have to loop over the tv of the entire signal and create the per bit tvs yourself.

If you manage to package that into a nice interface we could consider merging. It would need to be something that doesn't do it for every single bit I think, only for bits requested by the user, so as to not duplicate data unless the user requests it.

Perhaps the ideal implementation would be to actually only store tv by bit rather than full signal, giving bit index and new value, this way we'd use less memory for wide wires that change a bit at a time but we don't need to necessarily go there now.

You'll also need a helper that extends signals to their full width because e.g.:

        signal = vcd['counter_tb.out[1:0]']
        self.assertEqual(
            signal.tv[:6],
            [
                ( 0,  'x'),
                ( 2,  '0'),
                ( 6,  '1'),
                ( 8, '10'),
                (10, '11'),
                (12,  '0'),
            ]
        )

but you'd want instead to operate on

            [
                ( 0,  'xx'),
                ( 2,  '00'),
                ( 6,  '01'),
                ( 8, '10'),
                (10, '11'),
                (12,  '00'),
            ]

That helper could be merged by itself too.