Skip to content

Commit 1ebcc91

Browse files
Adding asynchronous temporal partitioning
1 parent da4decf commit 1ebcc91

File tree

8 files changed

+1343
-7
lines changed

8 files changed

+1343
-7
lines changed

src/accl/graph/sega/MPU.py

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,9 +27,10 @@
2727

2828
from m5.params import *
2929
from m5.proxy import *
30-
from m5.SimObject import SimObject
30+
# from m5.SimObject import SimObject
31+
from m5.objects.ClockedObject import ClockedObject
3132

32-
class MPU(SimObject):
33+
class MPU(ClockedObject):
3334
type = "MPU"
3435
cxx_header = "accl/graph/sega/mpu.hh"
3536
cxx_class = "gem5::MPU"

src/accl/graph/sega/centeral_controller.cc

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,18 @@ CenteralController::createBCWorkload(Addr init_addr, uint32_t init_value)
9393
workload = new BSPBCWorkload(init_addr, init_value);
9494
}
9595

96+
bool
97+
CenteralController::bufferRemoteUpdate(int slice_number, PacketPtr pkt)
98+
{
99+
for (auto mpu: mpuVector) {
100+
if (contains(mpu->getAddrRanges(), pkt->getAddr())) {
101+
remoteUpdates[mpu][slice_number].push_back(pkt);
102+
}
103+
}
104+
105+
return true;
106+
}
107+
96108
void
97109
CenteralController::createPopCountDirectory(int atoms_per_block)
98110
{
@@ -173,6 +185,25 @@ CenteralController::recvDoneSignal()
173185
bool done = true;
174186
for (auto mpu : mpuVector) {
175187
done &= mpu->done();
188+
int total_num_slices = remoteUpdates[mpu].size();
189+
if (mpu->done()) {
190+
int slice_number = mpu->getSliceCounter() + 1;
191+
while ((total_num_slices != 0) && (slice_number != mpu->getSliceCounter())) {
192+
if (!remoteUpdates[mpu][slice_number].empty()) {
193+
mpu->scheduleNewSlice();
194+
mpu->updateSliceCounter(slice_number);
195+
done = false;
196+
break;
197+
}
198+
else {
199+
if (slice_number == total_num_slices) {
200+
slice_number = 0;
201+
} else {
202+
slice_number++;
203+
}
204+
}
205+
}
206+
}
176207
}
177208

178209
if (done && mode == ProcessingMode::ASYNCHRONOUS) {

src/accl/graph/sega/centeral_controller.hh

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,11 +77,16 @@ class CenteralController : public ClockedObject
7777
void createPRWorkload(int num_nodes, float alpha);
7878
void createBCWorkload(Addr init_addr, uint32_t init_value);
7979

80+
bool bufferRemoteUpdate(int slice_number, PacketPtr pkt);
81+
int getnumGPTs() {return mpuVector.size();}
82+
8083
void recvDoneSignal();
8184

8285
int workCount();
8386
float getPRError();
8487
void printAnswerToHostSimout();
88+
std::unordered_map<MPU*, std::unordered_map<int, std::deque<PacketPtr>>>
89+
remoteUpdates;
8590
};
8691

8792
}

src/accl/graph/sega/coalesce_engine.hh

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,10 @@ class CoalesceEngine : public BaseMemoryEngine
217217
ReadReturnStatus recvWLRead(Addr addr);
218218
void recvWLWrite(Addr addr, WorkListItem wl);
219219

220+
int getSliceSize()
221+
{return (int)(params().cache_size); }
222+
// /sizeof(WorkListItem)); }
223+
220224
int workCount();
221225
int futureWorkCount();
222226
void recvVertexPull();

0 commit comments

Comments
 (0)