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1 | 1 | use std::collections::BTreeMap; |
2 | 2 |
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3 | 3 | use anyhow::Result; |
4 | | -use rabbitizer::{config, Abi, Instruction, InstrCategory, OperandType}; |
| 4 | +use rabbitizer::{config, Abi, InstrCategory, Instruction, OperandType}; |
5 | 5 |
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6 | 6 | use crate::obj::{ObjIns, ObjInsArg, ObjReloc}; |
7 | 7 |
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@@ -37,37 +37,49 @@ pub fn process_code( |
37 | 37 | let branch_offset = instruction.branch_offset(); |
38 | 38 | let branch_dest = |
39 | 39 | if is_branch { Some((cur_addr as i32 + branch_offset) as u32) } else { None }; |
40 | | - let args = instruction |
41 | | - .get_operands_slice() |
42 | | - .iter() |
43 | | - .map(|op| match op { |
44 | | - OperandType::cpu_immediate | OperandType::cpu_label | OperandType::cpu_branch_target_label => { |
| 40 | + |
| 41 | + println!("{:?}", instruction.get_operands_slice()); |
| 42 | + let mut args = Vec::new(); |
| 43 | + for op in instruction.get_operands_slice() { |
| 44 | + match op { |
| 45 | + OperandType::cpu_immediate |
| 46 | + | OperandType::cpu_label |
| 47 | + | OperandType::cpu_branch_target_label => { |
45 | 48 | if is_branch { |
46 | | - ObjInsArg::BranchOffset(branch_offset) |
| 49 | + args.push(ObjInsArg::BranchOffset(branch_offset)); |
47 | 50 | } else if let Some(reloc) = reloc { |
48 | 51 | if matches!(&reloc.target_section, Some(s) if s == ".text") |
49 | 52 | && reloc.target.address > start_address |
50 | 53 | && reloc.target.address < end_address |
51 | 54 | { |
52 | 55 | // Inter-function reloc, convert to branch offset |
53 | | - ObjInsArg::BranchOffset(reloc.target.address as i32 - cur_addr as i32) |
| 56 | + args.push(ObjInsArg::BranchOffset( |
| 57 | + reloc.target.address as i32 - cur_addr as i32, |
| 58 | + )); |
54 | 59 | } else { |
55 | | - ObjInsArg::Reloc |
| 60 | + args.push(ObjInsArg::Reloc); |
56 | 61 | } |
57 | 62 | } else { |
58 | | - ObjInsArg::MipsArg(op.disassemble(&instruction, None)) |
| 63 | + args.push(ObjInsArg::MipsArg(op.disassemble(&instruction, None))); |
59 | 64 | } |
60 | 65 | } |
61 | 66 | OperandType::cpu_immediate_base => { |
62 | 67 | if reloc.is_some() { |
63 | | - ObjInsArg::RelocWithBase |
| 68 | + args.push(ObjInsArg::RelocWithBase); |
64 | 69 | } else { |
65 | | - ObjInsArg::MipsArg(op.disassemble(&instruction, None)) |
| 70 | + args.push(ObjInsArg::MipsArgWithBase( |
| 71 | + OperandType::cpu_immediate.disassemble(&instruction, None), |
| 72 | + )); |
66 | 73 | } |
| 74 | + args.push(ObjInsArg::MipsArg( |
| 75 | + OperandType::cpu_rs.disassemble(&instruction, None), |
| 76 | + )); |
| 77 | + } |
| 78 | + _ => { |
| 79 | + args.push(ObjInsArg::MipsArg(op.disassemble(&instruction, None))); |
67 | 80 | } |
68 | | - _ => ObjInsArg::MipsArg(op.disassemble(&instruction, None)), |
69 | | - }) |
70 | | - .collect(); |
| 81 | + } |
| 82 | + } |
71 | 83 | let line = |
72 | 84 | line_info.as_ref().and_then(|map| map.range(..=cur_addr).last().map(|(_, &b)| b)); |
73 | 85 | insts.push(ObjIns { |
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