cleaned up c++ code generation and added build functionality

Author: alex-yang-upenn

hls4ml/backends/vitis_accelerator/vitis_accelerator_backend.py

@@ -1,3 +1,7 @@
+import os
+import sys
+import subprocess
+
 from hls4ml.backends import VitisBackend, VivadoBackend
 from hls4ml.model.flow import get_flow, register_flow
 
@@ -39,6 +43,35 @@ def create_initial_config(
         config['AcceleratorConfig']['Batchsize'] = batchsize
         return config
 
+    def build(self, model, target="all"):
+        if 'linux' in sys.platform:
+            if 'XILINX_VITIS' not in os.environ:
+                raise Exception("XILINX_VITIS environmental variable missing. Please install XRT and Vitis, and run the setup scripts before building")
+            if 'XILINX_XRT' not in os.environ:
+                raise Exception("XILINX_XRT environmental variable missing. Please install XRT and Vitis, and run the setup scripts before building")
+            if 'XILINX_VIVADO' not in os.environ:
+                raise Exception("XILINX_VIVADO environmental variable missing. Please install XRT and Vitis, and run the setup scripts before building")
+
+            if target not in ["all", "host", "hls", "xclbin"]:
+                raise Exception("Invalid build target")
+
+            curr_dir = os.getcwd()
+            os.chdir(model.config.get_output_dir())
+            command = "make " + target
+            # Pre-loading libudev
+            ldconfig_output = subprocess.check_output(["ldconfig", "-p"]).decode("utf-8")
+            for line in ldconfig_output.split("\n"):
+                if "libudev.so" in line and "x86" in line:
+                    command = "LD_PRELOAD=" + line.split("=>")[1].strip() + " " + command
+                    break
+            os.system(command)
+            os.chdir(curr_dir)
+        else:
+            raise Exception("Currently untested on non-Linux OS")
+
+    def predict(self, model, x):
+        raise Exception("TODO: Needs to be implemented")
+
     def _register_flows(self):
         validation_passes = [
             'vitisaccelerator:validate_conv_implementation',

hls4ml/model/graph.py

@@ -734,6 +734,9 @@ def _compute_n_samples(self, x):
         return int(n_sample)
 
     def predict(self, x):
+        if self.config.config.get('Backend', 'Vivado') == 'VitisAccelerator':
+            return self.config.backend.predict(self, x)
+
         top_function, ctype = self._get_top_function(x)
         n_samples = self._compute_n_samples(x)
         n_inputs = len(self.get_input_variables())

hls4ml/templates/vitis_accelerator/Makefile

@@ -25,12 +25,12 @@ endif
 KERN_LIBRARIES += -I./ -I./firmware/ -I./firmware/weights -I./firmware/nnet_utils/
 
 .PHONY: all
-all: host kernel 
+all: host xclbin
 
 # Building kernel
 ./build/myproject_kernel.xo: kernel_wrapper.cpp
-	mkdir -p ./build
-	v++ -c -t hw --config ./accelerator_card.cfg kernel_wrapper.cpp firmware/myproject.cpp -o ./build/myproject_kernel.xo $(KERN_LIBRARIES)
+	mkdir -p ./build && mkdir -p ./build/xo
+	v++ -c -t hw --config ./accelerator_card.cfg --temp_dir build/xo kernel_wrapper.cpp firmware/myproject.cpp -o ./build/myproject_kernel.xo $(KERN_LIBRARIES)
 
 # hls-fpga-machine-learning packaging 
 
@@ -43,8 +43,11 @@ LDFLAGS = -L$(XILINX_XRT)/lib/ -lstdc++ -lpthread -lrt -lOpenCL
 host: myproject_host_cl.cpp libs/xcl2.cpp
 	$(CXX) $(CXXFLAGS) $^ -o $@ $(INCLUDES) $(LDFLAGS) 
 
-.PHONY: kernel
-kernel: kernel_wrapper.xclbin
+.PHONY: hls
+hls: ./build/myproject_kernel.xo
+
+.PHONY: xclbin
+xclbin: ./build/kernel_wrapper.xclbin
 
 # Cleaning stuff
 .PHONY: clean

hls4ml/templates/vitis_accelerator/accelerator_card.cfg

@@ -1,10 +1,7 @@
 kernel=kernel_wrapper
-log_dir=build/logs
 messageDb=build/kernel_wrapper.mdb
 platform=MYPLATFORM
-report_dir=build/reports
 save-temps=1
-temp_dir=build
 
 [advanced]
 prop=kernel.kernel_wrapper.kernel_flags=-std=c++11

hls4ml/writer/vitis_accelerator_writer.py

@@ -185,13 +185,15 @@ def write_makefile(self, model):
                 newline = line.replace('myproject', project_name)
             elif '# hls-fpga-machine-learning packaging' in line:
                 if board_type == "alveo":
-                    newline = f'kernel_wrapper.xclbin: ./build/{project_name}_kernel.xo\n'
-                    newline += f'    v++ -l -t hw --config ./accelerator_card.cfg ./build/{project_name}_kernel.xo -o kernel_wrapper.xclbin\n'
+                    newline = f'./build/kernel_wrapper.xclbin: ./build/{project_name}_kernel.xo\n'
+                    newline += f'\tmkdir -p ./build/xclbin\n'
+                    newline += f'\tv++ -l -t hw --config ./accelerator_card.cfg --temp_dir build/xclbin ./build/{project_name}_kernel.xo -o ./build/kernel_wrapper.xclbin\n'
                 elif board_type == "versal":
-                    newline = f'kernel_wrapper.xsa: ./build/{project_name}_kernel.xo\n'
-                    newline += f'    v++ -l -t hw --config ./accelerator_card.cfg ./build/{project_name}_kernel.xo -o kernel_wrapper.xsa\n\n'
-                    newline += f'kernel_wrapper.xclbin: ./kernel_wrapper.xsa\n'
-                    newline += f'    v++ --package -t hw --config ./accelerator_card.cfg ./kernel_wrapper.xsa -o kernel_wrapper.xclbin\n'
+                    newline = f'./build/kernel_wrapper.xsa: ./build/{project_name}_kernel.xo\n'
+                    newline += f'\tmkdir -p ./build/xclbin\n'
+                    newline += f'\tv++ -l -t hw --config ./accelerator_card.cfg --temp_dir build/xclbin ./build/{project_name}_kernel.xo -o ./build/kernel_wrapper.xsa\n\n'
+                    newline += f'./build/kernel_wrapper.xclbin: ./build/kernel_wrapper.xsa\n'
+                    newline += f'\tv++ --package -t hw --config ./accelerator_card.cfg --temp_dir build/xclbin ./build/kernel_wrapper.xsa -o ./build/kernel_wrapper.xclbin\n'
             else:
                 newline = line
             fout.write(newline)