diff --git a/.z3-trace b/.z3-trace new file mode 100644 index 0000000000..e69de29bb2 diff --git a/settings.gradle.kts b/settings.gradle.kts index 9534bbe153..095b934f5d 100644 --- a/settings.gradle.kts +++ b/settings.gradle.kts @@ -24,6 +24,7 @@ include( "common/ltl", "common/ltl-cli", + "frontends/btor2-frontend", "frontends/c-frontend", "frontends/petrinet-model", "frontends/petrinet-analysis", @@ -42,6 +43,7 @@ include( "xcfa/xcfa", "xcfa/cat", "xcfa/c2xcfa", + "xcfa/btor2xcfa", "xcfa/litmus2xcfa", "xcfa/llvm2xcfa", "xcfa/xcfa2chc", diff --git a/subprojects/common/analysis/src/main/java/hu/bme/mit/theta/analysis/algorithm/oc/OcChecker.kt b/subprojects/common/analysis/src/main/java/hu/bme/mit/theta/analysis/algorithm/oc/OcChecker.kt index 61ae76c6a7..a6f60fae11 100644 --- a/subprojects/common/analysis/src/main/java/hu/bme/mit/theta/analysis/algorithm/oc/OcChecker.kt +++ b/subprojects/common/analysis/src/main/java/hu/bme/mit/theta/analysis/algorithm/oc/OcChecker.kt @@ -141,7 +141,7 @@ abstract class OcCheckerBase : OcChecker() { val unassignedCopy = unassignedWss.toMutableList() val pairs = mutableListOf, Relation>>() while (unassignedCopy.isNotEmpty()) { - val ws = unassignedCopy.removeFirst() + val ws = unassignedCopy.removeAt(0) val pair = unassignedCopy.find { it.from == ws.to || it.to == ws.from } if (pair != null) { pairs.add(ws to pair) diff --git a/subprojects/frontends/btor2-frontend/README.md b/subprojects/frontends/btor2-frontend/README.md new file mode 100644 index 0000000000..1fcddfd7d1 --- /dev/null +++ b/subprojects/frontends/btor2-frontend/README.md @@ -0,0 +1 @@ +Soon... \ No newline at end of file diff --git a/subprojects/frontends/btor2-frontend/build.gradle.kts b/subprojects/frontends/btor2-frontend/build.gradle.kts new file mode 100644 index 0000000000..1f8376de5f --- /dev/null +++ b/subprojects/frontends/btor2-frontend/build.gradle.kts @@ -0,0 +1,24 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +plugins { + id("kotlin-common") + id("antlr-grammar") +} +dependencies { + implementation(project(":theta-core")) + implementation(project(":theta-common")) + implementation(project(":theta-grammar")) +} diff --git a/subprojects/frontends/btor2-frontend/src/main/antlr/Btor2.g4 b/subprojects/frontends/btor2-frontend/src/main/antlr/Btor2.g4 new file mode 100644 index 0000000000..3668cbccdd --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/antlr/Btor2.g4 @@ -0,0 +1,74 @@ +// WARNING: this grammar is NOT an official BTOR2 grammar and will accept invalid btor2 circuits. +// Check your circuit with catbtor before using this grammar! +grammar Btor2; + +// Lexer rules +WS: [ ]+ -> skip; +UNARYOP: 'not' + | 'inc' | 'dec' | 'neg' + | 'redand' | 'redor' | 'redxor'; +TERNARYOP: 'ite' | 'write'; +BINOP: 'and' | 'nand' | 'nor' | 'or' | 'xnor' | 'xor' | 'iff' | 'implies' + | 'eq' | 'neq' + | 'slt' | 'slte' | 'sgt' | 'sgte' + | 'ult' | 'ulte' | 'ugt' | 'ugte' + | 'concat' | 'add' | 'mul' | 'sub' + | 'udiv' | 'urem' + | 'sdiv' | 'srem' | 'smod' + | 'saddo' | 'sdivo' | 'smulo' | 'ssubo' + | 'uaddo' | 'umulo' | 'usubo' + | 'rol' | 'ror' | 'sll' | 'sra' | 'srl' | 'read'; +NUM: (MINUS)? (HEX | BIN | DEC); +HEX: [0-9a-fA-F]+; +BIN: [0-1]+; +DEC: [0-9]+; +PLUS: '+'; +MINUS: '-'; +COMMENT: ';' ~[\r\n]+; +SYMBOL: ~[ \r\n]+; +NEWLINE: [\r\n]+; + +// Parser rules +btor2: (line NEWLINE)* line (NEWLINE)* EOF; + +line: comment | node (symbol)? (comment)?; + +comment: COMMENT; + +nid: NUM; +sid: NUM; + +node: ( array_sort | bitvec_sort ) #sort // sort declaration + | (input | state | init | next | property) #stateful + | (opidx | op) #operation + | (filled_constant | constant | constant_d | constant_h) #constantNode; + +opidx: ext | slice; + +ext: id=nid operator=('uext'|'sext') sid opd1=nid w=NUM; +slice: id=nid 'slice' sid opd1=nid u=NUM l=NUM; + +op: binop | unop | terop; + +binop: id=nid BINOP sid opd1=nid opd2=nid; +unop: id=nid UNARYOP sid opd1=nid; +terop: id=nid TERNARYOP sid opd1=nid opd2=nid opd3=nid; + +input: id=nid ('input') sid; + +init: id=nid 'init' sid param1=nid param2=nid; +next: id=nid 'next' sid param1=nid param2=nid; + +state: id=nid 'state' sid; + +property: id=nid property_type=('bad' | 'constraint' | 'fair' | 'output' | 'justice' ) param=nid; + +array_sort: id=sid 'sort array' sid1=sid sid2=sid; +bitvec_sort: id=sid 'sort bitvec' width=NUM; + +constant: id=nid 'const' sid bin=NUM; +constant_d: id=nid 'constd' sid dec=NUM; +constant_h: id=nid 'consth' sid hex=NUM; +filled_constant: id=nid fill=('one' | 'ones' | 'zero') sid; + +symbol: (SYMBOL | NUM); \ No newline at end of file diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Const.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Const.kt new file mode 100644 index 0000000000..b0a6dcd2be --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Const.kt @@ -0,0 +1,42 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.models + +import hu.bme.mit.theta.core.decl.Decls +import hu.bme.mit.theta.core.decl.VarDecl +import hu.bme.mit.theta.core.type.Expr +import hu.bme.mit.theta.core.type.bvtype.BvExprs +import hu.bme.mit.theta.core.type.bvtype.BvType + +data class Btor2Const( + override val nid: UInt, + val value: BooleanArray, + override val sort: Btor2Sort, +) : Btor2Node(nid, sort) { + val declsVar = Decls.Var("const_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return declsVar + } + + override fun getExpr(): Expr { + return declsVar.ref as Expr + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Model.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Model.kt new file mode 100644 index 0000000000..538bd48bf7 --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Model.kt @@ -0,0 +1,114 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.models + +import hu.bme.mit.theta.core.decl.VarDecl +import hu.bme.mit.theta.core.type.Expr + +interface Btor2NodeVisitor { + fun visit(node: Btor2UnaryOperation, param: P): R + + fun visit(node: Btor2BinaryOperation, param: P): R + + fun visit(node: Btor2TernaryOperation, param: P): R + + fun visit(node: Btor2SliceOperation, param: P): R + + fun visit(node: Btor2ExtOperation, param: P): R + + fun visit(node: Btor2Comparison, param: P): R + + fun visit(node: Btor2Boolean, param: P): R + + fun visit(node: Btor2BitvecSort, param: P): R + + fun visit(node: Btor2Input, param: P): R + + fun visit(node: Btor2State, param: P): R + + fun visit(node: Btor2Init, param: P): R + + fun visit(node: Btor2Next, param: P): R + + fun visit(node: Btor2Bad, param: P): R + + fun visit(node: Btor2Const, param: P): R +} + +object Btor2Circuit { + private val _nodes = mutableMapOf() + private val _sorts = mutableMapOf() + private val _constants = mutableMapOf() + private val _ops = mutableMapOf() + private val _states = mutableMapOf() + private val _properties = mutableMapOf() + + val nodes: Map + get() = _nodes + + val sorts: Map + get() = _sorts + + val constants: Map + get() = _constants + + val ops: Map + get() = _ops + + val states: Map + get() = _states + + val properties: Map + get() = _properties + + fun addSort(sort: Btor2Sort) { + _sorts[sort.sid] = sort + } + + fun addNode(node: Btor2Node) { + _nodes[node.nid] = node + when (node) { + is Btor2Const -> _constants[node.nid] = node + is Btor2Operation -> _ops[node.nid] = node + is Btor2Stateful -> _states[node.nid] = node + is Btor2Bad -> _properties[node.nid] = node + else -> error("Btor2Circuit cannot sort this type: ${node.javaClass}") + } + } +} + +// sortID lookup in Btor2Sort +abstract class Btor2Node(id: UInt, btor2Sort: Btor2Sort? = null) { + abstract val nid: UInt + abstract val sort: Btor2Sort? + + open fun getVar(): VarDecl<*>? { + return null + } + + abstract fun accept(visitor: Btor2NodeVisitor, param: P): R + + abstract fun getExpr(): Expr<*> +} + +abstract class Btor2Sort(sid: UInt, width: UInt) { + abstract val sid: UInt + abstract val width: UInt +} + +// Ezt egyelőre nem használjuk mert csak bitvektoraink vannak +data class Btor2BitvecSort(override val sid: UInt, override val width: UInt) : + Btor2Sort(sid, width) diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Operation.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Operation.kt new file mode 100644 index 0000000000..0864282ffe --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Operation.kt @@ -0,0 +1,423 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.models + +import hu.bme.mit.theta.core.decl.Decls +import hu.bme.mit.theta.core.decl.VarDecl +import hu.bme.mit.theta.core.stmt.AssignStmt +import hu.bme.mit.theta.core.stmt.Stmt +import hu.bme.mit.theta.core.type.Expr +import hu.bme.mit.theta.core.type.anytype.IteExpr +import hu.bme.mit.theta.core.type.booltype.BoolType +import hu.bme.mit.theta.core.type.booltype.IffExpr +import hu.bme.mit.theta.core.type.booltype.ImplyExpr +import hu.bme.mit.theta.core.type.bvtype.* +import hu.bme.mit.theta.core.type.bvtype.BvExprs.Eq +import hu.bme.mit.theta.core.type.bvtype.BvExprs.Not +import hu.bme.mit.theta.core.type.inttype.IntLitExpr +import hu.bme.mit.theta.core.utils.TypeUtils.checkAllTypesEqual +import java.math.BigInteger + +fun getOperandRef(operand: Btor2Node, negated: Boolean = false): Expr { + return if (negated) { + Not(operand.getVar()!!.ref as Expr) as Expr + } else { + operand.getVar()!!.ref as Expr + } +} + +abstract class Btor2Operation(id: UInt, sort: Btor2Sort) : Btor2Node(id, sort) { + abstract fun getStmt(): Stmt +} + +// Operators +data class Btor2UnaryOperation( + override val nid: UInt, + override val sort: Btor2Sort, + val operator: Btor2UnaryOperator, + val operand: Btor2Node, +) : Btor2Operation(nid, sort) { + val value = Decls.Var("unary_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + val one = BvExprs.Bv(booleanArrayOf(true)) as Expr + return when (operator) { + Btor2UnaryOperator.NOT -> BvNotExpr.of(getOperandRef(operand)) + Btor2UnaryOperator.INC -> BvAddExpr.create(mutableListOf(getOperandRef(operand), one)) + Btor2UnaryOperator.DEC -> BvSubExpr.create(getOperandRef(operand), one) + Btor2UnaryOperator.NEG -> BvNegExpr.of(getOperandRef(operand)) + Btor2UnaryOperator.REDAND -> BvAndExpr.create(valueByBits()) + Btor2UnaryOperator.REDOR -> BvOrExpr.create(valueByBits()) + Btor2UnaryOperator.REDXOR -> BvXorExpr.create(valueByBits()) + } + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return AssignStmt.of(value, getExpr()) + } + + fun valueByBits(): List> { + throw NotImplementedError("Reduce operations not implemented in Theta.") + } +} + +data class Btor2ExtOperation( + override val nid: UInt, + override val sort: Btor2Sort, + val operator: Btor2ExtOperator, + val operand: Btor2Node, + val w: UInt, +) : Btor2Operation(nid, sort) { + val value = Decls.Var("ext_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + val ogLength = operand.sort?.width?.toInt() + val wLength = w.toInt() + val newLength = + ogLength?.plus(wLength) + ?: throw IllegalArgumentException("Operand sort width is null or not defined") + return when (operator) { + Btor2ExtOperator.SEXT -> BvSExtExpr.create(getOperandRef(operand), BvType.of(newLength)) + Btor2ExtOperator.UEXT -> BvZExtExpr.create(getOperandRef(operand), BvType.of(newLength)) + } + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return AssignStmt.of(value, getExpr()) + } +} + +data class Btor2SliceOperation( + override val nid: UInt, + override val sort: Btor2Sort, + val operand: Btor2Node, + val u: BigInteger, + val l: BigInteger, +) : Btor2Operation(nid, sort) { + val value = Decls.Var("slice_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + val newU: BigInteger = u + BigInteger.valueOf(1) + // val newU: BigInteger = if (u == l) u + BigInteger.valueOf(1) else u + return BvExtractExpr.create(getOperandRef(operand), IntLitExpr.of(l), IntLitExpr.of(newU)) + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return AssignStmt.of(value, getExpr()) + } +} + +data class Btor2BinaryOperation( + override val nid: UInt, + override val sort: Btor2Sort, + val operator: Btor2BinaryOperator, + val op1: Btor2Node, + val op2: Btor2Node, + val opd1_negated: Boolean, + val opd2_negated: Boolean, +) : Btor2Operation(nid, sort) { + val value = Decls.Var("binary_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + val op1Expr = getOperandRef(op1, opd1_negated) + val op2Expr = getOperandRef(op2, opd2_negated) + + return when (operator) { + Btor2BinaryOperator.ADD -> BvAddExpr.create(mutableListOf(op1Expr, op2Expr)) + Btor2BinaryOperator.AND -> BvAndExpr.create(mutableListOf(op1Expr, op2Expr)) + Btor2BinaryOperator.NAND -> + BvNotExpr.create(BvAndExpr.create(mutableListOf(op1Expr, op2Expr))) + Btor2BinaryOperator.NOR -> BvNotExpr.create(BvOrExpr.create(mutableListOf(op1Expr, op2Expr))) + Btor2BinaryOperator.OR -> BvOrExpr.create(mutableListOf(op1Expr, op2Expr)) + Btor2BinaryOperator.XNOR -> + BvNotExpr.create(BvXorExpr.create(mutableListOf(op1Expr, op2Expr))) + Btor2BinaryOperator.XOR -> BvXorExpr.create(mutableListOf(op1Expr, op2Expr)) + Btor2BinaryOperator.MUL -> BvMulExpr.create(mutableListOf(op1Expr, op2Expr)) + Btor2BinaryOperator.SUB -> BvSubExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.UDIV -> BvUDivExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.UREM -> BvURemExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.SDIV -> BvSDivExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.SREM -> BvSRemExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.SMOD -> BvSModExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.CONCAT -> BvConcatExpr.create(mutableListOf(op1Expr, op2Expr)) + Btor2BinaryOperator.SADDO -> TODO("Signed addition with overflow not implemented yet") + Btor2BinaryOperator.SDIVO -> TODO("Signed division with overflow not implemented yet") + Btor2BinaryOperator.SMULO -> TODO("Signed multiplication with overflow not implemented yet") + Btor2BinaryOperator.SSUBO -> TODO("Signed subtraction with overflow not implemented yet") + Btor2BinaryOperator.UADDO -> TODO("Unsigned addition with overflow not implemented yet") + Btor2BinaryOperator.UMULO -> TODO("Unsigned multiplication with overflow not implemented yet") + Btor2BinaryOperator.USUBO -> TODO("Unsigned subtraction with overflow not implemented yet") + Btor2BinaryOperator.ROL -> BvRotateLeftExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.ROR -> BvRotateRightExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.SLL -> BvShiftLeftExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.SRA -> BvArithShiftRightExpr.of(op1Expr, op2Expr) + Btor2BinaryOperator.SRL -> BvLogicShiftRightExpr.create(op1Expr, op2Expr) + Btor2BinaryOperator.READ -> TODO("Read operation not implemented yet") + } + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return when (operator) { + Btor2BinaryOperator.ADD -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.AND -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.NAND -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.NOR -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.OR -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.XNOR -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.XOR -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.MUL -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SUB -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.UDIV -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.UREM -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SDIV -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SREM -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SMOD -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.CONCAT -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SADDO -> TODO("Signed addition with overflow not implemented yet") + Btor2BinaryOperator.SDIVO -> TODO("Signed division with overflow not implemented yet") + Btor2BinaryOperator.SMULO -> TODO("Signed multiplication with overflow not implemented yet") + Btor2BinaryOperator.SSUBO -> TODO("Signed subtraction with overflow not implemented yet") + Btor2BinaryOperator.UADDO -> TODO("Unsigned addition with overflow not implemented yet") + Btor2BinaryOperator.UMULO -> TODO("Unsigned multiplication with overflow not implemented yet") + Btor2BinaryOperator.USUBO -> TODO("Unsigned subtraction with overflow not implemented yet") + Btor2BinaryOperator.ROL -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.ROR -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SLL -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SRA -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.SRL -> AssignStmt.of(value, getExpr()) + Btor2BinaryOperator.READ -> TODO("Read operation not implemented yet") + } + } +} + +data class Btor2Comparison( + override val nid: UInt, + override val sort: Btor2Sort, + val operator: Btor2ComparisonOperator, + val op1: Btor2Node, + val op2: Btor2Node, + val opd1_negated: Boolean, + val opd2_negated: Boolean, +) : Btor2Operation(nid, sort) { + val value = Decls.Var("comparison_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + val op1_expr = getOperandRef(op1, opd1_negated) + val op2_expr = getOperandRef(op2, opd2_negated) + return when (operator) { + Btor2ComparisonOperator.EQ -> + IteExpr.of( + BvEqExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.NEQ -> + IteExpr.of( + BvNeqExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.SLT -> + IteExpr.of( + BvSLtExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.SLTE -> + IteExpr.of( + BvSLeqExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.SGT -> + IteExpr.of( + BvSGtExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.SGTE -> + IteExpr.of( + BvSGeqExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.ULT -> + IteExpr.of( + BvULtExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.ULTE -> + IteExpr.of( + BvULeqExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.UGT -> + IteExpr.of( + BvUGtExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2ComparisonOperator.UGTE -> + IteExpr.of( + BvUGeqExpr.create(op1_expr, op2_expr), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + } + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return when (operator) { + Btor2ComparisonOperator.EQ -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.NEQ -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.SLT -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.SLTE -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.SGT -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.SGTE -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.ULT -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.ULTE -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.UGT -> AssignStmt.of(value, getExpr()) + Btor2ComparisonOperator.UGTE -> AssignStmt.of(value, getExpr()) + } + } +} + +data class Btor2Boolean( + override val nid: UInt, + override val sort: Btor2Sort, + val operator: Btor2BooleanOperator, + val op1: Btor2Node, + val op2: Btor2Node, + val opd1_negated: Boolean, + val opd2_negated: Boolean, +) : Btor2Operation(nid, sort) { + + val value = Decls.Var("boolean_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + return when (operator) { + Btor2BooleanOperator.IFF -> + IteExpr.of( + IffExpr.create(getOperandRef(op1, opd1_negated), getOperandRef(op2, opd2_negated)), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + Btor2BooleanOperator.IMPLIES -> + IteExpr.of( + ImplyExpr.create(getOperandRef(op1, opd1_negated), getOperandRef(op2, opd2_negated)), + BvExprs.Bv(BooleanArray(1) { true }), + BvExprs.Bv(BooleanArray(1) { false }), + ) + } + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return AssignStmt.of(value, getExpr()) + } +} + +// Ehhez a nidhez vezetünk be egy változót, bekötjük +data class Btor2TernaryOperation( + override val nid: UInt, + override val sort: Btor2Sort, + val operator: Btor2TernaryOperator, + val op1: Btor2Node, + val op2: Btor2Node, + val op3: Btor2Node, + val negated1: Boolean, + val negated2: Boolean, + val negated3: Boolean, +) : Btor2Operation(nid, sort) { + val value = Decls.Var("ternary_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return value + } + + override fun getExpr(): Expr { + checkAllTypesEqual(op1.getExpr(), BvExprs.Bv(BooleanArray(1) { true })) + val op1Expr = getOperandRef(op1, negated1) + val op1ExprBool = Eq(op1Expr, BvExprs.Bv(BooleanArray(1) { true })) + val op2Expr = getOperandRef(op2, negated2) + val op3Expr = getOperandRef(op3, negated3) + + return when (operator) { + Btor2TernaryOperator.ITE -> IteExpr.of(op1ExprBool as Expr, op2Expr, op3Expr) + Btor2TernaryOperator.WRITE -> TODO() + } + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + override fun getStmt(): Stmt { + return when (operator) { + Btor2TernaryOperator.ITE -> AssignStmt.of(value, getExpr()) + Btor2TernaryOperator.WRITE -> TODO("Write operation not implemented yet") + } + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2OperatorEnums.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2OperatorEnums.kt new file mode 100644 index 0000000000..85f81171b6 --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2OperatorEnums.kt @@ -0,0 +1,85 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.models + +enum class Btor2ExtOperator { + SEXT, + UEXT, +} + +enum class Btor2UnaryOperator { + NOT, + INC, + DEC, + NEG, + REDAND, + REDOR, + REDXOR, +} + +enum class Btor2ComparisonOperator { + EQ, + NEQ, + SLT, + SLTE, + SGT, + SGTE, + ULT, + ULTE, + UGT, + UGTE, +} + +enum class Btor2BooleanOperator { + IFF, + IMPLIES, +} + +enum class Btor2BinaryOperator { + AND, + NAND, + NOR, + OR, + XNOR, + XOR, + ADD, + MUL, + UDIV, + UREM, + SDIV, + SREM, + SMOD, + CONCAT, + SADDO, + SDIVO, + SMULO, + SSUBO, + UADDO, + UMULO, + USUBO, + ROL, + ROR, + SLL, + SRA, + SRL, + SUB, + READ, +} + +enum class Btor2TernaryOperator { + ITE, + WRITE, +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Properties.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Properties.kt new file mode 100644 index 0000000000..03be75991f --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Properties.kt @@ -0,0 +1,47 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.models + +import hu.bme.mit.theta.core.decl.VarDecl +import hu.bme.mit.theta.core.stmt.AssumeStmt +import hu.bme.mit.theta.core.stmt.Stmt +import hu.bme.mit.theta.core.type.Expr +import hu.bme.mit.theta.core.type.anytype.RefExpr +import hu.bme.mit.theta.core.type.booltype.BoolType +import hu.bme.mit.theta.core.type.bvtype.BvExprs +import hu.bme.mit.theta.core.type.bvtype.BvExprs.Bv +import hu.bme.mit.theta.core.type.bvtype.BvExprs.Eq +import hu.bme.mit.theta.core.type.bvtype.BvType + +data class Btor2Bad(override val nid: UInt, override val sort: Btor2Sort?, val operand: Btor2Node) : + Btor2Node(nid, null) { + + override fun getVar(): VarDecl<*>? { + return null + } + + override fun getExpr(): Expr { + return Eq(operand.getVar()?.ref as RefExpr, BvExprs.Bv(BooleanArray(1, { true }))) + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } + + fun getStmt(): Stmt { + return AssumeStmt.of(getExpr()) + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Stateful.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Stateful.kt new file mode 100644 index 0000000000..515c541fcf --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/models/Btor2Stateful.kt @@ -0,0 +1,137 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.models + +import hu.bme.mit.theta.core.decl.Decls +import hu.bme.mit.theta.core.decl.VarDecl +import hu.bme.mit.theta.core.stmt.AssignStmt +import hu.bme.mit.theta.core.stmt.HavocStmt +import hu.bme.mit.theta.core.stmt.Stmt +import hu.bme.mit.theta.core.type.Expr +import hu.bme.mit.theta.core.type.anytype.RefExpr +import hu.bme.mit.theta.core.type.bvtype.BvExprs +import hu.bme.mit.theta.core.type.bvtype.BvType + +abstract class Btor2Stateful(id: UInt, sort: Btor2Sort, state: Btor2State?, value: Btor2Node?) : + Btor2Node(id, sort) { + abstract val state: Btor2State? + abstract val value: Btor2Node? + + abstract fun getStmt(): Stmt +} + +// Inputs and States +data class Btor2Input( + override val nid: UInt, + override val sort: Btor2Sort, + override val state: Btor2State?, + override val value: Btor2Node?, +) : Btor2Stateful(nid, sort, null, null) { + val declsVar = Decls.Var("input_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return declsVar + } + + override fun getExpr(): Expr<*> { + return RefExpr.of(declsVar) + } + + override fun getStmt(): Stmt { + return HavocStmt.of(declsVar) + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } +} + +data class Btor2State( + override val nid: UInt, + override val sort: Btor2Sort, + override val state: Btor2State?, + override val value: Btor2Node?, +) : Btor2Stateful(nid, sort, null, null) { + val declsVar = Decls.Var("state_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl? { + return declsVar + } + + override fun getExpr(): Expr<*> { + return RefExpr.of(declsVar) + } + + override fun getStmt(): Stmt { + TODO("We might not even need this Stmt for states") + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } +} + +// Value was Btor2Const +data class Btor2Init( + override val nid: UInt, + override val sort: Btor2Sort, + override val state: Btor2State, + override val value: Btor2Node, +) : Btor2Stateful(nid, sort, state, value) { + val declsVar = Decls.Var("init_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return declsVar + } + + override fun getExpr(): Expr<*> { + TODO("Not yet implemented") + } + + override fun getStmt(): Stmt { + return AssignStmt.of(state.getVar(), value.getExpr() as Expr) + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } +} + +data class Btor2Next( + override val nid: UInt, + override val sort: Btor2Sort, + override val state: Btor2State, + override val value: Btor2Node, + val negated: Boolean, +) : Btor2Stateful(nid, sort, state, value) { + val declsVar = Decls.Var("next_$nid", BvExprs.BvType(sort.width.toInt())) + + override fun getVar(): VarDecl<*>? { + return declsVar + } + + override fun getExpr(): Expr<*> { + return RefExpr.of(declsVar) + } + + override fun getStmt(): Stmt { + return AssignStmt.of(state.getVar(), getOperandRef(value, negated)) + } + + override fun accept(visitor: Btor2NodeVisitor, param: P): R { + return visitor.visit(this, param) + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/Btor2Visitor.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/Btor2Visitor.kt new file mode 100644 index 0000000000..555270a1ef --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/Btor2Visitor.kt @@ -0,0 +1,62 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.visitors + +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2BaseVisitor +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.frontend.models.* + +class Btor2Visitor : Btor2BaseVisitor() { + + private val sortVisitor = SortVisitor() + private val constantVisitor = ConstantVisitor() + private val operationVisitor = OperationVisitor() + private val statefulVisitor = StateVisitor() + + // private val logger = ConsoleLogger(Logger.Level.VERBOSE) + + override fun visitLine(ctx: Btor2Parser.LineContext?): Btor2Circuit { + for (child in ctx?.children!!) { + child.accept(this) + } + return Btor2Circuit + } + + override fun visitSort(ctx: Btor2Parser.SortContext?): Btor2Circuit { + val result = sortVisitor.visit(ctx) + // logger.write(Logger.Level.VERBOSE, "Sort visited \t") + Btor2Circuit.addSort(result) + return Btor2Circuit + } + + override fun visitConstantNode(ctx: Btor2Parser.ConstantNodeContext): Btor2Circuit { + val result = constantVisitor.visit(ctx) + // logger.write(Logger.Level.VERBOSE, "Constant visited \t") + return Btor2Circuit + } + + override fun visitOperation(ctx: Btor2Parser.OperationContext): Btor2Circuit { + val result = operationVisitor.visit(ctx) + // logger.write(Logger.Level.VERBOSE, "Operation visited \t") + return Btor2Circuit + } + + override fun visitStateful(ctx: Btor2Parser.StatefulContext?): Btor2Circuit { + val result = statefulVisitor.visit(ctx) + // logger.write(Logger.Level.VERBOSE, "Stateful visited \t") + return Btor2Circuit + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/ConstantVisitor.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/ConstantVisitor.kt new file mode 100644 index 0000000000..407ab1bd9c --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/ConstantVisitor.kt @@ -0,0 +1,104 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.visitors + +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2BaseVisitor +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.frontend.models.* +import hu.bme.mit.theta.frontend.models.Btor2Circuit.sorts +import java.math.BigInteger + +class ConstantVisitor : Btor2BaseVisitor() { + val idVisitor = IdVisitor() + + override fun visitConstantNode(ctx: Btor2Parser.ConstantNodeContext): Btor2Const { + check(ctx.childCount == 1) + return this.visit(ctx.children[0]) + } + + override fun visitConstant(ctx: Btor2Parser.ConstantContext): Btor2Const { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = sorts[sid] as Btor2BitvecSort + val value = ctx.NUM().text.toString() + val size = sort.width.toInt() + val binArray = BooleanArray(size) { index -> (value[index] - '0') == 1 } + var node = Btor2Const(nid, binArray, sort) + Btor2Circuit.addNode(node) + return node + } + + override fun visitConstant_d(ctx: Btor2Parser.Constant_dContext): Btor2Const { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = sorts[sid] as Btor2BitvecSort + val value = ctx.NUM().text.toBigInteger() + val size = sort.width.toLong().toBigInteger() + val binArray = + BooleanArray(size.toInt()) { index -> + ((value and ((BigInteger.ONE.shiftLeft(size.toInt())) - BigInteger.ONE)).shiftRight( + size.toInt() - 1 - index + ) and BigInteger.ONE) == BigInteger.ONE + } + var node = Btor2Const(nid, binArray, sort) + Btor2Circuit.addNode(node) + return node + } + + override fun visitConstant_h(ctx: Btor2Parser.Constant_hContext): Btor2Const { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = sorts[sid] as Btor2BitvecSort + val value = ctx.NUM().toString() + val size = sort.width.toInt() + val binArray = + BooleanArray(size) { index -> + val hexDigit = value[index / 4] + val bitIndex = 3 - (index % 4) + ((hexDigit - '0') shr bitIndex and 1) == 1 + } + var node = Btor2Const(nid, binArray, sort) + Btor2Circuit.addNode(node) + return node + } + + override fun visitFilled_constant(ctx: Btor2Parser.Filled_constantContext): Btor2Const { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = sorts[sid] as Btor2BitvecSort + val value = + when (ctx.fill.text) { + "one" -> { + val size = sort.width.toInt() + BooleanArray(size) { it == size - 1 } + } + "ones" -> { + val size = sort.width.toInt() + BooleanArray(size) { true } + } + "zero" -> { + val size = sort.width.toInt() + BooleanArray(size) { false } + } + else -> { + throw RuntimeException("Constant with filler shorthand needs to be one/ones/zero") + } + } + var node = Btor2Const(nid, value, sort) + Btor2Circuit.addNode(node) + return node + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/IdVisitor.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/IdVisitor.kt new file mode 100644 index 0000000000..b97c2569bb --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/IdVisitor.kt @@ -0,0 +1,29 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.visitors + +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2BaseVisitor +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser + +class IdVisitor : Btor2BaseVisitor() { + override fun visitNid(ctx: Btor2Parser.NidContext): UInt { + return ctx.NUM().text.toUInt() + } + + override fun visitSid(ctx: Btor2Parser.SidContext): UInt { + return ctx.NUM().text.toUInt() + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/OperationVisitor.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/OperationVisitor.kt new file mode 100644 index 0000000000..57a4b20948 --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/OperationVisitor.kt @@ -0,0 +1,192 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.visitors + +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2BaseVisitor +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.frontend.models.* +import hu.bme.mit.theta.frontend.models.Btor2Circuit.nodes +import kotlin.math.abs + +class OperationVisitor : Btor2BaseVisitor() { + val idVisitor = IdVisitor() + + override fun visitOperation(ctx: Btor2Parser.OperationContext): Btor2Node { + check(ctx.childCount == 1) + return ctx.children[0].accept(this) + } + + override fun visitExt(ctx: Btor2Parser.ExtContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = Btor2Circuit.sorts[sid] as Btor2BitvecSort + val op = + when (ctx.operator.text) { + "sext" -> Btor2ExtOperator.SEXT + "uext" -> Btor2ExtOperator.UEXT + else -> throw RuntimeException("Extension operator unknown") + } + + val opd = nodes[ctx.opd1.text.toUInt()] as Btor2Node + val w = ctx.w.text.toUInt() + + check(sort.width == (opd.sort as Btor2BitvecSort).width + w) + val node = Btor2ExtOperation(nid, sort, op, opd, w) + Btor2Circuit.addNode(node) + return node + } + + override fun visitSlice(ctx: Btor2Parser.SliceContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = Btor2Circuit.sorts[sid] as Btor2BitvecSort + + val opd = nodes[ctx.opd1.text.toUInt()] as Btor2Node + val u = ctx.u.text.toBigInteger() + val l = ctx.l.text.toBigInteger() + + val node = Btor2SliceOperation(nid, sort, opd, u, l) + Btor2Circuit.addNode(node) + return node + } + + override fun visitBinop(ctx: Btor2Parser.BinopContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = Btor2Circuit.sorts[sid] as Btor2BitvecSort + + val opd1_id = ctx.opd1.text.toInt() + val opd2_id = ctx.opd2.text.toInt() + + val opd1_negated = opd1_id < 0 + val opd2_negated = opd2_id < 0 + + val opd1 = nodes[abs(opd1_id).toUInt()] as Btor2Node + val opd2 = nodes[abs(opd2_id).toUInt()] as Btor2Node + + val op = + when (ctx.BINOP().text) { + "and" -> Btor2BinaryOperator.AND + "nand" -> Btor2BinaryOperator.NAND + "nor" -> Btor2BinaryOperator.NOR + "or" -> Btor2BinaryOperator.OR + "xnor" -> Btor2BinaryOperator.XNOR + "xor" -> Btor2BinaryOperator.XOR + "add" -> Btor2BinaryOperator.ADD + "mul" -> Btor2BinaryOperator.MUL + "sub" -> Btor2BinaryOperator.SUB + "udiv" -> Btor2BinaryOperator.UDIV + "urem" -> Btor2BinaryOperator.UREM + "sdiv" -> Btor2BinaryOperator.SDIV + "srem" -> Btor2BinaryOperator.SREM + "smod" -> Btor2BinaryOperator.SMOD + "concat" -> Btor2BinaryOperator.CONCAT + "saddo" -> Btor2BinaryOperator.SADDO + "sdivo" -> Btor2BinaryOperator.SDIVO + "smulo" -> Btor2BinaryOperator.SMULO + "ssubo" -> Btor2BinaryOperator.SSUBO + "uaddo" -> Btor2BinaryOperator.UADDO + "umulo" -> Btor2BinaryOperator.UMULO + "usubo" -> Btor2BinaryOperator.USUBO + "rol" -> Btor2BinaryOperator.ROL + "ror" -> Btor2BinaryOperator.ROR + "sll" -> Btor2BinaryOperator.SLL + "sra" -> Btor2BinaryOperator.SRA + "srl" -> Btor2BinaryOperator.SRL + "eq" -> Btor2ComparisonOperator.EQ + "neq" -> Btor2ComparisonOperator.NEQ + "slt" -> Btor2ComparisonOperator.SLT + "slte" -> Btor2ComparisonOperator.SLTE + "sgt" -> Btor2ComparisonOperator.SGT + "sgte" -> Btor2ComparisonOperator.SGTE + "ult" -> Btor2ComparisonOperator.ULT + "ulte" -> Btor2ComparisonOperator.ULTE + "ugt" -> Btor2ComparisonOperator.UGT + "ugte" -> Btor2ComparisonOperator.UGTE + "iff" -> Btor2BooleanOperator.IFF + "implies" -> Btor2BooleanOperator.IMPLIES + + else -> throw RuntimeException("Binary operator unknown: ${ctx.BINOP().text}") + } + + if (op is Btor2ComparisonOperator) { + val node = Btor2Comparison(nid, sort, op, opd1, opd2, opd1_negated, opd2_negated) + Btor2Circuit.addNode(node) + return node + } else if (op is Btor2BinaryOperator) { + val node = Btor2BinaryOperation(nid, sort, op, opd1, opd2, opd1_negated, opd2_negated) + Btor2Circuit.addNode(node) + return node + } else if (op is Btor2BooleanOperator) { + // Boolean operators are not operations, but comparisons + val node = Btor2Boolean(nid, sort, op, opd1, opd2, opd1_negated, opd2_negated) + Btor2Circuit.addNode(node) + return node + } else { + throw RuntimeException("Binary operator unknown") + } + } + + override fun visitUnop(ctx: Btor2Parser.UnopContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = Btor2Circuit.sorts[sid] as Btor2BitvecSort + + val op = + when (ctx.UNARYOP().text) { + "not" -> Btor2UnaryOperator.NOT + "inc" -> Btor2UnaryOperator.INC + "dec" -> Btor2UnaryOperator.DEC + "neg" -> Btor2UnaryOperator.NEG + "redand" -> Btor2UnaryOperator.REDAND + "redor" -> Btor2UnaryOperator.REDOR + "redxor" -> Btor2UnaryOperator.REDXOR + else -> throw RuntimeException("Unary operator unknown") + } + + val opd = nodes[ctx.opd1.text.toUInt()] as Btor2Node + + val node = Btor2UnaryOperation(nid, sort, op, opd) + Btor2Circuit.addNode(node) + return node + } + + override fun visitTerop(ctx: Btor2Parser.TeropContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort: Btor2BitvecSort = Btor2Circuit.sorts[sid] as Btor2BitvecSort + val op = + when (ctx.TERNARYOP().text) { + "ite" -> Btor2TernaryOperator.ITE + "write" -> Btor2TernaryOperator.WRITE + else -> throw RuntimeException("Ternary operator unknown") + } + val negated1 = ctx.opd1.text.toInt() < 0 + val opd1Index = abs(ctx.opd1.text.toInt()).toUInt() + val negated2 = ctx.opd2.text.toInt() < 0 + val negated3 = ctx.opd3.text.toInt() < 0 + val opd2Index = abs(ctx.opd2.text.toInt()).toUInt() + val opd3Index = abs(ctx.opd3.text.toInt()).toUInt() + + val opd1 = nodes[opd1Index] as Btor2Node + val opd2 = nodes[opd2Index] as Btor2Node + val opd3 = nodes[opd3Index] as Btor2Node + + val node = Btor2TernaryOperation(nid, sort, op, opd1, opd2, opd3, negated1, negated2, negated3) + Btor2Circuit.addNode(node) + return node + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/SortVisitor.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/SortVisitor.kt new file mode 100644 index 0000000000..11a7c28957 --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/SortVisitor.kt @@ -0,0 +1,32 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.visitors + +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2BaseVisitor +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.frontend.models.* + +class SortVisitor : Btor2BaseVisitor() { + override fun visitSort(ctx: Btor2Parser.SortContext): Btor2Sort { + return this.visitBitvec_sort(ctx.bitvec_sort()) + } + + override fun visitBitvec_sort(ctx: Btor2Parser.Bitvec_sortContext): Btor2Sort { + var sort = Btor2BitvecSort(ctx.id.NUM().text.toUInt(), ctx.width.text.toUInt()) + Btor2Circuit.addSort(sort) + return sort + } +} diff --git a/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/StateVisitor.kt b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/StateVisitor.kt new file mode 100644 index 0000000000..6d95de3317 --- /dev/null +++ b/subprojects/frontends/btor2-frontend/src/main/java/hu/bme/mit/theta/frontend/visitors/StateVisitor.kt @@ -0,0 +1,93 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.frontend.visitors + +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2BaseVisitor +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.frontend.models.* +import kotlin.math.abs + +class StateVisitor : Btor2BaseVisitor() { + private val idVisitor = IdVisitor() + + override fun visitStateful(ctx: Btor2Parser.StatefulContext): Btor2Node { + check(ctx.childCount == 1) + return ctx.children[0].accept(this) + } + + override fun visitState(ctx: Btor2Parser.StateContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort = Btor2Circuit.sorts[sid] as Btor2Sort + + val node = Btor2State(nid, sort, null, null) + Btor2Circuit.addNode(node) + return node + } + + override fun visitInput(ctx: Btor2Parser.InputContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort = Btor2Circuit.sorts[sid] as Btor2Sort + + val node = Btor2Input(nid, sort, null, null) + Btor2Circuit.addNode(node) + return node + } + + override fun visitInit(ctx: Btor2Parser.InitContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort = Btor2Circuit.sorts[sid]!! + + val param1 = Btor2Circuit.nodes[ctx.param1.NUM().text.toUInt()] as Btor2State + val param2 = Btor2Circuit.nodes[ctx.param2.NUM().text.toUInt()] as Btor2Node + + check((param1.sort as Btor2BitvecSort).width == (param2.sort as Btor2BitvecSort).width) + val node = Btor2Init(nid, sort, param1, param2) + Btor2Circuit.addNode(node) + return node + } + + override fun visitNext(ctx: Btor2Parser.NextContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val sid = idVisitor.visit(ctx.sid()) + val sort = Btor2Circuit.sorts[sid] as Btor2Sort + + val param2_id = ctx.param2.text.toInt() + + val param2_negated = param2_id < 0 + val param1 = Btor2Circuit.nodes[ctx.param1.NUM().text.toUInt()] as Btor2State + val param2 = Btor2Circuit.nodes[abs(param2_id).toUInt()] as Btor2Node + val node = Btor2Next(nid, sort, param1, param2, param2_negated) + Btor2Circuit.addNode(node) + return node + } + + // Only adding bads + override fun visitProperty(ctx: Btor2Parser.PropertyContext): Btor2Node { + val nid = idVisitor.visit(ctx.id) + val node = Btor2Bad(nid, null, Btor2Circuit.nodes[ctx.param.NUM().text.toUInt()] as Btor2Node) + when (ctx.property_type.text) { + "bad" -> { + Btor2Circuit.addNode(node) + return node + } + else -> + throw IllegalArgumentException("Not implemented property type: ${ctx.property_type.text}") + } + } +} diff --git a/subprojects/xcfa/btor2xcfa/build.gradle.kts b/subprojects/xcfa/btor2xcfa/build.gradle.kts new file mode 100644 index 0000000000..c98deae2ed --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/build.gradle.kts @@ -0,0 +1,26 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +plugins { + id("kotlin-common") +} + +dependencies { + implementation(project(":theta-common")) + implementation(project(":theta-core")) + implementation(project(":theta-xcfa")) + implementation(project(":theta-btor2-frontend")) + implementation(project(":theta-c-frontend")) +} diff --git a/subprojects/xcfa/btor2xcfa/src/main/java/hu.bme.mit.theta.btor2xcfa/Btor2XcfaBuilder.kt b/subprojects/xcfa/btor2xcfa/src/main/java/hu.bme.mit.theta.btor2xcfa/Btor2XcfaBuilder.kt new file mode 100644 index 0000000000..f6acaf7e99 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/main/java/hu.bme.mit.theta.btor2xcfa/Btor2XcfaBuilder.kt @@ -0,0 +1,239 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package hu.bme.mit.theta.btor2xcfa + +import hu.bme.mit.theta.common.logging.Logger +import hu.bme.mit.theta.core.stmt.AssumeStmt +import hu.bme.mit.theta.core.stmt.HavocStmt +import hu.bme.mit.theta.core.type.booltype.BoolExprs +import hu.bme.mit.theta.core.type.bvtype.BvLitExpr +import hu.bme.mit.theta.frontend.ParseContext +import hu.bme.mit.theta.frontend.models.* +import hu.bme.mit.theta.frontend.transformation.grammar.preprocess.ArithmeticTrait +import hu.bme.mit.theta.xcfa.model.* +import hu.bme.mit.theta.xcfa.passes.Btor2EmptyPass +import hu.bme.mit.theta.xcfa.passes.Btor2Passes +import hu.bme.mit.theta.xcfa.utils.AssignStmtLabel + + + +object Btor2XcfaBuilder { + + private var i: Int = 1 + + fun btor2xcfa(btor2Passes: Boolean, parseContext: ParseContext, uniqueLogger: Logger): XCFA { + check(Btor2Circuit.properties.isNotEmpty(), { "Circuit has no error property" }) + // check(Btor2Circuit.properties.size <= 1, { "More than 1 property isn't allowed" }) + + // would be nice to check that no operand node (i.e. right side node) is later than it's + // operation node (i.e. left side) + // but I think we parse it in the right order, so it's the circuit's fault if the above does not + // hold + val ops = Btor2Circuit.ops.values.toList() + val nodes = Btor2Circuit.nodes.values.toList() + + val xcfaBuilder = XcfaBuilder("Btor2XCFA") + parseContext.addArithmeticTrait(ArithmeticTrait.BITWISE) + + val procBuilder = XcfaProcedureBuilder( + "main", + if (btor2Passes) Btor2Passes(parseContext, uniqueLogger) else Btor2EmptyPass() + ) + + xcfaBuilder.addEntryPoint(procBuilder, emptyList()) + procBuilder.createInitLoc() + + Btor2Circuit.nodes.forEach() { + it.value.getVar()?.let { varDecl -> procBuilder.addVar(varDecl) } + } + + var lastLoc = procBuilder.initLoc + var newLoc = nextLoc(false, false, false) + + // add values to constants + val constEdge = + XcfaEdge( + lastLoc, + newLoc, + SequenceLabel( + Btor2Circuit.constants.values + .map { + AssignStmtLabel(it.getVar()!!.ref, BvLitExpr.of(it.value), metadata = EmptyMetaData) + } + .toList() + ), + EmptyMetaData, + ) + procBuilder.addEdge(constEdge) + i++ + lastLoc = newLoc + + // Initializations + newLoc = nextLoc(false, false, false) + procBuilder.addLoc(newLoc) + val stateInitMap: MutableMap = mutableMapOf() + for (init in Btor2Circuit.states.values.filter { it is Btor2Init }) { + stateInitMap[init.state!!] = (init as Btor2Init) + } + + val edge = + XcfaEdge( + lastLoc, + newLoc, + SequenceLabel( + Btor2Circuit.states.values + .filter { it is Btor2State } + .map { + StmtLabel( + if (it in stateInitMap.keys) { + stateInitMap[it]!!.getStmt() + } else { + HavocStmt.of(it.getVar()) + }, + metadata = EmptyMetaData, + ) + } + .toList() + ), + EmptyMetaData, + ) + procBuilder.addEdge(edge) + lastLoc = newLoc + val loopHeadLoc = newLoc + + // Havoc initial value of input variables + if (Btor2Circuit.states.values.filter { it is Btor2Input }.isNotEmpty()) { + newLoc = nextLoc(false, false, false) + procBuilder.addLoc(newLoc) + val edge = + XcfaEdge( + lastLoc, + newLoc, + SequenceLabel( + Btor2Circuit.states.values + .filter { it is Btor2Input } + .map { StmtLabel(it.getStmt(), metadata = EmptyMetaData) } + .toList() + ), + EmptyMetaData, + ) + procBuilder.addEdge(edge) + lastLoc = newLoc + } + + // Add operations + Btor2Circuit.ops.forEach() { + val loc = nextLoc(false, false, false) + + procBuilder.addLoc(loc) + + val edge = XcfaEdge(lastLoc, loc, StmtLabel(it.value.getStmt()), EmptyMetaData) + procBuilder.addEdge(edge) + lastLoc = loc + if (Btor2Circuit.properties.values.any { property -> property.operand.nid == it.value.nid }) { + procBuilder.createErrorLoc() + val badProperty = + Btor2Circuit.properties.values.find { property -> property.operand.nid == it.value.nid } + procBuilder.addEdge( + XcfaEdge( + lastLoc, + procBuilder.errorLoc.get(), + StmtLabel(AssumeStmt.of(badProperty!!.getExpr())), + EmptyMetaData, + ) + ) + newLoc = nextLoc(false, false, false) + procBuilder.addEdge( + XcfaEdge( + lastLoc, + newLoc, + StmtLabel(AssumeStmt.of(BoolExprs.Not(badProperty!!.getExpr()))), + EmptyMetaData, + ) + ) + lastLoc = newLoc + } + } + /* + procBuilder.createErrorLoc() + // Add properties + procBuilder.addEdge( + XcfaEdge( + lastLoc, + procBuilder.errorLoc.get(), + SequenceLabel( + Btor2Circuit.properties.values + .filter { + it is Btor2Bad + } + .map { StmtLabel(AssumeStmt.of(it.getExpr())) } + .toList() + ), + EmptyMetaData, + ) + ) + + newLoc = nextLoc(false, false, false) + procBuilder.addEdge( + XcfaEdge( + lastLoc, + newLoc, + SequenceLabel( + Btor2Circuit.properties.values + .filter { + it is Btor2Bad + } + .map { StmtLabel(AssumeStmt.of(BoolExprs.Not(it.getExpr()))) } + .toList() + ), + EmptyMetaData, + ) + ) + lastLoc = newLoc + */ + // Close circuit (update state values with nexts, havoc otherwise) + var nexts = Btor2Circuit.states.values.filter { it is Btor2Next }.toList() + var statesWithNext = nexts.map { (it as Btor2Next).state }.toSet() + var statesWithoutNext = + Btor2Circuit.states.values + .filter { it is Btor2State } + .filter { !statesWithNext.contains(it) } + .toList() + + nexts.forEach { + newLoc = nextLoc(false, false, false) + procBuilder.addEdge(XcfaEdge(lastLoc, newLoc, StmtLabel(it.getStmt()), EmptyMetaData)) + lastLoc = newLoc + } + + statesWithoutNext.forEach { + newLoc = nextLoc(false, false, false) + procBuilder.addEdge( + XcfaEdge(lastLoc, newLoc, StmtLabel(HavocStmt.of(it.getVar()!!)), EmptyMetaData) + ) + lastLoc = newLoc + } + + procBuilder.addEdge(XcfaEdge(lastLoc, loopHeadLoc, metadata = EmptyMetaData)) + return xcfaBuilder.build() + } + + private fun nextLoc(initial: Boolean, final: Boolean, error: Boolean): XcfaLocation { + val loc = XcfaLocation("l${i}", initial, final, error, EmptyMetaData) + i++ + return loc + } +} diff --git a/subprojects/xcfa/btor2xcfa/src/test/java/TestBtor2Xcfa.kt b/subprojects/xcfa/btor2xcfa/src/test/java/TestBtor2Xcfa.kt new file mode 100644 index 0000000000..257b349fd2 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/java/TestBtor2Xcfa.kt @@ -0,0 +1,67 @@ +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Lexer +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.btor2xcfa.Btor2XcfaBuilder +import hu.bme.mit.theta.common.logging.ConsoleLogger +import hu.bme.mit.theta.common.logging.Logger +import hu.bme.mit.theta.common.logging.UniqueWarningLogger +import hu.bme.mit.theta.frontend.visitors.Btor2Visitor +import hu.bme.mit.theta.xcfa.model.toDot +import java.io.File +import org.antlr.v4.runtime.BailErrorStrategy +import org.antlr.v4.runtime.CharStreams +import org.antlr.v4.runtime.CommonTokenStream +import org.junit.jupiter.api.Test + +/* + * Copyright 2025 Budapest University of Technology and Economics + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/* +class TestBtor2Xcfa { + @Test + fun testBtor2Xcfa() { + val logger = ConsoleLogger(Logger.Level.VERBOSE) + val uniqueWarningLogger = UniqueWarningLogger(logger) + val visitor = Btor2Visitor() + val btor2File = File("") + + val input = btor2File.readLines().joinToString("\n") + val cinput = CharStreams.fromString(input) + val lexer = Btor2Lexer(cinput) + val tokens = CommonTokenStream(lexer) + val parser = Btor2Parser(tokens) + parser.errorHandler = BailErrorStrategy() + val context = parser.btor2() + + context.accept(visitor) + + val xcfa = Btor2XcfaBuilder.btor2xcfa(uniqueWarningLogger) + logger.write(Logger.Level.VERBOSE, "XCFA built, result: " + xcfa.toDot() + "\n") + } +}*/ diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/adding.1.prop1-back-serstep.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/adding.1.prop1-back-serstep.btor2 new file mode 100644 index 0000000000..00e7dd28a5 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/adding.1.prop1-back-serstep.btor2 @@ -0,0 +1,179 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 5 +3 sort bitvec 16 +4 sort bitvec 32 +5 zero 3 +6 state 3 nextv_c +7 init 3 6 5 +8 state 3 nextv_x1 +9 init 3 8 5 +10 state 3 nextv_x2 +11 init 3 10 5 +12 zero 1 +13 state 1 nexta_Q_a1 +14 init 1 13 12 +15 state 1 nexta_R_a1 +16 init 1 15 12 +17 state 1 nexta_S_a1 +18 init 1 17 12 +19 state 1 nexta_Q_a2 +20 init 1 19 12 +21 state 1 nexta_R_a2 +22 init 1 21 12 +23 state 1 nexta_S_a2 +24 init 1 23 12 +25 state 1 dve_initialized +26 init 1 25 12 +27 state 1 dve_valid +28 init 1 27 12 +29 and 1 13 -15 +30 and 1 29 -17 +31 and 1 30 19 +32 and 1 31 -21 +33 and 1 32 -23 +34 constd 3 1 +35 eq 1 34 6 +36 and 1 33 35 +37 constd 3 0 +38 eq 1 37 8 +39 and 1 36 38 +40 eq 1 37 10 +41 and 1 39 40 +42 and 1 27 41 +43 bad 42 +44 input 3 v_c +45 next 3 6 44 +46 input 3 v_x1 +47 next 3 8 46 +48 input 3 v_x2 +49 next 3 10 48 +50 input 1 a_Q_a1 +51 next 1 13 50 +52 input 1 a_R_a1 +53 next 1 15 52 +54 input 1 a_S_a1 +55 next 1 17 54 +56 input 1 a_Q_a2 +57 next 1 19 56 +58 input 1 a_R_a2 +59 next 1 21 58 +60 input 1 a_S_a2 +61 next 1 23 60 +62 const 1 1 +63 next 1 25 62 +64 input 1 f0 +65 constd 4 20 +66 constd 3 0 +67 concat 4 44 66 +68 constd 4 16 +69 sra 4 67 68 +70 ulte 1 65 69 +71 and 1 50 -70 +72 or 1 -64 71 +73 or 1 52 64 +74 input 1 f1 +75 or 1 73 -74 +76 and 1 72 75 +77 or 1 54 74 +78 input 1 f2 +79 or 1 77 -78 +80 and 1 76 79 +81 input 1 f3 +82 ite 3 64 44 46 +83 concat 4 82 66 +84 sra 4 83 68 +85 add 4 69 84 +86 slice 3 85 15 0 +87 ite 3 74 86 82 +88 ite 3 78 87 44 +89 concat 4 88 66 +90 sra 4 89 68 +91 ulte 1 65 90 +92 and 1 56 -91 +93 or 1 -81 92 +94 and 1 80 93 +95 or 1 58 81 +96 input 1 f4 +97 or 1 95 -96 +98 and 1 94 97 +99 or 1 60 96 +100 input 1 f5 +101 or 1 99 -100 +102 and 1 98 101 +103 or 1 64 74 +104 or 1 78 103 +105 or 1 81 104 +106 or 1 96 105 +107 or 1 100 106 +108 and 1 102 107 +109 and 1 50 52 +110 or 1 50 52 +111 and 1 54 110 +112 or 1 109 111 +113 or 1 54 110 +114 and 1 -112 113 +115 and 1 56 58 +116 or 1 56 58 +117 and 1 60 116 +118 or 1 115 117 +119 and 1 114 -118 +120 or 1 60 116 +121 and 1 119 120 +122 and 1 108 121 +123 and 1 73 -74 +124 and 1 50 -64 +125 or 1 124 78 +126 and 1 123 125 +127 and 1 77 -78 +128 or 1 123 125 +129 and 1 127 128 +130 or 1 126 129 +131 or 1 127 128 +132 and 1 -130 131 +133 and 1 95 -96 +134 and 1 56 -81 +135 or 1 134 100 +136 and 1 133 135 +137 and 1 99 -100 +138 or 1 133 135 +139 and 1 137 138 +140 or 1 136 139 +141 and 1 132 -140 +142 or 1 137 138 +143 and 1 141 142 +144 and 1 122 143 +145 ite 3 81 88 48 +146 concat 4 145 66 +147 sra 4 146 68 +148 add 4 90 147 +149 slice 3 148 15 0 +150 ite 3 96 149 145 +151 ite 3 100 150 88 +152 eq 1 151 6 +153 and 1 144 152 +154 eq 1 87 8 +155 and 1 153 154 +156 eq 1 150 10 +157 and 1 155 156 +158 eq 1 125 13 +159 and 1 157 158 +160 eq 1 123 15 +161 and 1 159 160 +162 eq 1 127 17 +163 and 1 161 162 +164 eq 1 135 19 +165 and 1 163 164 +166 eq 1 133 21 +167 and 1 165 166 +168 eq 1 137 23 +169 and 1 167 168 +170 and 1 169 27 +171 constd 4 17 +172 eq 1 171 69 +173 ite 1 25 170 172 +174 next 1 27 173 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/adding.1.prop1-func-interl.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/adding.1.prop1-func-interl.btor2 new file mode 100644 index 0000000000..5b600358b7 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/adding.1.prop1-func-interl.btor2 @@ -0,0 +1,144 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 5 +3 sort bitvec 16 +4 sort bitvec 32 +5 zero 3 +6 state 3 v_c +7 init 3 6 5 +8 state 3 v_x1 +9 init 3 8 5 +10 state 3 v_x2 +11 init 3 10 5 +12 zero 1 +13 state 1 a_Q_a1 +14 init 1 13 12 +15 state 1 a_R_a1 +16 init 1 15 12 +17 state 1 a_S_a1 +18 init 1 17 12 +19 state 1 a_Q_a2 +20 init 1 19 12 +21 state 1 a_R_a2 +22 init 1 21 12 +23 state 1 a_S_a2 +24 init 1 23 12 +25 state 1 dve_invalid +26 init 1 25 12 +27 constd 4 17 +28 constd 3 1 +29 xor 3 28 6 +30 constd 3 0 +31 concat 4 29 30 +32 constd 4 16 +33 sra 4 31 32 +34 eq 1 27 33 +35 and 1 -25 34 +36 bad 35 +37 input 1 f5 +38 input 1 f2 +39 ite 3 38 8 29 +40 ite 3 37 10 39 +41 xor 3 28 40 +42 next 3 6 41 +43 input 1 f1 +44 concat 4 8 30 +45 sra 4 44 32 +46 add 4 33 45 +47 slice 3 46 15 0 +48 input 1 f0 +49 ite 3 48 29 8 +50 ite 3 43 47 49 +51 next 3 8 50 +52 input 1 f4 +53 concat 4 10 30 +54 sra 4 53 32 +55 add 4 33 54 +56 slice 3 55 15 0 +57 input 1 f3 +58 ite 3 57 29 10 +59 ite 3 52 56 58 +60 next 3 10 59 +61 and 1 -13 -48 +62 or 1 61 38 +63 next 1 13 -62 +64 or 1 15 48 +65 and 1 64 -43 +66 next 1 15 65 +67 or 1 17 43 +68 and 1 67 -38 +69 next 1 17 68 +70 and 1 -19 -57 +71 or 1 70 37 +72 next 1 19 -71 +73 or 1 21 57 +74 and 1 73 -52 +75 next 1 21 74 +76 or 1 23 52 +77 and 1 76 -37 +78 next 1 23 77 +79 constd 4 20 +80 ulte 1 79 33 +81 and 1 -13 -80 +82 or 1 -48 81 +83 or 1 15 -43 +84 and 1 82 83 +85 or 1 17 -38 +86 and 1 84 85 +87 and 1 -19 -80 +88 or 1 -57 87 +89 and 1 86 88 +90 or 1 21 -52 +91 and 1 89 90 +92 or 1 23 -37 +93 and 1 91 92 +94 or 1 48 43 +95 or 1 38 94 +96 or 1 57 95 +97 or 1 52 96 +98 or 1 37 97 +99 and 1 93 98 +100 and 1 48 43 +101 and 1 38 94 +102 or 1 100 101 +103 and 1 57 95 +104 or 1 102 103 +105 and 1 52 96 +106 or 1 104 105 +107 and 1 37 97 +108 or 1 106 107 +109 and 1 99 -108 +110 and 1 -13 15 +111 or 1 -13 15 +112 and 1 17 111 +113 or 1 110 112 +114 or 1 17 111 +115 and 1 -113 114 +116 and 1 -19 21 +117 or 1 -19 21 +118 and 1 23 117 +119 or 1 116 118 +120 and 1 115 -119 +121 or 1 23 117 +122 and 1 120 121 +123 and 1 109 122 +124 and 1 65 62 +125 or 1 65 62 +126 and 1 68 125 +127 or 1 124 126 +128 or 1 68 125 +129 and 1 -127 128 +130 and 1 74 71 +131 or 1 74 71 +132 and 1 77 131 +133 or 1 130 132 +134 and 1 129 -133 +135 or 1 77 131 +136 and 1 134 135 +137 and 1 123 136 +138 and 1 137 -25 +139 next 1 25 -138 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/adding.3.prop1-back-serstep.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/adding.3.prop1-back-serstep.btor2 new file mode 100644 index 0000000000..34ac31f2c1 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/adding.3.prop1-back-serstep.btor2 @@ -0,0 +1,179 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 5 +3 sort bitvec 16 +4 sort bitvec 32 +5 zero 3 +6 state 3 nextv_c +7 init 3 6 5 +8 state 3 nextv_x1 +9 init 3 8 5 +10 state 3 nextv_x2 +11 init 3 10 5 +12 zero 1 +13 state 1 nexta_Q_a1 +14 init 1 13 12 +15 state 1 nexta_R_a1 +16 init 1 15 12 +17 state 1 nexta_S_a1 +18 init 1 17 12 +19 state 1 nexta_Q_a2 +20 init 1 19 12 +21 state 1 nexta_R_a2 +22 init 1 21 12 +23 state 1 nexta_S_a2 +24 init 1 23 12 +25 state 1 dve_initialized +26 init 1 25 12 +27 state 1 dve_valid +28 init 1 27 12 +29 and 1 13 -15 +30 and 1 29 -17 +31 and 1 30 19 +32 and 1 31 -21 +33 and 1 32 -23 +34 constd 3 1 +35 eq 1 34 6 +36 and 1 33 35 +37 constd 3 0 +38 eq 1 37 8 +39 and 1 36 38 +40 eq 1 37 10 +41 and 1 39 40 +42 and 1 27 41 +43 bad 42 +44 input 3 v_c +45 next 3 6 44 +46 input 3 v_x1 +47 next 3 8 46 +48 input 3 v_x2 +49 next 3 10 48 +50 input 1 a_Q_a1 +51 next 1 13 50 +52 input 1 a_R_a1 +53 next 1 15 52 +54 input 1 a_S_a1 +55 next 1 17 54 +56 input 1 a_Q_a2 +57 next 1 19 56 +58 input 1 a_R_a2 +59 next 1 21 58 +60 input 1 a_S_a2 +61 next 1 23 60 +62 const 1 1 +63 next 1 25 62 +64 input 1 f0 +65 constd 4 300 +66 constd 3 0 +67 concat 4 44 66 +68 constd 4 16 +69 sra 4 67 68 +70 ulte 1 65 69 +71 and 1 50 -70 +72 or 1 -64 71 +73 or 1 52 64 +74 input 1 f1 +75 or 1 73 -74 +76 and 1 72 75 +77 or 1 54 74 +78 input 1 f2 +79 or 1 77 -78 +80 and 1 76 79 +81 input 1 f3 +82 ite 3 64 44 46 +83 concat 4 82 66 +84 sra 4 83 68 +85 add 4 69 84 +86 slice 3 85 15 0 +87 ite 3 74 86 82 +88 ite 3 78 87 44 +89 concat 4 88 66 +90 sra 4 89 68 +91 ulte 1 65 90 +92 and 1 56 -91 +93 or 1 -81 92 +94 and 1 80 93 +95 or 1 58 81 +96 input 1 f4 +97 or 1 95 -96 +98 and 1 94 97 +99 or 1 60 96 +100 input 1 f5 +101 or 1 99 -100 +102 and 1 98 101 +103 or 1 64 74 +104 or 1 78 103 +105 or 1 81 104 +106 or 1 96 105 +107 or 1 100 106 +108 and 1 102 107 +109 and 1 50 52 +110 or 1 50 52 +111 and 1 54 110 +112 or 1 109 111 +113 or 1 54 110 +114 and 1 -112 113 +115 and 1 56 58 +116 or 1 56 58 +117 and 1 60 116 +118 or 1 115 117 +119 and 1 114 -118 +120 or 1 60 116 +121 and 1 119 120 +122 and 1 108 121 +123 and 1 73 -74 +124 and 1 50 -64 +125 or 1 124 78 +126 and 1 123 125 +127 and 1 77 -78 +128 or 1 123 125 +129 and 1 127 128 +130 or 1 126 129 +131 or 1 127 128 +132 and 1 -130 131 +133 and 1 95 -96 +134 and 1 56 -81 +135 or 1 134 100 +136 and 1 133 135 +137 and 1 99 -100 +138 or 1 133 135 +139 and 1 137 138 +140 or 1 136 139 +141 and 1 132 -140 +142 or 1 137 138 +143 and 1 141 142 +144 and 1 122 143 +145 ite 3 81 88 48 +146 concat 4 145 66 +147 sra 4 146 68 +148 add 4 90 147 +149 slice 3 148 15 0 +150 ite 3 96 149 145 +151 ite 3 100 150 88 +152 eq 1 151 6 +153 and 1 144 152 +154 eq 1 87 8 +155 and 1 153 154 +156 eq 1 150 10 +157 and 1 155 156 +158 eq 1 125 13 +159 and 1 157 158 +160 eq 1 123 15 +161 and 1 159 160 +162 eq 1 127 17 +163 and 1 161 162 +164 eq 1 135 19 +165 and 1 163 164 +166 eq 1 133 21 +167 and 1 165 166 +168 eq 1 137 23 +169 and 1 167 168 +170 and 1 169 27 +171 constd 4 637 +172 eq 1 171 69 +173 ite 1 25 170 172 +174 next 1 27 173 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/anderson.1.prop1-back-serstep.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/anderson.1.prop1-back-serstep.btor2 new file mode 100644 index 0000000000..09f82a14cb --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/anderson.1.prop1-back-serstep.btor2 @@ -0,0 +1,340 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 8 +3 sort bitvec 24 +4 sort bitvec 32 +5 zero 2 +6 state 2 nextv_Slot_0 +7 init 2 6 5 +8 state 2 nextv_Slot_1 +9 init 2 8 5 +10 state 2 nextv_next +11 init 2 10 5 +12 state 2 nextv_my_place_P_0 +13 init 2 12 5 +14 state 2 nextv_my_place_P_1 +15 init 2 14 5 +16 zero 1 +17 state 1 nexta_NCS_P_0 +18 init 1 17 16 +19 state 1 nexta_p1_P_0 +20 init 1 19 16 +21 state 1 nexta_p2_P_0 +22 init 1 21 16 +23 state 1 nexta_p3_P_0 +24 init 1 23 16 +25 state 1 nexta_CS_P_0 +26 init 1 25 16 +27 state 1 nexta_NCS_P_1 +28 init 1 27 16 +29 state 1 nexta_p1_P_1 +30 init 1 29 16 +31 state 1 nexta_p2_P_1 +32 init 1 31 16 +33 state 1 nexta_p3_P_1 +34 init 1 33 16 +35 state 1 nexta_CS_P_1 +36 init 1 35 16 +37 state 1 dve_initialized +38 init 1 37 16 +39 state 1 dve_valid +40 init 1 39 16 +41 and 1 17 -19 +42 and 1 41 -21 +43 and 1 42 -23 +44 and 1 43 -25 +45 and 1 44 27 +46 and 1 45 -29 +47 and 1 46 -31 +48 and 1 47 -33 +49 and 1 48 -35 +50 constd 2 1 +51 eq 1 50 6 +52 and 1 49 51 +53 constd 2 0 +54 eq 1 53 8 +55 and 1 52 54 +56 eq 1 53 10 +57 and 1 55 56 +58 eq 1 53 12 +59 and 1 57 58 +60 eq 1 53 14 +61 and 1 59 60 +62 and 1 39 61 +63 bad 62 +64 input 2 v_Slot_0 +65 next 2 6 64 +66 input 2 v_Slot_1 +67 next 2 8 66 +68 input 2 v_next +69 next 2 10 68 +70 input 2 v_my_place_P_0 +71 next 2 12 70 +72 input 2 v_my_place_P_1 +73 next 2 14 72 +74 input 1 a_NCS_P_0 +75 next 1 17 74 +76 input 1 a_p1_P_0 +77 next 1 19 76 +78 input 1 a_p2_P_0 +79 next 1 21 78 +80 input 1 a_p3_P_0 +81 next 1 23 80 +82 input 1 a_CS_P_0 +83 next 1 25 82 +84 input 1 a_NCS_P_1 +85 next 1 27 84 +86 input 1 a_p1_P_1 +87 next 1 29 86 +88 input 1 a_p2_P_1 +89 next 1 31 88 +90 input 1 a_p3_P_1 +91 next 1 33 90 +92 input 1 a_CS_P_1 +93 next 1 35 92 +94 const 1 1 +95 next 1 37 94 +96 input 1 f00 +97 or 1 74 -96 +98 input 1 f01 +99 or 1 76 96 +100 ite 2 96 68 70 +101 eq 1 50 100 +102 and 1 99 101 +103 or 1 -98 102 +104 and 1 97 103 +105 input 1 f02 +106 and 1 99 -98 +107 and 1 -101 106 +108 or 1 -105 107 +109 and 1 104 108 +110 input 1 f03 +111 or 1 78 98 +112 or 1 111 105 +113 constd 3 0 +114 concat 4 113 100 +115 constd 4 2 +116 srem 4 114 115 +117 slice 2 116 7 0 +118 ite 2 105 117 100 +119 eq 1 53 118 +120 ite 2 119 64 66 +121 eq 1 50 120 +122 and 1 112 121 +123 or 1 -110 122 +124 and 1 109 123 +125 or 1 80 110 +126 input 1 f04 +127 or 1 125 -126 +128 and 1 124 127 +129 or 1 82 126 +130 input 1 f05 +131 or 1 129 -130 +132 and 1 128 131 +133 input 1 f06 +134 or 1 84 -133 +135 and 1 132 134 +136 input 1 f07 +137 or 1 86 133 +138 constd 4 1 +139 concat 4 113 68 +140 add 4 138 139 +141 slice 2 140 7 0 +142 ite 2 96 141 68 +143 concat 4 113 142 +144 sub 4 143 115 +145 slice 2 144 7 0 +146 ite 2 98 145 142 +147 ite 2 133 146 72 +148 eq 1 50 147 +149 and 1 137 148 +150 or 1 -136 149 +151 and 1 135 150 +152 input 1 f08 +153 and 1 137 -136 +154 and 1 -148 153 +155 or 1 -152 154 +156 and 1 151 155 +157 input 1 f09 +158 or 1 88 136 +159 or 1 158 152 +160 concat 4 113 147 +161 srem 4 160 115 +162 slice 2 161 7 0 +163 ite 2 152 162 147 +164 eq 1 53 163 +165 constd 4 0 +166 concat 4 113 118 +167 add 4 138 166 +168 srem 4 167 115 +169 eq 1 165 168 +170 and 1 130 169 +171 add 4 115 166 +172 sub 4 171 138 +173 srem 4 172 115 +174 eq 1 165 173 +175 and 1 126 174 +176 ite 2 175 53 64 +177 ite 2 170 50 176 +178 eq 1 138 168 +179 and 1 130 178 +180 eq 1 138 173 +181 and 1 126 180 +182 ite 2 181 53 66 +183 ite 2 179 50 182 +184 ite 2 164 177 183 +185 eq 1 50 184 +186 and 1 159 185 +187 or 1 -157 186 +188 and 1 156 187 +189 or 1 90 157 +190 input 1 f10 +191 or 1 189 -190 +192 and 1 188 191 +193 or 1 92 190 +194 input 1 f11 +195 or 1 193 -194 +196 and 1 192 195 +197 or 1 96 98 +198 or 1 105 197 +199 or 1 110 198 +200 or 1 126 199 +201 or 1 130 200 +202 or 1 133 201 +203 or 1 136 202 +204 or 1 152 203 +205 or 1 157 204 +206 or 1 190 205 +207 or 1 194 206 +208 and 1 196 207 +209 and 1 74 76 +210 or 1 74 76 +211 and 1 78 210 +212 or 1 209 211 +213 or 1 78 210 +214 and 1 80 213 +215 or 1 212 214 +216 or 1 80 213 +217 and 1 82 216 +218 or 1 215 217 +219 or 1 82 216 +220 and 1 -218 219 +221 and 1 84 86 +222 or 1 84 86 +223 and 1 88 222 +224 or 1 221 223 +225 or 1 88 222 +226 and 1 90 225 +227 or 1 224 226 +228 or 1 90 225 +229 and 1 92 228 +230 or 1 227 229 +231 and 1 220 -230 +232 or 1 92 228 +233 and 1 231 232 +234 and 1 208 233 +235 and 1 106 -105 +236 and 1 74 -96 +237 or 1 236 130 +238 and 1 235 237 +239 and 1 112 -110 +240 or 1 235 237 +241 and 1 239 240 +242 or 1 238 241 +243 and 1 125 -126 +244 or 1 239 240 +245 and 1 243 244 +246 or 1 242 245 +247 and 1 129 -130 +248 or 1 243 244 +249 and 1 247 248 +250 or 1 246 249 +251 or 1 247 248 +252 and 1 -250 251 +253 and 1 153 -152 +254 and 1 84 -133 +255 or 1 254 194 +256 and 1 253 255 +257 and 1 159 -157 +258 or 1 253 255 +259 and 1 257 258 +260 or 1 256 259 +261 and 1 189 -190 +262 or 1 257 258 +263 and 1 261 262 +264 or 1 260 263 +265 and 1 193 -194 +266 or 1 261 262 +267 and 1 265 266 +268 or 1 264 267 +269 and 1 252 -268 +270 or 1 265 266 +271 and 1 269 270 +272 and 1 234 271 +273 concat 4 113 163 +274 add 4 138 273 +275 srem 4 274 115 +276 eq 1 165 275 +277 and 1 194 276 +278 add 4 115 273 +279 sub 4 278 138 +280 srem 4 279 115 +281 eq 1 165 280 +282 and 1 190 281 +283 ite 2 282 53 177 +284 ite 2 277 50 283 +285 eq 1 284 6 +286 and 1 272 285 +287 eq 1 138 275 +288 and 1 194 287 +289 eq 1 138 280 +290 and 1 190 289 +291 ite 2 290 53 183 +292 ite 2 288 50 291 +293 eq 1 292 8 +294 and 1 286 293 +295 concat 4 113 146 +296 add 4 138 295 +297 slice 2 296 7 0 +298 ite 2 133 297 146 +299 concat 4 113 298 +300 sub 4 299 115 +301 slice 2 300 7 0 +302 ite 2 136 301 298 +303 eq 1 302 10 +304 and 1 294 303 +305 eq 1 118 12 +306 and 1 304 305 +307 eq 1 163 14 +308 and 1 306 307 +309 eq 1 237 17 +310 and 1 308 309 +311 eq 1 235 19 +312 and 1 310 311 +313 eq 1 239 21 +314 and 1 312 313 +315 eq 1 243 23 +316 and 1 314 315 +317 eq 1 247 25 +318 and 1 316 317 +319 eq 1 255 27 +320 and 1 318 319 +321 eq 1 253 29 +322 and 1 320 321 +323 eq 1 257 31 +324 and 1 322 323 +325 eq 1 261 33 +326 and 1 324 325 +327 eq 1 265 35 +328 and 1 326 327 +329 and 1 328 39 +330 ite 4 82 138 165 +331 ite 4 92 138 165 +332 add 4 330 331 +333 ulte 1 332 138 +334 ite 1 37 329 -333 +335 next 1 39 334 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/anderson.4.prop1-back-serstep.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/anderson.4.prop1-back-serstep.btor2 new file mode 100644 index 0000000000..f224822b83 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/anderson.4.prop1-back-serstep.btor2 @@ -0,0 +1,690 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 8 +3 sort bitvec 24 +4 sort bitvec 32 +5 zero 2 +6 state 2 nextv_Slot_0 +7 init 2 6 5 +8 state 2 nextv_Slot_1 +9 init 2 8 5 +10 state 2 nextv_Slot_2 +11 init 2 10 5 +12 state 2 nextv_Slot_3 +13 init 2 12 5 +14 state 2 nextv_next +15 init 2 14 5 +16 state 2 nextv_my_place_P_0 +17 init 2 16 5 +18 state 2 nextv_my_place_P_1 +19 init 2 18 5 +20 state 2 nextv_my_place_P_2 +21 init 2 20 5 +22 state 2 nextv_my_place_P_3 +23 init 2 22 5 +24 zero 1 +25 state 1 nexta_NCS_P_0 +26 init 1 25 24 +27 state 1 nexta_p1_P_0 +28 init 1 27 24 +29 state 1 nexta_p2_P_0 +30 init 1 29 24 +31 state 1 nexta_p3_P_0 +32 init 1 31 24 +33 state 1 nexta_CS_P_0 +34 init 1 33 24 +35 state 1 nexta_NCS_P_1 +36 init 1 35 24 +37 state 1 nexta_p1_P_1 +38 init 1 37 24 +39 state 1 nexta_p2_P_1 +40 init 1 39 24 +41 state 1 nexta_p3_P_1 +42 init 1 41 24 +43 state 1 nexta_CS_P_1 +44 init 1 43 24 +45 state 1 nexta_NCS_P_2 +46 init 1 45 24 +47 state 1 nexta_p1_P_2 +48 init 1 47 24 +49 state 1 nexta_p2_P_2 +50 init 1 49 24 +51 state 1 nexta_p3_P_2 +52 init 1 51 24 +53 state 1 nexta_CS_P_2 +54 init 1 53 24 +55 state 1 nexta_NCS_P_3 +56 init 1 55 24 +57 state 1 nexta_p1_P_3 +58 init 1 57 24 +59 state 1 nexta_p2_P_3 +60 init 1 59 24 +61 state 1 nexta_p3_P_3 +62 init 1 61 24 +63 state 1 nexta_CS_P_3 +64 init 1 63 24 +65 state 1 dve_initialized +66 init 1 65 24 +67 state 1 dve_valid +68 init 1 67 24 +69 and 1 25 -27 +70 and 1 69 -29 +71 and 1 70 -31 +72 and 1 71 -33 +73 and 1 72 35 +74 and 1 73 -37 +75 and 1 74 -39 +76 and 1 75 -41 +77 and 1 76 -43 +78 and 1 77 45 +79 and 1 78 -47 +80 and 1 79 -49 +81 and 1 80 -51 +82 and 1 81 -53 +83 and 1 82 55 +84 and 1 83 -57 +85 and 1 84 -59 +86 and 1 85 -61 +87 and 1 86 -63 +88 constd 2 1 +89 eq 1 88 6 +90 and 1 87 89 +91 constd 2 0 +92 eq 1 91 8 +93 and 1 90 92 +94 eq 1 91 10 +95 and 1 93 94 +96 eq 1 91 12 +97 and 1 95 96 +98 eq 1 91 14 +99 and 1 97 98 +100 eq 1 91 16 +101 and 1 99 100 +102 eq 1 91 18 +103 and 1 101 102 +104 eq 1 91 20 +105 and 1 103 104 +106 eq 1 91 22 +107 and 1 105 106 +108 and 1 67 107 +109 bad 108 +110 input 2 v_Slot_0 +111 next 2 6 110 +112 input 2 v_Slot_1 +113 next 2 8 112 +114 input 2 v_Slot_2 +115 next 2 10 114 +116 input 2 v_Slot_3 +117 next 2 12 116 +118 input 2 v_next +119 next 2 14 118 +120 input 2 v_my_place_P_0 +121 next 2 16 120 +122 input 2 v_my_place_P_1 +123 next 2 18 122 +124 input 2 v_my_place_P_2 +125 next 2 20 124 +126 input 2 v_my_place_P_3 +127 next 2 22 126 +128 input 1 a_NCS_P_0 +129 next 1 25 128 +130 input 1 a_p1_P_0 +131 next 1 27 130 +132 input 1 a_p2_P_0 +133 next 1 29 132 +134 input 1 a_p3_P_0 +135 next 1 31 134 +136 input 1 a_CS_P_0 +137 next 1 33 136 +138 input 1 a_NCS_P_1 +139 next 1 35 138 +140 input 1 a_p1_P_1 +141 next 1 37 140 +142 input 1 a_p2_P_1 +143 next 1 39 142 +144 input 1 a_p3_P_1 +145 next 1 41 144 +146 input 1 a_CS_P_1 +147 next 1 43 146 +148 input 1 a_NCS_P_2 +149 next 1 45 148 +150 input 1 a_p1_P_2 +151 next 1 47 150 +152 input 1 a_p2_P_2 +153 next 1 49 152 +154 input 1 a_p3_P_2 +155 next 1 51 154 +156 input 1 a_CS_P_2 +157 next 1 53 156 +158 input 1 a_NCS_P_3 +159 next 1 55 158 +160 input 1 a_p1_P_3 +161 next 1 57 160 +162 input 1 a_p2_P_3 +163 next 1 59 162 +164 input 1 a_p3_P_3 +165 next 1 61 164 +166 input 1 a_CS_P_3 +167 next 1 63 166 +168 const 1 1 +169 next 1 65 168 +170 input 1 f00 +171 or 1 128 -170 +172 input 1 f01 +173 or 1 130 170 +174 constd 2 3 +175 ite 2 170 118 120 +176 eq 1 174 175 +177 and 1 173 176 +178 or 1 -172 177 +179 and 1 171 178 +180 input 1 f02 +181 and 1 173 -172 +182 and 1 -176 181 +183 or 1 -180 182 +184 and 1 179 183 +185 input 1 f03 +186 or 1 132 172 +187 or 1 186 180 +188 constd 3 0 +189 concat 4 188 175 +190 constd 4 4 +191 srem 4 189 190 +192 slice 2 191 7 0 +193 ite 2 180 192 175 +194 eq 1 91 193 +195 eq 1 88 193 +196 constd 2 2 +197 eq 1 196 193 +198 ite 2 197 114 116 +199 ite 2 195 112 198 +200 ite 2 194 110 199 +201 eq 1 88 200 +202 and 1 187 201 +203 or 1 -185 202 +204 and 1 184 203 +205 or 1 134 185 +206 input 1 f04 +207 or 1 205 -206 +208 and 1 204 207 +209 or 1 136 206 +210 input 1 f05 +211 or 1 209 -210 +212 and 1 208 211 +213 input 1 f06 +214 or 1 138 -213 +215 and 1 212 214 +216 input 1 f07 +217 or 1 140 213 +218 constd 4 1 +219 concat 4 188 118 +220 add 4 218 219 +221 slice 2 220 7 0 +222 ite 2 170 221 118 +223 concat 4 188 222 +224 sub 4 223 190 +225 slice 2 224 7 0 +226 ite 2 172 225 222 +227 ite 2 213 226 122 +228 eq 1 174 227 +229 and 1 217 228 +230 or 1 -216 229 +231 and 1 215 230 +232 input 1 f08 +233 and 1 217 -216 +234 and 1 -228 233 +235 or 1 -232 234 +236 and 1 231 235 +237 input 1 f09 +238 or 1 142 216 +239 or 1 238 232 +240 concat 4 188 227 +241 srem 4 240 190 +242 slice 2 241 7 0 +243 ite 2 232 242 227 +244 eq 1 91 243 +245 constd 4 0 +246 concat 4 188 193 +247 add 4 218 246 +248 srem 4 247 190 +249 eq 1 245 248 +250 and 1 210 249 +251 and 1 194 206 +252 ite 2 251 91 110 +253 ite 2 250 88 252 +254 eq 1 88 243 +255 eq 1 218 248 +256 and 1 210 255 +257 and 1 195 206 +258 ite 2 257 91 112 +259 ite 2 256 88 258 +260 eq 1 196 243 +261 constd 4 2 +262 eq 1 261 248 +263 and 1 210 262 +264 and 1 197 206 +265 ite 2 264 91 114 +266 ite 2 263 88 265 +267 constd 4 3 +268 eq 1 267 248 +269 and 1 210 268 +270 eq 1 174 193 +271 and 1 270 206 +272 ite 2 271 91 116 +273 ite 2 269 88 272 +274 ite 2 260 266 273 +275 ite 2 254 259 274 +276 ite 2 244 253 275 +277 eq 1 88 276 +278 and 1 239 277 +279 or 1 -237 278 +280 and 1 236 279 +281 or 1 144 237 +282 input 1 f10 +283 or 1 281 -282 +284 and 1 280 283 +285 or 1 146 282 +286 input 1 f11 +287 or 1 285 -286 +288 and 1 284 287 +289 input 1 f12 +290 or 1 148 -289 +291 and 1 288 290 +292 input 1 f13 +293 or 1 150 289 +294 concat 4 188 226 +295 add 4 218 294 +296 slice 2 295 7 0 +297 ite 2 213 296 226 +298 concat 4 188 297 +299 sub 4 298 190 +300 slice 2 299 7 0 +301 ite 2 216 300 297 +302 ite 2 289 301 124 +303 eq 1 174 302 +304 and 1 293 303 +305 or 1 -292 304 +306 and 1 291 305 +307 input 1 f14 +308 and 1 293 -292 +309 and 1 -303 308 +310 or 1 -307 309 +311 and 1 306 310 +312 input 1 f15 +313 or 1 152 292 +314 or 1 313 307 +315 concat 4 188 302 +316 srem 4 315 190 +317 slice 2 316 7 0 +318 ite 2 307 317 302 +319 eq 1 91 318 +320 concat 4 188 243 +321 add 4 218 320 +322 srem 4 321 190 +323 eq 1 245 322 +324 and 1 286 323 +325 and 1 244 282 +326 ite 2 325 91 253 +327 ite 2 324 88 326 +328 eq 1 88 318 +329 eq 1 218 322 +330 and 1 286 329 +331 and 1 254 282 +332 ite 2 331 91 259 +333 ite 2 330 88 332 +334 eq 1 196 318 +335 eq 1 261 322 +336 and 1 286 335 +337 and 1 260 282 +338 ite 2 337 91 266 +339 ite 2 336 88 338 +340 eq 1 267 322 +341 and 1 286 340 +342 eq 1 174 243 +343 and 1 342 282 +344 ite 2 343 91 273 +345 ite 2 341 88 344 +346 ite 2 334 339 345 +347 ite 2 328 333 346 +348 ite 2 319 327 347 +349 eq 1 88 348 +350 and 1 314 349 +351 or 1 -312 350 +352 and 1 311 351 +353 or 1 154 312 +354 input 1 f16 +355 or 1 353 -354 +356 and 1 352 355 +357 or 1 156 354 +358 input 1 f17 +359 or 1 357 -358 +360 and 1 356 359 +361 input 1 f18 +362 or 1 158 -361 +363 and 1 360 362 +364 input 1 f19 +365 or 1 160 361 +366 concat 4 188 301 +367 add 4 218 366 +368 slice 2 367 7 0 +369 ite 2 289 368 301 +370 concat 4 188 369 +371 sub 4 370 190 +372 slice 2 371 7 0 +373 ite 2 292 372 369 +374 ite 2 361 373 126 +375 eq 1 174 374 +376 and 1 365 375 +377 or 1 -364 376 +378 and 1 363 377 +379 input 1 f20 +380 and 1 365 -364 +381 and 1 -375 380 +382 or 1 -379 381 +383 and 1 378 382 +384 input 1 f21 +385 or 1 162 364 +386 or 1 385 379 +387 concat 4 188 374 +388 srem 4 387 190 +389 slice 2 388 7 0 +390 ite 2 379 389 374 +391 eq 1 91 390 +392 concat 4 188 318 +393 add 4 218 392 +394 srem 4 393 190 +395 eq 1 245 394 +396 and 1 358 395 +397 and 1 319 354 +398 ite 2 397 91 327 +399 ite 2 396 88 398 +400 eq 1 88 390 +401 eq 1 218 394 +402 and 1 358 401 +403 and 1 328 354 +404 ite 2 403 91 333 +405 ite 2 402 88 404 +406 eq 1 196 390 +407 eq 1 261 394 +408 and 1 358 407 +409 and 1 334 354 +410 ite 2 409 91 339 +411 ite 2 408 88 410 +412 eq 1 267 394 +413 and 1 358 412 +414 eq 1 174 318 +415 and 1 414 354 +416 ite 2 415 91 345 +417 ite 2 413 88 416 +418 ite 2 406 411 417 +419 ite 2 400 405 418 +420 ite 2 391 399 419 +421 eq 1 88 420 +422 and 1 386 421 +423 or 1 -384 422 +424 and 1 383 423 +425 or 1 164 384 +426 input 1 f22 +427 or 1 425 -426 +428 and 1 424 427 +429 or 1 166 426 +430 input 1 f23 +431 or 1 429 -430 +432 and 1 428 431 +433 or 1 170 172 +434 or 1 180 433 +435 or 1 185 434 +436 or 1 206 435 +437 or 1 210 436 +438 or 1 213 437 +439 or 1 216 438 +440 or 1 232 439 +441 or 1 237 440 +442 or 1 282 441 +443 or 1 286 442 +444 or 1 289 443 +445 or 1 292 444 +446 or 1 307 445 +447 or 1 312 446 +448 or 1 354 447 +449 or 1 358 448 +450 or 1 361 449 +451 or 1 364 450 +452 or 1 379 451 +453 or 1 384 452 +454 or 1 426 453 +455 or 1 430 454 +456 and 1 432 455 +457 and 1 128 130 +458 or 1 128 130 +459 and 1 132 458 +460 or 1 457 459 +461 or 1 132 458 +462 and 1 134 461 +463 or 1 460 462 +464 or 1 134 461 +465 and 1 136 464 +466 or 1 463 465 +467 or 1 136 464 +468 and 1 -466 467 +469 and 1 138 140 +470 or 1 138 140 +471 and 1 142 470 +472 or 1 469 471 +473 or 1 142 470 +474 and 1 144 473 +475 or 1 472 474 +476 or 1 144 473 +477 and 1 146 476 +478 or 1 475 477 +479 and 1 468 -478 +480 or 1 146 476 +481 and 1 479 480 +482 and 1 148 150 +483 or 1 148 150 +484 and 1 152 483 +485 or 1 482 484 +486 or 1 152 483 +487 and 1 154 486 +488 or 1 485 487 +489 or 1 154 486 +490 and 1 156 489 +491 or 1 488 490 +492 and 1 481 -491 +493 or 1 156 489 +494 and 1 492 493 +495 and 1 158 160 +496 or 1 158 160 +497 and 1 162 496 +498 or 1 495 497 +499 or 1 162 496 +500 and 1 164 499 +501 or 1 498 500 +502 or 1 164 499 +503 and 1 166 502 +504 or 1 501 503 +505 and 1 494 -504 +506 or 1 166 502 +507 and 1 505 506 +508 and 1 456 507 +509 and 1 181 -180 +510 and 1 128 -170 +511 or 1 510 210 +512 and 1 509 511 +513 and 1 187 -185 +514 or 1 509 511 +515 and 1 513 514 +516 or 1 512 515 +517 and 1 205 -206 +518 or 1 513 514 +519 and 1 517 518 +520 or 1 516 519 +521 and 1 209 -210 +522 or 1 517 518 +523 and 1 521 522 +524 or 1 520 523 +525 or 1 521 522 +526 and 1 -524 525 +527 and 1 233 -232 +528 and 1 138 -213 +529 or 1 528 286 +530 and 1 527 529 +531 and 1 239 -237 +532 or 1 527 529 +533 and 1 531 532 +534 or 1 530 533 +535 and 1 281 -282 +536 or 1 531 532 +537 and 1 535 536 +538 or 1 534 537 +539 and 1 285 -286 +540 or 1 535 536 +541 and 1 539 540 +542 or 1 538 541 +543 and 1 526 -542 +544 or 1 539 540 +545 and 1 543 544 +546 and 1 308 -307 +547 and 1 148 -289 +548 or 1 547 358 +549 and 1 546 548 +550 and 1 314 -312 +551 or 1 546 548 +552 and 1 550 551 +553 or 1 549 552 +554 and 1 353 -354 +555 or 1 550 551 +556 and 1 554 555 +557 or 1 553 556 +558 and 1 357 -358 +559 or 1 554 555 +560 and 1 558 559 +561 or 1 557 560 +562 and 1 545 -561 +563 or 1 558 559 +564 and 1 562 563 +565 and 1 380 -379 +566 and 1 158 -361 +567 or 1 566 430 +568 and 1 565 567 +569 and 1 386 -384 +570 or 1 565 567 +571 and 1 569 570 +572 or 1 568 571 +573 and 1 425 -426 +574 or 1 569 570 +575 and 1 573 574 +576 or 1 572 575 +577 and 1 429 -430 +578 or 1 573 574 +579 and 1 577 578 +580 or 1 576 579 +581 and 1 564 -580 +582 or 1 577 578 +583 and 1 581 582 +584 and 1 508 583 +585 concat 4 188 390 +586 add 4 218 585 +587 srem 4 586 190 +588 eq 1 245 587 +589 and 1 430 588 +590 and 1 391 426 +591 ite 2 590 91 399 +592 ite 2 589 88 591 +593 eq 1 592 6 +594 and 1 584 593 +595 eq 1 218 587 +596 and 1 430 595 +597 and 1 400 426 +598 ite 2 597 91 405 +599 ite 2 596 88 598 +600 eq 1 599 8 +601 and 1 594 600 +602 eq 1 261 587 +603 and 1 430 602 +604 and 1 406 426 +605 ite 2 604 91 411 +606 ite 2 603 88 605 +607 eq 1 606 10 +608 and 1 601 607 +609 eq 1 267 587 +610 and 1 430 609 +611 eq 1 174 390 +612 and 1 611 426 +613 ite 2 612 91 417 +614 ite 2 610 88 613 +615 eq 1 614 12 +616 and 1 608 615 +617 concat 4 188 373 +618 add 4 218 617 +619 slice 2 618 7 0 +620 ite 2 361 619 373 +621 concat 4 188 620 +622 sub 4 621 190 +623 slice 2 622 7 0 +624 ite 2 364 623 620 +625 eq 1 624 14 +626 and 1 616 625 +627 eq 1 193 16 +628 and 1 626 627 +629 eq 1 243 18 +630 and 1 628 629 +631 eq 1 318 20 +632 and 1 630 631 +633 eq 1 390 22 +634 and 1 632 633 +635 eq 1 511 25 +636 and 1 634 635 +637 eq 1 509 27 +638 and 1 636 637 +639 eq 1 513 29 +640 and 1 638 639 +641 eq 1 517 31 +642 and 1 640 641 +643 eq 1 521 33 +644 and 1 642 643 +645 eq 1 529 35 +646 and 1 644 645 +647 eq 1 527 37 +648 and 1 646 647 +649 eq 1 531 39 +650 and 1 648 649 +651 eq 1 535 41 +652 and 1 650 651 +653 eq 1 539 43 +654 and 1 652 653 +655 eq 1 548 45 +656 and 1 654 655 +657 eq 1 546 47 +658 and 1 656 657 +659 eq 1 550 49 +660 and 1 658 659 +661 eq 1 554 51 +662 and 1 660 661 +663 eq 1 558 53 +664 and 1 662 663 +665 eq 1 567 55 +666 and 1 664 665 +667 eq 1 565 57 +668 and 1 666 667 +669 eq 1 569 59 +670 and 1 668 669 +671 eq 1 573 61 +672 and 1 670 671 +673 eq 1 577 63 +674 and 1 672 673 +675 and 1 674 67 +676 ite 4 136 218 245 +677 ite 4 146 218 245 +678 add 4 676 677 +679 ite 4 156 218 245 +680 add 4 678 679 +681 ite 4 166 218 245 +682 add 4 680 681 +683 ulte 1 682 218 +684 ite 1 65 675 -683 +685 next 1 67 684 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/count2.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/count2.btor2 new file mode 100644 index 0000000000..8da9976211 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/count2.btor2 @@ -0,0 +1,12 @@ +; source: https://github.com/Boolector/btor2tools/tree/b8456dda4780789e882f5791eb486f295ade4da4/examples/btorsim +1 sort bitvec 3 +2 zero 1 +3 state 1 +4 init 1 3 2 +5 one 1 +6 add 1 3 5 +7 next 1 3 6 +8 ones 1 +9 sort bitvec 1 +10 eq 9 3 8 +11 bad 10 diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/driving_phils.1.prop1-back-serstep.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/driving_phils.1.prop1-back-serstep.btor2 new file mode 100644 index 0000000000..4a24f2213c --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/driving_phils.1.prop1-back-serstep.btor2 @@ -0,0 +1,1033 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 5 +3 sort bitvec 8 +4 sort bitvec 16 +5 sort bitvec 24 +6 sort bitvec 32 +7 zero 3 +8 state 3 nextv_request_0 +9 init 3 8 7 +10 state 3 nextv_request_1 +11 init 3 10 7 +12 state 3 nextv_starvers_0 +13 init 3 12 7 +14 state 3 nextv_starvers_1 +15 init 3 14 7 +16 state 3 nextv_resources_0 +17 init 3 16 7 +18 state 3 nextv_resources_1 +19 init 3 18 7 +20 zero 4 +21 state 4 nextv_res0_0 +22 init 4 21 20 +23 state 4 nextv_res0_1 +24 init 4 23 20 +25 state 4 nextv_res1_0 +26 init 4 25 20 +27 state 4 nextv_res1_1 +28 init 4 27 20 +29 state 4 nextv_acquiring_0 +30 init 4 29 20 +31 state 4 nextv_acquiring_1 +32 init 4 31 20 +33 state 4 nextv_entryRound +34 init 4 33 20 +35 state 3 nextv_phase +36 init 3 35 7 +37 state 3 nextv_fire +38 init 3 37 7 +39 state 4 nextv_i_round_about +40 init 4 39 20 +41 state 4 nextv_i_phil_0 +42 init 4 41 20 +43 state 4 nextv_i_phil_1 +44 init 4 43 20 +45 zero 1 +46 state 1 nexta_reset +47 init 1 46 45 +48 state 1 nexta_begin0 +49 init 1 48 45 +50 state 1 nexta_begin1 +51 init 1 50 45 +52 state 1 nexta_begin2 +53 init 1 52 45 +54 state 1 nexta_begin3 +55 init 1 54 45 +56 state 1 nexta_action_round_about +57 init 1 56 45 +58 state 1 nexta_end0 +59 init 1 58 45 +60 state 1 nexta_end1 +61 init 1 60 45 +62 state 1 nexta_end2 +63 init 1 62 45 +64 state 1 nexta_action_phil_0 +65 init 1 64 45 +66 state 1 nexta_end_phil_0 +67 init 1 66 45 +68 state 1 nexta_mutex_phil_0 +69 init 1 68 45 +70 state 1 nexta_action_phil_1 +71 init 1 70 45 +72 state 1 nexta_end_phil_1 +73 init 1 72 45 +74 state 1 nexta_mutex_phil_1 +75 init 1 74 45 +76 state 1 dve_initialized +77 init 1 76 45 +78 state 1 dve_valid +79 init 1 78 45 +80 and 1 46 -48 +81 and 1 80 -50 +82 and 1 81 -52 +83 and 1 82 -54 +84 and 1 83 -56 +85 and 1 84 -58 +86 and 1 85 -60 +87 and 1 86 -62 +88 and 1 87 64 +89 and 1 88 -66 +90 and 1 89 -68 +91 and 1 90 70 +92 and 1 91 -72 +93 and 1 92 -74 +94 constd 3 0 +95 eq 1 94 8 +96 and 1 93 95 +97 eq 1 94 10 +98 and 1 96 97 +99 eq 1 94 12 +100 and 1 98 99 +101 eq 1 94 14 +102 and 1 100 101 +103 eq 1 94 16 +104 and 1 102 103 +105 eq 1 94 18 +106 and 1 104 105 +107 constd 4 0 +108 eq 1 107 21 +109 and 1 106 108 +110 eq 1 107 23 +111 and 1 109 110 +112 eq 1 107 25 +113 and 1 111 112 +114 eq 1 107 27 +115 and 1 113 114 +116 eq 1 107 29 +117 and 1 115 116 +118 eq 1 107 31 +119 and 1 117 118 +120 constd 4 1 +121 eq 1 120 33 +122 and 1 119 121 +123 eq 1 94 35 +124 and 1 122 123 +125 eq 1 94 37 +126 and 1 124 125 +127 eq 1 107 39 +128 and 1 126 127 +129 eq 1 107 41 +130 and 1 128 129 +131 eq 1 107 43 +132 and 1 130 131 +133 and 1 78 132 +134 bad 133 +135 input 3 v_request_0 +136 next 3 8 135 +137 input 3 v_request_1 +138 next 3 10 137 +139 input 3 v_starvers_0 +140 next 3 12 139 +141 input 3 v_starvers_1 +142 next 3 14 141 +143 input 3 v_resources_0 +144 next 3 16 143 +145 input 3 v_resources_1 +146 next 3 18 145 +147 input 4 v_res0_0 +148 next 4 21 147 +149 input 4 v_res0_1 +150 next 4 23 149 +151 input 4 v_res1_0 +152 next 4 25 151 +153 input 4 v_res1_1 +154 next 4 27 153 +155 input 4 v_acquiring_0 +156 next 4 29 155 +157 input 4 v_acquiring_1 +158 next 4 31 157 +159 input 4 v_entryRound +160 next 4 33 159 +161 input 3 v_phase +162 next 3 35 161 +163 input 3 v_fire +164 next 3 37 163 +165 input 4 v_i_round_about +166 next 4 39 165 +167 input 4 v_i_phil_0 +168 next 4 41 167 +169 input 4 v_i_phil_1 +170 next 4 43 169 +171 input 1 a_reset +172 next 1 46 171 +173 input 1 a_begin0 +174 next 1 48 173 +175 input 1 a_begin1 +176 next 1 50 175 +177 input 1 a_begin2 +178 next 1 52 177 +179 input 1 a_begin3 +180 next 1 54 179 +181 input 1 a_action_round_about +182 next 1 56 181 +183 input 1 a_end0 +184 next 1 58 183 +185 input 1 a_end1 +186 next 1 60 185 +187 input 1 a_end2 +188 next 1 62 187 +189 input 1 a_action_phil_0 +190 next 1 64 189 +191 input 1 a_end_phil_0 +192 next 1 66 191 +193 input 1 a_mutex_phil_0 +194 next 1 68 193 +195 input 1 a_action_phil_1 +196 next 1 70 195 +197 input 1 a_end_phil_1 +198 next 1 72 197 +199 input 1 a_mutex_phil_1 +200 next 1 74 199 +201 const 1 1 +202 next 1 76 201 +203 input 1 f00 +204 constd 6 2 +205 constd 4 0 +206 concat 6 165 205 +207 constd 6 16 +208 sra 6 206 207 +209 ulte 1 204 208 +210 and 1 171 -209 +211 or 1 -203 210 +212 input 1 f01 +213 constd 6 1 +214 add 6 213 208 +215 slice 4 214 15 0 +216 ite 4 203 215 165 +217 concat 6 216 205 +218 sra 6 217 207 +219 eq 1 204 218 +220 and 1 171 219 +221 or 1 -212 220 +222 and 1 211 221 +223 input 1 f02 +224 or 1 173 212 +225 ite 4 212 107 216 +226 concat 6 225 205 +227 sra 6 226 207 +228 ulte 1 204 227 +229 and 1 224 -228 +230 or 1 -223 229 +231 and 1 222 230 +232 input 1 f03 +233 add 6 213 227 +234 slice 4 233 15 0 +235 ite 4 223 234 225 +236 concat 6 235 205 +237 sra 6 236 207 +238 eq 1 204 237 +239 and 1 224 238 +240 or 1 -232 239 +241 and 1 231 240 +242 input 1 f04 +243 or 1 175 232 +244 ite 4 232 107 235 +245 concat 6 244 205 +246 sra 6 245 207 +247 ulte 1 204 246 +248 constd 6 4294967295 +249 constd 6 0 +250 eq 1 249 246 +251 eq 1 249 208 +252 and 1 203 251 +253 constd 4 65535 +254 ite 4 252 253 147 +255 eq 1 213 208 +256 and 1 203 255 +257 ite 4 256 253 149 +258 ite 4 250 254 257 +259 concat 6 258 205 +260 sra 6 259 207 +261 eq 1 248 260 +262 and 1 -247 -261 +263 and 1 243 262 +264 or 1 -242 263 +265 and 1 241 264 +266 input 1 f05 +267 add 6 213 246 +268 slice 4 267 15 0 +269 ite 4 242 268 244 +270 concat 6 269 205 +271 sra 6 270 207 +272 ulte 1 204 271 +273 eq 1 249 271 +274 ite 4 273 254 257 +275 concat 6 274 205 +276 sra 6 275 207 +277 eq 1 248 276 +278 and 1 -272 277 +279 and 1 243 278 +280 or 1 -266 279 +281 and 1 265 280 +282 input 1 f06 +283 add 6 213 271 +284 slice 4 283 15 0 +285 ite 4 266 284 269 +286 concat 6 285 205 +287 sra 6 286 207 +288 eq 1 204 287 +289 and 1 243 288 +290 or 1 -282 289 +291 and 1 281 290 +292 input 1 f07 +293 or 1 177 282 +294 ite 4 282 107 285 +295 concat 6 294 205 +296 sra 6 295 207 +297 ulte 1 204 296 +298 eq 1 249 296 +299 ite 4 252 253 151 +300 ite 4 256 253 153 +301 ite 4 298 299 300 +302 concat 6 301 205 +303 sra 6 302 207 +304 eq 1 248 303 +305 and 1 -297 -304 +306 and 1 293 305 +307 or 1 -292 306 +308 and 1 291 307 +309 input 1 f08 +310 add 6 213 296 +311 slice 4 310 15 0 +312 ite 4 292 311 294 +313 concat 6 312 205 +314 sra 6 313 207 +315 ulte 1 204 314 +316 eq 1 249 314 +317 ite 4 316 299 300 +318 concat 6 317 205 +319 sra 6 318 207 +320 eq 1 248 319 +321 and 1 -315 320 +322 and 1 293 321 +323 or 1 -309 322 +324 and 1 308 323 +325 input 1 f09 +326 add 6 213 314 +327 slice 4 326 15 0 +328 ite 4 309 327 312 +329 concat 6 328 205 +330 sra 6 329 207 +331 eq 1 204 330 +332 and 1 293 331 +333 or 1 -325 332 +334 and 1 324 333 +335 input 1 f10 +336 or 1 181 325 +337 constd 3 2 +338 ite 3 325 94 163 +339 eq 1 337 338 +340 and 1 336 339 +341 or 1 -335 340 +342 and 1 334 341 +343 input 1 f11 +344 or 1 183 335 +345 ite 4 325 107 328 +346 concat 6 345 205 +347 sra 6 346 207 +348 ulte 1 213 347 +349 mul 6 204 347 +350 eq 1 249 349 +351 mul 6 204 303 +352 eq 1 249 351 +353 add 6 213 351 +354 eq 1 249 353 +355 or 1 352 354 +356 and 1 292 355 +357 slice 3 294 7 0 +358 slice 3 159 7 0 +359 ite 3 354 357 358 +360 mul 6 204 260 +361 eq 1 249 360 +362 add 6 213 360 +363 eq 1 249 362 +364 or 1 361 363 +365 and 1 242 364 +366 slice 3 244 7 0 +367 ite 3 363 366 358 +368 eq 1 249 227 +369 and 1 223 368 +370 ite 3 369 94 143 +371 ite 3 365 367 370 +372 ite 3 356 359 371 +373 eq 1 213 351 +374 eq 1 213 353 +375 or 1 373 374 +376 and 1 292 375 +377 ite 3 374 357 358 +378 eq 1 213 360 +379 eq 1 213 362 +380 or 1 378 379 +381 and 1 242 380 +382 ite 3 379 366 358 +383 eq 1 213 227 +384 and 1 223 383 +385 ite 3 384 94 145 +386 ite 3 381 382 385 +387 ite 3 376 377 386 +388 ite 3 350 372 387 +389 eq 1 94 388 +390 and 1 -348 -389 +391 and 1 344 390 +392 or 1 -343 391 +393 and 1 342 392 +394 input 1 f12 +395 add 6 213 347 +396 slice 4 395 15 0 +397 ite 4 343 396 345 +398 concat 6 397 205 +399 sra 6 398 207 +400 ulte 1 213 399 +401 mul 6 204 399 +402 eq 1 249 401 +403 ite 3 402 372 387 +404 eq 1 94 403 +405 and 1 -400 404 +406 and 1 344 405 +407 or 1 -394 406 +408 and 1 393 407 +409 input 1 f13 +410 add 6 213 399 +411 slice 4 410 15 0 +412 ite 4 394 411 397 +413 concat 6 412 205 +414 sra 6 413 207 +415 eq 1 213 414 +416 and 1 344 415 +417 or 1 -409 416 +418 and 1 408 417 +419 input 1 f14 +420 or 1 185 409 +421 ite 4 409 107 412 +422 concat 6 421 205 +423 sra 6 422 207 +424 ulte 1 204 423 +425 and 1 420 -424 +426 or 1 -419 425 +427 and 1 418 426 +428 input 1 f15 +429 add 6 213 423 +430 slice 4 429 15 0 +431 ite 4 419 430 421 +432 concat 6 431 205 +433 sra 6 432 207 +434 eq 1 204 433 +435 ite 3 335 94 338 +436 eq 1 337 435 +437 and 1 434 436 +438 and 1 420 437 +439 or 1 -428 438 +440 and 1 427 439 +441 input 1 f16 +442 constd 3 1 +443 ite 3 212 94 161 +444 ite 3 325 442 443 +445 ite 3 335 337 444 +446 ite 3 428 94 445 +447 eq 1 442 446 +448 concat 6 254 205 +449 sra 6 448 207 +450 eq 1 248 449 +451 and 1 447 -450 +452 and 1 189 451 +453 or 1 -441 452 +454 and 1 440 453 +455 input 1 f17 +456 and 1 189 -441 +457 ite 4 441 253 299 +458 concat 6 457 205 +459 sra 6 458 207 +460 eq 1 248 459 +461 and 1 447 460 +462 ite 4 252 253 155 +463 concat 6 462 205 +464 sra 6 463 207 +465 eq 1 248 464 +466 and 1 461 465 +467 and 1 456 466 +468 or 1 -455 467 +469 and 1 454 468 +470 input 1 f18 +471 and 1 456 -455 +472 and 1 447 471 +473 or 1 -470 472 +474 and 1 469 473 +475 input 1 f19 +476 or 1 191 441 +477 or 1 476 455 +478 or 1 477 470 +479 eq 1 337 446 +480 ite 4 455 107 462 +481 concat 6 480 205 +482 sra 6 481 207 +483 eq 1 248 482 +484 and 1 479 483 +485 and 1 478 484 +486 or 1 -475 485 +487 and 1 474 486 +488 input 1 f20 +489 and 1 478 -475 +490 and 1 479 -483 +491 constd 5 0 +492 concat 6 491 435 +493 add 6 213 492 +494 slice 3 493 7 0 +495 ite 3 441 494 435 +496 concat 6 491 495 +497 add 6 213 496 +498 slice 3 497 7 0 +499 ite 3 455 498 495 +500 concat 6 491 499 +501 add 6 213 500 +502 slice 3 501 7 0 +503 ite 3 470 502 499 +504 concat 6 491 503 +505 add 6 213 504 +506 slice 3 505 7 0 +507 ite 3 475 506 503 +508 eq 1 94 507 +509 and 1 490 508 +510 and 1 489 509 +511 or 1 -488 510 +512 and 1 487 511 +513 input 1 f21 +514 or 1 193 488 +515 concat 6 167 205 +516 sra 6 515 207 +517 ulte 1 204 516 +518 eq 1 249 516 +519 ite 4 441 299 254 +520 ite 4 518 519 257 +521 concat 6 520 205 +522 sra 6 521 207 +523 eq 1 482 522 +524 and 1 -517 -523 +525 ite 4 518 457 300 +526 concat 6 525 205 +527 sra 6 526 207 +528 eq 1 482 527 +529 and 1 524 -528 +530 and 1 514 529 +531 or 1 -513 530 +532 and 1 512 531 +533 input 1 f22 +534 add 6 213 516 +535 slice 4 534 15 0 +536 ite 4 513 535 167 +537 concat 6 536 205 +538 sra 6 537 207 +539 ulte 1 204 538 +540 eq 1 249 538 +541 ite 4 540 519 257 +542 concat 6 541 205 +543 sra 6 542 207 +544 eq 1 482 543 +545 ite 4 540 457 300 +546 concat 6 545 205 +547 sra 6 546 207 +548 eq 1 482 547 +549 or 1 544 548 +550 and 1 -539 549 +551 and 1 514 550 +552 or 1 -533 551 +553 and 1 532 552 +554 input 1 f23 +555 and 1 514 -533 +556 add 6 213 538 +557 slice 4 556 15 0 +558 ite 4 533 557 536 +559 concat 6 558 205 +560 sra 6 559 207 +561 eq 1 204 560 +562 concat 6 519 205 +563 sra 6 562 207 +564 eq 1 248 563 +565 and 1 561 564 +566 and 1 555 565 +567 or 1 -554 566 +568 and 1 553 567 +569 input 1 f24 +570 and 1 555 -554 +571 ite 4 554 107 558 +572 concat 6 571 205 +573 sra 6 572 207 +574 eq 1 204 573 +575 ite 4 554 480 519 +576 concat 6 575 205 +577 sra 6 576 207 +578 eq 1 248 577 +579 and 1 574 -578 +580 and 1 570 579 +581 or 1 -569 580 +582 and 1 568 581 +583 input 1 f25 +584 and 1 489 -488 +585 ite 4 554 253 480 +586 ite 4 569 253 585 +587 concat 6 586 205 +588 sra 6 587 207 +589 eq 1 248 588 +590 and 1 479 -589 +591 and 1 584 590 +592 or 1 -583 591 +593 and 1 582 592 +594 input 1 f26 +595 concat 6 257 205 +596 sra 6 595 207 +597 eq 1 248 596 +598 and 1 447 -597 +599 and 1 195 598 +600 or 1 -594 599 +601 and 1 593 600 +602 input 1 f27 +603 and 1 195 -594 +604 ite 4 594 253 300 +605 concat 6 604 205 +606 sra 6 605 207 +607 eq 1 248 606 +608 and 1 447 607 +609 ite 4 256 253 157 +610 concat 6 609 205 +611 sra 6 610 207 +612 eq 1 248 611 +613 and 1 608 612 +614 and 1 603 613 +615 or 1 -602 614 +616 and 1 601 615 +617 input 1 f28 +618 and 1 603 -602 +619 and 1 447 618 +620 or 1 -617 619 +621 and 1 616 620 +622 input 1 f29 +623 or 1 197 594 +624 or 1 623 602 +625 or 1 624 617 +626 ite 4 602 107 609 +627 concat 6 626 205 +628 sra 6 627 207 +629 eq 1 248 628 +630 and 1 479 629 +631 and 1 625 630 +632 or 1 -622 631 +633 and 1 621 632 +634 input 1 f30 +635 and 1 625 -622 +636 and 1 479 -629 +637 concat 6 491 507 +638 add 6 213 637 +639 slice 3 638 7 0 +640 ite 3 533 639 507 +641 concat 6 491 640 +642 add 6 213 641 +643 slice 3 642 7 0 +644 ite 3 554 643 640 +645 concat 6 491 644 +646 add 6 213 645 +647 slice 3 646 7 0 +648 ite 3 569 647 644 +649 concat 6 491 648 +650 add 6 213 649 +651 slice 3 650 7 0 +652 ite 3 583 651 648 +653 concat 6 491 652 +654 add 6 213 653 +655 slice 3 654 7 0 +656 ite 3 594 655 652 +657 concat 6 491 656 +658 add 6 213 657 +659 slice 3 658 7 0 +660 ite 3 602 659 656 +661 concat 6 491 660 +662 add 6 213 661 +663 slice 3 662 7 0 +664 ite 3 617 663 660 +665 concat 6 491 664 +666 add 6 213 665 +667 slice 3 666 7 0 +668 ite 3 622 667 664 +669 eq 1 442 668 +670 and 1 636 669 +671 and 1 635 670 +672 or 1 -634 671 +673 and 1 633 672 +674 input 1 f31 +675 or 1 199 634 +676 concat 6 169 205 +677 sra 6 676 207 +678 ulte 1 204 677 +679 eq 1 249 677 +680 ite 4 594 300 257 +681 ite 4 679 575 680 +682 concat 6 681 205 +683 sra 6 682 207 +684 eq 1 628 683 +685 and 1 -678 -684 +686 ite 4 569 585 457 +687 ite 4 679 686 604 +688 concat 6 687 205 +689 sra 6 688 207 +690 eq 1 628 689 +691 and 1 685 -690 +692 and 1 675 691 +693 or 1 -674 692 +694 and 1 673 693 +695 input 1 f32 +696 add 6 213 677 +697 slice 4 696 15 0 +698 ite 4 674 697 169 +699 concat 6 698 205 +700 sra 6 699 207 +701 ulte 1 204 700 +702 eq 1 249 700 +703 ite 4 702 575 680 +704 concat 6 703 205 +705 sra 6 704 207 +706 eq 1 628 705 +707 ite 4 702 686 604 +708 concat 6 707 205 +709 sra 6 708 207 +710 eq 1 628 709 +711 or 1 706 710 +712 and 1 -701 711 +713 and 1 675 712 +714 or 1 -695 713 +715 and 1 694 714 +716 input 1 f33 +717 and 1 675 -695 +718 add 6 213 700 +719 slice 4 718 15 0 +720 ite 4 695 719 698 +721 concat 6 720 205 +722 sra 6 721 207 +723 eq 1 204 722 +724 concat 6 680 205 +725 sra 6 724 207 +726 eq 1 248 725 +727 and 1 723 726 +728 and 1 717 727 +729 or 1 -716 728 +730 and 1 715 729 +731 input 1 f34 +732 and 1 717 -716 +733 ite 4 716 107 720 +734 concat 6 733 205 +735 sra 6 734 207 +736 eq 1 204 735 +737 ite 4 716 626 680 +738 concat 6 737 205 +739 sra 6 738 207 +740 eq 1 248 739 +741 and 1 736 -740 +742 and 1 732 741 +743 or 1 -731 742 +744 and 1 730 743 +745 input 1 f35 +746 and 1 635 -634 +747 ite 4 716 253 626 +748 ite 4 731 253 747 +749 concat 6 748 205 +750 sra 6 749 207 +751 eq 1 248 750 +752 and 1 479 -751 +753 and 1 746 752 +754 or 1 -745 753 +755 and 1 744 754 +756 or 1 203 212 +757 or 1 223 756 +758 or 1 232 757 +759 or 1 242 758 +760 or 1 266 759 +761 or 1 282 760 +762 or 1 292 761 +763 or 1 309 762 +764 or 1 325 763 +765 or 1 335 764 +766 or 1 343 765 +767 or 1 394 766 +768 or 1 409 767 +769 or 1 419 768 +770 or 1 428 769 +771 or 1 441 770 +772 or 1 455 771 +773 or 1 470 772 +774 or 1 475 773 +775 or 1 488 774 +776 or 1 513 775 +777 or 1 533 776 +778 or 1 554 777 +779 or 1 569 778 +780 or 1 583 779 +781 or 1 594 780 +782 or 1 602 781 +783 or 1 617 782 +784 or 1 622 783 +785 or 1 634 784 +786 or 1 674 785 +787 or 1 695 786 +788 or 1 716 787 +789 or 1 731 788 +790 or 1 745 789 +791 and 1 755 790 +792 and 1 171 173 +793 or 1 171 173 +794 and 1 175 793 +795 or 1 792 794 +796 or 1 175 793 +797 and 1 177 796 +798 or 1 795 797 +799 or 1 177 796 +800 and 1 179 799 +801 or 1 798 800 +802 or 1 179 799 +803 and 1 181 802 +804 or 1 801 803 +805 or 1 181 802 +806 and 1 183 805 +807 or 1 804 806 +808 or 1 183 805 +809 and 1 185 808 +810 or 1 807 809 +811 or 1 185 808 +812 and 1 187 811 +813 or 1 810 812 +814 or 1 187 811 +815 and 1 -813 814 +816 and 1 189 191 +817 or 1 189 191 +818 and 1 193 817 +819 or 1 816 818 +820 and 1 815 -819 +821 or 1 193 817 +822 and 1 820 821 +823 and 1 195 197 +824 or 1 195 197 +825 and 1 199 824 +826 or 1 823 825 +827 and 1 822 -826 +828 or 1 199 824 +829 and 1 827 828 +830 and 1 791 829 +831 and 1 171 -212 +832 and 1 224 -232 +833 or 1 832 428 +834 and 1 831 833 +835 and 1 243 -282 +836 or 1 831 833 +837 and 1 835 836 +838 or 1 834 837 +839 and 1 293 -325 +840 or 1 835 836 +841 and 1 839 840 +842 or 1 838 841 +843 or 1 839 840 +844 and 1 179 843 +845 or 1 842 844 +846 and 1 336 -335 +847 or 1 179 843 +848 and 1 846 847 +849 or 1 845 848 +850 and 1 344 -409 +851 or 1 846 847 +852 and 1 850 851 +853 or 1 849 852 +854 and 1 420 -428 +855 or 1 850 851 +856 and 1 854 855 +857 or 1 853 856 +858 or 1 854 855 +859 and 1 187 858 +860 or 1 857 859 +861 or 1 187 858 +862 and 1 -860 861 +863 and 1 471 -470 +864 or 1 863 475 +865 or 1 864 533 +866 or 1 865 554 +867 or 1 866 569 +868 or 1 867 583 +869 and 1 584 -583 +870 and 1 868 869 +871 and 1 570 -569 +872 or 1 868 869 +873 and 1 871 872 +874 or 1 870 873 +875 and 1 862 -874 +876 or 1 871 872 +877 and 1 875 876 +878 and 1 618 -617 +879 or 1 878 622 +880 or 1 879 695 +881 or 1 880 716 +882 or 1 881 731 +883 or 1 882 745 +884 and 1 746 -745 +885 and 1 883 884 +886 and 1 732 -731 +887 or 1 883 884 +888 and 1 886 887 +889 or 1 885 888 +890 and 1 877 -889 +891 or 1 886 887 +892 and 1 890 891 +893 and 1 830 892 +894 add 6 213 349 +895 eq 1 249 894 +896 ite 3 895 372 387 +897 concat 6 491 896 +898 add 6 347 897 +899 eq 1 249 898 +900 and 1 343 899 +901 ite 3 900 94 135 +902 ite 3 455 358 901 +903 eq 1 902 8 +904 and 1 893 903 +905 eq 1 213 898 +906 and 1 343 905 +907 ite 3 906 94 137 +908 ite 3 602 358 907 +909 eq 1 908 10 +910 and 1 904 909 +911 ite 3 900 94 139 +912 eq 1 911 12 +913 and 1 910 912 +914 ite 3 906 94 141 +915 eq 1 914 14 +916 and 1 913 915 +917 eq 1 249 596 +918 add 6 213 596 +919 eq 1 249 918 +920 or 1 917 919 +921 and 1 594 920 +922 eq 1 249 449 +923 add 6 213 449 +924 eq 1 249 923 +925 or 1 922 924 +926 and 1 441 925 +927 ite 3 926 94 372 +928 ite 3 921 94 927 +929 eq 1 928 16 +930 and 1 916 929 +931 eq 1 213 596 +932 eq 1 213 918 +933 or 1 931 932 +934 and 1 594 933 +935 eq 1 213 449 +936 eq 1 213 923 +937 or 1 935 936 +938 and 1 441 937 +939 ite 3 938 94 387 +940 ite 3 934 94 939 +941 eq 1 940 18 +942 and 1 930 941 +943 eq 1 575 21 +944 and 1 942 943 +945 eq 1 737 23 +946 and 1 944 945 +947 eq 1 686 25 +948 and 1 946 947 +949 ite 4 731 747 604 +950 eq 1 949 27 +951 and 1 948 950 +952 eq 1 586 29 +953 and 1 951 952 +954 eq 1 748 31 +955 and 1 953 954 +956 eq 1 159 33 +957 and 1 955 956 +958 eq 1 446 35 +959 and 1 957 958 +960 concat 6 491 668 +961 add 6 213 960 +962 slice 3 961 7 0 +963 ite 3 695 962 668 +964 concat 6 491 963 +965 add 6 213 964 +966 slice 3 965 7 0 +967 ite 3 716 966 963 +968 concat 6 491 967 +969 add 6 213 968 +970 slice 3 969 7 0 +971 ite 3 731 970 967 +972 concat 6 491 971 +973 add 6 213 972 +974 slice 3 973 7 0 +975 ite 3 745 974 971 +976 eq 1 975 37 +977 and 1 959 976 +978 ite 4 428 107 431 +979 eq 1 978 39 +980 and 1 977 979 +981 ite 4 569 107 571 +982 eq 1 981 41 +983 and 1 980 982 +984 ite 4 731 107 733 +985 eq 1 984 43 +986 and 1 983 985 +987 eq 1 831 46 +988 and 1 986 987 +989 eq 1 833 48 +990 and 1 988 989 +991 eq 1 835 50 +992 and 1 990 991 +993 eq 1 839 52 +994 and 1 992 993 +995 eq 1 179 54 +996 and 1 994 995 +997 eq 1 846 56 +998 and 1 996 997 +999 eq 1 850 58 +1000 and 1 998 999 +1001 eq 1 854 60 +1002 and 1 1000 1001 +1003 eq 1 187 62 +1004 and 1 1002 1003 +1005 eq 1 868 64 +1006 and 1 1004 1005 +1007 eq 1 869 66 +1008 and 1 1006 1007 +1009 eq 1 871 68 +1010 and 1 1008 1009 +1011 eq 1 883 70 +1012 and 1 1010 1011 +1013 eq 1 884 72 +1014 and 1 1012 1013 +1015 eq 1 886 74 +1016 and 1 1014 1015 +1017 and 1 1016 78 +1018 concat 6 147 205 +1019 sra 6 1018 207 +1020 concat 6 149 205 +1021 sra 6 1020 207 +1022 eq 1 1019 1021 +1023 concat 6 153 205 +1024 sra 6 1023 207 +1025 eq 1 1019 1024 +1026 or 1 1022 1025 +1027 ite 1 76 1017 1026 +1028 next 1 78 1027 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/driving_phils.1.prop1-func-interl.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/driving_phils.1.prop1-func-interl.btor2 new file mode 100644 index 0000000000..ea03704401 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/driving_phils.1.prop1-func-interl.btor2 @@ -0,0 +1,760 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 5 +3 sort bitvec 8 +4 sort bitvec 16 +5 sort bitvec 24 +6 sort bitvec 32 +7 zero 3 +8 state 3 v_request_0 +9 init 3 8 7 +10 state 3 v_request_1 +11 init 3 10 7 +12 state 3 v_starvers_0 +13 init 3 12 7 +14 state 3 v_starvers_1 +15 init 3 14 7 +16 state 3 v_resources_0 +17 init 3 16 7 +18 state 3 v_resources_1 +19 init 3 18 7 +20 zero 4 +21 state 4 v_res0_0 +22 init 4 21 20 +23 state 4 v_res0_1 +24 init 4 23 20 +25 state 4 v_res1_0 +26 init 4 25 20 +27 state 4 v_res1_1 +28 init 4 27 20 +29 state 4 v_acquiring_0 +30 init 4 29 20 +31 state 4 v_acquiring_1 +32 init 4 31 20 +33 state 4 v_entryRound +34 init 4 33 20 +35 state 3 v_phase +36 init 3 35 7 +37 state 3 v_fire +38 init 3 37 7 +39 state 4 v_i_round_about +40 init 4 39 20 +41 state 4 v_i_phil_0 +42 init 4 41 20 +43 state 4 v_i_phil_1 +44 init 4 43 20 +45 zero 1 +46 state 1 a_reset +47 init 1 46 45 +48 state 1 a_begin0 +49 init 1 48 45 +50 state 1 a_begin1 +51 init 1 50 45 +52 state 1 a_begin2 +53 init 1 52 45 +54 state 1 a_begin3 +55 init 1 54 45 +56 state 1 a_action_round_about +57 init 1 56 45 +58 state 1 a_end0 +59 init 1 58 45 +60 state 1 a_end1 +61 init 1 60 45 +62 state 1 a_end2 +63 init 1 62 45 +64 state 1 a_action_phil_0 +65 init 1 64 45 +66 state 1 a_end_phil_0 +67 init 1 66 45 +68 state 1 a_mutex_phil_0 +69 init 1 68 45 +70 state 1 a_action_phil_1 +71 init 1 70 45 +72 state 1 a_end_phil_1 +73 init 1 72 45 +74 state 1 a_mutex_phil_1 +75 init 1 74 45 +76 state 1 dve_invalid +77 init 1 76 45 +78 constd 4 0 +79 concat 6 21 78 +80 constd 6 16 +81 sra 6 79 80 +82 concat 6 23 78 +83 sra 6 82 80 +84 eq 1 81 83 +85 concat 6 27 78 +86 sra 6 85 80 +87 eq 1 81 86 +88 or 1 84 87 +89 and 1 -76 88 +90 bad 89 +91 input 1 f17 +92 constd 4 1 +93 xor 4 92 33 +94 slice 3 93 7 0 +95 input 1 f11 +96 constd 6 0 +97 concat 6 39 78 +98 sra 6 97 80 +99 constd 5 0 +100 constd 6 1 +101 constd 6 2 +102 mul 6 101 98 +103 add 6 100 102 +104 eq 1 96 103 +105 ite 3 104 16 18 +106 concat 6 99 105 +107 add 6 98 106 +108 eq 1 96 107 +109 and 1 95 108 +110 constd 3 0 +111 ite 3 109 110 8 +112 ite 3 91 94 111 +113 next 3 8 112 +114 input 1 f27 +115 eq 1 100 107 +116 and 1 95 115 +117 ite 3 116 110 10 +118 ite 3 114 94 117 +119 next 3 10 118 +120 ite 3 109 110 12 +121 next 3 12 120 +122 ite 3 116 110 14 +123 next 3 14 122 +124 input 1 f26 +125 eq 1 96 83 +126 add 6 100 83 +127 eq 1 96 126 +128 or 1 125 127 +129 and 1 124 128 +130 input 1 f16 +131 eq 1 96 81 +132 add 6 100 81 +133 eq 1 96 132 +134 or 1 131 133 +135 and 1 130 134 +136 input 1 f07 +137 eq 1 96 98 +138 ite 4 137 25 27 +139 concat 6 138 78 +140 sra 6 139 80 +141 mul 6 101 140 +142 eq 1 96 141 +143 add 6 100 141 +144 eq 1 96 143 +145 or 1 142 144 +146 and 1 136 145 +147 slice 3 39 7 0 +148 ite 3 144 147 94 +149 input 1 f04 +150 ite 4 137 21 23 +151 concat 6 150 78 +152 sra 6 151 80 +153 mul 6 101 152 +154 eq 1 96 153 +155 add 6 100 153 +156 eq 1 96 155 +157 or 1 154 156 +158 and 1 149 157 +159 ite 3 156 147 94 +160 input 1 f02 +161 and 1 137 160 +162 ite 3 161 110 16 +163 ite 3 158 159 162 +164 ite 3 146 148 163 +165 ite 3 135 110 164 +166 ite 3 129 110 165 +167 next 3 16 166 +168 eq 1 100 83 +169 eq 1 100 126 +170 or 1 168 169 +171 and 1 124 170 +172 eq 1 100 81 +173 eq 1 100 132 +174 or 1 172 173 +175 and 1 130 174 +176 eq 1 100 141 +177 eq 1 100 143 +178 or 1 176 177 +179 and 1 136 178 +180 ite 3 177 147 94 +181 eq 1 100 153 +182 eq 1 100 155 +183 or 1 181 182 +184 and 1 149 183 +185 ite 3 182 147 94 +186 eq 1 100 98 +187 and 1 186 160 +188 ite 3 187 110 18 +189 ite 3 184 185 188 +190 ite 3 179 180 189 +191 ite 3 175 110 190 +192 ite 3 171 110 191 +193 next 3 18 192 +194 input 1 f23 +195 input 1 f00 +196 and 1 195 137 +197 constd 4 65535 +198 ite 4 196 197 21 +199 ite 4 130 25 198 +200 ite 4 194 29 199 +201 next 4 21 200 +202 input 1 f33 +203 and 1 195 186 +204 ite 4 203 197 23 +205 ite 4 124 27 204 +206 ite 4 202 31 205 +207 next 4 23 206 +208 input 1 f24 +209 ite 4 196 197 25 +210 ite 4 130 197 209 +211 ite 4 208 29 210 +212 next 4 25 211 +213 input 1 f34 +214 ite 4 203 197 27 +215 ite 4 124 197 214 +216 ite 4 213 31 215 +217 next 4 27 216 +218 constd 4 0 +219 ite 4 196 197 29 +220 ite 4 91 218 219 +221 ite 4 194 197 220 +222 ite 4 208 197 221 +223 next 4 29 222 +224 ite 4 203 197 31 +225 ite 4 114 218 224 +226 ite 4 202 197 225 +227 ite 4 213 197 226 +228 next 4 31 227 +229 xor 4 92 93 +230 next 4 33 229 +231 input 1 f15 +232 input 1 f10 +233 constd 3 2 +234 input 1 f09 +235 constd 3 1 +236 input 1 f01 +237 ite 3 236 110 35 +238 ite 3 234 235 237 +239 ite 3 232 233 238 +240 ite 3 231 110 239 +241 next 3 35 240 +242 input 1 f35 +243 concat 6 99 37 +244 add 6 100 243 +245 slice 3 244 7 0 +246 input 1 f32 +247 input 1 f29 +248 input 1 f28 +249 input 1 f25 +250 input 1 f22 +251 input 1 f19 +252 input 1 f18 +253 ite 3 234 110 37 +254 ite 3 232 110 253 +255 ite 3 130 245 254 +256 ite 3 91 245 255 +257 ite 3 252 245 256 +258 ite 3 251 245 257 +259 ite 3 250 245 258 +260 ite 3 194 245 259 +261 ite 3 208 245 260 +262 ite 3 249 245 261 +263 ite 3 124 245 262 +264 ite 3 114 245 263 +265 ite 3 248 245 264 +266 ite 3 247 245 265 +267 ite 3 246 245 266 +268 ite 3 202 245 267 +269 ite 3 213 245 268 +270 ite 3 242 245 269 +271 next 3 37 270 +272 input 1 f14 +273 add 6 100 98 +274 slice 4 273 15 0 +275 input 1 f13 +276 input 1 f12 +277 input 1 f08 +278 input 1 f06 +279 input 1 f05 +280 input 1 f03 +281 ite 4 195 274 39 +282 ite 4 236 218 281 +283 ite 4 160 274 282 +284 ite 4 280 218 283 +285 ite 4 149 274 284 +286 ite 4 279 274 285 +287 ite 4 278 218 286 +288 ite 4 136 274 287 +289 ite 4 277 274 288 +290 ite 4 234 218 289 +291 ite 4 95 274 290 +292 ite 4 276 274 291 +293 ite 4 275 218 292 +294 ite 4 272 274 293 +295 ite 4 231 218 294 +296 next 4 39 295 +297 concat 6 41 78 +298 sra 6 297 80 +299 add 6 100 298 +300 slice 4 299 15 0 +301 input 1 f21 +302 ite 4 301 300 41 +303 ite 4 250 300 302 +304 ite 4 194 218 303 +305 ite 4 208 218 304 +306 next 4 41 305 +307 concat 6 43 78 +308 sra 6 307 80 +309 add 6 100 308 +310 slice 4 309 15 0 +311 input 1 f31 +312 ite 4 311 310 43 +313 ite 4 246 310 312 +314 ite 4 202 218 313 +315 ite 4 213 218 314 +316 next 4 43 315 +317 and 1 -46 -236 +318 next 1 46 -317 +319 or 1 48 236 +320 and 1 319 -280 +321 or 1 320 231 +322 next 1 48 321 +323 or 1 50 280 +324 and 1 323 -278 +325 next 1 50 324 +326 or 1 52 278 +327 and 1 326 -234 +328 next 1 52 327 +329 next 1 54 54 +330 or 1 56 234 +331 and 1 330 -232 +332 next 1 56 331 +333 or 1 58 232 +334 and 1 333 -275 +335 next 1 58 334 +336 or 1 60 275 +337 and 1 336 -231 +338 next 1 60 337 +339 next 1 62 62 +340 and 1 -64 -130 +341 and 1 340 -91 +342 and 1 341 -252 +343 or 1 342 251 +344 or 1 343 250 +345 or 1 344 194 +346 or 1 345 208 +347 or 1 346 249 +348 next 1 64 -347 +349 or 1 66 130 +350 or 1 349 91 +351 or 1 350 252 +352 and 1 351 -251 +353 input 1 f20 +354 and 1 352 -353 +355 and 1 354 -249 +356 next 1 66 355 +357 or 1 68 353 +358 and 1 357 -250 +359 and 1 358 -194 +360 and 1 359 -208 +361 next 1 68 360 +362 and 1 -70 -124 +363 and 1 362 -114 +364 and 1 363 -248 +365 or 1 364 247 +366 or 1 365 246 +367 or 1 366 202 +368 or 1 367 213 +369 or 1 368 242 +370 next 1 70 -369 +371 or 1 72 124 +372 or 1 371 114 +373 or 1 372 248 +374 and 1 373 -247 +375 input 1 f30 +376 and 1 374 -375 +377 and 1 376 -242 +378 next 1 72 377 +379 or 1 74 375 +380 and 1 379 -246 +381 and 1 380 -202 +382 and 1 381 -213 +383 next 1 74 382 +384 ulte 1 101 98 +385 and 1 -46 -384 +386 or 1 -195 385 +387 eq 1 101 98 +388 and 1 -46 387 +389 or 1 -236 388 +390 and 1 386 389 +391 and 1 48 -384 +392 or 1 -160 391 +393 and 1 390 392 +394 and 1 48 387 +395 or 1 -280 394 +396 and 1 393 395 +397 constd 6 4294967295 +398 eq 1 397 152 +399 and 1 -384 -398 +400 and 1 50 399 +401 or 1 -149 400 +402 and 1 396 401 +403 and 1 -384 398 +404 and 1 50 403 +405 or 1 -279 404 +406 and 1 402 405 +407 and 1 50 387 +408 or 1 -278 407 +409 and 1 406 408 +410 eq 1 397 140 +411 and 1 -384 -410 +412 and 1 52 411 +413 or 1 -136 412 +414 and 1 409 413 +415 and 1 -384 410 +416 and 1 52 415 +417 or 1 -277 416 +418 and 1 414 417 +419 and 1 52 387 +420 or 1 -234 419 +421 and 1 418 420 +422 eq 1 233 37 +423 and 1 56 422 +424 or 1 -232 423 +425 and 1 421 424 +426 ulte 1 100 98 +427 eq 1 96 102 +428 ite 3 427 16 18 +429 eq 1 110 428 +430 and 1 -426 -429 +431 and 1 58 430 +432 or 1 -95 431 +433 and 1 425 432 +434 and 1 -426 429 +435 and 1 58 434 +436 or 1 -276 435 +437 and 1 433 436 +438 and 1 58 186 +439 or 1 -275 438 +440 and 1 437 439 +441 and 1 60 -384 +442 or 1 -272 441 +443 and 1 440 442 +444 and 1 387 422 +445 and 1 60 444 +446 or 1 -231 445 +447 and 1 443 446 +448 eq 1 235 35 +449 eq 1 397 81 +450 and 1 448 -449 +451 and 1 -64 450 +452 or 1 -130 451 +453 and 1 447 452 +454 concat 6 25 78 +455 sra 6 454 80 +456 eq 1 397 455 +457 and 1 448 456 +458 concat 6 29 78 +459 sra 6 458 80 +460 eq 1 397 459 +461 and 1 457 460 +462 and 1 -64 461 +463 or 1 -91 462 +464 and 1 453 463 +465 and 1 -64 448 +466 or 1 -252 465 +467 and 1 464 466 +468 eq 1 233 35 +469 and 1 460 468 +470 and 1 66 469 +471 or 1 -251 470 +472 and 1 467 471 +473 and 1 -460 468 +474 eq 1 110 37 +475 and 1 473 474 +476 and 1 66 475 +477 or 1 -353 476 +478 and 1 472 477 +479 ulte 1 101 298 +480 eq 1 96 298 +481 ite 4 480 21 23 +482 concat 6 481 78 +483 sra 6 482 80 +484 eq 1 459 483 +485 and 1 -479 -484 +486 ite 4 480 25 27 +487 concat 6 486 78 +488 sra 6 487 80 +489 eq 1 459 488 +490 and 1 485 -489 +491 and 1 68 490 +492 or 1 -301 491 +493 and 1 478 492 +494 or 1 484 489 +495 and 1 -479 494 +496 and 1 68 495 +497 or 1 -250 496 +498 and 1 493 497 +499 eq 1 101 298 +500 and 1 449 499 +501 and 1 68 500 +502 or 1 -194 501 +503 and 1 498 502 +504 and 1 -449 499 +505 and 1 68 504 +506 or 1 -208 505 +507 and 1 503 506 +508 and 1 66 473 +509 or 1 -249 508 +510 and 1 507 509 +511 eq 1 397 83 +512 and 1 448 -511 +513 and 1 -70 512 +514 or 1 -124 513 +515 and 1 510 514 +516 eq 1 397 86 +517 and 1 448 516 +518 concat 6 31 78 +519 sra 6 518 80 +520 eq 1 397 519 +521 and 1 517 520 +522 and 1 -70 521 +523 or 1 -114 522 +524 and 1 515 523 +525 and 1 -70 448 +526 or 1 -248 525 +527 and 1 524 526 +528 and 1 468 520 +529 and 1 72 528 +530 or 1 -247 529 +531 and 1 527 530 +532 and 1 468 -520 +533 eq 1 235 37 +534 and 1 532 533 +535 and 1 72 534 +536 or 1 -375 535 +537 and 1 531 536 +538 ulte 1 101 308 +539 eq 1 96 308 +540 ite 4 539 21 23 +541 concat 6 540 78 +542 sra 6 541 80 +543 eq 1 519 542 +544 and 1 -538 -543 +545 ite 4 539 25 27 +546 concat 6 545 78 +547 sra 6 546 80 +548 eq 1 519 547 +549 and 1 544 -548 +550 and 1 74 549 +551 or 1 -311 550 +552 and 1 537 551 +553 or 1 543 548 +554 and 1 -538 553 +555 and 1 74 554 +556 or 1 -246 555 +557 and 1 552 556 +558 eq 1 101 308 +559 and 1 511 558 +560 and 1 74 559 +561 or 1 -202 560 +562 and 1 557 561 +563 and 1 -511 558 +564 and 1 74 563 +565 or 1 -213 564 +566 and 1 562 565 +567 and 1 72 532 +568 or 1 -242 567 +569 and 1 566 568 +570 or 1 195 236 +571 or 1 160 570 +572 or 1 280 571 +573 or 1 149 572 +574 or 1 279 573 +575 or 1 278 574 +576 or 1 136 575 +577 or 1 277 576 +578 or 1 234 577 +579 or 1 232 578 +580 or 1 95 579 +581 or 1 276 580 +582 or 1 275 581 +583 or 1 272 582 +584 or 1 231 583 +585 or 1 130 584 +586 or 1 91 585 +587 or 1 252 586 +588 or 1 251 587 +589 or 1 353 588 +590 or 1 301 589 +591 or 1 250 590 +592 or 1 194 591 +593 or 1 208 592 +594 or 1 249 593 +595 or 1 124 594 +596 or 1 114 595 +597 or 1 248 596 +598 or 1 247 597 +599 or 1 375 598 +600 or 1 311 599 +601 or 1 246 600 +602 or 1 202 601 +603 or 1 213 602 +604 or 1 242 603 +605 and 1 569 604 +606 and 1 195 236 +607 and 1 160 570 +608 or 1 606 607 +609 and 1 280 571 +610 or 1 608 609 +611 and 1 149 572 +612 or 1 610 611 +613 and 1 279 573 +614 or 1 612 613 +615 and 1 278 574 +616 or 1 614 615 +617 and 1 136 575 +618 or 1 616 617 +619 and 1 277 576 +620 or 1 618 619 +621 and 1 234 577 +622 or 1 620 621 +623 and 1 232 578 +624 or 1 622 623 +625 and 1 95 579 +626 or 1 624 625 +627 and 1 276 580 +628 or 1 626 627 +629 and 1 275 581 +630 or 1 628 629 +631 and 1 272 582 +632 or 1 630 631 +633 and 1 231 583 +634 or 1 632 633 +635 and 1 130 584 +636 or 1 634 635 +637 and 1 91 585 +638 or 1 636 637 +639 and 1 252 586 +640 or 1 638 639 +641 and 1 251 587 +642 or 1 640 641 +643 and 1 353 588 +644 or 1 642 643 +645 and 1 301 589 +646 or 1 644 645 +647 and 1 250 590 +648 or 1 646 647 +649 and 1 194 591 +650 or 1 648 649 +651 and 1 208 592 +652 or 1 650 651 +653 and 1 249 593 +654 or 1 652 653 +655 and 1 124 594 +656 or 1 654 655 +657 and 1 114 595 +658 or 1 656 657 +659 and 1 248 596 +660 or 1 658 659 +661 and 1 247 597 +662 or 1 660 661 +663 and 1 375 598 +664 or 1 662 663 +665 and 1 311 599 +666 or 1 664 665 +667 and 1 246 600 +668 or 1 666 667 +669 and 1 202 601 +670 or 1 668 669 +671 and 1 213 602 +672 or 1 670 671 +673 and 1 242 603 +674 or 1 672 673 +675 and 1 605 -674 +676 and 1 -46 48 +677 or 1 -46 48 +678 and 1 50 677 +679 or 1 676 678 +680 or 1 50 677 +681 and 1 52 680 +682 or 1 679 681 +683 or 1 52 680 +684 and 1 54 683 +685 or 1 682 684 +686 or 1 54 683 +687 and 1 56 686 +688 or 1 685 687 +689 or 1 56 686 +690 and 1 58 689 +691 or 1 688 690 +692 or 1 58 689 +693 and 1 60 692 +694 or 1 691 693 +695 or 1 60 692 +696 and 1 62 695 +697 or 1 694 696 +698 or 1 62 695 +699 and 1 -697 698 +700 and 1 -64 66 +701 or 1 -64 66 +702 and 1 68 701 +703 or 1 700 702 +704 and 1 699 -703 +705 or 1 68 701 +706 and 1 704 705 +707 and 1 -70 72 +708 or 1 -70 72 +709 and 1 74 708 +710 or 1 707 709 +711 and 1 706 -710 +712 or 1 74 708 +713 and 1 711 712 +714 and 1 675 713 +715 and 1 317 321 +716 or 1 317 321 +717 and 1 324 716 +718 or 1 715 717 +719 or 1 324 716 +720 and 1 327 719 +721 or 1 718 720 +722 or 1 327 719 +723 and 1 54 722 +724 or 1 721 723 +725 or 1 54 722 +726 and 1 331 725 +727 or 1 724 726 +728 or 1 331 725 +729 and 1 334 728 +730 or 1 727 729 +731 or 1 334 728 +732 and 1 337 731 +733 or 1 730 732 +734 or 1 337 731 +735 and 1 62 734 +736 or 1 733 735 +737 or 1 62 734 +738 and 1 -736 737 +739 and 1 347 355 +740 or 1 347 355 +741 and 1 360 740 +742 or 1 739 741 +743 and 1 738 -742 +744 or 1 360 740 +745 and 1 743 744 +746 and 1 369 377 +747 or 1 369 377 +748 and 1 382 747 +749 or 1 746 748 +750 and 1 745 -749 +751 or 1 382 747 +752 and 1 750 751 +753 and 1 714 752 +754 and 1 753 -76 +755 next 1 76 -754 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/factorial4even.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/factorial4even.btor2 new file mode 100644 index 0000000000..d5cd0fa06a --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/factorial4even.btor2 @@ -0,0 +1,27 @@ +; source: https://github.com/Boolector/btor2tools/tree/b8456dda4780789e882f5791eb486f295ade4da4/examples/btorsim +; int i = 1, factorial = 1; +; assert (i <= 2 || !(factorial & 1)); +; for (;;) { +; factorial *= i; +; i++; +; assert (i <= 2 || !(factorial & 1)); +; } +1 sort bitvec 4 +2 one 1 +3 state 1 factorial +4 state 1 i +5 init 1 3 2 +6 init 1 4 2 +7 add 1 4 2 +8 mul 1 3 4 +9 next 1 4 7 +10 next 1 3 8 +11 ones 1 +12 sort bitvec 1 +13 eq 12 4 11 +14 bad 13 +15 slice 12 3 0 0 +16 constd 1 3 +17 ugt 12 4 16 +18 and 12 17 15 +19 bad 18 diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/gcd_1.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/gcd_1.btor2 new file mode 100644 index 0000000000..2a7e673369 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/gcd_1.btor2 @@ -0,0 +1,147 @@ +; source: https://gitlab.com/sosy-lab/research/data/sv-benchmarks-translation/-/tree/b404abc8f1ce5436ab1dd0532ce6a8e932f47a68 +1 sort bitvec 8 +2 sort bitvec 1 +3 sort bitvec 32 +4 sort bitvec 1 +5 constd 2 0 +6 constd 2 1 +7 input 1 !{$(in_main#0)<$(in___VERIFIER_nondet_char#0)>>} +8 input 1 !{$(in_main#0)<$(in___VERIFIER_nondet_char#1)>>} +9 input 1 !{$(in_main#0)<$(in_gcd_test#2)<$tmp>>} +10 input 1 !{$(in_main#0)<$(in_gcd_test#2)<$tmp.1>>} +11 input 1 %{$(in_main#0)<$(in_gcd_test#2)>}#3 +12 input 1 %{$(in_main#0)<$(in_gcd_test#2)<$tmp>>}#3 +13 input 1 %{$(in_main#0)<$(in_gcd_test#2)>}#3 +14 input 1 %{$(in_main#0)<$(in_gcd_test#2)<$tmp.1>>}#3 +15 input 1 !{$(in_main#0)<$(in_gcd_test#2)>}.next +16 input 1 !{$(in_main#0)<$(in_gcd_test#2)>}.next +17 input 1 !{$(in_main#0)}.next +18 input 2 !pc[0].next +19 input 2 !pc[1].next +20 input 2 !pc[2].next +21 state 1 !{$(in_main#0)<$(in_gcd_test#2)>} +22 state 1 !{$(in_main#0)<$(in_gcd_test#2)>} +23 state 1 !{$(in_main#0)} +24 state 2 !pc[0] +25 state 2 !pc[1] +26 state 2 !pc[2] +27 state 2 reset0 +28 state 2 valid +29 not 2 27 +30 and 2 18 19 +31 not 2 20 +32 and 2 31 30 +33 not 2 25 +34 and 2 24 33 +35 not 2 26 +36 and 2 35 34 +37 and 2 36 32 +38 constd 3 0 +39 constd 3 1 +40 sext 3 23 24 +41 sext 3 21 24 +42 eq 2 41 40 +43 ite 3 42 39 38 +44 eq 2 43 38 +45 eq 2 21 15 +46 and 2 45 44 +47 eq 2 22 16 +48 and 2 47 46 +49 eq 2 23 17 +50 and 2 49 48 +51 constd 1 0 +52 eq 2 22 51 +53 and 2 52 50 +54 and 2 53 37 +55 not 2 19 +56 and 2 18 55 +57 and 2 56 31 +58 and 2 57 36 +59 sext 3 22 24 +60 srem 3 41 59 +61 slice 1 60 7 0 +62 eq 2 16 61 +63 eq 2 15 22 +64 and 2 63 62 +65 and 2 49 64 +66 not 2 52 +67 and 2 66 65 +68 and 2 67 58 +69 or 2 68 54 +70 not 2 18 +71 and 2 19 70 +72 and 2 31 71 +73 not 2 24 +74 and 2 73 33 +75 and 2 74 35 +76 and 2 75 72 +77 and 2 45 47 +78 eq 2 17 8 +79 and 2 78 77 +80 sext 3 8 24 +81 sext 3 7 24 +82 srem 3 81 80 +83 eq 2 82 38 +84 slt 2 38 80 +85 and 2 84 83 +86 not 2 85 +87 and 2 86 79 +88 and 2 87 76 +89 and 2 75 57 +90 eq 2 16 13 +91 eq 2 15 11 +92 and 2 91 90 +93 and 2 92 78 +94 neg 1 8 +95 eq 2 94 14 +96 eq 2 94 13 +97 constd 4 1 +98 slice 4 80 31 31 +99 eq 2 98 97 +100 and 2 99 96 +101 and 2 100 95 +102 eq 2 10 14 +103 eq 2 8 13 +104 not 2 99 +105 and 2 104 103 +106 and 2 105 102 +107 or 2 106 101 +108 and 2 107 93 +109 neg 1 7 +110 eq 2 109 12 +111 eq 2 109 11 +112 slice 4 81 31 31 +113 eq 2 112 97 +114 and 2 113 111 +115 and 2 114 110 +116 eq 2 9 12 +117 eq 2 7 11 +118 not 2 113 +119 and 2 118 117 +120 and 2 119 116 +121 or 2 120 115 +122 and 2 121 108 +123 and 2 85 122 +124 and 2 123 89 +125 or 2 124 88 +126 or 2 125 69 +127 and 2 126 28 +128 or 2 127 29 +129 and 2 55 70 +130 and 2 31 129 +131 or 2 27 130 +132 and 2 131 128 +133 and 2 24 25 +134 and 2 35 133 +135 and 2 134 28 +136 next 1 21 15 +137 next 1 22 16 +138 next 1 23 17 +139 next 2 24 18 +140 next 2 25 19 +141 next 2 26 20 +142 init 2 27 5 +143 next 2 27 6 +144 init 2 28 5 +145 next 2 28 132 +146 bad 135 diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/gsv2008.c.i.p+cfa-reducer.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/gsv2008.c.i.p+cfa-reducer.btor2 new file mode 100644 index 0000000000..6e02071f34 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/gsv2008.c.i.p+cfa-reducer.btor2 @@ -0,0 +1,126 @@ +; source: https://gitlab.com/sosy-lab/research/data/sv-benchmarks-translation/-/tree/b404abc8f1ce5436ab1dd0532ce6a8e932f47a68 +1 sort bitvec 32 +2 sort bitvec 1 +3 sort bitvec 1 +4 constd 2 0 +5 constd 2 1 +6 input 1 !{$(in_main#0)<$(in___VERIFIER_nondet_int#0)>>} +7 input 1 !{$(in_main#0)}.next +8 input 1 !{$(in_main#0)}.next +9 input 1 !{__return_144}.next +10 input 1 !{__return_main}.next +11 input 2 !pc[0].next +12 input 2 !pc[1].next +13 input 2 !pc[2].next +14 state 1 !{$(in_main#0)} +15 state 1 !{$(in_main#0)} +16 state 1 !{__return_144} +17 state 1 !{__return_main} +18 state 2 !pc[0] +19 state 2 !pc[1] +20 state 2 !pc[2] +21 state 2 reset0 +22 state 2 valid +23 not 2 21 +24 and 2 11 12 +25 not 2 13 +26 and 2 25 24 +27 not 2 18 +28 and 2 19 27 +29 not 2 20 +30 and 2 29 28 +31 and 2 30 26 +32 constd 1 0 +33 constd 1 1 +34 slt 2 32 15 +35 ite 1 34 33 32 +36 eq 2 35 32 +37 eq 2 14 7 +38 and 2 37 36 +39 eq 2 15 8 +40 and 2 39 38 +41 eq 2 16 9 +42 and 2 41 40 +43 eq 2 17 10 +44 and 2 43 42 +45 constd 3 1 +46 slice 3 14 31 31 +47 eq 2 46 45 +48 not 2 47 +49 and 2 48 44 +50 and 2 49 31 +51 not 2 11 +52 and 2 12 51 +53 and 2 25 52 +54 and 2 53 30 +55 add 1 33 15 +56 eq 2 8 55 +57 add 1 14 15 +58 eq 2 7 57 +59 and 2 58 56 +60 and 2 41 59 +61 and 2 43 60 +62 and 2 47 61 +63 and 2 62 54 +64 or 2 63 50 +65 and 2 18 19 +66 and 2 29 65 +67 not 2 12 +68 and 2 11 67 +69 and 2 68 25 +70 and 2 69 66 +71 and 2 37 39 +72 and 2 71 41 +73 and 2 72 43 +74 and 2 73 70 +75 not 2 19 +76 and 2 27 75 +77 and 2 76 29 +78 and 2 77 53 +79 eq 2 8 6 +80 constd 1 4294967246 +81 eq 2 7 80 +82 and 2 81 79 +83 eq 2 9 32 +84 and 2 83 82 +85 eq 2 10 32 +86 and 2 85 84 +87 constd 1 1000000 +88 slt 2 6 87 +89 and 2 88 86 +90 constd 1 4294966296 +91 slt 2 90 6 +92 and 2 91 89 +93 and 2 92 78 +94 and 2 77 69 +95 not 2 88 +96 and 2 91 95 +97 not 2 91 +98 or 2 97 96 +99 and 2 98 81 +100 and 2 99 79 +101 and 2 100 83 +102 and 2 101 85 +103 and 2 102 94 +104 or 2 103 93 +105 or 2 104 74 +106 or 2 105 64 +107 and 2 106 22 +108 or 2 107 23 +109 and 2 67 51 +110 and 2 25 109 +111 or 2 21 110 +112 and 2 111 108 +113 and 2 66 22 +114 next 1 14 7 +115 next 1 15 8 +116 next 1 16 9 +117 next 1 17 10 +118 next 2 18 11 +119 next 2 19 12 +120 next 2 20 13 +121 init 2 21 4 +122 next 2 21 5 +123 init 2 22 4 +124 next 2 22 112 +125 bad 113 diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/loyd.3.prop1-func-interl.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/loyd.3.prop1-func-interl.btor2 new file mode 100644 index 0000000000..0a38156e47 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/loyd.3.prop1-func-interl.btor2 @@ -0,0 +1,504 @@ +; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +; Model in BTOR format generated by stepout.py 0.41 +1 sort bitvec 1 +2 sort bitvec 8 +3 sort bitvec 24 +4 sort bitvec 32 +5 zero 2 +6 state 2 v_a_0 +7 init 2 6 5 +8 state 2 v_a_1 +9 init 2 8 5 +10 state 2 v_a_2 +11 init 2 10 5 +12 state 2 v_a_3 +13 init 2 12 5 +14 state 2 v_a_4 +15 init 2 14 5 +16 state 2 v_a_5 +17 init 2 16 5 +18 state 2 v_a_6 +19 init 2 18 5 +20 state 2 v_a_7 +21 init 2 20 5 +22 state 2 v_a_8 +23 init 2 22 5 +24 state 2 v_a_9 +25 init 2 24 5 +26 state 2 v_a_10 +27 init 2 26 5 +28 state 2 v_a_11 +29 init 2 28 5 +30 state 2 v_x +31 init 2 30 5 +32 state 2 v_y +33 init 2 32 5 +34 zero 1 +35 state 1 a_q +36 init 1 35 34 +37 state 1 a_not_done +38 init 1 37 34 +39 state 1 a_done +40 init 1 39 34 +41 state 1 dve_invalid +42 init 1 41 34 +43 and 1 39 -41 +44 bad 43 +45 input 1 f3 +46 constd 4 0 +47 constd 3 0 +48 concat 4 47 30 +49 constd 4 4 +50 concat 4 47 32 +51 mul 4 49 50 +52 add 4 48 51 +53 eq 1 46 52 +54 constd 4 1 +55 add 4 54 50 +56 mul 4 49 55 +57 add 4 48 56 +58 eq 1 46 57 +59 or 1 53 58 +60 and 1 45 59 +61 constd 2 0 +62 eq 1 54 57 +63 constd 2 1 +64 xor 2 63 8 +65 constd 4 2 +66 eq 1 65 57 +67 constd 2 2 +68 xor 2 67 10 +69 constd 4 3 +70 eq 1 69 57 +71 constd 2 3 +72 xor 2 71 12 +73 eq 1 49 57 +74 constd 2 4 +75 xor 2 74 14 +76 constd 4 5 +77 eq 1 76 57 +78 constd 2 5 +79 xor 2 78 16 +80 constd 4 6 +81 eq 1 80 57 +82 constd 2 6 +83 xor 2 82 18 +84 constd 4 7 +85 eq 1 84 57 +86 constd 2 7 +87 xor 2 86 20 +88 constd 4 8 +89 eq 1 88 57 +90 constd 2 8 +91 xor 2 90 22 +92 constd 4 9 +93 eq 1 92 57 +94 constd 2 9 +95 xor 2 94 24 +96 constd 4 10 +97 eq 1 96 57 +98 constd 2 10 +99 xor 2 98 26 +100 constd 2 11 +101 xor 2 100 28 +102 ite 2 97 99 101 +103 ite 2 93 95 102 +104 ite 2 89 91 103 +105 ite 2 85 87 104 +106 ite 2 81 83 105 +107 ite 2 77 79 106 +108 ite 2 73 75 107 +109 ite 2 70 72 108 +110 ite 2 66 68 109 +111 ite 2 62 64 110 +112 ite 2 58 6 111 +113 ite 2 58 61 112 +114 input 1 f2 +115 sub 4 50 54 +116 mul 4 49 115 +117 add 4 48 116 +118 eq 1 46 117 +119 or 1 53 118 +120 and 1 114 119 +121 eq 1 54 117 +122 eq 1 65 117 +123 eq 1 69 117 +124 eq 1 49 117 +125 eq 1 76 117 +126 eq 1 80 117 +127 eq 1 84 117 +128 eq 1 88 117 +129 eq 1 92 117 +130 eq 1 96 117 +131 ite 2 130 99 101 +132 ite 2 129 95 131 +133 ite 2 128 91 132 +134 ite 2 127 87 133 +135 ite 2 126 83 134 +136 ite 2 125 79 135 +137 ite 2 124 75 136 +138 ite 2 123 72 137 +139 ite 2 122 68 138 +140 ite 2 121 64 139 +141 ite 2 118 6 140 +142 ite 2 118 61 141 +143 input 1 f1 +144 add 4 54 52 +145 eq 1 46 144 +146 or 1 53 145 +147 and 1 143 146 +148 eq 1 54 144 +149 eq 1 65 144 +150 eq 1 69 144 +151 eq 1 49 144 +152 eq 1 76 144 +153 eq 1 80 144 +154 eq 1 84 144 +155 eq 1 88 144 +156 eq 1 92 144 +157 eq 1 96 144 +158 ite 2 157 99 101 +159 ite 2 156 95 158 +160 ite 2 155 91 159 +161 ite 2 154 87 160 +162 ite 2 153 83 161 +163 ite 2 152 79 162 +164 ite 2 151 75 163 +165 ite 2 150 72 164 +166 ite 2 149 68 165 +167 ite 2 148 64 166 +168 ite 2 145 6 167 +169 ite 2 145 61 168 +170 input 1 f0 +171 sub 4 52 54 +172 eq 1 46 171 +173 or 1 172 53 +174 and 1 170 173 +175 eq 1 54 171 +176 eq 1 65 171 +177 eq 1 69 171 +178 eq 1 49 171 +179 eq 1 76 171 +180 eq 1 80 171 +181 eq 1 84 171 +182 eq 1 88 171 +183 eq 1 92 171 +184 eq 1 96 171 +185 ite 2 184 99 101 +186 ite 2 183 95 185 +187 ite 2 182 91 186 +188 ite 2 181 87 187 +189 ite 2 180 83 188 +190 ite 2 179 79 189 +191 ite 2 178 75 190 +192 ite 2 177 72 191 +193 ite 2 176 68 192 +194 ite 2 175 64 193 +195 ite 2 172 6 194 +196 ite 2 172 61 195 +197 ite 2 174 196 6 +198 ite 2 147 169 197 +199 ite 2 120 142 198 +200 ite 2 60 113 199 +201 next 2 6 200 +202 eq 1 54 52 +203 or 1 202 62 +204 and 1 45 203 +205 ite 2 62 61 112 +206 or 1 202 121 +207 and 1 114 206 +208 ite 2 121 61 141 +209 or 1 202 148 +210 and 1 143 209 +211 ite 2 148 61 168 +212 or 1 175 202 +213 and 1 170 212 +214 ite 2 175 61 195 +215 ite 2 213 214 64 +216 ite 2 210 211 215 +217 ite 2 207 208 216 +218 ite 2 204 205 217 +219 xor 2 63 218 +220 next 2 8 219 +221 eq 1 65 52 +222 or 1 221 66 +223 and 1 45 222 +224 ite 2 66 61 112 +225 or 1 221 122 +226 and 1 114 225 +227 ite 2 122 61 141 +228 or 1 221 149 +229 and 1 143 228 +230 ite 2 149 61 168 +231 or 1 176 221 +232 and 1 170 231 +233 ite 2 176 61 195 +234 ite 2 232 233 68 +235 ite 2 229 230 234 +236 ite 2 226 227 235 +237 ite 2 223 224 236 +238 xor 2 67 237 +239 next 2 10 238 +240 eq 1 69 52 +241 or 1 240 70 +242 and 1 45 241 +243 ite 2 70 61 112 +244 or 1 240 123 +245 and 1 114 244 +246 ite 2 123 61 141 +247 or 1 240 150 +248 and 1 143 247 +249 ite 2 150 61 168 +250 or 1 177 240 +251 and 1 170 250 +252 ite 2 177 61 195 +253 ite 2 251 252 72 +254 ite 2 248 249 253 +255 ite 2 245 246 254 +256 ite 2 242 243 255 +257 xor 2 71 256 +258 next 2 12 257 +259 eq 1 49 52 +260 or 1 259 73 +261 and 1 45 260 +262 ite 2 73 61 112 +263 or 1 259 124 +264 and 1 114 263 +265 ite 2 124 61 141 +266 or 1 259 151 +267 and 1 143 266 +268 ite 2 151 61 168 +269 or 1 178 259 +270 and 1 170 269 +271 ite 2 178 61 195 +272 ite 2 270 271 75 +273 ite 2 267 268 272 +274 ite 2 264 265 273 +275 ite 2 261 262 274 +276 xor 2 74 275 +277 next 2 14 276 +278 eq 1 76 52 +279 or 1 278 77 +280 and 1 45 279 +281 ite 2 77 61 112 +282 or 1 278 125 +283 and 1 114 282 +284 ite 2 125 61 141 +285 or 1 278 152 +286 and 1 143 285 +287 ite 2 152 61 168 +288 or 1 179 278 +289 and 1 170 288 +290 ite 2 179 61 195 +291 ite 2 289 290 79 +292 ite 2 286 287 291 +293 ite 2 283 284 292 +294 ite 2 280 281 293 +295 xor 2 78 294 +296 next 2 16 295 +297 eq 1 80 52 +298 or 1 297 81 +299 and 1 45 298 +300 ite 2 81 61 112 +301 or 1 297 126 +302 and 1 114 301 +303 ite 2 126 61 141 +304 or 1 297 153 +305 and 1 143 304 +306 ite 2 153 61 168 +307 or 1 180 297 +308 and 1 170 307 +309 ite 2 180 61 195 +310 ite 2 308 309 83 +311 ite 2 305 306 310 +312 ite 2 302 303 311 +313 ite 2 299 300 312 +314 xor 2 82 313 +315 next 2 18 314 +316 eq 1 84 52 +317 or 1 316 85 +318 and 1 45 317 +319 ite 2 85 61 112 +320 or 1 316 127 +321 and 1 114 320 +322 ite 2 127 61 141 +323 or 1 316 154 +324 and 1 143 323 +325 ite 2 154 61 168 +326 or 1 181 316 +327 and 1 170 326 +328 ite 2 181 61 195 +329 ite 2 327 328 87 +330 ite 2 324 325 329 +331 ite 2 321 322 330 +332 ite 2 318 319 331 +333 xor 2 86 332 +334 next 2 20 333 +335 eq 1 88 52 +336 or 1 335 89 +337 and 1 45 336 +338 ite 2 89 61 112 +339 or 1 335 128 +340 and 1 114 339 +341 ite 2 128 61 141 +342 or 1 335 155 +343 and 1 143 342 +344 ite 2 155 61 168 +345 or 1 182 335 +346 and 1 170 345 +347 ite 2 182 61 195 +348 ite 2 346 347 91 +349 ite 2 343 344 348 +350 ite 2 340 341 349 +351 ite 2 337 338 350 +352 xor 2 90 351 +353 next 2 22 352 +354 eq 1 92 52 +355 or 1 354 93 +356 and 1 45 355 +357 ite 2 93 61 112 +358 or 1 354 129 +359 and 1 114 358 +360 ite 2 129 61 141 +361 or 1 354 156 +362 and 1 143 361 +363 ite 2 156 61 168 +364 or 1 183 354 +365 and 1 170 364 +366 ite 2 183 61 195 +367 ite 2 365 366 95 +368 ite 2 362 363 367 +369 ite 2 359 360 368 +370 ite 2 356 357 369 +371 xor 2 94 370 +372 next 2 24 371 +373 eq 1 96 52 +374 or 1 373 97 +375 and 1 45 374 +376 ite 2 97 61 112 +377 or 1 373 130 +378 and 1 114 377 +379 ite 2 130 61 141 +380 or 1 373 157 +381 and 1 143 380 +382 ite 2 157 61 168 +383 or 1 184 373 +384 and 1 170 383 +385 ite 2 184 61 195 +386 ite 2 384 385 99 +387 ite 2 381 382 386 +388 ite 2 378 379 387 +389 ite 2 375 376 388 +390 xor 2 98 389 +391 next 2 26 390 +392 constd 4 11 +393 eq 1 392 52 +394 eq 1 392 57 +395 or 1 393 394 +396 and 1 45 395 +397 ite 2 394 61 112 +398 eq 1 392 117 +399 or 1 393 398 +400 and 1 114 399 +401 ite 2 398 61 141 +402 eq 1 392 144 +403 or 1 393 402 +404 and 1 143 403 +405 ite 2 402 61 168 +406 eq 1 392 171 +407 or 1 406 393 +408 and 1 170 407 +409 ite 2 406 61 195 +410 ite 2 408 409 101 +411 ite 2 404 405 410 +412 ite 2 400 401 411 +413 ite 2 396 397 412 +414 xor 2 100 413 +415 next 2 28 414 +416 add 4 54 48 +417 slice 2 416 7 0 +418 sub 4 48 54 +419 slice 2 418 7 0 +420 ite 2 170 419 30 +421 ite 2 143 417 420 +422 next 2 30 421 +423 slice 2 55 7 0 +424 slice 2 115 7 0 +425 ite 2 114 424 32 +426 ite 2 45 423 425 +427 next 2 32 426 +428 next 1 35 35 +429 input 1 f4 +430 and 1 -37 -429 +431 next 1 37 -430 +432 or 1 39 429 +433 next 1 39 432 +434 ulte 1 48 46 +435 and 1 -35 -434 +436 or 1 -170 435 +437 ulte 1 69 48 +438 and 1 -35 -437 +439 or 1 -143 438 +440 and 1 436 439 +441 ulte 1 50 46 +442 and 1 -35 -441 +443 or 1 -114 442 +444 and 1 440 443 +445 ulte 1 65 50 +446 and 1 -35 -445 +447 or 1 -45 446 +448 and 1 444 447 +449 eq 1 100 6 +450 eq 1 98 64 +451 and 1 449 450 +452 eq 1 94 68 +453 and 1 451 452 +454 eq 1 90 72 +455 and 1 453 454 +456 eq 1 86 75 +457 and 1 455 456 +458 eq 1 82 79 +459 and 1 457 458 +460 eq 1 78 83 +461 and 1 459 460 +462 eq 1 74 87 +463 and 1 461 462 +464 eq 1 71 91 +465 and 1 463 464 +466 eq 1 67 95 +467 and 1 465 466 +468 eq 1 63 99 +469 and 1 467 468 +470 eq 1 61 101 +471 and 1 469 470 +472 and 1 -37 471 +473 or 1 -429 472 +474 and 1 448 473 +475 or 1 170 143 +476 or 1 114 475 +477 or 1 45 476 +478 or 1 429 477 +479 and 1 474 478 +480 and 1 170 143 +481 and 1 114 475 +482 or 1 480 481 +483 and 1 45 476 +484 or 1 482 483 +485 and 1 429 477 +486 or 1 484 485 +487 and 1 479 -486 +488 and 1 -37 39 +489 and 1 -35 -488 +490 or 1 -37 39 +491 and 1 489 490 +492 and 1 487 491 +493 and 1 430 432 +494 and 1 -35 -493 +495 or 1 430 432 +496 and 1 494 495 +497 and 1 492 496 +498 and 1 497 -41 +499 next 1 41 -498 +; End + + diff --git a/subprojects/xcfa/btor2xcfa/src/test/resources/minepump_spec4_product01.cil.btor2 b/subprojects/xcfa/btor2xcfa/src/test/resources/minepump_spec4_product01.cil.btor2 new file mode 100644 index 0000000000..c606c1b186 --- /dev/null +++ b/subprojects/xcfa/btor2xcfa/src/test/resources/minepump_spec4_product01.cil.btor2 @@ -0,0 +1,330 @@ +; source: https://gitlab.com/sosy-lab/research/data/sv-benchmarks-translation/-/tree/b404abc8f1ce5436ab1dd0532ce6a8e932f47a68 +1 sort bitvec 32 +2 sort bitvec 1 +3 constd 2 0 +4 constd 2 1 +5 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in___VERIFIER_nondet_int#0)>>>>} +6 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in___VERIFIER_nondet_int#2)>>>>} +7 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in___VERIFIER_nondet_int#4)>>>>} +8 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in___VERIFIER_nondet_int#5)>>>>} +9 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_timeShift#6)<$(in___utac_acc__Specification4_spec__1#2)>>>>} +10 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_timeShift#6)<$(in___utac_acc__Specification4_spec__1#2)<$tmp.1>>>>>} +11 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#0)<$(in___utac_acc__Specification4_spec__1#2)>>>>>} +12 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#0)<$(in___utac_acc__Specification4_spec__1#2)<$tmp.1>>>>>>} +13 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#1)<$(in___utac_acc__Specification4_spec__1#2)>>>>>} +14 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#1)<$(in___utac_acc__Specification4_spec__1#2)<$tmp.1>>>>>>} +15 input 1 %{waterLevel}#2 +16 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#1)<$(in___utac_acc__Specification4_spec__1#2)<$temp.1>>>>>>}#4 +17 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#1)<$(in___utac_acc__Specification4_spec__1#2)>>>>>}#3 +18 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#1)<$(in___utac_acc__Specification4_spec__1#2)<$tmp.1>>>>>>}#3 +19 input 1 %{methaneLevelCritical}#2 +20 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$temp.1>>>}#5 +21 input 1 %{waterLevel}#4 +22 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_timeShift#6)<$(in___utac_acc__Specification4_spec__1#2)<$temp.1>>>>>}#4 +23 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_timeShift#6)<$(in___utac_acc__Specification4_spec__1#2)>>>>}#3 +24 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_timeShift#6)<$(in___utac_acc__Specification4_spec__1#2)<$tmp.1>>>>>}#3 +25 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)>>>}#1 +26 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#0)<$(in___utac_acc__Specification4_spec__1#2)<$temp.1>>>>>>}#4 +27 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#0)<$(in___utac_acc__Specification4_spec__1#2)>>>>>}#3 +28 input 1 %{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)<$(in_timeShift#0)<$(in___utac_acc__Specification4_spec__1#2)<$tmp.1>>>>>>}#3 +29 input 1 !{waterLevel}.next +30 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)>>>}.next +31 input 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)>>}.next +32 input 1 !{cleanupTimeShifts}.next +33 input 1 !{methaneLevelCritical}.next +34 input 1 !{pumpRunning}.next +35 input 1 !{systemActive}.next +36 input 2 !pc[0].next +37 input 2 !pc[1].next +38 input 2 !pc[2].next +39 state 1 !{waterLevel} +40 state 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)<$(in_cleanup#7)>>>} +41 state 1 !{$(in_main#0)<$(in_runTest#4)<$(in_test#0)>>} +42 state 1 !{cleanupTimeShifts} +43 state 1 !{methaneLevelCritical} +44 state 1 !{pumpRunning} +45 state 1 !{systemActive} +46 state 2 !pc[0] +47 state 2 !pc[1] +48 state 2 !pc[2] +49 state 2 reset0 +50 state 2 valid +51 not 2 49 +52 not 2 47 +53 and 2 46 52 +54 not 2 48 +55 and 2 54 53 +56 and 2 36 37 +57 not 2 38 +58 and 2 57 56 +59 and 2 58 55 +60 constd 1 0 +61 eq 2 30 60 +62 eq 2 29 15 +63 and 2 62 61 +64 eq 2 41 31 +65 and 2 64 63 +66 eq 2 42 32 +67 and 2 66 65 +68 eq 2 43 33 +69 and 2 68 67 +70 eq 2 44 34 +71 and 2 70 69 +72 eq 2 45 35 +73 and 2 72 71 +74 eq 2 44 28 +75 eq 2 44 27 +76 eq 2 44 26 +77 eq 2 15 60 +78 eq 2 44 60 +79 and 2 78 77 +80 and 2 79 76 +81 and 2 80 75 +82 and 2 81 74 +83 eq 2 12 28 +84 eq 2 11 27 +85 eq 2 15 26 +86 not 2 77 +87 and 2 86 85 +88 and 2 87 84 +89 and 2 88 83 +90 or 2 89 82 +91 and 2 90 73 +92 eq 2 39 15 +93 and 2 78 92 +94 constd 1 4294967295 +95 add 1 94 39 +96 eq 2 95 15 +97 slt 2 60 39 +98 and 2 97 96 +99 not 2 97 +100 and 2 99 92 +101 or 2 100 98 +102 not 2 78 +103 and 2 102 101 +104 or 2 103 93 +105 and 2 104 91 +106 constd 1 4 +107 slt 2 41 106 +108 not 2 107 +109 and 2 108 105 +110 and 2 109 59 +111 not 2 37 +112 and 2 36 111 +113 and 2 38 112 +114 and 2 55 113 +115 eq 2 30 25 +116 and 2 102 62 +117 and 2 116 115 +118 and 2 64 117 +119 and 2 66 118 +120 and 2 68 119 +121 and 2 70 120 +122 and 2 72 121 +123 and 2 77 122 +124 and 2 104 123 +125 and 2 108 124 +126 and 2 125 114 +127 and 2 112 57 +128 and 2 127 55 +129 eq 2 29 21 +130 eq 2 40 30 +131 and 2 130 129 +132 and 2 64 131 +133 and 2 66 132 +134 eq 2 33 19 +135 and 2 134 133 +136 and 2 70 135 +137 and 2 72 136 +138 eq 2 44 24 +139 eq 2 44 23 +140 eq 2 44 22 +141 eq 2 21 60 +142 and 2 78 141 +143 and 2 142 140 +144 and 2 143 139 +145 and 2 144 138 +146 eq 2 10 24 +147 eq 2 9 23 +148 eq 2 21 22 +149 not 2 141 +150 and 2 149 148 +151 and 2 150 147 +152 and 2 151 146 +153 or 2 152 145 +154 and 2 153 137 +155 eq 2 15 21 +156 and 2 78 155 +157 add 1 94 15 +158 eq 2 157 21 +159 slt 2 60 15 +160 and 2 159 158 +161 not 2 159 +162 and 2 161 155 +163 or 2 162 160 +164 and 2 102 163 +165 or 2 164 156 +166 and 2 165 154 +167 eq 2 8 20 +168 eq 2 7 60 +169 and 2 168 167 +170 eq 2 7 20 +171 not 2 168 +172 and 2 171 170 +173 or 2 172 169 +174 and 2 173 166 +175 eq 2 43 19 +176 eq 2 6 60 +177 and 2 176 175 +178 constd 1 1 +179 eq 2 19 178 +180 eq 2 43 60 +181 and 2 180 179 +182 eq 2 19 60 +183 not 2 180 +184 and 2 183 182 +185 or 2 184 181 +186 not 2 176 +187 and 2 186 185 +188 or 2 187 177 +189 and 2 188 174 +190 eq 2 5 60 +191 and 2 92 190 +192 add 1 178 39 +193 eq 2 15 192 +194 constd 1 2 +195 slt 2 39 194 +196 and 2 195 193 +197 not 2 195 +198 and 2 92 197 +199 or 2 198 196 +200 not 2 190 +201 and 2 200 199 +202 or 2 201 191 +203 and 2 202 189 +204 and 2 107 203 +205 and 2 204 128 +206 not 2 36 +207 and 2 37 206 +208 and 2 38 207 +209 and 2 55 208 +210 and 2 102 129 +211 and 2 130 210 +212 and 2 64 211 +213 and 2 66 212 +214 and 2 213 134 +215 and 2 70 214 +216 and 2 72 215 +217 and 2 141 216 +218 and 2 165 217 +219 and 2 173 218 +220 and 2 188 219 +221 and 2 202 220 +222 and 2 107 221 +223 and 2 222 209 +224 or 2 223 205 +225 or 2 224 126 +226 or 2 225 110 +227 and 2 46 47 +228 and 2 54 227 +229 and 2 57 207 +230 and 2 229 228 +231 eq 2 39 29 +232 and 2 130 231 +233 and 2 64 232 +234 and 2 66 233 +235 and 2 68 234 +236 and 2 70 235 +237 and 2 72 236 +238 add 1 94 42 +239 slt 2 40 238 +240 not 2 239 +241 and 2 240 237 +242 and 2 241 230 +243 and 2 228 58 +244 add 1 178 40 +245 eq 2 30 244 +246 and 2 62 245 +247 and 2 64 246 +248 and 2 66 247 +249 and 2 68 248 +250 and 2 70 249 +251 and 2 72 250 +252 eq 2 44 18 +253 eq 2 44 17 +254 eq 2 44 16 +255 and 2 79 254 +256 and 2 255 253 +257 and 2 256 252 +258 eq 2 14 18 +259 eq 2 13 17 +260 eq 2 15 16 +261 and 2 86 260 +262 and 2 261 259 +263 and 2 262 258 +264 or 2 263 257 +265 and 2 264 251 +266 and 2 104 265 +267 and 2 239 266 +268 and 2 267 243 +269 and 2 111 206 +270 and 2 38 269 +271 and 2 228 270 +272 and 2 130 116 +273 and 2 64 272 +274 and 2 273 66 +275 and 2 274 68 +276 and 2 275 70 +277 and 2 276 72 +278 and 2 77 277 +279 and 2 104 278 +280 and 2 239 279 +281 and 2 280 271 +282 or 2 281 268 +283 or 2 282 242 +284 not 2 46 +285 and 2 284 52 +286 and 2 285 54 +287 and 2 286 127 +288 eq 2 35 178 +289 eq 2 34 60 +290 eq 2 33 60 +291 eq 2 32 106 +292 eq 2 31 60 +293 eq 2 29 178 +294 and 2 293 130 +295 and 2 294 292 +296 and 2 295 291 +297 and 2 296 290 +298 and 2 297 289 +299 and 2 298 288 +300 and 2 299 287 +301 or 2 300 283 +302 or 2 301 226 +303 and 2 302 50 +304 or 2 303 51 +305 and 2 57 269 +306 or 2 49 305 +307 and 2 306 304 +308 and 2 48 53 +309 and 2 48 285 +310 or 2 309 308 +311 and 2 47 284 +312 and 2 48 311 +313 or 2 312 310 +314 and 2 313 50 +315 next 1 39 29 +316 next 1 40 30 +317 next 1 41 31 +318 next 1 42 32 +319 next 1 43 33 +320 next 1 44 34 +321 next 1 45 35 +322 next 2 46 36 +323 next 2 47 37 +324 next 2 48 38 +325 init 2 49 3 +326 next 2 49 4 +327 init 2 50 3 +328 next 2 50 307 +329 bad 314 diff --git a/subprojects/xcfa/c2xcfa/src/test/resources/count2.c b/subprojects/xcfa/c2xcfa/src/test/resources/count2.c new file mode 100644 index 0000000000..01a7cafca9 --- /dev/null +++ b/subprojects/xcfa/c2xcfa/src/test/resources/count2.c @@ -0,0 +1,50 @@ +// This C program is converted from Btor2 by Btor2C version sha1:36c1ad5 +// with arguments: { architecture=64, modulo_mode=LAZY, use_memmove=false, unroll_inner_loops=false, shortest_type=true, diff_type=true, decimal_constant=true, zero_init=false, sra_extend_sign=true } +// Comments from the original Btor2 file: +// ; source: https://github.com/Boolector/btor2tools/tree/b8456dda4780789e882f5791eb486f295ade4da4/examples/btorsim +extern unsigned char __VERIFIER_nondet_uchar(); +extern unsigned short __VERIFIER_nondet_ushort(); +extern unsigned int __VERIFIER_nondet_uint(); +extern unsigned long __VERIFIER_nondet_ulong(); +extern void abort(void); +extern void __assert_fail(const char *, const char *, unsigned int, const char *); +void reach_error() { __assert_fail("0", "count2.c", 0, "reach_error"); } +void __VERIFIER_assert(int cond) { if (!(cond)) { ERROR: { reach_error(); abort(); } } } +void assume_abort_if_not(int cond) { if (!cond) { abort(); } } +int main() { + // Defining sorts ... + typedef unsigned char SORT_1; // BV with 3 bits + const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 3); + const SORT_1 msb_SORT_1 = (SORT_1)1 << (3 - 1); + typedef unsigned char SORT_9; // BV with 1 bits + const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 1); + const SORT_9 msb_SORT_9 = (SORT_9)1 << (1 - 1); + // Initializing constants ... + const SORT_1 var_2 = 0; + const SORT_1 var_5 = 1; + const SORT_1 var_8 = mask_SORT_1; + // Collecting state declarations ... + SORT_1 state_3 = __VERIFIER_nondet_uchar() & mask_SORT_1; + // Initializing states ... + SORT_1 init_4_arg_1 = var_2; + state_3 = init_4_arg_1; + for (;;) { + // Getting external input values ... + // Assuming invariants ... + // Asserting properties ... + SORT_1 var_10_arg_0 = state_3; + SORT_1 var_10_arg_1 = var_8; + SORT_9 var_10 = var_10_arg_0 == var_10_arg_1; + SORT_9 bad_11_arg_0 = var_10; + __VERIFIER_assert(!(bad_11_arg_0)); + // Computing next states ... + SORT_1 var_6_arg_0 = state_3; + SORT_1 var_6_arg_1 = var_5; + SORT_1 var_6 = var_6_arg_0 + var_6_arg_1; + var_6 = var_6 & mask_SORT_1; + SORT_1 next_7_arg_1 = var_6; + // Assigning next states ... + state_3 = next_7_arg_1; + } + return 0; +} diff --git a/subprojects/xcfa/c2xcfa/src/test/resources/driving_phils.1.prop1-back-serstep.c b/subprojects/xcfa/c2xcfa/src/test/resources/driving_phils.1.prop1-back-serstep.c new file mode 100644 index 0000000000..915fa4df74 --- /dev/null +++ b/subprojects/xcfa/c2xcfa/src/test/resources/driving_phils.1.prop1-back-serstep.c @@ -0,0 +1,3175 @@ +// This C program is converted from Btor2 by Btor2C version sha1:7cf65f0 +// with arguments: { architecture=64, modulo_mode=LAZY, use_memmove=false, use_int128=false, unroll_inner_loops=5000, shortest_type=true, diff_type=true, decimal_constant=true, zero_init=false, sra_extend_sign=true, alap_scheduling=true, ite_conditional_write=true } +// Comments from the original Btor2 file: +// ; source: http://fmv.jku.at/hwmcc19/beem_btor.tar.xz +// ; Model in BTOR format generated by stepout.py 0.41 +extern unsigned char __VERIFIER_nondet_uchar(); +extern unsigned short __VERIFIER_nondet_ushort(); +extern unsigned int __VERIFIER_nondet_uint(); +extern unsigned long __VERIFIER_nondet_ulong(); +extern void abort(void); +extern void __assert_fail(const char *, const char *, unsigned int, const char *); +void reach_error() { __assert_fail("0", "driving_phils.1.prop1-back-serstep.c", 0, "reach_error"); } +void __VERIFIER_assert(int cond) { if (!(cond)) { ERROR: { reach_error(); abort(); } } } +void assume_abort_if_not(int cond) { if (!cond) { abort(); } } +int main() { + // Defining sorts ... + typedef unsigned char SORT_1; // BV with 1 bits + const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); + const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); + typedef unsigned char SORT_2; // BV with 5 bits + const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 5); + const SORT_2 msb_SORT_2 = (SORT_2)1 << (5 - 1); + typedef unsigned char SORT_3; // BV with 8 bits + const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); + const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); + typedef unsigned short SORT_4; // BV with 16 bits + const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 16); + const SORT_4 msb_SORT_4 = (SORT_4)1 << (16 - 1); + typedef unsigned int SORT_5; // BV with 24 bits + const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 24); + const SORT_5 msb_SORT_5 = (SORT_5)1 << (24 - 1); + typedef unsigned int SORT_6; // BV with 32 bits + const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); + const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); + // Initializing constants ... + const SORT_3 var_7 = 0; + const SORT_4 var_20 = 0; + const SORT_1 var_45 = 0; + const SORT_3 var_94 = 0U; + const SORT_4 var_107 = 0U; + const SORT_4 var_120 = 1U; + const SORT_1 var_201 = 1U; + const SORT_6 var_204 = 2U; + const SORT_4 var_205 = 0U; + const SORT_6 var_207 = 16U; + const SORT_6 var_213 = 1U; + const SORT_6 var_248 = 4294967295U; + const SORT_6 var_249 = 0U; + const SORT_4 var_253 = 65535U; + const SORT_3 var_337 = 2U; + const SORT_3 var_442 = 1U; + const SORT_5 var_491 = 0U; + // Collecting state declarations ... + SORT_3 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_3 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_3 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_3 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_3 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_3 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_4 state_21 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_23 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_25 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_27 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_29 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_31 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_33 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_3 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_3 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_3; + SORT_4 state_39 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_41 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_4 state_43 = __VERIFIER_nondet_ushort() & mask_SORT_4; + SORT_1 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_52 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_54 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_56 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_58 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_62 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_66 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_70 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_76 = __VERIFIER_nondet_uchar() & mask_SORT_1; + SORT_1 state_78 = __VERIFIER_nondet_uchar() & mask_SORT_1; + // Initializing states ... + SORT_3 state_8_init_arg = var_7; + state_8 = state_8_init_arg; + SORT_3 state_10_init_arg = var_7; + state_10 = state_10_init_arg; + SORT_3 state_12_init_arg = var_7; + state_12 = state_12_init_arg; + SORT_3 state_14_init_arg = var_7; + state_14 = state_14_init_arg; + SORT_3 state_16_init_arg = var_7; + state_16 = state_16_init_arg; + SORT_3 state_18_init_arg = var_7; + state_18 = state_18_init_arg; + SORT_4 state_21_init_arg = var_20; + state_21 = state_21_init_arg; + SORT_4 state_23_init_arg = var_20; + state_23 = state_23_init_arg; + SORT_4 state_25_init_arg = var_20; + state_25 = state_25_init_arg; + SORT_4 state_27_init_arg = var_20; + state_27 = state_27_init_arg; + SORT_4 state_29_init_arg = var_20; + state_29 = state_29_init_arg; + SORT_4 state_31_init_arg = var_20; + state_31 = state_31_init_arg; + SORT_4 state_33_init_arg = var_20; + state_33 = state_33_init_arg; + SORT_3 state_35_init_arg = var_7; + state_35 = state_35_init_arg; + SORT_3 state_37_init_arg = var_7; + state_37 = state_37_init_arg; + SORT_4 state_39_init_arg = var_20; + state_39 = state_39_init_arg; + SORT_4 state_41_init_arg = var_20; + state_41 = state_41_init_arg; + SORT_4 state_43_init_arg = var_20; + state_43 = state_43_init_arg; + SORT_1 state_46_init_arg = var_45; + state_46 = state_46_init_arg; + state_46 = state_46 & mask_SORT_1; + SORT_1 state_48_init_arg = var_45; + state_48 = state_48_init_arg; + state_48 = state_48 & mask_SORT_1; + SORT_1 state_50_init_arg = var_45; + state_50 = state_50_init_arg; + state_50 = state_50 & mask_SORT_1; + SORT_1 state_52_init_arg = var_45; + state_52 = state_52_init_arg; + state_52 = state_52 & mask_SORT_1; + SORT_1 state_54_init_arg = var_45; + state_54 = state_54_init_arg; + state_54 = state_54 & mask_SORT_1; + SORT_1 state_56_init_arg = var_45; + state_56 = state_56_init_arg; + state_56 = state_56 & mask_SORT_1; + SORT_1 state_58_init_arg = var_45; + state_58 = state_58_init_arg; + state_58 = state_58 & mask_SORT_1; + SORT_1 state_60_init_arg = var_45; + state_60 = state_60_init_arg; + state_60 = state_60 & mask_SORT_1; + SORT_1 state_62_init_arg = var_45; + state_62 = state_62_init_arg; + state_62 = state_62 & mask_SORT_1; + SORT_1 state_64_init_arg = var_45; + state_64 = state_64_init_arg; + state_64 = state_64 & mask_SORT_1; + SORT_1 state_66_init_arg = var_45; + state_66 = state_66_init_arg; + state_66 = state_66 & mask_SORT_1; + SORT_1 state_68_init_arg = var_45; + state_68 = state_68_init_arg; + state_68 = state_68 & mask_SORT_1; + SORT_1 state_70_init_arg = var_45; + state_70 = state_70_init_arg; + state_70 = state_70 & mask_SORT_1; + SORT_1 state_72_init_arg = var_45; + state_72 = state_72_init_arg; + state_72 = state_72 & mask_SORT_1; + SORT_1 state_74_init_arg = var_45; + state_74 = state_74_init_arg; + state_74 = state_74 & mask_SORT_1; + SORT_1 state_76_init_arg = var_45; + state_76 = state_76_init_arg; + state_76 = state_76 & mask_SORT_1; + SORT_1 state_78_init_arg = var_45; + state_78 = state_78_init_arg; + state_78 = state_78 & mask_SORT_1; + for (;;) { + // Getting external input values ... + SORT_3 input_135 = __VERIFIER_nondet_uchar(); + SORT_3 input_137 = __VERIFIER_nondet_uchar(); + SORT_3 input_139 = __VERIFIER_nondet_uchar(); + SORT_3 input_141 = __VERIFIER_nondet_uchar(); + SORT_3 input_143 = __VERIFIER_nondet_uchar(); + SORT_3 input_145 = __VERIFIER_nondet_uchar(); + SORT_4 input_147 = __VERIFIER_nondet_ushort(); + SORT_4 input_149 = __VERIFIER_nondet_ushort(); + SORT_4 input_151 = __VERIFIER_nondet_ushort(); + SORT_4 input_153 = __VERIFIER_nondet_ushort(); + SORT_4 input_155 = __VERIFIER_nondet_ushort(); + SORT_4 input_157 = __VERIFIER_nondet_ushort(); + SORT_4 input_159 = __VERIFIER_nondet_ushort(); + SORT_3 input_161 = __VERIFIER_nondet_uchar(); + SORT_3 input_163 = __VERIFIER_nondet_uchar(); + SORT_4 input_165 = __VERIFIER_nondet_ushort(); + SORT_4 input_167 = __VERIFIER_nondet_ushort(); + SORT_4 input_169 = __VERIFIER_nondet_ushort(); + SORT_1 input_171 = __VERIFIER_nondet_uchar(); + input_171 = input_171 & mask_SORT_1; + SORT_1 input_173 = __VERIFIER_nondet_uchar(); + input_173 = input_173 & mask_SORT_1; + SORT_1 input_175 = __VERIFIER_nondet_uchar(); + input_175 = input_175 & mask_SORT_1; + SORT_1 input_177 = __VERIFIER_nondet_uchar(); + input_177 = input_177 & mask_SORT_1; + SORT_1 input_179 = __VERIFIER_nondet_uchar(); + input_179 = input_179 & mask_SORT_1; + SORT_1 input_181 = __VERIFIER_nondet_uchar(); + input_181 = input_181 & mask_SORT_1; + SORT_1 input_183 = __VERIFIER_nondet_uchar(); + input_183 = input_183 & mask_SORT_1; + SORT_1 input_185 = __VERIFIER_nondet_uchar(); + input_185 = input_185 & mask_SORT_1; + SORT_1 input_187 = __VERIFIER_nondet_uchar(); + input_187 = input_187 & mask_SORT_1; + SORT_1 input_189 = __VERIFIER_nondet_uchar(); + input_189 = input_189 & mask_SORT_1; + SORT_1 input_191 = __VERIFIER_nondet_uchar(); + input_191 = input_191 & mask_SORT_1; + SORT_1 input_193 = __VERIFIER_nondet_uchar(); + input_193 = input_193 & mask_SORT_1; + SORT_1 input_195 = __VERIFIER_nondet_uchar(); + input_195 = input_195 & mask_SORT_1; + SORT_1 input_197 = __VERIFIER_nondet_uchar(); + input_197 = input_197 & mask_SORT_1; + SORT_1 input_199 = __VERIFIER_nondet_uchar(); + input_199 = input_199 & mask_SORT_1; + SORT_1 input_203 = __VERIFIER_nondet_uchar(); + input_203 = input_203 & mask_SORT_1; + SORT_1 input_212 = __VERIFIER_nondet_uchar(); + input_212 = input_212 & mask_SORT_1; + SORT_1 input_223 = __VERIFIER_nondet_uchar(); + input_223 = input_223 & mask_SORT_1; + SORT_1 input_232 = __VERIFIER_nondet_uchar(); + input_232 = input_232 & mask_SORT_1; + SORT_1 input_242 = __VERIFIER_nondet_uchar(); + input_242 = input_242 & mask_SORT_1; + SORT_1 input_266 = __VERIFIER_nondet_uchar(); + input_266 = input_266 & mask_SORT_1; + SORT_1 input_282 = __VERIFIER_nondet_uchar(); + input_282 = input_282 & mask_SORT_1; + SORT_1 input_292 = __VERIFIER_nondet_uchar(); + input_292 = input_292 & mask_SORT_1; + SORT_1 input_309 = __VERIFIER_nondet_uchar(); + input_309 = input_309 & mask_SORT_1; + SORT_1 input_325 = __VERIFIER_nondet_uchar(); + input_325 = input_325 & mask_SORT_1; + SORT_1 input_335 = __VERIFIER_nondet_uchar(); + input_335 = input_335 & mask_SORT_1; + SORT_1 input_343 = __VERIFIER_nondet_uchar(); + input_343 = input_343 & mask_SORT_1; + SORT_1 input_394 = __VERIFIER_nondet_uchar(); + input_394 = input_394 & mask_SORT_1; + SORT_1 input_409 = __VERIFIER_nondet_uchar(); + input_409 = input_409 & mask_SORT_1; + SORT_1 input_419 = __VERIFIER_nondet_uchar(); + input_419 = input_419 & mask_SORT_1; + SORT_1 input_428 = __VERIFIER_nondet_uchar(); + input_428 = input_428 & mask_SORT_1; + SORT_1 input_441 = __VERIFIER_nondet_uchar(); + input_441 = input_441 & mask_SORT_1; + SORT_1 input_455 = __VERIFIER_nondet_uchar(); + input_455 = input_455 & mask_SORT_1; + SORT_1 input_470 = __VERIFIER_nondet_uchar(); + input_470 = input_470 & mask_SORT_1; + SORT_1 input_475 = __VERIFIER_nondet_uchar(); + input_475 = input_475 & mask_SORT_1; + SORT_1 input_488 = __VERIFIER_nondet_uchar(); + SORT_1 input_513 = __VERIFIER_nondet_uchar(); + input_513 = input_513 & mask_SORT_1; + SORT_1 input_533 = __VERIFIER_nondet_uchar(); + input_533 = input_533 & mask_SORT_1; + SORT_1 input_554 = __VERIFIER_nondet_uchar(); + input_554 = input_554 & mask_SORT_1; + SORT_1 input_569 = __VERIFIER_nondet_uchar(); + input_569 = input_569 & mask_SORT_1; + SORT_1 input_583 = __VERIFIER_nondet_uchar(); + input_583 = input_583 & mask_SORT_1; + SORT_1 input_594 = __VERIFIER_nondet_uchar(); + input_594 = input_594 & mask_SORT_1; + SORT_1 input_602 = __VERIFIER_nondet_uchar(); + input_602 = input_602 & mask_SORT_1; + SORT_1 input_617 = __VERIFIER_nondet_uchar(); + input_617 = input_617 & mask_SORT_1; + SORT_1 input_622 = __VERIFIER_nondet_uchar(); + input_622 = input_622 & mask_SORT_1; + SORT_1 input_634 = __VERIFIER_nondet_uchar(); + SORT_1 input_674 = __VERIFIER_nondet_uchar(); + input_674 = input_674 & mask_SORT_1; + SORT_1 input_695 = __VERIFIER_nondet_uchar(); + input_695 = input_695 & mask_SORT_1; + SORT_1 input_716 = __VERIFIER_nondet_uchar(); + input_716 = input_716 & mask_SORT_1; + SORT_1 input_731 = __VERIFIER_nondet_uchar(); + input_731 = input_731 & mask_SORT_1; + SORT_1 input_745 = __VERIFIER_nondet_uchar(); + input_745 = input_745 & mask_SORT_1; + // Creating intermediate signals ... + SORT_1 var_756_arg_0 = input_203; + SORT_1 var_756_arg_1 = input_212; + SORT_1 var_756 = var_756_arg_0 | var_756_arg_1; + SORT_1 var_757_arg_0 = input_223; + SORT_1 var_757_arg_1 = var_756; + SORT_1 var_757 = var_757_arg_0 | var_757_arg_1; + SORT_1 var_758_arg_0 = input_232; + SORT_1 var_758_arg_1 = var_757; + SORT_1 var_758 = var_758_arg_0 | var_758_arg_1; + SORT_1 var_759_arg_0 = input_242; + SORT_1 var_759_arg_1 = var_758; + SORT_1 var_759 = var_759_arg_0 | var_759_arg_1; + SORT_1 var_760_arg_0 = input_266; + SORT_1 var_760_arg_1 = var_759; + SORT_1 var_760 = var_760_arg_0 | var_760_arg_1; + SORT_1 var_761_arg_0 = input_282; + SORT_1 var_761_arg_1 = var_760; + SORT_1 var_761 = var_761_arg_0 | var_761_arg_1; + SORT_1 var_762_arg_0 = input_292; + SORT_1 var_762_arg_1 = var_761; + SORT_1 var_762 = var_762_arg_0 | var_762_arg_1; + SORT_1 var_763_arg_0 = input_309; + SORT_1 var_763_arg_1 = var_762; + SORT_1 var_763 = var_763_arg_0 | var_763_arg_1; + SORT_1 var_764_arg_0 = input_325; + SORT_1 var_764_arg_1 = var_763; + SORT_1 var_764 = var_764_arg_0 | var_764_arg_1; + SORT_1 var_765_arg_0 = input_335; + SORT_1 var_765_arg_1 = var_764; + SORT_1 var_765 = var_765_arg_0 | var_765_arg_1; + SORT_1 var_766_arg_0 = input_343; + SORT_1 var_766_arg_1 = var_765; + SORT_1 var_766 = var_766_arg_0 | var_766_arg_1; + SORT_1 var_767_arg_0 = input_394; + SORT_1 var_767_arg_1 = var_766; + SORT_1 var_767 = var_767_arg_0 | var_767_arg_1; + SORT_1 var_768_arg_0 = input_409; + SORT_1 var_768_arg_1 = var_767; + SORT_1 var_768 = var_768_arg_0 | var_768_arg_1; + SORT_1 var_769_arg_0 = input_419; + SORT_1 var_769_arg_1 = var_768; + SORT_1 var_769 = var_769_arg_0 | var_769_arg_1; + SORT_1 var_770_arg_0 = input_428; + SORT_1 var_770_arg_1 = var_769; + SORT_1 var_770 = var_770_arg_0 | var_770_arg_1; + SORT_1 var_771_arg_0 = input_441; + SORT_1 var_771_arg_1 = var_770; + SORT_1 var_771 = var_771_arg_0 | var_771_arg_1; + SORT_1 var_772_arg_0 = input_455; + SORT_1 var_772_arg_1 = var_771; + SORT_1 var_772 = var_772_arg_0 | var_772_arg_1; + SORT_1 var_773_arg_0 = input_470; + SORT_1 var_773_arg_1 = var_772; + SORT_1 var_773 = var_773_arg_0 | var_773_arg_1; + SORT_1 var_774_arg_0 = input_475; + SORT_1 var_774_arg_1 = var_773; + SORT_1 var_774 = var_774_arg_0 | var_774_arg_1; + SORT_1 var_775_arg_0 = input_488; + SORT_1 var_775_arg_1 = var_774; + SORT_1 var_775 = var_775_arg_0 | var_775_arg_1; + SORT_1 var_776_arg_0 = input_513; + SORT_1 var_776_arg_1 = var_775; + SORT_1 var_776 = var_776_arg_0 | var_776_arg_1; + SORT_1 var_777_arg_0 = input_533; + SORT_1 var_777_arg_1 = var_776; + SORT_1 var_777 = var_777_arg_0 | var_777_arg_1; + SORT_1 var_778_arg_0 = input_554; + SORT_1 var_778_arg_1 = var_777; + SORT_1 var_778 = var_778_arg_0 | var_778_arg_1; + SORT_1 var_779_arg_0 = input_569; + SORT_1 var_779_arg_1 = var_778; + SORT_1 var_779 = var_779_arg_0 | var_779_arg_1; + SORT_1 var_780_arg_0 = input_583; + SORT_1 var_780_arg_1 = var_779; + SORT_1 var_780 = var_780_arg_0 | var_780_arg_1; + SORT_1 var_781_arg_0 = input_594; + SORT_1 var_781_arg_1 = var_780; + SORT_1 var_781 = var_781_arg_0 | var_781_arg_1; + SORT_1 var_782_arg_0 = input_602; + SORT_1 var_782_arg_1 = var_781; + SORT_1 var_782 = var_782_arg_0 | var_782_arg_1; + SORT_1 var_783_arg_0 = input_617; + SORT_1 var_783_arg_1 = var_782; + SORT_1 var_783 = var_783_arg_0 | var_783_arg_1; + SORT_1 var_784_arg_0 = input_622; + SORT_1 var_784_arg_1 = var_783; + SORT_1 var_784 = var_784_arg_0 | var_784_arg_1; + SORT_1 var_785_arg_0 = input_634; + SORT_1 var_785_arg_1 = var_784; + SORT_1 var_785 = var_785_arg_0 | var_785_arg_1; + SORT_1 var_786_arg_0 = input_674; + SORT_1 var_786_arg_1 = var_785; + SORT_1 var_786 = var_786_arg_0 | var_786_arg_1; + SORT_1 var_787_arg_0 = input_695; + SORT_1 var_787_arg_1 = var_786; + SORT_1 var_787 = var_787_arg_0 | var_787_arg_1; + SORT_1 var_788_arg_0 = input_716; + SORT_1 var_788_arg_1 = var_787; + SORT_1 var_788 = var_788_arg_0 | var_788_arg_1; + SORT_1 var_789_arg_0 = input_731; + SORT_1 var_789_arg_1 = var_788; + SORT_1 var_789 = var_789_arg_0 | var_789_arg_1; + SORT_1 var_790_arg_0 = input_745; + SORT_1 var_790_arg_1 = var_789; + SORT_1 var_790 = var_790_arg_0 | var_790_arg_1; + SORT_1 var_675_arg_0 = input_199; + SORT_1 var_675_arg_1 = input_634; + SORT_1 var_675 = var_675_arg_0 | var_675_arg_1; + SORT_1 var_717_arg_0 = var_675; + SORT_1 var_717_arg_1 = ~input_695; + var_717_arg_1 = var_717_arg_1 & mask_SORT_1; + SORT_1 var_717 = var_717_arg_0 & var_717_arg_1; + SORT_1 var_732_arg_0 = var_717; + SORT_1 var_732_arg_1 = ~input_716; + var_732_arg_1 = var_732_arg_1 & mask_SORT_1; + SORT_1 var_732 = var_732_arg_0 & var_732_arg_1; + SORT_1 var_886_arg_0 = var_732; + SORT_1 var_886_arg_1 = ~input_731; + var_886_arg_1 = var_886_arg_1 & mask_SORT_1; + SORT_1 var_886 = var_886_arg_0 & var_886_arg_1; + var_886 = var_886 & mask_SORT_1; + SORT_1 var_623_arg_0 = input_197; + SORT_1 var_623_arg_1 = input_594; + SORT_1 var_623 = var_623_arg_0 | var_623_arg_1; + SORT_1 var_624_arg_0 = var_623; + SORT_1 var_624_arg_1 = input_602; + SORT_1 var_624 = var_624_arg_0 | var_624_arg_1; + SORT_1 var_625_arg_0 = var_624; + SORT_1 var_625_arg_1 = input_617; + SORT_1 var_625 = var_625_arg_0 | var_625_arg_1; + SORT_1 var_635_arg_0 = var_625; + SORT_1 var_635_arg_1 = ~input_622; + var_635_arg_1 = var_635_arg_1 & mask_SORT_1; + SORT_1 var_635 = var_635_arg_0 & var_635_arg_1; + SORT_1 var_746_arg_0 = var_635; + SORT_1 var_746_arg_1 = ~input_634; + var_746_arg_1 = var_746_arg_1 & mask_SORT_1; + SORT_1 var_746 = var_746_arg_0 & var_746_arg_1; + SORT_1 var_884_arg_0 = var_746; + SORT_1 var_884_arg_1 = ~input_745; + var_884_arg_1 = var_884_arg_1 & mask_SORT_1; + SORT_1 var_884 = var_884_arg_0 & var_884_arg_1; + var_884 = var_884 & mask_SORT_1; + SORT_1 var_824_arg_0 = input_195; + SORT_1 var_824_arg_1 = input_197; + SORT_1 var_824 = var_824_arg_0 | var_824_arg_1; + SORT_1 var_828_arg_0 = input_199; + SORT_1 var_828_arg_1 = var_824; + SORT_1 var_828 = var_828_arg_0 | var_828_arg_1; + SORT_1 var_825_arg_0 = input_199; + SORT_1 var_825_arg_1 = var_824; + SORT_1 var_825 = var_825_arg_0 & var_825_arg_1; + SORT_1 var_823_arg_0 = input_195; + SORT_1 var_823_arg_1 = input_197; + SORT_1 var_823 = var_823_arg_0 & var_823_arg_1; + SORT_1 var_826_arg_0 = var_823; + SORT_1 var_826_arg_1 = var_825; + SORT_1 var_826 = var_826_arg_0 | var_826_arg_1; + SORT_1 var_603_arg_0 = input_195; + SORT_1 var_603_arg_1 = ~input_594; + var_603_arg_1 = var_603_arg_1 & mask_SORT_1; + SORT_1 var_603 = var_603_arg_0 & var_603_arg_1; + SORT_1 var_618_arg_0 = var_603; + SORT_1 var_618_arg_1 = ~input_602; + var_618_arg_1 = var_618_arg_1 & mask_SORT_1; + SORT_1 var_618 = var_618_arg_0 & var_618_arg_1; + SORT_1 var_878_arg_0 = var_618; + SORT_1 var_878_arg_1 = ~input_617; + var_878_arg_1 = var_878_arg_1 & mask_SORT_1; + SORT_1 var_878 = var_878_arg_0 & var_878_arg_1; + SORT_1 var_879_arg_0 = var_878; + SORT_1 var_879_arg_1 = input_622; + SORT_1 var_879 = var_879_arg_0 | var_879_arg_1; + SORT_1 var_880_arg_0 = var_879; + SORT_1 var_880_arg_1 = input_695; + SORT_1 var_880 = var_880_arg_0 | var_880_arg_1; + SORT_1 var_881_arg_0 = var_880; + SORT_1 var_881_arg_1 = input_716; + SORT_1 var_881 = var_881_arg_0 | var_881_arg_1; + SORT_1 var_882_arg_0 = var_881; + SORT_1 var_882_arg_1 = input_731; + SORT_1 var_882 = var_882_arg_0 | var_882_arg_1; + SORT_1 var_883_arg_0 = var_882; + SORT_1 var_883_arg_1 = input_745; + SORT_1 var_883 = var_883_arg_0 | var_883_arg_1; + var_883 = var_883 & mask_SORT_1; + SORT_1 var_887_arg_0 = var_883; + SORT_1 var_887_arg_1 = var_884; + SORT_1 var_887 = var_887_arg_0 | var_887_arg_1; + SORT_1 var_891_arg_0 = var_886; + SORT_1 var_891_arg_1 = var_887; + SORT_1 var_891 = var_891_arg_0 | var_891_arg_1; + SORT_1 var_888_arg_0 = var_886; + SORT_1 var_888_arg_1 = var_887; + SORT_1 var_888 = var_888_arg_0 & var_888_arg_1; + SORT_1 var_885_arg_0 = var_883; + SORT_1 var_885_arg_1 = var_884; + SORT_1 var_885 = var_885_arg_0 & var_885_arg_1; + SORT_1 var_889_arg_0 = var_885; + SORT_1 var_889_arg_1 = var_888; + SORT_1 var_889 = var_889_arg_0 | var_889_arg_1; + SORT_1 var_514_arg_0 = input_193; + SORT_1 var_514_arg_1 = input_488; + SORT_1 var_514 = var_514_arg_0 | var_514_arg_1; + SORT_1 var_555_arg_0 = var_514; + SORT_1 var_555_arg_1 = ~input_533; + var_555_arg_1 = var_555_arg_1 & mask_SORT_1; + SORT_1 var_555 = var_555_arg_0 & var_555_arg_1; + SORT_1 var_570_arg_0 = var_555; + SORT_1 var_570_arg_1 = ~input_554; + var_570_arg_1 = var_570_arg_1 & mask_SORT_1; + SORT_1 var_570 = var_570_arg_0 & var_570_arg_1; + SORT_1 var_871_arg_0 = var_570; + SORT_1 var_871_arg_1 = ~input_569; + var_871_arg_1 = var_871_arg_1 & mask_SORT_1; + SORT_1 var_871 = var_871_arg_0 & var_871_arg_1; + var_871 = var_871 & mask_SORT_1; + SORT_1 var_476_arg_0 = input_191; + SORT_1 var_476_arg_1 = input_441; + SORT_1 var_476 = var_476_arg_0 | var_476_arg_1; + SORT_1 var_477_arg_0 = var_476; + SORT_1 var_477_arg_1 = input_455; + SORT_1 var_477 = var_477_arg_0 | var_477_arg_1; + SORT_1 var_478_arg_0 = var_477; + SORT_1 var_478_arg_1 = input_470; + SORT_1 var_478 = var_478_arg_0 | var_478_arg_1; + SORT_1 var_489_arg_0 = var_478; + SORT_1 var_489_arg_1 = ~input_475; + var_489_arg_1 = var_489_arg_1 & mask_SORT_1; + SORT_1 var_489 = var_489_arg_0 & var_489_arg_1; + SORT_1 var_584_arg_0 = var_489; + SORT_1 var_584_arg_1 = ~input_488; + var_584_arg_1 = var_584_arg_1 & mask_SORT_1; + SORT_1 var_584 = var_584_arg_0 & var_584_arg_1; + SORT_1 var_869_arg_0 = var_584; + SORT_1 var_869_arg_1 = ~input_583; + var_869_arg_1 = var_869_arg_1 & mask_SORT_1; + SORT_1 var_869 = var_869_arg_0 & var_869_arg_1; + var_869 = var_869 & mask_SORT_1; + SORT_1 var_817_arg_0 = input_189; + SORT_1 var_817_arg_1 = input_191; + SORT_1 var_817 = var_817_arg_0 | var_817_arg_1; + SORT_1 var_821_arg_0 = input_193; + SORT_1 var_821_arg_1 = var_817; + SORT_1 var_821 = var_821_arg_0 | var_821_arg_1; + SORT_1 var_818_arg_0 = input_193; + SORT_1 var_818_arg_1 = var_817; + SORT_1 var_818 = var_818_arg_0 & var_818_arg_1; + SORT_1 var_816_arg_0 = input_189; + SORT_1 var_816_arg_1 = input_191; + SORT_1 var_816 = var_816_arg_0 & var_816_arg_1; + SORT_1 var_819_arg_0 = var_816; + SORT_1 var_819_arg_1 = var_818; + SORT_1 var_819 = var_819_arg_0 | var_819_arg_1; + SORT_1 var_456_arg_0 = input_189; + SORT_1 var_456_arg_1 = ~input_441; + var_456_arg_1 = var_456_arg_1 & mask_SORT_1; + SORT_1 var_456 = var_456_arg_0 & var_456_arg_1; + SORT_1 var_471_arg_0 = var_456; + SORT_1 var_471_arg_1 = ~input_455; + var_471_arg_1 = var_471_arg_1 & mask_SORT_1; + SORT_1 var_471 = var_471_arg_0 & var_471_arg_1; + SORT_1 var_863_arg_0 = var_471; + SORT_1 var_863_arg_1 = ~input_470; + var_863_arg_1 = var_863_arg_1 & mask_SORT_1; + SORT_1 var_863 = var_863_arg_0 & var_863_arg_1; + SORT_1 var_864_arg_0 = var_863; + SORT_1 var_864_arg_1 = input_475; + SORT_1 var_864 = var_864_arg_0 | var_864_arg_1; + SORT_1 var_865_arg_0 = var_864; + SORT_1 var_865_arg_1 = input_533; + SORT_1 var_865 = var_865_arg_0 | var_865_arg_1; + SORT_1 var_866_arg_0 = var_865; + SORT_1 var_866_arg_1 = input_554; + SORT_1 var_866 = var_866_arg_0 | var_866_arg_1; + SORT_1 var_867_arg_0 = var_866; + SORT_1 var_867_arg_1 = input_569; + SORT_1 var_867 = var_867_arg_0 | var_867_arg_1; + SORT_1 var_868_arg_0 = var_867; + SORT_1 var_868_arg_1 = input_583; + SORT_1 var_868 = var_868_arg_0 | var_868_arg_1; + var_868 = var_868 & mask_SORT_1; + SORT_1 var_872_arg_0 = var_868; + SORT_1 var_872_arg_1 = var_869; + SORT_1 var_872 = var_872_arg_0 | var_872_arg_1; + SORT_1 var_876_arg_0 = var_871; + SORT_1 var_876_arg_1 = var_872; + SORT_1 var_876 = var_876_arg_0 | var_876_arg_1; + SORT_1 var_873_arg_0 = var_871; + SORT_1 var_873_arg_1 = var_872; + SORT_1 var_873 = var_873_arg_0 & var_873_arg_1; + SORT_1 var_870_arg_0 = var_868; + SORT_1 var_870_arg_1 = var_869; + SORT_1 var_870 = var_870_arg_0 & var_870_arg_1; + SORT_1 var_874_arg_0 = var_870; + SORT_1 var_874_arg_1 = var_873; + SORT_1 var_874 = var_874_arg_0 | var_874_arg_1; + SORT_1 var_420_arg_0 = input_185; + SORT_1 var_420_arg_1 = input_409; + SORT_1 var_420 = var_420_arg_0 | var_420_arg_1; + SORT_1 var_854_arg_0 = var_420; + SORT_1 var_854_arg_1 = ~input_428; + var_854_arg_1 = var_854_arg_1 & mask_SORT_1; + SORT_1 var_854 = var_854_arg_0 & var_854_arg_1; + var_854 = var_854 & mask_SORT_1; + SORT_1 var_344_arg_0 = input_183; + SORT_1 var_344_arg_1 = input_335; + SORT_1 var_344 = var_344_arg_0 | var_344_arg_1; + SORT_1 var_850_arg_0 = var_344; + SORT_1 var_850_arg_1 = ~input_409; + var_850_arg_1 = var_850_arg_1 & mask_SORT_1; + SORT_1 var_850 = var_850_arg_0 & var_850_arg_1; + var_850 = var_850 & mask_SORT_1; + SORT_1 var_336_arg_0 = input_181; + SORT_1 var_336_arg_1 = input_325; + SORT_1 var_336 = var_336_arg_0 | var_336_arg_1; + SORT_1 var_846_arg_0 = var_336; + SORT_1 var_846_arg_1 = ~input_335; + var_846_arg_1 = var_846_arg_1 & mask_SORT_1; + SORT_1 var_846 = var_846_arg_0 & var_846_arg_1; + var_846 = var_846 & mask_SORT_1; + SORT_1 var_293_arg_0 = input_177; + SORT_1 var_293_arg_1 = input_282; + SORT_1 var_293 = var_293_arg_0 | var_293_arg_1; + SORT_1 var_839_arg_0 = var_293; + SORT_1 var_839_arg_1 = ~input_325; + var_839_arg_1 = var_839_arg_1 & mask_SORT_1; + SORT_1 var_839 = var_839_arg_0 & var_839_arg_1; + var_839 = var_839 & mask_SORT_1; + SORT_1 var_243_arg_0 = input_175; + SORT_1 var_243_arg_1 = input_232; + SORT_1 var_243 = var_243_arg_0 | var_243_arg_1; + SORT_1 var_835_arg_0 = var_243; + SORT_1 var_835_arg_1 = ~input_282; + var_835_arg_1 = var_835_arg_1 & mask_SORT_1; + SORT_1 var_835 = var_835_arg_0 & var_835_arg_1; + var_835 = var_835 & mask_SORT_1; + SORT_1 var_224_arg_0 = input_173; + SORT_1 var_224_arg_1 = input_212; + SORT_1 var_224 = var_224_arg_0 | var_224_arg_1; + SORT_1 var_832_arg_0 = var_224; + SORT_1 var_832_arg_1 = ~input_232; + var_832_arg_1 = var_832_arg_1 & mask_SORT_1; + SORT_1 var_832 = var_832_arg_0 & var_832_arg_1; + SORT_1 var_833_arg_0 = var_832; + SORT_1 var_833_arg_1 = input_428; + SORT_1 var_833 = var_833_arg_0 | var_833_arg_1; + var_833 = var_833 & mask_SORT_1; + SORT_1 var_831_arg_0 = input_171; + SORT_1 var_831_arg_1 = ~input_212; + var_831_arg_1 = var_831_arg_1 & mask_SORT_1; + SORT_1 var_831 = var_831_arg_0 & var_831_arg_1; + var_831 = var_831 & mask_SORT_1; + SORT_1 var_836_arg_0 = var_831; + SORT_1 var_836_arg_1 = var_833; + SORT_1 var_836 = var_836_arg_0 | var_836_arg_1; + SORT_1 var_840_arg_0 = var_835; + SORT_1 var_840_arg_1 = var_836; + SORT_1 var_840 = var_840_arg_0 | var_840_arg_1; + SORT_1 var_843_arg_0 = var_839; + SORT_1 var_843_arg_1 = var_840; + SORT_1 var_843 = var_843_arg_0 | var_843_arg_1; + SORT_1 var_847_arg_0 = input_179; + SORT_1 var_847_arg_1 = var_843; + SORT_1 var_847 = var_847_arg_0 | var_847_arg_1; + SORT_1 var_851_arg_0 = var_846; + SORT_1 var_851_arg_1 = var_847; + SORT_1 var_851 = var_851_arg_0 | var_851_arg_1; + SORT_1 var_855_arg_0 = var_850; + SORT_1 var_855_arg_1 = var_851; + SORT_1 var_855 = var_855_arg_0 | var_855_arg_1; + SORT_1 var_858_arg_0 = var_854; + SORT_1 var_858_arg_1 = var_855; + SORT_1 var_858 = var_858_arg_0 | var_858_arg_1; + SORT_1 var_861_arg_0 = input_187; + SORT_1 var_861_arg_1 = var_858; + SORT_1 var_861 = var_861_arg_0 | var_861_arg_1; + SORT_1 var_859_arg_0 = input_187; + SORT_1 var_859_arg_1 = var_858; + SORT_1 var_859 = var_859_arg_0 & var_859_arg_1; + SORT_1 var_856_arg_0 = var_854; + SORT_1 var_856_arg_1 = var_855; + SORT_1 var_856 = var_856_arg_0 & var_856_arg_1; + SORT_1 var_852_arg_0 = var_850; + SORT_1 var_852_arg_1 = var_851; + SORT_1 var_852 = var_852_arg_0 & var_852_arg_1; + SORT_1 var_848_arg_0 = var_846; + SORT_1 var_848_arg_1 = var_847; + SORT_1 var_848 = var_848_arg_0 & var_848_arg_1; + SORT_1 var_844_arg_0 = input_179; + SORT_1 var_844_arg_1 = var_843; + SORT_1 var_844 = var_844_arg_0 & var_844_arg_1; + SORT_1 var_841_arg_0 = var_839; + SORT_1 var_841_arg_1 = var_840; + SORT_1 var_841 = var_841_arg_0 & var_841_arg_1; + SORT_1 var_837_arg_0 = var_835; + SORT_1 var_837_arg_1 = var_836; + SORT_1 var_837 = var_837_arg_0 & var_837_arg_1; + SORT_1 var_834_arg_0 = var_831; + SORT_1 var_834_arg_1 = var_833; + SORT_1 var_834 = var_834_arg_0 & var_834_arg_1; + SORT_1 var_838_arg_0 = var_834; + SORT_1 var_838_arg_1 = var_837; + SORT_1 var_838 = var_838_arg_0 | var_838_arg_1; + SORT_1 var_842_arg_0 = var_838; + SORT_1 var_842_arg_1 = var_841; + SORT_1 var_842 = var_842_arg_0 | var_842_arg_1; + SORT_1 var_845_arg_0 = var_842; + SORT_1 var_845_arg_1 = var_844; + SORT_1 var_845 = var_845_arg_0 | var_845_arg_1; + SORT_1 var_849_arg_0 = var_845; + SORT_1 var_849_arg_1 = var_848; + SORT_1 var_849 = var_849_arg_0 | var_849_arg_1; + SORT_1 var_853_arg_0 = var_849; + SORT_1 var_853_arg_1 = var_852; + SORT_1 var_853 = var_853_arg_0 | var_853_arg_1; + SORT_1 var_857_arg_0 = var_853; + SORT_1 var_857_arg_1 = var_856; + SORT_1 var_857 = var_857_arg_0 | var_857_arg_1; + SORT_1 var_860_arg_0 = var_857; + SORT_1 var_860_arg_1 = var_859; + SORT_1 var_860 = var_860_arg_0 | var_860_arg_1; + SORT_1 var_862_arg_0 = ~var_860; + var_862_arg_0 = var_862_arg_0 & mask_SORT_1; + SORT_1 var_862_arg_1 = var_861; + SORT_1 var_862 = var_862_arg_0 & var_862_arg_1; + SORT_1 var_875_arg_0 = var_862; + SORT_1 var_875_arg_1 = ~var_874; + var_875_arg_1 = var_875_arg_1 & mask_SORT_1; + SORT_1 var_875 = var_875_arg_0 & var_875_arg_1; + SORT_1 var_877_arg_0 = var_875; + SORT_1 var_877_arg_1 = var_876; + SORT_1 var_877 = var_877_arg_0 & var_877_arg_1; + SORT_1 var_890_arg_0 = var_877; + SORT_1 var_890_arg_1 = ~var_889; + var_890_arg_1 = var_890_arg_1 & mask_SORT_1; + SORT_1 var_890 = var_890_arg_0 & var_890_arg_1; + SORT_1 var_892_arg_0 = var_890; + SORT_1 var_892_arg_1 = var_891; + SORT_1 var_892 = var_892_arg_0 & var_892_arg_1; + SORT_1 var_793_arg_0 = input_171; + SORT_1 var_793_arg_1 = input_173; + SORT_1 var_793 = var_793_arg_0 | var_793_arg_1; + SORT_1 var_796_arg_0 = input_175; + SORT_1 var_796_arg_1 = var_793; + SORT_1 var_796 = var_796_arg_0 | var_796_arg_1; + SORT_1 var_799_arg_0 = input_177; + SORT_1 var_799_arg_1 = var_796; + SORT_1 var_799 = var_799_arg_0 | var_799_arg_1; + SORT_1 var_802_arg_0 = input_179; + SORT_1 var_802_arg_1 = var_799; + SORT_1 var_802 = var_802_arg_0 | var_802_arg_1; + SORT_1 var_805_arg_0 = input_181; + SORT_1 var_805_arg_1 = var_802; + SORT_1 var_805 = var_805_arg_0 | var_805_arg_1; + SORT_1 var_808_arg_0 = input_183; + SORT_1 var_808_arg_1 = var_805; + SORT_1 var_808 = var_808_arg_0 | var_808_arg_1; + SORT_1 var_811_arg_0 = input_185; + SORT_1 var_811_arg_1 = var_808; + SORT_1 var_811 = var_811_arg_0 | var_811_arg_1; + SORT_1 var_814_arg_0 = input_187; + SORT_1 var_814_arg_1 = var_811; + SORT_1 var_814 = var_814_arg_0 | var_814_arg_1; + SORT_1 var_812_arg_0 = input_187; + SORT_1 var_812_arg_1 = var_811; + SORT_1 var_812 = var_812_arg_0 & var_812_arg_1; + SORT_1 var_809_arg_0 = input_185; + SORT_1 var_809_arg_1 = var_808; + SORT_1 var_809 = var_809_arg_0 & var_809_arg_1; + SORT_1 var_806_arg_0 = input_183; + SORT_1 var_806_arg_1 = var_805; + SORT_1 var_806 = var_806_arg_0 & var_806_arg_1; + SORT_1 var_803_arg_0 = input_181; + SORT_1 var_803_arg_1 = var_802; + SORT_1 var_803 = var_803_arg_0 & var_803_arg_1; + SORT_1 var_800_arg_0 = input_179; + SORT_1 var_800_arg_1 = var_799; + SORT_1 var_800 = var_800_arg_0 & var_800_arg_1; + SORT_1 var_797_arg_0 = input_177; + SORT_1 var_797_arg_1 = var_796; + SORT_1 var_797 = var_797_arg_0 & var_797_arg_1; + SORT_1 var_794_arg_0 = input_175; + SORT_1 var_794_arg_1 = var_793; + SORT_1 var_794 = var_794_arg_0 & var_794_arg_1; + SORT_1 var_792_arg_0 = input_171; + SORT_1 var_792_arg_1 = input_173; + SORT_1 var_792 = var_792_arg_0 & var_792_arg_1; + SORT_1 var_795_arg_0 = var_792; + SORT_1 var_795_arg_1 = var_794; + SORT_1 var_795 = var_795_arg_0 | var_795_arg_1; + SORT_1 var_798_arg_0 = var_795; + SORT_1 var_798_arg_1 = var_797; + SORT_1 var_798 = var_798_arg_0 | var_798_arg_1; + SORT_1 var_801_arg_0 = var_798; + SORT_1 var_801_arg_1 = var_800; + SORT_1 var_801 = var_801_arg_0 | var_801_arg_1; + SORT_1 var_804_arg_0 = var_801; + SORT_1 var_804_arg_1 = var_803; + SORT_1 var_804 = var_804_arg_0 | var_804_arg_1; + SORT_1 var_807_arg_0 = var_804; + SORT_1 var_807_arg_1 = var_806; + SORT_1 var_807 = var_807_arg_0 | var_807_arg_1; + SORT_1 var_810_arg_0 = var_807; + SORT_1 var_810_arg_1 = var_809; + SORT_1 var_810 = var_810_arg_0 | var_810_arg_1; + SORT_1 var_813_arg_0 = var_810; + SORT_1 var_813_arg_1 = var_812; + SORT_1 var_813 = var_813_arg_0 | var_813_arg_1; + SORT_1 var_815_arg_0 = ~var_813; + var_815_arg_0 = var_815_arg_0 & mask_SORT_1; + SORT_1 var_815_arg_1 = var_814; + SORT_1 var_815 = var_815_arg_0 & var_815_arg_1; + SORT_1 var_820_arg_0 = var_815; + SORT_1 var_820_arg_1 = ~var_819; + var_820_arg_1 = var_820_arg_1 & mask_SORT_1; + SORT_1 var_820 = var_820_arg_0 & var_820_arg_1; + SORT_1 var_822_arg_0 = var_820; + SORT_1 var_822_arg_1 = var_821; + SORT_1 var_822 = var_822_arg_0 & var_822_arg_1; + SORT_1 var_827_arg_0 = var_822; + SORT_1 var_827_arg_1 = ~var_826; + var_827_arg_1 = var_827_arg_1 & mask_SORT_1; + SORT_1 var_827 = var_827_arg_0 & var_827_arg_1; + SORT_1 var_829_arg_0 = var_827; + SORT_1 var_829_arg_1 = var_828; + SORT_1 var_829 = var_829_arg_0 & var_829_arg_1; + SORT_4 var_676_arg_0 = input_169; + SORT_4 var_676_arg_1 = var_205; + SORT_6 var_676 = ((SORT_6)var_676_arg_0 << 16) | var_676_arg_1; + SORT_6 var_677_arg_0 = var_676; + var_677_arg_0 = (var_677_arg_0 & msb_SORT_6) ? (var_677_arg_0 | ~mask_SORT_6) : (var_677_arg_0 & mask_SORT_6); + SORT_6 var_677_arg_1 = var_207; + SORT_6 var_677 = (int)var_677_arg_0 >> var_677_arg_1; + var_677 = (var_677_arg_0 & msb_SORT_6) ? (var_677 | ~(mask_SORT_6 >> var_677_arg_1)) : var_677; + SORT_6 var_696_arg_0 = var_213; + SORT_6 var_696_arg_1 = var_677; + SORT_6 var_696 = var_696_arg_0 + var_696_arg_1; + SORT_6 var_697_arg_0 = var_696; + SORT_4 var_697 = var_697_arg_0 >> 0; + SORT_1 var_698_arg_0 = input_674; + SORT_4 var_698_arg_1 = var_697; + SORT_4 var_698_arg_2 = input_169; + SORT_4 var_698 = var_698_arg_0 ? var_698_arg_1 : var_698_arg_2; + SORT_4 var_699_arg_0 = var_698; + SORT_4 var_699_arg_1 = var_205; + SORT_6 var_699 = ((SORT_6)var_699_arg_0 << 16) | var_699_arg_1; + SORT_6 var_700_arg_0 = var_699; + var_700_arg_0 = (var_700_arg_0 & msb_SORT_6) ? (var_700_arg_0 | ~mask_SORT_6) : (var_700_arg_0 & mask_SORT_6); + SORT_6 var_700_arg_1 = var_207; + SORT_6 var_700 = (int)var_700_arg_0 >> var_700_arg_1; + var_700 = (var_700_arg_0 & msb_SORT_6) ? (var_700 | ~(mask_SORT_6 >> var_700_arg_1)) : var_700; + SORT_6 var_718_arg_0 = var_213; + SORT_6 var_718_arg_1 = var_700; + SORT_6 var_718 = var_718_arg_0 + var_718_arg_1; + SORT_6 var_719_arg_0 = var_718; + SORT_4 var_719 = var_719_arg_0 >> 0; + SORT_1 var_720_arg_0 = input_695; + SORT_4 var_720_arg_1 = var_719; + SORT_4 var_720_arg_2 = var_698; + SORT_4 var_720 = var_720_arg_0 ? var_720_arg_1 : var_720_arg_2; + SORT_4 var_721_arg_0 = var_720; + SORT_4 var_721_arg_1 = var_205; + SORT_6 var_721 = ((SORT_6)var_721_arg_0 << 16) | var_721_arg_1; + SORT_6 var_722_arg_0 = var_721; + var_722_arg_0 = (var_722_arg_0 & msb_SORT_6) ? (var_722_arg_0 | ~mask_SORT_6) : (var_722_arg_0 & mask_SORT_6); + SORT_6 var_722_arg_1 = var_207; + SORT_6 var_722 = (int)var_722_arg_0 >> var_722_arg_1; + var_722 = (var_722_arg_0 & msb_SORT_6) ? (var_722 | ~(mask_SORT_6 >> var_722_arg_1)) : var_722; + SORT_6 var_723_arg_0 = var_204; + SORT_6 var_723_arg_1 = var_722; + SORT_1 var_723 = var_723_arg_0 == var_723_arg_1; + SORT_6 var_702_arg_0 = var_249; + SORT_6 var_702_arg_1 = var_700; + SORT_1 var_702 = var_702_arg_0 == var_702_arg_1; + SORT_6 var_701_arg_0 = var_204; + SORT_6 var_701_arg_1 = var_700; + SORT_1 var_701 = var_701_arg_0 <= var_701_arg_1; + SORT_6 var_679_arg_0 = var_249; + SORT_6 var_679_arg_1 = var_677; + SORT_1 var_679 = var_679_arg_0 == var_679_arg_1; + SORT_6 var_678_arg_0 = var_204; + SORT_6 var_678_arg_1 = var_677; + SORT_1 var_678 = var_678_arg_0 <= var_678_arg_1; + SORT_4 var_515_arg_0 = input_167; + SORT_4 var_515_arg_1 = var_205; + SORT_6 var_515 = ((SORT_6)var_515_arg_0 << 16) | var_515_arg_1; + SORT_6 var_516_arg_0 = var_515; + var_516_arg_0 = (var_516_arg_0 & msb_SORT_6) ? (var_516_arg_0 | ~mask_SORT_6) : (var_516_arg_0 & mask_SORT_6); + SORT_6 var_516_arg_1 = var_207; + SORT_6 var_516 = (int)var_516_arg_0 >> var_516_arg_1; + var_516 = (var_516_arg_0 & msb_SORT_6) ? (var_516 | ~(mask_SORT_6 >> var_516_arg_1)) : var_516; + SORT_6 var_534_arg_0 = var_213; + SORT_6 var_534_arg_1 = var_516; + SORT_6 var_534 = var_534_arg_0 + var_534_arg_1; + SORT_6 var_535_arg_0 = var_534; + SORT_4 var_535 = var_535_arg_0 >> 0; + SORT_1 var_536_arg_0 = input_513; + SORT_4 var_536_arg_1 = var_535; + SORT_4 var_536_arg_2 = input_167; + SORT_4 var_536 = var_536_arg_0 ? var_536_arg_1 : var_536_arg_2; + SORT_4 var_537_arg_0 = var_536; + SORT_4 var_537_arg_1 = var_205; + SORT_6 var_537 = ((SORT_6)var_537_arg_0 << 16) | var_537_arg_1; + SORT_6 var_538_arg_0 = var_537; + var_538_arg_0 = (var_538_arg_0 & msb_SORT_6) ? (var_538_arg_0 | ~mask_SORT_6) : (var_538_arg_0 & mask_SORT_6); + SORT_6 var_538_arg_1 = var_207; + SORT_6 var_538 = (int)var_538_arg_0 >> var_538_arg_1; + var_538 = (var_538_arg_0 & msb_SORT_6) ? (var_538 | ~(mask_SORT_6 >> var_538_arg_1)) : var_538; + SORT_6 var_556_arg_0 = var_213; + SORT_6 var_556_arg_1 = var_538; + SORT_6 var_556 = var_556_arg_0 + var_556_arg_1; + SORT_6 var_557_arg_0 = var_556; + SORT_4 var_557 = var_557_arg_0 >> 0; + SORT_1 var_558_arg_0 = input_533; + SORT_4 var_558_arg_1 = var_557; + SORT_4 var_558_arg_2 = var_536; + SORT_4 var_558 = var_558_arg_0 ? var_558_arg_1 : var_558_arg_2; + SORT_4 var_559_arg_0 = var_558; + SORT_4 var_559_arg_1 = var_205; + SORT_6 var_559 = ((SORT_6)var_559_arg_0 << 16) | var_559_arg_1; + SORT_6 var_560_arg_0 = var_559; + var_560_arg_0 = (var_560_arg_0 & msb_SORT_6) ? (var_560_arg_0 | ~mask_SORT_6) : (var_560_arg_0 & mask_SORT_6); + SORT_6 var_560_arg_1 = var_207; + SORT_6 var_560 = (int)var_560_arg_0 >> var_560_arg_1; + var_560 = (var_560_arg_0 & msb_SORT_6) ? (var_560 | ~(mask_SORT_6 >> var_560_arg_1)) : var_560; + SORT_6 var_561_arg_0 = var_204; + SORT_6 var_561_arg_1 = var_560; + SORT_1 var_561 = var_561_arg_0 == var_561_arg_1; + SORT_6 var_540_arg_0 = var_249; + SORT_6 var_540_arg_1 = var_538; + SORT_1 var_540 = var_540_arg_0 == var_540_arg_1; + SORT_6 var_539_arg_0 = var_204; + SORT_6 var_539_arg_1 = var_538; + SORT_1 var_539 = var_539_arg_0 <= var_539_arg_1; + SORT_6 var_518_arg_0 = var_249; + SORT_6 var_518_arg_1 = var_516; + SORT_1 var_518 = var_518_arg_0 == var_518_arg_1; + SORT_6 var_517_arg_0 = var_204; + SORT_6 var_517_arg_1 = var_516; + SORT_1 var_517 = var_517_arg_0 <= var_517_arg_1; + SORT_4 var_206_arg_0 = input_165; + SORT_4 var_206_arg_1 = var_205; + SORT_6 var_206 = ((SORT_6)var_206_arg_0 << 16) | var_206_arg_1; + SORT_6 var_208_arg_0 = var_206; + var_208_arg_0 = (var_208_arg_0 & msb_SORT_6) ? (var_208_arg_0 | ~mask_SORT_6) : (var_208_arg_0 & mask_SORT_6); + SORT_6 var_208_arg_1 = var_207; + SORT_6 var_208 = (int)var_208_arg_0 >> var_208_arg_1; + var_208 = (var_208_arg_0 & msb_SORT_6) ? (var_208 | ~(mask_SORT_6 >> var_208_arg_1)) : var_208; + SORT_6 var_255_arg_0 = var_213; + SORT_6 var_255_arg_1 = var_208; + SORT_1 var_255 = var_255_arg_0 == var_255_arg_1; + SORT_1 var_256_arg_0 = input_203; + SORT_1 var_256_arg_1 = var_255; + SORT_1 var_256 = var_256_arg_0 & var_256_arg_1; + var_256 = var_256 & mask_SORT_1; + SORT_6 var_251_arg_0 = var_249; + SORT_6 var_251_arg_1 = var_208; + SORT_1 var_251 = var_251_arg_0 == var_251_arg_1; + SORT_1 var_252_arg_0 = input_203; + SORT_1 var_252_arg_1 = var_251; + SORT_1 var_252 = var_252_arg_0 & var_252_arg_1; + var_252 = var_252 & mask_SORT_1; + SORT_6 var_214_arg_0 = var_213; + SORT_6 var_214_arg_1 = var_208; + SORT_6 var_214 = var_214_arg_0 + var_214_arg_1; + SORT_6 var_215_arg_0 = var_214; + SORT_4 var_215 = var_215_arg_0 >> 0; + SORT_1 var_216_arg_0 = input_203; + SORT_4 var_216_arg_1 = var_215; + SORT_4 var_216_arg_2 = input_165; + SORT_4 var_216 = var_216_arg_0 ? var_216_arg_1 : var_216_arg_2; + SORT_4 var_217_arg_0 = var_216; + SORT_4 var_217_arg_1 = var_205; + SORT_6 var_217 = ((SORT_6)var_217_arg_0 << 16) | var_217_arg_1; + SORT_6 var_218_arg_0 = var_217; + var_218_arg_0 = (var_218_arg_0 & msb_SORT_6) ? (var_218_arg_0 | ~mask_SORT_6) : (var_218_arg_0 & mask_SORT_6); + SORT_6 var_218_arg_1 = var_207; + SORT_6 var_218 = (int)var_218_arg_0 >> var_218_arg_1; + var_218 = (var_218_arg_0 & msb_SORT_6) ? (var_218 | ~(mask_SORT_6 >> var_218_arg_1)) : var_218; + SORT_6 var_219_arg_0 = var_204; + SORT_6 var_219_arg_1 = var_218; + SORT_1 var_219 = var_219_arg_0 == var_219_arg_1; + SORT_1 var_220_arg_0 = input_171; + SORT_1 var_220_arg_1 = var_219; + SORT_1 var_220 = var_220_arg_0 & var_220_arg_1; + SORT_1 var_221_arg_0 = ~input_212; + var_221_arg_0 = var_221_arg_0 & mask_SORT_1; + SORT_1 var_221_arg_1 = var_220; + SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; + SORT_6 var_209_arg_0 = var_204; + SORT_6 var_209_arg_1 = var_208; + SORT_1 var_209 = var_209_arg_0 <= var_209_arg_1; + SORT_1 var_210_arg_0 = input_171; + SORT_1 var_210_arg_1 = ~var_209; + var_210_arg_1 = var_210_arg_1 & mask_SORT_1; + SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; + SORT_1 var_211_arg_0 = ~input_203; + var_211_arg_0 = var_211_arg_0 & mask_SORT_1; + SORT_1 var_211_arg_1 = var_210; + SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; + SORT_1 var_222_arg_0 = var_211; + SORT_1 var_222_arg_1 = var_221; + SORT_1 var_222 = var_222_arg_0 & var_222_arg_1; + SORT_4 var_358_arg_0 = input_159; + SORT_3 var_358 = var_358_arg_0 >> 0; + SORT_1 var_609_arg_0 = var_256; + SORT_4 var_609_arg_1 = var_253; + SORT_4 var_609_arg_2 = input_157; + SORT_4 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; + SORT_4 var_610_arg_0 = var_609; + SORT_4 var_610_arg_1 = var_205; + SORT_6 var_610 = ((SORT_6)var_610_arg_0 << 16) | var_610_arg_1; + SORT_6 var_611_arg_0 = var_610; + var_611_arg_0 = (var_611_arg_0 & msb_SORT_6) ? (var_611_arg_0 | ~mask_SORT_6) : (var_611_arg_0 & mask_SORT_6); + SORT_6 var_611_arg_1 = var_207; + SORT_6 var_611 = (int)var_611_arg_0 >> var_611_arg_1; + var_611 = (var_611_arg_0 & msb_SORT_6) ? (var_611 | ~(mask_SORT_6 >> var_611_arg_1)) : var_611; + SORT_6 var_612_arg_0 = var_248; + SORT_6 var_612_arg_1 = var_611; + SORT_1 var_612 = var_612_arg_0 == var_612_arg_1; + SORT_1 var_462_arg_0 = var_252; + SORT_4 var_462_arg_1 = var_253; + SORT_4 var_462_arg_2 = input_155; + SORT_4 var_462 = var_462_arg_0 ? var_462_arg_1 : var_462_arg_2; + SORT_4 var_463_arg_0 = var_462; + SORT_4 var_463_arg_1 = var_205; + SORT_6 var_463 = ((SORT_6)var_463_arg_0 << 16) | var_463_arg_1; + SORT_6 var_464_arg_0 = var_463; + var_464_arg_0 = (var_464_arg_0 & msb_SORT_6) ? (var_464_arg_0 | ~mask_SORT_6) : (var_464_arg_0 & mask_SORT_6); + SORT_6 var_464_arg_1 = var_207; + SORT_6 var_464 = (int)var_464_arg_0 >> var_464_arg_1; + var_464 = (var_464_arg_0 & msb_SORT_6) ? (var_464 | ~(mask_SORT_6 >> var_464_arg_1)) : var_464; + SORT_6 var_465_arg_0 = var_248; + SORT_6 var_465_arg_1 = var_464; + SORT_1 var_465 = var_465_arg_0 == var_465_arg_1; + SORT_4 var_1023_arg_0 = input_153; + SORT_4 var_1023_arg_1 = var_205; + SORT_6 var_1023 = ((SORT_6)var_1023_arg_0 << 16) | var_1023_arg_1; + SORT_6 var_1024_arg_0 = var_1023; + var_1024_arg_0 = (var_1024_arg_0 & msb_SORT_6) ? (var_1024_arg_0 | ~mask_SORT_6) : (var_1024_arg_0 & mask_SORT_6); + SORT_6 var_1024_arg_1 = var_207; + SORT_6 var_1024 = (int)var_1024_arg_0 >> var_1024_arg_1; + var_1024 = (var_1024_arg_0 & msb_SORT_6) ? (var_1024 | ~(mask_SORT_6 >> var_1024_arg_1)) : var_1024; + SORT_1 var_300_arg_0 = var_256; + SORT_4 var_300_arg_1 = var_253; + SORT_4 var_300_arg_2 = input_153; + SORT_4 var_300 = var_300_arg_0 ? var_300_arg_1 : var_300_arg_2; + SORT_1 var_604_arg_0 = input_594; + SORT_4 var_604_arg_1 = var_253; + SORT_4 var_604_arg_2 = var_300; + SORT_4 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; + SORT_4 var_605_arg_0 = var_604; + SORT_4 var_605_arg_1 = var_205; + SORT_6 var_605 = ((SORT_6)var_605_arg_0 << 16) | var_605_arg_1; + SORT_6 var_606_arg_0 = var_605; + var_606_arg_0 = (var_606_arg_0 & msb_SORT_6) ? (var_606_arg_0 | ~mask_SORT_6) : (var_606_arg_0 & mask_SORT_6); + SORT_6 var_606_arg_1 = var_207; + SORT_6 var_606 = (int)var_606_arg_0 >> var_606_arg_1; + var_606 = (var_606_arg_0 & msb_SORT_6) ? (var_606 | ~(mask_SORT_6 >> var_606_arg_1)) : var_606; + SORT_6 var_607_arg_0 = var_248; + SORT_6 var_607_arg_1 = var_606; + SORT_1 var_607 = var_607_arg_0 == var_607_arg_1; + SORT_1 var_299_arg_0 = var_252; + SORT_4 var_299_arg_1 = var_253; + SORT_4 var_299_arg_2 = input_151; + SORT_4 var_299 = var_299_arg_0 ? var_299_arg_1 : var_299_arg_2; + SORT_1 var_457_arg_0 = input_441; + SORT_4 var_457_arg_1 = var_253; + SORT_4 var_457_arg_2 = var_299; + SORT_4 var_457 = var_457_arg_0 ? var_457_arg_1 : var_457_arg_2; + SORT_1 var_545_arg_0 = var_540; + SORT_4 var_545_arg_1 = var_457; + SORT_4 var_545_arg_2 = var_300; + SORT_4 var_545 = var_545_arg_0 ? var_545_arg_1 : var_545_arg_2; + SORT_4 var_546_arg_0 = var_545; + SORT_4 var_546_arg_1 = var_205; + SORT_6 var_546 = ((SORT_6)var_546_arg_0 << 16) | var_546_arg_1; + SORT_6 var_547_arg_0 = var_546; + var_547_arg_0 = (var_547_arg_0 & msb_SORT_6) ? (var_547_arg_0 | ~mask_SORT_6) : (var_547_arg_0 & mask_SORT_6); + SORT_6 var_547_arg_1 = var_207; + SORT_6 var_547 = (int)var_547_arg_0 >> var_547_arg_1; + var_547 = (var_547_arg_0 & msb_SORT_6) ? (var_547 | ~(mask_SORT_6 >> var_547_arg_1)) : var_547; + SORT_1 var_525_arg_0 = var_518; + SORT_4 var_525_arg_1 = var_457; + SORT_4 var_525_arg_2 = var_300; + SORT_4 var_525 = var_525_arg_0 ? var_525_arg_1 : var_525_arg_2; + SORT_4 var_526_arg_0 = var_525; + SORT_4 var_526_arg_1 = var_205; + SORT_6 var_526 = ((SORT_6)var_526_arg_0 << 16) | var_526_arg_1; + SORT_6 var_527_arg_0 = var_526; + var_527_arg_0 = (var_527_arg_0 & msb_SORT_6) ? (var_527_arg_0 | ~mask_SORT_6) : (var_527_arg_0 & mask_SORT_6); + SORT_6 var_527_arg_1 = var_207; + SORT_6 var_527 = (int)var_527_arg_0 >> var_527_arg_1; + var_527 = (var_527_arg_0 & msb_SORT_6) ? (var_527 | ~(mask_SORT_6 >> var_527_arg_1)) : var_527; + SORT_4 var_458_arg_0 = var_457; + SORT_4 var_458_arg_1 = var_205; + SORT_6 var_458 = ((SORT_6)var_458_arg_0 << 16) | var_458_arg_1; + SORT_6 var_459_arg_0 = var_458; + var_459_arg_0 = (var_459_arg_0 & msb_SORT_6) ? (var_459_arg_0 | ~mask_SORT_6) : (var_459_arg_0 & mask_SORT_6); + SORT_6 var_459_arg_1 = var_207; + SORT_6 var_459 = (int)var_459_arg_0 >> var_459_arg_1; + var_459 = (var_459_arg_0 & msb_SORT_6) ? (var_459 | ~(mask_SORT_6 >> var_459_arg_1)) : var_459; + SORT_6 var_460_arg_0 = var_248; + SORT_6 var_460_arg_1 = var_459; + SORT_1 var_460 = var_460_arg_0 == var_460_arg_1; + SORT_4 var_1020_arg_0 = input_149; + SORT_4 var_1020_arg_1 = var_205; + SORT_6 var_1020 = ((SORT_6)var_1020_arg_0 << 16) | var_1020_arg_1; + SORT_6 var_1021_arg_0 = var_1020; + var_1021_arg_0 = (var_1021_arg_0 & msb_SORT_6) ? (var_1021_arg_0 | ~mask_SORT_6) : (var_1021_arg_0 & mask_SORT_6); + SORT_6 var_1021_arg_1 = var_207; + SORT_6 var_1021 = (int)var_1021_arg_0 >> var_1021_arg_1; + var_1021 = (var_1021_arg_0 & msb_SORT_6) ? (var_1021 | ~(mask_SORT_6 >> var_1021_arg_1)) : var_1021; + SORT_1 var_257_arg_0 = var_256; + SORT_4 var_257_arg_1 = var_253; + SORT_4 var_257_arg_2 = input_149; + SORT_4 var_257 = var_257_arg_0 ? var_257_arg_1 : var_257_arg_2; + SORT_1 var_680_arg_0 = input_594; + SORT_4 var_680_arg_1 = var_300; + SORT_4 var_680_arg_2 = var_257; + SORT_4 var_680 = var_680_arg_0 ? var_680_arg_1 : var_680_arg_2; + SORT_4 var_724_arg_0 = var_680; + SORT_4 var_724_arg_1 = var_205; + SORT_6 var_724 = ((SORT_6)var_724_arg_0 << 16) | var_724_arg_1; + SORT_6 var_725_arg_0 = var_724; + var_725_arg_0 = (var_725_arg_0 & msb_SORT_6) ? (var_725_arg_0 | ~mask_SORT_6) : (var_725_arg_0 & mask_SORT_6); + SORT_6 var_725_arg_1 = var_207; + SORT_6 var_725 = (int)var_725_arg_0 >> var_725_arg_1; + var_725 = (var_725_arg_0 & msb_SORT_6) ? (var_725 | ~(mask_SORT_6 >> var_725_arg_1)) : var_725; + SORT_6 var_726_arg_0 = var_248; + SORT_6 var_726_arg_1 = var_725; + SORT_1 var_726 = var_726_arg_0 == var_726_arg_1; + SORT_1 var_727_arg_0 = var_723; + SORT_1 var_727_arg_1 = var_726; + SORT_1 var_727 = var_727_arg_0 & var_727_arg_1; + SORT_1 var_728_arg_0 = var_717; + SORT_1 var_728_arg_1 = var_727; + SORT_1 var_728 = var_728_arg_0 & var_728_arg_1; + SORT_1 var_729_arg_0 = ~input_716; + var_729_arg_0 = var_729_arg_0 & mask_SORT_1; + SORT_1 var_729_arg_1 = var_728; + SORT_1 var_729 = var_729_arg_0 | var_729_arg_1; + SORT_4 var_595_arg_0 = var_257; + SORT_4 var_595_arg_1 = var_205; + SORT_6 var_595 = ((SORT_6)var_595_arg_0 << 16) | var_595_arg_1; + SORT_6 var_596_arg_0 = var_595; + var_596_arg_0 = (var_596_arg_0 & msb_SORT_6) ? (var_596_arg_0 | ~mask_SORT_6) : (var_596_arg_0 & mask_SORT_6); + SORT_6 var_596_arg_1 = var_207; + SORT_6 var_596 = (int)var_596_arg_0 >> var_596_arg_1; + var_596 = (var_596_arg_0 & msb_SORT_6) ? (var_596 | ~(mask_SORT_6 >> var_596_arg_1)) : var_596; + SORT_6 var_931_arg_0 = var_213; + SORT_6 var_931_arg_1 = var_596; + SORT_1 var_931 = var_931_arg_0 == var_931_arg_1; + SORT_6 var_918_arg_0 = var_213; + SORT_6 var_918_arg_1 = var_596; + SORT_6 var_918 = var_918_arg_0 + var_918_arg_1; + SORT_6 var_932_arg_0 = var_213; + SORT_6 var_932_arg_1 = var_918; + SORT_1 var_932 = var_932_arg_0 == var_932_arg_1; + SORT_1 var_933_arg_0 = var_931; + SORT_1 var_933_arg_1 = var_932; + SORT_1 var_933 = var_933_arg_0 | var_933_arg_1; + SORT_1 var_934_arg_0 = input_594; + SORT_1 var_934_arg_1 = var_933; + SORT_1 var_934 = var_934_arg_0 & var_934_arg_1; + var_934 = var_934 & mask_SORT_1; + SORT_6 var_919_arg_0 = var_249; + SORT_6 var_919_arg_1 = var_918; + SORT_1 var_919 = var_919_arg_0 == var_919_arg_1; + SORT_6 var_917_arg_0 = var_249; + SORT_6 var_917_arg_1 = var_596; + SORT_1 var_917 = var_917_arg_0 == var_917_arg_1; + SORT_1 var_920_arg_0 = var_917; + SORT_1 var_920_arg_1 = var_919; + SORT_1 var_920 = var_920_arg_0 | var_920_arg_1; + SORT_1 var_921_arg_0 = input_594; + SORT_1 var_921_arg_1 = var_920; + SORT_1 var_921 = var_921_arg_0 & var_921_arg_1; + var_921 = var_921 & mask_SORT_1; + SORT_6 var_597_arg_0 = var_248; + SORT_6 var_597_arg_1 = var_596; + SORT_1 var_597 = var_597_arg_0 == var_597_arg_1; + SORT_4 var_1018_arg_0 = input_147; + SORT_4 var_1018_arg_1 = var_205; + SORT_6 var_1018 = ((SORT_6)var_1018_arg_0 << 16) | var_1018_arg_1; + SORT_6 var_1019_arg_0 = var_1018; + var_1019_arg_0 = (var_1019_arg_0 & msb_SORT_6) ? (var_1019_arg_0 | ~mask_SORT_6) : (var_1019_arg_0 & mask_SORT_6); + SORT_6 var_1019_arg_1 = var_207; + SORT_6 var_1019 = (int)var_1019_arg_0 >> var_1019_arg_1; + var_1019 = (var_1019_arg_0 & msb_SORT_6) ? (var_1019 | ~(mask_SORT_6 >> var_1019_arg_1)) : var_1019; + SORT_6 var_1025_arg_0 = var_1019; + SORT_6 var_1025_arg_1 = var_1024; + SORT_1 var_1025 = var_1025_arg_0 == var_1025_arg_1; + SORT_6 var_1022_arg_0 = var_1019; + SORT_6 var_1022_arg_1 = var_1021; + SORT_1 var_1022 = var_1022_arg_0 == var_1022_arg_1; + SORT_1 var_1026_arg_0 = var_1022; + SORT_1 var_1026_arg_1 = var_1025; + SORT_1 var_1026 = var_1026_arg_0 | var_1026_arg_1; + SORT_1 var_254_arg_0 = var_252; + SORT_4 var_254_arg_1 = var_253; + SORT_4 var_254_arg_2 = input_147; + SORT_4 var_254 = var_254_arg_0 ? var_254_arg_1 : var_254_arg_2; + SORT_1 var_519_arg_0 = input_441; + SORT_4 var_519_arg_1 = var_299; + SORT_4 var_519_arg_2 = var_254; + SORT_4 var_519 = var_519_arg_0 ? var_519_arg_1 : var_519_arg_2; + SORT_4 var_562_arg_0 = var_519; + SORT_4 var_562_arg_1 = var_205; + SORT_6 var_562 = ((SORT_6)var_562_arg_0 << 16) | var_562_arg_1; + SORT_6 var_563_arg_0 = var_562; + var_563_arg_0 = (var_563_arg_0 & msb_SORT_6) ? (var_563_arg_0 | ~mask_SORT_6) : (var_563_arg_0 & mask_SORT_6); + SORT_6 var_563_arg_1 = var_207; + SORT_6 var_563 = (int)var_563_arg_0 >> var_563_arg_1; + var_563 = (var_563_arg_0 & msb_SORT_6) ? (var_563 | ~(mask_SORT_6 >> var_563_arg_1)) : var_563; + SORT_6 var_564_arg_0 = var_248; + SORT_6 var_564_arg_1 = var_563; + SORT_1 var_564 = var_564_arg_0 == var_564_arg_1; + SORT_1 var_565_arg_0 = var_561; + SORT_1 var_565_arg_1 = var_564; + SORT_1 var_565 = var_565_arg_0 & var_565_arg_1; + SORT_1 var_566_arg_0 = var_555; + SORT_1 var_566_arg_1 = var_565; + SORT_1 var_566 = var_566_arg_0 & var_566_arg_1; + SORT_1 var_567_arg_0 = ~input_554; + var_567_arg_0 = var_567_arg_0 & mask_SORT_1; + SORT_1 var_567_arg_1 = var_566; + SORT_1 var_567 = var_567_arg_0 | var_567_arg_1; + SORT_1 var_541_arg_0 = var_540; + SORT_4 var_541_arg_1 = var_519; + SORT_4 var_541_arg_2 = var_257; + SORT_4 var_541 = var_541_arg_0 ? var_541_arg_1 : var_541_arg_2; + SORT_4 var_542_arg_0 = var_541; + SORT_4 var_542_arg_1 = var_205; + SORT_6 var_542 = ((SORT_6)var_542_arg_0 << 16) | var_542_arg_1; + SORT_6 var_543_arg_0 = var_542; + var_543_arg_0 = (var_543_arg_0 & msb_SORT_6) ? (var_543_arg_0 | ~mask_SORT_6) : (var_543_arg_0 & mask_SORT_6); + SORT_6 var_543_arg_1 = var_207; + SORT_6 var_543 = (int)var_543_arg_0 >> var_543_arg_1; + var_543 = (var_543_arg_0 & msb_SORT_6) ? (var_543 | ~(mask_SORT_6 >> var_543_arg_1)) : var_543; + SORT_1 var_520_arg_0 = var_518; + SORT_4 var_520_arg_1 = var_519; + SORT_4 var_520_arg_2 = var_257; + SORT_4 var_520 = var_520_arg_0 ? var_520_arg_1 : var_520_arg_2; + SORT_4 var_521_arg_0 = var_520; + SORT_4 var_521_arg_1 = var_205; + SORT_6 var_521 = ((SORT_6)var_521_arg_0 << 16) | var_521_arg_1; + SORT_6 var_522_arg_0 = var_521; + var_522_arg_0 = (var_522_arg_0 & msb_SORT_6) ? (var_522_arg_0 | ~mask_SORT_6) : (var_522_arg_0 & mask_SORT_6); + SORT_6 var_522_arg_1 = var_207; + SORT_6 var_522 = (int)var_522_arg_0 >> var_522_arg_1; + var_522 = (var_522_arg_0 & msb_SORT_6) ? (var_522 | ~(mask_SORT_6 >> var_522_arg_1)) : var_522; + SORT_4 var_448_arg_0 = var_254; + SORT_4 var_448_arg_1 = var_205; + SORT_6 var_448 = ((SORT_6)var_448_arg_0 << 16) | var_448_arg_1; + SORT_6 var_449_arg_0 = var_448; + var_449_arg_0 = (var_449_arg_0 & msb_SORT_6) ? (var_449_arg_0 | ~mask_SORT_6) : (var_449_arg_0 & mask_SORT_6); + SORT_6 var_449_arg_1 = var_207; + SORT_6 var_449 = (int)var_449_arg_0 >> var_449_arg_1; + var_449 = (var_449_arg_0 & msb_SORT_6) ? (var_449 | ~(mask_SORT_6 >> var_449_arg_1)) : var_449; + SORT_6 var_935_arg_0 = var_213; + SORT_6 var_935_arg_1 = var_449; + SORT_1 var_935 = var_935_arg_0 == var_935_arg_1; + SORT_6 var_923_arg_0 = var_213; + SORT_6 var_923_arg_1 = var_449; + SORT_6 var_923 = var_923_arg_0 + var_923_arg_1; + SORT_6 var_936_arg_0 = var_213; + SORT_6 var_936_arg_1 = var_923; + SORT_1 var_936 = var_936_arg_0 == var_936_arg_1; + SORT_1 var_937_arg_0 = var_935; + SORT_1 var_937_arg_1 = var_936; + SORT_1 var_937 = var_937_arg_0 | var_937_arg_1; + SORT_1 var_938_arg_0 = input_441; + SORT_1 var_938_arg_1 = var_937; + SORT_1 var_938 = var_938_arg_0 & var_938_arg_1; + var_938 = var_938 & mask_SORT_1; + SORT_6 var_924_arg_0 = var_249; + SORT_6 var_924_arg_1 = var_923; + SORT_1 var_924 = var_924_arg_0 == var_924_arg_1; + SORT_6 var_922_arg_0 = var_249; + SORT_6 var_922_arg_1 = var_449; + SORT_1 var_922 = var_922_arg_0 == var_922_arg_1; + SORT_1 var_925_arg_0 = var_922; + SORT_1 var_925_arg_1 = var_924; + SORT_1 var_925 = var_925_arg_0 | var_925_arg_1; + SORT_1 var_926_arg_0 = input_441; + SORT_1 var_926_arg_1 = var_925; + SORT_1 var_926 = var_926_arg_0 & var_926_arg_1; + var_926 = var_926 & mask_SORT_1; + SORT_6 var_450_arg_0 = var_248; + SORT_6 var_450_arg_1 = var_449; + SORT_1 var_450 = var_450_arg_0 == var_450_arg_1; + SORT_1 var_733_arg_0 = input_716; + SORT_4 var_733_arg_1 = var_107; + SORT_4 var_733_arg_2 = var_720; + SORT_4 var_733 = var_733_arg_0 ? var_733_arg_1 : var_733_arg_2; + SORT_1 var_984_arg_0 = input_731; + SORT_4 var_984_arg_1 = var_107; + SORT_4 var_984_arg_2 = var_733; + SORT_4 var_984 = var_984_arg_0 ? var_984_arg_1 : var_984_arg_2; + SORT_4 var_734_arg_0 = var_733; + SORT_4 var_734_arg_1 = var_205; + SORT_6 var_734 = ((SORT_6)var_734_arg_0 << 16) | var_734_arg_1; + SORT_6 var_735_arg_0 = var_734; + var_735_arg_0 = (var_735_arg_0 & msb_SORT_6) ? (var_735_arg_0 | ~mask_SORT_6) : (var_735_arg_0 & mask_SORT_6); + SORT_6 var_735_arg_1 = var_207; + SORT_6 var_735 = (int)var_735_arg_0 >> var_735_arg_1; + var_735 = (var_735_arg_0 & msb_SORT_6) ? (var_735 | ~(mask_SORT_6 >> var_735_arg_1)) : var_735; + SORT_6 var_736_arg_0 = var_204; + SORT_6 var_736_arg_1 = var_735; + SORT_1 var_736 = var_736_arg_0 == var_736_arg_1; + SORT_1 var_626_arg_0 = input_602; + SORT_4 var_626_arg_1 = var_107; + SORT_4 var_626_arg_2 = var_609; + SORT_4 var_626 = var_626_arg_0 ? var_626_arg_1 : var_626_arg_2; + SORT_1 var_747_arg_0 = input_716; + SORT_4 var_747_arg_1 = var_253; + SORT_4 var_747_arg_2 = var_626; + SORT_4 var_747 = var_747_arg_0 ? var_747_arg_1 : var_747_arg_2; + SORT_1 var_949_arg_0 = input_731; + SORT_4 var_949_arg_1 = var_747; + SORT_4 var_949_arg_2 = var_604; + SORT_4 var_949 = var_949_arg_0 ? var_949_arg_1 : var_949_arg_2; + SORT_1 var_748_arg_0 = input_731; + SORT_4 var_748_arg_1 = var_253; + SORT_4 var_748_arg_2 = var_747; + SORT_4 var_748 = var_748_arg_0 ? var_748_arg_1 : var_748_arg_2; + SORT_4 var_749_arg_0 = var_748; + SORT_4 var_749_arg_1 = var_205; + SORT_6 var_749 = ((SORT_6)var_749_arg_0 << 16) | var_749_arg_1; + SORT_6 var_750_arg_0 = var_749; + var_750_arg_0 = (var_750_arg_0 & msb_SORT_6) ? (var_750_arg_0 | ~mask_SORT_6) : (var_750_arg_0 & mask_SORT_6); + SORT_6 var_750_arg_1 = var_207; + SORT_6 var_750 = (int)var_750_arg_0 >> var_750_arg_1; + var_750 = (var_750_arg_0 & msb_SORT_6) ? (var_750 | ~(mask_SORT_6 >> var_750_arg_1)) : var_750; + SORT_6 var_751_arg_0 = var_248; + SORT_6 var_751_arg_1 = var_750; + SORT_1 var_751 = var_751_arg_0 == var_751_arg_1; + SORT_1 var_737_arg_0 = input_716; + SORT_4 var_737_arg_1 = var_626; + SORT_4 var_737_arg_2 = var_680; + SORT_4 var_737 = var_737_arg_0 ? var_737_arg_1 : var_737_arg_2; + SORT_4 var_738_arg_0 = var_737; + SORT_4 var_738_arg_1 = var_205; + SORT_6 var_738 = ((SORT_6)var_738_arg_0 << 16) | var_738_arg_1; + SORT_6 var_739_arg_0 = var_738; + var_739_arg_0 = (var_739_arg_0 & msb_SORT_6) ? (var_739_arg_0 | ~mask_SORT_6) : (var_739_arg_0 & mask_SORT_6); + SORT_6 var_739_arg_1 = var_207; + SORT_6 var_739 = (int)var_739_arg_0 >> var_739_arg_1; + var_739 = (var_739_arg_0 & msb_SORT_6) ? (var_739 | ~(mask_SORT_6 >> var_739_arg_1)) : var_739; + SORT_6 var_740_arg_0 = var_248; + SORT_6 var_740_arg_1 = var_739; + SORT_1 var_740 = var_740_arg_0 == var_740_arg_1; + SORT_1 var_741_arg_0 = var_736; + SORT_1 var_741_arg_1 = ~var_740; + var_741_arg_1 = var_741_arg_1 & mask_SORT_1; + SORT_1 var_741 = var_741_arg_0 & var_741_arg_1; + SORT_1 var_742_arg_0 = var_732; + SORT_1 var_742_arg_1 = var_741; + SORT_1 var_742 = var_742_arg_0 & var_742_arg_1; + SORT_1 var_743_arg_0 = ~input_731; + var_743_arg_0 = var_743_arg_0 & mask_SORT_1; + SORT_1 var_743_arg_1 = var_742; + SORT_1 var_743 = var_743_arg_0 | var_743_arg_1; + SORT_4 var_627_arg_0 = var_626; + SORT_4 var_627_arg_1 = var_205; + SORT_6 var_627 = ((SORT_6)var_627_arg_0 << 16) | var_627_arg_1; + SORT_6 var_628_arg_0 = var_627; + var_628_arg_0 = (var_628_arg_0 & msb_SORT_6) ? (var_628_arg_0 | ~mask_SORT_6) : (var_628_arg_0 & mask_SORT_6); + SORT_6 var_628_arg_1 = var_207; + SORT_6 var_628 = (int)var_628_arg_0 >> var_628_arg_1; + var_628 = (var_628_arg_0 & msb_SORT_6) ? (var_628 | ~(mask_SORT_6 >> var_628_arg_1)) : var_628; + SORT_6 var_629_arg_0 = var_248; + SORT_6 var_629_arg_1 = var_628; + SORT_1 var_629 = var_629_arg_0 == var_629_arg_1; + SORT_1 var_571_arg_0 = input_554; + SORT_4 var_571_arg_1 = var_107; + SORT_4 var_571_arg_2 = var_558; + SORT_4 var_571 = var_571_arg_0 ? var_571_arg_1 : var_571_arg_2; + SORT_1 var_981_arg_0 = input_569; + SORT_4 var_981_arg_1 = var_107; + SORT_4 var_981_arg_2 = var_571; + SORT_4 var_981 = var_981_arg_0 ? var_981_arg_1 : var_981_arg_2; + SORT_4 var_572_arg_0 = var_571; + SORT_4 var_572_arg_1 = var_205; + SORT_6 var_572 = ((SORT_6)var_572_arg_0 << 16) | var_572_arg_1; + SORT_6 var_573_arg_0 = var_572; + var_573_arg_0 = (var_573_arg_0 & msb_SORT_6) ? (var_573_arg_0 | ~mask_SORT_6) : (var_573_arg_0 & mask_SORT_6); + SORT_6 var_573_arg_1 = var_207; + SORT_6 var_573 = (int)var_573_arg_0 >> var_573_arg_1; + var_573 = (var_573_arg_0 & msb_SORT_6) ? (var_573 | ~(mask_SORT_6 >> var_573_arg_1)) : var_573; + SORT_6 var_574_arg_0 = var_204; + SORT_6 var_574_arg_1 = var_573; + SORT_1 var_574 = var_574_arg_0 == var_574_arg_1; + SORT_1 var_480_arg_0 = input_455; + SORT_4 var_480_arg_1 = var_107; + SORT_4 var_480_arg_2 = var_462; + SORT_4 var_480 = var_480_arg_0 ? var_480_arg_1 : var_480_arg_2; + SORT_1 var_585_arg_0 = input_554; + SORT_4 var_585_arg_1 = var_253; + SORT_4 var_585_arg_2 = var_480; + SORT_4 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; + SORT_1 var_686_arg_0 = input_569; + SORT_4 var_686_arg_1 = var_585; + SORT_4 var_686_arg_2 = var_457; + SORT_4 var_686 = var_686_arg_0 ? var_686_arg_1 : var_686_arg_2; + SORT_1 var_707_arg_0 = var_702; + SORT_4 var_707_arg_1 = var_686; + SORT_4 var_707_arg_2 = var_604; + SORT_4 var_707 = var_707_arg_0 ? var_707_arg_1 : var_707_arg_2; + SORT_4 var_708_arg_0 = var_707; + SORT_4 var_708_arg_1 = var_205; + SORT_6 var_708 = ((SORT_6)var_708_arg_0 << 16) | var_708_arg_1; + SORT_6 var_709_arg_0 = var_708; + var_709_arg_0 = (var_709_arg_0 & msb_SORT_6) ? (var_709_arg_0 | ~mask_SORT_6) : (var_709_arg_0 & mask_SORT_6); + SORT_6 var_709_arg_1 = var_207; + SORT_6 var_709 = (int)var_709_arg_0 >> var_709_arg_1; + var_709 = (var_709_arg_0 & msb_SORT_6) ? (var_709 | ~(mask_SORT_6 >> var_709_arg_1)) : var_709; + SORT_6 var_710_arg_0 = var_628; + SORT_6 var_710_arg_1 = var_709; + SORT_1 var_710 = var_710_arg_0 == var_710_arg_1; + SORT_1 var_687_arg_0 = var_679; + SORT_4 var_687_arg_1 = var_686; + SORT_4 var_687_arg_2 = var_604; + SORT_4 var_687 = var_687_arg_0 ? var_687_arg_1 : var_687_arg_2; + SORT_4 var_688_arg_0 = var_687; + SORT_4 var_688_arg_1 = var_205; + SORT_6 var_688 = ((SORT_6)var_688_arg_0 << 16) | var_688_arg_1; + SORT_6 var_689_arg_0 = var_688; + var_689_arg_0 = (var_689_arg_0 & msb_SORT_6) ? (var_689_arg_0 | ~mask_SORT_6) : (var_689_arg_0 & mask_SORT_6); + SORT_6 var_689_arg_1 = var_207; + SORT_6 var_689 = (int)var_689_arg_0 >> var_689_arg_1; + var_689 = (var_689_arg_0 & msb_SORT_6) ? (var_689 | ~(mask_SORT_6 >> var_689_arg_1)) : var_689; + SORT_6 var_690_arg_0 = var_628; + SORT_6 var_690_arg_1 = var_689; + SORT_1 var_690 = var_690_arg_0 == var_690_arg_1; + SORT_1 var_586_arg_0 = input_569; + SORT_4 var_586_arg_1 = var_253; + SORT_4 var_586_arg_2 = var_585; + SORT_4 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; + SORT_4 var_587_arg_0 = var_586; + SORT_4 var_587_arg_1 = var_205; + SORT_6 var_587 = ((SORT_6)var_587_arg_0 << 16) | var_587_arg_1; + SORT_6 var_588_arg_0 = var_587; + var_588_arg_0 = (var_588_arg_0 & msb_SORT_6) ? (var_588_arg_0 | ~mask_SORT_6) : (var_588_arg_0 & mask_SORT_6); + SORT_6 var_588_arg_1 = var_207; + SORT_6 var_588 = (int)var_588_arg_0 >> var_588_arg_1; + var_588 = (var_588_arg_0 & msb_SORT_6) ? (var_588 | ~(mask_SORT_6 >> var_588_arg_1)) : var_588; + SORT_6 var_589_arg_0 = var_248; + SORT_6 var_589_arg_1 = var_588; + SORT_1 var_589 = var_589_arg_0 == var_589_arg_1; + SORT_1 var_575_arg_0 = input_554; + SORT_4 var_575_arg_1 = var_480; + SORT_4 var_575_arg_2 = var_519; + SORT_4 var_575 = var_575_arg_0 ? var_575_arg_1 : var_575_arg_2; + SORT_1 var_703_arg_0 = var_702; + SORT_4 var_703_arg_1 = var_575; + SORT_4 var_703_arg_2 = var_680; + SORT_4 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; + SORT_4 var_704_arg_0 = var_703; + SORT_4 var_704_arg_1 = var_205; + SORT_6 var_704 = ((SORT_6)var_704_arg_0 << 16) | var_704_arg_1; + SORT_6 var_705_arg_0 = var_704; + var_705_arg_0 = (var_705_arg_0 & msb_SORT_6) ? (var_705_arg_0 | ~mask_SORT_6) : (var_705_arg_0 & mask_SORT_6); + SORT_6 var_705_arg_1 = var_207; + SORT_6 var_705 = (int)var_705_arg_0 >> var_705_arg_1; + var_705 = (var_705_arg_0 & msb_SORT_6) ? (var_705 | ~(mask_SORT_6 >> var_705_arg_1)) : var_705; + SORT_6 var_706_arg_0 = var_628; + SORT_6 var_706_arg_1 = var_705; + SORT_1 var_706 = var_706_arg_0 == var_706_arg_1; + SORT_1 var_711_arg_0 = var_706; + SORT_1 var_711_arg_1 = var_710; + SORT_1 var_711 = var_711_arg_0 | var_711_arg_1; + SORT_1 var_712_arg_0 = ~var_701; + var_712_arg_0 = var_712_arg_0 & mask_SORT_1; + SORT_1 var_712_arg_1 = var_711; + SORT_1 var_712 = var_712_arg_0 & var_712_arg_1; + SORT_1 var_713_arg_0 = var_675; + SORT_1 var_713_arg_1 = var_712; + SORT_1 var_713 = var_713_arg_0 & var_713_arg_1; + SORT_1 var_714_arg_0 = ~input_695; + var_714_arg_0 = var_714_arg_0 & mask_SORT_1; + SORT_1 var_714_arg_1 = var_713; + SORT_1 var_714 = var_714_arg_0 | var_714_arg_1; + SORT_1 var_681_arg_0 = var_679; + SORT_4 var_681_arg_1 = var_575; + SORT_4 var_681_arg_2 = var_680; + SORT_4 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; + SORT_4 var_682_arg_0 = var_681; + SORT_4 var_682_arg_1 = var_205; + SORT_6 var_682 = ((SORT_6)var_682_arg_0 << 16) | var_682_arg_1; + SORT_6 var_683_arg_0 = var_682; + var_683_arg_0 = (var_683_arg_0 & msb_SORT_6) ? (var_683_arg_0 | ~mask_SORT_6) : (var_683_arg_0 & mask_SORT_6); + SORT_6 var_683_arg_1 = var_207; + SORT_6 var_683 = (int)var_683_arg_0 >> var_683_arg_1; + var_683 = (var_683_arg_0 & msb_SORT_6) ? (var_683 | ~(mask_SORT_6 >> var_683_arg_1)) : var_683; + SORT_6 var_684_arg_0 = var_628; + SORT_6 var_684_arg_1 = var_683; + SORT_1 var_684 = var_684_arg_0 == var_684_arg_1; + SORT_1 var_685_arg_0 = ~var_678; + var_685_arg_0 = var_685_arg_0 & mask_SORT_1; + SORT_1 var_685_arg_1 = ~var_684; + var_685_arg_1 = var_685_arg_1 & mask_SORT_1; + SORT_1 var_685 = var_685_arg_0 & var_685_arg_1; + SORT_1 var_691_arg_0 = var_685; + SORT_1 var_691_arg_1 = ~var_690; + var_691_arg_1 = var_691_arg_1 & mask_SORT_1; + SORT_1 var_691 = var_691_arg_0 & var_691_arg_1; + SORT_1 var_692_arg_0 = var_675; + SORT_1 var_692_arg_1 = var_691; + SORT_1 var_692 = var_692_arg_0 & var_692_arg_1; + SORT_1 var_693_arg_0 = ~input_674; + var_693_arg_0 = var_693_arg_0 & mask_SORT_1; + SORT_1 var_693_arg_1 = var_692; + SORT_1 var_693 = var_693_arg_0 | var_693_arg_1; + SORT_4 var_576_arg_0 = var_575; + SORT_4 var_576_arg_1 = var_205; + SORT_6 var_576 = ((SORT_6)var_576_arg_0 << 16) | var_576_arg_1; + SORT_6 var_577_arg_0 = var_576; + var_577_arg_0 = (var_577_arg_0 & msb_SORT_6) ? (var_577_arg_0 | ~mask_SORT_6) : (var_577_arg_0 & mask_SORT_6); + SORT_6 var_577_arg_1 = var_207; + SORT_6 var_577 = (int)var_577_arg_0 >> var_577_arg_1; + var_577 = (var_577_arg_0 & msb_SORT_6) ? (var_577 | ~(mask_SORT_6 >> var_577_arg_1)) : var_577; + SORT_6 var_578_arg_0 = var_248; + SORT_6 var_578_arg_1 = var_577; + SORT_1 var_578 = var_578_arg_0 == var_578_arg_1; + SORT_1 var_579_arg_0 = var_574; + SORT_1 var_579_arg_1 = ~var_578; + var_579_arg_1 = var_579_arg_1 & mask_SORT_1; + SORT_1 var_579 = var_579_arg_0 & var_579_arg_1; + SORT_1 var_580_arg_0 = var_570; + SORT_1 var_580_arg_1 = var_579; + SORT_1 var_580 = var_580_arg_0 & var_580_arg_1; + SORT_1 var_581_arg_0 = ~input_569; + var_581_arg_0 = var_581_arg_0 & mask_SORT_1; + SORT_1 var_581_arg_1 = var_580; + SORT_1 var_581 = var_581_arg_0 | var_581_arg_1; + SORT_4 var_481_arg_0 = var_480; + SORT_4 var_481_arg_1 = var_205; + SORT_6 var_481 = ((SORT_6)var_481_arg_0 << 16) | var_481_arg_1; + SORT_6 var_482_arg_0 = var_481; + var_482_arg_0 = (var_482_arg_0 & msb_SORT_6) ? (var_482_arg_0 | ~mask_SORT_6) : (var_482_arg_0 & mask_SORT_6); + SORT_6 var_482_arg_1 = var_207; + SORT_6 var_482 = (int)var_482_arg_0 >> var_482_arg_1; + var_482 = (var_482_arg_0 & msb_SORT_6) ? (var_482 | ~(mask_SORT_6 >> var_482_arg_1)) : var_482; + SORT_6 var_548_arg_0 = var_482; + SORT_6 var_548_arg_1 = var_547; + SORT_1 var_548 = var_548_arg_0 == var_548_arg_1; + SORT_6 var_544_arg_0 = var_482; + SORT_6 var_544_arg_1 = var_543; + SORT_1 var_544 = var_544_arg_0 == var_544_arg_1; + SORT_1 var_549_arg_0 = var_544; + SORT_1 var_549_arg_1 = var_548; + SORT_1 var_549 = var_549_arg_0 | var_549_arg_1; + SORT_1 var_550_arg_0 = ~var_539; + var_550_arg_0 = var_550_arg_0 & mask_SORT_1; + SORT_1 var_550_arg_1 = var_549; + SORT_1 var_550 = var_550_arg_0 & var_550_arg_1; + SORT_1 var_551_arg_0 = var_514; + SORT_1 var_551_arg_1 = var_550; + SORT_1 var_551 = var_551_arg_0 & var_551_arg_1; + SORT_1 var_552_arg_0 = ~input_533; + var_552_arg_0 = var_552_arg_0 & mask_SORT_1; + SORT_1 var_552_arg_1 = var_551; + SORT_1 var_552 = var_552_arg_0 | var_552_arg_1; + SORT_6 var_528_arg_0 = var_482; + SORT_6 var_528_arg_1 = var_527; + SORT_1 var_528 = var_528_arg_0 == var_528_arg_1; + SORT_6 var_523_arg_0 = var_482; + SORT_6 var_523_arg_1 = var_522; + SORT_1 var_523 = var_523_arg_0 == var_523_arg_1; + SORT_1 var_524_arg_0 = ~var_517; + var_524_arg_0 = var_524_arg_0 & mask_SORT_1; + SORT_1 var_524_arg_1 = ~var_523; + var_524_arg_1 = var_524_arg_1 & mask_SORT_1; + SORT_1 var_524 = var_524_arg_0 & var_524_arg_1; + SORT_1 var_529_arg_0 = var_524; + SORT_1 var_529_arg_1 = ~var_528; + var_529_arg_1 = var_529_arg_1 & mask_SORT_1; + SORT_1 var_529 = var_529_arg_0 & var_529_arg_1; + SORT_1 var_530_arg_0 = var_514; + SORT_1 var_530_arg_1 = var_529; + SORT_1 var_530 = var_530_arg_0 & var_530_arg_1; + SORT_1 var_531_arg_0 = ~input_513; + var_531_arg_0 = var_531_arg_0 & mask_SORT_1; + SORT_1 var_531_arg_1 = var_530; + SORT_1 var_531 = var_531_arg_0 | var_531_arg_1; + SORT_6 var_483_arg_0 = var_248; + SORT_6 var_483_arg_1 = var_482; + SORT_1 var_483 = var_483_arg_0 == var_483_arg_1; + SORT_1 var_225_arg_0 = input_212; + SORT_4 var_225_arg_1 = var_107; + SORT_4 var_225_arg_2 = var_216; + SORT_4 var_225 = var_225_arg_0 ? var_225_arg_1 : var_225_arg_2; + SORT_4 var_226_arg_0 = var_225; + SORT_4 var_226_arg_1 = var_205; + SORT_6 var_226 = ((SORT_6)var_226_arg_0 << 16) | var_226_arg_1; + SORT_6 var_227_arg_0 = var_226; + var_227_arg_0 = (var_227_arg_0 & msb_SORT_6) ? (var_227_arg_0 | ~mask_SORT_6) : (var_227_arg_0 & mask_SORT_6); + SORT_6 var_227_arg_1 = var_207; + SORT_6 var_227 = (int)var_227_arg_0 >> var_227_arg_1; + var_227 = (var_227_arg_0 & msb_SORT_6) ? (var_227 | ~(mask_SORT_6 >> var_227_arg_1)) : var_227; + SORT_6 var_383_arg_0 = var_213; + SORT_6 var_383_arg_1 = var_227; + SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; + SORT_1 var_384_arg_0 = input_223; + SORT_1 var_384_arg_1 = var_383; + SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; + var_384 = var_384 & mask_SORT_1; + SORT_6 var_368_arg_0 = var_249; + SORT_6 var_368_arg_1 = var_227; + SORT_1 var_368 = var_368_arg_0 == var_368_arg_1; + SORT_1 var_369_arg_0 = input_223; + SORT_1 var_369_arg_1 = var_368; + SORT_1 var_369 = var_369_arg_0 & var_369_arg_1; + var_369 = var_369 & mask_SORT_1; + SORT_6 var_233_arg_0 = var_213; + SORT_6 var_233_arg_1 = var_227; + SORT_6 var_233 = var_233_arg_0 + var_233_arg_1; + SORT_6 var_234_arg_0 = var_233; + SORT_4 var_234 = var_234_arg_0 >> 0; + SORT_1 var_235_arg_0 = input_223; + SORT_4 var_235_arg_1 = var_234; + SORT_4 var_235_arg_2 = var_225; + SORT_4 var_235 = var_235_arg_0 ? var_235_arg_1 : var_235_arg_2; + SORT_1 var_244_arg_0 = input_232; + SORT_4 var_244_arg_1 = var_107; + SORT_4 var_244_arg_2 = var_235; + SORT_4 var_244 = var_244_arg_0 ? var_244_arg_1 : var_244_arg_2; + SORT_4 var_366_arg_0 = var_244; + SORT_3 var_366 = var_366_arg_0 >> 0; + SORT_4 var_245_arg_0 = var_244; + SORT_4 var_245_arg_1 = var_205; + SORT_6 var_245 = ((SORT_6)var_245_arg_0 << 16) | var_245_arg_1; + SORT_6 var_246_arg_0 = var_245; + var_246_arg_0 = (var_246_arg_0 & msb_SORT_6) ? (var_246_arg_0 | ~mask_SORT_6) : (var_246_arg_0 & mask_SORT_6); + SORT_6 var_246_arg_1 = var_207; + SORT_6 var_246 = (int)var_246_arg_0 >> var_246_arg_1; + var_246 = (var_246_arg_0 & msb_SORT_6) ? (var_246 | ~(mask_SORT_6 >> var_246_arg_1)) : var_246; + SORT_6 var_267_arg_0 = var_213; + SORT_6 var_267_arg_1 = var_246; + SORT_6 var_267 = var_267_arg_0 + var_267_arg_1; + SORT_6 var_268_arg_0 = var_267; + SORT_4 var_268 = var_268_arg_0 >> 0; + SORT_1 var_269_arg_0 = input_242; + SORT_4 var_269_arg_1 = var_268; + SORT_4 var_269_arg_2 = var_244; + SORT_4 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; + SORT_4 var_270_arg_0 = var_269; + SORT_4 var_270_arg_1 = var_205; + SORT_6 var_270 = ((SORT_6)var_270_arg_0 << 16) | var_270_arg_1; + SORT_6 var_271_arg_0 = var_270; + var_271_arg_0 = (var_271_arg_0 & msb_SORT_6) ? (var_271_arg_0 | ~mask_SORT_6) : (var_271_arg_0 & mask_SORT_6); + SORT_6 var_271_arg_1 = var_207; + SORT_6 var_271 = (int)var_271_arg_0 >> var_271_arg_1; + var_271 = (var_271_arg_0 & msb_SORT_6) ? (var_271 | ~(mask_SORT_6 >> var_271_arg_1)) : var_271; + SORT_6 var_283_arg_0 = var_213; + SORT_6 var_283_arg_1 = var_271; + SORT_6 var_283 = var_283_arg_0 + var_283_arg_1; + SORT_6 var_284_arg_0 = var_283; + SORT_4 var_284 = var_284_arg_0 >> 0; + SORT_1 var_285_arg_0 = input_266; + SORT_4 var_285_arg_1 = var_284; + SORT_4 var_285_arg_2 = var_269; + SORT_4 var_285 = var_285_arg_0 ? var_285_arg_1 : var_285_arg_2; + SORT_1 var_294_arg_0 = input_282; + SORT_4 var_294_arg_1 = var_107; + SORT_4 var_294_arg_2 = var_285; + SORT_4 var_294 = var_294_arg_0 ? var_294_arg_1 : var_294_arg_2; + SORT_4 var_357_arg_0 = var_294; + SORT_3 var_357 = var_357_arg_0 >> 0; + SORT_4 var_295_arg_0 = var_294; + SORT_4 var_295_arg_1 = var_205; + SORT_6 var_295 = ((SORT_6)var_295_arg_0 << 16) | var_295_arg_1; + SORT_6 var_296_arg_0 = var_295; + var_296_arg_0 = (var_296_arg_0 & msb_SORT_6) ? (var_296_arg_0 | ~mask_SORT_6) : (var_296_arg_0 & mask_SORT_6); + SORT_6 var_296_arg_1 = var_207; + SORT_6 var_296 = (int)var_296_arg_0 >> var_296_arg_1; + var_296 = (var_296_arg_0 & msb_SORT_6) ? (var_296 | ~(mask_SORT_6 >> var_296_arg_1)) : var_296; + SORT_6 var_310_arg_0 = var_213; + SORT_6 var_310_arg_1 = var_296; + SORT_6 var_310 = var_310_arg_0 + var_310_arg_1; + SORT_6 var_311_arg_0 = var_310; + SORT_4 var_311 = var_311_arg_0 >> 0; + SORT_1 var_312_arg_0 = input_292; + SORT_4 var_312_arg_1 = var_311; + SORT_4 var_312_arg_2 = var_294; + SORT_4 var_312 = var_312_arg_0 ? var_312_arg_1 : var_312_arg_2; + SORT_4 var_313_arg_0 = var_312; + SORT_4 var_313_arg_1 = var_205; + SORT_6 var_313 = ((SORT_6)var_313_arg_0 << 16) | var_313_arg_1; + SORT_6 var_314_arg_0 = var_313; + var_314_arg_0 = (var_314_arg_0 & msb_SORT_6) ? (var_314_arg_0 | ~mask_SORT_6) : (var_314_arg_0 & mask_SORT_6); + SORT_6 var_314_arg_1 = var_207; + SORT_6 var_314 = (int)var_314_arg_0 >> var_314_arg_1; + var_314 = (var_314_arg_0 & msb_SORT_6) ? (var_314 | ~(mask_SORT_6 >> var_314_arg_1)) : var_314; + SORT_6 var_326_arg_0 = var_213; + SORT_6 var_326_arg_1 = var_314; + SORT_6 var_326 = var_326_arg_0 + var_326_arg_1; + SORT_6 var_327_arg_0 = var_326; + SORT_4 var_327 = var_327_arg_0 >> 0; + SORT_1 var_328_arg_0 = input_309; + SORT_4 var_328_arg_1 = var_327; + SORT_4 var_328_arg_2 = var_312; + SORT_4 var_328 = var_328_arg_0 ? var_328_arg_1 : var_328_arg_2; + SORT_1 var_345_arg_0 = input_325; + SORT_4 var_345_arg_1 = var_107; + SORT_4 var_345_arg_2 = var_328; + SORT_4 var_345 = var_345_arg_0 ? var_345_arg_1 : var_345_arg_2; + SORT_4 var_346_arg_0 = var_345; + SORT_4 var_346_arg_1 = var_205; + SORT_6 var_346 = ((SORT_6)var_346_arg_0 << 16) | var_346_arg_1; + SORT_6 var_347_arg_0 = var_346; + var_347_arg_0 = (var_347_arg_0 & msb_SORT_6) ? (var_347_arg_0 | ~mask_SORT_6) : (var_347_arg_0 & mask_SORT_6); + SORT_6 var_347_arg_1 = var_207; + SORT_6 var_347 = (int)var_347_arg_0 >> var_347_arg_1; + var_347 = (var_347_arg_0 & msb_SORT_6) ? (var_347 | ~(mask_SORT_6 >> var_347_arg_1)) : var_347; + SORT_6 var_395_arg_0 = var_213; + SORT_6 var_395_arg_1 = var_347; + SORT_6 var_395 = var_395_arg_0 + var_395_arg_1; + SORT_6 var_396_arg_0 = var_395; + SORT_4 var_396 = var_396_arg_0 >> 0; + SORT_1 var_397_arg_0 = input_343; + SORT_4 var_397_arg_1 = var_396; + SORT_4 var_397_arg_2 = var_345; + SORT_4 var_397 = var_397_arg_0 ? var_397_arg_1 : var_397_arg_2; + SORT_4 var_398_arg_0 = var_397; + SORT_4 var_398_arg_1 = var_205; + SORT_6 var_398 = ((SORT_6)var_398_arg_0 << 16) | var_398_arg_1; + SORT_6 var_399_arg_0 = var_398; + var_399_arg_0 = (var_399_arg_0 & msb_SORT_6) ? (var_399_arg_0 | ~mask_SORT_6) : (var_399_arg_0 & mask_SORT_6); + SORT_6 var_399_arg_1 = var_207; + SORT_6 var_399 = (int)var_399_arg_0 >> var_399_arg_1; + var_399 = (var_399_arg_0 & msb_SORT_6) ? (var_399 | ~(mask_SORT_6 >> var_399_arg_1)) : var_399; + SORT_6 var_410_arg_0 = var_213; + SORT_6 var_410_arg_1 = var_399; + SORT_6 var_410 = var_410_arg_0 + var_410_arg_1; + SORT_6 var_411_arg_0 = var_410; + SORT_4 var_411 = var_411_arg_0 >> 0; + SORT_1 var_412_arg_0 = input_394; + SORT_4 var_412_arg_1 = var_411; + SORT_4 var_412_arg_2 = var_397; + SORT_4 var_412 = var_412_arg_0 ? var_412_arg_1 : var_412_arg_2; + SORT_1 var_421_arg_0 = input_409; + SORT_4 var_421_arg_1 = var_107; + SORT_4 var_421_arg_2 = var_412; + SORT_4 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2; + SORT_4 var_422_arg_0 = var_421; + SORT_4 var_422_arg_1 = var_205; + SORT_6 var_422 = ((SORT_6)var_422_arg_0 << 16) | var_422_arg_1; + SORT_6 var_423_arg_0 = var_422; + var_423_arg_0 = (var_423_arg_0 & msb_SORT_6) ? (var_423_arg_0 | ~mask_SORT_6) : (var_423_arg_0 & mask_SORT_6); + SORT_6 var_423_arg_1 = var_207; + SORT_6 var_423 = (int)var_423_arg_0 >> var_423_arg_1; + var_423 = (var_423_arg_0 & msb_SORT_6) ? (var_423 | ~(mask_SORT_6 >> var_423_arg_1)) : var_423; + SORT_6 var_429_arg_0 = var_213; + SORT_6 var_429_arg_1 = var_423; + SORT_6 var_429 = var_429_arg_0 + var_429_arg_1; + SORT_6 var_430_arg_0 = var_429; + SORT_4 var_430 = var_430_arg_0 >> 0; + SORT_1 var_431_arg_0 = input_419; + SORT_4 var_431_arg_1 = var_430; + SORT_4 var_431_arg_2 = var_421; + SORT_4 var_431 = var_431_arg_0 ? var_431_arg_1 : var_431_arg_2; + SORT_1 var_978_arg_0 = input_428; + SORT_4 var_978_arg_1 = var_107; + SORT_4 var_978_arg_2 = var_431; + SORT_4 var_978 = var_978_arg_0 ? var_978_arg_1 : var_978_arg_2; + SORT_4 var_432_arg_0 = var_431; + SORT_4 var_432_arg_1 = var_205; + SORT_6 var_432 = ((SORT_6)var_432_arg_0 << 16) | var_432_arg_1; + SORT_6 var_433_arg_0 = var_432; + var_433_arg_0 = (var_433_arg_0 & msb_SORT_6) ? (var_433_arg_0 | ~mask_SORT_6) : (var_433_arg_0 & mask_SORT_6); + SORT_6 var_433_arg_1 = var_207; + SORT_6 var_433 = (int)var_433_arg_0 >> var_433_arg_1; + var_433 = (var_433_arg_0 & msb_SORT_6) ? (var_433 | ~(mask_SORT_6 >> var_433_arg_1)) : var_433; + SORT_6 var_434_arg_0 = var_204; + SORT_6 var_434_arg_1 = var_433; + SORT_1 var_434 = var_434_arg_0 == var_434_arg_1; + SORT_6 var_424_arg_0 = var_204; + SORT_6 var_424_arg_1 = var_423; + SORT_1 var_424 = var_424_arg_0 <= var_424_arg_1; + SORT_1 var_425_arg_0 = var_420; + SORT_1 var_425_arg_1 = ~var_424; + var_425_arg_1 = var_425_arg_1 & mask_SORT_1; + SORT_1 var_425 = var_425_arg_0 & var_425_arg_1; + SORT_1 var_426_arg_0 = ~input_419; + var_426_arg_0 = var_426_arg_0 & mask_SORT_1; + SORT_1 var_426_arg_1 = var_425; + SORT_1 var_426 = var_426_arg_0 | var_426_arg_1; + SORT_4 var_413_arg_0 = var_412; + SORT_4 var_413_arg_1 = var_205; + SORT_6 var_413 = ((SORT_6)var_413_arg_0 << 16) | var_413_arg_1; + SORT_6 var_414_arg_0 = var_413; + var_414_arg_0 = (var_414_arg_0 & msb_SORT_6) ? (var_414_arg_0 | ~mask_SORT_6) : (var_414_arg_0 & mask_SORT_6); + SORT_6 var_414_arg_1 = var_207; + SORT_6 var_414 = (int)var_414_arg_0 >> var_414_arg_1; + var_414 = (var_414_arg_0 & msb_SORT_6) ? (var_414 | ~(mask_SORT_6 >> var_414_arg_1)) : var_414; + SORT_6 var_415_arg_0 = var_213; + SORT_6 var_415_arg_1 = var_414; + SORT_1 var_415 = var_415_arg_0 == var_415_arg_1; + SORT_1 var_416_arg_0 = var_344; + SORT_1 var_416_arg_1 = var_415; + SORT_1 var_416 = var_416_arg_0 & var_416_arg_1; + SORT_1 var_417_arg_0 = ~input_409; + var_417_arg_0 = var_417_arg_0 & mask_SORT_1; + SORT_1 var_417_arg_1 = var_416; + SORT_1 var_417 = var_417_arg_0 | var_417_arg_1; + SORT_6 var_401_arg_0 = var_204; + SORT_6 var_401_arg_1 = var_399; + SORT_6 var_401 = var_401_arg_0 * var_401_arg_1; + SORT_6 var_402_arg_0 = var_249; + SORT_6 var_402_arg_1 = var_401; + SORT_1 var_402 = var_402_arg_0 == var_402_arg_1; + SORT_6 var_400_arg_0 = var_213; + SORT_6 var_400_arg_1 = var_399; + SORT_1 var_400 = var_400_arg_0 <= var_400_arg_1; + SORT_6 var_349_arg_0 = var_204; + SORT_6 var_349_arg_1 = var_347; + SORT_6 var_349 = var_349_arg_0 * var_349_arg_1; + SORT_6 var_894_arg_0 = var_213; + SORT_6 var_894_arg_1 = var_349; + SORT_6 var_894 = var_894_arg_0 + var_894_arg_1; + SORT_6 var_895_arg_0 = var_249; + SORT_6 var_895_arg_1 = var_894; + SORT_1 var_895 = var_895_arg_0 == var_895_arg_1; + SORT_6 var_350_arg_0 = var_249; + SORT_6 var_350_arg_1 = var_349; + SORT_1 var_350 = var_350_arg_0 == var_350_arg_1; + SORT_6 var_348_arg_0 = var_213; + SORT_6 var_348_arg_1 = var_347; + SORT_1 var_348 = var_348_arg_0 <= var_348_arg_1; + SORT_4 var_329_arg_0 = var_328; + SORT_4 var_329_arg_1 = var_205; + SORT_6 var_329 = ((SORT_6)var_329_arg_0 << 16) | var_329_arg_1; + SORT_6 var_330_arg_0 = var_329; + var_330_arg_0 = (var_330_arg_0 & msb_SORT_6) ? (var_330_arg_0 | ~mask_SORT_6) : (var_330_arg_0 & mask_SORT_6); + SORT_6 var_330_arg_1 = var_207; + SORT_6 var_330 = (int)var_330_arg_0 >> var_330_arg_1; + var_330 = (var_330_arg_0 & msb_SORT_6) ? (var_330 | ~(mask_SORT_6 >> var_330_arg_1)) : var_330; + SORT_6 var_331_arg_0 = var_204; + SORT_6 var_331_arg_1 = var_330; + SORT_1 var_331 = var_331_arg_0 == var_331_arg_1; + SORT_1 var_332_arg_0 = var_293; + SORT_1 var_332_arg_1 = var_331; + SORT_1 var_332 = var_332_arg_0 & var_332_arg_1; + SORT_1 var_333_arg_0 = ~input_325; + var_333_arg_0 = var_333_arg_0 & mask_SORT_1; + SORT_1 var_333_arg_1 = var_332; + SORT_1 var_333 = var_333_arg_0 | var_333_arg_1; + SORT_6 var_316_arg_0 = var_249; + SORT_6 var_316_arg_1 = var_314; + SORT_1 var_316 = var_316_arg_0 == var_316_arg_1; + SORT_1 var_317_arg_0 = var_316; + SORT_4 var_317_arg_1 = var_299; + SORT_4 var_317_arg_2 = var_300; + SORT_4 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; + SORT_4 var_318_arg_0 = var_317; + SORT_4 var_318_arg_1 = var_205; + SORT_6 var_318 = ((SORT_6)var_318_arg_0 << 16) | var_318_arg_1; + SORT_6 var_319_arg_0 = var_318; + var_319_arg_0 = (var_319_arg_0 & msb_SORT_6) ? (var_319_arg_0 | ~mask_SORT_6) : (var_319_arg_0 & mask_SORT_6); + SORT_6 var_319_arg_1 = var_207; + SORT_6 var_319 = (int)var_319_arg_0 >> var_319_arg_1; + var_319 = (var_319_arg_0 & msb_SORT_6) ? (var_319 | ~(mask_SORT_6 >> var_319_arg_1)) : var_319; + SORT_6 var_320_arg_0 = var_248; + SORT_6 var_320_arg_1 = var_319; + SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; + SORT_6 var_315_arg_0 = var_204; + SORT_6 var_315_arg_1 = var_314; + SORT_1 var_315 = var_315_arg_0 <= var_315_arg_1; + SORT_1 var_321_arg_0 = ~var_315; + var_321_arg_0 = var_321_arg_0 & mask_SORT_1; + SORT_1 var_321_arg_1 = var_320; + SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; + SORT_1 var_322_arg_0 = var_293; + SORT_1 var_322_arg_1 = var_321; + SORT_1 var_322 = var_322_arg_0 & var_322_arg_1; + SORT_1 var_323_arg_0 = ~input_309; + var_323_arg_0 = var_323_arg_0 & mask_SORT_1; + SORT_1 var_323_arg_1 = var_322; + SORT_1 var_323 = var_323_arg_0 | var_323_arg_1; + SORT_6 var_298_arg_0 = var_249; + SORT_6 var_298_arg_1 = var_296; + SORT_1 var_298 = var_298_arg_0 == var_298_arg_1; + SORT_1 var_301_arg_0 = var_298; + SORT_4 var_301_arg_1 = var_299; + SORT_4 var_301_arg_2 = var_300; + SORT_4 var_301 = var_301_arg_0 ? var_301_arg_1 : var_301_arg_2; + SORT_4 var_302_arg_0 = var_301; + SORT_4 var_302_arg_1 = var_205; + SORT_6 var_302 = ((SORT_6)var_302_arg_0 << 16) | var_302_arg_1; + SORT_6 var_303_arg_0 = var_302; + var_303_arg_0 = (var_303_arg_0 & msb_SORT_6) ? (var_303_arg_0 | ~mask_SORT_6) : (var_303_arg_0 & mask_SORT_6); + SORT_6 var_303_arg_1 = var_207; + SORT_6 var_303 = (int)var_303_arg_0 >> var_303_arg_1; + var_303 = (var_303_arg_0 & msb_SORT_6) ? (var_303 | ~(mask_SORT_6 >> var_303_arg_1)) : var_303; + SORT_6 var_351_arg_0 = var_204; + SORT_6 var_351_arg_1 = var_303; + SORT_6 var_351 = var_351_arg_0 * var_351_arg_1; + SORT_6 var_373_arg_0 = var_213; + SORT_6 var_373_arg_1 = var_351; + SORT_1 var_373 = var_373_arg_0 == var_373_arg_1; + SORT_6 var_353_arg_0 = var_213; + SORT_6 var_353_arg_1 = var_351; + SORT_6 var_353 = var_353_arg_0 + var_353_arg_1; + SORT_6 var_374_arg_0 = var_213; + SORT_6 var_374_arg_1 = var_353; + SORT_1 var_374 = var_374_arg_0 == var_374_arg_1; + SORT_1 var_377_arg_0 = var_374; + SORT_3 var_377_arg_1 = var_357; + SORT_3 var_377_arg_2 = var_358; + SORT_3 var_377 = var_377_arg_0 ? var_377_arg_1 : var_377_arg_2; + SORT_1 var_375_arg_0 = var_373; + SORT_1 var_375_arg_1 = var_374; + SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; + SORT_1 var_376_arg_0 = input_292; + SORT_1 var_376_arg_1 = var_375; + SORT_1 var_376 = var_376_arg_0 & var_376_arg_1; + var_376 = var_376 & mask_SORT_1; + SORT_6 var_354_arg_0 = var_249; + SORT_6 var_354_arg_1 = var_353; + SORT_1 var_354 = var_354_arg_0 == var_354_arg_1; + SORT_1 var_359_arg_0 = var_354; + SORT_3 var_359_arg_1 = var_357; + SORT_3 var_359_arg_2 = var_358; + SORT_3 var_359 = var_359_arg_0 ? var_359_arg_1 : var_359_arg_2; + SORT_6 var_352_arg_0 = var_249; + SORT_6 var_352_arg_1 = var_351; + SORT_1 var_352 = var_352_arg_0 == var_352_arg_1; + SORT_1 var_355_arg_0 = var_352; + SORT_1 var_355_arg_1 = var_354; + SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; + SORT_1 var_356_arg_0 = input_292; + SORT_1 var_356_arg_1 = var_355; + SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; + var_356 = var_356 & mask_SORT_1; + SORT_6 var_304_arg_0 = var_248; + SORT_6 var_304_arg_1 = var_303; + SORT_1 var_304 = var_304_arg_0 == var_304_arg_1; + SORT_6 var_297_arg_0 = var_204; + SORT_6 var_297_arg_1 = var_296; + SORT_1 var_297 = var_297_arg_0 <= var_297_arg_1; + SORT_1 var_305_arg_0 = ~var_297; + var_305_arg_0 = var_305_arg_0 & mask_SORT_1; + SORT_1 var_305_arg_1 = ~var_304; + var_305_arg_1 = var_305_arg_1 & mask_SORT_1; + SORT_1 var_305 = var_305_arg_0 & var_305_arg_1; + SORT_1 var_306_arg_0 = var_293; + SORT_1 var_306_arg_1 = var_305; + SORT_1 var_306 = var_306_arg_0 & var_306_arg_1; + SORT_1 var_307_arg_0 = ~input_292; + var_307_arg_0 = var_307_arg_0 & mask_SORT_1; + SORT_1 var_307_arg_1 = var_306; + SORT_1 var_307 = var_307_arg_0 | var_307_arg_1; + SORT_4 var_286_arg_0 = var_285; + SORT_4 var_286_arg_1 = var_205; + SORT_6 var_286 = ((SORT_6)var_286_arg_0 << 16) | var_286_arg_1; + SORT_6 var_287_arg_0 = var_286; + var_287_arg_0 = (var_287_arg_0 & msb_SORT_6) ? (var_287_arg_0 | ~mask_SORT_6) : (var_287_arg_0 & mask_SORT_6); + SORT_6 var_287_arg_1 = var_207; + SORT_6 var_287 = (int)var_287_arg_0 >> var_287_arg_1; + var_287 = (var_287_arg_0 & msb_SORT_6) ? (var_287 | ~(mask_SORT_6 >> var_287_arg_1)) : var_287; + SORT_6 var_288_arg_0 = var_204; + SORT_6 var_288_arg_1 = var_287; + SORT_1 var_288 = var_288_arg_0 == var_288_arg_1; + SORT_1 var_289_arg_0 = var_243; + SORT_1 var_289_arg_1 = var_288; + SORT_1 var_289 = var_289_arg_0 & var_289_arg_1; + SORT_1 var_290_arg_0 = ~input_282; + var_290_arg_0 = var_290_arg_0 & mask_SORT_1; + SORT_1 var_290_arg_1 = var_289; + SORT_1 var_290 = var_290_arg_0 | var_290_arg_1; + SORT_6 var_273_arg_0 = var_249; + SORT_6 var_273_arg_1 = var_271; + SORT_1 var_273 = var_273_arg_0 == var_273_arg_1; + SORT_1 var_274_arg_0 = var_273; + SORT_4 var_274_arg_1 = var_254; + SORT_4 var_274_arg_2 = var_257; + SORT_4 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; + SORT_4 var_275_arg_0 = var_274; + SORT_4 var_275_arg_1 = var_205; + SORT_6 var_275 = ((SORT_6)var_275_arg_0 << 16) | var_275_arg_1; + SORT_6 var_276_arg_0 = var_275; + var_276_arg_0 = (var_276_arg_0 & msb_SORT_6) ? (var_276_arg_0 | ~mask_SORT_6) : (var_276_arg_0 & mask_SORT_6); + SORT_6 var_276_arg_1 = var_207; + SORT_6 var_276 = (int)var_276_arg_0 >> var_276_arg_1; + var_276 = (var_276_arg_0 & msb_SORT_6) ? (var_276 | ~(mask_SORT_6 >> var_276_arg_1)) : var_276; + SORT_6 var_277_arg_0 = var_248; + SORT_6 var_277_arg_1 = var_276; + SORT_1 var_277 = var_277_arg_0 == var_277_arg_1; + SORT_6 var_272_arg_0 = var_204; + SORT_6 var_272_arg_1 = var_271; + SORT_1 var_272 = var_272_arg_0 <= var_272_arg_1; + SORT_1 var_278_arg_0 = ~var_272; + var_278_arg_0 = var_278_arg_0 & mask_SORT_1; + SORT_1 var_278_arg_1 = var_277; + SORT_1 var_278 = var_278_arg_0 & var_278_arg_1; + SORT_1 var_279_arg_0 = var_243; + SORT_1 var_279_arg_1 = var_278; + SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; + SORT_1 var_280_arg_0 = ~input_266; + var_280_arg_0 = var_280_arg_0 & mask_SORT_1; + SORT_1 var_280_arg_1 = var_279; + SORT_1 var_280 = var_280_arg_0 | var_280_arg_1; + SORT_6 var_250_arg_0 = var_249; + SORT_6 var_250_arg_1 = var_246; + SORT_1 var_250 = var_250_arg_0 == var_250_arg_1; + SORT_1 var_258_arg_0 = var_250; + SORT_4 var_258_arg_1 = var_254; + SORT_4 var_258_arg_2 = var_257; + SORT_4 var_258 = var_258_arg_0 ? var_258_arg_1 : var_258_arg_2; + SORT_4 var_259_arg_0 = var_258; + SORT_4 var_259_arg_1 = var_205; + SORT_6 var_259 = ((SORT_6)var_259_arg_0 << 16) | var_259_arg_1; + SORT_6 var_260_arg_0 = var_259; + var_260_arg_0 = (var_260_arg_0 & msb_SORT_6) ? (var_260_arg_0 | ~mask_SORT_6) : (var_260_arg_0 & mask_SORT_6); + SORT_6 var_260_arg_1 = var_207; + SORT_6 var_260 = (int)var_260_arg_0 >> var_260_arg_1; + var_260 = (var_260_arg_0 & msb_SORT_6) ? (var_260 | ~(mask_SORT_6 >> var_260_arg_1)) : var_260; + SORT_6 var_360_arg_0 = var_204; + SORT_6 var_360_arg_1 = var_260; + SORT_6 var_360 = var_360_arg_0 * var_360_arg_1; + SORT_6 var_378_arg_0 = var_213; + SORT_6 var_378_arg_1 = var_360; + SORT_1 var_378 = var_378_arg_0 == var_378_arg_1; + SORT_6 var_362_arg_0 = var_213; + SORT_6 var_362_arg_1 = var_360; + SORT_6 var_362 = var_362_arg_0 + var_362_arg_1; + SORT_6 var_379_arg_0 = var_213; + SORT_6 var_379_arg_1 = var_362; + SORT_1 var_379 = var_379_arg_0 == var_379_arg_1; + SORT_1 var_382_arg_0 = var_379; + SORT_3 var_382_arg_1 = var_366; + SORT_3 var_382_arg_2 = var_358; + SORT_3 var_382 = var_382_arg_0 ? var_382_arg_1 : var_382_arg_2; + SORT_1 var_380_arg_0 = var_378; + SORT_1 var_380_arg_1 = var_379; + SORT_1 var_380 = var_380_arg_0 | var_380_arg_1; + SORT_1 var_381_arg_0 = input_242; + SORT_1 var_381_arg_1 = var_380; + SORT_1 var_381 = var_381_arg_0 & var_381_arg_1; + var_381 = var_381 & mask_SORT_1; + SORT_6 var_363_arg_0 = var_249; + SORT_6 var_363_arg_1 = var_362; + SORT_1 var_363 = var_363_arg_0 == var_363_arg_1; + SORT_1 var_367_arg_0 = var_363; + SORT_3 var_367_arg_1 = var_366; + SORT_3 var_367_arg_2 = var_358; + SORT_3 var_367 = var_367_arg_0 ? var_367_arg_1 : var_367_arg_2; + SORT_6 var_361_arg_0 = var_249; + SORT_6 var_361_arg_1 = var_360; + SORT_1 var_361 = var_361_arg_0 == var_361_arg_1; + SORT_1 var_364_arg_0 = var_361; + SORT_1 var_364_arg_1 = var_363; + SORT_1 var_364 = var_364_arg_0 | var_364_arg_1; + SORT_1 var_365_arg_0 = input_242; + SORT_1 var_365_arg_1 = var_364; + SORT_1 var_365 = var_365_arg_0 & var_365_arg_1; + var_365 = var_365 & mask_SORT_1; + SORT_6 var_261_arg_0 = var_248; + SORT_6 var_261_arg_1 = var_260; + SORT_1 var_261 = var_261_arg_0 == var_261_arg_1; + SORT_6 var_247_arg_0 = var_204; + SORT_6 var_247_arg_1 = var_246; + SORT_1 var_247 = var_247_arg_0 <= var_247_arg_1; + SORT_1 var_262_arg_0 = ~var_247; + var_262_arg_0 = var_262_arg_0 & mask_SORT_1; + SORT_1 var_262_arg_1 = ~var_261; + var_262_arg_1 = var_262_arg_1 & mask_SORT_1; + SORT_1 var_262 = var_262_arg_0 & var_262_arg_1; + SORT_1 var_263_arg_0 = var_243; + SORT_1 var_263_arg_1 = var_262; + SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; + SORT_1 var_264_arg_0 = ~input_242; + var_264_arg_0 = var_264_arg_0 & mask_SORT_1; + SORT_1 var_264_arg_1 = var_263; + SORT_1 var_264 = var_264_arg_0 | var_264_arg_1; + SORT_4 var_236_arg_0 = var_235; + SORT_4 var_236_arg_1 = var_205; + SORT_6 var_236 = ((SORT_6)var_236_arg_0 << 16) | var_236_arg_1; + SORT_6 var_237_arg_0 = var_236; + var_237_arg_0 = (var_237_arg_0 & msb_SORT_6) ? (var_237_arg_0 | ~mask_SORT_6) : (var_237_arg_0 & mask_SORT_6); + SORT_6 var_237_arg_1 = var_207; + SORT_6 var_237 = (int)var_237_arg_0 >> var_237_arg_1; + var_237 = (var_237_arg_0 & msb_SORT_6) ? (var_237 | ~(mask_SORT_6 >> var_237_arg_1)) : var_237; + SORT_6 var_238_arg_0 = var_204; + SORT_6 var_238_arg_1 = var_237; + SORT_1 var_238 = var_238_arg_0 == var_238_arg_1; + SORT_1 var_239_arg_0 = var_224; + SORT_1 var_239_arg_1 = var_238; + SORT_1 var_239 = var_239_arg_0 & var_239_arg_1; + SORT_1 var_240_arg_0 = ~input_232; + var_240_arg_0 = var_240_arg_0 & mask_SORT_1; + SORT_1 var_240_arg_1 = var_239; + SORT_1 var_240 = var_240_arg_0 | var_240_arg_1; + SORT_6 var_228_arg_0 = var_204; + SORT_6 var_228_arg_1 = var_227; + SORT_1 var_228 = var_228_arg_0 <= var_228_arg_1; + SORT_1 var_229_arg_0 = var_224; + SORT_1 var_229_arg_1 = ~var_228; + var_229_arg_1 = var_229_arg_1 & mask_SORT_1; + SORT_1 var_229 = var_229_arg_0 & var_229_arg_1; + SORT_1 var_230_arg_0 = ~input_223; + var_230_arg_0 = var_230_arg_0 & mask_SORT_1; + SORT_1 var_230_arg_1 = var_229; + SORT_1 var_230 = var_230_arg_0 | var_230_arg_1; + SORT_1 var_231_arg_0 = var_222; + SORT_1 var_231_arg_1 = var_230; + SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; + SORT_1 var_241_arg_0 = var_231; + SORT_1 var_241_arg_1 = var_240; + SORT_1 var_241 = var_241_arg_0 & var_241_arg_1; + SORT_1 var_265_arg_0 = var_241; + SORT_1 var_265_arg_1 = var_264; + SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; + SORT_1 var_281_arg_0 = var_265; + SORT_1 var_281_arg_1 = var_280; + SORT_1 var_281 = var_281_arg_0 & var_281_arg_1; + SORT_1 var_291_arg_0 = var_281; + SORT_1 var_291_arg_1 = var_290; + SORT_1 var_291 = var_291_arg_0 & var_291_arg_1; + SORT_1 var_308_arg_0 = var_291; + SORT_1 var_308_arg_1 = var_307; + SORT_1 var_308 = var_308_arg_0 & var_308_arg_1; + SORT_1 var_324_arg_0 = var_308; + SORT_1 var_324_arg_1 = var_323; + SORT_1 var_324 = var_324_arg_0 & var_324_arg_1; + SORT_1 var_334_arg_0 = var_324; + SORT_1 var_334_arg_1 = var_333; + SORT_1 var_334 = var_334_arg_0 & var_334_arg_1; + SORT_1 var_443_arg_0 = input_212; + SORT_3 var_443_arg_1 = var_94; + SORT_3 var_443_arg_2 = input_161; + SORT_3 var_443 = var_443_arg_0 ? var_443_arg_1 : var_443_arg_2; + SORT_1 var_444_arg_0 = input_325; + SORT_3 var_444_arg_1 = var_442; + SORT_3 var_444_arg_2 = var_443; + SORT_3 var_444 = var_444_arg_0 ? var_444_arg_1 : var_444_arg_2; + SORT_1 var_445_arg_0 = input_335; + SORT_3 var_445_arg_1 = var_337; + SORT_3 var_445_arg_2 = var_444; + SORT_3 var_445 = var_445_arg_0 ? var_445_arg_1 : var_445_arg_2; + SORT_1 var_446_arg_0 = input_428; + SORT_3 var_446_arg_1 = var_94; + SORT_3 var_446_arg_2 = var_445; + SORT_3 var_446 = var_446_arg_0 ? var_446_arg_1 : var_446_arg_2; + SORT_3 var_479_arg_0 = var_337; + SORT_3 var_479_arg_1 = var_446; + SORT_1 var_479 = var_479_arg_0 == var_479_arg_1; + SORT_1 var_752_arg_0 = var_479; + SORT_1 var_752_arg_1 = ~var_751; + var_752_arg_1 = var_752_arg_1 & mask_SORT_1; + SORT_1 var_752 = var_752_arg_0 & var_752_arg_1; + SORT_1 var_753_arg_0 = var_746; + SORT_1 var_753_arg_1 = var_752; + SORT_1 var_753 = var_753_arg_0 & var_753_arg_1; + SORT_1 var_754_arg_0 = ~input_745; + var_754_arg_0 = var_754_arg_0 & mask_SORT_1; + SORT_1 var_754_arg_1 = var_753; + SORT_1 var_754 = var_754_arg_0 | var_754_arg_1; + SORT_1 var_636_arg_0 = var_479; + SORT_1 var_636_arg_1 = ~var_629; + var_636_arg_1 = var_636_arg_1 & mask_SORT_1; + SORT_1 var_636 = var_636_arg_0 & var_636_arg_1; + SORT_1 var_630_arg_0 = var_479; + SORT_1 var_630_arg_1 = var_629; + SORT_1 var_630 = var_630_arg_0 & var_630_arg_1; + SORT_1 var_631_arg_0 = var_625; + SORT_1 var_631_arg_1 = var_630; + SORT_1 var_631 = var_631_arg_0 & var_631_arg_1; + SORT_1 var_632_arg_0 = ~input_622; + var_632_arg_0 = var_632_arg_0 & mask_SORT_1; + SORT_1 var_632_arg_1 = var_631; + SORT_1 var_632 = var_632_arg_0 | var_632_arg_1; + SORT_1 var_590_arg_0 = var_479; + SORT_1 var_590_arg_1 = ~var_589; + var_590_arg_1 = var_590_arg_1 & mask_SORT_1; + SORT_1 var_590 = var_590_arg_0 & var_590_arg_1; + SORT_1 var_591_arg_0 = var_584; + SORT_1 var_591_arg_1 = var_590; + SORT_1 var_591 = var_591_arg_0 & var_591_arg_1; + SORT_1 var_592_arg_0 = ~input_583; + var_592_arg_0 = var_592_arg_0 & mask_SORT_1; + SORT_1 var_592_arg_1 = var_591; + SORT_1 var_592 = var_592_arg_0 | var_592_arg_1; + SORT_1 var_490_arg_0 = var_479; + SORT_1 var_490_arg_1 = ~var_483; + var_490_arg_1 = var_490_arg_1 & mask_SORT_1; + SORT_1 var_490 = var_490_arg_0 & var_490_arg_1; + SORT_1 var_484_arg_0 = var_479; + SORT_1 var_484_arg_1 = var_483; + SORT_1 var_484 = var_484_arg_0 & var_484_arg_1; + SORT_1 var_485_arg_0 = var_478; + SORT_1 var_485_arg_1 = var_484; + SORT_1 var_485 = var_485_arg_0 & var_485_arg_1; + SORT_1 var_486_arg_0 = ~input_475; + var_486_arg_0 = var_486_arg_0 & mask_SORT_1; + SORT_1 var_486_arg_1 = var_485; + SORT_1 var_486 = var_486_arg_0 | var_486_arg_1; + SORT_3 var_447_arg_0 = var_442; + SORT_3 var_447_arg_1 = var_446; + SORT_1 var_447 = var_447_arg_0 == var_447_arg_1; + SORT_1 var_619_arg_0 = var_447; + SORT_1 var_619_arg_1 = var_618; + SORT_1 var_619 = var_619_arg_0 & var_619_arg_1; + SORT_1 var_620_arg_0 = ~input_617; + var_620_arg_0 = var_620_arg_0 & mask_SORT_1; + SORT_1 var_620_arg_1 = var_619; + SORT_1 var_620 = var_620_arg_0 | var_620_arg_1; + SORT_1 var_608_arg_0 = var_447; + SORT_1 var_608_arg_1 = var_607; + SORT_1 var_608 = var_608_arg_0 & var_608_arg_1; + SORT_1 var_613_arg_0 = var_608; + SORT_1 var_613_arg_1 = var_612; + SORT_1 var_613 = var_613_arg_0 & var_613_arg_1; + SORT_1 var_614_arg_0 = var_603; + SORT_1 var_614_arg_1 = var_613; + SORT_1 var_614 = var_614_arg_0 & var_614_arg_1; + SORT_1 var_615_arg_0 = ~input_602; + var_615_arg_0 = var_615_arg_0 & mask_SORT_1; + SORT_1 var_615_arg_1 = var_614; + SORT_1 var_615 = var_615_arg_0 | var_615_arg_1; + SORT_1 var_598_arg_0 = var_447; + SORT_1 var_598_arg_1 = ~var_597; + var_598_arg_1 = var_598_arg_1 & mask_SORT_1; + SORT_1 var_598 = var_598_arg_0 & var_598_arg_1; + SORT_1 var_599_arg_0 = input_195; + SORT_1 var_599_arg_1 = var_598; + SORT_1 var_599 = var_599_arg_0 & var_599_arg_1; + SORT_1 var_600_arg_0 = ~input_594; + var_600_arg_0 = var_600_arg_0 & mask_SORT_1; + SORT_1 var_600_arg_1 = var_599; + SORT_1 var_600 = var_600_arg_0 | var_600_arg_1; + SORT_1 var_472_arg_0 = var_447; + SORT_1 var_472_arg_1 = var_471; + SORT_1 var_472 = var_472_arg_0 & var_472_arg_1; + SORT_1 var_473_arg_0 = ~input_470; + var_473_arg_0 = var_473_arg_0 & mask_SORT_1; + SORT_1 var_473_arg_1 = var_472; + SORT_1 var_473 = var_473_arg_0 | var_473_arg_1; + SORT_1 var_461_arg_0 = var_447; + SORT_1 var_461_arg_1 = var_460; + SORT_1 var_461 = var_461_arg_0 & var_461_arg_1; + SORT_1 var_466_arg_0 = var_461; + SORT_1 var_466_arg_1 = var_465; + SORT_1 var_466 = var_466_arg_0 & var_466_arg_1; + SORT_1 var_467_arg_0 = var_456; + SORT_1 var_467_arg_1 = var_466; + SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; + SORT_1 var_468_arg_0 = ~input_455; + var_468_arg_0 = var_468_arg_0 & mask_SORT_1; + SORT_1 var_468_arg_1 = var_467; + SORT_1 var_468 = var_468_arg_0 | var_468_arg_1; + SORT_1 var_451_arg_0 = var_447; + SORT_1 var_451_arg_1 = ~var_450; + var_451_arg_1 = var_451_arg_1 & mask_SORT_1; + SORT_1 var_451 = var_451_arg_0 & var_451_arg_1; + SORT_1 var_452_arg_0 = input_189; + SORT_1 var_452_arg_1 = var_451; + SORT_1 var_452 = var_452_arg_0 & var_452_arg_1; + SORT_1 var_453_arg_0 = ~input_441; + var_453_arg_0 = var_453_arg_0 & mask_SORT_1; + SORT_1 var_453_arg_1 = var_452; + SORT_1 var_453 = var_453_arg_0 | var_453_arg_1; + SORT_1 var_385_arg_0 = var_384; + SORT_3 var_385_arg_1 = var_94; + SORT_3 var_385_arg_2 = input_145; + SORT_3 var_385 = var_385_arg_0 ? var_385_arg_1 : var_385_arg_2; + SORT_1 var_386_arg_0 = var_381; + SORT_3 var_386_arg_1 = var_382; + SORT_3 var_386_arg_2 = var_385; + SORT_3 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2; + SORT_1 var_387_arg_0 = var_376; + SORT_3 var_387_arg_1 = var_377; + SORT_3 var_387_arg_2 = var_386; + SORT_3 var_387 = var_387_arg_0 ? var_387_arg_1 : var_387_arg_2; + SORT_1 var_939_arg_0 = var_938; + SORT_3 var_939_arg_1 = var_94; + SORT_3 var_939_arg_2 = var_387; + SORT_3 var_939 = var_939_arg_0 ? var_939_arg_1 : var_939_arg_2; + SORT_1 var_940_arg_0 = var_934; + SORT_3 var_940_arg_1 = var_94; + SORT_3 var_940_arg_2 = var_939; + SORT_3 var_940 = var_940_arg_0 ? var_940_arg_1 : var_940_arg_2; + SORT_1 var_370_arg_0 = var_369; + SORT_3 var_370_arg_1 = var_94; + SORT_3 var_370_arg_2 = input_143; + SORT_3 var_370 = var_370_arg_0 ? var_370_arg_1 : var_370_arg_2; + SORT_1 var_371_arg_0 = var_365; + SORT_3 var_371_arg_1 = var_367; + SORT_3 var_371_arg_2 = var_370; + SORT_3 var_371 = var_371_arg_0 ? var_371_arg_1 : var_371_arg_2; + SORT_1 var_372_arg_0 = var_356; + SORT_3 var_372_arg_1 = var_359; + SORT_3 var_372_arg_2 = var_371; + SORT_3 var_372 = var_372_arg_0 ? var_372_arg_1 : var_372_arg_2; + SORT_1 var_927_arg_0 = var_926; + SORT_3 var_927_arg_1 = var_94; + SORT_3 var_927_arg_2 = var_372; + SORT_3 var_927 = var_927_arg_0 ? var_927_arg_1 : var_927_arg_2; + SORT_1 var_928_arg_0 = var_921; + SORT_3 var_928_arg_1 = var_94; + SORT_3 var_928_arg_2 = var_927; + SORT_3 var_928 = var_928_arg_0 ? var_928_arg_1 : var_928_arg_2; + SORT_1 var_896_arg_0 = var_895; + SORT_3 var_896_arg_1 = var_372; + SORT_3 var_896_arg_2 = var_387; + SORT_3 var_896 = var_896_arg_0 ? var_896_arg_1 : var_896_arg_2; + SORT_5 var_897_arg_0 = var_491; + SORT_3 var_897_arg_1 = var_896; + SORT_6 var_897 = ((SORT_6)var_897_arg_0 << 8) | var_897_arg_1; + SORT_6 var_898_arg_0 = var_347; + SORT_6 var_898_arg_1 = var_897; + SORT_6 var_898 = var_898_arg_0 + var_898_arg_1; + SORT_6 var_905_arg_0 = var_213; + SORT_6 var_905_arg_1 = var_898; + SORT_1 var_905 = var_905_arg_0 == var_905_arg_1; + SORT_1 var_906_arg_0 = input_343; + SORT_1 var_906_arg_1 = var_905; + SORT_1 var_906 = var_906_arg_0 & var_906_arg_1; + var_906 = var_906 & mask_SORT_1; + SORT_1 var_914_arg_0 = var_906; + SORT_3 var_914_arg_1 = var_94; + SORT_3 var_914_arg_2 = input_141; + SORT_3 var_914 = var_914_arg_0 ? var_914_arg_1 : var_914_arg_2; + SORT_1 var_907_arg_0 = var_906; + SORT_3 var_907_arg_1 = var_94; + SORT_3 var_907_arg_2 = input_137; + SORT_3 var_907 = var_907_arg_0 ? var_907_arg_1 : var_907_arg_2; + SORT_1 var_908_arg_0 = input_602; + SORT_3 var_908_arg_1 = var_358; + SORT_3 var_908_arg_2 = var_907; + SORT_3 var_908 = var_908_arg_0 ? var_908_arg_1 : var_908_arg_2; + SORT_6 var_899_arg_0 = var_249; + SORT_6 var_899_arg_1 = var_898; + SORT_1 var_899 = var_899_arg_0 == var_899_arg_1; + SORT_1 var_900_arg_0 = input_343; + SORT_1 var_900_arg_1 = var_899; + SORT_1 var_900 = var_900_arg_0 & var_900_arg_1; + var_900 = var_900 & mask_SORT_1; + SORT_1 var_911_arg_0 = var_900; + SORT_3 var_911_arg_1 = var_94; + SORT_3 var_911_arg_2 = input_139; + SORT_3 var_911 = var_911_arg_0 ? var_911_arg_1 : var_911_arg_2; + SORT_1 var_901_arg_0 = var_900; + SORT_3 var_901_arg_1 = var_94; + SORT_3 var_901_arg_2 = input_135; + SORT_3 var_901 = var_901_arg_0 ? var_901_arg_1 : var_901_arg_2; + SORT_1 var_902_arg_0 = input_455; + SORT_3 var_902_arg_1 = var_358; + SORT_3 var_902_arg_2 = var_901; + SORT_3 var_902 = var_902_arg_0 ? var_902_arg_1 : var_902_arg_2; + SORT_1 var_403_arg_0 = var_402; + SORT_3 var_403_arg_1 = var_372; + SORT_3 var_403_arg_2 = var_387; + SORT_3 var_403 = var_403_arg_0 ? var_403_arg_1 : var_403_arg_2; + SORT_3 var_404_arg_0 = var_94; + SORT_3 var_404_arg_1 = var_403; + SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; + SORT_1 var_405_arg_0 = ~var_400; + var_405_arg_0 = var_405_arg_0 & mask_SORT_1; + SORT_1 var_405_arg_1 = var_404; + SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; + SORT_1 var_406_arg_0 = var_344; + SORT_1 var_406_arg_1 = var_405; + SORT_1 var_406 = var_406_arg_0 & var_406_arg_1; + SORT_1 var_407_arg_0 = ~input_394; + var_407_arg_0 = var_407_arg_0 & mask_SORT_1; + SORT_1 var_407_arg_1 = var_406; + SORT_1 var_407 = var_407_arg_0 | var_407_arg_1; + SORT_1 var_388_arg_0 = var_350; + SORT_3 var_388_arg_1 = var_372; + SORT_3 var_388_arg_2 = var_387; + SORT_3 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2; + SORT_3 var_389_arg_0 = var_94; + SORT_3 var_389_arg_1 = var_388; + SORT_1 var_389 = var_389_arg_0 == var_389_arg_1; + SORT_1 var_390_arg_0 = ~var_348; + var_390_arg_0 = var_390_arg_0 & mask_SORT_1; + SORT_1 var_390_arg_1 = ~var_389; + var_390_arg_1 = var_390_arg_1 & mask_SORT_1; + SORT_1 var_390 = var_390_arg_0 & var_390_arg_1; + SORT_1 var_391_arg_0 = var_344; + SORT_1 var_391_arg_1 = var_390; + SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; + SORT_1 var_392_arg_0 = ~input_343; + var_392_arg_0 = var_392_arg_0 & mask_SORT_1; + SORT_1 var_392_arg_1 = var_391; + SORT_1 var_392 = var_392_arg_0 | var_392_arg_1; + SORT_1 var_338_arg_0 = input_325; + SORT_3 var_338_arg_1 = var_94; + SORT_3 var_338_arg_2 = input_163; + SORT_3 var_338 = var_338_arg_0 ? var_338_arg_1 : var_338_arg_2; + SORT_1 var_435_arg_0 = input_335; + SORT_3 var_435_arg_1 = var_94; + SORT_3 var_435_arg_2 = var_338; + SORT_3 var_435 = var_435_arg_0 ? var_435_arg_1 : var_435_arg_2; + SORT_5 var_492_arg_0 = var_491; + SORT_3 var_492_arg_1 = var_435; + SORT_6 var_492 = ((SORT_6)var_492_arg_0 << 8) | var_492_arg_1; + SORT_6 var_493_arg_0 = var_213; + SORT_6 var_493_arg_1 = var_492; + SORT_6 var_493 = var_493_arg_0 + var_493_arg_1; + SORT_6 var_494_arg_0 = var_493; + SORT_3 var_494 = var_494_arg_0 >> 0; + SORT_1 var_495_arg_0 = input_441; + SORT_3 var_495_arg_1 = var_494; + SORT_3 var_495_arg_2 = var_435; + SORT_3 var_495 = var_495_arg_0 ? var_495_arg_1 : var_495_arg_2; + SORT_5 var_496_arg_0 = var_491; + SORT_3 var_496_arg_1 = var_495; + SORT_6 var_496 = ((SORT_6)var_496_arg_0 << 8) | var_496_arg_1; + SORT_6 var_497_arg_0 = var_213; + SORT_6 var_497_arg_1 = var_496; + SORT_6 var_497 = var_497_arg_0 + var_497_arg_1; + SORT_6 var_498_arg_0 = var_497; + SORT_3 var_498 = var_498_arg_0 >> 0; + SORT_1 var_499_arg_0 = input_455; + SORT_3 var_499_arg_1 = var_498; + SORT_3 var_499_arg_2 = var_495; + SORT_3 var_499 = var_499_arg_0 ? var_499_arg_1 : var_499_arg_2; + SORT_5 var_500_arg_0 = var_491; + SORT_3 var_500_arg_1 = var_499; + SORT_6 var_500 = ((SORT_6)var_500_arg_0 << 8) | var_500_arg_1; + SORT_6 var_501_arg_0 = var_213; + SORT_6 var_501_arg_1 = var_500; + SORT_6 var_501 = var_501_arg_0 + var_501_arg_1; + SORT_6 var_502_arg_0 = var_501; + SORT_3 var_502 = var_502_arg_0 >> 0; + SORT_1 var_503_arg_0 = input_470; + SORT_3 var_503_arg_1 = var_502; + SORT_3 var_503_arg_2 = var_499; + SORT_3 var_503 = var_503_arg_0 ? var_503_arg_1 : var_503_arg_2; + SORT_5 var_504_arg_0 = var_491; + SORT_3 var_504_arg_1 = var_503; + SORT_6 var_504 = ((SORT_6)var_504_arg_0 << 8) | var_504_arg_1; + SORT_6 var_505_arg_0 = var_213; + SORT_6 var_505_arg_1 = var_504; + SORT_6 var_505 = var_505_arg_0 + var_505_arg_1; + SORT_6 var_506_arg_0 = var_505; + SORT_3 var_506 = var_506_arg_0 >> 0; + SORT_1 var_507_arg_0 = input_475; + SORT_3 var_507_arg_1 = var_506; + SORT_3 var_507_arg_2 = var_503; + SORT_3 var_507 = var_507_arg_0 ? var_507_arg_1 : var_507_arg_2; + SORT_5 var_637_arg_0 = var_491; + SORT_3 var_637_arg_1 = var_507; + SORT_6 var_637 = ((SORT_6)var_637_arg_0 << 8) | var_637_arg_1; + SORT_6 var_638_arg_0 = var_213; + SORT_6 var_638_arg_1 = var_637; + SORT_6 var_638 = var_638_arg_0 + var_638_arg_1; + SORT_6 var_639_arg_0 = var_638; + SORT_3 var_639 = var_639_arg_0 >> 0; + SORT_1 var_640_arg_0 = input_533; + SORT_3 var_640_arg_1 = var_639; + SORT_3 var_640_arg_2 = var_507; + SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; + SORT_5 var_641_arg_0 = var_491; + SORT_3 var_641_arg_1 = var_640; + SORT_6 var_641 = ((SORT_6)var_641_arg_0 << 8) | var_641_arg_1; + SORT_6 var_642_arg_0 = var_213; + SORT_6 var_642_arg_1 = var_641; + SORT_6 var_642 = var_642_arg_0 + var_642_arg_1; + SORT_6 var_643_arg_0 = var_642; + SORT_3 var_643 = var_643_arg_0 >> 0; + SORT_1 var_644_arg_0 = input_554; + SORT_3 var_644_arg_1 = var_643; + SORT_3 var_644_arg_2 = var_640; + SORT_3 var_644 = var_644_arg_0 ? var_644_arg_1 : var_644_arg_2; + SORT_5 var_645_arg_0 = var_491; + SORT_3 var_645_arg_1 = var_644; + SORT_6 var_645 = ((SORT_6)var_645_arg_0 << 8) | var_645_arg_1; + SORT_6 var_646_arg_0 = var_213; + SORT_6 var_646_arg_1 = var_645; + SORT_6 var_646 = var_646_arg_0 + var_646_arg_1; + SORT_6 var_647_arg_0 = var_646; + SORT_3 var_647 = var_647_arg_0 >> 0; + SORT_1 var_648_arg_0 = input_569; + SORT_3 var_648_arg_1 = var_647; + SORT_3 var_648_arg_2 = var_644; + SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; + SORT_5 var_649_arg_0 = var_491; + SORT_3 var_649_arg_1 = var_648; + SORT_6 var_649 = ((SORT_6)var_649_arg_0 << 8) | var_649_arg_1; + SORT_6 var_650_arg_0 = var_213; + SORT_6 var_650_arg_1 = var_649; + SORT_6 var_650 = var_650_arg_0 + var_650_arg_1; + SORT_6 var_651_arg_0 = var_650; + SORT_3 var_651 = var_651_arg_0 >> 0; + SORT_1 var_652_arg_0 = input_583; + SORT_3 var_652_arg_1 = var_651; + SORT_3 var_652_arg_2 = var_648; + SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; + SORT_5 var_653_arg_0 = var_491; + SORT_3 var_653_arg_1 = var_652; + SORT_6 var_653 = ((SORT_6)var_653_arg_0 << 8) | var_653_arg_1; + SORT_6 var_654_arg_0 = var_213; + SORT_6 var_654_arg_1 = var_653; + SORT_6 var_654 = var_654_arg_0 + var_654_arg_1; + SORT_6 var_655_arg_0 = var_654; + SORT_3 var_655 = var_655_arg_0 >> 0; + SORT_1 var_656_arg_0 = input_594; + SORT_3 var_656_arg_1 = var_655; + SORT_3 var_656_arg_2 = var_652; + SORT_3 var_656 = var_656_arg_0 ? var_656_arg_1 : var_656_arg_2; + SORT_5 var_657_arg_0 = var_491; + SORT_3 var_657_arg_1 = var_656; + SORT_6 var_657 = ((SORT_6)var_657_arg_0 << 8) | var_657_arg_1; + SORT_6 var_658_arg_0 = var_213; + SORT_6 var_658_arg_1 = var_657; + SORT_6 var_658 = var_658_arg_0 + var_658_arg_1; + SORT_6 var_659_arg_0 = var_658; + SORT_3 var_659 = var_659_arg_0 >> 0; + SORT_1 var_660_arg_0 = input_602; + SORT_3 var_660_arg_1 = var_659; + SORT_3 var_660_arg_2 = var_656; + SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; + SORT_5 var_661_arg_0 = var_491; + SORT_3 var_661_arg_1 = var_660; + SORT_6 var_661 = ((SORT_6)var_661_arg_0 << 8) | var_661_arg_1; + SORT_6 var_662_arg_0 = var_213; + SORT_6 var_662_arg_1 = var_661; + SORT_6 var_662 = var_662_arg_0 + var_662_arg_1; + SORT_6 var_663_arg_0 = var_662; + SORT_3 var_663 = var_663_arg_0 >> 0; + SORT_1 var_664_arg_0 = input_617; + SORT_3 var_664_arg_1 = var_663; + SORT_3 var_664_arg_2 = var_660; + SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; + SORT_5 var_665_arg_0 = var_491; + SORT_3 var_665_arg_1 = var_664; + SORT_6 var_665 = ((SORT_6)var_665_arg_0 << 8) | var_665_arg_1; + SORT_6 var_666_arg_0 = var_213; + SORT_6 var_666_arg_1 = var_665; + SORT_6 var_666 = var_666_arg_0 + var_666_arg_1; + SORT_6 var_667_arg_0 = var_666; + SORT_3 var_667 = var_667_arg_0 >> 0; + SORT_1 var_668_arg_0 = input_622; + SORT_3 var_668_arg_1 = var_667; + SORT_3 var_668_arg_2 = var_664; + SORT_3 var_668 = var_668_arg_0 ? var_668_arg_1 : var_668_arg_2; + SORT_5 var_960_arg_0 = var_491; + SORT_3 var_960_arg_1 = var_668; + SORT_6 var_960 = ((SORT_6)var_960_arg_0 << 8) | var_960_arg_1; + SORT_6 var_961_arg_0 = var_213; + SORT_6 var_961_arg_1 = var_960; + SORT_6 var_961 = var_961_arg_0 + var_961_arg_1; + SORT_6 var_962_arg_0 = var_961; + SORT_3 var_962 = var_962_arg_0 >> 0; + SORT_1 var_963_arg_0 = input_695; + SORT_3 var_963_arg_1 = var_962; + SORT_3 var_963_arg_2 = var_668; + SORT_3 var_963 = var_963_arg_0 ? var_963_arg_1 : var_963_arg_2; + SORT_5 var_964_arg_0 = var_491; + SORT_3 var_964_arg_1 = var_963; + SORT_6 var_964 = ((SORT_6)var_964_arg_0 << 8) | var_964_arg_1; + SORT_6 var_965_arg_0 = var_213; + SORT_6 var_965_arg_1 = var_964; + SORT_6 var_965 = var_965_arg_0 + var_965_arg_1; + SORT_6 var_966_arg_0 = var_965; + SORT_3 var_966 = var_966_arg_0 >> 0; + SORT_1 var_967_arg_0 = input_716; + SORT_3 var_967_arg_1 = var_966; + SORT_3 var_967_arg_2 = var_963; + SORT_3 var_967 = var_967_arg_0 ? var_967_arg_1 : var_967_arg_2; + SORT_5 var_968_arg_0 = var_491; + SORT_3 var_968_arg_1 = var_967; + SORT_6 var_968 = ((SORT_6)var_968_arg_0 << 8) | var_968_arg_1; + SORT_6 var_969_arg_0 = var_213; + SORT_6 var_969_arg_1 = var_968; + SORT_6 var_969 = var_969_arg_0 + var_969_arg_1; + SORT_6 var_970_arg_0 = var_969; + SORT_3 var_970 = var_970_arg_0 >> 0; + SORT_1 var_971_arg_0 = input_731; + SORT_3 var_971_arg_1 = var_970; + SORT_3 var_971_arg_2 = var_967; + SORT_3 var_971 = var_971_arg_0 ? var_971_arg_1 : var_971_arg_2; + SORT_5 var_972_arg_0 = var_491; + SORT_3 var_972_arg_1 = var_971; + SORT_6 var_972 = ((SORT_6)var_972_arg_0 << 8) | var_972_arg_1; + SORT_6 var_973_arg_0 = var_213; + SORT_6 var_973_arg_1 = var_972; + SORT_6 var_973 = var_973_arg_0 + var_973_arg_1; + SORT_6 var_974_arg_0 = var_973; + SORT_3 var_974 = var_974_arg_0 >> 0; + SORT_1 var_975_arg_0 = input_745; + SORT_3 var_975_arg_1 = var_974; + SORT_3 var_975_arg_2 = var_971; + SORT_3 var_975 = var_975_arg_0 ? var_975_arg_1 : var_975_arg_2; + SORT_3 var_669_arg_0 = var_442; + SORT_3 var_669_arg_1 = var_668; + SORT_1 var_669 = var_669_arg_0 == var_669_arg_1; + SORT_1 var_670_arg_0 = var_636; + SORT_1 var_670_arg_1 = var_669; + SORT_1 var_670 = var_670_arg_0 & var_670_arg_1; + SORT_1 var_671_arg_0 = var_635; + SORT_1 var_671_arg_1 = var_670; + SORT_1 var_671 = var_671_arg_0 & var_671_arg_1; + SORT_1 var_672_arg_0 = ~input_634; + var_672_arg_0 = var_672_arg_0 & mask_SORT_1; + SORT_1 var_672_arg_1 = var_671; + SORT_1 var_672 = var_672_arg_0 | var_672_arg_1; + SORT_3 var_508_arg_0 = var_94; + SORT_3 var_508_arg_1 = var_507; + SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; + SORT_1 var_509_arg_0 = var_490; + SORT_1 var_509_arg_1 = var_508; + SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; + SORT_1 var_510_arg_0 = var_489; + SORT_1 var_510_arg_1 = var_509; + SORT_1 var_510 = var_510_arg_0 & var_510_arg_1; + SORT_1 var_511_arg_0 = ~input_488; + var_511_arg_0 = var_511_arg_0 & mask_SORT_1; + SORT_1 var_511_arg_1 = var_510; + SORT_1 var_511 = var_511_arg_0 | var_511_arg_1; + SORT_3 var_436_arg_0 = var_337; + SORT_3 var_436_arg_1 = var_435; + SORT_1 var_436 = var_436_arg_0 == var_436_arg_1; + SORT_1 var_437_arg_0 = var_434; + SORT_1 var_437_arg_1 = var_436; + SORT_1 var_437 = var_437_arg_0 & var_437_arg_1; + SORT_1 var_438_arg_0 = var_420; + SORT_1 var_438_arg_1 = var_437; + SORT_1 var_438 = var_438_arg_0 & var_438_arg_1; + SORT_1 var_439_arg_0 = ~input_428; + var_439_arg_0 = var_439_arg_0 & mask_SORT_1; + SORT_1 var_439_arg_1 = var_438; + SORT_1 var_439 = var_439_arg_0 | var_439_arg_1; + SORT_3 var_339_arg_0 = var_337; + SORT_3 var_339_arg_1 = var_338; + SORT_1 var_339 = var_339_arg_0 == var_339_arg_1; + SORT_1 var_340_arg_0 = var_336; + SORT_1 var_340_arg_1 = var_339; + SORT_1 var_340 = var_340_arg_0 & var_340_arg_1; + SORT_1 var_341_arg_0 = ~input_335; + var_341_arg_0 = var_341_arg_0 & mask_SORT_1; + SORT_1 var_341_arg_1 = var_340; + SORT_1 var_341 = var_341_arg_0 | var_341_arg_1; + SORT_1 var_342_arg_0 = var_334; + SORT_1 var_342_arg_1 = var_341; + SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; + SORT_1 var_393_arg_0 = var_342; + SORT_1 var_393_arg_1 = var_392; + SORT_1 var_393 = var_393_arg_0 & var_393_arg_1; + SORT_1 var_408_arg_0 = var_393; + SORT_1 var_408_arg_1 = var_407; + SORT_1 var_408 = var_408_arg_0 & var_408_arg_1; + SORT_1 var_418_arg_0 = var_408; + SORT_1 var_418_arg_1 = var_417; + SORT_1 var_418 = var_418_arg_0 & var_418_arg_1; + SORT_1 var_427_arg_0 = var_418; + SORT_1 var_427_arg_1 = var_426; + SORT_1 var_427 = var_427_arg_0 & var_427_arg_1; + SORT_1 var_440_arg_0 = var_427; + SORT_1 var_440_arg_1 = var_439; + SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; + SORT_1 var_454_arg_0 = var_440; + SORT_1 var_454_arg_1 = var_453; + SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; + SORT_1 var_469_arg_0 = var_454; + SORT_1 var_469_arg_1 = var_468; + SORT_1 var_469 = var_469_arg_0 & var_469_arg_1; + SORT_1 var_474_arg_0 = var_469; + SORT_1 var_474_arg_1 = var_473; + SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; + SORT_1 var_487_arg_0 = var_474; + SORT_1 var_487_arg_1 = var_486; + SORT_1 var_487 = var_487_arg_0 & var_487_arg_1; + SORT_1 var_512_arg_0 = var_487; + SORT_1 var_512_arg_1 = var_511; + SORT_1 var_512 = var_512_arg_0 & var_512_arg_1; + SORT_1 var_532_arg_0 = var_512; + SORT_1 var_532_arg_1 = var_531; + SORT_1 var_532 = var_532_arg_0 & var_532_arg_1; + SORT_1 var_553_arg_0 = var_532; + SORT_1 var_553_arg_1 = var_552; + SORT_1 var_553 = var_553_arg_0 & var_553_arg_1; + SORT_1 var_568_arg_0 = var_553; + SORT_1 var_568_arg_1 = var_567; + SORT_1 var_568 = var_568_arg_0 & var_568_arg_1; + SORT_1 var_582_arg_0 = var_568; + SORT_1 var_582_arg_1 = var_581; + SORT_1 var_582 = var_582_arg_0 & var_582_arg_1; + SORT_1 var_593_arg_0 = var_582; + SORT_1 var_593_arg_1 = var_592; + SORT_1 var_593 = var_593_arg_0 & var_593_arg_1; + SORT_1 var_601_arg_0 = var_593; + SORT_1 var_601_arg_1 = var_600; + SORT_1 var_601 = var_601_arg_0 & var_601_arg_1; + SORT_1 var_616_arg_0 = var_601; + SORT_1 var_616_arg_1 = var_615; + SORT_1 var_616 = var_616_arg_0 & var_616_arg_1; + SORT_1 var_621_arg_0 = var_616; + SORT_1 var_621_arg_1 = var_620; + SORT_1 var_621 = var_621_arg_0 & var_621_arg_1; + SORT_1 var_633_arg_0 = var_621; + SORT_1 var_633_arg_1 = var_632; + SORT_1 var_633 = var_633_arg_0 & var_633_arg_1; + SORT_1 var_673_arg_0 = var_633; + SORT_1 var_673_arg_1 = var_672; + SORT_1 var_673 = var_673_arg_0 & var_673_arg_1; + SORT_1 var_694_arg_0 = var_673; + SORT_1 var_694_arg_1 = var_693; + SORT_1 var_694 = var_694_arg_0 & var_694_arg_1; + SORT_1 var_715_arg_0 = var_694; + SORT_1 var_715_arg_1 = var_714; + SORT_1 var_715 = var_715_arg_0 & var_715_arg_1; + SORT_1 var_730_arg_0 = var_715; + SORT_1 var_730_arg_1 = var_729; + SORT_1 var_730 = var_730_arg_0 & var_730_arg_1; + SORT_1 var_744_arg_0 = var_730; + SORT_1 var_744_arg_1 = var_743; + SORT_1 var_744 = var_744_arg_0 & var_744_arg_1; + SORT_1 var_755_arg_0 = var_744; + SORT_1 var_755_arg_1 = var_754; + SORT_1 var_755 = var_755_arg_0 & var_755_arg_1; + SORT_1 var_791_arg_0 = var_755; + SORT_1 var_791_arg_1 = var_790; + SORT_1 var_791 = var_791_arg_0 & var_791_arg_1; + SORT_1 var_830_arg_0 = var_791; + SORT_1 var_830_arg_1 = var_829; + SORT_1 var_830 = var_830_arg_0 & var_830_arg_1; + SORT_1 var_893_arg_0 = var_830; + SORT_1 var_893_arg_1 = var_892; + SORT_1 var_893 = var_893_arg_0 & var_893_arg_1; + SORT_1 var_1015_arg_0 = var_886; + SORT_1 var_1015_arg_1 = state_74; + SORT_1 var_1015 = var_1015_arg_0 == var_1015_arg_1; + SORT_1 var_1013_arg_0 = var_884; + SORT_1 var_1013_arg_1 = state_72; + SORT_1 var_1013 = var_1013_arg_0 == var_1013_arg_1; + SORT_1 var_1011_arg_0 = var_883; + SORT_1 var_1011_arg_1 = state_70; + SORT_1 var_1011 = var_1011_arg_0 == var_1011_arg_1; + SORT_1 var_1009_arg_0 = var_871; + SORT_1 var_1009_arg_1 = state_68; + SORT_1 var_1009 = var_1009_arg_0 == var_1009_arg_1; + SORT_1 var_1007_arg_0 = var_869; + SORT_1 var_1007_arg_1 = state_66; + SORT_1 var_1007 = var_1007_arg_0 == var_1007_arg_1; + SORT_1 var_1005_arg_0 = var_868; + SORT_1 var_1005_arg_1 = state_64; + SORT_1 var_1005 = var_1005_arg_0 == var_1005_arg_1; + SORT_1 var_1003_arg_0 = input_187; + SORT_1 var_1003_arg_1 = state_62; + SORT_1 var_1003 = var_1003_arg_0 == var_1003_arg_1; + SORT_1 var_1001_arg_0 = var_854; + SORT_1 var_1001_arg_1 = state_60; + SORT_1 var_1001 = var_1001_arg_0 == var_1001_arg_1; + SORT_1 var_999_arg_0 = var_850; + SORT_1 var_999_arg_1 = state_58; + SORT_1 var_999 = var_999_arg_0 == var_999_arg_1; + SORT_1 var_997_arg_0 = var_846; + SORT_1 var_997_arg_1 = state_56; + SORT_1 var_997 = var_997_arg_0 == var_997_arg_1; + SORT_1 var_995_arg_0 = input_179; + SORT_1 var_995_arg_1 = state_54; + SORT_1 var_995 = var_995_arg_0 == var_995_arg_1; + SORT_1 var_993_arg_0 = var_839; + SORT_1 var_993_arg_1 = state_52; + SORT_1 var_993 = var_993_arg_0 == var_993_arg_1; + SORT_1 var_991_arg_0 = var_835; + SORT_1 var_991_arg_1 = state_50; + SORT_1 var_991 = var_991_arg_0 == var_991_arg_1; + SORT_1 var_989_arg_0 = var_833; + SORT_1 var_989_arg_1 = state_48; + SORT_1 var_989 = var_989_arg_0 == var_989_arg_1; + SORT_1 var_987_arg_0 = var_831; + SORT_1 var_987_arg_1 = state_46; + SORT_1 var_987 = var_987_arg_0 == var_987_arg_1; + SORT_1 var_80_arg_0 = state_46; + SORT_1 var_80_arg_1 = ~state_48; + var_80_arg_1 = var_80_arg_1 & mask_SORT_1; + SORT_1 var_80 = var_80_arg_0 & var_80_arg_1; + SORT_1 var_81_arg_0 = var_80; + SORT_1 var_81_arg_1 = ~state_50; + var_81_arg_1 = var_81_arg_1 & mask_SORT_1; + SORT_1 var_81 = var_81_arg_0 & var_81_arg_1; + SORT_1 var_82_arg_0 = var_81; + SORT_1 var_82_arg_1 = ~state_52; + var_82_arg_1 = var_82_arg_1 & mask_SORT_1; + SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; + SORT_1 var_83_arg_0 = var_82; + SORT_1 var_83_arg_1 = ~state_54; + var_83_arg_1 = var_83_arg_1 & mask_SORT_1; + SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; + SORT_1 var_84_arg_0 = var_83; + SORT_1 var_84_arg_1 = ~state_56; + var_84_arg_1 = var_84_arg_1 & mask_SORT_1; + SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; + SORT_1 var_85_arg_0 = var_84; + SORT_1 var_85_arg_1 = ~state_58; + var_85_arg_1 = var_85_arg_1 & mask_SORT_1; + SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; + SORT_1 var_86_arg_0 = var_85; + SORT_1 var_86_arg_1 = ~state_60; + var_86_arg_1 = var_86_arg_1 & mask_SORT_1; + SORT_1 var_86 = var_86_arg_0 & var_86_arg_1; + SORT_1 var_87_arg_0 = var_86; + SORT_1 var_87_arg_1 = ~state_62; + var_87_arg_1 = var_87_arg_1 & mask_SORT_1; + SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; + SORT_1 var_88_arg_0 = var_87; + SORT_1 var_88_arg_1 = state_64; + SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; + SORT_1 var_89_arg_0 = var_88; + SORT_1 var_89_arg_1 = ~state_66; + var_89_arg_1 = var_89_arg_1 & mask_SORT_1; + SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; + SORT_1 var_90_arg_0 = var_89; + SORT_1 var_90_arg_1 = ~state_68; + var_90_arg_1 = var_90_arg_1 & mask_SORT_1; + SORT_1 var_90 = var_90_arg_0 & var_90_arg_1; + SORT_1 var_91_arg_0 = var_90; + SORT_1 var_91_arg_1 = state_70; + SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; + SORT_1 var_92_arg_0 = var_91; + SORT_1 var_92_arg_1 = ~state_72; + var_92_arg_1 = var_92_arg_1 & mask_SORT_1; + SORT_1 var_92 = var_92_arg_0 & var_92_arg_1; + SORT_1 var_93_arg_0 = var_92; + SORT_1 var_93_arg_1 = ~state_74; + var_93_arg_1 = var_93_arg_1 & mask_SORT_1; + SORT_1 var_93 = var_93_arg_0 & var_93_arg_1; + SORT_4 var_985_arg_0 = var_984; + SORT_4 var_985_arg_1 = state_43; + SORT_1 var_985 = var_985_arg_0 == var_985_arg_1; + SORT_4 var_131_arg_0 = var_107; + SORT_4 var_131_arg_1 = state_43; + SORT_1 var_131 = var_131_arg_0 == var_131_arg_1; + SORT_4 var_982_arg_0 = var_981; + SORT_4 var_982_arg_1 = state_41; + SORT_1 var_982 = var_982_arg_0 == var_982_arg_1; + SORT_4 var_129_arg_0 = var_107; + SORT_4 var_129_arg_1 = state_41; + SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; + SORT_4 var_979_arg_0 = var_978; + SORT_4 var_979_arg_1 = state_39; + SORT_1 var_979 = var_979_arg_0 == var_979_arg_1; + SORT_4 var_127_arg_0 = var_107; + SORT_4 var_127_arg_1 = state_39; + SORT_1 var_127 = var_127_arg_0 == var_127_arg_1; + SORT_3 var_976_arg_0 = var_975; + SORT_3 var_976_arg_1 = state_37; + SORT_1 var_976 = var_976_arg_0 == var_976_arg_1; + SORT_3 var_125_arg_0 = var_94; + SORT_3 var_125_arg_1 = state_37; + SORT_1 var_125 = var_125_arg_0 == var_125_arg_1; + SORT_3 var_958_arg_0 = var_446; + SORT_3 var_958_arg_1 = state_35; + SORT_1 var_958 = var_958_arg_0 == var_958_arg_1; + SORT_3 var_123_arg_0 = var_94; + SORT_3 var_123_arg_1 = state_35; + SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; + SORT_4 var_956_arg_0 = input_159; + SORT_4 var_956_arg_1 = state_33; + SORT_1 var_956 = var_956_arg_0 == var_956_arg_1; + SORT_4 var_121_arg_0 = var_120; + SORT_4 var_121_arg_1 = state_33; + SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; + SORT_4 var_954_arg_0 = var_748; + SORT_4 var_954_arg_1 = state_31; + SORT_1 var_954 = var_954_arg_0 == var_954_arg_1; + SORT_4 var_118_arg_0 = var_107; + SORT_4 var_118_arg_1 = state_31; + SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; + SORT_4 var_952_arg_0 = var_586; + SORT_4 var_952_arg_1 = state_29; + SORT_1 var_952 = var_952_arg_0 == var_952_arg_1; + SORT_4 var_116_arg_0 = var_107; + SORT_4 var_116_arg_1 = state_29; + SORT_1 var_116 = var_116_arg_0 == var_116_arg_1; + SORT_4 var_950_arg_0 = var_949; + SORT_4 var_950_arg_1 = state_27; + SORT_1 var_950 = var_950_arg_0 == var_950_arg_1; + SORT_4 var_114_arg_0 = var_107; + SORT_4 var_114_arg_1 = state_27; + SORT_1 var_114 = var_114_arg_0 == var_114_arg_1; + SORT_4 var_947_arg_0 = var_686; + SORT_4 var_947_arg_1 = state_25; + SORT_1 var_947 = var_947_arg_0 == var_947_arg_1; + SORT_4 var_112_arg_0 = var_107; + SORT_4 var_112_arg_1 = state_25; + SORT_1 var_112 = var_112_arg_0 == var_112_arg_1; + SORT_4 var_945_arg_0 = var_737; + SORT_4 var_945_arg_1 = state_23; + SORT_1 var_945 = var_945_arg_0 == var_945_arg_1; + SORT_4 var_110_arg_0 = var_107; + SORT_4 var_110_arg_1 = state_23; + SORT_1 var_110 = var_110_arg_0 == var_110_arg_1; + SORT_4 var_943_arg_0 = var_575; + SORT_4 var_943_arg_1 = state_21; + SORT_1 var_943 = var_943_arg_0 == var_943_arg_1; + SORT_4 var_108_arg_0 = var_107; + SORT_4 var_108_arg_1 = state_21; + SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; + SORT_3 var_941_arg_0 = var_940; + SORT_3 var_941_arg_1 = state_18; + SORT_1 var_941 = var_941_arg_0 == var_941_arg_1; + SORT_3 var_105_arg_0 = var_94; + SORT_3 var_105_arg_1 = state_18; + SORT_1 var_105 = var_105_arg_0 == var_105_arg_1; + SORT_3 var_929_arg_0 = var_928; + SORT_3 var_929_arg_1 = state_16; + SORT_1 var_929 = var_929_arg_0 == var_929_arg_1; + SORT_3 var_103_arg_0 = var_94; + SORT_3 var_103_arg_1 = state_16; + SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; + SORT_3 var_915_arg_0 = var_914; + SORT_3 var_915_arg_1 = state_14; + SORT_1 var_915 = var_915_arg_0 == var_915_arg_1; + SORT_3 var_101_arg_0 = var_94; + SORT_3 var_101_arg_1 = state_14; + SORT_1 var_101 = var_101_arg_0 == var_101_arg_1; + SORT_3 var_912_arg_0 = var_911; + SORT_3 var_912_arg_1 = state_12; + SORT_1 var_912 = var_912_arg_0 == var_912_arg_1; + SORT_3 var_99_arg_0 = var_94; + SORT_3 var_99_arg_1 = state_12; + SORT_1 var_99 = var_99_arg_0 == var_99_arg_1; + SORT_3 var_909_arg_0 = var_908; + SORT_3 var_909_arg_1 = state_10; + SORT_1 var_909 = var_909_arg_0 == var_909_arg_1; + SORT_3 var_97_arg_0 = var_94; + SORT_3 var_97_arg_1 = state_10; + SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; + SORT_3 var_903_arg_0 = var_902; + SORT_3 var_903_arg_1 = state_8; + SORT_1 var_903 = var_903_arg_0 == var_903_arg_1; + SORT_1 var_904_arg_0 = var_893; + SORT_1 var_904_arg_1 = var_903; + SORT_1 var_904 = var_904_arg_0 & var_904_arg_1; + SORT_1 var_910_arg_0 = var_904; + SORT_1 var_910_arg_1 = var_909; + SORT_1 var_910 = var_910_arg_0 & var_910_arg_1; + SORT_1 var_913_arg_0 = var_910; + SORT_1 var_913_arg_1 = var_912; + SORT_1 var_913 = var_913_arg_0 & var_913_arg_1; + SORT_1 var_916_arg_0 = var_913; + SORT_1 var_916_arg_1 = var_915; + SORT_1 var_916 = var_916_arg_0 & var_916_arg_1; + SORT_1 var_930_arg_0 = var_916; + SORT_1 var_930_arg_1 = var_929; + SORT_1 var_930 = var_930_arg_0 & var_930_arg_1; + SORT_1 var_942_arg_0 = var_930; + SORT_1 var_942_arg_1 = var_941; + SORT_1 var_942 = var_942_arg_0 & var_942_arg_1; + SORT_1 var_944_arg_0 = var_942; + SORT_1 var_944_arg_1 = var_943; + SORT_1 var_944 = var_944_arg_0 & var_944_arg_1; + SORT_1 var_946_arg_0 = var_944; + SORT_1 var_946_arg_1 = var_945; + SORT_1 var_946 = var_946_arg_0 & var_946_arg_1; + SORT_1 var_948_arg_0 = var_946; + SORT_1 var_948_arg_1 = var_947; + SORT_1 var_948 = var_948_arg_0 & var_948_arg_1; + SORT_1 var_951_arg_0 = var_948; + SORT_1 var_951_arg_1 = var_950; + SORT_1 var_951 = var_951_arg_0 & var_951_arg_1; + SORT_1 var_953_arg_0 = var_951; + SORT_1 var_953_arg_1 = var_952; + SORT_1 var_953 = var_953_arg_0 & var_953_arg_1; + SORT_1 var_955_arg_0 = var_953; + SORT_1 var_955_arg_1 = var_954; + SORT_1 var_955 = var_955_arg_0 & var_955_arg_1; + SORT_1 var_957_arg_0 = var_955; + SORT_1 var_957_arg_1 = var_956; + SORT_1 var_957 = var_957_arg_0 & var_957_arg_1; + SORT_1 var_959_arg_0 = var_957; + SORT_1 var_959_arg_1 = var_958; + SORT_1 var_959 = var_959_arg_0 & var_959_arg_1; + SORT_1 var_977_arg_0 = var_959; + SORT_1 var_977_arg_1 = var_976; + SORT_1 var_977 = var_977_arg_0 & var_977_arg_1; + SORT_1 var_980_arg_0 = var_977; + SORT_1 var_980_arg_1 = var_979; + SORT_1 var_980 = var_980_arg_0 & var_980_arg_1; + SORT_1 var_983_arg_0 = var_980; + SORT_1 var_983_arg_1 = var_982; + SORT_1 var_983 = var_983_arg_0 & var_983_arg_1; + SORT_1 var_986_arg_0 = var_983; + SORT_1 var_986_arg_1 = var_985; + SORT_1 var_986 = var_986_arg_0 & var_986_arg_1; + SORT_1 var_988_arg_0 = var_986; + SORT_1 var_988_arg_1 = var_987; + SORT_1 var_988 = var_988_arg_0 & var_988_arg_1; + SORT_1 var_990_arg_0 = var_988; + SORT_1 var_990_arg_1 = var_989; + SORT_1 var_990 = var_990_arg_0 & var_990_arg_1; + SORT_1 var_992_arg_0 = var_990; + SORT_1 var_992_arg_1 = var_991; + SORT_1 var_992 = var_992_arg_0 & var_992_arg_1; + SORT_1 var_994_arg_0 = var_992; + SORT_1 var_994_arg_1 = var_993; + SORT_1 var_994 = var_994_arg_0 & var_994_arg_1; + SORT_1 var_996_arg_0 = var_994; + SORT_1 var_996_arg_1 = var_995; + SORT_1 var_996 = var_996_arg_0 & var_996_arg_1; + SORT_1 var_998_arg_0 = var_996; + SORT_1 var_998_arg_1 = var_997; + SORT_1 var_998 = var_998_arg_0 & var_998_arg_1; + SORT_1 var_1000_arg_0 = var_998; + SORT_1 var_1000_arg_1 = var_999; + SORT_1 var_1000 = var_1000_arg_0 & var_1000_arg_1; + SORT_1 var_1002_arg_0 = var_1000; + SORT_1 var_1002_arg_1 = var_1001; + SORT_1 var_1002 = var_1002_arg_0 & var_1002_arg_1; + SORT_1 var_1004_arg_0 = var_1002; + SORT_1 var_1004_arg_1 = var_1003; + SORT_1 var_1004 = var_1004_arg_0 & var_1004_arg_1; + SORT_1 var_1006_arg_0 = var_1004; + SORT_1 var_1006_arg_1 = var_1005; + SORT_1 var_1006 = var_1006_arg_0 & var_1006_arg_1; + SORT_1 var_1008_arg_0 = var_1006; + SORT_1 var_1008_arg_1 = var_1007; + SORT_1 var_1008 = var_1008_arg_0 & var_1008_arg_1; + SORT_1 var_1010_arg_0 = var_1008; + SORT_1 var_1010_arg_1 = var_1009; + SORT_1 var_1010 = var_1010_arg_0 & var_1010_arg_1; + SORT_1 var_1012_arg_0 = var_1010; + SORT_1 var_1012_arg_1 = var_1011; + SORT_1 var_1012 = var_1012_arg_0 & var_1012_arg_1; + SORT_1 var_1014_arg_0 = var_1012; + SORT_1 var_1014_arg_1 = var_1013; + SORT_1 var_1014 = var_1014_arg_0 & var_1014_arg_1; + SORT_1 var_1016_arg_0 = var_1014; + SORT_1 var_1016_arg_1 = var_1015; + SORT_1 var_1016 = var_1016_arg_0 & var_1016_arg_1; + SORT_1 var_1017_arg_0 = var_1016; + SORT_1 var_1017_arg_1 = state_78; + SORT_1 var_1017 = var_1017_arg_0 & var_1017_arg_1; + SORT_1 var_1027_arg_0 = state_76; + SORT_1 var_1027_arg_1 = var_1017; + SORT_1 var_1027_arg_2 = var_1026; + SORT_1 var_1027 = var_1027_arg_0 ? var_1027_arg_1 : var_1027_arg_2; + var_1027 = var_1027 & mask_SORT_1; + SORT_3 var_95_arg_0 = var_94; + SORT_3 var_95_arg_1 = state_8; + SORT_1 var_95 = var_95_arg_0 == var_95_arg_1; + SORT_1 var_96_arg_0 = var_93; + SORT_1 var_96_arg_1 = var_95; + SORT_1 var_96 = var_96_arg_0 & var_96_arg_1; + SORT_1 var_98_arg_0 = var_96; + SORT_1 var_98_arg_1 = var_97; + SORT_1 var_98 = var_98_arg_0 & var_98_arg_1; + SORT_1 var_100_arg_0 = var_98; + SORT_1 var_100_arg_1 = var_99; + SORT_1 var_100 = var_100_arg_0 & var_100_arg_1; + SORT_1 var_102_arg_0 = var_100; + SORT_1 var_102_arg_1 = var_101; + SORT_1 var_102 = var_102_arg_0 & var_102_arg_1; + SORT_1 var_104_arg_0 = var_102; + SORT_1 var_104_arg_1 = var_103; + SORT_1 var_104 = var_104_arg_0 & var_104_arg_1; + SORT_1 var_106_arg_0 = var_104; + SORT_1 var_106_arg_1 = var_105; + SORT_1 var_106 = var_106_arg_0 & var_106_arg_1; + SORT_1 var_109_arg_0 = var_106; + SORT_1 var_109_arg_1 = var_108; + SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; + SORT_1 var_111_arg_0 = var_109; + SORT_1 var_111_arg_1 = var_110; + SORT_1 var_111 = var_111_arg_0 & var_111_arg_1; + SORT_1 var_113_arg_0 = var_111; + SORT_1 var_113_arg_1 = var_112; + SORT_1 var_113 = var_113_arg_0 & var_113_arg_1; + SORT_1 var_115_arg_0 = var_113; + SORT_1 var_115_arg_1 = var_114; + SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; + SORT_1 var_117_arg_0 = var_115; + SORT_1 var_117_arg_1 = var_116; + SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; + SORT_1 var_119_arg_0 = var_117; + SORT_1 var_119_arg_1 = var_118; + SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; + SORT_1 var_122_arg_0 = var_119; + SORT_1 var_122_arg_1 = var_121; + SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; + SORT_1 var_124_arg_0 = var_122; + SORT_1 var_124_arg_1 = var_123; + SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; + SORT_1 var_126_arg_0 = var_124; + SORT_1 var_126_arg_1 = var_125; + SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; + SORT_1 var_128_arg_0 = var_126; + SORT_1 var_128_arg_1 = var_127; + SORT_1 var_128 = var_128_arg_0 & var_128_arg_1; + SORT_1 var_130_arg_0 = var_128; + SORT_1 var_130_arg_1 = var_129; + SORT_1 var_130 = var_130_arg_0 & var_130_arg_1; + SORT_1 var_132_arg_0 = var_130; + SORT_1 var_132_arg_1 = var_131; + SORT_1 var_132 = var_132_arg_0 & var_132_arg_1; + SORT_1 var_133_arg_0 = state_78; + SORT_1 var_133_arg_1 = var_132; + SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; + var_133 = var_133 & mask_SORT_1; + // Assuming invariants ... + // Asserting properties ... + SORT_1 bad_134_arg_0 = var_133; + __VERIFIER_assert(!(bad_134_arg_0)); + // Computing next states ... + SORT_3 next_136_arg_1 = input_135; + SORT_3 next_138_arg_1 = input_137; + SORT_3 next_140_arg_1 = input_139; + SORT_3 next_142_arg_1 = input_141; + SORT_3 next_144_arg_1 = input_143; + SORT_3 next_146_arg_1 = input_145; + SORT_4 next_148_arg_1 = input_147; + SORT_4 next_150_arg_1 = input_149; + SORT_4 next_152_arg_1 = input_151; + SORT_4 next_154_arg_1 = input_153; + SORT_4 next_156_arg_1 = input_155; + SORT_4 next_158_arg_1 = input_157; + SORT_4 next_160_arg_1 = input_159; + SORT_3 next_162_arg_1 = input_161; + SORT_3 next_164_arg_1 = input_163; + SORT_4 next_166_arg_1 = input_165; + SORT_4 next_168_arg_1 = input_167; + SORT_4 next_170_arg_1 = input_169; + SORT_1 next_172_arg_1 = input_171; + SORT_1 next_174_arg_1 = input_173; + SORT_1 next_176_arg_1 = input_175; + SORT_1 next_178_arg_1 = input_177; + SORT_1 next_180_arg_1 = input_179; + SORT_1 next_182_arg_1 = input_181; + SORT_1 next_184_arg_1 = input_183; + SORT_1 next_186_arg_1 = input_185; + SORT_1 next_188_arg_1 = input_187; + SORT_1 next_190_arg_1 = input_189; + SORT_1 next_192_arg_1 = input_191; + SORT_1 next_194_arg_1 = input_193; + SORT_1 next_196_arg_1 = input_195; + SORT_1 next_198_arg_1 = input_197; + SORT_1 next_200_arg_1 = input_199; + SORT_1 next_202_arg_1 = var_201; + SORT_1 next_1028_arg_1 = var_1027; + // Assigning next states ... + state_8 = next_136_arg_1; + state_10 = next_138_arg_1; + state_12 = next_140_arg_1; + state_14 = next_142_arg_1; + state_16 = next_144_arg_1; + state_18 = next_146_arg_1; + state_21 = next_148_arg_1; + state_23 = next_150_arg_1; + state_25 = next_152_arg_1; + state_27 = next_154_arg_1; + state_29 = next_156_arg_1; + state_31 = next_158_arg_1; + state_33 = next_160_arg_1; + state_35 = next_162_arg_1; + state_37 = next_164_arg_1; + state_39 = next_166_arg_1; + state_41 = next_168_arg_1; + state_43 = next_170_arg_1; + state_46 = next_172_arg_1; + state_48 = next_174_arg_1; + state_50 = next_176_arg_1; + state_52 = next_178_arg_1; + state_54 = next_180_arg_1; + state_56 = next_182_arg_1; + state_58 = next_184_arg_1; + state_60 = next_186_arg_1; + state_62 = next_188_arg_1; + state_64 = next_190_arg_1; + state_66 = next_192_arg_1; + state_68 = next_194_arg_1; + state_70 = next_196_arg_1; + state_72 = next_198_arg_1; + state_74 = next_200_arg_1; + state_76 = next_202_arg_1; + state_78 = next_1028_arg_1; + } + return 0; +} diff --git a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoi.kt b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoi.kt index e2ae872a22..a212922fd3 100644 --- a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoi.kt +++ b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoi.kt @@ -120,7 +120,7 @@ abstract class XcfaCoi(protected val xcfa: XCFA) { val toVisit = edge.target.outgoingEdges.toMutableList() val visited = mutableSetOf() while (toVisit.isNotEmpty()) { - val visiting = toVisit.removeFirst() + val visiting = toVisit.removeAt(0) visited.add(visiting) val currentVars = visiting.collectVarsWithAccessType() addEdgeIfObserved( diff --git a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiMultiThread.kt b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiMultiThread.kt index 96b7c7a2f3..79002f02ae 100644 --- a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiMultiThread.kt +++ b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiMultiThread.kt @@ -112,7 +112,7 @@ class XcfaCoiMultiThread(xcfa: XCFA) : XcfaCoi(xcfa) { val visited = mutableSetOf() while (toVisit.isNotEmpty()) { - val visiting = toVisit.removeFirst() + val visiting = toVisit.removeAt(0) if (isRealObserver(visiting)) return true visited.add(visiting) diff --git a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiSingleThread.kt b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiSingleThread.kt index dbea686f3e..20a4ea3247 100644 --- a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiSingleThread.kt +++ b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/coi/XcfaCoiSingleThread.kt @@ -80,7 +80,7 @@ class XcfaCoiSingleThread(xcfa: XCFA) : XcfaCoi(xcfa) { val toVisit = realObservers.toMutableList() val visited = mutableSetOf() while (toVisit.isNotEmpty()) { - val visiting = toVisit.removeFirst() + val visiting = toVisit.removeAt(0) visited.add(visiting) val toAdd = directObservers[visiting] ?: emptySet() toVisit.addAll(toAdd.filter { it !in visited }) diff --git a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/oc/XcfaOcTraceExtractor.kt b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/oc/XcfaOcTraceExtractor.kt index e46dbf7acd..d0b3ca4054 100644 --- a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/oc/XcfaOcTraceExtractor.kt +++ b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/oc/XcfaOcTraceExtractor.kt @@ -126,7 +126,7 @@ internal class XcfaOcTraceExtractor( val finished = mutableListOf() // topological order while (lastEvents.isNotEmpty()) { // DFS from startEvents as root nodes val stack = Stack() - stack.push(StackItem(lastEvents.removeFirst())) + stack.push(StackItem(lastEvents.removeAt(0))) while (stack.isNotEmpty()) { val top = stack.peek() if (top.eventsToVisit == null) { diff --git a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/por/XcfaSporLts.kt b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/por/XcfaSporLts.kt index 407d0c824a..9e6650d7a4 100644 --- a/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/por/XcfaSporLts.kt +++ b/subprojects/xcfa/xcfa-analysis/src/main/java/hu/bme/mit/theta/xcfa/analysis/por/XcfaSporLts.kt @@ -432,7 +432,7 @@ open class XcfaSporLts(protected val xcfa: XCFA) : val edgesToExplore = mutableListOf() edgesToExplore.add(startEdge) while (edgesToExplore.isNotEmpty()) { - val exploring = edgesToExplore.removeFirst() + val exploring = edgesToExplore.removeAt(0) vars.addAll(getDirectlyUsedVars(exploring)) if (goFurther.test(exploring)) { val successiveEdges = getSuccessiveEdges(exploring) @@ -461,7 +461,7 @@ open class XcfaSporLts(protected val xcfa: XCFA) : val edgesToExplore = mutableListOf() edgesToExplore.add(startEdge) while (edgesToExplore.isNotEmpty()) { - val exploring = edgesToExplore.removeFirst() + val exploring = edgesToExplore.removeAt(0) memLocs.addAll(getDirectlyUsedMemLocs(exploring)) if (goFurther.test(exploring)) { val successiveEdges = getSuccessiveEdges(exploring) diff --git a/subprojects/xcfa/xcfa-cli/.z3-trace b/subprojects/xcfa/xcfa-cli/.z3-trace new file mode 100644 index 0000000000..e69de29bb2 diff --git a/subprojects/xcfa/xcfa-cli/build.gradle.kts b/subprojects/xcfa/xcfa-cli/build.gradle.kts index fbefac98cf..d04f33eed0 100644 --- a/subprojects/xcfa/xcfa-cli/build.gradle.kts +++ b/subprojects/xcfa/xcfa-cli/build.gradle.kts @@ -48,6 +48,8 @@ dependencies { implementation(Deps.z3) implementation("com.zaxxer:nuprocess:2.0.5") implementation("org.jetbrains.kotlin:kotlin-scripting-jsr223:${Versions.kotlin}") + implementation(project(mapOf("path" to ":theta-btor2-frontend"))) + implementation(project(mapOf("path" to ":theta-btor2xcfa"))) testImplementation(kotlin("script-runtime")) } diff --git a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/ExecuteConfig.kt b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/ExecuteConfig.kt index 4064c78fac..3760ce18fb 100644 --- a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/ExecuteConfig.kt +++ b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/ExecuteConfig.kt @@ -33,6 +33,7 @@ import hu.bme.mit.theta.analysis.ptr.PtrPrec import hu.bme.mit.theta.analysis.ptr.PtrState import hu.bme.mit.theta.cat.dsl.CatDslManager import hu.bme.mit.theta.common.logging.Logger +import hu.bme.mit.theta.common.logging.Logger.Level.* import hu.bme.mit.theta.common.logging.Logger.Level.INFO import hu.bme.mit.theta.common.visualization.writer.WebDebuggerLogger import hu.bme.mit.theta.frontend.ParseContext diff --git a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/ParamValues.kt b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/ParamValues.kt index 81a725bd18..b0422d9ef0 100644 --- a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/ParamValues.kt +++ b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/ParamValues.kt @@ -76,6 +76,7 @@ enum class InputType { CHC, LITMUS, CFA, + BTOR2, } enum class Backend { diff --git a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/XcfaConfig.kt b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/XcfaConfig.kt index 65772fac39..522d3e2d37 100644 --- a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/XcfaConfig.kt +++ b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/params/XcfaConfig.kt @@ -160,6 +160,7 @@ data class FrontendConfig( InputType.LITMUS -> null InputType.CFA -> null InputType.CHC -> CHCFrontendConfig() as T + InputType.BTOR2 -> BTOR2FrontendConfig() as T } } } @@ -187,6 +188,14 @@ data class CHCFrontendConfig( var model: Boolean = false, ) : SpecFrontendConfig +data class BTOR2FrontendConfig ( + @Parameter( + names = ["--optimization"], + description = "Runs frontend with all given optimizations" + ) + var btor2Passes: Boolean = false +) : SpecFrontendConfig + interface SpecBackendConfig : Config data class BackendConfig( @@ -308,7 +317,7 @@ data class TracegenConfig( data class CegarAbstractorConfig( @Parameter(names = ["--abstraction-solver"], description = "Abstraction solver name") - var abstractionSolver: String = "Z3", + var abstractionSolver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-abstraction-solver"], description = @@ -333,7 +342,7 @@ data class CegarAbstractorConfig( data class CegarRefinerConfig( @Parameter(names = ["--refinement-solver"], description = "Refinement solver name") - var refinementSolver: String = "Z3", + var refinementSolver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-refinement-solver"], description = @@ -450,7 +459,7 @@ data class BMCConfig( @Parameter(names = ["--non-lf-path"], description = "Disable loop-freeness check") var nonLfPath: Boolean = false, @Parameter(names = ["--bmc-solver"], description = "BMC solver name") - var bmcSolver: String = "Z3", + var bmcSolver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-bmc-solver"], description = @@ -463,7 +472,7 @@ data class InductionConfig( @Parameter(names = ["--no-induction"], description = "Disable induction check") var disable: Boolean = false, @Parameter(names = ["--induction-solver", "--ind-solver"], description = "Induction solver name") - var indSolver: String = "Z3", + var indSolver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-induction-solver"], description = @@ -483,7 +492,7 @@ data class InterpolationConfig( names = ["--interpolation-solver", "--itp-solver"], description = "Interpolation solver name", ) - var itpSolver: String = "Z3", + var itpSolver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-interpolation-solver"], description = @@ -535,7 +544,7 @@ data class PortfolioConfig( data class MddConfig( @Parameter(names = ["--solver", "--mdd-solver"], description = "MDD solver name") - var solver: String = "Z3", + var solver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-solver", "--validate-mdd-solver"], description = @@ -557,7 +566,7 @@ data class MddConfig( data class Ic3Config( @Parameter(names = ["--solver", "--mdd-solver"], description = "MDD solver name") - var solver: String = "Z3", + var solver: String = "mathsat:5.6.10", @Parameter( names = ["--validate-solver", "--validate-mdd-solver"], description = diff --git a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/SolverRegistration.kt b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/SolverRegistration.kt index d455f425c3..9ff327c20d 100644 --- a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/SolverRegistration.kt +++ b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/SolverRegistration.kt @@ -15,6 +15,7 @@ */ package hu.bme.mit.theta.xcfa.cli.utils +import hu.bme.mit.theta.common.OsHelper import hu.bme.mit.theta.common.logging.Logger import hu.bme.mit.theta.solver.SolverFactory import hu.bme.mit.theta.solver.SolverManager diff --git a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/XcfaParser.kt b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/XcfaParser.kt index e144ecbe02..e9c6c85ca4 100644 --- a/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/XcfaParser.kt +++ b/subprojects/xcfa/xcfa-cli/src/main/java/hu/bme/mit/theta/xcfa/cli/utils/XcfaParser.kt @@ -20,6 +20,9 @@ import com.charleskorn.kaml.YamlList import com.charleskorn.kaml.YamlMap import com.charleskorn.kaml.YamlNode import com.charleskorn.kaml.YamlScalar +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Lexer +import hu.bme.mit.theta.btor2.frontend.dsl.gen.Btor2Parser +import hu.bme.mit.theta.btor2xcfa.Btor2XcfaBuilder import hu.bme.mit.theta.c2xcfa.getXcfaFromC import hu.bme.mit.theta.cfa.CFA import hu.bme.mit.theta.cfa.dsl.CfaDslManager @@ -29,6 +32,7 @@ import hu.bme.mit.theta.frontend.chc.ChcFrontend import hu.bme.mit.theta.frontend.litmus2xcfa.LitmusInterpreter import hu.bme.mit.theta.frontend.transformation.ArchitectureConfig import hu.bme.mit.theta.frontend.transformation.grammar.preprocess.ArithmeticTrait +import hu.bme.mit.theta.frontend.visitors.Btor2Visitor import hu.bme.mit.theta.llvm2xcfa.ArithmeticType import hu.bme.mit.theta.llvm2xcfa.XcfaUtils import hu.bme.mit.theta.xcfa.XcfaProperty @@ -47,7 +51,9 @@ import javax.script.ScriptEngine import javax.script.ScriptEngineManager import kotlin.io.path.Path import kotlin.jvm.optionals.getOrNull +import org.antlr.v4.runtime.BailErrorStrategy import org.antlr.v4.runtime.CharStreams +import org.antlr.v4.runtime.CommonTokenStream fun getXcfa( config: XcfaConfig<*, *>, @@ -101,6 +107,11 @@ fun getXcfa( } } } + + InputType.BTOR2 -> { + val btor2Passes = config.frontendConfig.specConfig as Boolean + parseBTOR2(config.inputConfig.input!!, btor2Passes, parseContext, logger, uniqueWarningLogger) + } } } catch (e: Exception) { if (config.debugConfig.stacktrace) e.printStackTrace() @@ -245,3 +256,28 @@ private fun parseChc( } return xcfaBuilder.build() } + +private fun parseBTOR2( + input: File, + btor2Passes: Boolean, + parseContext: ParseContext, + logger: Logger, + uniqueLogger: Logger, +): XCFA { + val visitor = Btor2Visitor() + val btor2File = input + + val inputBTOR2 = btor2File.readLines().joinToString("\n") + val cinput = CharStreams.fromString(inputBTOR2) + val lexer = Btor2Lexer(cinput) + val tokens = CommonTokenStream(lexer) + val parser = Btor2Parser(tokens) + parser.errorHandler = BailErrorStrategy() + val context = parser.btor2() + + context.accept(visitor) + + val xcfa = Btor2XcfaBuilder.btor2xcfa(btor2Passes, parseContext, uniqueLogger) + // logger.write(Logger.Level.MAINSTEP, xcfa.toDot()) + return xcfa +} diff --git a/subprojects/xcfa/xcfa-cli/src/test/java/hu/bme/mit/theta/xcfa/cli/XcfaDslTest.kt b/subprojects/xcfa/xcfa-cli/src/test/java/hu/bme/mit/theta/xcfa/cli/XcfaDslTest.kt index 006edef819..110b618e85 100644 --- a/subprojects/xcfa/xcfa-cli/src/test/java/hu/bme/mit/theta/xcfa/cli/XcfaDslTest.kt +++ b/subprojects/xcfa/xcfa-cli/src/test/java/hu/bme/mit/theta/xcfa/cli/XcfaDslTest.kt @@ -16,6 +16,7 @@ package hu.bme.mit.theta.xcfa.cli import hu.bme.mit.theta.common.logging.NullLogger +import hu.bme.mit.theta.common.logging.UniqueWarningLogger import hu.bme.mit.theta.core.type.inttype.IntExprs.Int import hu.bme.mit.theta.frontend.ParseContext import hu.bme.mit.theta.solver.SolverManager @@ -94,7 +95,7 @@ class XcfaDslTest { config, ParseContext(), NullLogger.getInstance(), - NullLogger.getInstance(), + UniqueWarningLogger(NullLogger.getInstance()), ) val safetyResult = checker.check() Assert.assertTrue(safetyResult.isSafe) @@ -108,7 +109,7 @@ class XcfaDslTest { config, ParseContext(), NullLogger.getInstance(), - NullLogger.getInstance(), + UniqueWarningLogger(NullLogger.getInstance()), ) val safetyResult = checker.check() Assert.assertTrue(safetyResult.isUnsafe) diff --git a/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/ProcedurePassManager.kt b/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/ProcedurePassManager.kt index 5c975dfbfd..d5ddee8689 100644 --- a/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/ProcedurePassManager.kt +++ b/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/ProcedurePassManager.kt @@ -171,3 +171,20 @@ class ChcPasses(parseContext: ParseContext, uniqueWarningLogger: Logger) : ) class LitmusPasses : ProcedurePassManager() + +class Btor2Passes(parseContext: ParseContext, uniqueWarningLogger: Logger) : + ProcedurePassManager( + listOf( + LbePass(parseContext), + NormalizePass(), + DeterministicPass(), + EmptyEdgeRemovalPass(), + UnusedLocRemovalPass(), + SimplifyExprsPass(parseContext), + UnusedVarPass(uniqueWarningLogger), + ) + ) + +class Btor2EmptyPass() : ProcedurePassManager() { + // No optimization +} diff --git a/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/StaticCoiPass.kt b/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/StaticCoiPass.kt index b55f9b9e65..eeaff1184f 100644 --- a/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/StaticCoiPass.kt +++ b/subprojects/xcfa/xcfa/src/main/java/hu/bme/mit/theta/xcfa/passes/StaticCoiPass.kt @@ -84,7 +84,7 @@ class StaticCoiPass : ProcedurePass { val toVisit = mutableListOf(edge) val visited = mutableSetOf() while (toVisit.isNotEmpty()) { - val visiting = toVisit.removeFirst() + val visiting = toVisit.removeAt(0) visited.add(visiting) val labels = if (visiting == edge) remaining else visiting.getFlatLabels() labels.forEach { target -> @@ -126,7 +126,7 @@ class StaticCoiPass : ProcedurePass { val toVisit = mutableListOf(label) val visited = mutableSetOf() while (toVisit.isNotEmpty()) { - val visiting = toVisit.removeFirst() + val visiting = toVisit.removeAt(0) if (visiting.collectAssumesVars().isNotEmpty()) return true if (visiting.dereferencesWithAccessType.any { it.value.isWritten }) return true