From 707fc1741d544452dd605636b2bcbd61e7b6f514 Mon Sep 17 00:00:00 2001 From: Imran Yusuff Date: Tue, 13 Dec 2022 15:47:00 +0800 Subject: [PATCH] Add support for Xilinx Spartan-3A(N) FPGA Starter Kit (up to bitgen for now) --- blinky.core | 33 +++++++++++++++++++++++++++++++ spartan3a_starter_kit/blinky.ucf | 8 ++++++++ spartan3a_starter_kit/options.tcl | 1 + 3 files changed, 42 insertions(+) create mode 100644 spartan3a_starter_kit/blinky.ucf create mode 100644 spartan3a_starter_kit/options.tcl diff --git a/blinky.core b/blinky.core index 0428d0d..3e11d04 100644 --- a/blinky.core +++ b/blinky.core @@ -273,6 +273,11 @@ filesets: - qmtech_5cefa5f23/blinky_qmtech_5cefa5f23.v : {file_type : verilogSource } - qmtech_5cefa5f23/io.qsf : {file_type : QSF} + spartan3a_starter_kit: + files: + - spartan3a_starter_kit/blinky.ucf : {file_type : UCF} + - spartan3a_starter_kit/options.tcl : {file_type : tclSource} + spartan_edge_accelerator_board: files: [spartan_edge_accelerator_board/blinky.xdc : {file_type : xdc}] @@ -1079,6 +1084,34 @@ targets: xelab_options: [--timescale, 1ns/1ns] toplevel: blinky_tb + spartan3a_starter_kit: + default_tool : ise + description : XILINX Spartan-3A FPGA Starter Kit + filesets : [rtl, spartan3a_starter_kit] + parameters : [clk_freq_hz=50000000] + tools: + ise: + family : "\"Spartan3A and Spartan3AN\"" + device : xc3s700a + package : fgg484 + speed : -4 + board_device_index : 1 + toplevel : blinky + + spartan3an_starter_kit: + default_tool : ise + description : XILINX Spartan-3AN FPGA Starter Kit + filesets : [rtl, spartan3a_starter_kit] + parameters : [clk_freq_hz=50000000] + tools: + ise: + family : "\"Spartan3A and Spartan3AN\"" + device : xc3s700an + package : fgg484 + speed : -4 + board_device_index : 1 + toplevel : blinky + spartan_edge_accelerator_board: default_tool : vivado description : Spartan Edge Accelerator Board diff --git a/spartan3a_starter_kit/blinky.ucf b/spartan3a_starter_kit/blinky.ucf new file mode 100644 index 0000000..6c67d3b --- /dev/null +++ b/spartan3a_starter_kit/blinky.ucf @@ -0,0 +1,8 @@ +# UCF Location Constraints for 50 MHz Clock Source +NET "clk" LOC = "E12" | IOSTANDARD = LVCMOS33 ; + +# Define clock period for 50 MHz oscillator +NET "clk" PERIOD = 20.0ns HIGH 50%; + +# UCF Constraints for a discrete LED +NET "q" LOC = "R20" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; diff --git a/spartan3a_starter_kit/options.tcl b/spartan3a_starter_kit/options.tcl new file mode 100644 index 0000000..3598dab --- /dev/null +++ b/spartan3a_starter_kit/options.tcl @@ -0,0 +1 @@ +project set "Other XST Command Line Options" "-use_new_parser yes"