From c94e4658f442e464bd8b32d75c9eb36e19d1217e Mon Sep 17 00:00:00 2001 From: Eliza Weisman Date: Mon, 20 Jan 2020 09:55:22 -0800 Subject: [PATCH 1/2] chore: change x86 inline asm from AT&T syntax to intel As discussed in [#59 (comment)][1], it's good to standardize on a syntax, and @mystor and I both have a minor preference for Intel over AT&T syntax. Also, when the work started in PR #61 merges, we will be showing disassembly in crash screens using Intel syntax, so we should use consistent syntax in source. This PR changes inline assembly to use Intel syntax. In cases where the inline assembly is a single instruction with no syntactic differences between AT&T and Intel syntax (e.g. "cli", "hlt", et cetera), I did not add the "intel" flag to the `asm!` macro. I can if we'd prefer this to be explicit, but the syntax is currently equivalent. [1]: https://github.com/hawkw/mycelium/pull/59#discussion_r366014379 Signed-off-by: Eliza Weisman --- hal-x86_64/src/cpu.rs | 6 +++--- hal-x86_64/src/interrupt/idt.rs | 2 +- hal-x86_64/src/segment.rs | 2 +- src/arch/x86_64.rs | 8 ++++---- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hal-x86_64/src/cpu.rs b/hal-x86_64/src/cpu.rs index b422bf01..f5b40b2d 100644 --- a/hal-x86_64/src/cpu.rs +++ b/hal-x86_64/src/cpu.rs @@ -1,5 +1,5 @@ -use core::mem; use core::fmt; +use core::mem; #[repr(transparent)] pub struct Port { @@ -21,12 +21,12 @@ impl Port { pub unsafe fn readb(&self) -> u8 { let result: u8; - asm!("inb %dx, %al" : "={al}"(result) : "{dx}"(self.num) :: "volatile"); + asm!("inb al, dx" : "={al}"(result) : "{dx}"(self.num) :: "volatile", "intel"); result } pub unsafe fn writeb(&self, value: u8) { - asm!("outb %al, %dx" :: "{dx}"(self.num), "{al}"(value) :: "volatile"); + asm!("outb dx, al" :: "{dx}"(self.num), "{al}"(value) :: "volatile", "intel"); } // TODO(ixi): anything wider than a byte lol } diff --git a/hal-x86_64/src/interrupt/idt.rs b/hal-x86_64/src/interrupt/idt.rs index 67231789..99411134 100644 --- a/hal-x86_64/src/interrupt/idt.rs +++ b/hal-x86_64/src/interrupt/idt.rs @@ -184,7 +184,7 @@ impl Idt { pub fn load(&'static self) { let ptr = crate::cpu::DtablePtr::new(self); - unsafe { asm!("lidt ($0)" :: "r" (&ptr) : "memory") } + unsafe { asm!("lidt [$0]" :: "r" (&ptr) : "memory" : "intel") } } } diff --git a/hal-x86_64/src/segment.rs b/hal-x86_64/src/segment.rs index 68023654..5b90425e 100644 --- a/hal-x86_64/src/segment.rs +++ b/hal-x86_64/src/segment.rs @@ -7,7 +7,7 @@ pub struct Selector(u16); /// Returns the current code segment selector in `%cs`. pub fn code_segment() -> Selector { let value: u16; - unsafe { asm!("mov %cs, $0" : "=r" (value)) }; + unsafe { asm!("mov $0, cs" : "=r" (value) ::: "intel") }; Selector(value) } diff --git a/src/arch/x86_64.rs b/src/arch/x86_64.rs index 61444c24..ec3dce24 100644 --- a/src/arch/x86_64.rs +++ b/src/arch/x86_64.rs @@ -102,11 +102,11 @@ pub(crate) fn oops(cause: &dyn core::fmt::Display) -> ! { unsafe { asm!(" pushfq - popq $0 - mov %cr0, $1 - mov %cr3, $2 + pop $0 + mov $1, cr0 + mov $2, cr3 " - : "=r"(rflags), "=r"(cr0), "=r"(cr3) :: "memory" + : "=r"(rflags), "=r"(cr0), "=r"(cr3) :: "memory", "intel" ); }; let _ = writeln!( From 14e5b0ccceef01e972b50baf8789de7ad5fe2998 Mon Sep 17 00:00:00 2001 From: Eliza Weisman Date: Mon, 20 Jan 2020 10:02:16 -0800 Subject: [PATCH 2/2] fixy fix Signed-off-by: Eliza Weisman --- hal-x86_64/src/cpu.rs | 4 ++-- src/arch/x86_64.rs | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hal-x86_64/src/cpu.rs b/hal-x86_64/src/cpu.rs index f5b40b2d..eca4dfbe 100644 --- a/hal-x86_64/src/cpu.rs +++ b/hal-x86_64/src/cpu.rs @@ -21,12 +21,12 @@ impl Port { pub unsafe fn readb(&self) -> u8 { let result: u8; - asm!("inb al, dx" : "={al}"(result) : "{dx}"(self.num) :: "volatile", "intel"); + asm!("in al, dx" : "={al}"(result) : "{dx}"(self.num) :: "volatile", "intel"); result } pub unsafe fn writeb(&self, value: u8) { - asm!("outb dx, al" :: "{dx}"(self.num), "{al}"(value) :: "volatile", "intel"); + asm!("out dx, al" :: "{dx}"(self.num), "{al}"(value) :: "volatile", "intel"); } // TODO(ixi): anything wider than a byte lol } diff --git a/src/arch/x86_64.rs b/src/arch/x86_64.rs index ec3dce24..52aae292 100644 --- a/src/arch/x86_64.rs +++ b/src/arch/x86_64.rs @@ -106,7 +106,7 @@ pub(crate) fn oops(cause: &dyn core::fmt::Display) -> ! { mov $1, cr0 mov $2, cr3 " - : "=r"(rflags), "=r"(cr0), "=r"(cr3) :: "memory", "intel" + : "=r"(rflags), "=r"(cr0), "=r"(cr3) :: "memory" : "intel" ); }; let _ = writeln!(