Initial version of the blinking LED tutorial for A10 PCIe devkit

Author: kbrunham-intel

tutorials/README.md

@@ -7,4 +7,4 @@ This directory contains tutorials related to the Intel FPGA Partial Reconfigurat
 
 
 - [Arria 10 SoC Devkit Blinking LED Tutorial](a10_soc_devkit_blinking_led/)
-
+- [Arria 10 GX FPGA Devkit Blinking LED Tutorial](a10_pcie_devkit_blinking_led/)

tutorials/a10_pcie_devkit_blinking_led/README.md

@@ -0,0 +1,44 @@
+# Arria 10 Blinking LED Partial Reconfiguration Tutorial for the Arria 10 GX FPGA Development Kit
+
+This readme file accompanies the Arria 10 Blinking LED Partial Reconfiguration Tutorial for the Arria 10 GX FPGA Development Kit. This version of the design has been verified using Quartus Prime Pro v16.1.
+
+This readme file contains the following information:
+
+*  Arria 10 Blinking LED Partial Reconfiguration Tutorial Contents--lists the contents of this tutorial.
+*  Technical Documentation--directs you where to find documentation for Arria 10 Blinking LED Partial Reconfiguration walkthrough.
+*  System Requirements--lists the system requirements.
+
+## Arria 10 Blinking LED Partial Reconfiguration Tutorial Contents
+
+*  flat/ - This directory contains the *flat* version of the reference design. The following are the design files available in this folder:
+	* top.sv--top-level file containing the flat implementation of the design.
+	* blinking_led.sdc--defines the timing constraints for the project.
+	* blinking_led.sv--System Verilog file that causes the LEDs to blink using a 32-bit counter.
+	* blinking_led.qpf--Quartus Prime project file containing the base revision information.
+	* blinking_led.qsf--Quartus Prime settings file containing the assignments and settings for the project.
+
+*  pr/ - This directory contains the PR version of the reference design. The following are the complete set of files you will be creating with this tutorial:
+	* blinking_led.sv--System Verilog file that causes the LEDs to blink using a 32-bit counter.
+	* blinking_led.qpf--Quartus Prime project file containing the synthesis revision information for the personas.
+	* blinking_led.qsf--Quartus Prime settings file containing the assignments and settings for the PR project.
+	* blinking_led.sdc--Defines the timing constraints for the PR project.
+	* blinking_led_default.qsf--Quartus Prime settings file containing the assignments and settings for the blinking_led_default persona.
+	* blinking_led_empty.qsf--Quartus Prime project file containing the assignments and settings for blinking_led_empty persona.
+	* blinking_led_empty.sv--System Verilog file that causes the LEDs to stay ON.
+	* blinking_led_pr_alpha.qsf--Quartus Prime settings file containing the assignments and settings for the blinking_led project.
+	* blinking_led_pr_bravo.qsf--Quartus Prime settings file containing the assignments and settings for the blinking_led project.
+	* blinking_led_pr_charlie.qsf--Quartus Prime settings file containing the assignments and settings for the blinking_led project.
+	* blinking_slow_led.qsf--Quartus Prime project file containing the assignments and settings for blinking_led_slow persona.
+	* blinking_slow_led.sv--System Verilog file that causes the LEDs to blink slower.
+	* jtag.sdc--Timing constraints for JTAG
+	* pr_ip.ip--IP variation file for instantiating PR IP core in the design
+	* setup.tcl--contains configuration for the a10_partial_reconfig.tcl flow script   
+	* top.sv--top-level file containing the PR implementation of the design.
+                 
+## Technical Documentation
+
+## System Requirements
+
+*  Quartus Prime Pro Edition software version 16.1
+*  [Arria 10 GX FPGA Development Kit](https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-a10-gx-fpga.html)
+

tutorials/a10_pcie_devkit_blinking_led/flat/blinking_led.qpf

@@ -0,0 +1,21 @@
+# Copyright (C) 2001-2016 Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Intel Program License
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel MegaCore Function License Agreement, or other
+# applicable license agreement, including, without limitation,
+# that your use is for the sole purpose of programming logic
+# devices manufactured by Intel and sold by Intel or its
+# authorized distributors.  Please refer to the applicable
+# agreement for further details.
+
+
+QUARTUS_VERSION = "16.0"
+
+# Revisions
+
+PROJECT_REVISION = "blinking_led"

tutorials/a10_pcie_devkit_blinking_led/flat/blinking_led.qsf

@@ -0,0 +1,41 @@
+# Copyright (C) 2001-2016 Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Intel Program License
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel MegaCore Function License Agreement, or other
+# applicable license agreement, including, without limitation,
+# that your use is for the sole purpose of programming logic
+# devices manufactured by Intel and sold by Intel or its
+# authorized distributors.  Please refer to the applicable
+# agreement for further details.
+
+
+set_global_assignment -name FAMILY "Arria 10"
+set_global_assignment -name DEVICE 10AX115S2F45I1SG
+set_global_assignment -name TOP_LEVEL_ENTITY top
+set_global_assignment -name SYSTEMVERILOG_FILE top.sv
+set_global_assignment -name SYSTEMVERILOG_FILE blinking_led.sv
+set_global_assignment -name SDC_FILE blinking_led.sdc
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_location_assignment PIN_AU33 -to clock
+set_location_assignment PIN_L28 -to led_zero_on
+set_location_assignment PIN_K26 -to led_two_on
+set_location_assignment PIN_K25 -to led_one_on
+set_location_assignment PIN_L25 -to led_three_on
+set_instance_assignment -name IO_STANDARD "1.8 V" -to led_zero_on
+set_instance_assignment -name IO_STANDARD "1.8 V" -to led_one_on
+set_instance_assignment -name IO_STANDARD "1.8 V" -to led_two_on
+set_instance_assignment -name IO_STANDARD "1.8 V" -to led_three_on
+set_instance_assignment -name SLEW_RATE 1 -to led_zero_on
+set_instance_assignment -name SLEW_RATE 1 -to led_one_on
+set_instance_assignment -name SLEW_RATE 1 -to led_two_on
+set_instance_assignment -name SLEW_RATE 1 -to led_three_on
+set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to clock
+set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to led_zero_on
+set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to led_one_on
+set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to led_two_on
+set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to led_three_on

tutorials/a10_pcie_devkit_blinking_led/flat/blinking_led.sdc

@@ -0,0 +1,26 @@
+# Copyright (c) 2001-2016 Intel Corporation
+#  
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#  
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#  
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+# The clock is defined as a 100MHz clock (10ns period)
+create_clock -name {clock} -period 10.00 -waveform { 0.00 5.00 } [get_ports {clock}]
+
+# allocating a 1ns flight time for LED control signals on the board
+set_output_delay -clock clock 1 [get_ports {led_*_on}]

tutorials/a10_pcie_devkit_blinking_led/flat/blinking_led.sv

@@ -0,0 +1,60 @@
+// Copyright (c) 2001-2016 Intel Corporation
+//  
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//  
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//  
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+///////////////////////////////////////////////////////////
+// blinking_led.v
+// a simple design to get LEDs blink using a 32-bit counter
+///////////////////////////////////////////////////////////
+`timescale 1 ps / 1 ps
+`default_nettype none
+
+module blinking_led
+    (
+     // Control signals for the LEDs
+     led_two_on,
+     led_three_on,
+
+     // clock 
+     clock
+     );
+
+    // assuming single bit control signal to turn LED 'on'
+    output  wire    led_two_on;
+    output  wire    led_three_on;
+
+    // clock 
+    input   wire    clock;
+
+    // the 32-bit counter
+    reg [31:0]      count;
+
+    localparam COUNTER_TAP = 23;
+
+    // The counter:
+    always_ff @(posedge clock)
+    begin
+        count <= count + 1;
+    end
+
+    assign  led_two_on    = count[COUNTER_TAP];
+    assign  led_three_on  = ~count[COUNTER_TAP];
+
+endmodule

tutorials/a10_pcie_devkit_blinking_led/flat/top.sv

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+// Copyright (c) 2001-2016 Intel Corporation
+//  
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//  
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//  
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+////////////////////////////////////////////////////////////////////////////
+// top.v
+// a simple design to get LEDs blink using a 32-bit counter
+//
+// Some of the lines of code are commented out. They are not
+// needed since this is the flat implementation of the design
+//
+// As the accompanied application note document explains, the commented lines
+// would be needed as the design implementation migrates from flat to
+// Partial-Reconfiguration (PR) mode
+////////////////////////////////////////////////////////////////////////////
+`timescale 1 ps / 1 ps
+`default_nettype none
+
+module top 
+    (
+
+     ////////////////////////////////////////////////////////////////////////
+     // Control signals for the LEDs
+     ////////////////////////////////////////////////////////////////////////
+     led_zero_on,
+     led_one_on,
+     led_two_on,
+     led_three_on,
+
+     ////////////////////////////////////////////////////////////////////////
+     // clock
+     ////////////////////////////////////////////////////////////////////////
+     clock
+     );
+
+    ////////////////////////////////////////////////////////////////////////
+    // assuming single bit control signal to turn LED 'on'
+    ////////////////////////////////////////////////////////////////////////
+    output  reg   led_zero_on;
+    output  reg   led_one_on;
+    output  reg   led_two_on;
+    output  reg   led_three_on;
+
+    ////////////////////////////////////////////////////////////////////////
+    // clock
+    ////////////////////////////////////////////////////////////////////////
+    input   wire  clock;
+
+    localparam COUNTER_TAP = 24;
+
+    ////////////////////////////////////////////////////////////////////////
+    // the 32-bit counter
+    ////////////////////////////////////////////////////////////////////////
+    reg [31:0]    count;
+
+    ////////////////////////////////////////////////////////////////////////
+    // wire declarations
+    ////////////////////////////////////////////////////////////////////////
+    wire          freeze;          // freeze is not used until design is changed to PR
+    wire [2:0]    pr_ip_status;
+    wire          pr_led_two_on;
+    wire          pr_led_three_on;
+
+    wire          led_zero_on_w;
+    wire          led_one_on_w;
+    wire          led_two_on_w;
+    wire          led_three_on_w;
+
+    ////////////////////////////////////////////////////////////////////////
+    // The counter:
+    ////////////////////////////////////////////////////////////////////////
+    always_ff @(posedge clock)
+    begin
+        count <= count + 1;
+    end
+    
+    ////////////////////////////////////////////////////////////////////////
+    // Register the LED outputs
+    ////////////////////////////////////////////////////////////////////////
+    always_ff @(posedge clock)
+    begin
+        led_zero_on <= led_zero_on_w;
+        led_one_on <= led_one_on_w;
+        led_two_on <= led_two_on_w;
+        led_three_on <= led_three_on_w;
+    end
+
+    ////////////////////////////////////////////////////////////////////////
+    // driving LEDs to show PR as the rest of logic is running
+    ////////////////////////////////////////////////////////////////////////
+    assign  led_zero_on_w   = count[COUNTER_TAP];
+    assign  led_one_on_w    = count[COUNTER_TAP];
+
+    ////////////////////////////////////////////////////////////////////////
+    // When moving from flat design to PR the following two
+    // lines of assign statements need to be used.  
+    // User needs to uncomment them.
+    //
+    // The output ports driven by PR logic need to stablized
+    // during PR reprograming.  Using "freeze" control signal,
+    // from PR IP, to drive these output to logic 1 during
+    // reconfiguration. The logic 1 is chosen because LED is active low.
+    ////////////////////////////////////////////////////////////////////////
+    // The following line is used in PR implementation
+    //  assign led_two_on_w    = freeze ? 1'b1 : pr_led_two_on;
+    
+    // The following line is used in PR implementation
+    //  assign led_three_on_w  = freeze ? 1'b1 : pr_led_three_on;
+
+    ////////////////////////////////////////////////////////////////////////
+    // instance of the default persona
+    ////////////////////////////////////////////////////////////////////////
+    blinking_led u_blinking_led
+        (
+         .led_two_on    (led_two_on_w),       // used in flat implementation
+         //      .led_two_on    (pr_led_two_on),    // used in PR implementation
+
+         .led_three_on  (led_three_on_w),     // used in flat implementation
+         //      .led_three_on  (pr_led_three_on),  // used in PR implementation
+
+         .clock         (clock)
+         );
+
+    //  ////////////////////////////////////////////////////////////////////////
+    //  // when moving from flat design to PR then the following
+    //  // pr_ip needs to be instantiated in order to be able to
+    //  // partially reconfigure the design.
+    //  // 
+    //  // This tutorial implements PR over JTAG
+    //  ////////////////////////////////////////////////////////////////////////
+    //  pr_ip u_pr_ip
+    //  (
+    //      .clk           (clock),
+    //      .nreset        (1'b1),
+    //      .freeze        (freeze),
+    //      .pr_start      (1'b0),            // ignored for JTAG
+    //      .status        (pr_ip_status),
+    //      .data          (16'b0),
+    //      .data_valid    (1'b0),
+    //      .data_ready    ()
+    //  );
+
+endmodule

tutorials/a10_pcie_devkit_blinking_led/pr/blinking_led.qpf

@@ -0,0 +1,28 @@
+# Copyright (C) 2001-2016 Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Intel Program License
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel MegaCore Function License Agreement, or other
+# applicable license agreement, including, without limitation,
+# that your use is for the sole purpose of programming logic
+# devices manufactured by Intel and sold by Intel or its
+# authorized distributors.  Please refer to the applicable
+# agreement for further details.
+
+
+QUARTUS_VERSION = "16.1"
+DATE = "15:33:29  September 14, 2016"
+
+# Revisions
+
+PROJECT_REVISION = "blinking_led"
+PROJECT_REVISION = "blinking_led_pr_charlie"
+PROJECT_REVISION = "blinking_led_pr_bravo"
+PROJECT_REVISION = "blinking_led_pr_alpha"
+PROJECT_REVISION = "blinking_led_default"
+PROJECT_REVISION = "blinking_slow_led"
+PROJECT_REVISION = "blinking_led_empty"